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path: root/arch/sh/drivers/pci/ops-sh4.c
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Diffstat (limited to 'arch/sh/drivers/pci/ops-sh4.c')
-rw-r--r--arch/sh/drivers/pci/ops-sh4.c12
1 files changed, 7 insertions, 5 deletions
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 92d27f734f2e..ee62e6de7133 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -26,6 +26,7 @@ static DEFINE_SPINLOCK(sh4_pci_lock);
26static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn, 26static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
27 int where, int size, u32 *val) 27 int where, int size, u32 *val)
28{ 28{
29 struct pci_channel *chan = bus->sysdata;
29 unsigned long flags; 30 unsigned long flags;
30 u32 data; 31 u32 data;
31 32
@@ -34,8 +35,8 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
34 * so we must do byte alignment by hand 35 * so we must do byte alignment by hand
35 */ 36 */
36 spin_lock_irqsave(&sh4_pci_lock, flags); 37 spin_lock_irqsave(&sh4_pci_lock, flags);
37 pci_write_reg(NULL, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 38 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
38 data = pci_read_reg(NULL, SH4_PCIPDR); 39 data = pci_read_reg(chan, SH4_PCIPDR);
39 spin_unlock_irqrestore(&sh4_pci_lock, flags); 40 spin_unlock_irqrestore(&sh4_pci_lock, flags);
40 41
41 switch (size) { 42 switch (size) {
@@ -63,13 +64,14 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
63static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn, 64static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
64 int where, int size, u32 val) 65 int where, int size, u32 val)
65{ 66{
67 struct pci_channel *chan = bus->sysdata;
66 unsigned long flags; 68 unsigned long flags;
67 int shift; 69 int shift;
68 u32 data; 70 u32 data;
69 71
70 spin_lock_irqsave(&sh4_pci_lock, flags); 72 spin_lock_irqsave(&sh4_pci_lock, flags);
71 pci_write_reg(NULL, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 73 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
72 data = pci_read_reg(NULL, SH4_PCIPDR); 74 data = pci_read_reg(chan, SH4_PCIPDR);
73 spin_unlock_irqrestore(&sh4_pci_lock, flags); 75 spin_unlock_irqrestore(&sh4_pci_lock, flags);
74 76
75 switch (size) { 77 switch (size) {
@@ -90,7 +92,7 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
90 return PCIBIOS_FUNC_NOT_SUPPORTED; 92 return PCIBIOS_FUNC_NOT_SUPPORTED;
91 } 93 }
92 94
93 pci_write_reg(NULL, data, SH4_PCIPDR); 95 pci_write_reg(chan, data, SH4_PCIPDR);
94 96
95 return PCIBIOS_SUCCESSFUL; 97 return PCIBIOS_SUCCESSFUL;
96} 98}