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path: root/arch/sh/drivers/pci/ops-sh4.c
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Diffstat (limited to 'arch/sh/drivers/pci/ops-sh4.c')
-rw-r--r--arch/sh/drivers/pci/ops-sh4.c11
1 files changed, 5 insertions, 6 deletions
diff --git a/arch/sh/drivers/pci/ops-sh4.c b/arch/sh/drivers/pci/ops-sh4.c
index 0b81999fb88b..b6234203e0ac 100644
--- a/arch/sh/drivers/pci/ops-sh4.c
+++ b/arch/sh/drivers/pci/ops-sh4.c
@@ -9,6 +9,7 @@
9 */ 9 */
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/io.h> 11#include <linux/io.h>
12#include <linux/spinlock.h>
12#include <asm/addrspace.h> 13#include <asm/addrspace.h>
13#include "pci-sh4.h" 14#include "pci-sh4.h"
14 15
@@ -18,8 +19,6 @@
18#define CONFIG_CMD(bus, devfn, where) \ 19#define CONFIG_CMD(bus, devfn, where) \
19 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3)) 20 (0x80000000 | (bus->number << 16) | (devfn << 8) | (where & ~3))
20 21
21static DEFINE_SPINLOCK(sh4_pci_lock);
22
23/* 22/*
24 * Functions for accessing PCI configuration space with type 1 accesses 23 * Functions for accessing PCI configuration space with type 1 accesses
25 */ 24 */
@@ -34,10 +33,10 @@ static int sh4_pci_read(struct pci_bus *bus, unsigned int devfn,
34 * PCIPDR may only be accessed as 32 bit words, 33 * PCIPDR may only be accessed as 32 bit words,
35 * so we must do byte alignment by hand 34 * so we must do byte alignment by hand
36 */ 35 */
37 spin_lock_irqsave(&sh4_pci_lock, flags); 36 raw_spin_lock_irqsave(&pci_config_lock, flags);
38 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 37 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
39 data = pci_read_reg(chan, SH4_PCIPDR); 38 data = pci_read_reg(chan, SH4_PCIPDR);
40 spin_unlock_irqrestore(&sh4_pci_lock, flags); 39 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
41 40
42 switch (size) { 41 switch (size) {
43 case 1: 42 case 1:
@@ -69,10 +68,10 @@ static int sh4_pci_write(struct pci_bus *bus, unsigned int devfn,
69 int shift; 68 int shift;
70 u32 data; 69 u32 data;
71 70
72 spin_lock_irqsave(&sh4_pci_lock, flags); 71 raw_spin_lock_irqsave(&pci_config_lock, flags);
73 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR); 72 pci_write_reg(chan, CONFIG_CMD(bus, devfn, where), SH4_PCIPAR);
74 data = pci_read_reg(chan, SH4_PCIPDR); 73 data = pci_read_reg(chan, SH4_PCIPDR);
75 spin_unlock_irqrestore(&sh4_pci_lock, flags); 74 raw_spin_unlock_irqrestore(&pci_config_lock, flags);
76 75
77 switch (size) { 76 switch (size) {
78 case 1: 77 case 1: