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Diffstat (limited to 'arch/sh/drivers/pci/fixups-r7780rp.c')
-rw-r--r--arch/sh/drivers/pci/fixups-r7780rp.c38
1 files changed, 22 insertions, 16 deletions
diff --git a/arch/sh/drivers/pci/fixups-r7780rp.c b/arch/sh/drivers/pci/fixups-r7780rp.c
index b656b562ec99..3e321df65d22 100644
--- a/arch/sh/drivers/pci/fixups-r7780rp.c
+++ b/arch/sh/drivers/pci/fixups-r7780rp.c
@@ -4,36 +4,42 @@
4 * Highlander R7780RP-1 PCI fixups 4 * Highlander R7780RP-1 PCI fixups
5 * 5 *
6 * Copyright (C) 2003 Lineo uSolutions, Inc. 6 * Copyright (C) 2003 Lineo uSolutions, Inc.
7 * Copyright (C) 2004 Paul Mundt 7 * Copyright (C) 2004 - 2006 Paul Mundt
8 * 8 *
9 * This file is subject to the terms and conditions of the GNU General Public 9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive 10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details. 11 * for more details.
12 */ 12 */
13#include "pci-sh7780.h" 13#include <linux/pci.h>
14#include "pci-sh4.h"
14#include <asm/io.h> 15#include <asm/io.h>
15 16
16int pci_fixup_pcic(void) 17int pci_fixup_pcic(void)
17{ 18{
18 outl(0x000043ff, PCI_REG(SH7780_PCIIMR)); 19 pci_write_reg(0x000043ff, SH4_PCIINTM);
19 outl(0x0000380f, PCI_REG(SH7780_PCIAINTM)); 20 pci_write_reg(0x0000380f, SH4_PCIAINTM);
20 21
21 outl(0xfbb00047, PCI_REG(SH7780_PCICMD)); 22 pci_write_reg(0xfbb00047, SH7780_PCICMD);
22 outl(0x00000000, PCI_REG(SH7780_PCIIBAR)); 23 pci_write_reg(0x00000000, SH7780_PCIIBAR);
23 24
24 outl(0x00011912, PCI_REG(SH7780_PCISVID)); 25 pci_write_reg(0x00011912, SH7780_PCISVID);
25 outl(0x08000000, PCI_REG(SH7780_PCICSCR0)); 26 pci_write_reg(0x08000000, SH7780_PCICSCR0);
26 outl(0x0000001b, PCI_REG(SH7780_PCICSAR0)); 27 pci_write_reg(0x0000001b, SH7780_PCICSAR0);
27 outl(0xfd000000, PCI_REG(SH7780_PCICSCR1)); 28 pci_write_reg(0xfd000000, SH7780_PCICSCR1);
28 outl(0x0000000f, PCI_REG(SH7780_PCICSAR1)); 29 pci_write_reg(0x0000000f, SH7780_PCICSAR1);
29 30
30 outl(0xfd000000, PCI_REG(SH7780_PCIMBR0)); 31 pci_write_reg(0xfd000000, SH7780_PCIMBR0);
31 outl(0x00fc0000, PCI_REG(SH7780_PCIMBMR0)); 32 pci_write_reg(0x00fc0000, SH7780_PCIMBMR0);
33
34#ifdef CONFIG_32BIT
35 pci_write_reg(0xc0000000, SH7780_PCIMBR2);
36 pci_write_reg(0x20000000 - SH7780_PCI_IO_SIZE, SH7780_PCIMBMR2);
37#endif
32 38
33 /* Set IOBR for windows containing area specified in pci.h */ 39 /* Set IOBR for windows containing area specified in pci.h */
34 outl((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE-1)), PCI_REG(SH7780_PCIIOBR)); 40 pci_write_reg((PCIBIOS_MIN_IO & ~(SH7780_PCI_IO_SIZE - 1)),
35 outl(((SH7780_PCI_IO_SIZE-1) & (7<<18)), PCI_REG(SH7780_PCIIOBMR)); 41 SH7780_PCIIOBR);
42 pci_write_reg(((SH7780_PCI_IO_SIZE-1) & (7<<18)), SH7780_PCIIOBMR);
36 43
37 return 0; 44 return 0;
38} 45}
39