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-rw-r--r--arch/sh/boards/cayman/Makefile5
-rw-r--r--arch/sh/boards/cayman/irq.c197
-rw-r--r--arch/sh/boards/cayman/led.c51
-rw-r--r--arch/sh/boards/cayman/setup.c187
-rw-r--r--arch/sh/boards/dreamcast/irq.c2
-rw-r--r--arch/sh/boards/dreamcast/setup.c8
-rw-r--r--arch/sh/boards/landisk/gio.c2
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/Kconfig12
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/Makefile8
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/io.c283
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/irq.c116
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/pci.c149
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/setup.c105
-rw-r--r--arch/sh/boards/renesas/r7780rp/Makefile2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780mp.c2
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7780rp.c52
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq-r7785rp.c45
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq.c51
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c10
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c8
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c161
-rw-r--r--arch/sh/boards/renesas/sdk7780/Kconfig23
-rw-r--r--arch/sh/boards/renesas/sdk7780/Makefile5
-rw-r--r--arch/sh/boards/renesas/sdk7780/irq.c46
-rw-r--r--arch/sh/boards/renesas/sdk7780/setup.c109
25 files changed, 843 insertions, 796 deletions
diff --git a/arch/sh/boards/cayman/Makefile b/arch/sh/boards/cayman/Makefile
new file mode 100644
index 000000000000..489a8f867368
--- /dev/null
+++ b/arch/sh/boards/cayman/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Hitachi Cayman specific parts of the kernel
3#
4obj-y := setup.o irq.o
5obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/cayman/irq.c b/arch/sh/boards/cayman/irq.c
new file mode 100644
index 000000000000..30ec7bebfaf1
--- /dev/null
+++ b/arch/sh/boards/cayman/irq.c
@@ -0,0 +1,197 @@
1/*
2 * arch/sh/mach-cayman/irq.c - SH-5 Cayman Interrupt Support
3 *
4 * This file handles the board specific parts of the Cayman interrupt system
5 *
6 * Copyright (C) 2002 Stuart Menefy
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/io.h>
13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <linux/signal.h>
16#include <asm/cpu/irq.h>
17#include <asm/page.h>
18
19/* Setup for the SMSC FDC37C935 / LAN91C100FD */
20#define SMSC_IRQ IRQ_IRL1
21
22/* Setup for PCI Bus 2, which transmits interrupts via the EPLD */
23#define PCI2_IRQ IRQ_IRL3
24
25unsigned long epld_virt;
26
27#define EPLD_BASE 0x04002000
28#define EPLD_STATUS_BASE (epld_virt + 0x10)
29#define EPLD_MASK_BASE (epld_virt + 0x20)
30
31/* Note the SMSC SuperIO chip and SMSC LAN chip interrupts are all muxed onto
32 the same SH-5 interrupt */
33
34static irqreturn_t cayman_interrupt_smsc(int irq, void *dev_id)
35{
36 printk(KERN_INFO "CAYMAN: spurious SMSC interrupt\n");
37 return IRQ_NONE;
38}
39
40static irqreturn_t cayman_interrupt_pci2(int irq, void *dev_id)
41{
42 printk(KERN_INFO "CAYMAN: spurious PCI interrupt, IRQ %d\n", irq);
43 return IRQ_NONE;
44}
45
46static struct irqaction cayman_action_smsc = {
47 .name = "Cayman SMSC Mux",
48 .handler = cayman_interrupt_smsc,
49 .flags = IRQF_DISABLED,
50};
51
52static struct irqaction cayman_action_pci2 = {
53 .name = "Cayman PCI2 Mux",
54 .handler = cayman_interrupt_pci2,
55 .flags = IRQF_DISABLED,
56};
57
58static void enable_cayman_irq(unsigned int irq)
59{
60 unsigned long flags;
61 unsigned long mask;
62 unsigned int reg;
63 unsigned char bit;
64
65 irq -= START_EXT_IRQS;
66 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
67 bit = 1<<(irq % 8);
68 local_irq_save(flags);
69 mask = ctrl_inl(reg);
70 mask |= bit;
71 ctrl_outl(mask, reg);
72 local_irq_restore(flags);
73}
74
75void disable_cayman_irq(unsigned int irq)
76{
77 unsigned long flags;
78 unsigned long mask;
79 unsigned int reg;
80 unsigned char bit;
81
82 irq -= START_EXT_IRQS;
83 reg = EPLD_MASK_BASE + ((irq / 8) << 2);
84 bit = 1<<(irq % 8);
85 local_irq_save(flags);
86 mask = ctrl_inl(reg);
87 mask &= ~bit;
88 ctrl_outl(mask, reg);
89 local_irq_restore(flags);
90}
91
92static void ack_cayman_irq(unsigned int irq)
93{
94 disable_cayman_irq(irq);
95}
96
97static void end_cayman_irq(unsigned int irq)
98{
99 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
100 enable_cayman_irq(irq);
101}
102
103static unsigned int startup_cayman_irq(unsigned int irq)
104{
105 enable_cayman_irq(irq);
106 return 0; /* never anything pending */
107}
108
109static void shutdown_cayman_irq(unsigned int irq)
110{
111 disable_cayman_irq(irq);
112}
113
114struct hw_interrupt_type cayman_irq_type = {
115 .typename = "Cayman-IRQ",
116 .startup = startup_cayman_irq,
117 .shutdown = shutdown_cayman_irq,
118 .enable = enable_cayman_irq,
119 .disable = disable_cayman_irq,
120 .ack = ack_cayman_irq,
121 .end = end_cayman_irq,
122};
123
124int cayman_irq_demux(int evt)
125{
126 int irq = intc_evt_to_irq[evt];
127
128 if (irq == SMSC_IRQ) {
129 unsigned long status;
130 int i;
131
132 status = ctrl_inl(EPLD_STATUS_BASE) &
133 ctrl_inl(EPLD_MASK_BASE) & 0xff;
134 if (status == 0) {
135 irq = -1;
136 } else {
137 for (i=0; i<8; i++) {
138 if (status & (1<<i))
139 break;
140 }
141 irq = START_EXT_IRQS + i;
142 }
143 }
144
145 if (irq == PCI2_IRQ) {
146 unsigned long status;
147 int i;
148
149 status = ctrl_inl(EPLD_STATUS_BASE + 3 * sizeof(u32)) &
150 ctrl_inl(EPLD_MASK_BASE + 3 * sizeof(u32)) & 0xff;
151 if (status == 0) {
152 irq = -1;
153 } else {
154 for (i=0; i<8; i++) {
155 if (status & (1<<i))
156 break;
157 }
158 irq = START_EXT_IRQS + (3 * 8) + i;
159 }
160 }
161
162 return irq;
163}
164
165#if defined(CONFIG_PROC_FS) && defined(CONFIG_SYSCTL)
166int cayman_irq_describe(char* p, int irq)
167{
168 if (irq < NR_INTC_IRQS) {
169 return intc_irq_describe(p, irq);
170 } else if (irq < NR_INTC_IRQS + 8) {
171 return sprintf(p, "(SMSC %d)", irq - NR_INTC_IRQS);
172 } else if ((irq >= NR_INTC_IRQS + 24) && (irq < NR_INTC_IRQS + 32)) {
173 return sprintf(p, "(PCI2 %d)", irq - (NR_INTC_IRQS + 24));
174 }
175
176 return 0;
177}
178#endif
179
180void init_cayman_irq(void)
181{
182 int i;
183
184 epld_virt = onchip_remap(EPLD_BASE, 1024, "EPLD");
185 if (!epld_virt) {
186 printk(KERN_ERR "Cayman IRQ: Unable to remap EPLD\n");
187 return;
188 }
189
190 for (i=0; i<NR_EXT_IRQS; i++) {
191 irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type;
192 }
193
194 /* Setup the SMSC interrupt */
195 setup_irq(SMSC_IRQ, &cayman_action_smsc);
196 setup_irq(PCI2_IRQ, &cayman_action_pci2);
197}
diff --git a/arch/sh/boards/cayman/led.c b/arch/sh/boards/cayman/led.c
new file mode 100644
index 000000000000..a808eac4ecd6
--- /dev/null
+++ b/arch/sh/boards/cayman/led.c
@@ -0,0 +1,51 @@
1/*
2 * arch/sh/boards/cayman/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Flash the LEDs
10 */
11#include <asm/io.h>
12
13/*
14** It is supposed these functions to be used for a low level
15** debugging (via Cayman LEDs), hence to be available as soon
16** as possible.
17** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped
18** (this happen when IRQ are initialized... quite late).
19** These triky dependencies should be removed. Temporary, it
20** may be enough to NOP until EPLD is mapped.
21*/
22
23extern unsigned long epld_virt;
24
25#define LED_ADDR (epld_virt + 0x008)
26#define HDSP2534_ADDR (epld_virt + 0x100)
27
28void mach_led(int position, int value)
29{
30 if (!epld_virt)
31 return;
32
33 if (value)
34 ctrl_outl(0, LED_ADDR);
35 else
36 ctrl_outl(1, LED_ADDR);
37
38}
39
40void mach_alphanum(int position, unsigned char value)
41{
42 if (!epld_virt)
43 return;
44
45 ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2));
46}
47
48void mach_alphanum_brightness(int setting)
49{
50 ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0);
51}
diff --git a/arch/sh/boards/cayman/setup.c b/arch/sh/boards/cayman/setup.c
new file mode 100644
index 000000000000..8c9fa472d8f5
--- /dev/null
+++ b/arch/sh/boards/cayman/setup.c
@@ -0,0 +1,187 @@
1/*
2 * arch/sh/mach-cayman/setup.c
3 *
4 * SH5 Cayman support
5 *
6 * Copyright (C) 2002 David J. Mckay & Benedict Gaster
7 * Copyright (C) 2003 - 2007 Paul Mundt
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/io.h>
15#include <linux/kernel.h>
16#include <asm/cpu/irq.h>
17
18/*
19 * Platform Dependent Interrupt Priorities.
20 */
21
22/* Using defaults defined in irq.h */
23#define RES NO_PRIORITY /* Disabled */
24#define IR0 IRL0_PRIORITY /* IRLs */
25#define IR1 IRL1_PRIORITY
26#define IR2 IRL2_PRIORITY
27#define IR3 IRL3_PRIORITY
28#define PCA INTA_PRIORITY /* PCI Ints */
29#define PCB INTB_PRIORITY
30#define PCC INTC_PRIORITY
31#define PCD INTD_PRIORITY
32#define SER TOP_PRIORITY
33#define ERR TOP_PRIORITY
34#define PW0 TOP_PRIORITY
35#define PW1 TOP_PRIORITY
36#define PW2 TOP_PRIORITY
37#define PW3 TOP_PRIORITY
38#define DM0 NO_PRIORITY /* DMA Ints */
39#define DM1 NO_PRIORITY
40#define DM2 NO_PRIORITY
41#define DM3 NO_PRIORITY
42#define DAE NO_PRIORITY
43#define TU0 TIMER_PRIORITY /* TMU Ints */
44#define TU1 NO_PRIORITY
45#define TU2 NO_PRIORITY
46#define TI2 NO_PRIORITY
47#define ATI NO_PRIORITY /* RTC Ints */
48#define PRI NO_PRIORITY
49#define CUI RTC_PRIORITY
50#define ERI SCIF_PRIORITY /* SCIF Ints */
51#define RXI SCIF_PRIORITY
52#define BRI SCIF_PRIORITY
53#define TXI SCIF_PRIORITY
54#define ITI TOP_PRIORITY /* WDT Ints */
55
56/* Setup for the SMSC FDC37C935 */
57#define SMSC_SUPERIO_BASE 0x04000000
58#define SMSC_CONFIG_PORT_ADDR 0x3f0
59#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
60#define SMSC_DATA_PORT_ADDR 0x3f1
61
62#define SMSC_ENTER_CONFIG_KEY 0x55
63#define SMSC_EXIT_CONFIG_KEY 0xaa
64
65#define SMCS_LOGICAL_DEV_INDEX 0x07
66#define SMSC_DEVICE_ID_INDEX 0x20
67#define SMSC_DEVICE_REV_INDEX 0x21
68#define SMSC_ACTIVATE_INDEX 0x30
69#define SMSC_PRIMARY_BASE_INDEX 0x60
70#define SMSC_SECONDARY_BASE_INDEX 0x62
71#define SMSC_PRIMARY_INT_INDEX 0x70
72#define SMSC_SECONDARY_INT_INDEX 0x72
73
74#define SMSC_IDE1_DEVICE 1
75#define SMSC_KEYBOARD_DEVICE 7
76#define SMSC_CONFIG_REGISTERS 8
77
78#define SMSC_SUPERIO_READ_INDEXED(index) ({ \
79 outb((index), SMSC_INDEX_PORT_ADDR); \
80 inb(SMSC_DATA_PORT_ADDR); })
81#define SMSC_SUPERIO_WRITE_INDEXED(val, index) ({ \
82 outb((index), SMSC_INDEX_PORT_ADDR); \
83 outb((val), SMSC_DATA_PORT_ADDR); })
84
85#define IDE1_PRIMARY_BASE 0x01f0
86#define IDE1_SECONDARY_BASE 0x03f6
87
88unsigned long smsc_superio_virt;
89
90int platform_int_priority[NR_INTC_IRQS] = {
91 IR0, IR1, IR2, IR3, PCA, PCB, PCC, PCD, /* IRQ 0- 7 */
92 RES, RES, RES, RES, SER, ERR, PW3, PW2, /* IRQ 8-15 */
93 PW1, PW0, DM0, DM1, DM2, DM3, DAE, RES, /* IRQ 16-23 */
94 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 24-31 */
95 TU0, TU1, TU2, TI2, ATI, PRI, CUI, ERI, /* IRQ 32-39 */
96 RXI, BRI, TXI, RES, RES, RES, RES, RES, /* IRQ 40-47 */
97 RES, RES, RES, RES, RES, RES, RES, RES, /* IRQ 48-55 */
98 RES, RES, RES, RES, RES, RES, RES, ITI, /* IRQ 56-63 */
99};
100
101static int __init smsc_superio_setup(void)
102{
103 unsigned char devid, devrev;
104
105 smsc_superio_virt = onchip_remap(SMSC_SUPERIO_BASE, 1024, "SMSC SuperIO");
106 if (!smsc_superio_virt) {
107 panic("Unable to remap SMSC SuperIO\n");
108 }
109
110 /* Initially the chip is in run state */
111 /* Put it into configuration state */
112 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
113 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
114
115 /* Read device ID info */
116 devid = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
117 devrev = SMSC_SUPERIO_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
118 printk("SMSC SuperIO devid %02x rev %02x\n", devid, devrev);
119
120 /* Select the keyboard device */
121 SMSC_SUPERIO_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
122
123 /* enable it */
124 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
125
126 /* Select the interrupts */
127 /* On a PC keyboard is IRQ1, mouse is IRQ12 */
128 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_PRIMARY_INT_INDEX);
129 SMSC_SUPERIO_WRITE_INDEXED(12, SMSC_SECONDARY_INT_INDEX);
130
131#ifdef CONFIG_IDE
132 /*
133 * Only IDE1 exists on the Cayman
134 */
135
136 /* Power it on */
137 SMSC_SUPERIO_WRITE_INDEXED(1 << SMSC_IDE1_DEVICE, 0x22);
138
139 SMSC_SUPERIO_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
140 SMSC_SUPERIO_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
141
142 SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE >> 8,
143 SMSC_PRIMARY_BASE_INDEX + 0);
144 SMSC_SUPERIO_WRITE_INDEXED(IDE1_PRIMARY_BASE & 0xff,
145 SMSC_PRIMARY_BASE_INDEX + 1);
146
147 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE >> 8,
148 SMSC_SECONDARY_BASE_INDEX + 0);
149 SMSC_SUPERIO_WRITE_INDEXED(IDE1_SECONDARY_BASE & 0xff,
150 SMSC_SECONDARY_BASE_INDEX + 1);
151
152 SMSC_SUPERIO_WRITE_INDEXED(14, SMSC_PRIMARY_INT_INDEX);
153
154 SMSC_SUPERIO_WRITE_INDEXED(SMSC_CONFIG_REGISTERS,
155 SMCS_LOGICAL_DEV_INDEX);
156
157 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
158 SMSC_SUPERIO_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
159 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
160 SMSC_SUPERIO_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
161#endif
162
163 /* Exit the configuration state */
164 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
165
166 return 0;
167}
168__initcall(smsc_superio_setup);
169
170static void __iomem *cayman_ioport_map(unsigned long port, unsigned int len)
171{
172 if (port < 0x400) {
173 extern unsigned long smsc_superio_virt;
174 return (void __iomem *)((port << 2) | smsc_superio_virt);
175 }
176
177 return (void __iomem *)port;
178}
179
180extern void init_cayman_irq(void);
181
182static struct sh_machine_vector mv_cayman __initmv = {
183 .mv_name = "Hitachi Cayman",
184 .mv_nr_irqs = 64,
185 .mv_ioport_map = cayman_ioport_map,
186 .mv_init_irq = init_cayman_irq,
187};
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index 5bf01f86c20c..9d0673a9092a 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -136,7 +136,7 @@ int systemasic_irq_demux(int irq)
136 emr = EMR_BASE + (level << 4) + (level << 2); 136 emr = EMR_BASE + (level << 4) + (level << 2);
137 esr = ESR_BASE + (level << 2); 137 esr = ESR_BASE + (level << 2);
138 138
139 /* Mask the ESR to filter any spurious, unwanted interrtupts */ 139 /* Mask the ESR to filter any spurious, unwanted interrupts */
140 status = inl(esr); 140 status = inl(esr);
141 status &= inl(emr); 141 status &= inl(emr);
142 142
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
index 8799df6e866a..2581c8cd5df7 100644
--- a/arch/sh/boards/dreamcast/setup.c
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -33,9 +33,6 @@ extern void aica_time_init(void);
33extern int gapspci_init(void); 33extern int gapspci_init(void);
34extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
35 35
36void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
37int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
38
39static void __init dreamcast_setup(char **cmdline_p) 36static void __init dreamcast_setup(char **cmdline_p)
40{ 37{
41 int i; 38 int i;
@@ -64,9 +61,4 @@ static struct sh_machine_vector mv_dreamcast __initmv = {
64 .mv_name = "Sega Dreamcast", 61 .mv_name = "Sega Dreamcast",
65 .mv_setup = dreamcast_setup, 62 .mv_setup = dreamcast_setup,
66 .mv_irq_demux = systemasic_irq_demux, 63 .mv_irq_demux = systemasic_irq_demux,
67
68#ifdef CONFIG_PCI
69 .mv_consistent_alloc = dreamcast_consistent_alloc,
70 .mv_consistent_free = dreamcast_consistent_free,
71#endif
72}; 64};
diff --git a/arch/sh/boards/landisk/gio.c b/arch/sh/boards/landisk/gio.c
index a37643d002b2..17025080db35 100644
--- a/arch/sh/boards/landisk/gio.c
+++ b/arch/sh/boards/landisk/gio.c
@@ -121,7 +121,7 @@ static int gio_ioctl(struct inode *inode, struct file *filp,
121 return 0; 121 return 0;
122} 122}
123 123
124static struct file_operations gio_fops = { 124static const struct file_operations gio_fops = {
125 .owner = THIS_MODULE, 125 .owner = THIS_MODULE,
126 .open = gio_open, /* open */ 126 .open = gio_open, /* open */
127 .release = gio_close, /* release */ 127 .release = gio_close, /* release */
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Kconfig b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
deleted file mode 100644
index 1743be477be5..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/Kconfig
+++ /dev/null
@@ -1,12 +0,0 @@
1if SH_HS7751RVOIP
2
3menu "HS7751RVoIP options"
4
5config HS7751RVOIP_CODEC
6 bool "Support VoIP Codec section"
7 help
8 Selecting this option will support CODEC section.
9
10endmenu
11
12endif
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile
deleted file mode 100644
index e626377c55ee..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the HS7751RVoIP specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_PCI) += pci.o
8
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
deleted file mode 100644
index bb9aa0d62852..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ /dev/null
@@ -1,283 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for Renesas Technology sales HS7751RVoIP
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_hs7751rvoip.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13#include <linux/kernel.h>
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/pci.h>
17#include <asm/io.h>
18#include <asm/hs7751rvoip.h>
19#include <asm/addrspace.h>
20
21extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
22extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
23
24/*
25 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
26 * of the 7751R processor, and has a SuperIO accessible via the PCI.
27 * The board also includes a PCMCIA controller on its memory bus,
28 * like the other Solution Engine boards.
29 */
30
31#define CODEC_IO_BASE 0x1000
32#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
33
34static inline unsigned long port2adr(unsigned int port)
35{
36 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
37 if (port == 0x3f6)
38 return ((unsigned long)area5_io16_base + 0x0c);
39 else
40 return ((unsigned long)area5_io16_base + 0x800 +
41 ((port-0x1f0) << 1));
42 else
43 maybebadio((unsigned long)port);
44 return port;
45}
46
47/* The 7751R HS7751RVoIP seems to have everything hooked */
48/* up pretty normally (nothing on high-bytes only...) so this */
49/* shouldn't be needed */
50static inline int shifted_port(unsigned long port)
51{
52 /* For IDE registers, value is not shifted */
53 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
54 return 0;
55 else
56 return 1;
57}
58
59#if defined(CONFIG_HS7751RVOIP_CODEC)
60#define codec_port(port) \
61 ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
62#else
63#define codec_port(port) (0)
64#endif
65
66/*
67 * General outline: remap really low stuff [eventually] to SuperIO,
68 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
69 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
70 * should be way beyond the window, and is used w/o translation for
71 * compatibility.
72 */
73unsigned char hs7751rvoip_inb(unsigned long port)
74{
75 if (PXSEG(port))
76 return ctrl_inb(port);
77 else if (codec_port(port))
78 return ctrl_inb(CODEC_IOMAP(port));
79 else if (is_pci_ioaddr(port) || shifted_port(port))
80 return ctrl_inb(pci_ioaddr(port));
81 else
82 return ctrl_inw(port2adr(port)) & 0xff;
83}
84
85unsigned char hs7751rvoip_inb_p(unsigned long port)
86{
87 unsigned char v;
88
89 if (PXSEG(port))
90 v = ctrl_inb(port);
91 else if (codec_port(port))
92 v = ctrl_inb(CODEC_IOMAP(port));
93 else if (is_pci_ioaddr(port) || shifted_port(port))
94 v = ctrl_inb(pci_ioaddr(port));
95 else
96 v = ctrl_inw(port2adr(port)) & 0xff;
97 ctrl_delay();
98 return v;
99}
100
101unsigned short hs7751rvoip_inw(unsigned long port)
102{
103 if (PXSEG(port))
104 return ctrl_inw(port);
105 else if (is_pci_ioaddr(port) || shifted_port(port))
106 return ctrl_inw(pci_ioaddr(port));
107 else
108 maybebadio(port);
109 return 0;
110}
111
112unsigned int hs7751rvoip_inl(unsigned long port)
113{
114 if (PXSEG(port))
115 return ctrl_inl(port);
116 else if (is_pci_ioaddr(port) || shifted_port(port))
117 return ctrl_inl(pci_ioaddr(port));
118 else
119 maybebadio(port);
120 return 0;
121}
122
123void hs7751rvoip_outb(unsigned char value, unsigned long port)
124{
125
126 if (PXSEG(port))
127 ctrl_outb(value, port);
128 else if (codec_port(port))
129 ctrl_outb(value, CODEC_IOMAP(port));
130 else if (is_pci_ioaddr(port) || shifted_port(port))
131 ctrl_outb(value, pci_ioaddr(port));
132 else
133 ctrl_outb(value, port2adr(port));
134}
135
136void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
137{
138 if (PXSEG(port))
139 ctrl_outb(value, port);
140 else if (codec_port(port))
141 ctrl_outb(value, CODEC_IOMAP(port));
142 else if (is_pci_ioaddr(port) || shifted_port(port))
143 ctrl_outb(value, pci_ioaddr(port));
144 else
145 ctrl_outw(value, port2adr(port));
146
147 ctrl_delay();
148}
149
150void hs7751rvoip_outw(unsigned short value, unsigned long port)
151{
152 if (PXSEG(port))
153 ctrl_outw(value, port);
154 else if (is_pci_ioaddr(port) || shifted_port(port))
155 ctrl_outw(value, pci_ioaddr(port));
156 else
157 maybebadio(port);
158}
159
160void hs7751rvoip_outl(unsigned int value, unsigned long port)
161{
162 if (PXSEG(port))
163 ctrl_outl(value, port);
164 else if (is_pci_ioaddr(port) || shifted_port(port))
165 ctrl_outl(value, pci_ioaddr(port));
166 else
167 maybebadio(port);
168}
169
170void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
171{
172 u8 *buf = addr;
173
174 if (PXSEG(port))
175 while (count--)
176 *buf++ = ctrl_inb(port);
177 else if (codec_port(port))
178 while (count--)
179 *buf++ = ctrl_inb(CODEC_IOMAP(port));
180 else if (is_pci_ioaddr(port) || shifted_port(port)) {
181 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
182
183 while (count--)
184 *buf++ = *bp;
185 } else {
186 volatile u16 *p = (volatile u16 *)port2adr(port);
187
188 while (count--)
189 *buf++ = *p & 0xff;
190 }
191}
192
193void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
194{
195 volatile u16 *p;
196 u16 *buf = addr;
197
198 if (PXSEG(port))
199 p = (volatile u16 *)port;
200 else if (is_pci_ioaddr(port) || shifted_port(port))
201 p = (volatile u16 *)pci_ioaddr(port);
202 else
203 p = (volatile u16 *)port2adr(port);
204 while (count--)
205 *buf++ = *p;
206}
207
208void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
209{
210
211 if (is_pci_ioaddr(port) || shifted_port(port)) {
212 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
213 u32 *buf = addr;
214
215 while (count--)
216 *buf++ = *p;
217 } else
218 maybebadio(port);
219}
220
221void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
222{
223 const u8 *buf = addr;
224
225 if (PXSEG(port))
226 while (count--)
227 ctrl_outb(*buf++, port);
228 else if (codec_port(port))
229 while (count--)
230 ctrl_outb(*buf++, CODEC_IOMAP(port));
231 else if (is_pci_ioaddr(port) || shifted_port(port)) {
232 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
233
234 while (count--)
235 *bp = *buf++;
236 } else {
237 volatile u16 *p = (volatile u16 *)port2adr(port);
238
239 while (count--)
240 *p = *buf++;
241 }
242}
243
244void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
245{
246 volatile u16 *p;
247 const u16 *buf = addr;
248
249 if (PXSEG(port))
250 p = (volatile u16 *)port;
251 else if (is_pci_ioaddr(port) || shifted_port(port))
252 p = (volatile u16 *)pci_ioaddr(port);
253 else
254 p = (volatile u16 *)port2adr(port);
255
256 while (count--)
257 *p = *buf++;
258}
259
260void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
261{
262 const u32 *buf = addr;
263
264 if (is_pci_ioaddr(port) || shifted_port(port)) {
265 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
266
267 while (count--)
268 *p = *buf++;
269 } else
270 maybebadio(port);
271}
272
273void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
274{
275 if (PXSEG(port))
276 return (void __iomem *)port;
277 else if (unlikely(codec_port(port) && (size == 1)))
278 return (void __iomem *)CODEC_IOMAP(port);
279 else if (is_pci_ioaddr(port))
280 return (void __iomem *)pci_ioaddr(port);
281
282 return (void __iomem *)port2adr(port);
283}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
deleted file mode 100644
index e55c6686b21f..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ /dev/null
@@ -1,116 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003.
11 */
12
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <linux/interrupt.h>
16#include <asm/io.h>
17#include <asm/irq.h>
18#include <asm/hs7751rvoip.h>
19
20static int mask_pos[] = {8, 9, 10, 11, 12, 13, 0, 1, 2, 3, 4, 5, 6, 7};
21
22static void enable_hs7751rvoip_irq(unsigned int irq);
23static void disable_hs7751rvoip_irq(unsigned int irq);
24
25/* shutdown is same as "disable" */
26#define shutdown_hs7751rvoip_irq disable_hs7751rvoip_irq
27
28static void ack_hs7751rvoip_irq(unsigned int irq);
29static void end_hs7751rvoip_irq(unsigned int irq);
30
31static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
32{
33 enable_hs7751rvoip_irq(irq);
34 return 0; /* never anything pending */
35}
36
37static void disable_hs7751rvoip_irq(unsigned int irq)
38{
39 unsigned short val;
40 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
41
42 /* Set the priority in IPR to 0 */
43 val = ctrl_inw(IRLCNTR3);
44 val &= mask;
45 ctrl_outw(val, IRLCNTR3);
46}
47
48static void enable_hs7751rvoip_irq(unsigned int irq)
49{
50 unsigned short val;
51 unsigned short value = (0x0001 << mask_pos[irq]);
52
53 /* Set priority in IPR back to original value */
54 val = ctrl_inw(IRLCNTR3);
55 val |= value;
56 ctrl_outw(val, IRLCNTR3);
57}
58
59static void ack_hs7751rvoip_irq(unsigned int irq)
60{
61 disable_hs7751rvoip_irq(irq);
62}
63
64static void end_hs7751rvoip_irq(unsigned int irq)
65{
66 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
67 enable_hs7751rvoip_irq(irq);
68}
69
70static struct hw_interrupt_type hs7751rvoip_irq_type = {
71 .typename = "HS7751RVoIP IRQ",
72 .startup = startup_hs7751rvoip_irq,
73 .shutdown = shutdown_hs7751rvoip_irq,
74 .enable = enable_hs7751rvoip_irq,
75 .disable = disable_hs7751rvoip_irq,
76 .ack = ack_hs7751rvoip_irq,
77 .end = end_hs7751rvoip_irq,
78};
79
80static void make_hs7751rvoip_irq(unsigned int irq)
81{
82 disable_irq_nosync(irq);
83 irq_desc[irq].chip = &hs7751rvoip_irq_type;
84 disable_hs7751rvoip_irq(irq);
85}
86
87/*
88 * Initialize IRQ setting
89 */
90void __init init_hs7751rvoip_IRQ(void)
91{
92 int i;
93
94 /* IRL0=ON HOOK1
95 * IRL1=OFF HOOK1
96 * IRL2=ON HOOK2
97 * IRL3=OFF HOOK2
98 * IRL4=Ringing Detection
99 * IRL5=CODEC
100 * IRL6=Ethernet
101 * IRL7=Ethernet Hub
102 * IRL8=USB Communication
103 * IRL9=USB Connection
104 * IRL10=USB DMA
105 * IRL11=CF Card
106 * IRL12=PCMCIA
107 * IRL13=PCI Slot
108 */
109 ctrl_outw(0x9876, IRLCNTR1);
110 ctrl_outw(0xdcba, IRLCNTR2);
111 ctrl_outw(0x0050, IRLCNTR4);
112 ctrl_outw(0x4321, IRLCNTR5);
113
114 for (i=0; i<14; i++)
115 make_hs7751rvoip_irq(i);
116}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/pci.c b/arch/sh/boards/renesas/hs7751rvoip/pci.c
deleted file mode 100644
index 1c0ddee30d21..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/pci.c
+++ /dev/null
@@ -1,149 +0,0 @@
1/*
2 * linux/arch/sh/boards/renesas/hs7751rvoip/pci.c
3 *
4 * Author: Ian DaSilva (idasilva@mvista.com)
5 *
6 * Highly leveraged from pci-bigsur.c, written by Dustin McIntire.
7 *
8 * May be copied or modified under the terms of the GNU General Public
9 * License. See linux/COPYING for more information.
10 *
11 * PCI initialization for the Renesas SH7751R HS7751RVoIP board
12 */
13
14#include <linux/kernel.h>
15#include <linux/types.h>
16#include <linux/init.h>
17#include <linux/delay.h>
18#include <linux/pci.h>
19#include <linux/module.h>
20
21#include <asm/io.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23#include <asm/hs7751rvoip/hs7751rvoip.h>
24
25#define PCIMCR_MRSET_OFF 0xBFFFFFFF
26#define PCIMCR_RFSH_OFF 0xFFFFFFFB
27
28/*
29 * Only long word accesses of the PCIC's internal local registers and the
30 * configuration registers from the CPU is supported.
31 */
32#define PCIC_WRITE(x,v) writel((v), PCI_REG(x))
33#define PCIC_READ(x) readl(PCI_REG(x))
34
35/*
36 * Description: This function sets up and initializes the pcic, sets
37 * up the BARS, maps the DRAM into the address space etc, etc.
38 */
39int __init pcibios_init_platform(void)
40{
41 unsigned long bcr1, wcr1, wcr2, wcr3, mcr;
42 unsigned short bcr2, bcr3;
43
44 /*
45 * Initialize the slave bus controller on the pcic. The values used
46 * here should not be hardcoded, but they should be taken from the bsc
47 * on the processor, to make this function as generic as possible.
48 * (i.e. Another sbc may usr different SDRAM timing settings -- in order
49 * for the pcic to work, its settings need to be exactly the same.)
50 */
51 bcr1 = (*(volatile unsigned long *)(SH7751_BCR1));
52 bcr2 = (*(volatile unsigned short *)(SH7751_BCR2));
53 bcr3 = (*(volatile unsigned short *)(SH7751_BCR3));
54 wcr1 = (*(volatile unsigned long *)(SH7751_WCR1));
55 wcr2 = (*(volatile unsigned long *)(SH7751_WCR2));
56 wcr3 = (*(volatile unsigned long *)(SH7751_WCR3));
57 mcr = (*(volatile unsigned long *)(SH7751_MCR));
58
59 bcr1 = bcr1 | 0x00080000; /* Enable Bit 19, BREQEN */
60 (*(volatile unsigned long *)(SH7751_BCR1)) = bcr1;
61
62 bcr1 = bcr1 | 0x40080000; /* Enable Bit 19 BREQEN, set PCIC to slave */
63 PCIC_WRITE(SH7751_PCIBCR1, bcr1); /* PCIC BCR1 */
64 PCIC_WRITE(SH7751_PCIBCR2, bcr2); /* PCIC BCR2 */
65 PCIC_WRITE(SH7751_PCIBCR3, bcr3); /* PCIC BCR3 */
66 PCIC_WRITE(SH7751_PCIWCR1, wcr1); /* PCIC WCR1 */
67 PCIC_WRITE(SH7751_PCIWCR2, wcr2); /* PCIC WCR2 */
68 PCIC_WRITE(SH7751_PCIWCR3, wcr3); /* PCIC WCR3 */
69 mcr = (mcr & PCIMCR_MRSET_OFF) & PCIMCR_RFSH_OFF;
70 PCIC_WRITE(SH7751_PCIMCR, mcr); /* PCIC MCR */
71
72 /* Enable all interrupts, so we know what to fix */
73 PCIC_WRITE(SH7751_PCIINTM, 0x0000c3ff);
74 PCIC_WRITE(SH7751_PCIAINTM, 0x0000380f);
75
76 /* Set up standard PCI config registers */
77 PCIC_WRITE(SH7751_PCICONF1, 0xFB900047); /* Bus Master, Mem & I/O access */
78 PCIC_WRITE(SH7751_PCICONF2, 0x00000000); /* PCI Class code & Revision ID */
79 PCIC_WRITE(SH7751_PCICONF4, 0xab000001); /* PCI I/O address (local regs) */
80 PCIC_WRITE(SH7751_PCICONF5, 0x0c000000); /* PCI MEM address (local RAM) */
81 PCIC_WRITE(SH7751_PCICONF6, 0xd0000000); /* PCI MEM address (unused) */
82 PCIC_WRITE(SH7751_PCICONF11, 0x35051054); /* PCI Subsystem ID & Vendor ID */
83 PCIC_WRITE(SH7751_PCILSR0, 0x03f00000); /* MEM (full 64M exposed) */
84 PCIC_WRITE(SH7751_PCILSR1, 0x00000000); /* MEM (unused) */
85 PCIC_WRITE(SH7751_PCILAR0, 0x0c000000); /* MEM (direct map from PCI) */
86 PCIC_WRITE(SH7751_PCILAR1, 0x00000000); /* MEM (unused) */
87
88 /* Now turn it on... */
89 PCIC_WRITE(SH7751_PCICR, 0xa5000001);
90
91 /*
92 * Set PCIMBR and PCIIOBR here, assuming a single window
93 * (16M MEM, 256K IO) is enough. If a larger space is
94 * needed, the readx/writex and inx/outx functions will
95 * have to do more (e.g. setting registers for each call).
96 */
97
98 /*
99 * Set the MBR so PCI address is one-to-one with window,
100 * meaning all calls go straight through... use ifdef to
101 * catch erroneous assumption.
102 */
103 BUG_ON(PCIBIOS_MIN_MEM != SH7751_PCI_MEMORY_BASE);
104
105 PCIC_WRITE(SH7751_PCIMBR, PCIBIOS_MIN_MEM);
106
107 /* Set IOBR for window containing area specified in pci.h */
108 PCIC_WRITE(SH7751_PCIIOBR, (PCIBIOS_MIN_IO & SH7751_PCIIOBR_MASK));
109
110 /* All done, may as well say so... */
111 printk("SH7751R PCI: Finished initialization of the PCI controller\n");
112
113 return 1;
114}
115
116int __init pcibios_map_platform_irq(u8 slot, u8 pin)
117{
118 switch (slot) {
119 case 0: return IRQ_PCISLOT; /* PCI Extend slot */
120 case 1: return IRQ_PCMCIA; /* PCI Cardbus Bridge */
121 case 2: return IRQ_PCIETH; /* Realtek Ethernet controller */
122 case 3: return IRQ_PCIHUB; /* Realtek Ethernet Hub controller */
123 default:
124 printk("PCI: Bad IRQ mapping request for slot %d\n", slot);
125 return -1;
126 }
127}
128
129static struct resource sh7751_io_resource = {
130 .name = "SH7751_IO",
131 .start = 0x4000,
132 .end = 0x4000 + SH7751_PCI_IO_SIZE - 1,
133 .flags = IORESOURCE_IO
134};
135
136static struct resource sh7751_mem_resource = {
137 .name = "SH7751_mem",
138 .start = SH7751_PCI_MEMORY_BASE,
139 .end = SH7751_PCI_MEMORY_BASE + SH7751_PCI_MEM_SIZE - 1,
140 .flags = IORESOURCE_MEM
141};
142
143extern struct pci_ops sh7751_pci_ops;
144
145struct pci_channel board_pci_channels[] = {
146 { &sh7751_pci_ops, &sh7751_io_resource, &sh7751_mem_resource, 0, 0xff },
147 { NULL, NULL, NULL, 0, 0 },
148};
149EXPORT_SYMBOL(board_pci_channels);
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
deleted file mode 100644
index c05625975f2c..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/setup.c
+++ /dev/null
@@ -1,105 +0,0 @@
1/*
2 * Renesas Technology Sales HS7751RVoIP Support.
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Modified for HS7751RVoIP by
7 * Atom Create Engineering Co., Ltd. 2002.
8 * Lineo uSolutions, Inc. 2003.
9 */
10#include <linux/init.h>
11#include <linux/irq.h>
12#include <linux/mm.h>
13#include <linux/pm.h>
14#include <asm/hs7751rvoip.h>
15#include <asm/io.h>
16#include <asm/machvec.h>
17
18static void hs7751rvoip_power_off(void)
19{
20 ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR);
21}
22
23void *area5_io8_base;
24void *area6_io8_base;
25void *area5_io16_base;
26void *area6_io16_base;
27
28static int __init hs7751rvoip_cf_init(void)
29{
30 pgprot_t prot;
31 unsigned long paddrbase;
32
33 /* open I/O area window */
34 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
35 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
36 area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
37 if (!area5_io16_base) {
38 printk("allocate_cf_area : can't open CF I/O window!\n");
39 return -ENOMEM;
40 }
41
42 /* XXX : do we need attribute and common-memory area also? */
43
44 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
45#if defined(CONFIG_HS7751RVOIP_CODEC)
46 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
47#else
48 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
49#endif
50 area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
51 if (!area6_io8_base) {
52 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
53 return -ENOMEM;
54 }
55 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
56 area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
57 if (!area6_io16_base) {
58 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
59 return -ENOMEM;
60 }
61
62 return 0;
63}
64device_initcall(hs7751rvoip_cf_init);
65
66/*
67 * Initialize the board
68 */
69static void __init hs7751rvoip_setup(char **cmdline_p)
70{
71 ctrl_outb(0xf0, PA_OUTPORTR);
72 pm_power_off = hs7751rvoip_power_off;
73
74 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
75}
76
77static struct sh_machine_vector mv_hs7751rvoip __initmv = {
78 .mv_name = "HS7751RVoIP",
79 .mv_setup = hs7751rvoip_setup,
80 .mv_nr_irqs = 72,
81
82 .mv_inb = hs7751rvoip_inb,
83 .mv_inw = hs7751rvoip_inw,
84 .mv_inl = hs7751rvoip_inl,
85 .mv_outb = hs7751rvoip_outb,
86 .mv_outw = hs7751rvoip_outw,
87 .mv_outl = hs7751rvoip_outl,
88
89 .mv_inb_p = hs7751rvoip_inb_p,
90 .mv_inw_p = hs7751rvoip_inw,
91 .mv_inl_p = hs7751rvoip_inl,
92 .mv_outb_p = hs7751rvoip_outb_p,
93 .mv_outw_p = hs7751rvoip_outw,
94 .mv_outl_p = hs7751rvoip_outl,
95
96 .mv_insb = hs7751rvoip_insb,
97 .mv_insw = hs7751rvoip_insw,
98 .mv_insl = hs7751rvoip_insl,
99 .mv_outsb = hs7751rvoip_outsb,
100 .mv_outsw = hs7751rvoip_outsw,
101 .mv_outsl = hs7751rvoip_outsl,
102
103 .mv_init_irq = init_hs7751rvoip_IRQ,
104 .mv_ioport_map = hs7751rvoip_ioport_map,
105};
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
index dd26182fbf58..20a10080b11f 100644
--- a/arch/sh/boards/renesas/r7780rp/Makefile
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -3,7 +3,7 @@
3# 3#
4irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o 4irqinit-$(CONFIG_SH_R7780MP) := irq-r7780mp.o
5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o 5irqinit-$(CONFIG_SH_R7785RP) := irq-r7785rp.o
6irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o irq.o 6irqinit-$(CONFIG_SH_R7780RP) := irq-r7780rp.o
7obj-y := setup.o $(irqinit-y) 7obj-y := setup.o $(irqinit-y)
8 8
9ifneq ($(CONFIG_SH_R7785RP),y) 9ifneq ($(CONFIG_SH_R7785RP),y)
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
index 59b47fe061f9..1f8f073f27be 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780mp.c
@@ -47,7 +47,7 @@ static unsigned char irl2irq[HL_NR_IRL] __initdata = {
47}; 47};
48 48
49static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors, 49static DECLARE_INTC_DESC(intc_desc, "r7780mp", vectors,
50 NULL, NULL, mask_registers, NULL, NULL); 50 NULL, mask_registers, NULL, NULL);
51 51
52unsigned char * __init highlander_init_irq_r7780mp(void) 52unsigned char * __init highlander_init_irq_r7780mp(void)
53{ 53{
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
index fa4a534cade9..bd34048ed0e1 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7780rp.c
@@ -3,21 +3,65 @@
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2006 Paul Mundt
6 * Copyright (C) 2008 Magnus Damm
6 * 7 *
7 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive 9 * License. See the file "COPYING" in the main directory of this archive
9 * for more details. 10 * for more details.
10 */ 11 */
11#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h>
12#include <linux/io.h> 14#include <linux/io.h>
13#include <asm/r7780rp.h> 15#include <asm/r7780rp.h>
14 16
17enum {
18 UNUSED = 0,
19
20 /* board specific interrupt sources */
21
22 AX88796, /* Ethernet controller */
23 PSW, /* Push Switch */
24 CF, /* Compact Flash */
25
26 PCI_A,
27 PCI_B,
28 PCI_C,
29 PCI_D,
30};
31
32static struct intc_vect vectors[] __initdata = {
33 INTC_IRQ(PCI_A, 65), /* dirty: overwrite cpu vectors for pci */
34 INTC_IRQ(PCI_B, 66),
35 INTC_IRQ(PCI_C, 67),
36 INTC_IRQ(PCI_D, 68),
37 INTC_IRQ(CF, IRQ_CF),
38 INTC_IRQ(PSW, IRQ_PSW),
39 INTC_IRQ(AX88796, IRQ_AX88796),
40};
41
42static struct intc_mask_reg mask_registers[] __initdata = {
43 { 0xa5000000, 0, 16, /* IRLMSK */
44 { PCI_A, PCI_B, PCI_C, PCI_D, CF, 0, 0, 0,
45 0, 0, 0, 0, 0, 0, PSW, AX88796 } },
46};
47
48static unsigned char irl2irq[HL_NR_IRL] __initdata = {
49 65, 66, 67, 68,
50 IRQ_CF, 0, 0, 0,
51 0, 0, 0, 0,
52 IRQ_AX88796, IRQ_PSW
53};
54
55static DECLARE_INTC_DESC(intc_desc, "r7780rp", vectors,
56 NULL, mask_registers, NULL, NULL);
57
15unsigned char * __init highlander_init_irq_r7780rp(void) 58unsigned char * __init highlander_init_irq_r7780rp(void)
16{ 59{
17 int i; 60 if (ctrl_inw(0xa5000600)) {
18 61 printk(KERN_INFO "Using r7780rp interrupt controller.\n");
19 for (i = 0; i < 15; i++) 62 register_intc_controller(&intc_desc);
20 make_r7780rp_irq(i); 63 return irl2irq;
64 }
21 65
22 return NULL; 66 return NULL;
23} 67}
diff --git a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
index b2c6a84673bd..bf7ec107fbc6 100644
--- a/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
+++ b/arch/sh/boards/renesas/r7780rp/irq-r7785rp.c
@@ -2,7 +2,7 @@
2 * Renesas Solutions Highlander R7785RP Support. 2 * Renesas Solutions Highlander R7785RP Support.
3 * 3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd. 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt 5 * Copyright (C) 2006 - 2008 Paul Mundt
6 * Copyright (C) 2007 Magnus Damm 6 * Copyright (C) 2007 Magnus Damm
7 * 7 *
8 * This file is subject to the terms and conditions of the GNU General Public 8 * This file is subject to the terms and conditions of the GNU General Public
@@ -17,31 +17,52 @@
17enum { 17enum {
18 UNUSED = 0, 18 UNUSED = 0,
19 19
20 /* board specific interrupt sources */ 20 /* FPGA specific interrupt sources */
21 AX88796, /* Ethernet controller */ 21 CF, /* Compact Flash */
22 CF, /* Compact Flash */ 22 SMBUS, /* SMBUS */
23 TP, /* Touch panel */
24 RTC, /* RTC Alarm */
25 TH_ALERT, /* Temperature sensor */
26 AX88796, /* Ethernet controller */
27
28 /* external bus connector */
29 EXT0, EXT1, EXT2, EXT3, EXT4, EXT5, EXT6, EXT7,
23}; 30};
24 31
25static struct intc_vect vectors[] __initdata = { 32static struct intc_vect vectors[] __initdata = {
26 INTC_IRQ(CF, IRQ_CF), 33 INTC_IRQ(CF, IRQ_CF),
34 INTC_IRQ(SMBUS, IRQ_SMBUS),
35 INTC_IRQ(TP, IRQ_TP),
36 INTC_IRQ(RTC, IRQ_RTC),
37 INTC_IRQ(TH_ALERT, IRQ_TH_ALERT),
38
39 INTC_IRQ(EXT0, IRQ_EXT0), INTC_IRQ(EXT1, IRQ_EXT1),
40 INTC_IRQ(EXT2, IRQ_EXT2), INTC_IRQ(EXT3, IRQ_EXT3),
41
42 INTC_IRQ(EXT4, IRQ_EXT4), INTC_IRQ(EXT5, IRQ_EXT5),
43 INTC_IRQ(EXT6, IRQ_EXT6), INTC_IRQ(EXT7, IRQ_EXT7),
44
27 INTC_IRQ(AX88796, IRQ_AX88796), 45 INTC_IRQ(AX88796, IRQ_AX88796),
28}; 46};
29 47
30static struct intc_mask_reg mask_registers[] __initdata = { 48static struct intc_mask_reg mask_registers[] __initdata = {
31 { 0xa4000010, 0, 16, /* IRLMCR1 */ 49 { 0xa4000010, 0, 16, /* IRLMCR1 */
32 { 0, 0, 0, 0, CF, AX88796, 0, 0, 50 { 0, 0, 0, 0, CF, AX88796, SMBUS, TP,
33 0, 0, 0, 0, 0, 0, 0, 0 } }, 51 RTC, 0, TH_ALERT, 0, 0, 0, 0, 0 } },
52 { 0xa4000012, 0, 16, /* IRLMCR2 */
53 { 0, 0, 0, 0, 0, 0, 0, 0,
54 EXT7, EXT6, EXT5, EXT4, EXT3, EXT2, EXT1, EXT0 } },
34}; 55};
35 56
36static unsigned char irl2irq[HL_NR_IRL] __initdata = { 57static unsigned char irl2irq[HL_NR_IRL] __initdata = {
37 0, IRQ_CF, 0, 0, 58 0, IRQ_CF, IRQ_EXT4, IRQ_EXT5,
38 0, 0, 0, 0, 59 IRQ_EXT6, IRQ_EXT7, IRQ_SMBUS, IRQ_TP,
39 0, 0, IRQ_AX88796, 0, 60 IRQ_RTC, IRQ_TH_ALERT, IRQ_AX88796, IRQ_EXT0,
40 0, 0, 0, 61 IRQ_EXT1, IRQ_EXT2, IRQ_EXT3,
41}; 62};
42 63
43static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors, 64static DECLARE_INTC_DESC(intc_desc, "r7785rp", vectors,
44 NULL, NULL, mask_registers, NULL, NULL); 65 NULL, mask_registers, NULL, NULL);
45 66
46unsigned char * __init highlander_init_irq_r7785rp(void) 67unsigned char * __init highlander_init_irq_r7785rp(void)
47{ 68{
@@ -58,7 +79,7 @@ unsigned char * __init highlander_init_irq_r7785rp(void)
58 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */ 79 ctrl_outw(0x7060, PA_IRLPRC); /* FPGA IRLC */
59 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */ 80 ctrl_outw(0x0000, PA_IRLPRD); /* FPGA IRLD */
60 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */ 81 ctrl_outw(0x4321, PA_IRLPRE); /* FPGA IRLE */
61 ctrl_outw(0x0000, PA_IRLPRF); /* FPGA IRLF */ 82 ctrl_outw(0xdcba, PA_IRLPRF); /* FPGA IRLF */
62 83
63 register_intc_controller(&intc_desc); 84 register_intc_controller(&intc_desc);
64 return irl2irq; 85 return irl2irq;
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
deleted file mode 100644
index e0b8eb52f376..000000000000
--- a/arch/sh/boards/renesas/r7780rp/irq.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * Renesas Solutions Highlander R7780RP-1 Support.
3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2006 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/irq.h>
13#include <linux/interrupt.h>
14#include <linux/io.h>
15#include <asm/r7780rp.h>
16
17#ifdef CONFIG_SH_R7780RP
18static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
19#elif defined(CONFIG_SH_R7780MP)
20static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
21#elif defined(CONFIG_SH_R7785RP)
22static int mask_pos[] = {2, 11, 2, 2, 2, 2, 9, 8, 7, 5, 10, 2, 2, 2, 2, 2};
23#endif
24
25static void enable_r7780rp_irq(unsigned int irq)
26{
27 /* Set priority in IPR back to original value */
28 ctrl_outw(ctrl_inw(IRLCNTR1) | (1 << mask_pos[irq]), IRLCNTR1);
29}
30
31static void disable_r7780rp_irq(unsigned int irq)
32{
33 /* Set the priority in IPR to 0 */
34 ctrl_outw(ctrl_inw(IRLCNTR1) & (0xffff ^ (1 << mask_pos[irq])),
35 IRLCNTR1);
36}
37
38static struct irq_chip r7780rp_irq_chip __read_mostly = {
39 .name = "R7780RP",
40 .mask = disable_r7780rp_irq,
41 .unmask = enable_r7780rp_irq,
42 .mask_ack = disable_r7780rp_irq,
43};
44
45void make_r7780rp_irq(unsigned int irq)
46{
47 disable_irq_nosync(irq);
48 set_irq_chip_and_handler_name(irq, &r7780rp_irq_chip,
49 handle_level_irq, "level");
50 enable_r7780rp_irq(irq);
51}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
index 0fdc0bc19145..a43b47726f54 100644
--- a/arch/sh/boards/renesas/r7780rp/setup.c
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -179,9 +179,11 @@ static struct platform_device ax88796_device = {
179static struct platform_device *r7780rp_devices[] __initdata = { 179static struct platform_device *r7780rp_devices[] __initdata = {
180 &r8a66597_usb_host_device, 180 &r8a66597_usb_host_device,
181 &m66592_usb_peripheral_device, 181 &m66592_usb_peripheral_device,
182 &cf_ide_device,
183 &heartbeat_device, 182 &heartbeat_device,
183#ifndef CONFIG_SH_R7780RP
184 &cf_ide_device,
184 &ax88796_device, 185 &ax88796_device,
186#endif
185}; 187};
186 188
187static int __init r7780rp_devices_setup(void) 189static int __init r7780rp_devices_setup(void)
@@ -316,9 +318,9 @@ void __init highlander_init_irq(void)
316 break; 318 break;
317#endif 319#endif
318#ifdef CONFIG_SH_R7780RP 320#ifdef CONFIG_SH_R7780RP
319 highlander_init_irq_r7780rp(); 321 ucp = highlander_init_irq_r7780rp();
320 ucp = irl2irq; 322 if (ucp)
321 break; 323 break;
322#endif 324#endif
323 } while (0); 325 } while (0);
324 326
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 7cc2813adfe4..8e49f6e51247 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -13,7 +13,6 @@
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h> 15#include <linux/io.h>
16#include <asm/voyagergx.h>
17#include <asm/rts7751r2d.h> 16#include <asm/rts7751r2d.h>
18 17
19#define R2D_NR_IRL 13 18#define R2D_NR_IRL 13
@@ -71,7 +70,7 @@ static unsigned char irl2irq_r2d_1[R2D_NR_IRL] __initdata = {
71}; 70};
72 71
73static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1, 72static DECLARE_INTC_DESC(intc_desc_r2d_1, "r2d-1", vectors_r2d_1,
74 NULL, NULL, mask_registers_r2d_1, NULL, NULL); 73 NULL, mask_registers_r2d_1, NULL, NULL);
75 74
76#endif /* CONFIG_RTS7751R2D_1 */ 75#endif /* CONFIG_RTS7751R2D_1 */
77 76
@@ -109,7 +108,7 @@ static unsigned char irl2irq_r2d_plus[R2D_NR_IRL] __initdata = {
109}; 108};
110 109
111static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus, 110static DECLARE_INTC_DESC(intc_desc_r2d_plus, "r2d-plus", vectors_r2d_plus,
112 NULL, NULL, mask_registers_r2d_plus, NULL, NULL); 111 NULL, mask_registers_r2d_plus, NULL, NULL);
113 112
114#endif /* CONFIG_RTS7751R2D_PLUS */ 113#endif /* CONFIG_RTS7751R2D_PLUS */
115 114
@@ -153,7 +152,4 @@ void __init init_rts7751r2d_IRQ(void)
153 } 152 }
154 153
155 register_intc_controller(d); 154 register_intc_controller(d);
156#ifdef CONFIG_MFD_SM501
157 setup_voyagergx_irq();
158#endif
159} 155}
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 8125d20fdbd8..3452b072adde 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -13,34 +13,15 @@
13#include <linux/pata_platform.h> 13#include <linux/pata_platform.h>
14#include <linux/serial_8250.h> 14#include <linux/serial_8250.h>
15#include <linux/sm501.h> 15#include <linux/sm501.h>
16#include <linux/sm501-regs.h>
16#include <linux/pm.h> 17#include <linux/pm.h>
18#include <linux/fb.h>
19#include <linux/spi/spi.h>
20#include <linux/spi/spi_bitbang.h>
17#include <asm/machvec.h> 21#include <asm/machvec.h>
18#include <asm/rts7751r2d.h> 22#include <asm/rts7751r2d.h>
19#include <asm/voyagergx.h>
20#include <asm/io.h> 23#include <asm/io.h>
21 24#include <asm/spi.h>
22static void __init voyagergx_serial_init(void)
23{
24 unsigned long val;
25
26 /*
27 * GPIO Control
28 */
29 val = readl((void __iomem *)GPIO_MUX_HIGH);
30 val |= 0x00001fe0;
31 writel(val, (void __iomem *)GPIO_MUX_HIGH);
32
33 /*
34 * Power Mode Gate
35 */
36 val = readl((void __iomem *)POWER_MODE0_GATE);
37 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
38 writel(val, (void __iomem *)POWER_MODE0_GATE);
39
40 val = readl((void __iomem *)POWER_MODE1_GATE);
41 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
42 writel(val, (void __iomem *)POWER_MODE1_GATE);
43}
44 25
45static struct resource cf_ide_resources[] = { 26static struct resource cf_ide_resources[] = {
46 [0] = { 27 [0] = {
@@ -75,6 +56,43 @@ static struct platform_device cf_ide_device = {
75 }, 56 },
76}; 57};
77 58
59static struct spi_board_info spi_bus[] = {
60 {
61 .modalias = "rtc-r9701",
62 .max_speed_hz = 1000000,
63 .mode = SPI_MODE_3,
64 },
65};
66
67static void r2d_chip_select(struct sh_spi_info *spi, int cs, int state)
68{
69 BUG_ON(cs != 0); /* Single Epson RTC-9701JE attached on CS0 */
70 ctrl_outw(state == BITBANG_CS_ACTIVE, PA_RTCCE);
71}
72
73static struct sh_spi_info spi_info = {
74 .num_chipselect = 1,
75 .chip_select = r2d_chip_select,
76};
77
78static struct resource spi_sh_sci_resources[] = {
79 {
80 .start = 0xffe00000,
81 .end = 0xffe0001f,
82 .flags = IORESOURCE_MEM,
83 },
84};
85
86static struct platform_device spi_sh_sci_device = {
87 .name = "spi_sh_sci",
88 .id = -1,
89 .num_resources = ARRAY_SIZE(spi_sh_sci_resources),
90 .resource = spi_sh_sci_resources,
91 .dev = {
92 .platform_data = &spi_info,
93 },
94};
95
78static struct resource heartbeat_resources[] = { 96static struct resource heartbeat_resources[] = {
79 [0] = { 97 [0] = {
80 .start = PA_OUTPORT, 98 .start = PA_OUTPORT,
@@ -93,11 +111,11 @@ static struct platform_device heartbeat_device = {
93#ifdef CONFIG_MFD_SM501 111#ifdef CONFIG_MFD_SM501
94static struct plat_serial8250_port uart_platform_data[] = { 112static struct plat_serial8250_port uart_platform_data[] = {
95 { 113 {
96 .membase = (void __iomem *)VOYAGER_UART_BASE, 114 .membase = (void __iomem *)0xb3e30000,
97 .mapbase = VOYAGER_UART_BASE, 115 .mapbase = 0xb3e30000,
98 .iotype = UPIO_MEM, 116 .iotype = UPIO_MEM,
99 .irq = IRQ_SM501_U0, 117 .irq = IRQ_VOYAGER,
100 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 118 .flags = UPF_BOOT_AUTOCONF | UPF_SHARE_IRQ,
101 .regshift = 2, 119 .regshift = 2,
102 .uartclk = (9600 * 16), 120 .uartclk = (9600 * 16),
103 }, 121 },
@@ -124,14 +142,67 @@ static struct resource sm501_resources[] = {
124 .flags = IORESOURCE_MEM, 142 .flags = IORESOURCE_MEM,
125 }, 143 },
126 [2] = { 144 [2] = {
127 .start = IRQ_SM501_CV, 145 .start = IRQ_VOYAGER,
128 .flags = IORESOURCE_IRQ, 146 .flags = IORESOURCE_IRQ,
129 }, 147 },
130}; 148};
131 149
150static struct fb_videomode sm501_default_mode = {
151 .pixclock = 35714,
152 .xres = 640,
153 .yres = 480,
154 .left_margin = 105,
155 .right_margin = 50,
156 .upper_margin = 35,
157 .lower_margin = 0,
158 .hsync_len = 96,
159 .vsync_len = 2,
160 .sync = FB_SYNC_HOR_HIGH_ACT | FB_SYNC_VERT_HIGH_ACT,
161};
162
163static struct sm501_platdata_fbsub sm501_pdata_fbsub_pnl = {
164 .def_bpp = 16,
165 .def_mode = &sm501_default_mode,
166 .flags = SM501FB_FLAG_USE_INIT_MODE |
167 SM501FB_FLAG_USE_HWCURSOR |
168 SM501FB_FLAG_USE_HWACCEL |
169 SM501FB_FLAG_DISABLE_AT_EXIT,
170};
171
172static struct sm501_platdata_fbsub sm501_pdata_fbsub_crt = {
173 .flags = (SM501FB_FLAG_USE_INIT_MODE |
174 SM501FB_FLAG_USE_HWCURSOR |
175 SM501FB_FLAG_USE_HWACCEL |
176 SM501FB_FLAG_DISABLE_AT_EXIT),
177
178};
179
180static struct sm501_platdata_fb sm501_fb_pdata = {
181 .fb_route = SM501_FB_OWN,
182 .fb_crt = &sm501_pdata_fbsub_crt,
183 .fb_pnl = &sm501_pdata_fbsub_pnl,
184 .flags = SM501_FBPD_SWAP_FB_ENDIAN,
185};
186
187static struct sm501_initdata sm501_initdata = {
188 .gpio_high = {
189 .set = 0x00001fe0,
190 .mask = 0x0,
191 },
192 .devices = SM501_USE_USB_HOST,
193};
194
195static struct sm501_platdata sm501_platform_data = {
196 .init = &sm501_initdata,
197 .fb = &sm501_fb_pdata,
198};
199
132static struct platform_device sm501_device = { 200static struct platform_device sm501_device = {
133 .name = "sm501", 201 .name = "sm501",
134 .id = -1, 202 .id = -1,
203 .dev = {
204 .platform_data = &sm501_platform_data,
205 },
135 .num_resources = ARRAY_SIZE(sm501_resources), 206 .num_resources = ARRAY_SIZE(sm501_resources),
136 .resource = sm501_resources, 207 .resource = sm501_resources,
137}; 208};
@@ -145,10 +216,12 @@ static struct platform_device *rts7751r2d_devices[] __initdata = {
145#endif 216#endif
146 &cf_ide_device, 217 &cf_ide_device,
147 &heartbeat_device, 218 &heartbeat_device,
219 &spi_sh_sci_device,
148}; 220};
149 221
150static int __init rts7751r2d_devices_setup(void) 222static int __init rts7751r2d_devices_setup(void)
151{ 223{
224 spi_register_board_info(spi_bus, ARRAY_SIZE(spi_bus));
152 return platform_add_devices(rts7751r2d_devices, 225 return platform_add_devices(rts7751r2d_devices,
153 ARRAY_SIZE(rts7751r2d_devices)); 226 ARRAY_SIZE(rts7751r2d_devices));
154} 227}
@@ -192,6 +265,7 @@ u8 rts7751r2d_readb(void __iomem *addr)
192 */ 265 */
193static void __init rts7751r2d_setup(char **cmdline_p) 266static void __init rts7751r2d_setup(char **cmdline_p)
194{ 267{
268 void __iomem *sm501_reg;
195 u16 ver = ctrl_inw(PA_VERREG); 269 u16 ver = ctrl_inw(PA_VERREG);
196 270
197 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 271 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
@@ -202,7 +276,30 @@ static void __init rts7751r2d_setup(char **cmdline_p)
202 ctrl_outw(0x0000, PA_OUTPORT); 276 ctrl_outw(0x0000, PA_OUTPORT);
203 pm_power_off = rts7751r2d_power_off; 277 pm_power_off = rts7751r2d_power_off;
204 278
205 voyagergx_serial_init(); 279 /* sm501 dram configuration:
280 * ColSizeX = 11 - External Memory Column Size: 256 words.
281 * APX = 1 - External Memory Active to Pre-Charge Delay: 7 clocks.
282 * RstX = 1 - External Memory Reset: Normal.
283 * Rfsh = 1 - Local Memory Refresh to Command Delay: 12 clocks.
284 * BwC = 1 - Local Memory Block Write Cycle Time: 2 clocks.
285 * BwP = 1 - Local Memory Block Write to Pre-Charge Delay: 1 clock.
286 * AP = 1 - Internal Memory Active to Pre-Charge Delay: 7 clocks.
287 * Rst = 1 - Internal Memory Reset: Normal.
288 * RA = 1 - Internal Memory Remain in Active State: Do not remain.
289 */
290
291 sm501_reg = (void __iomem *)0xb3e00000 + SM501_DRAM_CONTROL;
292 writel(readl(sm501_reg) | 0x00f107c0, sm501_reg);
293
294 /*
295 * Power Mode Gate - Enable UART0
296 */
297
298 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_0_GATE;
299 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
300
301 sm501_reg = (void __iomem *)0xb3e00000 + SM501_POWER_MODE_1_GATE;
302 writel(readl(sm501_reg) | (1 << SM501_GATE_UART0), sm501_reg);
206} 303}
207 304
208/* 305/*
@@ -215,8 +312,4 @@ static struct sh_machine_vector mv_rts7751r2d __initmv = {
215 .mv_irq_demux = rts7751r2d_irq_demux, 312 .mv_irq_demux = rts7751r2d_irq_demux,
216 .mv_writeb = rts7751r2d_writeb, 313 .mv_writeb = rts7751r2d_writeb,
217 .mv_readb = rts7751r2d_readb, 314 .mv_readb = rts7751r2d_readb,
218#if defined(CONFIG_MFD_SM501) && defined(CONFIG_USB_OHCI_HCD)
219 .mv_consistent_alloc = voyagergx_consistent_alloc,
220 .mv_consistent_free = voyagergx_consistent_free,
221#endif
222}; 315};
diff --git a/arch/sh/boards/renesas/sdk7780/Kconfig b/arch/sh/boards/renesas/sdk7780/Kconfig
new file mode 100644
index 000000000000..e4f5b6985be1
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/Kconfig
@@ -0,0 +1,23 @@
1if SH_SDK7780
2
3choice
4 prompt "SDK7780 options"
5 default SH_SDK7780_BASE
6
7config SH_SDK7780_STANDALONE
8 bool "SDK7780 board support"
9 depends on CPU_SUBTYPE_SH7780
10 help
11 Selecting this option will enable support for the
12 standalone version of the SDK7780. If in doubt, say Y.
13
14config SH_SDK7780_BASE
15 bool "SDK7780 with base-board support"
16 depends on CPU_SUBTYPE_SH7780
17 help
18 Selecting this option will enable support for the expansion
19 baseboard devices. If in doubt, say Y.
20
21endchoice
22
23endif
diff --git a/arch/sh/boards/renesas/sdk7780/Makefile b/arch/sh/boards/renesas/sdk7780/Makefile
new file mode 100644
index 000000000000..3d8f0befc35d
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the SDK7780 specific parts of the kernel
3#
4obj-y := setup.o irq.o
5
diff --git a/arch/sh/boards/renesas/sdk7780/irq.c b/arch/sh/boards/renesas/sdk7780/irq.c
new file mode 100644
index 000000000000..87cdc578f6ff
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/irq.c
@@ -0,0 +1,46 @@
1/*
2 * linux/arch/sh/boards/renesas/sdk7780/irq.c
3 *
4 * Renesas Technology Europe SDK7780 Support.
5 *
6 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/io.h>
15#include <asm/sdk7780.h>
16
17enum {
18 UNUSED = 0,
19 /* board specific interrupt sources */
20 SMC91C111, /* Ethernet controller */
21};
22
23static struct intc_vect fpga_vectors[] __initdata = {
24 INTC_IRQ(SMC91C111, IRQ_ETHERNET),
25};
26
27static struct intc_mask_reg fpga_mask_registers[] __initdata = {
28 { 0, FPGA_IRQ0MR, 16,
29 { 0, 0, 0, 0, 0, 0, 0, 0,
30 0, 0, 0, SMC91C111, 0, 0, 0, 0 } },
31};
32
33static DECLARE_INTC_DESC(fpga_intc_desc, "sdk7780-irq", fpga_vectors,
34 NULL, fpga_mask_registers, NULL, NULL);
35
36void __init init_sdk7780_IRQ(void)
37{
38 printk(KERN_INFO "Using SDK7780 interrupt controller.\n");
39
40 ctrl_outw(0xFFFF, FPGA_IRQ0MR);
41 /* Setup IRL 0-3 */
42 ctrl_outw(0x0003, FPGA_IMSR);
43 plat_irq_setup_pins(IRQ_MODE_IRL3210);
44
45 register_intc_controller(&fpga_intc_desc);
46}
diff --git a/arch/sh/boards/renesas/sdk7780/setup.c b/arch/sh/boards/renesas/sdk7780/setup.c
new file mode 100644
index 000000000000..5df32f201870
--- /dev/null
+++ b/arch/sh/boards/renesas/sdk7780/setup.c
@@ -0,0 +1,109 @@
1/*
2 * arch/sh/boards/renesas/sdk7780/setup.c
3 *
4 * Renesas Solutions SH7780 SDK Support
5 * Copyright (C) 2008 Nicholas Beck <nbeck@mpc-data.co.uk>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/platform_device.h>
14#include <linux/pata_platform.h>
15#include <asm/machvec.h>
16#include <asm/sdk7780.h>
17#include <asm/heartbeat.h>
18#include <asm/io.h>
19#include <asm/addrspace.h>
20
21#define GPIO_PECR 0xFFEA0008
22
23//* Heartbeat */
24static struct heartbeat_data heartbeat_data = {
25 .regsize = 16,
26};
27
28static struct resource heartbeat_resources[] = {
29 [0] = {
30 .start = PA_LED,
31 .end = PA_LED,
32 .flags = IORESOURCE_MEM,
33 },
34};
35
36static struct platform_device heartbeat_device = {
37 .name = "heartbeat",
38 .id = -1,
39 .dev = {
40 .platform_data = &heartbeat_data,
41 },
42 .num_resources = ARRAY_SIZE(heartbeat_resources),
43 .resource = heartbeat_resources,
44};
45
46/* SMC91x */
47static struct resource smc91x_eth_resources[] = {
48 [0] = {
49 .name = "smc91x-regs" ,
50 .start = PA_LAN + 0x300,
51 .end = PA_LAN + 0x300 + 0x10 ,
52 .flags = IORESOURCE_MEM,
53 },
54 [1] = {
55 .start = IRQ_ETHERNET,
56 .end = IRQ_ETHERNET,
57 .flags = IORESOURCE_IRQ,
58 },
59};
60
61static struct platform_device smc91x_eth_device = {
62 .name = "smc91x",
63 .id = 0,
64 .dev = {
65 .dma_mask = NULL, /* don't use dma */
66 .coherent_dma_mask = 0xffffffff,
67 },
68 .num_resources = ARRAY_SIZE(smc91x_eth_resources),
69 .resource = smc91x_eth_resources,
70};
71
72static struct platform_device *sdk7780_devices[] __initdata = {
73 &heartbeat_device,
74 &smc91x_eth_device,
75};
76
77static int __init sdk7780_devices_setup(void)
78{
79 return platform_add_devices(sdk7780_devices,
80 ARRAY_SIZE(sdk7780_devices));
81}
82device_initcall(sdk7780_devices_setup);
83
84static void __init sdk7780_setup(char **cmdline_p)
85{
86 u16 ver = ctrl_inw(FPGA_FPVERR);
87 u16 dateStamp = ctrl_inw(FPGA_FPDATER);
88
89 printk(KERN_INFO "Renesas Technology Europe SDK7780 support.\n");
90 printk(KERN_INFO "Board version: %d (revision %d), "
91 "FPGA version: %d (revision %d), datestamp : %d\n",
92 (ver >> 12) & 0xf, (ver >> 8) & 0xf,
93 (ver >> 4) & 0xf, ver & 0xf,
94 dateStamp);
95
96 /* Setup pin mux'ing for PCIC */
97 ctrl_outw(0x0000, GPIO_PECR);
98}
99
100/*
101 * The Machine Vector
102 */
103static struct sh_machine_vector mv_se7780 __initmv = {
104 .mv_name = "Renesas SDK7780-R3" ,
105 .mv_setup = sdk7780_setup,
106 .mv_nr_irqs = 111,
107 .mv_init_irq = init_sdk7780_IRQ,
108};
109
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-20 05:38:53 -0500