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-rw-r--r--arch/sh/boards/Kconfig11
-rw-r--r--arch/sh/boards/Makefile1
-rw-r--r--arch/sh/boards/board-ap325rxa.c7
-rw-r--r--arch/sh/boards/board-shmin.c14
-rw-r--r--arch/sh/boards/mach-cayman/Makefile1
-rw-r--r--arch/sh/boards/mach-cayman/irq.c35
-rw-r--r--arch/sh/boards/mach-cayman/led.c51
-rw-r--r--arch/sh/boards/mach-dreamcast/irq.c192
-rw-r--r--arch/sh/boards/mach-dreamcast/setup.c5
-rw-r--r--arch/sh/boards/mach-edosk7705/Makefile1
-rw-r--r--arch/sh/boards/mach-edosk7705/io.c61
-rw-r--r--arch/sh/boards/mach-edosk7705/setup.c9
-rw-r--r--arch/sh/boards/mach-hp6xx/pm.c78
-rw-r--r--arch/sh/boards/mach-microdev/Makefile5
-rw-r--r--arch/sh/boards/mach-microdev/fdc37c93xapm.c160
-rw-r--r--arch/sh/boards/mach-microdev/irq.c36
-rw-r--r--arch/sh/boards/mach-microdev/led.c101
-rw-r--r--arch/sh/boards/mach-microdev/setup.c196
-rw-r--r--arch/sh/boards/mach-migor/setup.c21
-rw-r--r--arch/sh/boards/mach-rsk/Kconfig18
-rw-r--r--arch/sh/boards/mach-rsk/Makefile2
-rw-r--r--arch/sh/boards/mach-rsk/devices-rsk7203.c (renamed from arch/sh/boards/board-rsk7203.c)76
-rw-r--r--arch/sh/boards/mach-rsk/setup.c106
-rw-r--r--arch/sh/boards/mach-se/7343/Makefile2
-rw-r--r--arch/sh/boards/mach-se/7343/io.c273
-rw-r--r--arch/sh/boards/mach-se/7343/setup.c126
-rw-r--r--arch/sh/boards/mach-se/770x/setup.c4
-rw-r--r--arch/sh/boards/mach-se/7721/setup.c7
-rw-r--r--arch/sh/boards/mach-se/7722/setup.c10
-rw-r--r--arch/sh/boards/mach-sh03/setup.c59
-rw-r--r--arch/sh/boards/mach-systemh/irq.c37
31 files changed, 663 insertions, 1042 deletions
diff --git a/arch/sh/boards/Kconfig b/arch/sh/boards/Kconfig
index 50467f9d0d0b..861914747e4e 100644
--- a/arch/sh/boards/Kconfig
+++ b/arch/sh/boards/Kconfig
@@ -126,10 +126,12 @@ config SH_RTS7751R2D
126 Select RTS7751R2D if configuring for a Renesas Technology 126 Select RTS7751R2D if configuring for a Renesas Technology
127 Sales SH-Graphics board. 127 Sales SH-Graphics board.
128 128
129config SH_RSK7203 129config SH_RSK
130 bool "RSK7203" 130 bool "Renesas Starter Kit"
131 select GENERIC_GPIO 131 depends on CPU_SUBTYPE_SH7201 || CPU_SUBTYPE_SH7203
132 depends on CPU_SUBTYPE_SH7203 132 help
133 Select this option if configuring for any of the RSK+ MCU
134 evaluation platforms.
133 135
134config SH_SDK7780 136config SH_SDK7780
135 bool "SDK7780R3" 137 bool "SDK7780R3"
@@ -253,6 +255,7 @@ source "arch/sh/boards/mach-r2d/Kconfig"
253source "arch/sh/boards/mach-highlander/Kconfig" 255source "arch/sh/boards/mach-highlander/Kconfig"
254source "arch/sh/boards/mach-sdk7780/Kconfig" 256source "arch/sh/boards/mach-sdk7780/Kconfig"
255source "arch/sh/boards/mach-migor/Kconfig" 257source "arch/sh/boards/mach-migor/Kconfig"
258source "arch/sh/boards/mach-rsk/Kconfig"
256 259
257if SH_MAGIC_PANEL_R2 260if SH_MAGIC_PANEL_R2
258 261
diff --git a/arch/sh/boards/Makefile b/arch/sh/boards/Makefile
index d9efa3923721..269ae2be49ef 100644
--- a/arch/sh/boards/Makefile
+++ b/arch/sh/boards/Makefile
@@ -3,7 +3,6 @@
3# 3#
4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o 4obj-$(CONFIG_SH_AP325RXA) += board-ap325rxa.o
5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o 5obj-$(CONFIG_SH_MAGIC_PANEL_R2) += board-magicpanelr2.o
6obj-$(CONFIG_SH_RSK7203) += board-rsk7203.o
7obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o 6obj-$(CONFIG_SH_SH7785LCR) += board-sh7785lcr.o
8obj-$(CONFIG_SH_SHMIN) += board-shmin.o 7obj-$(CONFIG_SH_SHMIN) += board-shmin.o
9obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o 8obj-$(CONFIG_SH_EDOSK7760) += board-edosk7760.o
diff --git a/arch/sh/boards/board-ap325rxa.c b/arch/sh/boards/board-ap325rxa.c
index 8881a643ac32..1c67cba6e34f 100644
--- a/arch/sh/boards/board-ap325rxa.c
+++ b/arch/sh/boards/board-ap325rxa.c
@@ -197,6 +197,10 @@ static struct resource lcdc_resources[] = {
197 .end = 0xfe941fff, 197 .end = 0xfe941fff,
198 .flags = IORESOURCE_MEM, 198 .flags = IORESOURCE_MEM,
199 }, 199 },
200 [1] = {
201 .start = 28,
202 .flags = IORESOURCE_IRQ,
203 },
200}; 204};
201 205
202static struct platform_device lcdc_device = { 206static struct platform_device lcdc_device = {
@@ -303,6 +307,7 @@ static struct resource ceu_resources[] = {
303 307
304static struct platform_device ceu_device = { 308static struct platform_device ceu_device = {
305 .name = "sh_mobile_ceu", 309 .name = "sh_mobile_ceu",
310 .id = 0, /* "ceu0" clock */
306 .num_resources = ARRAY_SIZE(ceu_resources), 311 .num_resources = ARRAY_SIZE(ceu_resources),
307 .resource = ceu_resources, 312 .resource = ceu_resources,
308 .dev = { 313 .dev = {
@@ -344,7 +349,6 @@ static int __init ap325rxa_devices_setup(void)
344 gpio_export(GPIO_PTF7, 0); 349 gpio_export(GPIO_PTF7, 0);
345 350
346 /* LCDC */ 351 /* LCDC */
347 clk_always_enable("mstp200");
348 gpio_request(GPIO_FN_LCDD15, NULL); 352 gpio_request(GPIO_FN_LCDD15, NULL);
349 gpio_request(GPIO_FN_LCDD14, NULL); 353 gpio_request(GPIO_FN_LCDD14, NULL);
350 gpio_request(GPIO_FN_LCDD13, NULL); 354 gpio_request(GPIO_FN_LCDD13, NULL);
@@ -375,7 +379,6 @@ static int __init ap325rxa_devices_setup(void)
375 gpio_direction_output(GPIO_PTS3, 1); 379 gpio_direction_output(GPIO_PTS3, 1);
376 380
377 /* CEU */ 381 /* CEU */
378 clk_always_enable("mstp203");
379 gpio_request(GPIO_FN_VIO_CLK2, NULL); 382 gpio_request(GPIO_FN_VIO_CLK2, NULL);
380 gpio_request(GPIO_FN_VIO_VD2, NULL); 383 gpio_request(GPIO_FN_VIO_VD2, NULL);
381 gpio_request(GPIO_FN_VIO_HD2, NULL); 384 gpio_request(GPIO_FN_VIO_HD2, NULL);
diff --git a/arch/sh/boards/board-shmin.c b/arch/sh/boards/board-shmin.c
index 5cc0867de5ab..b1dcbbc89188 100644
--- a/arch/sh/boards/board-shmin.c
+++ b/arch/sh/boards/board-shmin.c
@@ -22,21 +22,13 @@ static void __init init_shmin_irq(void)
22 plat_irq_setup_pins(IRQ_MODE_IRQ); 22 plat_irq_setup_pins(IRQ_MODE_IRQ);
23} 23}
24 24
25static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size) 25static void __init shmin_setup(char **cmdline_p)
26{ 26{
27 static int dummy; 27 __set_io_port_base(SHMIN_IO_BASE);
28
29 if ((port & ~0x1f) == SHMIN_NE_BASE)
30 return (void __iomem *)(SHMIN_IO_BASE + port);
31
32 dummy = 0;
33
34 return &dummy;
35
36} 28}
37 29
38static struct sh_machine_vector mv_shmin __initmv = { 30static struct sh_machine_vector mv_shmin __initmv = {
39 .mv_name = "SHMIN", 31 .mv_name = "SHMIN",
32 .mv_setup = shmin_setup,
40 .mv_init_irq = init_shmin_irq, 33 .mv_init_irq = init_shmin_irq,
41 .mv_ioport_map = shmin_ioport_map,
42}; 34};
diff --git a/arch/sh/boards/mach-cayman/Makefile b/arch/sh/boards/mach-cayman/Makefile
index 489a8f867368..cafe1ac3b29c 100644
--- a/arch/sh/boards/mach-cayman/Makefile
+++ b/arch/sh/boards/mach-cayman/Makefile
@@ -2,4 +2,3 @@
2# Makefile for the Hitachi Cayman specific parts of the kernel 2# Makefile for the Hitachi Cayman specific parts of the kernel
3# 3#
4obj-y := setup.o irq.o 4obj-y := setup.o irq.o
5obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/mach-cayman/irq.c b/arch/sh/boards/mach-cayman/irq.c
index ceb37ae92c70..da62ad516994 100644
--- a/arch/sh/boards/mach-cayman/irq.c
+++ b/arch/sh/boards/mach-cayman/irq.c
@@ -94,31 +94,11 @@ static void ack_cayman_irq(unsigned int irq)
94 disable_cayman_irq(irq); 94 disable_cayman_irq(irq);
95} 95}
96 96
97static void end_cayman_irq(unsigned int irq) 97struct irq_chip cayman_irq_type = {
98{ 98 .name = "Cayman-IRQ",
99 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 99 .unmask = enable_cayman_irq,
100 enable_cayman_irq(irq); 100 .mask = disable_cayman_irq,
101} 101 .mask_ack = ack_cayman_irq,
102
103static unsigned int startup_cayman_irq(unsigned int irq)
104{
105 enable_cayman_irq(irq);
106 return 0; /* never anything pending */
107}
108
109static void shutdown_cayman_irq(unsigned int irq)
110{
111 disable_cayman_irq(irq);
112}
113
114struct hw_interrupt_type cayman_irq_type = {
115 .typename = "Cayman-IRQ",
116 .startup = startup_cayman_irq,
117 .shutdown = shutdown_cayman_irq,
118 .enable = enable_cayman_irq,
119 .disable = disable_cayman_irq,
120 .ack = ack_cayman_irq,
121 .end = end_cayman_irq,
122}; 102};
123 103
124int cayman_irq_demux(int evt) 104int cayman_irq_demux(int evt)
@@ -187,8 +167,9 @@ void init_cayman_irq(void)
187 return; 167 return;
188 } 168 }
189 169
190 for (i=0; i<NR_EXT_IRQS; i++) { 170 for (i = 0; i < NR_EXT_IRQS; i++) {
191 irq_desc[START_EXT_IRQS + i].chip = &cayman_irq_type; 171 set_irq_chip_and_handler(START_EXT_IRQS + i, &cayman_irq_type,
172 handle_level_irq);
192 } 173 }
193 174
194 /* Setup the SMSC interrupt */ 175 /* Setup the SMSC interrupt */
diff --git a/arch/sh/boards/mach-cayman/led.c b/arch/sh/boards/mach-cayman/led.c
deleted file mode 100644
index a808eac4ecd6..000000000000
--- a/arch/sh/boards/mach-cayman/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * arch/sh/boards/cayman/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Flash the LEDs
10 */
11#include <asm/io.h>
12
13/*
14** It is supposed these functions to be used for a low level
15** debugging (via Cayman LEDs), hence to be available as soon
16** as possible.
17** Unfortunately Cayman LEDs relies on Cayman EPLD to be mapped
18** (this happen when IRQ are initialized... quite late).
19** These triky dependencies should be removed. Temporary, it
20** may be enough to NOP until EPLD is mapped.
21*/
22
23extern unsigned long epld_virt;
24
25#define LED_ADDR (epld_virt + 0x008)
26#define HDSP2534_ADDR (epld_virt + 0x100)
27
28void mach_led(int position, int value)
29{
30 if (!epld_virt)
31 return;
32
33 if (value)
34 ctrl_outl(0, LED_ADDR);
35 else
36 ctrl_outl(1, LED_ADDR);
37
38}
39
40void mach_alphanum(int position, unsigned char value)
41{
42 if (!epld_virt)
43 return;
44
45 ctrl_outb(value, HDSP2534_ADDR + 0xe0 + (position << 2));
46}
47
48void mach_alphanum_brightness(int setting)
49{
50 ctrl_outb(setting & 7, HDSP2534_ADDR + 0xc0);
51}
diff --git a/arch/sh/boards/mach-dreamcast/irq.c b/arch/sh/boards/mach-dreamcast/irq.c
index 67bdc33dd411..f55fc8e795e9 100644
--- a/arch/sh/boards/mach-dreamcast/irq.c
+++ b/arch/sh/boards/mach-dreamcast/irq.c
@@ -10,106 +10,90 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <mach/sysasic.h> 15#include <mach/sysasic.h>
16 16
17/* Dreamcast System ASIC Hardware Events - 17/*
18 18 * Dreamcast System ASIC Hardware Events -
19 The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving 19 *
20 hardware events from system peripherals and triggering an SH7750 IRQ. 20 * The Dreamcast's System ASIC (a.k.a. Holly) is responsible for receiving
21 Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are 21 * hardware events from system peripherals and triggering an SH7750 IRQ.
22 set in the Event Mask Registers (EMRs). When a hardware event is 22 * Hardware events can trigger IRQs 13, 11, or 9 depending on which bits are
23 triggered, it's corresponding bit in the Event Status Registers (ESRs) 23 * set in the Event Mask Registers (EMRs). When a hardware event is
24 is set, and that bit should be rewritten to the ESR to acknowledge that 24 * triggered, its corresponding bit in the Event Status Registers (ESRs)
25 event. 25 * is set, and that bit should be rewritten to the ESR to acknowledge that
26 26 * event.
27 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event 27 *
28 types can be found in include/asm-sh/dreamcast/sysasic.h. There are three 28 * There are three 32-bit ESRs located at 0xa05f6900 - 0xa05f6908. Event
29 groups of EMRs that parallel the ESRs. Each EMR group corresponds to an 29 * types can be found in arch/sh/include/mach-dreamcast/mach/sysasic.h.
30 IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 30 * There are three groups of EMRs that parallel the ESRs. Each EMR group
31 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. 31 * corresponds to an IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13,
32 32 * 0xa05f6920 - 0xa05f6928 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938
33 In the kernel, these events are mapped to virtual IRQs so that drivers can 33 * triggers IRQ 9.
34 respond to them as they would a normal interrupt. In order to keep this 34 *
35 mapping simple, the events are mapped as: 35 * In the kernel, these events are mapped to virtual IRQs so that drivers can
36 36 * respond to them as they would a normal interrupt. In order to keep this
37 6900/6910 - Events 0-31, IRQ 13 37 * mapping simple, the events are mapped as:
38 6904/6924 - Events 32-63, IRQ 11 38 *
39 6908/6938 - Events 64-95, IRQ 9 39 * 6900/6910 - Events 0-31, IRQ 13
40 40 * 6904/6924 - Events 32-63, IRQ 11
41*/ 41 * 6908/6938 - Events 64-95, IRQ 9
42 *
43 */
42 44
43#define ESR_BASE 0x005f6900 /* Base event status register */ 45#define ESR_BASE 0x005f6900 /* Base event status register */
44#define EMR_BASE 0x005f6910 /* Base event mask register */ 46#define EMR_BASE 0x005f6910 /* Base event mask register */
45 47
46/* Helps us determine the EMR group that this event belongs to: 0 = 0x6910, 48/*
47 1 = 0x6920, 2 = 0x6930; also determine the event offset */ 49 * Helps us determine the EMR group that this event belongs to: 0 = 0x6910,
50 * 1 = 0x6920, 2 = 0x6930; also determine the event offset.
51 */
48#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32) 52#define LEVEL(event) (((event) - HW_EVENT_IRQ_BASE) / 32)
49 53
50/* Return the hardware event's bit positon within the EMR/ESR */ 54/* Return the hardware event's bit positon within the EMR/ESR */
51#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31) 55#define EVENT_BIT(event) (((event) - HW_EVENT_IRQ_BASE) & 31)
52 56
53/* For each of these *_irq routines, the IRQ passed in is the virtual IRQ 57/*
54 (logically mapped to the corresponding bit for the hardware event). */ 58 * For each of these *_irq routines, the IRQ passed in is the virtual IRQ
59 * (logically mapped to the corresponding bit for the hardware event).
60 */
55 61
56/* Disable the hardware event by masking its bit in its EMR */ 62/* Disable the hardware event by masking its bit in its EMR */
57static inline void disable_systemasic_irq(unsigned int irq) 63static inline void disable_systemasic_irq(unsigned int irq)
58{ 64{
59 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 65 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
60 __u32 mask; 66 __u32 mask;
61 67
62 mask = inl(emr); 68 mask = inl(emr);
63 mask &= ~(1 << EVENT_BIT(irq)); 69 mask &= ~(1 << EVENT_BIT(irq));
64 outl(mask, emr); 70 outl(mask, emr);
65} 71}
66 72
67/* Enable the hardware event by setting its bit in its EMR */ 73/* Enable the hardware event by setting its bit in its EMR */
68static inline void enable_systemasic_irq(unsigned int irq) 74static inline void enable_systemasic_irq(unsigned int irq)
69{ 75{
70 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 76 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
71 __u32 mask; 77 __u32 mask;
72 78
73 mask = inl(emr); 79 mask = inl(emr);
74 mask |= (1 << EVENT_BIT(irq)); 80 mask |= (1 << EVENT_BIT(irq));
75 outl(mask, emr); 81 outl(mask, emr);
76} 82}
77 83
78/* Acknowledge a hardware event by writing its bit back to its ESR */ 84/* Acknowledge a hardware event by writing its bit back to its ESR */
79static void ack_systemasic_irq(unsigned int irq) 85static void mask_ack_systemasic_irq(unsigned int irq)
80{
81 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
82 disable_systemasic_irq(irq);
83 outl((1 << EVENT_BIT(irq)), esr);
84}
85
86/* After a IRQ has been ack'd and responded to, it needs to be renabled */
87static void end_systemasic_irq(unsigned int irq)
88{
89 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
90 enable_systemasic_irq(irq);
91}
92
93static unsigned int startup_systemasic_irq(unsigned int irq)
94{
95 enable_systemasic_irq(irq);
96
97 return 0;
98}
99
100static void shutdown_systemasic_irq(unsigned int irq)
101{ 86{
102 disable_systemasic_irq(irq); 87 __u32 esr = ESR_BASE + (LEVEL(irq) << 2);
88 disable_systemasic_irq(irq);
89 outl((1 << EVENT_BIT(irq)), esr);
103} 90}
104 91
105struct hw_interrupt_type systemasic_int = { 92struct irq_chip systemasic_int = {
106 .typename = "System ASIC", 93 .name = "System ASIC",
107 .startup = startup_systemasic_irq, 94 .mask = disable_systemasic_irq,
108 .shutdown = shutdown_systemasic_irq, 95 .mask_ack = mask_ack_systemasic_irq,
109 .enable = enable_systemasic_irq, 96 .unmask = enable_systemasic_irq,
110 .disable = disable_systemasic_irq,
111 .ack = ack_systemasic_irq,
112 .end = end_systemasic_irq,
113}; 97};
114 98
115/* 99/*
@@ -117,37 +101,37 @@ struct hw_interrupt_type systemasic_int = {
117 */ 101 */
118int systemasic_irq_demux(int irq) 102int systemasic_irq_demux(int irq)
119{ 103{
120 __u32 emr, esr, status, level; 104 __u32 emr, esr, status, level;
121 __u32 j, bit; 105 __u32 j, bit;
122 106
123 switch (irq) { 107 switch (irq) {
124 case 13: 108 case 13:
125 level = 0; 109 level = 0;
126 break; 110 break;
127 case 11: 111 case 11:
128 level = 1; 112 level = 1;
129 break; 113 break;
130 case 9: 114 case 9:
131 level = 2; 115 level = 2;
132 break; 116 break;
133 default: 117 default:
134 return irq; 118 return irq;
135 } 119 }
136 emr = EMR_BASE + (level << 4) + (level << 2); 120 emr = EMR_BASE + (level << 4) + (level << 2);
137 esr = ESR_BASE + (level << 2); 121 esr = ESR_BASE + (level << 2);
138 122
139 /* Mask the ESR to filter any spurious, unwanted interrupts */ 123 /* Mask the ESR to filter any spurious, unwanted interrupts */
140 status = inl(esr); 124 status = inl(esr);
141 status &= inl(emr); 125 status &= inl(emr);
142 126
143 /* Now scan and find the first set bit as the event to map */ 127 /* Now scan and find the first set bit as the event to map */
144 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) { 128 for (bit = 1, j = 0; j < 32; bit <<= 1, j++) {
145 if (status & bit) { 129 if (status & bit) {
146 irq = HW_EVENT_IRQ_BASE + j + (level << 5); 130 irq = HW_EVENT_IRQ_BASE + j + (level << 5);
147 return irq; 131 return irq;
148 } 132 }
149 } 133 }
150 134
151 /* Not reached */ 135 /* Not reached */
152 return irq; 136 return irq;
153} 137}
diff --git a/arch/sh/boards/mach-dreamcast/setup.c b/arch/sh/boards/mach-dreamcast/setup.c
index 7d944fc75e93..d1bee4884cd6 100644
--- a/arch/sh/boards/mach-dreamcast/setup.c
+++ b/arch/sh/boards/mach-dreamcast/setup.c
@@ -28,7 +28,7 @@
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <mach/sysasic.h> 29#include <mach/sysasic.h>
30 30
31extern struct hw_interrupt_type systemasic_int; 31extern struct irq_chip systemasic_int;
32extern void aica_time_init(void); 32extern void aica_time_init(void);
33extern int gapspci_init(void); 33extern int gapspci_init(void);
34extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
@@ -47,7 +47,8 @@ static void __init dreamcast_setup(char **cmdline_p)
47 47
48 /* Assign all virtual IRQs to the System ASIC int. handler */ 48 /* Assign all virtual IRQs to the System ASIC int. handler */
49 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++) 49 for (i = HW_EVENT_IRQ_BASE; i < HW_EVENT_IRQ_MAX; i++)
50 irq_desc[i].chip = &systemasic_int; 50 set_irq_chip_and_handler(i, &systemasic_int,
51 handle_level_irq);
51 52
52 board_time_init = aica_time_init; 53 board_time_init = aica_time_init;
53 54
diff --git a/arch/sh/boards/mach-edosk7705/Makefile b/arch/sh/boards/mach-edosk7705/Makefile
index 14bdd531f116..cd54acb51499 100644
--- a/arch/sh/boards/mach-edosk7705/Makefile
+++ b/arch/sh/boards/mach-edosk7705/Makefile
@@ -3,4 +3,3 @@
3# 3#
4 4
5obj-y := setup.o io.o 5obj-y := setup.o io.o
6
diff --git a/arch/sh/boards/mach-edosk7705/io.c b/arch/sh/boards/mach-edosk7705/io.c
index 7d153e50a01b..5b9c57c43241 100644
--- a/arch/sh/boards/mach-edosk7705/io.c
+++ b/arch/sh/boards/mach-edosk7705/io.c
@@ -10,28 +10,24 @@
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/io.h> 13#include <linux/io.h>
14#include <mach/edosk7705.h> 14#include <mach/edosk7705.h>
15#include <asm/addrspace.h> 15#include <asm/addrspace.h>
16 16
17#define SMC_IOADDR 0xA2000000 17#define SMC_IOADDR 0xA2000000
18 18
19#define maybebadio(name,port) \
20 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
21 #name, (port), (__u32) __builtin_return_address(0))
22
23/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */ 19/* Map the Ethernet addresses as if it is at 0x300 - 0x320 */
24unsigned long sh_edosk7705_isa_port2addr(unsigned long port) 20static unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
25{ 21{
26 if (port >= 0x300 && port < 0x320) { 22 /*
27 /* SMC91C96 registers are 4 byte aligned rather than the 23 * SMC91C96 registers are 4 byte aligned rather than the
28 * usual 2 byte! 24 * usual 2 byte!
29 */ 25 */
30 return SMC_IOADDR + ( (port - 0x300) * 2); 26 if (port >= 0x300 && port < 0x320)
31 } 27 return SMC_IOADDR + ((port - 0x300) * 2);
32 28
33 maybebadio(sh_edosk7705_isa_port2addr, port); 29 maybebadio(port);
34 return port; 30 return port;
35} 31}
36 32
37/* Trying to read / write bytes on odd-byte boundaries to the Ethernet 33/* Trying to read / write bytes on odd-byte boundaries to the Ethernet
@@ -42,53 +38,34 @@ unsigned long sh_edosk7705_isa_port2addr(unsigned long port)
42 */ 38 */
43unsigned char sh_edosk7705_inb(unsigned long port) 39unsigned char sh_edosk7705_inb(unsigned long port)
44{ 40{
45 if (port >= 0x300 && port < 0x320 && port & 0x01) { 41 if (port >= 0x300 && port < 0x320 && port & 0x01)
46 return (volatile unsigned char)(generic_inw(port -1) >> 8); 42 return __raw_readw(port - 1) >> 8;
47 }
48 return *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port);
49}
50 43
51unsigned int sh_edosk7705_inl(unsigned long port) 44 return __raw_readb(sh_edosk7705_isa_port2addr(port));
52{
53 return *(volatile unsigned long *)port;
54} 45}
55 46
56void sh_edosk7705_outb(unsigned char value, unsigned long port) 47void sh_edosk7705_outb(unsigned char value, unsigned long port)
57{ 48{
58 if (port >= 0x300 && port < 0x320 && port & 0x01) { 49 if (port >= 0x300 && port < 0x320 && port & 0x01) {
59 generic_outw(((unsigned short)value << 8), port -1); 50 __raw_writew(((unsigned short)value << 8), port - 1);
60 return; 51 return;
61 } 52 }
62 *(volatile unsigned char *)sh_edosk7705_isa_port2addr(port) = value;
63}
64 53
65void sh_edosk7705_outl(unsigned int value, unsigned long port) 54 __raw_writeb(value, sh_edosk7705_isa_port2addr(port));
66{
67 *(volatile unsigned long *)port = value;
68} 55}
69 56
70void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count) 57void sh_edosk7705_insb(unsigned long port, void *addr, unsigned long count)
71{ 58{
72 unsigned char *p = addr; 59 unsigned char *p = addr;
73 while (count--) *p++ = sh_edosk7705_inb(port);
74}
75 60
76void sh_edosk7705_insl(unsigned long port, void *addr, unsigned long count)
77{
78 unsigned long *p = (unsigned long*)addr;
79 while (count--) 61 while (count--)
80 *p++ = *(volatile unsigned long *)port; 62 *p++ = sh_edosk7705_inb(port);
81} 63}
82 64
83void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count) 65void sh_edosk7705_outsb(unsigned long port, const void *addr, unsigned long count)
84{ 66{
85 unsigned char *p = (unsigned char*)addr; 67 unsigned char *p = (unsigned char *)addr;
86 while (count--) sh_edosk7705_outb(*p++, port);
87}
88 68
89void sh_edosk7705_outsl(unsigned long port, const void *addr, unsigned long count) 69 while (count--)
90{ 70 sh_edosk7705_outb(*p++, port);
91 unsigned long *p = (unsigned long*)addr;
92 while (count--) sh_edosk7705_outl(*p++, port);
93} 71}
94
diff --git a/arch/sh/boards/mach-edosk7705/setup.c b/arch/sh/boards/mach-edosk7705/setup.c
index ab3f47bffdf3..d59225e26fb9 100644
--- a/arch/sh/boards/mach-edosk7705/setup.c
+++ b/arch/sh/boards/mach-edosk7705/setup.c
@@ -9,6 +9,7 @@
9 * board by S. Dunn, 2003. 9 * board by S. Dunn, 2003.
10 */ 10 */
11#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/irq.h>
12#include <asm/machvec.h> 13#include <asm/machvec.h>
13#include <mach/edosk7705.h> 14#include <mach/edosk7705.h>
14 15
@@ -26,18 +27,10 @@ static struct sh_machine_vector mv_edosk7705 __initmv = {
26 .mv_nr_irqs = 80, 27 .mv_nr_irqs = 80,
27 28
28 .mv_inb = sh_edosk7705_inb, 29 .mv_inb = sh_edosk7705_inb,
29 .mv_inl = sh_edosk7705_inl,
30 .mv_outb = sh_edosk7705_outb, 30 .mv_outb = sh_edosk7705_outb,
31 .mv_outl = sh_edosk7705_outl,
32
33 .mv_inl_p = sh_edosk7705_inl,
34 .mv_outl_p = sh_edosk7705_outl,
35 31
36 .mv_insb = sh_edosk7705_insb, 32 .mv_insb = sh_edosk7705_insb,
37 .mv_insl = sh_edosk7705_insl,
38 .mv_outsb = sh_edosk7705_outsb, 33 .mv_outsb = sh_edosk7705_outsb,
39 .mv_outsl = sh_edosk7705_outsl,
40 34
41 .mv_isa_port2addr = sh_edosk7705_isa_port2addr,
42 .mv_init_irq = sh_edosk7705_init_irq, 35 .mv_init_irq = sh_edosk7705_init_irq,
43}; 36};
diff --git a/arch/sh/boards/mach-hp6xx/pm.c b/arch/sh/boards/mach-hp6xx/pm.c
index 64af1f2eef05..d936c1af7620 100644
--- a/arch/sh/boards/mach-hp6xx/pm.c
+++ b/arch/sh/boards/mach-hp6xx/pm.c
@@ -10,15 +10,91 @@
10#include <linux/suspend.h> 10#include <linux/suspend.h>
11#include <linux/errno.h> 11#include <linux/errno.h>
12#include <linux/time.h> 12#include <linux/time.h>
13#include <linux/delay.h>
14#include <linux/gfp.h>
13#include <asm/io.h> 15#include <asm/io.h>
14#include <asm/hd64461.h> 16#include <asm/hd64461.h>
15#include <mach/hp6xx.h> 17#include <mach/hp6xx.h>
16#include <cpu/dac.h> 18#include <cpu/dac.h>
17#include <asm/pm.h> 19#include <asm/freq.h>
20#include <asm/watchdog.h>
21
22#define INTR_OFFSET 0x600
18 23
19#define STBCR 0xffffff82 24#define STBCR 0xffffff82
20#define STBCR2 0xffffff88 25#define STBCR2 0xffffff88
21 26
27#define STBCR_STBY 0x80
28#define STBCR_MSTP2 0x04
29
30#define MCR 0xffffff68
31#define RTCNT 0xffffff70
32
33#define MCR_RMODE 2
34#define MCR_RFSH 4
35
36extern u8 wakeup_start;
37extern u8 wakeup_end;
38
39static void pm_enter(void)
40{
41 u8 stbcr, csr;
42 u16 frqcr, mcr;
43 u32 vbr_new, vbr_old;
44
45 set_bl_bit();
46
47 /* set wdt */
48 csr = sh_wdt_read_csr();
49 csr &= ~WTCSR_TME;
50 csr |= WTCSR_CKS_4096;
51 sh_wdt_write_csr(csr);
52 csr = sh_wdt_read_csr();
53 sh_wdt_write_cnt(0);
54
55 /* disable PLL1 */
56 frqcr = ctrl_inw(FRQCR);
57 frqcr &= ~(FRQCR_PLLEN | FRQCR_PSTBY);
58 ctrl_outw(frqcr, FRQCR);
59
60 /* enable standby */
61 stbcr = ctrl_inb(STBCR);
62 ctrl_outb(stbcr | STBCR_STBY | STBCR_MSTP2, STBCR);
63
64 /* set self-refresh */
65 mcr = ctrl_inw(MCR);
66 ctrl_outw(mcr & ~MCR_RFSH, MCR);
67
68 /* set interrupt handler */
69 asm volatile("stc vbr, %0" : "=r" (vbr_old));
70 vbr_new = get_zeroed_page(GFP_ATOMIC);
71 udelay(50);
72 memcpy((void*)(vbr_new + INTR_OFFSET),
73 &wakeup_start, &wakeup_end - &wakeup_start);
74 asm volatile("ldc %0, vbr" : : "r" (vbr_new));
75
76 ctrl_outw(0, RTCNT);
77 ctrl_outw(mcr | MCR_RFSH | MCR_RMODE, MCR);
78
79 cpu_sleep();
80
81 asm volatile("ldc %0, vbr" : : "r" (vbr_old));
82
83 free_page(vbr_new);
84
85 /* enable PLL1 */
86 frqcr = ctrl_inw(FRQCR);
87 frqcr |= FRQCR_PSTBY;
88 ctrl_outw(frqcr, FRQCR);
89 udelay(50);
90 frqcr |= FRQCR_PLLEN;
91 ctrl_outw(frqcr, FRQCR);
92
93 ctrl_outb(stbcr, STBCR);
94
95 clear_bl_bit();
96}
97
22static int hp6x0_pm_enter(suspend_state_t state) 98static int hp6x0_pm_enter(suspend_state_t state)
23{ 99{
24 u8 stbcr, stbcr2; 100 u8 stbcr, stbcr2;
diff --git a/arch/sh/boards/mach-microdev/Makefile b/arch/sh/boards/mach-microdev/Makefile
index 1387dd6c85eb..4e3588e8806b 100644
--- a/arch/sh/boards/mach-microdev/Makefile
+++ b/arch/sh/boards/mach-microdev/Makefile
@@ -2,7 +2,4 @@
2# Makefile for the SuperH MicroDev specific parts of the kernel 2# Makefile for the SuperH MicroDev specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o irq.o io.o 5obj-y := setup.o irq.o io.o fdc37c93xapm.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
8
diff --git a/arch/sh/boards/mach-microdev/fdc37c93xapm.c b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
new file mode 100644
index 000000000000..458a7cf5fb46
--- /dev/null
+++ b/arch/sh/boards/mach-microdev/fdc37c93xapm.c
@@ -0,0 +1,160 @@
1/*
2 *
3 * Setup for the SMSC FDC37C93xAPM
4 *
5 * Copyright (C) 2003 Sean McGoogan (Sean.McGoogan@superh.com)
6 * Copyright (C) 2003, 2004 SuperH, Inc.
7 * Copyright (C) 2004, 2005 Paul Mundt
8 *
9 * SuperH SH4-202 MicroDev board support.
10 *
11 * May be copied or modified under the terms of the GNU General Public
12 * License. See linux/COPYING for more information.
13 */
14#include <linux/init.h>
15#include <linux/ioport.h>
16#include <linux/io.h>
17#include <linux/err.h>
18#include <mach/microdev.h>
19
20#define SMSC_CONFIG_PORT_ADDR (0x3F0)
21#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
22#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1)
23
24#define SMSC_ENTER_CONFIG_KEY 0x55
25#define SMSC_EXIT_CONFIG_KEY 0xaa
26
27#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */
28#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */
29#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */
30#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */
31#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */
32#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
33#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */
34#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */
35#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */
36#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */
37
38#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
39#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
40#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
41#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */
42#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */
43#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */
44#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */
45
46#define SMSC_READ_INDEXED(index) ({ \
47 outb((index), SMSC_INDEX_PORT_ADDR); \
48 inb(SMSC_DATA_PORT_ADDR); })
49#define SMSC_WRITE_INDEXED(val, index) ({ \
50 outb((index), SMSC_INDEX_PORT_ADDR); \
51 outb((val), SMSC_DATA_PORT_ADDR); })
52
53#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
54#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
55#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
56#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
57
58#define SERIAL1_PRIMARY_BASE 0x03f8
59#define SERIAL2_PRIMARY_BASE 0x02f8
60
61#define MSB(x) ( (x) >> 8 )
62#define LSB(x) ( (x) & 0xff )
63
64 /* General-Purpose base address on CPU-board FPGA */
65#define MICRODEV_FPGA_GP_BASE 0xa6100000ul
66
67static int __init smsc_superio_setup(void)
68{
69
70 unsigned char devid, devrev;
71
72 /* Initially the chip is in run state */
73 /* Put it into configuration state */
74 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
75
76 /* Read device ID info */
77 devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
78 devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
79
80 if ((devid == 0x30) && (devrev == 0x01))
81 printk("SMSC FDC37C93xAPM SuperIO device detected\n");
82 else
83 return -ENODEV;
84
85 /* Select the keyboard device */
86 SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
87 /* enable it */
88 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
89 /* enable the interrupts */
90 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
91 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
92
93 /* Select the Serial #1 device */
94 SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
95 /* enable it */
96 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
97 /* program with port addresses */
98 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
99 SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
100 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
101 /* enable the interrupts */
102 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
103
104 /* Select the Serial #2 device */
105 SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
106 /* enable it */
107 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
108 /* program with port addresses */
109 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
110 SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
111 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
112 /* enable the interrupts */
113 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
114
115 /* Select the IDE#1 device */
116 SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
117 /* enable it */
118 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
119 /* program with port addresses */
120 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
121 SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
122 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
123 SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
124 SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
125 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
126 /* select the interrupt */
127 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
128
129 /* Select the IDE#2 device */
130 SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
131 /* enable it */
132 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
133 /* program with port addresses */
134 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
135 SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
136 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
137 SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
138 /* select the interrupt */
139 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
140
141 /* Select the configuration registers */
142 SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
143 /* enable the appropriate GPIO pins for IDE functionality:
144 * bit[0] In/Out 1==input; 0==output
145 * bit[1] Polarity 1==invert; 0==no invert
146 * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable
147 * bit[3:4] Function Select 00==original; 01==Alternate Function #1
148 */
149 SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
150 SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
151 SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
152 SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
153 SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
154
155 /* Exit the configuration state */
156 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
157
158 return 0;
159}
160device_initcall(smsc_superio_setup);
diff --git a/arch/sh/boards/mach-microdev/irq.c b/arch/sh/boards/mach-microdev/irq.c
index 702753cbd28f..b551963579c1 100644
--- a/arch/sh/boards/mach-microdev/irq.c
+++ b/arch/sh/boards/mach-microdev/irq.c
@@ -67,27 +67,13 @@ static const struct {
67 67
68static void enable_microdev_irq(unsigned int irq); 68static void enable_microdev_irq(unsigned int irq);
69static void disable_microdev_irq(unsigned int irq); 69static void disable_microdev_irq(unsigned int irq);
70
71 /* shutdown is same as "disable" */
72#define shutdown_microdev_irq disable_microdev_irq
73
74static void mask_and_ack_microdev(unsigned int); 70static void mask_and_ack_microdev(unsigned int);
75static void end_microdev_irq(unsigned int irq);
76
77static unsigned int startup_microdev_irq(unsigned int irq)
78{
79 enable_microdev_irq(irq);
80 return 0; /* never anything pending */
81}
82 71
83static struct hw_interrupt_type microdev_irq_type = { 72static struct irq_chip microdev_irq_type = {
84 .typename = "MicroDev-IRQ", 73 .name = "MicroDev-IRQ",
85 .startup = startup_microdev_irq, 74 .unmask = enable_microdev_irq,
86 .shutdown = shutdown_microdev_irq, 75 .mask = disable_microdev_irq,
87 .enable = enable_microdev_irq,
88 .disable = disable_microdev_irq,
89 .ack = mask_and_ack_microdev, 76 .ack = mask_and_ack_microdev,
90 .end = end_microdev_irq
91}; 77};
92 78
93static void disable_microdev_irq(unsigned int irq) 79static void disable_microdev_irq(unsigned int irq)
@@ -130,11 +116,11 @@ static void enable_microdev_irq(unsigned int irq)
130 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 116 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
131} 117}
132 118
133 /* This functions sets the desired irq handler to be a MicroDev type */ 119/* This function sets the desired irq handler to be a MicroDev type */
134static void __init make_microdev_irq(unsigned int irq) 120static void __init make_microdev_irq(unsigned int irq)
135{ 121{
136 disable_irq_nosync(irq); 122 disable_irq_nosync(irq);
137 irq_desc[irq].chip = &microdev_irq_type; 123 set_irq_chip_and_handler(irq, &microdev_irq_type, handle_level_irq);
138 disable_microdev_irq(irq); 124 disable_microdev_irq(irq);
139} 125}
140 126
@@ -143,17 +129,11 @@ static void mask_and_ack_microdev(unsigned int irq)
143 disable_microdev_irq(irq); 129 disable_microdev_irq(irq);
144} 130}
145 131
146static void end_microdev_irq(unsigned int irq)
147{
148 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
149 enable_microdev_irq(irq);
150}
151
152extern void __init init_microdev_irq(void) 132extern void __init init_microdev_irq(void)
153{ 133{
154 int i; 134 int i;
155 135
156 /* disable interrupts on the FPGA INTC register */ 136 /* disable interrupts on the FPGA INTC register */
157 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 137 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
158 138
159 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 139 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
@@ -179,5 +159,3 @@ extern void microdev_print_fpga_intc_status(void)
179 printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria); 159 printk("FPGA_INTPRI[3..0] = %08x:%08x:%08x:%08x\n", *intprid, *intpric, *intprib, *intpria);
180 printk("-------------------------------------------------------------------------------\n"); 160 printk("-------------------------------------------------------------------------------\n");
181} 161}
182
183
diff --git a/arch/sh/boards/mach-microdev/led.c b/arch/sh/boards/mach-microdev/led.c
deleted file mode 100644
index 36e54b47a752..000000000000
--- a/arch/sh/boards/mach-microdev/led.c
+++ /dev/null
@@ -1,101 +0,0 @@
1/*
2 * linux/arch/sh/boards/superh/microdev/led.c
3 *
4 * Copyright (C) 2002 Stuart Menefy <stuart.menefy@st.com>
5 * Copyright (C) 2003 Richard Curnow (Richard.Curnow@superh.com)
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 *
10 */
11
12#include <asm/io.h>
13
14#define LED_REGISTER 0xa6104d20
15
16static void mach_led_d9(int value)
17{
18 unsigned long reg;
19 reg = ctrl_inl(LED_REGISTER);
20 reg &= ~1;
21 reg |= (value & 1);
22 ctrl_outl(reg, LED_REGISTER);
23 return;
24}
25
26static void mach_led_d10(int value)
27{
28 unsigned long reg;
29 reg = ctrl_inl(LED_REGISTER);
30 reg &= ~2;
31 reg |= ((value & 1) << 1);
32 ctrl_outl(reg, LED_REGISTER);
33 return;
34}
35
36
37#ifdef CONFIG_HEARTBEAT
38#include <linux/sched.h>
39
40static unsigned char banner_table[] = {
41 0x11, 0x01, 0x11, 0x01, 0x11, 0x03,
42 0x11, 0x01, 0x11, 0x01, 0x13, 0x03,
43 0x11, 0x01, 0x13, 0x01, 0x13, 0x01, 0x11, 0x03,
44 0x11, 0x03,
45 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
46 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x11, 0x07,
47 0x13, 0x01, 0x13, 0x03,
48 0x11, 0x01, 0x11, 0x03,
49 0x13, 0x01, 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
50 0x11, 0x01, 0x13, 0x01, 0x11, 0x03,
51 0x13, 0x01, 0x13, 0x01, 0x13, 0x03,
52 0x13, 0x01, 0x11, 0x01, 0x11, 0x03,
53 0x11, 0x03,
54 0x11, 0x01, 0x11, 0x01, 0x11, 0x01, 0x13, 0x07,
55 0xff
56};
57
58static void banner(void)
59{
60 static int pos = 0;
61 static int count = 0;
62
63 if (count) {
64 count--;
65 } else {
66 int val = banner_table[pos];
67 if (val == 0xff) {
68 pos = 0;
69 val = banner_table[pos];
70 }
71 pos++;
72 mach_led_d10((val >> 4) & 1);
73 count = 10 * (val & 0xf);
74 }
75}
76
77/* From heartbeat_harp in the stboards directory */
78/* acts like an actual heart beat -- ie thump-thump-pause... */
79void microdev_heartbeat(void)
80{
81 static unsigned cnt = 0, period = 0, dist = 0;
82
83 if (cnt == 0 || cnt == dist)
84 mach_led_d9(1);
85 else if (cnt == 7 || cnt == dist+7)
86 mach_led_d9(0);
87
88 if (++cnt > period) {
89 cnt = 0;
90 /* The hyperbolic function below modifies the heartbeat period
91 * length in dependency of the current (5min) load. It goes
92 * through the points f(0)=126, f(1)=86, f(5)=51,
93 * f(inf)->30. */
94 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
95 dist = period / 4;
96 }
97
98 banner();
99}
100
101#endif
diff --git a/arch/sh/boards/mach-microdev/setup.c b/arch/sh/boards/mach-microdev/setup.c
index a9202fe3cb59..d1df2a4fb9b8 100644
--- a/arch/sh/boards/mach-microdev/setup.c
+++ b/arch/sh/boards/mach-microdev/setup.c
@@ -17,70 +17,12 @@
17#include <mach/microdev.h> 17#include <mach/microdev.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/machvec.h> 19#include <asm/machvec.h>
20 20#include <asm/sizes.h>
21extern void microdev_heartbeat(void);
22
23
24/****************************************************************************/
25
26
27 /*
28 * Setup for the SMSC FDC37C93xAPM
29 */
30#define SMSC_CONFIG_PORT_ADDR (0x3F0)
31#define SMSC_INDEX_PORT_ADDR SMSC_CONFIG_PORT_ADDR
32#define SMSC_DATA_PORT_ADDR (SMSC_INDEX_PORT_ADDR + 1)
33
34#define SMSC_ENTER_CONFIG_KEY 0x55
35#define SMSC_EXIT_CONFIG_KEY 0xaa
36
37#define SMCS_LOGICAL_DEV_INDEX 0x07 /* Logical Device Number */
38#define SMSC_DEVICE_ID_INDEX 0x20 /* Device ID */
39#define SMSC_DEVICE_REV_INDEX 0x21 /* Device Revision */
40#define SMSC_ACTIVATE_INDEX 0x30 /* Activate */
41#define SMSC_PRIMARY_BASE_INDEX 0x60 /* Primary Base Address */
42#define SMSC_SECONDARY_BASE_INDEX 0x62 /* Secondary Base Address */
43#define SMSC_PRIMARY_INT_INDEX 0x70 /* Primary Interrupt Select */
44#define SMSC_SECONDARY_INT_INDEX 0x72 /* Secondary Interrupt Select */
45#define SMSC_HDCS0_INDEX 0xf0 /* HDCS0 Address Decoder */
46#define SMSC_HDCS1_INDEX 0xf1 /* HDCS1 Address Decoder */
47
48#define SMSC_IDE1_DEVICE 1 /* IDE #1 logical device */
49#define SMSC_IDE2_DEVICE 2 /* IDE #2 logical device */
50#define SMSC_PARALLEL_DEVICE 3 /* Parallel Port logical device */
51#define SMSC_SERIAL1_DEVICE 4 /* Serial #1 logical device */
52#define SMSC_SERIAL2_DEVICE 5 /* Serial #2 logical device */
53#define SMSC_KEYBOARD_DEVICE 7 /* Keyboard logical device */
54#define SMSC_CONFIG_REGISTERS 8 /* Configuration Registers (Aux I/O) */
55
56#define SMSC_READ_INDEXED(index) ({ \
57 outb((index), SMSC_INDEX_PORT_ADDR); \
58 inb(SMSC_DATA_PORT_ADDR); })
59#define SMSC_WRITE_INDEXED(val, index) ({ \
60 outb((index), SMSC_INDEX_PORT_ADDR); \
61 outb((val), SMSC_DATA_PORT_ADDR); })
62
63#define IDE1_PRIMARY_BASE 0x01f0 /* Task File Registe base for IDE #1 */
64#define IDE1_SECONDARY_BASE 0x03f6 /* Miscellaneous AT registers for IDE #1 */
65#define IDE2_PRIMARY_BASE 0x0170 /* Task File Registe base for IDE #2 */
66#define IDE2_SECONDARY_BASE 0x0376 /* Miscellaneous AT registers for IDE #2 */
67
68#define SERIAL1_PRIMARY_BASE 0x03f8
69#define SERIAL2_PRIMARY_BASE 0x02f8
70
71#define MSB(x) ( (x) >> 8 )
72#define LSB(x) ( (x) & 0xff )
73
74 /* General-Purpose base address on CPU-board FPGA */
75#define MICRODEV_FPGA_GP_BASE 0xa6100000ul
76
77 /* assume a Keyboard Controller is present */
78int microdev_kbd_controller_present = 1;
79 21
80static struct resource smc91x_resources[] = { 22static struct resource smc91x_resources[] = {
81 [0] = { 23 [0] = {
82 .start = 0x300, 24 .start = 0x300,
83 .end = 0x300 + 0x0001000 - 1, 25 .end = 0x300 + SZ_4K - 1,
84 .flags = IORESOURCE_MEM, 26 .flags = IORESOURCE_MEM,
85 }, 27 },
86 [1] = { 28 [1] = {
@@ -97,7 +39,6 @@ static struct platform_device smc91x_device = {
97 .resource = smc91x_resources, 39 .resource = smc91x_resources,
98}; 40};
99 41
100#ifdef CONFIG_FB_S1D13XXX
101static struct s1d13xxxfb_regval s1d13806_initregs[] = { 42static struct s1d13xxxfb_regval s1d13806_initregs[] = {
102 { S1DREG_MISC, 0x00 }, 43 { S1DREG_MISC, 0x00 },
103 { S1DREG_COM_DISP_MODE, 0x00 }, 44 { S1DREG_COM_DISP_MODE, 0x00 },
@@ -216,12 +157,12 @@ static struct s1d13xxxfb_pdata s1d13806_platform_data = {
216static struct resource s1d13806_resources[] = { 157static struct resource s1d13806_resources[] = {
217 [0] = { 158 [0] = {
218 .start = 0x07200000, 159 .start = 0x07200000,
219 .end = 0x07200000 + 0x00200000 - 1, 160 .end = 0x07200000 + SZ_2M - 1,
220 .flags = IORESOURCE_MEM, 161 .flags = IORESOURCE_MEM,
221 }, 162 },
222 [1] = { 163 [1] = {
223 .start = 0x07000000, 164 .start = 0x07000000,
224 .end = 0x07000000 + 0x00200000 - 1, 165 .end = 0x07000000 + SZ_2M - 1,
225 .flags = IORESOURCE_MEM, 166 .flags = IORESOURCE_MEM,
226 }, 167 },
227}; 168};
@@ -236,145 +177,24 @@ static struct platform_device s1d13806_device = {
236 .platform_data = &s1d13806_platform_data, 177 .platform_data = &s1d13806_platform_data,
237 }, 178 },
238}; 179};
239#endif
240 180
241static struct platform_device *microdev_devices[] __initdata = { 181static struct platform_device *microdev_devices[] __initdata = {
242 &smc91x_device, 182 &smc91x_device,
243#ifdef CONFIG_FB_S1D13XXX
244 &s1d13806_device, 183 &s1d13806_device,
245#endif
246}; 184};
247 185
248static int __init microdev_devices_setup(void) 186static int __init microdev_devices_setup(void)
249{ 187{
250 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); 188 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
251} 189}
252 190device_initcall(microdev_devices_setup);
253/*
254 * Setup for the SMSC FDC37C93xAPM
255 */
256static int __init smsc_superio_setup(void)
257{
258
259 unsigned char devid, devrev;
260
261 /* Initially the chip is in run state */
262 /* Put it into configuration state */
263 outb(SMSC_ENTER_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
264
265 /* Read device ID info */
266 devid = SMSC_READ_INDEXED(SMSC_DEVICE_ID_INDEX);
267 devrev = SMSC_READ_INDEXED(SMSC_DEVICE_REV_INDEX);
268 if ( (devid==0x30) && (devrev==0x01) )
269 {
270 printk("SMSC FDC37C93xAPM SuperIO device detected\n");
271 }
272 else
273 { /* not the device identity we expected */
274 printk("Not detected a SMSC FDC37C93xAPM SuperIO device (devid=0x%02x, rev=0x%02x)\n",
275 devid, devrev);
276 /* inform the keyboard driver that we have no keyboard controller */
277 microdev_kbd_controller_present = 0;
278 /* little point in doing anything else in this functon */
279 return 0;
280 }
281
282 /* Select the keyboard device */
283 SMSC_WRITE_INDEXED(SMSC_KEYBOARD_DEVICE, SMCS_LOGICAL_DEV_INDEX);
284 /* enable it */
285 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
286 /* enable the interrupts */
287 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_KEYBOARD, SMSC_PRIMARY_INT_INDEX);
288 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_MOUSE, SMSC_SECONDARY_INT_INDEX);
289
290 /* Select the Serial #1 device */
291 SMSC_WRITE_INDEXED(SMSC_SERIAL1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
292 /* enable it */
293 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
294 /* program with port addresses */
295 SMSC_WRITE_INDEXED(MSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
296 SMSC_WRITE_INDEXED(LSB(SERIAL1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
297 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
298 /* enable the interrupts */
299 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL1, SMSC_PRIMARY_INT_INDEX);
300
301 /* Select the Serial #2 device */
302 SMSC_WRITE_INDEXED(SMSC_SERIAL2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
303 /* enable it */
304 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
305 /* program with port addresses */
306 SMSC_WRITE_INDEXED(MSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
307 SMSC_WRITE_INDEXED(LSB(SERIAL2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
308 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS0_INDEX);
309 /* enable the interrupts */
310 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_SERIAL2, SMSC_PRIMARY_INT_INDEX);
311
312 /* Select the IDE#1 device */
313 SMSC_WRITE_INDEXED(SMSC_IDE1_DEVICE, SMCS_LOGICAL_DEV_INDEX);
314 /* enable it */
315 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
316 /* program with port addresses */
317 SMSC_WRITE_INDEXED(MSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
318 SMSC_WRITE_INDEXED(LSB(IDE1_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
319 SMSC_WRITE_INDEXED(MSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
320 SMSC_WRITE_INDEXED(LSB(IDE1_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
321 SMSC_WRITE_INDEXED(0x0c, SMSC_HDCS0_INDEX);
322 SMSC_WRITE_INDEXED(0x00, SMSC_HDCS1_INDEX);
323 /* select the interrupt */
324 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE1, SMSC_PRIMARY_INT_INDEX);
325
326 /* Select the IDE#2 device */
327 SMSC_WRITE_INDEXED(SMSC_IDE2_DEVICE, SMCS_LOGICAL_DEV_INDEX);
328 /* enable it */
329 SMSC_WRITE_INDEXED(1, SMSC_ACTIVATE_INDEX);
330 /* program with port addresses */
331 SMSC_WRITE_INDEXED(MSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+0);
332 SMSC_WRITE_INDEXED(LSB(IDE2_PRIMARY_BASE), SMSC_PRIMARY_BASE_INDEX+1);
333 SMSC_WRITE_INDEXED(MSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+0);
334 SMSC_WRITE_INDEXED(LSB(IDE2_SECONDARY_BASE), SMSC_SECONDARY_BASE_INDEX+1);
335 /* select the interrupt */
336 SMSC_WRITE_INDEXED(MICRODEV_FPGA_IRQ_IDE2, SMSC_PRIMARY_INT_INDEX);
337
338 /* Select the configuration registers */
339 SMSC_WRITE_INDEXED(SMSC_CONFIG_REGISTERS, SMCS_LOGICAL_DEV_INDEX);
340 /* enable the appropriate GPIO pins for IDE functionality:
341 * bit[0] In/Out 1==input; 0==output
342 * bit[1] Polarity 1==invert; 0==no invert
343 * bit[2] Int Enb #1 1==Enable Combined IRQ #1; 0==disable
344 * bit[3:4] Function Select 00==original; 01==Alternate Function #1
345 */
346 SMSC_WRITE_INDEXED(0x00, 0xc2); /* GP42 = nIDE1_OE */
347 SMSC_WRITE_INDEXED(0x01, 0xc5); /* GP45 = IDE1_IRQ */
348 SMSC_WRITE_INDEXED(0x00, 0xc6); /* GP46 = nIOROP */
349 SMSC_WRITE_INDEXED(0x00, 0xc7); /* GP47 = nIOWOP */
350 SMSC_WRITE_INDEXED(0x08, 0xe8); /* GP20 = nIDE2_OE */
351
352 /* Exit the configuration state */
353 outb(SMSC_EXIT_CONFIG_KEY, SMSC_CONFIG_PORT_ADDR);
354
355 return 0;
356}
357
358static void __init microdev_setup(char **cmdline_p)
359{
360 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
361 const int fpgaRevision = *fpgaRevisionRegister;
362 int * const CacheControlRegister = (int*)CCR;
363
364 device_initcall(microdev_devices_setup);
365 device_initcall(smsc_superio_setup);
366
367 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
368 get_system_type(), fpgaRevision, *CacheControlRegister);
369}
370 191
371/* 192/*
372 * The Machine Vector 193 * The Machine Vector
373 */ 194 */
374static struct sh_machine_vector mv_sh4202_microdev __initmv = { 195static struct sh_machine_vector mv_sh4202_microdev __initmv = {
375 .mv_name = "SH4-202 MicroDev", 196 .mv_name = "SH4-202 MicroDev",
376 .mv_setup = microdev_setup, 197 .mv_nr_irqs = 72,
377 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
378 198
379 .mv_inb = microdev_inb, 199 .mv_inb = microdev_inb,
380 .mv_inw = microdev_inw, 200 .mv_inw = microdev_inw,
@@ -398,8 +218,4 @@ static struct sh_machine_vector mv_sh4202_microdev __initmv = {
398 .mv_outsl = microdev_outsl, 218 .mv_outsl = microdev_outsl,
399 219
400 .mv_init_irq = init_microdev_irq, 220 .mv_init_irq = init_microdev_irq,
401
402#ifdef CONFIG_HEARTBEAT
403 .mv_heartbeat = microdev_heartbeat,
404#endif
405}; 221};
diff --git a/arch/sh/boards/mach-migor/setup.c b/arch/sh/boards/mach-migor/setup.c
index 975281980299..cc1408119c24 100644
--- a/arch/sh/boards/mach-migor/setup.c
+++ b/arch/sh/boards/mach-migor/setup.c
@@ -89,6 +89,7 @@ static struct resource sh_keysc_resources[] = {
89 89
90static struct platform_device sh_keysc_device = { 90static struct platform_device sh_keysc_device = {
91 .name = "sh_keysc", 91 .name = "sh_keysc",
92 .id = 0, /* "keysc0" clock */
92 .num_resources = ARRAY_SIZE(sh_keysc_resources), 93 .num_resources = ARRAY_SIZE(sh_keysc_resources),
93 .resource = sh_keysc_resources, 94 .resource = sh_keysc_resources,
94 .dev = { 95 .dev = {
@@ -261,6 +262,8 @@ static struct sh_mobile_lcdc_info sh_mobile_lcdc_info = {
261 .sys_bus_cfg = { 262 .sys_bus_cfg = {
262 .ldmt2r = 0x06000a09, 263 .ldmt2r = 0x06000a09,
263 .ldmt3r = 0x180e3418, 264 .ldmt3r = 0x180e3418,
265 /* set 1s delay to encourage fsync() */
266 .deferred_io_msec = 1000,
264 }, 267 },
265 } 268 }
266#endif 269#endif
@@ -273,6 +276,10 @@ static struct resource migor_lcdc_resources[] = {
273 .end = 0xfe941fff, 276 .end = 0xfe941fff,
274 .flags = IORESOURCE_MEM, 277 .flags = IORESOURCE_MEM,
275 }, 278 },
279 [1] = {
280 .start = 28,
281 .flags = IORESOURCE_IRQ,
282 },
276}; 283};
277 284
278static struct platform_device migor_lcdc_device = { 285static struct platform_device migor_lcdc_device = {
@@ -300,6 +307,7 @@ static void camera_power_on(void)
300 gpio_set_value(GPIO_PTT3, 0); 307 gpio_set_value(GPIO_PTT3, 0);
301 mdelay(10); 308 mdelay(10);
302 gpio_set_value(GPIO_PTT3, 1); 309 gpio_set_value(GPIO_PTT3, 1);
310 mdelay(10); /* wait to let chip come out of reset */
303} 311}
304 312
305static void camera_power_off(void) 313static void camera_power_off(void)
@@ -432,6 +440,7 @@ static struct resource migor_ceu_resources[] = {
432 440
433static struct platform_device migor_ceu_device = { 441static struct platform_device migor_ceu_device = {
434 .name = "sh_mobile_ceu", 442 .name = "sh_mobile_ceu",
443 .id = 0, /* "ceu0" clock */
435 .num_resources = ARRAY_SIZE(migor_ceu_resources), 444 .num_resources = ARRAY_SIZE(migor_ceu_resources),
436 .resource = migor_ceu_resources, 445 .resource = migor_ceu_resources,
437 .dev = { 446 .dev = {
@@ -479,7 +488,6 @@ static int __init migor_devices_setup(void)
479 ctrl_outl(0x00110080, BSC_CS4WCR); 488 ctrl_outl(0x00110080, BSC_CS4WCR);
480 489
481 /* KEYSC */ 490 /* KEYSC */
482 clk_always_enable("mstp214"); /* KEYSC */
483 gpio_request(GPIO_FN_KEYOUT0, NULL); 491 gpio_request(GPIO_FN_KEYOUT0, NULL);
484 gpio_request(GPIO_FN_KEYOUT1, NULL); 492 gpio_request(GPIO_FN_KEYOUT1, NULL);
485 gpio_request(GPIO_FN_KEYOUT2, NULL); 493 gpio_request(GPIO_FN_KEYOUT2, NULL);
@@ -501,7 +509,6 @@ static int __init migor_devices_setup(void)
501 gpio_request(GPIO_FN_IRQ6, NULL); 509 gpio_request(GPIO_FN_IRQ6, NULL);
502 510
503 /* LCD Panel */ 511 /* LCD Panel */
504 clk_always_enable("mstp200"); /* LCDC */
505#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */ 512#ifdef CONFIG_SH_MIGOR_QVGA /* LCDC - QVGA - Enable SYS Interface signals */
506 gpio_request(GPIO_FN_LCDD17, NULL); 513 gpio_request(GPIO_FN_LCDD17, NULL);
507 gpio_request(GPIO_FN_LCDD16, NULL); 514 gpio_request(GPIO_FN_LCDD16, NULL);
@@ -554,7 +561,6 @@ static int __init migor_devices_setup(void)
554#endif 561#endif
555 562
556 /* CEU */ 563 /* CEU */
557 clk_always_enable("mstp203"); /* CEU */
558 gpio_request(GPIO_FN_VIO_CLK2, NULL); 564 gpio_request(GPIO_FN_VIO_CLK2, NULL);
559 gpio_request(GPIO_FN_VIO_VD2, NULL); 565 gpio_request(GPIO_FN_VIO_VD2, NULL);
560 gpio_request(GPIO_FN_VIO_HD2, NULL); 566 gpio_request(GPIO_FN_VIO_HD2, NULL);
@@ -589,12 +595,3 @@ static int __init migor_devices_setup(void)
589 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices)); 595 return platform_add_devices(migor_devices, ARRAY_SIZE(migor_devices));
590} 596}
591__initcall(migor_devices_setup); 597__initcall(migor_devices_setup);
592
593static void __init migor_setup(char **cmdline_p)
594{
595}
596
597static struct sh_machine_vector mv_migor __initmv = {
598 .mv_name = "Migo-R",
599 .mv_setup = migor_setup,
600};
diff --git a/arch/sh/boards/mach-rsk/Kconfig b/arch/sh/boards/mach-rsk/Kconfig
new file mode 100644
index 000000000000..bff095dffc02
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Kconfig
@@ -0,0 +1,18 @@
1if SH_RSK
2
3choice
4 prompt "RSK+ options"
5 default SH_RSK7203
6
7config SH_RSK7201
8 bool "RSK7201"
9 depends on CPU_SUBTYPE_SH7201
10
11config SH_RSK7203
12 bool "RSK7203"
13 select GENERIC_GPIO
14 depends on CPU_SUBTYPE_SH7203
15
16endchoice
17
18endif
diff --git a/arch/sh/boards/mach-rsk/Makefile b/arch/sh/boards/mach-rsk/Makefile
new file mode 100644
index 000000000000..498da75ce38b
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o
2obj-$(CONFIG_SH_RSK7203) += devices-rsk7203.o
diff --git a/arch/sh/boards/board-rsk7203.c b/arch/sh/boards/mach-rsk/devices-rsk7203.c
index 58266f06134a..73f743b9be8d 100644
--- a/arch/sh/boards/board-rsk7203.c
+++ b/arch/sh/boards/mach-rsk/devices-rsk7203.c
@@ -50,73 +50,6 @@ static struct platform_device smc911x_device = {
50 }, 50 },
51}; 51};
52 52
53static const char *probes[] = { "cmdlinepart", NULL };
54
55static struct mtd_partition *parsed_partitions;
56
57static struct mtd_partition rsk7203_partitions[] = {
58 {
59 .name = "Bootloader",
60 .offset = 0x00000000,
61 .size = 0x00040000,
62 .mask_flags = MTD_WRITEABLE,
63 }, {
64 .name = "Kernel",
65 .offset = MTDPART_OFS_NXTBLK,
66 .size = 0x001c0000,
67 }, {
68 .name = "Flash_FS",
69 .offset = MTDPART_OFS_NXTBLK,
70 .size = MTDPART_SIZ_FULL,
71 }
72};
73
74static struct physmap_flash_data flash_data = {
75 .width = 2,
76};
77
78static struct resource flash_resource = {
79 .start = 0x20000000,
80 .end = 0x20400000,
81 .flags = IORESOURCE_MEM,
82};
83
84static struct platform_device flash_device = {
85 .name = "physmap-flash",
86 .id = -1,
87 .resource = &flash_resource,
88 .num_resources = 1,
89 .dev = {
90 .platform_data = &flash_data,
91 },
92};
93
94static struct mtd_info *flash_mtd;
95
96static struct map_info rsk7203_flash_map = {
97 .name = "RSK+ Flash",
98 .size = 0x400000,
99 .bankwidth = 2,
100};
101
102static void __init set_mtd_partitions(void)
103{
104 int nr_parts = 0;
105
106 simple_map_init(&rsk7203_flash_map);
107 flash_mtd = do_map_probe("cfi_probe", &rsk7203_flash_map);
108 nr_parts = parse_mtd_partitions(flash_mtd, probes,
109 &parsed_partitions, 0);
110 /* If there is no partition table, used the hard coded table */
111 if (nr_parts <= 0) {
112 flash_data.parts = rsk7203_partitions;
113 flash_data.nr_parts = ARRAY_SIZE(rsk7203_partitions);
114 } else {
115 flash_data.nr_parts = nr_parts;
116 flash_data.parts = parsed_partitions;
117 }
118}
119
120static struct gpio_led rsk7203_gpio_leds[] = { 53static struct gpio_led rsk7203_gpio_leds[] = {
121 { 54 {
122 .name = "green", 55 .name = "green",
@@ -155,7 +88,6 @@ static struct platform_device led_device = {
155 88
156static struct platform_device *rsk7203_devices[] __initdata = { 89static struct platform_device *rsk7203_devices[] __initdata = {
157 &smc911x_device, 90 &smc911x_device,
158 &flash_device,
159 &led_device, 91 &led_device,
160}; 92};
161 93
@@ -165,15 +97,7 @@ static int __init rsk7203_devices_setup(void)
165 gpio_request(GPIO_FN_TXD0, NULL); 97 gpio_request(GPIO_FN_TXD0, NULL);
166 gpio_request(GPIO_FN_RXD0, NULL); 98 gpio_request(GPIO_FN_RXD0, NULL);
167 99
168 set_mtd_partitions();
169 return platform_add_devices(rsk7203_devices, 100 return platform_add_devices(rsk7203_devices,
170 ARRAY_SIZE(rsk7203_devices)); 101 ARRAY_SIZE(rsk7203_devices));
171} 102}
172device_initcall(rsk7203_devices_setup); 103device_initcall(rsk7203_devices_setup);
173
174/*
175 * The Machine Vector
176 */
177static struct sh_machine_vector mv_rsk7203 __initmv = {
178 .mv_name = "RSK+7203",
179};
diff --git a/arch/sh/boards/mach-rsk/setup.c b/arch/sh/boards/mach-rsk/setup.c
new file mode 100644
index 000000000000..af64d030a5c7
--- /dev/null
+++ b/arch/sh/boards/mach-rsk/setup.c
@@ -0,0 +1,106 @@
1/*
2 * Renesas Technology Europe RSK+ Support.
3 *
4 * Copyright (C) 2008 Paul Mundt
5 * Copyright (C) 2008 Peter Griffin <pgriffin@mpc-data.co.uk>
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */
11#include <linux/init.h>
12#include <linux/types.h>
13#include <linux/platform_device.h>
14#include <linux/interrupt.h>
15#include <linux/mtd/mtd.h>
16#include <linux/mtd/partitions.h>
17#include <linux/mtd/physmap.h>
18#include <linux/mtd/map.h>
19#include <asm/machvec.h>
20#include <asm/io.h>
21
22static const char *probes[] = { "cmdlinepart", NULL };
23
24static struct mtd_partition *parsed_partitions;
25
26static struct mtd_partition rsk_partitions[] = {
27 {
28 .name = "Bootloader",
29 .offset = 0x00000000,
30 .size = 0x00040000,
31 .mask_flags = MTD_WRITEABLE,
32 }, {
33 .name = "Kernel",
34 .offset = MTDPART_OFS_NXTBLK,
35 .size = 0x001c0000,
36 }, {
37 .name = "Flash_FS",
38 .offset = MTDPART_OFS_NXTBLK,
39 .size = MTDPART_SIZ_FULL,
40 }
41};
42
43static struct physmap_flash_data flash_data = {
44 .width = 2,
45};
46
47static struct resource flash_resource = {
48 .start = 0x20000000,
49 .end = 0x20400000,
50 .flags = IORESOURCE_MEM,
51};
52
53static struct platform_device flash_device = {
54 .name = "physmap-flash",
55 .id = -1,
56 .resource = &flash_resource,
57 .num_resources = 1,
58 .dev = {
59 .platform_data = &flash_data,
60 },
61};
62
63static struct mtd_info *flash_mtd;
64
65static struct map_info rsk_flash_map = {
66 .name = "RSK+ Flash",
67 .size = 0x400000,
68 .bankwidth = 2,
69};
70
71static void __init set_mtd_partitions(void)
72{
73 int nr_parts = 0;
74
75 simple_map_init(&rsk_flash_map);
76 flash_mtd = do_map_probe("cfi_probe", &rsk_flash_map);
77 nr_parts = parse_mtd_partitions(flash_mtd, probes,
78 &parsed_partitions, 0);
79 /* If there is no partition table, used the hard coded table */
80 if (nr_parts <= 0) {
81 flash_data.parts = rsk_partitions;
82 flash_data.nr_parts = ARRAY_SIZE(rsk_partitions);
83 } else {
84 flash_data.nr_parts = nr_parts;
85 flash_data.parts = parsed_partitions;
86 }
87}
88
89static struct platform_device *rsk_devices[] __initdata = {
90 &flash_device,
91};
92
93static int __init rsk_devices_setup(void)
94{
95 set_mtd_partitions();
96 return platform_add_devices(rsk_devices,
97 ARRAY_SIZE(rsk_devices));
98}
99device_initcall(rsk_devices_setup);
100
101/*
102 * The Machine Vector
103 */
104static struct sh_machine_vector mv_rsk __initmv = {
105 .mv_name = "RSK+",
106};
diff --git a/arch/sh/boards/mach-se/7343/Makefile b/arch/sh/boards/mach-se/7343/Makefile
index 3024796c6203..4c3666a93790 100644
--- a/arch/sh/boards/mach-se/7343/Makefile
+++ b/arch/sh/boards/mach-se/7343/Makefile
@@ -2,4 +2,4 @@
2# Makefile for the 7343 SolutionEngine specific parts of the kernel 2# Makefile for the 7343 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := setup.o io.o irq.o 5obj-y := setup.o irq.o
diff --git a/arch/sh/boards/mach-se/7343/io.c b/arch/sh/boards/mach-se/7343/io.c
deleted file mode 100644
index 8741abc1da7b..000000000000
--- a/arch/sh/boards/mach-se/7343/io.c
+++ /dev/null
@@ -1,273 +0,0 @@
1/*
2 * arch/sh/boards/se/7343/io.c
3 *
4 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
5 *
6 */
7#include <linux/kernel.h>
8#include <asm/io.h>
9#include <mach-se/mach/se7343.h>
10
11#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
12
13struct iop {
14 unsigned long start, end;
15 unsigned long base;
16 struct iop *(*check) (struct iop * p, unsigned long port);
17 unsigned char (*inb) (struct iop * p, unsigned long port);
18 unsigned short (*inw) (struct iop * p, unsigned long port);
19 void (*outb) (struct iop * p, unsigned char value, unsigned long port);
20 void (*outw) (struct iop * p, unsigned short value, unsigned long port);
21};
22
23struct iop *
24simple_check(struct iop *p, unsigned long port)
25{
26 static int count;
27
28 if (count < 100)
29 count++;
30
31 port &= 0xFFFF;
32
33 if ((p->start <= port) && (port <= p->end))
34 return p;
35 else
36 badio(check, port);
37}
38
39struct iop *
40ide_check(struct iop *p, unsigned long port)
41{
42 if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
43 return p;
44 return NULL;
45}
46
47unsigned char
48simple_inb(struct iop *p, unsigned long port)
49{
50 return *(unsigned char *) (p->base + port);
51}
52
53unsigned short
54simple_inw(struct iop *p, unsigned long port)
55{
56 return *(unsigned short *) (p->base + port);
57}
58
59void
60simple_outb(struct iop *p, unsigned char value, unsigned long port)
61{
62 *(unsigned char *) (p->base + port) = value;
63}
64
65void
66simple_outw(struct iop *p, unsigned short value, unsigned long port)
67{
68 *(unsigned short *) (p->base + port) = value;
69}
70
71unsigned char
72pcc_inb(struct iop *p, unsigned long port)
73{
74 unsigned long addr = p->base + port + 0x40000;
75 unsigned long v;
76
77 if (port & 1)
78 addr += 0x00400000;
79 v = *(volatile unsigned char *) addr;
80 return v;
81}
82
83void
84pcc_outb(struct iop *p, unsigned char value, unsigned long port)
85{
86 unsigned long addr = p->base + port + 0x40000;
87
88 if (port & 1)
89 addr += 0x00400000;
90 *(volatile unsigned char *) addr = value;
91}
92
93unsigned char
94bad_inb(struct iop *p, unsigned long port)
95{
96 badio(inb, port);
97}
98
99void
100bad_outb(struct iop *p, unsigned char value, unsigned long port)
101{
102 badio(inw, port);
103}
104
105#ifdef CONFIG_SMC91X
106/* MSTLANEX01 LAN at 0xb400:0000 */
107static struct iop laniop = {
108 .start = 0x00,
109 .end = 0x0F,
110 .base = 0x04000000,
111 .check = simple_check,
112 .inb = simple_inb,
113 .inw = simple_inw,
114 .outb = simple_outb,
115 .outw = simple_outw,
116};
117#endif
118
119#ifdef CONFIG_NE2000
120/* NE2000 pc card NIC */
121static struct iop neiop = {
122 .start = 0x280,
123 .end = 0x29f,
124 .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
125 .check = simple_check,
126 .inb = pcc_inb,
127 .inw = simple_inw,
128 .outb = pcc_outb,
129 .outw = simple_outw,
130};
131#endif
132
133#ifdef CONFIG_IDE
134/* CF in CF slot */
135static struct iop cfiop = {
136 .base = 0xb0600000,
137 .check = ide_check,
138 .inb = pcc_inb,
139 .inw = simple_inw,
140 .outb = pcc_outb,
141 .outw = simple_outw,
142};
143#endif
144
145static __inline__ struct iop *
146port2iop(unsigned long port)
147{
148 if (0) ;
149#if defined(CONFIG_SMC91X)
150 else if (laniop.check(&laniop, port))
151 return &laniop;
152#endif
153#if defined(CONFIG_NE2000)
154 else if (neiop.check(&neiop, port))
155 return &neiop;
156#endif
157#if defined(CONFIG_IDE)
158 else if (cfiop.check(&cfiop, port))
159 return &cfiop;
160#endif
161 else
162 return NULL;
163}
164
165static inline void
166delay(void)
167{
168 ctrl_inw(0xac000000);
169 ctrl_inw(0xac000000);
170}
171
172unsigned char
173sh7343se_inb(unsigned long port)
174{
175 struct iop *p = port2iop(port);
176 return (p->inb) (p, port);
177}
178
179unsigned char
180sh7343se_inb_p(unsigned long port)
181{
182 unsigned char v = sh7343se_inb(port);
183 delay();
184 return v;
185}
186
187unsigned short
188sh7343se_inw(unsigned long port)
189{
190 struct iop *p = port2iop(port);
191 return (p->inw) (p, port);
192}
193
194unsigned int
195sh7343se_inl(unsigned long port)
196{
197 badio(inl, port);
198}
199
200void
201sh7343se_outb(unsigned char value, unsigned long port)
202{
203 struct iop *p = port2iop(port);
204 (p->outb) (p, value, port);
205}
206
207void
208sh7343se_outb_p(unsigned char value, unsigned long port)
209{
210 sh7343se_outb(value, port);
211 delay();
212}
213
214void
215sh7343se_outw(unsigned short value, unsigned long port)
216{
217 struct iop *p = port2iop(port);
218 (p->outw) (p, value, port);
219}
220
221void
222sh7343se_outl(unsigned int value, unsigned long port)
223{
224 badio(outl, port);
225}
226
227void
228sh7343se_insb(unsigned long port, void *addr, unsigned long count)
229{
230 unsigned char *a = addr;
231 struct iop *p = port2iop(port);
232 while (count--)
233 *a++ = (p->inb) (p, port);
234}
235
236void
237sh7343se_insw(unsigned long port, void *addr, unsigned long count)
238{
239 unsigned short *a = addr;
240 struct iop *p = port2iop(port);
241 while (count--)
242 *a++ = (p->inw) (p, port);
243}
244
245void
246sh7343se_insl(unsigned long port, void *addr, unsigned long count)
247{
248 badio(insl, port);
249}
250
251void
252sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
253{
254 unsigned char *a = (unsigned char *) addr;
255 struct iop *p = port2iop(port);
256 while (count--)
257 (p->outb) (p, *a++, port);
258}
259
260void
261sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
262{
263 unsigned short *a = (unsigned short *) addr;
264 struct iop *p = port2iop(port);
265 while (count--)
266 (p->outw) (p, *a++, port);
267}
268
269void
270sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
271{
272 badio(outsw, port);
273}
diff --git a/arch/sh/boards/mach-se/7343/setup.c b/arch/sh/boards/mach-se/7343/setup.c
index 486f40bf9274..4de56f35f419 100644
--- a/arch/sh/boards/mach-se/7343/setup.c
+++ b/arch/sh/boards/mach-se/7343/setup.c
@@ -1,36 +1,16 @@
1#include <linux/init.h> 1#include <linux/init.h>
2#include <linux/platform_device.h> 2#include <linux/platform_device.h>
3#include <linux/mtd/physmap.h> 3#include <linux/mtd/physmap.h>
4#include <linux/serial_8250.h>
5#include <linux/serial_reg.h>
6#include <linux/usb/isp116x.h>
7#include <linux/delay.h>
4#include <asm/machvec.h> 8#include <asm/machvec.h>
5#include <mach-se/mach/se7343.h> 9#include <mach-se/mach/se7343.h>
6#include <asm/heartbeat.h> 10#include <asm/heartbeat.h>
7#include <asm/irq.h> 11#include <asm/irq.h>
8#include <asm/io.h> 12#include <asm/io.h>
9 13
10static struct resource smc91x_resources[] = {
11 [0] = {
12 .start = 0x10000000,
13 .end = 0x1000000F,
14 .flags = IORESOURCE_MEM,
15 },
16 [1] = {
17 /*
18 * shared with other devices via externel
19 * interrupt controller in FPGA...
20 */
21 .start = SMC_IRQ,
22 .end = SMC_IRQ,
23 .flags = IORESOURCE_IRQ,
24 },
25};
26
27static struct platform_device smc91x_device = {
28 .name = "smc91x",
29 .id = 0,
30 .num_resources = ARRAY_SIZE(smc91x_resources),
31 .resource = smc91x_resources,
32};
33
34static struct resource heartbeat_resources[] = { 14static struct resource heartbeat_resources[] = {
35 [0] = { 15 [0] = {
36 .start = PA_LED, 16 .start = PA_LED,
@@ -94,10 +74,83 @@ static struct platform_device nor_flash_device = {
94 .resource = nor_flash_resources, 74 .resource = nor_flash_resources,
95}; 75};
96 76
77#define ST16C2550C_FLAGS (UPF_BOOT_AUTOCONF | UPF_IOREMAP)
78
79static struct plat_serial8250_port serial_platform_data[] = {
80 [0] = {
81 .iotype = UPIO_MEM,
82 .mapbase = 0x16000000,
83 .regshift = 1,
84 .flags = ST16C2550C_FLAGS,
85 .irq = UARTA_IRQ,
86 .uartclk = 7372800,
87 },
88 [1] = {
89 .iotype = UPIO_MEM,
90 .mapbase = 0x17000000,
91 .regshift = 1,
92 .flags = ST16C2550C_FLAGS,
93 .irq = UARTB_IRQ,
94 .uartclk = 7372800,
95 },
96 { },
97};
98
99static struct platform_device uart_device = {
100 .name = "serial8250",
101 .id = PLAT8250_DEV_PLATFORM,
102 .dev = {
103 .platform_data = serial_platform_data,
104 },
105};
106
107static void isp116x_delay(struct device *dev, int delay)
108{
109 ndelay(delay);
110}
111
112static struct resource usb_resources[] = {
113 [0] = {
114 .start = 0x11800000,
115 .end = 0x11800001,
116 .flags = IORESOURCE_MEM,
117 },
118 [1] = {
119 .start = 0x11800002,
120 .end = 0x11800003,
121 .flags = IORESOURCE_MEM,
122 },
123 [2] = {
124 .start = USB_IRQ,
125 .flags = IORESOURCE_IRQ,
126 },
127};
128
129static struct isp116x_platform_data usb_platform_data = {
130 .sel15Kres = 1,
131 .oc_enable = 1,
132 .int_act_high = 0,
133 .int_edge_triggered = 0,
134 .remote_wakeup_enable = 0,
135 .delay = isp116x_delay,
136};
137
138static struct platform_device usb_device = {
139 .name = "isp116x-hcd",
140 .id = -1,
141 .num_resources = ARRAY_SIZE(usb_resources),
142 .resource = usb_resources,
143 .dev = {
144 .platform_data = &usb_platform_data,
145 },
146
147};
148
97static struct platform_device *sh7343se_platform_devices[] __initdata = { 149static struct platform_device *sh7343se_platform_devices[] __initdata = {
98 &smc91x_device,
99 &heartbeat_device, 150 &heartbeat_device,
100 &nor_flash_device, 151 &nor_flash_device,
152 &uart_device,
153 &usb_device,
101}; 154};
102 155
103static int __init sh7343se_devices_setup(void) 156static int __init sh7343se_devices_setup(void)
@@ -126,27 +179,6 @@ static void __init sh7343se_setup(char **cmdline_p)
126static struct sh_machine_vector mv_7343se __initmv = { 179static struct sh_machine_vector mv_7343se __initmv = {
127 .mv_name = "SolutionEngine 7343", 180 .mv_name = "SolutionEngine 7343",
128 .mv_setup = sh7343se_setup, 181 .mv_setup = sh7343se_setup,
129 .mv_nr_irqs = 108, 182 .mv_nr_irqs = SE7343_FPGA_IRQ_BASE + SE7343_FPGA_IRQ_NR,
130 .mv_inb = sh7343se_inb,
131 .mv_inw = sh7343se_inw,
132 .mv_inl = sh7343se_inl,
133 .mv_outb = sh7343se_outb,
134 .mv_outw = sh7343se_outw,
135 .mv_outl = sh7343se_outl,
136
137 .mv_inb_p = sh7343se_inb_p,
138 .mv_inw_p = sh7343se_inw,
139 .mv_inl_p = sh7343se_inl,
140 .mv_outb_p = sh7343se_outb_p,
141 .mv_outw_p = sh7343se_outw,
142 .mv_outl_p = sh7343se_outl,
143
144 .mv_insb = sh7343se_insb,
145 .mv_insw = sh7343se_insw,
146 .mv_insl = sh7343se_insl,
147 .mv_outsb = sh7343se_outsb,
148 .mv_outsw = sh7343se_outsw,
149 .mv_outsl = sh7343se_outsl,
150
151 .mv_init_irq = init_7343se_IRQ, 183 .mv_init_irq = init_7343se_IRQ,
152}; 184};
diff --git a/arch/sh/boards/mach-se/770x/setup.c b/arch/sh/boards/mach-se/770x/setup.c
index 9123d9687bf7..527eb6b12610 100644
--- a/arch/sh/boards/mach-se/770x/setup.c
+++ b/arch/sh/boards/mach-se/770x/setup.c
@@ -8,8 +8,9 @@
8 */ 8 */
9#include <linux/init.h> 9#include <linux/init.h>
10#include <linux/platform_device.h> 10#include <linux/platform_device.h>
11#include <asm/machvec.h>
12#include <mach-se/mach/se.h> 11#include <mach-se/mach/se.h>
12#include <mach-se/mach/mrshpc.h>
13#include <asm/machvec.h>
13#include <asm/io.h> 14#include <asm/io.h>
14#include <asm/smc37c93x.h> 15#include <asm/smc37c93x.h>
15#include <asm/heartbeat.h> 16#include <asm/heartbeat.h>
@@ -175,6 +176,7 @@ static struct platform_device *se_devices[] __initdata = {
175 176
176static int __init se_devices_setup(void) 177static int __init se_devices_setup(void)
177{ 178{
179 mrshpc_setup_windows();
178 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices)); 180 return platform_add_devices(se_devices, ARRAY_SIZE(se_devices));
179} 181}
180device_initcall(se_devices_setup); 182device_initcall(se_devices_setup);
diff --git a/arch/sh/boards/mach-se/7721/setup.c b/arch/sh/boards/mach-se/7721/setup.c
index d3fc80ff4d83..55af4c36b43a 100644
--- a/arch/sh/boards/mach-se/7721/setup.c
+++ b/arch/sh/boards/mach-se/7721/setup.c
@@ -12,8 +12,9 @@
12 */ 12 */
13#include <linux/init.h> 13#include <linux/init.h>
14#include <linux/platform_device.h> 14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <mach-se/mach/se7721.h> 15#include <mach-se/mach/se7721.h>
16#include <mach-se/mach/mrshpc.h>
17#include <asm/machvec.h>
17#include <asm/io.h> 18#include <asm/io.h>
18#include <asm/heartbeat.h> 19#include <asm/heartbeat.h>
19 20
@@ -74,8 +75,8 @@ static struct platform_device *se7721_devices[] __initdata = {
74 75
75static int __init se7721_devices_setup(void) 76static int __init se7721_devices_setup(void)
76{ 77{
77 return platform_add_devices(se7721_devices, 78 mrshpc_setup_windows();
78 ARRAY_SIZE(se7721_devices)); 79 return platform_add_devices(se7721_devices, ARRAY_SIZE(se7721_devices));
79} 80}
80device_initcall(se7721_devices_setup); 81device_initcall(se7721_devices_setup);
81 82
diff --git a/arch/sh/boards/mach-se/7722/setup.c b/arch/sh/boards/mach-se/7722/setup.c
index fe6f96517e12..af84904ed86f 100644
--- a/arch/sh/boards/mach-se/7722/setup.c
+++ b/arch/sh/boards/mach-se/7722/setup.c
@@ -15,9 +15,10 @@
15#include <linux/ata_platform.h> 15#include <linux/ata_platform.h>
16#include <linux/input.h> 16#include <linux/input.h>
17#include <linux/smc91x.h> 17#include <linux/smc91x.h>
18#include <mach-se/mach/se7722.h>
19#include <mach-se/mach/mrshpc.h>
18#include <asm/machvec.h> 20#include <asm/machvec.h>
19#include <asm/clock.h> 21#include <asm/clock.h>
20#include <mach-se/mach/se7722.h>
21#include <asm/io.h> 22#include <asm/io.h>
22#include <asm/heartbeat.h> 23#include <asm/heartbeat.h>
23#include <asm/sh_keysc.h> 24#include <asm/sh_keysc.h>
@@ -130,6 +131,7 @@ static struct resource sh_keysc_resources[] = {
130 131
131static struct platform_device sh_keysc_device = { 132static struct platform_device sh_keysc_device = {
132 .name = "sh_keysc", 133 .name = "sh_keysc",
134 .id = 0, /* "keysc0" clock */
133 .num_resources = ARRAY_SIZE(sh_keysc_resources), 135 .num_resources = ARRAY_SIZE(sh_keysc_resources),
134 .resource = sh_keysc_resources, 136 .resource = sh_keysc_resources,
135 .dev = { 137 .dev = {
@@ -146,10 +148,8 @@ static struct platform_device *se7722_devices[] __initdata = {
146 148
147static int __init se7722_devices_setup(void) 149static int __init se7722_devices_setup(void)
148{ 150{
149 clk_always_enable("mstp214"); /* KEYSC */ 151 mrshpc_setup_windows();
150 152 return platform_add_devices(se7722_devices, ARRAY_SIZE(se7722_devices));
151 return platform_add_devices(se7722_devices,
152 ARRAY_SIZE(se7722_devices));
153} 153}
154device_initcall(se7722_devices_setup); 154device_initcall(se7722_devices_setup);
155 155
diff --git a/arch/sh/boards/mach-sh03/setup.c b/arch/sh/boards/mach-sh03/setup.c
index 5771219be3fd..74cfb4b8b03d 100644
--- a/arch/sh/boards/mach-sh03/setup.c
+++ b/arch/sh/boards/mach-sh03/setup.c
@@ -9,6 +9,7 @@
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/pci.h> 10#include <linux/pci.h>
11#include <linux/platform_device.h> 11#include <linux/platform_device.h>
12#include <linux/ata_platform.h>
12#include <asm/io.h> 13#include <asm/io.h>
13#include <asm/rtc.h> 14#include <asm/rtc.h>
14#include <mach-sh03/mach/io.h> 15#include <mach-sh03/mach/io.h>
@@ -20,19 +21,6 @@ static void __init init_sh03_IRQ(void)
20 plat_irq_setup_pins(IRQ_MODE_IRQ); 21 plat_irq_setup_pins(IRQ_MODE_IRQ);
21} 22}
22 23
23extern void *cf_io_base;
24
25static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
26{
27 if (PXSEG(port))
28 return (void __iomem *)port;
29 /* CompactFlash (IDE) */
30 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
31 return (void __iomem *)((unsigned long)cf_io_base + port);
32
33 return (void __iomem *)(port + PCI_IO_BASE);
34}
35
36/* arch/sh/boards/sh03/rtc.c */ 24/* arch/sh/boards/sh03/rtc.c */
37void sh03_time_init(void); 25void sh03_time_init(void);
38 26
@@ -41,6 +29,30 @@ static void __init sh03_setup(char **cmdline_p)
41 board_time_init = sh03_time_init; 29 board_time_init = sh03_time_init;
42} 30}
43 31
32static struct resource cf_ide_resources[] = {
33 [0] = {
34 .start = 0x1f0,
35 .end = 0x1f0 + 8,
36 .flags = IORESOURCE_IO,
37 },
38 [1] = {
39 .start = 0x1f0 + 0x206,
40 .end = 0x1f0 +8 + 0x206 + 8,
41 .flags = IORESOURCE_IO,
42 },
43 [2] = {
44 .start = IRL2_IRQ,
45 .flags = IORESOURCE_IRQ,
46 },
47};
48
49static struct platform_device cf_ide_device = {
50 .name = "pata_platform",
51 .id = -1,
52 .num_resources = ARRAY_SIZE(cf_ide_resources),
53 .resource = cf_ide_resources,
54};
55
44static struct resource heartbeat_resources[] = { 56static struct resource heartbeat_resources[] = {
45 [0] = { 57 [0] = {
46 .start = 0xa0800000, 58 .start = 0xa0800000,
@@ -58,10 +70,30 @@ static struct platform_device heartbeat_device = {
58 70
59static struct platform_device *sh03_devices[] __initdata = { 71static struct platform_device *sh03_devices[] __initdata = {
60 &heartbeat_device, 72 &heartbeat_device,
73 &cf_ide_device,
61}; 74};
62 75
63static int __init sh03_devices_setup(void) 76static int __init sh03_devices_setup(void)
64{ 77{
78 pgprot_t prot;
79 unsigned long paddrbase;
80 void *cf_ide_base;
81
82 /* open I/O area window */
83 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
84 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
85 cf_ide_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
86 if (!cf_ide_base) {
87 printk("allocate_cf_area : can't open CF I/O window!\n");
88 return -ENOMEM;
89 }
90
91 /* IDE cmd address : 0x1f0-0x1f7 and 0x3f6 */
92 cf_ide_resources[0].start += (unsigned long)cf_ide_base;
93 cf_ide_resources[0].end += (unsigned long)cf_ide_base;
94 cf_ide_resources[1].start += (unsigned long)cf_ide_base;
95 cf_ide_resources[1].end += (unsigned long)cf_ide_base;
96
65 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices)); 97 return platform_add_devices(sh03_devices, ARRAY_SIZE(sh03_devices));
66} 98}
67__initcall(sh03_devices_setup); 99__initcall(sh03_devices_setup);
@@ -70,6 +102,5 @@ static struct sh_machine_vector mv_sh03 __initmv = {
70 .mv_name = "Interface (CTP/PCI-SH03)", 102 .mv_name = "Interface (CTP/PCI-SH03)",
71 .mv_setup = sh03_setup, 103 .mv_setup = sh03_setup,
72 .mv_nr_irqs = 48, 104 .mv_nr_irqs = 48,
73 .mv_ioport_map = sh03_ioport_map,
74 .mv_init_irq = init_sh03_IRQ, 105 .mv_init_irq = init_sh03_IRQ,
75}; 106};
diff --git a/arch/sh/boards/mach-systemh/irq.c b/arch/sh/boards/mach-systemh/irq.c
index 538406872a89..986a0e71d220 100644
--- a/arch/sh/boards/mach-systemh/irq.c
+++ b/arch/sh/boards/mach-systemh/irq.c
@@ -12,8 +12,8 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <linux/interrupt.h> 14#include <linux/interrupt.h>
15#include <linux/io.h>
15 16
16#include <asm/io.h>
17#include <mach/systemh7751.h> 17#include <mach/systemh7751.h>
18#include <asm/smc37c93x.h> 18#include <asm/smc37c93x.h>
19 19
@@ -24,35 +24,17 @@ static unsigned long *systemh_irq_mask_register = (unsigned long *)0xB3F10004;
24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000; 24static unsigned long *systemh_irq_request_register = (unsigned long *)0xB3F10000;
25 25
26/* forward declaration */ 26/* forward declaration */
27static unsigned int startup_systemh_irq(unsigned int irq);
28static void shutdown_systemh_irq(unsigned int irq);
29static void enable_systemh_irq(unsigned int irq); 27static void enable_systemh_irq(unsigned int irq);
30static void disable_systemh_irq(unsigned int irq); 28static void disable_systemh_irq(unsigned int irq);
31static void mask_and_ack_systemh(unsigned int); 29static void mask_and_ack_systemh(unsigned int);
32static void end_systemh_irq(unsigned int irq);
33 30
34/* hw_interrupt_type */ 31static struct irq_chip systemh_irq_type = {
35static struct hw_interrupt_type systemh_irq_type = { 32 .name = " SystemH Register",
36 .typename = " SystemH Register", 33 .unmask = enable_systemh_irq,
37 .startup = startup_systemh_irq, 34 .mask = disable_systemh_irq,
38 .shutdown = shutdown_systemh_irq,
39 .enable = enable_systemh_irq,
40 .disable = disable_systemh_irq,
41 .ack = mask_and_ack_systemh, 35 .ack = mask_and_ack_systemh,
42 .end = end_systemh_irq
43}; 36};
44 37
45static unsigned int startup_systemh_irq(unsigned int irq)
46{
47 enable_systemh_irq(irq);
48 return 0; /* never anything pending */
49}
50
51static void shutdown_systemh_irq(unsigned int irq)
52{
53 disable_systemh_irq(irq);
54}
55
56static void disable_systemh_irq(unsigned int irq) 38static void disable_systemh_irq(unsigned int irq)
57{ 39{
58 if (systemh_irq_mask_register) { 40 if (systemh_irq_mask_register) {
@@ -86,16 +68,9 @@ static void mask_and_ack_systemh(unsigned int irq)
86 disable_systemh_irq(irq); 68 disable_systemh_irq(irq);
87} 69}
88 70
89static void end_systemh_irq(unsigned int irq)
90{
91 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
92 enable_systemh_irq(irq);
93}
94
95void make_systemh_irq(unsigned int irq) 71void make_systemh_irq(unsigned int irq)
96{ 72{
97 disable_irq_nosync(irq); 73 disable_irq_nosync(irq);
98 irq_desc[irq].chip = &systemh_irq_type; 74 set_irq_chip_and_handler(irq, &systemh_irq_type, handle_level_irq);
99 disable_systemh_irq(irq); 75 disable_systemh_irq(irq);
100} 76}
101
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-02 10:47:13 -0500