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-rw-r--r--arch/sh/boards/adx/Makefile6
-rw-r--r--arch/sh/boards/adx/irq.c31
-rw-r--r--arch/sh/boards/adx/irq_maskreg.c106
-rw-r--r--arch/sh/boards/adx/setup.c56
-rw-r--r--arch/sh/boards/bigsur/irq.c47
-rw-r--r--arch/sh/boards/bigsur/setup.c47
-rw-r--r--arch/sh/boards/cat68701/Makefile6
-rw-r--r--arch/sh/boards/cat68701/irq.c28
-rw-r--r--arch/sh/boards/cat68701/setup.c85
-rw-r--r--arch/sh/boards/cqreek/Makefile6
-rw-r--r--arch/sh/boards/cqreek/irq.c128
-rw-r--r--arch/sh/boards/cqreek/setup.c100
-rw-r--r--arch/sh/boards/dmida/Makefile7
-rw-r--r--arch/sh/boards/dmida/mach.c59
-rw-r--r--arch/sh/boards/dreamcast/irq.c15
-rw-r--r--arch/sh/boards/dreamcast/rtc.c22
-rw-r--r--arch/sh/boards/dreamcast/setup.c40
-rw-r--r--arch/sh/boards/ec3104/setup.c49
-rw-r--r--arch/sh/boards/harp/Makefile8
-rw-r--r--arch/sh/boards/harp/irq.c147
-rw-r--r--arch/sh/boards/harp/led.c51
-rw-r--r--arch/sh/boards/harp/mach.c62
-rw-r--r--arch/sh/boards/harp/pcidma.c42
-rw-r--r--arch/sh/boards/harp/setup.c90
-rw-r--r--arch/sh/boards/hp6xx/Makefile5
-rw-r--r--arch/sh/boards/hp6xx/hp6xx_apm.c123
-rw-r--r--arch/sh/boards/hp6xx/pm.c88
-rw-r--r--arch/sh/boards/hp6xx/pm_wakeup.S58
-rw-r--r--arch/sh/boards/hp6xx/setup.c62
-rw-r--r--arch/sh/boards/landisk/Makefile5
-rw-r--r--arch/sh/boards/landisk/io.c250
-rw-r--r--arch/sh/boards/landisk/irq.c99
-rw-r--r--arch/sh/boards/landisk/landisk_pwb.c348
-rw-r--r--arch/sh/boards/landisk/rtc.c93
-rw-r--r--arch/sh/boards/landisk/setup.c177
-rw-r--r--arch/sh/boards/mpc1211/rtc.c4
-rw-r--r--arch/sh/boards/mpc1211/setup.c71
-rw-r--r--arch/sh/boards/overdrive/Makefile8
-rw-r--r--arch/sh/boards/overdrive/fpga.c133
-rw-r--r--arch/sh/boards/overdrive/galileo.c587
-rw-r--r--arch/sh/boards/overdrive/io.c172
-rw-r--r--arch/sh/boards/overdrive/irq.c191
-rw-r--r--arch/sh/boards/overdrive/led.c58
-rw-r--r--arch/sh/boards/overdrive/mach.c62
-rw-r--r--arch/sh/boards/overdrive/pcidma.c46
-rw-r--r--arch/sh/boards/overdrive/setup.c36
-rw-r--r--arch/sh/boards/renesas/edosk7705/Makefile4
-rw-r--r--arch/sh/boards/renesas/edosk7705/setup.c29
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/Kconfig12
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/Makefile6
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/io.c252
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/irq.c6
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/led.c26
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/mach.c54
-rw-r--r--arch/sh/boards/renesas/hs7751rvoip/setup.c94
-rw-r--r--arch/sh/boards/renesas/r7780rp/Kconfig14
-rw-r--r--arch/sh/boards/renesas/r7780rp/Makefile6
-rw-r--r--arch/sh/boards/renesas/r7780rp/io.c301
-rw-r--r--arch/sh/boards/renesas/r7780rp/irq.c117
-rw-r--r--arch/sh/boards/renesas/r7780rp/led.c45
-rw-r--r--arch/sh/boards/renesas/r7780rp/setup.c163
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/Kconfig12
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/Makefile8
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/io.c191
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/irq.c6
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/led.c11
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/mach.c69
-rw-r--r--arch/sh/boards/renesas/rts7751r2d/setup.c139
-rw-r--r--arch/sh/boards/renesas/sh7710voipgw/Makefile1
-rw-r--r--arch/sh/boards/renesas/sh7710voipgw/setup.c109
-rw-r--r--arch/sh/boards/renesas/systemh/io.c163
-rw-r--r--arch/sh/boards/renesas/systemh/irq.c10
-rw-r--r--arch/sh/boards/renesas/systemh/setup.c30
-rw-r--r--arch/sh/boards/saturn/setup.c14
-rw-r--r--arch/sh/boards/se/7300/io.c8
-rw-r--r--arch/sh/boards/se/7300/irq.c2
-rw-r--r--arch/sh/boards/se/7300/led.c18
-rw-r--r--arch/sh/boards/se/7300/setup.c20
-rw-r--r--arch/sh/boards/se/73180/io.c6
-rw-r--r--arch/sh/boards/se/73180/irq.c9
-rw-r--r--arch/sh/boards/se/73180/led.c15
-rw-r--r--arch/sh/boards/se/73180/setup.c22
-rw-r--r--arch/sh/boards/se/7343/Makefile7
-rw-r--r--arch/sh/boards/se/7343/io.c275
-rw-r--r--arch/sh/boards/se/7343/irq.c193
-rw-r--r--arch/sh/boards/se/7343/led.c46
-rw-r--r--arch/sh/boards/se/7343/setup.c84
-rw-r--r--arch/sh/boards/se/770x/Makefile4
-rw-r--r--arch/sh/boards/se/770x/io.c61
-rw-r--r--arch/sh/boards/se/770x/irq.c2
-rw-r--r--arch/sh/boards/se/770x/led.c17
-rw-r--r--arch/sh/boards/se/770x/mach.c67
-rw-r--r--arch/sh/boards/se/770x/setup.c65
-rw-r--r--arch/sh/boards/se/7751/Makefile4
-rw-r--r--arch/sh/boards/se/7751/io.c171
-rw-r--r--arch/sh/boards/se/7751/irq.c2
-rw-r--r--arch/sh/boards/se/7751/led.c18
-rw-r--r--arch/sh/boards/se/7751/mach.c54
-rw-r--r--arch/sh/boards/se/7751/setup.c109
-rw-r--r--arch/sh/boards/sh03/rtc.c9
-rw-r--r--arch/sh/boards/sh03/setup.c49
-rw-r--r--arch/sh/boards/sh2000/Makefile6
-rw-r--r--arch/sh/boards/sh2000/setup.c70
-rw-r--r--arch/sh/boards/shmin/Makefile5
-rw-r--r--arch/sh/boards/shmin/setup.c41
-rw-r--r--arch/sh/boards/snapgear/io.c145
-rw-r--r--arch/sh/boards/snapgear/rtc.c34
-rw-r--r--arch/sh/boards/snapgear/setup.c115
-rw-r--r--arch/sh/boards/superh/microdev/irq.c39
-rw-r--r--arch/sh/boards/superh/microdev/setup.c113
-rw-r--r--arch/sh/boards/titan/Makefile5
-rw-r--r--arch/sh/boards/titan/io.c126
-rw-r--r--arch/sh/boards/titan/setup.c48
-rw-r--r--arch/sh/boards/unknown/setup.c13
114 files changed, 3727 insertions, 4176 deletions
diff --git a/arch/sh/boards/adx/Makefile b/arch/sh/boards/adx/Makefile
deleted file mode 100644
index 5b1c531b3991..000000000000
--- a/arch/sh/boards/adx/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for ADX boards
3#
4
5obj-y := setup.o irq.o irq_maskreq.o
6
diff --git a/arch/sh/boards/adx/irq.c b/arch/sh/boards/adx/irq.c
deleted file mode 100644
index c6ca409dff98..000000000000
--- a/arch/sh/boards/adx/irq.c
+++ /dev/null
@@ -1,31 +0,0 @@
1/*
2 * linux/arch/sh/boards/adx/irq.c
3 *
4 * Copyright (C) 2001 A&D Co., Ltd.
5 *
6 * I/O routine and setup routines for A&D ADX Board
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13
14#include <asm/irq.h>
15
16void init_adx_IRQ(void)
17{
18 int i;
19
20/* printk("init_adx_IRQ()\n");*/
21 /* setup irq_mask_register */
22 irq_mask_register = (unsigned short *)0xa6000008;
23
24 /* cover all external interrupt area by maskreg_irq_type
25 * (Actually, irq15 doesn't exist)
26 */
27 for (i = 0; i < 16; i++) {
28 make_maskreg_irq(i);
29 disable_irq(i);
30 }
31}
diff --git a/arch/sh/boards/adx/irq_maskreg.c b/arch/sh/boards/adx/irq_maskreg.c
deleted file mode 100644
index 4b2abe5eb165..000000000000
--- a/arch/sh/boards/adx/irq_maskreg.c
+++ /dev/null
@@ -1,106 +0,0 @@
1/*
2 * linux/arch/sh/kernel/irq_maskreg.c
3 *
4 * Copyright (C) 2001 A&D Co., Ltd. <http://www.aandd.co.jp>
5 *
6 * This file may be copied or modified under the terms of the GNU
7 * General Public License. See linux/COPYING for more information.
8 *
9 * Interrupt handling for Simple external interrupt mask register
10 *
11 * This is for the machine which have single 16 bit register
12 * for masking external IRQ individually.
13 * Each bit of the register is for masking each interrupt.
14 */
15
16#include <linux/kernel.h>
17#include <linux/init.h>
18#include <linux/irq.h>
19
20#include <asm/system.h>
21#include <asm/io.h>
22#include <asm/machvec.h>
23
24/* address of external interrupt mask register
25 * address must be set prior to use these (maybe in init_XXX_irq())
26 * XXX : is it better to use .config than specifying it in code? */
27unsigned short *irq_mask_register = 0;
28
29/* forward declaration */
30static unsigned int startup_maskreg_irq(unsigned int irq);
31static void shutdown_maskreg_irq(unsigned int irq);
32static void enable_maskreg_irq(unsigned int irq);
33static void disable_maskreg_irq(unsigned int irq);
34static void mask_and_ack_maskreg(unsigned int);
35static void end_maskreg_irq(unsigned int irq);
36
37/* hw_interrupt_type */
38static struct hw_interrupt_type maskreg_irq_type = {
39 .typename = " Mask Register",
40 .startup = startup_maskreg_irq,
41 .shutdown = shutdown_maskreg_irq,
42 .enable = enable_maskreg_irq,
43 .disable = disable_maskreg_irq,
44 .ack = mask_and_ack_maskreg,
45 .end = end_maskreg_irq
46};
47
48/* actual implementatin */
49static unsigned int startup_maskreg_irq(unsigned int irq)
50{
51 enable_maskreg_irq(irq);
52 return 0; /* never anything pending */
53}
54
55static void shutdown_maskreg_irq(unsigned int irq)
56{
57 disable_maskreg_irq(irq);
58}
59
60static void disable_maskreg_irq(unsigned int irq)
61{
62 if (irq_mask_register) {
63 unsigned long flags;
64 unsigned short val, mask = 0x01 << irq;
65
66 /* Set "irq"th bit */
67 local_irq_save(flags);
68 val = ctrl_inw((unsigned long)irq_mask_register);
69 val |= mask;
70 ctrl_outw(val, (unsigned long)irq_mask_register);
71 local_irq_restore(flags);
72 }
73}
74
75static void enable_maskreg_irq(unsigned int irq)
76{
77 if (irq_mask_register) {
78 unsigned long flags;
79 unsigned short val, mask = ~(0x01 << irq);
80
81 /* Clear "irq"th bit */
82 local_irq_save(flags);
83 val = ctrl_inw((unsigned long)irq_mask_register);
84 val &= mask;
85 ctrl_outw(val, (unsigned long)irq_mask_register);
86 local_irq_restore(flags);
87 }
88}
89
90static void mask_and_ack_maskreg(unsigned int irq)
91{
92 disable_maskreg_irq(irq);
93}
94
95static void end_maskreg_irq(unsigned int irq)
96{
97 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
98 enable_maskreg_irq(irq);
99}
100
101void make_maskreg_irq(unsigned int irq)
102{
103 disable_irq_nosync(irq);
104 irq_desc[irq].chip = &maskreg_irq_type;
105 disable_maskreg_irq(irq);
106}
diff --git a/arch/sh/boards/adx/setup.c b/arch/sh/boards/adx/setup.c
deleted file mode 100644
index 4938d9592343..000000000000
--- a/arch/sh/boards/adx/setup.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * linux/arch/sh/board/adx/setup.c
3 *
4 * Copyright (C) 2001 A&D Co., Ltd.
5 *
6 * I/O routine and setup routines for A&D ADX Board
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 *
12 */
13
14#include <asm/machvec.h>
15#include <linux/module.h>
16
17extern void init_adx_IRQ(void);
18extern void *cf_io_base;
19
20const char *get_system_type(void)
21{
22 return "A&D ADX";
23}
24
25unsigned long adx_isa_port2addr(unsigned long offset)
26{
27 /* CompactFlash (IDE) */
28 if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset == 0x3f6)) {
29 return (unsigned long)cf_io_base + offset;
30 }
31
32 /* eth0 */
33 if ((offset >= 0x300) && (offset <= 0x30f)) {
34 return 0xa5000000 + offset; /* COMM BOARD (AREA1) */
35 }
36
37 return offset + 0xb0000000; /* IOBUS (AREA 4)*/
38}
39
40/*
41 * The Machine Vector
42 */
43
44struct sh_machine_vector mv_adx __initmv = {
45 .mv_nr_irqs = 48,
46 .mv_isa_port2addr = adx_isa_port2addr,
47 .mv_init_irq = init_adx_IRQ,
48};
49ALIAS_MV(adx)
50
51int __init platform_setup(void)
52{
53 /* Nothing to see here .. */
54 return 0;
55}
56
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c
index ac946a2201c7..1ab04da36382 100644
--- a/arch/sh/boards/bigsur/irq.c
+++ b/arch/sh/boards/bigsur/irq.c
@@ -19,6 +19,7 @@
19 * IRQ functions for a Hitachi Big Sur Evaluation Board. 19 * IRQ functions for a Hitachi Big Sur Evaluation Board.
20 * 20 *
21 */ 21 */
22#undef DEBUG
22 23
23#include <linux/sched.h> 24#include <linux/sched.h>
24#include <linux/module.h> 25#include <linux/module.h>
@@ -41,10 +42,8 @@
41#undef BIGSUR_DEBUG 42#undef BIGSUR_DEBUG
42 43
43#ifdef BIGSUR_DEBUG 44#ifdef BIGSUR_DEBUG
44#define DPRINTK(args...) printk(args)
45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) 45#define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args)
46#else 46#else
47#define DPRINTK(args...)
48#define DIPRINTK(n, args...) 47#define DIPRINTK(n, args...)
49#endif /* BIGSUR_DEBUG */ 48#endif /* BIGSUR_DEBUG */
50 49
@@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq);
60/* Level 1 IRQ routines */ 59/* Level 1 IRQ routines */
61static void disable_bigsur_l1irq(unsigned int irq) 60static void disable_bigsur_l1irq(unsigned int irq)
62{ 61{
63 unsigned long flags;
64 unsigned char mask; 62 unsigned char mask;
65 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 63 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
66 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 64 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
67 65
68 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 66 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
69 DPRINTK("Disable L1 IRQ %d\n", irq); 67 pr_debug("Disable L1 IRQ %d\n", irq);
70 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 68 DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
71 mask_port, bit); 69 mask_port, bit);
72 local_irq_save(flags);
73 70
74 /* Disable IRQ - set mask bit */ 71 /* Disable IRQ - set mask bit */
75 mask = inb(mask_port) | bit; 72 mask = inb(mask_port) | bit;
76 outb(mask, mask_port); 73 outb(mask, mask_port);
77 local_irq_restore(flags);
78 return; 74 return;
79 } 75 }
80 DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); 76 pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq);
81} 77}
82 78
83static void enable_bigsur_l1irq(unsigned int irq) 79static void enable_bigsur_l1irq(unsigned int irq)
84{ 80{
85 unsigned long flags;
86 unsigned char mask; 81 unsigned char mask;
87 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; 82 unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0;
88 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); 83 unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) );
89 84
90 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 85 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
91 DPRINTK("Enable L1 IRQ %d\n", irq); 86 pr_debug("Enable L1 IRQ %d\n", irq);
92 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", 87 DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n",
93 mask_port, bit); 88 mask_port, bit);
94 local_irq_save(flags);
95 /* Enable L1 IRQ - clear mask bit */ 89 /* Enable L1 IRQ - clear mask bit */
96 mask = inb(mask_port) & ~bit; 90 mask = inb(mask_port) & ~bit;
97 outb(mask, mask_port); 91 outb(mask, mask_port);
98 local_irq_restore(flags);
99 return; 92 return;
100 } 93 }
101 DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); 94 pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq);
102} 95}
103 96
104 97
@@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1;
126/* Level 2 IRQ routines */ 119/* Level 2 IRQ routines */
127static void disable_bigsur_l2irq(unsigned int irq) 120static void disable_bigsur_l2irq(unsigned int irq)
128{ 121{
129 unsigned long flags;
130 unsigned char mask; 122 unsigned char mask;
131 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 123 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
132 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 124 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
133 125
134 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 126 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
135 DPRINTK("Disable L2 IRQ %d\n", irq); 127 pr_debug("Disable L2 IRQ %d\n", irq);
136 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 128 DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
137 mask_port, bit); 129 mask_port, bit);
138 local_irq_save(flags);
139 130
140 /* Disable L2 IRQ - set mask bit */ 131 /* Disable L2 IRQ - set mask bit */
141 mask = inb(mask_port) | bit; 132 mask = inb(mask_port) | bit;
142 outb(mask, mask_port); 133 outb(mask, mask_port);
143 local_irq_restore(flags);
144 return; 134 return;
145 } 135 }
146 DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); 136 pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq);
147} 137}
148 138
149static void enable_bigsur_l2irq(unsigned int irq) 139static void enable_bigsur_l2irq(unsigned int irq)
150{ 140{
151 unsigned long flags;
152 unsigned char mask; 141 unsigned char mask;
153 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); 142 unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8);
154 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; 143 unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset;
155 144
156 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { 145 if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) {
157 DPRINTK("Enable L2 IRQ %d\n", irq); 146 pr_debug("Enable L2 IRQ %d\n", irq);
158 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", 147 DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n",
159 mask_port, bit); 148 mask_port, bit);
160 local_irq_save(flags);
161 149
162 /* Enable L2 IRQ - clear mask bit */ 150 /* Enable L2 IRQ - clear mask bit */
163 mask = inb(mask_port) & ~bit; 151 mask = inb(mask_port) & ~bit;
164 outb(mask, mask_port); 152 outb(mask, mask_port);
165 local_irq_restore(flags);
166 return; 153 return;
167 } 154 }
168 DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); 155 pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq);
169} 156}
170 157
171static void mask_and_ack_bigsur(unsigned int irq) 158static void mask_and_ack_bigsur(unsigned int irq)
172{ 159{
173 DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq); 160 pr_debug("mask_and_ack_bigsur IRQ %d\n", irq);
174 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 161 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
175 disable_bigsur_l1irq(irq); 162 disable_bigsur_l1irq(irq);
176 else 163 else
@@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq)
179 166
180static void end_bigsur_irq(unsigned int irq) 167static void end_bigsur_irq(unsigned int irq)
181{ 168{
182 DPRINTK("end_bigsur_irq IRQ %d\n", irq); 169 pr_debug("end_bigsur_irq IRQ %d\n", irq);
183 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { 170 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) {
184 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 171 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
185 enable_bigsur_l1irq(irq); 172 enable_bigsur_l1irq(irq);
@@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
193 u8 mask; 180 u8 mask;
194 u32 reg; 181 u32 reg;
195 182
196 DPRINTK("startup_bigsur_irq IRQ %d\n", irq); 183 pr_debug("startup_bigsur_irq IRQ %d\n", irq);
197 184
198 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { 185 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) {
199 /* Enable the L1 IRQ */ 186 /* Enable the L1 IRQ */
@@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq)
218 205
219static void shutdown_bigsur_irq(unsigned int irq) 206static void shutdown_bigsur_irq(unsigned int irq)
220{ 207{
221 DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq); 208 pr_debug("shutdown_bigsur_irq IRQ %d\n", irq);
222 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) 209 if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH)
223 disable_bigsur_l1irq(irq); 210 disable_bigsur_l1irq(irq);
224 else 211 else
@@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) {
260 disable_bigsur_l1irq(irq); 247 disable_bigsur_l1irq(irq);
261 return; 248 return;
262 } 249 }
263 DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq); 250 pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq);
264 return; 251 return;
265} 252}
266 253
@@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) {
277 disable_bigsur_l2irq(irq); 264 disable_bigsur_l2irq(irq);
278 return; 265 return;
279 } 266 }
280 DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq); 267 pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq);
281 return; 268 return;
282} 269}
283 270
diff --git a/arch/sh/boards/bigsur/setup.c b/arch/sh/boards/bigsur/setup.c
index dfeede9da50f..9711c20fc9e4 100644
--- a/arch/sh/boards/bigsur/setup.c
+++ b/arch/sh/boards/bigsur/setup.c
@@ -41,31 +41,7 @@
41// Big Sur Init Routines 41// Big Sur Init Routines
42/*===========================================================*/ 42/*===========================================================*/
43 43
44const char *get_system_type(void) 44static void __init bigsur_setup(char **cmdline_p)
45{
46 return "Big Sur";
47}
48
49/*
50 * The Machine Vector
51 */
52extern void heartbeat_bigsur(void);
53extern void init_bigsur_IRQ(void);
54
55struct sh_machine_vector mv_bigsur __initmv = {
56 .mv_nr_irqs = NR_IRQS, // Defined in <asm/irq.h>
57
58 .mv_isa_port2addr = bigsur_isa_port2addr,
59 .mv_irq_demux = bigsur_irq_demux,
60
61 .mv_init_irq = init_bigsur_IRQ,
62#ifdef CONFIG_HEARTBEAT
63 .mv_heartbeat = heartbeat_bigsur,
64#endif
65};
66ALIAS_MV(bigsur)
67
68int __init platform_setup(void)
69{ 45{
70 /* Mask all 2nd level IRQ's */ 46 /* Mask all 2nd level IRQ's */
71 outb(-1,BIGSUR_IMR0); 47 outb(-1,BIGSUR_IMR0);
@@ -89,7 +65,24 @@ int __init platform_setup(void)
89 outw(1, BIGSUR_ETHR+0xe); 65 outw(1, BIGSUR_ETHR+0xe);
90 /* set the IO port to BIGSUR_ETHER_IOPORT */ 66 /* set the IO port to BIGSUR_ETHER_IOPORT */
91 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2); 67 outw(BIGSUR_ETHER_IOPORT<<3, BIGSUR_ETHR+0x2);
92
93 return 0;
94} 68}
95 69
70/*
71 * The Machine Vector
72 */
73extern void heartbeat_bigsur(void);
74extern void init_bigsur_IRQ(void);
75
76struct sh_machine_vector mv_bigsur __initmv = {
77 .mv_name = "Big Sur",
78 .mv_setup = bigsur_setup,
79
80 .mv_isa_port2addr = bigsur_isa_port2addr,
81 .mv_irq_demux = bigsur_irq_demux,
82
83 .mv_init_irq = init_bigsur_IRQ,
84#ifdef CONFIG_HEARTBEAT
85 .mv_heartbeat = heartbeat_bigsur,
86#endif
87};
88ALIAS_MV(bigsur)
diff --git a/arch/sh/boards/cat68701/Makefile b/arch/sh/boards/cat68701/Makefile
deleted file mode 100644
index 52c1de0a6dfd..000000000000
--- a/arch/sh/boards/cat68701/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the CAT-68701 specific parts of the kernel
3#
4
5obj-y := setup.o irq.o
6
diff --git a/arch/sh/boards/cat68701/irq.c b/arch/sh/boards/cat68701/irq.c
deleted file mode 100644
index f9a6d185fb8b..000000000000
--- a/arch/sh/boards/cat68701/irq.c
+++ /dev/null
@@ -1,28 +0,0 @@
1/*
2 * linux/arch/sh/boards/cat68701/irq.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * 2001 Yutaro Ebihara
6 *
7 * Setup routines for A-ONE Corp CAT-68701 SH7708 Board
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#include <asm/irq.h>
16
17int cat68701_irq_demux(int irq)
18{
19 if(irq==13) return 14;
20 if(irq==7) return 10;
21 return irq;
22}
23
24void init_cat68701_IRQ()
25{
26 make_imask_irq(10);
27 make_imask_irq(14);
28}
diff --git a/arch/sh/boards/cat68701/setup.c b/arch/sh/boards/cat68701/setup.c
deleted file mode 100644
index 90e5175df227..000000000000
--- a/arch/sh/boards/cat68701/setup.c
+++ /dev/null
@@ -1,85 +0,0 @@
1/*
2 * linux/arch/sh/boards/cat68701/setup.c
3 *
4 * Copyright (C) 2000 Niibe Yutaka
5 * 2001 Yutaro Ebihara
6 *
7 * Setup routines for A-ONE Corp CAT-68701 SH7708 Board
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 *
13 */
14
15#include <asm/io.h>
16#include <asm/machvec.h>
17#include <asm/mach/io.h>
18#include <linux/module.h>
19#include <linux/init.h>
20#include <linux/sched.h>
21
22const char *get_system_type(void)
23{
24 return "CAT-68701";
25}
26
27#ifdef CONFIG_HEARTBEAT
28void heartbeat_cat68701()
29{
30 static unsigned int cnt = 0, period = 0 , bit = 0;
31 cnt += 1;
32 if (cnt < period) {
33 return;
34 }
35 cnt = 0;
36
37 /* Go through the points (roughly!):
38 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
39 */
40 period = 110 - ( (300<<FSHIFT)/
41 ((avenrun[0]/5) + (3<<FSHIFT)) );
42
43 if(bit){ bit=0; }else{ bit=1; }
44 outw(bit<<15,0x3fe);
45}
46#endif /* CONFIG_HEARTBEAT */
47
48unsigned long cat68701_isa_port2addr(unsigned long offset)
49{
50 /* CompactFlash (IDE) */
51 if (((offset >= 0x1f0) && (offset <= 0x1f7)) || (offset==0x3f6))
52 return 0xba000000 + offset;
53
54 /* INPUT PORT */
55 if ((offset >= 0x3fc) && (offset <= 0x3fd))
56 return 0xb4007000 + offset;
57
58 /* OUTPUT PORT */
59 if ((offset >= 0x3fe) && (offset <= 0x3ff))
60 return 0xb4007400 + offset;
61
62 return offset + 0xb4000000; /* other I/O (EREA 5)*/
63}
64
65/*
66 * The Machine Vector
67 */
68
69struct sh_machine_vector mv_cat68701 __initmv = {
70 .mv_nr_irqs = 32,
71 .mv_isa_port2addr = cat68701_isa_port2addr,
72 .mv_irq_demux = cat68701_irq_demux,
73
74 .mv_init_irq = init_cat68701_IRQ,
75#ifdef CONFIG_HEARTBEAT
76 .mv_heartbeat = heartbeat_cat68701,
77#endif
78};
79ALIAS_MV(cat68701)
80
81int __init platform_setup(void)
82{
83 /* dummy read erea5 (CS8900A) */
84}
85
diff --git a/arch/sh/boards/cqreek/Makefile b/arch/sh/boards/cqreek/Makefile
deleted file mode 100644
index 1a788a85eba3..000000000000
--- a/arch/sh/boards/cqreek/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the CqREEK specific parts of the kernel
3#
4
5obj-y := setup.o irq.o
6
diff --git a/arch/sh/boards/cqreek/irq.c b/arch/sh/boards/cqreek/irq.c
deleted file mode 100644
index 2955adc52310..000000000000
--- a/arch/sh/boards/cqreek/irq.c
+++ /dev/null
@@ -1,128 +0,0 @@
1/* $Id: irq.c,v 1.1.2.4 2002/11/04 20:33:56 lethal Exp $
2 *
3 * arch/sh/boards/cqreek/irq.c
4 *
5 * Copyright (C) 2000 Niibe Yutaka
6 *
7 * CqREEK IDE/ISA Bridge Support.
8 *
9 */
10
11#include <linux/irq.h>
12#include <linux/init.h>
13
14#include <asm/cqreek/cqreek.h>
15#include <asm/io.h>
16#include <asm/io_generic.h>
17#include <asm/irq.h>
18#include <asm/machvec.h>
19#include <asm/machvec_init.h>
20#include <asm/rtc.h>
21
22struct cqreek_irq_data {
23 unsigned short mask_port; /* Port of Interrupt Mask Register */
24 unsigned short stat_port; /* Port of Interrupt Status Register */
25 unsigned short bit; /* Value of the bit */
26};
27static struct cqreek_irq_data cqreek_irq_data[NR_IRQS];
28
29static void disable_cqreek_irq(unsigned int irq)
30{
31 unsigned long flags;
32 unsigned short mask;
33 unsigned short mask_port = cqreek_irq_data[irq].mask_port;
34 unsigned short bit = cqreek_irq_data[irq].bit;
35
36 local_irq_save(flags);
37 /* Disable IRQ */
38 mask = inw(mask_port) & ~bit;
39 outw_p(mask, mask_port);
40 local_irq_restore(flags);
41}
42
43static void enable_cqreek_irq(unsigned int irq)
44{
45 unsigned long flags;
46 unsigned short mask;
47 unsigned short mask_port = cqreek_irq_data[irq].mask_port;
48 unsigned short bit = cqreek_irq_data[irq].bit;
49
50 local_irq_save(flags);
51 /* Enable IRQ */
52 mask = inw(mask_port) | bit;
53 outw_p(mask, mask_port);
54 local_irq_restore(flags);
55}
56
57static void mask_and_ack_cqreek(unsigned int irq)
58{
59 unsigned short stat_port = cqreek_irq_data[irq].stat_port;
60 unsigned short bit = cqreek_irq_data[irq].bit;
61
62 disable_cqreek_irq(irq);
63 /* Clear IRQ (it might be edge IRQ) */
64 inw(stat_port);
65 outw_p(bit, stat_port);
66}
67
68static void end_cqreek_irq(unsigned int irq)
69{
70 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
71 enable_cqreek_irq(irq);
72}
73
74static unsigned int startup_cqreek_irq(unsigned int irq)
75{
76 enable_cqreek_irq(irq);
77 return 0;
78}
79
80static void shutdown_cqreek_irq(unsigned int irq)
81{
82 disable_cqreek_irq(irq);
83}
84
85static struct hw_interrupt_type cqreek_irq_type = {
86 .typename = "CqREEK-IRQ",
87 .startup = startup_cqreek_irq,
88 .shutdown = shutdown_cqreek_irq,
89 .enable = enable_cqreek_irq,
90 .disable = disable_cqreek_irq,
91 .ack = mask_and_ack_cqreek,
92 .end = end_cqreek_irq
93};
94
95int cqreek_has_ide, cqreek_has_isa;
96
97/* XXX: This is just for test for my NE2000 ISA board
98 What we really need is virtualized IRQ and demultiplexer like HP600 port */
99void __init init_cqreek_IRQ(void)
100{
101 if (cqreek_has_ide) {
102 cqreek_irq_data[14].mask_port = BRIDGE_IDE_INTR_MASK;
103 cqreek_irq_data[14].stat_port = BRIDGE_IDE_INTR_STAT;
104 cqreek_irq_data[14].bit = 1;
105
106 irq_desc[14].chip = &cqreek_irq_type;
107 irq_desc[14].status = IRQ_DISABLED;
108 irq_desc[14].action = 0;
109 irq_desc[14].depth = 1;
110
111 disable_cqreek_irq(14);
112 }
113
114 if (cqreek_has_isa) {
115 cqreek_irq_data[10].mask_port = BRIDGE_ISA_INTR_MASK;
116 cqreek_irq_data[10].stat_port = BRIDGE_ISA_INTR_STAT;
117 cqreek_irq_data[10].bit = (1 << 10);
118
119 /* XXX: Err... we may need demultiplexer for ISA irq... */
120 irq_desc[10].chip = &cqreek_irq_type;
121 irq_desc[10].status = IRQ_DISABLED;
122 irq_desc[10].action = 0;
123 irq_desc[10].depth = 1;
124
125 disable_cqreek_irq(10);
126 }
127}
128
diff --git a/arch/sh/boards/cqreek/setup.c b/arch/sh/boards/cqreek/setup.c
deleted file mode 100644
index eff4ed93599f..000000000000
--- a/arch/sh/boards/cqreek/setup.c
+++ /dev/null
@@ -1,100 +0,0 @@
1/* $Id: setup.c,v 1.5 2003/08/04 01:51:58 lethal Exp $
2 *
3 * arch/sh/kernel/setup_cqreek.c
4 *
5 * Copyright (C) 2000 Niibe Yutaka
6 *
7 * CqREEK IDE/ISA Bridge Support.
8 *
9 */
10
11#include <linux/kernel.h>
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/mach/cqreek.h>
16#include <asm/machvec.h>
17#include <asm/io.h>
18#include <asm/io_generic.h>
19#include <asm/irq.h>
20#include <asm/rtc.h>
21
22#define IDE_OFFSET 0xA4000000UL
23#define ISA_OFFSET 0xA4A00000UL
24
25const char *get_system_type(void)
26{
27 return "CqREEK";
28}
29
30static unsigned long cqreek_port2addr(unsigned long port)
31{
32 if (0x0000<=port && port<=0x0040)
33 return IDE_OFFSET + port;
34 if ((0x01f0<=port && port<=0x01f7) || port == 0x03f6)
35 return IDE_OFFSET + port;
36
37 return ISA_OFFSET + port;
38}
39
40/*
41 * The Machine Vector
42 */
43struct sh_machine_vector mv_cqreek __initmv = {
44#if defined(CONFIG_CPU_SH4)
45 .mv_nr_irqs = 48,
46#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
47 .mv_nr_irqs = 32,
48#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
49 .mv_nr_irqs = 61,
50#endif
51
52 .mv_init_irq = init_cqreek_IRQ,
53
54 .mv_isa_port2addr = cqreek_port2addr,
55};
56ALIAS_MV(cqreek)
57
58/*
59 * Initialize the board
60 */
61void __init platform_setup(void)
62{
63 int i;
64/* udelay is not available at setup time yet... */
65#define DELAY() do {for (i=0; i<10000; i++) ctrl_inw(0xa0000000);} while(0)
66
67 if ((inw (BRIDGE_FEATURE) & 1)) { /* We have IDE interface */
68 outw_p(0, BRIDGE_IDE_INTR_LVL);
69 outw_p(0, BRIDGE_IDE_INTR_MASK);
70
71 outw_p(0, BRIDGE_IDE_CTRL);
72 DELAY();
73
74 outw_p(0x8000, BRIDGE_IDE_CTRL);
75 DELAY();
76
77 outw_p(0xffff, BRIDGE_IDE_INTR_STAT); /* Clear interrupt status */
78 outw_p(0x0f-14, BRIDGE_IDE_INTR_LVL); /* Use 14 IPR */
79 outw_p(1, BRIDGE_IDE_INTR_MASK); /* Enable interrupt */
80 cqreek_has_ide=1;
81 }
82
83 if ((inw (BRIDGE_FEATURE) & 2)) { /* We have ISA interface */
84 outw_p(0, BRIDGE_ISA_INTR_LVL);
85 outw_p(0, BRIDGE_ISA_INTR_MASK);
86
87 outw_p(0, BRIDGE_ISA_CTRL);
88 DELAY();
89 outw_p(0x8000, BRIDGE_ISA_CTRL);
90 DELAY();
91
92 outw_p(0xffff, BRIDGE_ISA_INTR_STAT); /* Clear interrupt status */
93 outw_p(0x0f-10, BRIDGE_ISA_INTR_LVL); /* Use 10 IPR */
94 outw_p(0xfff8, BRIDGE_ISA_INTR_MASK); /* Enable interrupt */
95 cqreek_has_isa=1;
96 }
97
98 printk(KERN_INFO "CqREEK Setup (IDE=%d, ISA=%d)...done\n", cqreek_has_ide, cqreek_has_isa);
99}
100
diff --git a/arch/sh/boards/dmida/Makefile b/arch/sh/boards/dmida/Makefile
deleted file mode 100644
index 75999aa0a2d9..000000000000
--- a/arch/sh/boards/dmida/Makefile
+++ /dev/null
@@ -1,7 +0,0 @@
1#
2# Makefile for the DataMyte Industrial Digital Assistant(tm) specific parts
3# of the kernel
4#
5
6obj-y := mach.o
7
diff --git a/arch/sh/boards/dmida/mach.c b/arch/sh/boards/dmida/mach.c
deleted file mode 100644
index d03a25f989c2..000000000000
--- a/arch/sh/boards/dmida/mach.c
+++ /dev/null
@@ -1,59 +0,0 @@
1/*
2 * linux/arch/sh/boards/dmida/mach.c
3 *
4 * by Greg Banks <gbanks@pocketpenguins.com>
5 * (c) 2000 PocketPenguins Inc
6 *
7 * Derived from mach_hp600.c, which bore the message:
8 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
9 *
10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information.
12 *
13 * Machine vector for the DataMyte Industrial Digital Assistant(tm).
14 * See http://www.dmida.com
15 *
16 */
17
18#include <linux/init.h>
19
20#include <asm/machvec.h>
21#include <asm/rtc.h>
22#include <asm/machvec_init.h>
23
24#include <asm/io.h>
25#include <asm/hd64465/hd64465.h>
26#include <asm/irq.h>
27
28/*
29 * The Machine Vector
30 */
31
32struct sh_machine_vector mv_dmida __initmv = {
33 .mv_nr_irqs = HD64465_IRQ_BASE+HD64465_IRQ_NUM,
34
35 .mv_inb = hd64465_inb,
36 .mv_inw = hd64465_inw,
37 .mv_inl = hd64465_inl,
38 .mv_outb = hd64465_outb,
39 .mv_outw = hd64465_outw,
40 .mv_outl = hd64465_outl,
41
42 .mv_inb_p = hd64465_inb_p,
43 .mv_inw_p = hd64465_inw,
44 .mv_inl_p = hd64465_inl,
45 .mv_outb_p = hd64465_outb_p,
46 .mv_outw_p = hd64465_outw,
47 .mv_outl_p = hd64465_outl,
48
49 .mv_insb = hd64465_insb,
50 .mv_insw = hd64465_insw,
51 .mv_insl = hd64465_insl,
52 .mv_outsb = hd64465_outsb,
53 .mv_outsw = hd64465_outsw,
54 .mv_outsl = hd64465_outsl,
55
56 .mv_irq_demux = hd64465_irq_demux,
57};
58ALIAS_MV(dmida)
59
diff --git a/arch/sh/boards/dreamcast/irq.c b/arch/sh/boards/dreamcast/irq.c
index b10a6b11c034..5bf01f86c20c 100644
--- a/arch/sh/boards/dreamcast/irq.c
+++ b/arch/sh/boards/dreamcast/irq.c
@@ -10,7 +10,6 @@
10 */ 10 */
11 11
12#include <linux/irq.h> 12#include <linux/irq.h>
13
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/irq.h> 14#include <asm/irq.h>
16#include <asm/dreamcast/sysasic.h> 15#include <asm/dreamcast/sysasic.h>
@@ -26,10 +25,10 @@
26 event. 25 event.
27 26
28 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event 27 There are three 32-bit ESRs located at 0xa05f8900 - 0xa05f6908. Event
29 types can be found in include/asm-sh/dc_sysasic.h. There are three groups 28 types can be found in include/asm-sh/dreamcast/sysasic.h. There are three
30 of EMRs that parallel the ESRs. Each EMR group corresponds to an IRQ, so 29 groups of EMRs that parallel the ESRs. Each EMR group corresponds to an
31 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928 triggers 30 IRQ, so 0xa05f6910 - 0xa05f6918 triggers IRQ 13, 0xa05f6920 - 0xa05f6928
32 IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9. 31 triggers IRQ 11, and 0xa05f6930 - 0xa05f6938 triggers IRQ 9.
33 32
34 In the kernel, these events are mapped to virtual IRQs so that drivers can 33 In the kernel, these events are mapped to virtual IRQs so that drivers can
35 respond to them as they would a normal interrupt. In order to keep this 34 respond to them as they would a normal interrupt. In order to keep this
@@ -57,29 +56,23 @@
57/* Disable the hardware event by masking its bit in its EMR */ 56/* Disable the hardware event by masking its bit in its EMR */
58static inline void disable_systemasic_irq(unsigned int irq) 57static inline void disable_systemasic_irq(unsigned int irq)
59{ 58{
60 unsigned long flags;
61 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 59 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
62 __u32 mask; 60 __u32 mask;
63 61
64 local_irq_save(flags);
65 mask = inl(emr); 62 mask = inl(emr);
66 mask &= ~(1 << EVENT_BIT(irq)); 63 mask &= ~(1 << EVENT_BIT(irq));
67 outl(mask, emr); 64 outl(mask, emr);
68 local_irq_restore(flags);
69} 65}
70 66
71/* Enable the hardware event by setting its bit in its EMR */ 67/* Enable the hardware event by setting its bit in its EMR */
72static inline void enable_systemasic_irq(unsigned int irq) 68static inline void enable_systemasic_irq(unsigned int irq)
73{ 69{
74 unsigned long flags;
75 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2); 70 __u32 emr = EMR_BASE + (LEVEL(irq) << 4) + (LEVEL(irq) << 2);
76 __u32 mask; 71 __u32 mask;
77 72
78 local_irq_save(flags);
79 mask = inl(emr); 73 mask = inl(emr);
80 mask |= (1 << EVENT_BIT(irq)); 74 mask |= (1 << EVENT_BIT(irq));
81 outl(mask, emr); 75 outl(mask, emr);
82 local_irq_restore(flags);
83} 76}
84 77
85/* Acknowledge a hardware event by writing its bit back to its ESR */ 78/* Acknowledge a hardware event by writing its bit back to its ESR */
diff --git a/arch/sh/boards/dreamcast/rtc.c b/arch/sh/boards/dreamcast/rtc.c
index 379de1629134..b3a876a3b859 100644
--- a/arch/sh/boards/dreamcast/rtc.c
+++ b/arch/sh/boards/dreamcast/rtc.c
@@ -1,4 +1,5 @@
1/* arch/sh/kernel/rtc-aica.c 1/*
2 * arch/sh/boards/dreamcast/rtc.c
2 * 3 *
3 * Dreamcast AICA RTC routines. 4 * Dreamcast AICA RTC routines.
4 * 5 *
@@ -10,15 +11,12 @@
10 */ 11 */
11 12
12#include <linux/time.h> 13#include <linux/time.h>
13 14#include <asm/rtc.h>
14#include <asm/io.h> 15#include <asm/io.h>
15 16
16extern void (*rtc_get_time)(struct timespec *);
17extern int (*rtc_set_time)(const time_t);
18
19/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in 17/* The AICA RTC has an Epoch of 1/1/1950, so we must subtract 20 years (in
20 seconds to get the standard Unix Epoch when getting the time, and add 20 18 seconds) to get the standard Unix Epoch when getting the time, and add
21 years when setting the time. */ 19 20 years when setting the time. */
22#define TWENTY_YEARS ((20 * 365LU + 5) * 86400) 20#define TWENTY_YEARS ((20 * 365LU + 5) * 86400)
23 21
24/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit 22/* The AICA RTC is represented by a 32-bit seconds counter stored in 2 16-bit
@@ -32,7 +30,8 @@ extern int (*rtc_set_time)(const time_t);
32 * 30 *
33 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch. 31 * Grabs the current RTC seconds counter and adjusts it to the Unix Epoch.
34 */ 32 */
35void aica_rtc_gettimeofday(struct timespec *ts) { 33void aica_rtc_gettimeofday(struct timespec *ts)
34{
36 unsigned long val1, val2; 35 unsigned long val1, val2;
37 36
38 do { 37 do {
@@ -55,7 +54,8 @@ void aica_rtc_gettimeofday(struct timespec *ts) {
55 * 54 *
56 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter. 55 * Adjusts the given @tv to the AICA Epoch and sets the RTC seconds counter.
57 */ 56 */
58int aica_rtc_settimeofday(const time_t secs) { 57int aica_rtc_settimeofday(const time_t secs)
58{
59 unsigned long val1, val2; 59 unsigned long val1, val2;
60 unsigned long adj = secs + TWENTY_YEARS; 60 unsigned long adj = secs + TWENTY_YEARS;
61 61
@@ -75,7 +75,7 @@ int aica_rtc_settimeofday(const time_t secs) {
75 75
76void aica_time_init(void) 76void aica_time_init(void)
77{ 77{
78 rtc_get_time = aica_rtc_gettimeofday; 78 rtc_sh_get_time = aica_rtc_gettimeofday;
79 rtc_set_time = aica_rtc_settimeofday; 79 rtc_sh_set_time = aica_rtc_settimeofday;
80} 80}
81 81
diff --git a/arch/sh/boards/dreamcast/setup.c b/arch/sh/boards/dreamcast/setup.c
index 0027b80a2343..f13017eeeb27 100644
--- a/arch/sh/boards/dreamcast/setup.c
+++ b/arch/sh/boards/dreamcast/setup.c
@@ -22,41 +22,21 @@
22#include <linux/init.h> 22#include <linux/init.h>
23#include <linux/irq.h> 23#include <linux/irq.h>
24#include <linux/device.h> 24#include <linux/device.h>
25
26#include <asm/io.h> 25#include <asm/io.h>
27#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/rtc.h>
28#include <asm/machvec.h> 28#include <asm/machvec.h>
29#include <asm/machvec_init.h>
30#include <asm/mach/sysasic.h> 29#include <asm/mach/sysasic.h>
31 30
32extern struct hw_interrupt_type systemasic_int; 31extern struct hw_interrupt_type systemasic_int;
33/* XXX: Move this into it's proper header. */
34extern void (*board_time_init)(void);
35extern void aica_time_init(void); 32extern void aica_time_init(void);
36extern int gapspci_init(void); 33extern int gapspci_init(void);
37extern int systemasic_irq_demux(int); 34extern int systemasic_irq_demux(int);
38 35
39void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, int); 36void *dreamcast_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
40int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t); 37int dreamcast_consistent_free(struct device *, size_t, void *, dma_addr_t);
41 38
42const char *get_system_type(void) 39static void __init dreamcast_setup(char **cmdline_p)
43{
44 return "Sega Dreamcast";
45}
46
47struct sh_machine_vector mv_dreamcast __initmv = {
48 .mv_nr_irqs = NR_IRQS,
49
50 .mv_irq_demux = systemasic_irq_demux,
51
52#ifdef CONFIG_PCI
53 .mv_consistent_alloc = dreamcast_consistent_alloc,
54 .mv_consistent_free = dreamcast_consistent_free,
55#endif
56};
57ALIAS_MV(dreamcast)
58
59int __init platform_setup(void)
60{ 40{
61 int i; 41 int i;
62 42
@@ -78,6 +58,16 @@ int __init platform_setup(void)
78 if (gapspci_init() < 0) 58 if (gapspci_init() < 0)
79 printk(KERN_WARNING "GAPSPCI was not detected.\n"); 59 printk(KERN_WARNING "GAPSPCI was not detected.\n");
80#endif 60#endif
81
82 return 0;
83} 61}
62
63struct sh_machine_vector mv_dreamcast __initmv = {
64 .mv_name = "Sega Dreamcast",
65 .mv_setup = dreamcast_setup,
66 .mv_irq_demux = systemasic_irq_demux,
67
68#ifdef CONFIG_PCI
69 .mv_consistent_alloc = dreamcast_consistent_alloc,
70 .mv_consistent_free = dreamcast_consistent_free,
71#endif
72};
73ALIAS_MV(dreamcast)
diff --git a/arch/sh/boards/ec3104/setup.c b/arch/sh/boards/ec3104/setup.c
index 4b3ef16a0e96..902bc975a13e 100644
--- a/arch/sh/boards/ec3104/setup.c
+++ b/arch/sh/boards/ec3104/setup.c
@@ -21,22 +21,36 @@
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/irq.h> 22#include <linux/irq.h>
23#include <linux/types.h> 23#include <linux/types.h>
24
25#include <asm/io.h> 24#include <asm/io.h>
26#include <asm/irq.h> 25#include <asm/irq.h>
27#include <asm/machvec.h> 26#include <asm/machvec.h>
28#include <asm/mach/ec3104.h> 27#include <asm/mach/ec3104.h>
29 28
30const char *get_system_type(void) 29static void __init ec3104_setup(char **cmdline_p)
31{ 30{
32 return "EC3104"; 31 char str[8];
32 int i;
33
34 for (i=0; i<8; i++)
35 str[i] = ctrl_readb(EC3104_BASE + i);
36
37 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
38 irq_desc[i].handler = &ec3104_int;
39
40 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
41 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
42
43 /* mask all interrupts. this should have been done by the boot
44 * loader for us but we want to be sure ... */
45 ctrl_writel(0xffffffff, EC3104_IMR);
33} 46}
34 47
35/* 48/*
36 * The Machine Vector 49 * The Machine Vector
37 */ 50 */
38
39struct sh_machine_vector mv_ec3104 __initmv = { 51struct sh_machine_vector mv_ec3104 __initmv = {
52 .mv_name = "EC3104",
53 .mv_setup = ec3104_setup,
40 .mv_nr_irqs = 96, 54 .mv_nr_irqs = 96,
41 55
42 .mv_inb = ec3104_inb, 56 .mv_inb = ec3104_inb,
@@ -48,31 +62,4 @@ struct sh_machine_vector mv_ec3104 __initmv = {
48 62
49 .mv_irq_demux = ec3104_irq_demux, 63 .mv_irq_demux = ec3104_irq_demux,
50}; 64};
51
52ALIAS_MV(ec3104) 65ALIAS_MV(ec3104)
53
54int __init platform_setup(void)
55{
56 char str[8];
57 int i;
58
59 if (0)
60 return 0;
61
62 for (i=0; i<8; i++)
63 str[i] = ctrl_readb(EC3104_BASE + i);
64
65 for (i = EC3104_IRQBASE; i < EC3104_IRQBASE + 32; i++)
66 irq_desc[i].chip = &ec3104_int;
67
68 printk("initializing EC3104 \"%.8s\" at %08x, IRQ %d, IRQ base %d\n",
69 str, EC3104_BASE, EC3104_IRQ, EC3104_IRQBASE);
70
71
72 /* mask all interrupts. this should have been done by the boot
73 * loader for us but we want to be sure ... */
74 ctrl_writel(0xffffffff, EC3104_IMR);
75
76 return 0;
77}
78
diff --git a/arch/sh/boards/harp/Makefile b/arch/sh/boards/harp/Makefile
deleted file mode 100644
index eb753d31812e..000000000000
--- a/arch/sh/boards/harp/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for STMicroelectronics board specific parts of the kernel
3#
4
5obj-y := irq.o setup.o mach.o led.o
6
7obj-$(CONFIG_PCI) += pcidma.o
8
diff --git a/arch/sh/boards/harp/irq.c b/arch/sh/boards/harp/irq.c
deleted file mode 100644
index 96bb41c9fc55..000000000000
--- a/arch/sh/boards/harp/irq.c
+++ /dev/null
@@ -1,147 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Looks after interrupts on the HARP board.
8 *
9 * Bases on the IPR irq system
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/system.h>
16#include <asm/io.h>
17#include <asm/harp/harp.h>
18
19
20#define NUM_EXTERNAL_IRQS 16
21
22// Early versions of the STB1 Overdrive required this nasty frig
23//#define INVERT_INTMASK_WRITES
24
25static void enable_harp_irq(unsigned int irq);
26static void disable_harp_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_harp_irq disable_harp_irq
30
31static void mask_and_ack_harp(unsigned int);
32static void end_harp_irq(unsigned int irq);
33
34static unsigned int startup_harp_irq(unsigned int irq)
35{
36 enable_harp_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static struct hw_interrupt_type harp_irq_type = {
41 .typename = "Harp-IRQ",
42 .startup = startup_harp_irq,
43 .shutdown = shutdown_harp_irq,
44 .enable = enable_harp_irq,
45 .disable = disable_harp_irq,
46 .ack = mask_and_ack_harp,
47 .end = end_harp_irq
48};
49
50static void disable_harp_irq(unsigned int irq)
51{
52 unsigned val, flags;
53 unsigned maskReg;
54 unsigned mask;
55 int pri;
56
57 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
58 return;
59
60 pri = 15 - irq;
61
62 if (pri < 8) {
63 maskReg = EPLD_INTMASK0;
64 } else {
65 maskReg = EPLD_INTMASK1;
66 pri -= 8;
67 }
68
69 local_irq_save(flags);
70 mask = ctrl_inl(maskReg);
71 mask &= (~(1 << pri));
72#if defined(INVERT_INTMASK_WRITES)
73 mask ^= 0xff;
74#endif
75 ctrl_outl(mask, maskReg);
76 local_irq_restore(flags);
77}
78
79static void enable_harp_irq(unsigned int irq)
80{
81 unsigned flags;
82 unsigned maskReg;
83 unsigned mask;
84 int pri;
85
86 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
87 return;
88
89 pri = 15 - irq;
90
91 if (pri < 8) {
92 maskReg = EPLD_INTMASK0;
93 } else {
94 maskReg = EPLD_INTMASK1;
95 pri -= 8;
96 }
97
98 local_irq_save(flags);
99 mask = ctrl_inl(maskReg);
100
101
102 mask |= (1 << pri);
103
104#if defined(INVERT_INTMASK_WRITES)
105 mask ^= 0xff;
106#endif
107 ctrl_outl(mask, maskReg);
108
109 local_irq_restore(flags);
110}
111
112/* This functions sets the desired irq handler to be an overdrive type */
113static void __init make_harp_irq(unsigned int irq)
114{
115 disable_irq_nosync(irq);
116 irq_desc[irq].chip = &harp_irq_type;
117 disable_harp_irq(irq);
118}
119
120static void mask_and_ack_harp(unsigned int irq)
121{
122 disable_harp_irq(irq);
123}
124
125static void end_harp_irq(unsigned int irq)
126{
127 enable_harp_irq(irq);
128}
129
130void __init init_harp_irq(void)
131{
132 int i;
133
134#if !defined(INVERT_INTMASK_WRITES)
135 // On the harp these are set to enable an interrupt
136 ctrl_outl(0x00, EPLD_INTMASK0);
137 ctrl_outl(0x00, EPLD_INTMASK1);
138#else
139 // On the Overdrive the data is inverted before being stored in the reg
140 ctrl_outl(0xff, EPLD_INTMASK0);
141 ctrl_outl(0xff, EPLD_INTMASK1);
142#endif
143
144 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) {
145 make_harp_irq(i);
146 }
147}
diff --git a/arch/sh/boards/harp/led.c b/arch/sh/boards/harp/led.c
deleted file mode 100644
index aeb7b392b190..000000000000
--- a/arch/sh/boards/harp/led.c
+++ /dev/null
@@ -1,51 +0,0 @@
1/*
2 * linux/arch/sh/stboards/led.c
3 *
4 * Copyright (C) 2000 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains ST40STB1 HARP and compatible code.
10 */
11
12#include <asm/io.h>
13#include <asm/harp/harp.h>
14
15/* Harp: Flash LD10 (front pannel) connected to EPLD (IC8) */
16/* Overdrive: Flash LD1 (front panel) connected to EPLD (IC4) */
17/* Works for HARP and overdrive */
18static void mach_led(int position, int value)
19{
20 if (value) {
21 ctrl_outl(EPLD_LED_ON, EPLD_LED);
22 } else {
23 ctrl_outl(EPLD_LED_OFF, EPLD_LED);
24 }
25}
26
27#ifdef CONFIG_HEARTBEAT
28
29#include <linux/sched.h>
30
31/* acts like an actual heart beat -- ie thump-thump-pause... */
32void heartbeat_harp(void)
33{
34 static unsigned cnt = 0, period = 0, dist = 0;
35
36 if (cnt == 0 || cnt == dist)
37 mach_led( -1, 1);
38 else if (cnt == 7 || cnt == dist+7)
39 mach_led( -1, 0);
40
41 if (++cnt > period) {
42 cnt = 0;
43 /* The hyperbolic function below modifies the heartbeat period
44 * length in dependency of the current (5min) load. It goes
45 * through the points f(0)=126, f(1)=86, f(5)=51,
46 * f(inf)->30. */
47 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
48 dist = period / 4;
49 }
50}
51#endif
diff --git a/arch/sh/boards/harp/mach.c b/arch/sh/boards/harp/mach.c
deleted file mode 100644
index a946dd1674ca..000000000000
--- a/arch/sh/boards/harp/mach.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/sh/boards/harp/mach.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the STMicroelectronics STB1 HARP and compatible boards
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17#include <asm/hd64465/io.h>
18#include <asm/hd64465/hd64465.h>
19
20void setup_harp(void);
21void init_harp_irq(void);
22void heartbeat_harp(void);
23
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_harp __initmv = {
29 .mv_nr_irqs = 89 + HD64465_IRQ_NUM,
30
31 .mv_inb = hd64465_inb,
32 .mv_inw = hd64465_inw,
33 .mv_inl = hd64465_inl,
34 .mv_outb = hd64465_outb,
35 .mv_outw = hd64465_outw,
36 .mv_outl = hd64465_outl,
37
38 .mv_inb_p = hd64465_inb_p,
39 .mv_inw_p = hd64465_inw,
40 .mv_inl_p = hd64465_inl,
41 .mv_outb_p = hd64465_outb_p,
42 .mv_outw_p = hd64465_outw,
43 .mv_outl_p = hd64465_outl,
44
45 .mv_insb = hd64465_insb,
46 .mv_insw = hd64465_insw,
47 .mv_insl = hd64465_insl,
48 .mv_outsb = hd64465_outsb,
49 .mv_outsw = hd64465_outsw,
50 .mv_outsl = hd64465_outsl,
51
52 .mv_isa_port2addr = hd64465_isa_port2addr,
53
54#ifdef CONFIG_PCI
55 .mv_init_irq = init_harp_irq,
56#endif
57#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_harp,
59#endif
60};
61
62ALIAS_MV(harp)
diff --git a/arch/sh/boards/harp/pcidma.c b/arch/sh/boards/harp/pcidma.c
deleted file mode 100644
index 475311390fd6..000000000000
--- a/arch/sh/boards/harp/pcidma.c
+++ /dev/null
@@ -1,42 +0,0 @@
1/*
2 * Copyright (C) 2001 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Dynamic DMA mapping support.
8 */
9
10#include <linux/types.h>
11#include <linux/mm.h>
12#include <linux/string.h>
13#include <linux/pci.h>
14#include <asm/io.h>
15#include <asm/addrspace.h>
16
17
18void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
19 dma_addr_t * dma_handle)
20{
21 void *ret;
22 int gfp = GFP_ATOMIC;
23
24 ret = (void *) __get_free_pages(gfp, get_order(size));
25
26 if (ret != NULL) {
27 /* Is it neccessary to do the memset? */
28 memset(ret, 0, size);
29 *dma_handle = virt_to_bus(ret);
30 }
31 /* We must flush the cache before we pass it on to the device */
32 flush_cache_all();
33 return P2SEGADDR(ret);
34}
35
36void pci_free_consistent(struct pci_dev *hwdev, size_t size,
37 void *vaddr, dma_addr_t dma_handle)
38{
39 unsigned long p1addr=P1SEGADDR((unsigned long)vaddr);
40
41 free_pages(p1addr, get_order(size));
42}
diff --git a/arch/sh/boards/harp/setup.c b/arch/sh/boards/harp/setup.c
deleted file mode 100644
index 886e450ab63e..000000000000
--- a/arch/sh/boards/harp/setup.c
+++ /dev/null
@@ -1,90 +0,0 @@
1/*
2 * arch/sh/stboard/setup.c
3 *
4 * Copyright (C) 2001 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * STMicroelectronics ST40STB1 HARP and compatible support.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <asm/io.h>
15#include <asm/harp/harp.h>
16
17const char *get_system_type(void)
18{
19 return "STB1 Harp";
20}
21
22/*
23 * Initialize the board
24 */
25int __init platform_setup(void)
26{
27#ifdef CONFIG_SH_STB1_HARP
28 unsigned long ic8_version, ic36_version;
29
30 ic8_version = ctrl_inl(EPLD_REVID2);
31 ic36_version = ctrl_inl(EPLD_REVID1);
32
33 printk("STMicroelectronics STB1 HARP initialisaton\n");
34 printk("EPLD versions: IC8: %d.%02d, IC36: %d.%02d\n",
35 (ic8_version >> 4) & 0xf, ic8_version & 0xf,
36 (ic36_version >> 4) & 0xf, ic36_version & 0xf);
37#elif defined(CONFIG_SH_STB1_OVERDRIVE)
38 unsigned long version;
39
40 version = ctrl_inl(EPLD_REVID);
41
42 printk("STMicroelectronics STB1 Overdrive initialisaton\n");
43 printk("EPLD version: %d.%02d\n",
44 (version >> 4) & 0xf, version & 0xf);
45#else
46#error Undefined machine
47#endif
48
49 /* Currently all STB1 chips have problems with the sleep instruction,
50 * so disable it here.
51 */
52 disable_hlt();
53
54 return 0;
55}
56
57/*
58 * pcibios_map_platform_irq
59 *
60 * This is board specific and returns the IRQ for a given PCI device.
61 * It is used by the PCI code (arch/sh/kernel/st40_pci*)
62 *
63 */
64
65#define HARP_PCI_IRQ 1
66#define HARP_BRIDGE_IRQ 2
67#define OVERDRIVE_SLOT0_IRQ 0
68
69
70int __init pcibios_map_platform_irq(struct pci_dev *dev, u8 slot, u8 pin)
71{
72 switch (slot) {
73#ifdef CONFIG_SH_STB1_HARP
74 case 2: /*This is the PCI slot on the */
75 return HARP_PCI_IRQ;
76 case 1: /* this is the bridge */
77 return HARP_BRIDGE_IRQ;
78#elif defined(CONFIG_SH_STB1_OVERDRIVE)
79 case 1:
80 case 2:
81 case 3:
82 return slot - 1;
83#else
84#error Unknown board
85#endif
86 default:
87 return -1;
88 }
89}
90
diff --git a/arch/sh/boards/hp6xx/Makefile b/arch/sh/boards/hp6xx/Makefile
index 927fe0aa5dfa..ff1b7f5b4e91 100644
--- a/arch/sh/boards/hp6xx/Makefile
+++ b/arch/sh/boards/hp6xx/Makefile
@@ -2,5 +2,6 @@
2# Makefile for the HP6xx specific parts of the kernel 2# Makefile for the HP6xx specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o 5obj-y := setup.o
6 6obj-$(CONFIG_PM) += pm.o pm_wakeup.o
7obj-$(CONFIG_APM) += hp6xx_apm.o
diff --git a/arch/sh/boards/hp6xx/hp6xx_apm.c b/arch/sh/boards/hp6xx/hp6xx_apm.c
new file mode 100644
index 000000000000..ad0e712c29f6
--- /dev/null
+++ b/arch/sh/boards/hp6xx/hp6xx_apm.c
@@ -0,0 +1,123 @@
1/*
2 * bios-less APM driver for hp680
3 *
4 * Copyright 2005 (c) Andriy Skulysh <askulysh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/config.h>
10#include <linux/module.h>
11#include <linux/apm_bios.h>
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <linux/interrupt.h>
15#include <asm/io.h>
16#include <asm/apm.h>
17#include <asm/adc.h>
18#include <asm/hp6xx/hp6xx.h>
19
20#define SH7709_PGDR 0xa400012c
21
22#define APM_CRITICAL 10
23#define APM_LOW 30
24
25#define HP680_BATTERY_MAX 875
26#define HP680_BATTERY_MIN 600
27#define HP680_BATTERY_AC_ON 900
28
29#define MODNAME "hp6x0_apm"
30
31static int hp6x0_apm_get_info(char *buf, char **start, off_t fpos, int length)
32{
33 u8 pgdr;
34 char *p;
35 int battery_status;
36 int battery_flag;
37 int ac_line_status;
38 int time_units = APM_BATTERY_LIFE_UNKNOWN;
39
40 int battery = adc_single(ADC_CHANNEL_BATTERY);
41 int backup = adc_single(ADC_CHANNEL_BACKUP);
42 int charging = adc_single(ADC_CHANNEL_CHARGE);
43 int percentage;
44
45 percentage = 100 * (battery - HP680_BATTERY_MIN) /
46 (HP680_BATTERY_MAX - HP680_BATTERY_MIN);
47
48 ac_line_status = (battery > HP680_BATTERY_AC_ON) ?
49 APM_AC_ONLINE : APM_AC_OFFLINE;
50
51 p = buf;
52
53 pgdr = ctrl_inb(SH7709_PGDR);
54 if (pgdr & PGDR_MAIN_BATTERY_OUT) {
55 battery_status = APM_BATTERY_STATUS_NOT_PRESENT;
56 battery_flag = 0x80;
57 percentage = -1;
58 } else if (charging < 8 ) {
59 battery_status = APM_BATTERY_STATUS_CHARGING;
60 battery_flag = 0x08;
61 ac_line_status = 0xff;
62 } else if (percentage <= APM_CRITICAL) {
63 battery_status = APM_BATTERY_STATUS_CRITICAL;
64 battery_flag = 0x04;
65 } else if (percentage <= APM_LOW) {
66 battery_status = APM_BATTERY_STATUS_LOW;
67 battery_flag = 0x02;
68 } else {
69 battery_status = APM_BATTERY_STATUS_HIGH;
70 battery_flag = 0x01;
71 }
72
73 p += sprintf(p, "1.0 1.2 0x%02x 0x%02x 0x%02x 0x%02x %d%% %d %s\n",
74 APM_32_BIT_SUPPORT,
75 ac_line_status,
76 battery_status,
77 battery_flag,
78 percentage,
79 time_units,
80 "min");
81 p += sprintf(p, "bat=%d backup=%d charge=%d\n",
82 battery, backup, charging);
83
84 return p - buf;
85}
86
87static irqreturn_t hp6x0_apm_interrupt(int irq, void *dev, struct pt_regs *regs)
88{
89 if (!apm_suspended)
90 apm_queue_event(APM_USER_SUSPEND);
91
92 return IRQ_HANDLED;
93}
94
95static int __init hp6x0_apm_init(void)
96{
97 int ret;
98
99 ret = request_irq(HP680_BTN_IRQ, hp6x0_apm_interrupt,
100 SA_INTERRUPT, MODNAME, 0);
101 if (unlikely(ret < 0)) {
102 printk(KERN_ERR MODNAME ": IRQ %d request failed\n",
103 HP680_BTN_IRQ);
104 return ret;
105 }
106
107 apm_get_info = hp6x0_apm_get_info;
108
109 return ret;
110}
111
112static void __exit hp6x0_apm_exit(void)
113{
114 free_irq(HP680_BTN_IRQ, 0);
115 apm_get_info = 0;
116}
117
118module_init(hp6x0_apm_init);
119module_exit(hp6x0_apm_exit);
120
121MODULE_AUTHOR("Adriy Skulysh");
122MODULE_DESCRIPTION("hp6xx Advanced Power Management");
123MODULE_LICENSE("GPL");
diff --git a/arch/sh/boards/hp6xx/pm.c b/arch/sh/boards/hp6xx/pm.c
new file mode 100644
index 000000000000..0e501bcbd7a9
--- /dev/null
+++ b/arch/sh/boards/hp6xx/pm.c
@@ -0,0 +1,88 @@
1/*
2 * hp6x0 Power Management Routines
3 *
4 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License.
8 */
9#include <linux/config.h>
10#include <linux/init.h>
11#include <linux/suspend.h>
12#include <linux/errno.h>
13#include <linux/time.h>
14#include <asm/io.h>
15#include <asm/hd64461.h>
16#include <asm/hp6xx/hp6xx.h>
17#include <asm/cpu/dac.h>
18#include <asm/pm.h>
19
20#define STBCR 0xffffff82
21#define STBCR2 0xffffff88
22
23static int hp6x0_pm_enter(suspend_state_t state)
24{
25 u8 stbcr, stbcr2;
26#ifdef CONFIG_HD64461_ENABLER
27 u8 scr;
28 u16 hd64461_stbcr;
29#endif
30
31 if (state != PM_SUSPEND_MEM)
32 return -EINVAL;
33
34#ifdef CONFIG_HD64461_ENABLER
35 outb(0, HD64461_PCC1CSCIER);
36
37 scr = inb(HD64461_PCC1SCR);
38 scr |= HD64461_PCCSCR_VCC1;
39 outb(scr, HD64461_PCC1SCR);
40
41 hd64461_stbcr = inw(HD64461_STBCR);
42 hd64461_stbcr |= HD64461_STBCR_SPC1ST;
43 outw(hd64461_stbcr, HD64461_STBCR);
44#endif
45
46 ctrl_outb(0x1f, DACR);
47
48 stbcr = ctrl_inb(STBCR);
49 ctrl_outb(0x01, STBCR);
50
51 stbcr2 = ctrl_inb(STBCR2);
52 ctrl_outb(0x7f , STBCR2);
53
54 outw(0xf07f, HD64461_SCPUCR);
55
56 pm_enter();
57
58 outw(0, HD64461_SCPUCR);
59 ctrl_outb(stbcr, STBCR);
60 ctrl_outb(stbcr2, STBCR2);
61
62#ifdef CONFIG_HD64461_ENABLER
63 hd64461_stbcr = inw(HD64461_STBCR);
64 hd64461_stbcr &= ~HD64461_STBCR_SPC1ST;
65 outw(hd64461_stbcr, HD64461_STBCR);
66
67 outb(0x4c, HD64461_PCC1CSCIER);
68 outb(0x00, HD64461_PCC1CSCR);
69#endif
70
71 return 0;
72}
73
74/*
75 * Set to PM_DISK_FIRMWARE so we can quickly veto suspend-to-disk.
76 */
77static struct pm_ops hp6x0_pm_ops = {
78 .pm_disk_mode = PM_DISK_FIRMWARE,
79 .enter = hp6x0_pm_enter,
80};
81
82static int __init hp6x0_pm_init(void)
83{
84 pm_set_ops(&hp6x0_pm_ops);
85 return 0;
86}
87
88late_initcall(hp6x0_pm_init);
diff --git a/arch/sh/boards/hp6xx/pm_wakeup.S b/arch/sh/boards/hp6xx/pm_wakeup.S
new file mode 100644
index 000000000000..45e9bf0b9115
--- /dev/null
+++ b/arch/sh/boards/hp6xx/pm_wakeup.S
@@ -0,0 +1,58 @@
1/*
2 * Copyright (c) 2006 Andriy Skulysh <askulsyh@gmail.com>
3 *
4 * This file is subject to the terms and conditions of the GNU General Public
5 * License. See the file "COPYING" in the main directory of this archive
6 * for more details.
7 *
8 */
9
10#include <linux/linkage.h>
11#include <asm/cpu/mmu_context.h>
12
13#define k0 r0
14#define k1 r1
15#define k2 r2
16#define k3 r3
17#define k4 r4
18
19/*
20 * Kernel mode register usage:
21 * k0 scratch
22 * k1 scratch
23 * k2 scratch (Exception code)
24 * k3 scratch (Return address)
25 * k4 scratch
26 * k5 reserved
27 * k6 Global Interrupt Mask (0--15 << 4)
28 * k7 CURRENT_THREAD_INFO (pointer to current thread info)
29 */
30
31ENTRY(wakeup_start)
32! clear STBY bit
33 mov #-126, k2
34 and #127, k0
35 mov.b k0, @k2
36! enable refresh
37 mov.l 5f, k1
38 mov.w 6f, k0
39 mov.w k0, @k1
40! jump to handler
41 mov.l 2f, k2
42 mov.l 3f, k3
43 mov.l @k2, k2
44
45 mov.l 4f, k1
46 jmp @k1
47 nop
48
49 .align 2
501: .long EXPEVT
512: .long INTEVT
523: .long ret_from_irq
534: .long handle_exception
545: .long 0xffffff68
556: .word 0x0524
56
57ENTRY(wakeup_end)
58 nop
diff --git a/arch/sh/boards/hp6xx/setup.c b/arch/sh/boards/hp6xx/setup.c
index 71f315663cc9..60ab17ad6054 100644
--- a/arch/sh/boards/hp6xx/setup.c
+++ b/arch/sh/boards/hp6xx/setup.c
@@ -8,22 +8,22 @@
8 * 8 *
9 * Setup code for an HP680 (internal peripherials only) 9 * Setup code for an HP680 (internal peripherials only)
10 */ 10 */
11 11#include <linux/types.h>
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/io.h>
14#include <asm/hd64461.h> 13#include <asm/hd64461.h>
14#include <asm/io.h>
15#include <asm/irq.h>
15#include <asm/hp6xx/hp6xx.h> 16#include <asm/hp6xx/hp6xx.h>
16#include <asm/cpu/dac.h> 17#include <asm/cpu/dac.h>
17 18
18const char *get_system_type(void) 19#define SCPCR 0xa4000116
19{ 20#define SCPDR 0xa4000136
20 return "HP6xx";
21}
22 21
23int __init platform_setup(void) 22static void __init hp6xx_setup(char **cmdline_p)
24{ 23{
25 u8 v8; 24 u8 v8;
26 u16 v; 25 u16 v;
26
27 v = inw(HD64461_STBCR); 27 v = inw(HD64461_STBCR);
28 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST | 28 v |= HD64461_STBCR_SURTST | HD64461_STBCR_SIRST |
29 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST | 29 HD64461_STBCR_STM1ST | HD64461_STBCR_STM0ST |
@@ -50,5 +50,51 @@ int __init platform_setup(void)
50 v8 &= ~DACR_DAE; 50 v8 &= ~DACR_DAE;
51 ctrl_outb(v8,DACR); 51 ctrl_outb(v8,DACR);
52 52
53 return 0; 53 v8 = ctrl_inb(SCPDR);
54 v8 |= SCPDR_TS_SCAN_X | SCPDR_TS_SCAN_Y;
55 v8 &= ~SCPDR_TS_SCAN_ENABLE;
56 ctrl_outb(v8, SCPDR);
57
58 v = ctrl_inw(SCPCR);
59 v &= ~SCPCR_TS_MASK;
60 v |= SCPCR_TS_ENABLE;
61 ctrl_outw(v, SCPCR);
54} 62}
63
64/*
65 * XXX: This is stupid, we should have a generic machine vector for the cchips
66 * and just wrap the platform setup code in to this, as it's the only thing
67 * that ends up being different.
68 */
69struct sh_machine_vector mv_hp6xx __initmv = {
70 .mv_name = "hp6xx",
71 .mv_setup = hp6xx_setup,
72 .mv_nr_irqs = HD64461_IRQBASE + HD64461_IRQ_NUM,
73
74 .mv_inb = hd64461_inb,
75 .mv_inw = hd64461_inw,
76 .mv_inl = hd64461_inl,
77 .mv_outb = hd64461_outb,
78 .mv_outw = hd64461_outw,
79 .mv_outl = hd64461_outl,
80
81 .mv_inb_p = hd64461_inb_p,
82 .mv_inw_p = hd64461_inw,
83 .mv_inl_p = hd64461_inl,
84 .mv_outb_p = hd64461_outb_p,
85 .mv_outw_p = hd64461_outw,
86 .mv_outl_p = hd64461_outl,
87
88 .mv_insb = hd64461_insb,
89 .mv_insw = hd64461_insw,
90 .mv_insl = hd64461_insl,
91 .mv_outsb = hd64461_outsb,
92 .mv_outsw = hd64461_outsw,
93 .mv_outsl = hd64461_outsl,
94
95 .mv_readw = hd64461_readw,
96 .mv_writew = hd64461_writew,
97
98 .mv_irq_demux = hd64461_irq_demux,
99};
100ALIAS_MV(hp6xx)
diff --git a/arch/sh/boards/landisk/Makefile b/arch/sh/boards/landisk/Makefile
new file mode 100644
index 000000000000..89e4beb2ad47
--- /dev/null
+++ b/arch/sh/boards/landisk/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for I-O DATA DEVICE, INC. "LANDISK Series"
3#
4
5obj-y := setup.o io.o irq.o rtc.o landisk_pwb.o
diff --git a/arch/sh/boards/landisk/io.c b/arch/sh/boards/landisk/io.c
new file mode 100644
index 000000000000..92498b4947d5
--- /dev/null
+++ b/arch/sh/boards/landisk/io.c
@@ -0,0 +1,250 @@
1/*
2 * arch/sh/boards/landisk/io.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for I-O Data Device, Inc. LANDISK.
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_landisk.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13/*
14 * modifed by kogiidena
15 * 2005.03.03
16 */
17#include <linux/kernel.h>
18#include <linux/types.h>
19#include <linux/pci.h>
20#include <asm/landisk/iodata_landisk.h>
21#include <asm/addrspace.h>
22#include <asm/io.h>
23
24extern void *area5_io_base; /* Area 5 I/O Base address */
25extern void *area6_io_base; /* Area 6 I/O Base address */
26
27static inline unsigned long port2adr(unsigned int port)
28{
29 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
30 if (port == 0x3f6)
31 return ((unsigned long)area5_io_base + 0x2c);
32 else
33 return ((unsigned long)area5_io_base + PA_PIDE_OFFSET +
34 ((port - 0x1f0) << 1));
35 else if ((0x170 <= port && port < 0x178) || port == 0x376)
36 if (port == 0x376)
37 return ((unsigned long)area6_io_base + 0x2c);
38 else
39 return ((unsigned long)area6_io_base + PA_SIDE_OFFSET +
40 ((port - 0x170) << 1));
41 else
42 maybebadio((unsigned long)port);
43
44 return port;
45}
46
47/*
48 * General outline: remap really low stuff [eventually] to SuperIO,
49 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
50 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
51 * should be way beyond the window, and is used w/o translation for
52 * compatibility.
53 */
54u8 landisk_inb(unsigned long port)
55{
56 if (PXSEG(port))
57 return ctrl_inb(port);
58 else if (is_pci_ioaddr(port))
59 return ctrl_inb(pci_ioaddr(port));
60
61 return ctrl_inw(port2adr(port)) & 0xff;
62}
63
64u8 landisk_inb_p(unsigned long port)
65{
66 u8 v;
67
68 if (PXSEG(port))
69 v = ctrl_inb(port);
70 else if (is_pci_ioaddr(port))
71 v = ctrl_inb(pci_ioaddr(port));
72 else
73 v = ctrl_inw(port2adr(port)) & 0xff;
74
75 ctrl_delay();
76
77 return v;
78}
79
80u16 landisk_inw(unsigned long port)
81{
82 if (PXSEG(port))
83 return ctrl_inw(port);
84 else if (is_pci_ioaddr(port))
85 return ctrl_inw(pci_ioaddr(port));
86 else
87 maybebadio(port);
88
89 return 0;
90}
91
92u32 landisk_inl(unsigned long port)
93{
94 if (PXSEG(port))
95 return ctrl_inl(port);
96 else if (is_pci_ioaddr(port))
97 return ctrl_inl(pci_ioaddr(port));
98 else
99 maybebadio(port);
100
101 return 0;
102}
103
104void landisk_outb(u8 value, unsigned long port)
105{
106 if (PXSEG(port))
107 ctrl_outb(value, port);
108 else if (is_pci_ioaddr(port))
109 ctrl_outb(value, pci_ioaddr(port));
110 else
111 ctrl_outw(value, port2adr(port));
112}
113
114void landisk_outb_p(u8 value, unsigned long port)
115{
116 if (PXSEG(port))
117 ctrl_outb(value, port);
118 else if (is_pci_ioaddr(port))
119 ctrl_outb(value, pci_ioaddr(port));
120 else
121 ctrl_outw(value, port2adr(port));
122 ctrl_delay();
123}
124
125void landisk_outw(u16 value, unsigned long port)
126{
127 if (PXSEG(port))
128 ctrl_outw(value, port);
129 else if (is_pci_ioaddr(port))
130 ctrl_outw(value, pci_ioaddr(port));
131 else
132 maybebadio(port);
133}
134
135void landisk_outl(u32 value, unsigned long port)
136{
137 if (PXSEG(port))
138 ctrl_outl(value, port);
139 else if (is_pci_ioaddr(port))
140 ctrl_outl(value, pci_ioaddr(port));
141 else
142 maybebadio(port);
143}
144
145void landisk_insb(unsigned long port, void *dst, unsigned long count)
146{
147 volatile u16 *p;
148 u8 *buf = dst;
149
150 if (PXSEG(port)) {
151 while (count--)
152 *buf++ = *(volatile u8 *)port;
153 } else if (is_pci_ioaddr(port)) {
154 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
155
156 while (count--)
157 *buf++ = *bp;
158 } else {
159 p = (volatile u16 *)port2adr(port);
160 while (count--)
161 *buf++ = *p & 0xff;
162 }
163}
164
165void landisk_insw(unsigned long port, void *dst, unsigned long count)
166{
167 volatile u16 *p;
168 u16 *buf = dst;
169
170 if (PXSEG(port))
171 p = (volatile u16 *)port;
172 else if (is_pci_ioaddr(port))
173 p = (volatile u16 *)pci_ioaddr(port);
174 else
175 p = (volatile u16 *)port2adr(port);
176 while (count--)
177 *buf++ = *p;
178}
179
180void landisk_insl(unsigned long port, void *dst, unsigned long count)
181{
182 u32 *buf = dst;
183
184 if (is_pci_ioaddr(port)) {
185 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
186
187 while (count--)
188 *buf++ = *p;
189 } else
190 maybebadio(port);
191}
192
193void landisk_outsb(unsigned long port, const void *src, unsigned long count)
194{
195 volatile u16 *p;
196 const u8 *buf = src;
197
198 if (PXSEG(port))
199 while (count--)
200 ctrl_outb(*buf++, port);
201 else if (is_pci_ioaddr(port)) {
202 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
203
204 while (count--)
205 *bp = *buf++;
206 } else {
207 p = (volatile u16 *)port2adr(port);
208 while (count--)
209 *p = *buf++;
210 }
211}
212
213void landisk_outsw(unsigned long port, const void *src, unsigned long count)
214{
215 volatile u16 *p;
216 const u16 *buf = src;
217
218 if (PXSEG(port))
219 p = (volatile u16 *)port;
220 else if (is_pci_ioaddr(port))
221 p = (volatile u16 *)pci_ioaddr(port);
222 else
223 p = (volatile u16 *)port2adr(port);
224
225 while (count--)
226 *p = *buf++;
227}
228
229void landisk_outsl(unsigned long port, const void *src, unsigned long count)
230{
231 const u32 *buf = src;
232
233 if (is_pci_ioaddr(port)) {
234 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
235
236 while (count--)
237 *p = *buf++;
238 } else
239 maybebadio(port);
240}
241
242void __iomem *landisk_ioport_map(unsigned long port, unsigned int size)
243{
244 if (PXSEG(port))
245 return (void __iomem *)port;
246 else if (is_pci_ioaddr(port))
247 return (void __iomem *)pci_ioaddr(port);
248
249 return (void __iomem *)port2adr(port);
250}
diff --git a/arch/sh/boards/landisk/irq.c b/arch/sh/boards/landisk/irq.c
new file mode 100644
index 000000000000..a006d6443225
--- /dev/null
+++ b/arch/sh/boards/landisk/irq.c
@@ -0,0 +1,99 @@
1/*
2 * arch/sh/boards/landisk/irq.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c.
6 *
7 * I/O routine for I-O Data Device, Inc. LANDISK.
8 *
9 * Initial version only to support LAN access; some
10 * placeholder code from io_landisk.c left in with the
11 * expectation of later SuperIO and PCMCIA access.
12 */
13/*
14 * modified by kogiidena
15 * 2005.03.03
16 */
17
18#include <linux/config.h>
19#include <linux/init.h>
20#include <linux/irq.h>
21#include <asm/io.h>
22#include <asm/irq.h>
23#include <asm/landisk/iodata_landisk.h>
24
25static void enable_landisk_irq(unsigned int irq);
26static void disable_landisk_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_landisk_irq disable_landisk_irq
30
31static void ack_landisk_irq(unsigned int irq);
32static void end_landisk_irq(unsigned int irq);
33
34static unsigned int startup_landisk_irq(unsigned int irq)
35{
36 enable_landisk_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static void disable_landisk_irq(unsigned int irq)
41{
42 unsigned char val;
43 unsigned char mask = 0xff ^ (0x01 << (irq - 5));
44
45 /* Set the priority in IPR to 0 */
46 val = ctrl_inb(PA_IMASK);
47 val &= mask;
48 ctrl_outb(val, PA_IMASK);
49}
50
51static void enable_landisk_irq(unsigned int irq)
52{
53 unsigned char val;
54 unsigned char value = (0x01 << (irq - 5));
55
56 /* Set priority in IPR back to original value */
57 val = ctrl_inb(PA_IMASK);
58 val |= value;
59 ctrl_outb(val, PA_IMASK);
60}
61
62static void ack_landisk_irq(unsigned int irq)
63{
64 disable_landisk_irq(irq);
65}
66
67static void end_landisk_irq(unsigned int irq)
68{
69 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
70 enable_landisk_irq(irq);
71}
72
73static struct hw_interrupt_type landisk_irq_type = {
74 .typename = "LANDISK IRQ",
75 .startup = startup_landisk_irq,
76 .shutdown = shutdown_landisk_irq,
77 .enable = enable_landisk_irq,
78 .disable = disable_landisk_irq,
79 .ack = ack_landisk_irq,
80 .end = end_landisk_irq
81};
82
83static void make_landisk_irq(unsigned int irq)
84{
85 disable_irq_nosync(irq);
86 irq_desc[irq].handler = &landisk_irq_type;
87 disable_landisk_irq(irq);
88}
89
90/*
91 * Initialize IRQ setting
92 */
93void __init init_landisk_IRQ(void)
94{
95 int i;
96
97 for (i = 5; i < 14; i++)
98 make_landisk_irq(i);
99}
diff --git a/arch/sh/boards/landisk/landisk_pwb.c b/arch/sh/boards/landisk/landisk_pwb.c
new file mode 100644
index 000000000000..e75cb578a28b
--- /dev/null
+++ b/arch/sh/boards/landisk/landisk_pwb.c
@@ -0,0 +1,348 @@
1/*
2 * arch/sh/boards/landisk/landisk_pwb.c -- driver for the Power control switch.
3 *
4 * This driver will also support the I-O DATA Device, Inc. LANDISK Board.
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 *
10 * Copylight (C) 2002 Atom Create Engineering Co., Ltd.
11 *
12 * LED control drive function added by kogiidena
13 */
14
15#include <linux/config.h>
16#include <linux/module.h>
17#include <linux/errno.h>
18#include <linux/signal.h>
19#include <linux/major.h>
20#include <linux/poll.h>
21#include <linux/init.h>
22#include <linux/delay.h>
23#include <linux/sched.h>
24#include <linux/timer.h>
25#include <linux/interrupt.h>
26
27#include <asm/system.h>
28#include <asm/io.h>
29#include <asm/irq.h>
30#include <asm/uaccess.h>
31#include <asm/landisk/iodata_landisk.h>
32
33#define SHUTDOWN_BTN_MINOR 1 /* Shutdown button device minor no. */
34#define LED_MINOR 21 /* LED minor no. */
35#define BTN_MINOR 22 /* BUTTON minor no. */
36#define GIO_MINOR 40 /* GIO minor no. */
37
38static int openCnt;
39static int openCntLED;
40static int openCntGio;
41static int openCntBtn;
42static int landisk_btn;
43static int landisk_btnctrlpid;
44/*
45 * Functions prototypes
46 */
47
48static int gio_ioctl(struct inode *inode, struct file *filp, unsigned int cmd,
49 unsigned long arg);
50
51static int swdrv_open(struct inode *inode, struct file *filp)
52{
53 int minor;
54
55 minor = MINOR(inode->i_rdev);
56 filp->private_data = (void *)minor;
57
58 if (minor == SHUTDOWN_BTN_MINOR) {
59 if (openCnt > 0) {
60 return -EALREADY;
61 } else {
62 openCnt++;
63 return 0;
64 }
65 } else if (minor == LED_MINOR) {
66 if (openCntLED > 0) {
67 return -EALREADY;
68 } else {
69 openCntLED++;
70 return 0;
71 }
72 } else if (minor == BTN_MINOR) {
73 if (openCntBtn > 0) {
74 return -EALREADY;
75 } else {
76 openCntBtn++;
77 return 0;
78 }
79 } else if (minor == GIO_MINOR) {
80 if (openCntGio > 0) {
81 return -EALREADY;
82 } else {
83 openCntGio++;
84 return 0;
85 }
86 }
87 return -ENOENT;
88
89}
90
91static int swdrv_close(struct inode *inode, struct file *filp)
92{
93 int minor;
94
95 minor = MINOR(inode->i_rdev);
96 if (minor == SHUTDOWN_BTN_MINOR) {
97 openCnt--;
98 } else if (minor == LED_MINOR) {
99 openCntLED--;
100 } else if (minor == BTN_MINOR) {
101 openCntBtn--;
102 } else if (minor == GIO_MINOR) {
103 openCntGio--;
104 }
105 return 0;
106}
107
108static int swdrv_read(struct file *filp, char *buff, size_t count,
109 loff_t * ppos)
110{
111 int minor;
112 minor = (int)(filp->private_data);
113
114 if (!access_ok(VERIFY_WRITE, (void *)buff, count))
115 return -EFAULT;
116
117 if (minor == SHUTDOWN_BTN_MINOR) {
118 if (landisk_btn & 0x10) {
119 put_user(1, buff);
120 return 1;
121 } else {
122 return 0;
123 }
124 }
125 return 0;
126}
127
128static int swdrv_write(struct file *filp, const char *buff, size_t count,
129 loff_t * ppos)
130{
131 int minor;
132 minor = (int)(filp->private_data);
133
134 if (minor == SHUTDOWN_BTN_MINOR) {
135 return count;
136 }
137 return count;
138}
139
140static irqreturn_t sw_interrupt(int irq, void *dev_id, struct pt_regs *regs)
141{
142 landisk_btn = (0x0ff & (~ctrl_inb(PA_STATUS)));
143 disable_irq(IRQ_BUTTON);
144 disable_irq(IRQ_POWER);
145 ctrl_outb(0x00, PA_PWRINT_CLR);
146
147 if (landisk_btnctrlpid != 0) {
148 kill_proc(landisk_btnctrlpid, SIGUSR1, 1);
149 landisk_btnctrlpid = 0;
150 }
151
152 return IRQ_HANDLED;
153}
154
155static struct file_operations swdrv_fops = {
156 .read = swdrv_read, /* read */
157 .write = swdrv_write, /* write */
158 .open = swdrv_open, /* open */
159 .release = swdrv_close, /* release */
160 .ioctl = gio_ioctl, /* ioctl */
161
162};
163
164static char banner[] __initdata =
165 KERN_INFO "LANDISK and USL-5P Button, LED and GIO driver initialized\n";
166
167int __init swdrv_init(void)
168{
169 int error;
170
171 printk("%s", banner);
172
173 openCnt = 0;
174 openCntLED = 0;
175 openCntBtn = 0;
176 openCntGio = 0;
177 landisk_btn = 0;
178 landisk_btnctrlpid = 0;
179
180 if ((error = register_chrdev(SHUTDOWN_BTN_MAJOR, "swdrv", &swdrv_fops))) {
181 printk(KERN_ERR
182 "Button, LED and GIO driver:Couldn't register driver, error=%d\n",
183 error);
184 return 1;
185 }
186
187 if (request_irq(IRQ_POWER, sw_interrupt, 0, "SHUTDOWNSWITCH", NULL)) {
188 printk(KERN_ERR "Unable to get IRQ 11.\n");
189 return 1;
190 }
191 if (request_irq(IRQ_BUTTON, sw_interrupt, 0, "USL-5P BUTTON", NULL)) {
192 printk(KERN_ERR "Unable to get IRQ 12.\n");
193 return 1;
194 }
195 ctrl_outb(0x00, PA_PWRINT_CLR);
196
197 return 0;
198}
199
200module_init(swdrv_init);
201
202/*
203 * gio driver
204 *
205 */
206
207#include <asm/landisk/gio.h>
208
209static int gio_ioctl(struct inode *inode, struct file *filp,
210 unsigned int cmd, unsigned long arg)
211{
212 int minor;
213 unsigned int data, mask;
214 static unsigned int addr = 0;
215
216 minor = (int)(filp->private_data);
217
218 /* access control */
219 if (minor == GIO_MINOR) {
220 ;
221 } else if (minor == LED_MINOR) {
222 if (((cmd & 0x0ff) >= 9) && ((cmd & 0x0ff) < 20)) {
223 ;
224 } else {
225 return -EINVAL;
226 }
227 } else if (minor == BTN_MINOR) {
228 if (((cmd & 0x0ff) >= 20) && ((cmd & 0x0ff) < 30)) {
229 ;
230 } else {
231 return -EINVAL;
232 }
233 } else {
234 return -EINVAL;
235 }
236
237 if (cmd & 0x01) { /* write */
238 if (copy_from_user(&data, (int *)arg, sizeof(int))) {
239 return -EFAULT;
240 }
241 }
242
243 switch (cmd) {
244 case GIODRV_IOCSGIOSETADDR: /* addres set */
245 addr = data;
246 break;
247
248 case GIODRV_IOCSGIODATA1: /* write byte */
249 ctrl_outb((unsigned char)(0x0ff & data), addr);
250 break;
251
252 case GIODRV_IOCSGIODATA2: /* write word */
253 if (addr & 0x01) {
254 return -EFAULT;
255 }
256 ctrl_outw((unsigned short int)(0x0ffff & data), addr);
257 break;
258
259 case GIODRV_IOCSGIODATA4: /* write long */
260 if (addr & 0x03) {
261 return -EFAULT;
262 }
263 ctrl_outl(data, addr);
264 break;
265
266 case GIODRV_IOCGGIODATA1: /* read byte */
267 data = ctrl_inb(addr);
268 break;
269
270 case GIODRV_IOCGGIODATA2: /* read word */
271 if (addr & 0x01) {
272 return -EFAULT;
273 }
274 data = ctrl_inw(addr);
275 break;
276
277 case GIODRV_IOCGGIODATA4: /* read long */
278 if (addr & 0x03) {
279 return -EFAULT;
280 }
281 data = ctrl_inl(addr);
282 break;
283 case GIODRV_IOCSGIO_LED: /* write */
284 mask = ((data & 0x00ffffff) << 8)
285 | ((data & 0x0000ffff) << 16)
286 | ((data & 0x000000ff) << 24);
287 landisk_ledparam = data & (~mask);
288 if (landisk_arch == 0) { /* arch == landisk */
289 landisk_ledparam &= 0x03030303;
290 mask = (~(landisk_ledparam >> 22)) & 0x000c;
291 landisk_ledparam |= mask;
292 } else { /* arch == usl-5p */
293 mask = (landisk_ledparam >> 24) & 0x0001;
294 landisk_ledparam |= mask;
295 landisk_ledparam &= 0x007f7f7f;
296 }
297 landisk_ledparam |= 0x80;
298 break;
299 case GIODRV_IOCGGIO_LED: /* read */
300 data = landisk_ledparam;
301 if (landisk_arch == 0) { /* arch == landisk */
302 data &= 0x03030303;
303 } else { /* arch == usl-5p */
304 ;
305 }
306 data &= (~0x080);
307 break;
308 case GIODRV_IOCSGIO_BUZZER: /* write */
309 landisk_buzzerparam = data;
310 landisk_ledparam |= 0x80;
311 break;
312 case GIODRV_IOCGGIO_LANDISK: /* read */
313 data = landisk_arch & 0x01;
314 break;
315 case GIODRV_IOCGGIO_BTN: /* read */
316 data = (0x0ff & ctrl_inb(PA_PWRINT_CLR));
317 data <<= 8;
318 data |= (0x0ff & ctrl_inb(PA_IMASK));
319 data <<= 8;
320 data |= (0x0ff & landisk_btn);
321 data <<= 8;
322 data |= (0x0ff & (~ctrl_inb(PA_STATUS)));
323 break;
324 case GIODRV_IOCSGIO_BTNPID: /* write */
325 landisk_btnctrlpid = data;
326 landisk_btn = 0;
327 if (irq_desc[IRQ_BUTTON].depth) {
328 enable_irq(IRQ_BUTTON);
329 }
330 if (irq_desc[IRQ_POWER].depth) {
331 enable_irq(IRQ_POWER);
332 }
333 break;
334 case GIODRV_IOCGGIO_BTNPID: /* read */
335 data = landisk_btnctrlpid;
336 break;
337 default:
338 return -EFAULT;
339 break;
340 }
341
342 if ((cmd & 0x01) == 0) { /* read */
343 if (copy_to_user((int *)arg, &data, sizeof(int))) {
344 return -EFAULT;
345 }
346 }
347 return 0;
348}
diff --git a/arch/sh/boards/landisk/rtc.c b/arch/sh/boards/landisk/rtc.c
new file mode 100644
index 000000000000..35ba726a0979
--- /dev/null
+++ b/arch/sh/boards/landisk/rtc.c
@@ -0,0 +1,93 @@
1/*
2 * arch/sh/boards/landisk/rtc.c -- RTC support
3 *
4 * Copyright (C) 2000 Philipp Rumpf <prumpf@tux.org>
5 * Copyright (C) 1999 Tetsuya Okada & Niibe Yutaka
6 */
7/*
8 * modifed by kogiidena
9 * 2005.09.16
10 */
11
12#include <linux/config.h>
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/sched.h>
16#include <linux/time.h>
17#include <linux/delay.h>
18#include <linux/spinlock.h>
19#include <linux/bcd.h>
20#include <asm/rtc.h>
21
22extern spinlock_t rtc_lock;
23
24extern void
25rs5c313_set_cmos_time(unsigned int BCD_yr, unsigned int BCD_mon,
26 unsigned int BCD_day, unsigned int BCD_hr,
27 unsigned int BCD_min, unsigned int BCD_sec);
28
29extern unsigned long
30rs5c313_get_cmos_time(unsigned int *BCD_yr, unsigned int *BCD_mon,
31 unsigned int *BCD_day, unsigned int *BCD_hr,
32 unsigned int *BCD_min, unsigned int *BCD_sec);
33
34void landisk_rtc_gettimeofday(struct timespec *tv)
35{
36 unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
37 unsigned long flags;
38
39 spin_lock_irqsave(&rtc_lock, flags);
40 tv->tv_sec = rs5c313_get_cmos_time
41 (&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
42 tv->tv_nsec = 0;
43 spin_unlock_irqrestore(&rtc_lock, flags);
44}
45
46int landisk_rtc_settimeofday(const time_t secs)
47{
48 int retval = 0;
49 int real_seconds, real_minutes, cmos_minutes;
50 unsigned long flags;
51 unsigned long nowtime = secs;
52 unsigned int BCD_yr, BCD_mon, BCD_day, BCD_hr, BCD_min, BCD_sec;
53
54 spin_lock_irqsave(&rtc_lock, flags);
55
56 rs5c313_get_cmos_time
57 (&BCD_yr, &BCD_mon, &BCD_day, &BCD_hr, &BCD_min, &BCD_sec);
58 cmos_minutes = BCD_min;
59 BCD_TO_BIN(cmos_minutes);
60
61 /*
62 * since we're only adjusting minutes and seconds,
63 * don't interfere with hour overflow. This avoids
64 * messing with unknown time zones but requires your
65 * RTC not to be off by more than 15 minutes
66 */
67 real_seconds = nowtime % 60;
68 real_minutes = nowtime / 60;
69 if (((abs(real_minutes - cmos_minutes) + 15) / 30) & 1)
70 real_minutes += 30; /* correct for half hour time zone */
71 real_minutes %= 60;
72
73 if (abs(real_minutes - cmos_minutes) < 30) {
74 BIN_TO_BCD(real_seconds);
75 BIN_TO_BCD(real_minutes);
76 rs5c313_set_cmos_time(BCD_yr, BCD_mon, BCD_day, BCD_hr,
77 real_minutes, real_seconds);
78 } else {
79 printk(KERN_WARNING
80 "set_rtc_time: can't update from %d to %d\n",
81 cmos_minutes, real_minutes);
82 retval = -1;
83 }
84
85 spin_unlock_irqrestore(&rtc_lock, flags);
86 return retval;
87}
88
89void landisk_time_init(void)
90{
91 rtc_sh_get_time = landisk_rtc_gettimeofday;
92 rtc_sh_set_time = landisk_rtc_settimeofday;
93}
diff --git a/arch/sh/boards/landisk/setup.c b/arch/sh/boards/landisk/setup.c
new file mode 100644
index 000000000000..127b9e020e00
--- /dev/null
+++ b/arch/sh/boards/landisk/setup.c
@@ -0,0 +1,177 @@
1/*
2 * arch/sh/boards/landisk/setup.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 * Copyright (C) 2002 Paul Mundt
6 *
7 * I-O DATA Device, Inc. LANDISK Support.
8 *
9 * Modified for LANDISK by
10 * Atom Create Engineering Co., Ltd. 2002.
11 *
12 * modifed by kogiidena
13 * 2005.09.16
14 *
15 * This file is subject to the terms and conditions of the GNU General Public
16 * License. See the file "COPYING" in the main directory of this archive
17 * for more details.
18 */
19#include <linux/config.h>
20#include <linux/init.h>
21#include <linux/pm.h>
22#include <linux/mm.h>
23#include <asm/machvec.h>
24#include <asm/rtc.h>
25#include <asm/landisk/iodata_landisk.h>
26#include <asm/io.h>
27
28void landisk_time_init(void);
29void init_landisk_IRQ(void);
30
31int landisk_ledparam;
32int landisk_buzzerparam;
33int landisk_arch;
34
35/* cycle the led's in the clasic knightrider/sun pattern */
36static void heartbeat_landisk(void)
37{
38 static unsigned int cnt = 0, blink = 0x00, period = 25;
39 volatile u8 *p = (volatile u8 *)PA_LED;
40 char data;
41
42 if ((landisk_ledparam & 0x080) == 0)
43 return;
44
45 cnt += 1;
46
47 if (cnt < period)
48 return;
49
50 cnt = 0;
51 blink++;
52
53 data = (blink & 0x01) ? (landisk_ledparam >> 16) : 0;
54 data |= (blink & 0x02) ? (landisk_ledparam >> 8) : 0;
55 data |= landisk_ledparam;
56
57 /* buzzer */
58 if (landisk_buzzerparam & 0x1) {
59 data |= 0x80;
60 } else {
61 data &= 0x7f;
62 }
63 *p = data;
64
65 if (((landisk_ledparam & 0x007f7f00) == 0) &&
66 (landisk_buzzerparam == 0))
67 landisk_ledparam &= (~0x0080);
68
69 landisk_buzzerparam >>= 1;
70}
71
72static void landisk_power_off(void)
73{
74 ctrl_outb(0x01, PA_SHUTDOWN);
75}
76
77static void check_usl5p(void)
78{
79 volatile u8 *p = (volatile u8 *)PA_LED;
80 u8 tmp1, tmp2;
81
82 tmp1 = *p;
83 *p = 0x40;
84 tmp2 = *p;
85 *p = tmp1;
86
87 landisk_arch = (tmp2 == 0x40);
88 if (landisk_arch == 1) {
89 /* arch == usl-5p */
90 landisk_ledparam = 0x00000380;
91 landisk_ledparam |= (tmp1 & 0x07c);
92 } else {
93 /* arch == landisk */
94 landisk_ledparam = 0x02000180;
95 landisk_ledparam |= 0x04;
96 }
97}
98
99void *area5_io_base;
100void *area6_io_base;
101
102static int __init landisk_cf_init(void)
103{
104 pgprot_t prot;
105 unsigned long paddrbase, psize;
106
107 /* open I/O area window */
108 paddrbase = virt_to_phys((void *)PA_AREA5_IO);
109 psize = PAGE_SIZE;
110 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_IO16);
111 area5_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
112 if (!area5_io_base) {
113 printk("allocate_cf_area : can't open CF I/O window!\n");
114 return -ENOMEM;
115 }
116
117 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
118 psize = PAGE_SIZE;
119 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
120 area6_io_base = p3_ioremap(paddrbase, psize, prot.pgprot);
121 if (!area6_io_base) {
122 printk("allocate_cf_area : can't open HDD I/O window!\n");
123 return -ENOMEM;
124 }
125
126 printk(KERN_INFO "Allocate Area5/6 success.\n");
127
128 /* XXX : do we need attribute and common-memory area also? */
129
130 return 0;
131}
132
133static void __init landisk_setup(char **cmdline_p)
134{
135 device_initcall(landisk_cf_init);
136
137 landisk_buzzerparam = 0;
138 check_usl5p();
139
140 printk(KERN_INFO "I-O DATA DEVICE, INC. \"LANDISK Series\" support.\n");
141
142 board_time_init = landisk_time_init;
143 pm_power_off = landisk_power_off;
144}
145
146/*
147 * The Machine Vector
148 */
149struct sh_machine_vector mv_landisk __initmv = {
150 .mv_name = "LANDISK",
151 .mv_setup = landisk_setup,
152 .mv_nr_irqs = 72,
153 .mv_inb = landisk_inb,
154 .mv_inw = landisk_inw,
155 .mv_inl = landisk_inl,
156 .mv_outb = landisk_outb,
157 .mv_outw = landisk_outw,
158 .mv_outl = landisk_outl,
159 .mv_inb_p = landisk_inb_p,
160 .mv_inw_p = landisk_inw,
161 .mv_inl_p = landisk_inl,
162 .mv_outb_p = landisk_outb_p,
163 .mv_outw_p = landisk_outw,
164 .mv_outl_p = landisk_outl,
165 .mv_insb = landisk_insb,
166 .mv_insw = landisk_insw,
167 .mv_insl = landisk_insl,
168 .mv_outsb = landisk_outsb,
169 .mv_outsw = landisk_outsw,
170 .mv_outsl = landisk_outsl,
171 .mv_ioport_map = landisk_ioport_map,
172 .mv_init_irq = init_landisk_IRQ,
173#ifdef CONFIG_HEARTBEAT
174 .mv_heartbeat = heartbeat_landisk,
175#endif
176};
177ALIAS_MV(landisk)
diff --git a/arch/sh/boards/mpc1211/rtc.c b/arch/sh/boards/mpc1211/rtc.c
index a76c655dceee..03b123a4bba4 100644
--- a/arch/sh/boards/mpc1211/rtc.c
+++ b/arch/sh/boards/mpc1211/rtc.c
@@ -130,7 +130,7 @@ int mpc1211_rtc_settimeofday(const struct timeval *tv)
130 130
131void mpc1211_time_init(void) 131void mpc1211_time_init(void)
132{ 132{
133 rtc_get_time = mpc1211_rtc_gettimeofday; 133 rtc_sh_get_time = mpc1211_rtc_gettimeofday;
134 rtc_set_time = mpc1211_rtc_settimeofday; 134 rtc_sh_set_time = mpc1211_rtc_settimeofday;
135} 135}
136 136
diff --git a/arch/sh/boards/mpc1211/setup.c b/arch/sh/boards/mpc1211/setup.c
index 2bfb221cc35c..8eb5d4303972 100644
--- a/arch/sh/boards/mpc1211/setup.c
+++ b/arch/sh/boards/mpc1211/setup.c
@@ -10,14 +10,12 @@
10#include <linux/hdreg.h> 10#include <linux/hdreg.h>
11#include <linux/ide.h> 11#include <linux/ide.h>
12#include <linux/interrupt.h> 12#include <linux/interrupt.h>
13
14#include <asm/io.h> 13#include <asm/io.h>
15#include <asm/machvec.h> 14#include <asm/machvec.h>
16#include <asm/mpc1211/mpc1211.h> 15#include <asm/mpc1211/mpc1211.h>
17#include <asm/mpc1211/pci.h> 16#include <asm/mpc1211/pci.h>
18#include <asm/mpc1211/m1543c.h> 17#include <asm/mpc1211/m1543c.h>
19 18
20
21/* ALI15X3 SMBus address offsets */ 19/* ALI15X3 SMBus address offsets */
22#define SMBHSTSTS (0 + 0x3100) 20#define SMBHSTSTS (0 + 0x3100)
23#define SMBHSTCNT (1 + 0x3100) 21#define SMBHSTCNT (1 + 0x3100)
@@ -50,11 +48,6 @@
50#define ALI15X3_STS_TERM 0x80 /* terminated by abort */ 48#define ALI15X3_STS_TERM 0x80 /* terminated by abort */
51#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */ 49#define ALI15X3_STS_ERR 0xE0 /* all the bad error bits */
52 50
53const char *get_system_type(void)
54{
55 return "Interface MPC-1211(CTP/PCI/MPC-SH02)";
56}
57
58static void __init pci_write_config(unsigned long busNo, 51static void __init pci_write_config(unsigned long busNo,
59 unsigned long devNo, 52 unsigned long devNo,
60 unsigned long fncNo, 53 unsigned long fncNo,
@@ -80,9 +73,6 @@ volatile unsigned long irq_err_count;
80 73
81static void disable_mpc1211_irq(unsigned int irq) 74static void disable_mpc1211_irq(unsigned int irq)
82{ 75{
83 unsigned long flags;
84
85 save_and_cli(flags);
86 if( irq < 8) { 76 if( irq < 8) {
87 m_irq_mask |= (1 << irq); 77 m_irq_mask |= (1 << irq);
88 outb(m_irq_mask,I8259_M_MR); 78 outb(m_irq_mask,I8259_M_MR);
@@ -90,16 +80,11 @@ static void disable_mpc1211_irq(unsigned int irq)
90 s_irq_mask |= (1 << (irq - 8)); 80 s_irq_mask |= (1 << (irq - 8));
91 outb(s_irq_mask,I8259_S_MR); 81 outb(s_irq_mask,I8259_S_MR);
92 } 82 }
93 restore_flags(flags);
94 83
95} 84}
96 85
97static void enable_mpc1211_irq(unsigned int irq) 86static void enable_mpc1211_irq(unsigned int irq)
98{ 87{
99 unsigned long flags;
100
101 save_and_cli(flags);
102
103 if( irq < 8) { 88 if( irq < 8) {
104 m_irq_mask &= ~(1 << irq); 89 m_irq_mask &= ~(1 << irq);
105 outb(m_irq_mask,I8259_M_MR); 90 outb(m_irq_mask,I8259_M_MR);
@@ -107,7 +92,6 @@ static void enable_mpc1211_irq(unsigned int irq)
107 s_irq_mask &= ~(1 << (irq - 8)); 92 s_irq_mask &= ~(1 << (irq - 8));
108 outb(s_irq_mask,I8259_S_MR); 93 outb(s_irq_mask,I8259_S_MR);
109 } 94 }
110 restore_flags(flags);
111} 95}
112 96
113static inline int mpc1211_irq_real(unsigned int irq) 97static inline int mpc1211_irq_real(unsigned int irq)
@@ -131,10 +115,6 @@ static inline int mpc1211_irq_real(unsigned int irq)
131 115
132static void mask_and_ack_mpc1211(unsigned int irq) 116static void mask_and_ack_mpc1211(unsigned int irq)
133{ 117{
134 unsigned long flags;
135
136 save_and_cli(flags);
137
138 if(irq < 8) { 118 if(irq < 8) {
139 if(m_irq_mask & (1<<irq)){ 119 if(m_irq_mask & (1<<irq)){
140 if(!mpc1211_irq_real(irq)){ 120 if(!mpc1211_irq_real(irq)){
@@ -162,7 +142,6 @@ static void mask_and_ack_mpc1211(unsigned int irq)
162 outb(0x60+(irq-8),I8259_S_CR); /* EOI */ 142 outb(0x60+(irq-8),I8259_S_CR); /* EOI */
163 outb(0x60+2,I8259_M_CR); 143 outb(0x60+2,I8259_M_CR);
164 } 144 }
165 restore_flags(flags);
166} 145}
167 146
168static void end_mpc1211_irq(unsigned int irq) 147static void end_mpc1211_irq(unsigned int irq)
@@ -219,7 +198,7 @@ int mpc1211_irq_demux(int irq)
219 return irq; 198 return irq;
220} 199}
221 200
222void __init init_mpc1211_IRQ(void) 201static void __init init_mpc1211_IRQ(void)
223{ 202{
224 int i; 203 int i;
225 /* 204 /*
@@ -255,23 +234,12 @@ void __init init_mpc1211_IRQ(void)
255 } 234 }
256} 235}
257 236
258/* 237static void delay1000(void)
259 Initialize the board
260*/
261
262
263static void delay (void)
264{
265 volatile unsigned short tmp;
266 tmp = *(volatile unsigned short *) 0xa0000000;
267}
268
269static void delay1000 (void)
270{ 238{
271 int i; 239 int i;
272 240
273 for (i=0; i<1000; i++) 241 for (i=0; i<1000; i++)
274 delay (); 242 ctrl_delay();
275} 243}
276 244
277static int put_smb_blk(unsigned char *p, int address, int command, int no) 245static int put_smb_blk(unsigned char *p, int address, int command, int no)
@@ -314,26 +282,10 @@ static int put_smb_blk(unsigned char *p, int address, int command, int no)
314 return 0; 282 return 0;
315} 283}
316 284
317/*
318 * The Machine Vector
319 */
320
321struct sh_machine_vector mv_mpc1211 __initmv = {
322 .mv_nr_irqs = 48,
323 .mv_irq_demux = mpc1211_irq_demux,
324 .mv_init_irq = init_mpc1211_IRQ,
325
326#ifdef CONFIG_HEARTBEAT
327 .mv_heartbeat = heartbeat_mpc1211,
328#endif
329};
330
331ALIAS_MV(mpc1211)
332
333/* arch/sh/boards/mpc1211/rtc.c */ 285/* arch/sh/boards/mpc1211/rtc.c */
334void mpc1211_time_init(void); 286void mpc1211_time_init(void);
335 287
336int __init platform_setup(void) 288static void __init mpc1211_setup(char **cmdline_p)
337{ 289{
338 unsigned char spd_buf[128]; 290 unsigned char spd_buf[128];
339 291
@@ -357,3 +309,18 @@ int __init platform_setup(void)
357 return 0; 309 return 0;
358} 310}
359 311
312/*
313 * The Machine Vector
314 */
315struct sh_machine_vector mv_mpc1211 __initmv = {
316 .mv_name = "Interface MPC-1211(CTP/PCI/MPC-SH02)",
317 .mv_setup = mpc1211_setup,
318 .mv_nr_irqs = 48,
319 .mv_irq_demux = mpc1211_irq_demux,
320 .mv_init_irq = init_mpc1211_IRQ,
321
322#ifdef CONFIG_HEARTBEAT
323 .mv_heartbeat = heartbeat_mpc1211,
324#endif
325};
326ALIAS_MV(mpc1211)
diff --git a/arch/sh/boards/overdrive/Makefile b/arch/sh/boards/overdrive/Makefile
deleted file mode 100644
index 245f03baf762..000000000000
--- a/arch/sh/boards/overdrive/Makefile
+++ /dev/null
@@ -1,8 +0,0 @@
1#
2# Makefile for the STMicroelectronics Overdrive specific parts of the kernel
3#
4
5obj-y := mach.o setup.o io.o irq.o led.o
6
7obj-$(CONFIG_PCI) += fpga.o galileo.o pcidma.o
8
diff --git a/arch/sh/boards/overdrive/fpga.c b/arch/sh/boards/overdrive/fpga.c
deleted file mode 100644
index 956c23901228..000000000000
--- a/arch/sh/boards/overdrive/fpga.c
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file handles programming up the Altera Flex10K that interfaces to
8 * the Galileo, and does the PS/2 keyboard and mouse
9 *
10 */
11
12
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/smp_lock.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20
21
22#include <asm/overdriver/gt64111.h>
23#include <asm/overdrive/overdrive.h>
24#include <asm/overdrive/fpga.h>
25
26#define FPGA_NotConfigHigh() (*FPGA_ControlReg) = (*FPGA_ControlReg) | ENABLE_FPGA_BIT
27#define FPGA_NotConfigLow() (*FPGA_ControlReg) = (*FPGA_ControlReg) & RESET_FPGA_MASK
28
29/* I need to find out what (if any) the real delay factor here is */
30/* The delay is definately not critical */
31#define long_delay() {int i;for(i=0;i<10000;i++);}
32#define short_delay() {int i;for(i=0;i<100;i++);}
33
34static void __init program_overdrive_fpga(const unsigned char *fpgacode,
35 int size)
36{
37 int timeout = 0;
38 int i, j;
39 unsigned char b;
40 static volatile unsigned char *FPGA_ControlReg =
41 (volatile unsigned char *) (OVERDRIVE_CTRL);
42 static volatile unsigned char *FPGA_ProgramReg =
43 (volatile unsigned char *) (FPGA_DCLK_ADDRESS);
44
45 printk("FPGA: Commencing FPGA Programming\n");
46
47 /* The PCI reset but MUST be low when programming the FPGA !!! */
48 b = (*FPGA_ControlReg) & RESET_PCI_MASK;
49
50 (*FPGA_ControlReg) = b;
51
52 /* Prepare FPGA to program */
53
54 FPGA_NotConfigHigh();
55 long_delay();
56
57 FPGA_NotConfigLow();
58 short_delay();
59
60 while ((*FPGA_ProgramReg & FPGA_NOT_STATUS) != 0) {
61 printk("FPGA: Waiting for NotStatus to go Low ... \n");
62 }
63
64 FPGA_NotConfigHigh();
65
66 /* Wait for FPGA "ready to be programmed" signal */
67 printk("FPGA: Waiting for NotStatus to go high (FPGA ready)... \n");
68
69 for (timeout = 0;
70 (((*FPGA_ProgramReg & FPGA_NOT_STATUS) == 0)
71 && (timeout < FPGA_TIMEOUT)); timeout++);
72
73 /* Check if timeout condition occured - i.e. an error */
74
75 if (timeout == FPGA_TIMEOUT) {
76 printk
77 ("FPGA: Failed to program - Timeout waiting for notSTATUS to go high\n");
78 return;
79 }
80
81 printk("FPGA: Copying data to FPGA ... %d bytes\n", size);
82
83 /* Copy array to FPGA - bit at a time */
84
85 for (i = 0; i < size; i++) {
86 volatile unsigned w = 0;
87
88 for (j = 0; j < 8; j++) {
89 *FPGA_ProgramReg = (fpgacode[i] >> j) & 0x01;
90 short_delay();
91 }
92 if ((i & 0x3ff) == 0) {
93 printk(".");
94 }
95 }
96
97 /* Waiting for CONFDONE to go high - means the program is complete */
98
99 for (timeout = 0;
100 (((*FPGA_ProgramReg & FPGA_CONFDONE) == 0)
101 && (timeout < FPGA_TIMEOUT)); timeout++) {
102
103 *FPGA_ProgramReg = 0x0;
104 long_delay();
105 }
106
107 if (timeout == FPGA_TIMEOUT) {
108 printk
109 ("FPGA: Failed to program - Timeout waiting for CONFDONE to go high\n");
110 return;
111 } else { /* Clock another 10 times - gets the device into a working state */
112 for (i = 0; i < 10; i++) {
113 *FPGA_ProgramReg = 0x0;
114 short_delay();
115 }
116 }
117
118 printk("FPGA: Programming complete\n");
119}
120
121
122static const unsigned char __init fpgacode[] = {
123#include "./overdrive.ttf" /* Code from maxplus2 compiler */
124 , 0, 0
125};
126
127
128int __init init_overdrive_fpga(void)
129{
130 program_overdrive_fpga(fpgacode, sizeof(fpgacode));
131
132 return 0;
133}
diff --git a/arch/sh/boards/overdrive/galileo.c b/arch/sh/boards/overdrive/galileo.c
deleted file mode 100644
index 29e48971bba0..000000000000
--- a/arch/sh/boards/overdrive/galileo.c
+++ /dev/null
@@ -1,587 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains the PCI routines required for the Galileo GT6411
8 * PCI bridge as used on the Orion and Overdrive boards.
9 *
10 */
11
12#include <linux/kernel.h>
13#include <linux/smp.h>
14#include <linux/smp_lock.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/pci.h>
18#include <linux/delay.h>
19#include <linux/types.h>
20#include <linux/ioport.h>
21
22#include <asm/overdrive/overdrive.h>
23#include <asm/overdrive/gt64111.h>
24
25
26/* After boot, we shift the Galileo registers so that they appear
27 * in BANK6, along with IO space. This means we can have one contingous
28 * lump of PCI address space without these registers appearing in the
29 * middle of them
30 */
31
32#define GT64111_BASE_ADDRESS 0xbb000000
33#define GT64111_IO_BASE_ADDRESS 0x1000
34/* The GT64111 registers appear at this address to the SH4 after reset */
35#define RESET_GT64111_BASE_ADDRESS 0xb4000000
36
37/* Macros used to access the Galileo registers */
38#define RESET_GT64111_REG(x) (RESET_GT64111_BASE_ADDRESS+x)
39#define GT64111_REG(x) (GT64111_BASE_ADDRESS+x)
40
41#define RESET_GT_WRITE(x,v) writel((v),RESET_GT64111_REG(x))
42
43#define RESET_GT_READ(x) readl(RESET_GT64111_REG(x))
44
45#define GT_WRITE(x,v) writel((v),GT64111_REG(x))
46#define GT_WRITE_BYTE(x,v) writeb((v),GT64111_REG(x))
47#define GT_WRITE_SHORT(x,v) writew((v),GT64111_REG(x))
48
49#define GT_READ(x) readl(GT64111_REG(x))
50#define GT_READ_BYTE(x) readb(GT64111_REG(x))
51#define GT_READ_SHORT(x) readw(GT64111_REG(x))
52
53
54/* Where the various SH banks start at */
55#define SH_BANK4_ADR 0xb0000000
56#define SH_BANK5_ADR 0xb4000000
57#define SH_BANK6_ADR 0xb8000000
58
59/* Masks out everything but lines 28,27,26 */
60#define BANK_SELECT_MASK 0x1c000000
61
62#define SH4_TO_BANK(x) ( (x) & BANK_SELECT_MASK)
63
64/*
65 * Masks used for address conversaion. Bank 6 is used for IO and
66 * has all the address bits zeroed by the FPGA. Special case this
67 */
68#define MEMORY_BANK_MASK 0x1fffffff
69#define IO_BANK_MASK 0x03ffffff
70
71/* Mark bank 6 as the bank used for IO. You can change this in the FPGA code
72 * if you want
73 */
74#define IO_BANK_ADR PCI_GTIO_BASE
75
76/* Will select the correct mask to apply depending on the SH$ address */
77#define SELECT_BANK_MASK(x) \
78 ( (SH4_TO_BANK(x)==SH4_TO_BANK(IO_BANK_ADR)) ? IO_BANK_MASK : MEMORY_BANK_MASK)
79
80/* Converts between PCI space and P2 region */
81#define SH4_TO_PCI(x) ((x)&SELECT_BANK_MASK(x))
82
83/* Various macros for figuring out what to stick in the Galileo registers.
84 * You *really* don't want to figure this stuff out by hand, you always get
85 * it wrong
86 */
87#define GT_MEM_LO_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7ff)
88#define GT_MEM_HI_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>21)&0x7f)
89#define GT_MEM_SUB_ADR(x) ((((unsigned)((x)&SELECT_BANK_MASK(x)))>>20)&0xff)
90
91#define PROGRAM_HI_LO(block,a,s) \
92 GT_WRITE(block##_LO_DEC_ADR,GT_MEM_LO_ADR(a));\
93 GT_WRITE(block##_HI_DEC_ADR,GT_MEM_HI_ADR(a+s-1))
94
95#define PROGRAM_SUB_HI_LO(block,a,s) \
96 GT_WRITE(block##_LO_DEC_ADR,GT_MEM_SUB_ADR(a));\
97 GT_WRITE(block##_HI_DEC_ADR,GT_MEM_SUB_ADR(a+s-1))
98
99/* We need to set the size, and the offset register */
100
101#define GT_BAR_MASK(x) ((x)&~0xfff)
102
103/* Macro to set up the BAR in the Galileo. Essentially used for the DRAM */
104#define PROGRAM_GT_BAR(block,a,s) \
105 GT_WRITE(PCI_##block##_BANK_SIZE,GT_BAR_MASK((s-1)));\
106 write_config_to_galileo(PCI_CONFIG_##block##_BASE_ADR,\
107 GT_BAR_MASK(a))
108
109#define DISABLE_GT_BAR(block) \
110 GT_WRITE(PCI_##block##_BANK_SIZE,0),\
111 GT_CONFIG_WRITE(PCI_CONFIG_##block##_BASE_ADR,\
112 0x80000000)
113
114/* Macros to disable things we are not going to use */
115#define DISABLE_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0x7ff);\
116 GT_WRITE(x##_HI_DEC_ADR,0x00)
117
118#define DISABLE_SUB_DECODE(x) GT_WRITE(x##_LO_DEC_ADR,0xff);\
119 GT_WRITE(x##_HI_DEC_ADR,0x00)
120
121static void __init reset_pci(void)
122{
123 /* Set RESET_PCI bit high */
124 writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
125 udelay(250);
126
127 /* Set RESET_PCI bit low */
128 writeb(readb(OVERDRIVE_CTRL) & RESET_PCI_MASK, OVERDRIVE_CTRL);
129 udelay(250);
130
131 writeb(readb(OVERDRIVE_CTRL) | ENABLE_PCI_BIT, OVERDRIVE_CTRL);
132 udelay(250);
133}
134
135static int write_config_to_galileo(int where, u32 val);
136#define GT_CONFIG_WRITE(where,val) write_config_to_galileo(where,val)
137
138#define ENABLE_PCI_DRAM
139
140
141#ifdef TEST_DRAM
142/* Test function to check out if the PCI DRAM is working OK */
143static int /* __init */ test_dram(unsigned *base, unsigned size)
144{
145 unsigned *p = base;
146 unsigned *end = (unsigned *) (((unsigned) base) + size);
147 unsigned w;
148
149 for (p = base; p < end; p++) {
150 *p = 0xffffffff;
151 if (*p != 0xffffffff) {
152 printk("AAARGH -write failed!!! at %p is %x\n", p,
153 *p);
154 return 0;
155 }
156 *p = 0x0;
157 if (*p != 0x0) {
158 printk("AAARGH -write failed!!!\n");
159 return 0;
160 }
161 }
162
163 for (p = base; p < end; p++) {
164 *p = (unsigned) p;
165 if (*p != (unsigned) p) {
166 printk("Failed at 0x%p, actually is 0x%x\n", p,
167 *p);
168 return 0;
169 }
170 }
171
172 for (p = base; p < end; p++) {
173 w = ((unsigned) p & 0xffff0000);
174 *p = w | (w >> 16);
175 }
176
177 for (p = base; p < end; p++) {
178 w = ((unsigned) p & 0xffff0000);
179 w |= (w >> 16);
180 if (*p != w) {
181 printk
182 ("Failed at 0x%p, should be 0x%x actually is 0x%x\n",
183 p, w, *p);
184 return 0;
185 }
186 }
187
188 return 1;
189}
190#endif
191
192
193/* Function to set up and initialise the galileo. This sets up the BARS,
194 * maps the DRAM into the address space etc,etc
195 */
196int __init galileo_init(void)
197{
198 reset_pci();
199
200 /* Now shift the galileo regs into this block */
201 RESET_GT_WRITE(INTERNAL_SPACE_DEC,
202 GT_MEM_LO_ADR(GT64111_BASE_ADDRESS));
203
204 /* Should have a sanity check here, that you can read back at the new
205 * address what you just wrote
206 */
207
208 /* Disable decode for all regions */
209 DISABLE_DECODE(RAS10);
210 DISABLE_DECODE(RAS32);
211 DISABLE_DECODE(CS20);
212 DISABLE_DECODE(CS3);
213 DISABLE_DECODE(PCI_IO);
214 DISABLE_DECODE(PCI_MEM0);
215 DISABLE_DECODE(PCI_MEM1);
216
217 /* Disable all BARS */
218 GT_WRITE(BAR_ENABLE_ADR, 0x1ff);
219 DISABLE_GT_BAR(RAS10);
220 DISABLE_GT_BAR(RAS32);
221 DISABLE_GT_BAR(CS20);
222 DISABLE_GT_BAR(CS3);
223
224 /* Tell the BAR where the IO registers now are */
225 GT_CONFIG_WRITE(PCI_CONFIG_INT_REG_IO_ADR,GT_BAR_MASK(
226 (GT64111_IO_BASE_ADDRESS &
227 IO_BANK_MASK)));
228 /* set up a 112 Mb decode */
229 PROGRAM_HI_LO(PCI_MEM0, SH_BANK4_ADR, 112 * 1024 * 1024);
230
231 /* Set up a 32 MB io space decode */
232 PROGRAM_HI_LO(PCI_IO, IO_BANK_ADR, 32 * 1024 * 1024);
233
234#ifdef ENABLE_PCI_DRAM
235 /* Program up the DRAM configuration - there is DRAM only in bank 0 */
236 /* Now set up the DRAM decode */
237 PROGRAM_HI_LO(RAS10, PCI_DRAM_BASE, PCI_DRAM_SIZE);
238 /* And the sub decode */
239 PROGRAM_SUB_HI_LO(RAS0, PCI_DRAM_BASE, PCI_DRAM_SIZE);
240
241 DISABLE_SUB_DECODE(RAS1);
242
243 /* Set refresh rate */
244 GT_WRITE(DRAM_BANK0_PARMS, 0x3f);
245 GT_WRITE(DRAM_CFG, 0x100);
246
247 /* we have to lob off the top bits rememeber!! */
248 PROGRAM_GT_BAR(RAS10, SH4_TO_PCI(PCI_DRAM_BASE), PCI_DRAM_SIZE);
249
250#endif
251
252 /* We are only interested in decoding RAS10 and the Galileo's internal
253 * registers (as IO) on the PCI bus
254 */
255#ifdef ENABLE_PCI_DRAM
256 GT_WRITE(BAR_ENABLE_ADR, (~((1 << 8) | (1 << 3))) & 0x1ff);
257#else
258 GT_WRITE(BAR_ENABLE_ADR, (~(1 << 3)) & 0x1ff);
259#endif
260
261 /* Change the class code to host bridge, it actually powers up
262 * as a memory controller
263 */
264 GT_CONFIG_WRITE(8, 0x06000011);
265
266 /* Allow the galileo to master the PCI bus */
267 GT_CONFIG_WRITE(PCI_COMMAND,
268 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER |
269 PCI_COMMAND_IO);
270
271
272#if 0
273 printk("Testing PCI DRAM - ");
274 if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
275 printk("Passed\n");
276 }else {
277 printk("FAILED\n");
278 }
279#endif
280 return 0;
281
282}
283
284
285#define SET_CONFIG_BITS(bus,devfn,where)\
286 ((1<<31) | ((bus) << 16) | ((devfn) << 8) | ((where) & ~3))
287
288#define CONFIG_CMD(dev, where) SET_CONFIG_BITS((dev)->bus->number,(dev)->devfn,where)
289
290/* This write to the galileo config registers, unlike the functions below, can
291 * be used before the PCI subsystem has started up
292 */
293static int __init write_config_to_galileo(int where, u32 val)
294{
295 GT_WRITE(PCI_CFG_ADR, SET_CONFIG_BITS(0, 0, where));
296
297 GT_WRITE(PCI_CFG_DATA, val);
298 return 0;
299}
300
301/* We exclude the galileo and slot 31, the galileo because I don't know how to stop
302 * the setup code shagging up the setup I have done on it, and 31 because the whole
303 * thing locks up if you try to access that slot (which doesn't exist of course anyway
304 */
305
306#define EXCLUDED_DEV(dev) ((dev->bus->number==0) && ((PCI_SLOT(dev->devfn)==0) || (PCI_SLOT(dev->devfn) == 31)))
307
308static int galileo_read_config_byte(struct pci_dev *dev, int where,
309 u8 * val)
310{
311
312
313 /* I suspect this doesn't work because this drives a special cycle ? */
314 if (EXCLUDED_DEV(dev)) {
315 *val = 0xff;
316 return PCIBIOS_SUCCESSFUL;
317 }
318 /* Start the config cycle */
319 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
320 /* Read back the result */
321 *val = GT_READ_BYTE(PCI_CFG_DATA + (where & 3));
322
323 return PCIBIOS_SUCCESSFUL;
324}
325
326
327static int galileo_read_config_word(struct pci_dev *dev, int where,
328 u16 * val)
329{
330
331 if (EXCLUDED_DEV(dev)) {
332 *val = 0xffff;
333 return PCIBIOS_SUCCESSFUL;
334 }
335
336 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
337 *val = GT_READ_SHORT(PCI_CFG_DATA + (where & 2));
338
339 return PCIBIOS_SUCCESSFUL;
340}
341
342
343static int galileo_read_config_dword(struct pci_dev *dev, int where,
344 u32 * val)
345{
346 if (EXCLUDED_DEV(dev)) {
347 *val = 0xffffffff;
348 return PCIBIOS_SUCCESSFUL;
349 }
350
351 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
352 *val = GT_READ(PCI_CFG_DATA);
353
354 return PCIBIOS_SUCCESSFUL;
355}
356
357static int galileo_write_config_byte(struct pci_dev *dev, int where,
358 u8 val)
359{
360 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
361
362 GT_WRITE_BYTE(PCI_CFG_DATA + (where & 3), val);
363
364 return PCIBIOS_SUCCESSFUL;
365}
366
367
368static int galileo_write_config_word(struct pci_dev *dev, int where,
369 u16 val)
370{
371 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
372
373 GT_WRITE_SHORT(PCI_CFG_DATA + (where & 2), val);
374
375 return PCIBIOS_SUCCESSFUL;
376}
377
378static int galileo_write_config_dword(struct pci_dev *dev, int where,
379 u32 val)
380{
381 GT_WRITE(PCI_CFG_ADR, CONFIG_CMD(dev, where));
382
383 GT_WRITE(PCI_CFG_DATA, val);
384
385 return PCIBIOS_SUCCESSFUL;
386}
387
388static struct pci_ops pci_config_ops = {
389 galileo_read_config_byte,
390 galileo_read_config_word,
391 galileo_read_config_dword,
392 galileo_write_config_byte,
393 galileo_write_config_word,
394 galileo_write_config_dword
395};
396
397
398/* Everything hangs off this */
399static struct pci_bus *pci_root_bus;
400
401
402static u8 __init no_swizzle(struct pci_dev *dev, u8 * pin)
403{
404 return PCI_SLOT(dev->devfn);
405}
406
407static int __init map_od_irq(struct pci_dev *dev, u8 slot, u8 pin)
408{
409 /* Slot 1: Galileo
410 * Slot 2: PCI Slot 1
411 * Slot 3: PCI Slot 2
412 * Slot 4: ESS
413 */
414 switch (slot) {
415 case 2:
416 return OVERDRIVE_PCI_IRQ1;
417 case 3:
418 /* Note this assumes you have a hacked card in slot 2 */
419 return OVERDRIVE_PCI_IRQ2;
420 case 4:
421 return OVERDRIVE_ESS_IRQ;
422 default:
423 /* printk("PCI: Unexpected IRQ mapping request for slot %d\n", slot); */
424 return -1;
425 }
426}
427
428
429
430void __init
431pcibios_fixup_pbus_ranges(struct pci_bus *bus, struct pbus_set_ranges_data *ranges)
432{
433 ranges->io_start -= bus->resource[0]->start;
434 ranges->io_end -= bus->resource[0]->start;
435 ranges->mem_start -= bus->resource[1]->start;
436 ranges->mem_end -= bus->resource[1]->start;
437}
438
439static void __init pci_fixup_ide_bases(struct pci_dev *d)
440{
441 int i;
442
443 /*
444 * PCI IDE controllers use non-standard I/O port decoding, respect it.
445 */
446 if ((d->class >> 8) != PCI_CLASS_STORAGE_IDE)
447 return;
448 printk("PCI: IDE base address fixup for %s\n", pci_name(d));
449 for(i=0; i<4; i++) {
450 struct resource *r = &d->resource[i];
451 if ((r->start & ~0x80) == 0x374) {
452 r->start |= 2;
453 r->end = r->start;
454 }
455 }
456}
457DECLARE_PCI_FIXUP_HEADER(PCI_ANY_ID, PCI_ANY_ID, pci_fixup_ide_bases);
458
459void __init pcibios_init(void)
460{
461 static struct resource galio,galmem;
462
463 /* Allocate the registers used by the Galileo */
464 galio.flags = IORESOURCE_IO;
465 galio.name = "Galileo GT64011";
466 galmem.flags = IORESOURCE_MEM|IORESOURCE_PREFETCH;
467 galmem.name = "Galileo GT64011 DRAM";
468
469 allocate_resource(&ioport_resource, &galio, 256,
470 GT64111_IO_BASE_ADDRESS,GT64111_IO_BASE_ADDRESS+256, 256, NULL, NULL);
471 allocate_resource(&iomem_resource, &galmem,PCI_DRAM_SIZE,
472 PHYSADDR(PCI_DRAM_BASE), PHYSADDR(PCI_DRAM_BASE)+PCI_DRAM_SIZE,
473 PCI_DRAM_SIZE, NULL, NULL);
474
475 /* ok, do the scan man */
476 pci_root_bus = pci_scan_bus(0, &pci_config_ops, NULL);
477
478 pci_assign_unassigned_resources();
479 pci_fixup_irqs(no_swizzle, map_od_irq);
480
481#ifdef TEST_DRAM
482 printk("Testing PCI DRAM - ");
483 if(test_dram(PCI_DRAM_BASE,PCI_DRAM_SIZE)) {
484 printk("Passed\n");
485 }else {
486 printk("FAILED\n");
487 }
488#endif
489
490}
491
492char * __init pcibios_setup(char *str)
493{
494 return str;
495}
496
497
498
499int pcibios_enable_device(struct pci_dev *dev)
500{
501
502 u16 cmd, old_cmd;
503 int idx;
504 struct resource *r;
505
506 pci_read_config_word(dev, PCI_COMMAND, &cmd);
507 old_cmd = cmd;
508 for (idx = 0; idx < 6; idx++) {
509 r = dev->resource + idx;
510 if (!r->start && r->end) {
511 printk(KERN_ERR
512 "PCI: Device %s not available because"
513 " of resource collisions\n",
514 pci_name(dev));
515 return -EINVAL;
516 }
517 if (r->flags & IORESOURCE_IO)
518 cmd |= PCI_COMMAND_IO;
519 if (r->flags & IORESOURCE_MEM)
520 cmd |= PCI_COMMAND_MEMORY;
521 }
522 if (cmd != old_cmd) {
523 printk("PCI: enabling device %s (%04x -> %04x)\n",
524 pci_name(dev), old_cmd, cmd);
525 pci_write_config_word(dev, PCI_COMMAND, cmd);
526 }
527 return 0;
528
529}
530
531/* We should do some optimisation work here I think. Ok for now though */
532void __init pcibios_fixup_bus(struct pci_bus *bus)
533{
534
535}
536
537void pcibios_align_resource(void *data, struct resource *res,
538 resource_size_t size)
539{
540}
541
542void __init pcibios_update_resource(struct pci_dev *dev, struct resource *root,
543 struct resource *res, int resource)
544{
545
546 unsigned long where, size;
547 u32 reg;
548
549
550 printk("PCI: Assigning %3s %08lx to %s\n",
551 res->flags & IORESOURCE_IO ? "IO" : "MEM",
552 res->start, dev->name);
553
554 where = PCI_BASE_ADDRESS_0 + resource * 4;
555 size = res->end - res->start;
556
557 pci_read_config_dword(dev, where, &reg);
558 reg = (reg & size) | (((u32) (res->start - root->start)) & ~size);
559 pci_write_config_dword(dev, where, reg);
560}
561
562
563void __init pcibios_update_irq(struct pci_dev *dev, int irq)
564{
565 printk("PCI: Assigning IRQ %02d to %s\n", irq, dev->name);
566 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, irq);
567}
568
569/*
570 * If we set up a device for bus mastering, we need to check the latency
571 * timer as certain crappy BIOSes forget to set it properly.
572 */
573unsigned int pcibios_max_latency = 255;
574
575void pcibios_set_master(struct pci_dev *dev)
576{
577 u8 lat;
578 pci_read_config_byte(dev, PCI_LATENCY_TIMER, &lat);
579 if (lat < 16)
580 lat = (64 <= pcibios_max_latency) ? 64 : pcibios_max_latency;
581 else if (lat > pcibios_max_latency)
582 lat = pcibios_max_latency;
583 else
584 return;
585 printk("PCI: Setting latency timer of device %s to %d\n", pci_name(dev), lat);
586 pci_write_config_byte(dev, PCI_LATENCY_TIMER, lat);
587}
diff --git a/arch/sh/boards/overdrive/io.c b/arch/sh/boards/overdrive/io.c
deleted file mode 100644
index 4671b6b047bb..000000000000
--- a/arch/sh/boards/overdrive/io.c
+++ /dev/null
@@ -1,172 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains the I/O routines for use on the overdrive board
8 *
9 */
10
11#include <linux/types.h>
12#include <linux/delay.h>
13#include <asm/processor.h>
14#include <asm/io.h>
15#include <asm/addrspace.h>
16
17#include <asm/overdrive/overdrive.h>
18
19/*
20 * readX/writeX() are used to access memory mapped devices. On some
21 * architectures the memory mapped IO stuff needs to be accessed
22 * differently. On the SuperH architecture, we just read/write the
23 * memory location directly.
24 */
25
26#define dprintk(x...)
27
28/* Translates an IO address to where it is mapped in memory */
29
30#define io_addr(x) (((unsigned)(x))|PCI_GTIO_BASE)
31
32unsigned char od_inb(unsigned long port)
33{
34dprintk("od_inb(%x)\n", port);
35 return readb(io_addr(port)) & 0xff;
36}
37
38
39unsigned short od_inw(unsigned long port)
40{
41dprintk("od_inw(%x)\n", port);
42 return readw(io_addr(port)) & 0xffff;
43}
44
45unsigned int od_inl(unsigned long port)
46{
47dprintk("od_inl(%x)\n", port);
48 return readl(io_addr(port));
49}
50
51void od_outb(unsigned char value, unsigned long port)
52{
53dprintk("od_outb(%x, %x)\n", value, port);
54 writeb(value, io_addr(port));
55}
56
57void od_outw(unsigned short value, unsigned long port)
58{
59dprintk("od_outw(%x, %x)\n", value, port);
60 writew(value, io_addr(port));
61}
62
63void od_outl(unsigned int value, unsigned long port)
64{
65dprintk("od_outl(%x, %x)\n", value, port);
66 writel(value, io_addr(port));
67}
68
69/* This is horrible at the moment - needs more work to do something sensible */
70#define IO_DELAY() udelay(10)
71
72#define OUT_DELAY(x,type) \
73void od_out##x##_p(unsigned type value,unsigned long port){out##x(value,port);IO_DELAY();}
74
75#define IN_DELAY(x,type) \
76unsigned type od_in##x##_p(unsigned long port) {unsigned type tmp=in##x(port);IO_DELAY();return tmp;}
77
78
79OUT_DELAY(b,char)
80OUT_DELAY(w,short)
81OUT_DELAY(l,int)
82
83IN_DELAY(b,char)
84IN_DELAY(w,short)
85IN_DELAY(l,int)
86
87
88/* Now for the string version of these functions */
89void od_outsb(unsigned long port, const void *addr, unsigned long count)
90{
91 int i;
92 unsigned char *p = (unsigned char *) addr;
93
94 for (i = 0; i < count; i++, p++) {
95 outb(*p, port);
96 }
97}
98
99
100void od_insb(unsigned long port, void *addr, unsigned long count)
101{
102 int i;
103 unsigned char *p = (unsigned char *) addr;
104
105 for (i = 0; i < count; i++, p++) {
106 *p = inb(port);
107 }
108}
109
110/* For the 16 and 32 bit string functions, we have to worry about alignment.
111 * The SH does not do unaligned accesses, so we have to read as bytes and
112 * then write as a word or dword.
113 * This can be optimised a lot more, especially in the case where the data
114 * is aligned
115 */
116
117void od_outsw(unsigned long port, const void *addr, unsigned long count)
118{
119 int i;
120 unsigned short tmp;
121 unsigned char *p = (unsigned char *) addr;
122
123 for (i = 0; i < count; i++, p += 2) {
124 tmp = (*p) | ((*(p + 1)) << 8);
125 outw(tmp, port);
126 }
127}
128
129
130void od_insw(unsigned long port, void *addr, unsigned long count)
131{
132 int i;
133 unsigned short tmp;
134 unsigned char *p = (unsigned char *) addr;
135
136 for (i = 0; i < count; i++, p += 2) {
137 tmp = inw(port);
138 p[0] = tmp & 0xff;
139 p[1] = (tmp >> 8) & 0xff;
140 }
141}
142
143
144void od_outsl(unsigned long port, const void *addr, unsigned long count)
145{
146 int i;
147 unsigned tmp;
148 unsigned char *p = (unsigned char *) addr;
149
150 for (i = 0; i < count; i++, p += 4) {
151 tmp = (*p) | ((*(p + 1)) << 8) | ((*(p + 2)) << 16) |
152 ((*(p + 3)) << 24);
153 outl(tmp, port);
154 }
155}
156
157
158void od_insl(unsigned long port, void *addr, unsigned long count)
159{
160 int i;
161 unsigned tmp;
162 unsigned char *p = (unsigned char *) addr;
163
164 for (i = 0; i < count; i++, p += 4) {
165 tmp = inl(port);
166 p[0] = tmp & 0xff;
167 p[1] = (tmp >> 8) & 0xff;
168 p[2] = (tmp >> 16) & 0xff;
169 p[3] = (tmp >> 24) & 0xff;
170
171 }
172}
diff --git a/arch/sh/boards/overdrive/irq.c b/arch/sh/boards/overdrive/irq.c
deleted file mode 100644
index 5d730c70389e..000000000000
--- a/arch/sh/boards/overdrive/irq.c
+++ /dev/null
@@ -1,191 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Looks after interrupts on the overdrive board.
8 *
9 * Bases on the IPR irq system
10 */
11
12#include <linux/init.h>
13#include <linux/irq.h>
14
15#include <asm/system.h>
16#include <asm/io.h>
17
18#include <asm/overdrive/overdrive.h>
19
20struct od_data {
21 int overdrive_irq;
22 int irq_mask;
23};
24
25#define NUM_EXTERNAL_IRQS 16
26#define EXTERNAL_IRQ_NOT_IN_USE (-1)
27#define EXTERNAL_IRQ_NOT_ASSIGNED (-1)
28
29/*
30 * This table is used to determine what to program into the FPGA's CT register
31 * for the specified Linux IRQ.
32 *
33 * The irq_mask gives the interrupt number from the PCI board (PCI_Int(6:0))
34 * but is one greater than that because the because the FPGA treats 0
35 * as disabled, a value of 1 asserts PCI_Int0, and so on.
36 *
37 * The overdrive_irq specifies which of the eight interrupt sources generates
38 * that interrupt, and but is multiplied by four to give the bit offset into
39 * the CT register.
40 *
41 * The seven interrupts levels (SH4 IRL's) we have available here is hardwired
42 * by the EPLD. The assignments here of which PCI interrupt generates each
43 * level is arbitary.
44 */
45static struct od_data od_data_table[NUM_EXTERNAL_IRQS] = {
46 /* overdrive_irq , irq_mask */
47 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 0 */
48 {EXTERNAL_IRQ_NOT_ASSIGNED, 7}, /* 1 */
49 {EXTERNAL_IRQ_NOT_ASSIGNED, 6}, /* 2 */
50 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 3 */
51 {EXTERNAL_IRQ_NOT_ASSIGNED, 5}, /* 4 */
52 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 5 */
53 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 6 */
54 {EXTERNAL_IRQ_NOT_ASSIGNED, 4}, /* 7 */
55 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 8 */
56 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 9 */
57 {EXTERNAL_IRQ_NOT_ASSIGNED, 3}, /* 10 */
58 {EXTERNAL_IRQ_NOT_ASSIGNED, 2}, /* 11 */
59 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 12 */
60 {EXTERNAL_IRQ_NOT_ASSIGNED, 1}, /* 13 */
61 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE}, /* 14 */
62 {EXTERNAL_IRQ_NOT_ASSIGNED, EXTERNAL_IRQ_NOT_IN_USE} /* 15 */
63};
64
65static void set_od_data(int overdrive_irq, int irq)
66{
67 if (irq >= NUM_EXTERNAL_IRQS || irq < 0)
68 return;
69 od_data_table[irq].overdrive_irq = overdrive_irq << 2;
70}
71
72static void enable_od_irq(unsigned int irq);
73void disable_od_irq(unsigned int irq);
74
75/* shutdown is same as "disable" */
76#define shutdown_od_irq disable_od_irq
77
78static void mask_and_ack_od(unsigned int);
79static void end_od_irq(unsigned int irq);
80
81static unsigned int startup_od_irq(unsigned int irq)
82{
83 enable_od_irq(irq);
84 return 0; /* never anything pending */
85}
86
87static struct hw_interrupt_type od_irq_type = {
88 .typename = "Overdrive-IRQ",
89 .startup = startup_od_irq,
90 .shutdown = shutdown_od_irq,
91 .enable = enable_od_irq,
92 .disable = disable_od_irq,
93 .ack = mask_and_ack_od,
94 .end = end_od_irq
95};
96
97static void disable_od_irq(unsigned int irq)
98{
99 unsigned val, flags;
100 int overdrive_irq;
101 unsigned mask;
102
103 /* Not a valid interrupt */
104 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
105 return;
106
107 /* Is is necessary to use a cli here? Would a spinlock not be
108 * mroe efficient?
109 */
110 local_irq_save(flags);
111 overdrive_irq = od_data_table[irq].overdrive_irq;
112 if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
113 mask = ~(0x7 << overdrive_irq);
114 val = ctrl_inl(OVERDRIVE_INT_CT);
115 val &= mask;
116 ctrl_outl(val, OVERDRIVE_INT_CT);
117 }
118 local_irq_restore(flags);
119}
120
121static void enable_od_irq(unsigned int irq)
122{
123 unsigned val, flags;
124 int overdrive_irq;
125 unsigned mask;
126
127 /* Not a valid interrupt */
128 if (irq < 0 || irq >= NUM_EXTERNAL_IRQS)
129 return;
130
131 /* Set priority in OD back to original value */
132 local_irq_save(flags);
133 /* This one is not in use currently */
134 overdrive_irq = od_data_table[irq].overdrive_irq;
135 if (overdrive_irq != EXTERNAL_IRQ_NOT_ASSIGNED) {
136 val = ctrl_inl(OVERDRIVE_INT_CT);
137 mask = ~(0x7 << overdrive_irq);
138 val &= mask;
139 mask = od_data_table[irq].irq_mask << overdrive_irq;
140 val |= mask;
141 ctrl_outl(val, OVERDRIVE_INT_CT);
142 }
143 local_irq_restore(flags);
144}
145
146
147
148/* this functions sets the desired irq handler to be an overdrive type */
149static void __init make_od_irq(unsigned int irq)
150{
151 disable_irq_nosync(irq);
152 irq_desc[irq].chip = &od_irq_type;
153 disable_od_irq(irq);
154}
155
156
157static void mask_and_ack_od(unsigned int irq)
158{
159 disable_od_irq(irq);
160}
161
162static void end_od_irq(unsigned int irq)
163{
164 enable_od_irq(irq);
165}
166
167void __init init_overdrive_irq(void)
168{
169 int i;
170
171 /* Disable all interrupts */
172 ctrl_outl(0, OVERDRIVE_INT_CT);
173
174 /* Update interrupt pin mode to use encoded interrupts */
175 i = ctrl_inw(INTC_ICR);
176 i &= ~INTC_ICR_IRLM;
177 ctrl_outw(i, INTC_ICR);
178
179 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) {
180 if (od_data_table[i].irq_mask != EXTERNAL_IRQ_NOT_IN_USE) {
181 make_od_irq(i);
182 } else if (i != 15) { // Cannot use imask on level 15
183 make_imask_irq(i);
184 }
185 }
186
187 /* Set up the interrupts */
188 set_od_data(OVERDRIVE_PCI_INTA, OVERDRIVE_PCI_IRQ1);
189 set_od_data(OVERDRIVE_PCI_INTB, OVERDRIVE_PCI_IRQ2);
190 set_od_data(OVERDRIVE_AUDIO_INT, OVERDRIVE_ESS_IRQ);
191}
diff --git a/arch/sh/boards/overdrive/led.c b/arch/sh/boards/overdrive/led.c
deleted file mode 100644
index 860d7f204a4e..000000000000
--- a/arch/sh/boards/overdrive/led.c
+++ /dev/null
@@ -1,58 +0,0 @@
1/*
2 * linux/arch/sh/overdrive/led.c
3 *
4 * Copyright (C) 1999 Stuart Menefy <stuart.menefy@st.com>
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * This file contains an Overdrive specific LED feature.
10 */
11
12#include <asm/system.h>
13#include <asm/io.h>
14#include <asm/overdrive/overdrive.h>
15
16static void mach_led(int position, int value)
17{
18 unsigned long flags;
19 unsigned long reg;
20
21 local_irq_save(flags);
22
23 reg = readl(OVERDRIVE_CTRL);
24 if (value) {
25 reg |= (1<<3);
26 } else {
27 reg &= ~(1<<3);
28 }
29 writel(reg, OVERDRIVE_CTRL);
30
31 local_irq_restore(flags);
32}
33
34#ifdef CONFIG_HEARTBEAT
35
36#include <linux/sched.h>
37
38/* acts like an actual heart beat -- ie thump-thump-pause... */
39void heartbeat_od(void)
40{
41 static unsigned cnt = 0, period = 0, dist = 0;
42
43 if (cnt == 0 || cnt == dist)
44 mach_led( -1, 1);
45 else if (cnt == 7 || cnt == dist+7)
46 mach_led( -1, 0);
47
48 if (++cnt > period) {
49 cnt = 0;
50 /* The hyperbolic function below modifies the heartbeat period
51 * length in dependency of the current (5min) load. It goes
52 * through the points f(0)=126, f(1)=86, f(5)=51,
53 * f(inf)->30. */
54 period = ((672<<FSHIFT)/(5*avenrun[0]+(7<<FSHIFT))) + 30;
55 dist = period / 4;
56 }
57}
58#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/overdrive/mach.c b/arch/sh/boards/overdrive/mach.c
deleted file mode 100644
index 2834a03ae477..000000000000
--- a/arch/sh/boards/overdrive/mach.c
+++ /dev/null
@@ -1,62 +0,0 @@
1/*
2 * linux/arch/sh/overdrive/mach.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the STMicroelectronics Overdrive
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/io_unknown.h>
19#include <asm/io_generic.h>
20#include <asm/overdrive/io.h>
21
22void heartbeat_od(void);
23void init_overdrive_irq(void);
24void galileo_pcibios_init(void);
25
26/*
27 * The Machine Vector
28 */
29
30struct sh_machine_vector mv_od __initmv = {
31 .mv_nr_irqs = 48,
32
33 .mv_inb = od_inb,
34 .mv_inw = od_inw,
35 .mv_inl = od_inl,
36 .mv_outb = od_outb,
37 .mv_outw = od_outw,
38 .mv_outl = od_outl,
39
40 .mv_inb_p = od_inb_p,
41 .mv_inw_p = od_inw_p,
42 .mv_inl_p = od_inl_p,
43 .mv_outb_p = od_outb_p,
44 .mv_outw_p = od_outw_p,
45 .mv_outl_p = od_outl_p,
46
47 .mv_insb = od_insb,
48 .mv_insw = od_insw,
49 .mv_insl = od_insl,
50 .mv_outsb = od_outsb,
51 .mv_outsw = od_outsw,
52 .mv_outsl = od_outsl,
53
54#ifdef CONFIG_PCI
55 .mv_init_irq = init_overdrive_irq,
56#endif
57#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_od,
59#endif
60};
61
62ALIAS_MV(od)
diff --git a/arch/sh/boards/overdrive/pcidma.c b/arch/sh/boards/overdrive/pcidma.c
deleted file mode 100644
index 1c9bfeda00b7..000000000000
--- a/arch/sh/boards/overdrive/pcidma.c
+++ /dev/null
@@ -1,46 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * Dynamic DMA mapping support.
8 *
9 * On the overdrive, we can only DMA from memory behind the PCI bus!
10 * this means that all DMA'able memory must come from there.
11 * this restriction will not apply to later boards.
12 */
13
14#include <linux/types.h>
15#include <linux/mm.h>
16#include <linux/string.h>
17#include <linux/pci.h>
18#include <asm/io.h>
19
20void *pci_alloc_consistent(struct pci_dev *hwdev, size_t size,
21 dma_addr_t * dma_handle)
22{
23 void *ret;
24 int gfp = GFP_ATOMIC;
25
26 printk("BUG: pci_alloc_consistent() called - not yet supported\n");
27 /* We ALWAYS need DMA memory on the overdrive hardware,
28 * due to it's extreme weirdness
29 * Need to flush the cache here as well, since the memory
30 * can still be seen through the cache!
31 */
32 gfp |= GFP_DMA;
33 ret = (void *) __get_free_pages(gfp, get_order(size));
34
35 if (ret != NULL) {
36 memset(ret, 0, size);
37 *dma_handle = virt_to_bus(ret);
38 }
39 return ret;
40}
41
42void pci_free_consistent(struct pci_dev *hwdev, size_t size,
43 void *vaddr, dma_addr_t dma_handle)
44{
45 free_pages((unsigned long) vaddr, get_order(size));
46}
diff --git a/arch/sh/boards/overdrive/setup.c b/arch/sh/boards/overdrive/setup.c
deleted file mode 100644
index a3a7744c2047..000000000000
--- a/arch/sh/boards/overdrive/setup.c
+++ /dev/null
@@ -1,36 +0,0 @@
1/*
2 * arch/sh/overdrive/setup.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * STMicroelectronics Overdrive Support.
10 */
11
12#include <linux/kernel.h>
13#include <linux/init.h>
14#include <asm/io.h>
15
16#include <asm/overdrive/overdrive.h>
17#include <asm/overdrive/fpga.h>
18
19const char *get_system_type(void)
20{
21 return "SH7750 Overdrive";
22}
23
24/*
25 * Initialize the board
26 */
27int __init platform_setup(void)
28{
29#ifdef CONFIG_PCI
30 init_overdrive_fpga();
31 galileo_init();
32#endif
33
34 /* Enable RS232 receive buffers */
35 writel(0x1e, OVERDRIVE_CTRL);
36}
diff --git a/arch/sh/boards/renesas/edosk7705/Makefile b/arch/sh/boards/renesas/edosk7705/Makefile
index 7fccbf2e4a1d..14bdd531f116 100644
--- a/arch/sh/boards/renesas/edosk7705/Makefile
+++ b/arch/sh/boards/renesas/edosk7705/Makefile
@@ -1,10 +1,6 @@
1# 1#
2# Makefile for the EDOSK7705 specific parts of the kernel 2# Makefile for the EDOSK7705 specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8 4
9obj-y := setup.o io.o 5obj-y := setup.o io.o
10 6
diff --git a/arch/sh/boards/renesas/edosk7705/setup.c b/arch/sh/boards/renesas/edosk7705/setup.c
index ba143fa4afaa..ec5be0107719 100644
--- a/arch/sh/boards/renesas/edosk7705/setup.c
+++ b/arch/sh/boards/renesas/edosk7705/setup.c
@@ -8,19 +8,21 @@
8 * Modified for edosk7705 development 8 * Modified for edosk7705 development
9 * board by S. Dunn, 2003. 9 * board by S. Dunn, 2003.
10 */ 10 */
11
12#include <linux/init.h> 11#include <linux/init.h>
13#include <asm/machvec.h> 12#include <asm/machvec.h>
14#include <asm/machvec_init.h>
15#include <asm/edosk7705/io.h> 13#include <asm/edosk7705/io.h>
16 14
17static void init_edosk7705(void); 15static void __init sh_edosk7705_init_irq(void)
16{
17 /* This is the Ethernet interrupt */
18 make_imask_irq(0x09);
19}
18 20
19/* 21/*
20 * The Machine Vector 22 * The Machine Vector
21 */ 23 */
22
23struct sh_machine_vector mv_edosk7705 __initmv = { 24struct sh_machine_vector mv_edosk7705 __initmv = {
25 .mv_name = "EDOSK7705",
24 .mv_nr_irqs = 80, 26 .mv_nr_irqs = 80,
25 27
26 .mv_inb = sh_edosk7705_inb, 28 .mv_inb = sh_edosk7705_inb,
@@ -37,23 +39,6 @@ struct sh_machine_vector mv_edosk7705 __initmv = {
37 .mv_outsl = sh_edosk7705_outsl, 39 .mv_outsl = sh_edosk7705_outsl,
38 40
39 .mv_isa_port2addr = sh_edosk7705_isa_port2addr, 41 .mv_isa_port2addr = sh_edosk7705_isa_port2addr,
40 .mv_init_irq = init_edosk7705, 42 .mv_init_irq = sh_edosk7705_init_irq,
41}; 43};
42ALIAS_MV(edosk7705) 44ALIAS_MV(edosk7705)
43
44static void __init init_edosk7705(void)
45{
46 /* This is the Ethernet interrupt */
47 make_imask_irq(0x09);
48}
49
50const char *get_system_type(void)
51{
52 return "EDOSK7705";
53}
54
55void __init platform_setup(void)
56{
57 /* Nothing .. */
58}
59
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Kconfig b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
new file mode 100644
index 000000000000..1743be477be5
--- /dev/null
+++ b/arch/sh/boards/renesas/hs7751rvoip/Kconfig
@@ -0,0 +1,12 @@
1if SH_HS7751RVOIP
2
3menu "HS7751RVoIP options"
4
5config HS7751RVOIP_CODEC
6 bool "Support VoIP Codec section"
7 help
8 Selecting this option will support CODEC section.
9
10endmenu
11
12endif
diff --git a/arch/sh/boards/renesas/hs7751rvoip/Makefile b/arch/sh/boards/renesas/hs7751rvoip/Makefile
index e8b4109ace11..e626377c55ee 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/Makefile
+++ b/arch/sh/boards/renesas/hs7751rvoip/Makefile
@@ -1,12 +1,8 @@
1# 1#
2# Makefile for the HS7751RVoIP specific parts of the kernel 2# Makefile for the HS7751RVoIP specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8 4
9obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
10 6
11obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
12 8
diff --git a/arch/sh/boards/renesas/hs7751rvoip/io.c b/arch/sh/boards/renesas/hs7751rvoip/io.c
index 3a1abfa2fefb..9ea1136b219b 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/io.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/io.c
@@ -10,21 +10,16 @@
10 * placeholder code from io_hs7751rvoip.c left in with the 10 * placeholder code from io_hs7751rvoip.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 11 * expectation of later SuperIO and PCMCIA access.
12 */ 12 */
13
14#include <linux/kernel.h> 13#include <linux/kernel.h>
15#include <linux/types.h> 14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/pci.h>
16#include <asm/io.h> 17#include <asm/io.h>
17#include <asm/hs7751rvoip/hs7751rvoip.h> 18#include <asm/hs7751rvoip/hs7751rvoip.h>
18#include <asm/addrspace.h> 19#include <asm/addrspace.h>
19 20
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23
24extern void *area5_io8_base; /* Area 5 8bit I/O Base address */
25extern void *area6_io8_base; /* Area 6 8bit I/O Base address */ 21extern void *area6_io8_base; /* Area 6 8bit I/O Base address */
26extern void *area5_io16_base; /* Area 5 16bit I/O Base address */ 22extern void *area5_io16_base; /* Area 5 16bit I/O Base address */
27extern void *area6_io16_base; /* Area 6 16bit I/O Base address */
28 23
29/* 24/*
30 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC) 25 * The 7751R HS7751RVoIP uses the built-in PCI controller (PCIC)
@@ -33,25 +28,8 @@ extern void *area6_io16_base; /* Area 6 16bit I/O Base address */
33 * like the other Solution Engine boards. 28 * like the other Solution Engine boards.
34 */ 29 */
35 30
36#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
37#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
38#define PCI_IO_AREA SH7751_PCI_IO_BASE
39#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
40
41#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
42
43#if defined(CONFIG_HS7751RVOIP_CODEC)
44#define CODEC_IO_BASE 0x1000 31#define CODEC_IO_BASE 0x1000
45#endif 32#define CODEC_IOMAP(a) ((unsigned long)area6_io8_base + ((a) - CODEC_IO_BASE))
46
47#define maybebadio(name,port) \
48 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
49 #name, (port), (__u32) __builtin_return_address(0))
50
51static inline void delay(void)
52{
53 ctrl_inw(0xa0000000);
54}
55 33
56static inline unsigned long port2adr(unsigned int port) 34static inline unsigned long port2adr(unsigned int port)
57{ 35{
@@ -59,9 +37,10 @@ static inline unsigned long port2adr(unsigned int port)
59 if (port == 0x3f6) 37 if (port == 0x3f6)
60 return ((unsigned long)area5_io16_base + 0x0c); 38 return ((unsigned long)area5_io16_base + 0x0c);
61 else 39 else
62 return ((unsigned long)area5_io16_base + 0x800 + ((port-0x1f0) << 1)); 40 return ((unsigned long)area5_io16_base + 0x800 +
41 ((port-0x1f0) << 1));
63 else 42 else
64 maybebadio(port2adr, (unsigned long)port); 43 maybebadio((unsigned long)port);
65 return port; 44 return port;
66} 45}
67 46
@@ -78,25 +57,10 @@ static inline int shifted_port(unsigned long port)
78} 57}
79 58
80#if defined(CONFIG_HS7751RVOIP_CODEC) 59#if defined(CONFIG_HS7751RVOIP_CODEC)
81static inline int 60#define codec_port(port) \
82codec_port(unsigned long port) 61 ((CODEC_IO_BASE <= (port)) && ((port) < (CODEC_IO_BASE + 0x20)))
83{
84 if (CODEC_IO_BASE <= port && port < (CODEC_IO_BASE+0x20))
85 return 1;
86 else
87 return 0;
88}
89#endif
90
91/* In case someone configures the kernel w/o PCI support: in that */
92/* scenario, don't ever bother to check for PCI-window addresses */
93
94/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
95#if defined(CONFIG_PCI)
96#define CHECK_SH7751_PCIIO(port) \
97 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
98#else 62#else
99#define CHECK_SH7751_PCIIO(port) (0) 63#define codec_port(port) (0)
100#endif 64#endif
101 65
102/* 66/*
@@ -109,15 +73,13 @@ codec_port(unsigned long port)
109unsigned char hs7751rvoip_inb(unsigned long port) 73unsigned char hs7751rvoip_inb(unsigned long port)
110{ 74{
111 if (PXSEG(port)) 75 if (PXSEG(port))
112 return *(volatile unsigned char *)port; 76 return ctrl_inb(port);
113#if defined(CONFIG_HS7751RVOIP_CODEC)
114 else if (codec_port(port)) 77 else if (codec_port(port))
115 return *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 78 return ctrl_inb(CODEC_IOMAP(port));
116#endif 79 else if (is_pci_ioaddr(port) || shifted_port(port))
117 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 80 return ctrl_inb(pci_ioaddr(port));
118 return *(volatile unsigned char *)PCI_IOMAP(port);
119 else 81 else
120 return (*(volatile unsigned short *)port2adr(port) & 0xff); 82 return ctrl_inw(port2adr(port)) & 0xff;
121} 83}
122 84
123unsigned char hs7751rvoip_inb_p(unsigned long port) 85unsigned char hs7751rvoip_inb_p(unsigned long port)
@@ -125,38 +87,36 @@ unsigned char hs7751rvoip_inb_p(unsigned long port)
125 unsigned char v; 87 unsigned char v;
126 88
127 if (PXSEG(port)) 89 if (PXSEG(port))
128 v = *(volatile unsigned char *)port; 90 v = ctrl_inb(port);
129#if defined(CONFIG_HS7751RVOIP_CODEC)
130 else if (codec_port(port)) 91 else if (codec_port(port))
131 v = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 92 v = ctrl_inb(CODEC_IOMAP(port));
132#endif 93 else if (is_pci_ioaddr(port) || shifted_port(port))
133 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 94 v = ctrl_inb(pci_ioaddr(port));
134 v = *(volatile unsigned char *)PCI_IOMAP(port);
135 else 95 else
136 v = (*(volatile unsigned short *)port2adr(port) & 0xff); 96 v = ctrl_inw(port2adr(port)) & 0xff;
137 delay(); 97 ctrl_delay();
138 return v; 98 return v;
139} 99}
140 100
141unsigned short hs7751rvoip_inw(unsigned long port) 101unsigned short hs7751rvoip_inw(unsigned long port)
142{ 102{
143 if (PXSEG(port)) 103 if (PXSEG(port))
144 return *(volatile unsigned short *)port; 104 return ctrl_inw(port);
145 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 105 else if (is_pci_ioaddr(port) || shifted_port(port))
146 return *(volatile unsigned short *)PCI_IOMAP(port); 106 return ctrl_inw(pci_ioaddr(port));
147 else 107 else
148 maybebadio(inw, port); 108 maybebadio(port);
149 return 0; 109 return 0;
150} 110}
151 111
152unsigned int hs7751rvoip_inl(unsigned long port) 112unsigned int hs7751rvoip_inl(unsigned long port)
153{ 113{
154 if (PXSEG(port)) 114 if (PXSEG(port))
155 return *(volatile unsigned long *)port; 115 return ctrl_inl(port);
156 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 116 else if (is_pci_ioaddr(port) || shifted_port(port))
157 return *(volatile unsigned long *)PCI_IOMAP(port); 117 return ctrl_inl(pci_ioaddr(port));
158 else 118 else
159 maybebadio(inl, port); 119 maybebadio(port);
160 return 0; 120 return 0;
161} 121}
162 122
@@ -164,146 +124,160 @@ void hs7751rvoip_outb(unsigned char value, unsigned long port)
164{ 124{
165 125
166 if (PXSEG(port)) 126 if (PXSEG(port))
167 *(volatile unsigned char *)port = value; 127 ctrl_outb(value, port);
168#if defined(CONFIG_HS7751RVOIP_CODEC)
169 else if (codec_port(port)) 128 else if (codec_port(port))
170 *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; 129 ctrl_outb(value, CODEC_IOMAP(port));
171#endif 130 else if (is_pci_ioaddr(port) || shifted_port(port))
172 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 131 ctrl_outb(value, pci_ioaddr(port));
173 *(unsigned char *)PCI_IOMAP(port) = value;
174 else 132 else
175 *(volatile unsigned short *)port2adr(port) = value; 133 ctrl_outb(value, port2adr(port));
176} 134}
177 135
178void hs7751rvoip_outb_p(unsigned char value, unsigned long port) 136void hs7751rvoip_outb_p(unsigned char value, unsigned long port)
179{ 137{
180 if (PXSEG(port)) 138 if (PXSEG(port))
181 *(volatile unsigned char *)port = value; 139 ctrl_outb(value, port);
182#if defined(CONFIG_HS7751RVOIP_CODEC)
183 else if (codec_port(port)) 140 else if (codec_port(port))
184 *(volatile unsigned cjar *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = value; 141 ctrl_outb(value, CODEC_IOMAP(port));
185#endif 142 else if (is_pci_ioaddr(port) || shifted_port(port))
186 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 143 ctrl_outb(value, pci_ioaddr(port));
187 *(unsigned char *)PCI_IOMAP(port) = value;
188 else 144 else
189 *(volatile unsigned short *)port2adr(port) = value; 145 ctrl_outw(value, port2adr(port));
190 delay(); 146
147 ctrl_delay();
191} 148}
192 149
193void hs7751rvoip_outw(unsigned short value, unsigned long port) 150void hs7751rvoip_outw(unsigned short value, unsigned long port)
194{ 151{
195 if (PXSEG(port)) 152 if (PXSEG(port))
196 *(volatile unsigned short *)port = value; 153 ctrl_outw(value, port);
197 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 154 else if (is_pci_ioaddr(port) || shifted_port(port))
198 *(unsigned short *)PCI_IOMAP(port) = value; 155 ctrl_outw(value, pci_ioaddr(port));
199 else 156 else
200 maybebadio(outw, port); 157 maybebadio(port);
201} 158}
202 159
203void hs7751rvoip_outl(unsigned int value, unsigned long port) 160void hs7751rvoip_outl(unsigned int value, unsigned long port)
204{ 161{
205 if (PXSEG(port)) 162 if (PXSEG(port))
206 *(volatile unsigned long *)port = value; 163 ctrl_outl(value, port);
207 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 164 else if (is_pci_ioaddr(port) || shifted_port(port))
208 *((unsigned long *)PCI_IOMAP(port)) = value; 165 ctrl_outl(value, pci_ioaddr(port));
209 else 166 else
210 maybebadio(outl, port); 167 maybebadio(port);
211} 168}
212 169
213void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count) 170void hs7751rvoip_insb(unsigned long port, void *addr, unsigned long count)
214{ 171{
172 u8 *buf = addr;
173
215 if (PXSEG(port)) 174 if (PXSEG(port))
216 while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)port; 175 while (count--)
217#if defined(CONFIG_HS7751RVOIP_CODEC) 176 *buf++ = ctrl_inb(port);
218 else if (codec_port(port)) 177 else if (codec_port(port))
219 while (count--) *((unsigned char *) addr)++ = *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)); 178 while (count--)
220#endif 179 *buf++ = ctrl_inb(CODEC_IOMAP(port));
221 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 180 else if (is_pci_ioaddr(port) || shifted_port(port)) {
222 volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); 181 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
223 182
224 while (count--) *((volatile unsigned char *) addr)++ = *bp; 183 while (count--)
184 *buf++ = *bp;
225 } else { 185 } else {
226 volatile __u16 *p = (volatile unsigned short *)port2adr(port); 186 volatile u16 *p = (volatile u16 *)port2adr(port);
227 187
228 while (count--) *((unsigned char *) addr)++ = *p & 0xff; 188 while (count--)
189 *buf++ = *p & 0xff;
229 } 190 }
230} 191}
231 192
232void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count) 193void hs7751rvoip_insw(unsigned long port, void *addr, unsigned long count)
233{ 194{
234 volatile __u16 *p; 195 volatile u16 *p;
196 u16 *buf = addr;
235 197
236 if (PXSEG(port)) 198 if (PXSEG(port))
237 p = (volatile unsigned short *)port; 199 p = (volatile u16 *)port;
238 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 200 else if (is_pci_ioaddr(port) || shifted_port(port))
239 p = (volatile unsigned short *)PCI_IOMAP(port); 201 p = (volatile u16 *)pci_ioaddr(port);
240 else 202 else
241 p = (volatile unsigned short *)port2adr(port); 203 p = (volatile u16 *)port2adr(port);
242 while (count--) *((__u16 *) addr)++ = *p; 204 while (count--)
205 *buf++ = *p;
243} 206}
244 207
245void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count) 208void hs7751rvoip_insl(unsigned long port, void *addr, unsigned long count)
246{ 209{
247 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) {
248 volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
249 210
250 while (count--) *((__u32 *) addr)++ = *p; 211 if (is_pci_ioaddr(port) || shifted_port(port)) {
212 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
213 u32 *buf = addr;
214
215 while (count--)
216 *buf++ = *p;
251 } else 217 } else
252 maybebadio(insl, port); 218 maybebadio(port);
253} 219}
254 220
255void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count) 221void hs7751rvoip_outsb(unsigned long port, const void *addr, unsigned long count)
256{ 222{
223 const u8 *buf = addr;
224
257 if (PXSEG(port)) 225 if (PXSEG(port))
258 while (count--) *(volatile unsigned char *)port = *((unsigned char *) addr)++; 226 while (count--)
259#if defined(CONFIG_HS7751RVOIP_CODEC) 227 ctrl_outb(*buf++, port);
260 else if (codec_port(port)) 228 else if (codec_port(port))
261 while (count--) *(volatile unsigned char *)((unsigned long)area6_io8_base+(port-CODEC_IO_BASE)) = *((unsigned char *) addr)++; 229 while (count--)
262#endif 230 ctrl_outb(*buf++, CODEC_IOMAP(port));
263 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 231 else if (is_pci_ioaddr(port) || shifted_port(port)) {
264 volatile __u8 *bp = (__u8 *)PCI_IOMAP(port); 232 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
265 233
266 while (count--) *bp = *((volatile unsigned char *) addr)++; 234 while (count--)
235 *bp = *buf++;
267 } else { 236 } else {
268 volatile __u16 *p = (volatile unsigned short *)port2adr(port); 237 volatile u16 *p = (volatile u16 *)port2adr(port);
269 238
270 while (count--) *p = *((unsigned char *) addr)++; 239 while (count--)
240 *p = *buf++;
271 } 241 }
272} 242}
273 243
274void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count) 244void hs7751rvoip_outsw(unsigned long port, const void *addr, unsigned long count)
275{ 245{
276 volatile __u16 *p; 246 volatile u16 *p;
247 const u16 *buf = addr;
277 248
278 if (PXSEG(port)) 249 if (PXSEG(port))
279 p = (volatile unsigned short *)port; 250 p = (volatile u16 *)port;
280 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 251 else if (is_pci_ioaddr(port) || shifted_port(port))
281 p = (volatile unsigned short *)PCI_IOMAP(port); 252 p = (volatile u16 *)pci_ioaddr(port);
282 else 253 else
283 p = (volatile unsigned short *)port2adr(port); 254 p = (volatile u16 *)port2adr(port);
284 while (count--) *p = *((__u16 *) addr)++; 255
256 while (count--)
257 *p = *buf++;
285} 258}
286 259
287void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count) 260void hs7751rvoip_outsl(unsigned long port, const void *addr, unsigned long count)
288{ 261{
289 if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 262 const u32 *buf = addr;
290 volatile __u32 *p = (__u32 *)PCI_IOMAP(port);
291 263
292 while (count--) *p = *((__u32 *) addr)++; 264 if (is_pci_ioaddr(port) || shifted_port(port)) {
265 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
266
267 while (count--)
268 *p = *buf++;
293 } else 269 } else
294 maybebadio(outsl, port); 270 maybebadio(port);
295} 271}
296 272
297void *hs7751rvoip_ioremap(unsigned long offset, unsigned long size) 273void __iomem *hs7751rvoip_ioport_map(unsigned long port, unsigned int size)
298{ 274{
299 if (offset >= 0xfd000000) 275 if (PXSEG(port))
300 return (void *)offset; 276 return (void __iomem *)port;
301 else 277 else if (unlikely(codec_port(port) && (size == 1)))
302 return (void *)P2SEGADDR(offset); 278 return (void __iomem *)CODEC_IOMAP(port);
303} 279 else if (is_pci_ioaddr(port))
304EXPORT_SYMBOL(hs7751rvoip_ioremap); 280 return (void __iomem *)pci_ioaddr(port);
305 281
306unsigned long hs7751rvoip_isa_port2addr(unsigned long offset) 282 return (void __iomem *)port2adr(port);
307{
308 return port2adr(offset);
309} 283}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/irq.c b/arch/sh/boards/renesas/hs7751rvoip/irq.c
index 705b7ddcb0d2..c617b188258a 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/irq.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/irq.c
@@ -35,30 +35,24 @@ static unsigned int startup_hs7751rvoip_irq(unsigned int irq)
35 35
36static void disable_hs7751rvoip_irq(unsigned int irq) 36static void disable_hs7751rvoip_irq(unsigned int irq)
37{ 37{
38 unsigned long flags;
39 unsigned short val; 38 unsigned short val;
40 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 39 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
41 40
42 /* Set the priority in IPR to 0 */ 41 /* Set the priority in IPR to 0 */
43 local_irq_save(flags);
44 val = ctrl_inw(IRLCNTR3); 42 val = ctrl_inw(IRLCNTR3);
45 val &= mask; 43 val &= mask;
46 ctrl_outw(val, IRLCNTR3); 44 ctrl_outw(val, IRLCNTR3);
47 local_irq_restore(flags);
48} 45}
49 46
50static void enable_hs7751rvoip_irq(unsigned int irq) 47static void enable_hs7751rvoip_irq(unsigned int irq)
51{ 48{
52 unsigned long flags;
53 unsigned short val; 49 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]); 50 unsigned short value = (0x0001 << mask_pos[irq]);
55 51
56 /* Set priority in IPR back to original value */ 52 /* Set priority in IPR back to original value */
57 local_irq_save(flags);
58 val = ctrl_inw(IRLCNTR3); 53 val = ctrl_inw(IRLCNTR3);
59 val |= value; 54 val |= value;
60 ctrl_outw(val, IRLCNTR3); 55 ctrl_outw(val, IRLCNTR3);
61 local_irq_restore(flags);
62} 56}
63 57
64static void ack_hs7751rvoip_irq(unsigned int irq) 58static void ack_hs7751rvoip_irq(unsigned int irq)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/led.c b/arch/sh/boards/renesas/hs7751rvoip/led.c
deleted file mode 100644
index b6608fff9f38..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/led.c
+++ /dev/null
@@ -1,26 +0,0 @@
1/*
2 * linux/arch/sh/kernel/setup_hs7751rvoip.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003.
11 */
12
13#include <asm/io.h>
14#include <asm/hs7751rvoip/hs7751rvoip.h>
15
16extern unsigned int debug_counter;
17
18void debug_led_disp(void)
19{
20 unsigned short value;
21
22 value = (unsigned char)debug_counter++;
23 ctrl_outb((0xf0|value), PA_OUTPORTR);
24 if (value == 0x0f)
25 debug_counter = 0;
26}
diff --git a/arch/sh/boards/renesas/hs7751rvoip/mach.c b/arch/sh/boards/renesas/hs7751rvoip/mach.c
deleted file mode 100644
index caf967f77c61..000000000000
--- a/arch/sh/boards/renesas/hs7751rvoip/mach.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_hs7751rvoip.c
3 *
4 * Minor tweak of mach_se.c file to reference hs7751rvoip-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Renesas Technology sales HS7751RVoIP
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/irq.h>
17#include <asm/hs7751rvoip/io.h>
18
19extern void init_hs7751rvoip_IRQ(void);
20extern void *hs7751rvoip_ioremap(unsigned long, unsigned long);
21
22/*
23 * The Machine Vector
24 */
25
26struct sh_machine_vector mv_hs7751rvoip __initmv = {
27 .mv_nr_irqs = 72,
28
29 .mv_inb = hs7751rvoip_inb,
30 .mv_inw = hs7751rvoip_inw,
31 .mv_inl = hs7751rvoip_inl,
32 .mv_outb = hs7751rvoip_outb,
33 .mv_outw = hs7751rvoip_outw,
34 .mv_outl = hs7751rvoip_outl,
35
36 .mv_inb_p = hs7751rvoip_inb_p,
37 .mv_inw_p = hs7751rvoip_inw,
38 .mv_inl_p = hs7751rvoip_inl,
39 .mv_outb_p = hs7751rvoip_outb_p,
40 .mv_outw_p = hs7751rvoip_outw,
41 .mv_outl_p = hs7751rvoip_outl,
42
43 .mv_insb = hs7751rvoip_insb,
44 .mv_insw = hs7751rvoip_insw,
45 .mv_insl = hs7751rvoip_insl,
46 .mv_outsb = hs7751rvoip_outsb,
47 .mv_outsw = hs7751rvoip_outsw,
48 .mv_outsl = hs7751rvoip_outsl,
49
50 .mv_ioremap = hs7751rvoip_ioremap,
51 .mv_isa_port2addr = hs7751rvoip_isa_port2addr,
52 .mv_init_irq = init_hs7751rvoip_IRQ,
53};
54ALIAS_MV(hs7751rvoip)
diff --git a/arch/sh/boards/renesas/hs7751rvoip/setup.c b/arch/sh/boards/renesas/hs7751rvoip/setup.c
index 29fb5ff70fb5..0414c15c3458 100644
--- a/arch/sh/boards/renesas/hs7751rvoip/setup.c
+++ b/arch/sh/boards/renesas/hs7751rvoip/setup.c
@@ -1,44 +1,38 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_hs7751rvoip.c 2 * Renesas Technology Sales HS7751RVoIP Support.
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
5 * 5 *
6 * Renesas Technology Sales HS7751RVoIP Support.
7 *
8 * Modified for HS7751RVoIP by 6 * Modified for HS7751RVoIP by
9 * Atom Create Engineering Co., Ltd. 2002. 7 * Atom Create Engineering Co., Ltd. 2002.
10 * Lineo uSolutions, Inc. 2003. 8 * Lineo uSolutions, Inc. 2003.
11 */ 9 */
12
13#include <linux/init.h> 10#include <linux/init.h>
14#include <linux/irq.h> 11#include <linux/irq.h>
15 12#include <linux/mm.h>
13#include <linux/vmalloc.h>
16#include <linux/hdreg.h> 14#include <linux/hdreg.h>
17#include <linux/ide.h> 15#include <linux/ide.h>
16#include <linux/pm.h>
18#include <asm/io.h> 17#include <asm/io.h>
19#include <asm/hs7751rvoip/hs7751rvoip.h> 18#include <asm/hs7751rvoip/hs7751rvoip.h>
19#include <asm/machvec.h>
20#include <asm/rtc.h>
21#include <asm/irq.h>
20 22
21#include <linux/mm.h> 23static void __init hs7751rvoip_init_irq(void)
22#include <linux/vmalloc.h>
23
24/* defined in mm/ioremap.c */
25extern void * p3_ioremap(unsigned long phys_addr, unsigned long size, unsigned long flags);
26
27unsigned int debug_counter;
28
29const char *get_system_type(void)
30{ 24{
31 return "HS7751RVoIP"; 25#if defined(CONFIG_HS7751RVOIP_CODEC)
26 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
27 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
28#endif
29
30 init_hs7751rvoip_IRQ();
32} 31}
33 32
34/* 33static void hs7751rvoip_power_off(void)
35 * Initialize the board
36 */
37void __init platform_setup(void)
38{ 34{
39 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n"); 35 ctrl_outw(ctrl_inw(PA_OUTPORTR) & 0xffdf, PA_OUTPORTR);
40 ctrl_outb(0xf0, PA_OUTPORTR);
41 debug_counter = 0;
42} 36}
43 37
44void *area5_io8_base; 38void *area5_io8_base;
@@ -46,16 +40,15 @@ void *area6_io8_base;
46void *area5_io16_base; 40void *area5_io16_base;
47void *area6_io16_base; 41void *area6_io16_base;
48 42
49int __init cf_init(void) 43static int __init hs7751rvoip_cf_init(void)
50{ 44{
51 pgprot_t prot; 45 pgprot_t prot;
52 unsigned long paddrbase, psize; 46 unsigned long paddrbase;
53 47
54 /* open I/O area window */ 48 /* open I/O area window */
55 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800)); 49 paddrbase = virt_to_phys((void *)(PA_AREA5_IO+0x00000800));
56 psize = PAGE_SIZE;
57 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16); 50 prot = PAGE_KERNEL_PCC(1, _PAGE_PCC_COM16);
58 area5_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); 51 area5_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
59 if (!area5_io16_base) { 52 if (!area5_io16_base) {
60 printk("allocate_cf_area : can't open CF I/O window!\n"); 53 printk("allocate_cf_area : can't open CF I/O window!\n");
61 return -ENOMEM; 54 return -ENOMEM;
@@ -64,19 +57,18 @@ int __init cf_init(void)
64 /* XXX : do we need attribute and common-memory area also? */ 57 /* XXX : do we need attribute and common-memory area also? */
65 58
66 paddrbase = virt_to_phys((void *)PA_AREA6_IO); 59 paddrbase = virt_to_phys((void *)PA_AREA6_IO);
67 psize = PAGE_SIZE;
68#if defined(CONFIG_HS7751RVOIP_CODEC) 60#if defined(CONFIG_HS7751RVOIP_CODEC)
69 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8); 61 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_COM8);
70#else 62#else
71 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8); 63 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO8);
72#endif 64#endif
73 area6_io8_base = p3_ioremap(paddrbase, psize, prot.pgprot); 65 area6_io8_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
74 if (!area6_io8_base) { 66 if (!area6_io8_base) {
75 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n"); 67 printk("allocate_cf_area : can't open CODEC I/O 8bit window!\n");
76 return -ENOMEM; 68 return -ENOMEM;
77 } 69 }
78 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16); 70 prot = PAGE_KERNEL_PCC(0, _PAGE_PCC_IO16);
79 area6_io16_base = p3_ioremap(paddrbase, psize, prot.pgprot); 71 area6_io16_base = p3_ioremap(paddrbase, PAGE_SIZE, prot.pgprot);
80 if (!area6_io16_base) { 72 if (!area6_io16_base) {
81 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n"); 73 printk("allocate_cf_area : can't open CODEC I/O 16bit window!\n");
82 return -ENOMEM; 74 return -ENOMEM;
@@ -85,4 +77,46 @@ int __init cf_init(void)
85 return 0; 77 return 0;
86} 78}
87 79
88__initcall (cf_init); 80/*
81 * Initialize the board
82 */
83static void __init hs7751rvoip_setup(char **cmdline_p)
84{
85 device_initcall(hs7751rvoip_cf_init);
86
87 ctrl_outb(0xf0, PA_OUTPORTR);
88 pm_power_off = hs7751rvoip_power_off;
89
90 printk(KERN_INFO "Renesas Technology Sales HS7751RVoIP-2 support.\n");
91}
92
93struct sh_machine_vector mv_hs7751rvoip __initmv = {
94 .mv_name = "HS7751RVoIP",
95 .mv_setup = hs7751rvoip_setup,
96 .mv_nr_irqs = 72,
97
98 .mv_inb = hs7751rvoip_inb,
99 .mv_inw = hs7751rvoip_inw,
100 .mv_inl = hs7751rvoip_inl,
101 .mv_outb = hs7751rvoip_outb,
102 .mv_outw = hs7751rvoip_outw,
103 .mv_outl = hs7751rvoip_outl,
104
105 .mv_inb_p = hs7751rvoip_inb_p,
106 .mv_inw_p = hs7751rvoip_inw,
107 .mv_inl_p = hs7751rvoip_inl,
108 .mv_outb_p = hs7751rvoip_outb_p,
109 .mv_outw_p = hs7751rvoip_outw,
110 .mv_outl_p = hs7751rvoip_outl,
111
112 .mv_insb = hs7751rvoip_insb,
113 .mv_insw = hs7751rvoip_insw,
114 .mv_insl = hs7751rvoip_insl,
115 .mv_outsb = hs7751rvoip_outsb,
116 .mv_outsw = hs7751rvoip_outsw,
117 .mv_outsl = hs7751rvoip_outsl,
118
119 .mv_init_irq = hs7751rvoip_init_irq,
120 .mv_ioport_map = hs7751rvoip_ioport_map,
121};
122ALIAS_MV(hs7751rvoip)
diff --git a/arch/sh/boards/renesas/r7780rp/Kconfig b/arch/sh/boards/renesas/r7780rp/Kconfig
new file mode 100644
index 000000000000..c26d9813d239
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Kconfig
@@ -0,0 +1,14 @@
1if SH_R7780RP
2
3menu "R7780RP options"
4
5config SH_R7780MP
6 bool "R7780MP board support"
7 default y
8 help
9 Selecting this option will enable support for the mass-production
10 version of the R7780RP. If in doubt, say Y.
11
12endmenu
13
14endif
diff --git a/arch/sh/boards/renesas/r7780rp/Makefile b/arch/sh/boards/renesas/r7780rp/Makefile
new file mode 100644
index 000000000000..f1776d027978
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/Makefile
@@ -0,0 +1,6 @@
1#
2# Makefile for the R7780RP-1 specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/r7780rp/io.c b/arch/sh/boards/renesas/r7780rp/io.c
new file mode 100644
index 000000000000..db92d6e6ae99
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/io.c
@@ -0,0 +1,301 @@
1/*
2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
3 * Based largely on io_se.c.
4 *
5 * I/O routine for Renesas Solutions Highlander R7780RP-1
6 *
7 * Initial version only to support LAN access; some
8 * placeholder code from io_r7780rp.c left in with the
9 * expectation of later SuperIO and PCMCIA access.
10 */
11#include <linux/pci.h>
12#include <linux/kernel.h>
13#include <linux/types.h>
14#include <asm/r7780rp/r7780rp.h>
15#include <asm/addrspace.h>
16#include <asm/io.h>
17
18static inline unsigned long port2adr(unsigned int port)
19{
20 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
21 if (port == 0x3f6)
22 return (PA_AREA5_IO + 0x80c);
23 else
24 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
25 else
26 maybebadio((unsigned long)port);
27
28 return port;
29}
30
31static inline unsigned long port88796l(unsigned int port, int flag)
32{
33 unsigned long addr;
34
35 if (flag)
36 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1);
37 else
38 addr = PA_AX88796L + ((port - AX88796L_IO_BASE) << 1) + 0x1000;
39
40 return addr;
41}
42
43/* The 7780 R7780RP-1 seems to have everything hooked */
44/* up pretty normally (nothing on high-bytes only...) so this */
45/* shouldn't be needed */
46static inline int shifted_port(unsigned long port)
47{
48 /* For IDE registers, value is not shifted */
49 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
50 return 0;
51 else
52 return 1;
53}
54
55#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
56#define CHECK_AX88796L_PORT(port) \
57 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
58#else
59#define CHECK_AX88796L_PORT(port) (0)
60#endif
61
62/*
63 * General outline: remap really low stuff [eventually] to SuperIO,
64 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
65 * is mapped through the PCI IO window. Stuff with high bits (PXSEG)
66 * should be way beyond the window, and is used w/o translation for
67 * compatibility.
68 */
69u8 r7780rp_inb(unsigned long port)
70{
71 if (CHECK_AX88796L_PORT(port))
72 return ctrl_inw(port88796l(port, 0)) & 0xff;
73 else if (PXSEG(port))
74 return ctrl_inb(port);
75 else if (is_pci_ioaddr(port) || shifted_port(port))
76 return ctrl_inb(pci_ioaddr(port));
77
78 return ctrl_inw(port2adr(port)) & 0xff;
79}
80
81u8 r7780rp_inb_p(unsigned long port)
82{
83 u8 v;
84
85 if (CHECK_AX88796L_PORT(port))
86 v = ctrl_inw(port88796l(port, 0)) & 0xff;
87 else if (PXSEG(port))
88 v = ctrl_inb(port);
89 else if (is_pci_ioaddr(port) || shifted_port(port))
90 v = ctrl_inb(pci_ioaddr(port));
91 else
92 v = ctrl_inw(port2adr(port)) & 0xff;
93
94 ctrl_delay();
95
96 return v;
97}
98
99u16 r7780rp_inw(unsigned long port)
100{
101 if (CHECK_AX88796L_PORT(port))
102 maybebadio(port);
103 else if (PXSEG(port))
104 return ctrl_inw(port);
105 else if (is_pci_ioaddr(port) || shifted_port(port))
106 return ctrl_inw(pci_ioaddr(port));
107 else
108 maybebadio(port);
109
110 return 0;
111}
112
113u32 r7780rp_inl(unsigned long port)
114{
115 if (CHECK_AX88796L_PORT(port))
116 maybebadio(port);
117 else if (PXSEG(port))
118 return ctrl_inl(port);
119 else if (is_pci_ioaddr(port) || shifted_port(port))
120 return ctrl_inl(pci_ioaddr(port));
121 else
122 maybebadio(port);
123
124 return 0;
125}
126
127void r7780rp_outb(u8 value, unsigned long port)
128{
129 if (CHECK_AX88796L_PORT(port))
130 ctrl_outw(value, port88796l(port, 0));
131 else if (PXSEG(port))
132 ctrl_outb(value, port);
133 else if (is_pci_ioaddr(port) || shifted_port(port))
134 ctrl_outb(value, pci_ioaddr(port));
135 else
136 ctrl_outw(value, port2adr(port));
137}
138
139void r7780rp_outb_p(u8 value, unsigned long port)
140{
141 if (CHECK_AX88796L_PORT(port))
142 ctrl_outw(value, port88796l(port, 0));
143 else if (PXSEG(port))
144 ctrl_outb(value, port);
145 else if (is_pci_ioaddr(port) || shifted_port(port))
146 ctrl_outb(value, pci_ioaddr(port));
147 else
148 ctrl_outw(value, port2adr(port));
149
150 ctrl_delay();
151}
152
153void r7780rp_outw(u16 value, unsigned long port)
154{
155 if (CHECK_AX88796L_PORT(port))
156 maybebadio(port);
157 else if (PXSEG(port))
158 ctrl_outw(value, port);
159 else if (is_pci_ioaddr(port) || shifted_port(port))
160 ctrl_outw(value, pci_ioaddr(port));
161 else
162 maybebadio(port);
163}
164
165void r7780rp_outl(u32 value, unsigned long port)
166{
167 if (CHECK_AX88796L_PORT(port))
168 maybebadio(port);
169 else if (PXSEG(port))
170 ctrl_outl(value, port);
171 else if (is_pci_ioaddr(port) || shifted_port(port))
172 ctrl_outl(value, pci_ioaddr(port));
173 else
174 maybebadio(port);
175}
176
177void r7780rp_insb(unsigned long port, void *dst, unsigned long count)
178{
179 volatile u16 *p;
180 u8 *buf = dst;
181
182 if (CHECK_AX88796L_PORT(port)) {
183 p = (volatile u16 *)port88796l(port, 0);
184 while (count--)
185 *buf++ = *p & 0xff;
186 } else if (PXSEG(port)) {
187 while (count--)
188 *buf++ = *(volatile u8 *)port;
189 } else if (is_pci_ioaddr(port) || shifted_port(port)) {
190 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
191
192 while (count--)
193 *buf++ = *bp;
194 } else {
195 p = (volatile u16 *)port2adr(port);
196 while (count--)
197 *buf++ = *p & 0xff;
198 }
199}
200
201void r7780rp_insw(unsigned long port, void *dst, unsigned long count)
202{
203 volatile u16 *p;
204 u16 *buf = dst;
205
206 if (CHECK_AX88796L_PORT(port))
207 p = (volatile u16 *)port88796l(port, 1);
208 else if (PXSEG(port))
209 p = (volatile u16 *)port;
210 else if (is_pci_ioaddr(port) || shifted_port(port))
211 p = (volatile u16 *)pci_ioaddr(port);
212 else
213 p = (volatile u16 *)port2adr(port);
214
215 while (count--)
216 *buf++ = *p;
217}
218
219void r7780rp_insl(unsigned long port, void *dst, unsigned long count)
220{
221 u32 *buf = dst;
222
223 if (CHECK_AX88796L_PORT(port))
224 maybebadio(port);
225 else if (is_pci_ioaddr(port) || shifted_port(port)) {
226 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
227
228 while (count--)
229 *buf++ = *p;
230 } else
231 maybebadio(port);
232}
233
234void r7780rp_outsb(unsigned long port, const void *src, unsigned long count)
235{
236 volatile u16 *p;
237 const u8 *buf = src;
238
239 if (CHECK_AX88796L_PORT(port)) {
240 p = (volatile u16 *)port88796l(port, 0);
241 while (count--)
242 *p = *buf++;
243 } else if (PXSEG(port))
244 while (count--)
245 ctrl_outb(*buf++, port);
246 else if (is_pci_ioaddr(port) || shifted_port(port)) {
247 volatile u8 *bp = (volatile u8 *)pci_ioaddr(port);
248
249 while (count--)
250 *bp = *buf++;
251 } else {
252 p = (volatile u16 *)port2adr(port);
253 while (count--)
254 *p = *buf++;
255 }
256}
257
258void r7780rp_outsw(unsigned long port, const void *src, unsigned long count)
259{
260 volatile u16 *p;
261 const u16 *buf = src;
262
263 if (CHECK_AX88796L_PORT(port))
264 p = (volatile u16 *)port88796l(port, 1);
265 else if (PXSEG(port))
266 p = (volatile u16 *)port;
267 else if (is_pci_ioaddr(port) || shifted_port(port))
268 p = (volatile u16 *)pci_ioaddr(port);
269 else
270 p = (volatile u16 *)port2adr(port);
271
272 while (count--)
273 *p = *buf++;
274}
275
276void r7780rp_outsl(unsigned long port, const void *src, unsigned long count)
277{
278 const u32 *buf = src;
279
280 if (CHECK_AX88796L_PORT(port))
281 maybebadio(port);
282 else if (is_pci_ioaddr(port) || shifted_port(port)) {
283 volatile u32 *p = (volatile u32 *)pci_ioaddr(port);
284
285 while (count--)
286 *p = *buf++;
287 } else
288 maybebadio(port);
289}
290
291void __iomem *r7780rp_ioport_map(unsigned long port, unsigned int size)
292{
293 if (CHECK_AX88796L_PORT(port))
294 return (void __iomem *)port88796l(port, size > 1);
295 else if (PXSEG(port))
296 return (void __iomem *)port;
297 else if (is_pci_ioaddr(port) || shifted_port(port))
298 return (void __iomem *)pci_ioaddr(port);
299
300 return (void __iomem *)port2adr(port);
301}
diff --git a/arch/sh/boards/renesas/r7780rp/irq.c b/arch/sh/boards/renesas/r7780rp/irq.c
new file mode 100644
index 000000000000..61d5e5d3c294
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/irq.c
@@ -0,0 +1,117 @@
1/*
2 * linux/arch/sh/boards/renesas/r7780rp/irq.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Solutions Highlander R7780RP-1 Support.
7 *
8 * Modified for R7780RP-1 by
9 * Atom Create Engineering Co., Ltd. 2002.
10 */
11
12#include <linux/config.h>
13#include <linux/init.h>
14#include <linux/irq.h>
15#include <asm/io.h>
16#include <asm/irq.h>
17#include <asm/r7780rp/r7780rp.h>
18
19#ifdef CONFIG_SH_R7780MP
20static int mask_pos[] = {12, 11, 9, 14, 15, 8, 13, 6, 5, 4, 3, 2, 0, 0, 1, 0};
21#else
22static int mask_pos[] = {15, 14, 13, 12, 11, 10, 9, 8, 7, 5, 6, 4, 0, 1, 2, 0};
23#endif
24
25static void enable_r7780rp_irq(unsigned int irq);
26static void disable_r7780rp_irq(unsigned int irq);
27
28/* shutdown is same as "disable" */
29#define shutdown_r7780rp_irq disable_r7780rp_irq
30
31static void ack_r7780rp_irq(unsigned int irq);
32static void end_r7780rp_irq(unsigned int irq);
33
34static unsigned int startup_r7780rp_irq(unsigned int irq)
35{
36 enable_r7780rp_irq(irq);
37 return 0; /* never anything pending */
38}
39
40static void disable_r7780rp_irq(unsigned int irq)
41{
42 unsigned short val;
43 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
44
45 /* Set the priority in IPR to 0 */
46 val = ctrl_inw(IRLCNTR1);
47 val &= mask;
48 ctrl_outw(val, IRLCNTR1);
49}
50
51static void enable_r7780rp_irq(unsigned int irq)
52{
53 unsigned short val;
54 unsigned short value = (0x0001 << mask_pos[irq]);
55
56 /* Set priority in IPR back to original value */
57 val = ctrl_inw(IRLCNTR1);
58 val |= value;
59 ctrl_outw(val, IRLCNTR1);
60}
61
62static void ack_r7780rp_irq(unsigned int irq)
63{
64 disable_r7780rp_irq(irq);
65}
66
67static void end_r7780rp_irq(unsigned int irq)
68{
69 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
70 enable_r7780rp_irq(irq);
71}
72
73static struct hw_interrupt_type r7780rp_irq_type = {
74 .typename = "R7780RP-IRQ",
75 .startup = startup_r7780rp_irq,
76 .shutdown = shutdown_r7780rp_irq,
77 .enable = enable_r7780rp_irq,
78 .disable = disable_r7780rp_irq,
79 .ack = ack_r7780rp_irq,
80 .end = end_r7780rp_irq,
81};
82
83static void make_r7780rp_irq(unsigned int irq)
84{
85 disable_irq_nosync(irq);
86 irq_desc[irq].handler = &r7780rp_irq_type;
87 disable_r7780rp_irq(irq);
88}
89
90/*
91 * Initialize IRQ setting
92 */
93void __init init_r7780rp_IRQ(void)
94{
95 int i;
96
97 /* IRL0=PCI Slot #A
98 * IRL1=PCI Slot #B
99 * IRL2=PCI Slot #C
100 * IRL3=PCI Slot #D
101 * IRL4=CF Card
102 * IRL5=CF Card Insert
103 * IRL6=M66596
104 * IRL7=SD Card
105 * IRL8=Touch Panel
106 * IRL9=SCI
107 * IRL10=Serial
108 * IRL11=Extention #A
109 * IRL11=Extention #B
110 * IRL12=Debug LAN
111 * IRL13=Push Switch
112 * IRL14=ZiggBee IO
113 */
114
115 for (i=0; i<15; i++)
116 make_r7780rp_irq(i);
117}
diff --git a/arch/sh/boards/renesas/r7780rp/led.c b/arch/sh/boards/renesas/r7780rp/led.c
new file mode 100644
index 000000000000..9f02766b6f53
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/led.c
@@ -0,0 +1,45 @@
1/*
2 * Copyright (C) Atom Create Engineering Co., Ltd.
3 *
4 * May be copied or modified under the terms of GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file contains Renesas Solutions HIGHLANDER R7780RP-1 specific LED code.
8 */
9
10#include <linux/config.h>
11#include <linux/sched.h>
12#include <asm/io.h>
13#include <asm/r7780rp/r7780rp.h>
14
15/* Cycle the LED's in the clasic Knightriger/Sun pattern */
16void heartbeat_r7780rp(void)
17{
18 static unsigned int cnt = 0, period = 0;
19 volatile unsigned short *p = (volatile unsigned short *)PA_OBLED;
20 static unsigned bit = 0, up = 1;
21 unsigned bit_pos[] = {2, 1, 0, 3, 6, 5, 4, 7};
22
23 cnt += 1;
24 if (cnt < period)
25 return;
26
27 cnt = 0;
28
29 /* Go through the points (roughly!):
30 * f(0)=10, f(1)=16, f(2)=20, f(5)=35, f(int)->110
31 */
32 period = 110 - ((300 << FSHIFT)/((avenrun[0]/5) + (3<<FSHIFT)));
33
34 *p = 1 << bit_pos[bit];
35 if (up)
36 if (bit == 7) {
37 bit--;
38 up = 0;
39 } else
40 bit++;
41 else if (bit == 0)
42 up = 1;
43 else
44 bit--;
45}
diff --git a/arch/sh/boards/renesas/r7780rp/setup.c b/arch/sh/boards/renesas/r7780rp/setup.c
new file mode 100644
index 000000000000..b941aa0aa34e
--- /dev/null
+++ b/arch/sh/boards/renesas/r7780rp/setup.c
@@ -0,0 +1,163 @@
1/*
2 * arch/sh/boards/renesas/r7780rp/setup.c
3 *
4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
5 * Copyright (C) 2005, 2006 Paul Mundt
6 *
7 * Renesas Solutions Highlander R7780RP-1 Support.
8 *
9 * This file is subject to the terms and conditions of the GNU General Public
10 * License. See the file "COPYING" in the main directory of this archive
11 * for more details.
12 */
13#include <linux/init.h>
14#include <linux/platform_device.h>
15#include <asm/machvec.h>
16#include <asm/r7780rp/r7780rp.h>
17#include <asm/clock.h>
18#include <asm/io.h>
19
20extern void heartbeat_r7780rp(void);
21extern void init_r7780rp_IRQ(void);
22
23static struct resource m66596_usb_host_resources[] = {
24 [0] = {
25 .start = 0xa4800000,
26 .end = 0xa4ffffff,
27 .flags = IORESOURCE_MEM,
28 },
29 [1] = {
30 .start = 6, /* irq number */
31 .end = 6,
32 .flags = IORESOURCE_IRQ,
33 },
34};
35
36static struct platform_device m66596_usb_host_device = {
37 .name = "m66596-hcd",
38 .id = 0,
39 .dev = {
40 .dma_mask = NULL, /* don't use dma */
41 .coherent_dma_mask = 0xffffffff,
42 },
43 .num_resources = ARRAY_SIZE(m66596_usb_host_resources),
44 .resource = m66596_usb_host_resources,
45};
46
47static struct platform_device *r7780rp_devices[] __initdata = {
48 &m66596_usb_host_device,
49};
50
51static int __init r7780rp_devices_setup(void)
52{
53 return platform_add_devices(r7780rp_devices,
54 ARRAY_SIZE(r7780rp_devices));
55}
56
57/*
58 * Platform specific clocks
59 */
60static void ivdr_clk_enable(struct clk *clk)
61{
62 ctrl_outw(ctrl_inw(PA_IVDRCTL) | (1 << 8), PA_IVDRCTL);
63}
64
65static void ivdr_clk_disable(struct clk *clk)
66{
67 ctrl_outw(ctrl_inw(PA_IVDRCTL) & ~(1 << 8), PA_IVDRCTL);
68}
69
70static struct clk_ops ivdr_clk_ops = {
71 .enable = ivdr_clk_enable,
72 .disable = ivdr_clk_disable,
73};
74
75static struct clk ivdr_clk = {
76 .name = "ivdr_clk",
77 .ops = &ivdr_clk_ops,
78};
79
80static struct clk *r7780rp_clocks[] = {
81 &ivdr_clk,
82};
83
84static void r7780rp_power_off(void)
85{
86#ifdef CONFIG_SH_R7780MP
87 ctrl_outw(0x0001, PA_POFF);
88#endif
89}
90
91/*
92 * Initialize the board
93 */
94static void __init r7780rp_setup(char **cmdline_p)
95{
96 u16 ver = ctrl_inw(PA_VERREG);
97 int i;
98
99 device_initcall(r7780rp_devices_setup);
100
101 printk(KERN_INFO "Renesas Solutions Highlander R7780RP-1 support.\n");
102
103 printk(KERN_INFO "Board version: %d (revision %d), "
104 "FPGA version: %d (revision %d)\n",
105 (ver >> 12) & 0xf, (ver >> 8) & 0xf,
106 (ver >> 4) & 0xf, ver & 0xf);
107
108 /*
109 * Enable the important clocks right away..
110 */
111 for (i = 0; i < ARRAY_SIZE(r7780rp_clocks); i++) {
112 struct clk *clk = r7780rp_clocks[i];
113
114 clk_register(clk);
115 clk_enable(clk);
116 }
117
118 ctrl_outw(0x0000, PA_OBLED); /* Clear LED. */
119#ifndef CONFIG_SH_R7780MP
120 ctrl_outw(0x0001, PA_SDPOW); /* SD Power ON */
121#endif
122 ctrl_outw(ctrl_inw(PA_IVDRCTL) | 0x0100, PA_IVDRCTL); /* Si13112 */
123
124 pm_power_off = r7780rp_power_off;
125}
126
127/*
128 * The Machine Vector
129 */
130struct sh_machine_vector mv_r7780rp __initmv = {
131 .mv_name = "Highlander R7780RP-1",
132 .mv_setup = r7780rp_setup,
133
134 .mv_nr_irqs = 109,
135
136 .mv_inb = r7780rp_inb,
137 .mv_inw = r7780rp_inw,
138 .mv_inl = r7780rp_inl,
139 .mv_outb = r7780rp_outb,
140 .mv_outw = r7780rp_outw,
141 .mv_outl = r7780rp_outl,
142
143 .mv_inb_p = r7780rp_inb_p,
144 .mv_inw_p = r7780rp_inw,
145 .mv_inl_p = r7780rp_inl,
146 .mv_outb_p = r7780rp_outb_p,
147 .mv_outw_p = r7780rp_outw,
148 .mv_outl_p = r7780rp_outl,
149
150 .mv_insb = r7780rp_insb,
151 .mv_insw = r7780rp_insw,
152 .mv_insl = r7780rp_insl,
153 .mv_outsb = r7780rp_outsb,
154 .mv_outsw = r7780rp_outsw,
155 .mv_outsl = r7780rp_outsl,
156
157 .mv_ioport_map = r7780rp_ioport_map,
158 .mv_init_irq = init_r7780rp_IRQ,
159#ifdef CONFIG_HEARTBEAT
160 .mv_heartbeat = heartbeat_r7780rp,
161#endif
162};
163ALIAS_MV(r7780rp)
diff --git a/arch/sh/boards/renesas/rts7751r2d/Kconfig b/arch/sh/boards/renesas/rts7751r2d/Kconfig
new file mode 100644
index 000000000000..7780d1fb13ff
--- /dev/null
+++ b/arch/sh/boards/renesas/rts7751r2d/Kconfig
@@ -0,0 +1,12 @@
1if SH_RTS7751R2D
2
3menu "RTS7751R2D options"
4
5config RTS7751R2D_REV11
6 bool "RTS7751R2D Rev. 1.1 board support"
7 help
8 Selecting this option will support version rev. 1.1.
9endmenu
10
11endif
12
diff --git a/arch/sh/boards/renesas/rts7751r2d/Makefile b/arch/sh/boards/renesas/rts7751r2d/Makefile
index daa53334bdc3..686fc9ea5989 100644
--- a/arch/sh/boards/renesas/rts7751r2d/Makefile
+++ b/arch/sh/boards/renesas/rts7751r2d/Makefile
@@ -1,10 +1,6 @@
1# 1#
2# Makefile for the RTS7751R2D specific parts of the kernel 2# Makefile for the RTS7751R2D specific parts of the kernel
3# 3#
4# Note! Dependencies are done automagically by 'make dep', which also
5# removes any old dependencies. DON'T put your own dependencies here
6# unless it's something special (ie not a .c file).
7#
8
9obj-y := mach.o setup.o io.o irq.o led.o
10 4
5obj-y := setup.o io.o irq.o
6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/renesas/rts7751r2d/io.c b/arch/sh/boards/renesas/rts7751r2d/io.c
index 123abbbc91e0..135aa0b5e62d 100644
--- a/arch/sh/boards/renesas/rts7751r2d/io.c
+++ b/arch/sh/boards/renesas/rts7751r2d/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_rts7751r2d.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,17 +8,13 @@
10 * placeholder code from io_rts7751r2d.c left in with the 8 * placeholder code from io_rts7751r2d.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
16#include <asm/io.h> 13#include <linux/pci.h>
17#include <asm/rts7751r2d/rts7751r2d.h> 14#include <asm/rts7751r2d/rts7751r2d.h>
15#include <asm/io.h>
18#include <asm/addrspace.h> 16#include <asm/addrspace.h>
19 17
20#include <linux/module.h>
21#include <linux/pci.h>
22#include "../../../drivers/pci/pci-sh7751.h"
23
24/* 18/*
25 * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC) 19 * The 7751R RTS7751R2D uses the built-in PCI controller (PCIC)
26 * of the 7751R processor, and has a SuperIO accessible via the PCI. 20 * of the 7751R processor, and has a SuperIO accessible via the PCI.
@@ -28,22 +22,6 @@
28 * like the other Solution Engine boards. 22 * like the other Solution Engine boards.
29 */ 23 */
30 24
31#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
32#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
33#define PCI_IO_AREA SH7751_PCI_IO_BASE
34#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
35
36#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
37
38#define maybebadio(name,port) \
39 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
40 #name, (port), (__u32) __builtin_return_address(0))
41
42static inline void delay(void)
43{
44 ctrl_inw(0xa0000000);
45}
46
47static inline unsigned long port2adr(unsigned int port) 25static inline unsigned long port2adr(unsigned int port)
48{ 26{
49 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6) 27 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
@@ -52,7 +30,7 @@ static inline unsigned long port2adr(unsigned int port)
52 else 30 else
53 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1)); 31 return (PA_AREA5_IO + 0x1000 + ((port-0x1f0) << 1));
54 else 32 else
55 maybebadio(port2adr, (unsigned long)port); 33 maybebadio((unsigned long)port);
56 34
57 return port; 35 return port;
58} 36}
@@ -81,17 +59,6 @@ static inline int shifted_port(unsigned long port)
81 return 1; 59 return 1;
82} 60}
83 61
84/* In case someone configures the kernel w/o PCI support: in that */
85/* scenario, don't ever bother to check for PCI-window addresses */
86
87/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
88#if defined(CONFIG_PCI)
89#define CHECK_SH7751_PCIIO(port) \
90 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
91#else
92#define CHECK_SH7751_PCIIO(port) (0)
93#endif
94
95#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE) 62#if defined(CONFIG_NE2000) || defined(CONFIG_NE2000_MODULE)
96#define CHECK_AX88796L_PORT(port) \ 63#define CHECK_AX88796L_PORT(port) \
97 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20))) 64 ((port >= AX88796L_IO_BASE) && (port < (AX88796L_IO_BASE+0x20)))
@@ -112,8 +79,8 @@ unsigned char rts7751r2d_inb(unsigned long port)
112 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 79 return (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
113 else if (PXSEG(port)) 80 else if (PXSEG(port))
114 return *(volatile unsigned char *)port; 81 return *(volatile unsigned char *)port;
115 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 82 else if (is_pci_ioaddr(port) || shifted_port(port))
116 return *(volatile unsigned char *)PCI_IOMAP(port); 83 return *(volatile unsigned char *)pci_ioaddr(port);
117 else 84 else
118 return (*(volatile unsigned short *)port2adr(port) & 0xff); 85 return (*(volatile unsigned short *)port2adr(port) & 0xff);
119} 86}
@@ -126,11 +93,12 @@ unsigned char rts7751r2d_inb_p(unsigned long port)
126 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff; 93 v = (*(volatile unsigned short *)port88796l(port, 0)) & 0xff;
127 else if (PXSEG(port)) 94 else if (PXSEG(port))
128 v = *(volatile unsigned char *)port; 95 v = *(volatile unsigned char *)port;
129 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 96 else if (is_pci_ioaddr(port) || shifted_port(port))
130 v = *(volatile unsigned char *)PCI_IOMAP(port); 97 v = *(volatile unsigned char *)pci_ioaddr(port);
131 else 98 else
132 v = (*(volatile unsigned short *)port2adr(port) & 0xff); 99 v = (*(volatile unsigned short *)port2adr(port) & 0xff);
133 delay(); 100
101 ctrl_delay();
134 102
135 return v; 103 return v;
136} 104}
@@ -138,13 +106,13 @@ unsigned char rts7751r2d_inb_p(unsigned long port)
138unsigned short rts7751r2d_inw(unsigned long port) 106unsigned short rts7751r2d_inw(unsigned long port)
139{ 107{
140 if (CHECK_AX88796L_PORT(port)) 108 if (CHECK_AX88796L_PORT(port))
141 maybebadio(inw, port); 109 maybebadio(port);
142 else if (PXSEG(port)) 110 else if (PXSEG(port))
143 return *(volatile unsigned short *)port; 111 return *(volatile unsigned short *)port;
144 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 112 else if (is_pci_ioaddr(port) || shifted_port(port))
145 return *(volatile unsigned short *)PCI_IOMAP(port); 113 return *(volatile unsigned short *)pci_ioaddr(port);
146 else 114 else
147 maybebadio(inw, port); 115 maybebadio(port);
148 116
149 return 0; 117 return 0;
150} 118}
@@ -152,13 +120,13 @@ unsigned short rts7751r2d_inw(unsigned long port)
152unsigned int rts7751r2d_inl(unsigned long port) 120unsigned int rts7751r2d_inl(unsigned long port)
153{ 121{
154 if (CHECK_AX88796L_PORT(port)) 122 if (CHECK_AX88796L_PORT(port))
155 maybebadio(inl, port); 123 maybebadio(port);
156 else if (PXSEG(port)) 124 else if (PXSEG(port))
157 return *(volatile unsigned long *)port; 125 return *(volatile unsigned long *)port;
158 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 126 else if (is_pci_ioaddr(port) || shifted_port(port))
159 return *(volatile unsigned long *)PCI_IOMAP(port); 127 return *(volatile unsigned long *)pci_ioaddr(port);
160 else 128 else
161 maybebadio(inl, port); 129 maybebadio(port);
162 130
163 return 0; 131 return 0;
164} 132}
@@ -169,8 +137,8 @@ void rts7751r2d_outb(unsigned char value, unsigned long port)
169 *((volatile unsigned short *)port88796l(port, 0)) = value; 137 *((volatile unsigned short *)port88796l(port, 0)) = value;
170 else if (PXSEG(port)) 138 else if (PXSEG(port))
171 *(volatile unsigned char *)port = value; 139 *(volatile unsigned char *)port = value;
172 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 140 else if (is_pci_ioaddr(port) || shifted_port(port))
173 *(volatile unsigned char *)PCI_IOMAP(port) = value; 141 *(volatile unsigned char *)pci_ioaddr(port) = value;
174 else 142 else
175 *(volatile unsigned short *)port2adr(port) = value; 143 *(volatile unsigned short *)port2adr(port) = value;
176} 144}
@@ -181,143 +149,152 @@ void rts7751r2d_outb_p(unsigned char value, unsigned long port)
181 *((volatile unsigned short *)port88796l(port, 0)) = value; 149 *((volatile unsigned short *)port88796l(port, 0)) = value;
182 else if (PXSEG(port)) 150 else if (PXSEG(port))
183 *(volatile unsigned char *)port = value; 151 *(volatile unsigned char *)port = value;
184 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 152 else if (is_pci_ioaddr(port) || shifted_port(port))
185 *(volatile unsigned char *)PCI_IOMAP(port) = value; 153 *(volatile unsigned char *)pci_ioaddr(port) = value;
186 else 154 else
187 *(volatile unsigned short *)port2adr(port) = value; 155 *(volatile unsigned short *)port2adr(port) = value;
188 delay(); 156
157 ctrl_delay();
189} 158}
190 159
191void rts7751r2d_outw(unsigned short value, unsigned long port) 160void rts7751r2d_outw(unsigned short value, unsigned long port)
192{ 161{
193 if (CHECK_AX88796L_PORT(port)) 162 if (CHECK_AX88796L_PORT(port))
194 maybebadio(outw, port); 163 maybebadio(port);
195 else if (PXSEG(port)) 164 else if (PXSEG(port))
196 *(volatile unsigned short *)port = value; 165 *(volatile unsigned short *)port = value;
197 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 166 else if (is_pci_ioaddr(port) || shifted_port(port))
198 *(volatile unsigned short *)PCI_IOMAP(port) = value; 167 *(volatile unsigned short *)pci_ioaddr(port) = value;
199 else 168 else
200 maybebadio(outw, port); 169 maybebadio(port);
201} 170}
202 171
203void rts7751r2d_outl(unsigned int value, unsigned long port) 172void rts7751r2d_outl(unsigned int value, unsigned long port)
204{ 173{
205 if (CHECK_AX88796L_PORT(port)) 174 if (CHECK_AX88796L_PORT(port))
206 maybebadio(outl, port); 175 maybebadio(port);
207 else if (PXSEG(port)) 176 else if (PXSEG(port))
208 *(volatile unsigned long *)port = value; 177 *(volatile unsigned long *)port = value;
209 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 178 else if (is_pci_ioaddr(port) || shifted_port(port))
210 *(volatile unsigned long *)PCI_IOMAP(port) = value; 179 *(volatile unsigned long *)pci_ioaddr(port) = value;
211 else 180 else
212 maybebadio(outl, port); 181 maybebadio(port);
213} 182}
214 183
215void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count) 184void rts7751r2d_insb(unsigned long port, void *addr, unsigned long count)
216{ 185{
186 unsigned long a = (unsigned long)addr;
217 volatile __u8 *bp; 187 volatile __u8 *bp;
218 volatile __u16 *p; 188 volatile __u16 *p;
219 unsigned char *s = addr;
220 189
221 if (CHECK_AX88796L_PORT(port)) { 190 if (CHECK_AX88796L_PORT(port)) {
222 p = (volatile unsigned short *)port88796l(port, 0); 191 p = (volatile unsigned short *)port88796l(port, 0);
223 while (count--) *s++ = *p & 0xff; 192 while (count--)
193 ctrl_outb(*p & 0xff, a++);
224 } else if (PXSEG(port)) 194 } else if (PXSEG(port))
225 while (count--) *s++ = *(volatile unsigned char *)port; 195 while (count--)
226 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 196 ctrl_outb(ctrl_inb(port), a++);
227 bp = (__u8 *)PCI_IOMAP(port); 197 else if (is_pci_ioaddr(port) || shifted_port(port)) {
228 while (count--) *s++ = *bp; 198 bp = (__u8 *)pci_ioaddr(port);
199 while (count--)
200 ctrl_outb(*bp, a++);
229 } else { 201 } else {
230 p = (volatile unsigned short *)port2adr(port); 202 p = (volatile unsigned short *)port2adr(port);
231 while (count--) *s++ = *p & 0xff; 203 while (count--)
204 ctrl_outb(*p & 0xff, a++);
232 } 205 }
233} 206}
234 207
235void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count) 208void rts7751r2d_insw(unsigned long port, void *addr, unsigned long count)
236{ 209{
210 unsigned long a = (unsigned long)addr;
237 volatile __u16 *p; 211 volatile __u16 *p;
238 __u16 *s = addr;
239 212
240 if (CHECK_AX88796L_PORT(port)) 213 if (CHECK_AX88796L_PORT(port))
241 p = (volatile unsigned short *)port88796l(port, 1); 214 p = (volatile unsigned short *)port88796l(port, 1);
242 else if (PXSEG(port)) 215 else if (PXSEG(port))
243 p = (volatile unsigned short *)port; 216 p = (volatile unsigned short *)port;
244 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 217 else if (is_pci_ioaddr(port) || shifted_port(port))
245 p = (volatile unsigned short *)PCI_IOMAP(port); 218 p = (volatile unsigned short *)pci_ioaddr(port);
246 else 219 else
247 p = (volatile unsigned short *)port2adr(port); 220 p = (volatile unsigned short *)port2adr(port);
248 while (count--) *s++ = *p; 221 while (count--)
222 ctrl_outw(*p, a++);
249} 223}
250 224
251void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count) 225void rts7751r2d_insl(unsigned long port, void *addr, unsigned long count)
252{ 226{
253 if (CHECK_AX88796L_PORT(port)) 227 if (CHECK_AX88796L_PORT(port))
254 maybebadio(insl, port); 228 maybebadio(port);
255 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 229 else if (is_pci_ioaddr(port) || shifted_port(port)) {
256 volatile __u32 *p = (__u32 *)PCI_IOMAP(port); 230 unsigned long a = (unsigned long)addr;
257 __u32 *s = addr; 231
258 232 while (count--) {
259 while (count--) *s++ = *p; 233 ctrl_outl(ctrl_inl(pci_ioaddr(port)), a);
234 a += 4;
235 }
260 } else 236 } else
261 maybebadio(insl, port); 237 maybebadio(port);
262} 238}
263 239
264void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count) 240void rts7751r2d_outsb(unsigned long port, const void *addr, unsigned long count)
265{ 241{
242 unsigned long a = (unsigned long)addr;
266 volatile __u8 *bp; 243 volatile __u8 *bp;
267 volatile __u16 *p; 244 volatile __u16 *p;
268 const __u8 *s = addr;
269 245
270 if (CHECK_AX88796L_PORT(port)) { 246 if (CHECK_AX88796L_PORT(port)) {
271 p = (volatile unsigned short *)port88796l(port, 0); 247 p = (volatile unsigned short *)port88796l(port, 0);
272 while (count--) *p = *s++; 248 while (count--)
249 *p = ctrl_inb(a++);
273 } else if (PXSEG(port)) 250 } else if (PXSEG(port))
274 while (count--) *(volatile unsigned char *)port = *s++; 251 while (count--)
275 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 252 ctrl_outb(a++, port);
276 bp = (__u8 *)PCI_IOMAP(port); 253 else if (is_pci_ioaddr(port) || shifted_port(port)) {
277 while (count--) *bp = *s++; 254 bp = (__u8 *)pci_ioaddr(port);
255 while (count--)
256 *bp = ctrl_inb(a++);
278 } else { 257 } else {
279 p = (volatile unsigned short *)port2adr(port); 258 p = (volatile unsigned short *)port2adr(port);
280 while (count--) *p = *s++; 259 while (count--)
260 *p = ctrl_inb(a++);
281 } 261 }
282} 262}
283 263
284void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count) 264void rts7751r2d_outsw(unsigned long port, const void *addr, unsigned long count)
285{ 265{
266 unsigned long a = (unsigned long)addr;
286 volatile __u16 *p; 267 volatile __u16 *p;
287 const __u16 *s = addr;
288 268
289 if (CHECK_AX88796L_PORT(port)) 269 if (CHECK_AX88796L_PORT(port))
290 p = (volatile unsigned short *)port88796l(port, 1); 270 p = (volatile unsigned short *)port88796l(port, 1);
291 else if (PXSEG(port)) 271 else if (PXSEG(port))
292 p = (volatile unsigned short *)port; 272 p = (volatile unsigned short *)port;
293 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) 273 else if (is_pci_ioaddr(port) || shifted_port(port))
294 p = (volatile unsigned short *)PCI_IOMAP(port); 274 p = (volatile unsigned short *)pci_ioaddr(port);
295 else 275 else
296 p = (volatile unsigned short *)port2adr(port); 276 p = (volatile unsigned short *)port2adr(port);
297 while (count--) *p = *s++; 277
278 while (count--) {
279 ctrl_outw(*p, a);
280 a += 2;
281 }
298} 282}
299 283
300void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count) 284void rts7751r2d_outsl(unsigned long port, const void *addr, unsigned long count)
301{ 285{
302 if (CHECK_AX88796L_PORT(port)) 286 if (CHECK_AX88796L_PORT(port))
303 maybebadio(outsl, port); 287 maybebadio(port);
304 else if (CHECK_SH7751_PCIIO(port) || shifted_port(port)) { 288 else if (is_pci_ioaddr(port) || shifted_port(port)) {
305 volatile __u32 *p = (__u32 *)PCI_IOMAP(port); 289 unsigned long a = (unsigned long)addr;
306 const __u32 *s = addr; 290
307 291 while (count--) {
308 while (count--) *p = *s++; 292 ctrl_outl(ctrl_inl(a), pci_ioaddr(port));
293 a += 4;
294 }
309 } else 295 } else
310 maybebadio(outsl, port); 296 maybebadio(port);
311}
312
313void *rts7751r2d_ioremap(unsigned long offset, unsigned long size)
314{
315 if (offset >= 0xfd000000)
316 return (void *)offset;
317 else
318 return (void *)P2SEGADDR(offset);
319} 297}
320EXPORT_SYMBOL(rts7751r2d_ioremap);
321 298
322unsigned long rts7751r2d_isa_port2addr(unsigned long offset) 299unsigned long rts7751r2d_isa_port2addr(unsigned long offset)
323{ 300{
diff --git a/arch/sh/boards/renesas/rts7751r2d/irq.c b/arch/sh/boards/renesas/rts7751r2d/irq.c
index 154535440bbf..c915e7a3693a 100644
--- a/arch/sh/boards/renesas/rts7751r2d/irq.c
+++ b/arch/sh/boards/renesas/rts7751r2d/irq.c
@@ -41,30 +41,24 @@ static unsigned int startup_rts7751r2d_irq(unsigned int irq)
41 41
42static void disable_rts7751r2d_irq(unsigned int irq) 42static void disable_rts7751r2d_irq(unsigned int irq)
43{ 43{
44 unsigned long flags;
45 unsigned short val; 44 unsigned short val;
46 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]); 45 unsigned short mask = 0xffff ^ (0x0001 << mask_pos[irq]);
47 46
48 /* Set the priority in IPR to 0 */ 47 /* Set the priority in IPR to 0 */
49 local_irq_save(flags);
50 val = ctrl_inw(IRLCNTR1); 48 val = ctrl_inw(IRLCNTR1);
51 val &= mask; 49 val &= mask;
52 ctrl_outw(val, IRLCNTR1); 50 ctrl_outw(val, IRLCNTR1);
53 local_irq_restore(flags);
54} 51}
55 52
56static void enable_rts7751r2d_irq(unsigned int irq) 53static void enable_rts7751r2d_irq(unsigned int irq)
57{ 54{
58 unsigned long flags;
59 unsigned short val; 55 unsigned short val;
60 unsigned short value = (0x0001 << mask_pos[irq]); 56 unsigned short value = (0x0001 << mask_pos[irq]);
61 57
62 /* Set priority in IPR back to original value */ 58 /* Set priority in IPR back to original value */
63 local_irq_save(flags);
64 val = ctrl_inw(IRLCNTR1); 59 val = ctrl_inw(IRLCNTR1);
65 val |= value; 60 val |= value;
66 ctrl_outw(val, IRLCNTR1); 61 ctrl_outw(val, IRLCNTR1);
67 local_irq_restore(flags);
68} 62}
69 63
70int rts7751r2d_irq_demux(int irq) 64int rts7751r2d_irq_demux(int irq)
diff --git a/arch/sh/boards/renesas/rts7751r2d/led.c b/arch/sh/boards/renesas/rts7751r2d/led.c
index 4d16de71fac1..e14a13d12d4a 100644
--- a/arch/sh/boards/renesas/rts7751r2d/led.c
+++ b/arch/sh/boards/renesas/rts7751r2d/led.c
@@ -12,8 +12,6 @@
12#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/rts7751r2d/rts7751r2d.h> 13#include <asm/rts7751r2d/rts7751r2d.h>
14 14
15extern unsigned int debug_counter;
16
17#ifdef CONFIG_HEARTBEAT 15#ifdef CONFIG_HEARTBEAT
18 16
19#include <linux/sched.h> 17#include <linux/sched.h>
@@ -55,12 +53,3 @@ void rts7751r2d_led(unsigned short value)
55 ctrl_outw(value, PA_OUTPORT); 53 ctrl_outw(value, PA_OUTPORT);
56} 54}
57 55
58void debug_led_disp(void)
59{
60 unsigned short value;
61
62 value = (unsigned short)debug_counter++;
63 rts7751r2d_led(value);
64 if (value == 0xff)
65 debug_counter = 0;
66}
diff --git a/arch/sh/boards/renesas/rts7751r2d/mach.c b/arch/sh/boards/renesas/rts7751r2d/mach.c
deleted file mode 100644
index 5ed9e97ea197..000000000000
--- a/arch/sh/boards/renesas/rts7751r2d/mach.c
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_rts7751r2d.c
3 *
4 * Minor tweak of mach_se.c file to reference rts7751r2d-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Renesas Technology sales RTS7751R2D
10 */
11
12#include <linux/init.h>
13#include <linux/types.h>
14
15#include <asm/machvec.h>
16#include <asm/rtc.h>
17#include <asm/irq.h>
18#include <asm/rts7751r2d/io.h>
19
20extern void heartbeat_rts7751r2d(void);
21extern void init_rts7751r2d_IRQ(void);
22extern void *rts7751r2d_ioremap(unsigned long, unsigned long);
23extern int rts7751r2d_irq_demux(int irq);
24
25extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
26extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
27
28/*
29 * The Machine Vector
30 */
31
32struct sh_machine_vector mv_rts7751r2d __initmv = {
33 .mv_nr_irqs = 72,
34
35 .mv_inb = rts7751r2d_inb,
36 .mv_inw = rts7751r2d_inw,
37 .mv_inl = rts7751r2d_inl,
38 .mv_outb = rts7751r2d_outb,
39 .mv_outw = rts7751r2d_outw,
40 .mv_outl = rts7751r2d_outl,
41
42 .mv_inb_p = rts7751r2d_inb_p,
43 .mv_inw_p = rts7751r2d_inw,
44 .mv_inl_p = rts7751r2d_inl,
45 .mv_outb_p = rts7751r2d_outb_p,
46 .mv_outw_p = rts7751r2d_outw,
47 .mv_outl_p = rts7751r2d_outl,
48
49 .mv_insb = rts7751r2d_insb,
50 .mv_insw = rts7751r2d_insw,
51 .mv_insl = rts7751r2d_insl,
52 .mv_outsb = rts7751r2d_outsb,
53 .mv_outsw = rts7751r2d_outsw,
54 .mv_outsl = rts7751r2d_outsl,
55
56 .mv_ioremap = rts7751r2d_ioremap,
57 .mv_isa_port2addr = rts7751r2d_isa_port2addr,
58 .mv_init_irq = init_rts7751r2d_IRQ,
59#ifdef CONFIG_HEARTBEAT
60 .mv_heartbeat = heartbeat_rts7751r2d,
61#endif
62 .mv_irq_demux = rts7751r2d_irq_demux,
63
64#ifdef CONFIG_USB_OHCI_HCD
65 .mv_consistent_alloc = voyagergx_consistent_alloc,
66 .mv_consistent_free = voyagergx_consistent_free,
67#endif
68};
69ALIAS_MV(rts7751r2d)
diff --git a/arch/sh/boards/renesas/rts7751r2d/setup.c b/arch/sh/boards/renesas/rts7751r2d/setup.c
index 2587fd1a0240..20597a6e6702 100644
--- a/arch/sh/boards/renesas/rts7751r2d/setup.c
+++ b/arch/sh/boards/renesas/rts7751r2d/setup.c
@@ -1,31 +1,142 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_rts7751r2d.c
3 *
4 * Copyright (C) 2000 Kazumoto Kojima
5 *
6 * Renesas Technology Sales RTS7751R2D Support. 2 * Renesas Technology Sales RTS7751R2D Support.
7 * 3 *
8 * Modified for RTS7751R2D by 4 * Copyright (C) 2002 Atom Create Engineering Co., Ltd.
9 * Atom Create Engineering Co., Ltd. 2002. 5 * Copyright (C) 2004 - 2006 Paul Mundt
6 *
7 * This file is subject to the terms and conditions of the GNU General Public
8 * License. See the file "COPYING" in the main directory of this archive
9 * for more details.
10 */ 10 */
11
12#include <linux/init.h> 11#include <linux/init.h>
12#include <linux/platform_device.h>
13#include <linux/serial_8250.h>
14#include <linux/pm.h>
13#include <asm/io.h> 15#include <asm/io.h>
14#include <asm/rts7751r2d/rts7751r2d.h> 16#include <asm/machvec.h>
17#include <asm/mach/rts7751r2d.h>
18#include <asm/voyagergx.h>
19
20extern void heartbeat_rts7751r2d(void);
21extern void init_rts7751r2d_IRQ(void);
22extern int rts7751r2d_irq_demux(int irq);
23
24extern void *voyagergx_consistent_alloc(struct device *, size_t, dma_addr_t *, gfp_t);
25extern int voyagergx_consistent_free(struct device *, size_t, void *, dma_addr_t);
26
27static struct plat_serial8250_port uart_platform_data[] = {
28 {
29 .membase = (void *)VOYAGER_UART_BASE,
30 .mapbase = VOYAGER_UART_BASE,
31 .iotype = UPIO_MEM,
32 .irq = VOYAGER_UART0_IRQ,
33 .flags = UPF_BOOT_AUTOCONF,
34 .regshift = 2,
35 .uartclk = (9600 * 16),
36 }, {
37 .flags = 0,
38 },
39};
40
41static void __init voyagergx_serial_init(void)
42{
43 unsigned long val;
44
45 /*
46 * GPIO Control
47 */
48 val = inl(GPIO_MUX_HIGH);
49 val |= 0x00001fe0;
50 outl(val, GPIO_MUX_HIGH);
51
52 /*
53 * Power Mode Gate
54 */
55 val = inl(POWER_MODE0_GATE);
56 val |= (POWER_MODE0_GATE_U0 | POWER_MODE0_GATE_U1);
57 outl(val, POWER_MODE0_GATE);
58
59 val = inl(POWER_MODE1_GATE);
60 val |= (POWER_MODE1_GATE_U0 | POWER_MODE1_GATE_U1);
61 outl(val, POWER_MODE1_GATE);
62}
63
64static struct platform_device uart_device = {
65 .name = "serial8250",
66 .id = -1,
67 .dev = {
68 .platform_data = uart_platform_data,
69 },
70};
71
72static struct platform_device *rts7751r2d_devices[] __initdata = {
73 &uart_device,
74};
15 75
16unsigned int debug_counter; 76static int __init rts7751r2d_devices_setup(void)
77{
78 return platform_add_devices(rts7751r2d_devices,
79 ARRAY_SIZE(rts7751r2d_devices));
80}
17 81
18const char *get_system_type(void) 82static void rts7751r2d_power_off(void)
19{ 83{
20 return "RTS7751R2D"; 84 ctrl_outw(0x0001, PA_POWOFF);
21} 85}
22 86
23/* 87/*
24 * Initialize the board 88 * Initialize the board
25 */ 89 */
26void __init platform_setup(void) 90static void __init rts7751r2d_setup(char **cmdline_p)
27{ 91{
28 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n"); 92 device_initcall(rts7751r2d_devices_setup);
93
29 ctrl_outw(0x0000, PA_OUTPORT); 94 ctrl_outw(0x0000, PA_OUTPORT);
30 debug_counter = 0; 95 pm_power_off = rts7751r2d_power_off;
96
97 voyagergx_serial_init();
98
99 printk(KERN_INFO "Renesas Technology Sales RTS7751R2D support.\n");
31} 100}
101
102/*
103 * The Machine Vector
104 */
105struct sh_machine_vector mv_rts7751r2d __initmv = {
106 .mv_name = "RTS7751R2D",
107 .mv_setup = rts7751r2d_setup,
108 .mv_nr_irqs = 72,
109
110 .mv_inb = rts7751r2d_inb,
111 .mv_inw = rts7751r2d_inw,
112 .mv_inl = rts7751r2d_inl,
113 .mv_outb = rts7751r2d_outb,
114 .mv_outw = rts7751r2d_outw,
115 .mv_outl = rts7751r2d_outl,
116
117 .mv_inb_p = rts7751r2d_inb_p,
118 .mv_inw_p = rts7751r2d_inw,
119 .mv_inl_p = rts7751r2d_inl,
120 .mv_outb_p = rts7751r2d_outb_p,
121 .mv_outw_p = rts7751r2d_outw,
122 .mv_outl_p = rts7751r2d_outl,
123
124 .mv_insb = rts7751r2d_insb,
125 .mv_insw = rts7751r2d_insw,
126 .mv_insl = rts7751r2d_insl,
127 .mv_outsb = rts7751r2d_outsb,
128 .mv_outsw = rts7751r2d_outsw,
129 .mv_outsl = rts7751r2d_outsl,
130
131 .mv_init_irq = init_rts7751r2d_IRQ,
132#ifdef CONFIG_HEARTBEAT
133 .mv_heartbeat = heartbeat_rts7751r2d,
134#endif
135 .mv_irq_demux = rts7751r2d_irq_demux,
136
137#ifdef CONFIG_USB_SM501
138 .mv_consistent_alloc = voyagergx_consistent_alloc,
139 .mv_consistent_free = voyagergx_consistent_free,
140#endif
141};
142ALIAS_MV(rts7751r2d)
diff --git a/arch/sh/boards/renesas/sh7710voipgw/Makefile b/arch/sh/boards/renesas/sh7710voipgw/Makefile
new file mode 100644
index 000000000000..77037567633b
--- /dev/null
+++ b/arch/sh/boards/renesas/sh7710voipgw/Makefile
@@ -0,0 +1 @@
obj-y := setup.o
diff --git a/arch/sh/boards/renesas/sh7710voipgw/setup.c b/arch/sh/boards/renesas/sh7710voipgw/setup.c
new file mode 100644
index 000000000000..e57e7afab8c6
--- /dev/null
+++ b/arch/sh/boards/renesas/sh7710voipgw/setup.c
@@ -0,0 +1,109 @@
1/*
2 * Renesas Technology SH7710 VoIP Gateway
3 *
4 * Copyright (C) 2006 Ranjit Deshpande
5 * Kenati Technologies Inc.
6 *
7 * May be copied or modified under the terms of the GNU General Public
8 * License. See linux/COPYING for more information.
9 */
10#include <linux/init.h>
11#include <asm/machvec.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14#include <asm/irq.h>
15
16/*
17 * Initialize IRQ setting
18 */
19static void __init sh7710voipgw_init_irq(void)
20{
21 /* Disable all interrupts in IPR registers */
22 ctrl_outw(0x0, INTC_IPRA);
23 ctrl_outw(0x0, INTC_IPRB);
24 ctrl_outw(0x0, INTC_IPRC);
25 ctrl_outw(0x0, INTC_IPRD);
26 ctrl_outw(0x0, INTC_IPRE);
27 ctrl_outw(0x0, INTC_IPRF);
28 ctrl_outw(0x0, INTC_IPRG);
29 ctrl_outw(0x0, INTC_IPRH);
30 ctrl_outw(0x0, INTC_IPRI);
31
32 /* Ack all interrupt sources in the IRR0 register */
33 ctrl_outb(0x3f, INTC_IRR0);
34
35 /* Use IRQ0 - IRQ3 as active low interrupt lines i.e. disable
36 * IRL mode.
37 */
38 ctrl_outw(0x2aa, INTC_ICR1);
39
40 /* Now make IPR interrupts */
41 make_ipr_irq(TIMER2_IRQ, TIMER2_IPR_ADDR,
42 TIMER2_IPR_POS, TIMER2_PRIORITY);
43 make_ipr_irq(WDT_IRQ, WDT_IPR_ADDR, WDT_IPR_POS, WDT_PRIORITY);
44
45 /* SCIF0 */
46 make_ipr_irq(SCIF0_ERI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
47 SCIF0_PRIORITY);
48 make_ipr_irq(SCIF0_RXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
49 SCIF0_PRIORITY);
50 make_ipr_irq(SCIF0_BRI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
51 SCIF0_PRIORITY);
52 make_ipr_irq(SCIF0_TXI_IRQ, SCIF0_IPR_ADDR, SCIF0_IPR_POS,
53 SCIF0_PRIORITY);
54
55 /* DMAC-1 */
56 make_ipr_irq(DMTE0_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
57 make_ipr_irq(DMTE1_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
58 make_ipr_irq(DMTE2_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
59 make_ipr_irq(DMTE3_IRQ, DMA_IPR_ADDR, DMA_IPR_POS, DMA_PRIORITY);
60
61 /* DMAC-2 */
62 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
63 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
64
65 /* IPSEC */
66 make_ipr_irq(IPSEC_IRQ, IPSEC_IPR_ADDR, IPSEC_IPR_POS, IPSEC_PRIORITY);
67
68 /* EDMAC */
69 make_ipr_irq(EDMAC0_IRQ, EDMAC0_IPR_ADDR, EDMAC0_IPR_POS,
70 EDMAC0_PRIORITY);
71 make_ipr_irq(EDMAC1_IRQ, EDMAC1_IPR_ADDR, EDMAC1_IPR_POS,
72 EDMAC1_PRIORITY);
73 make_ipr_irq(EDMAC2_IRQ, EDMAC2_IPR_ADDR, EDMAC2_IPR_POS,
74 EDMAC2_PRIORITY);
75
76 /* SIOF0 */
77 make_ipr_irq(SIOF0_ERI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
78 SIOF0_PRIORITY);
79 make_ipr_irq(SIOF0_TXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
80 SIOF0_PRIORITY);
81 make_ipr_irq(SIOF0_RXI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
82 SIOF0_PRIORITY);
83 make_ipr_irq(SIOF0_CCI_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS,
84 SIOF0_PRIORITY);
85
86 /* SIOF1 */
87 make_ipr_irq(SIOF1_ERI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
88 SIOF1_PRIORITY);
89 make_ipr_irq(SIOF1_TXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
90 SIOF1_PRIORITY);
91 make_ipr_irq(SIOF1_RXI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
92 SIOF1_PRIORITY);
93 make_ipr_irq(SIOF1_CCI_IRQ, SIOF1_IPR_ADDR, SIOF1_IPR_POS,
94 SIOF1_PRIORITY);
95
96 /* SLIC IRQ's */
97 make_ipr_irq(IRQ1_IRQ, IRQ1_IPR_ADDR, IRQ1_IPR_POS, IRQ1_PRIORITY);
98 make_ipr_irq(IRQ2_IRQ, IRQ2_IPR_ADDR, IRQ2_IPR_POS, IRQ2_PRIORITY);
99}
100
101/*
102 * The Machine Vector
103 */
104struct sh_machine_vector mv_sh7710voipgw __initmv = {
105 .mv_name = "SH7710 VoIP Gateway",
106 .mv_nr_irqs = 104,
107 .mv_init_irq = sh7710voipgw_init_irq,
108};
109ALIAS_MV(sh7710voipgw)
diff --git a/arch/sh/boards/renesas/systemh/io.c b/arch/sh/boards/renesas/systemh/io.c
index cf979011aa94..cde6e5d192c4 100644
--- a/arch/sh/boards/renesas/systemh/io.c
+++ b/arch/sh/boards/renesas/systemh/io.c
@@ -5,66 +5,25 @@
5 * Based largely on io_se.c. 5 * Based largely on io_se.c.
6 * 6 *
7 * I/O routine for Hitachi 7751 Systemh. 7 * I/O routine for Hitachi 7751 Systemh.
8 *
9 */ 8 */
10
11#include <linux/kernel.h> 9#include <linux/kernel.h>
12#include <linux/types.h> 10#include <linux/types.h>
13#include <asm/systemh/7751systemh.h> 11#include <linux/pci.h>
12#include <asm/systemh7751.h>
14#include <asm/addrspace.h> 13#include <asm/addrspace.h>
15#include <asm/io.h> 14#include <asm/io.h>
16 15
17#include <linux/pci.h>
18#include "../../drivers/pci/pci-sh7751.h"
19
20/*
21 * The 7751 SystemH Engine uses the built-in PCI controller (PCIC)
22 * of the 7751 processor, and has a SuperIO accessible on its memory
23 * bus.
24 */
25
26#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
27#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
28#define PCI_IO_AREA SH7751_PCI_IO_BASE
29#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
30
31#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
32#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area 16#define ETHER_IOMAP(adr) (0xB3000000 + (adr)) /*map to 16bits access area
33 of smc lan chip*/ 17 of smc lan chip*/
34
35#define maybebadio(name,port) \
36 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
37 #name, (port), (__u32) __builtin_return_address(0))
38
39static inline void delay(void)
40{
41 ctrl_inw(0xa0000000);
42}
43
44static inline volatile __u16 * 18static inline volatile __u16 *
45port2adr(unsigned int port) 19port2adr(unsigned int port)
46{ 20{
47 if (port >= 0x2000) 21 if (port >= 0x2000)
48 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 22 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
49#if 0 23 maybebadio((unsigned long)port);
50 else
51 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
52#endif
53 maybebadio(name,(unsigned long)port);
54 return (volatile __u16*)port; 24 return (volatile __u16*)port;
55} 25}
56 26
57/* In case someone configures the kernel w/o PCI support: in that */
58/* scenario, don't ever bother to check for PCI-window addresses */
59
60/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
61#if defined(CONFIG_PCI)
62#define CHECK_SH7751_PCIIO(port) \
63 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
64#else
65#define CHECK_SH7751_PCIIO(port) (0)
66#endif
67
68/* 27/*
69 * General outline: remap really low stuff [eventually] to SuperIO, 28 * General outline: remap really low stuff [eventually] to SuperIO,
70 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 29 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -76,8 +35,8 @@ unsigned char sh7751systemh_inb(unsigned long port)
76{ 35{
77 if (PXSEG(port)) 36 if (PXSEG(port))
78 return *(volatile unsigned char *)port; 37 return *(volatile unsigned char *)port;
79 else if (CHECK_SH7751_PCIIO(port)) 38 else if (is_pci_ioaddr(port))
80 return *(volatile unsigned char *)PCI_IOMAP(port); 39 return *(volatile unsigned char *)pci_ioaddr(port);
81 else if (port <= 0x3F1) 40 else if (port <= 0x3F1)
82 return *(volatile unsigned char *)ETHER_IOMAP(port); 41 return *(volatile unsigned char *)ETHER_IOMAP(port);
83 else 42 else
@@ -90,13 +49,13 @@ unsigned char sh7751systemh_inb_p(unsigned long port)
90 49
91 if (PXSEG(port)) 50 if (PXSEG(port))
92 v = *(volatile unsigned char *)port; 51 v = *(volatile unsigned char *)port;
93 else if (CHECK_SH7751_PCIIO(port)) 52 else if (is_pci_ioaddr(port))
94 v = *(volatile unsigned char *)PCI_IOMAP(port); 53 v = *(volatile unsigned char *)pci_ioaddr(port);
95 else if (port <= 0x3F1) 54 else if (port <= 0x3F1)
96 v = *(volatile unsigned char *)ETHER_IOMAP(port); 55 v = *(volatile unsigned char *)ETHER_IOMAP(port);
97 else 56 else
98 v = (*port2adr(port))&0xff; 57 v = (*port2adr(port))&0xff;
99 delay(); 58 ctrl_delay();
100 return v; 59 return v;
101} 60}
102 61
@@ -104,14 +63,14 @@ unsigned short sh7751systemh_inw(unsigned long port)
104{ 63{
105 if (PXSEG(port)) 64 if (PXSEG(port))
106 return *(volatile unsigned short *)port; 65 return *(volatile unsigned short *)port;
107 else if (CHECK_SH7751_PCIIO(port)) 66 else if (is_pci_ioaddr(port))
108 return *(volatile unsigned short *)PCI_IOMAP(port); 67 return *(volatile unsigned short *)pci_ioaddr(port);
109 else if (port >= 0x2000) 68 else if (port >= 0x2000)
110 return *port2adr(port); 69 return *port2adr(port);
111 else if (port <= 0x3F1) 70 else if (port <= 0x3F1)
112 return *(volatile unsigned int *)ETHER_IOMAP(port); 71 return *(volatile unsigned int *)ETHER_IOMAP(port);
113 else 72 else
114 maybebadio(inw, port); 73 maybebadio(port);
115 return 0; 74 return 0;
116} 75}
117 76
@@ -119,14 +78,14 @@ unsigned int sh7751systemh_inl(unsigned long port)
119{ 78{
120 if (PXSEG(port)) 79 if (PXSEG(port))
121 return *(volatile unsigned long *)port; 80 return *(volatile unsigned long *)port;
122 else if (CHECK_SH7751_PCIIO(port)) 81 else if (is_pci_ioaddr(port))
123 return *(volatile unsigned int *)PCI_IOMAP(port); 82 return *(volatile unsigned int *)pci_ioaddr(port);
124 else if (port >= 0x2000) 83 else if (port >= 0x2000)
125 return *port2adr(port); 84 return *port2adr(port);
126 else if (port <= 0x3F1) 85 else if (port <= 0x3F1)
127 return *(volatile unsigned int *)ETHER_IOMAP(port); 86 return *(volatile unsigned int *)ETHER_IOMAP(port);
128 else 87 else
129 maybebadio(inl, port); 88 maybebadio(port);
130 return 0; 89 return 0;
131} 90}
132 91
@@ -135,8 +94,8 @@ void sh7751systemh_outb(unsigned char value, unsigned long port)
135 94
136 if (PXSEG(port)) 95 if (PXSEG(port))
137 *(volatile unsigned char *)port = value; 96 *(volatile unsigned char *)port = value;
138 else if (CHECK_SH7751_PCIIO(port)) 97 else if (is_pci_ioaddr(port))
139 *((unsigned char*)PCI_IOMAP(port)) = value; 98 *((unsigned char*)pci_ioaddr(port)) = value;
140 else if (port <= 0x3F1) 99 else if (port <= 0x3F1)
141 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 100 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
142 else 101 else
@@ -147,37 +106,37 @@ void sh7751systemh_outb_p(unsigned char value, unsigned long port)
147{ 106{
148 if (PXSEG(port)) 107 if (PXSEG(port))
149 *(volatile unsigned char *)port = value; 108 *(volatile unsigned char *)port = value;
150 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
151 *((unsigned char*)PCI_IOMAP(port)) = value; 110 *((unsigned char*)pci_ioaddr(port)) = value;
152 else if (port <= 0x3F1) 111 else if (port <= 0x3F1)
153 *(volatile unsigned char *)ETHER_IOMAP(port) = value; 112 *(volatile unsigned char *)ETHER_IOMAP(port) = value;
154 else 113 else
155 *(port2adr(port)) = value; 114 *(port2adr(port)) = value;
156 delay(); 115 ctrl_delay();
157} 116}
158 117
159void sh7751systemh_outw(unsigned short value, unsigned long port) 118void sh7751systemh_outw(unsigned short value, unsigned long port)
160{ 119{
161 if (PXSEG(port)) 120 if (PXSEG(port))
162 *(volatile unsigned short *)port = value; 121 *(volatile unsigned short *)port = value;
163 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
164 *((unsigned short *)PCI_IOMAP(port)) = value; 123 *((unsigned short *)pci_ioaddr(port)) = value;
165 else if (port >= 0x2000) 124 else if (port >= 0x2000)
166 *port2adr(port) = value; 125 *port2adr(port) = value;
167 else if (port <= 0x3F1) 126 else if (port <= 0x3F1)
168 *(volatile unsigned short *)ETHER_IOMAP(port) = value; 127 *(volatile unsigned short *)ETHER_IOMAP(port) = value;
169 else 128 else
170 maybebadio(outw, port); 129 maybebadio(port);
171} 130}
172 131
173void sh7751systemh_outl(unsigned int value, unsigned long port) 132void sh7751systemh_outl(unsigned int value, unsigned long port)
174{ 133{
175 if (PXSEG(port)) 134 if (PXSEG(port))
176 *(volatile unsigned long *)port = value; 135 *(volatile unsigned long *)port = value;
177 else if (CHECK_SH7751_PCIIO(port)) 136 else if (is_pci_ioaddr(port))
178 *((unsigned long*)PCI_IOMAP(port)) = value; 137 *((unsigned long*)pci_ioaddr(port)) = value;
179 else 138 else
180 maybebadio(outl, port); 139 maybebadio(port);
181} 140}
182 141
183void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count) 142void sh7751systemh_insb(unsigned long port, void *addr, unsigned long count)
@@ -194,7 +153,7 @@ void sh7751systemh_insw(unsigned long port, void *addr, unsigned long count)
194 153
195void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count) 154void sh7751systemh_insl(unsigned long port, void *addr, unsigned long count)
196{ 155{
197 maybebadio(insl, port); 156 maybebadio(port);
198} 157}
199 158
200void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count) 159void sh7751systemh_outsb(unsigned long port, const void *addr, unsigned long count)
@@ -211,73 +170,5 @@ void sh7751systemh_outsw(unsigned long port, const void *addr, unsigned long cou
211 170
212void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count) 171void sh7751systemh_outsl(unsigned long port, const void *addr, unsigned long count)
213{ 172{
214 maybebadio(outsw, port); 173 maybebadio(port);
215}
216
217/* For read/write calls, just copy generic (pass-thru); PCIMBR is */
218/* already set up. For a larger memory space, these would need to */
219/* reset PCIMBR as needed on a per-call basis... */
220
221unsigned char sh7751systemh_readb(unsigned long addr)
222{
223 return *(volatile unsigned char*)addr;
224}
225
226unsigned short sh7751systemh_readw(unsigned long addr)
227{
228 return *(volatile unsigned short*)addr;
229}
230
231unsigned int sh7751systemh_readl(unsigned long addr)
232{
233 return *(volatile unsigned long*)addr;
234}
235
236void sh7751systemh_writeb(unsigned char b, unsigned long addr)
237{
238 *(volatile unsigned char*)addr = b;
239}
240
241void sh7751systemh_writew(unsigned short b, unsigned long addr)
242{
243 *(volatile unsigned short*)addr = b;
244}
245
246void sh7751systemh_writel(unsigned int b, unsigned long addr)
247{
248 *(volatile unsigned long*)addr = b;
249}
250
251
252
253/* Map ISA bus address to the real address. Only for PCMCIA. */
254
255/* ISA page descriptor. */
256static __u32 sh_isa_memmap[256];
257
258#if 0
259static int
260sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
261{
262 int idx;
263
264 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
265 return -1;
266
267 idx = start >> 12;
268 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
269 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
270 start, length, offset, idx, sh_isa_memmap[idx]);
271 return 0;
272}
273#endif
274
275unsigned long
276sh7751systemh_isa_port2addr(unsigned long offset)
277{
278 int idx;
279
280 idx = (offset >> 12) & 0xff;
281 offset &= 0xfff;
282 return sh_isa_memmap[idx] + offset;
283} 174}
diff --git a/arch/sh/boards/renesas/systemh/irq.c b/arch/sh/boards/renesas/systemh/irq.c
index 8372d967f601..8d016dae2333 100644
--- a/arch/sh/boards/renesas/systemh/irq.c
+++ b/arch/sh/boards/renesas/systemh/irq.c
@@ -15,7 +15,7 @@
15#include <linux/hdreg.h> 15#include <linux/hdreg.h>
16#include <linux/ide.h> 16#include <linux/ide.h>
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/mach/7751systemh.h> 18#include <asm/systemh7751.h>
19#include <asm/smc37c93x.h> 19#include <asm/smc37c93x.h>
20 20
21/* address of external interrupt mask register 21/* address of external interrupt mask register
@@ -57,12 +57,9 @@ static void shutdown_systemh_irq(unsigned int irq)
57static void disable_systemh_irq(unsigned int irq) 57static void disable_systemh_irq(unsigned int irq)
58{ 58{
59 if (systemh_irq_mask_register) { 59 if (systemh_irq_mask_register) {
60 unsigned long flags;
61 unsigned long val, mask = 0x01 << 1; 60 unsigned long val, mask = 0x01 << 1;
62 61
63 /* Clear the "irq"th bit in the mask and set it in the request */ 62 /* Clear the "irq"th bit in the mask and set it in the request */
64 local_irq_save(flags);
65
66 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 63 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
67 val &= ~mask; 64 val &= ~mask;
68 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 65 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
@@ -70,23 +67,18 @@ static void disable_systemh_irq(unsigned int irq)
70 val = ctrl_inl((unsigned long)systemh_irq_request_register); 67 val = ctrl_inl((unsigned long)systemh_irq_request_register);
71 val |= mask; 68 val |= mask;
72 ctrl_outl(val, (unsigned long)systemh_irq_request_register); 69 ctrl_outl(val, (unsigned long)systemh_irq_request_register);
73
74 local_irq_restore(flags);
75 } 70 }
76} 71}
77 72
78static void enable_systemh_irq(unsigned int irq) 73static void enable_systemh_irq(unsigned int irq)
79{ 74{
80 if (systemh_irq_mask_register) { 75 if (systemh_irq_mask_register) {
81 unsigned long flags;
82 unsigned long val, mask = 0x01 << 1; 76 unsigned long val, mask = 0x01 << 1;
83 77
84 /* Set "irq"th bit in the mask register */ 78 /* Set "irq"th bit in the mask register */
85 local_irq_save(flags);
86 val = ctrl_inl((unsigned long)systemh_irq_mask_register); 79 val = ctrl_inl((unsigned long)systemh_irq_mask_register);
87 val |= mask; 80 val |= mask;
88 ctrl_outl(val, (unsigned long)systemh_irq_mask_register); 81 ctrl_outl(val, (unsigned long)systemh_irq_mask_register);
89 local_irq_restore(flags);
90 } 82 }
91} 83}
92 84
diff --git a/arch/sh/boards/renesas/systemh/setup.c b/arch/sh/boards/renesas/systemh/setup.c
index 826fa3d7669c..a8467bf90c25 100644
--- a/arch/sh/boards/renesas/systemh/setup.c
+++ b/arch/sh/boards/renesas/systemh/setup.c
@@ -15,28 +15,21 @@
15 * for more details. 15 * for more details.
16 */ 16 */
17#include <linux/init.h> 17#include <linux/init.h>
18#include <asm/mach/7751systemh.h>
19#include <asm/mach/io.h>
20#include <asm/machvec.h> 18#include <asm/machvec.h>
19#include <asm/systemh7751.h>
21 20
22extern void make_systemh_irq(unsigned int irq); 21extern void make_systemh_irq(unsigned int irq);
23 22
24const char *get_system_type(void)
25{
26 return "7751 SystemH";
27}
28
29/* 23/*
30 * Initialize IRQ setting 24 * Initialize IRQ setting
31 */ 25 */
32void __init init_7751systemh_IRQ(void) 26static void __init sh7751systemh_init_irq(void)
33{ 27{
34/* make_ipr_irq(10, BCR_ILCRD, 1, 0x0f-10); LAN */
35/* make_ipr_irq(14, BCR_ILCRA, 2, 0x0f-4); */
36 make_systemh_irq(0xb); /* Ethernet interrupt */ 28 make_systemh_irq(0xb); /* Ethernet interrupt */
37} 29}
38 30
39struct sh_machine_vector mv_7751systemh __initmv = { 31struct sh_machine_vector mv_7751systemh __initmv = {
32 .mv_name = "7751 SystemH",
40 .mv_nr_irqs = 72, 33 .mv_nr_irqs = 72,
41 34
42 .mv_inb = sh7751systemh_inb, 35 .mv_inb = sh7751systemh_inb,
@@ -60,21 +53,6 @@ struct sh_machine_vector mv_7751systemh __initmv = {
60 .mv_outsw = sh7751systemh_outsw, 53 .mv_outsw = sh7751systemh_outsw,
61 .mv_outsl = sh7751systemh_outsl, 54 .mv_outsl = sh7751systemh_outsl,
62 55
63 .mv_readb = sh7751systemh_readb, 56 .mv_init_irq = sh7751system_init_irq,
64 .mv_readw = sh7751systemh_readw,
65 .mv_readl = sh7751systemh_readl,
66 .mv_writeb = sh7751systemh_writeb,
67 .mv_writew = sh7751systemh_writew,
68 .mv_writel = sh7751systemh_writel,
69
70 .mv_isa_port2addr = sh7751systemh_isa_port2addr,
71
72 .mv_init_irq = init_7751systemh_IRQ,
73}; 57};
74ALIAS_MV(7751systemh) 58ALIAS_MV(7751systemh)
75
76int __init platform_setup(void)
77{
78 return 0;
79}
80
diff --git a/arch/sh/boards/saturn/setup.c b/arch/sh/boards/saturn/setup.c
index bea6c572ad82..a3a37c9aad2e 100644
--- a/arch/sh/boards/saturn/setup.c
+++ b/arch/sh/boards/saturn/setup.c
@@ -9,22 +9,17 @@
9 */ 9 */
10#include <linux/kernel.h> 10#include <linux/kernel.h>
11#include <linux/init.h> 11#include <linux/init.h>
12
13#include <asm/io.h> 12#include <asm/io.h>
14#include <asm/machvec.h> 13#include <asm/machvec.h>
15#include <asm/mach/io.h> 14#include <asm/mach/io.h>
16 15
17extern int saturn_irq_demux(int irq_nr); 16extern int saturn_irq_demux(int irq_nr);
18 17
19const char *get_system_type(void)
20{
21 return "Sega Saturn";
22}
23
24/* 18/*
25 * The Machine Vector 19 * The Machine Vector
26 */ 20 */
27struct sh_machine_vector mv_saturn __initmv = { 21struct sh_machine_vector mv_saturn __initmv = {
22 .mv_name = "Sega Saturn",
28 .mv_nr_irqs = 80, /* Fix this later */ 23 .mv_nr_irqs = 80, /* Fix this later */
29 24
30 .mv_isa_port2addr = saturn_isa_port2addr, 25 .mv_isa_port2addr = saturn_isa_port2addr,
@@ -33,11 +28,4 @@ struct sh_machine_vector mv_saturn __initmv = {
33 .mv_ioremap = saturn_ioremap, 28 .mv_ioremap = saturn_ioremap,
34 .mv_iounmap = saturn_iounmap, 29 .mv_iounmap = saturn_iounmap,
35}; 30};
36
37ALIAS_MV(saturn) 31ALIAS_MV(saturn)
38
39int __init platform_setup(void)
40{
41 return 0;
42}
43
diff --git a/arch/sh/boards/se/7300/io.c b/arch/sh/boards/se/7300/io.c
index f449a94ddffd..8a03d7a52a7c 100644
--- a/arch/sh/boards/se/7300/io.c
+++ b/arch/sh/boards/se/7300/io.c
@@ -9,8 +9,8 @@
9 */ 9 */
10 10
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <asm/mach/se7300.h>
13#include <asm/io.h> 12#include <asm/io.h>
13#include <asm/se7300.h>
14 14
15#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a) 15#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
16 16
@@ -99,6 +99,7 @@ bad_outb(struct iop *p, unsigned char value, unsigned long port)
99 badio(inw, port); 99 badio(inw, port);
100} 100}
101 101
102#ifdef CONFIG_SMC91X
102/* MSTLANEX01 LAN at 0xb400:0000 */ 103/* MSTLANEX01 LAN at 0xb400:0000 */
103static struct iop laniop = { 104static struct iop laniop = {
104 .start = 0x300, 105 .start = 0x300,
@@ -110,6 +111,7 @@ static struct iop laniop = {
110 .outb = simple_outb, 111 .outb = simple_outb,
111 .outw = simple_outw, 112 .outw = simple_outw,
112}; 113};
114#endif
113 115
114/* NE2000 pc card NIC */ 116/* NE2000 pc card NIC */
115static struct iop neiop = { 117static struct iop neiop = {
@@ -123,6 +125,7 @@ static struct iop neiop = {
123 .outw = simple_outw, 125 .outw = simple_outw,
124}; 126};
125 127
128#ifdef CONFIG_IDE
126/* CF in CF slot */ 129/* CF in CF slot */
127static struct iop cfiop = { 130static struct iop cfiop = {
128 .base = 0xb0600000, 131 .base = 0xb0600000,
@@ -132,12 +135,13 @@ static struct iop cfiop = {
132 .outb = pcc_outb, 135 .outb = pcc_outb,
133 .outw = simple_outw, 136 .outw = simple_outw,
134}; 137};
138#endif
135 139
136static __inline__ struct iop * 140static __inline__ struct iop *
137port2iop(unsigned long port) 141port2iop(unsigned long port)
138{ 142{
139 if (0) ; 143 if (0) ;
140#if defined(CONFIG_SMC91111) 144#if defined(CONFIG_SMC91X)
141 else if (laniop.check(&laniop, port)) 145 else if (laniop.check(&laniop, port))
142 return &laniop; 146 return &laniop;
143#endif 147#endif
diff --git a/arch/sh/boards/se/7300/irq.c b/arch/sh/boards/se/7300/irq.c
index 216a78d1a108..ad1034f98a29 100644
--- a/arch/sh/boards/se/7300/irq.c
+++ b/arch/sh/boards/se/7300/irq.c
@@ -11,7 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <asm/irq.h> 12#include <asm/irq.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/mach/se7300.h> 14#include <asm/se7300.h>
15 15
16/* 16/*
17 * Initialize IRQ setting 17 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/7300/led.c b/arch/sh/boards/se/7300/led.c
index ad51f0a9c1e3..4d03bb7774be 100644
--- a/arch/sh/boards/se/7300/led.c
+++ b/arch/sh/boards/se/7300/led.c
@@ -12,24 +12,10 @@
12 */ 12 */
13 13
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <asm/mach/se7300.h> 15#include <asm/se7300.h>
16
17static void
18mach_led(int position, int value)
19{
20 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
21
22 if (value) {
23 *p |= (1 << 8);
24 } else {
25 *p &= ~(1 << 8);
26 }
27}
28
29 16
30/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
31void 18void heartbeat_7300se(void)
32heartbeat_7300se(void)
33{ 19{
34 static unsigned int cnt = 0, period = 0; 20 static unsigned int cnt = 0, period = 0;
35 volatile unsigned short *p = (volatile unsigned short *) PA_LED; 21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
diff --git a/arch/sh/boards/se/7300/setup.c b/arch/sh/boards/se/7300/setup.c
index ebcd98d4c081..6f082a722d42 100644
--- a/arch/sh/boards/se/7300/setup.c
+++ b/arch/sh/boards/se/7300/setup.c
@@ -9,23 +9,16 @@
9 9
10#include <linux/init.h> 10#include <linux/init.h>
11#include <asm/machvec.h> 11#include <asm/machvec.h>
12#include <asm/machvec_init.h> 12#include <asm/se7300.h>
13#include <asm/mach/io.h>
14 13
15void heartbeat_7300se(void); 14void heartbeat_7300se(void);
16void init_7300se_IRQ(void); 15void init_7300se_IRQ(void);
17 16
18const char *
19get_system_type(void)
20{
21 return "SolutionEngine 7300";
22}
23
24/* 17/*
25 * The Machine Vector 18 * The Machine Vector
26 */ 19 */
27
28struct sh_machine_vector mv_7300se __initmv = { 20struct sh_machine_vector mv_7300se __initmv = {
21 .mv_name = "SolutionEngine 7300",
29 .mv_nr_irqs = 109, 22 .mv_nr_irqs = 109,
30 .mv_inb = sh7300se_inb, 23 .mv_inb = sh7300se_inb,
31 .mv_inw = sh7300se_inw, 24 .mv_inw = sh7300se_inw,
@@ -53,13 +46,4 @@ struct sh_machine_vector mv_7300se __initmv = {
53 .mv_heartbeat = heartbeat_7300se, 46 .mv_heartbeat = heartbeat_7300se,
54#endif 47#endif
55}; 48};
56
57ALIAS_MV(7300se) 49ALIAS_MV(7300se)
58/*
59 * Initialize the board
60 */
61void __init
62platform_setup(void)
63{
64
65}
diff --git a/arch/sh/boards/se/73180/io.c b/arch/sh/boards/se/73180/io.c
index 755df5ac4a4e..72715575458b 100644
--- a/arch/sh/boards/se/73180/io.c
+++ b/arch/sh/boards/se/73180/io.c
@@ -99,6 +99,7 @@ bad_outb(struct iop *p, unsigned char value, unsigned long port)
99 badio(inw, port); 99 badio(inw, port);
100} 100}
101 101
102#ifdef CONFIG_SMC91X
102/* MSTLANEX01 LAN at 0xb400:0000 */ 103/* MSTLANEX01 LAN at 0xb400:0000 */
103static struct iop laniop = { 104static struct iop laniop = {
104 .start = 0x300, 105 .start = 0x300,
@@ -110,6 +111,7 @@ static struct iop laniop = {
110 .outb = simple_outb, 111 .outb = simple_outb,
111 .outw = simple_outw, 112 .outw = simple_outw,
112}; 113};
114#endif
113 115
114/* NE2000 pc card NIC */ 116/* NE2000 pc card NIC */
115static struct iop neiop = { 117static struct iop neiop = {
@@ -123,6 +125,7 @@ static struct iop neiop = {
123 .outw = simple_outw, 125 .outw = simple_outw,
124}; 126};
125 127
128#ifdef CONFIG_IDE
126/* CF in CF slot */ 129/* CF in CF slot */
127static struct iop cfiop = { 130static struct iop cfiop = {
128 .base = 0xb0600000, 131 .base = 0xb0600000,
@@ -132,12 +135,13 @@ static struct iop cfiop = {
132 .outb = pcc_outb, 135 .outb = pcc_outb,
133 .outw = simple_outw, 136 .outw = simple_outw,
134}; 137};
138#endif
135 139
136static __inline__ struct iop * 140static __inline__ struct iop *
137port2iop(unsigned long port) 141port2iop(unsigned long port)
138{ 142{
139 if (0) ; 143 if (0) ;
140#if defined(CONFIG_SMC91111) 144#if defined(CONFIG_SMC91X)
141 else if (laniop.check(&laniop, port)) 145 else if (laniop.check(&laniop, port))
142 return &laniop; 146 return &laniop;
143#endif 147#endif
diff --git a/arch/sh/boards/se/73180/irq.c b/arch/sh/boards/se/73180/irq.c
index 4344d0ef24aa..2c62b8ea350e 100644
--- a/arch/sh/boards/se/73180/irq.c
+++ b/arch/sh/boards/se/73180/irq.c
@@ -7,7 +7,6 @@
7 * Modified for SH-Mobile SolutionEngine 73180 Support 7 * Modified for SH-Mobile SolutionEngine 73180 Support
8 * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp> 8 * by YOSHII Takashi <yoshii-takashi@hitachi-ul.co.jp>
9 * 9 *
10 *
11 */ 10 */
12 11
13#include <linux/init.h> 12#include <linux/init.h>
@@ -17,14 +16,6 @@
17#include <asm/mach/se73180.h> 16#include <asm/mach/se73180.h>
18 17
19static int 18static int
20intreq2irq(int i)
21{
22 if (i == 5)
23 return 10;
24 return 32 + 7 - i;
25}
26
27static int
28irq2intreq(int irq) 19irq2intreq(int irq)
29{ 20{
30 if (irq == 10) 21 if (irq == 10)
diff --git a/arch/sh/boards/se/73180/led.c b/arch/sh/boards/se/73180/led.c
index 610439fde6ee..4b72e9a3ead9 100644
--- a/arch/sh/boards/se/73180/led.c
+++ b/arch/sh/boards/se/73180/led.c
@@ -14,21 +14,8 @@
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <asm/mach/se73180.h> 15#include <asm/mach/se73180.h>
16 16
17static void
18mach_led(int position, int value)
19{
20 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
21
22 if (value) {
23 *p |= (1 << LED_SHIFT);
24 } else {
25 *p &= ~(1 << LED_SHIFT);
26 }
27}
28
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 17/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void 18void heartbeat_73180se(void)
31heartbeat_73180se(void)
32{ 19{
33 static unsigned int cnt = 0, period = 0; 20 static unsigned int cnt = 0, period = 0;
34 volatile unsigned short *p = (volatile unsigned short *) PA_LED; 21 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
diff --git a/arch/sh/boards/se/73180/setup.c b/arch/sh/boards/se/73180/setup.c
index cdb7b5f8d942..b38ef50a160a 100644
--- a/arch/sh/boards/se/73180/setup.c
+++ b/arch/sh/boards/se/73180/setup.c
@@ -11,23 +11,17 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <asm/machvec.h> 13#include <asm/machvec.h>
14#include <asm/machvec_init.h> 14#include <asm/se73180.h>
15#include <asm/mach/io.h> 15#include <asm/irq.h>
16 16
17void heartbeat_73180se(void); 17void heartbeat_73180se(void);
18void init_73180se_IRQ(void); 18void init_73180se_IRQ(void);
19 19
20const char *
21get_system_type(void)
22{
23 return "SolutionEngine 73180";
24}
25
26/* 20/*
27 * The Machine Vector 21 * The Machine Vector
28 */ 22 */
29
30struct sh_machine_vector mv_73180se __initmv = { 23struct sh_machine_vector mv_73180se __initmv = {
24 .mv_name = "SolutionEngine 73180",
31 .mv_nr_irqs = 108, 25 .mv_nr_irqs = 108,
32 .mv_inb = sh73180se_inb, 26 .mv_inb = sh73180se_inb,
33 .mv_inw = sh73180se_inw, 27 .mv_inw = sh73180se_inw,
@@ -51,17 +45,9 @@ struct sh_machine_vector mv_73180se __initmv = {
51 .mv_outsl = sh73180se_outsl, 45 .mv_outsl = sh73180se_outsl,
52 46
53 .mv_init_irq = init_73180se_IRQ, 47 .mv_init_irq = init_73180se_IRQ,
48 .mv_irq_demux = shmse_irq_demux,
54#ifdef CONFIG_HEARTBEAT 49#ifdef CONFIG_HEARTBEAT
55 .mv_heartbeat = heartbeat_73180se, 50 .mv_heartbeat = heartbeat_73180se,
56#endif 51#endif
57}; 52};
58
59ALIAS_MV(73180se) 53ALIAS_MV(73180se)
60/*
61 * Initialize the board
62 */
63void __init
64platform_setup(void)
65{
66
67}
diff --git a/arch/sh/boards/se/7343/Makefile b/arch/sh/boards/se/7343/Makefile
new file mode 100644
index 000000000000..4291069c0b4f
--- /dev/null
+++ b/arch/sh/boards/se/7343/Makefile
@@ -0,0 +1,7 @@
1#
2# Makefile for the 7343 SolutionEngine specific parts of the kernel
3#
4
5obj-y := setup.o io.o irq.o
6
7obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7343/io.c b/arch/sh/boards/se/7343/io.c
new file mode 100644
index 000000000000..646661a146ad
--- /dev/null
+++ b/arch/sh/boards/se/7343/io.c
@@ -0,0 +1,275 @@
1/*
2 * arch/sh/boards/se/7343/io.c
3 *
4 * I/O routine for SH-Mobile3AS 7343 SolutionEngine.
5 *
6 */
7
8#include <linux/config.h>
9#include <linux/kernel.h>
10#include <asm/io.h>
11#include <asm/mach/se7343.h>
12
13#define badio(fn, a) panic("bad i/o operation %s for %08lx.", #fn, a)
14
15struct iop {
16 unsigned long start, end;
17 unsigned long base;
18 struct iop *(*check) (struct iop * p, unsigned long port);
19 unsigned char (*inb) (struct iop * p, unsigned long port);
20 unsigned short (*inw) (struct iop * p, unsigned long port);
21 void (*outb) (struct iop * p, unsigned char value, unsigned long port);
22 void (*outw) (struct iop * p, unsigned short value, unsigned long port);
23};
24
25struct iop *
26simple_check(struct iop *p, unsigned long port)
27{
28 static int count;
29
30 if (count < 100)
31 count++;
32
33 port &= 0xFFFF;
34
35 if ((p->start <= port) && (port <= p->end))
36 return p;
37 else
38 badio(check, port);
39}
40
41struct iop *
42ide_check(struct iop *p, unsigned long port)
43{
44 if (((0x1f0 <= port) && (port <= 0x1f7)) || (port == 0x3f7))
45 return p;
46 return NULL;
47}
48
49unsigned char
50simple_inb(struct iop *p, unsigned long port)
51{
52 return *(unsigned char *) (p->base + port);
53}
54
55unsigned short
56simple_inw(struct iop *p, unsigned long port)
57{
58 return *(unsigned short *) (p->base + port);
59}
60
61void
62simple_outb(struct iop *p, unsigned char value, unsigned long port)
63{
64 *(unsigned char *) (p->base + port) = value;
65}
66
67void
68simple_outw(struct iop *p, unsigned short value, unsigned long port)
69{
70 *(unsigned short *) (p->base + port) = value;
71}
72
73unsigned char
74pcc_inb(struct iop *p, unsigned long port)
75{
76 unsigned long addr = p->base + port + 0x40000;
77 unsigned long v;
78
79 if (port & 1)
80 addr += 0x00400000;
81 v = *(volatile unsigned char *) addr;
82 return v;
83}
84
85void
86pcc_outb(struct iop *p, unsigned char value, unsigned long port)
87{
88 unsigned long addr = p->base + port + 0x40000;
89
90 if (port & 1)
91 addr += 0x00400000;
92 *(volatile unsigned char *) addr = value;
93}
94
95unsigned char
96bad_inb(struct iop *p, unsigned long port)
97{
98 badio(inb, port);
99}
100
101void
102bad_outb(struct iop *p, unsigned char value, unsigned long port)
103{
104 badio(inw, port);
105}
106
107#ifdef CONFIG_SMC91X
108/* MSTLANEX01 LAN at 0xb400:0000 */
109static struct iop laniop = {
110 .start = 0x00,
111 .end = 0x0F,
112 .base = 0x04000000,
113 .check = simple_check,
114 .inb = simple_inb,
115 .inw = simple_inw,
116 .outb = simple_outb,
117 .outw = simple_outw,
118};
119#endif
120
121#ifdef CONFIG_NE2000
122/* NE2000 pc card NIC */
123static struct iop neiop = {
124 .start = 0x280,
125 .end = 0x29f,
126 .base = 0xb0600000 + 0x80, /* soft 0x280 -> hard 0x300 */
127 .check = simple_check,
128 .inb = pcc_inb,
129 .inw = simple_inw,
130 .outb = pcc_outb,
131 .outw = simple_outw,
132};
133#endif
134
135#ifdef CONFIG_IDE
136/* CF in CF slot */
137static struct iop cfiop = {
138 .base = 0xb0600000,
139 .check = ide_check,
140 .inb = pcc_inb,
141 .inw = simple_inw,
142 .outb = pcc_outb,
143 .outw = simple_outw,
144};
145#endif
146
147static __inline__ struct iop *
148port2iop(unsigned long port)
149{
150 if (0) ;
151#if defined(CONFIG_SMC91X)
152 else if (laniop.check(&laniop, port))
153 return &laniop;
154#endif
155#if defined(CONFIG_NE2000)
156 else if (neiop.check(&neiop, port))
157 return &neiop;
158#endif
159#if defined(CONFIG_IDE)
160 else if (cfiop.check(&cfiop, port))
161 return &cfiop;
162#endif
163 else
164 return NULL;
165}
166
167static inline void
168delay(void)
169{
170 ctrl_inw(0xac000000);
171 ctrl_inw(0xac000000);
172}
173
174unsigned char
175sh7343se_inb(unsigned long port)
176{
177 struct iop *p = port2iop(port);
178 return (p->inb) (p, port);
179}
180
181unsigned char
182sh7343se_inb_p(unsigned long port)
183{
184 unsigned char v = sh7343se_inb(port);
185 delay();
186 return v;
187}
188
189unsigned short
190sh7343se_inw(unsigned long port)
191{
192 struct iop *p = port2iop(port);
193 return (p->inw) (p, port);
194}
195
196unsigned int
197sh7343se_inl(unsigned long port)
198{
199 badio(inl, port);
200}
201
202void
203sh7343se_outb(unsigned char value, unsigned long port)
204{
205 struct iop *p = port2iop(port);
206 (p->outb) (p, value, port);
207}
208
209void
210sh7343se_outb_p(unsigned char value, unsigned long port)
211{
212 sh7343se_outb(value, port);
213 delay();
214}
215
216void
217sh7343se_outw(unsigned short value, unsigned long port)
218{
219 struct iop *p = port2iop(port);
220 (p->outw) (p, value, port);
221}
222
223void
224sh7343se_outl(unsigned int value, unsigned long port)
225{
226 badio(outl, port);
227}
228
229void
230sh7343se_insb(unsigned long port, void *addr, unsigned long count)
231{
232 unsigned char *a = addr;
233 struct iop *p = port2iop(port);
234 while (count--)
235 *a++ = (p->inb) (p, port);
236}
237
238void
239sh7343se_insw(unsigned long port, void *addr, unsigned long count)
240{
241 unsigned short *a = addr;
242 struct iop *p = port2iop(port);
243 while (count--)
244 *a++ = (p->inw) (p, port);
245}
246
247void
248sh7343se_insl(unsigned long port, void *addr, unsigned long count)
249{
250 badio(insl, port);
251}
252
253void
254sh7343se_outsb(unsigned long port, const void *addr, unsigned long count)
255{
256 unsigned char *a = (unsigned char *) addr;
257 struct iop *p = port2iop(port);
258 while (count--)
259 (p->outb) (p, *a++, port);
260}
261
262void
263sh7343se_outsw(unsigned long port, const void *addr, unsigned long count)
264{
265 unsigned short *a = (unsigned short *) addr;
266 struct iop *p = port2iop(port);
267 while (count--)
268 (p->outw) (p, *a++, port);
269}
270
271void
272sh7343se_outsl(unsigned long port, const void *addr, unsigned long count)
273{
274 badio(outsw, port);
275}
diff --git a/arch/sh/boards/se/7343/irq.c b/arch/sh/boards/se/7343/irq.c
new file mode 100644
index 000000000000..b41e3d4ea37c
--- /dev/null
+++ b/arch/sh/boards/se/7343/irq.c
@@ -0,0 +1,193 @@
1/*
2 * arch/sh/boards/se/7343/irq.c
3 *
4 */
5
6#include <linux/config.h>
7#include <linux/init.h>
8#include <linux/interrupt.h>
9#include <linux/irq.h>
10#include <asm/irq.h>
11#include <asm/io.h>
12#include <asm/mach/se7343.h>
13
14static void
15disable_intreq_irq(unsigned int irq)
16{
17 int bit = irq - OFFCHIP_IRQ_BASE;
18 u16 val;
19
20 val = ctrl_inw(PA_CPLD_IMSK);
21 val |= 1 << bit;
22 ctrl_outw(val, PA_CPLD_IMSK);
23}
24
25static void
26enable_intreq_irq(unsigned int irq)
27{
28 int bit = irq - OFFCHIP_IRQ_BASE;
29 u16 val;
30
31 val = ctrl_inw(PA_CPLD_IMSK);
32 val &= ~(1 << bit);
33 ctrl_outw(val, PA_CPLD_IMSK);
34}
35
36static void
37mask_and_ack_intreq_irq(unsigned int irq)
38{
39 disable_intreq_irq(irq);
40}
41
42static unsigned int
43startup_intreq_irq(unsigned int irq)
44{
45 enable_intreq_irq(irq);
46 return 0;
47}
48
49static void
50shutdown_intreq_irq(unsigned int irq)
51{
52 disable_intreq_irq(irq);
53}
54
55static void
56end_intreq_irq(unsigned int irq)
57{
58 if (!(irq_desc[irq].status & (IRQ_DISABLED | IRQ_INPROGRESS)))
59 enable_intreq_irq(irq);
60}
61
62static struct hw_interrupt_type intreq_irq_type = {
63 .typename = "FPGA-IRQ",
64 .startup = startup_intreq_irq,
65 .shutdown = shutdown_intreq_irq,
66 .enable = enable_intreq_irq,
67 .disable = disable_intreq_irq,
68 .ack = mask_and_ack_intreq_irq,
69 .end = end_intreq_irq
70};
71
72static void
73make_intreq_irq(unsigned int irq)
74{
75 disable_irq_nosync(irq);
76 irq_desc[irq].handler = &intreq_irq_type;
77 disable_intreq_irq(irq);
78}
79
80int
81shmse_irq_demux(int irq)
82{
83 int bit;
84 volatile u16 val;
85
86 if (irq == IRQ5_IRQ) {
87 /* Read status Register */
88 val = ctrl_inw(PA_CPLD_ST);
89 bit = ffs(val);
90 if (bit != 0)
91 return OFFCHIP_IRQ_BASE + bit - 1;
92 }
93 return irq;
94}
95
96/* IRQ5 is multiplexed between the following sources:
97 * 1. PC Card socket
98 * 2. Extension slot
99 * 3. USB Controller
100 * 4. Serial Controller
101 *
102 * We configure IRQ5 as a cascade IRQ.
103 */
104static struct irqaction irq5 = { no_action, 0, CPU_MASK_NONE, "IRQ5-cascade",
105 NULL, NULL};
106
107/*
108 * Initialize IRQ setting
109 */
110void __init
111init_7343se_IRQ(void)
112{
113 /* Setup Multiplexed interrupts */
114 ctrl_outw(8, PA_CPLD_MODESET); /* Set all CPLD interrupts to active
115 * low.
116 */
117 /* Mask all CPLD controller interrupts */
118 ctrl_outw(0x0fff, PA_CPLD_IMSK);
119
120 /* PC Card interrupts */
121 make_intreq_irq(PC_IRQ0);
122 make_intreq_irq(PC_IRQ1);
123 make_intreq_irq(PC_IRQ2);
124 make_intreq_irq(PC_IRQ3);
125
126 /* Extension Slot Interrupts */
127 make_intreq_irq(EXT_IRQ0);
128 make_intreq_irq(EXT_IRQ1);
129 make_intreq_irq(EXT_IRQ2);
130 make_intreq_irq(EXT_IRQ3);
131
132 /* USB Controller interrupts */
133 make_intreq_irq(USB_IRQ0);
134 make_intreq_irq(USB_IRQ1);
135
136 /* Serial Controller interrupts */
137 make_intreq_irq(UART_IRQ0);
138 make_intreq_irq(UART_IRQ1);
139
140 /* Setup all external interrupts to be active low */
141 ctrl_outw(0xaaaa, INTC_ICR1);
142
143 make_ipr_irq(IRQ5_IRQ, IRQ5_IPR_ADDR+2, IRQ5_IPR_POS, IRQ5_PRIORITY);
144 setup_irq(IRQ5_IRQ, &irq5);
145 /* Set port control to use IRQ5 */
146 *(u16 *)0xA4050108 &= ~0xc;
147
148 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
149 make_ipr_irq(VPU_IRQ, VPU_IPR_ADDR, VPU_IPR_POS, 8);
150
151 ctrl_outb(0x0f, INTC_IMCR5); /* enable SCIF IRQ */
152
153 make_ipr_irq(DMTE0_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
154 make_ipr_irq(DMTE1_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
155 make_ipr_irq(DMTE2_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
156 make_ipr_irq(DMTE3_IRQ, DMA1_IPR_ADDR, DMA1_IPR_POS, DMA1_PRIORITY);
157 make_ipr_irq(DMTE4_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
158 make_ipr_irq(DMTE5_IRQ, DMA2_IPR_ADDR, DMA2_IPR_POS, DMA2_PRIORITY);
159
160 /* I2C block */
161 make_ipr_irq(IIC0_ALI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
162 make_ipr_irq(IIC0_TACKI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
163 IIC0_PRIORITY);
164 make_ipr_irq(IIC0_WAITI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS,
165 IIC0_PRIORITY);
166 make_ipr_irq(IIC0_DTEI_IRQ, IIC0_IPR_ADDR, IIC0_IPR_POS, IIC0_PRIORITY);
167
168 make_ipr_irq(IIC1_ALI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
169 make_ipr_irq(IIC1_TACKI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
170 IIC1_PRIORITY);
171 make_ipr_irq(IIC1_WAITI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS,
172 IIC1_PRIORITY);
173 make_ipr_irq(IIC1_DTEI_IRQ, IIC1_IPR_ADDR, IIC1_IPR_POS, IIC1_PRIORITY);
174
175 /* SIOF */
176 make_ipr_irq(SIOF0_IRQ, SIOF0_IPR_ADDR, SIOF0_IPR_POS, SIOF0_PRIORITY);
177
178 /* SIU */
179 make_ipr_irq(SIU_IRQ, SIU_IPR_ADDR, SIU_IPR_POS, SIU_PRIORITY);
180
181 /* VIO interrupt */
182 make_ipr_irq(CEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
183 make_ipr_irq(BEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
184 make_ipr_irq(VEU_IRQ, VIO_IPR_ADDR, VIO_IPR_POS, VIO_PRIORITY);
185
186 /*MFI interrupt*/
187
188 make_ipr_irq(MFI_IRQ, MFI_IPR_ADDR, MFI_IPR_POS, MFI_PRIORITY);
189
190 /* LCD controller */
191 make_ipr_irq(LCDC_IRQ, LCDC_IPR_ADDR, LCDC_IPR_POS, LCDC_PRIORITY);
192 ctrl_outw(0x2000, PA_MRSHPC + 0x0c); /* mrshpc irq enable */
193}
diff --git a/arch/sh/boards/se/7343/led.c b/arch/sh/boards/se/7343/led.c
new file mode 100644
index 000000000000..6a439cf83e46
--- /dev/null
+++ b/arch/sh/boards/se/7343/led.c
@@ -0,0 +1,46 @@
1/*
2 * arch/sh/boards/se/7343/led.c
3 *
4 */
5
6#include <linux/config.h>
7#include <linux/sched.h>
8#include <asm/mach/se7343.h>
9
10/* Cycle the LED's in the clasic Knightrider/Sun pattern */
11void heartbeat_7343se(void)
12{
13 static unsigned int cnt = 0, period = 0;
14 volatile unsigned short *p = (volatile unsigned short *) PA_LED;
15 static unsigned bit = 0, up = 1;
16
17 cnt += 1;
18 if (cnt < period) {
19 return;
20 }
21
22 cnt = 0;
23
24 /* Go through the points (roughly!):
25 * f(0)=10, f(1)=16, f(2)=20, f(5)=35,f(inf)->110
26 */
27 period = 110 - ((300 << FSHIFT) / ((avenrun[0] / 5) + (3 << FSHIFT)));
28
29 if (up) {
30 if (bit == 7) {
31 bit--;
32 up = 0;
33 } else {
34 bit++;
35 }
36 } else {
37 if (bit == 0) {
38 bit++;
39 up = 1;
40 } else {
41 bit--;
42 }
43 }
44 *p = 1 << (bit + LED_SHIFT);
45
46}
diff --git a/arch/sh/boards/se/7343/setup.c b/arch/sh/boards/se/7343/setup.c
new file mode 100644
index 000000000000..787322291fb3
--- /dev/null
+++ b/arch/sh/boards/se/7343/setup.c
@@ -0,0 +1,84 @@
1#include <linux/config.h>
2#include <linux/init.h>
3#include <linux/platform_device.h>
4#include <asm/machvec.h>
5#include <asm/mach/se7343.h>
6#include <asm/irq.h>
7
8void heartbeat_7343se(void);
9void init_7343se_IRQ(void);
10
11static struct resource smc91x_resources[] = {
12 [0] = {
13 .start = 0x10000000,
14 .end = 0x1000000F,
15 .flags = IORESOURCE_MEM,
16 },
17 [1] = {
18 /*
19 * shared with other devices via externel
20 * interrupt controller in FPGA...
21 */
22 .start = EXT_IRQ2,
23 .end = EXT_IRQ2,
24 .flags = IORESOURCE_IRQ,
25 },
26};
27
28static struct platform_device smc91x_device = {
29 .name = "smc91x",
30 .id = 0,
31 .num_resources = ARRAY_SIZE(smc91x_resources),
32 .resource = smc91x_resources,
33};
34
35static struct platform_device *smc91x_platform_devices[] __initdata = {
36 &smc91x_device,
37};
38
39static int __init sh7343se_devices_setup(void)
40{
41 return platform_add_devices(smc91x_platform_devices,
42 ARRAY_SIZE(smc91x_platform_devices));
43}
44
45static void __init sh7343se_setup(char **cmdline_p)
46{
47 device_initcall(sh7343se_devices_setup);
48}
49
50/*
51 * The Machine Vector
52 */
53struct sh_machine_vector mv_7343se __initmv = {
54 .mv_name = "SolutionEngine 7343",
55 .mv_setup = sh7343se_setup,
56 .mv_nr_irqs = 108,
57 .mv_inb = sh7343se_inb,
58 .mv_inw = sh7343se_inw,
59 .mv_inl = sh7343se_inl,
60 .mv_outb = sh7343se_outb,
61 .mv_outw = sh7343se_outw,
62 .mv_outl = sh7343se_outl,
63
64 .mv_inb_p = sh7343se_inb_p,
65 .mv_inw_p = sh7343se_inw,
66 .mv_inl_p = sh7343se_inl,
67 .mv_outb_p = sh7343se_outb_p,
68 .mv_outw_p = sh7343se_outw,
69 .mv_outl_p = sh7343se_outl,
70
71 .mv_insb = sh7343se_insb,
72 .mv_insw = sh7343se_insw,
73 .mv_insl = sh7343se_insl,
74 .mv_outsb = sh7343se_outsb,
75 .mv_outsw = sh7343se_outsw,
76 .mv_outsl = sh7343se_outsl,
77
78 .mv_init_irq = init_7343se_IRQ,
79 .mv_irq_demux = shmse_irq_demux,
80#ifdef CONFIG_HEARTBEAT
81 .mv_heartbeat = heartbeat_7343se,
82#endif
83};
84ALIAS_MV(7343se)
diff --git a/arch/sh/boards/se/770x/Makefile b/arch/sh/boards/se/770x/Makefile
index be89a73cc418..9a5035f80ec0 100644
--- a/arch/sh/boards/se/770x/Makefile
+++ b/arch/sh/boards/se/770x/Makefile
@@ -2,5 +2,5 @@
2# Makefile for the 770x SolutionEngine specific parts of the kernel 2# Makefile for the 770x SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
6 6obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/770x/io.c b/arch/sh/boards/se/770x/io.c
index 9a39ee963143..9941949331ab 100644
--- a/arch/sh/boards/se/770x/io.c
+++ b/arch/sh/boards/se/770x/io.c
@@ -1,4 +1,4 @@
1/* $Id: io.c,v 1.5 2004/02/22 23:08:43 kkojima Exp $ 1/* $Id: io.c,v 1.7 2006/02/05 21:55:29 lethal Exp $
2 * 2 *
3 * linux/arch/sh/kernel/io_se.c 3 * linux/arch/sh/kernel/io_se.c
4 * 4 *
@@ -11,7 +11,7 @@
11#include <linux/kernel.h> 11#include <linux/kernel.h>
12#include <linux/types.h> 12#include <linux/types.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se/se.h> 14#include <asm/se.h>
15 15
16/* SH pcmcia io window base, start and end. */ 16/* SH pcmcia io window base, start and end. */
17int sh_pcic_io_wbase = 0xb8400000; 17int sh_pcic_io_wbase = 0xb8400000;
@@ -20,11 +20,6 @@ int sh_pcic_io_stop;
20int sh_pcic_io_type; 20int sh_pcic_io_type;
21int sh_pcic_io_dummy; 21int sh_pcic_io_dummy;
22 22
23static inline void delay(void)
24{
25 ctrl_inw(0xa0000000);
26}
27
28/* MS7750 requires special versions of in*, out* routines, since 23/* MS7750 requires special versions of in*, out* routines, since
29 PC-like io ports are located at upper half byte of 16-bit word which 24 PC-like io ports are located at upper half byte of 16-bit word which
30 can be accessed only with 16-bit wide. */ 25 can be accessed only with 16-bit wide. */
@@ -52,10 +47,6 @@ shifted_port(unsigned long port)
52 return 1; 47 return 1;
53} 48}
54 49
55#define maybebadio(name,port) \
56 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
57 #name, (port), (__u32) __builtin_return_address(0))
58
59unsigned char se_inb(unsigned long port) 50unsigned char se_inb(unsigned long port)
60{ 51{
61 if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop) 52 if (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)
@@ -76,7 +67,7 @@ unsigned char se_inb_p(unsigned long port)
76 v = (*port2adr(port) >> 8); 67 v = (*port2adr(port) >> 8);
77 else 68 else
78 v = (*port2adr(port))&0xff; 69 v = (*port2adr(port))&0xff;
79 delay(); 70 ctrl_delay();
80 return v; 71 return v;
81} 72}
82 73
@@ -86,13 +77,13 @@ unsigned short se_inw(unsigned long port)
86 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 77 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
87 return *port2adr(port); 78 return *port2adr(port);
88 else 79 else
89 maybebadio(inw, port); 80 maybebadio(port);
90 return 0; 81 return 0;
91} 82}
92 83
93unsigned int se_inl(unsigned long port) 84unsigned int se_inl(unsigned long port)
94{ 85{
95 maybebadio(inl, port); 86 maybebadio(port);
96 return 0; 87 return 0;
97} 88}
98 89
@@ -114,7 +105,7 @@ void se_outb_p(unsigned char value, unsigned long port)
114 *(port2adr(port)) = value << 8; 105 *(port2adr(port)) = value << 8;
115 else 106 else
116 *(port2adr(port)) = value; 107 *(port2adr(port)) = value;
117 delay(); 108 ctrl_delay();
118} 109}
119 110
120void se_outw(unsigned short value, unsigned long port) 111void se_outw(unsigned short value, unsigned long port)
@@ -123,12 +114,12 @@ void se_outw(unsigned short value, unsigned long port)
123 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop)) 114 (sh_pcic_io_start <= port && port <= sh_pcic_io_stop))
124 *port2adr(port) = value; 115 *port2adr(port) = value;
125 else 116 else
126 maybebadio(outw, port); 117 maybebadio(port);
127} 118}
128 119
129void se_outl(unsigned int value, unsigned long port) 120void se_outl(unsigned int value, unsigned long port)
130{ 121{
131 maybebadio(outl, port); 122 maybebadio(port);
132} 123}
133 124
134void se_insb(unsigned long port, void *addr, unsigned long count) 125void se_insb(unsigned long port, void *addr, unsigned long count)
@@ -159,7 +150,7 @@ void se_insw(unsigned long port, void *addr, unsigned long count)
159 150
160void se_insl(unsigned long port, void *addr, unsigned long count) 151void se_insl(unsigned long port, void *addr, unsigned long count)
161{ 152{
162 maybebadio(insl, port); 153 maybebadio(port);
163} 154}
164 155
165void se_outsb(unsigned long port, const void *addr, unsigned long count) 156void se_outsb(unsigned long port, const void *addr, unsigned long count)
@@ -190,37 +181,5 @@ void se_outsw(unsigned long port, const void *addr, unsigned long count)
190 181
191void se_outsl(unsigned long port, const void *addr, unsigned long count) 182void se_outsl(unsigned long port, const void *addr, unsigned long count)
192{ 183{
193 maybebadio(outsw, port); 184 maybebadio(port);
194}
195
196/* Map ISA bus address to the real address. Only for PCMCIA. */
197
198/* ISA page descriptor. */
199static __u32 sh_isa_memmap[256];
200
201static int
202sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
203{
204 int idx;
205
206 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
207 return -1;
208
209 idx = start >> 12;
210 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
211#if 0
212 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
213 start, length, offset, idx, sh_isa_memmap[idx]);
214#endif
215 return 0;
216}
217
218unsigned long
219se_isa_port2addr(unsigned long offset)
220{
221 int idx;
222
223 idx = (offset >> 12) & 0xff;
224 offset &= 0xfff;
225 return sh_isa_memmap[idx] + offset;
226} 185}
diff --git a/arch/sh/boards/se/770x/irq.c b/arch/sh/boards/se/770x/irq.c
index 3e558716ce10..cff6700bbafd 100644
--- a/arch/sh/boards/se/770x/irq.c
+++ b/arch/sh/boards/se/770x/irq.c
@@ -11,7 +11,7 @@
11#include <linux/irq.h> 11#include <linux/irq.h>
12#include <asm/irq.h> 12#include <asm/irq.h>
13#include <asm/io.h> 13#include <asm/io.h>
14#include <asm/se/se.h> 14#include <asm/se.h>
15 15
16/* 16/*
17 * Initialize IRQ setting 17 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/770x/led.c b/arch/sh/boards/se/770x/led.c
index 3cddbda025fc..daf7b1ee786a 100644
--- a/arch/sh/boards/se/770x/led.c
+++ b/arch/sh/boards/se/770x/led.c
@@ -9,22 +9,8 @@
9 * This file contains Solution Engine specific LED code. 9 * This file contains Solution Engine specific LED code.
10 */ 10 */
11 11
12#include <asm/se/se.h>
13
14static void mach_led(int position, int value)
15{
16 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
17
18 if (value) {
19 *p |= (1<<8);
20 } else {
21 *p &= ~(1<<8);
22 }
23}
24
25#ifdef CONFIG_HEARTBEAT
26
27#include <linux/sched.h> 12#include <linux/sched.h>
13#include <asm/se.h>
28 14
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 15/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void heartbeat_se(void) 16void heartbeat_se(void)
@@ -64,4 +50,3 @@ void heartbeat_se(void)
64 *p = 1<<(bit+8); 50 *p = 1<<(bit+8);
65 51
66} 52}
67#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/770x/mach.c b/arch/sh/boards/se/770x/mach.c
deleted file mode 100644
index 6ec07bd3dcf1..000000000000
--- a/arch/sh/boards/se/770x/mach.c
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_se.c
3 *
4 * Copyright (C) 2000 Stuart Menefy (stuart.menefy@st.com)
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Hitachi SolutionEngine
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/se/io.h>
19
20void heartbeat_se(void);
21void setup_se(void);
22void init_se_IRQ(void);
23
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_se __initmv = {
29#if defined(CONFIG_CPU_SH4)
30 .mv_nr_irqs = 48,
31#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
32 .mv_nr_irqs = 32,
33#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
34 .mv_nr_irqs = 61,
35#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
36 .mv_nr_irqs = 86,
37#endif
38
39 .mv_inb = se_inb,
40 .mv_inw = se_inw,
41 .mv_inl = se_inl,
42 .mv_outb = se_outb,
43 .mv_outw = se_outw,
44 .mv_outl = se_outl,
45
46 .mv_inb_p = se_inb_p,
47 .mv_inw_p = se_inw,
48 .mv_inl_p = se_inl,
49 .mv_outb_p = se_outb_p,
50 .mv_outw_p = se_outw,
51 .mv_outl_p = se_outl,
52
53 .mv_insb = se_insb,
54 .mv_insw = se_insw,
55 .mv_insl = se_insl,
56 .mv_outsb = se_outsb,
57 .mv_outsw = se_outsw,
58 .mv_outsl = se_outsl,
59
60 .mv_isa_port2addr = se_isa_port2addr,
61
62 .mv_init_irq = init_se_IRQ,
63#ifdef CONFIG_HEARTBEAT
64 .mv_heartbeat = heartbeat_se,
65#endif
66};
67ALIAS_MV(se)
diff --git a/arch/sh/boards/se/770x/setup.c b/arch/sh/boards/se/770x/setup.c
index 7d1a071727cc..f3f82b7c8217 100644
--- a/arch/sh/boards/se/770x/setup.c
+++ b/arch/sh/boards/se/770x/setup.c
@@ -7,15 +7,17 @@
7 * Hitachi SolutionEngine Support. 7 * Hitachi SolutionEngine Support.
8 * 8 *
9 */ 9 */
10
11#include <linux/init.h> 10#include <linux/init.h>
12#include <linux/irq.h> 11#include <linux/irq.h>
13
14#include <linux/hdreg.h> 12#include <linux/hdreg.h>
15#include <linux/ide.h> 13#include <linux/ide.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include <asm/se/se.h> 15#include <asm/se.h>
18#include <asm/se/smc37c93x.h> 16#include <asm/smc37c93x.h>
17#include <asm/machvec.h>
18
19void heartbeat_se(void);
20void init_se_IRQ(void);
19 21
20/* 22/*
21 * Configure the Super I/O chip 23 * Configure the Super I/O chip
@@ -26,7 +28,8 @@ static void __init smsc_config(int index, int data)
26 outb_p(data, DATA_PORT); 28 outb_p(data, DATA_PORT);
27} 29}
28 30
29static void __init init_smsc(void) 31/* XXX: Another candidate for a more generic cchip machine vector */
32static void __init smsc_setup(char **cmdline_p)
30{ 33{
31 outb_p(CONFIG_ENTER, CONFIG_PORT); 34 outb_p(CONFIG_ENTER, CONFIG_PORT);
32 outb_p(CONFIG_ENTER, CONFIG_PORT); 35 outb_p(CONFIG_ENTER, CONFIG_PORT);
@@ -69,16 +72,46 @@ static void __init init_smsc(void)
69 outb_p(CONFIG_EXIT, CONFIG_PORT); 72 outb_p(CONFIG_EXIT, CONFIG_PORT);
70} 73}
71 74
72const char *get_system_type(void)
73{
74 return "SolutionEngine";
75}
76
77/* 75/*
78 * Initialize the board 76 * The Machine Vector
79 */ 77 */
80void __init platform_setup(void) 78struct sh_machine_vector mv_se __initmv = {
81{ 79 .mv_name = "SolutionEngine",
82 init_smsc(); 80 .mv_setup = smsc_setup,
83 /* XXX: RTC setting comes here */ 81#if defined(CONFIG_CPU_SH4)
84} 82 .mv_nr_irqs = 48,
83#elif defined(CONFIG_CPU_SUBTYPE_SH7708)
84 .mv_nr_irqs = 32,
85#elif defined(CONFIG_CPU_SUBTYPE_SH7709)
86 .mv_nr_irqs = 61,
87#elif defined(CONFIG_CPU_SUBTYPE_SH7705)
88 .mv_nr_irqs = 86,
89#endif
90
91 .mv_inb = se_inb,
92 .mv_inw = se_inw,
93 .mv_inl = se_inl,
94 .mv_outb = se_outb,
95 .mv_outw = se_outw,
96 .mv_outl = se_outl,
97
98 .mv_inb_p = se_inb_p,
99 .mv_inw_p = se_inw,
100 .mv_inl_p = se_inl,
101 .mv_outb_p = se_outb_p,
102 .mv_outw_p = se_outw,
103 .mv_outl_p = se_outl,
104
105 .mv_insb = se_insb,
106 .mv_insw = se_insw,
107 .mv_insl = se_insl,
108 .mv_outsb = se_outsb,
109 .mv_outsw = se_outsw,
110 .mv_outsl = se_outsl,
111
112 .mv_init_irq = init_se_IRQ,
113#ifdef CONFIG_HEARTBEAT
114 .mv_heartbeat = heartbeat_se,
115#endif
116};
117ALIAS_MV(se)
diff --git a/arch/sh/boards/se/7751/Makefile b/arch/sh/boards/se/7751/Makefile
index ce7ca247f84d..188900c48321 100644
--- a/arch/sh/boards/se/7751/Makefile
+++ b/arch/sh/boards/se/7751/Makefile
@@ -2,7 +2,7 @@
2# Makefile for the 7751 SolutionEngine specific parts of the kernel 2# Makefile for the 7751 SolutionEngine specific parts of the kernel
3# 3#
4 4
5obj-y := mach.o setup.o io.o irq.o led.o 5obj-y := setup.o io.o irq.o
6 6
7obj-$(CONFIG_PCI) += pci.o 7obj-$(CONFIG_PCI) += pci.o
8 8obj-$(CONFIG_HEARTBEAT) += led.o
diff --git a/arch/sh/boards/se/7751/io.c b/arch/sh/boards/se/7751/io.c
index 99041b269261..e8d846cec89d 100644
--- a/arch/sh/boards/se/7751/io.c
+++ b/arch/sh/boards/se/7751/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 2 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
5 * Based largely on io_se.c. 3 * Based largely on io_se.c.
6 * 4 *
@@ -10,96 +8,21 @@
10 * placeholder code from io_se.c left in with the 8 * placeholder code from io_se.c left in with the
11 * expectation of later SuperIO and PCMCIA access. 9 * expectation of later SuperIO and PCMCIA access.
12 */ 10 */
13
14#include <linux/kernel.h> 11#include <linux/kernel.h>
15#include <linux/types.h> 12#include <linux/types.h>
13#include <linux/pci.h>
16#include <asm/io.h> 14#include <asm/io.h>
17#include <asm/se7751/se7751.h> 15#include <asm/se7751.h>
18#include <asm/addrspace.h> 16#include <asm/addrspace.h>
19 17
20#include <linux/pci.h> 18static inline volatile u16 *port2adr(unsigned int port)
21#include "../../../drivers/pci/pci-sh7751.h"
22
23#if 0
24/******************************************************************
25 * Variables from io_se.c, related to PCMCIA (not PCI); we're not
26 * compiling them in, and have removed references from functions
27 * which follow. [Many checked for IO ports in the range bounded
28 * by sh_pcic_io_start/stop, and used sh_pcic_io_wbase as offset.
29 * As start/stop are uninitialized, only port 0x0 would match?]
30 * When used, remember to adjust names to avoid clash with io_se?
31 *****************************************************************/
32/* SH pcmcia io window base, start and end. */
33int sh_pcic_io_wbase = 0xb8400000;
34int sh_pcic_io_start;
35int sh_pcic_io_stop;
36int sh_pcic_io_type;
37int sh_pcic_io_dummy;
38/*************************************************************/
39#endif
40
41/*
42 * The 7751 Solution Engine uses the built-in PCI controller (PCIC)
43 * of the 7751 processor, and has a SuperIO accessible via the PCI.
44 * The board also includes a PCMCIA controller on its memory bus,
45 * like the other Solution Engine boards.
46 */
47
48#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
49#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
50#define PCI_IO_AREA SH7751_PCI_IO_BASE
51#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
52
53#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
54
55#define maybebadio(name,port) \
56 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
57 #name, (port), (__u32) __builtin_return_address(0))
58
59static inline void delay(void)
60{
61 ctrl_inw(0xa0000000);
62}
63
64static inline volatile __u16 *
65port2adr(unsigned int port)
66{ 19{
67 if (port >= 0x2000) 20 if (port >= 0x2000)
68 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000)); 21 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
69#if 0 22 maybebadio((unsigned long)port);
70 else
71 return (volatile __u16 *) (PA_SUPERIO + (port << 1));
72#endif
73 maybebadio(name,(unsigned long)port);
74 return (volatile __u16*)port; 23 return (volatile __u16*)port;
75} 24}
76 25
77#if 0
78/* The 7751 Solution Engine seems to have everything hooked */
79/* up pretty normally (nothing on high-bytes only...) so this */
80/* shouldn't be needed */
81static inline int
82shifted_port(unsigned long port)
83{
84 /* For IDE registers, value is not shifted */
85 if ((0x1f0 <= port && port < 0x1f8) || port == 0x3f6)
86 return 0;
87 else
88 return 1;
89}
90#endif
91
92/* In case someone configures the kernel w/o PCI support: in that */
93/* scenario, don't ever bother to check for PCI-window addresses */
94
95/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
96#if defined(CONFIG_PCI)
97#define CHECK_SH7751_PCIIO(port) \
98 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
99#else
100#define CHECK_SH7751_PCIIO(port) (0)
101#endif
102
103/* 26/*
104 * General outline: remap really low stuff [eventually] to SuperIO, 27 * General outline: remap really low stuff [eventually] to SuperIO,
105 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 28 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -111,10 +34,10 @@ unsigned char sh7751se_inb(unsigned long port)
111{ 34{
112 if (PXSEG(port)) 35 if (PXSEG(port))
113 return *(volatile unsigned char *)port; 36 return *(volatile unsigned char *)port;
114 else if (CHECK_SH7751_PCIIO(port)) 37 else if (is_pci_ioaddr(port))
115 return *(volatile unsigned char *)PCI_IOMAP(port); 38 return *(volatile unsigned char *)pci_ioaddr(port);
116 else 39 else
117 return (*port2adr(port))&0xff; 40 return (*port2adr(port)) & 0xff;
118} 41}
119 42
120unsigned char sh7751se_inb_p(unsigned long port) 43unsigned char sh7751se_inb_p(unsigned long port)
@@ -123,11 +46,11 @@ unsigned char sh7751se_inb_p(unsigned long port)
123 46
124 if (PXSEG(port)) 47 if (PXSEG(port))
125 v = *(volatile unsigned char *)port; 48 v = *(volatile unsigned char *)port;
126 else if (CHECK_SH7751_PCIIO(port)) 49 else if (is_pci_ioaddr(port))
127 v = *(volatile unsigned char *)PCI_IOMAP(port); 50 v = *(volatile unsigned char *)pci_ioaddr(port);
128 else 51 else
129 v = (*port2adr(port))&0xff; 52 v = (*port2adr(port)) & 0xff;
130 delay(); 53 ctrl_delay();
131 return v; 54 return v;
132} 55}
133 56
@@ -135,12 +58,12 @@ unsigned short sh7751se_inw(unsigned long port)
135{ 58{
136 if (PXSEG(port)) 59 if (PXSEG(port))
137 return *(volatile unsigned short *)port; 60 return *(volatile unsigned short *)port;
138 else if (CHECK_SH7751_PCIIO(port)) 61 else if (is_pci_ioaddr(port))
139 return *(volatile unsigned short *)PCI_IOMAP(port); 62 return *(volatile unsigned short *)pci_ioaddr(port);
140 else if (port >= 0x2000) 63 else if (port >= 0x2000)
141 return *port2adr(port); 64 return *port2adr(port);
142 else 65 else
143 maybebadio(inw, port); 66 maybebadio(port);
144 return 0; 67 return 0;
145} 68}
146 69
@@ -148,12 +71,12 @@ unsigned int sh7751se_inl(unsigned long port)
148{ 71{
149 if (PXSEG(port)) 72 if (PXSEG(port))
150 return *(volatile unsigned long *)port; 73 return *(volatile unsigned long *)port;
151 else if (CHECK_SH7751_PCIIO(port)) 74 else if (is_pci_ioaddr(port))
152 return *(volatile unsigned int *)PCI_IOMAP(port); 75 return *(volatile unsigned int *)pci_ioaddr(port);
153 else if (port >= 0x2000) 76 else if (port >= 0x2000)
154 return *port2adr(port); 77 return *port2adr(port);
155 else 78 else
156 maybebadio(inl, port); 79 maybebadio(port);
157 return 0; 80 return 0;
158} 81}
159 82
@@ -162,8 +85,8 @@ void sh7751se_outb(unsigned char value, unsigned long port)
162 85
163 if (PXSEG(port)) 86 if (PXSEG(port))
164 *(volatile unsigned char *)port = value; 87 *(volatile unsigned char *)port = value;
165 else if (CHECK_SH7751_PCIIO(port)) 88 else if (is_pci_ioaddr(port))
166 *((unsigned char*)PCI_IOMAP(port)) = value; 89 *((unsigned char*)pci_ioaddr(port)) = value;
167 else 90 else
168 *(port2adr(port)) = value; 91 *(port2adr(port)) = value;
169} 92}
@@ -172,73 +95,41 @@ void sh7751se_outb_p(unsigned char value, unsigned long port)
172{ 95{
173 if (PXSEG(port)) 96 if (PXSEG(port))
174 *(volatile unsigned char *)port = value; 97 *(volatile unsigned char *)port = value;
175 else if (CHECK_SH7751_PCIIO(port)) 98 else if (is_pci_ioaddr(port))
176 *((unsigned char*)PCI_IOMAP(port)) = value; 99 *((unsigned char*)pci_ioaddr(port)) = value;
177 else 100 else
178 *(port2adr(port)) = value; 101 *(port2adr(port)) = value;
179 delay(); 102 ctrl_delay();
180} 103}
181 104
182void sh7751se_outw(unsigned short value, unsigned long port) 105void sh7751se_outw(unsigned short value, unsigned long port)
183{ 106{
184 if (PXSEG(port)) 107 if (PXSEG(port))
185 *(volatile unsigned short *)port = value; 108 *(volatile unsigned short *)port = value;
186 else if (CHECK_SH7751_PCIIO(port)) 109 else if (is_pci_ioaddr(port))
187 *((unsigned short *)PCI_IOMAP(port)) = value; 110 *((unsigned short *)pci_ioaddr(port)) = value;
188 else if (port >= 0x2000) 111 else if (port >= 0x2000)
189 *port2adr(port) = value; 112 *port2adr(port) = value;
190 else 113 else
191 maybebadio(outw, port); 114 maybebadio(port);
192} 115}
193 116
194void sh7751se_outl(unsigned int value, unsigned long port) 117void sh7751se_outl(unsigned int value, unsigned long port)
195{ 118{
196 if (PXSEG(port)) 119 if (PXSEG(port))
197 *(volatile unsigned long *)port = value; 120 *(volatile unsigned long *)port = value;
198 else if (CHECK_SH7751_PCIIO(port)) 121 else if (is_pci_ioaddr(port))
199 *((unsigned long*)PCI_IOMAP(port)) = value; 122 *((unsigned long*)pci_ioaddr(port)) = value;
200 else 123 else
201 maybebadio(outl, port); 124 maybebadio(port);
202} 125}
203 126
204void sh7751se_insl(unsigned long port, void *addr, unsigned long count) 127void sh7751se_insl(unsigned long port, void *addr, unsigned long count)
205{ 128{
206 maybebadio(insl, port); 129 maybebadio(port);
207} 130}
208 131
209void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count) 132void sh7751se_outsl(unsigned long port, const void *addr, unsigned long count)
210{ 133{
211 maybebadio(outsw, port); 134 maybebadio(port);
212}
213
214/* Map ISA bus address to the real address. Only for PCMCIA. */
215
216/* ISA page descriptor. */
217static __u32 sh_isa_memmap[256];
218
219#if 0
220static int
221sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
222{
223 int idx;
224
225 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
226 return -1;
227
228 idx = start >> 12;
229 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
230 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
231 start, length, offset, idx, sh_isa_memmap[idx]);
232 return 0;
233}
234#endif
235
236unsigned long
237sh7751se_isa_port2addr(unsigned long offset)
238{
239 int idx;
240
241 idx = (offset >> 12) & 0xff;
242 offset &= 0xfff;
243 return sh_isa_memmap[idx] + offset;
244} 135}
diff --git a/arch/sh/boards/se/7751/irq.c b/arch/sh/boards/se/7751/irq.c
index bf6c023615df..c607b0a48479 100644
--- a/arch/sh/boards/se/7751/irq.c
+++ b/arch/sh/boards/se/7751/irq.c
@@ -12,7 +12,7 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14#include <asm/irq.h> 14#include <asm/irq.h>
15#include <asm/se7751/se7751.h> 15#include <asm/se7751.h>
16 16
17/* 17/*
18 * Initialize IRQ setting 18 * Initialize IRQ setting
diff --git a/arch/sh/boards/se/7751/led.c b/arch/sh/boards/se/7751/led.c
index a878726d3c7c..ff0355dea81b 100644
--- a/arch/sh/boards/se/7751/led.c
+++ b/arch/sh/boards/se/7751/led.c
@@ -8,23 +8,8 @@
8 * 8 *
9 * This file contains Solution Engine specific LED code. 9 * This file contains Solution Engine specific LED code.
10 */ 10 */
11
12#include <asm/se7751/se7751.h>
13
14static void mach_led(int position, int value)
15{
16 volatile unsigned short* p = (volatile unsigned short*)PA_LED;
17
18 if (value) {
19 *p |= (1<<8);
20 } else {
21 *p &= ~(1<<8);
22 }
23}
24
25#ifdef CONFIG_HEARTBEAT
26
27#include <linux/sched.h> 11#include <linux/sched.h>
12#include <asm/se7751.h>
28 13
29/* Cycle the LED's in the clasic Knightrider/Sun pattern */ 14/* Cycle the LED's in the clasic Knightrider/Sun pattern */
30void heartbeat_7751se(void) 15void heartbeat_7751se(void)
@@ -64,4 +49,3 @@ void heartbeat_7751se(void)
64 *p = 1<<(bit+8); 49 *p = 1<<(bit+8);
65 50
66} 51}
67#endif /* CONFIG_HEARTBEAT */
diff --git a/arch/sh/boards/se/7751/mach.c b/arch/sh/boards/se/7751/mach.c
deleted file mode 100644
index 62d8d3e62590..000000000000
--- a/arch/sh/boards/se/7751/mach.c
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * linux/arch/sh/kernel/mach_7751se.c
3 *
4 * Minor tweak of mach_se.c file to reference 7751se-specific items.
5 *
6 * May be copied or modified under the terms of the GNU General Public
7 * License. See linux/COPYING for more information.
8 *
9 * Machine vector for the Hitachi 7751 SolutionEngine
10 */
11
12#include <linux/init.h>
13
14#include <asm/machvec.h>
15#include <asm/rtc.h>
16#include <asm/machvec_init.h>
17
18#include <asm/se7751/io.h>
19
20void heartbeat_7751se(void);
21void init_7751se_IRQ(void);
22
23/*
24 * The Machine Vector
25 */
26
27struct sh_machine_vector mv_7751se __initmv = {
28 .mv_nr_irqs = 72,
29
30 .mv_inb = sh7751se_inb,
31 .mv_inw = sh7751se_inw,
32 .mv_inl = sh7751se_inl,
33 .mv_outb = sh7751se_outb,
34 .mv_outw = sh7751se_outw,
35 .mv_outl = sh7751se_outl,
36
37 .mv_inb_p = sh7751se_inb_p,
38 .mv_inw_p = sh7751se_inw,
39 .mv_inl_p = sh7751se_inl,
40 .mv_outb_p = sh7751se_outb_p,
41 .mv_outw_p = sh7751se_outw,
42 .mv_outl_p = sh7751se_outl,
43
44 .mv_insl = sh7751se_insl,
45 .mv_outsl = sh7751se_outsl,
46
47 .mv_isa_port2addr = sh7751se_isa_port2addr,
48
49 .mv_init_irq = init_7751se_IRQ,
50#ifdef CONFIG_HEARTBEAT
51 .mv_heartbeat = heartbeat_7751se,
52#endif
53};
54ALIAS_MV(7751se)
diff --git a/arch/sh/boards/se/7751/setup.c b/arch/sh/boards/se/7751/setup.c
index 48dc5aee67d4..73e826310ba8 100644
--- a/arch/sh/boards/se/7751/setup.c
+++ b/arch/sh/boards/se/7751/setup.c
@@ -1,4 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/setup_7751se.c 2 * linux/arch/sh/kernel/setup_7751se.c
3 * 3 *
4 * Copyright (C) 2000 Kazumoto Kojima 4 * Copyright (C) 2000 Kazumoto Kojima
@@ -11,78 +11,15 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <linux/hdreg.h>
16#include <linux/ide.h> 14#include <linux/ide.h>
17#include <asm/io.h> 15#include <asm/io.h>
18#include <asm/se7751/se7751.h> 16#include <asm/se7751.h>
19 17
20#ifdef CONFIG_SH_KGDB 18void heartbeat_7751se(void);
21#include <asm/kgdb.h> 19void init_7751se_IRQ(void);
22#endif
23
24/*
25 * Configure the Super I/O chip
26 */
27#if 0
28/* Leftover code from regular Solution Engine, for reference. */
29/* The SH7751 Solution Engine has a different SuperIO. */
30static void __init smsc_config(int index, int data)
31{
32 outb_p(index, INDEX_PORT);
33 outb_p(data, DATA_PORT);
34}
35
36static void __init init_smsc(void)
37{
38 outb_p(CONFIG_ENTER, CONFIG_PORT);
39 outb_p(CONFIG_ENTER, CONFIG_PORT);
40
41 /* FDC */
42 smsc_config(CURRENT_LDN_INDEX, LDN_FDC);
43 smsc_config(ACTIVATE_INDEX, 0x01);
44 smsc_config(IRQ_SELECT_INDEX, 6); /* IRQ6 */
45
46 /* IDE1 */
47 smsc_config(CURRENT_LDN_INDEX, LDN_IDE1);
48 smsc_config(ACTIVATE_INDEX, 0x01);
49 smsc_config(IRQ_SELECT_INDEX, 14); /* IRQ14 */
50
51 /* AUXIO (GPIO): to use IDE1 */
52 smsc_config(CURRENT_LDN_INDEX, LDN_AUXIO);
53 smsc_config(GPIO46_INDEX, 0x00); /* nIOROP */
54 smsc_config(GPIO47_INDEX, 0x00); /* nIOWOP */
55
56 /* COM1 */
57 smsc_config(CURRENT_LDN_INDEX, LDN_COM1);
58 smsc_config(ACTIVATE_INDEX, 0x01);
59 smsc_config(IO_BASE_HI_INDEX, 0x03);
60 smsc_config(IO_BASE_LO_INDEX, 0xf8);
61 smsc_config(IRQ_SELECT_INDEX, 4); /* IRQ4 */
62
63 /* COM2 */
64 smsc_config(CURRENT_LDN_INDEX, LDN_COM2);
65 smsc_config(ACTIVATE_INDEX, 0x01);
66 smsc_config(IO_BASE_HI_INDEX, 0x02);
67 smsc_config(IO_BASE_LO_INDEX, 0xf8);
68 smsc_config(IRQ_SELECT_INDEX, 3); /* IRQ3 */
69
70 /* RTC */
71 smsc_config(CURRENT_LDN_INDEX, LDN_RTC);
72 smsc_config(ACTIVATE_INDEX, 0x01);
73 smsc_config(IRQ_SELECT_INDEX, 8); /* IRQ8 */
74
75 /* XXX: PARPORT, KBD, and MOUSE will come here... */
76 outb_p(CONFIG_EXIT, CONFIG_PORT);
77}
78#endif
79
80const char *get_system_type(void)
81{
82 return "7751 SolutionEngine";
83}
84 20
85#ifdef CONFIG_SH_KGDB 21#ifdef CONFIG_SH_KGDB
22#include <asm/kgdb.h>
86static int kgdb_uart_setup(void); 23static int kgdb_uart_setup(void);
87static struct kgdb_sermap kgdb_uart_sermap = 24static struct kgdb_sermap kgdb_uart_sermap =
88{ "ttyS", 0, kgdb_uart_setup, NULL }; 25{ "ttyS", 0, kgdb_uart_setup, NULL };
@@ -91,7 +28,7 @@ static struct kgdb_sermap kgdb_uart_sermap =
91/* 28/*
92 * Initialize the board 29 * Initialize the board
93 */ 30 */
94void __init platform_setup(void) 31static void __init sh7751se_setup(char **cmdline_p)
95{ 32{
96 /* Call init_smsc() replacement to set up SuperIO. */ 33 /* Call init_smsc() replacement to set up SuperIO. */
97 /* XXX: RTC setting comes here */ 34 /* XXX: RTC setting comes here */
@@ -225,3 +162,37 @@ static int kgdb_uart_setup(void)
225 return 0; 162 return 0;
226} 163}
227#endif /* CONFIG_SH_KGDB */ 164#endif /* CONFIG_SH_KGDB */
165
166
167/*
168 * The Machine Vector
169 */
170
171struct sh_machine_vector mv_7751se __initmv = {
172 .mv_name = "7751 SolutionEngine",
173 .mv_setup = sh7751se_setup,
174 .mv_nr_irqs = 72,
175
176 .mv_inb = sh7751se_inb,
177 .mv_inw = sh7751se_inw,
178 .mv_inl = sh7751se_inl,
179 .mv_outb = sh7751se_outb,
180 .mv_outw = sh7751se_outw,
181 .mv_outl = sh7751se_outl,
182
183 .mv_inb_p = sh7751se_inb_p,
184 .mv_inw_p = sh7751se_inw,
185 .mv_inl_p = sh7751se_inl,
186 .mv_outb_p = sh7751se_outb_p,
187 .mv_outw_p = sh7751se_outw,
188 .mv_outl_p = sh7751se_outl,
189
190 .mv_insl = sh7751se_insl,
191 .mv_outsl = sh7751se_outsl,
192
193 .mv_init_irq = init_7751se_IRQ,
194#ifdef CONFIG_HEARTBEAT
195 .mv_heartbeat = heartbeat_7751se,
196#endif
197};
198ALIAS_MV(7751se)
diff --git a/arch/sh/boards/sh03/rtc.c b/arch/sh/boards/sh03/rtc.c
index d609863cfe53..0a9266bb51c5 100644
--- a/arch/sh/boards/sh03/rtc.c
+++ b/arch/sh/boards/sh03/rtc.c
@@ -10,9 +10,10 @@
10#include <linux/sched.h> 10#include <linux/sched.h>
11#include <linux/time.h> 11#include <linux/time.h>
12#include <linux/bcd.h> 12#include <linux/bcd.h>
13#include <asm/io.h>
14#include <linux/rtc.h> 13#include <linux/rtc.h>
15#include <linux/spinlock.h> 14#include <linux/spinlock.h>
15#include <asm/io.h>
16#include <asm/rtc.h>
16 17
17#define RTC_BASE 0xb0000000 18#define RTC_BASE 0xb0000000
18#define RTC_SEC1 (RTC_BASE + 0) 19#define RTC_SEC1 (RTC_BASE + 0)
@@ -34,8 +35,6 @@
34#define RTC_BUSY 1 35#define RTC_BUSY 1
35#define RTC_STOP 2 36#define RTC_STOP 2
36 37
37extern void (*rtc_get_time)(struct timespec *);
38extern int (*rtc_set_time)(const time_t);
39extern spinlock_t rtc_lock; 38extern spinlock_t rtc_lock;
40 39
41unsigned long get_cmos_time(void) 40unsigned long get_cmos_time(void)
@@ -128,6 +127,6 @@ int sh03_rtc_settimeofday(const time_t secs)
128 127
129void sh03_time_init(void) 128void sh03_time_init(void)
130{ 129{
131 rtc_get_time = sh03_rtc_gettimeofday; 130 rtc_sh_get_time = sh03_rtc_gettimeofday;
132 rtc_set_time = sh03_rtc_settimeofday; 131 rtc_sh_set_time = sh03_rtc_settimeofday;
133} 132}
diff --git a/arch/sh/boards/sh03/setup.c b/arch/sh/boards/sh03/setup.c
index 60290f8f289c..6c310587ddfe 100644
--- a/arch/sh/boards/sh03/setup.c
+++ b/arch/sh/boards/sh03/setup.c
@@ -7,22 +7,13 @@
7 7
8#include <linux/init.h> 8#include <linux/init.h>
9#include <linux/irq.h> 9#include <linux/irq.h>
10#include <linux/hdreg.h>
11#include <linux/ide.h>
12#include <asm/io.h> 10#include <asm/io.h>
11#include <asm/rtc.h>
13#include <asm/sh03/io.h> 12#include <asm/sh03/io.h>
14#include <asm/sh03/sh03.h> 13#include <asm/sh03/sh03.h>
15#include <asm/addrspace.h> 14#include <asm/addrspace.h>
16#include "../../drivers/pci/pci-sh7751.h"
17 15
18extern void (*board_time_init)(void); 16static void __init init_sh03_IRQ(void)
19
20const char *get_system_type(void)
21{
22 return "Interface CTP/PCI-SH03)";
23}
24
25void init_sh03_IRQ(void)
26{ 17{
27 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR); 18 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
28 19
@@ -34,38 +25,34 @@ void init_sh03_IRQ(void)
34 25
35extern void *cf_io_base; 26extern void *cf_io_base;
36 27
37unsigned long sh03_isa_port2addr(unsigned long port) 28static void __iomem *sh03_ioport_map(unsigned long port, unsigned int size)
38{ 29{
39 if (PXSEG(port)) 30 if (PXSEG(port))
40 return port; 31 return (void __iomem *)port;
41 /* CompactFlash (IDE) */ 32 /* CompactFlash (IDE) */
42 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6)) { 33 if (((port >= 0x1f0) && (port <= 0x1f7)) || (port == 0x3f6))
43 return (unsigned long)cf_io_base + port; 34 return (void __iomem *)((unsigned long)cf_io_base + port);
44 } 35
45 return port + SH7751_PCI_IO_BASE; 36 return (void __iomem *)(port + PCI_IO_BASE);
46} 37}
47 38
48/* 39/* arch/sh/boards/sh03/rtc.c */
49 * The Machine Vector 40void sh03_time_init(void);
50 */ 41
42static void __init sh03_setup(char **cmdline_p)
43{
44 board_time_init = sh03_time_init;
45}
51 46
52struct sh_machine_vector mv_sh03 __initmv = { 47struct sh_machine_vector mv_sh03 __initmv = {
48 .mv_name = "Interface (CTP/PCI-SH03)",
49 .mv_setup = sh03_setup,
53 .mv_nr_irqs = 48, 50 .mv_nr_irqs = 48,
54 .mv_isa_port2addr = sh03_isa_port2addr, 51 .mv_ioport_map = sh03_ioport_map,
55 .mv_init_irq = init_sh03_IRQ, 52 .mv_init_irq = init_sh03_IRQ,
56 53
57#ifdef CONFIG_HEARTBEAT 54#ifdef CONFIG_HEARTBEAT
58 .mv_heartbeat = heartbeat_sh03, 55 .mv_heartbeat = heartbeat_sh03,
59#endif 56#endif
60}; 57};
61
62ALIAS_MV(sh03) 58ALIAS_MV(sh03)
63
64/* arch/sh/boards/sh03/rtc.c */
65void sh03_time_init(void);
66
67int __init platform_setup(void)
68{
69 board_time_init = sh03_time_init;
70 return 0;
71}
diff --git a/arch/sh/boards/sh2000/Makefile b/arch/sh/boards/sh2000/Makefile
deleted file mode 100644
index 05d390c3599c..000000000000
--- a/arch/sh/boards/sh2000/Makefile
+++ /dev/null
@@ -1,6 +0,0 @@
1#
2# Makefile for the SH2000 specific parts of the kernel
3#
4
5obj-y := setup.o
6
diff --git a/arch/sh/boards/sh2000/setup.c b/arch/sh/boards/sh2000/setup.c
deleted file mode 100644
index 2fe6a11765e9..000000000000
--- a/arch/sh/boards/sh2000/setup.c
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * linux/arch/sh/kernel/setup_sh2000.c
3 *
4 * Copyright (C) 2001 SUGIOKA Tochinobu
5 *
6 * SH-2000 Support.
7 *
8 */
9
10#include <linux/init.h>
11#include <linux/irq.h>
12
13#include <asm/io.h>
14#include <asm/machvec.h>
15#include <asm/mach/sh2000.h>
16
17#define CF_CIS_BASE 0xb4200000
18
19#define PORT_PECR 0xa4000108
20#define PORT_PHCR 0xa400010E
21#define PORT_ICR1 0xa4000010
22#define PORT_IRR0 0xa4000004
23
24#define IDE_OFFSET 0xb6200000
25#define NIC_OFFSET 0xb6000000
26#define EXTBUS_OFFSET 0xba000000
27
28
29const char *get_system_type(void)
30{
31 return "sh2000";
32}
33
34static unsigned long sh2000_isa_port2addr(unsigned long offset)
35{
36 if((offset & ~7) == 0x1f0 || offset == 0x3f6)
37 return IDE_OFFSET + offset;
38 else if((offset & ~0x1f) == 0x300)
39 return NIC_OFFSET + offset;
40 return EXTBUS_OFFSET + offset;
41}
42
43/*
44 * The Machine Vector
45 */
46struct sh_machine_vector mv_sh2000 __initmv = {
47 .mv_nr_irqs = 80,
48 .mv_isa_port2addr = sh2000_isa_port2addr,
49};
50ALIAS_MV(sh2000)
51
52/*
53 * Initialize the board
54 */
55int __init platform_setup(void)
56{
57 /* XXX: RTC setting comes here */
58
59 /* These should be done by BIOS/IPL ... */
60 /* Enable nCE2A, nCE2B output */
61 ctrl_outw(ctrl_inw(PORT_PECR) & ~0xf00, PORT_PECR);
62 /* Enable the Compact Flash card, and set the level interrupt */
63 ctrl_outw(0x0042, CF_CIS_BASE+0x0200);
64 /* Enable interrupt */
65 ctrl_outw(ctrl_inw(PORT_PHCR) & ~0x03f3, PORT_PHCR);
66 ctrl_outw(1, PORT_ICR1);
67 ctrl_outw(ctrl_inw(PORT_IRR0) & ~0xff3f, PORT_IRR0);
68 printk(KERN_INFO "SH-2000 Setup...done\n");
69 return 0;
70}
diff --git a/arch/sh/boards/shmin/Makefile b/arch/sh/boards/shmin/Makefile
new file mode 100644
index 000000000000..3190cc72430e
--- /dev/null
+++ b/arch/sh/boards/shmin/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the SHMIN board.
3#
4
5obj-y := setup.o
diff --git a/arch/sh/boards/shmin/setup.c b/arch/sh/boards/shmin/setup.c
new file mode 100644
index 000000000000..2f0c19706cf9
--- /dev/null
+++ b/arch/sh/boards/shmin/setup.c
@@ -0,0 +1,41 @@
1/*
2 * arch/sh/boards/shmin/setup.c
3 *
4 * Copyright (C) 2006 Takashi YOSHII
5 *
6 * SHMIN Support.
7 */
8#include <linux/init.h>
9#include <asm/machvec.h>
10#include <asm/shmin/shmin.h>
11#include <asm/clock.h>
12#include <asm/irq.h>
13#include <asm/io.h>
14
15#define PFC_PHCR 0xa400010e
16
17static void __init init_shmin_irq(void)
18{
19 ctrl_outw(0x2a00, PFC_PHCR); // IRQ0-3=IRQ
20 ctrl_outw(0x0aaa, INTC_ICR1); // IRQ0-3=IRQ-mode,Low-active.
21}
22
23static void __iomem *shmin_ioport_map(unsigned long port, unsigned int size)
24{
25 static int dummy;
26
27 if ((port & ~0x1f) == SHMIN_NE_BASE)
28 return (void __iomem *)(SHMIN_IO_BASE + port);
29
30 dummy = 0;
31
32 return &dummy;
33
34}
35
36struct sh_machine_vector mv_shmin __initmv = {
37 .mv_name = "SHMIN",
38 .mv_init_irq = init_shmin_irq,
39 .mv_ioport_map = shmin_ioport_map,
40};
41ALIAS_MV(shmin)
diff --git a/arch/sh/boards/snapgear/io.c b/arch/sh/boards/snapgear/io.c
index e2eb78fc381d..0f4824264557 100644
--- a/arch/sh/boards/snapgear/io.c
+++ b/arch/sh/boards/snapgear/io.c
@@ -1,6 +1,4 @@
1/* 1/*
2 * linux/arch/sh/kernel/io_7751se.c
3 *
4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 2 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
5 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel 3 * Copyright (C) 2001 Ian da Silva, Jeremy Siegel
6 * Based largely on io_se.c. 4 * Based largely on io_se.c.
@@ -11,67 +9,22 @@
11 * placeholder code from io_se.c left in with the 9 * placeholder code from io_se.c left in with the
12 * expectation of later SuperIO and PCMCIA access. 10 * expectation of later SuperIO and PCMCIA access.
13 */ 11 */
14
15#include <linux/kernel.h> 12#include <linux/kernel.h>
16#include <linux/types.h> 13#include <linux/types.h>
17#include <linux/pci.h> 14#include <linux/pci.h>
18#include <asm/io.h> 15#include <asm/io.h>
19#include <asm/addrspace.h> 16#include <asm/addrspace.h>
20 17
21#include <asm/pci.h>
22#include "../../drivers/pci/pci-sh7751.h"
23
24#ifdef CONFIG_SH_SECUREEDGE5410 18#ifdef CONFIG_SH_SECUREEDGE5410
25unsigned short secureedge5410_ioport; 19unsigned short secureedge5410_ioport;
26#endif 20#endif
27 21
28/*
29 * The SnapGear uses the built-in PCI controller (PCIC)
30 * of the 7751 processor
31 */
32
33#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
34#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
35#define PCI_IO_AREA SH7751_PCI_IO_BASE
36#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
37
38
39#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
40
41
42#define maybebadio(name,port) \
43 printk("bad PC-like io %s for port 0x%lx at 0x%08x\n", \
44 #name, (port), (__u32) __builtin_return_address(0))
45
46
47static inline void delay(void)
48{
49 ctrl_inw(0xa0000000);
50}
51
52
53static inline volatile __u16 *port2adr(unsigned int port) 22static inline volatile __u16 *port2adr(unsigned int port)
54{ 23{
55#if 0 24 maybebadio((unsigned long)port);
56 if (port >= 0x2000)
57 return (volatile __u16 *) (PA_MRSHPC + (port - 0x2000));
58#endif
59 maybebadio(name,(unsigned long)port);
60 return (volatile __u16*)port; 25 return (volatile __u16*)port;
61} 26}
62 27
63
64/* In case someone configures the kernel w/o PCI support: in that */
65/* scenario, don't ever bother to check for PCI-window addresses */
66
67/* NOTE: WINDOW CHECK MAY BE A BIT OFF, HIGH PCIBIOS_MIN_IO WRAPS? */
68#if defined(CONFIG_PCI)
69#define CHECK_SH7751_PCIIO(port) \
70 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
71#else
72#define CHECK_SH7751_PCIIO(port) (0)
73#endif
74
75/* 28/*
76 * General outline: remap really low stuff [eventually] to SuperIO, 29 * General outline: remap really low stuff [eventually] to SuperIO,
77 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO) 30 * stuff in PCI IO space (at or above window at pci.h:PCIBIOS_MIN_IO)
@@ -79,148 +32,106 @@ static inline volatile __u16 *port2adr(unsigned int port)
79 * should be way beyond the window, and is used w/o translation for 32 * should be way beyond the window, and is used w/o translation for
80 * compatibility. 33 * compatibility.
81 */ 34 */
82
83unsigned char snapgear_inb(unsigned long port) 35unsigned char snapgear_inb(unsigned long port)
84{ 36{
85 if (PXSEG(port)) 37 if (PXSEG(port))
86 return *(volatile unsigned char *)port; 38 return *(volatile unsigned char *)port;
87 else if (CHECK_SH7751_PCIIO(port)) 39 else if (is_pci_ioaddr(port))
88 return *(volatile unsigned char *)PCI_IOMAP(port); 40 return *(volatile unsigned char *)pci_ioaddr(port);
89 else 41 else
90 return (*port2adr(port))&0xff; 42 return (*port2adr(port)) & 0xff;
91} 43}
92 44
93
94unsigned char snapgear_inb_p(unsigned long port) 45unsigned char snapgear_inb_p(unsigned long port)
95{ 46{
96 unsigned char v; 47 unsigned char v;
97 48
98 if (PXSEG(port)) 49 if (PXSEG(port))
99 v = *(volatile unsigned char *)port; 50 v = *(volatile unsigned char *)port;
100 else if (CHECK_SH7751_PCIIO(port)) 51 else if (is_pci_ioaddr(port))
101 v = *(volatile unsigned char *)PCI_IOMAP(port); 52 v = *(volatile unsigned char *)pci_ioaddr(port);
102 else 53 else
103 v = (*port2adr(port))&0xff; 54 v = (*port2adr(port))&0xff;
104 delay(); 55 ctrl_delay();
105 return v; 56 return v;
106} 57}
107 58
108
109unsigned short snapgear_inw(unsigned long port) 59unsigned short snapgear_inw(unsigned long port)
110{ 60{
111 if (PXSEG(port)) 61 if (PXSEG(port))
112 return *(volatile unsigned short *)port; 62 return *(volatile unsigned short *)port;
113 else if (CHECK_SH7751_PCIIO(port)) 63 else if (is_pci_ioaddr(port))
114 return *(volatile unsigned short *)PCI_IOMAP(port); 64 return *(volatile unsigned short *)pci_ioaddr(port);
115 else if (port >= 0x2000) 65 else if (port >= 0x2000)
116 return *port2adr(port); 66 return *port2adr(port);
117 else 67 else
118 maybebadio(inw, port); 68 maybebadio(port);
119 return 0; 69 return 0;
120} 70}
121 71
122
123unsigned int snapgear_inl(unsigned long port) 72unsigned int snapgear_inl(unsigned long port)
124{ 73{
125 if (PXSEG(port)) 74 if (PXSEG(port))
126 return *(volatile unsigned long *)port; 75 return *(volatile unsigned long *)port;
127 else if (CHECK_SH7751_PCIIO(port)) 76 else if (is_pci_ioaddr(port))
128 return *(volatile unsigned int *)PCI_IOMAP(port); 77 return *(volatile unsigned int *)pci_ioaddr(port);
129 else if (port >= 0x2000) 78 else if (port >= 0x2000)
130 return *port2adr(port); 79 return *port2adr(port);
131 else 80 else
132 maybebadio(inl, port); 81 maybebadio(port);
133 return 0; 82 return 0;
134} 83}
135 84
136
137void snapgear_outb(unsigned char value, unsigned long port) 85void snapgear_outb(unsigned char value, unsigned long port)
138{ 86{
139 87
140 if (PXSEG(port)) 88 if (PXSEG(port))
141 *(volatile unsigned char *)port = value; 89 *(volatile unsigned char *)port = value;
142 else if (CHECK_SH7751_PCIIO(port)) 90 else if (is_pci_ioaddr(port))
143 *((unsigned char*)PCI_IOMAP(port)) = value; 91 *((unsigned char*)pci_ioaddr(port)) = value;
144 else 92 else
145 *(port2adr(port)) = value; 93 *(port2adr(port)) = value;
146} 94}
147 95
148
149void snapgear_outb_p(unsigned char value, unsigned long port) 96void snapgear_outb_p(unsigned char value, unsigned long port)
150{ 97{
151 if (PXSEG(port)) 98 if (PXSEG(port))
152 *(volatile unsigned char *)port = value; 99 *(volatile unsigned char *)port = value;
153 else if (CHECK_SH7751_PCIIO(port)) 100 else if (is_pci_ioaddr(port))
154 *((unsigned char*)PCI_IOMAP(port)) = value; 101 *((unsigned char*)pci_ioaddr(port)) = value;
155 else 102 else
156 *(port2adr(port)) = value; 103 *(port2adr(port)) = value;
157 delay(); 104 ctrl_delay();
158} 105}
159 106
160
161void snapgear_outw(unsigned short value, unsigned long port) 107void snapgear_outw(unsigned short value, unsigned long port)
162{ 108{
163 if (PXSEG(port)) 109 if (PXSEG(port))
164 *(volatile unsigned short *)port = value; 110 *(volatile unsigned short *)port = value;
165 else if (CHECK_SH7751_PCIIO(port)) 111 else if (is_pci_ioaddr(port))
166 *((unsigned short *)PCI_IOMAP(port)) = value; 112 *((unsigned short *)pci_ioaddr(port)) = value;
167 else if (port >= 0x2000) 113 else if (port >= 0x2000)
168 *port2adr(port) = value; 114 *port2adr(port) = value;
169 else 115 else
170 maybebadio(outw, port); 116 maybebadio(port);
171} 117}
172 118
173
174void snapgear_outl(unsigned int value, unsigned long port) 119void snapgear_outl(unsigned int value, unsigned long port)
175{ 120{
176 if (PXSEG(port)) 121 if (PXSEG(port))
177 *(volatile unsigned long *)port = value; 122 *(volatile unsigned long *)port = value;
178 else if (CHECK_SH7751_PCIIO(port)) 123 else if (is_pci_ioaddr(port))
179 *((unsigned long*)PCI_IOMAP(port)) = value; 124 *((unsigned long*)pci_ioaddr(port)) = value;
180 else 125 else
181 maybebadio(outl, port); 126 maybebadio(port);
182} 127}
183 128
184void snapgear_insl(unsigned long port, void *addr, unsigned long count) 129void snapgear_insl(unsigned long port, void *addr, unsigned long count)
185{ 130{
186 maybebadio(insl, port); 131 maybebadio(port);
187} 132}
188 133
189void snapgear_outsl(unsigned long port, const void *addr, unsigned long count) 134void snapgear_outsl(unsigned long port, const void *addr, unsigned long count)
190{ 135{
191 maybebadio(outsw, port); 136 maybebadio(port);
192}
193
194/* Map ISA bus address to the real address. Only for PCMCIA. */
195
196
197/* ISA page descriptor. */
198static __u32 sh_isa_memmap[256];
199
200
201#if 0
202static int sh_isa_mmap(__u32 start, __u32 length, __u32 offset)
203{
204 int idx;
205
206 if (start >= 0x100000 || (start & 0xfff) || (length != 0x1000))
207 return -1;
208
209 idx = start >> 12;
210 sh_isa_memmap[idx] = 0xb8000000 + (offset &~ 0xfff);
211#if 0
212 printk("sh_isa_mmap: start %x len %x offset %x (idx %x paddr %x)\n",
213 start, length, offset, idx, sh_isa_memmap[idx]);
214#endif
215 return 0;
216}
217#endif
218
219unsigned long snapgear_isa_port2addr(unsigned long offset)
220{
221 int idx;
222
223 idx = (offset >> 12) & 0xff;
224 offset &= 0xfff;
225 return sh_isa_memmap[idx] + offset;
226} 137}
diff --git a/arch/sh/boards/snapgear/rtc.c b/arch/sh/boards/snapgear/rtc.c
index b71e009da35c..1659fdd6695a 100644
--- a/arch/sh/boards/snapgear/rtc.c
+++ b/arch/sh/boards/snapgear/rtc.c
@@ -17,14 +17,9 @@
17#include <linux/time.h> 17#include <linux/time.h>
18#include <linux/rtc.h> 18#include <linux/rtc.h>
19#include <linux/mc146818rtc.h> 19#include <linux/mc146818rtc.h>
20
21#include <asm/io.h> 20#include <asm/io.h>
22#include <asm/rtc.h>
23#include <asm/mc146818rtc.h>
24
25/****************************************************************************/
26 21
27static int use_ds1302 = 0; 22static int use_ds1302;
28 23
29/****************************************************************************/ 24/****************************************************************************/
30/* 25/*
@@ -82,10 +77,6 @@ static unsigned int ds1302_readbyte(unsigned int addr)
82 unsigned int val; 77 unsigned int val;
83 unsigned long flags; 78 unsigned long flags;
84 79
85#if 0
86 printk("SnapGear RTC: ds1302_readbyte(addr=%x)\n", addr);
87#endif
88
89 local_irq_save(flags); 80 local_irq_save(flags);
90 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 81 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
91 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 82 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -104,10 +95,6 @@ static void ds1302_writebyte(unsigned int addr, unsigned int val)
104{ 95{
105 unsigned long flags; 96 unsigned long flags;
106 97
107#if 0
108 printk("SnapGear RTC: ds1302_writebyte(addr=%x)\n", addr);
109#endif
110
111 local_irq_save(flags); 98 local_irq_save(flags);
112 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK); 99 set_dirp(get_dirp() | RTC_RESET | RTC_IODATA | RTC_SCLK);
113 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK)); 100 set_dp(get_dp() & ~(RTC_RESET | RTC_IODATA | RTC_SCLK));
@@ -168,11 +155,8 @@ void __init secureedge5410_rtc_init(void)
168 } 155 }
169 156
170 if (use_ds1302) { 157 if (use_ds1302) {
171 rtc_get_time = snapgear_rtc_gettimeofday; 158 rtc_sh_get_time = snapgear_rtc_gettimeofday;
172 rtc_set_time = snapgear_rtc_settimeofday; 159 rtc_sh_set_time = snapgear_rtc_settimeofday;
173 } else {
174 rtc_get_time = sh_rtc_gettimeofday;
175 rtc_set_time = sh_rtc_settimeofday;
176 } 160 }
177 161
178 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal"); 162 printk("SnapGear RTC: using %s rtc.\n", use_ds1302 ? "ds1302" : "internal");
@@ -187,10 +171,8 @@ void snapgear_rtc_gettimeofday(struct timespec *ts)
187{ 171{
188 unsigned int sec, min, hr, day, mon, yr; 172 unsigned int sec, min, hr, day, mon, yr;
189 173
190 if (!use_ds1302) { 174 if (!use_ds1302)
191 sh_rtc_gettimeofday(ts);
192 return; 175 return;
193 }
194 176
195 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC)); 177 sec = bcd2int(ds1302_readbyte(RTC_ADDR_SEC));
196 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN)); 178 min = bcd2int(ds1302_readbyte(RTC_ADDR_MIN));
@@ -231,7 +213,7 @@ int snapgear_rtc_settimeofday(const time_t secs)
231 unsigned long nowtime; 213 unsigned long nowtime;
232 214
233 if (!use_ds1302) 215 if (!use_ds1302)
234 return sh_rtc_settimeofday(secs); 216 return 0;
235 217
236/* 218/*
237 * This is called direct from the kernel timer handling code. 219 * This is called direct from the kernel timer handling code.
@@ -240,10 +222,6 @@ int snapgear_rtc_settimeofday(const time_t secs)
240 222
241 nowtime = secs; 223 nowtime = secs;
242 224
243#if 1
244 printk("SnapGear RTC: snapgear_rtc_settimeofday(nowtime=%ld)\n", nowtime);
245#endif
246
247 /* STOP RTC */ 225 /* STOP RTC */
248 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80); 226 ds1302_writebyte(RTC_ADDR_SEC, ds1302_readbyte(RTC_ADDR_SEC) | 0x80);
249 227
@@ -329,5 +307,3 @@ void secureedge5410_cmos_write(unsigned char val, int addr)
329 default: break; 307 default: break;
330 } 308 }
331} 309}
332
333/****************************************************************************/
diff --git a/arch/sh/boards/snapgear/setup.c b/arch/sh/boards/snapgear/setup.c
index f1f7c70c9402..f5e98c56b530 100644
--- a/arch/sh/boards/snapgear/setup.c
+++ b/arch/sh/boards/snapgear/setup.c
@@ -1,5 +1,4 @@
1/****************************************************************************/ 1/*
2/*
3 * linux/arch/sh/boards/snapgear/setup.c 2 * linux/arch/sh/boards/snapgear/setup.c
4 * 3 *
5 * Copyright (C) 2002 David McCullough <davidm@snapgear.com> 4 * Copyright (C) 2002 David McCullough <davidm@snapgear.com>
@@ -12,8 +11,6 @@
12 * Modified for 7751 Solution Engine by 11 * Modified for 7751 Solution Engine by
13 * Ian da Silva and Jeremy Siegel, 2001. 12 * Ian da Silva and Jeremy Siegel, 2001.
14 */ 13 */
15/****************************************************************************/
16
17#include <linux/init.h> 14#include <linux/init.h>
18#include <linux/irq.h> 15#include <linux/irq.h>
19#include <linux/interrupt.h> 16#include <linux/interrupt.h>
@@ -21,14 +18,13 @@
21#include <linux/delay.h> 18#include <linux/delay.h>
22#include <linux/module.h> 19#include <linux/module.h>
23#include <linux/sched.h> 20#include <linux/sched.h>
24
25#include <asm/machvec.h> 21#include <asm/machvec.h>
26#include <asm/mach/io.h> 22#include <asm/snapgear.h>
27#include <asm/irq.h> 23#include <asm/irq.h>
28#include <asm/io.h> 24#include <asm/io.h>
25#include <asm/rtc.h>
29#include <asm/cpu/timer.h> 26#include <asm/cpu/timer.h>
30 27
31extern void (*board_time_init)(void);
32extern void secureedge5410_rtc_init(void); 28extern void secureedge5410_rtc_init(void);
33extern void pcibios_init(void); 29extern void pcibios_init(void);
34 30
@@ -85,101 +81,20 @@ static void __init init_snapgear_IRQ(void)
85 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); 81 make_ipr_irq(IRL3_IRQ, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY);
86} 82}
87 83
88/****************************************************************************/
89/*
90 * Fast poll interrupt simulator.
91 */
92
93/* 84/*
94 * Leave all of the fast timer/fast poll stuff commented out for now, since 85 * Initialize the board
95 * it's not clear whether it actually works or not. Since it wasn't being used
96 * at all in 2.4, we'll assume it's not sane for 2.6 either.. -- PFM
97 */
98#if 0
99#define FAST_POLL 1000
100//#define FAST_POLL_INTR
101
102#define FASTTIMER_IRQ 17
103#define FASTTIMER_IPR_ADDR INTC_IPRA
104#define FASTTIMER_IPR_POS 2
105#define FASTTIMER_PRIORITY 3
106
107#ifdef FAST_POLL_INTR
108#define TMU1_TCR_INIT 0x0020
109#else
110#define TMU1_TCR_INIT 0
111#endif
112#define TMU_TSTR_INIT 1
113#define TMU1_TCR_CALIB 0x0000
114
115
116#ifdef FAST_POLL_INTR
117static void fast_timer_irq(int irq, void *dev_instance, struct pt_regs *regs)
118{
119 unsigned long timer_status;
120 timer_status = ctrl_inw(TMU1_TCR);
121 timer_status &= ~0x100;
122 ctrl_outw(timer_status, TMU1_TCR);
123}
124#endif
125
126/*
127 * return the current ticks on the fast timer
128 */
129
130unsigned long fast_timer_count(void)
131{
132 return(ctrl_inl(TMU1_TCNT));
133}
134
135/*
136 * setup a fast timer for profiling etc etc
137 */ 86 */
138 87static void __init snapgear_setup(char **cmdline_p)
139static void setup_fast_timer()
140{
141 unsigned long interval;
142
143#ifdef FAST_POLL_INTR
144 interval = (current_cpu_data.module_clock/4 + FAST_POLL/2) / FAST_POLL;
145
146 make_ipr_irq(FASTTIMER_IRQ, FASTTIMER_IPR_ADDR, FASTTIMER_IPR_POS,
147 FASTTIMER_PRIORITY);
148
149 printk("SnapGear: %dHz fast timer on IRQ %d\n",FAST_POLL,FASTTIMER_IRQ);
150
151 if (request_irq(FASTTIMER_IRQ, fast_timer_irq, 0, "SnapGear fast timer",
152 NULL) != 0)
153 printk("%s(%d): request_irq() failed?\n", __FILE__, __LINE__);
154#else
155 printk("SnapGear: fast timer running\n",FAST_POLL,FASTTIMER_IRQ);
156 interval = 0xffffffff;
157#endif
158
159 ctrl_outb(ctrl_inb(TMU_TSTR) & ~0x2, TMU_TSTR); /* disable timer 1 */
160 ctrl_outw(TMU1_TCR_INIT, TMU1_TCR);
161 ctrl_outl(interval, TMU1_TCOR);
162 ctrl_outl(interval, TMU1_TCNT);
163 ctrl_outb(ctrl_inb(TMU_TSTR) | 0x2, TMU_TSTR); /* enable timer 1 */
164
165 printk("Timer count 1 = 0x%x\n", fast_timer_count());
166 udelay(1000);
167 printk("Timer count 2 = 0x%x\n", fast_timer_count());
168}
169#endif
170
171/****************************************************************************/
172
173const char *get_system_type(void)
174{ 88{
175 return "SnapGear SecureEdge5410"; 89 board_time_init = secureedge5410_rtc_init;
176} 90}
177 91
178/* 92/*
179 * The Machine Vector 93 * The Machine Vector
180 */ 94 */
181
182struct sh_machine_vector mv_snapgear __initmv = { 95struct sh_machine_vector mv_snapgear __initmv = {
96 .mv_name = "SnapGear SecureEdge5410",
97 .mv_setup = snapgear_setup,
183 .mv_nr_irqs = 72, 98 .mv_nr_irqs = 72,
184 99
185 .mv_inb = snapgear_inb, 100 .mv_inb = snapgear_inb,
@@ -196,20 +111,6 @@ struct sh_machine_vector mv_snapgear __initmv = {
196 .mv_outw_p = snapgear_outw, 111 .mv_outw_p = snapgear_outw,
197 .mv_outl_p = snapgear_outl, 112 .mv_outl_p = snapgear_outl,
198 113
199 .mv_isa_port2addr = snapgear_isa_port2addr,
200
201 .mv_init_irq = init_snapgear_IRQ, 114 .mv_init_irq = init_snapgear_IRQ,
202}; 115};
203ALIAS_MV(snapgear) 116ALIAS_MV(snapgear)
204
205/*
206 * Initialize the board
207 */
208
209int __init platform_setup(void)
210{
211 board_time_init = secureedge5410_rtc_init;
212
213 return 0;
214}
215
diff --git a/arch/sh/boards/superh/microdev/irq.c b/arch/sh/boards/superh/microdev/irq.c
index 236398fbc083..8c64baa30364 100644
--- a/arch/sh/boards/superh/microdev/irq.c
+++ b/arch/sh/boards/superh/microdev/irq.c
@@ -11,14 +11,12 @@
11 11
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/irq.h> 13#include <linux/irq.h>
14
15#include <asm/system.h> 14#include <asm/system.h>
16#include <asm/io.h> 15#include <asm/io.h>
17#include <asm/microdev.h> 16#include <asm/microdev.h>
18 17
19#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */ 18#define NUM_EXTERNAL_IRQS 16 /* IRL0 .. IRL15 */
20 19
21
22static const struct { 20static const struct {
23 unsigned char fpgaIrq; 21 unsigned char fpgaIrq;
24 unsigned char mapped; 22 unsigned char mapped;
@@ -93,53 +91,42 @@ static struct hw_interrupt_type microdev_irq_type = {
93 91
94static void disable_microdev_irq(unsigned int irq) 92static void disable_microdev_irq(unsigned int irq)
95{ 93{
96 unsigned int flags;
97 unsigned int fpgaIrq; 94 unsigned int fpgaIrq;
98 95
99 if (irq >= NUM_EXTERNAL_IRQS) return; 96 if (irq >= NUM_EXTERNAL_IRQS)
100 if (!fpgaIrqTable[irq].mapped) return; 97 return;
98 if (!fpgaIrqTable[irq].mapped)
99 return;
101 100
102 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 101 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
103 102
104 /* disable interrupts */ 103 /* disable interupts on the FPGA INTC register */
105 local_irq_save(flags);
106
107 /* disable interupts on the FPGA INTC register */
108 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG); 104 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTDSB_REG);
109
110 /* restore interrupts */
111 local_irq_restore(flags);
112} 105}
113 106
114static void enable_microdev_irq(unsigned int irq) 107static void enable_microdev_irq(unsigned int irq)
115{ 108{
116 unsigned long priorityReg, priorities, pri; 109 unsigned long priorityReg, priorities, pri;
117 unsigned int flags;
118 unsigned int fpgaIrq; 110 unsigned int fpgaIrq;
119 111
120 112 if (unlikely(irq >= NUM_EXTERNAL_IRQS))
121 if (irq >= NUM_EXTERNAL_IRQS) return; 113 return;
122 if (!fpgaIrqTable[irq].mapped) return; 114 if (unlikely(!fpgaIrqTable[irq].mapped))
115 return;
123 116
124 pri = 15 - irq; 117 pri = 15 - irq;
125 118
126 fpgaIrq = fpgaIrqTable[irq].fpgaIrq; 119 fpgaIrq = fpgaIrqTable[irq].fpgaIrq;
127 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq); 120 priorityReg = MICRODEV_FPGA_INTPRI_REG(fpgaIrq);
128 121
129 /* disable interrupts */ 122 /* set priority for the interrupt */
130 local_irq_save(flags);
131
132 /* set priority for the interrupt */
133 priorities = ctrl_inl(priorityReg); 123 priorities = ctrl_inl(priorityReg);
134 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq); 124 priorities &= ~MICRODEV_FPGA_INTPRI_MASK(fpgaIrq);
135 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri); 125 priorities |= MICRODEV_FPGA_INTPRI_LEVEL(fpgaIrq, pri);
136 ctrl_outl(priorities, priorityReg); 126 ctrl_outl(priorities, priorityReg);
137 127
138 /* enable interupts on the FPGA INTC register */ 128 /* enable interupts on the FPGA INTC register */
139 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG); 129 ctrl_outl(MICRODEV_FPGA_INTC_MASK(fpgaIrq), MICRODEV_FPGA_INTENB_REG);
140
141 /* restore interrupts */
142 local_irq_restore(flags);
143} 130}
144 131
145 /* This functions sets the desired irq handler to be a MicroDev type */ 132 /* This functions sets the desired irq handler to be a MicroDev type */
@@ -158,9 +145,7 @@ static void mask_and_ack_microdev(unsigned int irq)
158static void end_microdev_irq(unsigned int irq) 145static void end_microdev_irq(unsigned int irq)
159{ 146{
160 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 147 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
161 {
162 enable_microdev_irq(irq); 148 enable_microdev_irq(irq);
163 }
164} 149}
165 150
166extern void __init init_microdev_irq(void) 151extern void __init init_microdev_irq(void)
@@ -171,9 +156,7 @@ extern void __init init_microdev_irq(void)
171 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG); 156 ctrl_outl(~0ul, MICRODEV_FPGA_INTDSB_REG);
172 157
173 for (i = 0; i < NUM_EXTERNAL_IRQS; i++) 158 for (i = 0; i < NUM_EXTERNAL_IRQS; i++)
174 {
175 make_microdev_irq(i); 159 make_microdev_irq(i);
176 }
177} 160}
178 161
179extern void microdev_print_fpga_intc_status(void) 162extern void microdev_print_fpga_intc_status(void)
diff --git a/arch/sh/boards/superh/microdev/setup.c b/arch/sh/boards/superh/microdev/setup.c
index 61b402a3f5d7..031c814e6e76 100644
--- a/arch/sh/boards/superh/microdev/setup.c
+++ b/arch/sh/boards/superh/microdev/setup.c
@@ -10,7 +10,6 @@
10 * May be copied or modified under the terms of the GNU General Public 10 * May be copied or modified under the terms of the GNU General Public
11 * License. See linux/COPYING for more information. 11 * License. See linux/COPYING for more information.
12 */ 12 */
13
14#include <linux/init.h> 13#include <linux/init.h>
15#include <linux/platform_device.h> 14#include <linux/platform_device.h>
16#include <linux/ioport.h> 15#include <linux/ioport.h>
@@ -21,41 +20,6 @@
21 20
22extern void microdev_heartbeat(void); 21extern void microdev_heartbeat(void);
23 22
24/*
25 * The Machine Vector
26 */
27
28struct sh_machine_vector mv_sh4202_microdev __initmv = {
29 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
30
31 .mv_inb = microdev_inb,
32 .mv_inw = microdev_inw,
33 .mv_inl = microdev_inl,
34 .mv_outb = microdev_outb,
35 .mv_outw = microdev_outw,
36 .mv_outl = microdev_outl,
37
38 .mv_inb_p = microdev_inb_p,
39 .mv_inw_p = microdev_inw_p,
40 .mv_inl_p = microdev_inl_p,
41 .mv_outb_p = microdev_outb_p,
42 .mv_outw_p = microdev_outw_p,
43 .mv_outl_p = microdev_outl_p,
44
45 .mv_insb = microdev_insb,
46 .mv_insw = microdev_insw,
47 .mv_insl = microdev_insl,
48 .mv_outsb = microdev_outsb,
49 .mv_outsw = microdev_outsw,
50 .mv_outsl = microdev_outsl,
51
52 .mv_init_irq = init_microdev_irq,
53
54#ifdef CONFIG_HEARTBEAT
55 .mv_heartbeat = microdev_heartbeat,
56#endif
57};
58ALIAS_MV(sh4202_microdev)
59 23
60/****************************************************************************/ 24/****************************************************************************/
61 25
@@ -113,11 +77,6 @@ ALIAS_MV(sh4202_microdev)
113 /* assume a Keyboard Controller is present */ 77 /* assume a Keyboard Controller is present */
114int microdev_kbd_controller_present = 1; 78int microdev_kbd_controller_present = 1;
115 79
116const char *get_system_type(void)
117{
118 return "SH4-202 MicroDev";
119}
120
121static struct resource smc91x_resources[] = { 80static struct resource smc91x_resources[] = {
122 [0] = { 81 [0] = {
123 .start = 0x300, 82 .start = 0x300,
@@ -291,25 +250,9 @@ static int __init microdev_devices_setup(void)
291 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices)); 250 return platform_add_devices(microdev_devices, ARRAY_SIZE(microdev_devices));
292} 251}
293 252
294__initcall(microdev_devices_setup); 253/*
295 254 * Setup for the SMSC FDC37C93xAPM
296void __init platform_setup(void) 255 */
297{
298 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
299 const int fpgaRevision = *fpgaRevisionRegister;
300 int * const CacheControlRegister = (int*)CCR;
301
302 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
303 get_system_type(), fpgaRevision, *CacheControlRegister);
304}
305
306
307/****************************************************************************/
308
309
310 /*
311 * Setup for the SMSC FDC37C93xAPM
312 */
313static int __init smsc_superio_setup(void) 256static int __init smsc_superio_setup(void)
314{ 257{
315 258
@@ -412,8 +355,52 @@ static int __init smsc_superio_setup(void)
412 return 0; 355 return 0;
413} 356}
414 357
358static void __init microdev_setup(char **cmdline_p)
359{
360 int * const fpgaRevisionRegister = (int*)(MICRODEV_FPGA_GP_BASE + 0x8ul);
361 const int fpgaRevision = *fpgaRevisionRegister;
362 int * const CacheControlRegister = (int*)CCR;
363
364 device_initcall(microdev_devices_setup);
365 device_initcall(smsc_superio_setup);
415 366
416/* This is grotty, but, because kernel is always referenced on the link line 367 printk("SuperH %s board (FPGA rev: 0x%0x, CCR: 0x%0x)\n",
417 * before any devices, this is safe. 368 get_system_type(), fpgaRevision, *CacheControlRegister);
369}
370
371/*
372 * The Machine Vector
418 */ 373 */
419__initcall(smsc_superio_setup); 374struct sh_machine_vector mv_sh4202_microdev __initmv = {
375 .mv_name = "SH4-202 MicroDev",
376 .mv_setup = microdev_setup,
377 .mv_nr_irqs = 72, /* QQQ need to check this - use the MACRO */
378
379 .mv_inb = microdev_inb,
380 .mv_inw = microdev_inw,
381 .mv_inl = microdev_inl,
382 .mv_outb = microdev_outb,
383 .mv_outw = microdev_outw,
384 .mv_outl = microdev_outl,
385
386 .mv_inb_p = microdev_inb_p,
387 .mv_inw_p = microdev_inw_p,
388 .mv_inl_p = microdev_inl_p,
389 .mv_outb_p = microdev_outb_p,
390 .mv_outw_p = microdev_outw_p,
391 .mv_outl_p = microdev_outl_p,
392
393 .mv_insb = microdev_insb,
394 .mv_insw = microdev_insw,
395 .mv_insl = microdev_insl,
396 .mv_outsb = microdev_outsb,
397 .mv_outsw = microdev_outsw,
398 .mv_outsl = microdev_outsl,
399
400 .mv_init_irq = init_microdev_irq,
401
402#ifdef CONFIG_HEARTBEAT
403 .mv_heartbeat = microdev_heartbeat,
404#endif
405};
406ALIAS_MV(sh4202_microdev)
diff --git a/arch/sh/boards/titan/Makefile b/arch/sh/boards/titan/Makefile
new file mode 100644
index 000000000000..08d753700062
--- /dev/null
+++ b/arch/sh/boards/titan/Makefile
@@ -0,0 +1,5 @@
1#
2# Makefile for the Nimble Microsystems TITAN specific parts of the kernel
3#
4
5obj-y := setup.o io.o
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
new file mode 100644
index 000000000000..4730c1dd697d
--- /dev/null
+++ b/arch/sh/boards/titan/io.c
@@ -0,0 +1,126 @@
1/*
2 * I/O routines for Titan
3 */
4#include <linux/pci.h>
5#include <asm/machvec.h>
6#include <asm/addrspace.h>
7#include <asm/titan.h>
8#include <asm/io.h>
9
10static inline unsigned int port2adr(unsigned int port)
11{
12 maybebadio((unsigned long)port);
13 return port;
14}
15
16u8 titan_inb(unsigned long port)
17{
18 if (PXSEG(port))
19 return ctrl_inb(port);
20 else if (is_pci_ioaddr(port))
21 return ctrl_inb(pci_ioaddr(port));
22 return ctrl_inw(port2adr(port)) & 0xff;
23}
24
25u8 titan_inb_p(unsigned long port)
26{
27 u8 v;
28
29 if (PXSEG(port))
30 v = ctrl_inb(port);
31 else if (is_pci_ioaddr(port))
32 v = ctrl_inb(pci_ioaddr(port));
33 else
34 v = ctrl_inw(port2adr(port)) & 0xff;
35 ctrl_delay();
36 return v;
37}
38
39u16 titan_inw(unsigned long port)
40{
41 if (PXSEG(port))
42 return ctrl_inw(port);
43 else if (is_pci_ioaddr(port))
44 return ctrl_inw(pci_ioaddr(port));
45 else if (port >= 0x2000)
46 return ctrl_inw(port2adr(port));
47 else
48 maybebadio(port);
49 return 0;
50}
51
52u32 titan_inl(unsigned long port)
53{
54 if (PXSEG(port))
55 return ctrl_inl(port);
56 else if (is_pci_ioaddr(port))
57 return ctrl_inl(pci_ioaddr(port));
58 else if (port >= 0x2000)
59 return ctrl_inw(port2adr(port));
60 else
61 maybebadio(port);
62 return 0;
63}
64
65void titan_outb(u8 value, unsigned long port)
66{
67 if (PXSEG(port))
68 ctrl_outb(value, port);
69 else if (is_pci_ioaddr(port))
70 ctrl_outb(value, pci_ioaddr(port));
71 else
72 ctrl_outw(value, port2adr(port));
73}
74
75void titan_outb_p(u8 value, unsigned long port)
76{
77 if (PXSEG(port))
78 ctrl_outb(value, port);
79 else if (is_pci_ioaddr(port))
80 ctrl_outb(value, pci_ioaddr(port));
81 else
82 ctrl_outw(value, port2adr(port));
83 ctrl_delay();
84}
85
86void titan_outw(u16 value, unsigned long port)
87{
88 if (PXSEG(port))
89 ctrl_outw(value, port);
90 else if (is_pci_ioaddr(port))
91 ctrl_outw(value, pci_ioaddr(port));
92 else if (port >= 0x2000)
93 ctrl_outw(value, port2adr(port));
94 else
95 maybebadio(port);
96}
97
98void titan_outl(u32 value, unsigned long port)
99{
100 if (PXSEG(port))
101 ctrl_outl(value, port);
102 else if (is_pci_ioaddr(port))
103 ctrl_outl(value, pci_ioaddr(port));
104 else
105 maybebadio(port);
106}
107
108void titan_insl(unsigned long port, void *dst, unsigned long count)
109{
110 maybebadio(port);
111}
112
113void titan_outsl(unsigned long port, const void *src, unsigned long count)
114{
115 maybebadio(port);
116}
117
118void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
119{
120 if (PXSEG(port) || is_pci_memaddr(port))
121 return (void __iomem *)port;
122 else if (is_pci_ioaddr(port))
123 return (void __iomem *)pci_ioaddr(port);
124
125 return (void __iomem *)port2adr(port);
126}
diff --git a/arch/sh/boards/titan/setup.c b/arch/sh/boards/titan/setup.c
new file mode 100644
index 000000000000..52b66d8b8d2a
--- /dev/null
+++ b/arch/sh/boards/titan/setup.c
@@ -0,0 +1,48 @@
1/*
2 * Setup for Titan
3 */
4
5#include <linux/init.h>
6#include <asm/irq.h>
7#include <asm/titan.h>
8#include <asm/io.h>
9
10extern void __init pcibios_init_platform(void);
11
12static void __init init_titan_irq(void)
13{
14 /* enable individual interrupt mode for externals */
15 ctrl_outw(ctrl_inw(INTC_ICR) | INTC_ICR_IRLM, INTC_ICR);
16
17 make_ipr_irq( TITAN_IRQ_WAN, IRL0_IPR_ADDR, IRL0_IPR_POS, IRL0_PRIORITY); /* PCIRQ0 */
18 make_ipr_irq( TITAN_IRQ_LAN, IRL1_IPR_ADDR, IRL1_IPR_POS, IRL1_PRIORITY); /* PCIRQ1 */
19 make_ipr_irq( TITAN_IRQ_MPCIA, IRL2_IPR_ADDR, IRL2_IPR_POS, IRL2_PRIORITY); /* PCIRQ2 */
20 make_ipr_irq( TITAN_IRQ_USB, IRL3_IPR_ADDR, IRL3_IPR_POS, IRL3_PRIORITY); /* PCIRQ3 */
21}
22
23struct sh_machine_vector mv_titan __initmv = {
24 .mv_name = "Titan",
25
26 .mv_inb = titan_inb,
27 .mv_inw = titan_inw,
28 .mv_inl = titan_inl,
29 .mv_outb = titan_outb,
30 .mv_outw = titan_outw,
31 .mv_outl = titan_outl,
32
33 .mv_inb_p = titan_inb_p,
34 .mv_inw_p = titan_inw,
35 .mv_inl_p = titan_inl,
36 .mv_outb_p = titan_outb_p,
37 .mv_outw_p = titan_outw,
38 .mv_outl_p = titan_outl,
39
40 .mv_insl = titan_insl,
41 .mv_outsl = titan_outsl,
42
43 .mv_ioport_map = titan_ioport_map,
44
45 .mv_init_irq = init_titan_irq,
46 .mv_init_pci = pcibios_init_platform,
47};
48ALIAS_MV(titan)
diff --git a/arch/sh/boards/unknown/setup.c b/arch/sh/boards/unknown/setup.c
index c5e4ed10876b..1c941370a2e3 100644
--- a/arch/sh/boards/unknown/setup.c
+++ b/arch/sh/boards/unknown/setup.c
@@ -14,19 +14,8 @@
14 */ 14 */
15#include <linux/init.h> 15#include <linux/init.h>
16#include <asm/machvec.h> 16#include <asm/machvec.h>
17#include <asm/irq.h>
18 17
19struct sh_machine_vector mv_unknown __initmv = { 18struct sh_machine_vector mv_unknown __initmv = {
20 .mv_nr_irqs = NR_IRQS, 19 .mv_name = "Unknown",
21}; 20};
22ALIAS_MV(unknown) 21ALIAS_MV(unknown)
23
24const char *get_system_type(void)
25{
26 return "Unknown";
27}
28
29void __init platform_setup(void)
30{
31}
32