1 files changed, 156 insertions, 0 deletions
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
new file mode 100644
index 000000000000..d66900c99a11
--- /dev/null
+++ b/arch/sh/boards/titan/io.c
@@ -0,0 +1,156 @@
+/*
+ *      I/O routines for Titan
+ */
+#include <linux/pci.h>
+#include <asm/machvec.h>
+#include <asm/addrspace.h>
+#include <asm/titan.h>
+#include <asm/io.h>
+#include "../../drivers/pci/pci-sh7751.h"
+#define PCIIOBR         (volatile long *)PCI_REG(SH7751_PCIIOBR)
+#define PCIMBR          (volatile long *)PCI_REG(SH7751_PCIMBR)
+#define PCI_IO_AREA     SH7751_PCI_IO_BASE
+#define PCI_MEM_AREA    SH7751_PCI_CONFIG_BASE
+#define PCI_IOMAP(adr)  (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
+#if defined(CONFIG_PCI)
+#define CHECK_SH7751_PCIIO(port) \
+  ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
+#define CHECK_SH7751_PCIMEMIO(port) \
+  ((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
+#else
+#define CHECK_SH7751_PCIIO(port) (0)
+#endif
+static inline void delay(void)
+{
+        ctrl_inw(0xa0000000);
+}
+static inline volatile u16 *port2adr(unsigned int port)
+{
+        maybebadio((unsigned long)port);
+        return (volatile u16*)port;
+}
+u8 titan_inb(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inb(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inb(PCI_IOMAP(port));
+        return ctrl_inw(port2adr(port)) & 0xff;
+}
+u8 titan_inb_p(unsigned long port)
+{
+        u8 v;
+        if (PXSEG(port))
+                v = ctrl_inb(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                v = ctrl_inb(PCI_IOMAP(port));
+        else
+                v = ctrl_inw(port2adr(port)) & 0xff;
+        delay();
+        return v;
+}
+u16 titan_inw(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inw(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inw(PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                return ctrl_inw(port2adr(port));
+        else
+                maybebadio(port);
+        return 0;
+}
+u32 titan_inl(unsigned long port)
+{
+        if (PXSEG(port))
+                return ctrl_inl(port);
+        else if (CHECK_SH7751_PCIIO(port))
+                return ctrl_inl(PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                return ctrl_inw(port2adr(port));
+        else
+                maybebadio(port);
+        return 0;
+}
+void titan_outb(u8 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outb(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outb(value, PCI_IOMAP(port));
+        else
+                ctrl_outw(value, port2adr(port));
+}
+void titan_outb_p(u8 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outb(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outb(value, PCI_IOMAP(port));
+        else
+                ctrl_outw(value, port2adr(port));
+        delay();
+}
+void titan_outw(u16 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outw(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outw(value, PCI_IOMAP(port));
+        else if (port >= 0x2000)
+                ctrl_outw(value, port2adr(port));
+        else
+                maybebadio(port);
+}
+void titan_outl(u32 value, unsigned long port)
+{
+        if (PXSEG(port))
+                ctrl_outl(value, port);
+        else if (CHECK_SH7751_PCIIO(port))
+                ctrl_outl(value, PCI_IOMAP(port));
+        else
+                maybebadio(port);
+}
+void titan_insl(unsigned long port, void *dst, unsigned long count)
+{
+        maybebadio(port);
+}
+void titan_outsl(unsigned long port, const void *src, unsigned long count)
+{
+        maybebadio(port);
+}
+void *titan_ioremap(unsigned long offset, unsigned long size) {
+        if (CHECK_SH7751_PCIIO(offset) || CHECK_SH7751_PCIMEMIO(offset))
+                return (void *)offset;
+}
+void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
+{
+        if (PXSEG(port))
+                return (void __iomem *)port;
+        else if (CHECK_SH7751_PCIIO(port))
+                return (void __iomem *)PCI_IOMAP(port);
+        return (void __iomem *)port2adr(port);
+}
+EXPORT_SYMBOL(titan_ioremap);

diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c new file mode 100644 index 000000000000..d66900c99a11 --- /dev/null +++ b/arch/sh/boards/titan/io.c
@@ -0,0 +1,156 @@
	1	/*
	2	* I/O routines for Titan
	3	*/
	4
	5	#include <linux/pci.h>
	6	#include <asm/machvec.h>
	7	#include <asm/addrspace.h>
	8	#include <asm/titan.h>
	9	#include <asm/io.h>
	10	#include "../../drivers/pci/pci-sh7751.h"
	11
	12	#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
	13	#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
	14	#define PCI_IO_AREA SH7751_PCI_IO_BASE
	15	#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
	16
	17	#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
	18
	19	#if defined(CONFIG_PCI)
	20	#define CHECK_SH7751_PCIIO(port) \
	21	((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
	22	#define CHECK_SH7751_PCIMEMIO(port) \
	23	((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
	24	#else
	25	#define CHECK_SH7751_PCIIO(port) (0)
	26	#endif
	27
	28	static inline void delay(void)
	29	{
	30	ctrl_inw(0xa0000000);
	31	}
	32
	33	static inline volatile u16 *port2adr(unsigned int port)
	34	{
	35	maybebadio((unsigned long)port);
	36	return (volatile u16*)port;
	37	}
	38
	39	u8 titan_inb(unsigned long port)
	40	{
	41	if (PXSEG(port))
	42	return ctrl_inb(port);
	43	else if (CHECK_SH7751_PCIIO(port))
	44	return ctrl_inb(PCI_IOMAP(port));
	45	return ctrl_inw(port2adr(port)) & 0xff;
	46	}
	47
	48	u8 titan_inb_p(unsigned long port)
	49	{
	50	u8 v;
	51
	52	if (PXSEG(port))
	53	v = ctrl_inb(port);
	54	else if (CHECK_SH7751_PCIIO(port))
	55	v = ctrl_inb(PCI_IOMAP(port));
	56	else
	57	v = ctrl_inw(port2adr(port)) & 0xff;
	58	delay();
	59	return v;
	60	}
	61
	62	u16 titan_inw(unsigned long port)
	63	{
	64	if (PXSEG(port))
	65	return ctrl_inw(port);
	66	else if (CHECK_SH7751_PCIIO(port))
	67	return ctrl_inw(PCI_IOMAP(port));
	68	else if (port >= 0x2000)
	69	return ctrl_inw(port2adr(port));
	70	else
	71	maybebadio(port);
	72	return 0;
	73	}
	74
	75	u32 titan_inl(unsigned long port)
	76	{
	77	if (PXSEG(port))
	78	return ctrl_inl(port);
	79	else if (CHECK_SH7751_PCIIO(port))
	80	return ctrl_inl(PCI_IOMAP(port));
	81	else if (port >= 0x2000)
	82	return ctrl_inw(port2adr(port));
	83	else
	84	maybebadio(port);
	85	return 0;
	86	}
	87
	88	void titan_outb(u8 value, unsigned long port)
	89	{
	90	if (PXSEG(port))
	91	ctrl_outb(value, port);
	92	else if (CHECK_SH7751_PCIIO(port))
	93	ctrl_outb(value, PCI_IOMAP(port));
	94	else
	95	ctrl_outw(value, port2adr(port));
	96	}
	97
	98	void titan_outb_p(u8 value, unsigned long port)
	99	{
	100	if (PXSEG(port))
	101	ctrl_outb(value, port);
	102	else if (CHECK_SH7751_PCIIO(port))
	103	ctrl_outb(value, PCI_IOMAP(port));
	104	else
	105	ctrl_outw(value, port2adr(port));
	106	delay();
	107	}
	108
	109	void titan_outw(u16 value, unsigned long port)
	110	{
	111	if (PXSEG(port))
	112	ctrl_outw(value, port);
	113	else if (CHECK_SH7751_PCIIO(port))
	114	ctrl_outw(value, PCI_IOMAP(port));
	115	else if (port >= 0x2000)
	116	ctrl_outw(value, port2adr(port));
	117	else
	118	maybebadio(port);
	119	}
	120
	121	void titan_outl(u32 value, unsigned long port)
	122	{
	123	if (PXSEG(port))
	124	ctrl_outl(value, port);
	125	else if (CHECK_SH7751_PCIIO(port))
	126	ctrl_outl(value, PCI_IOMAP(port));
	127	else
	128	maybebadio(port);
	129	}
	130
	131	void titan_insl(unsigned long port, void *dst, unsigned long count)
	132	{
	133	maybebadio(port);
	134	}
	135
	136	void titan_outsl(unsigned long port, const void *src, unsigned long count)
	137	{
	138	maybebadio(port);
	139	}
	140
	141	void *titan_ioremap(unsigned long offset, unsigned long size) {
	142	if (CHECK_SH7751_PCIIO(offset) \|\| CHECK_SH7751_PCIMEMIO(offset))
	143	return (void *)offset;
	144	}
	145
	146	void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
	147	{
	148	if (PXSEG(port))
	149	return (void __iomem *)port;
	150	else if (CHECK_SH7751_PCIIO(port))
	151	return (void __iomem *)PCI_IOMAP(port);
	152
	153	return (void __iomem *)port2adr(port);
	154	}
	155
	156	EXPORT_SYMBOL(titan_ioremap);