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-rw-r--r--arch/sh/boards/titan/io.c65
1 files changed, 21 insertions, 44 deletions
diff --git a/arch/sh/boards/titan/io.c b/arch/sh/boards/titan/io.c
index 48f3494f55b1..4730c1dd697d 100644
--- a/arch/sh/boards/titan/io.c
+++ b/arch/sh/boards/titan/io.c
@@ -1,34 +1,11 @@
1/* 1/*
2 * I/O routines for Titan 2 * I/O routines for Titan
3 */ 3 */
4
5#include <linux/pci.h> 4#include <linux/pci.h>
6#include <asm/machvec.h> 5#include <asm/machvec.h>
7#include <asm/addrspace.h> 6#include <asm/addrspace.h>
8#include <asm/titan.h> 7#include <asm/titan.h>
9#include <asm/io.h> 8#include <asm/io.h>
10#include "../../drivers/pci/pci-sh7751.h"
11
12#define PCIIOBR (volatile long *)PCI_REG(SH7751_PCIIOBR)
13#define PCIMBR (volatile long *)PCI_REG(SH7751_PCIMBR)
14#define PCI_IO_AREA SH7751_PCI_IO_BASE
15#define PCI_MEM_AREA SH7751_PCI_CONFIG_BASE
16
17#define PCI_IOMAP(adr) (PCI_IO_AREA + (adr & ~SH7751_PCIIOBR_MASK))
18
19#if defined(CONFIG_PCI)
20#define CHECK_SH7751_PCIIO(port) \
21 ((port >= PCIBIOS_MIN_IO) && (port < (PCIBIOS_MIN_IO + SH7751_PCI_IO_SIZE)))
22#define CHECK_SH7751_PCIMEMIO(port) \
23 ((port >= PCIBIOS_MIN_MEM) && (port < (PCIBIOS_MIN_MEM + SH7751_PCI_MEM_SIZE)))
24#else
25#define CHECK_SH7751_PCIIO(port) (0)
26#endif
27
28static inline void delay(void)
29{
30 ctrl_inw(0xa0000000);
31}
32 9
33static inline unsigned int port2adr(unsigned int port) 10static inline unsigned int port2adr(unsigned int port)
34{ 11{
@@ -40,8 +17,8 @@ u8 titan_inb(unsigned long port)
40{ 17{
41 if (PXSEG(port)) 18 if (PXSEG(port))
42 return ctrl_inb(port); 19 return ctrl_inb(port);
43 else if (CHECK_SH7751_PCIIO(port)) 20 else if (is_pci_ioaddr(port))
44 return ctrl_inb(PCI_IOMAP(port)); 21 return ctrl_inb(pci_ioaddr(port));
45 return ctrl_inw(port2adr(port)) & 0xff; 22 return ctrl_inw(port2adr(port)) & 0xff;
46} 23}
47 24
@@ -51,11 +28,11 @@ u8 titan_inb_p(unsigned long port)
51 28
52 if (PXSEG(port)) 29 if (PXSEG(port))
53 v = ctrl_inb(port); 30 v = ctrl_inb(port);
54 else if (CHECK_SH7751_PCIIO(port)) 31 else if (is_pci_ioaddr(port))
55 v = ctrl_inb(PCI_IOMAP(port)); 32 v = ctrl_inb(pci_ioaddr(port));
56 else 33 else
57 v = ctrl_inw(port2adr(port)) & 0xff; 34 v = ctrl_inw(port2adr(port)) & 0xff;
58 delay(); 35 ctrl_delay();
59 return v; 36 return v;
60} 37}
61 38
@@ -63,8 +40,8 @@ u16 titan_inw(unsigned long port)
63{ 40{
64 if (PXSEG(port)) 41 if (PXSEG(port))
65 return ctrl_inw(port); 42 return ctrl_inw(port);
66 else if (CHECK_SH7751_PCIIO(port)) 43 else if (is_pci_ioaddr(port))
67 return ctrl_inw(PCI_IOMAP(port)); 44 return ctrl_inw(pci_ioaddr(port));
68 else if (port >= 0x2000) 45 else if (port >= 0x2000)
69 return ctrl_inw(port2adr(port)); 46 return ctrl_inw(port2adr(port));
70 else 47 else
@@ -76,8 +53,8 @@ u32 titan_inl(unsigned long port)
76{ 53{
77 if (PXSEG(port)) 54 if (PXSEG(port))
78 return ctrl_inl(port); 55 return ctrl_inl(port);
79 else if (CHECK_SH7751_PCIIO(port)) 56 else if (is_pci_ioaddr(port))
80 return ctrl_inl(PCI_IOMAP(port)); 57 return ctrl_inl(pci_ioaddr(port));
81 else if (port >= 0x2000) 58 else if (port >= 0x2000)
82 return ctrl_inw(port2adr(port)); 59 return ctrl_inw(port2adr(port));
83 else 60 else
@@ -89,8 +66,8 @@ void titan_outb(u8 value, unsigned long port)
89{ 66{
90 if (PXSEG(port)) 67 if (PXSEG(port))
91 ctrl_outb(value, port); 68 ctrl_outb(value, port);
92 else if (CHECK_SH7751_PCIIO(port)) 69 else if (is_pci_ioaddr(port))
93 ctrl_outb(value, PCI_IOMAP(port)); 70 ctrl_outb(value, pci_ioaddr(port));
94 else 71 else
95 ctrl_outw(value, port2adr(port)); 72 ctrl_outw(value, port2adr(port));
96} 73}
@@ -99,19 +76,19 @@ void titan_outb_p(u8 value, unsigned long port)
99{ 76{
100 if (PXSEG(port)) 77 if (PXSEG(port))
101 ctrl_outb(value, port); 78 ctrl_outb(value, port);
102 else if (CHECK_SH7751_PCIIO(port)) 79 else if (is_pci_ioaddr(port))
103 ctrl_outb(value, PCI_IOMAP(port)); 80 ctrl_outb(value, pci_ioaddr(port));
104 else 81 else
105 ctrl_outw(value, port2adr(port)); 82 ctrl_outw(value, port2adr(port));
106 delay(); 83 ctrl_delay();
107} 84}
108 85
109void titan_outw(u16 value, unsigned long port) 86void titan_outw(u16 value, unsigned long port)
110{ 87{
111 if (PXSEG(port)) 88 if (PXSEG(port))
112 ctrl_outw(value, port); 89 ctrl_outw(value, port);
113 else if (CHECK_SH7751_PCIIO(port)) 90 else if (is_pci_ioaddr(port))
114 ctrl_outw(value, PCI_IOMAP(port)); 91 ctrl_outw(value, pci_ioaddr(port));
115 else if (port >= 0x2000) 92 else if (port >= 0x2000)
116 ctrl_outw(value, port2adr(port)); 93 ctrl_outw(value, port2adr(port));
117 else 94 else
@@ -122,8 +99,8 @@ void titan_outl(u32 value, unsigned long port)
122{ 99{
123 if (PXSEG(port)) 100 if (PXSEG(port))
124 ctrl_outl(value, port); 101 ctrl_outl(value, port);
125 else if (CHECK_SH7751_PCIIO(port)) 102 else if (is_pci_ioaddr(port))
126 ctrl_outl(value, PCI_IOMAP(port)); 103 ctrl_outl(value, pci_ioaddr(port));
127 else 104 else
128 maybebadio(port); 105 maybebadio(port);
129} 106}
@@ -140,10 +117,10 @@ void titan_outsl(unsigned long port, const void *src, unsigned long count)
140 117
141void __iomem *titan_ioport_map(unsigned long port, unsigned int size) 118void __iomem *titan_ioport_map(unsigned long port, unsigned int size)
142{ 119{
143 if (PXSEG(port) || CHECK_SH7751_PCIMEMIO(port)) 120 if (PXSEG(port) || is_pci_memaddr(port))
144 return (void __iomem *)port; 121 return (void __iomem *)port;
145 else if (CHECK_SH7751_PCIIO(port)) 122 else if (is_pci_ioaddr(port))
146 return (void __iomem *)PCI_IOMAP(port); 123 return (void __iomem *)pci_ioaddr(port);
147 124
148 return (void __iomem *)port2adr(port); 125 return (void __iomem *)port2adr(port);
149} 126}