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-rw-r--r--arch/sh/boards/overdrive/fpga.c133
1 files changed, 0 insertions, 133 deletions
diff --git a/arch/sh/boards/overdrive/fpga.c b/arch/sh/boards/overdrive/fpga.c
deleted file mode 100644
index 956c23901228..000000000000
--- a/arch/sh/boards/overdrive/fpga.c
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * Copyright (C) 2000 David J. Mckay (david.mckay@st.com)
3 *
4 * May be copied or modified under the terms of the GNU General Public
5 * License. See linux/COPYING for more information.
6 *
7 * This file handles programming up the Altera Flex10K that interfaces to
8 * the Galileo, and does the PS/2 keyboard and mouse
9 *
10 */
11
12
13#include <linux/kernel.h>
14#include <linux/smp.h>
15#include <linux/smp_lock.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/pci.h>
19#include <linux/delay.h>
20
21
22#include <asm/overdriver/gt64111.h>
23#include <asm/overdrive/overdrive.h>
24#include <asm/overdrive/fpga.h>
25
26#define FPGA_NotConfigHigh() (*FPGA_ControlReg) = (*FPGA_ControlReg) | ENABLE_FPGA_BIT
27#define FPGA_NotConfigLow() (*FPGA_ControlReg) = (*FPGA_ControlReg) & RESET_FPGA_MASK
28
29/* I need to find out what (if any) the real delay factor here is */
30/* The delay is definately not critical */
31#define long_delay() {int i;for(i=0;i<10000;i++);}
32#define short_delay() {int i;for(i=0;i<100;i++);}
33
34static void __init program_overdrive_fpga(const unsigned char *fpgacode,
35 int size)
36{
37 int timeout = 0;
38 int i, j;
39 unsigned char b;
40 static volatile unsigned char *FPGA_ControlReg =
41 (volatile unsigned char *) (OVERDRIVE_CTRL);
42 static volatile unsigned char *FPGA_ProgramReg =
43 (volatile unsigned char *) (FPGA_DCLK_ADDRESS);
44
45 printk("FPGA: Commencing FPGA Programming\n");
46
47 /* The PCI reset but MUST be low when programming the FPGA !!! */
48 b = (*FPGA_ControlReg) & RESET_PCI_MASK;
49
50 (*FPGA_ControlReg) = b;
51
52 /* Prepare FPGA to program */
53
54 FPGA_NotConfigHigh();
55 long_delay();
56
57 FPGA_NotConfigLow();
58 short_delay();
59
60 while ((*FPGA_ProgramReg & FPGA_NOT_STATUS) != 0) {
61 printk("FPGA: Waiting for NotStatus to go Low ... \n");
62 }
63
64 FPGA_NotConfigHigh();
65
66 /* Wait for FPGA "ready to be programmed" signal */
67 printk("FPGA: Waiting for NotStatus to go high (FPGA ready)... \n");
68
69 for (timeout = 0;
70 (((*FPGA_ProgramReg & FPGA_NOT_STATUS) == 0)
71 && (timeout < FPGA_TIMEOUT)); timeout++);
72
73 /* Check if timeout condition occured - i.e. an error */
74
75 if (timeout == FPGA_TIMEOUT) {
76 printk
77 ("FPGA: Failed to program - Timeout waiting for notSTATUS to go high\n");
78 return;
79 }
80
81 printk("FPGA: Copying data to FPGA ... %d bytes\n", size);
82
83 /* Copy array to FPGA - bit at a time */
84
85 for (i = 0; i < size; i++) {
86 volatile unsigned w = 0;
87
88 for (j = 0; j < 8; j++) {
89 *FPGA_ProgramReg = (fpgacode[i] >> j) & 0x01;
90 short_delay();
91 }
92 if ((i & 0x3ff) == 0) {
93 printk(".");
94 }
95 }
96
97 /* Waiting for CONFDONE to go high - means the program is complete */
98
99 for (timeout = 0;
100 (((*FPGA_ProgramReg & FPGA_CONFDONE) == 0)
101 && (timeout < FPGA_TIMEOUT)); timeout++) {
102
103 *FPGA_ProgramReg = 0x0;
104 long_delay();
105 }
106
107 if (timeout == FPGA_TIMEOUT) {
108 printk
109 ("FPGA: Failed to program - Timeout waiting for CONFDONE to go high\n");
110 return;
111 } else { /* Clock another 10 times - gets the device into a working state */
112 for (i = 0; i < 10; i++) {
113 *FPGA_ProgramReg = 0x0;
114 short_delay();
115 }
116 }
117
118 printk("FPGA: Programming complete\n");
119}
120
121
122static const unsigned char __init fpgacode[] = {
123#include "./overdrive.ttf" /* Code from maxplus2 compiler */
124 , 0, 0
125};
126
127
128int __init init_overdrive_fpga(void)
129{
130 program_overdrive_fpga(fpgacode, sizeof(fpgacode));
131
132 return 0;
133}