aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/boards/mach-se/7722/irq.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/boards/mach-se/7722/irq.c')
-rw-r--r--arch/sh/boards/mach-se/7722/irq.c76
1 files changed, 76 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-se/7722/irq.c b/arch/sh/boards/mach-se/7722/irq.c
new file mode 100644
index 000000000000..02d21a3e2a8f
--- /dev/null
+++ b/arch/sh/boards/mach-se/7722/irq.c
@@ -0,0 +1,76 @@
1/*
2 * linux/arch/sh/boards/se/7722/irq.c
3 *
4 * Copyright (C) 2007 Nobuhiro Iwamatsu
5 *
6 * Hitachi UL SolutionEngine 7722 Support.
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12#include <linux/init.h>
13#include <linux/irq.h>
14#include <linux/interrupt.h>
15#include <asm/irq.h>
16#include <asm/io.h>
17#include <mach-se/mach/se7722.h>
18
19static void disable_se7722_irq(unsigned int irq)
20{
21 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE;
22 ctrl_outw(ctrl_inw(IRQ01_MASK) | 1 << bit, IRQ01_MASK);
23}
24
25static void enable_se7722_irq(unsigned int irq)
26{
27 unsigned int bit = irq - SE7722_FPGA_IRQ_BASE;
28 ctrl_outw(ctrl_inw(IRQ01_MASK) & ~(1 << bit), IRQ01_MASK);
29}
30
31static struct irq_chip se7722_irq_chip __read_mostly = {
32 .name = "SE7722-FPGA",
33 .mask = disable_se7722_irq,
34 .unmask = enable_se7722_irq,
35 .mask_ack = disable_se7722_irq,
36};
37
38static void se7722_irq_demux(unsigned int irq, struct irq_desc *desc)
39{
40 unsigned short intv = ctrl_inw(IRQ01_STS);
41 struct irq_desc *ext_desc;
42 unsigned int ext_irq = SE7722_FPGA_IRQ_BASE;
43
44 intv &= (1 << SE7722_FPGA_IRQ_NR) - 1;
45
46 while (intv) {
47 if (intv & 1) {
48 ext_desc = irq_desc + ext_irq;
49 handle_level_irq(ext_irq, ext_desc);
50 }
51 intv >>= 1;
52 ext_irq++;
53 }
54}
55
56/*
57 * Initialize IRQ setting
58 */
59void __init init_se7722_IRQ(void)
60{
61 int i;
62
63 ctrl_outw(0, IRQ01_MASK); /* disable all irqs */
64 ctrl_outw(0x2000, 0xb03fffec); /* mrshpc irq enable */
65
66 for (i = 0; i < SE7722_FPGA_IRQ_NR; i++)
67 set_irq_chip_and_handler_name(SE7722_FPGA_IRQ_BASE + i,
68 &se7722_irq_chip,
69 handle_level_irq, "level");
70
71 set_irq_chained_handler(IRQ0_IRQ, se7722_irq_demux);
72 set_irq_type(IRQ0_IRQ, IRQ_TYPE_LEVEL_LOW);
73
74 set_irq_chained_handler(IRQ1_IRQ, se7722_irq_demux);
75 set_irq_type(IRQ1_IRQ, IRQ_TYPE_LEVEL_LOW);
76}