aboutsummaryrefslogtreecommitdiffstats
path: root/arch/sh/boards/mach-se/7206/irq.c
diff options
context:
space:
mode:
Diffstat (limited to 'arch/sh/boards/mach-se/7206/irq.c')
-rw-r--r--arch/sh/boards/mach-se/7206/irq.c43
1 files changed, 22 insertions, 21 deletions
diff --git a/arch/sh/boards/mach-se/7206/irq.c b/arch/sh/boards/mach-se/7206/irq.c
index aef7f052851a..8d82175d83ab 100644
--- a/arch/sh/boards/mach-se/7206/irq.c
+++ b/arch/sh/boards/mach-se/7206/irq.c
@@ -32,12 +32,12 @@ static void disable_se7206_irq(unsigned int irq)
32 unsigned short msk0,msk1; 32 unsigned short msk0,msk1;
33 33
34 /* Set the priority in IPR to 0 */ 34 /* Set the priority in IPR to 0 */
35 val = ctrl_inw(INTC_IPR01); 35 val = __raw_readw(INTC_IPR01);
36 val &= mask; 36 val &= mask;
37 ctrl_outw(val, INTC_IPR01); 37 __raw_writew(val, INTC_IPR01);
38 /* FPGA mask set */ 38 /* FPGA mask set */
39 msk0 = ctrl_inw(INTMSK0); 39 msk0 = __raw_readw(INTMSK0);
40 msk1 = ctrl_inw(INTMSK1); 40 msk1 = __raw_readw(INTMSK1);
41 41
42 switch (irq) { 42 switch (irq) {
43 case IRQ0_IRQ: 43 case IRQ0_IRQ:
@@ -51,8 +51,8 @@ static void disable_se7206_irq(unsigned int irq)
51 msk1 |= 0x00ff; 51 msk1 |= 0x00ff;
52 break; 52 break;
53 } 53 }
54 ctrl_outw(msk0, INTMSK0); 54 __raw_writew(msk0, INTMSK0);
55 ctrl_outw(msk1, INTMSK1); 55 __raw_writew(msk1, INTMSK1);
56} 56}
57 57
58static void enable_se7206_irq(unsigned int irq) 58static void enable_se7206_irq(unsigned int irq)
@@ -62,13 +62,13 @@ static void enable_se7206_irq(unsigned int irq)
62 unsigned short msk0,msk1; 62 unsigned short msk0,msk1;
63 63
64 /* Set priority in IPR back to original value */ 64 /* Set priority in IPR back to original value */
65 val = ctrl_inw(INTC_IPR01); 65 val = __raw_readw(INTC_IPR01);
66 val |= value; 66 val |= value;
67 ctrl_outw(val, INTC_IPR01); 67 __raw_writew(val, INTC_IPR01);
68 68
69 /* FPGA mask reset */ 69 /* FPGA mask reset */
70 msk0 = ctrl_inw(INTMSK0); 70 msk0 = __raw_readw(INTMSK0);
71 msk1 = ctrl_inw(INTMSK1); 71 msk1 = __raw_readw(INTMSK1);
72 72
73 switch (irq) { 73 switch (irq) {
74 case IRQ0_IRQ: 74 case IRQ0_IRQ:
@@ -82,19 +82,20 @@ static void enable_se7206_irq(unsigned int irq)
82 msk1 &= ~0x00ff; 82 msk1 &= ~0x00ff;
83 break; 83 break;
84 } 84 }
85 ctrl_outw(msk0, INTMSK0); 85 __raw_writew(msk0, INTMSK0);
86 ctrl_outw(msk1, INTMSK1); 86 __raw_writew(msk1, INTMSK1);
87} 87}
88 88
89static void eoi_se7206_irq(unsigned int irq) 89static void eoi_se7206_irq(unsigned int irq)
90{ 90{
91 unsigned short sts0,sts1; 91 unsigned short sts0,sts1;
92 struct irq_desc *desc = irq_to_desc(irq);
92 93
93 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) 94 if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS)))
94 enable_se7206_irq(irq); 95 enable_se7206_irq(irq);
95 /* FPGA isr clear */ 96 /* FPGA isr clear */
96 sts0 = ctrl_inw(INTSTS0); 97 sts0 = __raw_readw(INTSTS0);
97 sts1 = ctrl_inw(INTSTS1); 98 sts1 = __raw_readw(INTSTS1);
98 99
99 switch (irq) { 100 switch (irq) {
100 case IRQ0_IRQ: 101 case IRQ0_IRQ:
@@ -108,8 +109,8 @@ static void eoi_se7206_irq(unsigned int irq)
108 sts1 &= ~0x00ff; 109 sts1 &= ~0x00ff;
109 break; 110 break;
110 } 111 }
111 ctrl_outw(sts0, INTSTS0); 112 __raw_writew(sts0, INTSTS0);
112 ctrl_outw(sts1, INTSTS1); 113 __raw_writew(sts1, INTSTS1);
113} 114}
114 115
115static struct irq_chip se7206_irq_chip __read_mostly = { 116static struct irq_chip se7206_irq_chip __read_mostly = {
@@ -136,11 +137,11 @@ void __init init_se7206_IRQ(void)
136 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */ 137 make_se7206_irq(IRQ0_IRQ); /* SMC91C111 */
137 make_se7206_irq(IRQ1_IRQ); /* ATA */ 138 make_se7206_irq(IRQ1_IRQ); /* ATA */
138 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */ 139 make_se7206_irq(IRQ3_IRQ); /* SLOT / PCM */
139 ctrl_outw(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */ 140 __raw_writew(inw(INTC_ICR1) | 0x000b ,INTC_ICR1 ) ; /* ICR1 */
140 141
141 /* FPGA System register setup*/ 142 /* FPGA System register setup*/
142 ctrl_outw(0x0000,INTSTS0); /* Clear INTSTS0 */ 143 __raw_writew(0x0000,INTSTS0); /* Clear INTSTS0 */
143 ctrl_outw(0x0000,INTSTS1); /* Clear INTSTS1 */ 144 __raw_writew(0x0000,INTSTS1); /* Clear INTSTS1 */
144 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */ 145 /* IRQ0=LAN, IRQ1=ATA, IRQ3=SLT,PCM */
145 ctrl_outw(0x0001,INTSEL); 146 __raw_writew(0x0001,INTSEL);
146} 147}