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-rw-r--r--arch/sh/boards/mach-ecovec24/setup.c670
1 files changed, 670 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-ecovec24/setup.c b/arch/sh/boards/mach-ecovec24/setup.c
new file mode 100644
index 000000000000..96bc1698310f
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+++ b/arch/sh/boards/mach-ecovec24/setup.c
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1/*
2 * Copyright (C) 2009 Renesas Solutions Corp.
3 *
4 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/init.h>
12#include <linux/device.h>
13#include <linux/platform_device.h>
14#include <linux/mtd/physmap.h>
15#include <linux/gpio.h>
16#include <linux/interrupt.h>
17#include <linux/io.h>
18#include <linux/delay.h>
19#include <linux/usb/r8a66597.h>
20#include <linux/i2c.h>
21#include <linux/input.h>
22#include <video/sh_mobile_lcdc.h>
23#include <media/sh_mobile_ceu.h>
24#include <asm/heartbeat.h>
25#include <asm/sh_eth.h>
26#include <asm/sh_keysc.h>
27#include <asm/clock.h>
28#include <cpu/sh7724.h>
29
30/*
31 * Address Interface BusWidth
32 *-----------------------------------------
33 * 0x0000_0000 uboot 16bit
34 * 0x0004_0000 Linux romImage 16bit
35 * 0x0014_0000 MTD for Linux 16bit
36 * 0x0400_0000 Internal I/O 16/32bit
37 * 0x0800_0000 DRAM 32bit
38 * 0x1800_0000 MFI 16bit
39 */
40
41/* Heartbeat */
42static unsigned char led_pos[] = { 0, 1, 2, 3 };
43static struct heartbeat_data heartbeat_data = {
44 .regsize = 8,
45 .nr_bits = 4,
46 .bit_pos = led_pos,
47};
48
49static struct resource heartbeat_resources[] = {
50 [0] = {
51 .start = 0xA405012C, /* PTG */
52 .end = 0xA405012E - 1,
53 .flags = IORESOURCE_MEM,
54 },
55};
56
57static struct platform_device heartbeat_device = {
58 .name = "heartbeat",
59 .id = -1,
60 .dev = {
61 .platform_data = &heartbeat_data,
62 },
63 .num_resources = ARRAY_SIZE(heartbeat_resources),
64 .resource = heartbeat_resources,
65};
66
67/* MTD */
68static struct mtd_partition nor_flash_partitions[] = {
69 {
70 .name = "boot loader",
71 .offset = 0,
72 .size = (5 * 1024 * 1024),
73 .mask_flags = MTD_CAP_ROM,
74 }, {
75 .name = "free-area",
76 .offset = MTDPART_OFS_APPEND,
77 .size = MTDPART_SIZ_FULL,
78 },
79};
80
81static struct physmap_flash_data nor_flash_data = {
82 .width = 2,
83 .parts = nor_flash_partitions,
84 .nr_parts = ARRAY_SIZE(nor_flash_partitions),
85};
86
87static struct resource nor_flash_resources[] = {
88 [0] = {
89 .name = "NOR Flash",
90 .start = 0x00000000,
91 .end = 0x03ffffff,
92 .flags = IORESOURCE_MEM,
93 }
94};
95
96static struct platform_device nor_flash_device = {
97 .name = "physmap-flash",
98 .resource = nor_flash_resources,
99 .num_resources = ARRAY_SIZE(nor_flash_resources),
100 .dev = {
101 .platform_data = &nor_flash_data,
102 },
103};
104
105/* SH Eth */
106#define SH_ETH_ADDR (0xA4600000)
107#define SH_ETH_MAHR (SH_ETH_ADDR + 0x1C0)
108#define SH_ETH_MALR (SH_ETH_ADDR + 0x1C8)
109static struct resource sh_eth_resources[] = {
110 [0] = {
111 .start = SH_ETH_ADDR,
112 .end = SH_ETH_ADDR + 0x1FC,
113 .flags = IORESOURCE_MEM,
114 },
115 [1] = {
116 .start = 91,
117 .flags = IORESOURCE_IRQ | IORESOURCE_IRQ_HIGHLEVEL,
118 },
119};
120
121struct sh_eth_plat_data sh_eth_plat = {
122 .phy = 0x1f, /* SMSC LAN8700 */
123 .edmac_endian = EDMAC_LITTLE_ENDIAN,
124};
125
126static struct platform_device sh_eth_device = {
127 .name = "sh-eth",
128 .id = 0,
129 .dev = {
130 .platform_data = &sh_eth_plat,
131 },
132 .num_resources = ARRAY_SIZE(sh_eth_resources),
133 .resource = sh_eth_resources,
134};
135
136/* USB0 host */
137void usb0_port_power(int port, int power)
138{
139 gpio_set_value(GPIO_PTB4, power);
140}
141
142static struct r8a66597_platdata usb0_host_data = {
143 .on_chip = 1,
144 .port_power = usb0_port_power,
145};
146
147static struct resource usb0_host_resources[] = {
148 [0] = {
149 .start = 0xa4d80000,
150 .end = 0xa4d80124 - 1,
151 .flags = IORESOURCE_MEM,
152 },
153 [1] = {
154 .start = 65,
155 .end = 65,
156 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
157 },
158};
159
160static struct platform_device usb0_host_device = {
161 .name = "r8a66597_hcd",
162 .id = 0,
163 .dev = {
164 .dma_mask = NULL, /* not use dma */
165 .coherent_dma_mask = 0xffffffff,
166 .platform_data = &usb0_host_data,
167 },
168 .num_resources = ARRAY_SIZE(usb0_host_resources),
169 .resource = usb0_host_resources,
170};
171
172/*
173 * USB1
174 *
175 * CN5 can use both host/function,
176 * and we can determine it by checking PTB[3]
177 *
178 * This time only USB1 host is supported.
179 */
180void usb1_port_power(int port, int power)
181{
182 if (!gpio_get_value(GPIO_PTB3)) {
183 printk(KERN_ERR "USB1 function is not supported\n");
184 return;
185 }
186
187 gpio_set_value(GPIO_PTB5, power);
188}
189
190static struct r8a66597_platdata usb1_host_data = {
191 .on_chip = 1,
192 .port_power = usb1_port_power,
193};
194
195static struct resource usb1_host_resources[] = {
196 [0] = {
197 .start = 0xa4d90000,
198 .end = 0xa4d90124 - 1,
199 .flags = IORESOURCE_MEM,
200 },
201 [1] = {
202 .start = 66,
203 .end = 66,
204 .flags = IORESOURCE_IRQ | IRQF_TRIGGER_LOW,
205 },
206};
207
208static struct platform_device usb1_host_device = {
209 .name = "r8a66597_hcd",
210 .id = 1,
211 .dev = {
212 .dma_mask = NULL, /* not use dma */
213 .coherent_dma_mask = 0xffffffff,
214 .platform_data = &usb1_host_data,
215 },
216 .num_resources = ARRAY_SIZE(usb1_host_resources),
217 .resource = usb1_host_resources,
218};
219
220/* LCDC */
221static struct sh_mobile_lcdc_info lcdc_info = {
222 .ch[0] = {
223 .interface_type = RGB18,
224 .chan = LCDC_CHAN_MAINLCD,
225 .bpp = 16,
226 .lcd_cfg = {
227 .sync = 0, /* hsync and vsync are active low */
228 },
229 .lcd_size_cfg = { /* 7.0 inch */
230 .width = 152,
231 .height = 91,
232 },
233 .board_cfg = {
234 },
235 }
236};
237
238static struct resource lcdc_resources[] = {
239 [0] = {
240 .name = "LCDC",
241 .start = 0xfe940000,
242 .end = 0xfe942fff,
243 .flags = IORESOURCE_MEM,
244 },
245 [1] = {
246 .start = 106,
247 .flags = IORESOURCE_IRQ,
248 },
249};
250
251static struct platform_device lcdc_device = {
252 .name = "sh_mobile_lcdc_fb",
253 .num_resources = ARRAY_SIZE(lcdc_resources),
254 .resource = lcdc_resources,
255 .dev = {
256 .platform_data = &lcdc_info,
257 },
258 .archdata = {
259 .hwblk_id = HWBLK_LCDC,
260 },
261};
262
263/* CEU0 */
264static struct sh_mobile_ceu_info sh_mobile_ceu0_info = {
265 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
266};
267
268static struct resource ceu0_resources[] = {
269 [0] = {
270 .name = "CEU0",
271 .start = 0xfe910000,
272 .end = 0xfe91009f,
273 .flags = IORESOURCE_MEM,
274 },
275 [1] = {
276 .start = 52,
277 .flags = IORESOURCE_IRQ,
278 },
279 [2] = {
280 /* place holder for contiguous memory */
281 },
282};
283
284static struct platform_device ceu0_device = {
285 .name = "sh_mobile_ceu",
286 .id = 0, /* "ceu0" clock */
287 .num_resources = ARRAY_SIZE(ceu0_resources),
288 .resource = ceu0_resources,
289 .dev = {
290 .platform_data = &sh_mobile_ceu0_info,
291 },
292 .archdata = {
293 .hwblk_id = HWBLK_CEU0,
294 },
295};
296
297/* CEU1 */
298static struct sh_mobile_ceu_info sh_mobile_ceu1_info = {
299 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
300};
301
302static struct resource ceu1_resources[] = {
303 [0] = {
304 .name = "CEU1",
305 .start = 0xfe914000,
306 .end = 0xfe91409f,
307 .flags = IORESOURCE_MEM,
308 },
309 [1] = {
310 .start = 63,
311 .flags = IORESOURCE_IRQ,
312 },
313 [2] = {
314 /* place holder for contiguous memory */
315 },
316};
317
318static struct platform_device ceu1_device = {
319 .name = "sh_mobile_ceu",
320 .id = 1, /* "ceu1" clock */
321 .num_resources = ARRAY_SIZE(ceu1_resources),
322 .resource = ceu1_resources,
323 .dev = {
324 .platform_data = &sh_mobile_ceu1_info,
325 },
326 .archdata = {
327 .hwblk_id = HWBLK_CEU1,
328 },
329};
330
331/* I2C device */
332static struct i2c_board_info i2c1_devices[] = {
333 {
334 I2C_BOARD_INFO("r2025sd", 0x32),
335 },
336};
337
338/* KEYSC */
339static struct sh_keysc_info keysc_info = {
340 .mode = SH_KEYSC_MODE_1,
341 .scan_timing = 3,
342 .delay = 50,
343 .kycr2_delay = 100,
344 .keycodes = { KEY_1, 0, 0, 0, 0,
345 KEY_2, 0, 0, 0, 0,
346 KEY_3, 0, 0, 0, 0,
347 KEY_4, 0, 0, 0, 0,
348 KEY_5, 0, 0, 0, 0,
349 KEY_6, 0, 0, 0, 0, },
350};
351
352static struct resource keysc_resources[] = {
353 [0] = {
354 .name = "KEYSC",
355 .start = 0x044b0000,
356 .end = 0x044b000f,
357 .flags = IORESOURCE_MEM,
358 },
359 [1] = {
360 .start = 79,
361 .flags = IORESOURCE_IRQ,
362 },
363};
364
365static struct platform_device keysc_device = {
366 .name = "sh_keysc",
367 .id = 0, /* keysc0 clock */
368 .num_resources = ARRAY_SIZE(keysc_resources),
369 .resource = keysc_resources,
370 .dev = {
371 .platform_data = &keysc_info,
372 },
373 .archdata = {
374 .hwblk_id = HWBLK_KEYSC,
375 },
376};
377
378static struct platform_device *ecovec_devices[] __initdata = {
379 &heartbeat_device,
380 &nor_flash_device,
381 &sh_eth_device,
382 &usb0_host_device,
383 &usb1_host_device, /* USB1 host support */
384 &lcdc_device,
385 &ceu0_device,
386 &ceu1_device,
387 &keysc_device,
388};
389
390#define EEPROM_ADDR 0x50
391static u8 mac_read(struct i2c_adapter *a, u8 command)
392{
393 struct i2c_msg msg[2];
394 u8 buf;
395 int ret;
396
397 msg[0].addr = EEPROM_ADDR;
398 msg[0].flags = 0;
399 msg[0].len = 1;
400 msg[0].buf = &command;
401
402 msg[1].addr = EEPROM_ADDR;
403 msg[1].flags = I2C_M_RD;
404 msg[1].len = 1;
405 msg[1].buf = &buf;
406
407 ret = i2c_transfer(a, msg, 2);
408 if (ret < 0) {
409 printk(KERN_ERR "error %d\n", ret);
410 buf = 0xff;
411 }
412
413 return buf;
414}
415
416#define MAC_LEN 6
417static void __init sh_eth_init(void)
418{
419 struct i2c_adapter *a = i2c_get_adapter(1);
420 struct clk *eth_clk;
421 u8 mac[MAC_LEN];
422 int i;
423
424 if (!a) {
425 pr_err("can not get I2C 1\n");
426 return;
427 }
428
429 eth_clk = clk_get(NULL, "eth0");
430 if (!eth_clk) {
431 pr_err("can not get eth0 clk\n");
432 return;
433 }
434
435 /* read MAC address frome EEPROM */
436 for (i = 0; i < MAC_LEN; i++) {
437 mac[i] = mac_read(a, 0x10 + i);
438 msleep(10);
439 }
440
441 /* clock enable */
442 clk_enable(eth_clk);
443
444 /* reset sh-eth */
445 ctrl_outl(0x1, SH_ETH_ADDR + 0x0);
446
447 /* set MAC addr */
448 ctrl_outl((mac[0] << 24) |
449 (mac[1] << 16) |
450 (mac[2] << 8) |
451 (mac[3] << 0), SH_ETH_MAHR);
452 ctrl_outl((mac[4] << 8) |
453 (mac[5] << 0), SH_ETH_MALR);
454
455 clk_put(eth_clk);
456}
457
458#define PORT_HIZA 0xA4050158
459#define IODRIVEA 0xA405018A
460static int __init arch_setup(void)
461{
462 /* enable SCIFA0 */
463 gpio_request(GPIO_FN_SCIF0_TXD, NULL);
464 gpio_request(GPIO_FN_SCIF0_RXD, NULL);
465
466 /* enable debug LED */
467 gpio_request(GPIO_PTG0, NULL);
468 gpio_request(GPIO_PTG1, NULL);
469 gpio_request(GPIO_PTG2, NULL);
470 gpio_request(GPIO_PTG3, NULL);
471 gpio_direction_output(GPIO_PTG0, 0);
472 gpio_direction_output(GPIO_PTG1, 0);
473 gpio_direction_output(GPIO_PTG2, 0);
474 gpio_direction_output(GPIO_PTG3, 0);
475 ctrl_outw((ctrl_inw(PORT_HIZA) & ~(0x1 << 1)) , PORT_HIZA);
476
477 /* enable SH-Eth */
478 gpio_request(GPIO_PTA1, NULL);
479 gpio_direction_output(GPIO_PTA1, 1);
480 mdelay(20);
481
482 gpio_request(GPIO_FN_RMII_RXD0, NULL);
483 gpio_request(GPIO_FN_RMII_RXD1, NULL);
484 gpio_request(GPIO_FN_RMII_TXD0, NULL);
485 gpio_request(GPIO_FN_RMII_TXD1, NULL);
486 gpio_request(GPIO_FN_RMII_REF_CLK, NULL);
487 gpio_request(GPIO_FN_RMII_TX_EN, NULL);
488 gpio_request(GPIO_FN_RMII_RX_ER, NULL);
489 gpio_request(GPIO_FN_RMII_CRS_DV, NULL);
490 gpio_request(GPIO_FN_MDIO, NULL);
491 gpio_request(GPIO_FN_MDC, NULL);
492 gpio_request(GPIO_FN_LNKSTA, NULL);
493
494 /* enable USB */
495 ctrl_outw(0x0000, 0xA4D80000);
496 ctrl_outw(0x0000, 0xA4D90000);
497 gpio_request(GPIO_PTB3, NULL);
498 gpio_request(GPIO_PTB4, NULL);
499 gpio_request(GPIO_PTB5, NULL);
500 gpio_direction_input(GPIO_PTB3);
501 gpio_direction_output(GPIO_PTB4, 0);
502 gpio_direction_output(GPIO_PTB5, 0);
503 ctrl_outw(0x0600, 0xa40501d4);
504 ctrl_outw(0x0600, 0xa4050192);
505
506 /* enable LCDC */
507 gpio_request(GPIO_FN_LCDD23, NULL);
508 gpio_request(GPIO_FN_LCDD22, NULL);
509 gpio_request(GPIO_FN_LCDD21, NULL);
510 gpio_request(GPIO_FN_LCDD20, NULL);
511 gpio_request(GPIO_FN_LCDD19, NULL);
512 gpio_request(GPIO_FN_LCDD18, NULL);
513 gpio_request(GPIO_FN_LCDD17, NULL);
514 gpio_request(GPIO_FN_LCDD16, NULL);
515 gpio_request(GPIO_FN_LCDD15, NULL);
516 gpio_request(GPIO_FN_LCDD14, NULL);
517 gpio_request(GPIO_FN_LCDD13, NULL);
518 gpio_request(GPIO_FN_LCDD12, NULL);
519 gpio_request(GPIO_FN_LCDD11, NULL);
520 gpio_request(GPIO_FN_LCDD10, NULL);
521 gpio_request(GPIO_FN_LCDD9, NULL);
522 gpio_request(GPIO_FN_LCDD8, NULL);
523 gpio_request(GPIO_FN_LCDD7, NULL);
524 gpio_request(GPIO_FN_LCDD6, NULL);
525 gpio_request(GPIO_FN_LCDD5, NULL);
526 gpio_request(GPIO_FN_LCDD4, NULL);
527 gpio_request(GPIO_FN_LCDD3, NULL);
528 gpio_request(GPIO_FN_LCDD2, NULL);
529 gpio_request(GPIO_FN_LCDD1, NULL);
530 gpio_request(GPIO_FN_LCDD0, NULL);
531 gpio_request(GPIO_FN_LCDDISP, NULL);
532 gpio_request(GPIO_FN_LCDHSYN, NULL);
533 gpio_request(GPIO_FN_LCDDCK, NULL);
534 gpio_request(GPIO_FN_LCDVSYN, NULL);
535 gpio_request(GPIO_FN_LCDDON, NULL);
536 gpio_request(GPIO_FN_LCDLCLK, NULL);
537 ctrl_outw((ctrl_inw(PORT_HIZA) & ~0x0001), PORT_HIZA);
538
539 gpio_request(GPIO_PTE6, NULL);
540 gpio_request(GPIO_PTU1, NULL);
541 gpio_request(GPIO_PTR1, NULL);
542 gpio_request(GPIO_PTA2, NULL);
543 gpio_direction_input(GPIO_PTE6);
544 gpio_direction_output(GPIO_PTU1, 0);
545 gpio_direction_output(GPIO_PTR1, 0);
546 gpio_direction_output(GPIO_PTA2, 0);
547
548 /* I/O buffer drive ability is low */
549 ctrl_outw((ctrl_inw(IODRIVEA) & ~0x00c0) | 0x0040 , IODRIVEA);
550
551 if (gpio_get_value(GPIO_PTE6)) {
552 /* DVI */
553 lcdc_info.clock_source = LCDC_CLK_EXTERNAL;
554 lcdc_info.ch[0].clock_divider = 1,
555 lcdc_info.ch[0].lcd_cfg.name = "DVI";
556 lcdc_info.ch[0].lcd_cfg.xres = 1280;
557 lcdc_info.ch[0].lcd_cfg.yres = 720;
558 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
559 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
560 lcdc_info.ch[0].lcd_cfg.hsync_len = 40;
561 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
562 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
563 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
564
565 gpio_set_value(GPIO_PTA2, 1);
566 gpio_set_value(GPIO_PTU1, 1);
567 } else {
568 /* Panel */
569
570 lcdc_info.clock_source = LCDC_CLK_PERIPHERAL;
571 lcdc_info.ch[0].clock_divider = 2,
572 lcdc_info.ch[0].lcd_cfg.name = "Panel";
573 lcdc_info.ch[0].lcd_cfg.xres = 800;
574 lcdc_info.ch[0].lcd_cfg.yres = 480;
575 lcdc_info.ch[0].lcd_cfg.left_margin = 220;
576 lcdc_info.ch[0].lcd_cfg.right_margin = 110;
577 lcdc_info.ch[0].lcd_cfg.hsync_len = 70;
578 lcdc_info.ch[0].lcd_cfg.upper_margin = 20;
579 lcdc_info.ch[0].lcd_cfg.lower_margin = 5;
580 lcdc_info.ch[0].lcd_cfg.vsync_len = 5;
581
582 gpio_set_value(GPIO_PTR1, 1);
583
584 /* FIXME
585 *
586 * LCDDON control is needed for Panel,
587 * but current sh_mobile_lcdc driver doesn't control it.
588 * It is temporary correspondence
589 */
590 gpio_request(GPIO_PTF4, NULL);
591 gpio_direction_output(GPIO_PTF4, 1);
592 }
593
594 /* enable CEU0 */
595 gpio_request(GPIO_FN_VIO0_D15, NULL);
596 gpio_request(GPIO_FN_VIO0_D14, NULL);
597 gpio_request(GPIO_FN_VIO0_D13, NULL);
598 gpio_request(GPIO_FN_VIO0_D12, NULL);
599 gpio_request(GPIO_FN_VIO0_D11, NULL);
600 gpio_request(GPIO_FN_VIO0_D10, NULL);
601 gpio_request(GPIO_FN_VIO0_D9, NULL);
602 gpio_request(GPIO_FN_VIO0_D8, NULL);
603 gpio_request(GPIO_FN_VIO0_D7, NULL);
604 gpio_request(GPIO_FN_VIO0_D6, NULL);
605 gpio_request(GPIO_FN_VIO0_D5, NULL);
606 gpio_request(GPIO_FN_VIO0_D4, NULL);
607 gpio_request(GPIO_FN_VIO0_D3, NULL);
608 gpio_request(GPIO_FN_VIO0_D2, NULL);
609 gpio_request(GPIO_FN_VIO0_D1, NULL);
610 gpio_request(GPIO_FN_VIO0_D0, NULL);
611 gpio_request(GPIO_FN_VIO0_VD, NULL);
612 gpio_request(GPIO_FN_VIO0_CLK, NULL);
613 gpio_request(GPIO_FN_VIO0_FLD, NULL);
614 gpio_request(GPIO_FN_VIO0_HD, NULL);
615 platform_resource_setup_memory(&ceu0_device, "ceu0", 4 << 20);
616
617 /* enable CEU1 */
618 gpio_request(GPIO_FN_VIO1_D7, NULL);
619 gpio_request(GPIO_FN_VIO1_D6, NULL);
620 gpio_request(GPIO_FN_VIO1_D5, NULL);
621 gpio_request(GPIO_FN_VIO1_D4, NULL);
622 gpio_request(GPIO_FN_VIO1_D3, NULL);
623 gpio_request(GPIO_FN_VIO1_D2, NULL);
624 gpio_request(GPIO_FN_VIO1_D1, NULL);
625 gpio_request(GPIO_FN_VIO1_D0, NULL);
626 gpio_request(GPIO_FN_VIO1_FLD, NULL);
627 gpio_request(GPIO_FN_VIO1_HD, NULL);
628 gpio_request(GPIO_FN_VIO1_VD, NULL);
629 gpio_request(GPIO_FN_VIO1_CLK, NULL);
630 platform_resource_setup_memory(&ceu1_device, "ceu1", 4 << 20);
631
632 /* enable KEYSC */
633 gpio_request(GPIO_FN_KEYOUT5_IN5, NULL);
634 gpio_request(GPIO_FN_KEYOUT4_IN6, NULL);
635 gpio_request(GPIO_FN_KEYOUT3, NULL);
636 gpio_request(GPIO_FN_KEYOUT2, NULL);
637 gpio_request(GPIO_FN_KEYOUT1, NULL);
638 gpio_request(GPIO_FN_KEYOUT0, NULL);
639 gpio_request(GPIO_FN_KEYIN0, NULL);
640
641 /* enable user debug switch */
642 gpio_request(GPIO_PTR0, NULL);
643 gpio_request(GPIO_PTR4, NULL);
644 gpio_request(GPIO_PTR5, NULL);
645 gpio_request(GPIO_PTR6, NULL);
646 gpio_direction_input(GPIO_PTR0);
647 gpio_direction_input(GPIO_PTR4);
648 gpio_direction_input(GPIO_PTR5);
649 gpio_direction_input(GPIO_PTR6);
650
651 /* enable I2C device */
652 i2c_register_board_info(1, i2c1_devices,
653 ARRAY_SIZE(i2c1_devices));
654
655 return platform_add_devices(ecovec_devices,
656 ARRAY_SIZE(ecovec_devices));
657}
658arch_initcall(arch_setup);
659
660static int __init devices_setup(void)
661{
662 sh_eth_init();
663 return 0;
664}
665device_initcall(devices_setup);
666
667
668static struct sh_machine_vector mv_ecovec __initmv = {
669 .mv_name = "R0P7724 (EcoVec)",
670};
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-23 20:56:57 -0500