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-rw-r--r--arch/sh/boards/mach-ap325rxa/Makefile2
-rw-r--r--arch/sh/boards/mach-ap325rxa/sdram.S69
-rw-r--r--arch/sh/boards/mach-ap325rxa/setup.c657
3 files changed, 728 insertions, 0 deletions
diff --git a/arch/sh/boards/mach-ap325rxa/Makefile b/arch/sh/boards/mach-ap325rxa/Makefile
new file mode 100644
index 000000000000..4cf1774d2613
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/Makefile
@@ -0,0 +1,2 @@
1obj-y := setup.o sdram.o
2
diff --git a/arch/sh/boards/mach-ap325rxa/sdram.S b/arch/sh/boards/mach-ap325rxa/sdram.S
new file mode 100644
index 000000000000..db24fbed4fca
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/sdram.S
@@ -0,0 +1,69 @@
1/*
2 * AP325RXA sdram self/auto-refresh setup code
3 *
4 * Copyright (C) 2009 Magnus Damm
5 *
6 * This file is subject to the terms and conditions of the GNU General Public
7 * License. See the file "COPYING" in the main directory of this archive
8 * for more details.
9 */
10
11#include <linux/sys.h>
12#include <linux/errno.h>
13#include <linux/linkage.h>
14#include <asm/asm-offsets.h>
15#include <asm/suspend.h>
16#include <asm/romimage-macros.h>
17
18/* code to enter and leave self-refresh. must be self-contained.
19 * this code will be copied to on-chip memory and executed from there.
20 */
21 .balign 4
22ENTRY(ap325rxa_sdram_enter_start)
23
24 /* SBSC: disable power down and put in self-refresh mode */
25 mov.l 1f, r4
26 mov.l 2f, r1
27 mov.l @r4, r2
28 or r1, r2
29 mov.l 3f, r3
30 and r3, r2
31 mov.l r2, @r4
32
33 rts
34 nop
35
36 .balign 4
371: .long 0xfe400008 /* SDCR0 */
382: .long 0x00000400
393: .long 0xffff7fff
40ENTRY(ap325rxa_sdram_enter_end)
41
42 .balign 4
43ENTRY(ap325rxa_sdram_leave_start)
44
45 /* SBSC: set auto-refresh mode */
46 mov.l 1f, r4
47 mov.l @r4, r0
48 mov.l 4f, r1
49 and r1, r0
50 mov.l r0, @r4
51 mov.l 6f, r4
52 mov.l 8f, r0
53 mov.l @r4, r1
54 mov #-1, r4
55 add r4, r1
56 or r1, r0
57 mov.l 7f, r1
58 mov.l r0, @r1
59
60 rts
61 nop
62
63 .balign 4
641: .long 0xfe400008 /* SDCR0 */
654: .long 0xfffffbff
666: .long 0xfe40001c /* RTCOR */
677: .long 0xfe400018 /* RTCNT */
688: .long 0xa55a0000
69ENTRY(ap325rxa_sdram_leave_end)
diff --git a/arch/sh/boards/mach-ap325rxa/setup.c b/arch/sh/boards/mach-ap325rxa/setup.c
new file mode 100644
index 000000000000..cf9dc12dfeb1
--- /dev/null
+++ b/arch/sh/boards/mach-ap325rxa/setup.c
@@ -0,0 +1,657 @@
1/*
2 * Renesas - AP-325RXA
3 * (Compatible with Algo System ., LTD. - AP-320A)
4 *
5 * Copyright (C) 2008 Renesas Solutions Corp.
6 * Author : Yusuke Goda <goda.yuske@renesas.com>
7 *
8 * This file is subject to the terms and conditions of the GNU General Public
9 * License. See the file "COPYING" in the main directory of this archive
10 * for more details.
11 */
12
13#include <linux/init.h>
14#include <linux/device.h>
15#include <linux/interrupt.h>
16#include <linux/platform_device.h>
17#include <linux/mtd/physmap.h>
18#include <linux/mtd/sh_flctl.h>
19#include <linux/delay.h>
20#include <linux/i2c.h>
21#include <linux/smsc911x.h>
22#include <linux/gpio.h>
23#include <media/ov772x.h>
24#include <media/soc_camera.h>
25#include <media/soc_camera_platform.h>
26#include <media/sh_mobile_ceu.h>
27#include <video/sh_mobile_lcdc.h>
28#include <asm/io.h>
29#include <asm/clock.h>
30#include <asm/suspend.h>
31#include <cpu/sh7723.h>
32
33static struct smsc911x_platform_config smsc911x_config = {
34 .phy_interface = PHY_INTERFACE_MODE_MII,
35 .irq_polarity = SMSC911X_IRQ_POLARITY_ACTIVE_LOW,
36 .irq_type = SMSC911X_IRQ_TYPE_OPEN_DRAIN,
37 .flags = SMSC911X_USE_32BIT,
38};
39
40static struct resource smsc9118_resources[] = {
41 [0] = {
42 .start = 0xb6080000,
43 .end = 0xb60fffff,
44 .flags = IORESOURCE_MEM,
45 },
46 [1] = {
47 .start = 35,
48 .end = 35,
49 .flags = IORESOURCE_IRQ,
50 }
51};
52
53static struct platform_device smsc9118_device = {
54 .name = "smsc911x",
55 .id = -1,
56 .num_resources = ARRAY_SIZE(smsc9118_resources),
57 .resource = smsc9118_resources,
58 .dev = {
59 .platform_data = &smsc911x_config,
60 },
61};
62
63/*
64 * AP320 and AP325RXA has CPLD data in NOR Flash(0xA80000-0xABFFFF).
65 * If this area erased, this board can not boot.
66 */
67static struct mtd_partition ap325rxa_nor_flash_partitions[] = {
68 {
69 .name = "uboot",
70 .offset = 0,
71 .size = (1 * 1024 * 1024),
72 .mask_flags = MTD_WRITEABLE, /* Read-only */
73 }, {
74 .name = "kernel",
75 .offset = MTDPART_OFS_APPEND,
76 .size = (2 * 1024 * 1024),
77 }, {
78 .name = "free-area0",
79 .offset = MTDPART_OFS_APPEND,
80 .size = ((7 * 1024 * 1024) + (512 * 1024)),
81 }, {
82 .name = "CPLD-Data",
83 .offset = MTDPART_OFS_APPEND,
84 .mask_flags = MTD_WRITEABLE, /* Read-only */
85 .size = (1024 * 128 * 2),
86 }, {
87 .name = "free-area1",
88 .offset = MTDPART_OFS_APPEND,
89 .size = MTDPART_SIZ_FULL,
90 },
91};
92
93static struct physmap_flash_data ap325rxa_nor_flash_data = {
94 .width = 2,
95 .parts = ap325rxa_nor_flash_partitions,
96 .nr_parts = ARRAY_SIZE(ap325rxa_nor_flash_partitions),
97};
98
99static struct resource ap325rxa_nor_flash_resources[] = {
100 [0] = {
101 .name = "NOR Flash",
102 .start = 0x00000000,
103 .end = 0x00ffffff,
104 .flags = IORESOURCE_MEM,
105 }
106};
107
108static struct platform_device ap325rxa_nor_flash_device = {
109 .name = "physmap-flash",
110 .resource = ap325rxa_nor_flash_resources,
111 .num_resources = ARRAY_SIZE(ap325rxa_nor_flash_resources),
112 .dev = {
113 .platform_data = &ap325rxa_nor_flash_data,
114 },
115};
116
117static struct mtd_partition nand_partition_info[] = {
118 {
119 .name = "nand_data",
120 .offset = 0,
121 .size = MTDPART_SIZ_FULL,
122 },
123};
124
125static struct resource nand_flash_resources[] = {
126 [0] = {
127 .start = 0xa4530000,
128 .end = 0xa45300ff,
129 .flags = IORESOURCE_MEM,
130 }
131};
132
133static struct sh_flctl_platform_data nand_flash_data = {
134 .parts = nand_partition_info,
135 .nr_parts = ARRAY_SIZE(nand_partition_info),
136 .flcmncr_val = FCKSEL_E | TYPESEL_SET | NANWF_E,
137 .has_hwecc = 1,
138};
139
140static struct platform_device nand_flash_device = {
141 .name = "sh_flctl",
142 .resource = nand_flash_resources,
143 .num_resources = ARRAY_SIZE(nand_flash_resources),
144 .dev = {
145 .platform_data = &nand_flash_data,
146 },
147};
148
149#define FPGA_LCDREG 0xB4100180
150#define FPGA_BKLREG 0xB4100212
151#define FPGA_LCDREG_VAL 0x0018
152#define PORT_MSELCRB 0xA4050182
153#define PORT_HIZCRC 0xA405015C
154#define PORT_DRVCRA 0xA405018A
155#define PORT_DRVCRB 0xA405018C
156
157static void ap320_wvga_power_on(void *board_data)
158{
159 msleep(100);
160
161 /* ASD AP-320/325 LCD ON */
162 ctrl_outw(FPGA_LCDREG_VAL, FPGA_LCDREG);
163
164 /* backlight */
165 gpio_set_value(GPIO_PTS3, 0);
166 ctrl_outw(0x100, FPGA_BKLREG);
167}
168
169static void ap320_wvga_power_off(void *board_data)
170{
171 /* backlight */
172 ctrl_outw(0, FPGA_BKLREG);
173 gpio_set_value(GPIO_PTS3, 1);
174
175 /* ASD AP-320/325 LCD OFF */
176 ctrl_outw(0, FPGA_LCDREG);
177}
178
179static struct sh_mobile_lcdc_info lcdc_info = {
180 .clock_source = LCDC_CLK_EXTERNAL,
181 .ch[0] = {
182 .chan = LCDC_CHAN_MAINLCD,
183 .bpp = 16,
184 .interface_type = RGB18,
185 .clock_divider = 1,
186 .lcd_cfg = {
187 .name = "LB070WV1",
188 .xres = 800,
189 .yres = 480,
190 .left_margin = 32,
191 .right_margin = 160,
192 .hsync_len = 8,
193 .upper_margin = 63,
194 .lower_margin = 80,
195 .vsync_len = 1,
196 .sync = 0, /* hsync and vsync are active low */
197 },
198 .lcd_size_cfg = { /* 7.0 inch */
199 .width = 152,
200 .height = 91,
201 },
202 .board_cfg = {
203 .display_on = ap320_wvga_power_on,
204 .display_off = ap320_wvga_power_off,
205 },
206 }
207};
208
209static struct resource lcdc_resources[] = {
210 [0] = {
211 .name = "LCDC",
212 .start = 0xfe940000, /* P4-only space */
213 .end = 0xfe942fff,
214 .flags = IORESOURCE_MEM,
215 },
216 [1] = {
217 .start = 28,
218 .flags = IORESOURCE_IRQ,
219 },
220};
221
222static struct platform_device lcdc_device = {
223 .name = "sh_mobile_lcdc_fb",
224 .num_resources = ARRAY_SIZE(lcdc_resources),
225 .resource = lcdc_resources,
226 .dev = {
227 .platform_data = &lcdc_info,
228 },
229 .archdata = {
230 .hwblk_id = HWBLK_LCDC,
231 },
232};
233
234static void camera_power(int val)
235{
236 gpio_set_value(GPIO_PTZ5, val); /* RST_CAM/RSTB */
237 mdelay(10);
238}
239
240#ifdef CONFIG_I2C
241/* support for the old ncm03j camera */
242static unsigned char camera_ncm03j_magic[] =
243{
244 0x87, 0x00, 0x88, 0x08, 0x89, 0x01, 0x8A, 0xE8,
245 0x1D, 0x00, 0x1E, 0x8A, 0x21, 0x00, 0x33, 0x36,
246 0x36, 0x60, 0x37, 0x08, 0x3B, 0x31, 0x44, 0x0F,
247 0x46, 0xF0, 0x4B, 0x28, 0x4C, 0x21, 0x4D, 0x55,
248 0x4E, 0x1B, 0x4F, 0xC7, 0x50, 0xFC, 0x51, 0x12,
249 0x58, 0x02, 0x66, 0xC0, 0x67, 0x46, 0x6B, 0xA0,
250 0x6C, 0x34, 0x7E, 0x25, 0x7F, 0x25, 0x8D, 0x0F,
251 0x92, 0x40, 0x93, 0x04, 0x94, 0x26, 0x95, 0x0A,
252 0x99, 0x03, 0x9A, 0xF0, 0x9B, 0x14, 0x9D, 0x7A,
253 0xC5, 0x02, 0xD6, 0x07, 0x59, 0x00, 0x5A, 0x1A,
254 0x5B, 0x2A, 0x5C, 0x37, 0x5D, 0x42, 0x5E, 0x56,
255 0xC8, 0x00, 0xC9, 0x1A, 0xCA, 0x2A, 0xCB, 0x37,
256 0xCC, 0x42, 0xCD, 0x56, 0xCE, 0x00, 0xCF, 0x1A,
257 0xD0, 0x2A, 0xD1, 0x37, 0xD2, 0x42, 0xD3, 0x56,
258 0x5F, 0x68, 0x60, 0x87, 0x61, 0xA3, 0x62, 0xBC,
259 0x63, 0xD4, 0x64, 0xEA, 0xD6, 0x0F,
260};
261
262static int camera_probe(void)
263{
264 struct i2c_adapter *a = i2c_get_adapter(0);
265 struct i2c_msg msg;
266 int ret;
267
268 if (!a)
269 return -ENODEV;
270
271 camera_power(1);
272 msg.addr = 0x6e;
273 msg.buf = camera_ncm03j_magic;
274 msg.len = 2;
275 msg.flags = 0;
276 ret = i2c_transfer(a, &msg, 1);
277 camera_power(0);
278
279 return ret;
280}
281
282static int camera_set_capture(struct soc_camera_platform_info *info,
283 int enable)
284{
285 struct i2c_adapter *a = i2c_get_adapter(0);
286 struct i2c_msg msg;
287 int ret = 0;
288 int i;
289
290 camera_power(0);
291 if (!enable)
292 return 0; /* no disable for now */
293
294 camera_power(1);
295 for (i = 0; i < ARRAY_SIZE(camera_ncm03j_magic); i += 2) {
296 u_int8_t buf[8];
297
298 msg.addr = 0x6e;
299 msg.buf = buf;
300 msg.len = 2;
301 msg.flags = 0;
302
303 buf[0] = camera_ncm03j_magic[i];
304 buf[1] = camera_ncm03j_magic[i + 1];
305
306 ret = (ret < 0) ? ret : i2c_transfer(a, &msg, 1);
307 }
308
309 return ret;
310}
311
312static int ap325rxa_camera_add(struct soc_camera_link *icl, struct device *dev);
313static void ap325rxa_camera_del(struct soc_camera_link *icl);
314
315static struct soc_camera_platform_info camera_info = {
316 .format_name = "UYVY",
317 .format_depth = 16,
318 .format = {
319 .pixelformat = V4L2_PIX_FMT_UYVY,
320 .colorspace = V4L2_COLORSPACE_SMPTE170M,
321 .width = 640,
322 .height = 480,
323 },
324 .bus_param = SOCAM_PCLK_SAMPLE_RISING | SOCAM_HSYNC_ACTIVE_HIGH |
325 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_MASTER | SOCAM_DATAWIDTH_8,
326 .set_capture = camera_set_capture,
327 .link = {
328 .bus_id = 0,
329 .add_device = ap325rxa_camera_add,
330 .del_device = ap325rxa_camera_del,
331 .module_name = "soc_camera_platform",
332 },
333};
334
335static void dummy_release(struct device *dev)
336{
337}
338
339static struct platform_device camera_device = {
340 .name = "soc_camera_platform",
341 .dev = {
342 .platform_data = &camera_info,
343 .release = dummy_release,
344 },
345};
346
347static int ap325rxa_camera_add(struct soc_camera_link *icl,
348 struct device *dev)
349{
350 if (icl != &camera_info.link || camera_probe() <= 0)
351 return -ENODEV;
352
353 camera_info.dev = dev;
354
355 return platform_device_register(&camera_device);
356}
357
358static void ap325rxa_camera_del(struct soc_camera_link *icl)
359{
360 if (icl != &camera_info.link)
361 return;
362
363 platform_device_unregister(&camera_device);
364 memset(&camera_device.dev.kobj, 0,
365 sizeof(camera_device.dev.kobj));
366}
367#endif /* CONFIG_I2C */
368
369static int ov7725_power(struct device *dev, int mode)
370{
371 camera_power(0);
372 if (mode)
373 camera_power(1);
374
375 return 0;
376}
377
378static struct sh_mobile_ceu_info sh_mobile_ceu_info = {
379 .flags = SH_CEU_FLAG_USE_8BIT_BUS,
380};
381
382static struct resource ceu_resources[] = {
383 [0] = {
384 .name = "CEU",
385 .start = 0xfe910000,
386 .end = 0xfe91009f,
387 .flags = IORESOURCE_MEM,
388 },
389 [1] = {
390 .start = 52,
391 .flags = IORESOURCE_IRQ,
392 },
393 [2] = {
394 /* place holder for contiguous memory */
395 },
396};
397
398static struct platform_device ceu_device = {
399 .name = "sh_mobile_ceu",
400 .id = 0, /* "ceu0" clock */
401 .num_resources = ARRAY_SIZE(ceu_resources),
402 .resource = ceu_resources,
403 .dev = {
404 .platform_data = &sh_mobile_ceu_info,
405 },
406 .archdata = {
407 .hwblk_id = HWBLK_CEU,
408 },
409};
410
411static struct resource sdhi0_cn3_resources[] = {
412 [0] = {
413 .name = "SDHI0",
414 .start = 0x04ce0000,
415 .end = 0x04ce01ff,
416 .flags = IORESOURCE_MEM,
417 },
418 [1] = {
419 .start = 101,
420 .flags = IORESOURCE_IRQ,
421 },
422};
423
424static struct platform_device sdhi0_cn3_device = {
425 .name = "sh_mobile_sdhi",
426 .id = 0, /* "sdhi0" clock */
427 .num_resources = ARRAY_SIZE(sdhi0_cn3_resources),
428 .resource = sdhi0_cn3_resources,
429 .archdata = {
430 .hwblk_id = HWBLK_SDHI0,
431 },
432};
433
434static struct resource sdhi1_cn7_resources[] = {
435 [0] = {
436 .name = "SDHI1",
437 .start = 0x04cf0000,
438 .end = 0x04cf01ff,
439 .flags = IORESOURCE_MEM,
440 },
441 [1] = {
442 .start = 24,
443 .flags = IORESOURCE_IRQ,
444 },
445};
446
447static struct platform_device sdhi1_cn7_device = {
448 .name = "sh_mobile_sdhi",
449 .id = 1, /* "sdhi1" clock */
450 .num_resources = ARRAY_SIZE(sdhi1_cn7_resources),
451 .resource = sdhi1_cn7_resources,
452 .archdata = {
453 .hwblk_id = HWBLK_SDHI1,
454 },
455};
456
457static struct i2c_board_info __initdata ap325rxa_i2c_devices[] = {
458 {
459 I2C_BOARD_INFO("pcf8563", 0x51),
460 },
461};
462
463static struct i2c_board_info ap325rxa_i2c_camera[] = {
464 {
465 I2C_BOARD_INFO("ov772x", 0x21),
466 },
467};
468
469static struct ov772x_camera_info ov7725_info = {
470 .buswidth = SOCAM_DATAWIDTH_8,
471 .flags = OV772X_FLAG_VFLIP | OV772X_FLAG_HFLIP,
472 .edgectrl = OV772X_AUTO_EDGECTRL(0xf, 0),
473 .link = {
474 .bus_id = 0,
475 .power = ov7725_power,
476 .board_info = &ap325rxa_i2c_camera[0],
477 .i2c_adapter_id = 0,
478 .module_name = "ov772x",
479 },
480};
481
482static struct platform_device ap325rxa_camera[] = {
483 {
484 .name = "soc-camera-pdrv",
485 .id = 0,
486 .dev = {
487 .platform_data = &ov7725_info.link,
488 },
489 }, {
490 .name = "soc-camera-pdrv",
491 .id = 1,
492 .dev = {
493 .platform_data = &camera_info.link,
494 },
495 },
496};
497
498static struct platform_device *ap325rxa_devices[] __initdata = {
499 &smsc9118_device,
500 &ap325rxa_nor_flash_device,
501 &lcdc_device,
502 &ceu_device,
503 &nand_flash_device,
504 &sdhi0_cn3_device,
505 &sdhi1_cn7_device,
506 &ap325rxa_camera[0],
507 &ap325rxa_camera[1],
508};
509
510extern char ap325rxa_sdram_enter_start;
511extern char ap325rxa_sdram_enter_end;
512extern char ap325rxa_sdram_leave_start;
513extern char ap325rxa_sdram_leave_end;
514
515static int __init ap325rxa_devices_setup(void)
516{
517 /* register board specific self-refresh code */
518 sh_mobile_register_self_refresh(SUSP_SH_STANDBY | SUSP_SH_SF,
519 &ap325rxa_sdram_enter_start,
520 &ap325rxa_sdram_enter_end,
521 &ap325rxa_sdram_leave_start,
522 &ap325rxa_sdram_leave_end);
523
524 /* LD3 and LD4 LEDs */
525 gpio_request(GPIO_PTX5, NULL); /* RUN */
526 gpio_direction_output(GPIO_PTX5, 1);
527 gpio_export(GPIO_PTX5, 0);
528
529 gpio_request(GPIO_PTX4, NULL); /* INDICATOR */
530 gpio_direction_output(GPIO_PTX4, 0);
531 gpio_export(GPIO_PTX4, 0);
532
533 /* SW1 input */
534 gpio_request(GPIO_PTF7, NULL); /* MODE */
535 gpio_direction_input(GPIO_PTF7);
536 gpio_export(GPIO_PTF7, 0);
537
538 /* LCDC */
539 gpio_request(GPIO_FN_LCDD15, NULL);
540 gpio_request(GPIO_FN_LCDD14, NULL);
541 gpio_request(GPIO_FN_LCDD13, NULL);
542 gpio_request(GPIO_FN_LCDD12, NULL);
543 gpio_request(GPIO_FN_LCDD11, NULL);
544 gpio_request(GPIO_FN_LCDD10, NULL);
545 gpio_request(GPIO_FN_LCDD9, NULL);
546 gpio_request(GPIO_FN_LCDD8, NULL);
547 gpio_request(GPIO_FN_LCDD7, NULL);
548 gpio_request(GPIO_FN_LCDD6, NULL);
549 gpio_request(GPIO_FN_LCDD5, NULL);
550 gpio_request(GPIO_FN_LCDD4, NULL);
551 gpio_request(GPIO_FN_LCDD3, NULL);
552 gpio_request(GPIO_FN_LCDD2, NULL);
553 gpio_request(GPIO_FN_LCDD1, NULL);
554 gpio_request(GPIO_FN_LCDD0, NULL);
555 gpio_request(GPIO_FN_LCDLCLK_PTR, NULL);
556 gpio_request(GPIO_FN_LCDDCK, NULL);
557 gpio_request(GPIO_FN_LCDVEPWC, NULL);
558 gpio_request(GPIO_FN_LCDVCPWC, NULL);
559 gpio_request(GPIO_FN_LCDVSYN, NULL);
560 gpio_request(GPIO_FN_LCDHSYN, NULL);
561 gpio_request(GPIO_FN_LCDDISP, NULL);
562 gpio_request(GPIO_FN_LCDDON, NULL);
563
564 /* LCD backlight */
565 gpio_request(GPIO_PTS3, NULL);
566 gpio_direction_output(GPIO_PTS3, 1);
567
568 /* CEU */
569 gpio_request(GPIO_FN_VIO_CLK2, NULL);
570 gpio_request(GPIO_FN_VIO_VD2, NULL);
571 gpio_request(GPIO_FN_VIO_HD2, NULL);
572 gpio_request(GPIO_FN_VIO_FLD, NULL);
573 gpio_request(GPIO_FN_VIO_CKO, NULL);
574 gpio_request(GPIO_FN_VIO_D15, NULL);
575 gpio_request(GPIO_FN_VIO_D14, NULL);
576 gpio_request(GPIO_FN_VIO_D13, NULL);
577 gpio_request(GPIO_FN_VIO_D12, NULL);
578 gpio_request(GPIO_FN_VIO_D11, NULL);
579 gpio_request(GPIO_FN_VIO_D10, NULL);
580 gpio_request(GPIO_FN_VIO_D9, NULL);
581 gpio_request(GPIO_FN_VIO_D8, NULL);
582
583 gpio_request(GPIO_PTZ7, NULL);
584 gpio_direction_output(GPIO_PTZ7, 0); /* OE_CAM */
585 gpio_request(GPIO_PTZ6, NULL);
586 gpio_direction_output(GPIO_PTZ6, 0); /* STBY_CAM */
587 gpio_request(GPIO_PTZ5, NULL);
588 gpio_direction_output(GPIO_PTZ5, 0); /* RST_CAM */
589 gpio_request(GPIO_PTZ4, NULL);
590 gpio_direction_output(GPIO_PTZ4, 0); /* SADDR */
591
592 ctrl_outw(ctrl_inw(PORT_MSELCRB) & ~0x0001, PORT_MSELCRB);
593
594 /* FLCTL */
595 gpio_request(GPIO_FN_FCE, NULL);
596 gpio_request(GPIO_FN_NAF7, NULL);
597 gpio_request(GPIO_FN_NAF6, NULL);
598 gpio_request(GPIO_FN_NAF5, NULL);
599 gpio_request(GPIO_FN_NAF4, NULL);
600 gpio_request(GPIO_FN_NAF3, NULL);
601 gpio_request(GPIO_FN_NAF2, NULL);
602 gpio_request(GPIO_FN_NAF1, NULL);
603 gpio_request(GPIO_FN_NAF0, NULL);
604 gpio_request(GPIO_FN_FCDE, NULL);
605 gpio_request(GPIO_FN_FOE, NULL);
606 gpio_request(GPIO_FN_FSC, NULL);
607 gpio_request(GPIO_FN_FWE, NULL);
608 gpio_request(GPIO_FN_FRB, NULL);
609
610 ctrl_outw(0, PORT_HIZCRC);
611 ctrl_outw(0xFFFF, PORT_DRVCRA);
612 ctrl_outw(0xFFFF, PORT_DRVCRB);
613
614 platform_resource_setup_memory(&ceu_device, "ceu", 4 << 20);
615
616 /* SDHI0 - CN3 - SD CARD */
617 gpio_request(GPIO_FN_SDHI0CD_PTD, NULL);
618 gpio_request(GPIO_FN_SDHI0WP_PTD, NULL);
619 gpio_request(GPIO_FN_SDHI0D3_PTD, NULL);
620 gpio_request(GPIO_FN_SDHI0D2_PTD, NULL);
621 gpio_request(GPIO_FN_SDHI0D1_PTD, NULL);
622 gpio_request(GPIO_FN_SDHI0D0_PTD, NULL);
623 gpio_request(GPIO_FN_SDHI0CMD_PTD, NULL);
624 gpio_request(GPIO_FN_SDHI0CLK_PTD, NULL);
625
626 /* SDHI1 - CN7 - MICRO SD CARD */
627 gpio_request(GPIO_FN_SDHI1CD, NULL);
628 gpio_request(GPIO_FN_SDHI1D3, NULL);
629 gpio_request(GPIO_FN_SDHI1D2, NULL);
630 gpio_request(GPIO_FN_SDHI1D1, NULL);
631 gpio_request(GPIO_FN_SDHI1D0, NULL);
632 gpio_request(GPIO_FN_SDHI1CMD, NULL);
633 gpio_request(GPIO_FN_SDHI1CLK, NULL);
634
635 i2c_register_board_info(0, ap325rxa_i2c_devices,
636 ARRAY_SIZE(ap325rxa_i2c_devices));
637
638 return platform_add_devices(ap325rxa_devices,
639 ARRAY_SIZE(ap325rxa_devices));
640}
641arch_initcall(ap325rxa_devices_setup);
642
643/* Return the board specific boot mode pin configuration */
644static int ap325rxa_mode_pins(void)
645{
646 /* MD0=0, MD1=0, MD2=0: Clock Mode 0
647 * MD3=0: 16-bit Area0 Bus Width
648 * MD5=1: Little Endian
649 * TSTMD=1, MD8=1: Test Mode Disabled
650 */
651 return MODE_PIN5 | MODE_PIN8;
652}
653
654static struct sh_machine_vector mv_ap325rxa __initmv = {
655 .mv_name = "AP-325RXA",
656 .mv_mode_pins = ap325rxa_mode_pins,
657};
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-11 22:02:29 -0500