diff options
Diffstat (limited to 'arch/sh/boards/bigsur')
-rw-r--r-- | arch/sh/boards/bigsur/irq.c | 47 |
1 files changed, 17 insertions, 30 deletions
diff --git a/arch/sh/boards/bigsur/irq.c b/arch/sh/boards/bigsur/irq.c index ac946a2201c7..1ab04da36382 100644 --- a/arch/sh/boards/bigsur/irq.c +++ b/arch/sh/boards/bigsur/irq.c | |||
@@ -19,6 +19,7 @@ | |||
19 | * IRQ functions for a Hitachi Big Sur Evaluation Board. | 19 | * IRQ functions for a Hitachi Big Sur Evaluation Board. |
20 | * | 20 | * |
21 | */ | 21 | */ |
22 | #undef DEBUG | ||
22 | 23 | ||
23 | #include <linux/sched.h> | 24 | #include <linux/sched.h> |
24 | #include <linux/module.h> | 25 | #include <linux/module.h> |
@@ -41,10 +42,8 @@ | |||
41 | #undef BIGSUR_DEBUG | 42 | #undef BIGSUR_DEBUG |
42 | 43 | ||
43 | #ifdef BIGSUR_DEBUG | 44 | #ifdef BIGSUR_DEBUG |
44 | #define DPRINTK(args...) printk(args) | ||
45 | #define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) | 45 | #define DIPRINTK(n, args...) if (BIGSUR_DEBUG>(n)) printk(args) |
46 | #else | 46 | #else |
47 | #define DPRINTK(args...) | ||
48 | #define DIPRINTK(n, args...) | 47 | #define DIPRINTK(n, args...) |
49 | #endif /* BIGSUR_DEBUG */ | 48 | #endif /* BIGSUR_DEBUG */ |
50 | 49 | ||
@@ -60,45 +59,39 @@ extern int hd64465_irq_demux(int irq); | |||
60 | /* Level 1 IRQ routines */ | 59 | /* Level 1 IRQ routines */ |
61 | static void disable_bigsur_l1irq(unsigned int irq) | 60 | static void disable_bigsur_l1irq(unsigned int irq) |
62 | { | 61 | { |
63 | unsigned long flags; | ||
64 | unsigned char mask; | 62 | unsigned char mask; |
65 | unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; | 63 | unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; |
66 | unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); | 64 | unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); |
67 | 65 | ||
68 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { | 66 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { |
69 | DPRINTK("Disable L1 IRQ %d\n", irq); | 67 | pr_debug("Disable L1 IRQ %d\n", irq); |
70 | DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", | 68 | DIPRINTK(2,"disable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", |
71 | mask_port, bit); | 69 | mask_port, bit); |
72 | local_irq_save(flags); | ||
73 | 70 | ||
74 | /* Disable IRQ - set mask bit */ | 71 | /* Disable IRQ - set mask bit */ |
75 | mask = inb(mask_port) | bit; | 72 | mask = inb(mask_port) | bit; |
76 | outb(mask, mask_port); | 73 | outb(mask, mask_port); |
77 | local_irq_restore(flags); | ||
78 | return; | 74 | return; |
79 | } | 75 | } |
80 | DPRINTK("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); | 76 | pr_debug("disable_bigsur_l1irq: Invalid IRQ %d\n", irq); |
81 | } | 77 | } |
82 | 78 | ||
83 | static void enable_bigsur_l1irq(unsigned int irq) | 79 | static void enable_bigsur_l1irq(unsigned int irq) |
84 | { | 80 | { |
85 | unsigned long flags; | ||
86 | unsigned char mask; | 81 | unsigned char mask; |
87 | unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; | 82 | unsigned int mask_port = ((irq - BIGSUR_IRQ_LOW)/8) ? BIGSUR_IRLMR1 : BIGSUR_IRLMR0; |
88 | unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); | 83 | unsigned char bit = (1 << ((irq - MGATE_IRQ_LOW)%8) ); |
89 | 84 | ||
90 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { | 85 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { |
91 | DPRINTK("Enable L1 IRQ %d\n", irq); | 86 | pr_debug("Enable L1 IRQ %d\n", irq); |
92 | DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", | 87 | DIPRINTK(2,"enable_bigsur_l1irq: IMR=0x%08x mask=0x%x\n", |
93 | mask_port, bit); | 88 | mask_port, bit); |
94 | local_irq_save(flags); | ||
95 | /* Enable L1 IRQ - clear mask bit */ | 89 | /* Enable L1 IRQ - clear mask bit */ |
96 | mask = inb(mask_port) & ~bit; | 90 | mask = inb(mask_port) & ~bit; |
97 | outb(mask, mask_port); | 91 | outb(mask, mask_port); |
98 | local_irq_restore(flags); | ||
99 | return; | 92 | return; |
100 | } | 93 | } |
101 | DPRINTK("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); | 94 | pr_debug("enable_bigsur_l1irq: Invalid IRQ %d\n", irq); |
102 | } | 95 | } |
103 | 96 | ||
104 | 97 | ||
@@ -126,51 +119,45 @@ static const u32 imr_offset = BIGSUR_IMR0 - BIGSUR_IMR1; | |||
126 | /* Level 2 IRQ routines */ | 119 | /* Level 2 IRQ routines */ |
127 | static void disable_bigsur_l2irq(unsigned int irq) | 120 | static void disable_bigsur_l2irq(unsigned int irq) |
128 | { | 121 | { |
129 | unsigned long flags; | ||
130 | unsigned char mask; | 122 | unsigned char mask; |
131 | unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); | 123 | unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); |
132 | unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; | 124 | unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; |
133 | 125 | ||
134 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { | 126 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { |
135 | DPRINTK("Disable L2 IRQ %d\n", irq); | 127 | pr_debug("Disable L2 IRQ %d\n", irq); |
136 | DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", | 128 | DIPRINTK(2,"disable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", |
137 | mask_port, bit); | 129 | mask_port, bit); |
138 | local_irq_save(flags); | ||
139 | 130 | ||
140 | /* Disable L2 IRQ - set mask bit */ | 131 | /* Disable L2 IRQ - set mask bit */ |
141 | mask = inb(mask_port) | bit; | 132 | mask = inb(mask_port) | bit; |
142 | outb(mask, mask_port); | 133 | outb(mask, mask_port); |
143 | local_irq_restore(flags); | ||
144 | return; | 134 | return; |
145 | } | 135 | } |
146 | DPRINTK("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); | 136 | pr_debug("disable_bigsur_l2irq: Invalid IRQ %d\n", irq); |
147 | } | 137 | } |
148 | 138 | ||
149 | static void enable_bigsur_l2irq(unsigned int irq) | 139 | static void enable_bigsur_l2irq(unsigned int irq) |
150 | { | 140 | { |
151 | unsigned long flags; | ||
152 | unsigned char mask; | 141 | unsigned char mask; |
153 | unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); | 142 | unsigned char bit = 1 << ((irq-BIGSUR_2NDLVL_IRQ_LOW)%8); |
154 | unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; | 143 | unsigned int mask_port = imr_base - REG_NUM(irq)*imr_offset; |
155 | 144 | ||
156 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { | 145 | if(irq >= BIGSUR_2NDLVL_IRQ_LOW && irq < BIGSUR_2NDLVL_IRQ_HIGH) { |
157 | DPRINTK("Enable L2 IRQ %d\n", irq); | 146 | pr_debug("Enable L2 IRQ %d\n", irq); |
158 | DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", | 147 | DIPRINTK(2,"enable_bigsur_l2irq: IMR=0x%08x mask=0x%x\n", |
159 | mask_port, bit); | 148 | mask_port, bit); |
160 | local_irq_save(flags); | ||
161 | 149 | ||
162 | /* Enable L2 IRQ - clear mask bit */ | 150 | /* Enable L2 IRQ - clear mask bit */ |
163 | mask = inb(mask_port) & ~bit; | 151 | mask = inb(mask_port) & ~bit; |
164 | outb(mask, mask_port); | 152 | outb(mask, mask_port); |
165 | local_irq_restore(flags); | ||
166 | return; | 153 | return; |
167 | } | 154 | } |
168 | DPRINTK("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); | 155 | pr_debug("enable_bigsur_l2irq: Invalid IRQ %d\n", irq); |
169 | } | 156 | } |
170 | 157 | ||
171 | static void mask_and_ack_bigsur(unsigned int irq) | 158 | static void mask_and_ack_bigsur(unsigned int irq) |
172 | { | 159 | { |
173 | DPRINTK("mask_and_ack_bigsur IRQ %d\n", irq); | 160 | pr_debug("mask_and_ack_bigsur IRQ %d\n", irq); |
174 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) | 161 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) |
175 | disable_bigsur_l1irq(irq); | 162 | disable_bigsur_l1irq(irq); |
176 | else | 163 | else |
@@ -179,7 +166,7 @@ static void mask_and_ack_bigsur(unsigned int irq) | |||
179 | 166 | ||
180 | static void end_bigsur_irq(unsigned int irq) | 167 | static void end_bigsur_irq(unsigned int irq) |
181 | { | 168 | { |
182 | DPRINTK("end_bigsur_irq IRQ %d\n", irq); | 169 | pr_debug("end_bigsur_irq IRQ %d\n", irq); |
183 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { | 170 | if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))) { |
184 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) | 171 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) |
185 | enable_bigsur_l1irq(irq); | 172 | enable_bigsur_l1irq(irq); |
@@ -193,7 +180,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq) | |||
193 | u8 mask; | 180 | u8 mask; |
194 | u32 reg; | 181 | u32 reg; |
195 | 182 | ||
196 | DPRINTK("startup_bigsur_irq IRQ %d\n", irq); | 183 | pr_debug("startup_bigsur_irq IRQ %d\n", irq); |
197 | 184 | ||
198 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { | 185 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) { |
199 | /* Enable the L1 IRQ */ | 186 | /* Enable the L1 IRQ */ |
@@ -218,7 +205,7 @@ static unsigned int startup_bigsur_irq(unsigned int irq) | |||
218 | 205 | ||
219 | static void shutdown_bigsur_irq(unsigned int irq) | 206 | static void shutdown_bigsur_irq(unsigned int irq) |
220 | { | 207 | { |
221 | DPRINTK("shutdown_bigsur_irq IRQ %d\n", irq); | 208 | pr_debug("shutdown_bigsur_irq IRQ %d\n", irq); |
222 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) | 209 | if(irq >= BIGSUR_IRQ_LOW && irq < BIGSUR_IRQ_HIGH) |
223 | disable_bigsur_l1irq(irq); | 210 | disable_bigsur_l1irq(irq); |
224 | else | 211 | else |
@@ -260,7 +247,7 @@ static void make_bigsur_l1isr(unsigned int irq) { | |||
260 | disable_bigsur_l1irq(irq); | 247 | disable_bigsur_l1irq(irq); |
261 | return; | 248 | return; |
262 | } | 249 | } |
263 | DPRINTK("make_bigsur_l1isr: bad irq, %d\n", irq); | 250 | pr_debug("make_bigsur_l1isr: bad irq, %d\n", irq); |
264 | return; | 251 | return; |
265 | } | 252 | } |
266 | 253 | ||
@@ -277,7 +264,7 @@ static void make_bigsur_l2isr(unsigned int irq) { | |||
277 | disable_bigsur_l2irq(irq); | 264 | disable_bigsur_l2irq(irq); |
278 | return; | 265 | return; |
279 | } | 266 | } |
280 | DPRINTK("make_bigsur_l2isr: bad irq, %d\n", irq); | 267 | pr_debug("make_bigsur_l2isr: bad irq, %d\n", irq); |
281 | return; | 268 | return; |
282 | } | 269 | } |
283 | 270 | ||