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+#
+# For a description of the syntax of this configuration file,
+# see Documentation/kbuild/kconfig-language.txt.
+#
+
+mainmenu "Linux/SuperH Kernel Configuration"
+
+config SUPERH
+        bool
+        default y
+        help
+          The SuperH is a RISC processor targeted for use in embedded systems
+          and consumer electronics; it was also used in the Sega Dreamcast
+          gaming console.  The SuperH port has a home page at
+          <http://www.linux-sh.org/>.
+
+config UID16
+        bool
+        default y
+
+config RWSEM_GENERIC_SPINLOCK
+        bool
+        default y
+
+config RWSEM_XCHGADD_ALGORITHM
+        bool
+
+config GENERIC_HARDIRQS
+        bool
+        default y
+
+config GENERIC_IRQ_PROBE
+        bool
+        default y
+
+config GENERIC_CALIBRATE_DELAY
+        bool
+        default y
+
+source "init/Kconfig"
+
+menu "System type"
+
+choice
+        prompt "SuperH system type"
+        default SH_UNKNOWN
+
+config SH_SOLUTION_ENGINE
+        bool "SolutionEngine"
+        help
+          Select SolutionEngine if configuring for a Hitachi SH7709
+          or SH7750 evaluation board.
+
+config SH_7751_SOLUTION_ENGINE
+        bool "SolutionEngine7751"
+        help
+          Select 7751 SolutionEngine if configuring for a Hitachi SH7751
+          evaluation board.
+
+config SH_7300_SOLUTION_ENGINE
+        bool "SolutionEngine7300"
+        help
+          Select 7300 SolutionEngine if configuring for a Hitachi SH7300(SH-Mobile V)
+          evaluation board.
+
+config SH_73180_SOLUTION_ENGINE
+       bool "SolutionEngine73180"
+       help
+         Select 73180 SolutionEngine if configuring for a Hitachi SH73180(SH-Mobile 3)
+         evaluation board.
+
+config SH_7751_SYSTEMH
+        bool "SystemH7751R"
+        help
+          Select SystemH if you are configuring for a Renesas SystemH
+          7751R evaluation board.
+
+config SH_STB1_HARP
+        bool "STB1_Harp"
+
+config SH_STB1_OVERDRIVE
+        bool "STB1_Overdrive"
+
+config SH_HP620
+        bool "HP620"
+        help
+          Select HP620 if configuring for a HP jornada HP620.
+          More information (hardware only) at
+          <http://www.hp.com/jornada/>.
+
+config SH_HP680
+        bool "HP680"
+        help
+          Select HP680 if configuring for a HP Jornada HP680.
+          More information (hardware only) at
+          <http://www.hp.com/jornada/products/680/>.
+
+config SH_HP690
+        bool "HP690"
+        help
+          Select HP690 if configuring for a HP Jornada HP690.
+          More information (hardware only)
+          at <http://www.hp.com/jornada/products/680/>.
+
+config SH_CQREEK
+        bool "CqREEK"
+        help
+          Select CqREEK if configuring for a CqREEK SH7708 or SH7750.
+          More information at
+          <http://sources.redhat.com/ecos/hardware.html#SuperH>.
+
+config SH_DMIDA
+        bool "DMIDA"
+        help
+          Select DMIDA if configuring for a DataMyte 4000 Industrial
+          Digital Assistant. More information at <http://www.dmida.com/>.
+
+config SH_EC3104
+        bool "EC3104"
+        help
+          Select EC3104 if configuring for a system with an Eclipse
+          International EC3104 chip, e.g. the Harris AD2000.
+
+config SH_SATURN
+        bool "Saturn"
+        help
+          Select Saturn if configuring for a SEGA Saturn.
+
+config SH_DREAMCAST
+        bool "Dreamcast"
+        help
+          Select Dreamcast if configuring for a SEGA Dreamcast.
+          More information at
+          <http://www.m17n.org/linux-sh/dreamcast/>.  There is a
+          Dreamcast project is at <http://linuxdc.sourceforge.net/>.
+
+config SH_CAT68701
+        bool "CAT68701"
+
+config SH_BIGSUR
+        bool "BigSur"
+
+config SH_SH2000
+        bool "SH2000"
+        help
+          SH-2000 is a single-board computer based around SH7709A chip
+          intended for embedded applications.
+          It has an Ethernet interface (CS8900A), direct connected
+          Compact Flash socket, three serial ports and PC-104 bus.
+          More information at <http://sh2000.sh-linux.org>.
+
+config SH_ADX
+        bool "ADX"
+
+config SH_MPC1211
+        bool "MPC1211"
+
+config SH_SH03
+        bool "SH03"
+        help
+          CTP/PCI-SH03 is a CPU module computer that produced
+          by Interface Corporation.
+          It is compact and excellent in durability.
+          It will play an active part in your factory or laboratory
+          as a FA computer.
+          More information at <http://www.interface.co.jp>
+
+config SH_SECUREEDGE5410
+        bool "SecureEdge5410"
+        help
+          Select SecureEdge5410 if configuring for a SnapGear SH board.
+          This includes both the OEM SecureEdge products as well as the
+          SME product line.
+
+config SH_HS7751RVOIP
+        bool "HS7751RVOIP"
+        help
+          Select HS7751RVOIP if configuring for a Renesas Technology
+          Sales VoIP board.
+
+config SH_RTS7751R2D
+        bool "RTS7751R2D"
+        help
+          Select RTS7751R2D if configuring for a Renesas Technology
+          Sales SH-Graphics board.
+
+config SH_EDOSK7705
+        bool "EDOSK7705"
+
+config SH_SH4202_MICRODEV
+        bool "SH4-202 MicroDev"
+        help
+          Select SH4-202 MicroDev if configuring for a SuperH MicroDev board
+          with an SH4-202 CPU.
+
+config SH_UNKNOWN
+        bool "BareCPU"
+        help
+          "Bare CPU" aka "unknown" means an SH-based system which is not one
+          of the specific ones mentioned above, which means you need to enter
+          all sorts of stuff like CONFIG_MEMORY_START because the config
+          system doesn't already know what it is.  You get a machine vector
+          without any platform-specific code in it, so things like the RTC may
+          not work.
+
+          This option is for the early stages of porting to a new machine.
+
+endchoice
+
+choice
+        prompt "Processor family"
+        default CPU_SH4
+        help
+          This option determines the CPU family to compile for. Supported
+          targets are SH-2, SH-3, and SH-4. These options are independent of
+          CPU functionality. As such, SH-DSP users will still want to select
+          their respective processor family in addition to the DSP support
+          option.
+
+config CPU_SH2
+        bool "SH-2"
+        select SH_WRITETHROUGH
+
+config CPU_SH3
+        bool "SH-3"
+
+config CPU_SH4
+        bool "SH-4"
+
+endchoice
+
+choice
+        prompt "Processor subtype"
+
+config CPU_SUBTYPE_SH7604
+        bool "SH7604"
+        depends on CPU_SH2
+        help
+          Select SH7604 if you have SH7604
+
+config CPU_SUBTYPE_SH7300
+        bool "SH7300"
+        depends on CPU_SH3
+
+config CPU_SUBTYPE_SH7705
+        bool "SH7705"
+        depends on CPU_SH3
+
+config CPU_SUBTYPE_SH7707
+        bool "SH7707"
+        depends on CPU_SH3
+        help
+          Select SH7707 if you have a  60 Mhz SH-3 HD6417707 CPU.
+
+config CPU_SUBTYPE_SH7708
+        bool "SH7708"
+        depends on CPU_SH3
+        help
+          Select SH7708 if you have a  60 Mhz SH-3 HD6417708S or
+          if you have a 100 Mhz SH-3 HD6417708R CPU.
+
+config CPU_SUBTYPE_SH7709
+        bool "SH7709"
+        depends on CPU_SH3
+        help
+          Select SH7709 if you have a  80 Mhz SH-3 HD6417709 CPU.
+
+config CPU_SUBTYPE_SH7750
+        bool "SH7750"
+        depends on CPU_SH4
+        help
+          Select SH7750 if you have a 200 Mhz SH-4 HD6417750 CPU.
+
+config CPU_SUBTYPE_SH7751
+        bool "SH7751/SH7751R"
+        depends on CPU_SH4
+        help
+          Select SH7751 if you have a 166 Mhz SH-4 HD6417751 CPU,
+          or if you have a HD6417751R CPU.
+
+config CPU_SUBTYPE_SH7760
+        bool "SH7760"
+        depends on CPU_SH4
+
+config CPU_SUBTYPE_SH73180
+       bool "SH73180"
+       depends on CPU_SH4
+
+config CPU_SUBTYPE_ST40STB1
+       bool "ST40STB1 / ST40RA"
+       depends on CPU_SH4
+       help
+         Select ST40STB1 if you have a ST40RA CPU.
+         This was previously called the ST40STB1, hence the option name.
+
+config CPU_SUBTYPE_ST40GX1
+       bool "ST40GX1"
+       depends on CPU_SH4
+       help
+         Select ST40GX1 if you have a ST40GX1 CPU.
+
+config CPU_SUBTYPE_SH4_202
+        bool "SH4-202"
+        depends on CPU_SH4
+
+endchoice
+
+config SH7705_CACHE_32KB
+    bool "Enable 32KB cache size for SH7705"
+    depends on CPU_SUBTYPE_SH7705
+    default y
+
+config MMU
+        bool "Support for memory management hardware"
+        depends on !CPU_SH2
+        default y
+        help
+          Early SH processors (such as the SH7604) lack an MMU. In order to
+          boot on these systems, this option must not be set.
+
+          On other systems (such as the SH-3 and 4) where an MMU exists,
+          turning this off will boot the kernel on these machines with the
+          MMU implicitly switched off.
+
+choice
+        prompt "HugeTLB page size"
+        depends on HUGETLB_PAGE && CPU_SH4 && MMU
+        default HUGETLB_PAGE_SIZE_64K
+
+config HUGETLB_PAGE_SIZE_64K
+        bool "64K"
+
+config HUGETLB_PAGE_SIZE_1MB
+        bool "1MB"
+
+endchoice
+
+config CMDLINE_BOOL
+        bool "Default bootloader kernel arguments"
+
+config CMDLINE
+        string "Initial kernel command string"
+        depends on CMDLINE_BOOL
+        default "console=ttySC1,115200"
+
+# Platform-specific memory start and size definitions
+config MEMORY_START
+        hex "Physical memory start address" if !MEMORY_SET || MEMORY_OVERRIDE
+        default "0x08000000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || SH_MPC1211 || SH_SH03 || SH_SECUREEDGE5410 || SH_SH4202_MICRODEV
+        default "0x0c000000" if !MEMORY_OVERRIDE && (SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_73180_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_EDOSK7705)
+        ---help---
+          Computers built with Hitachi SuperH processors always
+          map the ROM starting at address zero.  But the processor
+          does not specify the range that RAM takes.
+
+          The physical memory (RAM) start address will be automatically
+          set to 08000000, unless you selected one of the following
+          processor types: SolutionEngine, Overdrive, HP620, HP680, HP690,
+          in which case the start address will be set to 0c000000.
+
+          Tweak this only when porting to a new machine which is not already
+          known by the config system.  Changing it from the known correct
+          value on any of the known systems will only lead to disaster.
+
+config MEMORY_SIZE
+        hex "Physical memory size" if !MEMORY_SET || MEMORY_OVERRIDE
+        default "0x00400000" if !MEMORY_SET || MEMORY_OVERRIDE || !MEMORY_OVERRIDE && SH_ADX || !MEMORY_OVERRIDE && (SH_HP600 || SH_BIGSUR || SH_SH2000)
+        default "0x01000000" if !MEMORY_OVERRIDE && SH_DREAMCAST || SH_SECUREEDGE5410 || SH_EDOSK7705
+        default "0x02000000" if !MEMORY_OVERRIDE && (SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE)
+        default "0x04000000" if !MEMORY_OVERRIDE && (SH_7300_SOLUTION_ENGINE || SH_7751_SOLUTION_ENGINE || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV)
+        default "0x08000000" if SH_MPC1211 || SH_SH03
+        help
+          This sets the default memory size assumed by your SH kernel. It can
+          be overridden as normal by the 'mem=' argument on the kernel command
+          line. If unsure, consult your board specifications or just leave it
+          as 0x00400000 which was the default value before this became
+          configurable.
+
+config MEMORY_SET
+        bool
+        depends on !MEMORY_OVERRIDE && (SH_MPC1211 || SH_SH03 || SH_ADX || SH_DREAMCAST || SH_HP600 || SH_BIGSUR || SH_SH2000 || SH_7751_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_SECUREEDGE5410 || SH_HS7751RVOIP || SH_RTS7751R2D || SH_SH4202_MICRODEV || SH_EDOSK7705)
+        default y
+        help
+          This is an option about which you will never be asked a question.
+          Therefore, I conclude that you do not exist - go away.
+
+          There is a grue here.
+
+# If none of the above have set memory start/size, ask the user.
+config MEMORY_OVERRIDE
+        bool "Override default load address and memory size"
+
+# XXX: break these out into the board-specific configs below
+config CF_ENABLER
+        bool "Compact Flash Enabler support"
+        depends on SH_ADX || SH_SOLUTION_ENGINE || SH_UNKNOWN || SH_CAT68701 || SH_SH03
+        ---help---
+          Compact Flash is a small, removable mass storage device introduced
+          in 1994 originally as a PCMCIA device.  If you say `Y' here, you
+          compile in support for Compact Flash devices directly connected to
+          a SuperH processor.  A Compact Flash FAQ is available at
+          <http://www.compactflash.org/faqs/faq.htm>.
+
+          If your board has "Directly Connected" CompactFlash at area 5 or 6,
+          you may want to enable this option.  Then, you can use CF as
+          primary IDE drive (only tested for SanDisk).
+
+          If in doubt, select 'N'.
+
+choice
+        prompt "Compact Flash Connection Area"
+        depends on CF_ENABLER
+        default CF_AREA6
+
+config CF_AREA5
+        bool "Area5"
+        help
+          If your board has "Directly Connected" CompactFlash, You should
+          select the area where your CF is connected to.
+
+          - "Area5" if CompactFlash is connected to Area 5 (0x14000000)
+          - "Area6" if it is connected to Area 6 (0x18000000)
+
+          "Area6" will work for most boards. For ADX, select "Area5".
+
+config CF_AREA6
+        bool "Area6"
+
+endchoice
+
+config CF_BASE_ADDR
+        hex
+        depends on CF_ENABLER
+        default "0xb8000000" if CF_AREA6
+        default "0xb4000000" if CF_AREA5
+
+# The SH7750 RTC module is disabled in the Dreamcast
+config SH_RTC
+        bool
+        depends on !SH_DREAMCAST && !SH_SATURN && !SH_7300_SOLUTION_ENGINE && !SH_73180_SOLUTION_ENGINE
+        default y
+        help
+          Selecting this option will allow the Linux kernel to emulate
+          PC's RTC.
+
+          If unsure, say N.
+
+config SH_FPU
+        bool "FPU support"
+        depends on !CPU_SH3
+        default y
+        help
+          Selecting this option will enable support for SH processors that
+          have FPU units (ie, SH77xx).
+
+          This option must be set in order to enable the FPU.
+
+config SH_DSP
+        bool "DSP support"
+        depends on !CPU_SH4
+        default y
+        help
+          Selecting this option will enable support for SH processors that
+          have DSP units (ie, SH2-DSP and SH3-DSP). It is safe to say Y here
+          by default, as the existance of the DSP will be probed at runtime.
+
+          This option must be set in order to enable the DSP.
+
+config SH_ADC
+        bool "ADC support"
+        depends on CPU_SH3
+        default y
+        help
+          Selecting this option will allow the Linux kernel to use SH3 on-chip
+          ADC module.
+
+          If unsure, say N.
+
+config SH_HP600
+        bool
+        depends on SH_HP620 || SH_HP680 || SH_HP690
+        default y
+
+config CPU_SUBTYPE_ST40
+       bool
+       depends on CPU_SUBTYPE_ST40STB1 || CPU_SUBTYPE_ST40GX1
+       default y
+
+config DISCONTIGMEM
+        bool
+        depends on SH_HP690
+        default y
+        help
+          Say Y to upport efficient handling of discontiguous physical memory,
+          for architectures which are either NUMA (Non-Uniform Memory Access)
+          or have huge holes in the physical address space for other reasons.
+          See <file:Documentation/vm/numa> for more.
+
+config ZERO_PAGE_OFFSET
+        hex "Zero page offset"
+        default "0x00001000" if !(SH_MPC1211 || SH_SH03)
+        default "0x00004000" if SH_MPC1211 || SH_SH03
+        help
+          This sets the default offset of zero page.
+
+# XXX: needs to lose subtype for system type
+config ST40_LMI_MEMORY
+        bool "Memory on LMI"
+        depends on CPU_SUBTYPE_ST40STB1
+
+config MEMORY_START
+        hex
+        depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
+        default "0x08000000"
+
+config MEMORY_SIZE
+        hex
+        depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
+        default "0x00400000"
+
+config MEMORY_SET
+        bool
+        depends on CPU_SUBTYPE_ST40STB1 && ST40_LMI_MEMORY
+        default y
+
+config BOOT_LINK_OFFSET
+        hex "Link address offset for booting"
+        default "0x00800000"
+        help
+          This option allows you to set the link address offset of the zImage.
+          This can be useful if you are on a board which has a small amount of
+          memory.
+
+config CPU_LITTLE_ENDIAN
+        bool "Little Endian"
+        help
+          Some SuperH machines can be configured for either little or big
+          endian byte order. These modes require different kernels. Say Y if
+          your machine is little endian, N if it's a big endian machine.
+
+config PREEMPT
+        bool "Preemptible Kernel (EXPERIMENTAL)"
+        depends on EXPERIMENTAL
+
+config UBC_WAKEUP
+        bool "Wakeup UBC on startup"
+        help
+          Selecting this option will wakeup the User Break Controller (UBC) on
+          startup. Although the UBC is left in an awake state when the processor
+          comes up, some boot loaders misbehave by putting the UBC to sleep in a
+          power saving state, which causes issues with things like ptrace().
+
+          If unsure, say N.
+
+config SH_WRITETHROUGH
+        bool "Use write-through caching"
+        default y if CPU_SH2
+        help
+          Selecting this option will configure the caches in write-through
+          mode, as opposed to the default write-back configuration.
+
+          Since there's sill some aliasing issues on SH-4, this option will
+          unfortunately still require the majority of flushing functions to
+          be implemented to deal with aliasing.
+
+          If unsure, say N.
+
+config SH_OCRAM
+        bool "Operand Cache RAM (OCRAM) support"
+        help
+          Selecting this option will automatically tear down the number of
+          sets in the dcache by half, which in turn exposes a memory range.
+
+          The addresses for the OC RAM base will vary according to the
+          processor version. Consult vendor documentation for specifics.
+
+          If unsure, say N.
+
+config SH_STORE_QUEUES
+        bool "Support for Store Queues"
+        depends on CPU_SH4
+        help
+          Selecting this option will enable an in-kernel API for manipulating
+          the store queues integrated in the SH-4 processors.
+
+config SMP
+        bool "Symmetric multi-processing support"
+        ---help---
+          This enables support for systems with more than one CPU. If you have
+          a system with only one CPU, like most personal computers, say N. If
+          you have a system with more than one CPU, say Y.
+
+          If you say N here, the kernel will run on single and multiprocessor
+          machines, but will use only one CPU of a multiprocessor machine. If
+          you say Y here, the kernel will run on many, but not all,
+          singleprocessor machines. On a singleprocessor machine, the kernel
+          will run faster if you say N here.
+
+          People using multiprocessor machines who say Y here should also say
+          Y to "Enhanced Real Time Clock Support", below.
+
+          See also the <file:Documentation/smp.txt>,
+          <file:Documentation/nmi_watchdog.txt> and the SMP-HOWTO available
+          at <http://www.tldp.org/docs.html#howto>.
+
+          If you don't know what to do here, say N.
+
+config NR_CPUS
+        int "Maximum number of CPUs (2-32)"
+        range 2 32
+        depends on SMP
+        default "2"
+        help
+          This allows you to specify the maximum number of CPUs which this
+          kernel will support.  The maximum supported value is 32 and the
+          minimum value which makes sense is 2.
+
+          This is purely to save memory - each supported CPU adds
+          approximately eight kilobytes to the kernel image.
+
+config HS7751RVOIP_CODEC
+        bool "Support VoIP Codec section"
+        depends on SH_HS7751RVOIP
+        help
+          Selecting this option will support CODEC section.
+
+config RTS7751R2D_REV11
+        bool "RTS7751R2D Rev. 1.1 board support"
+        depends on SH_RTS7751R2D
+        help
+          Selecting this option will support version rev. 1.1.
+
+config SH_PCLK_CALC
+        bool
+        default n if CPU_SUBTYPE_SH7300 || CPU_SUBTYPE_SH73180
+        default y
+        help
+          This option will cause the PCLK value to be probed at run-time. It
+          will display a notification if the probed value has greater than a
+          1% variance of the hardcoded CONFIG_SH_PCLK_FREQ.
+
+config SH_PCLK_FREQ
+        int "Peripheral clock frequency (in Hz)"
+        default "50000000" if CPU_SUBTYPE_SH7750
+        default "60000000" if CPU_SUBTYPE_SH7751
+        default "33333333" if CPU_SUBTYPE_SH7300
+        default "27000000" if CPU_SUBTYPE_SH73180
+        default "66000000" if CPU_SUBTYPE_SH4_202
+        default "1193182"
+        help
+          This option is used to specify the peripheral clock frequency. This
+          option must be set for each processor in order for the kernel to
+          function reliably. If no sane default exists, we use a default from
+          the legacy i8254. Any discrepancies will be reported on boot time
+          with an auto-probed frequency which should be considered the proper
+          value for your hardware.
+
+menu "CPU Frequency scaling"
+
+source "drivers/cpufreq/Kconfig"
+
+config SH_CPU_FREQ
+        tristate "SuperH CPU Frequency driver"
+        depends on CPU_FREQ
+        select CPU_FREQ_TABLE
+        help
+          This adds the cpufreq driver for SuperH. At present, only
+          the SH-4 is supported.
+
+          For details, take a look at <file:Documentation/cpu-freq>.
+
+          If unsure, say N.
+
+endmenu
+
+source "arch/sh/drivers/dma/Kconfig"
+
+source "arch/sh/cchips/Kconfig"
+
+config HEARTBEAT
+        bool "Heartbeat LED"
+        depends on SH_MPC1211 || SH_SH03 || SH_CAT68701 || SH_STB1_HARP || SH_STB1_OVERDRIVE || SH_BIGSUR || SH_7751_SOLUTION_ENGINE || SH_7300_SOLUTION_ENGINE || SH_73180_SOLUTION_ENGINE || SH_SOLUTION_ENGINE || SH_RTS7751R2D || SH_SH4202_MICRODEV
+        help
+          Use the power-on LED on your machine as a load meter.  The exact
+          behavior is platform-dependent, but normally the flash frequency is
+          a hyperbolic function of the 5-minute load average.
+
+config RTC_9701JE
+        tristate "EPSON RTC-9701JE support"
+        depends on SH_RTS7751R2D
+        help
+          Selecting this option will support EPSON RTC-9701JE.
+
+endmenu
+
+
+menu "Bus options (PCI, PCMCIA, EISA, MCA, ISA)"
+
+# Even on SuperH devices which don't have an ISA bus,
+# this variable helps the PCMCIA modules handle
+# IRQ requesting properly -- Greg Banks.
+#
+# Though we're generally not interested in it when
+# we're not using PCMCIA, so we make it dependent on
+# PCMCIA outright. -- PFM.
+config ISA
+        bool
+        default y if PCMCIA || SMC91X
+        help
+          Find out whether you have ISA slots on your motherboard.  ISA is the
+          name of a bus system, i.e. the way the CPU talks to the other stuff
+          inside your box.  Other bus systems are PCI, EISA, MicroChannel
+          (MCA) or VESA.  ISA is an older system, now being displaced by PCI;
+          newer boards don't support it.  If you have ISA, say Y, otherwise N.
+
+config EISA
+        bool
+        ---help---
+          The Extended Industry Standard Architecture (EISA) bus was
+          developed as an open alternative to the IBM MicroChannel bus.
+
+          The EISA bus provided some of the features of the IBM MicroChannel
+          bus while maintaining backward compatibility with cards made for
+          the older ISA bus.  The EISA bus saw limited use between 1988 and
+          1995 when it was made obsolete by the PCI bus.
+
+          Say Y here if you are building a kernel for an EISA-based machine.
+
+          Otherwise, say N.
+
+config MCA
+        bool
+        help
+          MicroChannel Architecture is found in some IBM PS/2 machines and
+          laptops.  It is a bus system similar to PCI or ISA. See
+          <file:Documentation/mca.txt> (and especially the web page given
+          there) before attempting to build an MCA bus kernel.
+
+config SBUS
+        bool
+
+config MAPLE
+        tristate "Maple Bus support"
+        depends on SH_DREAMCAST
+        default y
+
+source "arch/sh/drivers/pci/Kconfig"
+
+source "drivers/pci/Kconfig"
+
+source "drivers/pcmcia/Kconfig"
+
+source "drivers/pci/hotplug/Kconfig"
+
+endmenu
+
+menu "Executable file formats"
+
+source "fs/Kconfig.binfmt"
+
+endmenu
+
+menu "SH initrd options"
+        depends on BLK_DEV_INITRD
+
+config EMBEDDED_RAMDISK
+        bool "Embed root filesystem ramdisk into the kernel"
+
+config EMBEDDED_RAMDISK_IMAGE
+        string "Filename of gziped ramdisk image"
+        depends on EMBEDDED_RAMDISK
+        default "ramdisk.gz"
+        help
+          This is the filename of the ramdisk image to be built into the
+          kernel.  Relative pathnames are relative to arch/sh/ramdisk/.
+          The ramdisk image is not part of the kernel distribution; you must
+          provide one yourself.
+
+endmenu
+
+source "drivers/Kconfig"
+
+source "fs/Kconfig"
+
+source "arch/sh/oprofile/Kconfig"
+
+source "arch/sh/Kconfig.debug"
+
+source "security/Kconfig"
+
+source "crypto/Kconfig"
+
+source "lib/Kconfig"