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-rw-r--r--arch/s390/net/bpf_jit_comp.c1780
1 files changed, 1086 insertions, 694 deletions
diff --git a/arch/s390/net/bpf_jit_comp.c b/arch/s390/net/bpf_jit_comp.c
index bbd1981cc150..7690dc8e1ab5 100644
--- a/arch/s390/net/bpf_jit_comp.c
+++ b/arch/s390/net/bpf_jit_comp.c
@@ -1,817 +1,1209 @@
1/* 1/*
2 * BPF Jit compiler for s390. 2 * BPF Jit compiler for s390.
3 * 3 *
4 * Copyright IBM Corp. 2012 4 * Minimum build requirements:
5 *
6 * - HAVE_MARCH_Z196_FEATURES: laal, laalg
7 * - HAVE_MARCH_Z10_FEATURES: msfi, cgrj, clgrj
8 * - HAVE_MARCH_Z9_109_FEATURES: alfi, llilf, clfi, oilf, nilf
9 * - PACK_STACK
10 * - 64BIT
11 *
12 * Copyright IBM Corp. 2012,2015
5 * 13 *
6 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com> 14 * Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>
15 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
7 */ 16 */
17
18#define KMSG_COMPONENT "bpf_jit"
19#define pr_fmt(fmt) KMSG_COMPONENT ": " fmt
20
8#include <linux/netdevice.h> 21#include <linux/netdevice.h>
9#include <linux/if_vlan.h>
10#include <linux/filter.h> 22#include <linux/filter.h>
11#include <linux/init.h> 23#include <linux/init.h>
12#include <asm/cacheflush.h> 24#include <asm/cacheflush.h>
13#include <asm/facility.h>
14#include <asm/dis.h> 25#include <asm/dis.h>
26#include "bpf_jit.h"
15 27
16/*
17 * Conventions:
18 * %r2 = skb pointer
19 * %r3 = offset parameter
20 * %r4 = scratch register / length parameter
21 * %r5 = BPF A accumulator
22 * %r8 = return address
23 * %r9 = save register for skb pointer
24 * %r10 = skb->data
25 * %r11 = skb->len - skb->data_len (headlen)
26 * %r12 = BPF X accumulator
27 * %r13 = literal pool pointer
28 * 0(%r15) - 63(%r15) scratch memory array with BPF_MEMWORDS
29 */
30int bpf_jit_enable __read_mostly; 28int bpf_jit_enable __read_mostly;
31 29
30struct bpf_jit {
31 u32 seen; /* Flags to remember seen eBPF instructions */
32 u32 seen_reg[16]; /* Array to remember which registers are used */
33 u32 *addrs; /* Array with relative instruction addresses */
34 u8 *prg_buf; /* Start of program */
35 int size; /* Size of program and literal pool */
36 int size_prg; /* Size of program */
37 int prg; /* Current position in program */
38 int lit_start; /* Start of literal pool */
39 int lit; /* Current position in literal pool */
40 int base_ip; /* Base address for literal pool */
41 int ret0_ip; /* Address of return 0 */
42 int exit_ip; /* Address of exit */
43};
44
45#define BPF_SIZE_MAX 4096 /* Max size for program */
46
47#define SEEN_SKB 1 /* skb access */
48#define SEEN_MEM 2 /* use mem[] for temporary storage */
49#define SEEN_RET0 4 /* ret0_ip points to a valid return 0 */
50#define SEEN_LITERAL 8 /* code uses literals */
51#define SEEN_FUNC 16 /* calls C functions */
52#define SEEN_STACK (SEEN_FUNC | SEEN_MEM | SEEN_SKB)
53
32/* 54/*
33 * assembly code in arch/x86/net/bpf_jit.S 55 * s390 registers
34 */ 56 */
35extern u8 sk_load_word[], sk_load_half[], sk_load_byte[], sk_load_byte_msh[]; 57#define REG_W0 (__MAX_BPF_REG+0) /* Work register 1 (even) */
36extern u8 sk_load_word_ind[], sk_load_half_ind[], sk_load_byte_ind[]; 58#define REG_W1 (__MAX_BPF_REG+1) /* Work register 2 (odd) */
59#define REG_SKB_DATA (__MAX_BPF_REG+2) /* SKB data register */
60#define REG_L (__MAX_BPF_REG+3) /* Literal pool register */
61#define REG_15 (__MAX_BPF_REG+4) /* Register 15 */
62#define REG_0 REG_W0 /* Register 0 */
63#define REG_2 BPF_REG_1 /* Register 2 */
64#define REG_14 BPF_REG_0 /* Register 14 */
37 65
38struct bpf_jit { 66/*
39 unsigned int seen; 67 * Mapping of BPF registers to s390 registers
40 u8 *start; 68 */
41 u8 *prg; 69static const int reg2hex[] = {
42 u8 *mid; 70 /* Return code */
43 u8 *lit; 71 [BPF_REG_0] = 14,
44 u8 *end; 72 /* Function parameters */
45 u8 *base_ip; 73 [BPF_REG_1] = 2,
46 u8 *ret0_ip; 74 [BPF_REG_2] = 3,
47 u8 *exit_ip; 75 [BPF_REG_3] = 4,
48 unsigned int off_load_word; 76 [BPF_REG_4] = 5,
49 unsigned int off_load_half; 77 [BPF_REG_5] = 6,
50 unsigned int off_load_byte; 78 /* Call saved registers */
51 unsigned int off_load_bmsh; 79 [BPF_REG_6] = 7,
52 unsigned int off_load_iword; 80 [BPF_REG_7] = 8,
53 unsigned int off_load_ihalf; 81 [BPF_REG_8] = 9,
54 unsigned int off_load_ibyte; 82 [BPF_REG_9] = 10,
83 /* BPF stack pointer */
84 [BPF_REG_FP] = 13,
85 /* SKB data pointer */
86 [REG_SKB_DATA] = 12,
87 /* Work registers for s390x backend */
88 [REG_W0] = 0,
89 [REG_W1] = 1,
90 [REG_L] = 11,
91 [REG_15] = 15,
55}; 92};
56 93
57#define BPF_SIZE_MAX 4096 /* Max size for program */ 94static inline u32 reg(u32 dst_reg, u32 src_reg)
95{
96 return reg2hex[dst_reg] << 4 | reg2hex[src_reg];
97}
98
99static inline u32 reg_high(u32 reg)
100{
101 return reg2hex[reg] << 4;
102}
103
104static inline void reg_set_seen(struct bpf_jit *jit, u32 b1)
105{
106 u32 r1 = reg2hex[b1];
107
108 if (!jit->seen_reg[r1] && r1 >= 6 && r1 <= 15)
109 jit->seen_reg[r1] = 1;
110}
111
112#define REG_SET_SEEN(b1) \
113({ \
114 reg_set_seen(jit, b1); \
115})
116
117#define REG_SEEN(b1) jit->seen_reg[reg2hex[(b1)]]
118
119/*
120 * EMIT macros for code generation
121 */
122
123#define _EMIT2(op) \
124({ \
125 if (jit->prg_buf) \
126 *(u16 *) (jit->prg_buf + jit->prg) = op; \
127 jit->prg += 2; \
128})
58 129
59#define SEEN_DATAREF 1 /* might call external helpers */ 130#define EMIT2(op, b1, b2) \
60#define SEEN_XREG 2 /* ebx is used */ 131({ \
61#define SEEN_MEM 4 /* use mem[] for temporary storage */ 132 _EMIT2(op | reg(b1, b2)); \
62#define SEEN_RET0 8 /* pc_ret0 points to a valid return 0 */ 133 REG_SET_SEEN(b1); \
63#define SEEN_LITERAL 16 /* code uses literals */ 134 REG_SET_SEEN(b2); \
64#define SEEN_LOAD_WORD 32 /* code uses sk_load_word */
65#define SEEN_LOAD_HALF 64 /* code uses sk_load_half */
66#define SEEN_LOAD_BYTE 128 /* code uses sk_load_byte */
67#define SEEN_LOAD_BMSH 256 /* code uses sk_load_byte_msh */
68#define SEEN_LOAD_IWORD 512 /* code uses sk_load_word_ind */
69#define SEEN_LOAD_IHALF 1024 /* code uses sk_load_half_ind */
70#define SEEN_LOAD_IBYTE 2048 /* code uses sk_load_byte_ind */
71
72#define EMIT2(op) \
73({ \
74 if (jit->prg + 2 <= jit->mid) \
75 *(u16 *) jit->prg = op; \
76 jit->prg += 2; \
77}) 135})
78 136
79#define EMIT4(op) \ 137#define _EMIT4(op) \
80({ \ 138({ \
81 if (jit->prg + 4 <= jit->mid) \ 139 if (jit->prg_buf) \
82 *(u32 *) jit->prg = op; \ 140 *(u32 *) (jit->prg_buf + jit->prg) = op; \
83 jit->prg += 4; \ 141 jit->prg += 4; \
84}) 142})
85 143
86#define EMIT4_DISP(op, disp) \ 144#define EMIT4(op, b1, b2) \
87({ \ 145({ \
88 unsigned int __disp = (disp) & 0xfff; \ 146 _EMIT4(op | reg(b1, b2)); \
89 EMIT4(op | __disp); \ 147 REG_SET_SEEN(b1); \
148 REG_SET_SEEN(b2); \
90}) 149})
91 150
92#define EMIT4_IMM(op, imm) \ 151#define EMIT4_RRF(op, b1, b2, b3) \
93({ \ 152({ \
94 unsigned int __imm = (imm) & 0xffff; \ 153 _EMIT4(op | reg_high(b3) << 8 | reg(b1, b2)); \
95 EMIT4(op | __imm); \ 154 REG_SET_SEEN(b1); \
155 REG_SET_SEEN(b2); \
156 REG_SET_SEEN(b3); \
96}) 157})
97 158
98#define EMIT4_PCREL(op, pcrel) \ 159#define _EMIT4_DISP(op, disp) \
99({ \ 160({ \
100 long __pcrel = ((pcrel) >> 1) & 0xffff; \ 161 unsigned int __disp = (disp) & 0xfff; \
101 EMIT4(op | __pcrel); \ 162 _EMIT4(op | __disp); \
102}) 163})
103 164
104#define EMIT6(op1, op2) \ 165#define EMIT4_DISP(op, b1, b2, disp) \
105({ \ 166({ \
106 if (jit->prg + 6 <= jit->mid) { \ 167 _EMIT4_DISP(op | reg_high(b1) << 16 | \
107 *(u32 *) jit->prg = op1; \ 168 reg_high(b2) << 8, disp); \
108 *(u16 *) (jit->prg + 4) = op2; \ 169 REG_SET_SEEN(b1); \
109 } \ 170 REG_SET_SEEN(b2); \
110 jit->prg += 6; \
111}) 171})
112 172
113#define EMIT6_DISP(op1, op2, disp) \ 173#define EMIT4_IMM(op, b1, imm) \
114({ \ 174({ \
115 unsigned int __disp = (disp) & 0xfff; \ 175 unsigned int __imm = (imm) & 0xffff; \
116 EMIT6(op1 | __disp, op2); \ 176 _EMIT4(op | reg_high(b1) << 16 | __imm); \
177 REG_SET_SEEN(b1); \
117}) 178})
118 179
119#define EMIT6_IMM(op, imm) \ 180#define EMIT4_PCREL(op, pcrel) \
120({ \ 181({ \
121 unsigned int __imm = (imm); \ 182 long __pcrel = ((pcrel) >> 1) & 0xffff; \
122 EMIT6(op | (__imm >> 16), __imm & 0xffff); \ 183 _EMIT4(op | __pcrel); \
123}) 184})
124 185
125#define EMIT_CONST(val) \ 186#define _EMIT6(op1, op2) \
126({ \ 187({ \
127 unsigned int ret; \ 188 if (jit->prg_buf) { \
128 ret = (unsigned int) (jit->lit - jit->base_ip); \ 189 *(u32 *) (jit->prg_buf + jit->prg) = op1; \
129 jit->seen |= SEEN_LITERAL; \ 190 *(u16 *) (jit->prg_buf + jit->prg + 4) = op2; \
130 if (jit->lit + 4 <= jit->end) \ 191 } \
131 *(u32 *) jit->lit = val; \ 192 jit->prg += 6; \
132 jit->lit += 4; \
133 ret; \
134}) 193})
135 194
136#define EMIT_FN_CONST(bit, fn) \ 195#define _EMIT6_DISP(op1, op2, disp) \
137({ \ 196({ \
138 unsigned int ret; \ 197 unsigned int __disp = (disp) & 0xfff; \
139 ret = (unsigned int) (jit->lit - jit->base_ip); \ 198 _EMIT6(op1 | __disp, op2); \
140 if (jit->seen & bit) { \
141 jit->seen |= SEEN_LITERAL; \
142 if (jit->lit + 8 <= jit->end) \
143 *(void **) jit->lit = fn; \
144 jit->lit += 8; \
145 } \
146 ret; \
147}) 199})
148 200
149static void bpf_jit_fill_hole(void *area, unsigned int size) 201#define EMIT6_DISP(op1, op2, b1, b2, b3, disp) \
202({ \
203 _EMIT6_DISP(op1 | reg(b1, b2) << 16 | \
204 reg_high(b3) << 8, op2, disp); \
205 REG_SET_SEEN(b1); \
206 REG_SET_SEEN(b2); \
207 REG_SET_SEEN(b3); \
208})
209
210#define _EMIT6_DISP_LH(op1, op2, disp) \
211({ \
212 unsigned int __disp_h = ((u32)disp) & 0xff000; \
213 unsigned int __disp_l = ((u32)disp) & 0x00fff; \
214 _EMIT6(op1 | __disp_l, op2 | __disp_h >> 4); \
215})
216
217#define EMIT6_DISP_LH(op1, op2, b1, b2, b3, disp) \
218({ \
219 _EMIT6_DISP_LH(op1 | reg(b1, b2) << 16 | \
220 reg_high(b3) << 8, op2, disp); \
221 REG_SET_SEEN(b1); \
222 REG_SET_SEEN(b2); \
223 REG_SET_SEEN(b3); \
224})
225
226#define EMIT6_PCREL(op1, op2, b1, b2, i, off, mask) \
227({ \
228 /* Branch instruction needs 6 bytes */ \
229 int rel = (addrs[i + off + 1] - (addrs[i + 1] - 6)) / 2;\
230 _EMIT6(op1 | reg(b1, b2) << 16 | rel, op2 | mask); \
231 REG_SET_SEEN(b1); \
232 REG_SET_SEEN(b2); \
233})
234
235#define _EMIT6_IMM(op, imm) \
236({ \
237 unsigned int __imm = (imm); \
238 _EMIT6(op | (__imm >> 16), __imm & 0xffff); \
239})
240
241#define EMIT6_IMM(op, b1, imm) \
242({ \
243 _EMIT6_IMM(op | reg_high(b1) << 16, imm); \
244 REG_SET_SEEN(b1); \
245})
246
247#define EMIT_CONST_U32(val) \
248({ \
249 unsigned int ret; \
250 ret = jit->lit - jit->base_ip; \
251 jit->seen |= SEEN_LITERAL; \
252 if (jit->prg_buf) \
253 *(u32 *) (jit->prg_buf + jit->lit) = (u32) val; \
254 jit->lit += 4; \
255 ret; \
256})
257
258#define EMIT_CONST_U64(val) \
259({ \
260 unsigned int ret; \
261 ret = jit->lit - jit->base_ip; \
262 jit->seen |= SEEN_LITERAL; \
263 if (jit->prg_buf) \
264 *(u64 *) (jit->prg_buf + jit->lit) = (u64) val; \
265 jit->lit += 8; \
266 ret; \
267})
268
269#define EMIT_ZERO(b1) \
270({ \
271 /* llgfr %dst,%dst (zero extend to 64 bit) */ \
272 EMIT4(0xb9160000, b1, b1); \
273 REG_SET_SEEN(b1); \
274})
275
276/*
277 * Fill whole space with illegal instructions
278 */
279static void jit_fill_hole(void *area, unsigned int size)
150{ 280{
151 /* Fill whole space with illegal instructions */
152 memset(area, 0, size); 281 memset(area, 0, size);
153} 282}
154 283
155static void bpf_jit_prologue(struct bpf_jit *jit) 284/*
285 * Save registers from "rs" (register start) to "re" (register end) on stack
286 */
287static void save_regs(struct bpf_jit *jit, u32 rs, u32 re)
288{
289 u32 off = 72 + (rs - 6) * 8;
290
291 if (rs == re)
292 /* stg %rs,off(%r15) */
293 _EMIT6(0xe300f000 | rs << 20 | off, 0x0024);
294 else
295 /* stmg %rs,%re,off(%r15) */
296 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0024, off);
297}
298
299/*
300 * Restore registers from "rs" (register start) to "re" (register end) on stack
301 */
302static void restore_regs(struct bpf_jit *jit, u32 rs, u32 re)
156{ 303{
157 /* Save registers and create stack frame if necessary */ 304 u32 off = 72 + (rs - 6) * 8;
158 if (jit->seen & SEEN_DATAREF) { 305
159 /* stmg %r8,%r15,88(%r15) */ 306 if (jit->seen & SEEN_STACK)
160 EMIT6(0xeb8ff058, 0x0024); 307 off += STK_OFF;
161 /* lgr %r14,%r15 */ 308
162 EMIT4(0xb90400ef); 309 if (rs == re)
163 /* aghi %r15,<offset> */ 310 /* lg %rs,off(%r15) */
164 EMIT4_IMM(0xa7fb0000, (jit->seen & SEEN_MEM) ? -112 : -80); 311 _EMIT6(0xe300f000 | rs << 20 | off, 0x0004);
165 /* stg %r14,152(%r15) */ 312 else
166 EMIT6(0xe3e0f098, 0x0024); 313 /* lmg %rs,%re,off(%r15) */
167 } else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL)) 314 _EMIT6_DISP(0xeb00f000 | rs << 20 | re << 16, 0x0004, off);
168 /* stmg %r12,%r13,120(%r15) */ 315}
169 EMIT6(0xebcdf078, 0x0024);
170 else if (jit->seen & SEEN_XREG)
171 /* stg %r12,120(%r15) */
172 EMIT6(0xe3c0f078, 0x0024);
173 else if (jit->seen & SEEN_LITERAL)
174 /* stg %r13,128(%r15) */
175 EMIT6(0xe3d0f080, 0x0024);
176 316
317/*
318 * Return first seen register (from start)
319 */
320static int get_start(struct bpf_jit *jit, int start)
321{
322 int i;
323
324 for (i = start; i <= 15; i++) {
325 if (jit->seen_reg[i])
326 return i;
327 }
328 return 0;
329}
330
331/*
332 * Return last seen register (from start) (gap >= 2)
333 */
334static int get_end(struct bpf_jit *jit, int start)
335{
336 int i;
337
338 for (i = start; i < 15; i++) {
339 if (!jit->seen_reg[i] && !jit->seen_reg[i + 1])
340 return i - 1;
341 }
342 return jit->seen_reg[15] ? 15 : 14;
343}
344
345#define REGS_SAVE 1
346#define REGS_RESTORE 0
347/*
348 * Save and restore clobbered registers (6-15) on stack.
349 * We save/restore registers in chunks with gap >= 2 registers.
350 */
351static void save_restore_regs(struct bpf_jit *jit, int op)
352{
353
354 int re = 6, rs;
355
356 do {
357 rs = get_start(jit, re);
358 if (!rs)
359 break;
360 re = get_end(jit, rs + 1);
361 if (op == REGS_SAVE)
362 save_regs(jit, rs, re);
363 else
364 restore_regs(jit, rs, re);
365 re++;
366 } while (re <= 15);
367}
368
369/*
370 * Emit function prologue
371 *
372 * Save registers and create stack frame if necessary.
373 * See stack frame layout desription in "bpf_jit.h"!
374 */
375static void bpf_jit_prologue(struct bpf_jit *jit)
376{
377 /* Save registers */
378 save_restore_regs(jit, REGS_SAVE);
177 /* Setup literal pool */ 379 /* Setup literal pool */
178 if (jit->seen & SEEN_LITERAL) { 380 if (jit->seen & SEEN_LITERAL) {
179 /* basr %r13,0 */ 381 /* basr %r13,0 */
180 EMIT2(0x0dd0); 382 EMIT2(0x0d00, REG_L, REG_0);
181 jit->base_ip = jit->prg; 383 jit->base_ip = jit->prg;
182 } 384 }
183 jit->off_load_word = EMIT_FN_CONST(SEEN_LOAD_WORD, sk_load_word); 385 /* Setup stack and backchain */
184 jit->off_load_half = EMIT_FN_CONST(SEEN_LOAD_HALF, sk_load_half); 386 if (jit->seen & SEEN_STACK) {
185 jit->off_load_byte = EMIT_FN_CONST(SEEN_LOAD_BYTE, sk_load_byte); 387 /* lgr %bfp,%r15 (BPF frame pointer) */
186 jit->off_load_bmsh = EMIT_FN_CONST(SEEN_LOAD_BMSH, sk_load_byte_msh); 388 EMIT4(0xb9040000, BPF_REG_FP, REG_15);
187 jit->off_load_iword = EMIT_FN_CONST(SEEN_LOAD_IWORD, sk_load_word_ind); 389 /* aghi %r15,-STK_OFF */
188 jit->off_load_ihalf = EMIT_FN_CONST(SEEN_LOAD_IHALF, sk_load_half_ind); 390 EMIT4_IMM(0xa70b0000, REG_15, -STK_OFF);
189 jit->off_load_ibyte = EMIT_FN_CONST(SEEN_LOAD_IBYTE, sk_load_byte_ind); 391 if (jit->seen & SEEN_FUNC)
190 392 /* stg %bfp,152(%r15) (backchain) */
191 /* Filter needs to access skb data */ 393 EMIT6_DISP_LH(0xe3000000, 0x0024, BPF_REG_FP, REG_0,
192 if (jit->seen & SEEN_DATAREF) { 394 REG_15, 152);
193 /* l %r11,<len>(%r2) */ 395 }
194 EMIT4_DISP(0x58b02000, offsetof(struct sk_buff, len)); 396 /*
195 /* s %r11,<data_len>(%r2) */ 397 * For SKB access %b1 contains the SKB pointer. For "bpf_jit.S"
196 EMIT4_DISP(0x5bb02000, offsetof(struct sk_buff, data_len)); 398 * we store the SKB header length on the stack and the SKB data
197 /* lg %r10,<data>(%r2) */ 399 * pointer in REG_SKB_DATA.
198 EMIT6_DISP(0xe3a02000, 0x0004, 400 */
199 offsetof(struct sk_buff, data)); 401 if (jit->seen & SEEN_SKB) {
402 /* Header length: llgf %w1,<len>(%b1) */
403 EMIT6_DISP_LH(0xe3000000, 0x0016, REG_W1, REG_0, BPF_REG_1,
404 offsetof(struct sk_buff, len));
405 /* s %w1,<data_len>(%b1) */
406 EMIT4_DISP(0x5b000000, REG_W1, BPF_REG_1,
407 offsetof(struct sk_buff, data_len));
408 /* stg %w1,ST_OFF_HLEN(%r0,%r15) */
409 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W1, REG_0, REG_15,
410 STK_OFF_HLEN);
411 /* lg %skb_data,data_off(%b1) */
412 EMIT6_DISP_LH(0xe3000000, 0x0004, REG_SKB_DATA, REG_0,
413 BPF_REG_1, offsetof(struct sk_buff, data));
200 } 414 }
415 /* BPF compatibility: clear A (%b7) and X (%b8) registers */
416 if (REG_SEEN(BPF_REG_7))
417 /* lghi %b7,0 */
418 EMIT4_IMM(0xa7090000, BPF_REG_7, 0);
419 if (REG_SEEN(BPF_REG_8))
420 /* lghi %b8,0 */
421 EMIT4_IMM(0xa7090000, BPF_REG_8, 0);
201} 422}
202 423
424/*
425 * Function epilogue
426 */
203static void bpf_jit_epilogue(struct bpf_jit *jit) 427static void bpf_jit_epilogue(struct bpf_jit *jit)
204{ 428{
205 /* Return 0 */ 429 /* Return 0 */
206 if (jit->seen & SEEN_RET0) { 430 if (jit->seen & SEEN_RET0) {
207 jit->ret0_ip = jit->prg; 431 jit->ret0_ip = jit->prg;
208 /* lghi %r2,0 */ 432 /* lghi %b0,0 */
209 EMIT4(0xa7290000); 433 EMIT4_IMM(0xa7090000, BPF_REG_0, 0);
210 } 434 }
211 jit->exit_ip = jit->prg; 435 jit->exit_ip = jit->prg;
436 /* Load exit code: lgr %r2,%b0 */
437 EMIT4(0xb9040000, REG_2, BPF_REG_0);
212 /* Restore registers */ 438 /* Restore registers */
213 if (jit->seen & SEEN_DATAREF) 439 save_restore_regs(jit, REGS_RESTORE);
214 /* lmg %r8,%r15,<offset>(%r15) */
215 EMIT6_DISP(0xeb8ff000, 0x0004,
216 (jit->seen & SEEN_MEM) ? 200 : 168);
217 else if ((jit->seen & SEEN_XREG) && (jit->seen & SEEN_LITERAL))
218 /* lmg %r12,%r13,120(%r15) */
219 EMIT6(0xebcdf078, 0x0004);
220 else if (jit->seen & SEEN_XREG)
221 /* lg %r12,120(%r15) */
222 EMIT6(0xe3c0f078, 0x0004);
223 else if (jit->seen & SEEN_LITERAL)
224 /* lg %r13,128(%r15) */
225 EMIT6(0xe3d0f080, 0x0004);
226 /* br %r14 */ 440 /* br %r14 */
227 EMIT2(0x07fe); 441 _EMIT2(0x07fe);
228} 442}
229 443
230/* 444/*
231 * make sure we dont leak kernel information to user 445 * Compile one eBPF instruction into s390x code
232 */ 446 */
233static void bpf_jit_noleaks(struct bpf_jit *jit, struct sock_filter *filter) 447static int bpf_jit_insn(struct bpf_jit *jit, struct bpf_prog *fp, int i)
234{ 448{
235 /* Clear temporary memory if (seen & SEEN_MEM) */ 449 struct bpf_insn *insn = &fp->insnsi[i];
236 if (jit->seen & SEEN_MEM) 450 int jmp_off, last, insn_count = 1;
237 /* xc 0(64,%r15),0(%r15) */ 451 unsigned int func_addr, mask;
238 EMIT6(0xd73ff000, 0xf000); 452 u32 dst_reg = insn->dst_reg;
239 /* Clear X if (seen & SEEN_XREG) */ 453 u32 src_reg = insn->src_reg;
240 if (jit->seen & SEEN_XREG) 454 u32 *addrs = jit->addrs;
241 /* lhi %r12,0 */ 455 s32 imm = insn->imm;
242 EMIT4(0xa7c80000); 456 s16 off = insn->off;
243 /* Clear A if the first register does not set it. */
244 switch (filter[0].code) {
245 case BPF_LD | BPF_W | BPF_ABS:
246 case BPF_LD | BPF_H | BPF_ABS:
247 case BPF_LD | BPF_B | BPF_ABS:
248 case BPF_LD | BPF_W | BPF_LEN:
249 case BPF_LD | BPF_W | BPF_IND:
250 case BPF_LD | BPF_H | BPF_IND:
251 case BPF_LD | BPF_B | BPF_IND:
252 case BPF_LD | BPF_IMM:
253 case BPF_LD | BPF_MEM:
254 case BPF_MISC | BPF_TXA:
255 case BPF_RET | BPF_K:
256 /* first instruction sets A register */
257 break;
258 default: /* A = 0 */
259 /* lhi %r5,0 */
260 EMIT4(0xa7580000);
261 }
262}
263 457
264static int bpf_jit_insn(struct bpf_jit *jit, struct sock_filter *filter, 458 switch (insn->code) {
265 unsigned int *addrs, int i, int last) 459 /*
266{ 460 * BPF_MOV
267 unsigned int K; 461 */
268 int offset; 462 case BPF_ALU | BPF_MOV | BPF_X: /* dst = (u32) src */
269 unsigned int mask; 463 /* llgfr %dst,%src */
270 u16 code; 464 EMIT4(0xb9160000, dst_reg, src_reg);
271 465 break;
272 K = filter->k; 466 case BPF_ALU64 | BPF_MOV | BPF_X: /* dst = src */
273 code = bpf_anc_helper(filter); 467 /* lgr %dst,%src */
274 468 EMIT4(0xb9040000, dst_reg, src_reg);
275 switch (code) { 469 break;
276 case BPF_ALU | BPF_ADD | BPF_X: /* A += X */ 470 case BPF_ALU | BPF_MOV | BPF_K: /* dst = (u32) imm */
277 jit->seen |= SEEN_XREG; 471 /* llilf %dst,imm */
278 /* ar %r5,%r12 */ 472 EMIT6_IMM(0xc00f0000, dst_reg, imm);
279 EMIT2(0x1a5c); 473 break;
280 break; 474 case BPF_ALU64 | BPF_MOV | BPF_K: /* dst = imm */
281 case BPF_ALU | BPF_ADD | BPF_K: /* A += K */ 475 /* lgfi %dst,imm */
282 if (!K) 476 EMIT6_IMM(0xc0010000, dst_reg, imm);
477 break;
478 /*
479 * BPF_LD 64
480 */
481 case BPF_LD | BPF_IMM | BPF_DW: /* dst = (u64) imm */
482 {
483 /* 16 byte instruction that uses two 'struct bpf_insn' */
484 u64 imm64;
485
486 imm64 = (u64)(u32) insn[0].imm | ((u64)(u32) insn[1].imm) << 32;
487 /* lg %dst,<d(imm)>(%l) */
488 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, REG_0, REG_L,
489 EMIT_CONST_U64(imm64));
490 insn_count = 2;
491 break;
492 }
493 /*
494 * BPF_ADD
495 */
496 case BPF_ALU | BPF_ADD | BPF_X: /* dst = (u32) dst + (u32) src */
497 /* ar %dst,%src */
498 EMIT2(0x1a00, dst_reg, src_reg);
499 EMIT_ZERO(dst_reg);
500 break;
501 case BPF_ALU64 | BPF_ADD | BPF_X: /* dst = dst + src */
502 /* agr %dst,%src */
503 EMIT4(0xb9080000, dst_reg, src_reg);
504 break;
505 case BPF_ALU | BPF_ADD | BPF_K: /* dst = (u32) dst + (u32) imm */
506 if (!imm)
283 break; 507 break;
284 if (K <= 16383) 508 /* alfi %dst,imm */
285 /* ahi %r5,<K> */ 509 EMIT6_IMM(0xc20b0000, dst_reg, imm);
286 EMIT4_IMM(0xa75a0000, K); 510 EMIT_ZERO(dst_reg);
287 else if (test_facility(21)) 511 break;
288 /* alfi %r5,<K> */ 512 case BPF_ALU64 | BPF_ADD | BPF_K: /* dst = dst + imm */
289 EMIT6_IMM(0xc25b0000, K); 513 if (!imm)
290 else 514 break;
291 /* a %r5,<d(K)>(%r13) */ 515 /* agfi %dst,imm */
292 EMIT4_DISP(0x5a50d000, EMIT_CONST(K)); 516 EMIT6_IMM(0xc2080000, dst_reg, imm);
517 break;
518 /*
519 * BPF_SUB
520 */
521 case BPF_ALU | BPF_SUB | BPF_X: /* dst = (u32) dst - (u32) src */
522 /* sr %dst,%src */
523 EMIT2(0x1b00, dst_reg, src_reg);
524 EMIT_ZERO(dst_reg);
293 break; 525 break;
294 case BPF_ALU | BPF_SUB | BPF_X: /* A -= X */ 526 case BPF_ALU64 | BPF_SUB | BPF_X: /* dst = dst - src */
295 jit->seen |= SEEN_XREG; 527 /* sgr %dst,%src */
296 /* sr %r5,%r12 */ 528 EMIT4(0xb9090000, dst_reg, src_reg);
297 EMIT2(0x1b5c);
298 break; 529 break;
299 case BPF_ALU | BPF_SUB | BPF_K: /* A -= K */ 530 case BPF_ALU | BPF_SUB | BPF_K: /* dst = (u32) dst - (u32) imm */
300 if (!K) 531 if (!imm)
301 break; 532 break;
302 if (K <= 16384) 533 /* alfi %dst,-imm */
303 /* ahi %r5,-K */ 534 EMIT6_IMM(0xc20b0000, dst_reg, -imm);
304 EMIT4_IMM(0xa75a0000, -K); 535 EMIT_ZERO(dst_reg);
305 else if (test_facility(21))
306 /* alfi %r5,-K */
307 EMIT6_IMM(0xc25b0000, -K);
308 else
309 /* s %r5,<d(K)>(%r13) */
310 EMIT4_DISP(0x5b50d000, EMIT_CONST(K));
311 break;
312 case BPF_ALU | BPF_MUL | BPF_X: /* A *= X */
313 jit->seen |= SEEN_XREG;
314 /* msr %r5,%r12 */
315 EMIT4(0xb252005c);
316 break;
317 case BPF_ALU | BPF_MUL | BPF_K: /* A *= K */
318 if (K <= 16383)
319 /* mhi %r5,K */
320 EMIT4_IMM(0xa75c0000, K);
321 else if (test_facility(34))
322 /* msfi %r5,<K> */
323 EMIT6_IMM(0xc2510000, K);
324 else
325 /* ms %r5,<d(K)>(%r13) */
326 EMIT4_DISP(0x7150d000, EMIT_CONST(K));
327 break; 536 break;
328 case BPF_ALU | BPF_DIV | BPF_X: /* A /= X */ 537 case BPF_ALU64 | BPF_SUB | BPF_K: /* dst = dst - imm */
329 jit->seen |= SEEN_XREG | SEEN_RET0; 538 if (!imm)
330 /* ltr %r12,%r12 */ 539 break;
331 EMIT2(0x12cc); 540 /* agfi %dst,-imm */
332 /* jz <ret0> */ 541 EMIT6_IMM(0xc2080000, dst_reg, -imm);
333 EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); 542 break;
334 /* lhi %r4,0 */ 543 /*
335 EMIT4(0xa7480000); 544 * BPF_MUL
336 /* dlr %r4,%r12 */ 545 */
337 EMIT4(0xb997004c); 546 case BPF_ALU | BPF_MUL | BPF_X: /* dst = (u32) dst * (u32) src */
338 break; 547 /* msr %dst,%src */
339 case BPF_ALU | BPF_DIV | BPF_K: /* A /= K */ 548 EMIT4(0xb2520000, dst_reg, src_reg);
340 if (K == 1) 549 EMIT_ZERO(dst_reg);
550 break;
551 case BPF_ALU64 | BPF_MUL | BPF_X: /* dst = dst * src */
552 /* msgr %dst,%src */
553 EMIT4(0xb90c0000, dst_reg, src_reg);
554 break;
555 case BPF_ALU | BPF_MUL | BPF_K: /* dst = (u32) dst * (u32) imm */
556 if (imm == 1)
557 break;
558 /* msfi %r5,imm */
559 EMIT6_IMM(0xc2010000, dst_reg, imm);
560 EMIT_ZERO(dst_reg);
561 break;
562 case BPF_ALU64 | BPF_MUL | BPF_K: /* dst = dst * imm */
563 if (imm == 1)
341 break; 564 break;
342 /* lhi %r4,0 */ 565 /* msgfi %dst,imm */
343 EMIT4(0xa7480000); 566 EMIT6_IMM(0xc2000000, dst_reg, imm);
344 /* dl %r4,<d(K)>(%r13) */ 567 break;
345 EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); 568 /*
346 break; 569 * BPF_DIV / BPF_MOD
347 case BPF_ALU | BPF_MOD | BPF_X: /* A %= X */ 570 */
348 jit->seen |= SEEN_XREG | SEEN_RET0; 571 case BPF_ALU | BPF_DIV | BPF_X: /* dst = (u32) dst / (u32) src */
349 /* ltr %r12,%r12 */ 572 case BPF_ALU | BPF_MOD | BPF_X: /* dst = (u32) dst % (u32) src */
350 EMIT2(0x12cc); 573 {
574 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
575
576 jit->seen |= SEEN_RET0;
577 /* ltr %src,%src (if src == 0 goto fail) */
578 EMIT2(0x1200, src_reg, src_reg);
579 /* jz <ret0> */
580 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
581 /* lhi %w0,0 */
582 EMIT4_IMM(0xa7080000, REG_W0, 0);
583 /* lr %w1,%dst */
584 EMIT2(0x1800, REG_W1, dst_reg);
585 /* dlr %w0,%src */
586 EMIT4(0xb9970000, REG_W0, src_reg);
587 /* llgfr %dst,%rc */
588 EMIT4(0xb9160000, dst_reg, rc_reg);
589 break;
590 }
591 case BPF_ALU64 | BPF_DIV | BPF_X: /* dst = dst / (u32) src */
592 case BPF_ALU64 | BPF_MOD | BPF_X: /* dst = dst % (u32) src */
593 {
594 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
595
596 jit->seen |= SEEN_RET0;
597 /* ltgr %src,%src (if src == 0 goto fail) */
598 EMIT4(0xb9020000, src_reg, src_reg);
351 /* jz <ret0> */ 599 /* jz <ret0> */
352 EMIT4_PCREL(0xa7840000, (jit->ret0_ip - jit->prg)); 600 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg);
353 /* lhi %r4,0 */ 601 /* lghi %w0,0 */
354 EMIT4(0xa7480000); 602 EMIT4_IMM(0xa7090000, REG_W0, 0);
355 /* dlr %r4,%r12 */ 603 /* lgr %w1,%dst */
356 EMIT4(0xb997004c); 604 EMIT4(0xb9040000, REG_W1, dst_reg);
357 /* lr %r5,%r4 */ 605 /* llgfr %dst,%src (u32 cast) */
358 EMIT2(0x1854); 606 EMIT4(0xb9160000, dst_reg, src_reg);
359 break; 607 /* dlgr %w0,%dst */
360 case BPF_ALU | BPF_MOD | BPF_K: /* A %= K */ 608 EMIT4(0xb9870000, REG_W0, dst_reg);
361 if (K == 1) { 609 /* lgr %dst,%rc */
362 /* lhi %r5,0 */ 610 EMIT4(0xb9040000, dst_reg, rc_reg);
363 EMIT4(0xa7580000); 611 break;
612 }
613 case BPF_ALU | BPF_DIV | BPF_K: /* dst = (u32) dst / (u32) imm */
614 case BPF_ALU | BPF_MOD | BPF_K: /* dst = (u32) dst % (u32) imm */
615 {
616 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
617
618 if (imm == 1) {
619 if (BPF_OP(insn->code) == BPF_MOD)
620 /* lhgi %dst,0 */
621 EMIT4_IMM(0xa7090000, dst_reg, 0);
364 break; 622 break;
365 } 623 }
366 /* lhi %r4,0 */ 624 /* lhi %w0,0 */
367 EMIT4(0xa7480000); 625 EMIT4_IMM(0xa7080000, REG_W0, 0);
368 /* dl %r4,<d(K)>(%r13) */ 626 /* lr %w1,%dst */
369 EMIT6_DISP(0xe340d000, 0x0097, EMIT_CONST(K)); 627 EMIT2(0x1800, REG_W1, dst_reg);
370 /* lr %r5,%r4 */ 628 /* dl %w0,<d(imm)>(%l) */
371 EMIT2(0x1854); 629 EMIT6_DISP_LH(0xe3000000, 0x0097, REG_W0, REG_0, REG_L,
372 break; 630 EMIT_CONST_U32(imm));
373 case BPF_ALU | BPF_AND | BPF_X: /* A &= X */ 631 /* llgfr %dst,%rc */
374 jit->seen |= SEEN_XREG; 632 EMIT4(0xb9160000, dst_reg, rc_reg);
375 /* nr %r5,%r12 */ 633 break;
376 EMIT2(0x145c); 634 }
377 break; 635 case BPF_ALU64 | BPF_DIV | BPF_K: /* dst = dst / (u32) imm */
378 case BPF_ALU | BPF_AND | BPF_K: /* A &= K */ 636 case BPF_ALU64 | BPF_MOD | BPF_K: /* dst = dst % (u32) imm */
379 if (test_facility(21)) 637 {
380 /* nilf %r5,<K> */ 638 int rc_reg = BPF_OP(insn->code) == BPF_DIV ? REG_W1 : REG_W0;
381 EMIT6_IMM(0xc05b0000, K); 639
382 else 640 if (imm == 1) {
383 /* n %r5,<d(K)>(%r13) */ 641 if (BPF_OP(insn->code) == BPF_MOD)
384 EMIT4_DISP(0x5450d000, EMIT_CONST(K)); 642 /* lhgi %dst,0 */
385 break; 643 EMIT4_IMM(0xa7090000, dst_reg, 0);
386 case BPF_ALU | BPF_OR | BPF_X: /* A |= X */ 644 break;
387 jit->seen |= SEEN_XREG; 645 }
388 /* or %r5,%r12 */ 646 /* lghi %w0,0 */
389 EMIT2(0x165c); 647 EMIT4_IMM(0xa7090000, REG_W0, 0);
390 break; 648 /* lgr %w1,%dst */
391 case BPF_ALU | BPF_OR | BPF_K: /* A |= K */ 649 EMIT4(0xb9040000, REG_W1, dst_reg);
392 if (test_facility(21)) 650 /* dlg %w0,<d(imm)>(%l) */
393 /* oilf %r5,<K> */ 651 EMIT6_DISP_LH(0xe3000000, 0x0087, REG_W0, REG_0, REG_L,
394 EMIT6_IMM(0xc05d0000, K); 652 EMIT_CONST_U64((u32) imm));
395 else 653 /* lgr %dst,%rc */
396 /* o %r5,<d(K)>(%r13) */ 654 EMIT4(0xb9040000, dst_reg, rc_reg);
397 EMIT4_DISP(0x5650d000, EMIT_CONST(K)); 655 break;
656 }
657 /*
658 * BPF_AND
659 */
660 case BPF_ALU | BPF_AND | BPF_X: /* dst = (u32) dst & (u32) src */
661 /* nr %dst,%src */
662 EMIT2(0x1400, dst_reg, src_reg);
663 EMIT_ZERO(dst_reg);
664 break;
665 case BPF_ALU64 | BPF_AND | BPF_X: /* dst = dst & src */
666 /* ngr %dst,%src */
667 EMIT4(0xb9800000, dst_reg, src_reg);
668 break;
669 case BPF_ALU | BPF_AND | BPF_K: /* dst = (u32) dst & (u32) imm */
670 /* nilf %dst,imm */
671 EMIT6_IMM(0xc00b0000, dst_reg, imm);
672 EMIT_ZERO(dst_reg);
398 break; 673 break;
399 case BPF_ANC | SKF_AD_ALU_XOR_X: /* A ^= X; */ 674 case BPF_ALU64 | BPF_AND | BPF_K: /* dst = dst & imm */
400 case BPF_ALU | BPF_XOR | BPF_X: 675 /* ng %dst,<d(imm)>(%l) */
401 jit->seen |= SEEN_XREG; 676 EMIT6_DISP_LH(0xe3000000, 0x0080, dst_reg, REG_0, REG_L,
402 /* xr %r5,%r12 */ 677 EMIT_CONST_U64(imm));
403 EMIT2(0x175c);
404 break; 678 break;
405 case BPF_ALU | BPF_XOR | BPF_K: /* A ^= K */ 679 /*
406 if (!K) 680 * BPF_OR
681 */
682 case BPF_ALU | BPF_OR | BPF_X: /* dst = (u32) dst | (u32) src */
683 /* or %dst,%src */
684 EMIT2(0x1600, dst_reg, src_reg);
685 EMIT_ZERO(dst_reg);
686 break;
687 case BPF_ALU64 | BPF_OR | BPF_X: /* dst = dst | src */
688 /* ogr %dst,%src */
689 EMIT4(0xb9810000, dst_reg, src_reg);
690 break;
691 case BPF_ALU | BPF_OR | BPF_K: /* dst = (u32) dst | (u32) imm */
692 /* oilf %dst,imm */
693 EMIT6_IMM(0xc00d0000, dst_reg, imm);
694 EMIT_ZERO(dst_reg);
695 break;
696 case BPF_ALU64 | BPF_OR | BPF_K: /* dst = dst | imm */
697 /* og %dst,<d(imm)>(%l) */
698 EMIT6_DISP_LH(0xe3000000, 0x0081, dst_reg, REG_0, REG_L,
699 EMIT_CONST_U64(imm));
700 break;
701 /*
702 * BPF_XOR
703 */
704 case BPF_ALU | BPF_XOR | BPF_X: /* dst = (u32) dst ^ (u32) src */
705 /* xr %dst,%src */
706 EMIT2(0x1700, dst_reg, src_reg);
707 EMIT_ZERO(dst_reg);
708 break;
709 case BPF_ALU64 | BPF_XOR | BPF_X: /* dst = dst ^ src */
710 /* xgr %dst,%src */
711 EMIT4(0xb9820000, dst_reg, src_reg);
712 break;
713 case BPF_ALU | BPF_XOR | BPF_K: /* dst = (u32) dst ^ (u32) imm */
714 if (!imm)
407 break; 715 break;
408 /* x %r5,<d(K)>(%r13) */ 716 /* xilf %dst,imm */
409 EMIT4_DISP(0x5750d000, EMIT_CONST(K)); 717 EMIT6_IMM(0xc0070000, dst_reg, imm);
718 EMIT_ZERO(dst_reg);
719 break;
720 case BPF_ALU64 | BPF_XOR | BPF_K: /* dst = dst ^ imm */
721 /* xg %dst,<d(imm)>(%l) */
722 EMIT6_DISP_LH(0xe3000000, 0x0082, dst_reg, REG_0, REG_L,
723 EMIT_CONST_U64(imm));
724 break;
725 /*
726 * BPF_LSH
727 */
728 case BPF_ALU | BPF_LSH | BPF_X: /* dst = (u32) dst << (u32) src */
729 /* sll %dst,0(%src) */
730 EMIT4_DISP(0x89000000, dst_reg, src_reg, 0);
731 EMIT_ZERO(dst_reg);
410 break; 732 break;
411 case BPF_ALU | BPF_LSH | BPF_X: /* A <<= X; */ 733 case BPF_ALU64 | BPF_LSH | BPF_X: /* dst = dst << src */
412 jit->seen |= SEEN_XREG; 734 /* sllg %dst,%dst,0(%src) */
413 /* sll %r5,0(%r12) */ 735 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, src_reg, 0);
414 EMIT4(0x8950c000);
415 break; 736 break;
416 case BPF_ALU | BPF_LSH | BPF_K: /* A <<= K */ 737 case BPF_ALU | BPF_LSH | BPF_K: /* dst = (u32) dst << (u32) imm */
417 if (K == 0) 738 if (imm == 0)
418 break; 739 break;
419 /* sll %r5,K */ 740 /* sll %dst,imm(%r0) */
420 EMIT4_DISP(0x89500000, K); 741 EMIT4_DISP(0x89000000, dst_reg, REG_0, imm);
742 EMIT_ZERO(dst_reg);
421 break; 743 break;
422 case BPF_ALU | BPF_RSH | BPF_X: /* A >>= X; */ 744 case BPF_ALU64 | BPF_LSH | BPF_K: /* dst = dst << imm */
423 jit->seen |= SEEN_XREG; 745 if (imm == 0)
424 /* srl %r5,0(%r12) */ 746 break;
425 EMIT4(0x8850c000); 747 /* sllg %dst,%dst,imm(%r0) */
748 EMIT6_DISP_LH(0xeb000000, 0x000d, dst_reg, dst_reg, REG_0, imm);
749 break;
750 /*
751 * BPF_RSH
752 */
753 case BPF_ALU | BPF_RSH | BPF_X: /* dst = (u32) dst >> (u32) src */
754 /* srl %dst,0(%src) */
755 EMIT4_DISP(0x88000000, dst_reg, src_reg, 0);
756 EMIT_ZERO(dst_reg);
426 break; 757 break;
427 case BPF_ALU | BPF_RSH | BPF_K: /* A >>= K; */ 758 case BPF_ALU64 | BPF_RSH | BPF_X: /* dst = dst >> src */
428 if (K == 0) 759 /* srlg %dst,%dst,0(%src) */
760 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, src_reg, 0);
761 break;
762 case BPF_ALU | BPF_RSH | BPF_K: /* dst = (u32) dst >> (u32) imm */
763 if (imm == 0)
429 break; 764 break;
430 /* srl %r5,K */ 765 /* srl %dst,imm(%r0) */
431 EMIT4_DISP(0x88500000, K); 766 EMIT4_DISP(0x88000000, dst_reg, REG_0, imm);
432 break; 767 EMIT_ZERO(dst_reg);
433 case BPF_ALU | BPF_NEG: /* A = -A */ 768 break;
434 /* lcr %r5,%r5 */ 769 case BPF_ALU64 | BPF_RSH | BPF_K: /* dst = dst >> imm */
435 EMIT2(0x1355); 770 if (imm == 0)
436 break;
437 case BPF_JMP | BPF_JA: /* ip += K */
438 offset = addrs[i + K] + jit->start - jit->prg;
439 EMIT4_PCREL(0xa7f40000, offset);
440 break;
441 case BPF_JMP | BPF_JGT | BPF_K: /* ip += (A > K) ? jt : jf */
442 mask = 0x200000; /* jh */
443 goto kbranch;
444 case BPF_JMP | BPF_JGE | BPF_K: /* ip += (A >= K) ? jt : jf */
445 mask = 0xa00000; /* jhe */
446 goto kbranch;
447 case BPF_JMP | BPF_JEQ | BPF_K: /* ip += (A == K) ? jt : jf */
448 mask = 0x800000; /* je */
449kbranch: /* Emit compare if the branch targets are different */
450 if (filter->jt != filter->jf) {
451 if (test_facility(21))
452 /* clfi %r5,<K> */
453 EMIT6_IMM(0xc25f0000, K);
454 else
455 /* cl %r5,<d(K)>(%r13) */
456 EMIT4_DISP(0x5550d000, EMIT_CONST(K));
457 }
458branch: if (filter->jt == filter->jf) {
459 if (filter->jt == 0)
460 break;
461 /* j <jt> */
462 offset = addrs[i + filter->jt] + jit->start - jit->prg;
463 EMIT4_PCREL(0xa7f40000, offset);
464 break; 771 break;
465 } 772 /* srlg %dst,%dst,imm(%r0) */
466 if (filter->jt != 0) { 773 EMIT6_DISP_LH(0xeb000000, 0x000c, dst_reg, dst_reg, REG_0, imm);
467 /* brc <mask>,<jt> */
468 offset = addrs[i + filter->jt] + jit->start - jit->prg;
469 EMIT4_PCREL(0xa7040000 | mask, offset);
470 }
471 if (filter->jf != 0) {
472 /* brc <mask^15>,<jf> */
473 offset = addrs[i + filter->jf] + jit->start - jit->prg;
474 EMIT4_PCREL(0xa7040000 | (mask ^ 0xf00000), offset);
475 }
476 break; 774 break;
477 case BPF_JMP | BPF_JSET | BPF_K: /* ip += (A & K) ? jt : jf */ 775 /*
478 mask = 0x700000; /* jnz */ 776 * BPF_ARSH
479 /* Emit test if the branch targets are different */ 777 */
480 if (filter->jt != filter->jf) { 778 case BPF_ALU64 | BPF_ARSH | BPF_X: /* ((s64) dst) >>= src */
481 if (K > 65535) { 779 /* srag %dst,%dst,0(%src) */
482 /* lr %r4,%r5 */ 780 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, src_reg, 0);
483 EMIT2(0x1845); 781 break;
484 /* n %r4,<d(K)>(%r13) */ 782 case BPF_ALU64 | BPF_ARSH | BPF_K: /* ((s64) dst) >>= imm */
485 EMIT4_DISP(0x5440d000, EMIT_CONST(K)); 783 if (imm == 0)
486 } else 784 break;
487 /* tmll %r5,K */ 785 /* srag %dst,%dst,imm(%r0) */
488 EMIT4_IMM(0xa7510000, K); 786 EMIT6_DISP_LH(0xeb000000, 0x000a, dst_reg, dst_reg, REG_0, imm);
489 } 787 break;
490 goto branch; 788 /*
491 case BPF_JMP | BPF_JGT | BPF_X: /* ip += (A > X) ? jt : jf */ 789 * BPF_NEG
492 mask = 0x200000; /* jh */ 790 */
493 goto xbranch; 791 case BPF_ALU | BPF_NEG: /* dst = (u32) -dst */
494 case BPF_JMP | BPF_JGE | BPF_X: /* ip += (A >= X) ? jt : jf */ 792 /* lcr %dst,%dst */
495 mask = 0xa00000; /* jhe */ 793 EMIT2(0x1300, dst_reg, dst_reg);
496 goto xbranch; 794 EMIT_ZERO(dst_reg);
497 case BPF_JMP | BPF_JEQ | BPF_X: /* ip += (A == X) ? jt : jf */ 795 break;
498 mask = 0x800000; /* je */ 796 case BPF_ALU64 | BPF_NEG: /* dst = -dst */
499xbranch: /* Emit compare if the branch targets are different */ 797 /* lcgr %dst,%dst */
500 if (filter->jt != filter->jf) { 798 EMIT4(0xb9130000, dst_reg, dst_reg);
501 jit->seen |= SEEN_XREG; 799 break;
502 /* clr %r5,%r12 */ 800 /*
503 EMIT2(0x155c); 801 * BPF_FROM_BE/LE
504 } 802 */
505 goto branch; 803 case BPF_ALU | BPF_END | BPF_FROM_BE:
506 case BPF_JMP | BPF_JSET | BPF_X: /* ip += (A & X) ? jt : jf */ 804 /* s390 is big endian, therefore only clear high order bytes */
507 mask = 0x700000; /* jnz */ 805 switch (imm) {
508 /* Emit test if the branch targets are different */ 806 case 16: /* dst = (u16) cpu_to_be16(dst) */
509 if (filter->jt != filter->jf) { 807 /* llghr %dst,%dst */
510 jit->seen |= SEEN_XREG; 808 EMIT4(0xb9850000, dst_reg, dst_reg);
511 /* lr %r4,%r5 */ 809 break;
512 EMIT2(0x1845); 810 case 32: /* dst = (u32) cpu_to_be32(dst) */
513 /* nr %r4,%r12 */ 811 /* llgfr %dst,%dst */
514 EMIT2(0x144c); 812 EMIT4(0xb9160000, dst_reg, dst_reg);
813 break;
814 case 64: /* dst = (u64) cpu_to_be64(dst) */
815 break;
515 } 816 }
516 goto branch;
517 case BPF_LD | BPF_W | BPF_ABS: /* A = *(u32 *) (skb->data+K) */
518 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_WORD;
519 offset = jit->off_load_word;
520 goto load_abs;
521 case BPF_LD | BPF_H | BPF_ABS: /* A = *(u16 *) (skb->data+K) */
522 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_HALF;
523 offset = jit->off_load_half;
524 goto load_abs;
525 case BPF_LD | BPF_B | BPF_ABS: /* A = *(u8 *) (skb->data+K) */
526 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_BYTE;
527 offset = jit->off_load_byte;
528load_abs: if ((int) K < 0)
529 goto out;
530call_fn: /* lg %r1,<d(function)>(%r13) */
531 EMIT6_DISP(0xe310d000, 0x0004, offset);
532 /* l %r3,<d(K)>(%r13) */
533 EMIT4_DISP(0x5830d000, EMIT_CONST(K));
534 /* basr %r8,%r1 */
535 EMIT2(0x0d81);
536 /* jnz <ret0> */
537 EMIT4_PCREL(0xa7740000, (jit->ret0_ip - jit->prg));
538 break; 817 break;
539 case BPF_LD | BPF_W | BPF_IND: /* A = *(u32 *) (skb->data+K+X) */ 818 case BPF_ALU | BPF_END | BPF_FROM_LE:
540 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IWORD; 819 switch (imm) {
541 offset = jit->off_load_iword; 820 case 16: /* dst = (u16) cpu_to_le16(dst) */
542 goto call_fn; 821 /* lrvr %dst,%dst */
543 case BPF_LD | BPF_H | BPF_IND: /* A = *(u16 *) (skb->data+K+X) */ 822 EMIT4(0xb91f0000, dst_reg, dst_reg);
544 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IHALF; 823 /* srl %dst,16(%r0) */
545 offset = jit->off_load_ihalf; 824 EMIT4_DISP(0x88000000, dst_reg, REG_0, 16);
546 goto call_fn; 825 /* llghr %dst,%dst */
547 case BPF_LD | BPF_B | BPF_IND: /* A = *(u8 *) (skb->data+K+X) */ 826 EMIT4(0xb9850000, dst_reg, dst_reg);
548 jit->seen |= SEEN_DATAREF | SEEN_RET0 | SEEN_LOAD_IBYTE; 827 break;
549 offset = jit->off_load_ibyte; 828 case 32: /* dst = (u32) cpu_to_le32(dst) */
550 goto call_fn; 829 /* lrvr %dst,%dst */
551 case BPF_LDX | BPF_B | BPF_MSH: 830 EMIT4(0xb91f0000, dst_reg, dst_reg);
552 /* X = (*(u8 *)(skb->data+K) & 0xf) << 2 */ 831 /* llgfr %dst,%dst */
553 jit->seen |= SEEN_RET0; 832 EMIT4(0xb9160000, dst_reg, dst_reg);
554 if ((int) K < 0) { 833 break;
555 /* j <ret0> */ 834 case 64: /* dst = (u64) cpu_to_le64(dst) */
556 EMIT4_PCREL(0xa7f40000, (jit->ret0_ip - jit->prg)); 835 /* lrvgr %dst,%dst */
836 EMIT4(0xb90f0000, dst_reg, dst_reg);
557 break; 837 break;
558 } 838 }
559 jit->seen |= SEEN_DATAREF | SEEN_LOAD_BMSH;
560 offset = jit->off_load_bmsh;
561 goto call_fn;
562 case BPF_LD | BPF_W | BPF_LEN: /* A = skb->len; */
563 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, len) != 4);
564 /* l %r5,<d(len)>(%r2) */
565 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, len));
566 break;
567 case BPF_LDX | BPF_W | BPF_LEN: /* X = skb->len; */
568 jit->seen |= SEEN_XREG;
569 /* l %r12,<d(len)>(%r2) */
570 EMIT4_DISP(0x58c02000, offsetof(struct sk_buff, len));
571 break;
572 case BPF_LD | BPF_IMM: /* A = K */
573 if (K <= 16383)
574 /* lhi %r5,K */
575 EMIT4_IMM(0xa7580000, K);
576 else if (test_facility(21))
577 /* llilf %r5,<K> */
578 EMIT6_IMM(0xc05f0000, K);
579 else
580 /* l %r5,<d(K)>(%r13) */
581 EMIT4_DISP(0x5850d000, EMIT_CONST(K));
582 break;
583 case BPF_LDX | BPF_IMM: /* X = K */
584 jit->seen |= SEEN_XREG;
585 if (K <= 16383)
586 /* lhi %r12,<K> */
587 EMIT4_IMM(0xa7c80000, K);
588 else if (test_facility(21))
589 /* llilf %r12,<K> */
590 EMIT6_IMM(0xc0cf0000, K);
591 else
592 /* l %r12,<d(K)>(%r13) */
593 EMIT4_DISP(0x58c0d000, EMIT_CONST(K));
594 break; 839 break;
595 case BPF_LD | BPF_MEM: /* A = mem[K] */ 840 /*
841 * BPF_ST(X)
842 */
843 case BPF_STX | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = src_reg */
844 /* stcy %src,off(%dst) */
845 EMIT6_DISP_LH(0xe3000000, 0x0072, src_reg, dst_reg, REG_0, off);
846 jit->seen |= SEEN_MEM;
847 break;
848 case BPF_STX | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = src */
849 /* sthy %src,off(%dst) */
850 EMIT6_DISP_LH(0xe3000000, 0x0070, src_reg, dst_reg, REG_0, off);
851 jit->seen |= SEEN_MEM;
852 break;
853 case BPF_STX | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = src */
854 /* sty %src,off(%dst) */
855 EMIT6_DISP_LH(0xe3000000, 0x0050, src_reg, dst_reg, REG_0, off);
856 jit->seen |= SEEN_MEM;
857 break;
858 case BPF_STX | BPF_MEM | BPF_DW: /* (u64 *)(dst + off) = src */
859 /* stg %src,off(%dst) */
860 EMIT6_DISP_LH(0xe3000000, 0x0024, src_reg, dst_reg, REG_0, off);
861 jit->seen |= SEEN_MEM;
862 break;
863 case BPF_ST | BPF_MEM | BPF_B: /* *(u8 *)(dst + off) = imm */
864 /* lhi %w0,imm */
865 EMIT4_IMM(0xa7080000, REG_W0, (u8) imm);
866 /* stcy %w0,off(dst) */
867 EMIT6_DISP_LH(0xe3000000, 0x0072, REG_W0, dst_reg, REG_0, off);
868 jit->seen |= SEEN_MEM;
869 break;
870 case BPF_ST | BPF_MEM | BPF_H: /* (u16 *)(dst + off) = imm */
871 /* lhi %w0,imm */
872 EMIT4_IMM(0xa7080000, REG_W0, (u16) imm);
873 /* sthy %w0,off(dst) */
874 EMIT6_DISP_LH(0xe3000000, 0x0070, REG_W0, dst_reg, REG_0, off);
596 jit->seen |= SEEN_MEM; 875 jit->seen |= SEEN_MEM;
597 /* l %r5,<K>(%r15) */
598 EMIT4_DISP(0x5850f000,
599 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
600 break;
601 case BPF_LDX | BPF_MEM: /* X = mem[K] */
602 jit->seen |= SEEN_XREG | SEEN_MEM;
603 /* l %r12,<K>(%r15) */
604 EMIT4_DISP(0x58c0f000,
605 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4);
606 break;
607 case BPF_MISC | BPF_TAX: /* X = A */
608 jit->seen |= SEEN_XREG;
609 /* lr %r12,%r5 */
610 EMIT2(0x18c5);
611 break;
612 case BPF_MISC | BPF_TXA: /* A = X */
613 jit->seen |= SEEN_XREG;
614 /* lr %r5,%r12 */
615 EMIT2(0x185c);
616 break;
617 case BPF_RET | BPF_K:
618 if (K == 0) {
619 jit->seen |= SEEN_RET0;
620 if (last)
621 break;
622 /* j <ret0> */
623 EMIT4_PCREL(0xa7f40000, jit->ret0_ip - jit->prg);
624 } else {
625 if (K <= 16383)
626 /* lghi %r2,K */
627 EMIT4_IMM(0xa7290000, K);
628 else
629 /* llgf %r2,<K>(%r13) */
630 EMIT6_DISP(0xe320d000, 0x0016, EMIT_CONST(K));
631 /* j <exit> */
632 if (last && !(jit->seen & SEEN_RET0))
633 break;
634 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
635 }
636 break; 876 break;
637 case BPF_RET | BPF_A: 877 case BPF_ST | BPF_MEM | BPF_W: /* *(u32 *)(dst + off) = imm */
638 /* llgfr %r2,%r5 */ 878 /* llilf %w0,imm */
639 EMIT4(0xb9160025); 879 EMIT6_IMM(0xc00f0000, REG_W0, (u32) imm);
880 /* sty %w0,off(%dst) */
881 EMIT6_DISP_LH(0xe3000000, 0x0050, REG_W0, dst_reg, REG_0, off);
882 jit->seen |= SEEN_MEM;
883 break;
884 case BPF_ST | BPF_MEM | BPF_DW: /* *(u64 *)(dst + off) = imm */
885 /* lgfi %w0,imm */
886 EMIT6_IMM(0xc0010000, REG_W0, imm);
887 /* stg %w0,off(%dst) */
888 EMIT6_DISP_LH(0xe3000000, 0x0024, REG_W0, dst_reg, REG_0, off);
889 jit->seen |= SEEN_MEM;
890 break;
891 /*
892 * BPF_STX XADD (atomic_add)
893 */
894 case BPF_STX | BPF_XADD | BPF_W: /* *(u32 *)(dst + off) += src */
895 /* laal %w0,%src,off(%dst) */
896 EMIT6_DISP_LH(0xeb000000, 0x00fa, REG_W0, src_reg,
897 dst_reg, off);
898 jit->seen |= SEEN_MEM;
899 break;
900 case BPF_STX | BPF_XADD | BPF_DW: /* *(u64 *)(dst + off) += src */
901 /* laalg %w0,%src,off(%dst) */
902 EMIT6_DISP_LH(0xeb000000, 0x00ea, REG_W0, src_reg,
903 dst_reg, off);
904 jit->seen |= SEEN_MEM;
905 break;
906 /*
907 * BPF_LDX
908 */
909 case BPF_LDX | BPF_MEM | BPF_B: /* dst = *(u8 *)(ul) (src + off) */
910 /* llgc %dst,0(off,%src) */
911 EMIT6_DISP_LH(0xe3000000, 0x0090, dst_reg, src_reg, REG_0, off);
912 jit->seen |= SEEN_MEM;
913 break;
914 case BPF_LDX | BPF_MEM | BPF_H: /* dst = *(u16 *)(ul) (src + off) */
915 /* llgh %dst,0(off,%src) */
916 EMIT6_DISP_LH(0xe3000000, 0x0091, dst_reg, src_reg, REG_0, off);
917 jit->seen |= SEEN_MEM;
918 break;
919 case BPF_LDX | BPF_MEM | BPF_W: /* dst = *(u32 *)(ul) (src + off) */
920 /* llgf %dst,off(%src) */
921 jit->seen |= SEEN_MEM;
922 EMIT6_DISP_LH(0xe3000000, 0x0016, dst_reg, src_reg, REG_0, off);
923 break;
924 case BPF_LDX | BPF_MEM | BPF_DW: /* dst = *(u64 *)(ul) (src + off) */
925 /* lg %dst,0(off,%src) */
926 jit->seen |= SEEN_MEM;
927 EMIT6_DISP_LH(0xe3000000, 0x0004, dst_reg, src_reg, REG_0, off);
928 break;
929 /*
930 * BPF_JMP / CALL
931 */
932 case BPF_JMP | BPF_CALL:
933 {
934 /*
935 * b0 = (__bpf_call_base + imm)(b1, b2, b3, b4, b5)
936 */
937 const u64 func = (u64)__bpf_call_base + imm;
938
939 REG_SET_SEEN(BPF_REG_5);
940 jit->seen |= SEEN_FUNC;
941 /* lg %w1,<d(imm)>(%l) */
942 EMIT6_DISP(0xe3000000, 0x0004, REG_W1, REG_0, REG_L,
943 EMIT_CONST_U64(func));
944 /* basr %r14,%w1 */
945 EMIT2(0x0d00, REG_14, REG_W1);
946 /* lgr %b0,%r2: load return value into %b0 */
947 EMIT4(0xb9040000, BPF_REG_0, REG_2);
948 break;
949 }
950 case BPF_JMP | BPF_EXIT: /* return b0 */
951 last = (i == fp->len - 1) ? 1 : 0;
952 if (last && !(jit->seen & SEEN_RET0))
953 break;
640 /* j <exit> */ 954 /* j <exit> */
641 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg); 955 EMIT4_PCREL(0xa7f40000, jit->exit_ip - jit->prg);
642 break; 956 break;
643 case BPF_ST: /* mem[K] = A */ 957 /*
644 jit->seen |= SEEN_MEM; 958 * Branch relative (number of skipped instructions) to offset on
645 /* st %r5,<K>(%r15) */ 959 * condition.
646 EMIT4_DISP(0x5050f000, 960 *
647 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); 961 * Condition code to mask mapping:
648 break; 962 *
649 case BPF_STX: /* mem[K] = X : mov %ebx,off8(%rbp) */ 963 * CC | Description | Mask
650 jit->seen |= SEEN_XREG | SEEN_MEM; 964 * ------------------------------
651 /* st %r12,<K>(%r15) */ 965 * 0 | Operands equal | 8
652 EMIT4_DISP(0x50c0f000, 966 * 1 | First operand low | 4
653 (jit->seen & SEEN_DATAREF) ? 160 + K*4 : K*4); 967 * 2 | First operand high | 2
654 break; 968 * 3 | Unused | 1
655 case BPF_ANC | SKF_AD_PROTOCOL: /* A = ntohs(skb->protocol); */ 969 *
656 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, protocol) != 2); 970 * For s390x relative branches: ip = ip + off_bytes
657 /* lhi %r5,0 */ 971 * For BPF relative branches: insn = insn + off_insns + 1
658 EMIT4(0xa7580000); 972 *
659 /* icm %r5,3,<d(protocol)>(%r2) */ 973 * For example for s390x with offset 0 we jump to the branch
660 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, protocol)); 974 * instruction itself (loop) and for BPF with offset 0 we
661 break; 975 * branch to the instruction behind the branch.
662 case BPF_ANC | SKF_AD_IFINDEX: /* if (!skb->dev) return 0; 976 */
663 * A = skb->dev->ifindex */ 977 case BPF_JMP | BPF_JA: /* if (true) */
664 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, ifindex) != 4); 978 mask = 0xf000; /* j */
665 jit->seen |= SEEN_RET0; 979 goto branch_oc;
666 /* lg %r1,<d(dev)>(%r2) */ 980 case BPF_JMP | BPF_JSGT | BPF_K: /* ((s64) dst > (s64) imm) */
667 EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); 981 mask = 0x2000; /* jh */
668 /* ltgr %r1,%r1 */ 982 goto branch_ks;
669 EMIT4(0xb9020011); 983 case BPF_JMP | BPF_JSGE | BPF_K: /* ((s64) dst >= (s64) imm) */
670 /* jz <ret0> */ 984 mask = 0xa000; /* jhe */
671 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 985 goto branch_ks;
672 /* l %r5,<d(ifindex)>(%r1) */ 986 case BPF_JMP | BPF_JGT | BPF_K: /* (dst_reg > imm) */
673 EMIT4_DISP(0x58501000, offsetof(struct net_device, ifindex)); 987 mask = 0x2000; /* jh */
674 break; 988 goto branch_ku;
675 case BPF_ANC | SKF_AD_MARK: /* A = skb->mark */ 989 case BPF_JMP | BPF_JGE | BPF_K: /* (dst_reg >= imm) */
676 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, mark) != 4); 990 mask = 0xa000; /* jhe */
677 /* l %r5,<d(mark)>(%r2) */ 991 goto branch_ku;
678 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, mark)); 992 case BPF_JMP | BPF_JNE | BPF_K: /* (dst_reg != imm) */
679 break; 993 mask = 0x7000; /* jne */
680 case BPF_ANC | SKF_AD_QUEUE: /* A = skb->queue_mapping */ 994 goto branch_ku;
681 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, queue_mapping) != 2); 995 case BPF_JMP | BPF_JEQ | BPF_K: /* (dst_reg == imm) */
682 /* lhi %r5,0 */ 996 mask = 0x8000; /* je */
683 EMIT4(0xa7580000); 997 goto branch_ku;
684 /* icm %r5,3,<d(queue_mapping)>(%r2) */ 998 case BPF_JMP | BPF_JSET | BPF_K: /* (dst_reg & imm) */
685 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, queue_mapping)); 999 mask = 0x7000; /* jnz */
686 break; 1000 /* lgfi %w1,imm (load sign extend imm) */
687 case BPF_ANC | SKF_AD_HATYPE: /* if (!skb->dev) return 0; 1001 EMIT6_IMM(0xc0010000, REG_W1, imm);
688 * A = skb->dev->type */ 1002 /* ngr %w1,%dst */
689 BUILD_BUG_ON(FIELD_SIZEOF(struct net_device, type) != 2); 1003 EMIT4(0xb9800000, REG_W1, dst_reg);
690 jit->seen |= SEEN_RET0; 1004 goto branch_oc;
691 /* lg %r1,<d(dev)>(%r2) */ 1005
692 EMIT6_DISP(0xe3102000, 0x0004, offsetof(struct sk_buff, dev)); 1006 case BPF_JMP | BPF_JSGT | BPF_X: /* ((s64) dst > (s64) src) */
693 /* ltgr %r1,%r1 */ 1007 mask = 0x2000; /* jh */
694 EMIT4(0xb9020011); 1008 goto branch_xs;
695 /* jz <ret0> */ 1009 case BPF_JMP | BPF_JSGE | BPF_X: /* ((s64) dst >= (s64) src) */
696 EMIT4_PCREL(0xa7840000, jit->ret0_ip - jit->prg); 1010 mask = 0xa000; /* jhe */
697 /* lhi %r5,0 */ 1011 goto branch_xs;
698 EMIT4(0xa7580000); 1012 case BPF_JMP | BPF_JGT | BPF_X: /* (dst > src) */
699 /* icm %r5,3,<d(type)>(%r1) */ 1013 mask = 0x2000; /* jh */
700 EMIT4_DISP(0xbf531000, offsetof(struct net_device, type)); 1014 goto branch_xu;
701 break; 1015 case BPF_JMP | BPF_JGE | BPF_X: /* (dst >= src) */
702 case BPF_ANC | SKF_AD_RXHASH: /* A = skb->hash */ 1016 mask = 0xa000; /* jhe */
703 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, hash) != 4); 1017 goto branch_xu;
704 /* l %r5,<d(hash)>(%r2) */ 1018 case BPF_JMP | BPF_JNE | BPF_X: /* (dst != src) */
705 EMIT4_DISP(0x58502000, offsetof(struct sk_buff, hash)); 1019 mask = 0x7000; /* jne */
706 break; 1020 goto branch_xu;
707 case BPF_ANC | SKF_AD_VLAN_TAG: 1021 case BPF_JMP | BPF_JEQ | BPF_X: /* (dst == src) */
708 case BPF_ANC | SKF_AD_VLAN_TAG_PRESENT: 1022 mask = 0x8000; /* je */
709 BUILD_BUG_ON(FIELD_SIZEOF(struct sk_buff, vlan_tci) != 2); 1023 goto branch_xu;
710 BUILD_BUG_ON(VLAN_TAG_PRESENT != 0x1000); 1024 case BPF_JMP | BPF_JSET | BPF_X: /* (dst & src) */
711 /* lhi %r5,0 */ 1025 mask = 0x7000; /* jnz */
712 EMIT4(0xa7580000); 1026 /* ngrk %w1,%dst,%src */
713 /* icm %r5,3,<d(vlan_tci)>(%r2) */ 1027 EMIT4_RRF(0xb9e40000, REG_W1, dst_reg, src_reg);
714 EMIT4_DISP(0xbf532000, offsetof(struct sk_buff, vlan_tci)); 1028 goto branch_oc;
715 if (code == (BPF_ANC | SKF_AD_VLAN_TAG)) { 1029branch_ks:
716 /* nill %r5,0xefff */ 1030 /* lgfi %w1,imm (load sign extend imm) */
717 EMIT4_IMM(0xa5570000, ~VLAN_TAG_PRESENT); 1031 EMIT6_IMM(0xc0010000, REG_W1, imm);
718 } else { 1032 /* cgrj %dst,%w1,mask,off */
719 /* nill %r5,0x1000 */ 1033 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, REG_W1, i, off, mask);
720 EMIT4_IMM(0xa5570000, VLAN_TAG_PRESENT); 1034 break;
721 /* srl %r5,12 */ 1035branch_ku:
722 EMIT4_DISP(0x88500000, 12); 1036 /* lgfi %w1,imm (load sign extend imm) */
723 } 1037 EMIT6_IMM(0xc0010000, REG_W1, imm);
1038 /* clgrj %dst,%w1,mask,off */
1039 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, REG_W1, i, off, mask);
1040 break;
1041branch_xs:
1042 /* cgrj %dst,%src,mask,off */
1043 EMIT6_PCREL(0xec000000, 0x0064, dst_reg, src_reg, i, off, mask);
1044 break;
1045branch_xu:
1046 /* clgrj %dst,%src,mask,off */
1047 EMIT6_PCREL(0xec000000, 0x0065, dst_reg, src_reg, i, off, mask);
1048 break;
1049branch_oc:
1050 /* brc mask,jmp_off (branch instruction needs 4 bytes) */
1051 jmp_off = addrs[i + off + 1] - (addrs[i + 1] - 4);
1052 EMIT4_PCREL(0xa7040000 | mask << 8, jmp_off);
724 break; 1053 break;
725 case BPF_ANC | SKF_AD_PKTTYPE: 1054 /*
726 /* lhi %r5,0 */ 1055 * BPF_LD
727 EMIT4(0xa7580000); 1056 */
728 /* ic %r5,<d(pkt_type_offset)>(%r2) */ 1057 case BPF_LD | BPF_ABS | BPF_B: /* b0 = *(u8 *) (skb->data+imm) */
729 EMIT4_DISP(0x43502000, PKT_TYPE_OFFSET()); 1058 case BPF_LD | BPF_IND | BPF_B: /* b0 = *(u8 *) (skb->data+imm+src) */
730 /* srl %r5,5 */ 1059 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
731 EMIT4_DISP(0x88500000, 5); 1060 func_addr = __pa(sk_load_byte_pos);
732 break; 1061 else
733 case BPF_ANC | SKF_AD_CPU: /* A = smp_processor_id() */ 1062 func_addr = __pa(sk_load_byte);
734#ifdef CONFIG_SMP 1063 goto call_fn;
735 /* l %r5,<d(cpu_nr)> */ 1064 case BPF_LD | BPF_ABS | BPF_H: /* b0 = *(u16 *) (skb->data+imm) */
736 EMIT4_DISP(0x58500000, offsetof(struct _lowcore, cpu_nr)); 1065 case BPF_LD | BPF_IND | BPF_H: /* b0 = *(u16 *) (skb->data+imm+src) */
737#else 1066 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
738 /* lhi %r5,0 */ 1067 func_addr = __pa(sk_load_half_pos);
739 EMIT4(0xa7580000); 1068 else
740#endif 1069 func_addr = __pa(sk_load_half);
1070 goto call_fn;
1071 case BPF_LD | BPF_ABS | BPF_W: /* b0 = *(u32 *) (skb->data+imm) */
1072 case BPF_LD | BPF_IND | BPF_W: /* b0 = *(u32 *) (skb->data+imm+src) */
1073 if ((BPF_MODE(insn->code) == BPF_ABS) && (imm >= 0))
1074 func_addr = __pa(sk_load_word_pos);
1075 else
1076 func_addr = __pa(sk_load_word);
1077 goto call_fn;
1078call_fn:
1079 jit->seen |= SEEN_SKB | SEEN_RET0 | SEEN_FUNC;
1080 REG_SET_SEEN(REG_14); /* Return address of possible func call */
1081
1082 /*
1083 * Implicit input:
1084 * BPF_REG_6 (R7) : skb pointer
1085 * REG_SKB_DATA (R12): skb data pointer
1086 *
1087 * Calculated input:
1088 * BPF_REG_2 (R3) : offset of byte(s) to fetch in skb
1089 * BPF_REG_5 (R6) : return address
1090 *
1091 * Output:
1092 * BPF_REG_0 (R14): data read from skb
1093 *
1094 * Scratch registers (BPF_REG_1-5)
1095 */
1096
1097 /* Call function: llilf %w1,func_addr */
1098 EMIT6_IMM(0xc00f0000, REG_W1, func_addr);
1099
1100 /* Offset: lgfi %b2,imm */
1101 EMIT6_IMM(0xc0010000, BPF_REG_2, imm);
1102 if (BPF_MODE(insn->code) == BPF_IND)
1103 /* agfr %b2,%src (%src is s32 here) */
1104 EMIT4(0xb9180000, BPF_REG_2, src_reg);
1105
1106 /* basr %b5,%w1 (%b5 is call saved) */
1107 EMIT2(0x0d00, BPF_REG_5, REG_W1);
1108
1109 /*
1110 * Note: For fast access we jump directly after the
1111 * jnz instruction from bpf_jit.S
1112 */
1113 /* jnz <ret0> */
1114 EMIT4_PCREL(0xa7740000, jit->ret0_ip - jit->prg);
741 break; 1115 break;
742 default: /* too complex, give up */ 1116 default: /* too complex, give up */
743 goto out; 1117 pr_err("Unknown opcode %02x\n", insn->code);
1118 return -1;
1119 }
1120 return insn_count;
1121}
1122
1123/*
1124 * Compile eBPF program into s390x code
1125 */
1126static int bpf_jit_prog(struct bpf_jit *jit, struct bpf_prog *fp)
1127{
1128 int i, insn_count;
1129
1130 jit->lit = jit->lit_start;
1131 jit->prg = 0;
1132
1133 bpf_jit_prologue(jit);
1134 for (i = 0; i < fp->len; i += insn_count) {
1135 insn_count = bpf_jit_insn(jit, fp, i);
1136 if (insn_count < 0)
1137 return -1;
1138 jit->addrs[i + 1] = jit->prg; /* Next instruction address */
744 } 1139 }
745 addrs[i] = jit->prg - jit->start; 1140 bpf_jit_epilogue(jit);
1141
1142 jit->lit_start = jit->prg;
1143 jit->size = jit->lit;
1144 jit->size_prg = jit->prg;
746 return 0; 1145 return 0;
747out:
748 return -1;
749} 1146}
750 1147
1148/*
1149 * Classic BPF function stub. BPF programs will be converted into
1150 * eBPF and then bpf_int_jit_compile() will be called.
1151 */
751void bpf_jit_compile(struct bpf_prog *fp) 1152void bpf_jit_compile(struct bpf_prog *fp)
752{ 1153{
753 struct bpf_binary_header *header = NULL; 1154}
754 unsigned long size, prg_len, lit_len; 1155
755 struct bpf_jit jit, cjit; 1156/*
756 unsigned int *addrs; 1157 * Compile eBPF program "fp"
757 int pass, i; 1158 */
1159void bpf_int_jit_compile(struct bpf_prog *fp)
1160{
1161 struct bpf_binary_header *header;
1162 struct bpf_jit jit;
1163 int pass;
758 1164
759 if (!bpf_jit_enable) 1165 if (!bpf_jit_enable)
760 return; 1166 return;
761 addrs = kcalloc(fp->len, sizeof(*addrs), GFP_KERNEL); 1167 memset(&jit, 0, sizeof(jit));
762 if (addrs == NULL) 1168 jit.addrs = kcalloc(fp->len + 1, sizeof(*jit.addrs), GFP_KERNEL);
1169 if (jit.addrs == NULL)
763 return; 1170 return;
764 memset(&jit, 0, sizeof(cjit)); 1171 /*
765 memset(&cjit, 0, sizeof(cjit)); 1172 * Three initial passes:
766 1173 * - 1/2: Determine clobbered registers
767 for (pass = 0; pass < 10; pass++) { 1174 * - 3: Calculate program size and addrs arrray
768 jit.prg = jit.start; 1175 */
769 jit.lit = jit.mid; 1176 for (pass = 1; pass <= 3; pass++) {
770 1177 if (bpf_jit_prog(&jit, fp))
771 bpf_jit_prologue(&jit); 1178 goto free_addrs;
772 bpf_jit_noleaks(&jit, fp->insns);
773 for (i = 0; i < fp->len; i++) {
774 if (bpf_jit_insn(&jit, fp->insns + i, addrs, i,
775 i == fp->len - 1))
776 goto out;
777 }
778 bpf_jit_epilogue(&jit);
779 if (jit.start) {
780 WARN_ON(jit.prg > cjit.prg || jit.lit > cjit.lit);
781 if (memcmp(&jit, &cjit, sizeof(jit)) == 0)
782 break;
783 } else if (jit.prg == cjit.prg && jit.lit == cjit.lit) {
784 prg_len = jit.prg - jit.start;
785 lit_len = jit.lit - jit.mid;
786 size = prg_len + lit_len;
787 if (size >= BPF_SIZE_MAX)
788 goto out;
789 header = bpf_jit_binary_alloc(size, &jit.start,
790 2, bpf_jit_fill_hole);
791 if (!header)
792 goto out;
793 jit.prg = jit.mid = jit.start + prg_len;
794 jit.lit = jit.end = jit.start + prg_len + lit_len;
795 jit.base_ip += (unsigned long) jit.start;
796 jit.exit_ip += (unsigned long) jit.start;
797 jit.ret0_ip += (unsigned long) jit.start;
798 }
799 cjit = jit;
800 } 1179 }
1180 /*
1181 * Final pass: Allocate and generate program
1182 */
1183 if (jit.size >= BPF_SIZE_MAX)
1184 goto free_addrs;
1185 header = bpf_jit_binary_alloc(jit.size, &jit.prg_buf, 2, jit_fill_hole);
1186 if (!header)
1187 goto free_addrs;
1188 if (bpf_jit_prog(&jit, fp))
1189 goto free_addrs;
801 if (bpf_jit_enable > 1) { 1190 if (bpf_jit_enable > 1) {
802 bpf_jit_dump(fp->len, jit.end - jit.start, pass, jit.start); 1191 bpf_jit_dump(fp->len, jit.size, pass, jit.prg_buf);
803 if (jit.start) 1192 if (jit.prg_buf)
804 print_fn_code(jit.start, jit.mid - jit.start); 1193 print_fn_code(jit.prg_buf, jit.size_prg);
805 } 1194 }
806 if (jit.start) { 1195 if (jit.prg_buf) {
807 set_memory_ro((unsigned long)header, header->pages); 1196 set_memory_ro((unsigned long)header, header->pages);
808 fp->bpf_func = (void *) jit.start; 1197 fp->bpf_func = (void *) jit.prg_buf;
809 fp->jited = true; 1198 fp->jited = true;
810 } 1199 }
811out: 1200free_addrs:
812 kfree(addrs); 1201 kfree(jit.addrs);
813} 1202}
814 1203
1204/*
1205 * Free eBPF program
1206 */
815void bpf_jit_free(struct bpf_prog *fp) 1207void bpf_jit_free(struct bpf_prog *fp)
816{ 1208{
817 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK; 1209 unsigned long addr = (unsigned long)fp->bpf_func & PAGE_MASK;
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-11 17:04:07 -0500