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-rw-r--r--arch/s390/include/asm/appldata.h24
-rw-r--r--arch/s390/include/asm/atomic.h95
-rw-r--r--arch/s390/include/asm/bitops.h28
-rw-r--r--arch/s390/include/asm/cputime.h26
-rw-r--r--arch/s390/include/asm/ctl_reg.h14
-rw-r--r--arch/s390/include/asm/elf.h4
-rw-r--r--arch/s390/include/asm/idals.h16
-rw-r--r--arch/s390/include/asm/jump_label.h12
-rw-r--r--arch/s390/include/asm/lowcore.h159
-rw-r--r--arch/s390/include/asm/mman.h2
-rw-r--r--arch/s390/include/asm/mmu_context.h4
-rw-r--r--arch/s390/include/asm/percpu.h4
-rw-r--r--arch/s390/include/asm/perf_event.h3
-rw-r--r--arch/s390/include/asm/pgalloc.h24
-rw-r--r--arch/s390/include/asm/pgtable.h125
-rw-r--r--arch/s390/include/asm/processor.h66
-rw-r--r--arch/s390/include/asm/ptrace.h4
-rw-r--r--arch/s390/include/asm/qdio.h10
-rw-r--r--arch/s390/include/asm/runtime_instr.h10
-rw-r--r--arch/s390/include/asm/rwsem.h81
-rw-r--r--arch/s390/include/asm/setup.h35
-rw-r--r--arch/s390/include/asm/sfp-util.h10
-rw-r--r--arch/s390/include/asm/sparsemem.h9
-rw-r--r--arch/s390/include/asm/switch_to.h21
-rw-r--r--arch/s390/include/asm/thread_info.h9
-rw-r--r--arch/s390/include/asm/tlb.h4
-rw-r--r--arch/s390/include/asm/tlbflush.h7
-rw-r--r--arch/s390/include/asm/types.h17
-rw-r--r--arch/s390/include/asm/unistd.h8
-rw-r--r--arch/s390/include/asm/vdso.h2
30 files changed, 14 insertions, 819 deletions
diff --git a/arch/s390/include/asm/appldata.h b/arch/s390/include/asm/appldata.h
index 32a705987156..16887c5fd989 100644
--- a/arch/s390/include/asm/appldata.h
+++ b/arch/s390/include/asm/appldata.h
@@ -9,28 +9,6 @@
9 9
10#include <asm/io.h> 10#include <asm/io.h>
11 11
12#ifndef CONFIG_64BIT
13
14#define APPLDATA_START_INTERVAL_REC 0x00 /* Function codes for */
15#define APPLDATA_STOP_REC 0x01 /* DIAG 0xDC */
16#define APPLDATA_GEN_EVENT_REC 0x02
17#define APPLDATA_START_CONFIG_REC 0x03
18
19/*
20 * Parameter list for DIAGNOSE X'DC'
21 */
22struct appldata_parameter_list {
23 u16 diag; /* The DIAGNOSE code X'00DC' */
24 u8 function; /* The function code for the DIAGNOSE */
25 u8 parlist_length; /* Length of the parameter list */
26 u32 product_id_addr; /* Address of the 16-byte product ID */
27 u16 reserved;
28 u16 buffer_length; /* Length of the application data buffer */
29 u32 buffer_addr; /* Address of the application data buffer */
30} __attribute__ ((packed));
31
32#else /* CONFIG_64BIT */
33
34#define APPLDATA_START_INTERVAL_REC 0x80 12#define APPLDATA_START_INTERVAL_REC 0x80
35#define APPLDATA_STOP_REC 0x81 13#define APPLDATA_STOP_REC 0x81
36#define APPLDATA_GEN_EVENT_REC 0x82 14#define APPLDATA_GEN_EVENT_REC 0x82
@@ -51,8 +29,6 @@ struct appldata_parameter_list {
51 u64 buffer_addr; 29 u64 buffer_addr;
52} __attribute__ ((packed)); 30} __attribute__ ((packed));
53 31
54#endif /* CONFIG_64BIT */
55
56struct appldata_product_id { 32struct appldata_product_id {
57 char prod_nr[7]; /* product number */ 33 char prod_nr[7]; /* product number */
58 u16 prod_fn; /* product function */ 34 u16 prod_fn; /* product function */
diff --git a/arch/s390/include/asm/atomic.h b/arch/s390/include/asm/atomic.h
index fa934fe080c1..adbe3802e377 100644
--- a/arch/s390/include/asm/atomic.h
+++ b/arch/s390/include/asm/atomic.h
@@ -160,8 +160,6 @@ static inline int __atomic_add_unless(atomic_t *v, int a, int u)
160 160
161#define ATOMIC64_INIT(i) { (i) } 161#define ATOMIC64_INIT(i) { (i) }
162 162
163#ifdef CONFIG_64BIT
164
165#define __ATOMIC64_NO_BARRIER "\n" 163#define __ATOMIC64_NO_BARRIER "\n"
166 164
167#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES 165#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
@@ -274,99 +272,6 @@ static inline long long atomic64_cmpxchg(atomic64_t *v,
274 272
275#undef __ATOMIC64_LOOP 273#undef __ATOMIC64_LOOP
276 274
277#else /* CONFIG_64BIT */
278
279typedef struct {
280 long long counter;
281} atomic64_t;
282
283static inline long long atomic64_read(const atomic64_t *v)
284{
285 register_pair rp;
286
287 asm volatile(
288 " lm %0,%N0,%1"
289 : "=&d" (rp) : "Q" (v->counter) );
290 return rp.pair;
291}
292
293static inline void atomic64_set(atomic64_t *v, long long i)
294{
295 register_pair rp = {.pair = i};
296
297 asm volatile(
298 " stm %1,%N1,%0"
299 : "=Q" (v->counter) : "d" (rp) );
300}
301
302static inline long long atomic64_xchg(atomic64_t *v, long long new)
303{
304 register_pair rp_new = {.pair = new};
305 register_pair rp_old;
306
307 asm volatile(
308 " lm %0,%N0,%1\n"
309 "0: cds %0,%2,%1\n"
310 " jl 0b\n"
311 : "=&d" (rp_old), "+Q" (v->counter)
312 : "d" (rp_new)
313 : "cc");
314 return rp_old.pair;
315}
316
317static inline long long atomic64_cmpxchg(atomic64_t *v,
318 long long old, long long new)
319{
320 register_pair rp_old = {.pair = old};
321 register_pair rp_new = {.pair = new};
322
323 asm volatile(
324 " cds %0,%2,%1"
325 : "+&d" (rp_old), "+Q" (v->counter)
326 : "d" (rp_new)
327 : "cc");
328 return rp_old.pair;
329}
330
331
332static inline long long atomic64_add_return(long long i, atomic64_t *v)
333{
334 long long old, new;
335
336 do {
337 old = atomic64_read(v);
338 new = old + i;
339 } while (atomic64_cmpxchg(v, old, new) != old);
340 return new;
341}
342
343static inline void atomic64_set_mask(unsigned long long mask, atomic64_t *v)
344{
345 long long old, new;
346
347 do {
348 old = atomic64_read(v);
349 new = old | mask;
350 } while (atomic64_cmpxchg(v, old, new) != old);
351}
352
353static inline void atomic64_clear_mask(unsigned long long mask, atomic64_t *v)
354{
355 long long old, new;
356
357 do {
358 old = atomic64_read(v);
359 new = old & mask;
360 } while (atomic64_cmpxchg(v, old, new) != old);
361}
362
363static inline void atomic64_add(long long i, atomic64_t *v)
364{
365 atomic64_add_return(i, v);
366}
367
368#endif /* CONFIG_64BIT */
369
370static inline int atomic64_add_unless(atomic64_t *v, long long i, long long u) 275static inline int atomic64_add_unless(atomic64_t *v, long long i, long long u)
371{ 276{
372 long long c, old; 277 long long c, old;
diff --git a/arch/s390/include/asm/bitops.h b/arch/s390/include/asm/bitops.h
index 520542477678..9b68e98a724f 100644
--- a/arch/s390/include/asm/bitops.h
+++ b/arch/s390/include/asm/bitops.h
@@ -51,32 +51,6 @@
51 51
52#define __BITOPS_NO_BARRIER "\n" 52#define __BITOPS_NO_BARRIER "\n"
53 53
54#ifndef CONFIG_64BIT
55
56#define __BITOPS_OR "or"
57#define __BITOPS_AND "nr"
58#define __BITOPS_XOR "xr"
59#define __BITOPS_BARRIER "\n"
60
61#define __BITOPS_LOOP(__addr, __val, __op_string, __barrier) \
62({ \
63 unsigned long __old, __new; \
64 \
65 typecheck(unsigned long *, (__addr)); \
66 asm volatile( \
67 " l %0,%2\n" \
68 "0: lr %1,%0\n" \
69 __op_string " %1,%3\n" \
70 " cs %0,%1,%2\n" \
71 " jl 0b" \
72 : "=&d" (__old), "=&d" (__new), "+Q" (*(__addr))\
73 : "d" (__val) \
74 : "cc", "memory"); \
75 __old; \
76})
77
78#else /* CONFIG_64BIT */
79
80#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES 54#ifdef CONFIG_HAVE_MARCH_Z196_FEATURES
81 55
82#define __BITOPS_OR "laog" 56#define __BITOPS_OR "laog"
@@ -125,8 +99,6 @@
125 99
126#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */ 100#endif /* CONFIG_HAVE_MARCH_Z196_FEATURES */
127 101
128#endif /* CONFIG_64BIT */
129
130#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG) 102#define __BITOPS_WORDS(bits) (((bits) + BITS_PER_LONG - 1) / BITS_PER_LONG)
131 103
132static inline unsigned long * 104static inline unsigned long *
diff --git a/arch/s390/include/asm/cputime.h b/arch/s390/include/asm/cputime.h
index b91e960e4045..221b454c734a 100644
--- a/arch/s390/include/asm/cputime.h
+++ b/arch/s390/include/asm/cputime.h
@@ -22,15 +22,7 @@ typedef unsigned long long __nocast cputime64_t;
22 22
23static inline unsigned long __div(unsigned long long n, unsigned long base) 23static inline unsigned long __div(unsigned long long n, unsigned long base)
24{ 24{
25#ifndef CONFIG_64BIT
26 register_pair rp;
27
28 rp.pair = n >> 1;
29 asm ("dr %0,%1" : "+d" (rp) : "d" (base >> 1));
30 return rp.subreg.odd;
31#else /* CONFIG_64BIT */
32 return n / base; 25 return n / base;
33#endif /* CONFIG_64BIT */
34} 26}
35 27
36#define cputime_one_jiffy jiffies_to_cputime(1) 28#define cputime_one_jiffy jiffies_to_cputime(1)
@@ -101,17 +93,8 @@ static inline void cputime_to_timespec(const cputime_t cputime,
101 struct timespec *value) 93 struct timespec *value)
102{ 94{
103 unsigned long long __cputime = (__force unsigned long long) cputime; 95 unsigned long long __cputime = (__force unsigned long long) cputime;
104#ifndef CONFIG_64BIT
105 register_pair rp;
106
107 rp.pair = __cputime >> 1;
108 asm ("dr %0,%1" : "+d" (rp) : "d" (CPUTIME_PER_SEC / 2));
109 value->tv_nsec = rp.subreg.even * NSEC_PER_USEC / CPUTIME_PER_USEC;
110 value->tv_sec = rp.subreg.odd;
111#else
112 value->tv_nsec = (__cputime % CPUTIME_PER_SEC) * NSEC_PER_USEC / CPUTIME_PER_USEC; 96 value->tv_nsec = (__cputime % CPUTIME_PER_SEC) * NSEC_PER_USEC / CPUTIME_PER_USEC;
113 value->tv_sec = __cputime / CPUTIME_PER_SEC; 97 value->tv_sec = __cputime / CPUTIME_PER_SEC;
114#endif
115} 98}
116 99
117/* 100/*
@@ -129,17 +112,8 @@ static inline void cputime_to_timeval(const cputime_t cputime,
129 struct timeval *value) 112 struct timeval *value)
130{ 113{
131 unsigned long long __cputime = (__force unsigned long long) cputime; 114 unsigned long long __cputime = (__force unsigned long long) cputime;
132#ifndef CONFIG_64BIT
133 register_pair rp;
134
135 rp.pair = __cputime >> 1;
136 asm ("dr %0,%1" : "+d" (rp) : "d" (CPUTIME_PER_USEC / 2));
137 value->tv_usec = rp.subreg.even / CPUTIME_PER_USEC;
138 value->tv_sec = rp.subreg.odd;
139#else
140 value->tv_usec = (__cputime % CPUTIME_PER_SEC) / CPUTIME_PER_USEC; 115 value->tv_usec = (__cputime % CPUTIME_PER_SEC) / CPUTIME_PER_USEC;
141 value->tv_sec = __cputime / CPUTIME_PER_SEC; 116 value->tv_sec = __cputime / CPUTIME_PER_SEC;
142#endif
143} 117}
144 118
145/* 119/*
diff --git a/arch/s390/include/asm/ctl_reg.h b/arch/s390/include/asm/ctl_reg.h
index 31ab9f346d7e..cfad7fca01d6 100644
--- a/arch/s390/include/asm/ctl_reg.h
+++ b/arch/s390/include/asm/ctl_reg.h
@@ -9,20 +9,12 @@
9 9
10#include <linux/bug.h> 10#include <linux/bug.h>
11 11
12#ifdef CONFIG_64BIT
13# define __CTL_LOAD "lctlg"
14# define __CTL_STORE "stctg"
15#else
16# define __CTL_LOAD "lctl"
17# define __CTL_STORE "stctl"
18#endif
19
20#define __ctl_load(array, low, high) { \ 12#define __ctl_load(array, low, high) { \
21 typedef struct { char _[sizeof(array)]; } addrtype; \ 13 typedef struct { char _[sizeof(array)]; } addrtype; \
22 \ 14 \
23 BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\ 15 BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
24 asm volatile( \ 16 asm volatile( \
25 __CTL_LOAD " %1,%2,%0\n" \ 17 " lctlg %1,%2,%0\n" \
26 : : "Q" (*(addrtype *)(&array)), "i" (low), "i" (high));\ 18 : : "Q" (*(addrtype *)(&array)), "i" (low), "i" (high));\
27} 19}
28 20
@@ -31,7 +23,7 @@
31 \ 23 \
32 BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\ 24 BUILD_BUG_ON(sizeof(addrtype) != (high - low + 1) * sizeof(long));\
33 asm volatile( \ 25 asm volatile( \
34 __CTL_STORE " %1,%2,%0\n" \ 26 " stctg %1,%2,%0\n" \
35 : "=Q" (*(addrtype *)(&array)) \ 27 : "=Q" (*(addrtype *)(&array)) \
36 : "i" (low), "i" (high)); \ 28 : "i" (low), "i" (high)); \
37} 29}
@@ -60,9 +52,7 @@ void smp_ctl_clear_bit(int cr, int bit);
60union ctlreg0 { 52union ctlreg0 {
61 unsigned long val; 53 unsigned long val;
62 struct { 54 struct {
63#ifdef CONFIG_64BIT
64 unsigned long : 32; 55 unsigned long : 32;
65#endif
66 unsigned long : 3; 56 unsigned long : 3;
67 unsigned long lap : 1; /* Low-address-protection control */ 57 unsigned long lap : 1; /* Low-address-protection control */
68 unsigned long : 4; 58 unsigned long : 4;
diff --git a/arch/s390/include/asm/elf.h b/arch/s390/include/asm/elf.h
index c9c875d9ed31..5214d15680ab 100644
--- a/arch/s390/include/asm/elf.h
+++ b/arch/s390/include/asm/elf.h
@@ -107,11 +107,7 @@
107/* 107/*
108 * These are used to set parameters in the core dumps. 108 * These are used to set parameters in the core dumps.
109 */ 109 */
110#ifndef CONFIG_64BIT
111#define ELF_CLASS ELFCLASS32
112#else /* CONFIG_64BIT */
113#define ELF_CLASS ELFCLASS64 110#define ELF_CLASS ELFCLASS64
114#endif /* CONFIG_64BIT */
115#define ELF_DATA ELFDATA2MSB 111#define ELF_DATA ELFDATA2MSB
116#define ELF_ARCH EM_S390 112#define ELF_ARCH EM_S390
117 113
diff --git a/arch/s390/include/asm/idals.h b/arch/s390/include/asm/idals.h
index ea5a6e45fd93..a7b2d7504049 100644
--- a/arch/s390/include/asm/idals.h
+++ b/arch/s390/include/asm/idals.h
@@ -19,11 +19,7 @@
19#include <asm/cio.h> 19#include <asm/cio.h>
20#include <asm/uaccess.h> 20#include <asm/uaccess.h>
21 21
22#ifdef CONFIG_64BIT
23#define IDA_SIZE_LOG 12 /* 11 for 2k , 12 for 4k */ 22#define IDA_SIZE_LOG 12 /* 11 for 2k , 12 for 4k */
24#else
25#define IDA_SIZE_LOG 11 /* 11 for 2k , 12 for 4k */
26#endif
27#define IDA_BLOCK_SIZE (1L<<IDA_SIZE_LOG) 23#define IDA_BLOCK_SIZE (1L<<IDA_SIZE_LOG)
28 24
29/* 25/*
@@ -32,11 +28,7 @@
32static inline int 28static inline int
33idal_is_needed(void *vaddr, unsigned int length) 29idal_is_needed(void *vaddr, unsigned int length)
34{ 30{
35#ifdef CONFIG_64BIT
36 return ((__pa(vaddr) + length - 1) >> 31) != 0; 31 return ((__pa(vaddr) + length - 1) >> 31) != 0;
37#else
38 return 0;
39#endif
40} 32}
41 33
42 34
@@ -77,7 +69,6 @@ static inline unsigned long *idal_create_words(unsigned long *idaws,
77static inline int 69static inline int
78set_normalized_cda(struct ccw1 * ccw, void *vaddr) 70set_normalized_cda(struct ccw1 * ccw, void *vaddr)
79{ 71{
80#ifdef CONFIG_64BIT
81 unsigned int nridaws; 72 unsigned int nridaws;
82 unsigned long *idal; 73 unsigned long *idal;
83 74
@@ -93,7 +84,6 @@ set_normalized_cda(struct ccw1 * ccw, void *vaddr)
93 ccw->flags |= CCW_FLAG_IDA; 84 ccw->flags |= CCW_FLAG_IDA;
94 vaddr = idal; 85 vaddr = idal;
95 } 86 }
96#endif
97 ccw->cda = (__u32)(unsigned long) vaddr; 87 ccw->cda = (__u32)(unsigned long) vaddr;
98 return 0; 88 return 0;
99} 89}
@@ -104,12 +94,10 @@ set_normalized_cda(struct ccw1 * ccw, void *vaddr)
104static inline void 94static inline void
105clear_normalized_cda(struct ccw1 * ccw) 95clear_normalized_cda(struct ccw1 * ccw)
106{ 96{
107#ifdef CONFIG_64BIT
108 if (ccw->flags & CCW_FLAG_IDA) { 97 if (ccw->flags & CCW_FLAG_IDA) {
109 kfree((void *)(unsigned long) ccw->cda); 98 kfree((void *)(unsigned long) ccw->cda);
110 ccw->flags &= ~CCW_FLAG_IDA; 99 ccw->flags &= ~CCW_FLAG_IDA;
111 } 100 }
112#endif
113 ccw->cda = 0; 101 ccw->cda = 0;
114} 102}
115 103
@@ -181,12 +169,8 @@ idal_buffer_free(struct idal_buffer *ib)
181static inline int 169static inline int
182__idal_buffer_is_needed(struct idal_buffer *ib) 170__idal_buffer_is_needed(struct idal_buffer *ib)
183{ 171{
184#ifdef CONFIG_64BIT
185 return ib->size > (4096ul << ib->page_order) || 172 return ib->size > (4096ul << ib->page_order) ||
186 idal_is_needed(ib->data[0], ib->size); 173 idal_is_needed(ib->data[0], ib->size);
187#else
188 return ib->size > (4096ul << ib->page_order);
189#endif
190} 174}
191 175
192/* 176/*
diff --git a/arch/s390/include/asm/jump_label.h b/arch/s390/include/asm/jump_label.h
index 58642fd29c87..510012bceb75 100644
--- a/arch/s390/include/asm/jump_label.h
+++ b/arch/s390/include/asm/jump_label.h
@@ -6,14 +6,6 @@
6#define JUMP_LABEL_NOP_SIZE 6 6#define JUMP_LABEL_NOP_SIZE 6
7#define JUMP_LABEL_NOP_OFFSET 2 7#define JUMP_LABEL_NOP_OFFSET 2
8 8
9#ifdef CONFIG_64BIT
10#define ASM_PTR ".quad"
11#define ASM_ALIGN ".balign 8"
12#else
13#define ASM_PTR ".long"
14#define ASM_ALIGN ".balign 4"
15#endif
16
17/* 9/*
18 * We use a brcl 0,2 instruction for jump labels at compile time so it 10 * We use a brcl 0,2 instruction for jump labels at compile time so it
19 * can be easily distinguished from a hotpatch generated instruction. 11 * can be easily distinguished from a hotpatch generated instruction.
@@ -22,8 +14,8 @@ static __always_inline bool arch_static_branch(struct static_key *key)
22{ 14{
23 asm_volatile_goto("0: brcl 0,"__stringify(JUMP_LABEL_NOP_OFFSET)"\n" 15 asm_volatile_goto("0: brcl 0,"__stringify(JUMP_LABEL_NOP_OFFSET)"\n"
24 ".pushsection __jump_table, \"aw\"\n" 16 ".pushsection __jump_table, \"aw\"\n"
25 ASM_ALIGN "\n" 17 ".balign 8\n"
26 ASM_PTR " 0b, %l[label], %0\n" 18 ".quad 0b, %l[label], %0\n"
27 ".popsection\n" 19 ".popsection\n"
28 : : "X" (key) : : label); 20 : : "X" (key) : : label);
29 return false; 21 return false;
diff --git a/arch/s390/include/asm/lowcore.h b/arch/s390/include/asm/lowcore.h
index 34fbcac61133..663f23e37460 100644
--- a/arch/s390/include/asm/lowcore.h
+++ b/arch/s390/include/asm/lowcore.h
@@ -13,163 +13,6 @@
13#include <asm/cpu.h> 13#include <asm/cpu.h>
14#include <asm/types.h> 14#include <asm/types.h>
15 15
16#ifdef CONFIG_32BIT
17
18#define LC_ORDER 0
19#define LC_PAGES 1
20
21struct save_area {
22 u32 ext_save;
23 u64 timer;
24 u64 clk_cmp;
25 u8 pad1[24];
26 u8 psw[8];
27 u32 pref_reg;
28 u8 pad2[20];
29 u32 acc_regs[16];
30 u64 fp_regs[4];
31 u32 gp_regs[16];
32 u32 ctrl_regs[16];
33} __packed;
34
35struct save_area_ext {
36 struct save_area sa;
37 __vector128 vx_regs[32];
38};
39
40struct _lowcore {
41 psw_t restart_psw; /* 0x0000 */
42 psw_t restart_old_psw; /* 0x0008 */
43 __u8 pad_0x0010[0x0014-0x0010]; /* 0x0010 */
44 __u32 ipl_parmblock_ptr; /* 0x0014 */
45 psw_t external_old_psw; /* 0x0018 */
46 psw_t svc_old_psw; /* 0x0020 */
47 psw_t program_old_psw; /* 0x0028 */
48 psw_t mcck_old_psw; /* 0x0030 */
49 psw_t io_old_psw; /* 0x0038 */
50 __u8 pad_0x0040[0x0058-0x0040]; /* 0x0040 */
51 psw_t external_new_psw; /* 0x0058 */
52 psw_t svc_new_psw; /* 0x0060 */
53 psw_t program_new_psw; /* 0x0068 */
54 psw_t mcck_new_psw; /* 0x0070 */
55 psw_t io_new_psw; /* 0x0078 */
56 __u32 ext_params; /* 0x0080 */
57 __u16 ext_cpu_addr; /* 0x0084 */
58 __u16 ext_int_code; /* 0x0086 */
59 __u16 svc_ilc; /* 0x0088 */
60 __u16 svc_code; /* 0x008a */
61 __u16 pgm_ilc; /* 0x008c */
62 __u16 pgm_code; /* 0x008e */
63 __u32 trans_exc_code; /* 0x0090 */
64 __u16 mon_class_num; /* 0x0094 */
65 __u8 per_code; /* 0x0096 */
66 __u8 per_atmid; /* 0x0097 */
67 __u32 per_address; /* 0x0098 */
68 __u32 monitor_code; /* 0x009c */
69 __u8 exc_access_id; /* 0x00a0 */
70 __u8 per_access_id; /* 0x00a1 */
71 __u8 op_access_id; /* 0x00a2 */
72 __u8 ar_mode_id; /* 0x00a3 */
73 __u8 pad_0x00a4[0x00b8-0x00a4]; /* 0x00a4 */
74 __u16 subchannel_id; /* 0x00b8 */
75 __u16 subchannel_nr; /* 0x00ba */
76 __u32 io_int_parm; /* 0x00bc */
77 __u32 io_int_word; /* 0x00c0 */
78 __u8 pad_0x00c4[0x00c8-0x00c4]; /* 0x00c4 */
79 __u32 stfl_fac_list; /* 0x00c8 */
80 __u8 pad_0x00cc[0x00d4-0x00cc]; /* 0x00cc */
81 __u32 extended_save_area_addr; /* 0x00d4 */
82 __u32 cpu_timer_save_area[2]; /* 0x00d8 */
83 __u32 clock_comp_save_area[2]; /* 0x00e0 */
84 __u32 mcck_interruption_code[2]; /* 0x00e8 */
85 __u8 pad_0x00f0[0x00f4-0x00f0]; /* 0x00f0 */
86 __u32 external_damage_code; /* 0x00f4 */
87 __u32 failing_storage_address; /* 0x00f8 */
88 __u8 pad_0x00fc[0x0100-0x00fc]; /* 0x00fc */
89 psw_t psw_save_area; /* 0x0100 */
90 __u32 prefixreg_save_area; /* 0x0108 */
91 __u8 pad_0x010c[0x0120-0x010c]; /* 0x010c */
92
93 /* CPU register save area: defined by architecture */
94 __u32 access_regs_save_area[16]; /* 0x0120 */
95 __u32 floating_pt_save_area[8]; /* 0x0160 */
96 __u32 gpregs_save_area[16]; /* 0x0180 */
97 __u32 cregs_save_area[16]; /* 0x01c0 */
98
99 /* Save areas. */
100 __u32 save_area_sync[8]; /* 0x0200 */
101 __u32 save_area_async[8]; /* 0x0220 */
102 __u32 save_area_restart[1]; /* 0x0240 */
103
104 /* CPU flags. */
105 __u32 cpu_flags; /* 0x0244 */
106
107 /* Return psws. */
108 psw_t return_psw; /* 0x0248 */
109 psw_t return_mcck_psw; /* 0x0250 */
110
111 /* CPU time accounting values */
112 __u64 sync_enter_timer; /* 0x0258 */
113 __u64 async_enter_timer; /* 0x0260 */
114 __u64 mcck_enter_timer; /* 0x0268 */
115 __u64 exit_timer; /* 0x0270 */
116 __u64 user_timer; /* 0x0278 */
117 __u64 system_timer; /* 0x0280 */
118 __u64 steal_timer; /* 0x0288 */
119 __u64 last_update_timer; /* 0x0290 */
120 __u64 last_update_clock; /* 0x0298 */
121 __u64 int_clock; /* 0x02a0 */
122 __u64 mcck_clock; /* 0x02a8 */
123 __u64 clock_comparator; /* 0x02b0 */
124
125 /* Current process. */
126 __u32 current_task; /* 0x02b8 */
127 __u32 thread_info; /* 0x02bc */
128 __u32 kernel_stack; /* 0x02c0 */
129
130 /* Interrupt, panic and restart stack. */
131 __u32 async_stack; /* 0x02c4 */
132 __u32 panic_stack; /* 0x02c8 */
133 __u32 restart_stack; /* 0x02cc */
134
135 /* Restart function and parameter. */
136 __u32 restart_fn; /* 0x02d0 */
137 __u32 restart_data; /* 0x02d4 */
138 __u32 restart_source; /* 0x02d8 */
139
140 /* Address space pointer. */
141 __u32 kernel_asce; /* 0x02dc */
142 __u32 user_asce; /* 0x02e0 */
143 __u32 current_pid; /* 0x02e4 */
144
145 /* SMP info area */
146 __u32 cpu_nr; /* 0x02e8 */
147 __u32 softirq_pending; /* 0x02ec */
148 __u32 percpu_offset; /* 0x02f0 */
149 __u32 machine_flags; /* 0x02f4 */
150 __u8 pad_0x02f8[0x02fc-0x02f8]; /* 0x02f8 */
151 __u32 spinlock_lockval; /* 0x02fc */
152
153 __u8 pad_0x0300[0x0e00-0x0300]; /* 0x0300 */
154
155 /*
156 * 0xe00 contains the address of the IPL Parameter Information
157 * block. Dump tools need IPIB for IPL after dump.
158 * Note: do not change the position of any fields in 0x0e00-0x0f00
159 */
160 __u32 ipib; /* 0x0e00 */
161 __u32 ipib_checksum; /* 0x0e04 */
162 __u32 vmcore_info; /* 0x0e08 */
163 __u8 pad_0x0e0c[0x0e18-0x0e0c]; /* 0x0e0c */
164 __u32 os_info; /* 0x0e18 */
165 __u8 pad_0x0e1c[0x0f00-0x0e1c]; /* 0x0e1c */
166
167 /* Extended facility list */
168 __u64 stfle_fac_list[32]; /* 0x0f00 */
169} __packed;
170
171#else /* CONFIG_32BIT */
172
173#define LC_ORDER 1 16#define LC_ORDER 1
174#define LC_PAGES 2 17#define LC_PAGES 2
175 18
@@ -354,8 +197,6 @@ struct _lowcore {
354 __u8 vector_save_area[1024]; /* 0x1c00 */ 197 __u8 vector_save_area[1024]; /* 0x1c00 */
355} __packed; 198} __packed;
356 199
357#endif /* CONFIG_32BIT */
358
359#define S390_lowcore (*((struct _lowcore *) 0)) 200#define S390_lowcore (*((struct _lowcore *) 0))
360 201
361extern struct _lowcore *lowcore_ptr[]; 202extern struct _lowcore *lowcore_ptr[];
diff --git a/arch/s390/include/asm/mman.h b/arch/s390/include/asm/mman.h
index 9977e08df5bd..b55a59e1d134 100644
--- a/arch/s390/include/asm/mman.h
+++ b/arch/s390/include/asm/mman.h
@@ -8,7 +8,7 @@
8 8
9#include <uapi/asm/mman.h> 9#include <uapi/asm/mman.h>
10 10
11#if !defined(__ASSEMBLY__) && defined(CONFIG_64BIT) 11#ifndef __ASSEMBLY__
12int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags); 12int s390_mmap_check(unsigned long addr, unsigned long len, unsigned long flags);
13#define arch_mmap_check(addr, len, flags) s390_mmap_check(addr, len, flags) 13#define arch_mmap_check(addr, len, flags) s390_mmap_check(addr, len, flags)
14#endif 14#endif
diff --git a/arch/s390/include/asm/mmu_context.h b/arch/s390/include/asm/mmu_context.h
index 8fb3802f8fad..d25d9ff10ba8 100644
--- a/arch/s390/include/asm/mmu_context.h
+++ b/arch/s390/include/asm/mmu_context.h
@@ -19,9 +19,7 @@ static inline int init_new_context(struct task_struct *tsk,
19 atomic_set(&mm->context.attach_count, 0); 19 atomic_set(&mm->context.attach_count, 0);
20 mm->context.flush_mm = 0; 20 mm->context.flush_mm = 0;
21 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS; 21 mm->context.asce_bits = _ASCE_TABLE_LENGTH | _ASCE_USER_BITS;
22#ifdef CONFIG_64BIT
23 mm->context.asce_bits |= _ASCE_TYPE_REGION3; 22 mm->context.asce_bits |= _ASCE_TYPE_REGION3;
24#endif
25 mm->context.has_pgste = 0; 23 mm->context.has_pgste = 0;
26 mm->context.use_skey = 0; 24 mm->context.use_skey = 0;
27 mm->context.asce_limit = STACK_TOP_MAX; 25 mm->context.asce_limit = STACK_TOP_MAX;
@@ -110,10 +108,8 @@ static inline void activate_mm(struct mm_struct *prev,
110static inline void arch_dup_mmap(struct mm_struct *oldmm, 108static inline void arch_dup_mmap(struct mm_struct *oldmm,
111 struct mm_struct *mm) 109 struct mm_struct *mm)
112{ 110{
113#ifdef CONFIG_64BIT
114 if (oldmm->context.asce_limit < mm->context.asce_limit) 111 if (oldmm->context.asce_limit < mm->context.asce_limit)
115 crst_table_downgrade(mm, oldmm->context.asce_limit); 112 crst_table_downgrade(mm, oldmm->context.asce_limit);
116#endif
117} 113}
118 114
119static inline void arch_exit_mmap(struct mm_struct *mm) 115static inline void arch_exit_mmap(struct mm_struct *mm)
diff --git a/arch/s390/include/asm/percpu.h b/arch/s390/include/asm/percpu.h
index 933355e0d091..6d6556ca24aa 100644
--- a/arch/s390/include/asm/percpu.h
+++ b/arch/s390/include/asm/percpu.h
@@ -10,8 +10,6 @@
10 */ 10 */
11#define __my_cpu_offset S390_lowcore.percpu_offset 11#define __my_cpu_offset S390_lowcore.percpu_offset
12 12
13#ifdef CONFIG_64BIT
14
15/* 13/*
16 * For 64 bit module code, the module may be more than 4G above the 14 * For 64 bit module code, the module may be more than 4G above the
17 * per cpu area, use weak definitions to force the compiler to 15 * per cpu area, use weak definitions to force the compiler to
@@ -183,8 +181,6 @@
183#define this_cpu_cmpxchg_double_4 arch_this_cpu_cmpxchg_double 181#define this_cpu_cmpxchg_double_4 arch_this_cpu_cmpxchg_double
184#define this_cpu_cmpxchg_double_8 arch_this_cpu_cmpxchg_double 182#define this_cpu_cmpxchg_double_8 arch_this_cpu_cmpxchg_double
185 183
186#endif /* CONFIG_64BIT */
187
188#include <asm-generic/percpu.h> 184#include <asm-generic/percpu.h>
189 185
190#endif /* __ARCH_S390_PERCPU__ */ 186#endif /* __ARCH_S390_PERCPU__ */
diff --git a/arch/s390/include/asm/perf_event.h b/arch/s390/include/asm/perf_event.h
index 159a8ec6da9a..4cb19fe76dd9 100644
--- a/arch/s390/include/asm/perf_event.h
+++ b/arch/s390/include/asm/perf_event.h
@@ -9,8 +9,6 @@
9#ifndef _ASM_S390_PERF_EVENT_H 9#ifndef _ASM_S390_PERF_EVENT_H
10#define _ASM_S390_PERF_EVENT_H 10#define _ASM_S390_PERF_EVENT_H
11 11
12#ifdef CONFIG_64BIT
13
14#include <linux/perf_event.h> 12#include <linux/perf_event.h>
15#include <linux/device.h> 13#include <linux/device.h>
16#include <asm/cpu_mf.h> 14#include <asm/cpu_mf.h>
@@ -92,5 +90,4 @@ struct sf_raw_sample {
92int perf_reserve_sampling(void); 90int perf_reserve_sampling(void);
93void perf_release_sampling(void); 91void perf_release_sampling(void);
94 92
95#endif /* CONFIG_64BIT */
96#endif /* _ASM_S390_PERF_EVENT_H */ 93#endif /* _ASM_S390_PERF_EVENT_H */
diff --git a/arch/s390/include/asm/pgalloc.h b/arch/s390/include/asm/pgalloc.h
index 3009c2ba46d2..51e7fb634ebc 100644
--- a/arch/s390/include/asm/pgalloc.h
+++ b/arch/s390/include/asm/pgalloc.h
@@ -33,11 +33,7 @@ static inline void clear_table(unsigned long *s, unsigned long val, size_t n)
33 *s = val; 33 *s = val;
34 n = (n / 256) - 1; 34 n = (n / 256) - 1;
35 asm volatile( 35 asm volatile(
36#ifdef CONFIG_64BIT
37 " mvc 8(248,%0),0(%0)\n" 36 " mvc 8(248,%0),0(%0)\n"
38#else
39 " mvc 4(252,%0),0(%0)\n"
40#endif
41 "0: mvc 256(256,%0),0(%0)\n" 37 "0: mvc 256(256,%0),0(%0)\n"
42 " la %0,256(%0)\n" 38 " la %0,256(%0)\n"
43 " brct %1,0b\n" 39 " brct %1,0b\n"
@@ -50,24 +46,6 @@ static inline void crst_table_init(unsigned long *crst, unsigned long entry)
50 clear_table(crst, entry, sizeof(unsigned long)*2048); 46 clear_table(crst, entry, sizeof(unsigned long)*2048);
51} 47}
52 48
53#ifndef CONFIG_64BIT
54
55static inline unsigned long pgd_entry_type(struct mm_struct *mm)
56{
57 return _SEGMENT_ENTRY_EMPTY;
58}
59
60#define pud_alloc_one(mm,address) ({ BUG(); ((pud_t *)2); })
61#define pud_free(mm, x) do { } while (0)
62
63#define pmd_alloc_one(mm,address) ({ BUG(); ((pmd_t *)2); })
64#define pmd_free(mm, x) do { } while (0)
65
66#define pgd_populate(mm, pgd, pud) BUG()
67#define pud_populate(mm, pud, pmd) BUG()
68
69#else /* CONFIG_64BIT */
70
71static inline unsigned long pgd_entry_type(struct mm_struct *mm) 49static inline unsigned long pgd_entry_type(struct mm_struct *mm)
72{ 50{
73 if (mm->context.asce_limit <= (1UL << 31)) 51 if (mm->context.asce_limit <= (1UL << 31))
@@ -119,8 +97,6 @@ static inline void pud_populate(struct mm_struct *mm, pud_t *pud, pmd_t *pmd)
119 pud_val(*pud) = _REGION3_ENTRY | __pa(pmd); 97 pud_val(*pud) = _REGION3_ENTRY | __pa(pmd);
120} 98}
121 99
122#endif /* CONFIG_64BIT */
123
124static inline pgd_t *pgd_alloc(struct mm_struct *mm) 100static inline pgd_t *pgd_alloc(struct mm_struct *mm)
125{ 101{
126 spin_lock_init(&mm->context.list_lock); 102 spin_lock_init(&mm->context.list_lock);
diff --git a/arch/s390/include/asm/pgtable.h b/arch/s390/include/asm/pgtable.h
index e08ec38f8c6e..989cfae9e202 100644
--- a/arch/s390/include/asm/pgtable.h
+++ b/arch/s390/include/asm/pgtable.h
@@ -66,15 +66,9 @@ extern unsigned long zero_page_mask;
66 * table can map 66 * table can map
67 * PGDIR_SHIFT determines what a third-level page table entry can map 67 * PGDIR_SHIFT determines what a third-level page table entry can map
68 */ 68 */
69#ifndef CONFIG_64BIT 69#define PMD_SHIFT 20
70# define PMD_SHIFT 20 70#define PUD_SHIFT 31
71# define PUD_SHIFT 20 71#define PGDIR_SHIFT 42
72# define PGDIR_SHIFT 20
73#else /* CONFIG_64BIT */
74# define PMD_SHIFT 20
75# define PUD_SHIFT 31
76# define PGDIR_SHIFT 42
77#endif /* CONFIG_64BIT */
78 72
79#define PMD_SIZE (1UL << PMD_SHIFT) 73#define PMD_SIZE (1UL << PMD_SHIFT)
80#define PMD_MASK (~(PMD_SIZE-1)) 74#define PMD_MASK (~(PMD_SIZE-1))
@@ -90,15 +84,8 @@ extern unsigned long zero_page_mask;
90 * that leads to 1024 pte per pgd 84 * that leads to 1024 pte per pgd
91 */ 85 */
92#define PTRS_PER_PTE 256 86#define PTRS_PER_PTE 256
93#ifndef CONFIG_64BIT
94#define __PAGETABLE_PUD_FOLDED
95#define PTRS_PER_PMD 1
96#define __PAGETABLE_PMD_FOLDED
97#define PTRS_PER_PUD 1
98#else /* CONFIG_64BIT */
99#define PTRS_PER_PMD 2048 87#define PTRS_PER_PMD 2048
100#define PTRS_PER_PUD 2048 88#define PTRS_PER_PUD 2048
101#endif /* CONFIG_64BIT */
102#define PTRS_PER_PGD 2048 89#define PTRS_PER_PGD 2048
103 90
104#define FIRST_USER_ADDRESS 0UL 91#define FIRST_USER_ADDRESS 0UL
@@ -127,23 +114,19 @@ extern struct page *vmemmap;
127 114
128#define VMEM_MAX_PHYS ((unsigned long) vmemmap) 115#define VMEM_MAX_PHYS ((unsigned long) vmemmap)
129 116
130#ifdef CONFIG_64BIT
131extern unsigned long MODULES_VADDR; 117extern unsigned long MODULES_VADDR;
132extern unsigned long MODULES_END; 118extern unsigned long MODULES_END;
133#define MODULES_VADDR MODULES_VADDR 119#define MODULES_VADDR MODULES_VADDR
134#define MODULES_END MODULES_END 120#define MODULES_END MODULES_END
135#define MODULES_LEN (1UL << 31) 121#define MODULES_LEN (1UL << 31)
136#endif
137 122
138static inline int is_module_addr(void *addr) 123static inline int is_module_addr(void *addr)
139{ 124{
140#ifdef CONFIG_64BIT
141 BUILD_BUG_ON(MODULES_LEN > (1UL << 31)); 125 BUILD_BUG_ON(MODULES_LEN > (1UL << 31));
142 if (addr < (void *)MODULES_VADDR) 126 if (addr < (void *)MODULES_VADDR)
143 return 0; 127 return 0;
144 if (addr > (void *)MODULES_END) 128 if (addr > (void *)MODULES_END)
145 return 0; 129 return 0;
146#endif
147 return 1; 130 return 1;
148} 131}
149 132
@@ -284,56 +267,6 @@ static inline int is_module_addr(void *addr)
284 * pte_swap is true for the bit pattern .10...xxxx10, (pte & 0x603) == 0x402 267 * pte_swap is true for the bit pattern .10...xxxx10, (pte & 0x603) == 0x402
285 */ 268 */
286 269
287#ifndef CONFIG_64BIT
288
289/* Bits in the segment table address-space-control-element */
290#define _ASCE_SPACE_SWITCH 0x80000000UL /* space switch event */
291#define _ASCE_ORIGIN_MASK 0x7ffff000UL /* segment table origin */
292#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
293#define _ASCE_ALT_EVENT 0x80 /* storage alteration event control */
294#define _ASCE_TABLE_LENGTH 0x7f /* 128 x 64 entries = 8k */
295
296/* Bits in the segment table entry */
297#define _SEGMENT_ENTRY_BITS 0x7fffffffUL /* Valid segment table bits */
298#define _SEGMENT_ENTRY_ORIGIN 0x7fffffc0UL /* page table origin */
299#define _SEGMENT_ENTRY_PROTECT 0x200 /* page protection bit */
300#define _SEGMENT_ENTRY_INVALID 0x20 /* invalid segment table entry */
301#define _SEGMENT_ENTRY_COMMON 0x10 /* common segment bit */
302#define _SEGMENT_ENTRY_PTL 0x0f /* page table length */
303
304#define _SEGMENT_ENTRY_DIRTY 0 /* No sw dirty bit for 31-bit */
305#define _SEGMENT_ENTRY_YOUNG 0 /* No sw young bit for 31-bit */
306#define _SEGMENT_ENTRY_READ 0 /* No sw read bit for 31-bit */
307#define _SEGMENT_ENTRY_WRITE 0 /* No sw write bit for 31-bit */
308#define _SEGMENT_ENTRY_LARGE 0 /* No large pages for 31-bit */
309#define _SEGMENT_ENTRY_BITS_LARGE 0
310#define _SEGMENT_ENTRY_ORIGIN_LARGE 0
311
312#define _SEGMENT_ENTRY (_SEGMENT_ENTRY_PTL)
313#define _SEGMENT_ENTRY_EMPTY (_SEGMENT_ENTRY_INVALID)
314
315/*
316 * Segment table entry encoding (I = invalid, R = read-only bit):
317 * ..R...I.....
318 * prot-none ..1...1.....
319 * read-only ..1...0.....
320 * read-write ..0...0.....
321 * empty ..0...1.....
322 */
323
324/* Page status table bits for virtualization */
325#define PGSTE_ACC_BITS 0xf0000000UL
326#define PGSTE_FP_BIT 0x08000000UL
327#define PGSTE_PCL_BIT 0x00800000UL
328#define PGSTE_HR_BIT 0x00400000UL
329#define PGSTE_HC_BIT 0x00200000UL
330#define PGSTE_GR_BIT 0x00040000UL
331#define PGSTE_GC_BIT 0x00020000UL
332#define PGSTE_UC_BIT 0x00008000UL /* user dirty (migration) */
333#define PGSTE_IN_BIT 0x00004000UL /* IPTE notify bit */
334
335#else /* CONFIG_64BIT */
336
337/* Bits in the segment/region table address-space-control-element */ 270/* Bits in the segment/region table address-space-control-element */
338#define _ASCE_ORIGIN ~0xfffUL/* segment table origin */ 271#define _ASCE_ORIGIN ~0xfffUL/* segment table origin */
339#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */ 272#define _ASCE_PRIVATE_SPACE 0x100 /* private space control */
@@ -417,8 +350,6 @@ static inline int is_module_addr(void *addr)
417#define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */ 350#define PGSTE_UC_BIT 0x0000800000000000UL /* user dirty (migration) */
418#define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */ 351#define PGSTE_IN_BIT 0x0000400000000000UL /* IPTE notify bit */
419 352
420#endif /* CONFIG_64BIT */
421
422/* Guest Page State used for virtualization */ 353/* Guest Page State used for virtualization */
423#define _PGSTE_GPS_ZERO 0x0000000080000000UL 354#define _PGSTE_GPS_ZERO 0x0000000080000000UL
424#define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL 355#define _PGSTE_GPS_USAGE_MASK 0x0000000003000000UL
@@ -509,19 +440,6 @@ static inline int mm_use_skey(struct mm_struct *mm)
509/* 440/*
510 * pgd/pmd/pte query functions 441 * pgd/pmd/pte query functions
511 */ 442 */
512#ifndef CONFIG_64BIT
513
514static inline int pgd_present(pgd_t pgd) { return 1; }
515static inline int pgd_none(pgd_t pgd) { return 0; }
516static inline int pgd_bad(pgd_t pgd) { return 0; }
517
518static inline int pud_present(pud_t pud) { return 1; }
519static inline int pud_none(pud_t pud) { return 0; }
520static inline int pud_large(pud_t pud) { return 0; }
521static inline int pud_bad(pud_t pud) { return 0; }
522
523#else /* CONFIG_64BIT */
524
525static inline int pgd_present(pgd_t pgd) 443static inline int pgd_present(pgd_t pgd)
526{ 444{
527 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2) 445 if ((pgd_val(pgd) & _REGION_ENTRY_TYPE_MASK) < _REGION_ENTRY_TYPE_R2)
@@ -583,8 +501,6 @@ static inline int pud_bad(pud_t pud)
583 return (pud_val(pud) & mask) != 0; 501 return (pud_val(pud) & mask) != 0;
584} 502}
585 503
586#endif /* CONFIG_64BIT */
587
588static inline int pmd_present(pmd_t pmd) 504static inline int pmd_present(pmd_t pmd)
589{ 505{
590 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID; 506 return pmd_val(pmd) != _SEGMENT_ENTRY_INVALID;
@@ -916,18 +832,14 @@ static inline int pte_unused(pte_t pte)
916 832
917static inline void pgd_clear(pgd_t *pgd) 833static inline void pgd_clear(pgd_t *pgd)
918{ 834{
919#ifdef CONFIG_64BIT
920 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2) 835 if ((pgd_val(*pgd) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R2)
921 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY; 836 pgd_val(*pgd) = _REGION2_ENTRY_EMPTY;
922#endif
923} 837}
924 838
925static inline void pud_clear(pud_t *pud) 839static inline void pud_clear(pud_t *pud)
926{ 840{
927#ifdef CONFIG_64BIT
928 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3) 841 if ((pud_val(*pud) & _REGION_ENTRY_TYPE_MASK) == _REGION_ENTRY_TYPE_R3)
929 pud_val(*pud) = _REGION3_ENTRY_EMPTY; 842 pud_val(*pud) = _REGION3_ENTRY_EMPTY;
930#endif
931} 843}
932 844
933static inline void pmd_clear(pmd_t *pmdp) 845static inline void pmd_clear(pmd_t *pmdp)
@@ -1026,10 +938,6 @@ static inline void __ptep_ipte(unsigned long address, pte_t *ptep)
1026{ 938{
1027 unsigned long pto = (unsigned long) ptep; 939 unsigned long pto = (unsigned long) ptep;
1028 940
1029#ifndef CONFIG_64BIT
1030 /* pto in ESA mode must point to the start of the segment table */
1031 pto &= 0x7ffffc00;
1032#endif
1033 /* Invalidation + global TLB flush for the pte */ 941 /* Invalidation + global TLB flush for the pte */
1034 asm volatile( 942 asm volatile(
1035 " ipte %2,%3" 943 " ipte %2,%3"
@@ -1040,10 +948,6 @@ static inline void __ptep_ipte_local(unsigned long address, pte_t *ptep)
1040{ 948{
1041 unsigned long pto = (unsigned long) ptep; 949 unsigned long pto = (unsigned long) ptep;
1042 950
1043#ifndef CONFIG_64BIT
1044 /* pto in ESA mode must point to the start of the segment table */
1045 pto &= 0x7ffffc00;
1046#endif
1047 /* Invalidation + local TLB flush for the pte */ 951 /* Invalidation + local TLB flush for the pte */
1048 asm volatile( 952 asm volatile(
1049 " .insn rrf,0xb2210000,%2,%3,0,1" 953 " .insn rrf,0xb2210000,%2,%3,0,1"
@@ -1054,10 +958,6 @@ static inline void __ptep_ipte_range(unsigned long address, int nr, pte_t *ptep)
1054{ 958{
1055 unsigned long pto = (unsigned long) ptep; 959 unsigned long pto = (unsigned long) ptep;
1056 960
1057#ifndef CONFIG_64BIT
1058 /* pto in ESA mode must point to the start of the segment table */
1059 pto &= 0x7ffffc00;
1060#endif
1061 /* Invalidate a range of ptes + global TLB flush of the ptes */ 961 /* Invalidate a range of ptes + global TLB flush of the ptes */
1062 do { 962 do {
1063 asm volatile( 963 asm volatile(
@@ -1376,17 +1276,6 @@ static inline pte_t mk_pte(struct page *page, pgprot_t pgprot)
1376#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address)) 1276#define pgd_offset(mm, address) ((mm)->pgd + pgd_index(address))
1377#define pgd_offset_k(address) pgd_offset(&init_mm, address) 1277#define pgd_offset_k(address) pgd_offset(&init_mm, address)
1378 1278
1379#ifndef CONFIG_64BIT
1380
1381#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1382#define pud_deref(pmd) ({ BUG(); 0UL; })
1383#define pgd_deref(pmd) ({ BUG(); 0UL; })
1384
1385#define pud_offset(pgd, address) ((pud_t *) pgd)
1386#define pmd_offset(pud, address) ((pmd_t *) pud + pmd_index(address))
1387
1388#else /* CONFIG_64BIT */
1389
1390#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN) 1279#define pmd_deref(pmd) (pmd_val(pmd) & _SEGMENT_ENTRY_ORIGIN)
1391#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN) 1280#define pud_deref(pud) (pud_val(pud) & _REGION_ENTRY_ORIGIN)
1392#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN) 1281#define pgd_deref(pgd) (pgd_val(pgd) & _REGION_ENTRY_ORIGIN)
@@ -1407,8 +1296,6 @@ static inline pmd_t *pmd_offset(pud_t *pud, unsigned long address)
1407 return pmd + pmd_index(address); 1296 return pmd + pmd_index(address);
1408} 1297}
1409 1298
1410#endif /* CONFIG_64BIT */
1411
1412#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot)) 1299#define pfn_pte(pfn,pgprot) mk_pte_phys(__pa((pfn) << PAGE_SHIFT),(pgprot))
1413#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT) 1300#define pte_pfn(x) (pte_val(x) >> PAGE_SHIFT)
1414#define pte_page(x) pfn_to_page(pte_pfn(x)) 1301#define pte_page(x) pfn_to_page(pte_pfn(x))
@@ -1729,11 +1616,9 @@ static inline int has_transparent_hugepage(void)
1729 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66 1616 * 0000000000111111111122222222223333333333444444444455 5555 5 55566 66
1730 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23 1617 * 0123456789012345678901234567890123456789012345678901 2345 6 78901 23
1731 */ 1618 */
1732#ifndef CONFIG_64BIT 1619
1733#define __SWP_OFFSET_MASK (~0UL >> 12)
1734#else
1735#define __SWP_OFFSET_MASK (~0UL >> 11) 1620#define __SWP_OFFSET_MASK (~0UL >> 11)
1736#endif 1621
1737static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset) 1622static inline pte_t mk_swap_pte(unsigned long type, unsigned long offset)
1738{ 1623{
1739 pte_t pte; 1624 pte_t pte;
diff --git a/arch/s390/include/asm/processor.h b/arch/s390/include/asm/processor.h
index e7cbbdcdee13..dedb6218544b 100644
--- a/arch/s390/include/asm/processor.h
+++ b/arch/s390/include/asm/processor.h
@@ -19,7 +19,6 @@
19#define _CIF_ASCE (1<<CIF_ASCE) 19#define _CIF_ASCE (1<<CIF_ASCE)
20#define _CIF_NOHZ_DELAY (1<<CIF_NOHZ_DELAY) 20#define _CIF_NOHZ_DELAY (1<<CIF_NOHZ_DELAY)
21 21
22
23#ifndef __ASSEMBLY__ 22#ifndef __ASSEMBLY__
24 23
25#include <linux/linkage.h> 24#include <linux/linkage.h>
@@ -66,13 +65,6 @@ extern void execve_tail(void);
66/* 65/*
67 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit. 66 * User space process size: 2GB for 31 bit, 4TB or 8PT for 64 bit.
68 */ 67 */
69#ifndef CONFIG_64BIT
70
71#define TASK_SIZE (1UL << 31)
72#define TASK_MAX_SIZE (1UL << 31)
73#define TASK_UNMAPPED_BASE (1UL << 30)
74
75#else /* CONFIG_64BIT */
76 68
77#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit) 69#define TASK_SIZE_OF(tsk) ((tsk)->mm->context.asce_limit)
78#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \ 70#define TASK_UNMAPPED_BASE (test_thread_flag(TIF_31BIT) ? \
@@ -80,15 +72,8 @@ extern void execve_tail(void);
80#define TASK_SIZE TASK_SIZE_OF(current) 72#define TASK_SIZE TASK_SIZE_OF(current)
81#define TASK_MAX_SIZE (1UL << 53) 73#define TASK_MAX_SIZE (1UL << 53)
82 74
83#endif /* CONFIG_64BIT */
84
85#ifndef CONFIG_64BIT
86#define STACK_TOP (1UL << 31)
87#define STACK_TOP_MAX (1UL << 31)
88#else /* CONFIG_64BIT */
89#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42)) 75#define STACK_TOP (1UL << (test_thread_flag(TIF_31BIT) ? 31:42))
90#define STACK_TOP_MAX (1UL << 42) 76#define STACK_TOP_MAX (1UL << 42)
91#endif /* CONFIG_64BIT */
92 77
93#define HAVE_ARCH_PICK_MMAP_LAYOUT 78#define HAVE_ARCH_PICK_MMAP_LAYOUT
94 79
@@ -115,10 +100,8 @@ struct thread_struct {
115 /* cpu runtime instrumentation */ 100 /* cpu runtime instrumentation */
116 struct runtime_instr_cb *ri_cb; 101 struct runtime_instr_cb *ri_cb;
117 int ri_signum; 102 int ri_signum;
118#ifdef CONFIG_64BIT
119 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */ 103 unsigned char trap_tdb[256]; /* Transaction abort diagnose block */
120 __vector128 *vxrs; /* Vector register save area */ 104 __vector128 *vxrs; /* Vector register save area */
121#endif
122}; 105};
123 106
124/* Flag to disable transactions. */ 107/* Flag to disable transactions. */
@@ -181,11 +164,7 @@ struct task_struct;
181struct mm_struct; 164struct mm_struct;
182struct seq_file; 165struct seq_file;
183 166
184#ifdef CONFIG_64BIT 167void show_cacheinfo(struct seq_file *m);
185extern void show_cacheinfo(struct seq_file *m);
186#else
187static inline void show_cacheinfo(struct seq_file *m) { }
188#endif
189 168
190/* Free all resources held by a thread. */ 169/* Free all resources held by a thread. */
191extern void release_thread(struct task_struct *); 170extern void release_thread(struct task_struct *);
@@ -229,11 +208,7 @@ static inline void psw_set_key(unsigned int key)
229 */ 208 */
230static inline void __load_psw(psw_t psw) 209static inline void __load_psw(psw_t psw)
231{ 210{
232#ifndef CONFIG_64BIT
233 asm volatile("lpsw %0" : : "Q" (psw) : "cc");
234#else
235 asm volatile("lpswe %0" : : "Q" (psw) : "cc"); 211 asm volatile("lpswe %0" : : "Q" (psw) : "cc");
236#endif
237} 212}
238 213
239/* 214/*
@@ -247,22 +222,12 @@ static inline void __load_psw_mask (unsigned long mask)
247 222
248 psw.mask = mask; 223 psw.mask = mask;
249 224
250#ifndef CONFIG_64BIT
251 asm volatile(
252 " basr %0,0\n"
253 "0: ahi %0,1f-0b\n"
254 " st %0,%O1+4(%R1)\n"
255 " lpsw %1\n"
256 "1:"
257 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
258#else /* CONFIG_64BIT */
259 asm volatile( 225 asm volatile(
260 " larl %0,1f\n" 226 " larl %0,1f\n"
261 " stg %0,%O1+8(%R1)\n" 227 " stg %0,%O1+8(%R1)\n"
262 " lpswe %1\n" 228 " lpswe %1\n"
263 "1:" 229 "1:"
264 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc"); 230 : "=&d" (addr), "=Q" (psw) : "Q" (psw) : "memory", "cc");
265#endif /* CONFIG_64BIT */
266} 231}
267 232
268/* 233/*
@@ -270,20 +235,12 @@ static inline void __load_psw_mask (unsigned long mask)
270 */ 235 */
271static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc) 236static inline unsigned long __rewind_psw(psw_t psw, unsigned long ilc)
272{ 237{
273#ifndef CONFIG_64BIT
274 if (psw.addr & PSW_ADDR_AMODE)
275 /* 31 bit mode */
276 return (psw.addr - ilc) | PSW_ADDR_AMODE;
277 /* 24 bit mode */
278 return (psw.addr - ilc) & ((1UL << 24) - 1);
279#else
280 unsigned long mask; 238 unsigned long mask;
281 239
282 mask = (psw.mask & PSW_MASK_EA) ? -1UL : 240 mask = (psw.mask & PSW_MASK_EA) ? -1UL :
283 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 : 241 (psw.mask & PSW_MASK_BA) ? (1UL << 31) - 1 :
284 (1UL << 24) - 1; 242 (1UL << 24) - 1;
285 return (psw.addr - ilc) & mask; 243 return (psw.addr - ilc) & mask;
286#endif
287} 244}
288 245
289/* 246/*
@@ -305,26 +262,6 @@ static inline void __noreturn disabled_wait(unsigned long code)
305 * Store status and then load disabled wait psw, 262 * Store status and then load disabled wait psw,
306 * the processor is dead afterwards 263 * the processor is dead afterwards
307 */ 264 */
308#ifndef CONFIG_64BIT
309 asm volatile(
310 " stctl 0,0,0(%2)\n"
311 " ni 0(%2),0xef\n" /* switch off protection */
312 " lctl 0,0,0(%2)\n"
313 " stpt 0xd8\n" /* store timer */
314 " stckc 0xe0\n" /* store clock comparator */
315 " stpx 0x108\n" /* store prefix register */
316 " stam 0,15,0x120\n" /* store access registers */
317 " std 0,0x160\n" /* store f0 */
318 " std 2,0x168\n" /* store f2 */
319 " std 4,0x170\n" /* store f4 */
320 " std 6,0x178\n" /* store f6 */
321 " stm 0,15,0x180\n" /* store general registers */
322 " stctl 0,15,0x1c0\n" /* store control registers */
323 " oi 0x1c0,0x10\n" /* fake protection bit */
324 " lpsw 0(%1)"
325 : "=m" (ctl_buf)
326 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc");
327#else /* CONFIG_64BIT */
328 asm volatile( 265 asm volatile(
329 " stctg 0,0,0(%2)\n" 266 " stctg 0,0,0(%2)\n"
330 " ni 4(%2),0xef\n" /* switch off protection */ 267 " ni 4(%2),0xef\n" /* switch off protection */
@@ -357,7 +294,6 @@ static inline void __noreturn disabled_wait(unsigned long code)
357 " lpswe 0(%1)" 294 " lpswe 0(%1)"
358 : "=m" (ctl_buf) 295 : "=m" (ctl_buf)
359 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1"); 296 : "a" (&dw_psw), "a" (&ctl_buf), "m" (dw_psw) : "cc", "0", "1");
360#endif /* CONFIG_64BIT */
361 while (1); 297 while (1);
362} 298}
363 299
diff --git a/arch/s390/include/asm/ptrace.h b/arch/s390/include/asm/ptrace.h
index be317feff7ac..6feda2599282 100644
--- a/arch/s390/include/asm/ptrace.h
+++ b/arch/s390/include/asm/ptrace.h
@@ -40,12 +40,8 @@ struct psw_bits {
40 unsigned long long ri : 1; /* Runtime Instrumentation */ 40 unsigned long long ri : 1; /* Runtime Instrumentation */
41 unsigned long long : 6; 41 unsigned long long : 6;
42 unsigned long long eaba : 2; /* Addressing Mode */ 42 unsigned long long eaba : 2; /* Addressing Mode */
43#ifdef CONFIG_64BIT
44 unsigned long long : 31; 43 unsigned long long : 31;
45 unsigned long long ia : 64;/* Instruction Address */ 44 unsigned long long ia : 64;/* Instruction Address */
46#else
47 unsigned long long ia : 31;/* Instruction Address */
48#endif
49}; 45};
50 46
51enum { 47enum {
diff --git a/arch/s390/include/asm/qdio.h b/arch/s390/include/asm/qdio.h
index 06f3034605a1..998b61cd0e56 100644
--- a/arch/s390/include/asm/qdio.h
+++ b/arch/s390/include/asm/qdio.h
@@ -211,11 +211,6 @@ struct qdio_buffer_element {
211 u8 scount; 211 u8 scount;
212 u8 sflags; 212 u8 sflags;
213 u32 length; 213 u32 length;
214#ifdef CONFIG_32BIT
215 /* private: */
216 void *res2;
217 /* public: */
218#endif
219 void *addr; 214 void *addr;
220} __attribute__ ((packed, aligned(16))); 215} __attribute__ ((packed, aligned(16)));
221 216
@@ -232,11 +227,6 @@ struct qdio_buffer {
232 * @sbal: absolute SBAL address 227 * @sbal: absolute SBAL address
233 */ 228 */
234struct sl_element { 229struct sl_element {
235#ifdef CONFIG_32BIT
236 /* private: */
237 unsigned long reserved;
238 /* public: */
239#endif
240 unsigned long sbal; 230 unsigned long sbal;
241} __attribute__ ((packed)); 231} __attribute__ ((packed));
242 232
diff --git a/arch/s390/include/asm/runtime_instr.h b/arch/s390/include/asm/runtime_instr.h
index 830da737ff85..402ad6df4897 100644
--- a/arch/s390/include/asm/runtime_instr.h
+++ b/arch/s390/include/asm/runtime_instr.h
@@ -72,27 +72,19 @@ static inline void store_runtime_instr_cb(struct runtime_instr_cb *cb)
72 72
73static inline void save_ri_cb(struct runtime_instr_cb *cb_prev) 73static inline void save_ri_cb(struct runtime_instr_cb *cb_prev)
74{ 74{
75#ifdef CONFIG_64BIT
76 if (cb_prev) 75 if (cb_prev)
77 store_runtime_instr_cb(cb_prev); 76 store_runtime_instr_cb(cb_prev);
78#endif
79} 77}
80 78
81static inline void restore_ri_cb(struct runtime_instr_cb *cb_next, 79static inline void restore_ri_cb(struct runtime_instr_cb *cb_next,
82 struct runtime_instr_cb *cb_prev) 80 struct runtime_instr_cb *cb_prev)
83{ 81{
84#ifdef CONFIG_64BIT
85 if (cb_next) 82 if (cb_next)
86 load_runtime_instr_cb(cb_next); 83 load_runtime_instr_cb(cb_next);
87 else if (cb_prev) 84 else if (cb_prev)
88 load_runtime_instr_cb(&runtime_instr_empty_cb); 85 load_runtime_instr_cb(&runtime_instr_empty_cb);
89#endif
90} 86}
91 87
92#ifdef CONFIG_64BIT 88void exit_thread_runtime_instr(void);
93extern void exit_thread_runtime_instr(void);
94#else
95static inline void exit_thread_runtime_instr(void) { }
96#endif
97 89
98#endif /* _RUNTIME_INSTR_H */ 90#endif /* _RUNTIME_INSTR_H */
diff --git a/arch/s390/include/asm/rwsem.h b/arch/s390/include/asm/rwsem.h
index 487f9b64efb9..4b43ee7e6776 100644
--- a/arch/s390/include/asm/rwsem.h
+++ b/arch/s390/include/asm/rwsem.h
@@ -39,17 +39,10 @@
39#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead" 39#error "please don't include asm/rwsem.h directly, use linux/rwsem.h instead"
40#endif 40#endif
41 41
42#ifndef CONFIG_64BIT
43#define RWSEM_UNLOCKED_VALUE 0x00000000
44#define RWSEM_ACTIVE_BIAS 0x00000001
45#define RWSEM_ACTIVE_MASK 0x0000ffff
46#define RWSEM_WAITING_BIAS (-0x00010000)
47#else /* CONFIG_64BIT */
48#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L 42#define RWSEM_UNLOCKED_VALUE 0x0000000000000000L
49#define RWSEM_ACTIVE_BIAS 0x0000000000000001L 43#define RWSEM_ACTIVE_BIAS 0x0000000000000001L
50#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL 44#define RWSEM_ACTIVE_MASK 0x00000000ffffffffL
51#define RWSEM_WAITING_BIAS (-0x0000000100000000L) 45#define RWSEM_WAITING_BIAS (-0x0000000100000000L)
52#endif /* CONFIG_64BIT */
53#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS 46#define RWSEM_ACTIVE_READ_BIAS RWSEM_ACTIVE_BIAS
54#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS) 47#define RWSEM_ACTIVE_WRITE_BIAS (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
55 48
@@ -61,19 +54,11 @@ static inline void __down_read(struct rw_semaphore *sem)
61 signed long old, new; 54 signed long old, new;
62 55
63 asm volatile( 56 asm volatile(
64#ifndef CONFIG_64BIT
65 " l %0,%2\n"
66 "0: lr %1,%0\n"
67 " ahi %1,%4\n"
68 " cs %0,%1,%2\n"
69 " jl 0b"
70#else /* CONFIG_64BIT */
71 " lg %0,%2\n" 57 " lg %0,%2\n"
72 "0: lgr %1,%0\n" 58 "0: lgr %1,%0\n"
73 " aghi %1,%4\n" 59 " aghi %1,%4\n"
74 " csg %0,%1,%2\n" 60 " csg %0,%1,%2\n"
75 " jl 0b" 61 " jl 0b"
76#endif /* CONFIG_64BIT */
77 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 62 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
78 : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) 63 : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS)
79 : "cc", "memory"); 64 : "cc", "memory");
@@ -89,15 +74,6 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)
89 signed long old, new; 74 signed long old, new;
90 75
91 asm volatile( 76 asm volatile(
92#ifndef CONFIG_64BIT
93 " l %0,%2\n"
94 "0: ltr %1,%0\n"
95 " jm 1f\n"
96 " ahi %1,%4\n"
97 " cs %0,%1,%2\n"
98 " jl 0b\n"
99 "1:"
100#else /* CONFIG_64BIT */
101 " lg %0,%2\n" 77 " lg %0,%2\n"
102 "0: ltgr %1,%0\n" 78 "0: ltgr %1,%0\n"
103 " jm 1f\n" 79 " jm 1f\n"
@@ -105,7 +81,6 @@ static inline int __down_read_trylock(struct rw_semaphore *sem)
105 " csg %0,%1,%2\n" 81 " csg %0,%1,%2\n"
106 " jl 0b\n" 82 " jl 0b\n"
107 "1:" 83 "1:"
108#endif /* CONFIG_64BIT */
109 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 84 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
110 : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS) 85 : "Q" (sem->count), "i" (RWSEM_ACTIVE_READ_BIAS)
111 : "cc", "memory"); 86 : "cc", "memory");
@@ -121,19 +96,11 @@ static inline void __down_write_nested(struct rw_semaphore *sem, int subclass)
121 96
122 tmp = RWSEM_ACTIVE_WRITE_BIAS; 97 tmp = RWSEM_ACTIVE_WRITE_BIAS;
123 asm volatile( 98 asm volatile(
124#ifndef CONFIG_64BIT
125 " l %0,%2\n"
126 "0: lr %1,%0\n"
127 " a %1,%4\n"
128 " cs %0,%1,%2\n"
129 " jl 0b"
130#else /* CONFIG_64BIT */
131 " lg %0,%2\n" 99 " lg %0,%2\n"
132 "0: lgr %1,%0\n" 100 "0: lgr %1,%0\n"
133 " ag %1,%4\n" 101 " ag %1,%4\n"
134 " csg %0,%1,%2\n" 102 " csg %0,%1,%2\n"
135 " jl 0b" 103 " jl 0b"
136#endif /* CONFIG_64BIT */
137 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 104 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
138 : "Q" (sem->count), "m" (tmp) 105 : "Q" (sem->count), "m" (tmp)
139 : "cc", "memory"); 106 : "cc", "memory");
@@ -154,19 +121,11 @@ static inline int __down_write_trylock(struct rw_semaphore *sem)
154 signed long old; 121 signed long old;
155 122
156 asm volatile( 123 asm volatile(
157#ifndef CONFIG_64BIT
158 " l %0,%1\n"
159 "0: ltr %0,%0\n"
160 " jnz 1f\n"
161 " cs %0,%3,%1\n"
162 " jl 0b\n"
163#else /* CONFIG_64BIT */
164 " lg %0,%1\n" 124 " lg %0,%1\n"
165 "0: ltgr %0,%0\n" 125 "0: ltgr %0,%0\n"
166 " jnz 1f\n" 126 " jnz 1f\n"
167 " csg %0,%3,%1\n" 127 " csg %0,%3,%1\n"
168 " jl 0b\n" 128 " jl 0b\n"
169#endif /* CONFIG_64BIT */
170 "1:" 129 "1:"
171 : "=&d" (old), "=Q" (sem->count) 130 : "=&d" (old), "=Q" (sem->count)
172 : "Q" (sem->count), "d" (RWSEM_ACTIVE_WRITE_BIAS) 131 : "Q" (sem->count), "d" (RWSEM_ACTIVE_WRITE_BIAS)
@@ -182,19 +141,11 @@ static inline void __up_read(struct rw_semaphore *sem)
182 signed long old, new; 141 signed long old, new;
183 142
184 asm volatile( 143 asm volatile(
185#ifndef CONFIG_64BIT
186 " l %0,%2\n"
187 "0: lr %1,%0\n"
188 " ahi %1,%4\n"
189 " cs %0,%1,%2\n"
190 " jl 0b"
191#else /* CONFIG_64BIT */
192 " lg %0,%2\n" 144 " lg %0,%2\n"
193 "0: lgr %1,%0\n" 145 "0: lgr %1,%0\n"
194 " aghi %1,%4\n" 146 " aghi %1,%4\n"
195 " csg %0,%1,%2\n" 147 " csg %0,%1,%2\n"
196 " jl 0b" 148 " jl 0b"
197#endif /* CONFIG_64BIT */
198 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 149 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
199 : "Q" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS) 150 : "Q" (sem->count), "i" (-RWSEM_ACTIVE_READ_BIAS)
200 : "cc", "memory"); 151 : "cc", "memory");
@@ -212,19 +163,11 @@ static inline void __up_write(struct rw_semaphore *sem)
212 163
213 tmp = -RWSEM_ACTIVE_WRITE_BIAS; 164 tmp = -RWSEM_ACTIVE_WRITE_BIAS;
214 asm volatile( 165 asm volatile(
215#ifndef CONFIG_64BIT
216 " l %0,%2\n"
217 "0: lr %1,%0\n"
218 " a %1,%4\n"
219 " cs %0,%1,%2\n"
220 " jl 0b"
221#else /* CONFIG_64BIT */
222 " lg %0,%2\n" 166 " lg %0,%2\n"
223 "0: lgr %1,%0\n" 167 "0: lgr %1,%0\n"
224 " ag %1,%4\n" 168 " ag %1,%4\n"
225 " csg %0,%1,%2\n" 169 " csg %0,%1,%2\n"
226 " jl 0b" 170 " jl 0b"
227#endif /* CONFIG_64BIT */
228 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 171 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
229 : "Q" (sem->count), "m" (tmp) 172 : "Q" (sem->count), "m" (tmp)
230 : "cc", "memory"); 173 : "cc", "memory");
@@ -242,19 +185,11 @@ static inline void __downgrade_write(struct rw_semaphore *sem)
242 185
243 tmp = -RWSEM_WAITING_BIAS; 186 tmp = -RWSEM_WAITING_BIAS;
244 asm volatile( 187 asm volatile(
245#ifndef CONFIG_64BIT
246 " l %0,%2\n"
247 "0: lr %1,%0\n"
248 " a %1,%4\n"
249 " cs %0,%1,%2\n"
250 " jl 0b"
251#else /* CONFIG_64BIT */
252 " lg %0,%2\n" 188 " lg %0,%2\n"
253 "0: lgr %1,%0\n" 189 "0: lgr %1,%0\n"
254 " ag %1,%4\n" 190 " ag %1,%4\n"
255 " csg %0,%1,%2\n" 191 " csg %0,%1,%2\n"
256 " jl 0b" 192 " jl 0b"
257#endif /* CONFIG_64BIT */
258 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 193 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
259 : "Q" (sem->count), "m" (tmp) 194 : "Q" (sem->count), "m" (tmp)
260 : "cc", "memory"); 195 : "cc", "memory");
@@ -270,19 +205,11 @@ static inline void rwsem_atomic_add(long delta, struct rw_semaphore *sem)
270 signed long old, new; 205 signed long old, new;
271 206
272 asm volatile( 207 asm volatile(
273#ifndef CONFIG_64BIT
274 " l %0,%2\n"
275 "0: lr %1,%0\n"
276 " ar %1,%4\n"
277 " cs %0,%1,%2\n"
278 " jl 0b"
279#else /* CONFIG_64BIT */
280 " lg %0,%2\n" 208 " lg %0,%2\n"
281 "0: lgr %1,%0\n" 209 "0: lgr %1,%0\n"
282 " agr %1,%4\n" 210 " agr %1,%4\n"
283 " csg %0,%1,%2\n" 211 " csg %0,%1,%2\n"
284 " jl 0b" 212 " jl 0b"
285#endif /* CONFIG_64BIT */
286 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 213 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
287 : "Q" (sem->count), "d" (delta) 214 : "Q" (sem->count), "d" (delta)
288 : "cc", "memory"); 215 : "cc", "memory");
@@ -296,19 +223,11 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
296 signed long old, new; 223 signed long old, new;
297 224
298 asm volatile( 225 asm volatile(
299#ifndef CONFIG_64BIT
300 " l %0,%2\n"
301 "0: lr %1,%0\n"
302 " ar %1,%4\n"
303 " cs %0,%1,%2\n"
304 " jl 0b"
305#else /* CONFIG_64BIT */
306 " lg %0,%2\n" 226 " lg %0,%2\n"
307 "0: lgr %1,%0\n" 227 "0: lgr %1,%0\n"
308 " agr %1,%4\n" 228 " agr %1,%4\n"
309 " csg %0,%1,%2\n" 229 " csg %0,%1,%2\n"
310 " jl 0b" 230 " jl 0b"
311#endif /* CONFIG_64BIT */
312 : "=&d" (old), "=&d" (new), "=Q" (sem->count) 231 : "=&d" (old), "=&d" (new), "=Q" (sem->count)
313 : "Q" (sem->count), "d" (delta) 232 : "Q" (sem->count), "d" (delta)
314 : "cc", "memory"); 233 : "cc", "memory");
diff --git a/arch/s390/include/asm/setup.h b/arch/s390/include/asm/setup.h
index b8d1e54b4733..b8ffc1bd0a9f 100644
--- a/arch/s390/include/asm/setup.h
+++ b/arch/s390/include/asm/setup.h
@@ -15,19 +15,11 @@
15#include <asm/lowcore.h> 15#include <asm/lowcore.h>
16#include <asm/types.h> 16#include <asm/types.h>
17 17
18#ifndef CONFIG_64BIT
19#define IPL_DEVICE (*(unsigned long *) (0x10404))
20#define INITRD_START (*(unsigned long *) (0x1040C))
21#define INITRD_SIZE (*(unsigned long *) (0x10414))
22#define OLDMEM_BASE (*(unsigned long *) (0x1041C))
23#define OLDMEM_SIZE (*(unsigned long *) (0x10424))
24#else /* CONFIG_64BIT */
25#define IPL_DEVICE (*(unsigned long *) (0x10400)) 18#define IPL_DEVICE (*(unsigned long *) (0x10400))
26#define INITRD_START (*(unsigned long *) (0x10408)) 19#define INITRD_START (*(unsigned long *) (0x10408))
27#define INITRD_SIZE (*(unsigned long *) (0x10410)) 20#define INITRD_SIZE (*(unsigned long *) (0x10410))
28#define OLDMEM_BASE (*(unsigned long *) (0x10418)) 21#define OLDMEM_BASE (*(unsigned long *) (0x10418))
29#define OLDMEM_SIZE (*(unsigned long *) (0x10420)) 22#define OLDMEM_SIZE (*(unsigned long *) (0x10420))
30#endif /* CONFIG_64BIT */
31#define COMMAND_LINE ((char *) (0x10480)) 23#define COMMAND_LINE ((char *) (0x10480))
32 24
33extern int memory_end_set; 25extern int memory_end_set;
@@ -68,26 +60,8 @@ extern void detect_memory_memblock(void);
68#define MACHINE_HAS_PFMF MACHINE_HAS_EDAT1 60#define MACHINE_HAS_PFMF MACHINE_HAS_EDAT1
69#define MACHINE_HAS_HPAGE MACHINE_HAS_EDAT1 61#define MACHINE_HAS_HPAGE MACHINE_HAS_EDAT1
70 62
71#ifndef CONFIG_64BIT
72#define MACHINE_HAS_IEEE (S390_lowcore.machine_flags & MACHINE_FLAG_IEEE)
73#define MACHINE_HAS_CSP (S390_lowcore.machine_flags & MACHINE_FLAG_CSP)
74#define MACHINE_HAS_IDTE (0)
75#define MACHINE_HAS_DIAG44 (1)
76#define MACHINE_HAS_MVPG (S390_lowcore.machine_flags & MACHINE_FLAG_MVPG)
77#define MACHINE_HAS_EDAT1 (0)
78#define MACHINE_HAS_EDAT2 (0)
79#define MACHINE_HAS_LPP (0)
80#define MACHINE_HAS_TOPOLOGY (0)
81#define MACHINE_HAS_TE (0)
82#define MACHINE_HAS_TLB_LC (0)
83#define MACHINE_HAS_VX (0)
84#define MACHINE_HAS_CAD (0)
85#else /* CONFIG_64BIT */
86#define MACHINE_HAS_IEEE (1)
87#define MACHINE_HAS_CSP (1)
88#define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE) 63#define MACHINE_HAS_IDTE (S390_lowcore.machine_flags & MACHINE_FLAG_IDTE)
89#define MACHINE_HAS_DIAG44 (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG44) 64#define MACHINE_HAS_DIAG44 (S390_lowcore.machine_flags & MACHINE_FLAG_DIAG44)
90#define MACHINE_HAS_MVPG (1)
91#define MACHINE_HAS_EDAT1 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT1) 65#define MACHINE_HAS_EDAT1 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT1)
92#define MACHINE_HAS_EDAT2 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT2) 66#define MACHINE_HAS_EDAT2 (S390_lowcore.machine_flags & MACHINE_FLAG_EDAT2)
93#define MACHINE_HAS_LPP (S390_lowcore.machine_flags & MACHINE_FLAG_LPP) 67#define MACHINE_HAS_LPP (S390_lowcore.machine_flags & MACHINE_FLAG_LPP)
@@ -96,7 +70,6 @@ extern void detect_memory_memblock(void);
96#define MACHINE_HAS_TLB_LC (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_LC) 70#define MACHINE_HAS_TLB_LC (S390_lowcore.machine_flags & MACHINE_FLAG_TLB_LC)
97#define MACHINE_HAS_VX (S390_lowcore.machine_flags & MACHINE_FLAG_VX) 71#define MACHINE_HAS_VX (S390_lowcore.machine_flags & MACHINE_FLAG_VX)
98#define MACHINE_HAS_CAD (S390_lowcore.machine_flags & MACHINE_FLAG_CAD) 72#define MACHINE_HAS_CAD (S390_lowcore.machine_flags & MACHINE_FLAG_CAD)
99#endif /* CONFIG_64BIT */
100 73
101/* 74/*
102 * Console mode. Override with conmode= 75 * Console mode. Override with conmode=
@@ -135,19 +108,11 @@ extern void (*_machine_power_off)(void);
135 108
136#else /* __ASSEMBLY__ */ 109#else /* __ASSEMBLY__ */
137 110
138#ifndef CONFIG_64BIT
139#define IPL_DEVICE 0x10404
140#define INITRD_START 0x1040C
141#define INITRD_SIZE 0x10414
142#define OLDMEM_BASE 0x1041C
143#define OLDMEM_SIZE 0x10424
144#else /* CONFIG_64BIT */
145#define IPL_DEVICE 0x10400 111#define IPL_DEVICE 0x10400
146#define INITRD_START 0x10408 112#define INITRD_START 0x10408
147#define INITRD_SIZE 0x10410 113#define INITRD_SIZE 0x10410
148#define OLDMEM_BASE 0x10418 114#define OLDMEM_BASE 0x10418
149#define OLDMEM_SIZE 0x10420 115#define OLDMEM_SIZE 0x10420
150#endif /* CONFIG_64BIT */
151#define COMMAND_LINE 0x10480 116#define COMMAND_LINE 0x10480
152 117
153#endif /* __ASSEMBLY__ */ 118#endif /* __ASSEMBLY__ */
diff --git a/arch/s390/include/asm/sfp-util.h b/arch/s390/include/asm/sfp-util.h
index 5959bfb3b693..c8b7cf9d6279 100644
--- a/arch/s390/include/asm/sfp-util.h
+++ b/arch/s390/include/asm/sfp-util.h
@@ -51,7 +51,6 @@
51 wl = __wl; \ 51 wl = __wl; \
52}) 52})
53 53
54#ifdef CONFIG_64BIT
55#define udiv_qrnnd(q, r, n1, n0, d) \ 54#define udiv_qrnnd(q, r, n1, n0, d) \
56 do { unsigned long __n; \ 55 do { unsigned long __n; \
57 unsigned int __r, __d; \ 56 unsigned int __r, __d; \
@@ -60,15 +59,6 @@
60 (q) = __n / __d; \ 59 (q) = __n / __d; \
61 (r) = __n % __d; \ 60 (r) = __n % __d; \
62 } while (0) 61 } while (0)
63#else
64#define udiv_qrnnd(q, r, n1, n0, d) \
65 do { unsigned int __r; \
66 (q) = __udiv_qrnnd (&__r, (n1), (n0), (d)); \
67 (r) = __r; \
68 } while (0)
69extern unsigned long __udiv_qrnnd (unsigned int *, unsigned int,
70 unsigned int , unsigned int);
71#endif
72 62
73#define UDIV_NEEDS_NORMALIZATION 0 63#define UDIV_NEEDS_NORMALIZATION 0
74 64
diff --git a/arch/s390/include/asm/sparsemem.h b/arch/s390/include/asm/sparsemem.h
index a60d085ddb4d..487428b6d099 100644
--- a/arch/s390/include/asm/sparsemem.h
+++ b/arch/s390/include/asm/sparsemem.h
@@ -1,16 +1,7 @@
1#ifndef _ASM_S390_SPARSEMEM_H 1#ifndef _ASM_S390_SPARSEMEM_H
2#define _ASM_S390_SPARSEMEM_H 2#define _ASM_S390_SPARSEMEM_H
3 3
4#ifdef CONFIG_64BIT
5
6#define SECTION_SIZE_BITS 28 4#define SECTION_SIZE_BITS 28
7#define MAX_PHYSMEM_BITS 46 5#define MAX_PHYSMEM_BITS 46
8 6
9#else
10
11#define SECTION_SIZE_BITS 25
12#define MAX_PHYSMEM_BITS 31
13
14#endif /* CONFIG_64BIT */
15
16#endif /* _ASM_S390_SPARSEMEM_H */ 7#endif /* _ASM_S390_SPARSEMEM_H */
diff --git a/arch/s390/include/asm/switch_to.h b/arch/s390/include/asm/switch_to.h
index 2542a7e4c8b4..d62e7a69605f 100644
--- a/arch/s390/include/asm/switch_to.h
+++ b/arch/s390/include/asm/switch_to.h
@@ -18,9 +18,6 @@ static inline int test_fp_ctl(u32 fpc)
18 u32 orig_fpc; 18 u32 orig_fpc;
19 int rc; 19 int rc;
20 20
21 if (!MACHINE_HAS_IEEE)
22 return 0;
23
24 asm volatile( 21 asm volatile(
25 " efpc %1\n" 22 " efpc %1\n"
26 " sfpc %2\n" 23 " sfpc %2\n"
@@ -35,9 +32,6 @@ static inline int test_fp_ctl(u32 fpc)
35 32
36static inline void save_fp_ctl(u32 *fpc) 33static inline void save_fp_ctl(u32 *fpc)
37{ 34{
38 if (!MACHINE_HAS_IEEE)
39 return;
40
41 asm volatile( 35 asm volatile(
42 " stfpc %0\n" 36 " stfpc %0\n"
43 : "+Q" (*fpc)); 37 : "+Q" (*fpc));
@@ -47,9 +41,6 @@ static inline int restore_fp_ctl(u32 *fpc)
47{ 41{
48 int rc; 42 int rc;
49 43
50 if (!MACHINE_HAS_IEEE)
51 return 0;
52
53 asm volatile( 44 asm volatile(
54 " lfpc %1\n" 45 " lfpc %1\n"
55 "0: la %0,0\n" 46 "0: la %0,0\n"
@@ -65,8 +56,6 @@ static inline void save_fp_regs(freg_t *fprs)
65 asm volatile("std 2,%0" : "=Q" (fprs[2])); 56 asm volatile("std 2,%0" : "=Q" (fprs[2]));
66 asm volatile("std 4,%0" : "=Q" (fprs[4])); 57 asm volatile("std 4,%0" : "=Q" (fprs[4]));
67 asm volatile("std 6,%0" : "=Q" (fprs[6])); 58 asm volatile("std 6,%0" : "=Q" (fprs[6]));
68 if (!MACHINE_HAS_IEEE)
69 return;
70 asm volatile("std 1,%0" : "=Q" (fprs[1])); 59 asm volatile("std 1,%0" : "=Q" (fprs[1]));
71 asm volatile("std 3,%0" : "=Q" (fprs[3])); 60 asm volatile("std 3,%0" : "=Q" (fprs[3]));
72 asm volatile("std 5,%0" : "=Q" (fprs[5])); 61 asm volatile("std 5,%0" : "=Q" (fprs[5]));
@@ -87,8 +76,6 @@ static inline void restore_fp_regs(freg_t *fprs)
87 asm volatile("ld 2,%0" : : "Q" (fprs[2])); 76 asm volatile("ld 2,%0" : : "Q" (fprs[2]));
88 asm volatile("ld 4,%0" : : "Q" (fprs[4])); 77 asm volatile("ld 4,%0" : : "Q" (fprs[4]));
89 asm volatile("ld 6,%0" : : "Q" (fprs[6])); 78 asm volatile("ld 6,%0" : : "Q" (fprs[6]));
90 if (!MACHINE_HAS_IEEE)
91 return;
92 asm volatile("ld 1,%0" : : "Q" (fprs[1])); 79 asm volatile("ld 1,%0" : : "Q" (fprs[1]));
93 asm volatile("ld 3,%0" : : "Q" (fprs[3])); 80 asm volatile("ld 3,%0" : : "Q" (fprs[3]));
94 asm volatile("ld 5,%0" : : "Q" (fprs[5])); 81 asm volatile("ld 5,%0" : : "Q" (fprs[5]));
@@ -140,22 +127,18 @@ static inline void restore_vx_regs(__vector128 *vxrs)
140 127
141static inline void save_fp_vx_regs(struct task_struct *task) 128static inline void save_fp_vx_regs(struct task_struct *task)
142{ 129{
143#ifdef CONFIG_64BIT
144 if (task->thread.vxrs) 130 if (task->thread.vxrs)
145 save_vx_regs(task->thread.vxrs); 131 save_vx_regs(task->thread.vxrs);
146 else 132 else
147#endif 133 save_fp_regs(task->thread.fp_regs.fprs);
148 save_fp_regs(task->thread.fp_regs.fprs);
149} 134}
150 135
151static inline void restore_fp_vx_regs(struct task_struct *task) 136static inline void restore_fp_vx_regs(struct task_struct *task)
152{ 137{
153#ifdef CONFIG_64BIT
154 if (task->thread.vxrs) 138 if (task->thread.vxrs)
155 restore_vx_regs(task->thread.vxrs); 139 restore_vx_regs(task->thread.vxrs);
156 else 140 else
157#endif 141 restore_fp_regs(task->thread.fp_regs.fprs);
158 restore_fp_regs(task->thread.fp_regs.fprs);
159} 142}
160 143
161static inline void save_access_regs(unsigned int *acrs) 144static inline void save_access_regs(unsigned int *acrs)
diff --git a/arch/s390/include/asm/thread_info.h b/arch/s390/include/asm/thread_info.h
index ef1df718642d..3df4aa13291d 100644
--- a/arch/s390/include/asm/thread_info.h
+++ b/arch/s390/include/asm/thread_info.h
@@ -10,13 +10,8 @@
10/* 10/*
11 * Size of kernel stack for each process 11 * Size of kernel stack for each process
12 */ 12 */
13#ifndef CONFIG_64BIT
14#define THREAD_ORDER 1
15#define ASYNC_ORDER 1
16#else /* CONFIG_64BIT */
17#define THREAD_ORDER 2 13#define THREAD_ORDER 2
18#define ASYNC_ORDER 2 14#define ASYNC_ORDER 2
19#endif /* CONFIG_64BIT */
20 15
21#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER) 16#define THREAD_SIZE (PAGE_SIZE << THREAD_ORDER)
22#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER) 17#define ASYNC_SIZE (PAGE_SIZE << ASYNC_ORDER)
@@ -99,10 +94,6 @@ static inline struct thread_info *current_thread_info(void)
99#define _TIF_31BIT (1<<TIF_31BIT) 94#define _TIF_31BIT (1<<TIF_31BIT)
100#define _TIF_SINGLE_STEP (1<<TIF_SINGLE_STEP) 95#define _TIF_SINGLE_STEP (1<<TIF_SINGLE_STEP)
101 96
102#ifdef CONFIG_64BIT
103#define is_32bit_task() (test_thread_flag(TIF_31BIT)) 97#define is_32bit_task() (test_thread_flag(TIF_31BIT))
104#else
105#define is_32bit_task() (1)
106#endif
107 98
108#endif /* _ASM_THREAD_INFO_H */ 99#endif /* _ASM_THREAD_INFO_H */
diff --git a/arch/s390/include/asm/tlb.h b/arch/s390/include/asm/tlb.h
index 06d8741ad6f4..7a92e69c50bc 100644
--- a/arch/s390/include/asm/tlb.h
+++ b/arch/s390/include/asm/tlb.h
@@ -118,12 +118,10 @@ static inline void pte_free_tlb(struct mmu_gather *tlb, pgtable_t pte,
118static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd, 118static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
119 unsigned long address) 119 unsigned long address)
120{ 120{
121#ifdef CONFIG_64BIT
122 if (tlb->mm->context.asce_limit <= (1UL << 31)) 121 if (tlb->mm->context.asce_limit <= (1UL << 31))
123 return; 122 return;
124 pgtable_pmd_page_dtor(virt_to_page(pmd)); 123 pgtable_pmd_page_dtor(virt_to_page(pmd));
125 tlb_remove_table(tlb, pmd); 124 tlb_remove_table(tlb, pmd);
126#endif
127} 125}
128 126
129/* 127/*
@@ -136,11 +134,9 @@ static inline void pmd_free_tlb(struct mmu_gather *tlb, pmd_t *pmd,
136static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud, 134static inline void pud_free_tlb(struct mmu_gather *tlb, pud_t *pud,
137 unsigned long address) 135 unsigned long address)
138{ 136{
139#ifdef CONFIG_64BIT
140 if (tlb->mm->context.asce_limit <= (1UL << 42)) 137 if (tlb->mm->context.asce_limit <= (1UL << 42))
141 return; 138 return;
142 tlb_remove_table(tlb, pud); 139 tlb_remove_table(tlb, pud);
143#endif
144} 140}
145 141
146#define tlb_start_vma(tlb, vma) do { } while (0) 142#define tlb_start_vma(tlb, vma) do { } while (0)
diff --git a/arch/s390/include/asm/tlbflush.h b/arch/s390/include/asm/tlbflush.h
index 16c9c88658c8..ca148f7c3eaa 100644
--- a/arch/s390/include/asm/tlbflush.h
+++ b/arch/s390/include/asm/tlbflush.h
@@ -49,13 +49,6 @@ static inline void __tlb_flush_global(void)
49 register unsigned long reg4 asm("4"); 49 register unsigned long reg4 asm("4");
50 long dummy; 50 long dummy;
51 51
52#ifndef CONFIG_64BIT
53 if (!MACHINE_HAS_CSP) {
54 smp_ptlb_all();
55 return;
56 }
57#endif /* CONFIG_64BIT */
58
59 dummy = 0; 52 dummy = 0;
60 reg2 = reg3 = 0; 53 reg2 = reg3 = 0;
61 reg4 = ((unsigned long) &dummy) + 1; 54 reg4 = ((unsigned long) &dummy) + 1;
diff --git a/arch/s390/include/asm/types.h b/arch/s390/include/asm/types.h
index dccef3ca91fa..6740f4f9781f 100644
--- a/arch/s390/include/asm/types.h
+++ b/arch/s390/include/asm/types.h
@@ -8,21 +8,4 @@
8 8
9#include <uapi/asm/types.h> 9#include <uapi/asm/types.h>
10 10
11/*
12 * These aren't exported outside the kernel to avoid name space clashes
13 */
14
15#ifndef __ASSEMBLY__
16
17#ifndef CONFIG_64BIT
18typedef union {
19 unsigned long long pair;
20 struct {
21 unsigned long even;
22 unsigned long odd;
23 } subreg;
24} register_pair;
25
26#endif /* ! CONFIG_64BIT */
27#endif /* __ASSEMBLY__ */
28#endif /* _S390_TYPES_H */ 11#endif /* _S390_TYPES_H */
diff --git a/arch/s390/include/asm/unistd.h b/arch/s390/include/asm/unistd.h
index 651886353551..91f56b1d8156 100644
--- a/arch/s390/include/asm/unistd.h
+++ b/arch/s390/include/asm/unistd.h
@@ -9,11 +9,7 @@
9#include <uapi/asm/unistd.h> 9#include <uapi/asm/unistd.h>
10 10
11 11
12#ifndef CONFIG_64BIT
13#define __IGNORE_select
14#else
15#define __IGNORE_time 12#define __IGNORE_time
16#endif
17 13
18/* Ignore NUMA system calls. Not wired up on s390. */ 14/* Ignore NUMA system calls. Not wired up on s390. */
19#define __IGNORE_mbind 15#define __IGNORE_mbind
@@ -43,10 +39,6 @@
43#define __ARCH_WANT_SYS_OLDUMOUNT 39#define __ARCH_WANT_SYS_OLDUMOUNT
44#define __ARCH_WANT_SYS_SIGPENDING 40#define __ARCH_WANT_SYS_SIGPENDING
45#define __ARCH_WANT_SYS_SIGPROCMASK 41#define __ARCH_WANT_SYS_SIGPROCMASK
46# ifndef CONFIG_64BIT
47# define __ARCH_WANT_STAT64
48# define __ARCH_WANT_SYS_TIME
49# endif
50# ifdef CONFIG_COMPAT 42# ifdef CONFIG_COMPAT
51# define __ARCH_WANT_COMPAT_SYS_TIME 43# define __ARCH_WANT_COMPAT_SYS_TIME
52# endif 44# endif
diff --git a/arch/s390/include/asm/vdso.h b/arch/s390/include/asm/vdso.h
index a62526d09201..787acd4f9668 100644
--- a/arch/s390/include/asm/vdso.h
+++ b/arch/s390/include/asm/vdso.h
@@ -42,10 +42,8 @@ struct vdso_per_cpu_data {
42 42
43extern struct vdso_data *vdso_data; 43extern struct vdso_data *vdso_data;
44 44
45#ifdef CONFIG_64BIT
46int vdso_alloc_per_cpu(struct _lowcore *lowcore); 45int vdso_alloc_per_cpu(struct _lowcore *lowcore);
47void vdso_free_per_cpu(struct _lowcore *lowcore); 46void vdso_free_per_cpu(struct _lowcore *lowcore);
48#endif
49 47
50#endif /* __ASSEMBLY__ */ 48#endif /* __ASSEMBLY__ */
51#endif /* __S390_VDSO_H__ */ 49#endif /* __S390_VDSO_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-25 18:26:12 -0500