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Diffstat (limited to 'arch/s390/include/asm/system.h')
-rw-r--r--arch/s390/include/asm/system.h168
1 files changed, 85 insertions, 83 deletions
diff --git a/arch/s390/include/asm/system.h b/arch/s390/include/asm/system.h
index 379661d2f81a..67ee6c3c6bb3 100644
--- a/arch/s390/include/asm/system.h
+++ b/arch/s390/include/asm/system.h
@@ -24,65 +24,65 @@ extern struct task_struct *__switch_to(void *, void *);
24static inline void save_fp_regs(s390_fp_regs *fpregs) 24static inline void save_fp_regs(s390_fp_regs *fpregs)
25{ 25{
26 asm volatile( 26 asm volatile(
27 " std 0,8(%1)\n" 27 " std 0,%O0+8(%R0)\n"
28 " std 2,24(%1)\n" 28 " std 2,%O0+24(%R0)\n"
29 " std 4,40(%1)\n" 29 " std 4,%O0+40(%R0)\n"
30 " std 6,56(%1)" 30 " std 6,%O0+56(%R0)"
31 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory"); 31 : "=Q" (*fpregs) : "Q" (*fpregs));
32 if (!MACHINE_HAS_IEEE) 32 if (!MACHINE_HAS_IEEE)
33 return; 33 return;
34 asm volatile( 34 asm volatile(
35 " stfpc 0(%1)\n" 35 " stfpc %0\n"
36 " std 1,16(%1)\n" 36 " std 1,%O0+16(%R0)\n"
37 " std 3,32(%1)\n" 37 " std 3,%O0+32(%R0)\n"
38 " std 5,48(%1)\n" 38 " std 5,%O0+48(%R0)\n"
39 " std 7,64(%1)\n" 39 " std 7,%O0+64(%R0)\n"
40 " std 8,72(%1)\n" 40 " std 8,%O0+72(%R0)\n"
41 " std 9,80(%1)\n" 41 " std 9,%O0+80(%R0)\n"
42 " std 10,88(%1)\n" 42 " std 10,%O0+88(%R0)\n"
43 " std 11,96(%1)\n" 43 " std 11,%O0+96(%R0)\n"
44 " std 12,104(%1)\n" 44 " std 12,%O0+104(%R0)\n"
45 " std 13,112(%1)\n" 45 " std 13,%O0+112(%R0)\n"
46 " std 14,120(%1)\n" 46 " std 14,%O0+120(%R0)\n"
47 " std 15,128(%1)\n" 47 " std 15,%O0+128(%R0)\n"
48 : "=m" (*fpregs) : "a" (fpregs), "m" (*fpregs) : "memory"); 48 : "=Q" (*fpregs) : "Q" (*fpregs));
49} 49}
50 50
51static inline void restore_fp_regs(s390_fp_regs *fpregs) 51static inline void restore_fp_regs(s390_fp_regs *fpregs)
52{ 52{
53 asm volatile( 53 asm volatile(
54 " ld 0,8(%0)\n" 54 " ld 0,%O0+8(%R0)\n"
55 " ld 2,24(%0)\n" 55 " ld 2,%O0+24(%R0)\n"
56 " ld 4,40(%0)\n" 56 " ld 4,%O0+40(%R0)\n"
57 " ld 6,56(%0)" 57 " ld 6,%O0+56(%R0)"
58 : : "a" (fpregs), "m" (*fpregs)); 58 : : "Q" (*fpregs));
59 if (!MACHINE_HAS_IEEE) 59 if (!MACHINE_HAS_IEEE)
60 return; 60 return;
61 asm volatile( 61 asm volatile(
62 " lfpc 0(%0)\n" 62 " lfpc %0\n"
63 " ld 1,16(%0)\n" 63 " ld 1,%O0+16(%R0)\n"
64 " ld 3,32(%0)\n" 64 " ld 3,%O0+32(%R0)\n"
65 " ld 5,48(%0)\n" 65 " ld 5,%O0+48(%R0)\n"
66 " ld 7,64(%0)\n" 66 " ld 7,%O0+64(%R0)\n"
67 " ld 8,72(%0)\n" 67 " ld 8,%O0+72(%R0)\n"
68 " ld 9,80(%0)\n" 68 " ld 9,%O0+80(%R0)\n"
69 " ld 10,88(%0)\n" 69 " ld 10,%O0+88(%R0)\n"
70 " ld 11,96(%0)\n" 70 " ld 11,%O0+96(%R0)\n"
71 " ld 12,104(%0)\n" 71 " ld 12,%O0+104(%R0)\n"
72 " ld 13,112(%0)\n" 72 " ld 13,%O0+112(%R0)\n"
73 " ld 14,120(%0)\n" 73 " ld 14,%O0+120(%R0)\n"
74 " ld 15,128(%0)\n" 74 " ld 15,%O0+128(%R0)\n"
75 : : "a" (fpregs), "m" (*fpregs)); 75 : : "Q" (*fpregs));
76} 76}
77 77
78static inline void save_access_regs(unsigned int *acrs) 78static inline void save_access_regs(unsigned int *acrs)
79{ 79{
80 asm volatile("stam 0,15,0(%0)" : : "a" (acrs) : "memory"); 80 asm volatile("stam 0,15,%0" : "=Q" (*acrs));
81} 81}
82 82
83static inline void restore_access_regs(unsigned int *acrs) 83static inline void restore_access_regs(unsigned int *acrs)
84{ 84{
85 asm volatile("lam 0,15,0(%0)" : : "a" (acrs)); 85 asm volatile("lam 0,15,%0" : : "Q" (*acrs));
86} 86}
87 87
88#define switch_to(prev,next,last) do { \ 88#define switch_to(prev,next,last) do { \
@@ -139,48 +139,48 @@ static inline unsigned long __xchg(unsigned long x, void * ptr, int size)
139 shift = (3 ^ (addr & 3)) << 3; 139 shift = (3 ^ (addr & 3)) << 3;
140 addr ^= addr & 3; 140 addr ^= addr & 3;
141 asm volatile( 141 asm volatile(
142 " l %0,0(%4)\n" 142 " l %0,%4\n"
143 "0: lr 0,%0\n" 143 "0: lr 0,%0\n"
144 " nr 0,%3\n" 144 " nr 0,%3\n"
145 " or 0,%2\n" 145 " or 0,%2\n"
146 " cs %0,0,0(%4)\n" 146 " cs %0,0,%4\n"
147 " jl 0b\n" 147 " jl 0b\n"
148 : "=&d" (old), "=m" (*(int *) addr) 148 : "=&d" (old), "=Q" (*(int *) addr)
149 : "d" (x << shift), "d" (~(255 << shift)), "a" (addr), 149 : "d" (x << shift), "d" (~(255 << shift)),
150 "m" (*(int *) addr) : "memory", "cc", "0"); 150 "Q" (*(int *) addr) : "memory", "cc", "0");
151 return old >> shift; 151 return old >> shift;
152 case 2: 152 case 2:
153 addr = (unsigned long) ptr; 153 addr = (unsigned long) ptr;
154 shift = (2 ^ (addr & 2)) << 3; 154 shift = (2 ^ (addr & 2)) << 3;
155 addr ^= addr & 2; 155 addr ^= addr & 2;
156 asm volatile( 156 asm volatile(
157 " l %0,0(%4)\n" 157 " l %0,%4\n"
158 "0: lr 0,%0\n" 158 "0: lr 0,%0\n"
159 " nr 0,%3\n" 159 " nr 0,%3\n"
160 " or 0,%2\n" 160 " or 0,%2\n"
161 " cs %0,0,0(%4)\n" 161 " cs %0,0,%4\n"
162 " jl 0b\n" 162 " jl 0b\n"
163 : "=&d" (old), "=m" (*(int *) addr) 163 : "=&d" (old), "=Q" (*(int *) addr)
164 : "d" (x << shift), "d" (~(65535 << shift)), "a" (addr), 164 : "d" (x << shift), "d" (~(65535 << shift)),
165 "m" (*(int *) addr) : "memory", "cc", "0"); 165 "Q" (*(int *) addr) : "memory", "cc", "0");
166 return old >> shift; 166 return old >> shift;
167 case 4: 167 case 4:
168 asm volatile( 168 asm volatile(
169 " l %0,0(%3)\n" 169 " l %0,%3\n"
170 "0: cs %0,%2,0(%3)\n" 170 "0: cs %0,%2,%3\n"
171 " jl 0b\n" 171 " jl 0b\n"
172 : "=&d" (old), "=m" (*(int *) ptr) 172 : "=&d" (old), "=Q" (*(int *) ptr)
173 : "d" (x), "a" (ptr), "m" (*(int *) ptr) 173 : "d" (x), "Q" (*(int *) ptr)
174 : "memory", "cc"); 174 : "memory", "cc");
175 return old; 175 return old;
176#ifdef __s390x__ 176#ifdef __s390x__
177 case 8: 177 case 8:
178 asm volatile( 178 asm volatile(
179 " lg %0,0(%3)\n" 179 " lg %0,%3\n"
180 "0: csg %0,%2,0(%3)\n" 180 "0: csg %0,%2,%3\n"
181 " jl 0b\n" 181 " jl 0b\n"
182 : "=&d" (old), "=m" (*(long *) ptr) 182 : "=&d" (old), "=m" (*(long *) ptr)
183 : "d" (x), "a" (ptr), "m" (*(long *) ptr) 183 : "d" (x), "Q" (*(long *) ptr)
184 : "memory", "cc"); 184 : "memory", "cc");
185 return old; 185 return old;
186#endif /* __s390x__ */ 186#endif /* __s390x__ */
@@ -215,20 +215,20 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
215 shift = (3 ^ (addr & 3)) << 3; 215 shift = (3 ^ (addr & 3)) << 3;
216 addr ^= addr & 3; 216 addr ^= addr & 3;
217 asm volatile( 217 asm volatile(
218 " l %0,0(%4)\n" 218 " l %0,%2\n"
219 "0: nr %0,%5\n" 219 "0: nr %0,%5\n"
220 " lr %1,%0\n" 220 " lr %1,%0\n"
221 " or %0,%2\n" 221 " or %0,%2\n"
222 " or %1,%3\n" 222 " or %1,%3\n"
223 " cs %0,%1,0(%4)\n" 223 " cs %0,%1,%2\n"
224 " jnl 1f\n" 224 " jnl 1f\n"
225 " xr %1,%0\n" 225 " xr %1,%0\n"
226 " nr %1,%5\n" 226 " nr %1,%5\n"
227 " jnz 0b\n" 227 " jnz 0b\n"
228 "1:" 228 "1:"
229 : "=&d" (prev), "=&d" (tmp) 229 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
230 : "d" (old << shift), "d" (new << shift), "a" (ptr), 230 : "d" (old << shift), "d" (new << shift),
231 "d" (~(255 << shift)) 231 "d" (~(255 << shift)), "Q" (*(int *) ptr)
232 : "memory", "cc"); 232 : "memory", "cc");
233 return prev >> shift; 233 return prev >> shift;
234 case 2: 234 case 2:
@@ -236,33 +236,35 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
236 shift = (2 ^ (addr & 2)) << 3; 236 shift = (2 ^ (addr & 2)) << 3;
237 addr ^= addr & 2; 237 addr ^= addr & 2;
238 asm volatile( 238 asm volatile(
239 " l %0,0(%4)\n" 239 " l %0,%2\n"
240 "0: nr %0,%5\n" 240 "0: nr %0,%5\n"
241 " lr %1,%0\n" 241 " lr %1,%0\n"
242 " or %0,%2\n" 242 " or %0,%2\n"
243 " or %1,%3\n" 243 " or %1,%3\n"
244 " cs %0,%1,0(%4)\n" 244 " cs %0,%1,%2\n"
245 " jnl 1f\n" 245 " jnl 1f\n"
246 " xr %1,%0\n" 246 " xr %1,%0\n"
247 " nr %1,%5\n" 247 " nr %1,%5\n"
248 " jnz 0b\n" 248 " jnz 0b\n"
249 "1:" 249 "1:"
250 : "=&d" (prev), "=&d" (tmp) 250 : "=&d" (prev), "=&d" (tmp), "=Q" (*(int *) ptr)
251 : "d" (old << shift), "d" (new << shift), "a" (ptr), 251 : "d" (old << shift), "d" (new << shift),
252 "d" (~(65535 << shift)) 252 "d" (~(65535 << shift)), "Q" (*(int *) ptr)
253 : "memory", "cc"); 253 : "memory", "cc");
254 return prev >> shift; 254 return prev >> shift;
255 case 4: 255 case 4:
256 asm volatile( 256 asm volatile(
257 " cs %0,%2,0(%3)\n" 257 " cs %0,%3,%1\n"
258 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) 258 : "=&d" (prev), "=Q" (*(int *) ptr)
259 : "0" (old), "d" (new), "Q" (*(int *) ptr)
259 : "memory", "cc"); 260 : "memory", "cc");
260 return prev; 261 return prev;
261#ifdef __s390x__ 262#ifdef __s390x__
262 case 8: 263 case 8:
263 asm volatile( 264 asm volatile(
264 " csg %0,%2,0(%3)\n" 265 " csg %0,%3,%1\n"
265 : "=&d" (prev) : "0" (old), "d" (new), "a" (ptr) 266 : "=&d" (prev), "=Q" (*(long *) ptr)
267 : "0" (old), "d" (new), "Q" (*(long *) ptr)
266 : "memory", "cc"); 268 : "memory", "cc");
267 return prev; 269 return prev;
268#endif /* __s390x__ */ 270#endif /* __s390x__ */
@@ -302,17 +304,17 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
302#define __ctl_load(array, low, high) ({ \ 304#define __ctl_load(array, low, high) ({ \
303 typedef struct { char _[sizeof(array)]; } addrtype; \ 305 typedef struct { char _[sizeof(array)]; } addrtype; \
304 asm volatile( \ 306 asm volatile( \
305 " lctlg %1,%2,0(%0)\n" \ 307 " lctlg %1,%2,%0\n" \
306 : : "a" (&array), "i" (low), "i" (high), \ 308 : : "Q" (*(addrtype *)(&array)), \
307 "m" (*(addrtype *)(&array))); \ 309 "i" (low), "i" (high)); \
308 }) 310 })
309 311
310#define __ctl_store(array, low, high) ({ \ 312#define __ctl_store(array, low, high) ({ \
311 typedef struct { char _[sizeof(array)]; } addrtype; \ 313 typedef struct { char _[sizeof(array)]; } addrtype; \
312 asm volatile( \ 314 asm volatile( \
313 " stctg %2,%3,0(%1)\n" \ 315 " stctg %1,%2,%0\n" \
314 : "=m" (*(addrtype *)(&array)) \ 316 : "=Q" (*(addrtype *)(&array)) \
315 : "a" (&array), "i" (low), "i" (high)); \ 317 : "i" (low), "i" (high)); \
316 }) 318 })
317 319
318#else /* __s390x__ */ 320#else /* __s390x__ */
@@ -320,17 +322,17 @@ __cmpxchg(volatile void *ptr, unsigned long old, unsigned long new, int size)
320#define __ctl_load(array, low, high) ({ \ 322#define __ctl_load(array, low, high) ({ \
321 typedef struct { char _[sizeof(array)]; } addrtype; \ 323 typedef struct { char _[sizeof(array)]; } addrtype; \
322 asm volatile( \ 324 asm volatile( \
323 " lctl %1,%2,0(%0)\n" \ 325 " lctl %1,%2,%0\n" \
324 : : "a" (&array), "i" (low), "i" (high), \ 326 : : "Q" (*(addrtype *)(&array)), \
325 "m" (*(addrtype *)(&array))); \ 327 "i" (low), "i" (high)); \
326}) 328})
327 329
328#define __ctl_store(array, low, high) ({ \ 330#define __ctl_store(array, low, high) ({ \
329 typedef struct { char _[sizeof(array)]; } addrtype; \ 331 typedef struct { char _[sizeof(array)]; } addrtype; \
330 asm volatile( \ 332 asm volatile( \
331 " stctl %2,%3,0(%1)\n" \ 333 " stctl %1,%2,%0\n" \
332 : "=m" (*(addrtype *)(&array)) \ 334 : "=Q" (*(addrtype *)(&array)) \
333 : "a" (&array), "i" (low), "i" (high)); \ 335 : "i" (low), "i" (high)); \
334 }) 336 })
335 337
336#endif /* __s390x__ */ 338#endif /* __s390x__ */