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-rw-r--r--arch/ppc/8xx_io/commproc.c20
-rw-r--r--arch/ppc/Kconfig40
-rw-r--r--arch/ppc/Makefile14
-rw-r--r--arch/ppc/boot/of1275/claim.c1
-rw-r--r--arch/ppc/boot/openfirmware/chrpmain.c2
-rw-r--r--arch/ppc/boot/openfirmware/coffmain.c2
-rw-r--r--arch/ppc/kernel/Makefile27
-rw-r--r--arch/ppc/kernel/align.c4
-rw-r--r--arch/ppc/kernel/asm-offsets.c3
-rw-r--r--arch/ppc/kernel/cpu_setup_6xx.S6
-rw-r--r--arch/ppc/kernel/cpu_setup_power4.S6
-rw-r--r--arch/ppc/kernel/cputable.c1041
-rw-r--r--arch/ppc/kernel/entry.S12
-rw-r--r--arch/ppc/kernel/fpu.S133
-rw-r--r--arch/ppc/kernel/head.S100
-rw-r--r--arch/ppc/kernel/head_44x.S32
-rw-r--r--arch/ppc/kernel/head_4xx.S68
-rw-r--r--arch/ppc/kernel/head_8xx.S42
-rw-r--r--arch/ppc/kernel/head_booke.h4
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S47
-rw-r--r--arch/ppc/kernel/idle.c3
-rw-r--r--arch/ppc/kernel/irq.c1
-rw-r--r--arch/ppc/kernel/l2cr.S2
-rw-r--r--arch/ppc/kernel/misc.S235
-rw-r--r--arch/ppc/kernel/pci.c33
-rw-r--r--arch/ppc/kernel/perfmon.c96
-rw-r--r--arch/ppc/kernel/perfmon_fsl_booke.c2
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c34
-rw-r--r--arch/ppc/kernel/process.c142
-rw-r--r--arch/ppc/kernel/ptrace.c507
-rw-r--r--arch/ppc/kernel/setup.c39
-rw-r--r--arch/ppc/kernel/signal.c771
-rw-r--r--arch/ppc/kernel/smp.c22
-rw-r--r--arch/ppc/kernel/syscalls.c268
-rw-r--r--arch/ppc/kernel/time.c9
-rw-r--r--arch/ppc/kernel/traps.c42
-rw-r--r--arch/ppc/kernel/vecemu.c345
-rw-r--r--arch/ppc/kernel/vector.S217
-rw-r--r--arch/ppc/kernel/vmlinux.lds.S26
-rw-r--r--arch/ppc/lib/string.S24
-rw-r--r--arch/ppc/math-emu/sfp-machine.h2
-rw-r--r--arch/ppc/mm/init.c23
-rw-r--r--arch/ppc/oprofile/Kconfig23
-rw-r--r--arch/ppc/oprofile/Makefile14
-rw-r--r--arch/ppc/oprofile/common.c161
-rw-r--r--arch/ppc/oprofile/op_impl.h45
-rw-r--r--arch/ppc/oprofile/op_model_fsl_booke.c184
-rw-r--r--arch/ppc/platforms/4xx/bamboo.c14
-rw-r--r--arch/ppc/platforms/4xx/ebony.c15
-rw-r--r--arch/ppc/platforms/4xx/luan.c13
-rw-r--r--arch/ppc/platforms/4xx/ocotea.c31
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h1
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.c30
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.c25
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.h1
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.c39
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.c22
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.c21
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.h1
-rw-r--r--arch/ppc/platforms/Makefile3
-rw-r--r--arch/ppc/platforms/chestnut.c1
-rw-r--r--arch/ppc/platforms/chrp_nvram.c83
-rw-r--r--arch/ppc/platforms/chrp_pci.c10
-rw-r--r--arch/ppc/platforms/chrp_pegasos_eth.c124
-rw-r--r--arch/ppc/platforms/chrp_setup.c33
-rw-r--r--arch/ppc/platforms/chrp_smp.c3
-rw-r--r--arch/ppc/platforms/chrp_time.c8
-rw-r--r--arch/ppc/platforms/ev64360.c1
-rw-r--r--arch/ppc/platforms/fads.h2
-rw-r--r--arch/ppc/platforms/gemini_setup.c4
-rw-r--r--arch/ppc/platforms/hdpu.c4
-rw-r--r--arch/ppc/platforms/katana.c3
-rw-r--r--arch/ppc/platforms/lite5200.c1
-rw-r--r--arch/ppc/platforms/lopec.c17
-rw-r--r--arch/ppc/platforms/mpc885ads.h2
-rw-r--r--arch/ppc/platforms/mvme5100.c6
-rw-r--r--arch/ppc/platforms/pal4_setup.c1
-rw-r--r--arch/ppc/platforms/pmac_backlight.c16
-rw-r--r--arch/ppc/platforms/pmac_cpufreq.c36
-rw-r--r--arch/ppc/platforms/pmac_feature.c176
-rw-r--r--arch/ppc/platforms/pmac_nvram.c42
-rw-r--r--arch/ppc/platforms/pmac_pci.c28
-rw-r--r--arch/ppc/platforms/pmac_pic.c27
-rw-r--r--arch/ppc/platforms/pmac_setup.c19
-rw-r--r--arch/ppc/platforms/pmac_sleep.S4
-rw-r--r--arch/ppc/platforms/pmac_smp.c11
-rw-r--r--arch/ppc/platforms/pmac_time.c8
-rw-r--r--arch/ppc/platforms/pplus.c17
-rw-r--r--arch/ppc/platforms/prep_pci.c64
-rw-r--r--arch/ppc/platforms/prep_setup.c70
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.c15
-rw-r--r--arch/ppc/platforms/residual.c2
-rw-r--r--arch/ppc/platforms/sandpoint.c21
-rw-r--r--arch/ppc/syslib/Makefile57
-rw-r--r--arch/ppc/syslib/btext.c6
-rw-r--r--arch/ppc/syslib/dcr.S41
-rw-r--r--arch/ppc/syslib/gt64260_pic.c1
-rw-r--r--arch/ppc/syslib/i8259.c208
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c6
-rw-r--r--arch/ppc/syslib/ibm44x_common.c37
-rw-r--r--arch/ppc/syslib/ibm44x_common.h3
-rw-r--r--arch/ppc/syslib/indirect_pci.c134
-rw-r--r--arch/ppc/syslib/m8260_setup.c4
-rw-r--r--arch/ppc/syslib/m82xx_pci.c4
-rw-r--r--arch/ppc/syslib/m8xx_setup.c48
-rw-r--r--arch/ppc/syslib/m8xx_wdt.c14
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.c3
-rw-r--r--arch/ppc/syslib/mpc83xx_devices.c1
-rw-r--r--arch/ppc/syslib/mpc85xx_devices.c17
-rw-r--r--arch/ppc/syslib/mpc85xx_sys.c44
-rw-r--r--arch/ppc/syslib/mpc8xx_sys.c4
-rw-r--r--arch/ppc/syslib/mv64360_pic.c1
-rw-r--r--arch/ppc/syslib/mv64x60.c2
-rw-r--r--arch/ppc/syslib/mv64x60_dbg.c1
-rw-r--r--arch/ppc/syslib/of_device.c278
-rw-r--r--arch/ppc/syslib/open_pic.c3
-rw-r--r--arch/ppc/syslib/open_pic2.c1
-rw-r--r--arch/ppc/syslib/ppc403_pic.c1
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c1
-rw-r--r--arch/ppc/syslib/ppc4xx_setup.c2
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c1
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c1
-rw-r--r--arch/ppc/syslib/ppc8xx_pic.c17
-rw-r--r--arch/ppc/syslib/ppc_sys.c3
-rw-r--r--arch/ppc/syslib/pq2_devices.c1
-rw-r--r--arch/ppc/syslib/prep_nvram.c13
-rw-r--r--arch/ppc/syslib/prom.c18
-rw-r--r--arch/ppc/syslib/xilinx_pic.c1
-rw-r--r--arch/ppc/xmon/start.c3
-rw-r--r--arch/ppc/xmon/xmon.c9
130 files changed, 1305 insertions, 5633 deletions
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 11726e2a4ec8..b42789f8eb76 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -73,7 +73,7 @@ cpm_mask_irq(unsigned int irq)
73{ 73{
74 int cpm_vec = irq - CPM_IRQ_OFFSET; 74 int cpm_vec = irq - CPM_IRQ_OFFSET;
75 75
76 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr &= ~(1 << cpm_vec); 76 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) & ~(1 << cpm_vec));
77} 77}
78 78
79static void 79static void
@@ -81,7 +81,7 @@ cpm_unmask_irq(unsigned int irq)
81{ 81{
82 int cpm_vec = irq - CPM_IRQ_OFFSET; 82 int cpm_vec = irq - CPM_IRQ_OFFSET;
83 83
84 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr |= (1 << cpm_vec); 84 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr) | (1 << cpm_vec));
85} 85}
86 86
87static void 87static void
@@ -95,7 +95,7 @@ cpm_eoi(unsigned int irq)
95{ 95{
96 int cpm_vec = irq - CPM_IRQ_OFFSET; 96 int cpm_vec = irq - CPM_IRQ_OFFSET;
97 97
98 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr = (1 << cpm_vec); 98 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cisr, (1 << cpm_vec));
99} 99}
100 100
101struct hw_interrupt_type cpm_pic = { 101struct hw_interrupt_type cpm_pic = {
@@ -133,7 +133,7 @@ m8xx_cpm_reset(void)
133 * manual recommends it. 133 * manual recommends it.
134 * Bit 25, FAM can also be set to use FEC aggressive mode (860T). 134 * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
135 */ 135 */
136 imp->im_siu_conf.sc_sdcr = 1; 136 out_be32(&imp->im_siu_conf.sc_sdcr, 1),
137 137
138 /* Reclaim the DP memory for our use. */ 138 /* Reclaim the DP memory for our use. */
139 m8xx_cpm_dpinit(); 139 m8xx_cpm_dpinit();
@@ -178,10 +178,10 @@ cpm_interrupt_init(void)
178 178
179 /* Initialize the CPM interrupt controller. 179 /* Initialize the CPM interrupt controller.
180 */ 180 */
181 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr = 181 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr,
182 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) | 182 (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
183 ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK; 183 ((CPM_INTERRUPT/2) << 13) | CICR_HP_MASK);
184 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr = 0; 184 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cimr, 0);
185 185
186 /* install the CPM interrupt controller routines for the CPM 186 /* install the CPM interrupt controller routines for the CPM
187 * interrupt vectors 187 * interrupt vectors
@@ -198,7 +198,7 @@ cpm_interrupt_init(void)
198 if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction)) 198 if (setup_irq(CPM_IRQ_OFFSET + CPMVEC_ERROR, &cpm_error_irqaction))
199 panic("Could not allocate CPM error IRQ!"); 199 panic("Could not allocate CPM error IRQ!");
200 200
201 ((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr |= CICR_IEN; 201 out_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr, in_be32(&((immap_t *)IMAP_ADDR)->im_cpic.cpic_cicr) | CICR_IEN);
202} 202}
203 203
204/* 204/*
@@ -212,8 +212,8 @@ cpm_get_irq(struct pt_regs *regs)
212 /* Get the vector by setting the ACK bit and then reading 212 /* Get the vector by setting the ACK bit and then reading
213 * the register. 213 * the register.
214 */ 214 */
215 ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr = 1; 215 out_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr, 1);
216 cpm_vec = ((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr; 216 cpm_vec = in_be16(&((volatile immap_t *)IMAP_ADDR)->im_cpic.cpic_civr);
217 cpm_vec >>= 11; 217 cpm_vec >>= 11;
218 218
219 return cpm_vec; 219 return cpm_vec;
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 776941c75672..114b90fdea24 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -568,6 +568,7 @@ config CHESTNUT
568 568
569config SPRUCE 569config SPRUCE
570 bool "IBM-Spruce" 570 bool "IBM-Spruce"
571 select PPC_INDIRECT_PCI
571 572
572config HDPU 573config HDPU
573 bool "Sky-HDPU" 574 bool "Sky-HDPU"
@@ -588,27 +589,35 @@ config EV64260
588 589
589config LOPEC 590config LOPEC
590 bool "Motorola-LoPEC" 591 bool "Motorola-LoPEC"
592 select PPC_I8259
591 593
592config MVME5100 594config MVME5100
593 bool "Motorola-MVME5100" 595 bool "Motorola-MVME5100"
596 select PPC_INDIRECT_PCI
594 597
595config PPLUS 598config PPLUS
596 bool "Motorola-PowerPlus" 599 bool "Motorola-PowerPlus"
600 select PPC_I8259
601 select PPC_INDIRECT_PCI
597 602
598config PRPMC750 603config PRPMC750
599 bool "Motorola-PrPMC750" 604 bool "Motorola-PrPMC750"
605 select PPC_INDIRECT_PCI
600 606
601config PRPMC800 607config PRPMC800
602 bool "Motorola-PrPMC800" 608 bool "Motorola-PrPMC800"
609 select PPC_INDIRECT_PCI
603 610
604config SANDPOINT 611config SANDPOINT
605 bool "Motorola-Sandpoint" 612 bool "Motorola-Sandpoint"
613 select PPC_I8259
606 help 614 help
607 Select SANDPOINT if configuring for a Motorola Sandpoint X3 615 Select SANDPOINT if configuring for a Motorola Sandpoint X3
608 (any flavor). 616 (any flavor).
609 617
610config RADSTONE_PPC7D 618config RADSTONE_PPC7D
611 bool "Radstone Technology PPC7D board" 619 bool "Radstone Technology PPC7D board"
620 select PPC_I8259
612 621
613config PAL4 622config PAL4
614 bool "SBS-Palomar4" 623 bool "SBS-Palomar4"
@@ -616,6 +625,7 @@ config PAL4
616config GEMINI 625config GEMINI
617 bool "Synergy-Gemini" 626 bool "Synergy-Gemini"
618 depends on BROKEN 627 depends on BROKEN
628 select PPC_INDIRECT_PCI
619 help 629 help
620 Select Gemini if configuring for a Synergy Microsystems' Gemini 630 Select Gemini if configuring for a Synergy Microsystems' Gemini
621 series Single Board Computer. More information is available at: 631 series Single Board Computer. More information is available at:
@@ -747,13 +757,16 @@ config CPM2
747 on it (826x, 827x, 8560). 757 on it (826x, 827x, 8560).
748 758
749config PPC_CHRP 759config PPC_CHRP
750 bool 760 bool " Common Hardware Reference Platform (CHRP) based machines"
751 depends on PPC_MULTIPLATFORM 761 depends on PPC_MULTIPLATFORM
762 select PPC_I8259
763 select PPC_INDIRECT_PCI
752 default y 764 default y
753 765
754config PPC_PMAC 766config PPC_PMAC
755 bool 767 bool " Apple PowerMac based machines"
756 depends on PPC_MULTIPLATFORM 768 depends on PPC_MULTIPLATFORM
769 select PPC_INDIRECT_PCI
757 default y 770 default y
758 771
759config PPC_PMAC64 772config PPC_PMAC64
@@ -762,8 +775,10 @@ config PPC_PMAC64
762 default y 775 default y
763 776
764config PPC_PREP 777config PPC_PREP
765 bool 778 bool " PowerPC Reference Platform (PReP) based machines"
766 depends on PPC_MULTIPLATFORM 779 depends on PPC_MULTIPLATFORM
780 select PPC_I8259
781 select PPC_INDIRECT_PCI
767 default y 782 default y
768 783
769config PPC_OF 784config PPC_OF
@@ -797,6 +812,7 @@ config MV64360 # Really MV64360 & MV64460
797config MV64X60 812config MV64X60
798 bool 813 bool
799 depends on (GT64260 || MV64360) 814 depends on (GT64260 || MV64360)
815 select PPC_INDIRECT_PCI
800 default y 816 default y
801 817
802menu "Set bridge options" 818menu "Set bridge options"
@@ -845,6 +861,7 @@ config EPIC_SERIAL_MODE
845config MPC10X_BRIDGE 861config MPC10X_BRIDGE
846 bool 862 bool
847 depends on POWERPMC250 || LOPEC || SANDPOINT 863 depends on POWERPMC250 || LOPEC || SANDPOINT
864 select PPC_INDIRECT_PCI
848 default y 865 default y
849 866
850config MPC10X_OPENPIC 867config MPC10X_OPENPIC
@@ -870,6 +887,7 @@ config HARRIER_STORE_GATHERING
870config MVME5100_IPMC761_PRESENT 887config MVME5100_IPMC761_PRESENT
871 bool "MVME5100 configured with an IPMC761" 888 bool "MVME5100 configured with an IPMC761"
872 depends on MVME5100 889 depends on MVME5100
890 select PPC_I8259
873 891
874config SPRUCE_BAUD_33M 892config SPRUCE_BAUD_33M
875 bool "Spruce baud clock support" 893 bool "Spruce baud clock support"
@@ -1127,6 +1145,7 @@ menu "Bus options"
1127config ISA 1145config ISA
1128 bool "Support for ISA-bus hardware" 1146 bool "Support for ISA-bus hardware"
1129 depends on PPC_PREP || PPC_CHRP 1147 depends on PPC_PREP || PPC_CHRP
1148 select PPC_I8259
1130 help 1149 help
1131 Find out whether you have ISA slots on your motherboard. ISA is the 1150 Find out whether you have ISA slots on your motherboard. ISA is the
1132 name of a bus system, i.e. the way the CPU talks to the other stuff 1151 name of a bus system, i.e. the way the CPU talks to the other stuff
@@ -1139,6 +1158,17 @@ config GENERIC_ISA_DMA
1139 depends on POWER3 || POWER4 || 6xx && !CPM2 1158 depends on POWER3 || POWER4 || 6xx && !CPM2
1140 default y 1159 default y
1141 1160
1161config PPC_I8259
1162 bool
1163 default y if 85xx
1164 default n
1165
1166config PPC_INDIRECT_PCI
1167 bool
1168 depends on PCI
1169 default y if 40x || 44x || 85xx || 83xx
1170 default n
1171
1142config EISA 1172config EISA
1143 bool 1173 bool
1144 help 1174 help
@@ -1175,6 +1205,7 @@ config MPC83xx_PCI2
1175config PCI_QSPAN 1205config PCI_QSPAN
1176 bool "QSpan PCI" 1206 bool "QSpan PCI"
1177 depends on !4xx && !CPM2 && 8xx 1207 depends on !4xx && !CPM2 && 8xx
1208 select PPC_I8259
1178 help 1209 help
1179 Say Y here if you have a system based on a Motorola 8xx-series 1210 Say Y here if you have a system based on a Motorola 8xx-series
1180 embedded processor with a QSPAN PCI interface, otherwise say N. 1211 embedded processor with a QSPAN PCI interface, otherwise say N.
@@ -1182,6 +1213,7 @@ config PCI_QSPAN
1182config PCI_8260 1213config PCI_8260
1183 bool 1214 bool
1184 depends on PCI && 8260 1215 depends on PCI && 8260
1216 select PPC_INDIRECT_PCI
1185 default y 1217 default y
1186 1218
1187config 8260_PCI9 1219config 8260_PCI9
@@ -1368,7 +1400,7 @@ endmenu
1368 1400
1369source "lib/Kconfig" 1401source "lib/Kconfig"
1370 1402
1371source "arch/ppc/oprofile/Kconfig" 1403source "arch/powerpc/oprofile/Kconfig"
1372 1404
1373source "arch/ppc/Kconfig.debug" 1405source "arch/ppc/Kconfig.debug"
1374 1406
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 16e2675f3270..94d5716fa7c3 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -26,6 +26,10 @@ CPPFLAGS += -Iarch/$(ARCH) -Iarch/$(ARCH)/include
26AFLAGS += -Iarch/$(ARCH) 26AFLAGS += -Iarch/$(ARCH)
27CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \ 27CFLAGS += -Iarch/$(ARCH) -msoft-float -pipe \
28 -ffixed-r2 -mmultiple 28 -ffixed-r2 -mmultiple
29
30# No AltiVec instruction when building kernel
31CFLAGS += $(call cc-option, -mno-altivec)
32
29CPP = $(CC) -E $(CFLAGS) 33CPP = $(CC) -E $(CFLAGS)
30# Temporary hack until we have migrated to asm-powerpc 34# Temporary hack until we have migrated to asm-powerpc
31LINUXINCLUDE += -Iarch/$(ARCH)/include 35LINUXINCLUDE += -Iarch/$(ARCH)/include
@@ -57,10 +61,12 @@ head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o
57 61
58head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o 62head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o
59head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o 63head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o
60head-$(CONFIG_PPC_FPU) += arch/ppc/kernel/fpu.o 64head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
61 65
62core-y += arch/ppc/kernel/ arch/ppc/platforms/ \ 66core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
63 arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/ 67 arch/ppc/platforms/ \
68 arch/ppc/mm/ arch/ppc/lib/ \
69 arch/ppc/syslib/ arch/powerpc/sysdev/
64core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ 70core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
65core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/ 71core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/
66core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/ 72core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/
@@ -71,7 +77,7 @@ drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
71drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/ 77drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/
72drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/ 78drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
73 79
74drivers-$(CONFIG_OPROFILE) += arch/ppc/oprofile/ 80drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
75 81
76BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm 82BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
77 83
diff --git a/arch/ppc/boot/of1275/claim.c b/arch/ppc/boot/of1275/claim.c
index e060292ae2a7..13169a5c4339 100644
--- a/arch/ppc/boot/of1275/claim.c
+++ b/arch/ppc/boot/of1275/claim.c
@@ -29,6 +29,7 @@ claim(unsigned int virt, unsigned int size, unsigned int align)
29 args.virt = virt; 29 args.virt = virt;
30 args.size = size; 30 args.size = size;
31 args.align = align; 31 args.align = align;
32 args.ret = (void *) 0;
32 (*of_prom_entry)(&args); 33 (*of_prom_entry)(&args);
33 return args.ret; 34 return args.ret;
34} 35}
diff --git a/arch/ppc/boot/openfirmware/chrpmain.c b/arch/ppc/boot/openfirmware/chrpmain.c
index effe4a0624b0..245dbd9fc120 100644
--- a/arch/ppc/boot/openfirmware/chrpmain.c
+++ b/arch/ppc/boot/openfirmware/chrpmain.c
@@ -78,7 +78,7 @@ boot(int a1, int a2, void *prom)
78 begin_avail = avail_high = avail_ram; 78 begin_avail = avail_high = avail_ram;
79 end_avail = scratch + sizeof(scratch); 79 end_avail = scratch + sizeof(scratch);
80 printf("gunzipping (0x%p <- 0x%p:0x%p)...", dst, im, im+len); 80 printf("gunzipping (0x%p <- 0x%p:0x%p)...", dst, im, im+len);
81 gunzip(dst, 0x400000, im, &len); 81 gunzip(dst, PROG_SIZE - PROG_START, im, &len);
82 printf("done %u bytes\n\r", len); 82 printf("done %u bytes\n\r", len);
83 printf("%u bytes of heap consumed, max in use %u\n\r", 83 printf("%u bytes of heap consumed, max in use %u\n\r",
84 avail_high - begin_avail, heap_max); 84 avail_high - begin_avail, heap_max);
diff --git a/arch/ppc/boot/openfirmware/coffmain.c b/arch/ppc/boot/openfirmware/coffmain.c
index 04ba9d57e110..2da8855e2be0 100644
--- a/arch/ppc/boot/openfirmware/coffmain.c
+++ b/arch/ppc/boot/openfirmware/coffmain.c
@@ -38,7 +38,7 @@ static char heap[SCRATCH_SIZE];
38static unsigned long ram_start = 0; 38static unsigned long ram_start = 0;
39static unsigned long ram_end = 0x1000000; 39static unsigned long ram_end = 0x1000000;
40 40
41static unsigned long prog_start = 0x900000; 41static unsigned long prog_start = 0x800000;
42static unsigned long prog_size = 0x700000; 42static unsigned long prog_size = 0x700000;
43 43
44typedef void (*kernel_start_t)(int, int, void *); 44typedef void (*kernel_start_t)(int, int, void *);
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b1457a8a9c0f..b35346df1e37 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -1,6 +1,7 @@
1# 1#
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4ifneq ($(CONFIG_PPC_MERGE),y)
4 5
5extra-$(CONFIG_PPC_STD_MMU) := head.o 6extra-$(CONFIG_PPC_STD_MMU) := head.o
6extra-$(CONFIG_40x) := head_4xx.o 7extra-$(CONFIG_40x) := head_4xx.o
@@ -9,13 +10,12 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
9extra-$(CONFIG_8xx) := head_8xx.o 10extra-$(CONFIG_8xx) := head_8xx.o
10extra-$(CONFIG_6xx) += idle_6xx.o 11extra-$(CONFIG_6xx) += idle_6xx.o
11extra-$(CONFIG_POWER4) += idle_power4.o 12extra-$(CONFIG_POWER4) += idle_power4.o
12extra-$(CONFIG_PPC_FPU) += fpu.o
13extra-y += vmlinux.lds 13extra-y += vmlinux.lds
14 14
15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ 15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \
16 process.o signal.o ptrace.o align.o \ 16 process.o align.o \
17 semaphore.o syscalls.o setup.o \ 17 setup.o \
18 cputable.o ppc_htab.o perfmon.o 18 ppc_htab.o
19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
21obj-$(CONFIG_POWER4) += cpu_setup_power4.o 21obj-$(CONFIG_POWER4) += cpu_setup_power4.o
@@ -25,7 +25,6 @@ obj-$(CONFIG_PCI) += pci.o
25obj-$(CONFIG_KGDB) += ppc-stub.o 25obj-$(CONFIG_KGDB) += ppc-stub.o
26obj-$(CONFIG_SMP) += smp.o smp-tbsync.o 26obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
27obj-$(CONFIG_TAU) += temp.o 27obj-$(CONFIG_TAU) += temp.o
28obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
29ifndef CONFIG_E200 28ifndef CONFIG_E200
30obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o 29obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
31endif 30endif
@@ -35,3 +34,21 @@ ifndef CONFIG_MATH_EMULATION
35obj-$(CONFIG_8xx) += softemu8xx.o 34obj-$(CONFIG_8xx) += softemu8xx.o
36endif 35endif
37 36
37# These are here while we do the architecture merge
38
39else
40obj-y := irq.o idle.o \
41 align.o
42obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
43obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
44obj-$(CONFIG_MODULES) += module.o
45obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o
46obj-$(CONFIG_PCI) += pci.o
47obj-$(CONFIG_KGDB) += ppc-stub.o
48obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
49obj-$(CONFIG_TAU) += temp.o
50ifndef CONFIG_E200
51obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
52endif
53obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
54endif
diff --git a/arch/ppc/kernel/align.c b/arch/ppc/kernel/align.c
index ff81da9598d8..ab398c4b70b6 100644
--- a/arch/ppc/kernel/align.c
+++ b/arch/ppc/kernel/align.c
@@ -375,7 +375,7 @@ fix_alignment(struct pt_regs *regs)
375#ifdef CONFIG_PPC_FPU 375#ifdef CONFIG_PPC_FPU
376 preempt_disable(); 376 preempt_disable();
377 enable_kernel_fp(); 377 enable_kernel_fp();
378 cvt_fd(&data.f, &data.d, &current->thread.fpscr); 378 cvt_fd(&data.f, &data.d, &current->thread);
379 preempt_enable(); 379 preempt_enable();
380#else 380#else
381 return 0; 381 return 0;
@@ -385,7 +385,7 @@ fix_alignment(struct pt_regs *regs)
385#ifdef CONFIG_PPC_FPU 385#ifdef CONFIG_PPC_FPU
386 preempt_disable(); 386 preempt_disable();
387 enable_kernel_fp(); 387 enable_kernel_fp();
388 cvt_df(&data.d, &data.f, &current->thread.fpscr); 388 cvt_df(&data.d, &data.f, &current->thread);
389 preempt_enable(); 389 preempt_enable();
390#else 390#else
391 return 0; 391 return 0;
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index d9ad1d776d0e..968261d69572 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -130,10 +130,10 @@ main(void)
130 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features)); 130 DEFINE(CPU_SPEC_FEATURES, offsetof(struct cpu_spec, cpu_features));
131 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup)); 131 DEFINE(CPU_SPEC_SETUP, offsetof(struct cpu_spec, cpu_setup));
132 132
133 DEFINE(TI_SC_NOERR, offsetof(struct thread_info, syscall_noerror));
133 DEFINE(TI_TASK, offsetof(struct thread_info, task)); 134 DEFINE(TI_TASK, offsetof(struct thread_info, task));
134 DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain)); 135 DEFINE(TI_EXECDOMAIN, offsetof(struct thread_info, exec_domain));
135 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags)); 136 DEFINE(TI_FLAGS, offsetof(struct thread_info, flags));
136 DEFINE(TI_LOCAL_FLAGS, offsetof(struct thread_info, local_flags));
137 DEFINE(TI_CPU, offsetof(struct thread_info, cpu)); 137 DEFINE(TI_CPU, offsetof(struct thread_info, cpu));
138 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count)); 138 DEFINE(TI_PREEMPT, offsetof(struct thread_info, preempt_count));
139 139
@@ -141,6 +141,7 @@ main(void)
141 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); 141 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
142 DEFINE(pbe_next, offsetof(struct pbe, next)); 142 DEFINE(pbe_next, offsetof(struct pbe, next));
143 143
144 DEFINE(TASK_SIZE, TASK_SIZE);
144 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); 145 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
145 return 0; 146 return 0;
146} 147}
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index ba396438ede3..55ed7716636f 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -17,8 +17,6 @@
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/cache.h> 18#include <asm/cache.h>
19 19
20_GLOBAL(__setup_cpu_601)
21 blr
22_GLOBAL(__setup_cpu_603) 20_GLOBAL(__setup_cpu_603)
23 b setup_common_caches 21 b setup_common_caches
24_GLOBAL(__setup_cpu_604) 22_GLOBAL(__setup_cpu_604)
@@ -292,10 +290,10 @@ _GLOBAL(__init_fpu_registers)
292#define CS_SIZE 32 290#define CS_SIZE 32
293 291
294 .data 292 .data
295 .balign L1_CACHE_LINE_SIZE 293 .balign L1_CACHE_BYTES
296cpu_state_storage: 294cpu_state_storage:
297 .space CS_SIZE 295 .space CS_SIZE
298 .balign L1_CACHE_LINE_SIZE,0 296 .balign L1_CACHE_BYTES,0
299 .text 297 .text
300 298
301/* Called in normal context to backup CPU 0 state. This 299/* Called in normal context to backup CPU 0 state. This
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S
index 7e4fbb653724..d7bfd60e21fc 100644
--- a/arch/ppc/kernel/cpu_setup_power4.S
+++ b/arch/ppc/kernel/cpu_setup_power4.S
@@ -63,8 +63,6 @@ _GLOBAL(__970_cpu_preinit)
63 isync 63 isync
64 blr 64 blr
65 65
66_GLOBAL(__setup_cpu_power4)
67 blr
68_GLOBAL(__setup_cpu_ppc970) 66_GLOBAL(__setup_cpu_ppc970)
69 mfspr r0,SPRN_HID0 67 mfspr r0,SPRN_HID0
70 li r11,5 /* clear DOZE and SLEEP */ 68 li r11,5 /* clear DOZE and SLEEP */
@@ -88,10 +86,10 @@ _GLOBAL(__setup_cpu_ppc970)
88#define CS_SIZE 32 86#define CS_SIZE 32
89 87
90 .data 88 .data
91 .balign L1_CACHE_LINE_SIZE 89 .balign L1_CACHE_BYTES
92cpu_state_storage: 90cpu_state_storage:
93 .space CS_SIZE 91 .space CS_SIZE
94 .balign L1_CACHE_LINE_SIZE,0 92 .balign L1_CACHE_BYTES,0
95 .text 93 .text
96 94
97/* Called in normal context to backup CPU 0 state. This 95/* Called in normal context to backup CPU 0 state. This
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
deleted file mode 100644
index 6b76cf58d9e0..000000000000
--- a/arch/ppc/kernel/cputable.c
+++ /dev/null
@@ -1,1041 +0,0 @@
1/*
2 * arch/ppc/kernel/cputable.c
3 *
4 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/config.h>
13#include <linux/string.h>
14#include <linux/sched.h>
15#include <linux/threads.h>
16#include <linux/init.h>
17#include <asm/cputable.h>
18
19struct cpu_spec* cur_cpu_spec[NR_CPUS];
20
21extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
22extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
23extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
24extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
25extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
26extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
27extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
28extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
29extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
30extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
31extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
32extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
33extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
34
35#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
36 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
37 !defined(CONFIG_BOOKE))
38
39/* This table only contains "desktop" CPUs, it need to be filled with embedded
40 * ones as well...
41 */
42#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
43 PPC_FEATURE_HAS_MMU)
44
45/* We only set the altivec features if the kernel was compiled with altivec
46 * support
47 */
48#ifdef CONFIG_ALTIVEC
49#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
50#define PPC_FEATURE_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
51#else
52#define CPU_FTR_ALTIVEC_COMP 0
53#define PPC_FEATURE_ALTIVEC_COMP 0
54#endif
55
56/* We only set the spe features if the kernel was compiled with
57 * spe support
58 */
59#ifdef CONFIG_SPE
60#define PPC_FEATURE_SPE_COMP PPC_FEATURE_HAS_SPE
61#else
62#define PPC_FEATURE_SPE_COMP 0
63#endif
64
65/* We need to mark all pages as being coherent if we're SMP or we
66 * have a 74[45]x and an MPC107 host bridge.
67 */
68#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
69#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
70#else
71#define CPU_FTR_COMMON 0
72#endif
73
74/* The powersave features NAP & DOZE seems to confuse BDI when
75 debugging. So if a BDI is used, disable theses
76 */
77#ifndef CONFIG_BDI_SWITCH
78#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE
79#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP
80#else
81#define CPU_FTR_MAYBE_CAN_DOZE 0
82#define CPU_FTR_MAYBE_CAN_NAP 0
83#endif
84
85struct cpu_spec cpu_specs[] = {
86#if CLASSIC_PPC
87 { /* 601 */
88 .pvr_mask = 0xffff0000,
89 .pvr_value = 0x00010000,
90 .cpu_name = "601",
91 .cpu_features = CPU_FTR_COMMON | CPU_FTR_601 |
92 CPU_FTR_HPTE_TABLE,
93 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR |
94 PPC_FEATURE_UNIFIED_CACHE | PPC_FEATURE_NO_TB,
95 .icache_bsize = 32,
96 .dcache_bsize = 32,
97 .cpu_setup = __setup_cpu_601
98 },
99 { /* 603 */
100 .pvr_mask = 0xffff0000,
101 .pvr_value = 0x00030000,
102 .cpu_name = "603",
103 .cpu_features = CPU_FTR_COMMON |
104 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
105 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
106 .cpu_user_features = COMMON_PPC,
107 .icache_bsize = 32,
108 .dcache_bsize = 32,
109 .cpu_setup = __setup_cpu_603
110 },
111 { /* 603e */
112 .pvr_mask = 0xffff0000,
113 .pvr_value = 0x00060000,
114 .cpu_name = "603e",
115 .cpu_features = CPU_FTR_COMMON |
116 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
117 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
118 .cpu_user_features = COMMON_PPC,
119 .icache_bsize = 32,
120 .dcache_bsize = 32,
121 .cpu_setup = __setup_cpu_603
122 },
123 { /* 603ev */
124 .pvr_mask = 0xffff0000,
125 .pvr_value = 0x00070000,
126 .cpu_name = "603ev",
127 .cpu_features = CPU_FTR_COMMON |
128 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
129 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
130 .cpu_user_features = COMMON_PPC,
131 .icache_bsize = 32,
132 .dcache_bsize = 32,
133 .cpu_setup = __setup_cpu_603
134 },
135 { /* 604 */
136 .pvr_mask = 0xffff0000,
137 .pvr_value = 0x00040000,
138 .cpu_name = "604",
139 .cpu_features = CPU_FTR_COMMON |
140 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
141 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
142 .cpu_user_features = COMMON_PPC,
143 .icache_bsize = 32,
144 .dcache_bsize = 32,
145 .num_pmcs = 2,
146 .cpu_setup = __setup_cpu_604
147 },
148 { /* 604e */
149 .pvr_mask = 0xfffff000,
150 .pvr_value = 0x00090000,
151 .cpu_name = "604e",
152 .cpu_features = CPU_FTR_COMMON |
153 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
154 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
155 .cpu_user_features = COMMON_PPC,
156 .icache_bsize = 32,
157 .dcache_bsize = 32,
158 .num_pmcs = 4,
159 .cpu_setup = __setup_cpu_604
160 },
161 { /* 604r */
162 .pvr_mask = 0xffff0000,
163 .pvr_value = 0x00090000,
164 .cpu_name = "604r",
165 .cpu_features = CPU_FTR_COMMON |
166 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
167 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
168 .cpu_user_features = COMMON_PPC,
169 .icache_bsize = 32,
170 .dcache_bsize = 32,
171 .num_pmcs = 4,
172 .cpu_setup = __setup_cpu_604
173 },
174 { /* 604ev */
175 .pvr_mask = 0xffff0000,
176 .pvr_value = 0x000a0000,
177 .cpu_name = "604ev",
178 .cpu_features = CPU_FTR_COMMON |
179 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
180 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
181 .cpu_user_features = COMMON_PPC,
182 .icache_bsize = 32,
183 .dcache_bsize = 32,
184 .num_pmcs = 4,
185 .cpu_setup = __setup_cpu_604
186 },
187 { /* 740/750 (0x4202, don't support TAU ?) */
188 .pvr_mask = 0xffffffff,
189 .pvr_value = 0x00084202,
190 .cpu_name = "740/750",
191 .cpu_features = CPU_FTR_COMMON |
192 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
193 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE |
194 CPU_FTR_MAYBE_CAN_NAP,
195 .cpu_user_features = COMMON_PPC,
196 .icache_bsize = 32,
197 .dcache_bsize = 32,
198 .num_pmcs = 4,
199 .cpu_setup = __setup_cpu_750
200 },
201 { /* 750CX (80100 and 8010x?) */
202 .pvr_mask = 0xfffffff0,
203 .pvr_value = 0x00080100,
204 .cpu_name = "750CX",
205 .cpu_features = CPU_FTR_COMMON |
206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
208 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
209 .cpu_user_features = COMMON_PPC,
210 .icache_bsize = 32,
211 .dcache_bsize = 32,
212 .num_pmcs = 4,
213 .cpu_setup = __setup_cpu_750cx
214 },
215 { /* 750CX (82201 and 82202) */
216 .pvr_mask = 0xfffffff0,
217 .pvr_value = 0x00082200,
218 .cpu_name = "750CX",
219 .cpu_features = CPU_FTR_COMMON |
220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
221 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
222 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
223 .cpu_user_features = COMMON_PPC,
224 .icache_bsize = 32,
225 .dcache_bsize = 32,
226 .num_pmcs = 4,
227 .cpu_setup = __setup_cpu_750cx
228 },
229 { /* 750CXe (82214) */
230 .pvr_mask = 0xfffffff0,
231 .pvr_value = 0x00082210,
232 .cpu_name = "750CXe",
233 .cpu_features = CPU_FTR_COMMON |
234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
236 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
237 .cpu_user_features = COMMON_PPC,
238 .icache_bsize = 32,
239 .dcache_bsize = 32,
240 .num_pmcs = 4,
241 .cpu_setup = __setup_cpu_750cx
242 },
243 { /* 750CXe "Gekko" (83214) */
244 .pvr_mask = 0xffffffff,
245 .pvr_value = 0x00083214,
246 .cpu_name = "750CXe",
247 .cpu_features = CPU_FTR_COMMON |
248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
249 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
250 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
251 .cpu_user_features = COMMON_PPC,
252 .icache_bsize = 32,
253 .dcache_bsize = 32,
254 .num_pmcs = 4,
255 .cpu_setup = __setup_cpu_750cx
256 },
257 { /* 745/755 */
258 .pvr_mask = 0xfffff000,
259 .pvr_value = 0x00083000,
260 .cpu_name = "745/755",
261 .cpu_features = CPU_FTR_COMMON |
262 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
263 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
264 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
265 .cpu_user_features = COMMON_PPC,
266 .icache_bsize = 32,
267 .dcache_bsize = 32,
268 .num_pmcs = 4,
269 .cpu_setup = __setup_cpu_750
270 },
271 { /* 750FX rev 1.x */
272 .pvr_mask = 0xffffff00,
273 .pvr_value = 0x70000100,
274 .cpu_name = "750FX",
275 .cpu_features = CPU_FTR_COMMON |
276 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
277 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
278 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
279 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM,
280 .cpu_user_features = COMMON_PPC,
281 .icache_bsize = 32,
282 .dcache_bsize = 32,
283 .num_pmcs = 4,
284 .cpu_setup = __setup_cpu_750
285 },
286 { /* 750FX rev 2.0 must disable HID0[DPM] */
287 .pvr_mask = 0xffffffff,
288 .pvr_value = 0x70000200,
289 .cpu_name = "750FX",
290 .cpu_features = CPU_FTR_COMMON |
291 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
292 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
293 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
294 CPU_FTR_NO_DPM,
295 .cpu_user_features = COMMON_PPC,
296 .icache_bsize = 32,
297 .dcache_bsize = 32,
298 .num_pmcs = 4,
299 .cpu_setup = __setup_cpu_750
300 },
301 { /* 750FX (All revs except 2.0) */
302 .pvr_mask = 0xffff0000,
303 .pvr_value = 0x70000000,
304 .cpu_name = "750FX",
305 .cpu_features = CPU_FTR_COMMON |
306 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
307 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
308 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
309 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
310 .cpu_user_features = COMMON_PPC,
311 .icache_bsize = 32,
312 .dcache_bsize = 32,
313 .num_pmcs = 4,
314 .cpu_setup = __setup_cpu_750fx
315 },
316 { /* 750GX */
317 .pvr_mask = 0xffff0000,
318 .pvr_value = 0x70020000,
319 .cpu_name = "750GX",
320 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
321 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
322 CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE |
323 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_DUAL_PLL_750FX |
324 CPU_FTR_HAS_HIGH_BATS,
325 .cpu_user_features = COMMON_PPC,
326 .icache_bsize = 32,
327 .dcache_bsize = 32,
328 .num_pmcs = 4,
329 .cpu_setup = __setup_cpu_750fx
330 },
331 { /* 740/750 (L2CR bit need fixup for 740) */
332 .pvr_mask = 0xffff0000,
333 .pvr_value = 0x00080000,
334 .cpu_name = "740/750",
335 .cpu_features = CPU_FTR_COMMON |
336 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
337 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
338 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
339 .cpu_user_features = COMMON_PPC,
340 .icache_bsize = 32,
341 .dcache_bsize = 32,
342 .num_pmcs = 4,
343 .cpu_setup = __setup_cpu_750
344 },
345 { /* 7400 rev 1.1 ? (no TAU) */
346 .pvr_mask = 0xffffffff,
347 .pvr_value = 0x000c1101,
348 .cpu_name = "7400 (1.1)",
349 .cpu_features = CPU_FTR_COMMON |
350 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
351 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
352 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
353 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
354 .icache_bsize = 32,
355 .dcache_bsize = 32,
356 .num_pmcs = 4,
357 .cpu_setup = __setup_cpu_7400
358 },
359 { /* 7400 */
360 .pvr_mask = 0xffff0000,
361 .pvr_value = 0x000c0000,
362 .cpu_name = "7400",
363 .cpu_features = CPU_FTR_COMMON |
364 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
365 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
366 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
367 CPU_FTR_MAYBE_CAN_NAP,
368 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
369 .icache_bsize = 32,
370 .dcache_bsize = 32,
371 .num_pmcs = 4,
372 .cpu_setup = __setup_cpu_7400
373 },
374 { /* 7410 */
375 .pvr_mask = 0xffff0000,
376 .pvr_value = 0x800c0000,
377 .cpu_name = "7410",
378 .cpu_features = CPU_FTR_COMMON |
379 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
380 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
381 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
382 CPU_FTR_MAYBE_CAN_NAP,
383 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
384 .icache_bsize = 32,
385 .dcache_bsize = 32,
386 .num_pmcs = 4,
387 .cpu_setup = __setup_cpu_7410
388 },
389 { /* 7450 2.0 - no doze/nap */
390 .pvr_mask = 0xffffffff,
391 .pvr_value = 0x80000200,
392 .cpu_name = "7450",
393 .cpu_features = CPU_FTR_COMMON |
394 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
395 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
396 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
397 CPU_FTR_NEED_COHERENT,
398 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
399 .icache_bsize = 32,
400 .dcache_bsize = 32,
401 .num_pmcs = 6,
402 .cpu_setup = __setup_cpu_745x
403 },
404 { /* 7450 2.1 */
405 .pvr_mask = 0xffffffff,
406 .pvr_value = 0x80000201,
407 .cpu_name = "7450",
408 .cpu_features = CPU_FTR_COMMON |
409 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
410 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
411 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
412 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
413 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
414 CPU_FTR_NEED_COHERENT,
415 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
416 .icache_bsize = 32,
417 .dcache_bsize = 32,
418 .num_pmcs = 6,
419 .cpu_setup = __setup_cpu_745x
420 },
421 { /* 7450 2.3 and newer */
422 .pvr_mask = 0xffff0000,
423 .pvr_value = 0x80000000,
424 .cpu_name = "7450",
425 .cpu_features = CPU_FTR_COMMON |
426 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
427 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
428 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
429 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
430 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT,
431 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
432 .icache_bsize = 32,
433 .dcache_bsize = 32,
434 .num_pmcs = 6,
435 .cpu_setup = __setup_cpu_745x
436 },
437 { /* 7455 rev 1.x */
438 .pvr_mask = 0xffffff00,
439 .pvr_value = 0x80010100,
440 .cpu_name = "7455",
441 .cpu_features = CPU_FTR_COMMON |
442 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
443 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
444 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
445 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
446 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
447 .icache_bsize = 32,
448 .dcache_bsize = 32,
449 .num_pmcs = 6,
450 .cpu_setup = __setup_cpu_745x
451 },
452 { /* 7455 rev 2.0 */
453 .pvr_mask = 0xffffffff,
454 .pvr_value = 0x80010200,
455 .cpu_name = "7455",
456 .cpu_features = CPU_FTR_COMMON |
457 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
458 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
459 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
460 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
461 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
462 CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
463 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
464 .icache_bsize = 32,
465 .dcache_bsize = 32,
466 .num_pmcs = 6,
467 .cpu_setup = __setup_cpu_745x
468 },
469 { /* 7455 others */
470 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x80010000,
472 .cpu_name = "7455",
473 .cpu_features = CPU_FTR_COMMON |
474 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
475 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
476 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
477 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
478 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
479 CPU_FTR_NEED_COHERENT,
480 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
481 .icache_bsize = 32,
482 .dcache_bsize = 32,
483 .num_pmcs = 6,
484 .cpu_setup = __setup_cpu_745x
485 },
486 { /* 7447/7457 Rev 1.0 */
487 .pvr_mask = 0xffffffff,
488 .pvr_value = 0x80020100,
489 .cpu_name = "7447/7457",
490 .cpu_features = CPU_FTR_COMMON |
491 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
492 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
493 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
494 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
495 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
496 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
497 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
498 .icache_bsize = 32,
499 .dcache_bsize = 32,
500 .num_pmcs = 6,
501 .cpu_setup = __setup_cpu_745x
502 },
503 { /* 7447/7457 Rev 1.1 */
504 .pvr_mask = 0xffffffff,
505 .pvr_value = 0x80020101,
506 .cpu_name = "7447/7457",
507 .cpu_features = CPU_FTR_COMMON |
508 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
509 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
510 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
511 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
512 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
513 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
514 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
515 .icache_bsize = 32,
516 .dcache_bsize = 32,
517 .num_pmcs = 6,
518 .cpu_setup = __setup_cpu_745x
519 },
520 { /* 7447/7457 Rev 1.2 and later */
521 .pvr_mask = 0xffff0000,
522 .pvr_value = 0x80020000,
523 .cpu_name = "7447/7457",
524 .cpu_features = CPU_FTR_COMMON |
525 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
526 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
527 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
528 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
529 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
530 CPU_FTR_NEED_COHERENT,
531 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
532 .icache_bsize = 32,
533 .dcache_bsize = 32,
534 .num_pmcs = 6,
535 .cpu_setup = __setup_cpu_745x
536 },
537 { /* 7447A */
538 .pvr_mask = 0xffff0000,
539 .pvr_value = 0x80030000,
540 .cpu_name = "7447A",
541 .cpu_features = CPU_FTR_COMMON |
542 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
543 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
544 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
545 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
546 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
547 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
548 .icache_bsize = 32,
549 .dcache_bsize = 32,
550 .num_pmcs = 6,
551 .cpu_setup = __setup_cpu_745x
552 },
553 { /* 7448 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x80040000,
556 .cpu_name = "7448",
557 .cpu_features = CPU_FTR_COMMON |
558 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
559 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
560 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
561 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
562 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
563 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 .num_pmcs = 6,
567 .cpu_setup = __setup_cpu_745x
568 },
569 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
570 .pvr_mask = 0x7fff0000,
571 .pvr_value = 0x00810000,
572 .cpu_name = "82xx",
573 .cpu_features = CPU_FTR_COMMON |
574 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
575 CPU_FTR_USE_TB,
576 .cpu_user_features = COMMON_PPC,
577 .icache_bsize = 32,
578 .dcache_bsize = 32,
579 .cpu_setup = __setup_cpu_603
580 },
581 { /* All G2_LE (603e core, plus some) have the same pvr */
582 .pvr_mask = 0x7fff0000,
583 .pvr_value = 0x00820000,
584 .cpu_name = "G2_LE",
585 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
586 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
587 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
588 .cpu_user_features = COMMON_PPC,
589 .icache_bsize = 32,
590 .dcache_bsize = 32,
591 .cpu_setup = __setup_cpu_603
592 },
593 { /* e300 (a 603e core, plus some) on 83xx */
594 .pvr_mask = 0x7fff0000,
595 .pvr_value = 0x00830000,
596 .cpu_name = "e300",
597 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
598 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
599 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
600 .cpu_user_features = COMMON_PPC,
601 .icache_bsize = 32,
602 .dcache_bsize = 32,
603 .cpu_setup = __setup_cpu_603
604 },
605 { /* default match, we assume split I/D cache & TB (non-601)... */
606 .pvr_mask = 0x00000000,
607 .pvr_value = 0x00000000,
608 .cpu_name = "(generic PPC)",
609 .cpu_features = CPU_FTR_COMMON |
610 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
611 CPU_FTR_HPTE_TABLE,
612 .cpu_user_features = COMMON_PPC,
613 .icache_bsize = 32,
614 .dcache_bsize = 32,
615 .cpu_setup = __setup_cpu_generic
616 },
617#endif /* CLASSIC_PPC */
618#ifdef CONFIG_PPC64BRIDGE
619 { /* Power3 */
620 .pvr_mask = 0xffff0000,
621 .pvr_value = 0x00400000,
622 .cpu_name = "Power3 (630)",
623 .cpu_features = CPU_FTR_COMMON |
624 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
625 CPU_FTR_HPTE_TABLE,
626 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
627 .icache_bsize = 128,
628 .dcache_bsize = 128,
629 .num_pmcs = 8,
630 .cpu_setup = __setup_cpu_power3
631 },
632 { /* Power3+ */
633 .pvr_mask = 0xffff0000,
634 .pvr_value = 0x00410000,
635 .cpu_name = "Power3 (630+)",
636 .cpu_features = CPU_FTR_COMMON |
637 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
638 CPU_FTR_HPTE_TABLE,
639 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
640 .icache_bsize = 128,
641 .dcache_bsize = 128,
642 .num_pmcs = 8,
643 .cpu_setup = __setup_cpu_power3
644 },
645 { /* I-star */
646 .pvr_mask = 0xffff0000,
647 .pvr_value = 0x00360000,
648 .cpu_name = "I-star",
649 .cpu_features = CPU_FTR_COMMON |
650 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
651 CPU_FTR_HPTE_TABLE,
652 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
653 .icache_bsize = 128,
654 .dcache_bsize = 128,
655 .num_pmcs = 8,
656 .cpu_setup = __setup_cpu_power3
657 },
658 { /* S-star */
659 .pvr_mask = 0xffff0000,
660 .pvr_value = 0x00370000,
661 .cpu_name = "S-star",
662 .cpu_features = CPU_FTR_COMMON |
663 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
664 CPU_FTR_HPTE_TABLE,
665 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
666 .icache_bsize = 128,
667 .dcache_bsize = 128,
668 .num_pmcs = 8,
669 .cpu_setup = __setup_cpu_power3
670 },
671#endif /* CONFIG_PPC64BRIDGE */
672#ifdef CONFIG_POWER4
673 { /* Power4 */
674 .pvr_mask = 0xffff0000,
675 .pvr_value = 0x00350000,
676 .cpu_name = "Power4",
677 .cpu_features = CPU_FTR_COMMON |
678 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
679 CPU_FTR_HPTE_TABLE,
680 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
681 .icache_bsize = 128,
682 .dcache_bsize = 128,
683 .num_pmcs = 8,
684 .cpu_setup = __setup_cpu_power4
685 },
686 { /* PPC970 */
687 .pvr_mask = 0xffff0000,
688 .pvr_value = 0x00390000,
689 .cpu_name = "PPC970",
690 .cpu_features = CPU_FTR_COMMON |
691 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
692 CPU_FTR_HPTE_TABLE |
693 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
694 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 |
695 PPC_FEATURE_ALTIVEC_COMP,
696 .icache_bsize = 128,
697 .dcache_bsize = 128,
698 .num_pmcs = 8,
699 .cpu_setup = __setup_cpu_ppc970
700 },
701 { /* PPC970FX */
702 .pvr_mask = 0xffff0000,
703 .pvr_value = 0x003c0000,
704 .cpu_name = "PPC970FX",
705 .cpu_features = CPU_FTR_COMMON |
706 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
707 CPU_FTR_HPTE_TABLE |
708 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
709 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 |
710 PPC_FEATURE_ALTIVEC_COMP,
711 .icache_bsize = 128,
712 .dcache_bsize = 128,
713 .num_pmcs = 8,
714 .cpu_setup = __setup_cpu_ppc970
715 },
716#endif /* CONFIG_POWER4 */
717#ifdef CONFIG_8xx
718 { /* 8xx */
719 .pvr_mask = 0xffff0000,
720 .pvr_value = 0x00500000,
721 .cpu_name = "8xx",
722 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
723 * if the 8xx code is there.... */
724 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
725 CPU_FTR_USE_TB,
726 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
727 .icache_bsize = 16,
728 .dcache_bsize = 16,
729 },
730#endif /* CONFIG_8xx */
731#ifdef CONFIG_40x
732 { /* 403GC */
733 .pvr_mask = 0xffffff00,
734 .pvr_value = 0x00200200,
735 .cpu_name = "403GC",
736 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
737 CPU_FTR_USE_TB,
738 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
739 .icache_bsize = 16,
740 .dcache_bsize = 16,
741 },
742 { /* 403GCX */
743 .pvr_mask = 0xffffff00,
744 .pvr_value = 0x00201400,
745 .cpu_name = "403GCX",
746 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
747 CPU_FTR_USE_TB,
748 .cpu_user_features = PPC_FEATURE_32 |
749 PPC_FEATURE_HAS_MMU | PPC_FEATURE_NO_TB,
750 .icache_bsize = 16,
751 .dcache_bsize = 16,
752 },
753 { /* 403G ?? */
754 .pvr_mask = 0xffff0000,
755 .pvr_value = 0x00200000,
756 .cpu_name = "403G ??",
757 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
758 CPU_FTR_USE_TB,
759 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
760 .icache_bsize = 16,
761 .dcache_bsize = 16,
762 },
763 { /* 405GP */
764 .pvr_mask = 0xffff0000,
765 .pvr_value = 0x40110000,
766 .cpu_name = "405GP",
767 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
768 CPU_FTR_USE_TB,
769 .cpu_user_features = PPC_FEATURE_32 |
770 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
771 .icache_bsize = 32,
772 .dcache_bsize = 32,
773 },
774 { /* STB 03xxx */
775 .pvr_mask = 0xffff0000,
776 .pvr_value = 0x40130000,
777 .cpu_name = "STB03xxx",
778 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
779 CPU_FTR_USE_TB,
780 .cpu_user_features = PPC_FEATURE_32 |
781 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
782 .icache_bsize = 32,
783 .dcache_bsize = 32,
784 },
785 { /* STB 04xxx */
786 .pvr_mask = 0xffff0000,
787 .pvr_value = 0x41810000,
788 .cpu_name = "STB04xxx",
789 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
790 CPU_FTR_USE_TB,
791 .cpu_user_features = PPC_FEATURE_32 |
792 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
793 .icache_bsize = 32,
794 .dcache_bsize = 32,
795 },
796 { /* NP405L */
797 .pvr_mask = 0xffff0000,
798 .pvr_value = 0x41610000,
799 .cpu_name = "NP405L",
800 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
801 CPU_FTR_USE_TB,
802 .cpu_user_features = PPC_FEATURE_32 |
803 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
804 .icache_bsize = 32,
805 .dcache_bsize = 32,
806 },
807 { /* NP4GS3 */
808 .pvr_mask = 0xffff0000,
809 .pvr_value = 0x40B10000,
810 .cpu_name = "NP4GS3",
811 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
812 CPU_FTR_USE_TB,
813 .cpu_user_features = PPC_FEATURE_32 |
814 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
815 .icache_bsize = 32,
816 .dcache_bsize = 32,
817 },
818 { /* NP405H */
819 .pvr_mask = 0xffff0000,
820 .pvr_value = 0x41410000,
821 .cpu_name = "NP405H",
822 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
823 CPU_FTR_USE_TB,
824 .cpu_user_features = PPC_FEATURE_32 |
825 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
826 .icache_bsize = 32,
827 .dcache_bsize = 32,
828 },
829 { /* 405GPr */
830 .pvr_mask = 0xffff0000,
831 .pvr_value = 0x50910000,
832 .cpu_name = "405GPr",
833 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
834 CPU_FTR_USE_TB,
835 .cpu_user_features = PPC_FEATURE_32 |
836 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
837 .icache_bsize = 32,
838 .dcache_bsize = 32,
839 },
840 { /* STBx25xx */
841 .pvr_mask = 0xffff0000,
842 .pvr_value = 0x51510000,
843 .cpu_name = "STBx25xx",
844 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
845 CPU_FTR_USE_TB,
846 .cpu_user_features = PPC_FEATURE_32 |
847 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
848 .icache_bsize = 32,
849 .dcache_bsize = 32,
850 },
851 { /* 405LP */
852 .pvr_mask = 0xffff0000,
853 .pvr_value = 0x41F10000,
854 .cpu_name = "405LP",
855 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
856 CPU_FTR_USE_TB,
857 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
858 .icache_bsize = 32,
859 .dcache_bsize = 32,
860 },
861 { /* Xilinx Virtex-II Pro */
862 .pvr_mask = 0xffff0000,
863 .pvr_value = 0x20010000,
864 .cpu_name = "Virtex-II Pro",
865 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
866 CPU_FTR_USE_TB,
867 .cpu_user_features = PPC_FEATURE_32 |
868 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
869 .icache_bsize = 32,
870 .dcache_bsize = 32,
871 },
872 { /* 405EP */
873 .pvr_mask = 0xffff0000,
874 .pvr_value = 0x51210000,
875 .cpu_name = "405EP",
876 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
877 CPU_FTR_USE_TB,
878 .cpu_user_features = PPC_FEATURE_32 |
879 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
880 .icache_bsize = 32,
881 .dcache_bsize = 32,
882 },
883
884#endif /* CONFIG_40x */
885#ifdef CONFIG_44x
886 {
887 .pvr_mask = 0xf0000fff,
888 .pvr_value = 0x40000850,
889 .cpu_name = "440EP Rev. A",
890 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
891 CPU_FTR_USE_TB,
892 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
893 .icache_bsize = 32,
894 .dcache_bsize = 32,
895 },
896 {
897 .pvr_mask = 0xf0000fff,
898 .pvr_value = 0x400008d3,
899 .cpu_name = "440EP Rev. B",
900 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
901 CPU_FTR_USE_TB,
902 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
903 .icache_bsize = 32,
904 .dcache_bsize = 32,
905 },
906 { /* 440GP Rev. B */
907 .pvr_mask = 0xf0000fff,
908 .pvr_value = 0x40000440,
909 .cpu_name = "440GP Rev. B",
910 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
911 CPU_FTR_USE_TB,
912 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
913 .icache_bsize = 32,
914 .dcache_bsize = 32,
915 },
916 { /* 440GP Rev. C */
917 .pvr_mask = 0xf0000fff,
918 .pvr_value = 0x40000481,
919 .cpu_name = "440GP Rev. C",
920 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
921 CPU_FTR_USE_TB,
922 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
923 .icache_bsize = 32,
924 .dcache_bsize = 32,
925 },
926 { /* 440GX Rev. A */
927 .pvr_mask = 0xf0000fff,
928 .pvr_value = 0x50000850,
929 .cpu_name = "440GX Rev. A",
930 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
931 CPU_FTR_USE_TB,
932 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
933 .icache_bsize = 32,
934 .dcache_bsize = 32,
935 },
936 { /* 440GX Rev. B */
937 .pvr_mask = 0xf0000fff,
938 .pvr_value = 0x50000851,
939 .cpu_name = "440GX Rev. B",
940 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
941 CPU_FTR_USE_TB,
942 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
943 .icache_bsize = 32,
944 .dcache_bsize = 32,
945 },
946 { /* 440GX Rev. C */
947 .pvr_mask = 0xf0000fff,
948 .pvr_value = 0x50000892,
949 .cpu_name = "440GX Rev. C",
950 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
951 CPU_FTR_USE_TB,
952 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
953 .icache_bsize = 32,
954 .dcache_bsize = 32,
955 },
956 { /* 440GX Rev. F */
957 .pvr_mask = 0xf0000fff,
958 .pvr_value = 0x50000894,
959 .cpu_name = "440GX Rev. F",
960 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
961 CPU_FTR_USE_TB,
962 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
963 .icache_bsize = 32,
964 .dcache_bsize = 32,
965 },
966 { /* 440SP Rev. A */
967 .pvr_mask = 0xff000fff,
968 .pvr_value = 0x53000891,
969 .cpu_name = "440SP Rev. A",
970 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
971 CPU_FTR_USE_TB,
972 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
973 .icache_bsize = 32,
974 .dcache_bsize = 32,
975 },
976#endif /* CONFIG_44x */
977#ifdef CONFIG_FSL_BOOKE
978 { /* e200z5 */
979 .pvr_mask = 0xfff00000,
980 .pvr_value = 0x81000000,
981 .cpu_name = "e200z5",
982 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
983 .cpu_features = CPU_FTR_USE_TB,
984 .cpu_user_features = PPC_FEATURE_32 |
985 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
986 PPC_FEATURE_UNIFIED_CACHE,
987 .dcache_bsize = 32,
988 },
989 { /* e200z6 */
990 .pvr_mask = 0xfff00000,
991 .pvr_value = 0x81100000,
992 .cpu_name = "e200z6",
993 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
994 .cpu_features = CPU_FTR_USE_TB,
995 .cpu_user_features = PPC_FEATURE_32 |
996 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
997 PPC_FEATURE_HAS_EFP_SINGLE |
998 PPC_FEATURE_UNIFIED_CACHE,
999 .dcache_bsize = 32,
1000 },
1001 { /* e500 */
1002 .pvr_mask = 0xffff0000,
1003 .pvr_value = 0x80200000,
1004 .cpu_name = "e500",
1005 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1006 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1007 CPU_FTR_USE_TB,
1008 .cpu_user_features = PPC_FEATURE_32 |
1009 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
1010 PPC_FEATURE_HAS_EFP_SINGLE,
1011 .icache_bsize = 32,
1012 .dcache_bsize = 32,
1013 .num_pmcs = 4,
1014 },
1015 { /* e500v2 */
1016 .pvr_mask = 0xffff0000,
1017 .pvr_value = 0x80210000,
1018 .cpu_name = "e500v2",
1019 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1020 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
1021 CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS,
1022 .cpu_user_features = PPC_FEATURE_32 |
1023 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
1024 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
1025 .icache_bsize = 32,
1026 .dcache_bsize = 32,
1027 .num_pmcs = 4,
1028 },
1029#endif
1030#if !CLASSIC_PPC
1031 { /* default match */
1032 .pvr_mask = 0x00000000,
1033 .pvr_value = 0x00000000,
1034 .cpu_name = "(generic PPC)",
1035 .cpu_features = CPU_FTR_COMMON,
1036 .cpu_user_features = PPC_FEATURE_32,
1037 .icache_bsize = 32,
1038 .dcache_bsize = 32,
1039 }
1040#endif /* !CLASSIC_PPC */
1041};
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 03d4886869f3..f044edbb454f 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -200,9 +200,8 @@ _GLOBAL(DoSyscall)
200 bl do_show_syscall 200 bl do_show_syscall
201#endif /* SHOW_SYSCALLS */ 201#endif /* SHOW_SYSCALLS */
202 rlwinm r10,r1,0,0,18 /* current_thread_info() */ 202 rlwinm r10,r1,0,0,18 /* current_thread_info() */
203 lwz r11,TI_LOCAL_FLAGS(r10) 203 li r11,0
204 rlwinm r11,r11,0,~_TIFL_FORCE_NOERROR 204 stb r11,TI_SC_NOERR(r10)
205 stw r11,TI_LOCAL_FLAGS(r10)
206 lwz r11,TI_FLAGS(r10) 205 lwz r11,TI_FLAGS(r10)
207 andi. r11,r11,_TIF_SYSCALL_T_OR_A 206 andi. r11,r11,_TIF_SYSCALL_T_OR_A
208 bne- syscall_dotrace 207 bne- syscall_dotrace
@@ -227,8 +226,8 @@ ret_from_syscall:
227 cmplw 0,r3,r11 226 cmplw 0,r3,r11
228 rlwinm r12,r1,0,0,18 /* current_thread_info() */ 227 rlwinm r12,r1,0,0,18 /* current_thread_info() */
229 blt+ 30f 228 blt+ 30f
230 lwz r11,TI_LOCAL_FLAGS(r12) 229 lbz r11,TI_SC_NOERR(r12)
231 andi. r11,r11,_TIFL_FORCE_NOERROR 230 cmpwi r11,0
232 bne 30f 231 bne 30f
233 neg r3,r3 232 neg r3,r3
234 lwz r10,_CCR(r1) /* Set SO bit in CR */ 233 lwz r10,_CCR(r1) /* Set SO bit in CR */
@@ -633,7 +632,8 @@ sigreturn_exit:
633 rlwinm r12,r1,0,0,18 /* current_thread_info() */ 632 rlwinm r12,r1,0,0,18 /* current_thread_info() */
634 lwz r9,TI_FLAGS(r12) 633 lwz r9,TI_FLAGS(r12)
635 andi. r0,r9,_TIF_SYSCALL_T_OR_A 634 andi. r0,r9,_TIF_SYSCALL_T_OR_A
636 bnel- do_syscall_trace_leave 635 beq+ ret_from_except_full
636 bl do_syscall_trace_leave
637 /* fall through */ 637 /* fall through */
638 638
639 .globl ret_from_except_full 639 .globl ret_from_except_full
diff --git a/arch/ppc/kernel/fpu.S b/arch/ppc/kernel/fpu.S
deleted file mode 100644
index 665d7d34304c..000000000000
--- a/arch/ppc/kernel/fpu.S
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * FPU support code, moved here from head.S so that it can be used
3 * by chips which use other head-whatever.S files.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 */
11
12#include <linux/config.h>
13#include <asm/processor.h>
14#include <asm/page.h>
15#include <asm/mmu.h>
16#include <asm/pgtable.h>
17#include <asm/cputable.h>
18#include <asm/cache.h>
19#include <asm/thread_info.h>
20#include <asm/ppc_asm.h>
21#include <asm/asm-offsets.h>
22
23/*
24 * This task wants to use the FPU now.
25 * On UP, disable FP for the task which had the FPU previously,
26 * and save its floating-point registers in its thread_struct.
27 * Load up this task's FP registers from its thread_struct,
28 * enable the FPU for the current task and return to the task.
29 */
30 .globl load_up_fpu
31load_up_fpu:
32 mfmsr r5
33 ori r5,r5,MSR_FP
34#ifdef CONFIG_PPC64BRIDGE
35 clrldi r5,r5,1 /* turn off 64-bit mode */
36#endif /* CONFIG_PPC64BRIDGE */
37 SYNC
38 MTMSRD(r5) /* enable use of fpu now */
39 isync
40/*
41 * For SMP, we don't do lazy FPU switching because it just gets too
42 * horrendously complex, especially when a task switches from one CPU
43 * to another. Instead we call giveup_fpu in switch_to.
44 */
45#ifndef CONFIG_SMP
46 tophys(r6,0) /* get __pa constant */
47 addis r3,r6,last_task_used_math@ha
48 lwz r4,last_task_used_math@l(r3)
49 cmpwi 0,r4,0
50 beq 1f
51 add r4,r4,r6
52 addi r4,r4,THREAD /* want last_task_used_math->thread */
53 SAVE_32FPRS(0, r4)
54 mffs fr0
55 stfd fr0,THREAD_FPSCR-4(r4)
56 lwz r5,PT_REGS(r4)
57 add r5,r5,r6
58 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
59 li r10,MSR_FP|MSR_FE0|MSR_FE1
60 andc r4,r4,r10 /* disable FP for previous task */
61 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
621:
63#endif /* CONFIG_SMP */
64 /* enable use of FP after return */
65 mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
66 lwz r4,THREAD_FPEXC_MODE(r5)
67 ori r9,r9,MSR_FP /* enable FP for current */
68 or r9,r9,r4
69 lfd fr0,THREAD_FPSCR-4(r5)
70 mtfsf 0xff,fr0
71 REST_32FPRS(0, r5)
72#ifndef CONFIG_SMP
73 subi r4,r5,THREAD
74 sub r4,r4,r6
75 stw r4,last_task_used_math@l(r3)
76#endif /* CONFIG_SMP */
77 /* restore registers and return */
78 /* we haven't used ctr or xer or lr */
79 b fast_exception_return
80
81/*
82 * FP unavailable trap from kernel - print a message, but let
83 * the task use FP in the kernel until it returns to user mode.
84 */
85 .globl KernelFP
86KernelFP:
87 lwz r3,_MSR(r1)
88 ori r3,r3,MSR_FP
89 stw r3,_MSR(r1) /* enable use of FP after return */
90 lis r3,86f@h
91 ori r3,r3,86f@l
92 mr r4,r2 /* current */
93 lwz r5,_NIP(r1)
94 bl printk
95 b ret_from_except
9686: .string "floating point used in kernel (task=%p, pc=%x)\n"
97 .align 4,0
98
99/*
100 * giveup_fpu(tsk)
101 * Disable FP for the task given as the argument,
102 * and save the floating-point registers in its thread_struct.
103 * Enables the FPU for use in the kernel on return.
104 */
105 .globl giveup_fpu
106giveup_fpu:
107 mfmsr r5
108 ori r5,r5,MSR_FP
109 SYNC_601
110 ISYNC_601
111 MTMSRD(r5) /* enable use of fpu now */
112 SYNC_601
113 isync
114 cmpwi 0,r3,0
115 beqlr- /* if no previous owner, done */
116 addi r3,r3,THREAD /* want THREAD of task */
117 lwz r5,PT_REGS(r3)
118 cmpwi 0,r5,0
119 SAVE_32FPRS(0, r3)
120 mffs fr0
121 stfd fr0,THREAD_FPSCR-4(r3)
122 beq 1f
123 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
124 li r3,MSR_FP|MSR_FE0|MSR_FE1
125 andc r4,r4,r3 /* disable FP for previous task */
126 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1271:
128#ifndef CONFIG_SMP
129 li r5,0
130 lis r4,last_task_used_math@ha
131 stw r5,last_task_used_math@l(r4)
132#endif /* CONFIG_SMP */
133 blr
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 1960fb8c259c..c5a890dca9cf 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -349,12 +349,12 @@ i##n: \
349 349
350/* System reset */ 350/* System reset */
351/* core99 pmac starts the seconary here by changing the vector, and 351/* core99 pmac starts the seconary here by changing the vector, and
352 putting it back to what it was (UnknownException) when done. */ 352 putting it back to what it was (unknown_exception) when done. */
353#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP) 353#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
354 . = 0x100 354 . = 0x100
355 b __secondary_start_gemini 355 b __secondary_start_gemini
356#else 356#else
357 EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) 357 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
358#endif 358#endif
359 359
360/* Machine check */ 360/* Machine check */
@@ -389,7 +389,7 @@ i##n: \
389 cmpwi cr1,r4,0 389 cmpwi cr1,r4,0
390 bne cr1,1f 390 bne cr1,1f
391#endif 391#endif
392 EXC_XFER_STD(0x200, MachineCheckException) 392 EXC_XFER_STD(0x200, machine_check_exception)
393#ifdef CONFIG_PPC_CHRP 393#ifdef CONFIG_PPC_CHRP
3941: b machine_check_in_rtas 3941: b machine_check_in_rtas
395#endif 395#endif
@@ -456,10 +456,10 @@ Alignment:
456 mfspr r5,SPRN_DSISR 456 mfspr r5,SPRN_DSISR
457 stw r5,_DSISR(r11) 457 stw r5,_DSISR(r11)
458 addi r3,r1,STACK_FRAME_OVERHEAD 458 addi r3,r1,STACK_FRAME_OVERHEAD
459 EXC_XFER_EE(0x600, AlignmentException) 459 EXC_XFER_EE(0x600, alignment_exception)
460 460
461/* Program check exception */ 461/* Program check exception */
462 EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) 462 EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
463 463
464/* Floating-point unavailable */ 464/* Floating-point unavailable */
465 . = 0x800 465 . = 0x800
@@ -467,13 +467,13 @@ FPUnavailable:
467 EXCEPTION_PROLOG 467 EXCEPTION_PROLOG
468 bne load_up_fpu /* if from user, just load it up */ 468 bne load_up_fpu /* if from user, just load it up */
469 addi r3,r1,STACK_FRAME_OVERHEAD 469 addi r3,r1,STACK_FRAME_OVERHEAD
470 EXC_XFER_EE_LITE(0x800, KernelFP) 470 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
471 471
472/* Decrementer */ 472/* Decrementer */
473 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) 473 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
474 474
475 EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) 475 EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
476 EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) 476 EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
477 477
478/* System call */ 478/* System call */
479 . = 0xc00 479 . = 0xc00
@@ -482,8 +482,8 @@ SystemCall:
482 EXC_XFER_EE_LITE(0xc00, DoSyscall) 482 EXC_XFER_EE_LITE(0xc00, DoSyscall)
483 483
484/* Single step - not used on 601 */ 484/* Single step - not used on 601 */
485 EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) 485 EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
486 EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) 486 EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
487 487
488/* 488/*
489 * The Altivec unavailable trap is at 0x0f20. Foo. 489 * The Altivec unavailable trap is at 0x0f20. Foo.
@@ -502,7 +502,7 @@ SystemCall:
502Trap_0f: 502Trap_0f:
503 EXCEPTION_PROLOG 503 EXCEPTION_PROLOG
504 addi r3,r1,STACK_FRAME_OVERHEAD 504 addi r3,r1,STACK_FRAME_OVERHEAD
505 EXC_XFER_EE(0xf00, UnknownException) 505 EXC_XFER_EE(0xf00, unknown_exception)
506 506
507/* 507/*
508 * Handle TLB miss for instruction on 603/603e. 508 * Handle TLB miss for instruction on 603/603e.
@@ -702,44 +702,44 @@ DataStoreTLBMiss:
702 rfi 702 rfi
703 703
704#ifndef CONFIG_ALTIVEC 704#ifndef CONFIG_ALTIVEC
705#define AltivecAssistException UnknownException 705#define altivec_assist_exception unknown_exception
706#endif 706#endif
707 707
708 EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE) 708 EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
709 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE) 709 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
710 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 710 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
711#ifdef CONFIG_POWER4 711#ifdef CONFIG_POWER4
712 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 712 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
713 EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE) 713 EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
714 EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD) 714 EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
715#else /* !CONFIG_POWER4 */ 715#else /* !CONFIG_POWER4 */
716 EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE) 716 EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
717 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD) 717 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
718 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 718 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
719#endif /* CONFIG_POWER4 */ 719#endif /* CONFIG_POWER4 */
720 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 720 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
721 EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) 721 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
722 EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) 722 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
723 EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) 723 EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
724 EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) 724 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
725 EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) 725 EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
726 EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) 726 EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
727 EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE) 727 EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
728 EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE) 728 EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
729 EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE) 729 EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
730 EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE) 730 EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
731 EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE) 731 EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
732 EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE) 732 EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
733 EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE) 733 EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
734 EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE) 734 EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
735 EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE) 735 EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
736 EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE) 736 EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
737 EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE) 737 EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
738 EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE) 738 EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
739 EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE) 739 EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
740 EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE) 740 EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
741 EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE) 741 EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
742 EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE) 742 EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
743 743
744 .globl mol_trampoline 744 .globl mol_trampoline
745 .set mol_trampoline, i0x2f00 745 .set mol_trampoline, i0x2f00
@@ -751,7 +751,7 @@ AltiVecUnavailable:
751#ifdef CONFIG_ALTIVEC 751#ifdef CONFIG_ALTIVEC
752 bne load_up_altivec /* if from user, just load it up */ 752 bne load_up_altivec /* if from user, just load it up */
753#endif /* CONFIG_ALTIVEC */ 753#endif /* CONFIG_ALTIVEC */
754 EXC_XFER_EE_LITE(0xf20, AltivecUnavailException) 754 EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
755 755
756#ifdef CONFIG_PPC64BRIDGE 756#ifdef CONFIG_PPC64BRIDGE
757DataAccess: 757DataAccess:
@@ -767,12 +767,12 @@ DataSegment:
767 addi r3,r1,STACK_FRAME_OVERHEAD 767 addi r3,r1,STACK_FRAME_OVERHEAD
768 mfspr r4,SPRN_DAR 768 mfspr r4,SPRN_DAR
769 stw r4,_DAR(r11) 769 stw r4,_DAR(r11)
770 EXC_XFER_STD(0x380, UnknownException) 770 EXC_XFER_STD(0x380, unknown_exception)
771 771
772InstructionSegment: 772InstructionSegment:
773 EXCEPTION_PROLOG 773 EXCEPTION_PROLOG
774 addi r3,r1,STACK_FRAME_OVERHEAD 774 addi r3,r1,STACK_FRAME_OVERHEAD
775 EXC_XFER_STD(0x480, UnknownException) 775 EXC_XFER_STD(0x480, unknown_exception)
776#endif /* CONFIG_PPC64BRIDGE */ 776#endif /* CONFIG_PPC64BRIDGE */
777 777
778#ifdef CONFIG_ALTIVEC 778#ifdef CONFIG_ALTIVEC
@@ -804,7 +804,7 @@ load_up_altivec:
804 beq 1f 804 beq 1f
805 add r4,r4,r6 805 add r4,r4,r6
806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ 806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */
807 SAVE_32VR(0,r10,r4) 807 SAVE_32VRS(0,r10,r4)
808 mfvscr vr0 808 mfvscr vr0
809 li r10,THREAD_VSCR 809 li r10,THREAD_VSCR
810 stvx vr0,r10,r4 810 stvx vr0,r10,r4
@@ -824,7 +824,7 @@ load_up_altivec:
824 stw r4,THREAD_USED_VR(r5) 824 stw r4,THREAD_USED_VR(r5)
825 lvx vr0,r10,r5 825 lvx vr0,r10,r5
826 mtvscr vr0 826 mtvscr vr0
827 REST_32VR(0,r10,r5) 827 REST_32VRS(0,r10,r5)
828#ifndef CONFIG_SMP 828#ifndef CONFIG_SMP
829 subi r4,r5,THREAD 829 subi r4,r5,THREAD
830 sub r4,r4,r6 830 sub r4,r4,r6
@@ -870,7 +870,7 @@ giveup_altivec:
870 addi r3,r3,THREAD /* want THREAD of task */ 870 addi r3,r3,THREAD /* want THREAD of task */
871 lwz r5,PT_REGS(r3) 871 lwz r5,PT_REGS(r3)
872 cmpwi 0,r5,0 872 cmpwi 0,r5,0
873 SAVE_32VR(0, r4, r3) 873 SAVE_32VRS(0, r4, r3)
874 mfvscr vr0 874 mfvscr vr0
875 li r4,THREAD_VSCR 875 li r4,THREAD_VSCR
876 stvx vr0,r4,r3 876 stvx vr0,r4,r3
@@ -916,7 +916,7 @@ relocate_kernel:
916copy_and_flush: 916copy_and_flush:
917 addi r5,r5,-4 917 addi r5,r5,-4
918 addi r6,r6,-4 918 addi r6,r6,-4
9194: li r0,L1_CACHE_LINE_SIZE/4 9194: li r0,L1_CACHE_BYTES/4
920 mtctr r0 920 mtctr r0
9213: addi r6,r6,4 /* copy a cache line */ 9213: addi r6,r6,4 /* copy a cache line */
922 lwzx r0,r6,r4 922 lwzx r0,r6,r4
@@ -1059,7 +1059,6 @@ __secondary_start:
1059 1059
1060 lis r3,-KERNELBASE@h 1060 lis r3,-KERNELBASE@h
1061 mr r4,r24 1061 mr r4,r24
1062 bl identify_cpu
1063 bl call_setup_cpu /* Call setup_cpu for this CPU */ 1062 bl call_setup_cpu /* Call setup_cpu for this CPU */
1064#ifdef CONFIG_6xx 1063#ifdef CONFIG_6xx
1065 lis r3,-KERNELBASE@h 1064 lis r3,-KERNELBASE@h
@@ -1109,11 +1108,6 @@ __secondary_start:
1109 * Those generic dummy functions are kept for CPUs not 1108 * Those generic dummy functions are kept for CPUs not
1110 * included in CONFIG_6xx 1109 * included in CONFIG_6xx
1111 */ 1110 */
1112_GLOBAL(__setup_cpu_power3)
1113 blr
1114_GLOBAL(__setup_cpu_generic)
1115 blr
1116
1117#if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4) 1111#if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4)
1118_GLOBAL(__save_cpu_setup) 1112_GLOBAL(__save_cpu_setup)
1119 blr 1113 blr
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 599245b0407e..8b49679fad54 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -309,13 +309,13 @@ skpinv: addi r4,r4,1 /* Increment */
309 309
310interrupt_base: 310interrupt_base:
311 /* Critical Input Interrupt */ 311 /* Critical Input Interrupt */
312 CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) 312 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
313 313
314 /* Machine Check Interrupt */ 314 /* Machine Check Interrupt */
315#ifdef CONFIG_440A 315#ifdef CONFIG_440A
316 MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 316 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
317#else 317#else
318 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 318 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
319#endif 319#endif
320 320
321 /* Data Storage Interrupt */ 321 /* Data Storage Interrupt */
@@ -442,7 +442,7 @@ interrupt_base:
442#ifdef CONFIG_PPC_FPU 442#ifdef CONFIG_PPC_FPU
443 FP_UNAVAILABLE_EXCEPTION 443 FP_UNAVAILABLE_EXCEPTION
444#else 444#else
445 EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) 445 EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
446#endif 446#endif
447 447
448 /* System Call Interrupt */ 448 /* System Call Interrupt */
@@ -451,21 +451,21 @@ interrupt_base:
451 EXC_XFER_EE_LITE(0x0c00, DoSyscall) 451 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
452 452
453 /* Auxillary Processor Unavailable Interrupt */ 453 /* Auxillary Processor Unavailable Interrupt */
454 EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) 454 EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
455 455
456 /* Decrementer Interrupt */ 456 /* Decrementer Interrupt */
457 DECREMENTER_EXCEPTION 457 DECREMENTER_EXCEPTION
458 458
459 /* Fixed Internal Timer Interrupt */ 459 /* Fixed Internal Timer Interrupt */
460 /* TODO: Add FIT support */ 460 /* TODO: Add FIT support */
461 EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE) 461 EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
462 462
463 /* Watchdog Timer Interrupt */ 463 /* Watchdog Timer Interrupt */
464 /* TODO: Add watchdog support */ 464 /* TODO: Add watchdog support */
465#ifdef CONFIG_BOOKE_WDT 465#ifdef CONFIG_BOOKE_WDT
466 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException) 466 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
467#else 467#else
468 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException) 468 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
469#endif 469#endif
470 470
471 /* Data TLB Error Interrupt */ 471 /* Data TLB Error Interrupt */
@@ -743,14 +743,18 @@ _GLOBAL(set_context)
743 * goes at the beginning of the data segment, which is page-aligned. 743 * goes at the beginning of the data segment, which is page-aligned.
744 */ 744 */
745 .data 745 .data
746_GLOBAL(sdata) 746 .align 12
747_GLOBAL(empty_zero_page) 747 .globl sdata
748sdata:
749 .globl empty_zero_page
750empty_zero_page:
748 .space 4096 751 .space 4096
749 752
750/* 753/*
751 * To support >32-bit physical addresses, we use an 8KB pgdir. 754 * To support >32-bit physical addresses, we use an 8KB pgdir.
752 */ 755 */
753_GLOBAL(swapper_pg_dir) 756 .globl swapper_pg_dir
757swapper_pg_dir:
754 .space 8192 758 .space 8192
755 759
756/* Reserved 4k for the critical exception stack & 4k for the machine 760/* Reserved 4k for the critical exception stack & 4k for the machine
@@ -759,13 +763,15 @@ _GLOBAL(swapper_pg_dir)
759 .align 12 763 .align 12
760exception_stack_bottom: 764exception_stack_bottom:
761 .space BOOKE_EXCEPTION_STACK_SIZE 765 .space BOOKE_EXCEPTION_STACK_SIZE
762_GLOBAL(exception_stack_top) 766 .globl exception_stack_top
767exception_stack_top:
763 768
764/* 769/*
765 * This space gets a copy of optional info passed to us by the bootstrap 770 * This space gets a copy of optional info passed to us by the bootstrap
766 * which is used to pass parameters into the kernel like root=/dev/sda1, etc. 771 * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
767 */ 772 */
768_GLOBAL(cmd_line) 773 .globl cmd_line
774cmd_line:
769 .space 512 775 .space 512
770 776
771/* 777/*
@@ -774,5 +780,3 @@ _GLOBAL(cmd_line)
774 */ 780 */
775abatron_pteptrs: 781abatron_pteptrs:
776 .space 8 782 .space 8
777
778
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
index 8562b807b37c..10c261c67021 100644
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -245,12 +245,12 @@ label:
245/* 245/*
246 * 0x0100 - Critical Interrupt Exception 246 * 0x0100 - Critical Interrupt Exception
247 */ 247 */
248 CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException) 248 CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
249 249
250/* 250/*
251 * 0x0200 - Machine Check Exception 251 * 0x0200 - Machine Check Exception
252 */ 252 */
253 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 253 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
254 254
255/* 255/*
256 * 0x0300 - Data Storage Exception 256 * 0x0300 - Data Storage Exception
@@ -405,7 +405,7 @@ label:
405 mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */ 405 mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
406 stw r4,_DEAR(r11) 406 stw r4,_DEAR(r11)
407 addi r3,r1,STACK_FRAME_OVERHEAD 407 addi r3,r1,STACK_FRAME_OVERHEAD
408 EXC_XFER_EE(0x600, AlignmentException) 408 EXC_XFER_EE(0x600, alignment_exception)
409 409
410/* 0x0700 - Program Exception */ 410/* 0x0700 - Program Exception */
411 START_EXCEPTION(0x0700, ProgramCheck) 411 START_EXCEPTION(0x0700, ProgramCheck)
@@ -413,21 +413,21 @@ label:
413 mfspr r4,SPRN_ESR /* Grab the ESR and save it */ 413 mfspr r4,SPRN_ESR /* Grab the ESR and save it */
414 stw r4,_ESR(r11) 414 stw r4,_ESR(r11)
415 addi r3,r1,STACK_FRAME_OVERHEAD 415 addi r3,r1,STACK_FRAME_OVERHEAD
416 EXC_XFER_STD(0x700, ProgramCheckException) 416 EXC_XFER_STD(0x700, program_check_exception)
417 417
418 EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE) 418 EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
419 EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE) 419 EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
420 EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE) 420 EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
421 EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE) 421 EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
422 422
423/* 0x0C00 - System Call Exception */ 423/* 0x0C00 - System Call Exception */
424 START_EXCEPTION(0x0C00, SystemCall) 424 START_EXCEPTION(0x0C00, SystemCall)
425 NORMAL_EXCEPTION_PROLOG 425 NORMAL_EXCEPTION_PROLOG
426 EXC_XFER_EE_LITE(0xc00, DoSyscall) 426 EXC_XFER_EE_LITE(0xc00, DoSyscall)
427 427
428 EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE) 428 EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
429 EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE) 429 EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
430 EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE) 430 EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
431 431
432/* 0x1000 - Programmable Interval Timer (PIT) Exception */ 432/* 0x1000 - Programmable Interval Timer (PIT) Exception */
433 START_EXCEPTION(0x1000, Decrementer) 433 START_EXCEPTION(0x1000, Decrementer)
@@ -444,14 +444,14 @@ label:
444 444
445/* 0x1010 - Fixed Interval Timer (FIT) Exception 445/* 0x1010 - Fixed Interval Timer (FIT) Exception
446*/ 446*/
447 STND_EXCEPTION(0x1010, FITException, UnknownException) 447 STND_EXCEPTION(0x1010, FITException, unknown_exception)
448 448
449/* 0x1020 - Watchdog Timer (WDT) Exception 449/* 0x1020 - Watchdog Timer (WDT) Exception
450*/ 450*/
451#ifdef CONFIG_BOOKE_WDT 451#ifdef CONFIG_BOOKE_WDT
452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException) 452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
453#else 453#else
454 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException) 454 CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
455#endif 455#endif
456#endif 456#endif
457 457
@@ -656,25 +656,25 @@ label:
656 mfspr r10, SPRN_SPRG0 656 mfspr r10, SPRN_SPRG0
657 b InstructionAccess 657 b InstructionAccess
658 658
659 EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE) 659 EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
660 EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE) 660 EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
661 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 661 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
662 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 662 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
663#ifdef CONFIG_IBM405_ERR51 663#ifdef CONFIG_IBM405_ERR51
664 /* 405GP errata 51 */ 664 /* 405GP errata 51 */
665 START_EXCEPTION(0x1700, Trap_17) 665 START_EXCEPTION(0x1700, Trap_17)
666 b DTLBMiss 666 b DTLBMiss
667#else 667#else
668 EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) 668 EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
669#endif 669#endif
670 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 670 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
671 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 671 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
672 EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE) 672 EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
673 EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE) 673 EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
674 EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE) 674 EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
675 EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE) 675 EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
676 EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE) 676 EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
677 EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE) 677 EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
678 678
679/* Check for a single step debug exception while in an exception 679/* Check for a single step debug exception while in an exception
680 * handler before state has been saved. This is to catch the case 680 * handler before state has been saved. This is to catch the case
@@ -988,10 +988,14 @@ _GLOBAL(set_context)
988 * goes at the beginning of the data segment, which is page-aligned. 988 * goes at the beginning of the data segment, which is page-aligned.
989 */ 989 */
990 .data 990 .data
991_GLOBAL(sdata) 991 .align 12
992_GLOBAL(empty_zero_page) 992 .globl sdata
993sdata:
994 .globl empty_zero_page
995empty_zero_page:
993 .space 4096 996 .space 4096
994_GLOBAL(swapper_pg_dir) 997 .globl swapper_pg_dir
998swapper_pg_dir:
995 .space 4096 999 .space 4096
996 1000
997 1001
@@ -1001,12 +1005,14 @@ _GLOBAL(swapper_pg_dir)
1001exception_stack_bottom: 1005exception_stack_bottom:
1002 .space 4096 1006 .space 4096
1003critical_stack_top: 1007critical_stack_top:
1004_GLOBAL(exception_stack_top) 1008 .globl exception_stack_top
1009exception_stack_top:
1005 1010
1006/* This space gets a copy of optional info passed to us by the bootstrap 1011/* This space gets a copy of optional info passed to us by the bootstrap
1007 * which is used to pass parameters into the kernel like root=/dev/sda1, etc. 1012 * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
1008 */ 1013 */
1009_GLOBAL(cmd_line) 1014 .globl cmd_line
1015cmd_line:
1010 .space 512 1016 .space 512
1011 1017
1012/* Room for two PTE pointers, usually the kernel and current user pointers 1018/* Room for two PTE pointers, usually the kernel and current user pointers
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index cb1a3a54a026..de0978742221 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -203,7 +203,7 @@ i##n: \
203 ret_from_except) 203 ret_from_except)
204 204
205/* System reset */ 205/* System reset */
206 EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) 206 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
207 207
208/* Machine check */ 208/* Machine check */
209 . = 0x200 209 . = 0x200
@@ -214,7 +214,7 @@ MachineCheck:
214 mfspr r5,SPRN_DSISR 214 mfspr r5,SPRN_DSISR
215 stw r5,_DSISR(r11) 215 stw r5,_DSISR(r11)
216 addi r3,r1,STACK_FRAME_OVERHEAD 216 addi r3,r1,STACK_FRAME_OVERHEAD
217 EXC_XFER_STD(0x200, MachineCheckException) 217 EXC_XFER_STD(0x200, machine_check_exception)
218 218
219/* Data access exception. 219/* Data access exception.
220 * This is "never generated" by the MPC8xx. We jump to it for other 220 * This is "never generated" by the MPC8xx. We jump to it for other
@@ -252,20 +252,20 @@ Alignment:
252 mfspr r5,SPRN_DSISR 252 mfspr r5,SPRN_DSISR
253 stw r5,_DSISR(r11) 253 stw r5,_DSISR(r11)
254 addi r3,r1,STACK_FRAME_OVERHEAD 254 addi r3,r1,STACK_FRAME_OVERHEAD
255 EXC_XFER_EE(0x600, AlignmentException) 255 EXC_XFER_EE(0x600, alignment_exception)
256 256
257/* Program check exception */ 257/* Program check exception */
258 EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) 258 EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
259 259
260/* No FPU on MPC8xx. This exception is not supposed to happen. 260/* No FPU on MPC8xx. This exception is not supposed to happen.
261*/ 261*/
262 EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD) 262 EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
263 263
264/* Decrementer */ 264/* Decrementer */
265 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) 265 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
266 266
267 EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) 267 EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
268 EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) 268 EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
269 269
270/* System call */ 270/* System call */
271 . = 0xc00 271 . = 0xc00
@@ -274,9 +274,9 @@ SystemCall:
274 EXC_XFER_EE_LITE(0xc00, DoSyscall) 274 EXC_XFER_EE_LITE(0xc00, DoSyscall)
275 275
276/* Single step - not used on 601 */ 276/* Single step - not used on 601 */
277 EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) 277 EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
278 EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) 278 EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
279 EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE) 279 EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
280 280
281/* On the MPC8xx, this is a software emulation interrupt. It occurs 281/* On the MPC8xx, this is a software emulation interrupt. It occurs
282 * for all unimplemented and illegal instructions. 282 * for all unimplemented and illegal instructions.
@@ -540,22 +540,22 @@ DataTLBError:
540#endif 540#endif
541 b DataAccess 541 b DataAccess
542 542
543 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 543 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
544 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 544 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
545 EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) 545 EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
546 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 546 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
547 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 547 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
548 EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) 548 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
549 EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) 549 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
550 550
551/* On the MPC8xx, these next four traps are used for development 551/* On the MPC8xx, these next four traps are used for development
552 * support of breakpoints and such. Someday I will get around to 552 * support of breakpoints and such. Someday I will get around to
553 * using them. 553 * using them.
554 */ 554 */
555 EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) 555 EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
556 EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) 556 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
557 EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) 557 EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
558 EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) 558 EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
559 559
560 . = 0x2000 560 . = 0x2000
561 561
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index 9342acf12e72..aeb349b47af3 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -335,7 +335,7 @@ label:
335 mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \ 335 mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \
336 stw r4,_DEAR(r11); \ 336 stw r4,_DEAR(r11); \
337 addi r3,r1,STACK_FRAME_OVERHEAD; \ 337 addi r3,r1,STACK_FRAME_OVERHEAD; \
338 EXC_XFER_EE(0x0600, AlignmentException) 338 EXC_XFER_EE(0x0600, alignment_exception)
339 339
340#define PROGRAM_EXCEPTION \ 340#define PROGRAM_EXCEPTION \
341 START_EXCEPTION(Program) \ 341 START_EXCEPTION(Program) \
@@ -343,7 +343,7 @@ label:
343 mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \ 343 mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \
344 stw r4,_ESR(r11); \ 344 stw r4,_ESR(r11); \
345 addi r3,r1,STACK_FRAME_OVERHEAD; \ 345 addi r3,r1,STACK_FRAME_OVERHEAD; \
346 EXC_XFER_STD(0x0700, ProgramCheckException) 346 EXC_XFER_STD(0x0700, program_check_exception)
347 347
348#define DECREMENTER_EXCEPTION \ 348#define DECREMENTER_EXCEPTION \
349 START_EXCEPTION(Decrementer) \ 349 START_EXCEPTION(Decrementer) \
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 8e52e8408316..5063c603fad4 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -426,14 +426,14 @@ skpinv: addi r6,r6,1 /* Increment */
426 426
427interrupt_base: 427interrupt_base:
428 /* Critical Input Interrupt */ 428 /* Critical Input Interrupt */
429 CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) 429 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
430 430
431 /* Machine Check Interrupt */ 431 /* Machine Check Interrupt */
432#ifdef CONFIG_E200 432#ifdef CONFIG_E200
433 /* no RFMCI, MCSRRs on E200 */ 433 /* no RFMCI, MCSRRs on E200 */
434 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 434 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
435#else 435#else
436 MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 436 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
437#endif 437#endif
438 438
439 /* Data Storage Interrupt */ 439 /* Data Storage Interrupt */
@@ -542,9 +542,9 @@ interrupt_base:
542#else 542#else
543#ifdef CONFIG_E200 543#ifdef CONFIG_E200
544 /* E200 treats 'normal' floating point instructions as FP Unavail exception */ 544 /* E200 treats 'normal' floating point instructions as FP Unavail exception */
545 EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE) 545 EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
546#else 546#else
547 EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) 547 EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
548#endif 548#endif
549#endif 549#endif
550 550
@@ -554,20 +554,20 @@ interrupt_base:
554 EXC_XFER_EE_LITE(0x0c00, DoSyscall) 554 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
555 555
556 /* Auxillary Processor Unavailable Interrupt */ 556 /* Auxillary Processor Unavailable Interrupt */
557 EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) 557 EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
558 558
559 /* Decrementer Interrupt */ 559 /* Decrementer Interrupt */
560 DECREMENTER_EXCEPTION 560 DECREMENTER_EXCEPTION
561 561
562 /* Fixed Internal Timer Interrupt */ 562 /* Fixed Internal Timer Interrupt */
563 /* TODO: Add FIT support */ 563 /* TODO: Add FIT support */
564 EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE) 564 EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
565 565
566 /* Watchdog Timer Interrupt */ 566 /* Watchdog Timer Interrupt */
567#ifdef CONFIG_BOOKE_WDT 567#ifdef CONFIG_BOOKE_WDT
568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException) 568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
569#else 569#else
570 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException) 570 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
571#endif 571#endif
572 572
573 /* Data TLB Error Interrupt */ 573 /* Data TLB Error Interrupt */
@@ -696,21 +696,21 @@ interrupt_base:
696 addi r3,r1,STACK_FRAME_OVERHEAD 696 addi r3,r1,STACK_FRAME_OVERHEAD
697 EXC_XFER_EE_LITE(0x2010, KernelSPE) 697 EXC_XFER_EE_LITE(0x2010, KernelSPE)
698#else 698#else
699 EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE) 699 EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
700#endif /* CONFIG_SPE */ 700#endif /* CONFIG_SPE */
701 701
702 /* SPE Floating Point Data */ 702 /* SPE Floating Point Data */
703#ifdef CONFIG_SPE 703#ifdef CONFIG_SPE
704 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE); 704 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
705#else 705#else
706 EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE) 706 EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
707#endif /* CONFIG_SPE */ 707#endif /* CONFIG_SPE */
708 708
709 /* SPE Floating Point Round */ 709 /* SPE Floating Point Round */
710 EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE) 710 EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
711 711
712 /* Performance Monitor */ 712 /* Performance Monitor */
713 EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD) 713 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
714 714
715 715
716 /* Debug Interrupt */ 716 /* Debug Interrupt */
@@ -853,7 +853,7 @@ load_up_spe:
853 cmpi 0,r4,0 853 cmpi 0,r4,0
854 beq 1f 854 beq 1f
855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */ 855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
856 SAVE_32EVR(0,r10,r4) 856 SAVE_32EVRS(0,r10,r4)
857 evxor evr10, evr10, evr10 /* clear out evr10 */ 857 evxor evr10, evr10, evr10 /* clear out evr10 */
858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */ 858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
859 li r5,THREAD_ACC 859 li r5,THREAD_ACC
@@ -873,7 +873,7 @@ load_up_spe:
873 stw r4,THREAD_USED_SPE(r5) 873 stw r4,THREAD_USED_SPE(r5)
874 evlddx evr4,r10,r5 874 evlddx evr4,r10,r5
875 evmra evr4,evr4 875 evmra evr4,evr4
876 REST_32EVR(0,r10,r5) 876 REST_32EVRS(0,r10,r5)
877#ifndef CONFIG_SMP 877#ifndef CONFIG_SMP
878 subi r4,r5,THREAD 878 subi r4,r5,THREAD
879 stw r4,last_task_used_spe@l(r3) 879 stw r4,last_task_used_spe@l(r3)
@@ -963,7 +963,7 @@ _GLOBAL(giveup_spe)
963 addi r3,r3,THREAD /* want THREAD of task */ 963 addi r3,r3,THREAD /* want THREAD of task */
964 lwz r5,PT_REGS(r3) 964 lwz r5,PT_REGS(r3)
965 cmpi 0,r5,0 965 cmpi 0,r5,0
966 SAVE_32EVR(0, r4, r3) 966 SAVE_32EVRS(0, r4, r3)
967 evxor evr6, evr6, evr6 /* clear out evr6 */ 967 evxor evr6, evr6, evr6 /* clear out evr6 */
968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ 968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
969 li r4,THREAD_ACC 969 li r4,THREAD_ACC
@@ -1028,10 +1028,14 @@ _GLOBAL(set_context)
1028 * goes at the beginning of the data segment, which is page-aligned. 1028 * goes at the beginning of the data segment, which is page-aligned.
1029 */ 1029 */
1030 .data 1030 .data
1031_GLOBAL(sdata) 1031 .align 12
1032_GLOBAL(empty_zero_page) 1032 .globl sdata
1033sdata:
1034 .globl empty_zero_page
1035empty_zero_page:
1033 .space 4096 1036 .space 4096
1034_GLOBAL(swapper_pg_dir) 1037 .globl swapper_pg_dir
1038swapper_pg_dir:
1035 .space 4096 1039 .space 4096
1036 1040
1037/* Reserved 4k for the critical exception stack & 4k for the machine 1041/* Reserved 4k for the critical exception stack & 4k for the machine
@@ -1040,13 +1044,15 @@ _GLOBAL(swapper_pg_dir)
1040 .align 12 1044 .align 12
1041exception_stack_bottom: 1045exception_stack_bottom:
1042 .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS 1046 .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
1043_GLOBAL(exception_stack_top) 1047 .globl exception_stack_top
1048exception_stack_top:
1044 1049
1045/* 1050/*
1046 * This space gets a copy of optional info passed to us by the bootstrap 1051 * This space gets a copy of optional info passed to us by the bootstrap
1047 * which is used to pass parameters into the kernel like root=/dev/sda1, etc. 1052 * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
1048 */ 1053 */
1049_GLOBAL(cmd_line) 1054 .globl cmd_line
1055cmd_line:
1050 .space 512 1056 .space 512
1051 1057
1052/* 1058/*
@@ -1055,4 +1061,3 @@ _GLOBAL(cmd_line)
1055 */ 1061 */
1056abatron_pteptrs: 1062abatron_pteptrs:
1057 .space 8 1063 .space 8
1058
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index fba29c876b62..11e5b44713f7 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -32,6 +32,7 @@
32#include <asm/cache.h> 32#include <asm/cache.h>
33#include <asm/cputable.h> 33#include <asm/cputable.h>
34#include <asm/machdep.h> 34#include <asm/machdep.h>
35#include <asm/smp.h>
35 36
36void default_idle(void) 37void default_idle(void)
37{ 38{
@@ -74,7 +75,7 @@ void cpu_idle(void)
74/* 75/*
75 * Register the sysctl to set/clear powersave_nap. 76 * Register the sysctl to set/clear powersave_nap.
76 */ 77 */
77extern unsigned long powersave_nap; 78extern int powersave_nap;
78 79
79static ctl_table powersave_nap_ctl_table[]={ 80static ctl_table powersave_nap_ctl_table[]={
80 { 81 {
diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c
index 8843f3af230f..772e428aaa59 100644
--- a/arch/ppc/kernel/irq.c
+++ b/arch/ppc/kernel/irq.c
@@ -57,6 +57,7 @@
57#include <asm/cache.h> 57#include <asm/cache.h>
58#include <asm/prom.h> 58#include <asm/prom.h>
59#include <asm/ptrace.h> 59#include <asm/ptrace.h>
60#include <asm/machdep.h>
60 61
61#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 62#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
62 63
diff --git a/arch/ppc/kernel/l2cr.S b/arch/ppc/kernel/l2cr.S
index 861115249b35..d7f4e982b539 100644
--- a/arch/ppc/kernel/l2cr.S
+++ b/arch/ppc/kernel/l2cr.S
@@ -203,7 +203,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_SPEC7450)
203 * L1 icache 203 * L1 icache
204 */ 204 */
205 b 20f 205 b 20f
206 .balign L1_CACHE_LINE_SIZE 206 .balign L1_CACHE_BYTES
20722: 20722:
208 sync 208 sync
209 mtspr SPRN_L2CR,r3 209 mtspr SPRN_L2CR,r3
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 90d917d2e856..3056ede2424d 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -125,9 +125,8 @@ _GLOBAL(identify_cpu)
1251: 1251:
126 addis r6,r3,cur_cpu_spec@ha 126 addis r6,r3,cur_cpu_spec@ha
127 addi r6,r6,cur_cpu_spec@l 127 addi r6,r6,cur_cpu_spec@l
128 slwi r4,r4,2
129 sub r8,r8,r3 128 sub r8,r8,r3
130 stwx r8,r4,r6 129 stw r8,0(r6)
131 blr 130 blr
132 131
133/* 132/*
@@ -186,19 +185,18 @@ _GLOBAL(do_cpu_ftr_fixups)
186 * 185 *
187 * Setup function is called with: 186 * Setup function is called with:
188 * r3 = data offset 187 * r3 = data offset
189 * r4 = CPU number 188 * r4 = ptr to CPU spec (relocated)
190 * r5 = ptr to CPU spec (relocated)
191 */ 189 */
192_GLOBAL(call_setup_cpu) 190_GLOBAL(call_setup_cpu)
193 addis r5,r3,cur_cpu_spec@ha 191 addis r4,r3,cur_cpu_spec@ha
194 addi r5,r5,cur_cpu_spec@l 192 addi r4,r4,cur_cpu_spec@l
195 slwi r4,r24,2 193 lwz r4,0(r4)
196 lwzx r5,r4,r5 194 add r4,r4,r3
195 lwz r5,CPU_SPEC_SETUP(r4)
196 cmpi 0,r5,0
197 add r5,r5,r3 197 add r5,r5,r3
198 lwz r6,CPU_SPEC_SETUP(r5) 198 beqlr
199 add r6,r6,r3 199 mtctr r5
200 mtctr r6
201 mr r4,r24
202 bctr 200 bctr
203 201
204#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) 202#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
@@ -273,134 +271,6 @@ _GLOBAL(low_choose_7447a_dfs)
273 271
274#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ 272#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
275 273
276/* void local_save_flags_ptr(unsigned long *flags) */
277_GLOBAL(local_save_flags_ptr)
278 mfmsr r4
279 stw r4,0(r3)
280 blr
281 /*
282 * Need these nops here for taking over save/restore to
283 * handle lost intrs
284 * -- Cort
285 */
286 nop
287 nop
288 nop
289 nop
290 nop
291 nop
292 nop
293 nop
294 nop
295 nop
296 nop
297 nop
298 nop
299 nop
300 nop
301 nop
302 nop
303_GLOBAL(local_save_flags_ptr_end)
304
305/* void local_irq_restore(unsigned long flags) */
306_GLOBAL(local_irq_restore)
307/*
308 * Just set/clear the MSR_EE bit through restore/flags but do not
309 * change anything else. This is needed by the RT system and makes
310 * sense anyway.
311 * -- Cort
312 */
313 mfmsr r4
314 /* Copy all except the MSR_EE bit from r4 (current MSR value)
315 to r3. This is the sort of thing the rlwimi instruction is
316 designed for. -- paulus. */
317 rlwimi r3,r4,0,17,15
318 /* Check if things are setup the way we want _already_. */
319 cmpw 0,r3,r4
320 beqlr
3211: SYNC
322 mtmsr r3
323 SYNC
324 blr
325 nop
326 nop
327 nop
328 nop
329 nop
330 nop
331 nop
332 nop
333 nop
334 nop
335 nop
336 nop
337 nop
338 nop
339 nop
340 nop
341 nop
342 nop
343 nop
344_GLOBAL(local_irq_restore_end)
345
346_GLOBAL(local_irq_disable)
347 mfmsr r0 /* Get current interrupt state */
348 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
349 rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
350 SYNC /* Some chip revs have problems here... */
351 mtmsr r0 /* Update machine state */
352 blr /* Done */
353 /*
354 * Need these nops here for taking over save/restore to
355 * handle lost intrs
356 * -- Cort
357 */
358 nop
359 nop
360 nop
361 nop
362 nop
363 nop
364 nop
365 nop
366 nop
367 nop
368 nop
369 nop
370 nop
371 nop
372 nop
373_GLOBAL(local_irq_disable_end)
374
375_GLOBAL(local_irq_enable)
376 mfmsr r3 /* Get current state */
377 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
378 SYNC /* Some chip revs have problems here... */
379 mtmsr r3 /* Update machine state */
380 blr
381 /*
382 * Need these nops here for taking over save/restore to
383 * handle lost intrs
384 * -- Cort
385 */
386 nop
387 nop
388 nop
389 nop
390 nop
391 nop
392 nop
393 nop
394 nop
395 nop
396 nop
397 nop
398 nop
399 nop
400 nop
401 nop
402_GLOBAL(local_irq_enable_end)
403
404/* 274/*
405 * complement mask on the msr then "or" some values on. 275 * complement mask on the msr then "or" some values on.
406 * _nmask_and_or_msr(nmask, value_to_or) 276 * _nmask_and_or_msr(nmask, value_to_or)
@@ -628,21 +498,21 @@ _GLOBAL(flush_icache_range)
628BEGIN_FTR_SECTION 498BEGIN_FTR_SECTION
629 blr /* for 601, do nothing */ 499 blr /* for 601, do nothing */
630END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 500END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
631 li r5,L1_CACHE_LINE_SIZE-1 501 li r5,L1_CACHE_BYTES-1
632 andc r3,r3,r5 502 andc r3,r3,r5
633 subf r4,r3,r4 503 subf r4,r3,r4
634 add r4,r4,r5 504 add r4,r4,r5
635 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 505 srwi. r4,r4,L1_CACHE_SHIFT
636 beqlr 506 beqlr
637 mtctr r4 507 mtctr r4
638 mr r6,r3 508 mr r6,r3
6391: dcbst 0,r3 5091: dcbst 0,r3
640 addi r3,r3,L1_CACHE_LINE_SIZE 510 addi r3,r3,L1_CACHE_BYTES
641 bdnz 1b 511 bdnz 1b
642 sync /* wait for dcbst's to get to ram */ 512 sync /* wait for dcbst's to get to ram */
643 mtctr r4 513 mtctr r4
6442: icbi 0,r6 5142: icbi 0,r6
645 addi r6,r6,L1_CACHE_LINE_SIZE 515 addi r6,r6,L1_CACHE_BYTES
646 bdnz 2b 516 bdnz 2b
647 sync /* additional sync needed on g4 */ 517 sync /* additional sync needed on g4 */
648 isync 518 isync
@@ -655,16 +525,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
655 * clean_dcache_range(unsigned long start, unsigned long stop) 525 * clean_dcache_range(unsigned long start, unsigned long stop)
656 */ 526 */
657_GLOBAL(clean_dcache_range) 527_GLOBAL(clean_dcache_range)
658 li r5,L1_CACHE_LINE_SIZE-1 528 li r5,L1_CACHE_BYTES-1
659 andc r3,r3,r5 529 andc r3,r3,r5
660 subf r4,r3,r4 530 subf r4,r3,r4
661 add r4,r4,r5 531 add r4,r4,r5
662 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 532 srwi. r4,r4,L1_CACHE_SHIFT
663 beqlr 533 beqlr
664 mtctr r4 534 mtctr r4
665 535
6661: dcbst 0,r3 5361: dcbst 0,r3
667 addi r3,r3,L1_CACHE_LINE_SIZE 537 addi r3,r3,L1_CACHE_BYTES
668 bdnz 1b 538 bdnz 1b
669 sync /* wait for dcbst's to get to ram */ 539 sync /* wait for dcbst's to get to ram */
670 blr 540 blr
@@ -676,16 +546,16 @@ _GLOBAL(clean_dcache_range)
676 * flush_dcache_range(unsigned long start, unsigned long stop) 546 * flush_dcache_range(unsigned long start, unsigned long stop)
677 */ 547 */
678_GLOBAL(flush_dcache_range) 548_GLOBAL(flush_dcache_range)
679 li r5,L1_CACHE_LINE_SIZE-1 549 li r5,L1_CACHE_BYTES-1
680 andc r3,r3,r5 550 andc r3,r3,r5
681 subf r4,r3,r4 551 subf r4,r3,r4
682 add r4,r4,r5 552 add r4,r4,r5
683 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 553 srwi. r4,r4,L1_CACHE_SHIFT
684 beqlr 554 beqlr
685 mtctr r4 555 mtctr r4
686 556
6871: dcbf 0,r3 5571: dcbf 0,r3
688 addi r3,r3,L1_CACHE_LINE_SIZE 558 addi r3,r3,L1_CACHE_BYTES
689 bdnz 1b 559 bdnz 1b
690 sync /* wait for dcbst's to get to ram */ 560 sync /* wait for dcbst's to get to ram */
691 blr 561 blr
@@ -698,16 +568,16 @@ _GLOBAL(flush_dcache_range)
698 * invalidate_dcache_range(unsigned long start, unsigned long stop) 568 * invalidate_dcache_range(unsigned long start, unsigned long stop)
699 */ 569 */
700_GLOBAL(invalidate_dcache_range) 570_GLOBAL(invalidate_dcache_range)
701 li r5,L1_CACHE_LINE_SIZE-1 571 li r5,L1_CACHE_BYTES-1
702 andc r3,r3,r5 572 andc r3,r3,r5
703 subf r4,r3,r4 573 subf r4,r3,r4
704 add r4,r4,r5 574 add r4,r4,r5
705 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 575 srwi. r4,r4,L1_CACHE_SHIFT
706 beqlr 576 beqlr
707 mtctr r4 577 mtctr r4
708 578
7091: dcbi 0,r3 5791: dcbi 0,r3
710 addi r3,r3,L1_CACHE_LINE_SIZE 580 addi r3,r3,L1_CACHE_BYTES
711 bdnz 1b 581 bdnz 1b
712 sync /* wait for dcbi's to get to ram */ 582 sync /* wait for dcbi's to get to ram */
713 blr 583 blr
@@ -728,7 +598,7 @@ _GLOBAL(flush_dcache_all)
728 mtctr r4 598 mtctr r4
729 lis r5, KERNELBASE@h 599 lis r5, KERNELBASE@h
7301: lwz r3, 0(r5) /* Load one word from every line */ 6001: lwz r3, 0(r5) /* Load one word from every line */
731 addi r5, r5, L1_CACHE_LINE_SIZE 601 addi r5, r5, L1_CACHE_BYTES
732 bdnz 1b 602 bdnz 1b
733 blr 603 blr
734#endif /* CONFIG_NOT_COHERENT_CACHE */ 604#endif /* CONFIG_NOT_COHERENT_CACHE */
@@ -746,16 +616,16 @@ BEGIN_FTR_SECTION
746 blr /* for 601, do nothing */ 616 blr /* for 601, do nothing */
747END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 617END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
748 rlwinm r3,r3,0,0,19 /* Get page base address */ 618 rlwinm r3,r3,0,0,19 /* Get page base address */
749 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ 619 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
750 mtctr r4 620 mtctr r4
751 mr r6,r3 621 mr r6,r3
7520: dcbst 0,r3 /* Write line to ram */ 6220: dcbst 0,r3 /* Write line to ram */
753 addi r3,r3,L1_CACHE_LINE_SIZE 623 addi r3,r3,L1_CACHE_BYTES
754 bdnz 0b 624 bdnz 0b
755 sync 625 sync
756 mtctr r4 626 mtctr r4
7571: icbi 0,r6 6271: icbi 0,r6
758 addi r6,r6,L1_CACHE_LINE_SIZE 628 addi r6,r6,L1_CACHE_BYTES
759 bdnz 1b 629 bdnz 1b
760 sync 630 sync
761 isync 631 isync
@@ -778,16 +648,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
778 mtmsr r0 648 mtmsr r0
779 isync 649 isync
780 rlwinm r3,r3,0,0,19 /* Get page base address */ 650 rlwinm r3,r3,0,0,19 /* Get page base address */
781 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ 651 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
782 mtctr r4 652 mtctr r4
783 mr r6,r3 653 mr r6,r3
7840: dcbst 0,r3 /* Write line to ram */ 6540: dcbst 0,r3 /* Write line to ram */
785 addi r3,r3,L1_CACHE_LINE_SIZE 655 addi r3,r3,L1_CACHE_BYTES
786 bdnz 0b 656 bdnz 0b
787 sync 657 sync
788 mtctr r4 658 mtctr r4
7891: icbi 0,r6 6591: icbi 0,r6
790 addi r6,r6,L1_CACHE_LINE_SIZE 660 addi r6,r6,L1_CACHE_BYTES
791 bdnz 1b 661 bdnz 1b
792 sync 662 sync
793 mtmsr r10 /* restore DR */ 663 mtmsr r10 /* restore DR */
@@ -802,7 +672,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
802 * void clear_pages(void *page, int order) ; 672 * void clear_pages(void *page, int order) ;
803 */ 673 */
804_GLOBAL(clear_pages) 674_GLOBAL(clear_pages)
805 li r0,4096/L1_CACHE_LINE_SIZE 675 li r0,4096/L1_CACHE_BYTES
806 slw r0,r0,r4 676 slw r0,r0,r4
807 mtctr r0 677 mtctr r0
808#ifdef CONFIG_8xx 678#ifdef CONFIG_8xx
@@ -814,7 +684,7 @@ _GLOBAL(clear_pages)
814#else 684#else
8151: dcbz 0,r3 6851: dcbz 0,r3
816#endif 686#endif
817 addi r3,r3,L1_CACHE_LINE_SIZE 687 addi r3,r3,L1_CACHE_BYTES
818 bdnz 1b 688 bdnz 1b
819 blr 689 blr
820 690
@@ -840,7 +710,7 @@ _GLOBAL(copy_page)
840 710
841#ifdef CONFIG_8xx 711#ifdef CONFIG_8xx
842 /* don't use prefetch on 8xx */ 712 /* don't use prefetch on 8xx */
843 li r0,4096/L1_CACHE_LINE_SIZE 713 li r0,4096/L1_CACHE_BYTES
844 mtctr r0 714 mtctr r0
8451: COPY_16_BYTES 7151: COPY_16_BYTES
846 bdnz 1b 716 bdnz 1b
@@ -854,13 +724,13 @@ _GLOBAL(copy_page)
854 li r11,4 724 li r11,4
855 mtctr r0 725 mtctr r0
85611: dcbt r11,r4 72611: dcbt r11,r4
857 addi r11,r11,L1_CACHE_LINE_SIZE 727 addi r11,r11,L1_CACHE_BYTES
858 bdnz 11b 728 bdnz 11b
859#else /* MAX_COPY_PREFETCH == 1 */ 729#else /* MAX_COPY_PREFETCH == 1 */
860 dcbt r5,r4 730 dcbt r5,r4
861 li r11,L1_CACHE_LINE_SIZE+4 731 li r11,L1_CACHE_BYTES+4
862#endif /* MAX_COPY_PREFETCH */ 732#endif /* MAX_COPY_PREFETCH */
863 li r0,4096/L1_CACHE_LINE_SIZE - MAX_COPY_PREFETCH 733 li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
864 crclr 4*cr0+eq 734 crclr 4*cr0+eq
8652: 7352:
866 mtctr r0 736 mtctr r0
@@ -868,12 +738,12 @@ _GLOBAL(copy_page)
868 dcbt r11,r4 738 dcbt r11,r4
869 dcbz r5,r3 739 dcbz r5,r3
870 COPY_16_BYTES 740 COPY_16_BYTES
871#if L1_CACHE_LINE_SIZE >= 32 741#if L1_CACHE_BYTES >= 32
872 COPY_16_BYTES 742 COPY_16_BYTES
873#if L1_CACHE_LINE_SIZE >= 64 743#if L1_CACHE_BYTES >= 64
874 COPY_16_BYTES 744 COPY_16_BYTES
875 COPY_16_BYTES 745 COPY_16_BYTES
876#if L1_CACHE_LINE_SIZE >= 128 746#if L1_CACHE_BYTES >= 128
877 COPY_16_BYTES 747 COPY_16_BYTES
878 COPY_16_BYTES 748 COPY_16_BYTES
879 COPY_16_BYTES 749 COPY_16_BYTES
@@ -1098,33 +968,6 @@ _GLOBAL(_get_SP)
1098 blr 968 blr
1099 969
1100/* 970/*
1101 * These are used in the alignment trap handler when emulating
1102 * single-precision loads and stores.
1103 * We restore and save the fpscr so the task gets the same result
1104 * and exceptions as if the cpu had performed the load or store.
1105 */
1106
1107#ifdef CONFIG_PPC_FPU
1108_GLOBAL(cvt_fd)
1109 lfd 0,-4(r5) /* load up fpscr value */
1110 mtfsf 0xff,0
1111 lfs 0,0(r3)
1112 stfd 0,0(r4)
1113 mffs 0 /* save new fpscr value */
1114 stfd 0,-4(r5)
1115 blr
1116
1117_GLOBAL(cvt_df)
1118 lfd 0,-4(r5) /* load up fpscr value */
1119 mtfsf 0xff,0
1120 lfd 0,0(r3)
1121 stfs 0,0(r4)
1122 mffs 0 /* save new fpscr value */
1123 stfd 0,-4(r5)
1124 blr
1125#endif
1126
1127/*
1128 * Create a kernel thread 971 * Create a kernel thread
1129 * kernel_thread(fn, arg, flags) 972 * kernel_thread(fn, arg, flags)
1130 */ 973 */
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 854e45beb387..e8f4e576750a 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -21,6 +21,7 @@
21#include <asm/byteorder.h> 21#include <asm/byteorder.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/uaccess.h> 23#include <asm/uaccess.h>
24#include <asm/machdep.h>
24 25
25#undef DEBUG 26#undef DEBUG
26 27
@@ -53,7 +54,7 @@ static u8* pci_to_OF_bus_map;
53/* By default, we don't re-assign bus numbers. We do this only on 54/* By default, we don't re-assign bus numbers. We do this only on
54 * some pmacs 55 * some pmacs
55 */ 56 */
56int pci_assign_all_busses; 57int pci_assign_all_buses;
57 58
58struct pci_controller* hose_head; 59struct pci_controller* hose_head;
59struct pci_controller** hose_tail = &hose_head; 60struct pci_controller** hose_tail = &hose_head;
@@ -644,7 +645,7 @@ pcibios_alloc_controller(void)
644/* 645/*
645 * Functions below are used on OpenFirmware machines. 646 * Functions below are used on OpenFirmware machines.
646 */ 647 */
647static void __openfirmware 648static void
648make_one_node_map(struct device_node* node, u8 pci_bus) 649make_one_node_map(struct device_node* node, u8 pci_bus)
649{ 650{
650 int *bus_range; 651 int *bus_range;
@@ -678,7 +679,7 @@ make_one_node_map(struct device_node* node, u8 pci_bus)
678 } 679 }
679} 680}
680 681
681void __openfirmware 682void
682pcibios_make_OF_bus_map(void) 683pcibios_make_OF_bus_map(void)
683{ 684{
684 int i; 685 int i;
@@ -720,7 +721,7 @@ pcibios_make_OF_bus_map(void)
720 721
721typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); 722typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
722 723
723static struct device_node* __openfirmware 724static struct device_node*
724scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data) 725scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
725{ 726{
726 struct device_node* sub_node; 727 struct device_node* sub_node;
@@ -761,7 +762,7 @@ scan_OF_pci_childs_iterator(struct device_node* node, void* data)
761 return 0; 762 return 0;
762} 763}
763 764
764static struct device_node* __openfirmware 765static struct device_node*
765scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn) 766scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn)
766{ 767{
767 u8 filter_data[2] = {bus, dev_fn}; 768 u8 filter_data[2] = {bus, dev_fn};
@@ -813,18 +814,20 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
813 /* Now, lookup childs of the hose */ 814 /* Now, lookup childs of the hose */
814 return scan_OF_childs_for_device(node->child, busnr, devfn); 815 return scan_OF_childs_for_device(node->child, busnr, devfn);
815} 816}
817EXPORT_SYMBOL(pci_busdev_to_OF_node);
816 818
817struct device_node* 819struct device_node*
818pci_device_to_OF_node(struct pci_dev *dev) 820pci_device_to_OF_node(struct pci_dev *dev)
819{ 821{
820 return pci_busdev_to_OF_node(dev->bus, dev->devfn); 822 return pci_busdev_to_OF_node(dev->bus, dev->devfn);
821} 823}
824EXPORT_SYMBOL(pci_device_to_OF_node);
822 825
823/* This routine is meant to be used early during boot, when the 826/* This routine is meant to be used early during boot, when the
824 * PCI bus numbers have not yet been assigned, and you need to 827 * PCI bus numbers have not yet been assigned, and you need to
825 * issue PCI config cycles to an OF device. 828 * issue PCI config cycles to an OF device.
826 * It could also be used to "fix" RTAS config cycles if you want 829 * It could also be used to "fix" RTAS config cycles if you want
827 * to set pci_assign_all_busses to 1 and still use RTAS for PCI 830 * to set pci_assign_all_buses to 1 and still use RTAS for PCI
828 * config cycles. 831 * config cycles.
829 */ 832 */
830struct pci_controller* 833struct pci_controller*
@@ -842,7 +845,7 @@ pci_find_hose_for_OF_device(struct device_node* node)
842 return NULL; 845 return NULL;
843} 846}
844 847
845static int __openfirmware 848static int
846find_OF_pci_device_filter(struct device_node* node, void* data) 849find_OF_pci_device_filter(struct device_node* node, void* data)
847{ 850{
848 return ((void *)node == data); 851 return ((void *)node == data);
@@ -890,6 +893,7 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
890 } 893 }
891 return -ENODEV; 894 return -ENODEV;
892} 895}
896EXPORT_SYMBOL(pci_device_from_OF_node);
893 897
894void __init 898void __init
895pci_process_bridge_OF_ranges(struct pci_controller *hose, 899pci_process_bridge_OF_ranges(struct pci_controller *hose,
@@ -1030,6 +1034,10 @@ static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *att
1030} 1034}
1031static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL); 1035static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
1032 1036
1037#else /* CONFIG_PPC_OF */
1038void pcibios_make_OF_bus_map(void)
1039{
1040}
1033#endif /* CONFIG_PPC_OF */ 1041#endif /* CONFIG_PPC_OF */
1034 1042
1035/* Add sysfs properties */ 1043/* Add sysfs properties */
@@ -1262,12 +1270,12 @@ pcibios_init(void)
1262 1270
1263 /* Scan all of the recorded PCI controllers. */ 1271 /* Scan all of the recorded PCI controllers. */
1264 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) { 1272 for (next_busno = 0, hose = hose_head; hose; hose = hose->next) {
1265 if (pci_assign_all_busses) 1273 if (pci_assign_all_buses)
1266 hose->first_busno = next_busno; 1274 hose->first_busno = next_busno;
1267 hose->last_busno = 0xff; 1275 hose->last_busno = 0xff;
1268 bus = pci_scan_bus(hose->first_busno, hose->ops, hose); 1276 bus = pci_scan_bus(hose->first_busno, hose->ops, hose);
1269 hose->last_busno = bus->subordinate; 1277 hose->last_busno = bus->subordinate;
1270 if (pci_assign_all_busses || next_busno <= hose->last_busno) 1278 if (pci_assign_all_buses || next_busno <= hose->last_busno)
1271 next_busno = hose->last_busno + pcibios_assign_bus_offset; 1279 next_busno = hose->last_busno + pcibios_assign_bus_offset;
1272 } 1280 }
1273 pci_bus_count = next_busno; 1281 pci_bus_count = next_busno;
@@ -1276,7 +1284,7 @@ pcibios_init(void)
1276 * numbers vs. kernel bus numbers since we may have to 1284 * numbers vs. kernel bus numbers since we may have to
1277 * remap them. 1285 * remap them.
1278 */ 1286 */
1279 if (pci_assign_all_busses && have_of) 1287 if (pci_assign_all_buses && have_of)
1280 pcibios_make_OF_bus_map(); 1288 pcibios_make_OF_bus_map();
1281 1289
1282 /* Do machine dependent PCI interrupt routing */ 1290 /* Do machine dependent PCI interrupt routing */
@@ -1586,16 +1594,17 @@ static pgprot_t __pci_mmap_set_pgprot(struct pci_dev *dev, struct resource *rp,
1586 * above routine 1594 * above routine
1587 */ 1595 */
1588pgprot_t pci_phys_mem_access_prot(struct file *file, 1596pgprot_t pci_phys_mem_access_prot(struct file *file,
1589 unsigned long offset, 1597 unsigned long pfn,
1590 unsigned long size, 1598 unsigned long size,
1591 pgprot_t protection) 1599 pgprot_t protection)
1592{ 1600{
1593 struct pci_dev *pdev = NULL; 1601 struct pci_dev *pdev = NULL;
1594 struct resource *found = NULL; 1602 struct resource *found = NULL;
1595 unsigned long prot = pgprot_val(protection); 1603 unsigned long prot = pgprot_val(protection);
1604 unsigned long offset = pfn << PAGE_SHIFT;
1596 int i; 1605 int i;
1597 1606
1598 if (page_is_ram(offset >> PAGE_SHIFT)) 1607 if (page_is_ram(pfn))
1599 return prot; 1608 return prot;
1600 1609
1601 prot |= _PAGE_NO_CACHE | _PAGE_GUARDED; 1610 prot |= _PAGE_NO_CACHE | _PAGE_GUARDED;
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
deleted file mode 100644
index 22df9a596a0f..000000000000
--- a/arch/ppc/kernel/perfmon.c
+++ /dev/null
@@ -1,96 +0,0 @@
1/* kernel/perfmon.c
2 * PPC 32 Performance Monitor Infrastructure
3 *
4 * Author: Andy Fleming
5 * Copyright (c) 2004 Freescale Semiconductor, Inc
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/errno.h>
14#include <linux/sched.h>
15#include <linux/kernel.h>
16#include <linux/mm.h>
17#include <linux/stddef.h>
18#include <linux/unistd.h>
19#include <linux/ptrace.h>
20#include <linux/slab.h>
21#include <linux/user.h>
22#include <linux/a.out.h>
23#include <linux/interrupt.h>
24#include <linux/config.h>
25#include <linux/init.h>
26#include <linux/module.h>
27#include <linux/prctl.h>
28
29#include <asm/pgtable.h>
30#include <asm/uaccess.h>
31#include <asm/system.h>
32#include <asm/io.h>
33#include <asm/reg.h>
34#include <asm/xmon.h>
35
36/* A lock to regulate grabbing the interrupt */
37DEFINE_SPINLOCK(perfmon_lock);
38
39#if defined (CONFIG_FSL_BOOKE) && !defined (CONFIG_E200)
40static void dummy_perf(struct pt_regs *regs)
41{
42 unsigned int pmgc0 = mfpmr(PMRN_PMGC0);
43
44 pmgc0 &= ~PMGC0_PMIE;
45 mtpmr(PMRN_PMGC0, pmgc0);
46}
47
48#elif defined(CONFIG_6xx)
49/* Ensure exceptions are disabled */
50static void dummy_perf(struct pt_regs *regs)
51{
52 unsigned int mmcr0 = mfspr(SPRN_MMCR0);
53
54 mmcr0 &= ~MMCR0_PMXE;
55 mtspr(SPRN_MMCR0, mmcr0);
56}
57#else
58static void dummy_perf(struct pt_regs *regs)
59{
60}
61#endif
62
63void (*perf_irq)(struct pt_regs *) = dummy_perf;
64
65/* Grab the interrupt, if it's free.
66 * Returns 0 on success, -1 if the interrupt is taken already */
67int request_perfmon_irq(void (*handler)(struct pt_regs *))
68{
69 int err = 0;
70
71 spin_lock(&perfmon_lock);
72
73 if (perf_irq == dummy_perf)
74 perf_irq = handler;
75 else {
76 pr_info("perfmon irq already handled by %p\n", perf_irq);
77 err = -1;
78 }
79
80 spin_unlock(&perfmon_lock);
81
82 return err;
83}
84
85void free_perfmon_irq(void)
86{
87 spin_lock(&perfmon_lock);
88
89 perf_irq = dummy_perf;
90
91 spin_unlock(&perfmon_lock);
92}
93
94EXPORT_SYMBOL(perf_irq);
95EXPORT_SYMBOL(request_perfmon_irq);
96EXPORT_SYMBOL(free_perfmon_irq);
diff --git a/arch/ppc/kernel/perfmon_fsl_booke.c b/arch/ppc/kernel/perfmon_fsl_booke.c
index 03526bfb0840..32455dfcc36b 100644
--- a/arch/ppc/kernel/perfmon_fsl_booke.c
+++ b/arch/ppc/kernel/perfmon_fsl_booke.c
@@ -32,7 +32,7 @@
32#include <asm/io.h> 32#include <asm/io.h>
33#include <asm/reg.h> 33#include <asm/reg.h>
34#include <asm/xmon.h> 34#include <asm/xmon.h>
35#include <asm/perfmon.h> 35#include <asm/pmc.h>
36 36
37static inline u32 get_pmlca(int ctr); 37static inline u32 get_pmlca(int ctr);
38static inline void set_pmlca(int ctr, u32 pmlca); 38static inline void set_pmlca(int ctr, u32 pmlca);
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 88f6bb7b6964..ae24196d78f6 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -53,10 +53,10 @@
53 53
54extern void transfer_to_handler(void); 54extern void transfer_to_handler(void);
55extern void do_IRQ(struct pt_regs *regs); 55extern void do_IRQ(struct pt_regs *regs);
56extern void MachineCheckException(struct pt_regs *regs); 56extern void machine_check_exception(struct pt_regs *regs);
57extern void AlignmentException(struct pt_regs *regs); 57extern void alignment_exception(struct pt_regs *regs);
58extern void ProgramCheckException(struct pt_regs *regs); 58extern void program_check_exception(struct pt_regs *regs);
59extern void SingleStepException(struct pt_regs *regs); 59extern void single_step_exception(struct pt_regs *regs);
60extern int do_signal(sigset_t *, struct pt_regs *); 60extern int do_signal(sigset_t *, struct pt_regs *);
61extern int pmac_newworld; 61extern int pmac_newworld;
62extern int sys_sigreturn(struct pt_regs *regs); 62extern int sys_sigreturn(struct pt_regs *regs);
@@ -72,10 +72,10 @@ EXPORT_SYMBOL(clear_user_page);
72EXPORT_SYMBOL(do_signal); 72EXPORT_SYMBOL(do_signal);
73EXPORT_SYMBOL(transfer_to_handler); 73EXPORT_SYMBOL(transfer_to_handler);
74EXPORT_SYMBOL(do_IRQ); 74EXPORT_SYMBOL(do_IRQ);
75EXPORT_SYMBOL(MachineCheckException); 75EXPORT_SYMBOL(machine_check_exception);
76EXPORT_SYMBOL(AlignmentException); 76EXPORT_SYMBOL(alignment_exception);
77EXPORT_SYMBOL(ProgramCheckException); 77EXPORT_SYMBOL(program_check_exception);
78EXPORT_SYMBOL(SingleStepException); 78EXPORT_SYMBOL(single_step_exception);
79EXPORT_SYMBOL(sys_sigreturn); 79EXPORT_SYMBOL(sys_sigreturn);
80EXPORT_SYMBOL(ppc_n_lost_interrupts); 80EXPORT_SYMBOL(ppc_n_lost_interrupts);
81EXPORT_SYMBOL(ppc_lost_interrupts); 81EXPORT_SYMBOL(ppc_lost_interrupts);
@@ -230,9 +230,6 @@ EXPORT_SYMBOL(find_all_nodes);
230EXPORT_SYMBOL(get_property); 230EXPORT_SYMBOL(get_property);
231EXPORT_SYMBOL(request_OF_resource); 231EXPORT_SYMBOL(request_OF_resource);
232EXPORT_SYMBOL(release_OF_resource); 232EXPORT_SYMBOL(release_OF_resource);
233EXPORT_SYMBOL(pci_busdev_to_OF_node);
234EXPORT_SYMBOL(pci_device_to_OF_node);
235EXPORT_SYMBOL(pci_device_from_OF_node);
236EXPORT_SYMBOL(of_find_node_by_name); 233EXPORT_SYMBOL(of_find_node_by_name);
237EXPORT_SYMBOL(of_find_node_by_type); 234EXPORT_SYMBOL(of_find_node_by_type);
238EXPORT_SYMBOL(of_find_compatible_node); 235EXPORT_SYMBOL(of_find_compatible_node);
@@ -272,16 +269,6 @@ EXPORT_SYMBOL(screen_info);
272#endif 269#endif
273 270
274EXPORT_SYMBOL(__delay); 271EXPORT_SYMBOL(__delay);
275#ifndef INLINE_IRQS
276EXPORT_SYMBOL(local_irq_enable);
277EXPORT_SYMBOL(local_irq_enable_end);
278EXPORT_SYMBOL(local_irq_disable);
279EXPORT_SYMBOL(local_irq_disable_end);
280EXPORT_SYMBOL(local_save_flags_ptr);
281EXPORT_SYMBOL(local_save_flags_ptr_end);
282EXPORT_SYMBOL(local_irq_restore);
283EXPORT_SYMBOL(local_irq_restore_end);
284#endif
285EXPORT_SYMBOL(timer_interrupt); 272EXPORT_SYMBOL(timer_interrupt);
286EXPORT_SYMBOL(irq_desc); 273EXPORT_SYMBOL(irq_desc);
287EXPORT_SYMBOL(tb_ticks_per_jiffy); 274EXPORT_SYMBOL(tb_ticks_per_jiffy);
@@ -335,11 +322,6 @@ EXPORT_SYMBOL(mmu_hash_lock); /* For MOL */
335extern long *intercept_table; 322extern long *intercept_table;
336EXPORT_SYMBOL(intercept_table); 323EXPORT_SYMBOL(intercept_table);
337#endif /* CONFIG_PPC_STD_MMU */ 324#endif /* CONFIG_PPC_STD_MMU */
338EXPORT_SYMBOL(cur_cpu_spec);
339#ifdef CONFIG_PPC_PMAC
340extern unsigned long agp_special_page;
341EXPORT_SYMBOL(agp_special_page);
342#endif
343#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 325#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
344EXPORT_SYMBOL(__mtdcr); 326EXPORT_SYMBOL(__mtdcr);
345EXPORT_SYMBOL(__mfdcr); 327EXPORT_SYMBOL(__mfdcr);
diff --git a/arch/ppc/kernel/process.c b/arch/ppc/kernel/process.c
index 82de66e4db6d..cb1c7b92f8c6 100644
--- a/arch/ppc/kernel/process.c
+++ b/arch/ppc/kernel/process.c
@@ -152,18 +152,66 @@ int check_stack(struct task_struct *tsk)
152} 152}
153#endif /* defined(CHECK_STACK) */ 153#endif /* defined(CHECK_STACK) */
154 154
155#ifdef CONFIG_ALTIVEC 155/*
156int 156 * Make sure the floating-point register state in the
157dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs) 157 * the thread_struct is up to date for task tsk.
158 */
159void flush_fp_to_thread(struct task_struct *tsk)
158{ 160{
159 if (regs->msr & MSR_VEC) 161 if (tsk->thread.regs) {
160 giveup_altivec(current); 162 /*
161 memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs)); 163 * We need to disable preemption here because if we didn't,
164 * another process could get scheduled after the regs->msr
165 * test but before we have finished saving the FP registers
166 * to the thread_struct. That process could take over the
167 * FPU, and then when we get scheduled again we would store
168 * bogus values for the remaining FP registers.
169 */
170 preempt_disable();
171 if (tsk->thread.regs->msr & MSR_FP) {
172#ifdef CONFIG_SMP
173 /*
174 * This should only ever be called for current or
175 * for a stopped child process. Since we save away
176 * the FP register state on context switch on SMP,
177 * there is something wrong if a stopped child appears
178 * to still have its FP state in the CPU registers.
179 */
180 BUG_ON(tsk != current);
181#endif
182 giveup_fpu(current);
183 }
184 preempt_enable();
185 }
186}
187
188void enable_kernel_fp(void)
189{
190 WARN_ON(preemptible());
191
192#ifdef CONFIG_SMP
193 if (current->thread.regs && (current->thread.regs->msr & MSR_FP))
194 giveup_fpu(current);
195 else
196 giveup_fpu(NULL); /* just enables FP for kernel */
197#else
198 giveup_fpu(last_task_used_math);
199#endif /* CONFIG_SMP */
200}
201EXPORT_SYMBOL(enable_kernel_fp);
202
203int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
204{
205 preempt_disable();
206 if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP))
207 giveup_fpu(tsk);
208 preempt_enable();
209 memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
162 return 1; 210 return 1;
163} 211}
164 212
165void 213#ifdef CONFIG_ALTIVEC
166enable_kernel_altivec(void) 214void enable_kernel_altivec(void)
167{ 215{
168 WARN_ON(preemptible()); 216 WARN_ON(preemptible());
169 217
@@ -177,19 +225,35 @@ enable_kernel_altivec(void)
177#endif /* __SMP __ */ 225#endif /* __SMP __ */
178} 226}
179EXPORT_SYMBOL(enable_kernel_altivec); 227EXPORT_SYMBOL(enable_kernel_altivec);
180#endif /* CONFIG_ALTIVEC */
181 228
182#ifdef CONFIG_SPE 229/*
183int 230 * Make sure the VMX/Altivec register state in the
184dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs) 231 * the thread_struct is up to date for task tsk.
232 */
233void flush_altivec_to_thread(struct task_struct *tsk)
185{ 234{
186 if (regs->msr & MSR_SPE) 235 if (tsk->thread.regs) {
187 giveup_spe(current); 236 preempt_disable();
188 /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */ 237 if (tsk->thread.regs->msr & MSR_VEC) {
189 memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35); 238#ifdef CONFIG_SMP
239 BUG_ON(tsk != current);
240#endif
241 giveup_altivec(current);
242 }
243 preempt_enable();
244 }
245}
246
247int dump_altivec(struct pt_regs *regs, elf_vrregset_t *vrregs)
248{
249 if (regs->msr & MSR_VEC)
250 giveup_altivec(current);
251 memcpy(vrregs, &current->thread.vr[0], sizeof(*vrregs));
190 return 1; 252 return 1;
191} 253}
254#endif /* CONFIG_ALTIVEC */
192 255
256#ifdef CONFIG_SPE
193void 257void
194enable_kernel_spe(void) 258enable_kernel_spe(void)
195{ 259{
@@ -205,34 +269,30 @@ enable_kernel_spe(void)
205#endif /* __SMP __ */ 269#endif /* __SMP __ */
206} 270}
207EXPORT_SYMBOL(enable_kernel_spe); 271EXPORT_SYMBOL(enable_kernel_spe);
208#endif /* CONFIG_SPE */
209 272
210void 273void flush_spe_to_thread(struct task_struct *tsk)
211enable_kernel_fp(void)
212{ 274{
213 WARN_ON(preemptible()); 275 if (tsk->thread.regs) {
214 276 preempt_disable();
277 if (tsk->thread.regs->msr & MSR_SPE) {
215#ifdef CONFIG_SMP 278#ifdef CONFIG_SMP
216 if (current->thread.regs && (current->thread.regs->msr & MSR_FP)) 279 BUG_ON(tsk != current);
217 giveup_fpu(current); 280#endif
218 else 281 giveup_spe(current);
219 giveup_fpu(NULL); /* just enables FP for kernel */ 282 }
220#else 283 preempt_enable();
221 giveup_fpu(last_task_used_math); 284 }
222#endif /* CONFIG_SMP */
223} 285}
224EXPORT_SYMBOL(enable_kernel_fp);
225 286
226int 287int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
227dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
228{ 288{
229 preempt_disable(); 289 if (regs->msr & MSR_SPE)
230 if (tsk->thread.regs && (tsk->thread.regs->msr & MSR_FP)) 290 giveup_spe(current);
231 giveup_fpu(tsk); 291 /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
232 preempt_enable(); 292 memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
233 memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
234 return 1; 293 return 1;
235} 294}
295#endif /* CONFIG_SPE */
236 296
237struct task_struct *__switch_to(struct task_struct *prev, 297struct task_struct *__switch_to(struct task_struct *prev,
238 struct task_struct *new) 298 struct task_struct *new)
@@ -287,11 +347,13 @@ struct task_struct *__switch_to(struct task_struct *prev,
287#endif /* CONFIG_SPE */ 347#endif /* CONFIG_SPE */
288#endif /* CONFIG_SMP */ 348#endif /* CONFIG_SMP */
289 349
350#ifdef CONFIG_ALTIVEC
290 /* Avoid the trap. On smp this this never happens since 351 /* Avoid the trap. On smp this this never happens since
291 * we don't set last_task_used_altivec -- Cort 352 * we don't set last_task_used_altivec -- Cort
292 */ 353 */
293 if (new->thread.regs && last_task_used_altivec == new) 354 if (new->thread.regs && last_task_used_altivec == new)
294 new->thread.regs->msr |= MSR_VEC; 355 new->thread.regs->msr |= MSR_VEC;
356#endif
295#ifdef CONFIG_SPE 357#ifdef CONFIG_SPE
296 /* Avoid the trap. On smp this this never happens since 358 /* Avoid the trap. On smp this this never happens since
297 * we don't set last_task_used_spe 359 * we don't set last_task_used_spe
@@ -482,7 +544,7 @@ void start_thread(struct pt_regs *regs, unsigned long nip, unsigned long sp)
482 last_task_used_spe = NULL; 544 last_task_used_spe = NULL;
483#endif 545#endif
484 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 546 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
485 current->thread.fpscr = 0; 547 current->thread.fpscr.val = 0;
486#ifdef CONFIG_ALTIVEC 548#ifdef CONFIG_ALTIVEC
487 memset(current->thread.vr, 0, sizeof(current->thread.vr)); 549 memset(current->thread.vr, 0, sizeof(current->thread.vr));
488 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr)); 550 memset(&current->thread.vscr, 0, sizeof(current->thread.vscr));
@@ -557,14 +619,16 @@ int sys_clone(unsigned long clone_flags, unsigned long usp,
557 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); 619 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
558} 620}
559 621
560int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6, 622int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
623 unsigned long p4, unsigned long p5, unsigned long p6,
561 struct pt_regs *regs) 624 struct pt_regs *regs)
562{ 625{
563 CHECK_FULL_REGS(regs); 626 CHECK_FULL_REGS(regs);
564 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); 627 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
565} 628}
566 629
567int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6, 630int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
631 unsigned long p4, unsigned long p5, unsigned long p6,
568 struct pt_regs *regs) 632 struct pt_regs *regs)
569{ 633{
570 CHECK_FULL_REGS(regs); 634 CHECK_FULL_REGS(regs);
diff --git a/arch/ppc/kernel/ptrace.c b/arch/ppc/kernel/ptrace.c
deleted file mode 100644
index e2744b6879da..000000000000
--- a/arch/ppc/kernel/ptrace.c
+++ /dev/null
@@ -1,507 +0,0 @@
1/*
2 * arch/ppc/kernel/ptrace.c
3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Derived from "arch/m68k/kernel/ptrace.c"
8 * Copyright (C) 1994 by Hamish Macdonald
9 * Taken from linux/kernel/ptrace.c and modified for M680x0.
10 * linux/kernel/ptrace.c is by Ross Biro 1/23/92, edited by Linus Torvalds
11 *
12 * Modified by Cort Dougan (cort@hq.fsmlabs.com)
13 * and Paul Mackerras (paulus@linuxcare.com.au).
14 *
15 * This file is subject to the terms and conditions of the GNU General
16 * Public License. See the file README.legal in the main directory of
17 * this archive for more details.
18 */
19
20#include <linux/kernel.h>
21#include <linux/sched.h>
22#include <linux/mm.h>
23#include <linux/smp.h>
24#include <linux/smp_lock.h>
25#include <linux/errno.h>
26#include <linux/ptrace.h>
27#include <linux/user.h>
28#include <linux/security.h>
29#include <linux/signal.h>
30#include <linux/seccomp.h>
31#include <linux/audit.h>
32#include <linux/module.h>
33
34#include <asm/uaccess.h>
35#include <asm/page.h>
36#include <asm/pgtable.h>
37#include <asm/system.h>
38
39/*
40 * Set of msr bits that gdb can change on behalf of a process.
41 */
42#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
43#define MSR_DEBUGCHANGE 0
44#else
45#define MSR_DEBUGCHANGE (MSR_SE | MSR_BE)
46#endif
47
48/*
49 * does not yet catch signals sent when the child dies.
50 * in exit.c or in signal.c.
51 */
52
53/*
54 * Get contents of register REGNO in task TASK.
55 */
56static inline unsigned long get_reg(struct task_struct *task, int regno)
57{
58 if (regno < sizeof(struct pt_regs) / sizeof(unsigned long)
59 && task->thread.regs != NULL)
60 return ((unsigned long *)task->thread.regs)[regno];
61 return (0);
62}
63
64/*
65 * Write contents of register REGNO in task TASK.
66 */
67static inline int put_reg(struct task_struct *task, int regno,
68 unsigned long data)
69{
70 if (regno <= PT_MQ && task->thread.regs != NULL) {
71 if (regno == PT_MSR)
72 data = (data & MSR_DEBUGCHANGE)
73 | (task->thread.regs->msr & ~MSR_DEBUGCHANGE);
74 ((unsigned long *)task->thread.regs)[regno] = data;
75 return 0;
76 }
77 return -EIO;
78}
79
80#ifdef CONFIG_ALTIVEC
81/*
82 * Get contents of AltiVec register state in task TASK
83 */
84static inline int get_vrregs(unsigned long __user *data, struct task_struct *task)
85{
86 int i, j;
87
88 if (!access_ok(VERIFY_WRITE, data, 133 * sizeof(unsigned long)))
89 return -EFAULT;
90
91 /* copy AltiVec registers VR[0] .. VR[31] */
92 for (i = 0; i < 32; i++)
93 for (j = 0; j < 4; j++, data++)
94 if (__put_user(task->thread.vr[i].u[j], data))
95 return -EFAULT;
96
97 /* copy VSCR */
98 for (i = 0; i < 4; i++, data++)
99 if (__put_user(task->thread.vscr.u[i], data))
100 return -EFAULT;
101
102 /* copy VRSAVE */
103 if (__put_user(task->thread.vrsave, data))
104 return -EFAULT;
105
106 return 0;
107}
108
109/*
110 * Write contents of AltiVec register state into task TASK.
111 */
112static inline int set_vrregs(struct task_struct *task, unsigned long __user *data)
113{
114 int i, j;
115
116 if (!access_ok(VERIFY_READ, data, 133 * sizeof(unsigned long)))
117 return -EFAULT;
118
119 /* copy AltiVec registers VR[0] .. VR[31] */
120 for (i = 0; i < 32; i++)
121 for (j = 0; j < 4; j++, data++)
122 if (__get_user(task->thread.vr[i].u[j], data))
123 return -EFAULT;
124
125 /* copy VSCR */
126 for (i = 0; i < 4; i++, data++)
127 if (__get_user(task->thread.vscr.u[i], data))
128 return -EFAULT;
129
130 /* copy VRSAVE */
131 if (__get_user(task->thread.vrsave, data))
132 return -EFAULT;
133
134 return 0;
135}
136#endif
137
138#ifdef CONFIG_SPE
139
140/*
141 * For get_evrregs/set_evrregs functions 'data' has the following layout:
142 *
143 * struct {
144 * u32 evr[32];
145 * u64 acc;
146 * u32 spefscr;
147 * }
148 */
149
150/*
151 * Get contents of SPE register state in task TASK.
152 */
153static inline int get_evrregs(unsigned long *data, struct task_struct *task)
154{
155 int i;
156
157 if (!access_ok(VERIFY_WRITE, data, 35 * sizeof(unsigned long)))
158 return -EFAULT;
159
160 /* copy SPEFSCR */
161 if (__put_user(task->thread.spefscr, &data[34]))
162 return -EFAULT;
163
164 /* copy SPE registers EVR[0] .. EVR[31] */
165 for (i = 0; i < 32; i++, data++)
166 if (__put_user(task->thread.evr[i], data))
167 return -EFAULT;
168
169 /* copy ACC */
170 if (__put_user64(task->thread.acc, (unsigned long long *)data))
171 return -EFAULT;
172
173 return 0;
174}
175
176/*
177 * Write contents of SPE register state into task TASK.
178 */
179static inline int set_evrregs(struct task_struct *task, unsigned long *data)
180{
181 int i;
182
183 if (!access_ok(VERIFY_READ, data, 35 * sizeof(unsigned long)))
184 return -EFAULT;
185
186 /* copy SPEFSCR */
187 if (__get_user(task->thread.spefscr, &data[34]))
188 return -EFAULT;
189
190 /* copy SPE registers EVR[0] .. EVR[31] */
191 for (i = 0; i < 32; i++, data++)
192 if (__get_user(task->thread.evr[i], data))
193 return -EFAULT;
194 /* copy ACC */
195 if (__get_user64(task->thread.acc, (unsigned long long*)data))
196 return -EFAULT;
197
198 return 0;
199}
200#endif /* CONFIG_SPE */
201
202static inline void
203set_single_step(struct task_struct *task)
204{
205 struct pt_regs *regs = task->thread.regs;
206
207 if (regs != NULL) {
208#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
209 task->thread.dbcr0 = DBCR0_IDM | DBCR0_IC;
210 regs->msr |= MSR_DE;
211#else
212 regs->msr |= MSR_SE;
213#endif
214 }
215}
216
217static inline void
218clear_single_step(struct task_struct *task)
219{
220 struct pt_regs *regs = task->thread.regs;
221
222 if (regs != NULL) {
223#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
224 task->thread.dbcr0 = 0;
225 regs->msr &= ~MSR_DE;
226#else
227 regs->msr &= ~MSR_SE;
228#endif
229 }
230}
231
232/*
233 * Called by kernel/ptrace.c when detaching..
234 *
235 * Make sure single step bits etc are not set.
236 */
237void ptrace_disable(struct task_struct *child)
238{
239 /* make sure the single step bit is not set. */
240 clear_single_step(child);
241}
242
243long sys_ptrace(long request, long pid, long addr, long data)
244{
245 struct task_struct *child;
246 int ret = -EPERM;
247
248 lock_kernel();
249 if (request == PTRACE_TRACEME) {
250 /* are we already being traced? */
251 if (current->ptrace & PT_PTRACED)
252 goto out;
253 ret = security_ptrace(current->parent, current);
254 if (ret)
255 goto out;
256 /* set the ptrace bit in the process flags. */
257 current->ptrace |= PT_PTRACED;
258 ret = 0;
259 goto out;
260 }
261 ret = -ESRCH;
262 read_lock(&tasklist_lock);
263 child = find_task_by_pid(pid);
264 if (child)
265 get_task_struct(child);
266 read_unlock(&tasklist_lock);
267 if (!child)
268 goto out;
269
270 ret = -EPERM;
271 if (pid == 1) /* you may not mess with init */
272 goto out_tsk;
273
274 if (request == PTRACE_ATTACH) {
275 ret = ptrace_attach(child);
276 goto out_tsk;
277 }
278
279 ret = ptrace_check_attach(child, request == PTRACE_KILL);
280 if (ret < 0)
281 goto out_tsk;
282
283 switch (request) {
284 /* when I and D space are separate, these will need to be fixed. */
285 case PTRACE_PEEKTEXT: /* read word at location addr. */
286 case PTRACE_PEEKDATA: {
287 unsigned long tmp;
288 int copied;
289
290 copied = access_process_vm(child, addr, &tmp, sizeof(tmp), 0);
291 ret = -EIO;
292 if (copied != sizeof(tmp))
293 break;
294 ret = put_user(tmp,(unsigned long __user *) data);
295 break;
296 }
297
298 /* read the word at location addr in the USER area. */
299 /* XXX this will need fixing for 64-bit */
300 case PTRACE_PEEKUSR: {
301 unsigned long index, tmp;
302
303 ret = -EIO;
304 /* convert to index and check */
305 index = (unsigned long) addr >> 2;
306 if ((addr & 3) || index > PT_FPSCR
307 || child->thread.regs == NULL)
308 break;
309
310 CHECK_FULL_REGS(child->thread.regs);
311 if (index < PT_FPR0) {
312 tmp = get_reg(child, (int) index);
313 } else {
314 preempt_disable();
315 if (child->thread.regs->msr & MSR_FP)
316 giveup_fpu(child);
317 preempt_enable();
318 tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0];
319 }
320 ret = put_user(tmp,(unsigned long __user *) data);
321 break;
322 }
323
324 /* If I and D space are separate, this will have to be fixed. */
325 case PTRACE_POKETEXT: /* write the word at location addr. */
326 case PTRACE_POKEDATA:
327 ret = 0;
328 if (access_process_vm(child, addr, &data, sizeof(data), 1) == sizeof(data))
329 break;
330 ret = -EIO;
331 break;
332
333 /* write the word at location addr in the USER area */
334 case PTRACE_POKEUSR: {
335 unsigned long index;
336
337 ret = -EIO;
338 /* convert to index and check */
339 index = (unsigned long) addr >> 2;
340 if ((addr & 3) || index > PT_FPSCR
341 || child->thread.regs == NULL)
342 break;
343
344 CHECK_FULL_REGS(child->thread.regs);
345 if (index == PT_ORIG_R3)
346 break;
347 if (index < PT_FPR0) {
348 ret = put_reg(child, index, data);
349 } else {
350 preempt_disable();
351 if (child->thread.regs->msr & MSR_FP)
352 giveup_fpu(child);
353 preempt_enable();
354 ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data;
355 ret = 0;
356 }
357 break;
358 }
359
360 case PTRACE_SYSCALL: /* continue and stop at next (return from) syscall */
361 case PTRACE_CONT: { /* restart after signal. */
362 ret = -EIO;
363 if (!valid_signal(data))
364 break;
365 if (request == PTRACE_SYSCALL) {
366 set_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
367 } else {
368 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
369 }
370 child->exit_code = data;
371 /* make sure the single step bit is not set. */
372 clear_single_step(child);
373 wake_up_process(child);
374 ret = 0;
375 break;
376 }
377
378/*
379 * make the child exit. Best I can do is send it a sigkill.
380 * perhaps it should be put in the status that it wants to
381 * exit.
382 */
383 case PTRACE_KILL: {
384 ret = 0;
385 if (child->exit_state == EXIT_ZOMBIE) /* already dead */
386 break;
387 child->exit_code = SIGKILL;
388 /* make sure the single step bit is not set. */
389 clear_single_step(child);
390 wake_up_process(child);
391 break;
392 }
393
394 case PTRACE_SINGLESTEP: { /* set the trap flag. */
395 ret = -EIO;
396 if (!valid_signal(data))
397 break;
398 clear_tsk_thread_flag(child, TIF_SYSCALL_TRACE);
399 set_single_step(child);
400 child->exit_code = data;
401 /* give it a chance to run. */
402 wake_up_process(child);
403 ret = 0;
404 break;
405 }
406
407 case PTRACE_DETACH:
408 ret = ptrace_detach(child, data);
409 break;
410
411#ifdef CONFIG_ALTIVEC
412 case PTRACE_GETVRREGS:
413 /* Get the child altivec register state. */
414 preempt_disable();
415 if (child->thread.regs->msr & MSR_VEC)
416 giveup_altivec(child);
417 preempt_enable();
418 ret = get_vrregs((unsigned long __user *)data, child);
419 break;
420
421 case PTRACE_SETVRREGS:
422 /* Set the child altivec register state. */
423 /* this is to clear the MSR_VEC bit to force a reload
424 * of register state from memory */
425 preempt_disable();
426 if (child->thread.regs->msr & MSR_VEC)
427 giveup_altivec(child);
428 preempt_enable();
429 ret = set_vrregs(child, (unsigned long __user *)data);
430 break;
431#endif
432#ifdef CONFIG_SPE
433 case PTRACE_GETEVRREGS:
434 /* Get the child spe register state. */
435 if (child->thread.regs->msr & MSR_SPE)
436 giveup_spe(child);
437 ret = get_evrregs((unsigned long __user *)data, child);
438 break;
439
440 case PTRACE_SETEVRREGS:
441 /* Set the child spe register state. */
442 /* this is to clear the MSR_SPE bit to force a reload
443 * of register state from memory */
444 if (child->thread.regs->msr & MSR_SPE)
445 giveup_spe(child);
446 ret = set_evrregs(child, (unsigned long __user *)data);
447 break;
448#endif
449
450 default:
451 ret = ptrace_request(child, request, addr, data);
452 break;
453 }
454out_tsk:
455 put_task_struct(child);
456out:
457 unlock_kernel();
458 return ret;
459}
460
461static void do_syscall_trace(void)
462{
463 /* the 0x80 provides a way for the tracing parent to distinguish
464 between a syscall stop and SIGTRAP delivery */
465 ptrace_notify(SIGTRAP | ((current->ptrace & PT_TRACESYSGOOD)
466 ? 0x80 : 0));
467
468 /*
469 * this isn't the same as continuing with a signal, but it will do
470 * for normal use. strace only continues with a signal if the
471 * stopping signal is not SIGTRAP. -brl
472 */
473 if (current->exit_code) {
474 send_sig(current->exit_code, current, 1);
475 current->exit_code = 0;
476 }
477}
478
479void do_syscall_trace_enter(struct pt_regs *regs)
480{
481 if (test_thread_flag(TIF_SYSCALL_TRACE)
482 && (current->ptrace & PT_PTRACED))
483 do_syscall_trace();
484
485 if (unlikely(current->audit_context))
486 audit_syscall_entry(current, AUDIT_ARCH_PPC,
487 regs->gpr[0],
488 regs->gpr[3], regs->gpr[4],
489 regs->gpr[5], regs->gpr[6]);
490}
491
492void do_syscall_trace_leave(struct pt_regs *regs)
493{
494 secure_computing(regs->gpr[0]);
495
496 if (unlikely(current->audit_context))
497 audit_syscall_exit(current,
498 (regs->ccr&0x1000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
499 regs->result);
500
501 if ((test_thread_flag(TIF_SYSCALL_TRACE))
502 && (current->ptrace & PT_PTRACED))
503 do_syscall_trace();
504}
505
506EXPORT_SYMBOL(do_syscall_trace_enter);
507EXPORT_SYMBOL(do_syscall_trace_leave);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 545cfd0fab59..6bcb85d2b7fd 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
71unsigned long boot_mem_size; 71unsigned long boot_mem_size;
72 72
73unsigned long ISA_DMA_THRESHOLD; 73unsigned long ISA_DMA_THRESHOLD;
74unsigned long DMA_MODE_READ, DMA_MODE_WRITE; 74unsigned int DMA_MODE_READ;
75unsigned int DMA_MODE_WRITE;
75 76
76#ifdef CONFIG_PPC_MULTIPLATFORM 77#ifdef CONFIG_PPC_MULTIPLATFORM
77int _machine = 0; 78int _machine = 0;
@@ -82,8 +83,18 @@ extern void pmac_init(unsigned long r3, unsigned long r4,
82 unsigned long r5, unsigned long r6, unsigned long r7); 83 unsigned long r5, unsigned long r6, unsigned long r7);
83extern void chrp_init(unsigned long r3, unsigned long r4, 84extern void chrp_init(unsigned long r3, unsigned long r4,
84 unsigned long r5, unsigned long r6, unsigned long r7); 85 unsigned long r5, unsigned long r6, unsigned long r7);
86
87dev_t boot_dev;
85#endif /* CONFIG_PPC_MULTIPLATFORM */ 88#endif /* CONFIG_PPC_MULTIPLATFORM */
86 89
90int have_of;
91EXPORT_SYMBOL(have_of);
92
93#ifdef __DO_IRQ_CANON
94int ppc_do_canonicalize_irqs;
95EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
96#endif
97
87#ifdef CONFIG_MAGIC_SYSRQ 98#ifdef CONFIG_MAGIC_SYSRQ
88unsigned long SYSRQ_KEY = 0x54; 99unsigned long SYSRQ_KEY = 0x54;
89#endif /* CONFIG_MAGIC_SYSRQ */ 100#endif /* CONFIG_MAGIC_SYSRQ */
@@ -185,18 +196,18 @@ int show_cpuinfo(struct seq_file *m, void *v)
185 seq_printf(m, "processor\t: %d\n", i); 196 seq_printf(m, "processor\t: %d\n", i);
186 seq_printf(m, "cpu\t\t: "); 197 seq_printf(m, "cpu\t\t: ");
187 198
188 if (cur_cpu_spec[i]->pvr_mask) 199 if (cur_cpu_spec->pvr_mask)
189 seq_printf(m, "%s", cur_cpu_spec[i]->cpu_name); 200 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
190 else 201 else
191 seq_printf(m, "unknown (%08x)", pvr); 202 seq_printf(m, "unknown (%08x)", pvr);
192#ifdef CONFIG_ALTIVEC 203#ifdef CONFIG_ALTIVEC
193 if (cur_cpu_spec[i]->cpu_features & CPU_FTR_ALTIVEC) 204 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
194 seq_printf(m, ", altivec supported"); 205 seq_printf(m, ", altivec supported");
195#endif 206#endif
196 seq_printf(m, "\n"); 207 seq_printf(m, "\n");
197 208
198#ifdef CONFIG_TAU 209#ifdef CONFIG_TAU
199 if (cur_cpu_spec[i]->cpu_features & CPU_FTR_TAU) { 210 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
200#ifdef CONFIG_TAU_AVERAGE 211#ifdef CONFIG_TAU_AVERAGE
201 /* more straightforward, but potentially misleading */ 212 /* more straightforward, but potentially misleading */
202 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 213 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
@@ -339,7 +350,7 @@ early_init(int r3, int r4, int r5)
339 * Assume here that all clock rates are the same in a 350 * Assume here that all clock rates are the same in a
340 * smp system. -- Cort 351 * smp system. -- Cort
341 */ 352 */
342int __openfirmware 353int
343of_show_percpuinfo(struct seq_file *m, int i) 354of_show_percpuinfo(struct seq_file *m, int i)
344{ 355{
345 struct device_node *cpu_node; 356 struct device_node *cpu_node;
@@ -404,11 +415,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
404 _machine = _MACH_prep; 415 _machine = _MACH_prep;
405 } 416 }
406 417
418#ifdef CONFIG_PPC_PREP
407 /* not much more to do here, if prep */ 419 /* not much more to do here, if prep */
408 if (_machine == _MACH_prep) { 420 if (_machine == _MACH_prep) {
409 prep_init(r3, r4, r5, r6, r7); 421 prep_init(r3, r4, r5, r6, r7);
410 return; 422 return;
411 } 423 }
424#endif
425
426 have_of = 1;
412 427
413 /* prom_init has already been called from __start */ 428 /* prom_init has already been called from __start */
414 if (boot_infos) 429 if (boot_infos)
@@ -479,12 +494,16 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
479#endif /* CONFIG_ADB */ 494#endif /* CONFIG_ADB */
480 495
481 switch (_machine) { 496 switch (_machine) {
497#ifdef CONFIG_PPC_PMAC
482 case _MACH_Pmac: 498 case _MACH_Pmac:
483 pmac_init(r3, r4, r5, r6, r7); 499 pmac_init(r3, r4, r5, r6, r7);
484 break; 500 break;
501#endif
502#ifdef CONFIG_PPC_CHRP
485 case _MACH_chrp: 503 case _MACH_chrp:
486 chrp_init(r3, r4, r5, r6, r7); 504 chrp_init(r3, r4, r5, r6, r7);
487 break; 505 break;
506#endif
488 } 507 }
489} 508}
490 509
@@ -721,7 +740,7 @@ void __init setup_arch(char **cmdline_p)
721#endif 740#endif
722 741
723#ifdef CONFIG_XMON 742#ifdef CONFIG_XMON
724 xmon_map_scc(); 743 xmon_init(1);
725 if (strstr(cmd_line, "xmon")) 744 if (strstr(cmd_line, "xmon"))
726 xmon(NULL); 745 xmon(NULL);
727#endif /* CONFIG_XMON */ 746#endif /* CONFIG_XMON */
@@ -745,12 +764,12 @@ void __init setup_arch(char **cmdline_p)
745 * for a possibly more accurate value. 764 * for a possibly more accurate value.
746 */ 765 */
747 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { 766 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
748 dcache_bsize = cur_cpu_spec[0]->dcache_bsize; 767 dcache_bsize = cur_cpu_spec->dcache_bsize;
749 icache_bsize = cur_cpu_spec[0]->icache_bsize; 768 icache_bsize = cur_cpu_spec->icache_bsize;
750 ucache_bsize = 0; 769 ucache_bsize = 0;
751 } else 770 } else
752 ucache_bsize = dcache_bsize = icache_bsize 771 ucache_bsize = dcache_bsize = icache_bsize
753 = cur_cpu_spec[0]->dcache_bsize; 772 = cur_cpu_spec->dcache_bsize;
754 773
755 /* reboot on panic */ 774 /* reboot on panic */
756 panic_timeout = 180; 775 panic_timeout = 180;
diff --git a/arch/ppc/kernel/signal.c b/arch/ppc/kernel/signal.c
deleted file mode 100644
index 2244bf91e593..000000000000
--- a/arch/ppc/kernel/signal.c
+++ /dev/null
@@ -1,771 +0,0 @@
1/*
2 * arch/ppc/kernel/signal.c
3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Derived from "arch/i386/kernel/signal.c"
8 * Copyright (C) 1991, 1992 Linus Torvalds
9 * 1997-11-28 Modified for POSIX.1b signals by Richard Henderson
10 *
11 * This program is free software; you can redistribute it and/or
12 * modify it under the terms of the GNU General Public License
13 * as published by the Free Software Foundation; either version
14 * 2 of the License, or (at your option) any later version.
15 */
16
17#include <linux/sched.h>
18#include <linux/mm.h>
19#include <linux/smp.h>
20#include <linux/smp_lock.h>
21#include <linux/kernel.h>
22#include <linux/signal.h>
23#include <linux/errno.h>
24#include <linux/wait.h>
25#include <linux/ptrace.h>
26#include <linux/unistd.h>
27#include <linux/stddef.h>
28#include <linux/elf.h>
29#include <linux/tty.h>
30#include <linux/binfmts.h>
31#include <linux/suspend.h>
32#include <asm/ucontext.h>
33#include <asm/uaccess.h>
34#include <asm/pgtable.h>
35#include <asm/cacheflush.h>
36
37#undef DEBUG_SIG
38
39#define _BLOCKABLE (~(sigmask(SIGKILL) | sigmask(SIGSTOP)))
40
41extern void sigreturn_exit(struct pt_regs *);
42
43#define GP_REGS_SIZE min(sizeof(elf_gregset_t), sizeof(struct pt_regs))
44
45int do_signal(sigset_t *oldset, struct pt_regs *regs);
46
47/*
48 * Atomically swap in the new signal mask, and wait for a signal.
49 */
50int
51sys_sigsuspend(old_sigset_t mask, int p2, int p3, int p4, int p6, int p7,
52 struct pt_regs *regs)
53{
54 sigset_t saveset;
55
56 mask &= _BLOCKABLE;
57 spin_lock_irq(&current->sighand->siglock);
58 saveset = current->blocked;
59 siginitset(&current->blocked, mask);
60 recalc_sigpending();
61 spin_unlock_irq(&current->sighand->siglock);
62
63 regs->result = -EINTR;
64 regs->gpr[3] = EINTR;
65 regs->ccr |= 0x10000000;
66 while (1) {
67 current->state = TASK_INTERRUPTIBLE;
68 schedule();
69 if (do_signal(&saveset, regs))
70 sigreturn_exit(regs);
71 }
72}
73
74int
75sys_rt_sigsuspend(sigset_t __user *unewset, size_t sigsetsize, int p3, int p4,
76 int p6, int p7, struct pt_regs *regs)
77{
78 sigset_t saveset, newset;
79
80 /* XXX: Don't preclude handling different sized sigset_t's. */
81 if (sigsetsize != sizeof(sigset_t))
82 return -EINVAL;
83
84 if (copy_from_user(&newset, unewset, sizeof(newset)))
85 return -EFAULT;
86 sigdelsetmask(&newset, ~_BLOCKABLE);
87
88 spin_lock_irq(&current->sighand->siglock);
89 saveset = current->blocked;
90 current->blocked = newset;
91 recalc_sigpending();
92 spin_unlock_irq(&current->sighand->siglock);
93
94 regs->result = -EINTR;
95 regs->gpr[3] = EINTR;
96 regs->ccr |= 0x10000000;
97 while (1) {
98 current->state = TASK_INTERRUPTIBLE;
99 schedule();
100 if (do_signal(&saveset, regs))
101 sigreturn_exit(regs);
102 }
103}
104
105
106int
107sys_sigaltstack(const stack_t __user *uss, stack_t __user *uoss, int r5,
108 int r6, int r7, int r8, struct pt_regs *regs)
109{
110 return do_sigaltstack(uss, uoss, regs->gpr[1]);
111}
112
113int
114sys_sigaction(int sig, const struct old_sigaction __user *act,
115 struct old_sigaction __user *oact)
116{
117 struct k_sigaction new_ka, old_ka;
118 int ret;
119
120 if (act) {
121 old_sigset_t mask;
122 if (!access_ok(VERIFY_READ, act, sizeof(*act)) ||
123 __get_user(new_ka.sa.sa_handler, &act->sa_handler) ||
124 __get_user(new_ka.sa.sa_restorer, &act->sa_restorer))
125 return -EFAULT;
126 __get_user(new_ka.sa.sa_flags, &act->sa_flags);
127 __get_user(mask, &act->sa_mask);
128 siginitset(&new_ka.sa.sa_mask, mask);
129 }
130
131 ret = do_sigaction(sig, (act? &new_ka: NULL), (oact? &old_ka: NULL));
132
133 if (!ret && oact) {
134 if (!access_ok(VERIFY_WRITE, oact, sizeof(*oact)) ||
135 __put_user(old_ka.sa.sa_handler, &oact->sa_handler) ||
136 __put_user(old_ka.sa.sa_restorer, &oact->sa_restorer))
137 return -EFAULT;
138 __put_user(old_ka.sa.sa_flags, &oact->sa_flags);
139 __put_user(old_ka.sa.sa_mask.sig[0], &oact->sa_mask);
140 }
141
142 return ret;
143}
144
145/*
146 * When we have signals to deliver, we set up on the
147 * user stack, going down from the original stack pointer:
148 * a sigregs struct
149 * a sigcontext struct
150 * a gap of __SIGNAL_FRAMESIZE bytes
151 *
152 * Each of these things must be a multiple of 16 bytes in size.
153 *
154 */
155struct sigregs {
156 struct mcontext mctx; /* all the register values */
157 /* Programs using the rs6000/xcoff abi can save up to 19 gp regs
158 and 18 fp regs below sp before decrementing it. */
159 int abigap[56];
160};
161
162/* We use the mc_pad field for the signal return trampoline. */
163#define tramp mc_pad
164
165/*
166 * When we have rt signals to deliver, we set up on the
167 * user stack, going down from the original stack pointer:
168 * one rt_sigframe struct (siginfo + ucontext + ABI gap)
169 * a gap of __SIGNAL_FRAMESIZE+16 bytes
170 * (the +16 is to get the siginfo and ucontext in the same
171 * positions as in older kernels).
172 *
173 * Each of these things must be a multiple of 16 bytes in size.
174 *
175 */
176struct rt_sigframe
177{
178 struct siginfo info;
179 struct ucontext uc;
180 /* Programs using the rs6000/xcoff abi can save up to 19 gp regs
181 and 18 fp regs below sp before decrementing it. */
182 int abigap[56];
183};
184
185/*
186 * Save the current user registers on the user stack.
187 * We only save the altivec/spe registers if the process has used
188 * altivec/spe instructions at some point.
189 */
190static int
191save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, int sigret)
192{
193 /* save general and floating-point registers */
194 CHECK_FULL_REGS(regs);
195 preempt_disable();
196 if (regs->msr & MSR_FP)
197 giveup_fpu(current);
198#ifdef CONFIG_ALTIVEC
199 if (current->thread.used_vr && (regs->msr & MSR_VEC))
200 giveup_altivec(current);
201#endif /* CONFIG_ALTIVEC */
202#ifdef CONFIG_SPE
203 if (current->thread.used_spe && (regs->msr & MSR_SPE))
204 giveup_spe(current);
205#endif /* CONFIG_ALTIVEC */
206 preempt_enable();
207
208 if (__copy_to_user(&frame->mc_gregs, regs, GP_REGS_SIZE)
209 || __copy_to_user(&frame->mc_fregs, current->thread.fpr,
210 ELF_NFPREG * sizeof(double)))
211 return 1;
212
213 current->thread.fpscr = 0; /* turn off all fp exceptions */
214
215#ifdef CONFIG_ALTIVEC
216 /* save altivec registers */
217 if (current->thread.used_vr) {
218 if (__copy_to_user(&frame->mc_vregs, current->thread.vr,
219 ELF_NVRREG * sizeof(vector128)))
220 return 1;
221 /* set MSR_VEC in the saved MSR value to indicate that
222 frame->mc_vregs contains valid data */
223 if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR]))
224 return 1;
225 }
226 /* else assert((regs->msr & MSR_VEC) == 0) */
227
228 /* We always copy to/from vrsave, it's 0 if we don't have or don't
229 * use altivec. Since VSCR only contains 32 bits saved in the least
230 * significant bits of a vector, we "cheat" and stuff VRSAVE in the
231 * most significant bits of that same vector. --BenH
232 */
233 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
234 return 1;
235#endif /* CONFIG_ALTIVEC */
236
237#ifdef CONFIG_SPE
238 /* save spe registers */
239 if (current->thread.used_spe) {
240 if (__copy_to_user(&frame->mc_vregs, current->thread.evr,
241 ELF_NEVRREG * sizeof(u32)))
242 return 1;
243 /* set MSR_SPE in the saved MSR value to indicate that
244 frame->mc_vregs contains valid data */
245 if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR]))
246 return 1;
247 }
248 /* else assert((regs->msr & MSR_SPE) == 0) */
249
250 /* We always copy to/from spefscr */
251 if (__put_user(current->thread.spefscr, (u32 *)&frame->mc_vregs + ELF_NEVRREG))
252 return 1;
253#endif /* CONFIG_SPE */
254
255 if (sigret) {
256 /* Set up the sigreturn trampoline: li r0,sigret; sc */
257 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
258 || __put_user(0x44000002UL, &frame->tramp[1]))
259 return 1;
260 flush_icache_range((unsigned long) &frame->tramp[0],
261 (unsigned long) &frame->tramp[2]);
262 }
263
264 return 0;
265}
266
267/*
268 * Restore the current user register values from the user stack,
269 * (except for MSR).
270 */
271static int
272restore_user_regs(struct pt_regs *regs, struct mcontext __user *sr, int sig)
273{
274 unsigned long save_r2 = 0;
275#if defined(CONFIG_ALTIVEC) || defined(CONFIG_SPE)
276 unsigned long msr;
277#endif
278
279 /* backup/restore the TLS as we don't want it to be modified */
280 if (!sig)
281 save_r2 = regs->gpr[2];
282 /* copy up to but not including MSR */
283 if (__copy_from_user(regs, &sr->mc_gregs, PT_MSR * sizeof(elf_greg_t)))
284 return 1;
285 /* copy from orig_r3 (the word after the MSR) up to the end */
286 if (__copy_from_user(&regs->orig_gpr3, &sr->mc_gregs[PT_ORIG_R3],
287 GP_REGS_SIZE - PT_ORIG_R3 * sizeof(elf_greg_t)))
288 return 1;
289 if (!sig)
290 regs->gpr[2] = save_r2;
291
292 /* force the process to reload the FP registers from
293 current->thread when it next does FP instructions */
294 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
295 if (__copy_from_user(current->thread.fpr, &sr->mc_fregs,
296 sizeof(sr->mc_fregs)))
297 return 1;
298
299#ifdef CONFIG_ALTIVEC
300 /* force the process to reload the altivec registers from
301 current->thread when it next does altivec instructions */
302 regs->msr &= ~MSR_VEC;
303 if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_VEC) != 0) {
304 /* restore altivec registers from the stack */
305 if (__copy_from_user(current->thread.vr, &sr->mc_vregs,
306 sizeof(sr->mc_vregs)))
307 return 1;
308 } else if (current->thread.used_vr)
309 memset(&current->thread.vr, 0, ELF_NVRREG * sizeof(vector128));
310
311 /* Always get VRSAVE back */
312 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
313 return 1;
314#endif /* CONFIG_ALTIVEC */
315
316#ifdef CONFIG_SPE
317 /* force the process to reload the spe registers from
318 current->thread when it next does spe instructions */
319 regs->msr &= ~MSR_SPE;
320 if (!__get_user(msr, &sr->mc_gregs[PT_MSR]) && (msr & MSR_SPE) != 0) {
321 /* restore spe registers from the stack */
322 if (__copy_from_user(current->thread.evr, &sr->mc_vregs,
323 ELF_NEVRREG * sizeof(u32)))
324 return 1;
325 } else if (current->thread.used_spe)
326 memset(&current->thread.evr, 0, ELF_NEVRREG * sizeof(u32));
327
328 /* Always get SPEFSCR back */
329 if (__get_user(current->thread.spefscr, (u32 *)&sr->mc_vregs + ELF_NEVRREG))
330 return 1;
331#endif /* CONFIG_SPE */
332
333#ifndef CONFIG_SMP
334 preempt_disable();
335 if (last_task_used_math == current)
336 last_task_used_math = NULL;
337 if (last_task_used_altivec == current)
338 last_task_used_altivec = NULL;
339 if (last_task_used_spe == current)
340 last_task_used_spe = NULL;
341 preempt_enable();
342#endif
343 return 0;
344}
345
346/*
347 * Restore the user process's signal mask
348 */
349static void
350restore_sigmask(sigset_t *set)
351{
352 sigdelsetmask(set, ~_BLOCKABLE);
353 spin_lock_irq(&current->sighand->siglock);
354 current->blocked = *set;
355 recalc_sigpending();
356 spin_unlock_irq(&current->sighand->siglock);
357}
358
359/*
360 * Set up a signal frame for a "real-time" signal handler
361 * (one which gets siginfo).
362 */
363static void
364handle_rt_signal(unsigned long sig, struct k_sigaction *ka,
365 siginfo_t *info, sigset_t *oldset, struct pt_regs * regs,
366 unsigned long newsp)
367{
368 struct rt_sigframe __user *rt_sf;
369 struct mcontext __user *frame;
370 unsigned long origsp = newsp;
371
372 /* Set up Signal Frame */
373 /* Put a Real Time Context onto stack */
374 newsp -= sizeof(*rt_sf);
375 rt_sf = (struct rt_sigframe __user *) newsp;
376
377 /* create a stack frame for the caller of the handler */
378 newsp -= __SIGNAL_FRAMESIZE + 16;
379
380 if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp))
381 goto badframe;
382
383 /* Put the siginfo & fill in most of the ucontext */
384 if (copy_siginfo_to_user(&rt_sf->info, info)
385 || __put_user(0, &rt_sf->uc.uc_flags)
386 || __put_user(0, &rt_sf->uc.uc_link)
387 || __put_user(current->sas_ss_sp, &rt_sf->uc.uc_stack.ss_sp)
388 || __put_user(sas_ss_flags(regs->gpr[1]),
389 &rt_sf->uc.uc_stack.ss_flags)
390 || __put_user(current->sas_ss_size, &rt_sf->uc.uc_stack.ss_size)
391 || __put_user(&rt_sf->uc.uc_mcontext, &rt_sf->uc.uc_regs)
392 || __copy_to_user(&rt_sf->uc.uc_sigmask, oldset, sizeof(*oldset)))
393 goto badframe;
394
395 /* Save user registers on the stack */
396 frame = &rt_sf->uc.uc_mcontext;
397 if (save_user_regs(regs, frame, __NR_rt_sigreturn))
398 goto badframe;
399
400 if (put_user(regs->gpr[1], (unsigned long __user *)newsp))
401 goto badframe;
402 regs->gpr[1] = newsp;
403 regs->gpr[3] = sig;
404 regs->gpr[4] = (unsigned long) &rt_sf->info;
405 regs->gpr[5] = (unsigned long) &rt_sf->uc;
406 regs->gpr[6] = (unsigned long) rt_sf;
407 regs->nip = (unsigned long) ka->sa.sa_handler;
408 regs->link = (unsigned long) frame->tramp;
409 regs->trap = 0;
410
411 return;
412
413badframe:
414#ifdef DEBUG_SIG
415 printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
416 regs, frame, newsp);
417#endif
418 force_sigsegv(sig, current);
419}
420
421static int do_setcontext(struct ucontext __user *ucp, struct pt_regs *regs, int sig)
422{
423 sigset_t set;
424 struct mcontext __user *mcp;
425
426 if (__copy_from_user(&set, &ucp->uc_sigmask, sizeof(set))
427 || __get_user(mcp, &ucp->uc_regs))
428 return -EFAULT;
429 restore_sigmask(&set);
430 if (restore_user_regs(regs, mcp, sig))
431 return -EFAULT;
432
433 return 0;
434}
435
436int sys_swapcontext(struct ucontext __user *old_ctx,
437 struct ucontext __user *new_ctx,
438 int ctx_size, int r6, int r7, int r8, struct pt_regs *regs)
439{
440 unsigned char tmp;
441
442 /* Context size is for future use. Right now, we only make sure
443 * we are passed something we understand
444 */
445 if (ctx_size < sizeof(struct ucontext))
446 return -EINVAL;
447
448 if (old_ctx != NULL) {
449 if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx))
450 || save_user_regs(regs, &old_ctx->uc_mcontext, 0)
451 || __copy_to_user(&old_ctx->uc_sigmask,
452 &current->blocked, sizeof(sigset_t))
453 || __put_user(&old_ctx->uc_mcontext, &old_ctx->uc_regs))
454 return -EFAULT;
455 }
456 if (new_ctx == NULL)
457 return 0;
458 if (!access_ok(VERIFY_READ, new_ctx, sizeof(*new_ctx))
459 || __get_user(tmp, (u8 __user *) new_ctx)
460 || __get_user(tmp, (u8 __user *) (new_ctx + 1) - 1))
461 return -EFAULT;
462
463 /*
464 * If we get a fault copying the context into the kernel's
465 * image of the user's registers, we can't just return -EFAULT
466 * because the user's registers will be corrupted. For instance
467 * the NIP value may have been updated but not some of the
468 * other registers. Given that we have done the access_ok
469 * and successfully read the first and last bytes of the region
470 * above, this should only happen in an out-of-memory situation
471 * or if another thread unmaps the region containing the context.
472 * We kill the task with a SIGSEGV in this situation.
473 */
474 if (do_setcontext(new_ctx, regs, 0))
475 do_exit(SIGSEGV);
476 sigreturn_exit(regs);
477 /* doesn't actually return back to here */
478 return 0;
479}
480
481int sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
482 struct pt_regs *regs)
483{
484 struct rt_sigframe __user *rt_sf;
485
486 /* Always make any pending restarted system calls return -EINTR */
487 current_thread_info()->restart_block.fn = do_no_restart_syscall;
488
489 rt_sf = (struct rt_sigframe __user *)
490 (regs->gpr[1] + __SIGNAL_FRAMESIZE + 16);
491 if (!access_ok(VERIFY_READ, rt_sf, sizeof(struct rt_sigframe)))
492 goto bad;
493 if (do_setcontext(&rt_sf->uc, regs, 1))
494 goto bad;
495
496 /*
497 * It's not clear whether or why it is desirable to save the
498 * sigaltstack setting on signal delivery and restore it on
499 * signal return. But other architectures do this and we have
500 * always done it up until now so it is probably better not to
501 * change it. -- paulus
502 */
503 do_sigaltstack(&rt_sf->uc.uc_stack, NULL, regs->gpr[1]);
504
505 sigreturn_exit(regs); /* doesn't return here */
506 return 0;
507
508 bad:
509 force_sig(SIGSEGV, current);
510 return 0;
511}
512
513int sys_debug_setcontext(struct ucontext __user *ctx,
514 int ndbg, struct sig_dbg_op __user *dbg,
515 int r6, int r7, int r8,
516 struct pt_regs *regs)
517{
518 struct sig_dbg_op op;
519 int i;
520 unsigned long new_msr = regs->msr;
521#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
522 unsigned long new_dbcr0 = current->thread.dbcr0;
523#endif
524
525 for (i=0; i<ndbg; i++) {
526 if (__copy_from_user(&op, dbg, sizeof(op)))
527 return -EFAULT;
528 switch (op.dbg_type) {
529 case SIG_DBG_SINGLE_STEPPING:
530#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
531 if (op.dbg_value) {
532 new_msr |= MSR_DE;
533 new_dbcr0 |= (DBCR0_IDM | DBCR0_IC);
534 } else {
535 new_msr &= ~MSR_DE;
536 new_dbcr0 &= ~(DBCR0_IDM | DBCR0_IC);
537 }
538#else
539 if (op.dbg_value)
540 new_msr |= MSR_SE;
541 else
542 new_msr &= ~MSR_SE;
543#endif
544 break;
545 case SIG_DBG_BRANCH_TRACING:
546#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
547 return -EINVAL;
548#else
549 if (op.dbg_value)
550 new_msr |= MSR_BE;
551 else
552 new_msr &= ~MSR_BE;
553#endif
554 break;
555
556 default:
557 return -EINVAL;
558 }
559 }
560
561 /* We wait until here to actually install the values in the
562 registers so if we fail in the above loop, it will not
563 affect the contents of these registers. After this point,
564 failure is a problem, anyway, and it's very unlikely unless
565 the user is really doing something wrong. */
566 regs->msr = new_msr;
567#if defined(CONFIG_4xx) || defined(CONFIG_BOOKE)
568 current->thread.dbcr0 = new_dbcr0;
569#endif
570
571 /*
572 * If we get a fault copying the context into the kernel's
573 * image of the user's registers, we can't just return -EFAULT
574 * because the user's registers will be corrupted. For instance
575 * the NIP value may have been updated but not some of the
576 * other registers. Given that we have done the access_ok
577 * and successfully read the first and last bytes of the region
578 * above, this should only happen in an out-of-memory situation
579 * or if another thread unmaps the region containing the context.
580 * We kill the task with a SIGSEGV in this situation.
581 */
582 if (do_setcontext(ctx, regs, 1)) {
583 force_sig(SIGSEGV, current);
584 goto out;
585 }
586
587 /*
588 * It's not clear whether or why it is desirable to save the
589 * sigaltstack setting on signal delivery and restore it on
590 * signal return. But other architectures do this and we have
591 * always done it up until now so it is probably better not to
592 * change it. -- paulus
593 */
594 do_sigaltstack(&ctx->uc_stack, NULL, regs->gpr[1]);
595
596 sigreturn_exit(regs);
597 /* doesn't actually return back to here */
598
599 out:
600 return 0;
601}
602
603/*
604 * OK, we're invoking a handler
605 */
606static void
607handle_signal(unsigned long sig, struct k_sigaction *ka,
608 siginfo_t *info, sigset_t *oldset, struct pt_regs * regs,
609 unsigned long newsp)
610{
611 struct sigcontext __user *sc;
612 struct sigregs __user *frame;
613 unsigned long origsp = newsp;
614
615 /* Set up Signal Frame */
616 newsp -= sizeof(struct sigregs);
617 frame = (struct sigregs __user *) newsp;
618
619 /* Put a sigcontext on the stack */
620 newsp -= sizeof(*sc);
621 sc = (struct sigcontext __user *) newsp;
622
623 /* create a stack frame for the caller of the handler */
624 newsp -= __SIGNAL_FRAMESIZE;
625
626 if (!access_ok(VERIFY_WRITE, (void __user *) newsp, origsp - newsp))
627 goto badframe;
628
629#if _NSIG != 64
630#error "Please adjust handle_signal()"
631#endif
632 if (__put_user((unsigned long) ka->sa.sa_handler, &sc->handler)
633 || __put_user(oldset->sig[0], &sc->oldmask)
634 || __put_user(oldset->sig[1], &sc->_unused[3])
635 || __put_user((struct pt_regs __user *)frame, &sc->regs)
636 || __put_user(sig, &sc->signal))
637 goto badframe;
638
639 if (save_user_regs(regs, &frame->mctx, __NR_sigreturn))
640 goto badframe;
641
642 if (put_user(regs->gpr[1], (unsigned long __user *)newsp))
643 goto badframe;
644 regs->gpr[1] = newsp;
645 regs->gpr[3] = sig;
646 regs->gpr[4] = (unsigned long) sc;
647 regs->nip = (unsigned long) ka->sa.sa_handler;
648 regs->link = (unsigned long) frame->mctx.tramp;
649 regs->trap = 0;
650
651 return;
652
653badframe:
654#ifdef DEBUG_SIG
655 printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
656 regs, frame, newsp);
657#endif
658 force_sigsegv(sig, current);
659}
660
661/*
662 * Do a signal return; undo the signal stack.
663 */
664int sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
665 struct pt_regs *regs)
666{
667 struct sigcontext __user *sc;
668 struct sigcontext sigctx;
669 struct mcontext __user *sr;
670 sigset_t set;
671
672 /* Always make any pending restarted system calls return -EINTR */
673 current_thread_info()->restart_block.fn = do_no_restart_syscall;
674
675 sc = (struct sigcontext __user *)(regs->gpr[1] + __SIGNAL_FRAMESIZE);
676 if (copy_from_user(&sigctx, sc, sizeof(sigctx)))
677 goto badframe;
678
679 set.sig[0] = sigctx.oldmask;
680 set.sig[1] = sigctx._unused[3];
681 restore_sigmask(&set);
682
683 sr = (struct mcontext __user *) sigctx.regs;
684 if (!access_ok(VERIFY_READ, sr, sizeof(*sr))
685 || restore_user_regs(regs, sr, 1))
686 goto badframe;
687
688 sigreturn_exit(regs); /* doesn't return */
689 return 0;
690
691badframe:
692 force_sig(SIGSEGV, current);
693 return 0;
694}
695
696/*
697 * Note that 'init' is a special process: it doesn't get signals it doesn't
698 * want to handle. Thus you cannot kill init even with a SIGKILL even by
699 * mistake.
700 */
701int do_signal(sigset_t *oldset, struct pt_regs *regs)
702{
703 siginfo_t info;
704 struct k_sigaction ka;
705 unsigned long frame, newsp;
706 int signr, ret;
707
708 if (try_to_freeze()) {
709 signr = 0;
710 if (!signal_pending(current))
711 goto no_signal;
712 }
713
714 if (!oldset)
715 oldset = &current->blocked;
716
717 newsp = frame = 0;
718
719 signr = get_signal_to_deliver(&info, &ka, regs, NULL);
720 no_signal:
721 if (TRAP(regs) == 0x0C00 /* System Call! */
722 && regs->ccr & 0x10000000 /* error signalled */
723 && ((ret = regs->gpr[3]) == ERESTARTSYS
724 || ret == ERESTARTNOHAND || ret == ERESTARTNOINTR
725 || ret == ERESTART_RESTARTBLOCK)) {
726
727 if (signr > 0
728 && (ret == ERESTARTNOHAND || ret == ERESTART_RESTARTBLOCK
729 || (ret == ERESTARTSYS
730 && !(ka.sa.sa_flags & SA_RESTART)))) {
731 /* make the system call return an EINTR error */
732 regs->result = -EINTR;
733 regs->gpr[3] = EINTR;
734 /* note that the cr0.SO bit is already set */
735 } else {
736 regs->nip -= 4; /* Back up & retry system call */
737 regs->result = 0;
738 regs->trap = 0;
739 if (ret == ERESTART_RESTARTBLOCK)
740 regs->gpr[0] = __NR_restart_syscall;
741 else
742 regs->gpr[3] = regs->orig_gpr3;
743 }
744 }
745
746 if (signr == 0)
747 return 0; /* no signals delivered */
748
749 if ((ka.sa.sa_flags & SA_ONSTACK) && current->sas_ss_size
750 && !on_sig_stack(regs->gpr[1]))
751 newsp = current->sas_ss_sp + current->sas_ss_size;
752 else
753 newsp = regs->gpr[1];
754 newsp &= ~0xfUL;
755
756 /* Whee! Actually deliver the signal. */
757 if (ka.sa.sa_flags & SA_SIGINFO)
758 handle_rt_signal(signr, &ka, &info, oldset, regs, newsp);
759 else
760 handle_signal(signr, &ka, &info, oldset, regs, newsp);
761
762 spin_lock_irq(&current->sighand->siglock);
763 sigorsets(&current->blocked,&current->blocked,&ka.sa.sa_mask);
764 if (!(ka.sa.sa_flags & SA_NODEFER))
765 sigaddset(&current->blocked, signr);
766 recalc_sigpending();
767 spin_unlock_irq(&current->sighand->siglock);
768
769 return 1;
770}
771
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index 726fe7ce1747..bc5bf1124836 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -34,11 +34,11 @@
34#include <asm/thread_info.h> 34#include <asm/thread_info.h>
35#include <asm/tlbflush.h> 35#include <asm/tlbflush.h>
36#include <asm/xmon.h> 36#include <asm/xmon.h>
37#include <asm/machdep.h>
37 38
38volatile int smp_commenced; 39volatile int smp_commenced;
39int smp_tb_synchronized; 40int smp_tb_synchronized;
40struct cpuinfo_PPC cpu_data[NR_CPUS]; 41struct cpuinfo_PPC cpu_data[NR_CPUS];
41struct klock_info_struct klock_info = { KLOCK_CLEAR, 0 };
42atomic_t ipi_recv; 42atomic_t ipi_recv;
43atomic_t ipi_sent; 43atomic_t ipi_sent;
44cpumask_t cpu_online_map; 44cpumask_t cpu_online_map;
@@ -51,7 +51,7 @@ EXPORT_SYMBOL(cpu_online_map);
51EXPORT_SYMBOL(cpu_possible_map); 51EXPORT_SYMBOL(cpu_possible_map);
52 52
53/* SMP operations for this machine */ 53/* SMP operations for this machine */
54static struct smp_ops_t *smp_ops; 54struct smp_ops_t *smp_ops;
55 55
56/* all cpu mappings are 1-1 -- Cort */ 56/* all cpu mappings are 1-1 -- Cort */
57volatile unsigned long cpu_callin_map[NR_CPUS]; 57volatile unsigned long cpu_callin_map[NR_CPUS];
@@ -74,11 +74,11 @@ extern void __save_cpu_setup(void);
74#define PPC_MSG_XMON_BREAK 3 74#define PPC_MSG_XMON_BREAK 3
75 75
76static inline void 76static inline void
77smp_message_pass(int target, int msg, unsigned long data, int wait) 77smp_message_pass(int target, int msg)
78{ 78{
79 if (smp_ops){ 79 if (smp_ops) {
80 atomic_inc(&ipi_sent); 80 atomic_inc(&ipi_sent);
81 smp_ops->message_pass(target,msg,data,wait); 81 smp_ops->message_pass(target, msg);
82 } 82 }
83} 83}
84 84
@@ -119,7 +119,7 @@ void smp_message_recv(int msg, struct pt_regs *regs)
119void smp_send_tlb_invalidate(int cpu) 119void smp_send_tlb_invalidate(int cpu)
120{ 120{
121 if ( PVR_VER(mfspr(SPRN_PVR)) == 8 ) 121 if ( PVR_VER(mfspr(SPRN_PVR)) == 8 )
122 smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB, 0, 0); 122 smp_message_pass(MSG_ALL_BUT_SELF, PPC_MSG_INVALIDATE_TLB);
123} 123}
124 124
125void smp_send_reschedule(int cpu) 125void smp_send_reschedule(int cpu)
@@ -135,13 +135,13 @@ void smp_send_reschedule(int cpu)
135 */ 135 */
136 /* This is only used if `cpu' is running an idle task, 136 /* This is only used if `cpu' is running an idle task,
137 so it will reschedule itself anyway... */ 137 so it will reschedule itself anyway... */
138 smp_message_pass(cpu, PPC_MSG_RESCHEDULE, 0, 0); 138 smp_message_pass(cpu, PPC_MSG_RESCHEDULE);
139} 139}
140 140
141#ifdef CONFIG_XMON 141#ifdef CONFIG_XMON
142void smp_send_xmon_break(int cpu) 142void smp_send_xmon_break(int cpu)
143{ 143{
144 smp_message_pass(cpu, PPC_MSG_XMON_BREAK, 0, 0); 144 smp_message_pass(cpu, PPC_MSG_XMON_BREAK);
145} 145}
146#endif /* CONFIG_XMON */ 146#endif /* CONFIG_XMON */
147 147
@@ -224,7 +224,7 @@ static int __smp_call_function(void (*func) (void *info), void *info,
224 spin_lock(&call_lock); 224 spin_lock(&call_lock);
225 call_data = &data; 225 call_data = &data;
226 /* Send a message to all other CPUs and wait for them to respond */ 226 /* Send a message to all other CPUs and wait for them to respond */
227 smp_message_pass(target, PPC_MSG_CALL_FUNCTION, 0, 0); 227 smp_message_pass(target, PPC_MSG_CALL_FUNCTION);
228 228
229 /* Wait for response */ 229 /* Wait for response */
230 timeout = 1000000; 230 timeout = 1000000;
@@ -294,7 +294,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
294 smp_store_cpu_info(smp_processor_id()); 294 smp_store_cpu_info(smp_processor_id());
295 cpu_callin_map[smp_processor_id()] = 1; 295 cpu_callin_map[smp_processor_id()] = 1;
296 296
297 smp_ops = ppc_md.smp_ops;
298 if (smp_ops == NULL) { 297 if (smp_ops == NULL) {
299 printk("SMP not supported on this machine.\n"); 298 printk("SMP not supported on this machine.\n");
300 return; 299 return;
@@ -308,9 +307,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
308 /* Backup CPU 0 state */ 307 /* Backup CPU 0 state */
309 __save_cpu_setup(); 308 __save_cpu_setup();
310 309
311 if (smp_ops->space_timers)
312 smp_ops->space_timers(num_cpus);
313
314 for_each_cpu(cpu) { 310 for_each_cpu(cpu) {
315 if (cpu == smp_processor_id()) 311 if (cpu == smp_processor_id())
316 continue; 312 continue;
diff --git a/arch/ppc/kernel/syscalls.c b/arch/ppc/kernel/syscalls.c
deleted file mode 100644
index 127f040de9de..000000000000
--- a/arch/ppc/kernel/syscalls.c
+++ /dev/null
@@ -1,268 +0,0 @@
1/*
2 * arch/ppc/kernel/sys_ppc.c
3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Derived from "arch/i386/kernel/sys_i386.c"
8 * Adapted from the i386 version by Gary Thomas
9 * Modified by Cort Dougan (cort@cs.nmt.edu)
10 * and Paul Mackerras (paulus@cs.anu.edu.au).
11 *
12 * This file contains various random system calls that
13 * have a non-standard calling sequence on the Linux/PPC
14 * platform.
15 *
16 * This program is free software; you can redistribute it and/or
17 * modify it under the terms of the GNU General Public License
18 * as published by the Free Software Foundation; either version
19 * 2 of the License, or (at your option) any later version.
20 *
21 */
22
23#include <linux/errno.h>
24#include <linux/sched.h>
25#include <linux/mm.h>
26#include <linux/smp.h>
27#include <linux/smp_lock.h>
28#include <linux/sem.h>
29#include <linux/msg.h>
30#include <linux/shm.h>
31#include <linux/stat.h>
32#include <linux/syscalls.h>
33#include <linux/mman.h>
34#include <linux/sys.h>
35#include <linux/ipc.h>
36#include <linux/utsname.h>
37#include <linux/file.h>
38#include <linux/unistd.h>
39
40#include <asm/uaccess.h>
41#include <asm/ipc.h>
42#include <asm/semaphore.h>
43
44
45/*
46 * sys_ipc() is the de-multiplexer for the SysV IPC calls..
47 *
48 * This is really horribly ugly.
49 */
50int
51sys_ipc (uint call, int first, int second, int third, void __user *ptr, long fifth)
52{
53 int version, ret;
54
55 version = call >> 16; /* hack for backward compatibility */
56 call &= 0xffff;
57
58 ret = -ENOSYS;
59 switch (call) {
60 case SEMOP:
61 ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
62 second, NULL);
63 break;
64 case SEMTIMEDOP:
65 ret = sys_semtimedop (first, (struct sembuf __user *)ptr,
66 second, (const struct timespec __user *) fifth);
67 break;
68 case SEMGET:
69 ret = sys_semget (first, second, third);
70 break;
71 case SEMCTL: {
72 union semun fourth;
73
74 if (!ptr)
75 break;
76 if ((ret = access_ok(VERIFY_READ, ptr, sizeof(long)) ? 0 : -EFAULT)
77 || (ret = get_user(fourth.__pad, (void __user *__user *)ptr)))
78 break;
79 ret = sys_semctl (first, second, third, fourth);
80 break;
81 }
82 case MSGSND:
83 ret = sys_msgsnd (first, (struct msgbuf __user *) ptr, second, third);
84 break;
85 case MSGRCV:
86 switch (version) {
87 case 0: {
88 struct ipc_kludge tmp;
89
90 if (!ptr)
91 break;
92 if ((ret = access_ok(VERIFY_READ, ptr, sizeof(tmp)) ? 0 : -EFAULT)
93 || (ret = copy_from_user(&tmp,
94 (struct ipc_kludge __user *) ptr,
95 sizeof (tmp)) ? -EFAULT : 0))
96 break;
97 ret = sys_msgrcv (first, tmp.msgp, second, tmp.msgtyp,
98 third);
99 break;
100 }
101 default:
102 ret = sys_msgrcv (first, (struct msgbuf __user *) ptr,
103 second, fifth, third);
104 break;
105 }
106 break;
107 case MSGGET:
108 ret = sys_msgget ((key_t) first, second);
109 break;
110 case MSGCTL:
111 ret = sys_msgctl (first, second, (struct msqid_ds __user *) ptr);
112 break;
113 case SHMAT: {
114 ulong raddr;
115
116 if ((ret = access_ok(VERIFY_WRITE, (ulong __user *) third,
117 sizeof(ulong)) ? 0 : -EFAULT))
118 break;
119 ret = do_shmat (first, (char __user *) ptr, second, &raddr);
120 if (ret)
121 break;
122 ret = put_user (raddr, (ulong __user *) third);
123 break;
124 }
125 case SHMDT:
126 ret = sys_shmdt ((char __user *)ptr);
127 break;
128 case SHMGET:
129 ret = sys_shmget (first, second, third);
130 break;
131 case SHMCTL:
132 ret = sys_shmctl (first, second, (struct shmid_ds __user *) ptr);
133 break;
134 }
135
136 return ret;
137}
138
139/*
140 * sys_pipe() is the normal C calling standard for creating
141 * a pipe. It's not the way unix traditionally does this, though.
142 */
143int sys_pipe(int __user *fildes)
144{
145 int fd[2];
146 int error;
147
148 error = do_pipe(fd);
149 if (!error) {
150 if (copy_to_user(fildes, fd, 2*sizeof(int)))
151 error = -EFAULT;
152 }
153 return error;
154}
155
156static inline unsigned long
157do_mmap2(unsigned long addr, size_t len,
158 unsigned long prot, unsigned long flags,
159 unsigned long fd, unsigned long pgoff)
160{
161 struct file * file = NULL;
162 int ret = -EBADF;
163
164 flags &= ~(MAP_EXECUTABLE | MAP_DENYWRITE);
165 if (!(flags & MAP_ANONYMOUS)) {
166 if (!(file = fget(fd)))
167 goto out;
168 }
169
170 down_write(&current->mm->mmap_sem);
171 ret = do_mmap_pgoff(file, addr, len, prot, flags, pgoff);
172 up_write(&current->mm->mmap_sem);
173 if (file)
174 fput(file);
175out:
176 return ret;
177}
178
179unsigned long sys_mmap2(unsigned long addr, size_t len,
180 unsigned long prot, unsigned long flags,
181 unsigned long fd, unsigned long pgoff)
182{
183 return do_mmap2(addr, len, prot, flags, fd, pgoff);
184}
185
186unsigned long sys_mmap(unsigned long addr, size_t len,
187 unsigned long prot, unsigned long flags,
188 unsigned long fd, off_t offset)
189{
190 int err = -EINVAL;
191
192 if (offset & ~PAGE_MASK)
193 goto out;
194
195 err = do_mmap2(addr, len, prot, flags, fd, offset >> PAGE_SHIFT);
196out:
197 return err;
198}
199
200/*
201 * Due to some executables calling the wrong select we sometimes
202 * get wrong args. This determines how the args are being passed
203 * (a single ptr to them all args passed) then calls
204 * sys_select() with the appropriate args. -- Cort
205 */
206int
207ppc_select(int n, fd_set __user *inp, fd_set __user *outp, fd_set __user *exp, struct timeval __user *tvp)
208{
209 if ( (unsigned long)n >= 4096 )
210 {
211 unsigned long __user *buffer = (unsigned long __user *)n;
212 if (!access_ok(VERIFY_READ, buffer, 5*sizeof(unsigned long))
213 || __get_user(n, buffer)
214 || __get_user(inp, ((fd_set __user * __user *)(buffer+1)))
215 || __get_user(outp, ((fd_set __user * __user *)(buffer+2)))
216 || __get_user(exp, ((fd_set __user * __user *)(buffer+3)))
217 || __get_user(tvp, ((struct timeval __user * __user *)(buffer+4))))
218 return -EFAULT;
219 }
220 return sys_select(n, inp, outp, exp, tvp);
221}
222
223int sys_uname(struct old_utsname __user * name)
224{
225 int err = -EFAULT;
226
227 down_read(&uts_sem);
228 if (name && !copy_to_user(name, &system_utsname, sizeof (*name)))
229 err = 0;
230 up_read(&uts_sem);
231 return err;
232}
233
234int sys_olduname(struct oldold_utsname __user * name)
235{
236 int error;
237
238 if (!name)
239 return -EFAULT;
240 if (!access_ok(VERIFY_WRITE,name,sizeof(struct oldold_utsname)))
241 return -EFAULT;
242
243 down_read(&uts_sem);
244 error = __copy_to_user(&name->sysname,&system_utsname.sysname,__OLD_UTS_LEN);
245 error -= __put_user(0,name->sysname+__OLD_UTS_LEN);
246 error -= __copy_to_user(&name->nodename,&system_utsname.nodename,__OLD_UTS_LEN);
247 error -= __put_user(0,name->nodename+__OLD_UTS_LEN);
248 error -= __copy_to_user(&name->release,&system_utsname.release,__OLD_UTS_LEN);
249 error -= __put_user(0,name->release+__OLD_UTS_LEN);
250 error -= __copy_to_user(&name->version,&system_utsname.version,__OLD_UTS_LEN);
251 error -= __put_user(0,name->version+__OLD_UTS_LEN);
252 error -= __copy_to_user(&name->machine,&system_utsname.machine,__OLD_UTS_LEN);
253 error = __put_user(0,name->machine+__OLD_UTS_LEN);
254 up_read(&uts_sem);
255
256 error = error ? -EFAULT : 0;
257 return error;
258}
259
260/*
261 * We put the arguments in a different order so we only use 6
262 * registers for arguments, rather than 7 as sys_fadvise64_64 needs
263 * (because `offset' goes in r5/r6).
264 */
265long ppc_fadvise64_64(int fd, int advice, loff_t offset, loff_t len)
266{
267 return sys_fadvise64_64(fd, offset, len, advice);
268}
diff --git a/arch/ppc/kernel/time.c b/arch/ppc/kernel/time.c
index 67797184f4eb..53ea723af60a 100644
--- a/arch/ppc/kernel/time.c
+++ b/arch/ppc/kernel/time.c
@@ -116,6 +116,15 @@ unsigned long profile_pc(struct pt_regs *regs)
116EXPORT_SYMBOL(profile_pc); 116EXPORT_SYMBOL(profile_pc);
117#endif 117#endif
118 118
119void wakeup_decrementer(void)
120{
121 set_dec(tb_ticks_per_jiffy);
122 /* No currently-supported powerbook has a 601,
123 * so use get_tbl, not native
124 */
125 last_jiffy_stamp(0) = tb_last_stamp = get_tbl();
126}
127
119/* 128/*
120 * timer_interrupt - gets called when the decrementer overflows, 129 * timer_interrupt - gets called when the decrementer overflows,
121 * with interrupts disabled. 130 * with interrupts disabled.
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 961ede87be72..f265b81e7008 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -41,9 +41,14 @@
41#ifdef CONFIG_PMAC_BACKLIGHT 41#ifdef CONFIG_PMAC_BACKLIGHT
42#include <asm/backlight.h> 42#include <asm/backlight.h>
43#endif 43#endif
44#include <asm/perfmon.h> 44#include <asm/pmc.h>
45 45
46#ifdef CONFIG_XMON 46#ifdef CONFIG_XMON
47extern int xmon_bpt(struct pt_regs *regs);
48extern int xmon_sstep(struct pt_regs *regs);
49extern int xmon_iabr_match(struct pt_regs *regs);
50extern int xmon_dabr_match(struct pt_regs *regs);
51
47void (*debugger)(struct pt_regs *regs) = xmon; 52void (*debugger)(struct pt_regs *regs) = xmon;
48int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt; 53int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
49int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep; 54int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
@@ -74,7 +79,7 @@ void (*debugger_fault_handler)(struct pt_regs *regs);
74 79
75DEFINE_SPINLOCK(die_lock); 80DEFINE_SPINLOCK(die_lock);
76 81
77void die(const char * str, struct pt_regs * fp, long err) 82int die(const char * str, struct pt_regs * fp, long err)
78{ 83{
79 static int die_counter; 84 static int die_counter;
80 int nl = 0; 85 int nl = 0;
@@ -232,7 +237,7 @@ platform_machine_check(struct pt_regs *regs)
232{ 237{
233} 238}
234 239
235void MachineCheckException(struct pt_regs *regs) 240void machine_check_exception(struct pt_regs *regs)
236{ 241{
237 unsigned long reason = get_mc_reason(regs); 242 unsigned long reason = get_mc_reason(regs);
238 243
@@ -393,14 +398,14 @@ void SMIException(struct pt_regs *regs)
393#endif 398#endif
394} 399}
395 400
396void UnknownException(struct pt_regs *regs) 401void unknown_exception(struct pt_regs *regs)
397{ 402{
398 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 403 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
399 regs->nip, regs->msr, regs->trap, print_tainted()); 404 regs->nip, regs->msr, regs->trap, print_tainted());
400 _exception(SIGTRAP, regs, 0, 0); 405 _exception(SIGTRAP, regs, 0, 0);
401} 406}
402 407
403void InstructionBreakpoint(struct pt_regs *regs) 408void instruction_breakpoint_exception(struct pt_regs *regs)
404{ 409{
405 if (debugger_iabr_match(regs)) 410 if (debugger_iabr_match(regs))
406 return; 411 return;
@@ -575,7 +580,7 @@ extern struct bug_entry __start___bug_table[], __stop___bug_table[];
575#define module_find_bug(x) NULL 580#define module_find_bug(x) NULL
576#endif 581#endif
577 582
578static struct bug_entry *find_bug(unsigned long bugaddr) 583struct bug_entry *find_bug(unsigned long bugaddr)
579{ 584{
580 struct bug_entry *bug; 585 struct bug_entry *bug;
581 586
@@ -622,7 +627,7 @@ int check_bug_trap(struct pt_regs *regs)
622 return 0; 627 return 0;
623} 628}
624 629
625void ProgramCheckException(struct pt_regs *regs) 630void program_check_exception(struct pt_regs *regs)
626{ 631{
627 unsigned int reason = get_reason(regs); 632 unsigned int reason = get_reason(regs);
628 extern int do_mathemu(struct pt_regs *regs); 633 extern int do_mathemu(struct pt_regs *regs);
@@ -654,7 +659,7 @@ void ProgramCheckException(struct pt_regs *regs)
654 giveup_fpu(current); 659 giveup_fpu(current);
655 preempt_enable(); 660 preempt_enable();
656 661
657 fpscr = current->thread.fpscr; 662 fpscr = current->thread.fpscr.val;
658 fpscr &= fpscr << 22; /* mask summary bits with enables */ 663 fpscr &= fpscr << 22; /* mask summary bits with enables */
659 if (fpscr & FPSCR_VX) 664 if (fpscr & FPSCR_VX)
660 code = FPE_FLTINV; 665 code = FPE_FLTINV;
@@ -701,7 +706,7 @@ void ProgramCheckException(struct pt_regs *regs)
701 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 706 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
702} 707}
703 708
704void SingleStepException(struct pt_regs *regs) 709void single_step_exception(struct pt_regs *regs)
705{ 710{
706 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 711 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
707 if (debugger_sstep(regs)) 712 if (debugger_sstep(regs))
@@ -709,7 +714,7 @@ void SingleStepException(struct pt_regs *regs)
709 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 714 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
710} 715}
711 716
712void AlignmentException(struct pt_regs *regs) 717void alignment_exception(struct pt_regs *regs)
713{ 718{
714 int fixed; 719 int fixed;
715 720
@@ -814,7 +819,18 @@ void TAUException(struct pt_regs *regs)
814} 819}
815#endif /* CONFIG_INT_TAU */ 820#endif /* CONFIG_INT_TAU */
816 821
817void AltivecUnavailException(struct pt_regs *regs) 822/*
823 * FP unavailable trap from kernel - print a message, but let
824 * the task use FP in the kernel until it returns to user mode.
825 */
826void kernel_fp_unavailable_exception(struct pt_regs *regs)
827{
828 regs->msr |= MSR_FP;
829 printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
830 current, regs->nip);
831}
832
833void altivec_unavailable_exception(struct pt_regs *regs)
818{ 834{
819 static int kernel_altivec_count; 835 static int kernel_altivec_count;
820 836
@@ -835,7 +851,7 @@ void AltivecUnavailException(struct pt_regs *regs)
835} 851}
836 852
837#ifdef CONFIG_ALTIVEC 853#ifdef CONFIG_ALTIVEC
838void AltivecAssistException(struct pt_regs *regs) 854void altivec_assist_exception(struct pt_regs *regs)
839{ 855{
840 int err; 856 int err;
841 857
@@ -872,7 +888,7 @@ void AltivecAssistException(struct pt_regs *regs)
872#endif /* CONFIG_ALTIVEC */ 888#endif /* CONFIG_ALTIVEC */
873 889
874#ifdef CONFIG_E500 890#ifdef CONFIG_E500
875void PerformanceMonitorException(struct pt_regs *regs) 891void performance_monitor_exception(struct pt_regs *regs)
876{ 892{
877 perf_irq(regs); 893 perf_irq(regs);
878} 894}
diff --git a/arch/ppc/kernel/vecemu.c b/arch/ppc/kernel/vecemu.c
deleted file mode 100644
index 604d0947cb20..000000000000
--- a/arch/ppc/kernel/vecemu.c
+++ /dev/null
@@ -1,345 +0,0 @@
1/*
2 * Routines to emulate some Altivec/VMX instructions, specifically
3 * those that can trap when given denormalized operands in Java mode.
4 */
5#include <linux/kernel.h>
6#include <linux/errno.h>
7#include <linux/sched.h>
8#include <asm/ptrace.h>
9#include <asm/processor.h>
10#include <asm/uaccess.h>
11
12/* Functions in vector.S */
13extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
14extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
15extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
16extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
17extern void vrefp(vector128 *dst, vector128 *src);
18extern void vrsqrtefp(vector128 *dst, vector128 *src);
19extern void vexptep(vector128 *dst, vector128 *src);
20
21static unsigned int exp2s[8] = {
22 0x800000,
23 0x8b95c2,
24 0x9837f0,
25 0xa5fed7,
26 0xb504f3,
27 0xc5672a,
28 0xd744fd,
29 0xeac0c7
30};
31
32/*
33 * Computes an estimate of 2^x. The `s' argument is the 32-bit
34 * single-precision floating-point representation of x.
35 */
36static unsigned int eexp2(unsigned int s)
37{
38 int exp, pwr;
39 unsigned int mant, frac;
40
41 /* extract exponent field from input */
42 exp = ((s >> 23) & 0xff) - 127;
43 if (exp > 7) {
44 /* check for NaN input */
45 if (exp == 128 && (s & 0x7fffff) != 0)
46 return s | 0x400000; /* return QNaN */
47 /* 2^-big = 0, 2^+big = +Inf */
48 return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
49 }
50 if (exp < -23)
51 return 0x3f800000; /* 1.0 */
52
53 /* convert to fixed point integer in 9.23 representation */
54 pwr = (s & 0x7fffff) | 0x800000;
55 if (exp > 0)
56 pwr <<= exp;
57 else
58 pwr >>= -exp;
59 if (s & 0x80000000)
60 pwr = -pwr;
61
62 /* extract integer part, which becomes exponent part of result */
63 exp = (pwr >> 23) + 126;
64 if (exp >= 254)
65 return 0x7f800000;
66 if (exp < -23)
67 return 0;
68
69 /* table lookup on top 3 bits of fraction to get mantissa */
70 mant = exp2s[(pwr >> 20) & 7];
71
72 /* linear interpolation using remaining 20 bits of fraction */
73 asm("mulhwu %0,%1,%2" : "=r" (frac)
74 : "r" (pwr << 12), "r" (0x172b83ff));
75 asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
76 mant += frac;
77
78 if (exp >= 0)
79 return mant + (exp << 23);
80
81 /* denormalized result */
82 exp = -exp;
83 mant += 1 << (exp - 1);
84 return mant >> exp;
85}
86
87/*
88 * Computes an estimate of log_2(x). The `s' argument is the 32-bit
89 * single-precision floating-point representation of x.
90 */
91static unsigned int elog2(unsigned int s)
92{
93 int exp, mant, lz, frac;
94
95 exp = s & 0x7f800000;
96 mant = s & 0x7fffff;
97 if (exp == 0x7f800000) { /* Inf or NaN */
98 if (mant != 0)
99 s |= 0x400000; /* turn NaN into QNaN */
100 return s;
101 }
102 if ((exp | mant) == 0) /* +0 or -0 */
103 return 0xff800000; /* return -Inf */
104
105 if (exp == 0) {
106 /* denormalized */
107 asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
108 mant <<= lz - 8;
109 exp = (-118 - lz) << 23;
110 } else {
111 mant |= 0x800000;
112 exp -= 127 << 23;
113 }
114
115 if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */
116 exp |= 0x400000; /* 0.5 * 2^23 */
117 asm("mulhwu %0,%1,%2" : "=r" (mant)
118 : "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */
119 }
120 if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */
121 exp |= 0x200000; /* 0.25 * 2^23 */
122 asm("mulhwu %0,%1,%2" : "=r" (mant)
123 : "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */
124 }
125 if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */
126 exp |= 0x100000; /* 0.125 * 2^23 */
127 asm("mulhwu %0,%1,%2" : "=r" (mant)
128 : "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */
129 }
130 if (mant > 0x800000) { /* 1.0 * 2^23 */
131 /* calculate (mant - 1) * 1.381097463 */
132 /* 1.381097463 == 0.125 / (2^0.125 - 1) */
133 asm("mulhwu %0,%1,%2" : "=r" (frac)
134 : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
135 exp += frac;
136 }
137 s = exp & 0x80000000;
138 if (exp != 0) {
139 if (s)
140 exp = -exp;
141 asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
142 lz = 8 - lz;
143 if (lz > 0)
144 exp >>= lz;
145 else if (lz < 0)
146 exp <<= -lz;
147 s += ((lz + 126) << 23) + exp;
148 }
149 return s;
150}
151
152#define VSCR_SAT 1
153
154static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
155{
156 int exp, mant;
157
158 exp = (x >> 23) & 0xff;
159 mant = x & 0x7fffff;
160 if (exp == 255 && mant != 0)
161 return 0; /* NaN -> 0 */
162 exp = exp - 127 + scale;
163 if (exp < 0)
164 return 0; /* round towards zero */
165 if (exp >= 31) {
166 /* saturate, unless the result would be -2^31 */
167 if (x + (scale << 23) != 0xcf000000)
168 *vscrp |= VSCR_SAT;
169 return (x & 0x80000000)? 0x80000000: 0x7fffffff;
170 }
171 mant |= 0x800000;
172 mant = (mant << 7) >> (30 - exp);
173 return (x & 0x80000000)? -mant: mant;
174}
175
176static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
177{
178 int exp;
179 unsigned int mant;
180
181 exp = (x >> 23) & 0xff;
182 mant = x & 0x7fffff;
183 if (exp == 255 && mant != 0)
184 return 0; /* NaN -> 0 */
185 exp = exp - 127 + scale;
186 if (exp < 0)
187 return 0; /* round towards zero */
188 if (x & 0x80000000) {
189 /* negative => saturate to 0 */
190 *vscrp |= VSCR_SAT;
191 return 0;
192 }
193 if (exp >= 32) {
194 /* saturate */
195 *vscrp |= VSCR_SAT;
196 return 0xffffffff;
197 }
198 mant |= 0x800000;
199 mant = (mant << 8) >> (31 - exp);
200 return mant;
201}
202
203/* Round to floating integer, towards 0 */
204static unsigned int rfiz(unsigned int x)
205{
206 int exp;
207
208 exp = ((x >> 23) & 0xff) - 127;
209 if (exp == 128 && (x & 0x7fffff) != 0)
210 return x | 0x400000; /* NaN -> make it a QNaN */
211 if (exp >= 23)
212 return x; /* it's an integer already (or Inf) */
213 if (exp < 0)
214 return x & 0x80000000; /* |x| < 1.0 rounds to 0 */
215 return x & ~(0x7fffff >> exp);
216}
217
218/* Round to floating integer, towards +/- Inf */
219static unsigned int rfii(unsigned int x)
220{
221 int exp, mask;
222
223 exp = ((x >> 23) & 0xff) - 127;
224 if (exp == 128 && (x & 0x7fffff) != 0)
225 return x | 0x400000; /* NaN -> make it a QNaN */
226 if (exp >= 23)
227 return x; /* it's an integer already (or Inf) */
228 if ((x & 0x7fffffff) == 0)
229 return x; /* +/-0 -> +/-0 */
230 if (exp < 0)
231 /* 0 < |x| < 1.0 rounds to +/- 1.0 */
232 return (x & 0x80000000) | 0x3f800000;
233 mask = 0x7fffff >> exp;
234 /* mantissa overflows into exponent - that's OK,
235 it can't overflow into the sign bit */
236 return (x + mask) & ~mask;
237}
238
239/* Round to floating integer, to nearest */
240static unsigned int rfin(unsigned int x)
241{
242 int exp, half;
243
244 exp = ((x >> 23) & 0xff) - 127;
245 if (exp == 128 && (x & 0x7fffff) != 0)
246 return x | 0x400000; /* NaN -> make it a QNaN */
247 if (exp >= 23)
248 return x; /* it's an integer already (or Inf) */
249 if (exp < -1)
250 return x & 0x80000000; /* |x| < 0.5 -> +/-0 */
251 if (exp == -1)
252 /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
253 return (x & 0x80000000) | 0x3f800000;
254 half = 0x400000 >> exp;
255 /* add 0.5 to the magnitude and chop off the fraction bits */
256 return (x + half) & ~(0x7fffff >> exp);
257}
258
259int emulate_altivec(struct pt_regs *regs)
260{
261 unsigned int instr, i;
262 unsigned int va, vb, vc, vd;
263 vector128 *vrs;
264
265 if (get_user(instr, (unsigned int __user *) regs->nip))
266 return -EFAULT;
267 if ((instr >> 26) != 4)
268 return -EINVAL; /* not an altivec instruction */
269 vd = (instr >> 21) & 0x1f;
270 va = (instr >> 16) & 0x1f;
271 vb = (instr >> 11) & 0x1f;
272 vc = (instr >> 6) & 0x1f;
273
274 vrs = current->thread.vr;
275 switch (instr & 0x3f) {
276 case 10:
277 switch (vc) {
278 case 0: /* vaddfp */
279 vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
280 break;
281 case 1: /* vsubfp */
282 vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
283 break;
284 case 4: /* vrefp */
285 vrefp(&vrs[vd], &vrs[vb]);
286 break;
287 case 5: /* vrsqrtefp */
288 vrsqrtefp(&vrs[vd], &vrs[vb]);
289 break;
290 case 6: /* vexptefp */
291 for (i = 0; i < 4; ++i)
292 vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
293 break;
294 case 7: /* vlogefp */
295 for (i = 0; i < 4; ++i)
296 vrs[vd].u[i] = elog2(vrs[vb].u[i]);
297 break;
298 case 8: /* vrfin */
299 for (i = 0; i < 4; ++i)
300 vrs[vd].u[i] = rfin(vrs[vb].u[i]);
301 break;
302 case 9: /* vrfiz */
303 for (i = 0; i < 4; ++i)
304 vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
305 break;
306 case 10: /* vrfip */
307 for (i = 0; i < 4; ++i) {
308 u32 x = vrs[vb].u[i];
309 x = (x & 0x80000000)? rfiz(x): rfii(x);
310 vrs[vd].u[i] = x;
311 }
312 break;
313 case 11: /* vrfim */
314 for (i = 0; i < 4; ++i) {
315 u32 x = vrs[vb].u[i];
316 x = (x & 0x80000000)? rfii(x): rfiz(x);
317 vrs[vd].u[i] = x;
318 }
319 break;
320 case 14: /* vctuxs */
321 for (i = 0; i < 4; ++i)
322 vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
323 &current->thread.vscr.u[3]);
324 break;
325 case 15: /* vctsxs */
326 for (i = 0; i < 4; ++i)
327 vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
328 &current->thread.vscr.u[3]);
329 break;
330 default:
331 return -EINVAL;
332 }
333 break;
334 case 46: /* vmaddfp */
335 vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
336 break;
337 case 47: /* vnmsubfp */
338 vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
339 break;
340 default:
341 return -EINVAL;
342 }
343
344 return 0;
345}
diff --git a/arch/ppc/kernel/vector.S b/arch/ppc/kernel/vector.S
deleted file mode 100644
index 82a21346bf80..000000000000
--- a/arch/ppc/kernel/vector.S
+++ /dev/null
@@ -1,217 +0,0 @@
1#include <asm/ppc_asm.h>
2#include <asm/processor.h>
3
4/*
5 * The routines below are in assembler so we can closely control the
6 * usage of floating-point registers. These routines must be called
7 * with preempt disabled.
8 */
9 .data
10fpzero:
11 .long 0
12fpone:
13 .long 0x3f800000 /* 1.0 in single-precision FP */
14fphalf:
15 .long 0x3f000000 /* 0.5 in single-precision FP */
16
17 .text
18/*
19 * Internal routine to enable floating point and set FPSCR to 0.
20 * Don't call it from C; it doesn't use the normal calling convention.
21 */
22fpenable:
23 mfmsr r10
24 ori r11,r10,MSR_FP
25 mtmsr r11
26 isync
27 stfd fr0,24(r1)
28 stfd fr1,16(r1)
29 stfd fr31,8(r1)
30 lis r11,fpzero@ha
31 mffs fr31
32 lfs fr1,fpzero@l(r11)
33 mtfsf 0xff,fr1
34 blr
35
36fpdisable:
37 mtfsf 0xff,fr31
38 lfd fr31,8(r1)
39 lfd fr1,16(r1)
40 lfd fr0,24(r1)
41 mtmsr r10
42 isync
43 blr
44
45/*
46 * Vector add, floating point.
47 */
48 .globl vaddfp
49vaddfp:
50 stwu r1,-32(r1)
51 mflr r0
52 stw r0,36(r1)
53 bl fpenable
54 li r0,4
55 mtctr r0
56 li r6,0
571: lfsx fr0,r4,r6
58 lfsx fr1,r5,r6
59 fadds fr0,fr0,fr1
60 stfsx fr0,r3,r6
61 addi r6,r6,4
62 bdnz 1b
63 bl fpdisable
64 lwz r0,36(r1)
65 mtlr r0
66 addi r1,r1,32
67 blr
68
69/*
70 * Vector subtract, floating point.
71 */
72 .globl vsubfp
73vsubfp:
74 stwu r1,-32(r1)
75 mflr r0
76 stw r0,36(r1)
77 bl fpenable
78 li r0,4
79 mtctr r0
80 li r6,0
811: lfsx fr0,r4,r6
82 lfsx fr1,r5,r6
83 fsubs fr0,fr0,fr1
84 stfsx fr0,r3,r6
85 addi r6,r6,4
86 bdnz 1b
87 bl fpdisable
88 lwz r0,36(r1)
89 mtlr r0
90 addi r1,r1,32
91 blr
92
93/*
94 * Vector multiply and add, floating point.
95 */
96 .globl vmaddfp
97vmaddfp:
98 stwu r1,-48(r1)
99 mflr r0
100 stw r0,52(r1)
101 bl fpenable
102 stfd fr2,32(r1)
103 li r0,4
104 mtctr r0
105 li r7,0
1061: lfsx fr0,r4,r7
107 lfsx fr1,r5,r7
108 lfsx fr2,r6,r7
109 fmadds fr0,fr0,fr2,fr1
110 stfsx fr0,r3,r7
111 addi r7,r7,4
112 bdnz 1b
113 lfd fr2,32(r1)
114 bl fpdisable
115 lwz r0,52(r1)
116 mtlr r0
117 addi r1,r1,48
118 blr
119
120/*
121 * Vector negative multiply and subtract, floating point.
122 */
123 .globl vnmsubfp
124vnmsubfp:
125 stwu r1,-48(r1)
126 mflr r0
127 stw r0,52(r1)
128 bl fpenable
129 stfd fr2,32(r1)
130 li r0,4
131 mtctr r0
132 li r7,0
1331: lfsx fr0,r4,r7
134 lfsx fr1,r5,r7
135 lfsx fr2,r6,r7
136 fnmsubs fr0,fr0,fr2,fr1
137 stfsx fr0,r3,r7
138 addi r7,r7,4
139 bdnz 1b
140 lfd fr2,32(r1)
141 bl fpdisable
142 lwz r0,52(r1)
143 mtlr r0
144 addi r1,r1,48
145 blr
146
147/*
148 * Vector reciprocal estimate. We just compute 1.0/x.
149 * r3 -> destination, r4 -> source.
150 */
151 .globl vrefp
152vrefp:
153 stwu r1,-32(r1)
154 mflr r0
155 stw r0,36(r1)
156 bl fpenable
157 lis r9,fpone@ha
158 li r0,4
159 lfs fr1,fpone@l(r9)
160 mtctr r0
161 li r6,0
1621: lfsx fr0,r4,r6
163 fdivs fr0,fr1,fr0
164 stfsx fr0,r3,r6
165 addi r6,r6,4
166 bdnz 1b
167 bl fpdisable
168 lwz r0,36(r1)
169 mtlr r0
170 addi r1,r1,32
171 blr
172
173/*
174 * Vector reciprocal square-root estimate, floating point.
175 * We use the frsqrte instruction for the initial estimate followed
176 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
177 * r3 -> destination, r4 -> source.
178 */
179 .globl vrsqrtefp
180vrsqrtefp:
181 stwu r1,-48(r1)
182 mflr r0
183 stw r0,52(r1)
184 bl fpenable
185 stfd fr2,32(r1)
186 stfd fr3,40(r1)
187 stfd fr4,48(r1)
188 stfd fr5,56(r1)
189 lis r9,fpone@ha
190 lis r8,fphalf@ha
191 li r0,4
192 lfs fr4,fpone@l(r9)
193 lfs fr5,fphalf@l(r8)
194 mtctr r0
195 li r6,0
1961: lfsx fr0,r4,r6
197 frsqrte fr1,fr0 /* r = frsqrte(s) */
198 fmuls fr3,fr1,fr0 /* r * s */
199 fmuls fr2,fr1,fr5 /* r * 0.5 */
200 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
201 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
202 fmuls fr3,fr1,fr0 /* r * s */
203 fmuls fr2,fr1,fr5 /* r * 0.5 */
204 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
205 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
206 stfsx fr1,r3,r6
207 addi r6,r6,4
208 bdnz 1b
209 lfd fr5,56(r1)
210 lfd fr4,48(r1)
211 lfd fr3,40(r1)
212 lfd fr2,32(r1)
213 bl fpdisable
214 lwz r0,36(r1)
215 mtlr r0
216 addi r1,r1,32
217 blr
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
index 17d2db7e537d..09c6525cfa61 100644
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ b/arch/ppc/kernel/vmlinux.lds.S
@@ -149,32 +149,6 @@ SECTIONS
149 149
150 . = ALIGN(4096); 150 . = ALIGN(4096);
151 _sextratext = .; 151 _sextratext = .;
152 __pmac_begin = .;
153 .pmac.text : { *(.pmac.text) }
154 .pmac.data : { *(.pmac.data) }
155 . = ALIGN(4096);
156 __pmac_end = .;
157
158 . = ALIGN(4096);
159 __prep_begin = .;
160 .prep.text : { *(.prep.text) }
161 .prep.data : { *(.prep.data) }
162 . = ALIGN(4096);
163 __prep_end = .;
164
165 . = ALIGN(4096);
166 __chrp_begin = .;
167 .chrp.text : { *(.chrp.text) }
168 .chrp.data : { *(.chrp.data) }
169 . = ALIGN(4096);
170 __chrp_end = .;
171
172 . = ALIGN(4096);
173 __openfirmware_begin = .;
174 .openfirmware.text : { *(.openfirmware.text) }
175 .openfirmware.data : { *(.openfirmware.data) }
176 . = ALIGN(4096);
177 __openfirmware_end = .;
178 _eextratext = .; 152 _eextratext = .;
179 153
180 __bss_start = .; 154 __bss_start = .;
diff --git a/arch/ppc/lib/string.S b/arch/ppc/lib/string.S
index 36c9b97fd92a..2e258c49e8be 100644
--- a/arch/ppc/lib/string.S
+++ b/arch/ppc/lib/string.S
@@ -65,9 +65,9 @@
65 .stabs "arch/ppc/lib/",N_SO,0,0,0f 65 .stabs "arch/ppc/lib/",N_SO,0,0,0f
66 .stabs "string.S",N_SO,0,0,0f 66 .stabs "string.S",N_SO,0,0,0f
67 67
68CACHELINE_BYTES = L1_CACHE_LINE_SIZE 68CACHELINE_BYTES = L1_CACHE_BYTES
69LG_CACHELINE_BYTES = LG_L1_CACHE_LINE_SIZE 69LG_CACHELINE_BYTES = L1_CACHE_SHIFT
70CACHELINE_MASK = (L1_CACHE_LINE_SIZE-1) 70CACHELINE_MASK = (L1_CACHE_BYTES-1)
71 71
72_GLOBAL(strcpy) 72_GLOBAL(strcpy)
73 addi r5,r3,-1 73 addi r5,r3,-1
@@ -265,12 +265,12 @@ _GLOBAL(cacheable_memcpy)
265 dcbz r11,r6 265 dcbz r11,r6
266#endif 266#endif
267 COPY_16_BYTES 267 COPY_16_BYTES
268#if L1_CACHE_LINE_SIZE >= 32 268#if L1_CACHE_BYTES >= 32
269 COPY_16_BYTES 269 COPY_16_BYTES
270#if L1_CACHE_LINE_SIZE >= 64 270#if L1_CACHE_BYTES >= 64
271 COPY_16_BYTES 271 COPY_16_BYTES
272 COPY_16_BYTES 272 COPY_16_BYTES
273#if L1_CACHE_LINE_SIZE >= 128 273#if L1_CACHE_BYTES >= 128
274 COPY_16_BYTES 274 COPY_16_BYTES
275 COPY_16_BYTES 275 COPY_16_BYTES
276 COPY_16_BYTES 276 COPY_16_BYTES
@@ -485,12 +485,12 @@ _GLOBAL(__copy_tofrom_user)
485 .text 485 .text
486/* the main body of the cacheline loop */ 486/* the main body of the cacheline loop */
487 COPY_16_BYTES_WITHEX(0) 487 COPY_16_BYTES_WITHEX(0)
488#if L1_CACHE_LINE_SIZE >= 32 488#if L1_CACHE_BYTES >= 32
489 COPY_16_BYTES_WITHEX(1) 489 COPY_16_BYTES_WITHEX(1)
490#if L1_CACHE_LINE_SIZE >= 64 490#if L1_CACHE_BYTES >= 64
491 COPY_16_BYTES_WITHEX(2) 491 COPY_16_BYTES_WITHEX(2)
492 COPY_16_BYTES_WITHEX(3) 492 COPY_16_BYTES_WITHEX(3)
493#if L1_CACHE_LINE_SIZE >= 128 493#if L1_CACHE_BYTES >= 128
494 COPY_16_BYTES_WITHEX(4) 494 COPY_16_BYTES_WITHEX(4)
495 COPY_16_BYTES_WITHEX(5) 495 COPY_16_BYTES_WITHEX(5)
496 COPY_16_BYTES_WITHEX(6) 496 COPY_16_BYTES_WITHEX(6)
@@ -544,12 +544,12 @@ _GLOBAL(__copy_tofrom_user)
544 * 104f (if in read part) or 105f (if in write part), after updating r5 544 * 104f (if in read part) or 105f (if in write part), after updating r5
545 */ 545 */
546 COPY_16_BYTES_EXCODE(0) 546 COPY_16_BYTES_EXCODE(0)
547#if L1_CACHE_LINE_SIZE >= 32 547#if L1_CACHE_BYTES >= 32
548 COPY_16_BYTES_EXCODE(1) 548 COPY_16_BYTES_EXCODE(1)
549#if L1_CACHE_LINE_SIZE >= 64 549#if L1_CACHE_BYTES >= 64
550 COPY_16_BYTES_EXCODE(2) 550 COPY_16_BYTES_EXCODE(2)
551 COPY_16_BYTES_EXCODE(3) 551 COPY_16_BYTES_EXCODE(3)
552#if L1_CACHE_LINE_SIZE >= 128 552#if L1_CACHE_BYTES >= 128
553 COPY_16_BYTES_EXCODE(4) 553 COPY_16_BYTES_EXCODE(4)
554 COPY_16_BYTES_EXCODE(5) 554 COPY_16_BYTES_EXCODE(5)
555 COPY_16_BYTES_EXCODE(6) 555 COPY_16_BYTES_EXCODE(6)
diff --git a/arch/ppc/math-emu/sfp-machine.h b/arch/ppc/math-emu/sfp-machine.h
index 686e06d29186..4b17d83cfcdd 100644
--- a/arch/ppc/math-emu/sfp-machine.h
+++ b/arch/ppc/math-emu/sfp-machine.h
@@ -166,7 +166,7 @@ extern int fp_pack_ds(void *, long, unsigned long, unsigned long, long, long);
166#include <linux/kernel.h> 166#include <linux/kernel.h>
167#include <linux/sched.h> 167#include <linux/sched.h>
168 168
169#define __FPU_FPSCR (current->thread.fpscr) 169#define __FPU_FPSCR (current->thread.fpscr.val)
170 170
171/* We only actually write to the destination register 171/* We only actually write to the destination register
172 * if exceptions signalled (if any) will not trap. 172 * if exceptions signalled (if any) will not trap.
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index f421a4b337f6..99b48abd3296 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -69,15 +69,12 @@ int init_bootmem_done;
69int boot_mapsize; 69int boot_mapsize;
70#ifdef CONFIG_PPC_PMAC 70#ifdef CONFIG_PPC_PMAC
71unsigned long agp_special_page; 71unsigned long agp_special_page;
72EXPORT_SYMBOL(agp_special_page);
72#endif 73#endif
73 74
74extern char _end[]; 75extern char _end[];
75extern char etext[], _stext[]; 76extern char etext[], _stext[];
76extern char __init_begin, __init_end; 77extern char __init_begin, __init_end;
77extern char __prep_begin, __prep_end;
78extern char __chrp_begin, __chrp_end;
79extern char __pmac_begin, __pmac_end;
80extern char __openfirmware_begin, __openfirmware_end;
81 78
82#ifdef CONFIG_HIGHMEM 79#ifdef CONFIG_HIGHMEM
83pte_t *kmap_pte; 80pte_t *kmap_pte;
@@ -167,14 +164,6 @@ void free_initmem(void)
167 164
168 printk ("Freeing unused kernel memory:"); 165 printk ("Freeing unused kernel memory:");
169 FREESEC(init); 166 FREESEC(init);
170 if (_machine != _MACH_Pmac)
171 FREESEC(pmac);
172 if (_machine != _MACH_chrp)
173 FREESEC(chrp);
174 if (_machine != _MACH_prep)
175 FREESEC(prep);
176 if (!have_of)
177 FREESEC(openfirmware);
178 printk("\n"); 167 printk("\n");
179 ppc_md.progress = NULL; 168 ppc_md.progress = NULL;
180#undef FREESEC 169#undef FREESEC
@@ -648,18 +637,16 @@ void update_mmu_cache(struct vm_area_struct *vma, unsigned long address,
648 */ 637 */
649int page_is_ram(unsigned long pfn) 638int page_is_ram(unsigned long pfn)
650{ 639{
651 unsigned long paddr = (pfn << PAGE_SHIFT); 640 return pfn < max_pfn;
652
653 return paddr < __pa(high_memory);
654} 641}
655 642
656pgprot_t phys_mem_access_prot(struct file *file, unsigned long addr, 643pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
657 unsigned long size, pgprot_t vma_prot) 644 unsigned long size, pgprot_t vma_prot)
658{ 645{
659 if (ppc_md.phys_mem_access_prot) 646 if (ppc_md.phys_mem_access_prot)
660 return ppc_md.phys_mem_access_prot(file, addr, size, vma_prot); 647 return ppc_md.phys_mem_access_prot(file, pfn, size, vma_prot);
661 648
662 if (!page_is_ram(addr >> PAGE_SHIFT)) 649 if (!page_is_ram(pfn))
663 vma_prot = __pgprot(pgprot_val(vma_prot) 650 vma_prot = __pgprot(pgprot_val(vma_prot)
664 | _PAGE_GUARDED | _PAGE_NO_CACHE); 651 | _PAGE_GUARDED | _PAGE_NO_CACHE);
665 return vma_prot; 652 return vma_prot;
diff --git a/arch/ppc/oprofile/Kconfig b/arch/ppc/oprofile/Kconfig
deleted file mode 100644
index 19d37730b664..000000000000
--- a/arch/ppc/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
1
2menu "Profiling support"
3 depends on EXPERIMENTAL
4
5config PROFILING
6 bool "Profiling support (EXPERIMENTAL)"
7 help
8 Say Y here to enable the extended profiling support mechanisms used
9 by profilers such as OProfile.
10
11
12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING
15 help
16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries,
18 and applications.
19
20 If unsure, say N.
21
22endmenu
23
diff --git a/arch/ppc/oprofile/Makefile b/arch/ppc/oprofile/Makefile
deleted file mode 100644
index e2218d32a4eb..000000000000
--- a/arch/ppc/oprofile/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1obj-$(CONFIG_OPROFILE) += oprofile.o
2
3DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
4 oprof.o cpu_buffer.o buffer_sync.o \
5 event_buffer.o oprofile_files.o \
6 oprofilefs.o oprofile_stats.o \
7 timer_int.o )
8
9oprofile-y := $(DRIVER_OBJS) common.o
10
11ifeq ($(CONFIG_FSL_BOOKE),y)
12 oprofile-y += op_model_fsl_booke.o
13endif
14
diff --git a/arch/ppc/oprofile/common.c b/arch/ppc/oprofile/common.c
deleted file mode 100644
index 3169c67abea7..000000000000
--- a/arch/ppc/oprofile/common.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/*
2 * PPC 32 oprofile support
3 * Based on PPC64 oprofile support
4 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
5 *
6 * Copyright (C) Freescale Semiconductor, Inc 2004
7 *
8 * Author: Andy Fleming
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/oprofile.h>
17#include <linux/slab.h>
18#include <linux/init.h>
19#include <linux/smp.h>
20#include <linux/errno.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23#include <asm/perfmon.h>
24#include <asm/cputable.h>
25
26#include "op_impl.h"
27
28static struct op_ppc32_model *model;
29
30static struct op_counter_config ctr[OP_MAX_COUNTER];
31static struct op_system_config sys;
32
33static void op_handle_interrupt(struct pt_regs *regs)
34{
35 model->handle_interrupt(regs, ctr);
36}
37
38static int op_ppc32_setup(void)
39{
40 /* Install our interrupt handler into the existing hook. */
41 if(request_perfmon_irq(&op_handle_interrupt))
42 return -EBUSY;
43
44 mb();
45
46 /* Pre-compute the values to stuff in the hardware registers. */
47 model->reg_setup(ctr, &sys, model->num_counters);
48
49#if 0
50 /* FIXME: Make multi-cpu work */
51 /* Configure the registers on all cpus. */
52 on_each_cpu(model->reg_setup, NULL, 0, 1);
53#endif
54
55 return 0;
56}
57
58static void op_ppc32_shutdown(void)
59{
60 mb();
61
62 /* Remove our interrupt handler. We may be removing this module. */
63 free_perfmon_irq();
64}
65
66static void op_ppc32_cpu_start(void *dummy)
67{
68 model->start(ctr);
69}
70
71static int op_ppc32_start(void)
72{
73 on_each_cpu(op_ppc32_cpu_start, NULL, 0, 1);
74 return 0;
75}
76
77static inline void op_ppc32_cpu_stop(void *dummy)
78{
79 model->stop();
80}
81
82static void op_ppc32_stop(void)
83{
84 on_each_cpu(op_ppc32_cpu_stop, NULL, 0, 1);
85}
86
87static int op_ppc32_create_files(struct super_block *sb, struct dentry *root)
88{
89 int i;
90
91 for (i = 0; i < model->num_counters; ++i) {
92 struct dentry *dir;
93 char buf[3];
94
95 snprintf(buf, sizeof buf, "%d", i);
96 dir = oprofilefs_mkdir(sb, root, buf);
97
98 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
99 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
100 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
101 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
102 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
103
104 /* FIXME: Not sure if this is used */
105 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
106 }
107
108 oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
109 oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
110
111 /* Default to tracing both kernel and user */
112 sys.enable_kernel = 1;
113 sys.enable_user = 1;
114
115 return 0;
116}
117
118static struct oprofile_operations oprof_ppc32_ops = {
119 .create_files = op_ppc32_create_files,
120 .setup = op_ppc32_setup,
121 .shutdown = op_ppc32_shutdown,
122 .start = op_ppc32_start,
123 .stop = op_ppc32_stop,
124 .cpu_type = NULL /* To be filled in below. */
125};
126
127int __init oprofile_arch_init(struct oprofile_operations *ops)
128{
129 char *name;
130 int cpu_id = smp_processor_id();
131
132#ifdef CONFIG_FSL_BOOKE
133 model = &op_model_fsl_booke;
134#else
135 return -ENODEV;
136#endif
137
138 name = kmalloc(32, GFP_KERNEL);
139
140 if (NULL == name)
141 return -ENOMEM;
142
143 sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
144
145 oprof_ppc32_ops.cpu_type = name;
146
147 model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs;
148
149 *ops = oprof_ppc32_ops;
150
151 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
152 oprof_ppc32_ops.cpu_type);
153
154 return 0;
155}
156
157void oprofile_arch_exit(void)
158{
159 kfree(oprof_ppc32_ops.cpu_type);
160 oprof_ppc32_ops.cpu_type = NULL;
161}
diff --git a/arch/ppc/oprofile/op_impl.h b/arch/ppc/oprofile/op_impl.h
deleted file mode 100644
index bc336dc971e3..000000000000
--- a/arch/ppc/oprofile/op_impl.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3 *
4 * Based on alpha version.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef OP_IMPL_H
13#define OP_IMPL_H 1
14
15#define OP_MAX_COUNTER 8
16
17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config {
19 unsigned long enabled;
20 unsigned long event;
21 unsigned long count;
22 unsigned long kernel;
23 unsigned long user;
24 unsigned long unit_mask;
25};
26
27/* System-wide configuration as set via oprofilefs. */
28struct op_system_config {
29 unsigned long enable_kernel;
30 unsigned long enable_user;
31};
32
33/* Per-arch configuration */
34struct op_ppc32_model {
35 void (*reg_setup) (struct op_counter_config *,
36 struct op_system_config *,
37 int num_counters);
38 void (*start) (struct op_counter_config *);
39 void (*stop) (void);
40 void (*handle_interrupt) (struct pt_regs *,
41 struct op_counter_config *);
42 int num_counters;
43};
44
45#endif /* OP_IMPL_H */
diff --git a/arch/ppc/oprofile/op_model_fsl_booke.c b/arch/ppc/oprofile/op_model_fsl_booke.c
deleted file mode 100644
index fc9c859358c6..000000000000
--- a/arch/ppc/oprofile/op_model_fsl_booke.c
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * oprofile/op_model_e500.c
3 *
4 * Freescale Book-E oprofile support, based on ppc64 oprofile support
5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc
8 *
9 * Author: Andy Fleming
10 * Maintainer: Kumar Gala <Kumar.Gala@freescale.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/oprofile.h>
19#include <linux/init.h>
20#include <linux/smp.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23#include <asm/processor.h>
24#include <asm/cputable.h>
25#include <asm/reg_booke.h>
26#include <asm/page.h>
27#include <asm/perfmon.h>
28
29#include "op_impl.h"
30
31static unsigned long reset_value[OP_MAX_COUNTER];
32
33static int num_counters;
34static int oprofile_running;
35
36static inline unsigned int ctr_read(unsigned int i)
37{
38 switch(i) {
39 case 0:
40 return mfpmr(PMRN_PMC0);
41 case 1:
42 return mfpmr(PMRN_PMC1);
43 case 2:
44 return mfpmr(PMRN_PMC2);
45 case 3:
46 return mfpmr(PMRN_PMC3);
47 default:
48 return 0;
49 }
50}
51
52static inline void ctr_write(unsigned int i, unsigned int val)
53{
54 switch(i) {
55 case 0:
56 mtpmr(PMRN_PMC0, val);
57 break;
58 case 1:
59 mtpmr(PMRN_PMC1, val);
60 break;
61 case 2:
62 mtpmr(PMRN_PMC2, val);
63 break;
64 case 3:
65 mtpmr(PMRN_PMC3, val);
66 break;
67 default:
68 break;
69 }
70}
71
72
73static void fsl_booke_reg_setup(struct op_counter_config *ctr,
74 struct op_system_config *sys,
75 int num_ctrs)
76{
77 int i;
78
79 num_counters = num_ctrs;
80
81 /* freeze all counters */
82 pmc_stop_ctrs();
83
84 /* Our counters count up, and "count" refers to
85 * how much before the next interrupt, and we interrupt
86 * on overflow. So we calculate the starting value
87 * which will give us "count" until overflow.
88 * Then we set the events on the enabled counters */
89 for (i = 0; i < num_counters; ++i) {
90 reset_value[i] = 0x80000000UL - ctr[i].count;
91
92 init_pmc_stop(i);
93
94 set_pmc_event(i, ctr[i].event);
95
96 set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
97 }
98}
99
100static void fsl_booke_start(struct op_counter_config *ctr)
101{
102 int i;
103
104 mtmsr(mfmsr() | MSR_PMM);
105
106 for (i = 0; i < num_counters; ++i) {
107 if (ctr[i].enabled) {
108 ctr_write(i, reset_value[i]);
109 /* Set Each enabled counterd to only
110 * count when the Mark bit is not set */
111 set_pmc_marked(i, 1, 0);
112 pmc_start_ctr(i, 1);
113 } else {
114 ctr_write(i, 0);
115
116 /* Set the ctr to be stopped */
117 pmc_start_ctr(i, 0);
118 }
119 }
120
121 /* Clear the freeze bit, and enable the interrupt.
122 * The counters won't actually start until the rfi clears
123 * the PMM bit */
124 pmc_start_ctrs(1);
125
126 oprofile_running = 1;
127
128 pr_debug("start on cpu %d, pmgc0 %x\n", smp_processor_id(),
129 mfpmr(PMRN_PMGC0));
130}
131
132static void fsl_booke_stop(void)
133{
134 /* freeze counters */
135 pmc_stop_ctrs();
136
137 oprofile_running = 0;
138
139 pr_debug("stop on cpu %d, pmgc0 %x\n", smp_processor_id(),
140 mfpmr(PMRN_PMGC0));
141
142 mb();
143}
144
145
146static void fsl_booke_handle_interrupt(struct pt_regs *regs,
147 struct op_counter_config *ctr)
148{
149 unsigned long pc;
150 int is_kernel;
151 int val;
152 int i;
153
154 /* set the PMM bit (see comment below) */
155 mtmsr(mfmsr() | MSR_PMM);
156
157 pc = regs->nip;
158 is_kernel = (pc >= KERNELBASE);
159
160 for (i = 0; i < num_counters; ++i) {
161 val = ctr_read(i);
162 if (val < 0) {
163 if (oprofile_running && ctr[i].enabled) {
164 oprofile_add_pc(pc, is_kernel, i);
165 ctr_write(i, reset_value[i]);
166 } else {
167 ctr_write(i, 0);
168 }
169 }
170 }
171
172 /* The freeze bit was set by the interrupt. */
173 /* Clear the freeze bit, and reenable the interrupt.
174 * The counters won't actually start until the rfi clears
175 * the PMM bit */
176 pmc_start_ctrs(1);
177}
178
179struct op_ppc32_model op_model_fsl_booke = {
180 .reg_setup = fsl_booke_reg_setup,
181 .start = fsl_booke_start,
182 .stop = fsl_booke_stop,
183 .handle_interrupt = fsl_booke_handle_interrupt,
184};
diff --git a/arch/ppc/platforms/4xx/bamboo.c b/arch/ppc/platforms/4xx/bamboo.c
index 78a403b48dba..159b228eca1e 100644
--- a/arch/ppc/platforms/4xx/bamboo.c
+++ b/arch/ppc/platforms/4xx/bamboo.c
@@ -51,7 +51,7 @@
51#include <syslib/gen550.h> 51#include <syslib/gen550.h>
52#include <syslib/ibm440gx_common.h> 52#include <syslib/ibm440gx_common.h>
53 53
54bd_t __res; 54extern bd_t __res;
55 55
56static struct ibm44x_clocks clocks __initdata; 56static struct ibm44x_clocks clocks __initdata;
57 57
@@ -425,17 +425,7 @@ bamboo_setup_arch(void)
425void __init platform_init(unsigned long r3, unsigned long r4, 425void __init platform_init(unsigned long r3, unsigned long r4,
426 unsigned long r5, unsigned long r6, unsigned long r7) 426 unsigned long r5, unsigned long r6, unsigned long r7)
427{ 427{
428 parse_bootinfo(find_bootinfo()); 428 ibm44x_platform_init(r3, r4, r5, r6, r7);
429
430 /*
431 * If we were passed in a board information, copy it into the
432 * residual data area.
433 */
434 if (r3)
435 __res = *(bd_t *)(r3 + KERNELBASE);
436
437
438 ibm44x_platform_init();
439 429
440 ppc_md.setup_arch = bamboo_setup_arch; 430 ppc_md.setup_arch = bamboo_setup_arch;
441 ppc_md.show_cpuinfo = bamboo_show_cpuinfo; 431 ppc_md.show_cpuinfo = bamboo_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 27b778ab903b..64ebae19cdbb 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -54,7 +54,7 @@
54#include <syslib/gen550.h> 54#include <syslib/gen550.h>
55#include <syslib/ibm440gp_common.h> 55#include <syslib/ibm440gp_common.h>
56 56
57bd_t __res; 57extern bd_t __res;
58 58
59static struct ibm44x_clocks clocks __initdata; 59static struct ibm44x_clocks clocks __initdata;
60 60
@@ -90,7 +90,7 @@ ebony_calibrate_decr(void)
90 * on Rev. C silicon then errata forces us to 90 * on Rev. C silicon then errata forces us to
91 * use the internal clock. 91 * use the internal clock.
92 */ 92 */
93 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0) 93 if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0)
94 freq = EBONY_440GP_RB_SYSCLK; 94 freq = EBONY_440GP_RB_SYSCLK;
95 else 95 else
96 freq = EBONY_440GP_RC_SYSCLK; 96 freq = EBONY_440GP_RC_SYSCLK;
@@ -317,16 +317,7 @@ ebony_setup_arch(void)
317void __init platform_init(unsigned long r3, unsigned long r4, 317void __init platform_init(unsigned long r3, unsigned long r4,
318 unsigned long r5, unsigned long r6, unsigned long r7) 318 unsigned long r5, unsigned long r6, unsigned long r7)
319{ 319{
320 parse_bootinfo(find_bootinfo()); 320 ibm44x_platform_init(r3, r4, r5, r6, r7);
321
322 /*
323 * If we were passed in a board information, copy it into the
324 * residual data area.
325 */
326 if (r3)
327 __res = *(bd_t *)(r3 + KERNELBASE);
328
329 ibm44x_platform_init();
330 321
331 ppc_md.setup_arch = ebony_setup_arch; 322 ppc_md.setup_arch = ebony_setup_arch;
332 ppc_md.show_cpuinfo = ebony_show_cpuinfo; 323 ppc_md.show_cpuinfo = ebony_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/luan.c b/arch/ppc/platforms/4xx/luan.c
index 16d953bda22c..d810b736d9bf 100644
--- a/arch/ppc/platforms/4xx/luan.c
+++ b/arch/ppc/platforms/4xx/luan.c
@@ -52,7 +52,7 @@
52#include <syslib/ibm440gx_common.h> 52#include <syslib/ibm440gx_common.h>
53#include <syslib/ibm440sp_common.h> 53#include <syslib/ibm440sp_common.h>
54 54
55bd_t __res; 55extern bd_t __res;
56 56
57static struct ibm44x_clocks clocks __initdata; 57static struct ibm44x_clocks clocks __initdata;
58 58
@@ -355,16 +355,7 @@ luan_setup_arch(void)
355void __init platform_init(unsigned long r3, unsigned long r4, 355void __init platform_init(unsigned long r3, unsigned long r4,
356 unsigned long r5, unsigned long r6, unsigned long r7) 356 unsigned long r5, unsigned long r6, unsigned long r7)
357{ 357{
358 parse_bootinfo(find_bootinfo()); 358 ibm44x_platform_init(r3, r4, r5, r6, r7);
359
360 /*
361 * If we were passed in a board information, copy it into the
362 * residual data area.
363 */
364 if (r3)
365 __res = *(bd_t *)(r3 + KERNELBASE);
366
367 ibm44x_platform_init();
368 359
369 ppc_md.setup_arch = luan_setup_arch; 360 ppc_md.setup_arch = luan_setup_arch;
370 ppc_md.show_cpuinfo = luan_show_cpuinfo; 361 ppc_md.show_cpuinfo = luan_show_cpuinfo;
diff --git a/arch/ppc/platforms/4xx/ocotea.c b/arch/ppc/platforms/4xx/ocotea.c
index 506949c5dd29..73b2c98158f6 100644
--- a/arch/ppc/platforms/4xx/ocotea.c
+++ b/arch/ppc/platforms/4xx/ocotea.c
@@ -52,7 +52,7 @@
52#include <syslib/gen550.h> 52#include <syslib/gen550.h>
53#include <syslib/ibm440gx_common.h> 53#include <syslib/ibm440gx_common.h>
54 54
55bd_t __res; 55extern bd_t __res;
56 56
57static struct ibm44x_clocks clocks __initdata; 57static struct ibm44x_clocks clocks __initdata;
58 58
@@ -286,6 +286,15 @@ ocotea_setup_arch(void)
286 286
287 ibm440gx_tah_enable(); 287 ibm440gx_tah_enable();
288 288
289 /*
290 * Determine various clocks.
291 * To be completely correct we should get SysClk
292 * from FPGA, because it can be changed by on-board switches
293 * --ebs
294 */
295 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
296 ocp_sys_info.opb_bus_freq = clocks.opb;
297
289 /* Setup TODC access */ 298 /* Setup TODC access */
290 TODC_INIT(TODC_TYPE_DS1743, 299 TODC_INIT(TODC_TYPE_DS1743,
291 0, 300 0,
@@ -324,25 +333,7 @@ static void __init ocotea_init(void)
324void __init platform_init(unsigned long r3, unsigned long r4, 333void __init platform_init(unsigned long r3, unsigned long r4,
325 unsigned long r5, unsigned long r6, unsigned long r7) 334 unsigned long r5, unsigned long r6, unsigned long r7)
326{ 335{
327 parse_bootinfo(find_bootinfo()); 336 ibm44x_platform_init(r3, r4, r5, r6, r7);
328
329 /*
330 * If we were passed in a board information, copy it into the
331 * residual data area.
332 */
333 if (r3)
334 __res = *(bd_t *)(r3 + KERNELBASE);
335
336 /*
337 * Determine various clocks.
338 * To be completely correct we should get SysClk
339 * from FPGA, because it can be changed by on-board switches
340 * --ebs
341 */
342 ibm440gx_get_clocks(&clocks, 33333333, 6 * 1843200);
343 ocp_sys_info.opb_bus_freq = clocks.opb;
344
345 ibm44x_platform_init();
346 337
347 ppc_md.setup_arch = ocotea_setup_arch; 338 ppc_md.setup_arch = ocotea_setup_arch;
348 ppc_md.show_cpuinfo = ocotea_show_cpuinfo; 339 ppc_md.show_cpuinfo = ocotea_show_cpuinfo;
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 1584cd77a9ef..58e44c042535 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <syslib/ppc83xx_setup.h> 22#include <syslib/ppc83xx_setup.h>
24#include <asm/ppcboot.h> 23#include <asm/ppcboot.h>
25 24
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
index 7dc8a68acfd0..7e952c1228cb 100644
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8540_ads.c
@@ -52,6 +52,10 @@
52 52
53#include <syslib/ppc85xx_setup.h> 53#include <syslib/ppc85xx_setup.h>
54 54
55static const char *GFAR_PHY_0 = "phy0:0";
56static const char *GFAR_PHY_1 = "phy0:1";
57static const char *GFAR_PHY_3 = "phy0:3";
58
55/* ************************************************************************ 59/* ************************************************************************
56 * 60 *
57 * Setup the architecture 61 * Setup the architecture
@@ -63,6 +67,7 @@ mpc8540ads_setup_arch(void)
63 bd_t *binfo = (bd_t *) __res; 67 bd_t *binfo = (bd_t *) __res;
64 unsigned int freq; 68 unsigned int freq;
65 struct gianfar_platform_data *pdata; 69 struct gianfar_platform_data *pdata;
70 struct gianfar_mdio_data *mdata;
66 71
67 /* get the core frequency */ 72 /* get the core frequency */
68 freq = binfo->bi_intfreq; 73 freq = binfo->bi_intfreq;
@@ -89,34 +94,35 @@ mpc8540ads_setup_arch(void)
89 invalidate_tlbcam_entry(num_tlbcam_entries - 1); 94 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
90#endif 95#endif
91 96
97 /* setup the board related info for the MDIO bus */
98 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
99
100 mdata->irq[0] = MPC85xx_IRQ_EXT5;
101 mdata->irq[1] = MPC85xx_IRQ_EXT5;
102 mdata->irq[2] = -1;
103 mdata->irq[3] = MPC85xx_IRQ_EXT5;
104 mdata->irq[31] = -1;
105 mdata->paddr += binfo->bi_immr_base;
106
92 /* setup the board related information for the enet controllers */ 107 /* setup the board related information for the enet controllers */
93 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 108 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
94 if (pdata) { 109 if (pdata) {
95 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 110 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
96 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 111 pdata->bus_id = GFAR_PHY_0;
97 pdata->phyid = 0;
98 /* fixup phy address */
99 pdata->phy_reg_addr += binfo->bi_immr_base;
100 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 112 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
101 } 113 }
102 114
103 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 115 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
104 if (pdata) { 116 if (pdata) {
105 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 117 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
106 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 118 pdata->bus_id = GFAR_PHY_1;
107 pdata->phyid = 1;
108 /* fixup phy address */
109 pdata->phy_reg_addr += binfo->bi_immr_base;
110 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 119 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
111 } 120 }
112 121
113 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC); 122 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
114 if (pdata) { 123 if (pdata) {
115 pdata->board_flags = 0; 124 pdata->board_flags = 0;
116 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 125 pdata->bus_id = GFAR_PHY_3;
117 pdata->phyid = 3;
118 /* fixup phy address */
119 pdata->phy_reg_addr += binfo->bi_immr_base;
120 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6); 126 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
121 } 127 }
122 128
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
index 8841fd7da6ee..208433f1e93a 100644
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ b/arch/ppc/platforms/85xx/mpc8560_ads.c
@@ -56,6 +56,10 @@
56#include <syslib/ppc85xx_setup.h> 56#include <syslib/ppc85xx_setup.h>
57 57
58 58
59static const char *GFAR_PHY_0 = "phy0:0";
60static const char *GFAR_PHY_1 = "phy0:1";
61static const char *GFAR_PHY_3 = "phy0:3";
62
59/* ************************************************************************ 63/* ************************************************************************
60 * 64 *
61 * Setup the architecture 65 * Setup the architecture
@@ -68,6 +72,7 @@ mpc8560ads_setup_arch(void)
68 bd_t *binfo = (bd_t *) __res; 72 bd_t *binfo = (bd_t *) __res;
69 unsigned int freq; 73 unsigned int freq;
70 struct gianfar_platform_data *pdata; 74 struct gianfar_platform_data *pdata;
75 struct gianfar_mdio_data *mdata;
71 76
72 cpm2_reset(); 77 cpm2_reset();
73 78
@@ -86,24 +91,28 @@ mpc8560ads_setup_arch(void)
86 mpc85xx_setup_hose(); 91 mpc85xx_setup_hose();
87#endif 92#endif
88 93
94 /* setup the board related info for the MDIO bus */
95 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
96
97 mdata->irq[0] = MPC85xx_IRQ_EXT5;
98 mdata->irq[1] = MPC85xx_IRQ_EXT5;
99 mdata->irq[2] = -1;
100 mdata->irq[3] = MPC85xx_IRQ_EXT5;
101 mdata->irq[31] = -1;
102 mdata->paddr += binfo->bi_immr_base;
103
89 /* setup the board related information for the enet controllers */ 104 /* setup the board related information for the enet controllers */
90 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 105 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
91 if (pdata) { 106 if (pdata) {
92 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 107 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
93 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 108 pdata->bus_id = GFAR_PHY_0;
94 pdata->phyid = 0;
95 /* fixup phy address */
96 pdata->phy_reg_addr += binfo->bi_immr_base;
97 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 109 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
98 } 110 }
99 111
100 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 112 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
101 if (pdata) { 113 if (pdata) {
102 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 114 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
103 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 115 pdata->bus_id = GFAR_PHY_1;
104 pdata->phyid = 1;
105 /* fixup phy address */
106 pdata->phy_reg_addr += binfo->bi_immr_base;
107 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 116 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
108 } 117 }
109 118
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
index 3875e839cff7..84acf6e8d45e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <asm/ppcboot.h> 22#include <asm/ppcboot.h>
24 23
25#define BOARD_CCSRBAR ((uint)0xe0000000) 24#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
index 9f9039498ae5..a21156967a5e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
@@ -173,10 +173,7 @@ mpc85xx_cds_init_IRQ(void)
173#ifdef CONFIG_PCI 173#ifdef CONFIG_PCI
174 openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq); 174 openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
175 175
176 for (i = 0; i < NUM_8259_INTERRUPTS; i++) 176 i8259_init(0, 0);
177 irq_desc[i].handler = &i8259_pic;
178
179 i8259_init(0);
180#endif 177#endif
181 178
182#ifdef CONFIG_CPM2 179#ifdef CONFIG_CPM2
@@ -394,6 +391,9 @@ mpc85xx_cds_pcibios_fixup(void)
394 391
395TODC_ALLOC(); 392TODC_ALLOC();
396 393
394static const char *GFAR_PHY_0 = "phy0:0";
395static const char *GFAR_PHY_1 = "phy0:1";
396
397/* ************************************************************************ 397/* ************************************************************************
398 * 398 *
399 * Setup the architecture 399 * Setup the architecture
@@ -405,6 +405,7 @@ mpc85xx_cds_setup_arch(void)
405 bd_t *binfo = (bd_t *) __res; 405 bd_t *binfo = (bd_t *) __res;
406 unsigned int freq; 406 unsigned int freq;
407 struct gianfar_platform_data *pdata; 407 struct gianfar_platform_data *pdata;
408 struct gianfar_mdio_data *mdata;
408 409
409 /* get the core frequency */ 410 /* get the core frequency */
410 freq = binfo->bi_intfreq; 411 freq = binfo->bi_intfreq;
@@ -448,44 +449,42 @@ mpc85xx_cds_setup_arch(void)
448 invalidate_tlbcam_entry(num_tlbcam_entries - 1); 449 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
449#endif 450#endif
450 451
452 /* setup the board related info for the MDIO bus */
453 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
454
455 mdata->irq[0] = MPC85xx_IRQ_EXT5;
456 mdata->irq[1] = MPC85xx_IRQ_EXT5;
457 mdata->irq[2] = -1;
458 mdata->irq[3] = -1;
459 mdata->irq[31] = -1;
460 mdata->paddr += binfo->bi_immr_base;
461
451 /* setup the board related information for the enet controllers */ 462 /* setup the board related information for the enet controllers */
452 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 463 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
453 if (pdata) { 464 if (pdata) {
454 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 465 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
455 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 466 pdata->bus_id = GFAR_PHY_0;
456 pdata->phyid = 0;
457 /* fixup phy address */
458 pdata->phy_reg_addr += binfo->bi_immr_base;
459 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 467 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
460 } 468 }
461 469
462 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 470 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
463 if (pdata) { 471 if (pdata) {
464 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 472 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
465 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 473 pdata->bus_id = GFAR_PHY_1;
466 pdata->phyid = 1;
467 /* fixup phy address */
468 pdata->phy_reg_addr += binfo->bi_immr_base;
469 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 474 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
470 } 475 }
471 476
472 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1); 477 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
473 if (pdata) { 478 if (pdata) {
474 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 479 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
475 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 480 pdata->bus_id = GFAR_PHY_0;
476 pdata->phyid = 0;
477 /* fixup phy address */
478 pdata->phy_reg_addr += binfo->bi_immr_base;
479 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 481 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
480 } 482 }
481 483
482 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2); 484 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
483 if (pdata) { 485 if (pdata) {
484 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 486 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
485 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 487 pdata->bus_id = GFAR_PHY_1;
486 pdata->phyid = 1;
487 /* fixup phy address */
488 pdata->phy_reg_addr += binfo->bi_immr_base;
489 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 488 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
490 } 489 }
491 490
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
index c76760a781c1..b4ee1707a836 100644
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ b/arch/ppc/platforms/85xx/sbc8560.c
@@ -91,6 +91,9 @@ sbc8560_early_serial_map(void)
91} 91}
92#endif 92#endif
93 93
94static const char *GFAR_PHY_25 = "phy0:25";
95static const char *GFAR_PHY_26 = "phy0:26";
96
94/* ************************************************************************ 97/* ************************************************************************
95 * 98 *
96 * Setup the architecture 99 * Setup the architecture
@@ -102,6 +105,7 @@ sbc8560_setup_arch(void)
102 bd_t *binfo = (bd_t *) __res; 105 bd_t *binfo = (bd_t *) __res;
103 unsigned int freq; 106 unsigned int freq;
104 struct gianfar_platform_data *pdata; 107 struct gianfar_platform_data *pdata;
108 struct gianfar_mdio_data *mdata;
105 109
106 /* get the core frequency */ 110 /* get the core frequency */
107 freq = binfo->bi_intfreq; 111 freq = binfo->bi_intfreq;
@@ -126,24 +130,26 @@ sbc8560_setup_arch(void)
126 invalidate_tlbcam_entry(num_tlbcam_entries - 1); 130 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
127#endif 131#endif
128 132
133 /* setup the board related info for the MDIO bus */
134 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
135
136 mdata->irq[25] = MPC85xx_IRQ_EXT6;
137 mdata->irq[26] = MPC85xx_IRQ_EXT7;
138 mdata->irq[31] = -1;
139 mdata->paddr += binfo->bi_immr_base;
140
129 /* setup the board related information for the enet controllers */ 141 /* setup the board related information for the enet controllers */
130 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 142 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
131 if (pdata) { 143 if (pdata) {
132 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 144 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
133 pdata->interruptPHY = MPC85xx_IRQ_EXT6; 145 pdata->bus_id = GFAR_PHY_25;
134 pdata->phyid = 25;
135 /* fixup phy address */
136 pdata->phy_reg_addr += binfo->bi_immr_base;
137 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 146 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
138 } 147 }
139 148
140 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 149 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
141 if (pdata) { 150 if (pdata) {
142 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; 151 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
143 pdata->interruptPHY = MPC85xx_IRQ_EXT7; 152 pdata->bus_id = GFAR_PHY_26;
144 pdata->phyid = 26;
145 /* fixup phy address */
146 pdata->phy_reg_addr += binfo->bi_immr_base;
147 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 153 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
148 } 154 }
149 155
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
index 20940f4044f4..1e1b85f8193a 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ b/arch/ppc/platforms/85xx/stx_gp3.c
@@ -91,6 +91,9 @@ static u8 gp3_openpic_initsenses[] __initdata = {
91 0x0, /* External 11: */ 91 0x0, /* External 11: */
92}; 92};
93 93
94static const char *GFAR_PHY_2 = "phy0:2";
95static const char *GFAR_PHY_4 = "phy0:4";
96
94/* 97/*
95 * Setup the architecture 98 * Setup the architecture
96 */ 99 */
@@ -100,6 +103,7 @@ gp3_setup_arch(void)
100 bd_t *binfo = (bd_t *) __res; 103 bd_t *binfo = (bd_t *) __res;
101 unsigned int freq; 104 unsigned int freq;
102 struct gianfar_platform_data *pdata; 105 struct gianfar_platform_data *pdata;
106 struct gianfar_mdio_data *mdata;
103 107
104 cpm2_reset(); 108 cpm2_reset();
105 109
@@ -118,23 +122,26 @@ gp3_setup_arch(void)
118 mpc85xx_setup_hose(); 122 mpc85xx_setup_hose();
119#endif 123#endif
120 124
125 /* setup the board related info for the MDIO bus */
126 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
127
128 mdata->irq[2] = MPC85xx_IRQ_EXT5;
129 mdata->irq[4] = MPC85xx_IRQ_EXT5;
130 mdata->irq[31] = -1;
131 mdata->paddr += binfo->bi_immr_base;
132
121 /* setup the board related information for the enet controllers */ 133 /* setup the board related information for the enet controllers */
122 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1); 134 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
123 if (pdata) { 135 if (pdata) {
124 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ 136 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
125 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 137 pdata->bus_id = GFAR_PHY_2;
126 pdata->phyid = 2;
127 pdata->phy_reg_addr += binfo->bi_immr_base;
128 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6); 138 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
129 } 139 }
130 140
131 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2); 141 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
132 if (pdata) { 142 if (pdata) {
133 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */ 143 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
134 pdata->interruptPHY = MPC85xx_IRQ_EXT5; 144 pdata->bus_id = GFAR_PHY_4;
135 pdata->phyid = 4;
136 /* fixup phy address */
137 pdata->phy_reg_addr += binfo->bi_immr_base;
138 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6); 145 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
139 } 146 }
140 147
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 7bcc6c35a417..95fdf4b0680b 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,7 +21,6 @@
21 21
22#include <linux/config.h> 22#include <linux/config.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/seq_file.h>
25#include <asm/ppcboot.h> 24#include <asm/ppcboot.h>
26 25
27#define BOARD_CCSRBAR ((uint)0xe0000000) 26#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/Makefile b/arch/ppc/platforms/Makefile
index ff7452e5d8e5..7c5cdabf6f3c 100644
--- a/arch/ppc/platforms/Makefile
+++ b/arch/ppc/platforms/Makefile
@@ -14,6 +14,9 @@ obj-$(CONFIG_PPC_PMAC) += pmac_pic.o pmac_setup.o pmac_time.o \
14 pmac_low_i2c.o pmac_cache.o 14 pmac_low_i2c.o pmac_cache.o
15obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \ 15obj-$(CONFIG_PPC_CHRP) += chrp_setup.o chrp_time.o chrp_pci.o \
16 chrp_pegasos_eth.o 16 chrp_pegasos_eth.o
17ifeq ($(CONFIG_PPC_CHRP),y)
18obj-$(CONFIG_NVRAM) += chrp_nvram.o
19endif
17obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o 20obj-$(CONFIG_PPC_PREP) += prep_pci.o prep_setup.o
18ifeq ($(CONFIG_PPC_PMAC),y) 21ifeq ($(CONFIG_PPC_PMAC),y)
19obj-$(CONFIG_NVRAM) += pmac_nvram.o 22obj-$(CONFIG_NVRAM) += pmac_nvram.o
diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c
index df6ff98c023a..48a4a510d598 100644
--- a/arch/ppc/platforms/chestnut.c
+++ b/arch/ppc/platforms/chestnut.c
@@ -541,7 +541,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
541 541
542 ppc_md.setup_arch = chestnut_setup_arch; 542 ppc_md.setup_arch = chestnut_setup_arch;
543 ppc_md.show_cpuinfo = chestnut_show_cpuinfo; 543 ppc_md.show_cpuinfo = chestnut_show_cpuinfo;
544 ppc_md.irq_canonicalize = NULL;
545 ppc_md.init_IRQ = mv64360_init_irq; 544 ppc_md.init_IRQ = mv64360_init_irq;
546 ppc_md.get_irq = mv64360_get_irq; 545 ppc_md.get_irq = mv64360_get_irq;
547 ppc_md.init = NULL; 546 ppc_md.init = NULL;
diff --git a/arch/ppc/platforms/chrp_nvram.c b/arch/ppc/platforms/chrp_nvram.c
new file mode 100644
index 000000000000..465ba9b090ef
--- /dev/null
+++ b/arch/ppc/platforms/chrp_nvram.c
@@ -0,0 +1,83 @@
1/*
2 * c 2001 PPC 64 Team, IBM Corp
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 *
9 * /dev/nvram driver for PPC
10 *
11 */
12
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/slab.h>
16#include <linux/spinlock.h>
17#include <asm/uaccess.h>
18#include <asm/prom.h>
19#include <asm/machdep.h>
20
21static unsigned int nvram_size;
22static unsigned char nvram_buf[4];
23static DEFINE_SPINLOCK(nvram_lock);
24
25static unsigned char chrp_nvram_read(int addr)
26{
27 unsigned long done, flags;
28 unsigned char ret;
29
30 if (addr >= nvram_size) {
31 printk(KERN_DEBUG "%s: read addr %d > nvram_size %u\n",
32 current->comm, addr, nvram_size);
33 return 0xff;
34 }
35 spin_lock_irqsave(&nvram_lock, flags);
36 if ((call_rtas("nvram-fetch", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
37 ret = 0xff;
38 else
39 ret = nvram_buf[0];
40 spin_unlock_irqrestore(&nvram_lock, flags);
41
42 return ret;
43}
44
45static void chrp_nvram_write(int addr, unsigned char val)
46{
47 unsigned long done, flags;
48
49 if (addr >= nvram_size) {
50 printk(KERN_DEBUG "%s: write addr %d > nvram_size %u\n",
51 current->comm, addr, nvram_size);
52 return;
53 }
54 spin_lock_irqsave(&nvram_lock, flags);
55 nvram_buf[0] = val;
56 if ((call_rtas("nvram-store", 3, 2, &done, addr, __pa(nvram_buf), 1) != 0) || 1 != done)
57 printk(KERN_DEBUG "rtas IO error storing 0x%02x at %d", val, addr);
58 spin_unlock_irqrestore(&nvram_lock, flags);
59}
60
61void __init chrp_nvram_init(void)
62{
63 struct device_node *nvram;
64 unsigned int *nbytes_p, proplen;
65
66 nvram = of_find_node_by_type(NULL, "nvram");
67 if (nvram == NULL)
68 return;
69
70 nbytes_p = (unsigned int *)get_property(nvram, "#bytes", &proplen);
71 if (nbytes_p == NULL || proplen != sizeof(unsigned int))
72 return;
73
74 nvram_size = *nbytes_p;
75
76 printk(KERN_INFO "CHRP nvram contains %u bytes\n", nvram_size);
77 of_node_put(nvram);
78
79 ppc_md.nvram_read_val = chrp_nvram_read;
80 ppc_md.nvram_write_val = chrp_nvram_write;
81
82 return;
83}
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d3fbb5c5db2..bd047aac01b1 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -29,7 +29,7 @@ void __iomem *gg2_pci_config_base;
29 * limit the bus number to 3 bits 29 * limit the bus number to 3 bits
30 */ 30 */
31 31
32int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, 32int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
33 int len, u32 *val) 33 int len, u32 *val)
34{ 34{
35 volatile void __iomem *cfg_data; 35 volatile void __iomem *cfg_data;
@@ -56,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
56 return PCIBIOS_SUCCESSFUL; 56 return PCIBIOS_SUCCESSFUL;
57} 57}
58 58
59int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, 59int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
60 int len, u32 val) 60 int len, u32 val)
61{ 61{
62 volatile void __iomem *cfg_data; 62 volatile void __iomem *cfg_data;
@@ -92,7 +92,7 @@ static struct pci_ops gg2_pci_ops =
92/* 92/*
93 * Access functions for PCI config space using RTAS calls. 93 * Access functions for PCI config space using RTAS calls.
94 */ 94 */
95int __chrp 95int
96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
97 int len, u32 *val) 97 int len, u32 *val)
98{ 98{
@@ -108,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL; 108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
109} 109}
110 110
111int __chrp 111int
112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
113 int len, u32 val) 113 int len, u32 val)
114{ 114{
@@ -203,7 +203,7 @@ static void __init setup_peg2(struct pci_controller *hose, struct device_node *d
203 printk ("RTAS supporting Pegasos OF not found, please upgrade" 203 printk ("RTAS supporting Pegasos OF not found, please upgrade"
204 " your firmware\n"); 204 " your firmware\n");
205 } 205 }
206 pci_assign_all_busses = 1; 206 pci_assign_all_buses = 1;
207} 207}
208 208
209void __init 209void __init
diff --git a/arch/ppc/platforms/chrp_pegasos_eth.c b/arch/ppc/platforms/chrp_pegasos_eth.c
index cad5bfa153b2..a9052305c35d 100644
--- a/arch/ppc/platforms/chrp_pegasos_eth.c
+++ b/arch/ppc/platforms/chrp_pegasos_eth.c
@@ -17,7 +17,20 @@
17#include <linux/mv643xx.h> 17#include <linux/mv643xx.h>
18#include <linux/pci.h> 18#include <linux/pci.h>
19 19
20/* Pegasos 2 specific Marvell MV 64361 gigabit ethernet port setup */ 20#define PEGASOS2_MARVELL_REGBASE (0xf1000000)
21#define PEGASOS2_MARVELL_REGSIZE (0x00004000)
22#define PEGASOS2_SRAM_BASE (0xf2000000)
23#define PEGASOS2_SRAM_SIZE (256*1024)
24
25#define PEGASOS2_SRAM_BASE_ETH0 (PEGASOS2_SRAM_BASE)
26#define PEGASOS2_SRAM_BASE_ETH1 (PEGASOS2_SRAM_BASE_ETH0 + (PEGASOS2_SRAM_SIZE / 2) )
27
28
29#define PEGASOS2_SRAM_RXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
30#define PEGASOS2_SRAM_TXRING_SIZE (PEGASOS2_SRAM_SIZE/4)
31
32#undef BE_VERBOSE
33
21static struct resource mv643xx_eth_shared_resources[] = { 34static struct resource mv643xx_eth_shared_resources[] = {
22 [0] = { 35 [0] = {
23 .name = "ethernet shared base", 36 .name = "ethernet shared base",
@@ -44,7 +57,16 @@ static struct resource mv643xx_eth0_resources[] = {
44 }, 57 },
45}; 58};
46 59
47static struct mv643xx_eth_platform_data eth0_pd; 60
61static struct mv643xx_eth_platform_data eth0_pd = {
62 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH0,
63 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
64 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
65
66 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH0 + PEGASOS2_SRAM_TXRING_SIZE,
67 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
68 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
69};
48 70
49static struct platform_device eth0_device = { 71static struct platform_device eth0_device = {
50 .name = MV643XX_ETH_NAME, 72 .name = MV643XX_ETH_NAME,
@@ -65,7 +87,15 @@ static struct resource mv643xx_eth1_resources[] = {
65 }, 87 },
66}; 88};
67 89
68static struct mv643xx_eth_platform_data eth1_pd; 90static struct mv643xx_eth_platform_data eth1_pd = {
91 .tx_sram_addr = PEGASOS2_SRAM_BASE_ETH1,
92 .tx_sram_size = PEGASOS2_SRAM_TXRING_SIZE,
93 .tx_queue_size = PEGASOS2_SRAM_TXRING_SIZE/16,
94
95 .rx_sram_addr = PEGASOS2_SRAM_BASE_ETH1 + PEGASOS2_SRAM_TXRING_SIZE,
96 .rx_sram_size = PEGASOS2_SRAM_RXRING_SIZE,
97 .rx_queue_size = PEGASOS2_SRAM_RXRING_SIZE/16,
98};
69 99
70static struct platform_device eth1_device = { 100static struct platform_device eth1_device = {
71 .name = MV643XX_ETH_NAME, 101 .name = MV643XX_ETH_NAME,
@@ -83,9 +113,62 @@ static struct platform_device *mv643xx_eth_pd_devs[] __initdata = {
83 &eth1_device, 113 &eth1_device,
84}; 114};
85 115
116/***********/
117/***********/
118#define MV_READ(offset,val) { val = readl(mv643xx_reg_base + offset); }
119#define MV_WRITE(offset,data) writel(data, mv643xx_reg_base + offset)
120
121static void __iomem *mv643xx_reg_base;
122
123static int Enable_SRAM(void)
124{
125 u32 ALong;
126
127 if (mv643xx_reg_base == NULL)
128 mv643xx_reg_base = ioremap(PEGASOS2_MARVELL_REGBASE,
129 PEGASOS2_MARVELL_REGSIZE);
130
131 if (mv643xx_reg_base == NULL)
132 return -ENOMEM;
133
134#ifdef BE_VERBOSE
135 printk("Pegasos II/Marvell MV64361: register remapped from %p to %p\n",
136 (void *)PEGASOS2_MARVELL_REGBASE, (void *)mv643xx_reg_base);
137#endif
138
139 MV_WRITE(MV64340_SRAM_CONFIG, 0);
86 140
87int 141 MV_WRITE(MV64340_INTEGRATED_SRAM_BASE_ADDR, PEGASOS2_SRAM_BASE >> 16);
88mv643xx_eth_add_pds(void) 142
143 MV_READ(MV64340_BASE_ADDR_ENABLE, ALong);
144 ALong &= ~(1 << 19);
145 MV_WRITE(MV64340_BASE_ADDR_ENABLE, ALong);
146
147 ALong = 0x02;
148 ALong |= PEGASOS2_SRAM_BASE & 0xffff0000;
149 MV_WRITE(MV643XX_ETH_BAR_4, ALong);
150
151 MV_WRITE(MV643XX_ETH_SIZE_REG_4, (PEGASOS2_SRAM_SIZE-1) & 0xffff0000);
152
153 MV_READ(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
154 ALong &= ~(1 << 4);
155 MV_WRITE(MV643XX_ETH_BASE_ADDR_ENABLE_REG, ALong);
156
157#ifdef BE_VERBOSE
158 printk("Pegasos II/Marvell MV64361: register unmapped\n");
159 printk("Pegasos II/Marvell MV64361: SRAM at %p, size=%x\n", (void*) PEGASOS2_SRAM_BASE, PEGASOS2_SRAM_SIZE);
160#endif
161
162 iounmap(mv643xx_reg_base);
163 mv643xx_reg_base = NULL;
164
165 return 1;
166}
167
168
169/***********/
170/***********/
171int mv643xx_eth_add_pds(void)
89{ 172{
90 int ret = 0; 173 int ret = 0;
91 static struct pci_device_id pci_marvell_mv64360[] = { 174 static struct pci_device_id pci_marvell_mv64360[] = {
@@ -93,9 +176,38 @@ mv643xx_eth_add_pds(void)
93 { } 176 { }
94 }; 177 };
95 178
179#ifdef BE_VERBOSE
180 printk("Pegasos II/Marvell MV64361: init\n");
181#endif
182
96 if (pci_dev_present(pci_marvell_mv64360)) { 183 if (pci_dev_present(pci_marvell_mv64360)) {
97 ret = platform_add_devices(mv643xx_eth_pd_devs, ARRAY_SIZE(mv643xx_eth_pd_devs)); 184 ret = platform_add_devices(mv643xx_eth_pd_devs,
185 ARRAY_SIZE(mv643xx_eth_pd_devs));
186
187 if ( Enable_SRAM() < 0)
188 {
189 eth0_pd.tx_sram_addr = 0;
190 eth0_pd.tx_sram_size = 0;
191 eth0_pd.rx_sram_addr = 0;
192 eth0_pd.rx_sram_size = 0;
193
194 eth1_pd.tx_sram_addr = 0;
195 eth1_pd.tx_sram_size = 0;
196 eth1_pd.rx_sram_addr = 0;
197 eth1_pd.rx_sram_size = 0;
198
199#ifdef BE_VERBOSE
200 printk("Pegasos II/Marvell MV64361: Can't enable the "
201 "SRAM\n");
202#endif
203 }
98 } 204 }
205
206#ifdef BE_VERBOSE
207 printk("Pegasos II/Marvell MV64361: init is over\n");
208#endif
209
99 return ret; 210 return ret;
100} 211}
212
101device_initcall(mv643xx_eth_add_pds); 213device_initcall(mv643xx_eth_add_pds);
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
index 66346f0de7ec..f1b70ab3c6fd 100644
--- a/arch/ppc/platforms/chrp_setup.c
+++ b/arch/ppc/platforms/chrp_setup.c
@@ -104,7 +104,7 @@ static const char *gg2_cachemodes[4] = {
104 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" 104 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
105}; 105};
106 106
107int __chrp 107int
108chrp_show_cpuinfo(struct seq_file *m) 108chrp_show_cpuinfo(struct seq_file *m)
109{ 109{
110 int i, sdramen; 110 int i, sdramen;
@@ -302,7 +302,7 @@ void __init chrp_setup_arch(void)
302 pci_create_OF_bus_map(); 302 pci_create_OF_bus_map();
303} 303}
304 304
305void __chrp 305void
306chrp_event_scan(void) 306chrp_event_scan(void)
307{ 307{
308 unsigned char log[1024]; 308 unsigned char log[1024];
@@ -313,7 +313,7 @@ chrp_event_scan(void)
313 ppc_md.heartbeat_count = ppc_md.heartbeat_reset; 313 ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
314} 314}
315 315
316void __chrp 316void
317chrp_restart(char *cmd) 317chrp_restart(char *cmd)
318{ 318{
319 printk("RTAS system-reboot returned %d\n", 319 printk("RTAS system-reboot returned %d\n",
@@ -321,7 +321,7 @@ chrp_restart(char *cmd)
321 for (;;); 321 for (;;);
322} 322}
323 323
324void __chrp 324void
325chrp_power_off(void) 325chrp_power_off(void)
326{ 326{
327 /* allow power on only with power button press */ 327 /* allow power on only with power button press */
@@ -330,20 +330,12 @@ chrp_power_off(void)
330 for (;;); 330 for (;;);
331} 331}
332 332
333void __chrp 333void
334chrp_halt(void) 334chrp_halt(void)
335{ 335{
336 chrp_power_off(); 336 chrp_power_off();
337} 337}
338 338
339u_int __chrp
340chrp_irq_canonicalize(u_int irq)
341{
342 if (irq == 2)
343 return 9;
344 return irq;
345}
346
347/* 339/*
348 * Finds the open-pic node and sets OpenPIC_Addr based on its reg property. 340 * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
349 * Then checks if it has an interrupt-ranges property. If it does then 341 * Then checks if it has an interrupt-ranges property. If it does then
@@ -444,9 +436,7 @@ void __init chrp_init_IRQ(void)
444 i8259_irq); 436 i8259_irq);
445 437
446 } 438 }
447 for (i = 0; i < NUM_8259_INTERRUPTS; i++) 439 i8259_init(chrp_int_ack, 0);
448 irq_desc[i].handler = &i8259_pic;
449 i8259_init(chrp_int_ack);
450 440
451#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON) 441#if defined(CONFIG_VT) && defined(CONFIG_INPUT_ADBHID) && defined(XMON)
452 /* see if there is a keyboard in the device tree 442 /* see if there is a keyboard in the device tree
@@ -464,8 +454,7 @@ void __init
464chrp_init2(void) 454chrp_init2(void)
465{ 455{
466#ifdef CONFIG_NVRAM 456#ifdef CONFIG_NVRAM
467// XX replace this in a more saner way 457 chrp_nvram_init();
468// pmac_nvram_init();
469#endif 458#endif
470 459
471 request_region(0x20,0x20,"pic1"); 460 request_region(0x20,0x20,"pic1");
@@ -499,6 +488,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
499 DMA_MODE_READ = 0x44; 488 DMA_MODE_READ = 0x44;
500 DMA_MODE_WRITE = 0x48; 489 DMA_MODE_WRITE = 0x48;
501 isa_io_base = CHRP_ISA_IO_BASE; /* default value */ 490 isa_io_base = CHRP_ISA_IO_BASE; /* default value */
491 ppc_do_canonicalize_irqs = 1;
502 492
503 if (root) 493 if (root)
504 machine = get_property(root, "model", NULL); 494 machine = get_property(root, "model", NULL);
@@ -517,7 +507,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
517 ppc_md.show_percpuinfo = of_show_percpuinfo; 507 ppc_md.show_percpuinfo = of_show_percpuinfo;
518 ppc_md.show_cpuinfo = chrp_show_cpuinfo; 508 ppc_md.show_cpuinfo = chrp_show_cpuinfo;
519 509
520 ppc_md.irq_canonicalize = chrp_irq_canonicalize;
521 ppc_md.init_IRQ = chrp_init_IRQ; 510 ppc_md.init_IRQ = chrp_init_IRQ;
522 if (_chrp_type == _CHRP_Pegasos) 511 if (_chrp_type == _CHRP_Pegasos)
523 ppc_md.get_irq = i8259_irq; 512 ppc_md.get_irq = i8259_irq;
@@ -561,7 +550,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
561#endif 550#endif
562 551
563#ifdef CONFIG_SMP 552#ifdef CONFIG_SMP
564 ppc_md.smp_ops = &chrp_smp_ops; 553 smp_ops = &chrp_smp_ops;
565#endif /* CONFIG_SMP */ 554#endif /* CONFIG_SMP */
566 555
567 /* 556 /*
@@ -571,7 +560,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
571 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); 560 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
572} 561}
573 562
574void __chrp 563void
575rtas_display_progress(char *s, unsigned short hex) 564rtas_display_progress(char *s, unsigned short hex)
576{ 565{
577 int width; 566 int width;
@@ -598,7 +587,7 @@ rtas_display_progress(char *s, unsigned short hex)
598 call_rtas( "display-character", 1, 1, NULL, ' ' ); 587 call_rtas( "display-character", 1, 1, NULL, ' ' );
599} 588}
600 589
601void __chrp 590void
602rtas_indicator_progress(char *s, unsigned short hex) 591rtas_indicator_progress(char *s, unsigned short hex)
603{ 592{
604 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex); 593 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
index 0ea1f7d9e46a..97e539557ecb 100644
--- a/arch/ppc/platforms/chrp_smp.c
+++ b/arch/ppc/platforms/chrp_smp.c
@@ -31,6 +31,7 @@
31#include <asm/residual.h> 31#include <asm/residual.h>
32#include <asm/time.h> 32#include <asm/time.h>
33#include <asm/open_pic.h> 33#include <asm/open_pic.h>
34#include <asm/machdep.h>
34 35
35extern unsigned long smp_chrp_cpu_nr; 36extern unsigned long smp_chrp_cpu_nr;
36 37
@@ -88,7 +89,7 @@ smp_chrp_take_timebase(void)
88} 89}
89 90
90/* CHRP with openpic */ 91/* CHRP with openpic */
91struct smp_ops_t chrp_smp_ops __chrpdata = { 92struct smp_ops_t chrp_smp_ops = {
92 .message_pass = smp_openpic_message_pass, 93 .message_pass = smp_openpic_message_pass,
93 .probe = smp_chrp_probe, 94 .probe = smp_chrp_probe,
94 .kick_cpu = smp_chrp_kick_cpu, 95 .kick_cpu = smp_chrp_kick_cpu,
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
index 6037ce7796f5..29d074c305f0 100644
--- a/arch/ppc/platforms/chrp_time.c
+++ b/arch/ppc/platforms/chrp_time.c
@@ -52,7 +52,7 @@ long __init chrp_time_init(void)
52 return 0; 52 return 0;
53} 53}
54 54
55int __chrp chrp_cmos_clock_read(int addr) 55int chrp_cmos_clock_read(int addr)
56{ 56{
57 if (nvram_as1 != 0) 57 if (nvram_as1 != 0)
58 outb(addr>>8, nvram_as1); 58 outb(addr>>8, nvram_as1);
@@ -60,7 +60,7 @@ int __chrp chrp_cmos_clock_read(int addr)
60 return (inb(nvram_data)); 60 return (inb(nvram_data));
61} 61}
62 62
63void __chrp chrp_cmos_clock_write(unsigned long val, int addr) 63void chrp_cmos_clock_write(unsigned long val, int addr)
64{ 64{
65 if (nvram_as1 != 0) 65 if (nvram_as1 != 0)
66 outb(addr>>8, nvram_as1); 66 outb(addr>>8, nvram_as1);
@@ -72,7 +72,7 @@ void __chrp chrp_cmos_clock_write(unsigned long val, int addr)
72/* 72/*
73 * Set the hardware clock. -- Cort 73 * Set the hardware clock. -- Cort
74 */ 74 */
75int __chrp chrp_set_rtc_time(unsigned long nowtime) 75int chrp_set_rtc_time(unsigned long nowtime)
76{ 76{
77 unsigned char save_control, save_freq_select; 77 unsigned char save_control, save_freq_select;
78 struct rtc_time tm; 78 struct rtc_time tm;
@@ -118,7 +118,7 @@ int __chrp chrp_set_rtc_time(unsigned long nowtime)
118 return 0; 118 return 0;
119} 119}
120 120
121unsigned long __chrp chrp_get_rtc_time(void) 121unsigned long chrp_get_rtc_time(void)
122{ 122{
123 unsigned int year, mon, day, hour, min, sec; 123 unsigned int year, mon, day, hour, min, sec;
124 int uip, i; 124 int uip, i;
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
index 9811a8a52c25..53388a1c334f 100644
--- a/arch/ppc/platforms/ev64360.c
+++ b/arch/ppc/platforms/ev64360.c
@@ -35,6 +35,7 @@
35#include <asm/bootinfo.h> 35#include <asm/bootinfo.h>
36#include <asm/ppcboot.h> 36#include <asm/ppcboot.h>
37#include <asm/mv64x60.h> 37#include <asm/mv64x60.h>
38#include <asm/machdep.h>
38#include <platforms/ev64360.h> 39#include <platforms/ev64360.h>
39 40
40#define BOARD_VENDOR "Marvell" 41#define BOARD_VENDOR "Marvell"
diff --git a/arch/ppc/platforms/fads.h b/arch/ppc/platforms/fads.h
index b60c56450b67..a48fb8d723e4 100644
--- a/arch/ppc/platforms/fads.h
+++ b/arch/ppc/platforms/fads.h
@@ -25,6 +25,8 @@
25 25
26#if defined(CONFIG_MPC86XADS) 26#if defined(CONFIG_MPC86XADS)
27 27
28#define BOARD_CHIP_NAME "MPC86X"
29
28/* U-Boot maps BCSR to 0xff080000 */ 30/* U-Boot maps BCSR to 0xff080000 */
29#define BCSR_ADDR ((uint)0xff080000) 31#define BCSR_ADDR ((uint)0xff080000)
30 32
diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c
index 3a5ff9fb71d6..729897c59033 100644
--- a/arch/ppc/platforms/gemini_setup.c
+++ b/arch/ppc/platforms/gemini_setup.c
@@ -35,6 +35,7 @@
35#include <asm/time.h> 35#include <asm/time.h>
36#include <asm/open_pic.h> 36#include <asm/open_pic.h>
37#include <asm/bootinfo.h> 37#include <asm/bootinfo.h>
38#include <asm/machdep.h>
38 39
39void gemini_find_bridges(void); 40void gemini_find_bridges(void);
40static int gemini_get_clock_speed(void); 41static int gemini_get_clock_speed(void);
@@ -555,7 +556,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
555 556
556 ppc_md.setup_arch = gemini_setup_arch; 557 ppc_md.setup_arch = gemini_setup_arch;
557 ppc_md.show_cpuinfo = gemini_show_cpuinfo; 558 ppc_md.show_cpuinfo = gemini_show_cpuinfo;
558 ppc_md.irq_canonicalize = NULL;
559 ppc_md.init_IRQ = gemini_init_IRQ; 559 ppc_md.init_IRQ = gemini_init_IRQ;
560 ppc_md.get_irq = openpic_get_irq; 560 ppc_md.get_irq = openpic_get_irq;
561 ppc_md.init = NULL; 561 ppc_md.init = NULL;
@@ -575,6 +575,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
575 ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup; 575 ppc_md.pcibios_fixup_bus = gemini_pcibios_fixup;
576 576
577#ifdef CONFIG_SMP 577#ifdef CONFIG_SMP
578 ppc_md.smp_ops = &gemini_smp_ops; 578 smp_ops = &gemini_smp_ops;
579#endif /* CONFIG_SMP */ 579#endif /* CONFIG_SMP */
580} 580}
diff --git a/arch/ppc/platforms/hdpu.c b/arch/ppc/platforms/hdpu.c
index eed4ff6903f1..b6a66d5e9d83 100644
--- a/arch/ppc/platforms/hdpu.c
+++ b/arch/ppc/platforms/hdpu.c
@@ -748,7 +748,7 @@ static int smp_hdpu_probe(void)
748} 748}
749 749
750static void 750static void
751smp_hdpu_message_pass(int target, int msg, unsigned long data, int wait) 751smp_hdpu_message_pass(int target, int msg)
752{ 752{
753 if (msg > 0x3) { 753 if (msg > 0x3) {
754 printk("SMP %d: smp_message_pass: unknown msg %d\n", 754 printk("SMP %d: smp_message_pass: unknown msg %d\n",
@@ -944,7 +944,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
944#endif /* CONFIG_SERIAL_TEXT_DEBUG */ 944#endif /* CONFIG_SERIAL_TEXT_DEBUG */
945 945
946#ifdef CONFIG_SMP 946#ifdef CONFIG_SMP
947 ppc_md.smp_ops = &hdpu_smp_ops; 947 smp_ops = &hdpu_smp_ops;
948#endif /* CONFIG_SMP */ 948#endif /* CONFIG_SMP */
949 949
950#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH) 950#if defined(CONFIG_SERIAL_MPSC) || defined(CONFIG_MV643XX_ETH)
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 2b53afae0e9c..a301c5ac58dd 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -42,6 +42,7 @@
42#include <asm/ppcboot.h> 42#include <asm/ppcboot.h>
43#include <asm/mv64x60.h> 43#include <asm/mv64x60.h>
44#include <platforms/katana.h> 44#include <platforms/katana.h>
45#include <asm/machdep.h>
45 46
46static struct mv64x60_handle bh; 47static struct mv64x60_handle bh;
47static katana_id_t katana_id; 48static katana_id_t katana_id;
@@ -520,7 +521,7 @@ katana_fixup_resources(struct pci_dev *dev)
520{ 521{
521 u16 v16; 522 u16 v16;
522 523
523 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_LINE_SIZE>>2); 524 pci_write_config_byte(dev, PCI_CACHE_LINE_SIZE, L1_CACHE_BYTES>>2);
524 525
525 pci_read_config_word(dev, PCI_COMMAND, &v16); 526 pci_read_config_word(dev, PCI_COMMAND, &v16);
526 v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK; 527 v16 |= PCI_COMMAND_INVALIDATE | PCI_COMMAND_FAST_BACK;
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index b604cf8b3cae..d44cc991179f 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -35,6 +35,7 @@
35#include <asm/io.h> 35#include <asm/io.h>
36#include <asm/mpc52xx.h> 36#include <asm/mpc52xx.h>
37#include <asm/ppc_sys.h> 37#include <asm/ppc_sys.h>
38#include <asm/machdep.h>
38 39
39#include <syslib/mpc52xx_pci.h> 40#include <syslib/mpc52xx_pci.h>
40 41
diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c
index a5569525e0af..06d247c23b82 100644
--- a/arch/ppc/platforms/lopec.c
+++ b/arch/ppc/platforms/lopec.c
@@ -144,15 +144,6 @@ lopec_show_cpuinfo(struct seq_file *m)
144 return 0; 144 return 0;
145} 145}
146 146
147static u32
148lopec_irq_canonicalize(u32 irq)
149{
150 if (irq == 2)
151 return 9;
152 else
153 return irq;
154}
155
156static void 147static void
157lopec_restart(char *cmd) 148lopec_restart(char *cmd)
158{ 149{
@@ -276,15 +267,11 @@ lopec_init_IRQ(void)
276 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", 267 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
277 &i8259_irq); 268 &i8259_irq);
278 269
279 /* Map i8259 interrupts */
280 for(i = 0; i < NUM_8259_INTERRUPTS; i++)
281 irq_desc[i].handler = &i8259_pic;
282
283 /* 270 /*
284 * The EPIC allows for a read in the range of 0xFEF00000 -> 271 * The EPIC allows for a read in the range of 0xFEF00000 ->
285 * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. 272 * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
286 */ 273 */
287 i8259_init(0xfef00000); 274 i8259_init(0xfef00000, 0);
288} 275}
289 276
290static int __init 277static int __init
@@ -379,10 +366,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
379 ISA_DMA_THRESHOLD = 0x00ffffff; 366 ISA_DMA_THRESHOLD = 0x00ffffff;
380 DMA_MODE_READ = 0x44; 367 DMA_MODE_READ = 0x44;
381 DMA_MODE_WRITE = 0x48; 368 DMA_MODE_WRITE = 0x48;
369 ppc_do_canonicalize_irqs = 1;
382 370
383 ppc_md.setup_arch = lopec_setup_arch; 371 ppc_md.setup_arch = lopec_setup_arch;
384 ppc_md.show_cpuinfo = lopec_show_cpuinfo; 372 ppc_md.show_cpuinfo = lopec_show_cpuinfo;
385 ppc_md.irq_canonicalize = lopec_irq_canonicalize;
386 ppc_md.init_IRQ = lopec_init_IRQ; 373 ppc_md.init_IRQ = lopec_init_IRQ;
387 ppc_md.get_irq = openpic_get_irq; 374 ppc_md.get_irq = openpic_get_irq;
388 375
diff --git a/arch/ppc/platforms/mpc885ads.h b/arch/ppc/platforms/mpc885ads.h
index eb386635b0fd..a80b7d116b49 100644
--- a/arch/ppc/platforms/mpc885ads.h
+++ b/arch/ppc/platforms/mpc885ads.h
@@ -88,5 +88,7 @@
88#define SICR_ENET_MASK ((uint)0x00ff0000) 88#define SICR_ENET_MASK ((uint)0x00ff0000)
89#define SICR_ENET_CLKRT ((uint)0x002c0000) 89#define SICR_ENET_CLKRT ((uint)0x002c0000)
90 90
91#define BOARD_CHIP_NAME "MPC885"
92
91#endif /* __ASM_MPC885ADS_H__ */ 93#endif /* __ASM_MPC885ADS_H__ */
92#endif /* __KERNEL__ */ 94#endif /* __KERNEL__ */
diff --git a/arch/ppc/platforms/mvme5100.c b/arch/ppc/platforms/mvme5100.c
index ce2ce88c8033..108eb182dddc 100644
--- a/arch/ppc/platforms/mvme5100.c
+++ b/arch/ppc/platforms/mvme5100.c
@@ -223,11 +223,7 @@ mvme5100_init_IRQ(void)
223 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", 223 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
224 &i8259_irq); 224 &i8259_irq);
225 225
226 /* Map i8259 interrupts. */ 226 i8259_init(0, 0);
227 for (i = 0; i < NUM_8259_INTERRUPTS; i++)
228 irq_desc[i].handler = &i8259_pic;
229
230 i8259_init(0);
231#else 227#else
232 openpic_init(0); 228 openpic_init(0);
233#endif 229#endif
diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c
index 12446b93e38c..f93a3f871932 100644
--- a/arch/ppc/platforms/pal4_setup.c
+++ b/arch/ppc/platforms/pal4_setup.c
@@ -28,6 +28,7 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/todc.h> 29#include <asm/todc.h>
30#include <asm/bootinfo.h> 30#include <asm/bootinfo.h>
31#include <asm/machdep.h>
31 32
32#include <syslib/cpc700.h> 33#include <syslib/cpc700.h>
33 34
diff --git a/arch/ppc/platforms/pmac_backlight.c b/arch/ppc/platforms/pmac_backlight.c
index ed2b1cebc19a..8be2f7d071f0 100644
--- a/arch/ppc/platforms/pmac_backlight.c
+++ b/arch/ppc/platforms/pmac_backlight.c
@@ -37,7 +37,7 @@ static int backlight_req_enable = -1;
37static void backlight_callback(void *); 37static void backlight_callback(void *);
38static DECLARE_WORK(backlight_work, backlight_callback, NULL); 38static DECLARE_WORK(backlight_work, backlight_callback, NULL);
39 39
40void __pmac register_backlight_controller(struct backlight_controller *ctrler, 40void register_backlight_controller(struct backlight_controller *ctrler,
41 void *data, char *type) 41 void *data, char *type)
42{ 42{
43 struct device_node* bk_node; 43 struct device_node* bk_node;
@@ -99,7 +99,7 @@ void __pmac register_backlight_controller(struct backlight_controller *ctrler,
99} 99}
100EXPORT_SYMBOL(register_backlight_controller); 100EXPORT_SYMBOL(register_backlight_controller);
101 101
102void __pmac unregister_backlight_controller(struct backlight_controller 102void unregister_backlight_controller(struct backlight_controller
103 *ctrler, void *data) 103 *ctrler, void *data)
104{ 104{
105 /* We keep the current backlight level (for now) */ 105 /* We keep the current backlight level (for now) */
@@ -108,7 +108,7 @@ void __pmac unregister_backlight_controller(struct backlight_controller
108} 108}
109EXPORT_SYMBOL(unregister_backlight_controller); 109EXPORT_SYMBOL(unregister_backlight_controller);
110 110
111static int __pmac __set_backlight_enable(int enable) 111static int __set_backlight_enable(int enable)
112{ 112{
113 int rc; 113 int rc;
114 114
@@ -122,7 +122,7 @@ static int __pmac __set_backlight_enable(int enable)
122 release_console_sem(); 122 release_console_sem();
123 return rc; 123 return rc;
124} 124}
125int __pmac set_backlight_enable(int enable) 125int set_backlight_enable(int enable)
126{ 126{
127 if (!backlighter) 127 if (!backlighter)
128 return -ENODEV; 128 return -ENODEV;
@@ -133,7 +133,7 @@ int __pmac set_backlight_enable(int enable)
133 133
134EXPORT_SYMBOL(set_backlight_enable); 134EXPORT_SYMBOL(set_backlight_enable);
135 135
136int __pmac get_backlight_enable(void) 136int get_backlight_enable(void)
137{ 137{
138 if (!backlighter) 138 if (!backlighter)
139 return -ENODEV; 139 return -ENODEV;
@@ -141,7 +141,7 @@ int __pmac get_backlight_enable(void)
141} 141}
142EXPORT_SYMBOL(get_backlight_enable); 142EXPORT_SYMBOL(get_backlight_enable);
143 143
144static int __pmac __set_backlight_level(int level) 144static int __set_backlight_level(int level)
145{ 145{
146 int rc = 0; 146 int rc = 0;
147 147
@@ -165,7 +165,7 @@ static int __pmac __set_backlight_level(int level)
165 } 165 }
166 return rc; 166 return rc;
167} 167}
168int __pmac set_backlight_level(int level) 168int set_backlight_level(int level)
169{ 169{
170 if (!backlighter) 170 if (!backlighter)
171 return -ENODEV; 171 return -ENODEV;
@@ -176,7 +176,7 @@ int __pmac set_backlight_level(int level)
176 176
177EXPORT_SYMBOL(set_backlight_level); 177EXPORT_SYMBOL(set_backlight_level);
178 178
179int __pmac get_backlight_level(void) 179int get_backlight_level(void)
180{ 180{
181 if (!backlighter) 181 if (!backlighter)
182 return -ENODEV; 182 return -ENODEV;
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index d4bc5f67ec53..fba7e4d7c0bf 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -136,7 +136,7 @@ static inline void debug_calc_bogomips(void)
136 136
137/* Switch CPU speed under 750FX CPU control 137/* Switch CPU speed under 750FX CPU control
138 */ 138 */
139static int __pmac cpu_750fx_cpu_speed(int low_speed) 139static int cpu_750fx_cpu_speed(int low_speed)
140{ 140{
141 u32 hid2; 141 u32 hid2;
142 142
@@ -172,7 +172,7 @@ static int __pmac cpu_750fx_cpu_speed(int low_speed)
172 return 0; 172 return 0;
173} 173}
174 174
175static unsigned int __pmac cpu_750fx_get_cpu_speed(void) 175static unsigned int cpu_750fx_get_cpu_speed(void)
176{ 176{
177 if (mfspr(SPRN_HID1) & HID1_PS) 177 if (mfspr(SPRN_HID1) & HID1_PS)
178 return low_freq; 178 return low_freq;
@@ -181,7 +181,7 @@ static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
181} 181}
182 182
183/* Switch CPU speed using DFS */ 183/* Switch CPU speed using DFS */
184static int __pmac dfs_set_cpu_speed(int low_speed) 184static int dfs_set_cpu_speed(int low_speed)
185{ 185{
186 if (low_speed == 0) { 186 if (low_speed == 0) {
187 /* ramping up, set voltage first */ 187 /* ramping up, set voltage first */
@@ -205,7 +205,7 @@ static int __pmac dfs_set_cpu_speed(int low_speed)
205 return 0; 205 return 0;
206} 206}
207 207
208static unsigned int __pmac dfs_get_cpu_speed(void) 208static unsigned int dfs_get_cpu_speed(void)
209{ 209{
210 if (mfspr(SPRN_HID1) & HID1_DFS) 210 if (mfspr(SPRN_HID1) & HID1_DFS)
211 return low_freq; 211 return low_freq;
@@ -216,7 +216,7 @@ static unsigned int __pmac dfs_get_cpu_speed(void)
216 216
217/* Switch CPU speed using slewing GPIOs 217/* Switch CPU speed using slewing GPIOs
218 */ 218 */
219static int __pmac gpios_set_cpu_speed(int low_speed) 219static int gpios_set_cpu_speed(int low_speed)
220{ 220{
221 int gpio, timeout = 0; 221 int gpio, timeout = 0;
222 222
@@ -258,7 +258,7 @@ static int __pmac gpios_set_cpu_speed(int low_speed)
258 258
259/* Switch CPU speed under PMU control 259/* Switch CPU speed under PMU control
260 */ 260 */
261static int __pmac pmu_set_cpu_speed(int low_speed) 261static int pmu_set_cpu_speed(int low_speed)
262{ 262{
263 struct adb_request req; 263 struct adb_request req;
264 unsigned long save_l2cr; 264 unsigned long save_l2cr;
@@ -354,7 +354,7 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
354 return 0; 354 return 0;
355} 355}
356 356
357static int __pmac do_set_cpu_speed(int speed_mode, int notify) 357static int do_set_cpu_speed(int speed_mode, int notify)
358{ 358{
359 struct cpufreq_freqs freqs; 359 struct cpufreq_freqs freqs;
360 unsigned long l3cr; 360 unsigned long l3cr;
@@ -391,17 +391,17 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
391 return 0; 391 return 0;
392} 392}
393 393
394static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu) 394static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
395{ 395{
396 return cur_freq; 396 return cur_freq;
397} 397}
398 398
399static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy) 399static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
400{ 400{
401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); 401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
402} 402}
403 403
404static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy, 404static int pmac_cpufreq_target( struct cpufreq_policy *policy,
405 unsigned int target_freq, 405 unsigned int target_freq,
406 unsigned int relation) 406 unsigned int relation)
407{ 407{
@@ -414,13 +414,13 @@ static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
414 return do_set_cpu_speed(newstate, 1); 414 return do_set_cpu_speed(newstate, 1);
415} 415}
416 416
417unsigned int __pmac pmac_get_one_cpufreq(int i) 417unsigned int pmac_get_one_cpufreq(int i)
418{ 418{
419 /* Supports only one CPU for now */ 419 /* Supports only one CPU for now */
420 return (i == 0) ? cur_freq : 0; 420 return (i == 0) ? cur_freq : 0;
421} 421}
422 422
423static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 423static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
424{ 424{
425 if (policy->cpu != 0) 425 if (policy->cpu != 0)
426 return -ENODEV; 426 return -ENODEV;
@@ -433,7 +433,7 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs); 433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
434} 434}
435 435
436static u32 __pmac read_gpio(struct device_node *np) 436static u32 read_gpio(struct device_node *np)
437{ 437{
438 u32 *reg = (u32 *)get_property(np, "reg", NULL); 438 u32 *reg = (u32 *)get_property(np, "reg", NULL);
439 u32 offset; 439 u32 offset;
@@ -452,7 +452,7 @@ static u32 __pmac read_gpio(struct device_node *np)
452 return offset; 452 return offset;
453} 453}
454 454
455static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) 455static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
456{ 456{
457 /* Ok, this could be made a bit smarter, but let's be robust for now. We 457 /* Ok, this could be made a bit smarter, but let's be robust for now. We
458 * always force a speed change to high speed before sleep, to make sure 458 * always force a speed change to high speed before sleep, to make sure
@@ -468,7 +468,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message
468 return 0; 468 return 0;
469} 469}
470 470
471static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy) 471static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
472{ 472{
473 /* If we resume, first check if we have a get() function */ 473 /* If we resume, first check if we have a get() function */
474 if (get_speed_proc) 474 if (get_speed_proc)
@@ -501,7 +501,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
501}; 501};
502 502
503 503
504static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) 504static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
505{ 505{
506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL, 506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
507 "voltage-gpio"); 507 "voltage-gpio");
@@ -593,7 +593,7 @@ static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
593 return 0; 593 return 0;
594} 594}
595 595
596static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode) 596static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
597{ 597{
598 struct device_node *volt_gpio_np; 598 struct device_node *volt_gpio_np;
599 599
@@ -620,7 +620,7 @@ static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
620 return 0; 620 return 0;
621} 621}
622 622
623static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode) 623static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
624{ 624{
625 struct device_node *volt_gpio_np; 625 struct device_node *volt_gpio_np;
626 u32 pvr, *value; 626 u32 pvr, *value;
diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
index dd6d45ae0501..58884a63ebdb 100644
--- a/arch/ppc/platforms/pmac_feature.c
+++ b/arch/ppc/platforms/pmac_feature.c
@@ -63,7 +63,7 @@ extern struct device_node *k2_skiplist[2];
63 * We use a single global lock to protect accesses. Each driver has 63 * We use a single global lock to protect accesses. Each driver has
64 * to take care of its own locking 64 * to take care of its own locking
65 */ 65 */
66static DEFINE_SPINLOCK(feature_lock __pmacdata); 66static DEFINE_SPINLOCK(feature_lock);
67 67
68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
@@ -72,9 +72,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata);
72/* 72/*
73 * Instance of some macio stuffs 73 * Instance of some macio stuffs
74 */ 74 */
75struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; 75struct macio_chip macio_chips[MAX_MACIO_CHIPS];
76 76
77struct macio_chip* __pmac macio_find(struct device_node* child, int type) 77struct macio_chip* macio_find(struct device_node* child, int type)
78{ 78{
79 while(child) { 79 while(child) {
80 int i; 80 int i;
@@ -89,7 +89,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
89} 89}
90EXPORT_SYMBOL_GPL(macio_find); 90EXPORT_SYMBOL_GPL(macio_find);
91 91
92static const char* macio_names[] __pmacdata = 92static const char* macio_names[] =
93{ 93{
94 "Unknown", 94 "Unknown",
95 "Grand Central", 95 "Grand Central",
@@ -116,10 +116,10 @@ static const char* macio_names[] __pmacdata =
116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
118 118
119static struct device_node* uninorth_node __pmacdata; 119static struct device_node* uninorth_node;
120static u32 __iomem * uninorth_base __pmacdata; 120static u32 __iomem * uninorth_base;
121static u32 uninorth_rev __pmacdata; 121static u32 uninorth_rev;
122static int uninorth_u3 __pmacdata; 122static int uninorth_u3;
123static void __iomem *u3_ht; 123static void __iomem *u3_ht;
124 124
125/* 125/*
@@ -142,13 +142,13 @@ struct pmac_mb_def
142 struct feature_table_entry* features; 142 struct feature_table_entry* features;
143 unsigned long board_flags; 143 unsigned long board_flags;
144}; 144};
145static struct pmac_mb_def pmac_mb __pmacdata; 145static struct pmac_mb_def pmac_mb;
146 146
147/* 147/*
148 * Here are the chip specific feature functions 148 * Here are the chip specific feature functions
149 */ 149 */
150 150
151static inline int __pmac 151static inline int
152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) 152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
153{ 153{
154 struct macio_chip* macio; 154 struct macio_chip* macio;
@@ -170,7 +170,7 @@ simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int
170 170
171#ifndef CONFIG_POWER4 171#ifndef CONFIG_POWER4
172 172
173static long __pmac 173static long
174ohare_htw_scc_enable(struct device_node* node, long param, long value) 174ohare_htw_scc_enable(struct device_node* node, long param, long value)
175{ 175{
176 struct macio_chip* macio; 176 struct macio_chip* macio;
@@ -263,21 +263,21 @@ ohare_htw_scc_enable(struct device_node* node, long param, long value)
263 return 0; 263 return 0;
264} 264}
265 265
266static long __pmac 266static long
267ohare_floppy_enable(struct device_node* node, long param, long value) 267ohare_floppy_enable(struct device_node* node, long param, long value)
268{ 268{
269 return simple_feature_tweak(node, macio_ohare, 269 return simple_feature_tweak(node, macio_ohare,
270 OHARE_FCR, OH_FLOPPY_ENABLE, value); 270 OHARE_FCR, OH_FLOPPY_ENABLE, value);
271} 271}
272 272
273static long __pmac 273static long
274ohare_mesh_enable(struct device_node* node, long param, long value) 274ohare_mesh_enable(struct device_node* node, long param, long value)
275{ 275{
276 return simple_feature_tweak(node, macio_ohare, 276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_MESH_ENABLE, value); 277 OHARE_FCR, OH_MESH_ENABLE, value);
278} 278}
279 279
280static long __pmac 280static long
281ohare_ide_enable(struct device_node* node, long param, long value) 281ohare_ide_enable(struct device_node* node, long param, long value)
282{ 282{
283 switch(param) { 283 switch(param) {
@@ -298,7 +298,7 @@ ohare_ide_enable(struct device_node* node, long param, long value)
298 } 298 }
299} 299}
300 300
301static long __pmac 301static long
302ohare_ide_reset(struct device_node* node, long param, long value) 302ohare_ide_reset(struct device_node* node, long param, long value)
303{ 303{
304 switch(param) { 304 switch(param) {
@@ -313,7 +313,7 @@ ohare_ide_reset(struct device_node* node, long param, long value)
313 } 313 }
314} 314}
315 315
316static long __pmac 316static long
317ohare_sleep_state(struct device_node* node, long param, long value) 317ohare_sleep_state(struct device_node* node, long param, long value)
318{ 318{
319 struct macio_chip* macio = &macio_chips[0]; 319 struct macio_chip* macio = &macio_chips[0];
@@ -329,7 +329,7 @@ ohare_sleep_state(struct device_node* node, long param, long value)
329 return 0; 329 return 0;
330} 330}
331 331
332static long __pmac 332static long
333heathrow_modem_enable(struct device_node* node, long param, long value) 333heathrow_modem_enable(struct device_node* node, long param, long value)
334{ 334{
335 struct macio_chip* macio; 335 struct macio_chip* macio;
@@ -373,7 +373,7 @@ heathrow_modem_enable(struct device_node* node, long param, long value)
373 return 0; 373 return 0;
374} 374}
375 375
376static long __pmac 376static long
377heathrow_floppy_enable(struct device_node* node, long param, long value) 377heathrow_floppy_enable(struct device_node* node, long param, long value)
378{ 378{
379 return simple_feature_tweak(node, macio_unknown, 379 return simple_feature_tweak(node, macio_unknown,
@@ -382,7 +382,7 @@ heathrow_floppy_enable(struct device_node* node, long param, long value)
382 value); 382 value);
383} 383}
384 384
385static long __pmac 385static long
386heathrow_mesh_enable(struct device_node* node, long param, long value) 386heathrow_mesh_enable(struct device_node* node, long param, long value)
387{ 387{
388 struct macio_chip* macio; 388 struct macio_chip* macio;
@@ -411,7 +411,7 @@ heathrow_mesh_enable(struct device_node* node, long param, long value)
411 return 0; 411 return 0;
412} 412}
413 413
414static long __pmac 414static long
415heathrow_ide_enable(struct device_node* node, long param, long value) 415heathrow_ide_enable(struct device_node* node, long param, long value)
416{ 416{
417 switch(param) { 417 switch(param) {
@@ -426,7 +426,7 @@ heathrow_ide_enable(struct device_node* node, long param, long value)
426 } 426 }
427} 427}
428 428
429static long __pmac 429static long
430heathrow_ide_reset(struct device_node* node, long param, long value) 430heathrow_ide_reset(struct device_node* node, long param, long value)
431{ 431{
432 switch(param) { 432 switch(param) {
@@ -441,7 +441,7 @@ heathrow_ide_reset(struct device_node* node, long param, long value)
441 } 441 }
442} 442}
443 443
444static long __pmac 444static long
445heathrow_bmac_enable(struct device_node* node, long param, long value) 445heathrow_bmac_enable(struct device_node* node, long param, long value)
446{ 446{
447 struct macio_chip* macio; 447 struct macio_chip* macio;
@@ -470,7 +470,7 @@ heathrow_bmac_enable(struct device_node* node, long param, long value)
470 return 0; 470 return 0;
471} 471}
472 472
473static long __pmac 473static long
474heathrow_sound_enable(struct device_node* node, long param, long value) 474heathrow_sound_enable(struct device_node* node, long param, long value)
475{ 475{
476 struct macio_chip* macio; 476 struct macio_chip* macio;
@@ -501,16 +501,16 @@ heathrow_sound_enable(struct device_node* node, long param, long value)
501 return 0; 501 return 0;
502} 502}
503 503
504static u32 save_fcr[6] __pmacdata; 504static u32 save_fcr[6];
505static u32 save_mbcr __pmacdata; 505static u32 save_mbcr;
506static u32 save_gpio_levels[2] __pmacdata; 506static u32 save_gpio_levels[2];
507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; 507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; 508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
509static u32 save_unin_clock_ctl __pmacdata; 509static u32 save_unin_clock_ctl;
510static struct dbdma_regs save_dbdma[13] __pmacdata; 510static struct dbdma_regs save_dbdma[13];
511static struct dbdma_regs save_alt_dbdma[13] __pmacdata; 511static struct dbdma_regs save_alt_dbdma[13];
512 512
513static void __pmac 513static void
514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) 514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
515{ 515{
516 int i; 516 int i;
@@ -527,7 +527,7 @@ dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
527 } 527 }
528} 528}
529 529
530static void __pmac 530static void
531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) 531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
532{ 532{
533 int i; 533 int i;
@@ -547,7 +547,7 @@ dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
547 } 547 }
548} 548}
549 549
550static void __pmac 550static void
551heathrow_sleep(struct macio_chip* macio, int secondary) 551heathrow_sleep(struct macio_chip* macio, int secondary)
552{ 552{
553 if (secondary) { 553 if (secondary) {
@@ -580,7 +580,7 @@ heathrow_sleep(struct macio_chip* macio, int secondary)
580 (void)MACIO_IN32(HEATHROW_FCR); 580 (void)MACIO_IN32(HEATHROW_FCR);
581} 581}
582 582
583static void __pmac 583static void
584heathrow_wakeup(struct macio_chip* macio, int secondary) 584heathrow_wakeup(struct macio_chip* macio, int secondary)
585{ 585{
586 if (secondary) { 586 if (secondary) {
@@ -605,7 +605,7 @@ heathrow_wakeup(struct macio_chip* macio, int secondary)
605 } 605 }
606} 606}
607 607
608static long __pmac 608static long
609heathrow_sleep_state(struct device_node* node, long param, long value) 609heathrow_sleep_state(struct device_node* node, long param, long value)
610{ 610{
611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
@@ -622,7 +622,7 @@ heathrow_sleep_state(struct device_node* node, long param, long value)
622 return 0; 622 return 0;
623} 623}
624 624
625static long __pmac 625static long
626core99_scc_enable(struct device_node* node, long param, long value) 626core99_scc_enable(struct device_node* node, long param, long value)
627{ 627{
628 struct macio_chip* macio; 628 struct macio_chip* macio;
@@ -723,7 +723,7 @@ core99_scc_enable(struct device_node* node, long param, long value)
723 return 0; 723 return 0;
724} 724}
725 725
726static long __pmac 726static long
727core99_modem_enable(struct device_node* node, long param, long value) 727core99_modem_enable(struct device_node* node, long param, long value)
728{ 728{
729 struct macio_chip* macio; 729 struct macio_chip* macio;
@@ -775,7 +775,7 @@ core99_modem_enable(struct device_node* node, long param, long value)
775 return 0; 775 return 0;
776} 776}
777 777
778static long __pmac 778static long
779pangea_modem_enable(struct device_node* node, long param, long value) 779pangea_modem_enable(struct device_node* node, long param, long value)
780{ 780{
781 struct macio_chip* macio; 781 struct macio_chip* macio;
@@ -830,7 +830,7 @@ pangea_modem_enable(struct device_node* node, long param, long value)
830 return 0; 830 return 0;
831} 831}
832 832
833static long __pmac 833static long
834core99_ata100_enable(struct device_node* node, long value) 834core99_ata100_enable(struct device_node* node, long value)
835{ 835{
836 unsigned long flags; 836 unsigned long flags;
@@ -860,7 +860,7 @@ core99_ata100_enable(struct device_node* node, long value)
860 return 0; 860 return 0;
861} 861}
862 862
863static long __pmac 863static long
864core99_ide_enable(struct device_node* node, long param, long value) 864core99_ide_enable(struct device_node* node, long param, long value)
865{ 865{
866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
@@ -883,7 +883,7 @@ core99_ide_enable(struct device_node* node, long param, long value)
883 } 883 }
884} 884}
885 885
886static long __pmac 886static long
887core99_ide_reset(struct device_node* node, long param, long value) 887core99_ide_reset(struct device_node* node, long param, long value)
888{ 888{
889 switch(param) { 889 switch(param) {
@@ -901,7 +901,7 @@ core99_ide_reset(struct device_node* node, long param, long value)
901 } 901 }
902} 902}
903 903
904static long __pmac 904static long
905core99_gmac_enable(struct device_node* node, long param, long value) 905core99_gmac_enable(struct device_node* node, long param, long value)
906{ 906{
907 unsigned long flags; 907 unsigned long flags;
@@ -918,7 +918,7 @@ core99_gmac_enable(struct device_node* node, long param, long value)
918 return 0; 918 return 0;
919} 919}
920 920
921static long __pmac 921static long
922core99_gmac_phy_reset(struct device_node* node, long param, long value) 922core99_gmac_phy_reset(struct device_node* node, long param, long value)
923{ 923{
924 unsigned long flags; 924 unsigned long flags;
@@ -943,7 +943,7 @@ core99_gmac_phy_reset(struct device_node* node, long param, long value)
943 return 0; 943 return 0;
944} 944}
945 945
946static long __pmac 946static long
947core99_sound_chip_enable(struct device_node* node, long param, long value) 947core99_sound_chip_enable(struct device_node* node, long param, long value)
948{ 948{
949 struct macio_chip* macio; 949 struct macio_chip* macio;
@@ -973,7 +973,7 @@ core99_sound_chip_enable(struct device_node* node, long param, long value)
973 return 0; 973 return 0;
974} 974}
975 975
976static long __pmac 976static long
977core99_airport_enable(struct device_node* node, long param, long value) 977core99_airport_enable(struct device_node* node, long param, long value)
978{ 978{
979 struct macio_chip* macio; 979 struct macio_chip* macio;
@@ -1060,7 +1060,7 @@ core99_airport_enable(struct device_node* node, long param, long value)
1060} 1060}
1061 1061
1062#ifdef CONFIG_SMP 1062#ifdef CONFIG_SMP
1063static long __pmac 1063static long
1064core99_reset_cpu(struct device_node* node, long param, long value) 1064core99_reset_cpu(struct device_node* node, long param, long value)
1065{ 1065{
1066 unsigned int reset_io = 0; 1066 unsigned int reset_io = 0;
@@ -1104,7 +1104,7 @@ core99_reset_cpu(struct device_node* node, long param, long value)
1104} 1104}
1105#endif /* CONFIG_SMP */ 1105#endif /* CONFIG_SMP */
1106 1106
1107static long __pmac 1107static long
1108core99_usb_enable(struct device_node* node, long param, long value) 1108core99_usb_enable(struct device_node* node, long param, long value)
1109{ 1109{
1110 struct macio_chip* macio; 1110 struct macio_chip* macio;
@@ -1257,7 +1257,7 @@ core99_usb_enable(struct device_node* node, long param, long value)
1257 return 0; 1257 return 0;
1258} 1258}
1259 1259
1260static long __pmac 1260static long
1261core99_firewire_enable(struct device_node* node, long param, long value) 1261core99_firewire_enable(struct device_node* node, long param, long value)
1262{ 1262{
1263 unsigned long flags; 1263 unsigned long flags;
@@ -1284,7 +1284,7 @@ core99_firewire_enable(struct device_node* node, long param, long value)
1284 return 0; 1284 return 0;
1285} 1285}
1286 1286
1287static long __pmac 1287static long
1288core99_firewire_cable_power(struct device_node* node, long param, long value) 1288core99_firewire_cable_power(struct device_node* node, long param, long value)
1289{ 1289{
1290 unsigned long flags; 1290 unsigned long flags;
@@ -1315,7 +1315,7 @@ core99_firewire_cable_power(struct device_node* node, long param, long value)
1315 return 0; 1315 return 0;
1316} 1316}
1317 1317
1318static long __pmac 1318static long
1319intrepid_aack_delay_enable(struct device_node* node, long param, long value) 1319intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1320{ 1320{
1321 unsigned long flags; 1321 unsigned long flags;
@@ -1336,7 +1336,7 @@ intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1336 1336
1337#endif /* CONFIG_POWER4 */ 1337#endif /* CONFIG_POWER4 */
1338 1338
1339static long __pmac 1339static long
1340core99_read_gpio(struct device_node* node, long param, long value) 1340core99_read_gpio(struct device_node* node, long param, long value)
1341{ 1341{
1342 struct macio_chip* macio = &macio_chips[0]; 1342 struct macio_chip* macio = &macio_chips[0];
@@ -1345,7 +1345,7 @@ core99_read_gpio(struct device_node* node, long param, long value)
1345} 1345}
1346 1346
1347 1347
1348static long __pmac 1348static long
1349core99_write_gpio(struct device_node* node, long param, long value) 1349core99_write_gpio(struct device_node* node, long param, long value)
1350{ 1350{
1351 struct macio_chip* macio = &macio_chips[0]; 1351 struct macio_chip* macio = &macio_chips[0];
@@ -1356,7 +1356,7 @@ core99_write_gpio(struct device_node* node, long param, long value)
1356 1356
1357#ifdef CONFIG_POWER4 1357#ifdef CONFIG_POWER4
1358 1358
1359static long __pmac 1359static long
1360g5_gmac_enable(struct device_node* node, long param, long value) 1360g5_gmac_enable(struct device_node* node, long param, long value)
1361{ 1361{
1362 struct macio_chip* macio = &macio_chips[0]; 1362 struct macio_chip* macio = &macio_chips[0];
@@ -1380,7 +1380,7 @@ g5_gmac_enable(struct device_node* node, long param, long value)
1380 return 0; 1380 return 0;
1381} 1381}
1382 1382
1383static long __pmac 1383static long
1384g5_fw_enable(struct device_node* node, long param, long value) 1384g5_fw_enable(struct device_node* node, long param, long value)
1385{ 1385{
1386 struct macio_chip* macio = &macio_chips[0]; 1386 struct macio_chip* macio = &macio_chips[0];
@@ -1403,7 +1403,7 @@ g5_fw_enable(struct device_node* node, long param, long value)
1403 return 0; 1403 return 0;
1404} 1404}
1405 1405
1406static long __pmac 1406static long
1407g5_mpic_enable(struct device_node* node, long param, long value) 1407g5_mpic_enable(struct device_node* node, long param, long value)
1408{ 1408{
1409 unsigned long flags; 1409 unsigned long flags;
@@ -1419,7 +1419,7 @@ g5_mpic_enable(struct device_node* node, long param, long value)
1419} 1419}
1420 1420
1421#ifdef CONFIG_SMP 1421#ifdef CONFIG_SMP
1422static long __pmac 1422static long
1423g5_reset_cpu(struct device_node* node, long param, long value) 1423g5_reset_cpu(struct device_node* node, long param, long value)
1424{ 1424{
1425 unsigned int reset_io = 0; 1425 unsigned int reset_io = 0;
@@ -1465,7 +1465,7 @@ g5_reset_cpu(struct device_node* node, long param, long value)
1465 * This takes the second CPU off the bus on dual CPU machines 1465 * This takes the second CPU off the bus on dual CPU machines
1466 * running UP 1466 * running UP
1467 */ 1467 */
1468void __pmac g5_phy_disable_cpu1(void) 1468void g5_phy_disable_cpu1(void)
1469{ 1469{
1470 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1470 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1471} 1471}
@@ -1474,7 +1474,7 @@ void __pmac g5_phy_disable_cpu1(void)
1474 1474
1475#ifndef CONFIG_POWER4 1475#ifndef CONFIG_POWER4
1476 1476
1477static void __pmac 1477static void
1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode) 1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1479{ 1479{
1480 u32 temp; 1480 u32 temp;
@@ -1528,7 +1528,7 @@ keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1529} 1529}
1530 1530
1531static void __pmac 1531static void
1532pangea_shutdown(struct macio_chip* macio, int sleep_mode) 1532pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1533{ 1533{
1534 u32 temp; 1534 u32 temp;
@@ -1562,7 +1562,7 @@ pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1563} 1563}
1564 1564
1565static void __pmac 1565static void
1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode) 1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1567{ 1567{
1568 u32 temp; 1568 u32 temp;
@@ -1591,7 +1591,7 @@ intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1591} 1591}
1592 1592
1593 1593
1594void __pmac pmac_tweak_clock_spreading(int enable) 1594void pmac_tweak_clock_spreading(int enable)
1595{ 1595{
1596 struct macio_chip* macio = &macio_chips[0]; 1596 struct macio_chip* macio = &macio_chips[0];
1597 1597
@@ -1698,7 +1698,7 @@ void __pmac pmac_tweak_clock_spreading(int enable)
1698} 1698}
1699 1699
1700 1700
1701static int __pmac 1701static int
1702core99_sleep(void) 1702core99_sleep(void)
1703{ 1703{
1704 struct macio_chip* macio; 1704 struct macio_chip* macio;
@@ -1791,7 +1791,7 @@ core99_sleep(void)
1791 return 0; 1791 return 0;
1792} 1792}
1793 1793
1794static int __pmac 1794static int
1795core99_wake_up(void) 1795core99_wake_up(void)
1796{ 1796{
1797 struct macio_chip* macio; 1797 struct macio_chip* macio;
@@ -1854,7 +1854,7 @@ core99_wake_up(void)
1854 return 0; 1854 return 0;
1855} 1855}
1856 1856
1857static long __pmac 1857static long
1858core99_sleep_state(struct device_node* node, long param, long value) 1858core99_sleep_state(struct device_node* node, long param, long value)
1859{ 1859{
1860 /* Param == 1 means to enter the "fake sleep" mode that is 1860 /* Param == 1 means to enter the "fake sleep" mode that is
@@ -1884,7 +1884,7 @@ core99_sleep_state(struct device_node* node, long param, long value)
1884 1884
1885#endif /* CONFIG_POWER4 */ 1885#endif /* CONFIG_POWER4 */
1886 1886
1887static long __pmac 1887static long
1888generic_dev_can_wake(struct device_node* node, long param, long value) 1888generic_dev_can_wake(struct device_node* node, long param, long value)
1889{ 1889{
1890 /* Todo: eventually check we are really dealing with on-board 1890 /* Todo: eventually check we are really dealing with on-board
@@ -1896,7 +1896,7 @@ generic_dev_can_wake(struct device_node* node, long param, long value)
1896 return 0; 1896 return 0;
1897} 1897}
1898 1898
1899static long __pmac 1899static long
1900generic_get_mb_info(struct device_node* node, long param, long value) 1900generic_get_mb_info(struct device_node* node, long param, long value)
1901{ 1901{
1902 switch(param) { 1902 switch(param) {
@@ -1919,7 +1919,7 @@ generic_get_mb_info(struct device_node* node, long param, long value)
1919 1919
1920/* Used on any machine 1920/* Used on any machine
1921 */ 1921 */
1922static struct feature_table_entry any_features[] __pmacdata = { 1922static struct feature_table_entry any_features[] = {
1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1925 { 0, NULL } 1925 { 0, NULL }
@@ -1931,7 +1931,7 @@ static struct feature_table_entry any_features[] __pmacdata = {
1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1932 * to have issues with turning on/off those asic cells 1932 * to have issues with turning on/off those asic cells
1933 */ 1933 */
1934static struct feature_table_entry ohare_features[] __pmacdata = { 1934static struct feature_table_entry ohare_features[] = {
1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
@@ -1945,7 +1945,7 @@ static struct feature_table_entry ohare_features[] __pmacdata = {
1945 * Separated as some features couldn't be properly tested 1945 * Separated as some features couldn't be properly tested
1946 * and the serial port control bits appear to confuse it. 1946 * and the serial port control bits appear to confuse it.
1947 */ 1947 */
1948static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { 1948static struct feature_table_entry heathrow_desktop_features[] = {
1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
@@ -1957,7 +1957,7 @@ static struct feature_table_entry heathrow_desktop_features[] __pmacdata = {
1957/* Heathrow based laptop, that is the Wallstreet and mainstreet 1957/* Heathrow based laptop, that is the Wallstreet and mainstreet
1958 * powerbooks. 1958 * powerbooks.
1959 */ 1959 */
1960static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { 1960static struct feature_table_entry heathrow_laptop_features[] = {
1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1973,7 +1973,7 @@ static struct feature_table_entry heathrow_laptop_features[] __pmacdata = {
1973/* Paddington based machines 1973/* Paddington based machines
1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1975 */ 1975 */
1976static struct feature_table_entry paddington_features[] __pmacdata = { 1976static struct feature_table_entry paddington_features[] = {
1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1991,7 +1991,7 @@ static struct feature_table_entry paddington_features[] __pmacdata = {
1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1992 * used on iBook2 & iMac "flow power". 1992 * used on iBook2 & iMac "flow power".
1993 */ 1993 */
1994static struct feature_table_entry core99_features[] __pmacdata = { 1994static struct feature_table_entry core99_features[] = {
1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2014,7 +2014,7 @@ static struct feature_table_entry core99_features[] __pmacdata = {
2014 2014
2015/* RackMac 2015/* RackMac
2016 */ 2016 */
2017static struct feature_table_entry rackmac_features[] __pmacdata = { 2017static struct feature_table_entry rackmac_features[] = {
2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2020 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2020 { PMAC_FTR_IDE_RESET, core99_ide_reset },
@@ -2034,7 +2034,7 @@ static struct feature_table_entry rackmac_features[] __pmacdata = {
2034 2034
2035/* Pangea features 2035/* Pangea features
2036 */ 2036 */
2037static struct feature_table_entry pangea_features[] __pmacdata = { 2037static struct feature_table_entry pangea_features[] = {
2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2054,7 +2054,7 @@ static struct feature_table_entry pangea_features[] __pmacdata = {
2054 2054
2055/* Intrepid features 2055/* Intrepid features
2056 */ 2056 */
2057static struct feature_table_entry intrepid_features[] __pmacdata = { 2057static struct feature_table_entry intrepid_features[] = {
2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2077,7 +2077,7 @@ static struct feature_table_entry intrepid_features[] __pmacdata = {
2077 2077
2078/* G5 features 2078/* G5 features
2079 */ 2079 */
2080static struct feature_table_entry g5_features[] __pmacdata = { 2080static struct feature_table_entry g5_features[] = {
2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
@@ -2091,7 +2091,7 @@ static struct feature_table_entry g5_features[] __pmacdata = {
2091 2091
2092#endif /* CONFIG_POWER4 */ 2092#endif /* CONFIG_POWER4 */
2093 2093
2094static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { 2094static struct pmac_mb_def pmac_mb_defs[] = {
2095#ifndef CONFIG_POWER4 2095#ifndef CONFIG_POWER4
2096 /* 2096 /*
2097 * Desktops 2097 * Desktops
@@ -2356,7 +2356,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
2356/* 2356/*
2357 * The toplevel feature_call callback 2357 * The toplevel feature_call callback
2358 */ 2358 */
2359long __pmac 2359long
2360pmac_do_feature_call(unsigned int selector, ...) 2360pmac_do_feature_call(unsigned int selector, ...)
2361{ 2361{
2362 struct device_node* node; 2362 struct device_node* node;
@@ -2939,8 +2939,8 @@ void __init pmac_check_ht_link(void)
2939 * Early video resume hook 2939 * Early video resume hook
2940 */ 2940 */
2941 2941
2942static void (*pmac_early_vresume_proc)(void *data) __pmacdata; 2942static void (*pmac_early_vresume_proc)(void *data);
2943static void *pmac_early_vresume_data __pmacdata; 2943static void *pmac_early_vresume_data;
2944 2944
2945void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 2945void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2946{ 2946{
@@ -2953,7 +2953,7 @@ void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2953} 2953}
2954EXPORT_SYMBOL(pmac_set_early_video_resume); 2954EXPORT_SYMBOL(pmac_set_early_video_resume);
2955 2955
2956void __pmac pmac_call_early_video_resume(void) 2956void pmac_call_early_video_resume(void)
2957{ 2957{
2958 if (pmac_early_vresume_proc) 2958 if (pmac_early_vresume_proc)
2959 pmac_early_vresume_proc(pmac_early_vresume_data); 2959 pmac_early_vresume_proc(pmac_early_vresume_data);
@@ -2963,11 +2963,11 @@ void __pmac pmac_call_early_video_resume(void)
2963 * AGP related suspend/resume code 2963 * AGP related suspend/resume code
2964 */ 2964 */
2965 2965
2966static struct pci_dev *pmac_agp_bridge __pmacdata; 2966static struct pci_dev *pmac_agp_bridge;
2967static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; 2967static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2968static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; 2968static int (*pmac_agp_resume)(struct pci_dev *bridge);
2969 2969
2970void __pmac pmac_register_agp_pm(struct pci_dev *bridge, 2970void pmac_register_agp_pm(struct pci_dev *bridge,
2971 int (*suspend)(struct pci_dev *bridge), 2971 int (*suspend)(struct pci_dev *bridge),
2972 int (*resume)(struct pci_dev *bridge)) 2972 int (*resume)(struct pci_dev *bridge))
2973{ 2973{
@@ -2984,7 +2984,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
2984} 2984}
2985EXPORT_SYMBOL(pmac_register_agp_pm); 2985EXPORT_SYMBOL(pmac_register_agp_pm);
2986 2986
2987void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) 2987void pmac_suspend_agp_for_card(struct pci_dev *dev)
2988{ 2988{
2989 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 2989 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
2990 return; 2990 return;
@@ -2994,7 +2994,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
2994} 2994}
2995EXPORT_SYMBOL(pmac_suspend_agp_for_card); 2995EXPORT_SYMBOL(pmac_suspend_agp_for_card);
2996 2996
2997void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) 2997void pmac_resume_agp_for_card(struct pci_dev *dev)
2998{ 2998{
2999 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 2999 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3000 return; 3000 return;
diff --git a/arch/ppc/platforms/pmac_nvram.c b/arch/ppc/platforms/pmac_nvram.c
index c9de64205996..8c9b008c7226 100644
--- a/arch/ppc/platforms/pmac_nvram.c
+++ b/arch/ppc/platforms/pmac_nvram.c
@@ -88,17 +88,17 @@ extern int system_running;
88static int (*core99_write_bank)(int bank, u8* datas); 88static int (*core99_write_bank)(int bank, u8* datas);
89static int (*core99_erase_bank)(int bank); 89static int (*core99_erase_bank)(int bank);
90 90
91static char *nvram_image __pmacdata; 91static char *nvram_image;
92 92
93 93
94static unsigned char __pmac core99_nvram_read_byte(int addr) 94static unsigned char core99_nvram_read_byte(int addr)
95{ 95{
96 if (nvram_image == NULL) 96 if (nvram_image == NULL)
97 return 0xff; 97 return 0xff;
98 return nvram_image[addr]; 98 return nvram_image[addr];
99} 99}
100 100
101static void __pmac core99_nvram_write_byte(int addr, unsigned char val) 101static void core99_nvram_write_byte(int addr, unsigned char val)
102{ 102{
103 if (nvram_image == NULL) 103 if (nvram_image == NULL)
104 return; 104 return;
@@ -106,18 +106,18 @@ static void __pmac core99_nvram_write_byte(int addr, unsigned char val)
106} 106}
107 107
108 108
109static unsigned char __openfirmware direct_nvram_read_byte(int addr) 109static unsigned char direct_nvram_read_byte(int addr)
110{ 110{
111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]); 111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
112} 112}
113 113
114static void __openfirmware direct_nvram_write_byte(int addr, unsigned char val) 114static void direct_nvram_write_byte(int addr, unsigned char val)
115{ 115{
116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val); 116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val);
117} 117}
118 118
119 119
120static unsigned char __pmac indirect_nvram_read_byte(int addr) 120static unsigned char indirect_nvram_read_byte(int addr)
121{ 121{
122 unsigned char val; 122 unsigned char val;
123 unsigned long flags; 123 unsigned long flags;
@@ -130,7 +130,7 @@ static unsigned char __pmac indirect_nvram_read_byte(int addr)
130 return val; 130 return val;
131} 131}
132 132
133static void __pmac indirect_nvram_write_byte(int addr, unsigned char val) 133static void indirect_nvram_write_byte(int addr, unsigned char val)
134{ 134{
135 unsigned long flags; 135 unsigned long flags;
136 136
@@ -143,13 +143,13 @@ static void __pmac indirect_nvram_write_byte(int addr, unsigned char val)
143 143
144#ifdef CONFIG_ADB_PMU 144#ifdef CONFIG_ADB_PMU
145 145
146static void __pmac pmu_nvram_complete(struct adb_request *req) 146static void pmu_nvram_complete(struct adb_request *req)
147{ 147{
148 if (req->arg) 148 if (req->arg)
149 complete((struct completion *)req->arg); 149 complete((struct completion *)req->arg);
150} 150}
151 151
152static unsigned char __pmac pmu_nvram_read_byte(int addr) 152static unsigned char pmu_nvram_read_byte(int addr)
153{ 153{
154 struct adb_request req; 154 struct adb_request req;
155 DECLARE_COMPLETION(req_complete); 155 DECLARE_COMPLETION(req_complete);
@@ -165,7 +165,7 @@ static unsigned char __pmac pmu_nvram_read_byte(int addr)
165 return req.reply[0]; 165 return req.reply[0];
166} 166}
167 167
168static void __pmac pmu_nvram_write_byte(int addr, unsigned char val) 168static void pmu_nvram_write_byte(int addr, unsigned char val)
169{ 169{
170 struct adb_request req; 170 struct adb_request req;
171 DECLARE_COMPLETION(req_complete); 171 DECLARE_COMPLETION(req_complete);
@@ -183,7 +183,7 @@ static void __pmac pmu_nvram_write_byte(int addr, unsigned char val)
183#endif /* CONFIG_ADB_PMU */ 183#endif /* CONFIG_ADB_PMU */
184 184
185 185
186static u8 __pmac chrp_checksum(struct chrp_header* hdr) 186static u8 chrp_checksum(struct chrp_header* hdr)
187{ 187{
188 u8 *ptr; 188 u8 *ptr;
189 u16 sum = hdr->signature; 189 u16 sum = hdr->signature;
@@ -194,7 +194,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
194 return sum; 194 return sum;
195} 195}
196 196
197static u32 __pmac core99_calc_adler(u8 *buffer) 197static u32 core99_calc_adler(u8 *buffer)
198{ 198{
199 int cnt; 199 int cnt;
200 u32 low, high; 200 u32 low, high;
@@ -216,7 +216,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
216 return (high << 16) | low; 216 return (high << 16) | low;
217} 217}
218 218
219static u32 __pmac core99_check(u8* datas) 219static u32 core99_check(u8* datas)
220{ 220{
221 struct core99_header* hdr99 = (struct core99_header*)datas; 221 struct core99_header* hdr99 = (struct core99_header*)datas;
222 222
@@ -235,7 +235,7 @@ static u32 __pmac core99_check(u8* datas)
235 return hdr99->generation; 235 return hdr99->generation;
236} 236}
237 237
238static int __pmac sm_erase_bank(int bank) 238static int sm_erase_bank(int bank)
239{ 239{
240 int stat, i; 240 int stat, i;
241 unsigned long timeout; 241 unsigned long timeout;
@@ -267,7 +267,7 @@ static int __pmac sm_erase_bank(int bank)
267 return 0; 267 return 0;
268} 268}
269 269
270static int __pmac sm_write_bank(int bank, u8* datas) 270static int sm_write_bank(int bank, u8* datas)
271{ 271{
272 int i, stat = 0; 272 int i, stat = 0;
273 unsigned long timeout; 273 unsigned long timeout;
@@ -302,7 +302,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
302 return 0; 302 return 0;
303} 303}
304 304
305static int __pmac amd_erase_bank(int bank) 305static int amd_erase_bank(int bank)
306{ 306{
307 int i, stat = 0; 307 int i, stat = 0;
308 unsigned long timeout; 308 unsigned long timeout;
@@ -349,7 +349,7 @@ static int __pmac amd_erase_bank(int bank)
349 return 0; 349 return 0;
350} 350}
351 351
352static int __pmac amd_write_bank(int bank, u8* datas) 352static int amd_write_bank(int bank, u8* datas)
353{ 353{
354 int i, stat = 0; 354 int i, stat = 0;
355 unsigned long timeout; 355 unsigned long timeout;
@@ -430,7 +430,7 @@ static void __init lookup_partitions(void)
430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]); 430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
431} 431}
432 432
433static void __pmac core99_nvram_sync(void) 433static void core99_nvram_sync(void)
434{ 434{
435 struct core99_header* hdr99; 435 struct core99_header* hdr99;
436 unsigned long flags; 436 unsigned long flags;
@@ -554,12 +554,12 @@ void __init pmac_nvram_init(void)
554 lookup_partitions(); 554 lookup_partitions();
555} 555}
556 556
557int __pmac pmac_get_partition(int partition) 557int pmac_get_partition(int partition)
558{ 558{
559 return nvram_partitions[partition]; 559 return nvram_partitions[partition];
560} 560}
561 561
562u8 __pmac pmac_xpram_read(int xpaddr) 562u8 pmac_xpram_read(int xpaddr)
563{ 563{
564 int offset = nvram_partitions[pmac_nvram_XPRAM]; 564 int offset = nvram_partitions[pmac_nvram_XPRAM];
565 565
@@ -569,7 +569,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
569 return ppc_md.nvram_read_val(xpaddr + offset); 569 return ppc_md.nvram_read_val(xpaddr + offset);
570} 570}
571 571
572void __pmac pmac_xpram_write(int xpaddr, u8 data) 572void pmac_xpram_write(int xpaddr, u8 data)
573{ 573{
574 int offset = nvram_partitions[pmac_nvram_XPRAM]; 574 int offset = nvram_partitions[pmac_nvram_XPRAM];
575 575
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index 719fb49fe2bc..786295b6ddd0 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -141,7 +141,7 @@ fixup_bus_range(struct device_node *bridge)
141 |(((unsigned long)(off)) & 0xFCUL) \ 141 |(((unsigned long)(off)) & 0xFCUL) \
142 |1UL) 142 |1UL)
143 143
144static void volatile __iomem * __pmac 144static void volatile __iomem *
145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) 145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
146{ 146{
147 unsigned int caddr; 147 unsigned int caddr;
@@ -162,7 +162,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
162 return hose->cfg_data + offset; 162 return hose->cfg_data + offset;
163} 163}
164 164
165static int __pmac 165static int
166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
167 int len, u32 *val) 167 int len, u32 *val)
168{ 168{
@@ -190,7 +190,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
190 return PCIBIOS_SUCCESSFUL; 190 return PCIBIOS_SUCCESSFUL;
191} 191}
192 192
193static int __pmac 193static int
194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
195 int len, u32 val) 195 int len, u32 val)
196{ 196{
@@ -230,7 +230,7 @@ static struct pci_ops macrisc_pci_ops =
230/* 230/*
231 * Verifiy that a specific (bus, dev_fn) exists on chaos 231 * Verifiy that a specific (bus, dev_fn) exists on chaos
232 */ 232 */
233static int __pmac 233static int
234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) 234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
235{ 235{
236 struct device_node *np; 236 struct device_node *np;
@@ -252,7 +252,7 @@ chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
252 return PCIBIOS_SUCCESSFUL; 252 return PCIBIOS_SUCCESSFUL;
253} 253}
254 254
255static int __pmac 255static int
256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
257 int len, u32 *val) 257 int len, u32 *val)
258{ 258{
@@ -264,7 +264,7 @@ chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
264 return macrisc_read_config(bus, devfn, offset, len, val); 264 return macrisc_read_config(bus, devfn, offset, len, val);
265} 265}
266 266
267static int __pmac 267static int
268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
269 int len, u32 val) 269 int len, u32 val)
270{ 270{
@@ -294,7 +294,7 @@ static struct pci_ops chaos_pci_ops =
294 + (((unsigned long)bus) << 16) \ 294 + (((unsigned long)bus) << 16) \
295 + 0x01000000UL) 295 + 0x01000000UL)
296 296
297static void volatile __iomem * __pmac 297static void volatile __iomem *
298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) 298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
299{ 299{
300 if (bus == hose->first_busno) { 300 if (bus == hose->first_busno) {
@@ -307,7 +307,7 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); 307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
308} 308}
309 309
310static int __pmac 310static int
311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
312 int len, u32 *val) 312 int len, u32 *val)
313{ 313{
@@ -357,7 +357,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
357 return PCIBIOS_SUCCESSFUL; 357 return PCIBIOS_SUCCESSFUL;
358} 358}
359 359
360static int __pmac 360static int
361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
362 int len, u32 val) 362 int len, u32 val)
363{ 363{
@@ -575,7 +575,7 @@ pmac_find_bridges(void)
575 * some offset between bus number and domains for now when we 575 * some offset between bus number and domains for now when we
576 * assign all busses should help for now 576 * assign all busses should help for now
577 */ 577 */
578 if (pci_assign_all_busses) 578 if (pci_assign_all_buses)
579 pcibios_assign_bus_offset = 0x10; 579 pcibios_assign_bus_offset = 0x10;
580 580
581#ifdef CONFIG_POWER4 581#ifdef CONFIG_POWER4
@@ -643,7 +643,7 @@ static inline void grackle_set_loop_snoop(struct pci_controller *bp, int enable)
643static int __init 643static int __init
644setup_uninorth(struct pci_controller* hose, struct reg_property* addr) 644setup_uninorth(struct pci_controller* hose, struct reg_property* addr)
645{ 645{
646 pci_assign_all_busses = 1; 646 pci_assign_all_buses = 1;
647 has_uninorth = 1; 647 has_uninorth = 1;
648 hose->ops = &macrisc_pci_ops; 648 hose->ops = &macrisc_pci_ops;
649 hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000); 649 hose->cfg_addr = ioremap(addr->address + 0x800000, 0x1000);
@@ -677,7 +677,7 @@ setup_u3_agp(struct pci_controller* hose, struct reg_property* addr)
677{ 677{
678 /* On G5, we move AGP up to high bus number so we don't need 678 /* On G5, we move AGP up to high bus number so we don't need
679 * to reassign bus numbers for HT. If we ever have P2P bridges 679 * to reassign bus numbers for HT. If we ever have P2P bridges
680 * on AGP, we'll have to move pci_assign_all_busses to the 680 * on AGP, we'll have to move pci_assign_all_buses to the
681 * pci_controller structure so we enable it for AGP and not for 681 * pci_controller structure so we enable it for AGP and not for
682 * HT childs. 682 * HT childs.
683 * We hard code the address because of the different size of 683 * We hard code the address because of the different size of
@@ -899,7 +899,7 @@ pmac_pcibios_fixup(void)
899 pcibios_fixup_OF_interrupts(); 899 pcibios_fixup_OF_interrupts();
900} 900}
901 901
902int __pmac 902int
903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial) 903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
904{ 904{
905 struct device_node* node; 905 struct device_node* node;
@@ -1096,7 +1096,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
1096 * Disable second function on K2-SATA, it's broken 1096 * Disable second function on K2-SATA, it's broken
1097 * and disable IO BARs on first one 1097 * and disable IO BARs on first one
1098 */ 1098 */
1099void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev) 1099void pmac_pci_fixup_k2_sata(struct pci_dev* dev)
1100{ 1100{
1101 int i; 1101 int i;
1102 u16 cmd; 1102 u16 cmd;
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 2ce058895e03..9f2d95ea8564 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -35,6 +35,7 @@
35#include <asm/open_pic.h> 35#include <asm/open_pic.h>
36#include <asm/xmon.h> 36#include <asm/xmon.h>
37#include <asm/pmac_feature.h> 37#include <asm/pmac_feature.h>
38#include <asm/machdep.h>
38 39
39#include "pmac_pic.h" 40#include "pmac_pic.h"
40 41
@@ -53,7 +54,7 @@ struct pmac_irq_hw {
53}; 54};
54 55
55/* Default addresses */ 56/* Default addresses */
56static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = { 57static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
57 (struct pmac_irq_hw *) 0xf3000020, 58 (struct pmac_irq_hw *) 0xf3000020,
58 (struct pmac_irq_hw *) 0xf3000010, 59 (struct pmac_irq_hw *) 0xf3000010,
59 (struct pmac_irq_hw *) 0xf4000020, 60 (struct pmac_irq_hw *) 0xf4000020,
@@ -64,22 +65,22 @@ static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
64#define OHARE_LEVEL_MASK 0x1ff00000 65#define OHARE_LEVEL_MASK 0x1ff00000
65#define HEATHROW_LEVEL_MASK 0x1ff00000 66#define HEATHROW_LEVEL_MASK 0x1ff00000
66 67
67static int max_irqs __pmacdata; 68static int max_irqs;
68static int max_real_irqs __pmacdata; 69static int max_real_irqs;
69static u32 level_mask[4] __pmacdata; 70static u32 level_mask[4];
70 71
71static DEFINE_SPINLOCK(pmac_pic_lock __pmacdata); 72static DEFINE_SPINLOCK(pmac_pic_lock);
72 73
73 74
74#define GATWICK_IRQ_POOL_SIZE 10 75#define GATWICK_IRQ_POOL_SIZE 10
75static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata; 76static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
76 77
77/* 78/*
78 * Mark an irq as "lost". This is only used on the pmac 79 * Mark an irq as "lost". This is only used on the pmac
79 * since it can lose interrupts (see pmac_set_irq_mask). 80 * since it can lose interrupts (see pmac_set_irq_mask).
80 * -- Cort 81 * -- Cort
81 */ 82 */
82void __pmac 83void
83__set_lost(unsigned long irq_nr, int nokick) 84__set_lost(unsigned long irq_nr, int nokick)
84{ 85{
85 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { 86 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
@@ -89,7 +90,7 @@ __set_lost(unsigned long irq_nr, int nokick)
89 } 90 }
90} 91}
91 92
92static void __pmac 93static void
93pmac_mask_and_ack_irq(unsigned int irq_nr) 94pmac_mask_and_ack_irq(unsigned int irq_nr)
94{ 95{
95 unsigned long bit = 1UL << (irq_nr & 0x1f); 96 unsigned long bit = 1UL << (irq_nr & 0x1f);
@@ -114,7 +115,7 @@ pmac_mask_and_ack_irq(unsigned int irq_nr)
114 spin_unlock_irqrestore(&pmac_pic_lock, flags); 115 spin_unlock_irqrestore(&pmac_pic_lock, flags);
115} 116}
116 117
117static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) 118static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
118{ 119{
119 unsigned long bit = 1UL << (irq_nr & 0x1f); 120 unsigned long bit = 1UL << (irq_nr & 0x1f);
120 int i = irq_nr >> 5; 121 int i = irq_nr >> 5;
@@ -147,7 +148,7 @@ static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
147/* When an irq gets requested for the first client, if it's an 148/* When an irq gets requested for the first client, if it's an
148 * edge interrupt, we clear any previous one on the controller 149 * edge interrupt, we clear any previous one on the controller
149 */ 150 */
150static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr) 151static unsigned int pmac_startup_irq(unsigned int irq_nr)
151{ 152{
152 unsigned long bit = 1UL << (irq_nr & 0x1f); 153 unsigned long bit = 1UL << (irq_nr & 0x1f);
153 int i = irq_nr >> 5; 154 int i = irq_nr >> 5;
@@ -160,20 +161,20 @@ static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr)
160 return 0; 161 return 0;
161} 162}
162 163
163static void __pmac pmac_mask_irq(unsigned int irq_nr) 164static void pmac_mask_irq(unsigned int irq_nr)
164{ 165{
165 clear_bit(irq_nr, ppc_cached_irq_mask); 166 clear_bit(irq_nr, ppc_cached_irq_mask);
166 pmac_set_irq_mask(irq_nr, 0); 167 pmac_set_irq_mask(irq_nr, 0);
167 mb(); 168 mb();
168} 169}
169 170
170static void __pmac pmac_unmask_irq(unsigned int irq_nr) 171static void pmac_unmask_irq(unsigned int irq_nr)
171{ 172{
172 set_bit(irq_nr, ppc_cached_irq_mask); 173 set_bit(irq_nr, ppc_cached_irq_mask);
173 pmac_set_irq_mask(irq_nr, 0); 174 pmac_set_irq_mask(irq_nr, 0);
174} 175}
175 176
176static void __pmac pmac_end_irq(unsigned int irq_nr) 177static void pmac_end_irq(unsigned int irq_nr)
177{ 178{
178 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 179 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
179 && irq_desc[irq_nr].action) { 180 && irq_desc[irq_nr].action) {
diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c
index d6356f480d90..55d2beffe560 100644
--- a/arch/ppc/platforms/pmac_setup.c
+++ b/arch/ppc/platforms/pmac_setup.c
@@ -122,7 +122,7 @@ extern struct smp_ops_t psurge_smp_ops;
122extern struct smp_ops_t core99_smp_ops; 122extern struct smp_ops_t core99_smp_ops;
123#endif /* CONFIG_SMP */ 123#endif /* CONFIG_SMP */
124 124
125static int __pmac 125static int
126pmac_show_cpuinfo(struct seq_file *m) 126pmac_show_cpuinfo(struct seq_file *m)
127{ 127{
128 struct device_node *np; 128 struct device_node *np;
@@ -226,7 +226,7 @@ pmac_show_cpuinfo(struct seq_file *m)
226 return 0; 226 return 0;
227} 227}
228 228
229static int __openfirmware 229static int
230pmac_show_percpuinfo(struct seq_file *m, int i) 230pmac_show_percpuinfo(struct seq_file *m, int i)
231{ 231{
232#ifdef CONFIG_CPU_FREQ_PMAC 232#ifdef CONFIG_CPU_FREQ_PMAC
@@ -330,9 +330,9 @@ pmac_setup_arch(void)
330#ifdef CONFIG_SMP 330#ifdef CONFIG_SMP
331 /* Check for Core99 */ 331 /* Check for Core99 */
332 if (find_devices("uni-n") || find_devices("u3")) 332 if (find_devices("uni-n") || find_devices("u3"))
333 ppc_md.smp_ops = &core99_smp_ops; 333 smp_ops = &core99_smp_ops;
334 else 334 else
335 ppc_md.smp_ops = &psurge_smp_ops; 335 smp_ops = &psurge_smp_ops;
336#endif /* CONFIG_SMP */ 336#endif /* CONFIG_SMP */
337 337
338 pci_create_OF_bus_map(); 338 pci_create_OF_bus_map();
@@ -447,7 +447,7 @@ static int pmac_pm_enter(suspend_state_t state)
447 enable_kernel_fp(); 447 enable_kernel_fp();
448 448
449#ifdef CONFIG_ALTIVEC 449#ifdef CONFIG_ALTIVEC
450 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC) 450 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
451 enable_kernel_altivec(); 451 enable_kernel_altivec();
452#endif /* CONFIG_ALTIVEC */ 452#endif /* CONFIG_ALTIVEC */
453 453
@@ -485,7 +485,7 @@ static int pmac_late_init(void)
485late_initcall(pmac_late_init); 485late_initcall(pmac_late_init);
486 486
487/* can't be __init - can be called whenever a disk is first accessed */ 487/* can't be __init - can be called whenever a disk is first accessed */
488void __pmac 488void
489note_bootable_part(dev_t dev, int part, int goodness) 489note_bootable_part(dev_t dev, int part, int goodness)
490{ 490{
491 static int found_boot = 0; 491 static int found_boot = 0;
@@ -511,7 +511,7 @@ note_bootable_part(dev_t dev, int part, int goodness)
511 } 511 }
512} 512}
513 513
514static void __pmac 514static void
515pmac_restart(char *cmd) 515pmac_restart(char *cmd)
516{ 516{
517#ifdef CONFIG_ADB_CUDA 517#ifdef CONFIG_ADB_CUDA
@@ -536,7 +536,7 @@ pmac_restart(char *cmd)
536 } 536 }
537} 537}
538 538
539static void __pmac 539static void
540pmac_power_off(void) 540pmac_power_off(void)
541{ 541{
542#ifdef CONFIG_ADB_CUDA 542#ifdef CONFIG_ADB_CUDA
@@ -561,7 +561,7 @@ pmac_power_off(void)
561 } 561 }
562} 562}
563 563
564static void __pmac 564static void
565pmac_halt(void) 565pmac_halt(void)
566{ 566{
567 pmac_power_off(); 567 pmac_power_off();
@@ -661,7 +661,6 @@ pmac_init(unsigned long r3, unsigned long r4, unsigned long r5,
661 ppc_md.setup_arch = pmac_setup_arch; 661 ppc_md.setup_arch = pmac_setup_arch;
662 ppc_md.show_cpuinfo = pmac_show_cpuinfo; 662 ppc_md.show_cpuinfo = pmac_show_cpuinfo;
663 ppc_md.show_percpuinfo = pmac_show_percpuinfo; 663 ppc_md.show_percpuinfo = pmac_show_percpuinfo;
664 ppc_md.irq_canonicalize = NULL;
665 ppc_md.init_IRQ = pmac_pic_init; 664 ppc_md.init_IRQ = pmac_pic_init;
666 ppc_md.get_irq = pmac_get_irq; /* Changed later on ... */ 665 ppc_md.get_irq = pmac_get_irq; /* Changed later on ... */
667 666
diff --git a/arch/ppc/platforms/pmac_sleep.S b/arch/ppc/platforms/pmac_sleep.S
index 88419c77ac43..22b113d19b24 100644
--- a/arch/ppc/platforms/pmac_sleep.S
+++ b/arch/ppc/platforms/pmac_sleep.S
@@ -387,10 +387,10 @@ turn_on_mmu:
387#endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */ 387#endif /* defined(CONFIG_PM) || defined(CONFIG_CPU_FREQ) */
388 388
389 .section .data 389 .section .data
390 .balign L1_CACHE_LINE_SIZE 390 .balign L1_CACHE_BYTES
391sleep_storage: 391sleep_storage:
392 .long 0 392 .long 0
393 .balign L1_CACHE_LINE_SIZE, 0 393 .balign L1_CACHE_BYTES, 0
394 394
395#endif /* CONFIG_6xx */ 395#endif /* CONFIG_6xx */
396 .section .text 396 .section .text
diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c
index 794a23994b82..26ff26238f03 100644
--- a/arch/ppc/platforms/pmac_smp.c
+++ b/arch/ppc/platforms/pmac_smp.c
@@ -186,7 +186,7 @@ static inline void psurge_clr_ipi(int cpu)
186 */ 186 */
187static unsigned long psurge_smp_message[NR_CPUS]; 187static unsigned long psurge_smp_message[NR_CPUS];
188 188
189void __pmac psurge_smp_message_recv(struct pt_regs *regs) 189void psurge_smp_message_recv(struct pt_regs *regs)
190{ 190{
191 int cpu = smp_processor_id(); 191 int cpu = smp_processor_id();
192 int msg; 192 int msg;
@@ -203,14 +203,13 @@ void __pmac psurge_smp_message_recv(struct pt_regs *regs)
203 smp_message_recv(msg, regs); 203 smp_message_recv(msg, regs);
204} 204}
205 205
206irqreturn_t __pmac psurge_primary_intr(int irq, void *d, struct pt_regs *regs) 206irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
207{ 207{
208 psurge_smp_message_recv(regs); 208 psurge_smp_message_recv(regs);
209 return IRQ_HANDLED; 209 return IRQ_HANDLED;
210} 210}
211 211
212static void __pmac smp_psurge_message_pass(int target, int msg, unsigned long data, 212static void smp_psurge_message_pass(int target, int msg)
213 int wait)
214{ 213{
215 int i; 214 int i;
216 215
@@ -629,7 +628,7 @@ void smp_core99_give_timebase(void)
629 628
630 629
631/* PowerSurge-style Macs */ 630/* PowerSurge-style Macs */
632struct smp_ops_t psurge_smp_ops __pmacdata = { 631struct smp_ops_t psurge_smp_ops = {
633 .message_pass = smp_psurge_message_pass, 632 .message_pass = smp_psurge_message_pass,
634 .probe = smp_psurge_probe, 633 .probe = smp_psurge_probe,
635 .kick_cpu = smp_psurge_kick_cpu, 634 .kick_cpu = smp_psurge_kick_cpu,
@@ -639,7 +638,7 @@ struct smp_ops_t psurge_smp_ops __pmacdata = {
639}; 638};
640 639
641/* Core99 Macs (dual G4s) */ 640/* Core99 Macs (dual G4s) */
642struct smp_ops_t core99_smp_ops __pmacdata = { 641struct smp_ops_t core99_smp_ops = {
643 .message_pass = smp_openpic_message_pass, 642 .message_pass = smp_openpic_message_pass,
644 .probe = smp_core99_probe, 643 .probe = smp_core99_probe,
645 .kick_cpu = smp_core99_kick_cpu, 644 .kick_cpu = smp_core99_kick_cpu,
diff --git a/arch/ppc/platforms/pmac_time.c b/arch/ppc/platforms/pmac_time.c
index efb819f9490d..edb9fcc64790 100644
--- a/arch/ppc/platforms/pmac_time.c
+++ b/arch/ppc/platforms/pmac_time.c
@@ -77,7 +77,7 @@ pmac_time_init(void)
77#endif 77#endif
78} 78}
79 79
80unsigned long __pmac 80unsigned long
81pmac_get_rtc_time(void) 81pmac_get_rtc_time(void)
82{ 82{
83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -118,7 +118,7 @@ pmac_get_rtc_time(void)
118 return 0; 118 return 0;
119} 119}
120 120
121int __pmac 121int
122pmac_set_rtc_time(unsigned long nowtime) 122pmac_set_rtc_time(unsigned long nowtime)
123{ 123{
124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -210,7 +210,7 @@ via_calibrate_decr(void)
210/* 210/*
211 * Reset the time after a sleep. 211 * Reset the time after a sleep.
212 */ 212 */
213static int __pmac 213static int
214time_sleep_notify(struct pmu_sleep_notifier *self, int when) 214time_sleep_notify(struct pmu_sleep_notifier *self, int when)
215{ 215{
216 static unsigned long time_diff; 216 static unsigned long time_diff;
@@ -235,7 +235,7 @@ time_sleep_notify(struct pmu_sleep_notifier *self, int when)
235 return PBOOK_SLEEP_OK; 235 return PBOOK_SLEEP_OK;
236} 236}
237 237
238static struct pmu_sleep_notifier time_sleep_notifier __pmacdata = { 238static struct pmu_sleep_notifier time_sleep_notifier = {
239 time_sleep_notify, SLEEP_LEVEL_MISC, 239 time_sleep_notify, SLEEP_LEVEL_MISC,
240}; 240};
241#endif /* CONFIG_PM */ 241#endif /* CONFIG_PM */
diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c
index e70aae20d6f9..22bd40cfb092 100644
--- a/arch/ppc/platforms/pplus.c
+++ b/arch/ppc/platforms/pplus.c
@@ -646,14 +646,6 @@ static void pplus_power_off(void)
646 pplus_halt(); 646 pplus_halt();
647} 647}
648 648
649static unsigned int pplus_irq_canonicalize(u_int irq)
650{
651 if (irq == 2)
652 return 9;
653 else
654 return irq;
655}
656
657static void __init pplus_init_IRQ(void) 649static void __init pplus_init_IRQ(void)
658{ 650{
659 int i; 651 int i;
@@ -673,10 +665,7 @@ static void __init pplus_init_IRQ(void)
673 ppc_md.get_irq = openpic_get_irq; 665 ppc_md.get_irq = openpic_get_irq;
674 } 666 }
675 667
676 for (i = 0; i < NUM_8259_INTERRUPTS; i++) 668 i8259_init(0, 0);
677 irq_desc[i].handler = &i8259_pic;
678
679 i8259_init(0);
680 669
681 if (ppc_md.progress) 670 if (ppc_md.progress)
682 ppc_md.progress("init_irq: exit", 0); 671 ppc_md.progress("init_irq: exit", 0);
@@ -872,10 +861,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
872 ISA_DMA_THRESHOLD = 0x00ffffff; 861 ISA_DMA_THRESHOLD = 0x00ffffff;
873 DMA_MODE_READ = 0x44; 862 DMA_MODE_READ = 0x44;
874 DMA_MODE_WRITE = 0x48; 863 DMA_MODE_WRITE = 0x48;
864 ppc_do_canonicalize_irqs = 1;
875 865
876 ppc_md.setup_arch = pplus_setup_arch; 866 ppc_md.setup_arch = pplus_setup_arch;
877 ppc_md.show_cpuinfo = pplus_show_cpuinfo; 867 ppc_md.show_cpuinfo = pplus_show_cpuinfo;
878 ppc_md.irq_canonicalize = pplus_irq_canonicalize;
879 ppc_md.init_IRQ = pplus_init_IRQ; 868 ppc_md.init_IRQ = pplus_init_IRQ;
880 /* this gets changed later on if we have an OpenPIC -- Cort */ 869 /* this gets changed later on if we have an OpenPIC -- Cort */
881 ppc_md.get_irq = i8259_irq; 870 ppc_md.get_irq = i8259_irq;
@@ -911,6 +900,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
911 ppc_md.kgdb_map_scc = gen550_kgdb_map_scc; 900 ppc_md.kgdb_map_scc = gen550_kgdb_map_scc;
912#endif 901#endif
913#ifdef CONFIG_SMP 902#ifdef CONFIG_SMP
914 ppc_md.smp_ops = &pplus_smp_ops; 903 smp_ops = &pplus_smp_ops;
915#endif /* CONFIG_SMP */ 904#endif /* CONFIG_SMP */
916} 905}
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index 4760cb64251d..e50b9996848c 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -43,7 +43,7 @@ static unsigned long *ProcInfo;
43/* Tables for known hardware */ 43/* Tables for known hardware */
44 44
45/* Motorola PowerStackII - Utah */ 45/* Motorola PowerStackII - Utah */
46static char Utah_pci_IRQ_map[23] __prepdata = 46static char Utah_pci_IRQ_map[23] =
47{ 47{
48 0, /* Slot 0 - unused */ 48 0, /* Slot 0 - unused */
49 0, /* Slot 1 - unused */ 49 0, /* Slot 1 - unused */
@@ -72,7 +72,7 @@ static char Utah_pci_IRQ_map[23] __prepdata =
72 0, /* Slot 22 - unused */ 72 0, /* Slot 22 - unused */
73}; 73};
74 74
75static char Utah_pci_IRQ_routes[] __prepdata = 75static char Utah_pci_IRQ_routes[] =
76{ 76{
77 0, /* Line 0 - Unused */ 77 0, /* Line 0 - Unused */
78 9, /* Line 1 */ 78 9, /* Line 1 */
@@ -84,7 +84,7 @@ static char Utah_pci_IRQ_routes[] __prepdata =
84 84
85/* Motorola PowerStackII - Omaha */ 85/* Motorola PowerStackII - Omaha */
86/* no integrated SCSI or ethernet */ 86/* no integrated SCSI or ethernet */
87static char Omaha_pci_IRQ_map[23] __prepdata = 87static char Omaha_pci_IRQ_map[23] =
88{ 88{
89 0, /* Slot 0 - unused */ 89 0, /* Slot 0 - unused */
90 0, /* Slot 1 - unused */ 90 0, /* Slot 1 - unused */
@@ -111,7 +111,7 @@ static char Omaha_pci_IRQ_map[23] __prepdata =
111 0, 111 0,
112}; 112};
113 113
114static char Omaha_pci_IRQ_routes[] __prepdata = 114static char Omaha_pci_IRQ_routes[] =
115{ 115{
116 0, /* Line 0 - Unused */ 116 0, /* Line 0 - Unused */
117 9, /* Line 1 */ 117 9, /* Line 1 */
@@ -121,7 +121,7 @@ static char Omaha_pci_IRQ_routes[] __prepdata =
121}; 121};
122 122
123/* Motorola PowerStack */ 123/* Motorola PowerStack */
124static char Blackhawk_pci_IRQ_map[19] __prepdata = 124static char Blackhawk_pci_IRQ_map[19] =
125{ 125{
126 0, /* Slot 0 - unused */ 126 0, /* Slot 0 - unused */
127 0, /* Slot 1 - unused */ 127 0, /* Slot 1 - unused */
@@ -144,7 +144,7 @@ static char Blackhawk_pci_IRQ_map[19] __prepdata =
144 3, /* Slot P5 */ 144 3, /* Slot P5 */
145}; 145};
146 146
147static char Blackhawk_pci_IRQ_routes[] __prepdata = 147static char Blackhawk_pci_IRQ_routes[] =
148{ 148{
149 0, /* Line 0 - Unused */ 149 0, /* Line 0 - Unused */
150 9, /* Line 1 */ 150 9, /* Line 1 */
@@ -154,7 +154,7 @@ static char Blackhawk_pci_IRQ_routes[] __prepdata =
154}; 154};
155 155
156/* Motorola Mesquite */ 156/* Motorola Mesquite */
157static char Mesquite_pci_IRQ_map[23] __prepdata = 157static char Mesquite_pci_IRQ_map[23] =
158{ 158{
159 0, /* Slot 0 - unused */ 159 0, /* Slot 0 - unused */
160 0, /* Slot 1 - unused */ 160 0, /* Slot 1 - unused */
@@ -182,7 +182,7 @@ static char Mesquite_pci_IRQ_map[23] __prepdata =
182}; 182};
183 183
184/* Motorola Sitka */ 184/* Motorola Sitka */
185static char Sitka_pci_IRQ_map[21] __prepdata = 185static char Sitka_pci_IRQ_map[21] =
186{ 186{
187 0, /* Slot 0 - unused */ 187 0, /* Slot 0 - unused */
188 0, /* Slot 1 - unused */ 188 0, /* Slot 1 - unused */
@@ -208,7 +208,7 @@ static char Sitka_pci_IRQ_map[21] __prepdata =
208}; 208};
209 209
210/* Motorola MTX */ 210/* Motorola MTX */
211static char MTX_pci_IRQ_map[23] __prepdata = 211static char MTX_pci_IRQ_map[23] =
212{ 212{
213 0, /* Slot 0 - unused */ 213 0, /* Slot 0 - unused */
214 0, /* Slot 1 - unused */ 214 0, /* Slot 1 - unused */
@@ -237,7 +237,7 @@ static char MTX_pci_IRQ_map[23] __prepdata =
237 237
238/* Motorola MTX Plus */ 238/* Motorola MTX Plus */
239/* Secondary bus interrupt routing is not supported yet */ 239/* Secondary bus interrupt routing is not supported yet */
240static char MTXplus_pci_IRQ_map[23] __prepdata = 240static char MTXplus_pci_IRQ_map[23] =
241{ 241{
242 0, /* Slot 0 - unused */ 242 0, /* Slot 0 - unused */
243 0, /* Slot 1 - unused */ 243 0, /* Slot 1 - unused */
@@ -264,13 +264,13 @@ static char MTXplus_pci_IRQ_map[23] __prepdata =
264 0, /* Slot 22 - unused */ 264 0, /* Slot 22 - unused */
265}; 265};
266 266
267static char Raven_pci_IRQ_routes[] __prepdata = 267static char Raven_pci_IRQ_routes[] =
268{ 268{
269 0, /* This is a dummy structure */ 269 0, /* This is a dummy structure */
270}; 270};
271 271
272/* Motorola MVME16xx */ 272/* Motorola MVME16xx */
273static char Genesis_pci_IRQ_map[16] __prepdata = 273static char Genesis_pci_IRQ_map[16] =
274{ 274{
275 0, /* Slot 0 - unused */ 275 0, /* Slot 0 - unused */
276 0, /* Slot 1 - unused */ 276 0, /* Slot 1 - unused */
@@ -290,7 +290,7 @@ static char Genesis_pci_IRQ_map[16] __prepdata =
290 0, /* Slot 15 - unused */ 290 0, /* Slot 15 - unused */
291}; 291};
292 292
293static char Genesis_pci_IRQ_routes[] __prepdata = 293static char Genesis_pci_IRQ_routes[] =
294{ 294{
295 0, /* Line 0 - Unused */ 295 0, /* Line 0 - Unused */
296 10, /* Line 1 */ 296 10, /* Line 1 */
@@ -299,7 +299,7 @@ static char Genesis_pci_IRQ_routes[] __prepdata =
299 15 /* Line 4 */ 299 15 /* Line 4 */
300}; 300};
301 301
302static char Genesis2_pci_IRQ_map[23] __prepdata = 302static char Genesis2_pci_IRQ_map[23] =
303{ 303{
304 0, /* Slot 0 - unused */ 304 0, /* Slot 0 - unused */
305 0, /* Slot 1 - unused */ 305 0, /* Slot 1 - unused */
@@ -327,7 +327,7 @@ static char Genesis2_pci_IRQ_map[23] __prepdata =
327}; 327};
328 328
329/* Motorola Series-E */ 329/* Motorola Series-E */
330static char Comet_pci_IRQ_map[23] __prepdata = 330static char Comet_pci_IRQ_map[23] =
331{ 331{
332 0, /* Slot 0 - unused */ 332 0, /* Slot 0 - unused */
333 0, /* Slot 1 - unused */ 333 0, /* Slot 1 - unused */
@@ -354,7 +354,7 @@ static char Comet_pci_IRQ_map[23] __prepdata =
354 0, 354 0,
355}; 355};
356 356
357static char Comet_pci_IRQ_routes[] __prepdata = 357static char Comet_pci_IRQ_routes[] =
358{ 358{
359 0, /* Line 0 - Unused */ 359 0, /* Line 0 - Unused */
360 10, /* Line 1 */ 360 10, /* Line 1 */
@@ -364,7 +364,7 @@ static char Comet_pci_IRQ_routes[] __prepdata =
364}; 364};
365 365
366/* Motorola Series-EX */ 366/* Motorola Series-EX */
367static char Comet2_pci_IRQ_map[23] __prepdata = 367static char Comet2_pci_IRQ_map[23] =
368{ 368{
369 0, /* Slot 0 - unused */ 369 0, /* Slot 0 - unused */
370 0, /* Slot 1 - unused */ 370 0, /* Slot 1 - unused */
@@ -391,7 +391,7 @@ static char Comet2_pci_IRQ_map[23] __prepdata =
391 0, 391 0,
392}; 392};
393 393
394static char Comet2_pci_IRQ_routes[] __prepdata = 394static char Comet2_pci_IRQ_routes[] =
395{ 395{
396 0, /* Line 0 - Unused */ 396 0, /* Line 0 - Unused */
397 10, /* Line 1 */ 397 10, /* Line 1 */
@@ -405,7 +405,7 @@ static char Comet2_pci_IRQ_routes[] __prepdata =
405 * This is actually based on the Carolina motherboard 405 * This is actually based on the Carolina motherboard
406 * -- Cort 406 * -- Cort
407 */ 407 */
408static char ibm8xx_pci_IRQ_map[23] __prepdata = { 408static char ibm8xx_pci_IRQ_map[23] = {
409 0, /* Slot 0 - unused */ 409 0, /* Slot 0 - unused */
410 0, /* Slot 1 - unused */ 410 0, /* Slot 1 - unused */
411 0, /* Slot 2 - unused */ 411 0, /* Slot 2 - unused */
@@ -431,7 +431,7 @@ static char ibm8xx_pci_IRQ_map[23] __prepdata = {
431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
432}; 432};
433 433
434static char ibm8xx_pci_IRQ_routes[] __prepdata = { 434static char ibm8xx_pci_IRQ_routes[] = {
435 0, /* Line 0 - unused */ 435 0, /* Line 0 - unused */
436 15, /* Line 1 */ 436 15, /* Line 1 */
437 15, /* Line 2 */ 437 15, /* Line 2 */
@@ -443,7 +443,7 @@ static char ibm8xx_pci_IRQ_routes[] __prepdata = {
443 * a 6015 ibm board 443 * a 6015 ibm board
444 * -- Cort 444 * -- Cort
445 */ 445 */
446static char ibm6015_pci_IRQ_map[23] __prepdata = { 446static char ibm6015_pci_IRQ_map[23] = {
447 0, /* Slot 0 - unused */ 447 0, /* Slot 0 - unused */
448 0, /* Slot 1 - unused */ 448 0, /* Slot 1 - unused */
449 0, /* Slot 2 - unused */ 449 0, /* Slot 2 - unused */
@@ -469,7 +469,7 @@ static char ibm6015_pci_IRQ_map[23] __prepdata = {
469 2, /* Slot 22 - */ 469 2, /* Slot 22 - */
470}; 470};
471 471
472static char ibm6015_pci_IRQ_routes[] __prepdata = { 472static char ibm6015_pci_IRQ_routes[] = {
473 0, /* Line 0 - unused */ 473 0, /* Line 0 - unused */
474 13, /* Line 1 */ 474 13, /* Line 1 */
475 15, /* Line 2 */ 475 15, /* Line 2 */
@@ -479,7 +479,7 @@ static char ibm6015_pci_IRQ_routes[] __prepdata = {
479 479
480 480
481/* IBM Nobis and Thinkpad 850 */ 481/* IBM Nobis and Thinkpad 850 */
482static char Nobis_pci_IRQ_map[23] __prepdata ={ 482static char Nobis_pci_IRQ_map[23] ={
483 0, /* Slot 0 - unused */ 483 0, /* Slot 0 - unused */
484 0, /* Slot 1 - unused */ 484 0, /* Slot 1 - unused */
485 0, /* Slot 2 - unused */ 485 0, /* Slot 2 - unused */
@@ -498,7 +498,7 @@ static char Nobis_pci_IRQ_map[23] __prepdata ={
498 0, /* Slot 15 - unused */ 498 0, /* Slot 15 - unused */
499}; 499};
500 500
501static char Nobis_pci_IRQ_routes[] __prepdata = { 501static char Nobis_pci_IRQ_routes[] = {
502 0, /* Line 0 - Unused */ 502 0, /* Line 0 - Unused */
503 13, /* Line 1 */ 503 13, /* Line 1 */
504 13, /* Line 2 */ 504 13, /* Line 2 */
@@ -510,7 +510,7 @@ static char Nobis_pci_IRQ_routes[] __prepdata = {
510 * IBM RS/6000 43p/140 -- paulus 510 * IBM RS/6000 43p/140 -- paulus
511 * XXX we should get all this from the residual data 511 * XXX we should get all this from the residual data
512 */ 512 */
513static char ibm43p_pci_IRQ_map[23] __prepdata = { 513static char ibm43p_pci_IRQ_map[23] = {
514 0, /* Slot 0 - unused */ 514 0, /* Slot 0 - unused */
515 0, /* Slot 1 - unused */ 515 0, /* Slot 1 - unused */
516 0, /* Slot 2 - unused */ 516 0, /* Slot 2 - unused */
@@ -536,7 +536,7 @@ static char ibm43p_pci_IRQ_map[23] __prepdata = {
536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
537}; 537};
538 538
539static char ibm43p_pci_IRQ_routes[] __prepdata = { 539static char ibm43p_pci_IRQ_routes[] = {
540 0, /* Line 0 - unused */ 540 0, /* Line 0 - unused */
541 15, /* Line 1 */ 541 15, /* Line 1 */
542 15, /* Line 2 */ 542 15, /* Line 2 */
@@ -559,7 +559,7 @@ struct powerplus_irq_list
559 * are routed to OpenPIC inputs 5-8. These values are offset by 559 * are routed to OpenPIC inputs 5-8. These values are offset by
560 * 16 in the table to reflect the Linux kernel interrupt value. 560 * 16 in the table to reflect the Linux kernel interrupt value.
561 */ 561 */
562struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata = 562struct powerplus_irq_list Powerplus_pci_IRQ_list =
563{ 563{
564 {25, 26, 27, 28}, 564 {25, 26, 27, 28},
565 {21, 22, 23, 24} 565 {21, 22, 23, 24}
@@ -572,7 +572,7 @@ struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
572 * are routed to OpenPIC inputs 12-15. These values are offset by 572 * are routed to OpenPIC inputs 12-15. These values are offset by
573 * 16 in the table to reflect the Linux kernel interrupt value. 573 * 16 in the table to reflect the Linux kernel interrupt value.
574 */ 574 */
575struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata = 575struct powerplus_irq_list Mesquite_pci_IRQ_list =
576{ 576{
577 {24, 25, 26, 27}, 577 {24, 25, 26, 27},
578 {28, 29, 30, 31} 578 {28, 29, 30, 31}
@@ -582,7 +582,7 @@ struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
582 * This table represents the standard PCI swizzle defined in the 582 * This table represents the standard PCI swizzle defined in the
583 * PCI bus specification. 583 * PCI bus specification.
584 */ 584 */
585static unsigned char prep_pci_intpins[4][4] __prepdata = 585static unsigned char prep_pci_intpins[4][4] =
586{ 586{
587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */ 587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */
588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */ 588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */
@@ -622,7 +622,7 @@ static unsigned char prep_pci_intpins[4][4] __prepdata =
622#define MIN_DEVNR 11 622#define MIN_DEVNR 11
623#define MAX_DEVNR 22 623#define MAX_DEVNR 22
624 624
625static int __prep 625static int
626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
627 int len, u32 *val) 627 int len, u32 *val)
628{ 628{
@@ -652,7 +652,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
652 return PCIBIOS_SUCCESSFUL; 652 return PCIBIOS_SUCCESSFUL;
653} 653}
654 654
655static int __prep 655static int
656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
657 int len, u32 val) 657 int len, u32 val)
658{ 658{
@@ -804,7 +804,7 @@ struct mot_info {
804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */ 804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */
805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */ 805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */ 806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
807} mot_info[] __prepdata = { 807} mot_info[] = {
808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, 808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, 809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00}, 810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00},
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index bc926be95472..067d7d53b81e 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -89,9 +89,6 @@ extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi
89#define cached_21 (((char *)(ppc_cached_irq_mask))[3]) 89#define cached_21 (((char *)(ppc_cached_irq_mask))[3])
90#define cached_A1 (((char *)(ppc_cached_irq_mask))[2]) 90#define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
91 91
92/* for the mac fs */
93dev_t boot_dev;
94
95#ifdef CONFIG_SOUND_CS4232 92#ifdef CONFIG_SOUND_CS4232
96long ppc_cs4232_dma, ppc_cs4232_dma2; 93long ppc_cs4232_dma, ppc_cs4232_dma2;
97#endif 94#endif
@@ -173,7 +170,7 @@ prep_carolina_enable_l2(void)
173} 170}
174 171
175/* cpuinfo code common to all IBM PReP */ 172/* cpuinfo code common to all IBM PReP */
176static void __prep 173static void
177prep_ibm_cpuinfo(struct seq_file *m) 174prep_ibm_cpuinfo(struct seq_file *m)
178{ 175{
179 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 176 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -209,14 +206,14 @@ prep_ibm_cpuinfo(struct seq_file *m)
209 } 206 }
210} 207}
211 208
212static int __prep 209static int
213prep_gen_cpuinfo(struct seq_file *m) 210prep_gen_cpuinfo(struct seq_file *m)
214{ 211{
215 prep_ibm_cpuinfo(m); 212 prep_ibm_cpuinfo(m);
216 return 0; 213 return 0;
217} 214}
218 215
219static int __prep 216static int
220prep_sandalfoot_cpuinfo(struct seq_file *m) 217prep_sandalfoot_cpuinfo(struct seq_file *m)
221{ 218{
222 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 219 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -243,7 +240,7 @@ prep_sandalfoot_cpuinfo(struct seq_file *m)
243 return 0; 240 return 0;
244} 241}
245 242
246static int __prep 243static int
247prep_thinkpad_cpuinfo(struct seq_file *m) 244prep_thinkpad_cpuinfo(struct seq_file *m)
248{ 245{
249 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 246 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -314,7 +311,7 @@ prep_thinkpad_cpuinfo(struct seq_file *m)
314 return 0; 311 return 0;
315} 312}
316 313
317static int __prep 314static int
318prep_carolina_cpuinfo(struct seq_file *m) 315prep_carolina_cpuinfo(struct seq_file *m)
319{ 316{
320 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 317 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -350,7 +347,7 @@ prep_carolina_cpuinfo(struct seq_file *m)
350 return 0; 347 return 0;
351} 348}
352 349
353static int __prep 350static int
354prep_tiger1_cpuinfo(struct seq_file *m) 351prep_tiger1_cpuinfo(struct seq_file *m)
355{ 352{
356 unsigned int l2_reg = inb(PREP_IBM_L2INFO); 353 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
@@ -393,7 +390,7 @@ prep_tiger1_cpuinfo(struct seq_file *m)
393 390
394 391
395/* Used by all Motorola PReP */ 392/* Used by all Motorola PReP */
396static int __prep 393static int
397prep_mot_cpuinfo(struct seq_file *m) 394prep_mot_cpuinfo(struct seq_file *m)
398{ 395{
399 unsigned int cachew = *((unsigned char *)CACHECRBA); 396 unsigned int cachew = *((unsigned char *)CACHECRBA);
@@ -454,7 +451,7 @@ no_l2:
454 return 0; 451 return 0;
455} 452}
456 453
457static void __prep 454static void
458prep_restart(char *cmd) 455prep_restart(char *cmd)
459{ 456{
460#define PREP_SP92 0x92 /* Special Port 92 */ 457#define PREP_SP92 0x92 /* Special Port 92 */
@@ -473,7 +470,7 @@ prep_restart(char *cmd)
473#undef PREP_SP92 470#undef PREP_SP92
474} 471}
475 472
476static void __prep 473static void
477prep_halt(void) 474prep_halt(void)
478{ 475{
479 local_irq_disable(); /* no interrupts */ 476 local_irq_disable(); /* no interrupts */
@@ -488,7 +485,7 @@ prep_halt(void)
488/* Carrera is the power manager in the Thinkpads. Unfortunately not much is 485/* Carrera is the power manager in the Thinkpads. Unfortunately not much is
489 * known about it, so we can't power down. 486 * known about it, so we can't power down.
490 */ 487 */
491static void __prep 488static void
492prep_carrera_poweroff(void) 489prep_carrera_poweroff(void)
493{ 490{
494 prep_halt(); 491 prep_halt();
@@ -501,7 +498,7 @@ prep_carrera_poweroff(void)
501 * somewhat in the IBM Carolina Technical Specification. 498 * somewhat in the IBM Carolina Technical Specification.
502 * -Hollis 499 * -Hollis
503 */ 500 */
504static void __prep 501static void
505utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) 502utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
506{ 503{
507 /* 504 /*
@@ -539,7 +536,7 @@ utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
539 udelay(100); /* important: let controller recover */ 536 udelay(100); /* important: let controller recover */
540} 537}
541 538
542static void __prep 539static void
543prep_sig750_poweroff(void) 540prep_sig750_poweroff(void)
544{ 541{
545 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ 542 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
@@ -554,7 +551,7 @@ prep_sig750_poweroff(void)
554 /* not reached */ 551 /* not reached */
555} 552}
556 553
557static int __prep 554static int
558prep_show_percpuinfo(struct seq_file *m, int i) 555prep_show_percpuinfo(struct seq_file *m, int i)
559{ 556{
560 /* PREP's without residual data will give incorrect values here */ 557 /* PREP's without residual data will give incorrect values here */
@@ -700,12 +697,12 @@ prep_set_bat(void)
700/* 697/*
701 * IBM 3-digit status LED 698 * IBM 3-digit status LED
702 */ 699 */
703static unsigned int ibm_statusled_base __prepdata; 700static unsigned int ibm_statusled_base;
704 701
705static void __prep 702static void
706ibm_statusled_progress(char *s, unsigned short hex); 703ibm_statusled_progress(char *s, unsigned short hex);
707 704
708static int __prep 705static int
709ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, 706ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
710 void * dummy3) 707 void * dummy3)
711{ 708{
@@ -713,13 +710,13 @@ ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
713 return NOTIFY_DONE; 710 return NOTIFY_DONE;
714} 711}
715 712
716static struct notifier_block ibm_statusled_block __prepdata = { 713static struct notifier_block ibm_statusled_block = {
717 ibm_statusled_panic, 714 ibm_statusled_panic,
718 NULL, 715 NULL,
719 INT_MAX /* try to do it first */ 716 INT_MAX /* try to do it first */
720}; 717};
721 718
722static void __prep 719static void
723ibm_statusled_progress(char *s, unsigned short hex) 720ibm_statusled_progress(char *s, unsigned short hex)
724{ 721{
725 static int notifier_installed; 722 static int notifier_installed;
@@ -945,19 +942,6 @@ prep_calibrate_decr(void)
945 todc_calibrate_decr(); 942 todc_calibrate_decr();
946} 943}
947 944
948static unsigned int __prep
949prep_irq_canonicalize(u_int irq)
950{
951 if (irq == 2)
952 {
953 return 9;
954 }
955 else
956 {
957 return irq;
958 }
959}
960
961static void __init 945static void __init
962prep_init_IRQ(void) 946prep_init_IRQ(void)
963{ 947{
@@ -970,11 +954,9 @@ prep_init_IRQ(void)
970 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade", 954 openpic_hookup_cascade(NUM_8259_INTERRUPTS, "82c59 cascade",
971 i8259_irq); 955 i8259_irq);
972 } 956 }
973 for ( i = 0 ; i < NUM_8259_INTERRUPTS ; i++ )
974 irq_desc[i].handler = &i8259_pic;
975 957
976 if (have_residual_data) { 958 if (have_residual_data) {
977 i8259_init(residual_isapic_addr()); 959 i8259_init(residual_isapic_addr(), 0);
978 return; 960 return;
979 } 961 }
980 962
@@ -985,18 +967,18 @@ prep_init_IRQ(void)
985 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA) 967 if (((pci_viddid & 0xffff) == PCI_VENDOR_ID_MOTOROLA)
986 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN) 968 && ((pci_did == PCI_DEVICE_ID_MOTOROLA_RAVEN)
987 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK))) 969 || (pci_did == PCI_DEVICE_ID_MOTOROLA_HAWK)))
988 i8259_init(0); 970 i8259_init(0, 0);
989 else 971 else
990 /* PCI interrupt ack address given in section 6.1.8 of the 972 /* PCI interrupt ack address given in section 6.1.8 of the
991 * PReP specification. */ 973 * PReP specification. */
992 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR); 974 i8259_init(MPC10X_MAPA_PCI_INTACK_ADDR, 0);
993} 975}
994 976
995#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE) 977#if defined(CONFIG_BLK_DEV_IDE) || defined(CONFIG_BLK_DEV_IDE_MODULE)
996/* 978/*
997 * IDE stuff. 979 * IDE stuff.
998 */ 980 */
999static int __prep 981static int
1000prep_ide_default_irq(unsigned long base) 982prep_ide_default_irq(unsigned long base)
1001{ 983{
1002 switch (base) { 984 switch (base) {
@@ -1010,7 +992,7 @@ prep_ide_default_irq(unsigned long base)
1010 } 992 }
1011} 993}
1012 994
1013static unsigned long __prep 995static unsigned long
1014prep_ide_default_io_base(int index) 996prep_ide_default_io_base(int index)
1015{ 997{
1016 switch (index) { 998 switch (index) {
@@ -1055,7 +1037,7 @@ smp_prep_setup_cpu(int cpu_nr)
1055 do_openpic_setup_cpu(); 1037 do_openpic_setup_cpu();
1056} 1038}
1057 1039
1058static struct smp_ops_t prep_smp_ops __prepdata = { 1040static struct smp_ops_t prep_smp_ops = {
1059 smp_openpic_message_pass, 1041 smp_openpic_message_pass,
1060 smp_prep_probe, 1042 smp_prep_probe,
1061 smp_prep_kick_cpu, 1043 smp_prep_kick_cpu,
@@ -1113,6 +1095,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1113 ISA_DMA_THRESHOLD = 0x00ffffff; 1095 ISA_DMA_THRESHOLD = 0x00ffffff;
1114 DMA_MODE_READ = 0x44; 1096 DMA_MODE_READ = 0x44;
1115 DMA_MODE_WRITE = 0x48; 1097 DMA_MODE_WRITE = 0x48;
1098 ppc_do_canonicalize_irqs = 1;
1116 1099
1117 /* figure out what kind of prep workstation we are */ 1100 /* figure out what kind of prep workstation we are */
1118 if (have_residual_data) { 1101 if (have_residual_data) {
@@ -1139,7 +1122,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1139 ppc_md.setup_arch = prep_setup_arch; 1122 ppc_md.setup_arch = prep_setup_arch;
1140 ppc_md.show_percpuinfo = prep_show_percpuinfo; 1123 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1141 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */ 1124 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1142 ppc_md.irq_canonicalize = prep_irq_canonicalize;
1143 ppc_md.init_IRQ = prep_init_IRQ; 1125 ppc_md.init_IRQ = prep_init_IRQ;
1144 /* this gets changed later on if we have an OpenPIC -- Cort */ 1126 /* this gets changed later on if we have an OpenPIC -- Cort */
1145 ppc_md.get_irq = i8259_irq; 1127 ppc_md.get_irq = i8259_irq;
@@ -1176,6 +1158,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1176#endif 1158#endif
1177 1159
1178#ifdef CONFIG_SMP 1160#ifdef CONFIG_SMP
1179 ppc_md.smp_ops = &prep_smp_ops; 1161 smp_ops = &prep_smp_ops;
1180#endif /* CONFIG_SMP */ 1162#endif /* CONFIG_SMP */
1181} 1163}
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 0376c8cff5d1..6f97911c330d 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -514,13 +514,9 @@ static void __init ppc7d_init_irq(void)
514 int irq; 514 int irq;
515 515
516 pr_debug("%s\n", __FUNCTION__); 516 pr_debug("%s\n", __FUNCTION__);
517 i8259_init(0); 517 i8259_init(0, 0);
518 mv64360_init_irq(); 518 mv64360_init_irq();
519 519
520 /* IRQ 0..15 are handled by the cascaded 8259's of the Ali1535 */
521 for (irq = 0; irq < 16; irq++) {
522 irq_desc[irq].handler = &i8259_pic;
523 }
524 /* IRQs 5,6,9,10,11,14,15 are level sensitive */ 520 /* IRQs 5,6,9,10,11,14,15 are level sensitive */
525 irq_desc[5].status |= IRQ_LEVEL; 521 irq_desc[5].status |= IRQ_LEVEL;
526 irq_desc[6].status |= IRQ_LEVEL; 522 irq_desc[6].status |= IRQ_LEVEL;
@@ -1183,18 +1179,18 @@ static void __init ppc7d_setup_arch(void)
1183 ROOT_DEV = Root_HDA1; 1179 ROOT_DEV = Root_HDA1;
1184#endif 1180#endif
1185 1181
1186 if ((cur_cpu_spec[0]->cpu_features & CPU_FTR_SPEC7450) || 1182 if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) ||
1187 (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR)) 1183 (cur_cpu_spec->cpu_features & CPU_FTR_L3CR))
1188 /* 745x is different. We only want to pass along enable. */ 1184 /* 745x is different. We only want to pass along enable. */
1189 _set_L2CR(L2CR_L2E); 1185 _set_L2CR(L2CR_L2E);
1190 else if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L2CR) 1186 else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR)
1191 /* All modules have 1MB of L2. We also assume that an 1187 /* All modules have 1MB of L2. We also assume that an
1192 * L2 divisor of 3 will work. 1188 * L2 divisor of 3 will work.
1193 */ 1189 */
1194 _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3 1190 _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3
1195 | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF); 1191 | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);
1196 1192
1197 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR) 1193 if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)
1198 /* No L3 cache */ 1194 /* No L3 cache */
1199 _set_L3CR(0); 1195 _set_L3CR(0);
1200 1196
@@ -1424,6 +1420,7 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
1424 ppc_md.setup_arch = ppc7d_setup_arch; 1420 ppc_md.setup_arch = ppc7d_setup_arch;
1425 ppc_md.init = ppc7d_init2; 1421 ppc_md.init = ppc7d_init2;
1426 ppc_md.show_cpuinfo = ppc7d_show_cpuinfo; 1422 ppc_md.show_cpuinfo = ppc7d_show_cpuinfo;
1423 /* XXX this is broken... */
1427 ppc_md.irq_canonicalize = ppc7d_irq_canonicalize; 1424 ppc_md.irq_canonicalize = ppc7d_irq_canonicalize;
1428 ppc_md.init_IRQ = ppc7d_init_irq; 1425 ppc_md.init_IRQ = ppc7d_init_irq;
1429 ppc_md.get_irq = ppc7d_get_irq; 1426 ppc_md.get_irq = ppc7d_get_irq;
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 0f84ca603612..c9911601cfdf 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -47,7 +47,7 @@
47#include <asm/ide.h> 47#include <asm/ide.h>
48 48
49 49
50unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,}; 50unsigned char __res[sizeof(RESIDUAL)] = {0,};
51RESIDUAL *res = (RESIDUAL *)&__res; 51RESIDUAL *res = (RESIDUAL *)&__res;
52 52
53char * PnP_BASE_TYPES[] __initdata = { 53char * PnP_BASE_TYPES[] __initdata = {
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index 5232283c1974..9eeed3572309 100644
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -494,27 +494,10 @@ sandpoint_init_IRQ(void)
494 i8259_irq); 494 i8259_irq);
495 495
496 /* 496 /*
497 * openpic_init() has set up irq_desc[16-31] to be openpic
498 * interrupts. We need to set irq_desc[0-15] to be i8259
499 * interrupts.
500 */
501 for(i=0; i < NUM_8259_INTERRUPTS; i++)
502 irq_desc[i].handler = &i8259_pic;
503
504 /*
505 * The EPIC allows for a read in the range of 0xFEF00000 -> 497 * The EPIC allows for a read in the range of 0xFEF00000 ->
506 * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction. 498 * 0xFEFFFFFF to generate a PCI interrupt-acknowledge transaction.
507 */ 499 */
508 i8259_init(0xfef00000); 500 i8259_init(0xfef00000, 0);
509}
510
511static u32
512sandpoint_irq_canonicalize(u32 irq)
513{
514 if (irq == 2)
515 return 9;
516 else
517 return irq;
518} 501}
519 502
520static unsigned long __init 503static unsigned long __init
@@ -727,10 +710,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
727 ISA_DMA_THRESHOLD = 0x00ffffff; 710 ISA_DMA_THRESHOLD = 0x00ffffff;
728 DMA_MODE_READ = 0x44; 711 DMA_MODE_READ = 0x44;
729 DMA_MODE_WRITE = 0x48; 712 DMA_MODE_WRITE = 0x48;
713 ppc_do_canonicalize_irqs = 1;
730 714
731 ppc_md.setup_arch = sandpoint_setup_arch; 715 ppc_md.setup_arch = sandpoint_setup_arch;
732 ppc_md.show_cpuinfo = sandpoint_show_cpuinfo; 716 ppc_md.show_cpuinfo = sandpoint_show_cpuinfo;
733 ppc_md.irq_canonicalize = sandpoint_irq_canonicalize;
734 ppc_md.init_IRQ = sandpoint_init_IRQ; 717 ppc_md.init_IRQ = sandpoint_init_IRQ;
735 ppc_md.get_irq = openpic_get_irq; 718 ppc_md.get_irq = openpic_get_irq;
736 719
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index b8d08f33f7ee..b4ef15b45c4a 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -31,52 +31,49 @@ obj-$(CONFIG_GEN_RTC) += todc_time.o
31obj-$(CONFIG_PPC4xx_DMA) += ppc4xx_dma.o 31obj-$(CONFIG_PPC4xx_DMA) += ppc4xx_dma.o
32obj-$(CONFIG_PPC4xx_EDMA) += ppc4xx_sgdma.o 32obj-$(CONFIG_PPC4xx_EDMA) += ppc4xx_sgdma.o
33ifeq ($(CONFIG_40x),y) 33ifeq ($(CONFIG_40x),y)
34obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o ppc405_pci.o 34obj-$(CONFIG_PCI) += pci_auto.o ppc405_pci.o
35endif 35endif
36endif 36endif
37obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \ 37obj-$(CONFIG_8xx) += m8xx_setup.o ppc8xx_pic.o $(wdt-mpc8xx-y) \
38 ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o 38 ppc_sys.o mpc8xx_devices.o mpc8xx_sys.o
39ifeq ($(CONFIG_8xx),y) 39obj-$(CONFIG_PCI_QSPAN) += qspan_pci.o
40obj-$(CONFIG_PCI) += qspan_pci.o i8259.o 40obj-$(CONFIG_PPC_OF) += prom_init.o prom.o
41endif 41obj-$(CONFIG_PPC_PMAC) += open_pic.o
42obj-$(CONFIG_PPC_OF) += prom_init.o prom.o of_device.o
43obj-$(CONFIG_PPC_PMAC) += open_pic.o indirect_pci.o
44obj-$(CONFIG_POWER4) += open_pic2.o 42obj-$(CONFIG_POWER4) += open_pic2.o
45obj-$(CONFIG_PPC_CHRP) += open_pic.o indirect_pci.o i8259.o 43obj-$(CONFIG_PPC_CHRP) += open_pic.o
46obj-$(CONFIG_PPC_PREP) += open_pic.o indirect_pci.o i8259.o todc_time.o 44obj-$(CONFIG_PPC_PREP) += open_pic.o todc_time.o
47obj-$(CONFIG_BAMBOO) += indirect_pci.o pci_auto.o todc_time.o 45obj-$(CONFIG_BAMBOO) += pci_auto.o todc_time.o
48obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o 46obj-$(CONFIG_CPCI690) += todc_time.o pci_auto.o
49obj-$(CONFIG_EBONY) += indirect_pci.o pci_auto.o todc_time.o 47obj-$(CONFIG_EBONY) += pci_auto.o todc_time.o
50obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o 48obj-$(CONFIG_EV64260) += todc_time.o pci_auto.o
51obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o 49obj-$(CONFIG_CHESTNUT) += mv64360_pic.o pci_auto.o
52obj-$(CONFIG_GEMINI) += open_pic.o indirect_pci.o 50obj-$(CONFIG_GEMINI) += open_pic.o
53obj-$(CONFIG_GT64260) += gt64260_pic.o 51obj-$(CONFIG_GT64260) += gt64260_pic.o
54obj-$(CONFIG_LOPEC) += i8259.o pci_auto.o todc_time.o 52obj-$(CONFIG_LOPEC) += pci_auto.o todc_time.o
55obj-$(CONFIG_HDPU) += pci_auto.o 53obj-$(CONFIG_HDPU) += pci_auto.o
56obj-$(CONFIG_LUAN) += indirect_pci.o pci_auto.o todc_time.o 54obj-$(CONFIG_LUAN) += pci_auto.o todc_time.o
57obj-$(CONFIG_KATANA) += pci_auto.o 55obj-$(CONFIG_KATANA) += pci_auto.o
58obj-$(CONFIG_MV64360) += mv64360_pic.o 56obj-$(CONFIG_MV64360) += mv64360_pic.o
59obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o indirect_pci.o 57obj-$(CONFIG_MV64X60) += mv64x60.o mv64x60_win.o
60obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o indirect_pci.o \ 58obj-$(CONFIG_MVME5100) += open_pic.o todc_time.o \
61 pci_auto.o hawk_common.o 59 pci_auto.o hawk_common.o
62obj-$(CONFIG_MVME5100_IPMC761_PRESENT) += i8259.o 60obj-$(CONFIG_OCOTEA) += pci_auto.o todc_time.o
63obj-$(CONFIG_OCOTEA) += indirect_pci.o pci_auto.o todc_time.o
64obj-$(CONFIG_PAL4) += cpc700_pic.o 61obj-$(CONFIG_PAL4) += cpc700_pic.o
65obj-$(CONFIG_POWERPMC250) += pci_auto.o 62obj-$(CONFIG_POWERPMC250) += pci_auto.o
66obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o i8259.o \ 63obj-$(CONFIG_PPLUS) += hawk_common.o open_pic.o \
67 indirect_pci.o todc_time.o pci_auto.o 64 todc_time.o pci_auto.o
68obj-$(CONFIG_PRPMC750) += open_pic.o indirect_pci.o pci_auto.o \ 65obj-$(CONFIG_PRPMC750) += open_pic.o pci_auto.o \
69 hawk_common.o 66 hawk_common.o
70obj-$(CONFIG_HARRIER) += harrier.o 67obj-$(CONFIG_HARRIER) += harrier.o
71obj-$(CONFIG_PRPMC800) += open_pic.o indirect_pci.o pci_auto.o 68obj-$(CONFIG_PRPMC800) += open_pic.o pci_auto.o
72obj-$(CONFIG_RADSTONE_PPC7D) += i8259.o pci_auto.o 69obj-$(CONFIG_RADSTONE_PPC7D) += pci_auto.o
73obj-$(CONFIG_SANDPOINT) += i8259.o pci_auto.o todc_time.o 70obj-$(CONFIG_SANDPOINT) += pci_auto.o todc_time.o
74obj-$(CONFIG_SBC82xx) += todc_time.o 71obj-$(CONFIG_SBC82xx) += todc_time.o
75obj-$(CONFIG_SPRUCE) += cpc700_pic.o indirect_pci.o pci_auto.o \ 72obj-$(CONFIG_SPRUCE) += cpc700_pic.o pci_auto.o \
76 todc_time.o 73 todc_time.o
77obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \ 74obj-$(CONFIG_8260) += m8260_setup.o pq2_devices.o pq2_sys.o \
78 ppc_sys.o 75 ppc_sys.o
79obj-$(CONFIG_PCI_8260) += m82xx_pci.o indirect_pci.o pci_auto.o 76obj-$(CONFIG_PCI_8260) += m82xx_pci.o pci_auto.o
80obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o 77obj-$(CONFIG_8260_PCI9) += m8260_pci_erratum9.o
81obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o 78obj-$(CONFIG_CPM2) += cpm2_common.o cpm2_pic.o
82ifeq ($(CONFIG_PPC_GEN550),y) 79ifeq ($(CONFIG_PPC_GEN550),y)
@@ -87,20 +84,18 @@ ifeq ($(CONFIG_SERIAL_MPSC_CONSOLE),y)
87obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o 84obj-$(CONFIG_SERIAL_TEXT_DEBUG) += mv64x60_dbg.o
88endif 85endif
89obj-$(CONFIG_BOOTX_TEXT) += btext.o 86obj-$(CONFIG_BOOTX_TEXT) += btext.o
90obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o indirect_pci.o ppc_sys.o 87obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o
91obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o 88obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
92obj-$(CONFIG_40x) += dcr.o
93obj-$(CONFIG_BOOKE) += dcr.o
94obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \ 89obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
95 ppc_sys.o i8259.o mpc85xx_sys.o \ 90 ppc_sys.o mpc85xx_sys.o \
96 mpc85xx_devices.o 91 mpc85xx_devices.o
97ifeq ($(CONFIG_85xx),y) 92ifeq ($(CONFIG_85xx),y)
98obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o 93obj-$(CONFIG_PCI) += pci_auto.o
99endif 94endif
100obj-$(CONFIG_83xx) += ipic.o ppc83xx_setup.o ppc_sys.o \ 95obj-$(CONFIG_83xx) += ipic.o ppc83xx_setup.o ppc_sys.o \
101 mpc83xx_sys.o mpc83xx_devices.o 96 mpc83xx_sys.o mpc83xx_devices.o
102ifeq ($(CONFIG_83xx),y) 97ifeq ($(CONFIG_83xx),y)
103obj-$(CONFIG_PCI) += indirect_pci.o pci_auto.o 98obj-$(CONFIG_PCI) += pci_auto.o
104endif 99endif
105obj-$(CONFIG_MPC8548_CDS) += todc_time.o 100obj-$(CONFIG_MPC8548_CDS) += todc_time.o
106obj-$(CONFIG_MPC8555_CDS) += todc_time.o 101obj-$(CONFIG_MPC8555_CDS) += todc_time.o
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
index 7734f6836174..12fa83e6774a 100644
--- a/arch/ppc/syslib/btext.c
+++ b/arch/ppc/syslib/btext.c
@@ -53,8 +53,8 @@ extern char *klimit;
53 * chrp only uses it during early boot. 53 * chrp only uses it during early boot.
54 */ 54 */
55#ifdef CONFIG_XMON 55#ifdef CONFIG_XMON
56#define BTEXT __pmac 56#define BTEXT
57#define BTDATA __pmacdata 57#define BTDATA
58#else 58#else
59#define BTEXT __init 59#define BTEXT __init
60#define BTDATA __initdata 60#define BTDATA __initdata
@@ -187,7 +187,7 @@ btext_setup_display(int width, int height, int depth, int pitch,
187 * changes. 187 * changes.
188 */ 188 */
189 189
190void __openfirmware 190void
191map_boot_text(void) 191map_boot_text(void)
192{ 192{
193 unsigned long base, offset, size; 193 unsigned long base, offset, size;
diff --git a/arch/ppc/syslib/dcr.S b/arch/ppc/syslib/dcr.S
deleted file mode 100644
index 895f10243a43..000000000000
--- a/arch/ppc/syslib/dcr.S
+++ /dev/null
@@ -1,41 +0,0 @@
1/*
2 * arch/ppc/syslib/dcr.S
3 *
4 * "Indirect" DCR access
5 *
6 * Copyright (c) 2004 Eugene Surovegin <ebs@ebshome.net>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <asm/ppc_asm.h>
15#include <asm/processor.h>
16
17#define DCR_ACCESS_PROLOG(table) \
18 rlwinm r3,r3,4,18,27; \
19 lis r5,table@h; \
20 ori r5,r5,table@l; \
21 add r3,r3,r5; \
22 mtctr r3; \
23 bctr
24
25_GLOBAL(__mfdcr)
26 DCR_ACCESS_PROLOG(__mfdcr_table)
27
28_GLOBAL(__mtdcr)
29 DCR_ACCESS_PROLOG(__mtdcr_table)
30
31__mfdcr_table:
32 mfdcr r3,0; blr
33__mtdcr_table:
34 mtdcr 0,r4; blr
35
36dcr = 1
37 .rept 1023
38 mfdcr r3,dcr; blr
39 mtdcr dcr,r4; blr
40 dcr = dcr + 1
41 .endr
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index 44aa87385451..f97b3a9abd1e 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -45,6 +45,7 @@
45#include <asm/system.h> 45#include <asm/system.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/mv64x60.h> 47#include <asm/mv64x60.h>
48#include <asm/machdep.h>
48 49
49#define CPU_INTR_STR "gt64260 cpu interface error" 50#define CPU_INTR_STR "gt64260 cpu interface error"
50#define PCI0_INTR_STR "gt64260 pci 0 error" 51#define PCI0_INTR_STR "gt64260 pci 0 error"
diff --git a/arch/ppc/syslib/i8259.c b/arch/ppc/syslib/i8259.c
deleted file mode 100644
index 5c7908c20e43..000000000000
--- a/arch/ppc/syslib/i8259.c
+++ /dev/null
@@ -1,208 +0,0 @@
1#include <linux/init.h>
2#include <linux/ioport.h>
3#include <linux/interrupt.h>
4#include <asm/io.h>
5#include <asm/i8259.h>
6
7static volatile unsigned char *pci_intack; /* RO, gives us the irq vector */
8
9unsigned char cached_8259[2] = { 0xff, 0xff };
10#define cached_A1 (cached_8259[0])
11#define cached_21 (cached_8259[1])
12
13static DEFINE_SPINLOCK(i8259_lock);
14
15int i8259_pic_irq_offset;
16
17/*
18 * Acknowledge the IRQ using either the PCI host bridge's interrupt
19 * acknowledge feature or poll. How i8259_init() is called determines
20 * which is called. It should be noted that polling is broken on some
21 * IBM and Motorola PReP boxes so we must use the int-ack feature on them.
22 */
23int
24i8259_irq(struct pt_regs *regs)
25{
26 int irq;
27
28 spin_lock(&i8259_lock);
29
30 /* Either int-ack or poll for the IRQ */
31 if (pci_intack)
32 irq = *pci_intack;
33 else {
34 /* Perform an interrupt acknowledge cycle on controller 1. */
35 outb(0x0C, 0x20); /* prepare for poll */
36 irq = inb(0x20) & 7;
37 if (irq == 2 ) {
38 /*
39 * Interrupt is cascaded so perform interrupt
40 * acknowledge on controller 2.
41 */
42 outb(0x0C, 0xA0); /* prepare for poll */
43 irq = (inb(0xA0) & 7) + 8;
44 }
45 }
46
47 if (irq == 7) {
48 /*
49 * This may be a spurious interrupt.
50 *
51 * Read the interrupt status register (ISR). If the most
52 * significant bit is not set then there is no valid
53 * interrupt.
54 */
55 if (!pci_intack)
56 outb(0x0B, 0x20); /* ISR register */
57 if(~inb(0x20) & 0x80)
58 irq = -1;
59 }
60
61 spin_unlock(&i8259_lock);
62 return irq;
63}
64
65static void i8259_mask_and_ack_irq(unsigned int irq_nr)
66{
67 unsigned long flags;
68
69 spin_lock_irqsave(&i8259_lock, flags);
70 if ( irq_nr >= i8259_pic_irq_offset )
71 irq_nr -= i8259_pic_irq_offset;
72
73 if (irq_nr > 7) {
74 cached_A1 |= 1 << (irq_nr-8);
75 inb(0xA1); /* DUMMY */
76 outb(cached_A1,0xA1);
77 outb(0x20,0xA0); /* Non-specific EOI */
78 outb(0x20,0x20); /* Non-specific EOI to cascade */
79 } else {
80 cached_21 |= 1 << irq_nr;
81 inb(0x21); /* DUMMY */
82 outb(cached_21,0x21);
83 outb(0x20,0x20); /* Non-specific EOI */
84 }
85 spin_unlock_irqrestore(&i8259_lock, flags);
86}
87
88static void i8259_set_irq_mask(int irq_nr)
89{
90 outb(cached_A1,0xA1);
91 outb(cached_21,0x21);
92}
93
94static void i8259_mask_irq(unsigned int irq_nr)
95{
96 unsigned long flags;
97
98 spin_lock_irqsave(&i8259_lock, flags);
99 if ( irq_nr >= i8259_pic_irq_offset )
100 irq_nr -= i8259_pic_irq_offset;
101 if ( irq_nr < 8 )
102 cached_21 |= 1 << irq_nr;
103 else
104 cached_A1 |= 1 << (irq_nr-8);
105 i8259_set_irq_mask(irq_nr);
106 spin_unlock_irqrestore(&i8259_lock, flags);
107}
108
109static void i8259_unmask_irq(unsigned int irq_nr)
110{
111 unsigned long flags;
112
113 spin_lock_irqsave(&i8259_lock, flags);
114 if ( irq_nr >= i8259_pic_irq_offset )
115 irq_nr -= i8259_pic_irq_offset;
116 if ( irq_nr < 8 )
117 cached_21 &= ~(1 << irq_nr);
118 else
119 cached_A1 &= ~(1 << (irq_nr-8));
120 i8259_set_irq_mask(irq_nr);
121 spin_unlock_irqrestore(&i8259_lock, flags);
122}
123
124static void i8259_end_irq(unsigned int irq)
125{
126 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS))
127 && irq_desc[irq].action)
128 i8259_unmask_irq(irq);
129}
130
131struct hw_interrupt_type i8259_pic = {
132 .typename = " i8259 ",
133 .enable = i8259_unmask_irq,
134 .disable = i8259_mask_irq,
135 .ack = i8259_mask_and_ack_irq,
136 .end = i8259_end_irq,
137};
138
139static struct resource pic1_iores = {
140 .name = "8259 (master)",
141 .start = 0x20,
142 .end = 0x21,
143 .flags = IORESOURCE_BUSY,
144};
145
146static struct resource pic2_iores = {
147 .name = "8259 (slave)",
148 .start = 0xa0,
149 .end = 0xa1,
150 .flags = IORESOURCE_BUSY,
151};
152
153static struct resource pic_edgectrl_iores = {
154 .name = "8259 edge control",
155 .start = 0x4d0,
156 .end = 0x4d1,
157 .flags = IORESOURCE_BUSY,
158};
159
160static struct irqaction i8259_irqaction = {
161 .handler = no_action,
162 .flags = SA_INTERRUPT,
163 .mask = CPU_MASK_NONE,
164 .name = "82c59 secondary cascade",
165};
166
167/*
168 * i8259_init()
169 * intack_addr - PCI interrupt acknowledge (real) address which will return
170 * the active irq from the 8259
171 */
172void __init
173i8259_init(long intack_addr)
174{
175 unsigned long flags;
176
177 spin_lock_irqsave(&i8259_lock, flags);
178 /* init master interrupt controller */
179 outb(0x11, 0x20); /* Start init sequence */
180 outb(0x00, 0x21); /* Vector base */
181 outb(0x04, 0x21); /* edge tiggered, Cascade (slave) on IRQ2 */
182 outb(0x01, 0x21); /* Select 8086 mode */
183
184 /* init slave interrupt controller */
185 outb(0x11, 0xA0); /* Start init sequence */
186 outb(0x08, 0xA1); /* Vector base */
187 outb(0x02, 0xA1); /* edge triggered, Cascade (slave) on IRQ2 */
188 outb(0x01, 0xA1); /* Select 8086 mode */
189
190 /* always read ISR */
191 outb(0x0B, 0x20);
192 outb(0x0B, 0xA0);
193
194 /* Mask all interrupts */
195 outb(cached_A1, 0xA1);
196 outb(cached_21, 0x21);
197
198 spin_unlock_irqrestore(&i8259_lock, flags);
199
200 /* reserve our resources */
201 setup_irq( i8259_pic_irq_offset + 2, &i8259_irqaction);
202 request_resource(&ioport_resource, &pic1_iores);
203 request_resource(&ioport_resource, &pic2_iores);
204 request_resource(&ioport_resource, &pic_edgectrl_iores);
205
206 if (intack_addr != 0)
207 pci_intack = ioremap(intack_addr, 1);
208}
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index 0bb919859b8b..c36db279b43d 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -236,9 +236,9 @@ void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p)
236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C, 236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
237 enable it on all other revisions 237 enable it on all other revisions
238 */ 238 */
239 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 || 239 if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 ||
240 strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0 240 strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0
241 || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C") 241 || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C")
242 == 0 && p->cpu > 667000000)) 242 == 0 && p->cpu > 667000000))
243 ibm440gx_l2c_disable(); 243 ibm440gx_l2c_disable();
244 else 244 else
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
index 7612e0623f99..5152c8e41340 100644
--- a/arch/ppc/syslib/ibm44x_common.c
+++ b/arch/ppc/syslib/ibm44x_common.c
@@ -27,9 +27,14 @@
27#include <asm/time.h> 27#include <asm/time.h>
28#include <asm/ppc4xx_pic.h> 28#include <asm/ppc4xx_pic.h>
29#include <asm/param.h> 29#include <asm/param.h>
30#include <asm/bootinfo.h>
31#include <asm/ppcboot.h>
30 32
31#include <syslib/gen550.h> 33#include <syslib/gen550.h>
32 34
35/* Global Variables */
36bd_t __res;
37
33phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size) 38phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
34{ 39{
35 phys_addr_t page_4gb = 0; 40 phys_addr_t page_4gb = 0;
@@ -150,8 +155,36 @@ static unsigned long __init ibm44x_find_end_of_memory(void)
150 return mem_size; 155 return mem_size;
151} 156}
152 157
153void __init ibm44x_platform_init(void) 158void __init ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
159 unsigned long r6, unsigned long r7)
154{ 160{
161 parse_bootinfo(find_bootinfo());
162
163 /*
164 * If we were passed in a board information, copy it into the
165 * residual data area.
166 */
167 if (r3)
168 __res = *(bd_t *)(r3 + KERNELBASE);
169
170#if defined(CONFIG_BLK_DEV_INITRD)
171 /*
172 * If the init RAM disk has been configured in, and there's a valid
173 * starting address for it, set it up.
174 */
175 if (r4) {
176 initrd_start = r4 + KERNELBASE;
177 initrd_end = r5 + KERNELBASE;
178 }
179#endif /* CONFIG_BLK_DEV_INITRD */
180
181 /* Copy the kernel command line arguments to a safe place. */
182
183 if (r6) {
184 *(char *) (r7 + KERNELBASE) = 0;
185 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
186 }
187
155 ppc_md.init_IRQ = ppc4xx_pic_init; 188 ppc_md.init_IRQ = ppc4xx_pic_init;
156 ppc_md.find_end_of_memory = ibm44x_find_end_of_memory; 189 ppc_md.find_end_of_memory = ibm44x_find_end_of_memory;
157 ppc_md.restart = ibm44x_restart; 190 ppc_md.restart = ibm44x_restart;
@@ -178,7 +211,7 @@ void __init ibm44x_platform_init(void)
178#endif 211#endif
179} 212}
180 213
181/* Called from MachineCheckException */ 214/* Called from machine_check_exception */
182void platform_machine_check(struct pt_regs *regs) 215void platform_machine_check(struct pt_regs *regs)
183{ 216{
184 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n", 217 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
diff --git a/arch/ppc/syslib/ibm44x_common.h b/arch/ppc/syslib/ibm44x_common.h
index c16b6a5ac6ab..b25a8995e4e9 100644
--- a/arch/ppc/syslib/ibm44x_common.h
+++ b/arch/ppc/syslib/ibm44x_common.h
@@ -36,7 +36,8 @@ struct ibm44x_clocks {
36}; 36};
37 37
38/* common 44x platform init */ 38/* common 44x platform init */
39void ibm44x_platform_init(void) __init; 39void ibm44x_platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
40 unsigned long r6, unsigned long r7) __init;
40 41
41/* initialize decrementer and tick-related variables */ 42/* initialize decrementer and tick-related variables */
42void ibm44x_calibrate_decr(unsigned int freq) __init; 43void ibm44x_calibrate_decr(unsigned int freq) __init;
diff --git a/arch/ppc/syslib/indirect_pci.c b/arch/ppc/syslib/indirect_pci.c
deleted file mode 100644
index e71488469704..000000000000
--- a/arch/ppc/syslib/indirect_pci.c
+++ /dev/null
@@ -1,134 +0,0 @@
1/*
2 * Support for indirect PCI bridges.
3 *
4 * Copyright (C) 1998 Gabriel Paubert.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <linux/kernel.h>
13#include <linux/pci.h>
14#include <linux/delay.h>
15#include <linux/string.h>
16#include <linux/init.h>
17
18#include <asm/io.h>
19#include <asm/prom.h>
20#include <asm/pci-bridge.h>
21#include <asm/machdep.h>
22
23#ifdef CONFIG_PPC_INDIRECT_PCI_BE
24#define PCI_CFG_OUT out_be32
25#else
26#define PCI_CFG_OUT out_le32
27#endif
28
29static int
30indirect_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
31 int len, u32 *val)
32{
33 struct pci_controller *hose = bus->sysdata;
34 volatile void __iomem *cfg_data;
35 u8 cfg_type = 0;
36
37 if (ppc_md.pci_exclude_device)
38 if (ppc_md.pci_exclude_device(bus->number, devfn))
39 return PCIBIOS_DEVICE_NOT_FOUND;
40
41 if (hose->set_cfg_type)
42 if (bus->number != hose->first_busno)
43 cfg_type = 1;
44
45 PCI_CFG_OUT(hose->cfg_addr,
46 (0x80000000 | ((bus->number - hose->bus_offset) << 16)
47 | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
48
49 /*
50 * Note: the caller has already checked that offset is
51 * suitably aligned and that len is 1, 2 or 4.
52 */
53 cfg_data = hose->cfg_data + (offset & 3);
54 switch (len) {
55 case 1:
56 *val = in_8(cfg_data);
57 break;
58 case 2:
59 *val = in_le16(cfg_data);
60 break;
61 default:
62 *val = in_le32(cfg_data);
63 break;
64 }
65 return PCIBIOS_SUCCESSFUL;
66}
67
68static int
69indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
70 int len, u32 val)
71{
72 struct pci_controller *hose = bus->sysdata;
73 volatile void __iomem *cfg_data;
74 u8 cfg_type = 0;
75
76 if (ppc_md.pci_exclude_device)
77 if (ppc_md.pci_exclude_device(bus->number, devfn))
78 return PCIBIOS_DEVICE_NOT_FOUND;
79
80 if (hose->set_cfg_type)
81 if (bus->number != hose->first_busno)
82 cfg_type = 1;
83
84 PCI_CFG_OUT(hose->cfg_addr,
85 (0x80000000 | ((bus->number - hose->bus_offset) << 16)
86 | (devfn << 8) | ((offset & 0xfc) | cfg_type)));
87
88 /*
89 * Note: the caller has already checked that offset is
90 * suitably aligned and that len is 1, 2 or 4.
91 */
92 cfg_data = hose->cfg_data + (offset & 3);
93 switch (len) {
94 case 1:
95 out_8(cfg_data, val);
96 break;
97 case 2:
98 out_le16(cfg_data, val);
99 break;
100 default:
101 out_le32(cfg_data, val);
102 break;
103 }
104 return PCIBIOS_SUCCESSFUL;
105}
106
107static struct pci_ops indirect_pci_ops =
108{
109 indirect_read_config,
110 indirect_write_config
111};
112
113void __init
114setup_indirect_pci_nomap(struct pci_controller* hose, void __iomem * cfg_addr,
115 void __iomem * cfg_data)
116{
117 hose->cfg_addr = cfg_addr;
118 hose->cfg_data = cfg_data;
119 hose->ops = &indirect_pci_ops;
120}
121
122void __init
123setup_indirect_pci(struct pci_controller* hose, u32 cfg_addr, u32 cfg_data)
124{
125 unsigned long base = cfg_addr & PAGE_MASK;
126 void __iomem *mbase, *addr, *data;
127
128 mbase = ioremap(base, PAGE_SIZE);
129 addr = mbase + (cfg_addr & ~PAGE_MASK);
130 if ((cfg_data & PAGE_MASK) != base)
131 mbase = ioremap(cfg_data & PAGE_MASK, PAGE_SIZE);
132 data = mbase + (cfg_data & ~PAGE_MASK);
133 setup_indirect_pci_nomap(hose, addr, data);
134}
diff --git a/arch/ppc/syslib/m8260_setup.c b/arch/ppc/syslib/m8260_setup.c
index 8f80a42dfdb7..76a2aa4ce65e 100644
--- a/arch/ppc/syslib/m8260_setup.c
+++ b/arch/ppc/syslib/m8260_setup.c
@@ -62,6 +62,10 @@ m8260_setup_arch(void)
62 if (initrd_start) 62 if (initrd_start)
63 ROOT_DEV = Root_RAM0; 63 ROOT_DEV = Root_RAM0;
64#endif 64#endif
65
66 identify_ppc_sys_by_name_and_id(BOARD_CHIP_NAME,
67 in_be32(CPM_MAP_ADDR + CPM_IMMR_OFFSET));
68
65 m82xx_board_setup(); 69 m82xx_board_setup();
66} 70}
67 71
diff --git a/arch/ppc/syslib/m82xx_pci.c b/arch/ppc/syslib/m82xx_pci.c
index 9db58c587b46..1d1c3956c1ae 100644
--- a/arch/ppc/syslib/m82xx_pci.c
+++ b/arch/ppc/syslib/m82xx_pci.c
@@ -302,11 +302,11 @@ pq2ads_setup_pci(struct pci_controller *hose)
302 302
303void __init pq2_find_bridges(void) 303void __init pq2_find_bridges(void)
304{ 304{
305 extern int pci_assign_all_busses; 305 extern int pci_assign_all_buses;
306 struct pci_controller * hose; 306 struct pci_controller * hose;
307 int host_bridge; 307 int host_bridge;
308 308
309 pci_assign_all_busses = 1; 309 pci_assign_all_buses = 1;
310 310
311 hose = pcibios_alloc_controller(); 311 hose = pcibios_alloc_controller();
312 312
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 4c888da89b3c..97ffbc70574f 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -144,12 +144,12 @@ void __init m8xx_calibrate_decr(void)
144 int freq, fp, divisor; 144 int freq, fp, divisor;
145 145
146 /* Unlock the SCCR. */ 146 /* Unlock the SCCR. */
147 ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = ~KAPWR_KEY; 147 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, ~KAPWR_KEY);
148 ((volatile immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk = KAPWR_KEY; 148 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrstk.cark_sccrk, KAPWR_KEY);
149 149
150 /* Force all 8xx processors to use divide by 16 processor clock. */ 150 /* Force all 8xx processors to use divide by 16 processor clock. */
151 ((volatile immap_t *)IMAP_ADDR)->im_clkrst.car_sccr |= 0x02000000; 151 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr,
152 152 in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_sccr)|0x02000000);
153 /* Processor frequency is MHz. 153 /* Processor frequency is MHz.
154 * The value 'fp' is the number of decrementer ticks per second. 154 * The value 'fp' is the number of decrementer ticks per second.
155 */ 155 */
@@ -175,28 +175,24 @@ void __init m8xx_calibrate_decr(void)
175 * we guarantee the registers are locked, then we unlock them 175 * we guarantee the registers are locked, then we unlock them
176 * for our use. 176 * for our use.
177 */ 177 */
178 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = ~KAPWR_KEY; 178 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, ~KAPWR_KEY);
179 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = ~KAPWR_KEY; 179 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, ~KAPWR_KEY);
180 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = ~KAPWR_KEY; 180 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, ~KAPWR_KEY);
181 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk = KAPWR_KEY; 181 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbscrk, KAPWR_KEY);
182 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck = KAPWR_KEY; 182 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtcsck, KAPWR_KEY);
183 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk = KAPWR_KEY; 183 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_tbk, KAPWR_KEY);
184 184
185 /* Disable the RTC one second and alarm interrupts. */ 185 /* Disable the RTC one second and alarm interrupts. */
186 ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc &= 186 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) & ~(RTCSC_SIE | RTCSC_ALE));
187 ~(RTCSC_SIE | RTCSC_ALE);
188 /* Enable the RTC */ 187 /* Enable the RTC */
189 ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc |= 188 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc, in_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtcsc) | (RTCSC_RTF | RTCSC_RTE));
190 (RTCSC_RTF | RTCSC_RTE);
191 189
192 /* Enabling the decrementer also enables the timebase interrupts 190 /* Enabling the decrementer also enables the timebase interrupts
193 * (or from the other point of view, to get decrementer interrupts 191 * (or from the other point of view, to get decrementer interrupts
194 * we have to enable the timebase). The decrementer interrupt 192 * we have to enable the timebase). The decrementer interrupt
195 * is wired into the vector table, nothing to do here for that. 193 * is wired into the vector table, nothing to do here for that.
196 */ 194 */
197 ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_tbscr = 195 out_be16(&((immap_t *)IMAP_ADDR)->im_sit.sit_tbscr, (mk_int_int_mask(DEC_INTERRUPT) << 8) | (TBSCR_TBF | TBSCR_TBE));
198 ((mk_int_int_mask(DEC_INTERRUPT) << 8) |
199 (TBSCR_TBF | TBSCR_TBE));
200 196
201 if (setup_irq(DEC_INTERRUPT, &tbint_irqaction)) 197 if (setup_irq(DEC_INTERRUPT, &tbint_irqaction))
202 panic("Could not allocate timer IRQ!"); 198 panic("Could not allocate timer IRQ!");
@@ -216,9 +212,9 @@ void __init m8xx_calibrate_decr(void)
216static int 212static int
217m8xx_set_rtc_time(unsigned long time) 213m8xx_set_rtc_time(unsigned long time)
218{ 214{
219 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = KAPWR_KEY; 215 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, KAPWR_KEY);
220 ((volatile immap_t *)IMAP_ADDR)->im_sit.sit_rtc = time; 216 out_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc, time);
221 ((volatile immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck = ~KAPWR_KEY; 217 out_be32(&((immap_t *)IMAP_ADDR)->im_sitk.sitk_rtck, ~KAPWR_KEY);
222 return(0); 218 return(0);
223} 219}
224 220
@@ -226,7 +222,7 @@ static unsigned long
226m8xx_get_rtc_time(void) 222m8xx_get_rtc_time(void)
227{ 223{
228 /* Get time from the RTC. */ 224 /* Get time from the RTC. */
229 return((unsigned long)(((immap_t *)IMAP_ADDR)->im_sit.sit_rtc)); 225 return (unsigned long) in_be32(&((immap_t *)IMAP_ADDR)->im_sit.sit_rtc);
230} 226}
231 227
232static void 228static void
@@ -235,13 +231,13 @@ m8xx_restart(char *cmd)
235 __volatile__ unsigned char dummy; 231 __volatile__ unsigned char dummy;
236 232
237 local_irq_disable(); 233 local_irq_disable();
238 ((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr |= 0x00000080; 234 out_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr, in_be32(&((immap_t *)IMAP_ADDR)->im_clkrst.car_plprcr) | 0x00000080);
239 235
240 /* Clear the ME bit in MSR to cause checkstop on machine check 236 /* Clear the ME bit in MSR to cause checkstop on machine check
241 */ 237 */
242 mtmsr(mfmsr() & ~0x1000); 238 mtmsr(mfmsr() & ~0x1000);
243 239
244 dummy = ((immap_t *)IMAP_ADDR)->im_clkrst.res[0]; 240 dummy = in_8(&((immap_t *)IMAP_ADDR)->im_clkrst.res[0]);
245 printk("Restart failed\n"); 241 printk("Restart failed\n");
246 while(1); 242 while(1);
247} 243}
@@ -306,8 +302,7 @@ m8xx_init_IRQ(void)
306 i8259_init(0); 302 i8259_init(0);
307 303
308 /* The i8259 cascade interrupt must be level sensitive. */ 304 /* The i8259 cascade interrupt must be level sensitive. */
309 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel &= 305 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel, in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_siel & ~(0x80000000 >> ISA_BRIDGE_INT)));
310 ~(0x80000000 >> ISA_BRIDGE_INT);
311 306
312 if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction)) 307 if (setup_irq(ISA_BRIDGE_INT, &mbx_i8259_irqaction))
313 enable_irq(ISA_BRIDGE_INT); 308 enable_irq(ISA_BRIDGE_INT);
@@ -404,9 +399,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
404 strcpy(cmd_line, (char *)(r6+KERNELBASE)); 399 strcpy(cmd_line, (char *)(r6+KERNELBASE));
405 } 400 }
406 401
402 identify_ppc_sys_by_name(BOARD_CHIP_NAME);
403
407 ppc_md.setup_arch = m8xx_setup_arch; 404 ppc_md.setup_arch = m8xx_setup_arch;
408 ppc_md.show_percpuinfo = m8xx_show_percpuinfo; 405 ppc_md.show_percpuinfo = m8xx_show_percpuinfo;
409 ppc_md.irq_canonicalize = NULL;
410 ppc_md.init_IRQ = m8xx_init_IRQ; 406 ppc_md.init_IRQ = m8xx_init_IRQ;
411 ppc_md.get_irq = m8xx_get_irq; 407 ppc_md.get_irq = m8xx_get_irq;
412 ppc_md.init = NULL; 408 ppc_md.init = NULL;
diff --git a/arch/ppc/syslib/m8xx_wdt.c b/arch/ppc/syslib/m8xx_wdt.c
index 2ddc857e7fc7..c5ac5ce5d7d2 100644
--- a/arch/ppc/syslib/m8xx_wdt.c
+++ b/arch/ppc/syslib/m8xx_wdt.c
@@ -29,8 +29,8 @@ void m8xx_wdt_reset(void)
29{ 29{
30 volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR; 30 volatile immap_t *imap = (volatile immap_t *)IMAP_ADDR;
31 31
32 imap->im_siu_conf.sc_swsr = 0x556c; /* write magic1 */ 32 out_be16(imap->im_siu_conf.sc_swsr, 0x556c); /* write magic1 */
33 imap->im_siu_conf.sc_swsr = 0xaa39; /* write magic2 */ 33 out_be16(imap->im_siu_conf.sc_swsr, 0xaa39); /* write magic2 */
34} 34}
35 35
36static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs) 36static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
@@ -39,7 +39,7 @@ static irqreturn_t m8xx_wdt_interrupt(int irq, void *dev, struct pt_regs *regs)
39 39
40 m8xx_wdt_reset(); 40 m8xx_wdt_reset();
41 41
42 imap->im_sit.sit_piscr |= PISCR_PS; /* clear irq */ 42 out_be16(imap->im_sit.sit_piscr, in_be16(imap->im_sit.sit_piscr | PISCR_PS)); /* clear irq */
43 43
44 return IRQ_HANDLED; 44 return IRQ_HANDLED;
45} 45}
@@ -51,7 +51,7 @@ void __init m8xx_wdt_handler_install(bd_t * binfo)
51 u32 sypcr; 51 u32 sypcr;
52 u32 pitrtclk; 52 u32 pitrtclk;
53 53
54 sypcr = imap->im_siu_conf.sc_sypcr; 54 sypcr = in_be32(imap->im_siu_conf.sc_sypcr);
55 55
56 if (!(sypcr & 0x04)) { 56 if (!(sypcr & 0x04)) {
57 printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n", 57 printk(KERN_NOTICE "m8xx_wdt: wdt disabled (SYPCR: 0x%08X)\n",
@@ -87,9 +87,9 @@ void __init m8xx_wdt_handler_install(bd_t * binfo)
87 else 87 else
88 pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2; 88 pitc = pitrtclk * wdt_timeout / binfo->bi_intfreq / 2;
89 89
90 imap->im_sit.sit_pitc = pitc << 16; 90 out_be32(imap->im_sit.sit_pitc, pitc << 16);
91 imap->im_sit.sit_piscr = 91
92 (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE; 92 out_be16(imap->im_sit.sit_piscr, (mk_int_int_mask(PIT_INTERRUPT) << 8) | PISCR_PIE | PISCR_PTE);
93 93
94 if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction)) 94 if (setup_irq(PIT_INTERRUPT, &m8xx_wdt_irqaction))
95 panic("m8xx_wdt: error setting up the watchdog irq!"); 95 panic("m8xx_wdt: error setting up the watchdog irq!");
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 59cf3e8bd1a0..4ac19080eb85 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -21,6 +21,7 @@
21#include "mpc52xx_pci.h" 21#include "mpc52xx_pci.h"
22 22
23#include <asm/delay.h> 23#include <asm/delay.h>
24#include <asm/machdep.h>
24 25
25 26
26static int 27static int
@@ -181,7 +182,7 @@ mpc52xx_find_bridges(void)
181 struct mpc52xx_pci __iomem *pci_regs; 182 struct mpc52xx_pci __iomem *pci_regs;
182 struct pci_controller *hose; 183 struct pci_controller *hose;
183 184
184 pci_assign_all_busses = 1; 185 pci_assign_all_buses = 1;
185 186
186 pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE); 187 pci_regs = ioremap(MPC52xx_PA(MPC52xx_PCI_OFFSET), MPC52xx_PCI_SIZE);
187 if (!pci_regs) 188 if (!pci_regs)
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index 95b3b8a7f0ba..dbf8acac507f 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -21,6 +21,7 @@
21#include <asm/mpc83xx.h> 21#include <asm/mpc83xx.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/ppc_sys.h> 23#include <asm/ppc_sys.h>
24#include <asm/machdep.h>
24 25
25/* We use offsets for IORESOURCE_MEM since we do not know at compile time 26/* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup 27 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
index bbc5ac0de878..2ede677a0a53 100644
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ b/arch/ppc/syslib/mpc85xx_devices.c
@@ -25,19 +25,20 @@
25/* We use offsets for IORESOURCE_MEM since we do not know at compile time 25/* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup 26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
27 */ 27 */
28struct gianfar_mdio_data mpc85xx_mdio_pdata = {
29 .paddr = MPC85xx_MIIM_OFFSET,
30};
28 31
29static struct gianfar_platform_data mpc85xx_tsec1_pdata = { 32static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
30 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | 33 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
31 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | 34 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
32 FSL_GIANFAR_DEV_HAS_MULTI_INTR, 35 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
33 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
34}; 36};
35 37
36static struct gianfar_platform_data mpc85xx_tsec2_pdata = { 38static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
37 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT | 39 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
38 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON | 40 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
39 FSL_GIANFAR_DEV_HAS_MULTI_INTR, 41 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
40 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
41}; 42};
42 43
43static struct gianfar_platform_data mpc85xx_etsec1_pdata = { 44static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
@@ -46,7 +47,6 @@ static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
46 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 47 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
47 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | 48 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
48 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, 49 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
49 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
50}; 50};
51 51
52static struct gianfar_platform_data mpc85xx_etsec2_pdata = { 52static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
@@ -55,7 +55,6 @@ static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
55 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 55 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
56 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | 56 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
57 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, 57 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
58 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
59}; 58};
60 59
61static struct gianfar_platform_data mpc85xx_etsec3_pdata = { 60static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
@@ -64,7 +63,6 @@ static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
64 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 63 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
65 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | 64 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
66 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, 65 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
67 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
68}; 66};
69 67
70static struct gianfar_platform_data mpc85xx_etsec4_pdata = { 68static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
@@ -73,11 +71,10 @@ static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
73 FSL_GIANFAR_DEV_HAS_MULTI_INTR | 71 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
74 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN | 72 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
75 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH, 73 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
76 .phy_reg_addr = MPC85xx_ENET1_OFFSET,
77}; 74};
78 75
79static struct gianfar_platform_data mpc85xx_fec_pdata = { 76static struct gianfar_platform_data mpc85xx_fec_pdata = {
80 .phy_reg_addr = MPC85xx_ENET1_OFFSET, 77 .device_flags = 0,
81}; 78};
82 79
83static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = { 80static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
@@ -719,6 +716,12 @@ struct platform_device ppc_sys_platform_devices[] = {
719 }, 716 },
720 }, 717 },
721 }, 718 },
719 [MPC85xx_MDIO] = {
720 .name = "fsl-gianfar_mdio",
721 .id = 0,
722 .dev.platform_data = &mpc85xx_mdio_pdata,
723 .num_resources = 0,
724 },
722}; 725};
723 726
724static int __init mach_mpc85xx_fixup(struct platform_device *pdev) 727static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
index 6e3184ab354f..cb68d8c58348 100644
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ b/arch/ppc/syslib/mpc85xx_sys.c
@@ -24,19 +24,19 @@ struct ppc_sys_spec ppc_sys_specs[] = {
24 .ppc_sys_name = "8540", 24 .ppc_sys_name = "8540",
25 .mask = 0xFFFF0000, 25 .mask = 0xFFFF0000,
26 .value = 0x80300000, 26 .value = 0x80300000,
27 .num_devices = 10, 27 .num_devices = 11,
28 .device_list = (enum ppc_sys_devices[]) 28 .device_list = (enum ppc_sys_devices[])
29 { 29 {
30 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1, 30 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1,
31 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 31 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
32 MPC85xx_PERFMON, MPC85xx_DUART, 32 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_MDIO,
33 }, 33 },
34 }, 34 },
35 { 35 {
36 .ppc_sys_name = "8560", 36 .ppc_sys_name = "8560",
37 .mask = 0xFFFF0000, 37 .mask = 0xFFFF0000,
38 .value = 0x80700000, 38 .value = 0x80700000,
39 .num_devices = 19, 39 .num_devices = 20,
40 .device_list = (enum ppc_sys_devices[]) 40 .device_list = (enum ppc_sys_devices[])
41 { 41 {
42 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, 42 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -45,14 +45,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
45 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1, 45 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
46 MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4, 46 MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4,
47 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3, 47 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3,
48 MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, 48 MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, MPC85xx_MDIO,
49 }, 49 },
50 }, 50 },
51 { 51 {
52 .ppc_sys_name = "8541", 52 .ppc_sys_name = "8541",
53 .mask = 0xFFFF0000, 53 .mask = 0xFFFF0000,
54 .value = 0x80720000, 54 .value = 0x80720000,
55 .num_devices = 13, 55 .num_devices = 14,
56 .device_list = (enum ppc_sys_devices[]) 56 .device_list = (enum ppc_sys_devices[])
57 { 57 {
58 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, 58 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -60,13 +60,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
60 MPC85xx_PERFMON, MPC85xx_DUART, 60 MPC85xx_PERFMON, MPC85xx_DUART,
61 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, 61 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
62 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, 62 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
63 MPC85xx_MDIO,
63 }, 64 },
64 }, 65 },
65 { 66 {
66 .ppc_sys_name = "8541E", 67 .ppc_sys_name = "8541E",
67 .mask = 0xFFFF0000, 68 .mask = 0xFFFF0000,
68 .value = 0x807A0000, 69 .value = 0x807A0000,
69 .num_devices = 14, 70 .num_devices = 15,
70 .device_list = (enum ppc_sys_devices[]) 71 .device_list = (enum ppc_sys_devices[])
71 { 72 {
72 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, 73 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -74,13 +75,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
74 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, 75 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
75 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, 76 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
76 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, 77 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
78 MPC85xx_MDIO,
77 }, 79 },
78 }, 80 },
79 { 81 {
80 .ppc_sys_name = "8555", 82 .ppc_sys_name = "8555",
81 .mask = 0xFFFF0000, 83 .mask = 0xFFFF0000,
82 .value = 0x80710000, 84 .value = 0x80710000,
83 .num_devices = 19, 85 .num_devices = 20,
84 .device_list = (enum ppc_sys_devices[]) 86 .device_list = (enum ppc_sys_devices[])
85 { 87 {
86 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, 88 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -91,13 +93,14 @@ struct ppc_sys_spec ppc_sys_specs[] = {
91 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, 93 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
92 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2, 94 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
93 MPC85xx_CPM_USB, 95 MPC85xx_CPM_USB,
96 MPC85xx_MDIO,
94 }, 97 },
95 }, 98 },
96 { 99 {
97 .ppc_sys_name = "8555E", 100 .ppc_sys_name = "8555E",
98 .mask = 0xFFFF0000, 101 .mask = 0xFFFF0000,
99 .value = 0x80790000, 102 .value = 0x80790000,
100 .num_devices = 20, 103 .num_devices = 21,
101 .device_list = (enum ppc_sys_devices[]) 104 .device_list = (enum ppc_sys_devices[])
102 { 105 {
103 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1, 106 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
@@ -108,6 +111,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
108 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, 111 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
109 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2, 112 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
110 MPC85xx_CPM_USB, 113 MPC85xx_CPM_USB,
114 MPC85xx_MDIO,
111 }, 115 },
112 }, 116 },
113 /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */ 117 /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */
@@ -115,104 +119,112 @@ struct ppc_sys_spec ppc_sys_specs[] = {
115 .ppc_sys_name = "8548E", 119 .ppc_sys_name = "8548E",
116 .mask = 0xFFFF00F0, 120 .mask = 0xFFFF00F0,
117 .value = 0x80390010, 121 .value = 0x80390010,
118 .num_devices = 13, 122 .num_devices = 14,
119 .device_list = (enum ppc_sys_devices[]) 123 .device_list = (enum ppc_sys_devices[])
120 { 124 {
121 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, 125 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
122 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, 126 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
123 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 127 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
124 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, 128 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
129 MPC85xx_MDIO,
125 }, 130 },
126 }, 131 },
127 { 132 {
128 .ppc_sys_name = "8548", 133 .ppc_sys_name = "8548",
129 .mask = 0xFFFF00F0, 134 .mask = 0xFFFF00F0,
130 .value = 0x80310010, 135 .value = 0x80310010,
131 .num_devices = 12, 136 .num_devices = 13,
132 .device_list = (enum ppc_sys_devices[]) 137 .device_list = (enum ppc_sys_devices[])
133 { 138 {
134 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, 139 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
135 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, 140 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
136 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 141 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
137 MPC85xx_PERFMON, MPC85xx_DUART, 142 MPC85xx_PERFMON, MPC85xx_DUART,
143 MPC85xx_MDIO,
138 }, 144 },
139 }, 145 },
140 { 146 {
141 .ppc_sys_name = "8547E", 147 .ppc_sys_name = "8547E",
142 .mask = 0xFFFF00F0, 148 .mask = 0xFFFF00F0,
143 .value = 0x80390010, 149 .value = 0x80390010,
144 .num_devices = 13, 150 .num_devices = 14,
145 .device_list = (enum ppc_sys_devices[]) 151 .device_list = (enum ppc_sys_devices[])
146 { 152 {
147 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, 153 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
148 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, 154 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
149 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 155 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
150 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, 156 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
157 MPC85xx_MDIO,
151 }, 158 },
152 }, 159 },
153 { 160 {
154 .ppc_sys_name = "8547", 161 .ppc_sys_name = "8547",
155 .mask = 0xFFFF00F0, 162 .mask = 0xFFFF00F0,
156 .value = 0x80310010, 163 .value = 0x80310010,
157 .num_devices = 12, 164 .num_devices = 13,
158 .device_list = (enum ppc_sys_devices[]) 165 .device_list = (enum ppc_sys_devices[])
159 { 166 {
160 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3, 167 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
161 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2, 168 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
162 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 169 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
163 MPC85xx_PERFMON, MPC85xx_DUART, 170 MPC85xx_PERFMON, MPC85xx_DUART,
171 MPC85xx_MDIO,
164 }, 172 },
165 }, 173 },
166 { 174 {
167 .ppc_sys_name = "8545E", 175 .ppc_sys_name = "8545E",
168 .mask = 0xFFFF00F0, 176 .mask = 0xFFFF00F0,
169 .value = 0x80390010, 177 .value = 0x80390010,
170 .num_devices = 11, 178 .num_devices = 12,
171 .device_list = (enum ppc_sys_devices[]) 179 .device_list = (enum ppc_sys_devices[])
172 { 180 {
173 MPC85xx_eTSEC1, MPC85xx_eTSEC2, 181 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
174 MPC85xx_IIC1, MPC85xx_IIC2, 182 MPC85xx_IIC1, MPC85xx_IIC2,
175 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 183 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
176 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, 184 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
185 MPC85xx_MDIO,
177 }, 186 },
178 }, 187 },
179 { 188 {
180 .ppc_sys_name = "8545", 189 .ppc_sys_name = "8545",
181 .mask = 0xFFFF00F0, 190 .mask = 0xFFFF00F0,
182 .value = 0x80310010, 191 .value = 0x80310010,
183 .num_devices = 10, 192 .num_devices = 11,
184 .device_list = (enum ppc_sys_devices[]) 193 .device_list = (enum ppc_sys_devices[])
185 { 194 {
186 MPC85xx_eTSEC1, MPC85xx_eTSEC2, 195 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
187 MPC85xx_IIC1, MPC85xx_IIC2, 196 MPC85xx_IIC1, MPC85xx_IIC2,
188 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 197 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
189 MPC85xx_PERFMON, MPC85xx_DUART, 198 MPC85xx_PERFMON, MPC85xx_DUART,
199 MPC85xx_MDIO,
190 }, 200 },
191 }, 201 },
192 { 202 {
193 .ppc_sys_name = "8543E", 203 .ppc_sys_name = "8543E",
194 .mask = 0xFFFF00F0, 204 .mask = 0xFFFF00F0,
195 .value = 0x803A0010, 205 .value = 0x803A0010,
196 .num_devices = 11, 206 .num_devices = 12,
197 .device_list = (enum ppc_sys_devices[]) 207 .device_list = (enum ppc_sys_devices[])
198 { 208 {
199 MPC85xx_eTSEC1, MPC85xx_eTSEC2, 209 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
200 MPC85xx_IIC1, MPC85xx_IIC2, 210 MPC85xx_IIC1, MPC85xx_IIC2,
201 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 211 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
202 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2, 212 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
213 MPC85xx_MDIO,
203 }, 214 },
204 }, 215 },
205 { 216 {
206 .ppc_sys_name = "8543", 217 .ppc_sys_name = "8543",
207 .mask = 0xFFFF00F0, 218 .mask = 0xFFFF00F0,
208 .value = 0x80320010, 219 .value = 0x80320010,
209 .num_devices = 10, 220 .num_devices = 11,
210 .device_list = (enum ppc_sys_devices[]) 221 .device_list = (enum ppc_sys_devices[])
211 { 222 {
212 MPC85xx_eTSEC1, MPC85xx_eTSEC2, 223 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
213 MPC85xx_IIC1, MPC85xx_IIC2, 224 MPC85xx_IIC1, MPC85xx_IIC2,
214 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3, 225 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
215 MPC85xx_PERFMON, MPC85xx_DUART, 226 MPC85xx_PERFMON, MPC85xx_DUART,
227 MPC85xx_MDIO,
216 }, 228 },
217 }, 229 },
218 { /* default match */ 230 { /* default match */
diff --git a/arch/ppc/syslib/mpc8xx_sys.c b/arch/ppc/syslib/mpc8xx_sys.c
index a532ccc861c0..3cc27d29e3af 100644
--- a/arch/ppc/syslib/mpc8xx_sys.c
+++ b/arch/ppc/syslib/mpc8xx_sys.c
@@ -24,7 +24,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
24 .ppc_sys_name = "MPC86X", 24 .ppc_sys_name = "MPC86X",
25 .mask = 0xFFFFFFFF, 25 .mask = 0xFFFFFFFF,
26 .value = 0x00000000, 26 .value = 0x00000000,
27 .num_devices = 2, 27 .num_devices = 7,
28 .device_list = (enum ppc_sys_devices[]) 28 .device_list = (enum ppc_sys_devices[])
29 { 29 {
30 MPC8xx_CPM_FEC1, 30 MPC8xx_CPM_FEC1,
@@ -40,7 +40,7 @@ struct ppc_sys_spec ppc_sys_specs[] = {
40 .ppc_sys_name = "MPC885", 40 .ppc_sys_name = "MPC885",
41 .mask = 0xFFFFFFFF, 41 .mask = 0xFFFFFFFF,
42 .value = 0x00000000, 42 .value = 0x00000000,
43 .num_devices = 3, 43 .num_devices = 8,
44 .device_list = (enum ppc_sys_devices[]) 44 .device_list = (enum ppc_sys_devices[])
45 { 45 {
46 MPC8xx_CPM_FEC1, 46 MPC8xx_CPM_FEC1,
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 8356da4678a2..58b0aa813e85 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -48,6 +48,7 @@
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <asm/mv64x60.h> 50#include <asm/mv64x60.h>
51#include <asm/machdep.h>
51 52
52#ifdef CONFIG_IRQ_ALL_CPUS 53#ifdef CONFIG_IRQ_ALL_CPUS
53#error "The mv64360 does not support distribution of IRQs on all CPUs" 54#error "The mv64360 does not support distribution of IRQs on all CPUs"
diff --git a/arch/ppc/syslib/mv64x60.c b/arch/ppc/syslib/mv64x60.c
index 4849850a59ed..a781c50d2f4c 100644
--- a/arch/ppc/syslib/mv64x60.c
+++ b/arch/ppc/syslib/mv64x60.c
@@ -1304,7 +1304,7 @@ mv64x60_config_pci_params(struct pci_controller *hose,
1304 early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val); 1304 early_write_config_word(hose, 0, devfn, PCI_COMMAND, u16_val);
1305 1305
1306 /* Set latency timer, cache line size, clear BIST */ 1306 /* Set latency timer, cache line size, clear BIST */
1307 u16_val = (pi->latency_timer << 8) | (L1_CACHE_LINE_SIZE >> 2); 1307 u16_val = (pi->latency_timer << 8) | (L1_CACHE_BYTES >> 2);
1308 early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val); 1308 early_write_config_word(hose, 0, devfn, PCI_CACHE_LINE_SIZE, u16_val);
1309 1309
1310 mv64x60_pci_exclude_bridge = save_exclude; 1310 mv64x60_pci_exclude_bridge = save_exclude;
diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c
index 2927c7adf5e5..fa5b2e45e0ca 100644
--- a/arch/ppc/syslib/mv64x60_dbg.c
+++ b/arch/ppc/syslib/mv64x60_dbg.c
@@ -24,6 +24,7 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <asm/delay.h> 25#include <asm/delay.h>
26#include <asm/mv64x60.h> 26#include <asm/mv64x60.h>
27#include <asm/machdep.h>
27 28
28 29
29#if defined(CONFIG_SERIAL_TEXT_DEBUG) 30#if defined(CONFIG_SERIAL_TEXT_DEBUG)
diff --git a/arch/ppc/syslib/of_device.c b/arch/ppc/syslib/of_device.c
deleted file mode 100644
index 85b821251635..000000000000
--- a/arch/ppc/syslib/of_device.c
+++ /dev/null
@@ -1,278 +0,0 @@
1#include <linux/config.h>
2#include <linux/string.h>
3#include <linux/kernel.h>
4#include <linux/init.h>
5#include <linux/module.h>
6#include <linux/mod_devicetable.h>
7#include <linux/slab.h>
8
9#include <asm/errno.h>
10#include <asm/of_device.h>
11
12/**
13 * of_match_device - Tell if an of_device structure has a matching
14 * of_match structure
15 * @ids: array of of device match structures to search in
16 * @dev: the of device structure to match against
17 *
18 * Used by a driver to check whether an of_device present in the
19 * system is in its list of supported devices.
20 */
21const struct of_device_id * of_match_device(const struct of_device_id *matches,
22 const struct of_device *dev)
23{
24 if (!dev->node)
25 return NULL;
26 while (matches->name[0] || matches->type[0] || matches->compatible[0]) {
27 int match = 1;
28 if (matches->name[0])
29 match &= dev->node->name
30 && !strcmp(matches->name, dev->node->name);
31 if (matches->type[0])
32 match &= dev->node->type
33 && !strcmp(matches->type, dev->node->type);
34 if (matches->compatible[0])
35 match &= device_is_compatible(dev->node,
36 matches->compatible);
37 if (match)
38 return matches;
39 matches++;
40 }
41 return NULL;
42}
43
44static int of_platform_bus_match(struct device *dev, struct device_driver *drv)
45{
46 struct of_device * of_dev = to_of_device(dev);
47 struct of_platform_driver * of_drv = to_of_platform_driver(drv);
48 const struct of_device_id * matches = of_drv->match_table;
49
50 if (!matches)
51 return 0;
52
53 return of_match_device(matches, of_dev) != NULL;
54}
55
56struct of_device *of_dev_get(struct of_device *dev)
57{
58 struct device *tmp;
59
60 if (!dev)
61 return NULL;
62 tmp = get_device(&dev->dev);
63 if (tmp)
64 return to_of_device(tmp);
65 else
66 return NULL;
67}
68
69void of_dev_put(struct of_device *dev)
70{
71 if (dev)
72 put_device(&dev->dev);
73}
74
75
76static int of_device_probe(struct device *dev)
77{
78 int error = -ENODEV;
79 struct of_platform_driver *drv;
80 struct of_device *of_dev;
81 const struct of_device_id *match;
82
83 drv = to_of_platform_driver(dev->driver);
84 of_dev = to_of_device(dev);
85
86 if (!drv->probe)
87 return error;
88
89 of_dev_get(of_dev);
90
91 match = of_match_device(drv->match_table, of_dev);
92 if (match)
93 error = drv->probe(of_dev, match);
94 if (error)
95 of_dev_put(of_dev);
96
97 return error;
98}
99
100static int of_device_remove(struct device *dev)
101{
102 struct of_device * of_dev = to_of_device(dev);
103 struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
104
105 if (dev->driver && drv->remove)
106 drv->remove(of_dev);
107 return 0;
108}
109
110static int of_device_suspend(struct device *dev, pm_message_t state)
111{
112 struct of_device * of_dev = to_of_device(dev);
113 struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
114 int error = 0;
115
116 if (dev->driver && drv->suspend)
117 error = drv->suspend(of_dev, state);
118 return error;
119}
120
121static int of_device_resume(struct device * dev)
122{
123 struct of_device * of_dev = to_of_device(dev);
124 struct of_platform_driver * drv = to_of_platform_driver(dev->driver);
125 int error = 0;
126
127 if (dev->driver && drv->resume)
128 error = drv->resume(of_dev);
129 return error;
130}
131
132struct bus_type of_platform_bus_type = {
133 .name = "of_platform",
134 .match = of_platform_bus_match,
135 .suspend = of_device_suspend,
136 .resume = of_device_resume,
137};
138
139static int __init of_bus_driver_init(void)
140{
141 return bus_register(&of_platform_bus_type);
142}
143
144postcore_initcall(of_bus_driver_init);
145
146int of_register_driver(struct of_platform_driver *drv)
147{
148 int count = 0;
149
150 /* initialize common driver fields */
151 drv->driver.name = drv->name;
152 drv->driver.bus = &of_platform_bus_type;
153 drv->driver.probe = of_device_probe;
154 drv->driver.remove = of_device_remove;
155
156 /* register with core */
157 count = driver_register(&drv->driver);
158 return count ? count : 1;
159}
160
161void of_unregister_driver(struct of_platform_driver *drv)
162{
163 driver_unregister(&drv->driver);
164}
165
166
167static ssize_t dev_show_devspec(struct device *dev, struct device_attribute *attr, char *buf)
168{
169 struct of_device *ofdev;
170
171 ofdev = to_of_device(dev);
172 return sprintf(buf, "%s", ofdev->node->full_name);
173}
174
175static DEVICE_ATTR(devspec, S_IRUGO, dev_show_devspec, NULL);
176
177/**
178 * of_release_dev - free an of device structure when all users of it are finished.
179 * @dev: device that's been disconnected
180 *
181 * Will be called only by the device core when all users of this of device are
182 * done.
183 */
184void of_release_dev(struct device *dev)
185{
186 struct of_device *ofdev;
187
188 ofdev = to_of_device(dev);
189 of_node_put(ofdev->node);
190 kfree(ofdev);
191}
192
193int of_device_register(struct of_device *ofdev)
194{
195 int rc;
196 struct of_device **odprop;
197
198 BUG_ON(ofdev->node == NULL);
199
200 odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL);
201 if (!odprop) {
202 struct property *new_prop;
203
204 new_prop = kmalloc(sizeof(struct property) + sizeof(struct of_device *),
205 GFP_KERNEL);
206 if (new_prop == NULL)
207 return -ENOMEM;
208 new_prop->name = "linux,device";
209 new_prop->length = sizeof(sizeof(struct of_device *));
210 new_prop->value = (unsigned char *)&new_prop[1];
211 odprop = (struct of_device **)new_prop->value;
212 *odprop = NULL;
213 prom_add_property(ofdev->node, new_prop);
214 }
215 *odprop = ofdev;
216
217 rc = device_register(&ofdev->dev);
218 if (rc)
219 return rc;
220
221 device_create_file(&ofdev->dev, &dev_attr_devspec);
222
223 return 0;
224}
225
226void of_device_unregister(struct of_device *ofdev)
227{
228 struct of_device **odprop;
229
230 device_remove_file(&ofdev->dev, &dev_attr_devspec);
231
232 odprop = (struct of_device **)get_property(ofdev->node, "linux,device", NULL);
233 if (odprop)
234 *odprop = NULL;
235
236 device_unregister(&ofdev->dev);
237}
238
239struct of_device* of_platform_device_create(struct device_node *np,
240 const char *bus_id,
241 struct device *parent)
242{
243 struct of_device *dev;
244 u32 *reg;
245
246 dev = kmalloc(sizeof(*dev), GFP_KERNEL);
247 if (!dev)
248 return NULL;
249 memset(dev, 0, sizeof(*dev));
250
251 dev->node = of_node_get(np);
252 dev->dma_mask = 0xffffffffUL;
253 dev->dev.dma_mask = &dev->dma_mask;
254 dev->dev.parent = parent;
255 dev->dev.bus = &of_platform_bus_type;
256 dev->dev.release = of_release_dev;
257
258 reg = (u32 *)get_property(np, "reg", NULL);
259 strlcpy(dev->dev.bus_id, bus_id, BUS_ID_SIZE);
260
261 if (of_device_register(dev) != 0) {
262 kfree(dev);
263 return NULL;
264 }
265
266 return dev;
267}
268
269EXPORT_SYMBOL(of_match_device);
270EXPORT_SYMBOL(of_platform_bus_type);
271EXPORT_SYMBOL(of_register_driver);
272EXPORT_SYMBOL(of_unregister_driver);
273EXPORT_SYMBOL(of_device_register);
274EXPORT_SYMBOL(of_device_unregister);
275EXPORT_SYMBOL(of_dev_get);
276EXPORT_SYMBOL(of_dev_put);
277EXPORT_SYMBOL(of_platform_device_create);
278EXPORT_SYMBOL(of_release_dev);
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 1cf5de21a3fd..894779712b46 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -23,6 +23,7 @@
23#include <asm/sections.h> 23#include <asm/sections.h>
24#include <asm/open_pic.h> 24#include <asm/open_pic.h>
25#include <asm/i8259.h> 25#include <asm/i8259.h>
26#include <asm/machdep.h>
26 27
27#include "open_pic_defs.h" 28#include "open_pic_defs.h"
28 29
@@ -889,7 +890,7 @@ openpic_get_irq(struct pt_regs *regs)
889 890
890#ifdef CONFIG_SMP 891#ifdef CONFIG_SMP
891void 892void
892smp_openpic_message_pass(int target, int msg, unsigned long data, int wait) 893smp_openpic_message_pass(int target, int msg)
893{ 894{
894 cpumask_t mask = CPU_MASK_ALL; 895 cpumask_t mask = CPU_MASK_ALL;
895 /* make sure we're sending something that translates to an IPI */ 896 /* make sure we're sending something that translates to an IPI */
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index 16cff91d9f41..1c40049b9a45 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -27,6 +27,7 @@
27#include <asm/sections.h> 27#include <asm/sections.h>
28#include <asm/open_pic.h> 28#include <asm/open_pic.h>
29#include <asm/i8259.h> 29#include <asm/i8259.h>
30#include <asm/machdep.h>
30 31
31#include "open_pic_defs.h" 32#include "open_pic_defs.h"
32 33
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index ce4d1deb86e9..c46043c47225 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -26,6 +26,7 @@
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/ppc4xx_pic.h> 28#include <asm/ppc4xx_pic.h>
29#include <asm/machdep.h>
29 30
30/* Function Prototypes */ 31/* Function Prototypes */
31 32
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index 40086212b9c3..0b435633a0d1 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -25,6 +25,7 @@
25#include <asm/system.h> 25#include <asm/system.h>
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/ppc4xx_pic.h> 27#include <asm/ppc4xx_pic.h>
28#include <asm/machdep.h>
28 29
29/* See comment in include/arch-ppc/ppc4xx_pic.h 30/* See comment in include/arch-ppc/ppc4xx_pic.h
30 * for more info about these two variables 31 * for more info about these two variables
diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c
index bf83240689dc..e83a83fd95e1 100644
--- a/arch/ppc/syslib/ppc4xx_setup.c
+++ b/arch/ppc/syslib/ppc4xx_setup.c
@@ -278,7 +278,7 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
278#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */ 278#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
279} 279}
280 280
281/* Called from MachineCheckException */ 281/* Called from machine_check_exception */
282void platform_machine_check(struct pt_regs *regs) 282void platform_machine_check(struct pt_regs *regs)
283{ 283{
284#if defined(DCRN_PLB0_BEAR) 284#if defined(DCRN_PLB0_BEAR)
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index 890484e576e7..4da168a6ad03 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -40,6 +40,7 @@
40#include <asm/ppc_sys.h> 40#include <asm/ppc_sys.h>
41#include <asm/kgdb.h> 41#include <asm/kgdb.h>
42#include <asm/delay.h> 42#include <asm/delay.h>
43#include <asm/machdep.h>
43 44
44#include <syslib/ppc83xx_setup.h> 45#include <syslib/ppc83xx_setup.h>
45#if defined(CONFIG_PCI) 46#if defined(CONFIG_PCI)
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index 832b8bf99ae7..de2f90576577 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -29,6 +29,7 @@
29#include <asm/mmu.h> 29#include <asm/mmu.h>
30#include <asm/ppc_sys.h> 30#include <asm/ppc_sys.h>
31#include <asm/kgdb.h> 31#include <asm/kgdb.h>
32#include <asm/machdep.h>
32 33
33#include <syslib/ppc85xx_setup.h> 34#include <syslib/ppc85xx_setup.h>
34 35
diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c
index d3b01c6c97de..3e6f51a61d46 100644
--- a/arch/ppc/syslib/ppc8xx_pic.c
+++ b/arch/ppc/syslib/ppc8xx_pic.c
@@ -6,6 +6,7 @@
6#include <linux/signal.h> 6#include <linux/signal.h>
7#include <linux/interrupt.h> 7#include <linux/interrupt.h>
8#include <asm/irq.h> 8#include <asm/irq.h>
9#include <asm/io.h>
9#include <asm/8xx_immap.h> 10#include <asm/8xx_immap.h>
10#include <asm/mpc8xx.h> 11#include <asm/mpc8xx.h>
11#include "ppc8xx_pic.h" 12#include "ppc8xx_pic.h"
@@ -29,8 +30,7 @@ static void m8xx_mask_irq(unsigned int irq_nr)
29 word = irq_nr >> 5; 30 word = irq_nr >> 5;
30 31
31 ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); 32 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
32 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 33 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
33 ppc_cached_irq_mask[word];
34} 34}
35 35
36static void m8xx_unmask_irq(unsigned int irq_nr) 36static void m8xx_unmask_irq(unsigned int irq_nr)
@@ -41,8 +41,7 @@ static void m8xx_unmask_irq(unsigned int irq_nr)
41 word = irq_nr >> 5; 41 word = irq_nr >> 5;
42 42
43 ppc_cached_irq_mask[word] |= (1 << (31-bit)); 43 ppc_cached_irq_mask[word] |= (1 << (31-bit));
44 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 44 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
45 ppc_cached_irq_mask[word];
46} 45}
47 46
48static void m8xx_end_irq(unsigned int irq_nr) 47static void m8xx_end_irq(unsigned int irq_nr)
@@ -55,8 +54,7 @@ static void m8xx_end_irq(unsigned int irq_nr)
55 word = irq_nr >> 5; 54 word = irq_nr >> 5;
56 55
57 ppc_cached_irq_mask[word] |= (1 << (31-bit)); 56 ppc_cached_irq_mask[word] |= (1 << (31-bit));
58 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 57 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
59 ppc_cached_irq_mask[word];
60 } 58 }
61} 59}
62 60
@@ -69,9 +67,8 @@ static void m8xx_mask_and_ack(unsigned int irq_nr)
69 word = irq_nr >> 5; 67 word = irq_nr >> 5;
70 68
71 ppc_cached_irq_mask[word] &= ~(1 << (31-bit)); 69 ppc_cached_irq_mask[word] &= ~(1 << (31-bit));
72 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask = 70 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_simask, ppc_cached_irq_mask[word]);
73 ppc_cached_irq_mask[word]; 71 out_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend, 1 << (31-bit));
74 ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sipend = 1 << (31-bit);
75} 72}
76 73
77struct hw_interrupt_type ppc8xx_pic = { 74struct hw_interrupt_type ppc8xx_pic = {
@@ -93,7 +90,7 @@ m8xx_get_irq(struct pt_regs *regs)
93 /* For MPC8xx, read the SIVEC register and shift the bits down 90 /* For MPC8xx, read the SIVEC register and shift the bits down
94 * to get the irq number. 91 * to get the irq number.
95 */ 92 */
96 irq = ((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec >> 26; 93 irq = in_be32(&((immap_t *)IMAP_ADDR)->im_siu_conf.sc_sivec) >> 26;
97 94
98 /* 95 /*
99 * When we read the sivec without an interrupt to process, we will 96 * When we read the sivec without an interrupt to process, we will
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 52ba0c68078d..62ee86e80711 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -69,6 +69,9 @@ static int __init find_chip_by_name_and_id(char *name, u32 id)
69 matched[j++] = i; 69 matched[j++] = i;
70 i++; 70 i++;
71 } 71 }
72
73 ret = i;
74
72 if (j != 0) { 75 if (j != 0) {
73 for (i = 0; i < j; i++) { 76 for (i = 0; i < j; i++) {
74 if ((ppc_sys_specs[matched[i]].mask & id) == 77 if ((ppc_sys_specs[matched[i]].mask & id) ==
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 1d3869768f96..6f88ba93412b 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -18,6 +18,7 @@
18#include <asm/cpm2.h> 18#include <asm/cpm2.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20#include <asm/ppc_sys.h> 20#include <asm/ppc_sys.h>
21#include <asm/machdep.h>
21 22
22struct platform_device ppc_sys_platform_devices[] = { 23struct platform_device ppc_sys_platform_devices[] = {
23 [MPC82xx_CPM_FCC1] = { 24 [MPC82xx_CPM_FCC1] = {
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
index 8599850ca772..2c6364d9641f 100644
--- a/arch/ppc/syslib/prep_nvram.c
+++ b/arch/ppc/syslib/prep_nvram.c
@@ -22,14 +22,14 @@
22static char nvramData[MAX_PREP_NVRAM]; 22static char nvramData[MAX_PREP_NVRAM];
23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0]; 23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];
24 24
25unsigned char __prep prep_nvram_read_val(int addr) 25unsigned char prep_nvram_read_val(int addr)
26{ 26{
27 outb(addr, PREP_NVRAM_AS0); 27 outb(addr, PREP_NVRAM_AS0);
28 outb(addr>>8, PREP_NVRAM_AS1); 28 outb(addr>>8, PREP_NVRAM_AS1);
29 return inb(PREP_NVRAM_DATA); 29 return inb(PREP_NVRAM_DATA);
30} 30}
31 31
32void __prep prep_nvram_write_val(int addr, 32void prep_nvram_write_val(int addr,
33 unsigned char val) 33 unsigned char val)
34{ 34{
35 outb(addr, PREP_NVRAM_AS0); 35 outb(addr, PREP_NVRAM_AS0);
@@ -81,8 +81,7 @@ void __init init_prep_nvram(void)
81 } 81 }
82} 82}
83 83
84__prep 84char *prep_nvram_get_var(const char *name)
85char __prep *prep_nvram_get_var(const char *name)
86{ 85{
87 char *cp; 86 char *cp;
88 int namelen; 87 int namelen;
@@ -101,8 +100,7 @@ char __prep *prep_nvram_get_var(const char *name)
101 return NULL; 100 return NULL;
102} 101}
103 102
104__prep 103char *prep_nvram_first_var(void)
105char __prep *prep_nvram_first_var(void)
106{ 104{
107 if (nvram->Header.GELength == 0) { 105 if (nvram->Header.GELength == 0) {
108 return NULL; 106 return NULL;
@@ -112,8 +110,7 @@ char __prep *prep_nvram_first_var(void)
112 } 110 }
113} 111}
114 112
115__prep 113char *prep_nvram_next_var(char *name)
116char __prep *prep_nvram_next_var(char *name)
117{ 114{
118 char *cp; 115 char *cp;
119 116
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
index 2c64ed627475..278da6ee62ea 100644
--- a/arch/ppc/syslib/prom.c
+++ b/arch/ppc/syslib/prom.c
@@ -89,7 +89,7 @@ extern char cmd_line[512]; /* XXX */
89extern boot_infos_t *boot_infos; 89extern boot_infos_t *boot_infos;
90unsigned long dev_tree_size; 90unsigned long dev_tree_size;
91 91
92void __openfirmware 92void
93phys_call_rtas(int service, int nargs, int nret, ...) 93phys_call_rtas(int service, int nargs, int nret, ...)
94{ 94{
95 va_list list; 95 va_list list;
@@ -862,7 +862,7 @@ find_type_devices(const char *type)
862/* 862/*
863 * Returns all nodes linked together 863 * Returns all nodes linked together
864 */ 864 */
865struct device_node * __openfirmware 865struct device_node *
866find_all_nodes(void) 866find_all_nodes(void)
867{ 867{
868 struct device_node *head, **prevp, *np; 868 struct device_node *head, **prevp, *np;
@@ -1165,7 +1165,7 @@ get_property(struct device_node *np, const char *name, int *lenp)
1165/* 1165/*
1166 * Add a property to a node 1166 * Add a property to a node
1167 */ 1167 */
1168void __openfirmware 1168void
1169prom_add_property(struct device_node* np, struct property* prop) 1169prom_add_property(struct device_node* np, struct property* prop)
1170{ 1170{
1171 struct property **next = &np->properties; 1171 struct property **next = &np->properties;
@@ -1177,7 +1177,7 @@ prom_add_property(struct device_node* np, struct property* prop)
1177} 1177}
1178 1178
1179/* I quickly hacked that one, check against spec ! */ 1179/* I quickly hacked that one, check against spec ! */
1180static inline unsigned long __openfirmware 1180static inline unsigned long
1181bus_space_to_resource_flags(unsigned int bus_space) 1181bus_space_to_resource_flags(unsigned int bus_space)
1182{ 1182{
1183 u8 space = (bus_space >> 24) & 0xf; 1183 u8 space = (bus_space >> 24) & 0xf;
@@ -1194,7 +1194,7 @@ bus_space_to_resource_flags(unsigned int bus_space)
1194 } 1194 }
1195} 1195}
1196 1196
1197static struct resource* __openfirmware 1197static struct resource*
1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range) 1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1199{ 1199{
1200 unsigned long mask; 1200 unsigned long mask;
@@ -1224,7 +1224,7 @@ find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1224 * or other nodes attached to the root node. Ultimately, put some 1224 * or other nodes attached to the root node. Ultimately, put some
1225 * link to resources in the OF node. 1225 * link to resources in the OF node.
1226 */ 1226 */
1227struct resource* __openfirmware 1227struct resource*
1228request_OF_resource(struct device_node* node, int index, const char* name_postfix) 1228request_OF_resource(struct device_node* node, int index, const char* name_postfix)
1229{ 1229{
1230 struct pci_dev* pcidev; 1230 struct pci_dev* pcidev;
@@ -1280,7 +1280,7 @@ fail:
1280 return NULL; 1280 return NULL;
1281} 1281}
1282 1282
1283int __openfirmware 1283int
1284release_OF_resource(struct device_node* node, int index) 1284release_OF_resource(struct device_node* node, int index)
1285{ 1285{
1286 struct pci_dev* pcidev; 1286 struct pci_dev* pcidev;
@@ -1346,7 +1346,7 @@ release_OF_resource(struct device_node* node, int index)
1346} 1346}
1347 1347
1348#if 0 1348#if 0
1349void __openfirmware 1349void
1350print_properties(struct device_node *np) 1350print_properties(struct device_node *np)
1351{ 1351{
1352 struct property *pp; 1352 struct property *pp;
@@ -1400,7 +1400,7 @@ print_properties(struct device_node *np)
1400static DEFINE_SPINLOCK(rtas_lock); 1400static DEFINE_SPINLOCK(rtas_lock);
1401 1401
1402/* this can be called after setup -- Cort */ 1402/* this can be called after setup -- Cort */
1403int __openfirmware 1403int
1404call_rtas(const char *service, int nargs, int nret, 1404call_rtas(const char *service, int nargs, int nret,
1405 unsigned long *outputs, ...) 1405 unsigned long *outputs, ...)
1406{ 1406{
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 2cbcad278cef..47f04c71fe9c 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -17,6 +17,7 @@
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/xparameters.h> 18#include <asm/xparameters.h>
19#include <asm/ibm4xx.h> 19#include <asm/ibm4xx.h>
20#include <asm/machdep.h>
20 21
21/* No one else should require these constants, so define them locally here. */ 22/* No one else should require these constants, so define them locally here. */
22#define ISR 0 /* Interrupt Status Register */ 23#define ISR 0 /* Interrupt Status Register */
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index 507d4eeffe07..98612d420346 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -478,8 +478,9 @@ void *xmon_stdout;
478void *xmon_stderr; 478void *xmon_stderr;
479 479
480void 480void
481xmon_init(void) 481xmon_init(int arg)
482{ 482{
483 xmon_map_scc();
483} 484}
484 485
485int 486int
diff --git a/arch/ppc/xmon/xmon.c b/arch/ppc/xmon/xmon.c
index be7869e39465..66bfaa3211a2 100644
--- a/arch/ppc/xmon/xmon.c
+++ b/arch/ppc/xmon/xmon.c
@@ -148,9 +148,14 @@ Commands:\n\
148 r print registers\n\ 148 r print registers\n\
149 S print special registers\n\ 149 S print special registers\n\
150 t print backtrace\n\ 150 t print backtrace\n\
151 la lookup address in system.map\n\ 151 la lookup address\n\
152 ls lookup symbol in system.map\n\ 152 ls lookup symbol\n\
153 C checksum\n\
154 p call function with arguments\n\
155 T print time\n\
153 x exit monitor\n\ 156 x exit monitor\n\
157 zr reboot\n\
158 zh halt\n\
154"; 159";
155 160
156static int xmon_trace[NR_CPUS]; 161static int xmon_trace[NR_CPUS];
generated by cgit v1.2.2 (git 2.25.0) at 2025-01-06 21:28:12 -0500