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-rw-r--r--arch/ppc/Kconfig8
-rw-r--r--arch/ppc/Makefile7
-rw-r--r--arch/ppc/kernel/Makefile24
-rw-r--r--arch/ppc/kernel/asm-offsets.c1
-rw-r--r--arch/ppc/kernel/cpu_setup_6xx.S2
-rw-r--r--arch/ppc/kernel/cpu_setup_power4.S2
-rw-r--r--arch/ppc/kernel/cputable.c432
-rw-r--r--arch/ppc/kernel/fpu.S133
-rw-r--r--arch/ppc/kernel/head.S98
-rw-r--r--arch/ppc/kernel/head_44x.S14
-rw-r--r--arch/ppc/kernel/head_4xx.S52
-rw-r--r--arch/ppc/kernel/head_8xx.S42
-rw-r--r--arch/ppc/kernel/head_booke.h4
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S30
-rw-r--r--arch/ppc/kernel/idle.c1
-rw-r--r--arch/ppc/kernel/irq.c1
-rw-r--r--arch/ppc/kernel/misc.S150
-rw-r--r--arch/ppc/kernel/pci.c18
-rw-r--r--arch/ppc/kernel/perfmon.c10
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c29
-rw-r--r--arch/ppc/kernel/process.c6
-rw-r--r--arch/ppc/kernel/setup.c39
-rw-r--r--arch/ppc/kernel/smp.c2
-rw-r--r--arch/ppc/kernel/traps.c38
-rw-r--r--arch/ppc/kernel/vecemu.c345
-rw-r--r--arch/ppc/kernel/vector.S217
-rw-r--r--arch/ppc/kernel/vmlinux.lds.S26
-rw-r--r--arch/ppc/mm/init.c12
-rw-r--r--arch/ppc/oprofile/Kconfig23
-rw-r--r--arch/ppc/oprofile/Makefile14
-rw-r--r--arch/ppc/oprofile/common.c161
-rw-r--r--arch/ppc/oprofile/op_impl.h45
-rw-r--r--arch/ppc/oprofile/op_model_fsl_booke.c184
-rw-r--r--arch/ppc/platforms/4xx/ebony.c2
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h1
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.h1
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.h1
-rw-r--r--arch/ppc/platforms/chestnut.c1
-rw-r--r--arch/ppc/platforms/chrp_pci.c8
-rw-r--r--arch/ppc/platforms/chrp_setup.c24
-rw-r--r--arch/ppc/platforms/chrp_smp.c3
-rw-r--r--arch/ppc/platforms/chrp_time.c8
-rw-r--r--arch/ppc/platforms/ev64360.c1
-rw-r--r--arch/ppc/platforms/gemini_setup.c2
-rw-r--r--arch/ppc/platforms/katana.c1
-rw-r--r--arch/ppc/platforms/lite5200.c1
-rw-r--r--arch/ppc/platforms/lopec.c11
-rw-r--r--arch/ppc/platforms/pal4_setup.c1
-rw-r--r--arch/ppc/platforms/pmac_backlight.c16
-rw-r--r--arch/ppc/platforms/pmac_cpufreq.c36
-rw-r--r--arch/ppc/platforms/pmac_feature.c176
-rw-r--r--arch/ppc/platforms/pmac_nvram.c42
-rw-r--r--arch/ppc/platforms/pmac_pci.c22
-rw-r--r--arch/ppc/platforms/pmac_pic.c27
-rw-r--r--arch/ppc/platforms/pmac_setup.c15
-rw-r--r--arch/ppc/platforms/pmac_smp.c10
-rw-r--r--arch/ppc/platforms/pmac_time.c8
-rw-r--r--arch/ppc/platforms/pplus.c10
-rw-r--r--arch/ppc/platforms/prep_pci.c64
-rw-r--r--arch/ppc/platforms/prep_setup.c60
-rw-r--r--arch/ppc/platforms/radstone_ppc7d.c9
-rw-r--r--arch/ppc/platforms/residual.c2
-rw-r--r--arch/ppc/platforms/sandpoint.c11
-rw-r--r--arch/ppc/syslib/btext.c6
-rw-r--r--arch/ppc/syslib/gt64260_pic.c1
-rw-r--r--arch/ppc/syslib/ibm440gx_common.c6
-rw-r--r--arch/ppc/syslib/ibm44x_common.c2
-rw-r--r--arch/ppc/syslib/m8xx_setup.c1
-rw-r--r--arch/ppc/syslib/mpc52xx_pci.c1
-rw-r--r--arch/ppc/syslib/mpc83xx_devices.c1
-rw-r--r--arch/ppc/syslib/mv64360_pic.c1
-rw-r--r--arch/ppc/syslib/mv64x60_dbg.c1
-rw-r--r--arch/ppc/syslib/open_pic.c1
-rw-r--r--arch/ppc/syslib/open_pic2.c1
-rw-r--r--arch/ppc/syslib/ppc403_pic.c1
-rw-r--r--arch/ppc/syslib/ppc4xx_pic.c1
-rw-r--r--arch/ppc/syslib/ppc4xx_setup.c2
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c1
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c1
-rw-r--r--arch/ppc/syslib/pq2_devices.c1
-rw-r--r--arch/ppc/syslib/prep_nvram.c13
-rw-r--r--arch/ppc/syslib/prom.c18
-rw-r--r--arch/ppc/syslib/xilinx_pic.c1
-rw-r--r--arch/ppc/xmon/start.c3
84 files changed, 645 insertions, 2163 deletions
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 776941c75672..ed9c9727d75f 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -747,12 +747,12 @@ config CPM2
747 on it (826x, 827x, 8560). 747 on it (826x, 827x, 8560).
748 748
749config PPC_CHRP 749config PPC_CHRP
750 bool 750 bool " Common Hardware Reference Platform (CHRP) based machines"
751 depends on PPC_MULTIPLATFORM 751 depends on PPC_MULTIPLATFORM
752 default y 752 default y
753 753
754config PPC_PMAC 754config PPC_PMAC
755 bool 755 bool " Apple PowerMac based machines"
756 depends on PPC_MULTIPLATFORM 756 depends on PPC_MULTIPLATFORM
757 default y 757 default y
758 758
@@ -762,7 +762,7 @@ config PPC_PMAC64
762 default y 762 default y
763 763
764config PPC_PREP 764config PPC_PREP
765 bool 765 bool " PowerPC Reference Platform (PReP) based machines"
766 depends on PPC_MULTIPLATFORM 766 depends on PPC_MULTIPLATFORM
767 default y 767 default y
768 768
@@ -1368,7 +1368,7 @@ endmenu
1368 1368
1369source "lib/Kconfig" 1369source "lib/Kconfig"
1370 1370
1371source "arch/ppc/oprofile/Kconfig" 1371source "arch/powerpc/oprofile/Kconfig"
1372 1372
1373source "arch/ppc/Kconfig.debug" 1373source "arch/ppc/Kconfig.debug"
1374 1374
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 16e2675f3270..aedc9ae13b2a 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -57,9 +57,10 @@ head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o
57 57
58head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o 58head-$(CONFIG_6xx) += arch/ppc/kernel/idle_6xx.o
59head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o 59head-$(CONFIG_POWER4) += arch/ppc/kernel/idle_power4.o
60head-$(CONFIG_PPC_FPU) += arch/ppc/kernel/fpu.o 60head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
61 61
62core-y += arch/ppc/kernel/ arch/ppc/platforms/ \ 62core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
63 arch/ppc/platforms/ \
63 arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/ 64 arch/ppc/mm/ arch/ppc/lib/ arch/ppc/syslib/
64core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ 65core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
65core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/ 66core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/
@@ -71,7 +72,7 @@ drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
71drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/ 72drivers-$(CONFIG_4xx) += arch/ppc/4xx_io/
72drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/ 73drivers-$(CONFIG_CPM2) += arch/ppc/8260_io/
73 74
74drivers-$(CONFIG_OPROFILE) += arch/ppc/oprofile/ 75drivers-$(CONFIG_OPROFILE) += arch/powerpc/oprofile/
75 76
76BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm 77BOOT_TARGETS = zImage zImage.initrd znetboot znetboot.initrd vmlinux.sm
77 78
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index b1457a8a9c0f..59b6b62d1120 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -1,6 +1,7 @@
1# 1#
2# Makefile for the linux kernel. 2# Makefile for the linux kernel.
3# 3#
4ifneq ($(CONFIG_PPC_MERGE),y)
4 5
5extra-$(CONFIG_PPC_STD_MMU) := head.o 6extra-$(CONFIG_PPC_STD_MMU) := head.o
6extra-$(CONFIG_40x) := head_4xx.o 7extra-$(CONFIG_40x) := head_4xx.o
@@ -9,12 +10,11 @@ extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
9extra-$(CONFIG_8xx) := head_8xx.o 10extra-$(CONFIG_8xx) := head_8xx.o
10extra-$(CONFIG_6xx) += idle_6xx.o 11extra-$(CONFIG_6xx) += idle_6xx.o
11extra-$(CONFIG_POWER4) += idle_power4.o 12extra-$(CONFIG_POWER4) += idle_power4.o
12extra-$(CONFIG_PPC_FPU) += fpu.o
13extra-y += vmlinux.lds 13extra-y += vmlinux.lds
14 14
15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \ 15obj-y := entry.o traps.o irq.o idle.o time.o misc.o \
16 process.o signal.o ptrace.o align.o \ 16 process.o signal.o ptrace.o align.o \
17 semaphore.o syscalls.o setup.o \ 17 syscalls.o setup.o \
18 cputable.o ppc_htab.o perfmon.o 18 cputable.o ppc_htab.o perfmon.o
19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o 19obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o 20obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
@@ -25,7 +25,6 @@ obj-$(CONFIG_PCI) += pci.o
25obj-$(CONFIG_KGDB) += ppc-stub.o 25obj-$(CONFIG_KGDB) += ppc-stub.o
26obj-$(CONFIG_SMP) += smp.o smp-tbsync.o 26obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
27obj-$(CONFIG_TAU) += temp.o 27obj-$(CONFIG_TAU) += temp.o
28obj-$(CONFIG_ALTIVEC) += vecemu.o vector.o
29ifndef CONFIG_E200 28ifndef CONFIG_E200
30obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o 29obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
31endif 30endif
@@ -35,3 +34,22 @@ ifndef CONFIG_MATH_EMULATION
35obj-$(CONFIG_8xx) += softemu8xx.o 34obj-$(CONFIG_8xx) += softemu8xx.o
36endif 35endif
37 36
37# These are here while we do the architecture merge
38
39else
40obj-y := irq.o idle.o time.o \
41 signal.o ptrace.o align.o \
42 syscalls.o cputable.o perfmon.o
43obj-$(CONFIG_6xx) += l2cr.o cpu_setup_6xx.o
44obj-$(CONFIG_SOFTWARE_SUSPEND) += swsusp.o
45obj-$(CONFIG_MODULES) += module.o
46obj-$(CONFIG_NOT_COHERENT_CACHE) += dma-mapping.o
47obj-$(CONFIG_PCI) += pci.o
48obj-$(CONFIG_KGDB) += ppc-stub.o
49obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
50obj-$(CONFIG_TAU) += temp.o
51ifndef CONFIG_E200
52obj-$(CONFIG_FSL_BOOKE) += perfmon_fsl_booke.o
53endif
54obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
55endif
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index d9ad1d776d0e..7972db1f6570 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -141,6 +141,7 @@ main(void)
141 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address)); 141 DEFINE(pbe_orig_address, offsetof(struct pbe, orig_address));
142 DEFINE(pbe_next, offsetof(struct pbe, next)); 142 DEFINE(pbe_next, offsetof(struct pbe, next));
143 143
144 DEFINE(TASK_SIZE, TASK_SIZE);
144 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28); 145 DEFINE(NUM_USER_SEGMENTS, TASK_SIZE>>28);
145 return 0; 146 return 0;
146} 147}
diff --git a/arch/ppc/kernel/cpu_setup_6xx.S b/arch/ppc/kernel/cpu_setup_6xx.S
index ba396438ede3..a5333c07fc3c 100644
--- a/arch/ppc/kernel/cpu_setup_6xx.S
+++ b/arch/ppc/kernel/cpu_setup_6xx.S
@@ -17,8 +17,6 @@
17#include <asm/asm-offsets.h> 17#include <asm/asm-offsets.h>
18#include <asm/cache.h> 18#include <asm/cache.h>
19 19
20_GLOBAL(__setup_cpu_601)
21 blr
22_GLOBAL(__setup_cpu_603) 20_GLOBAL(__setup_cpu_603)
23 b setup_common_caches 21 b setup_common_caches
24_GLOBAL(__setup_cpu_604) 22_GLOBAL(__setup_cpu_604)
diff --git a/arch/ppc/kernel/cpu_setup_power4.S b/arch/ppc/kernel/cpu_setup_power4.S
index 7e4fbb653724..0abb5f25b2ca 100644
--- a/arch/ppc/kernel/cpu_setup_power4.S
+++ b/arch/ppc/kernel/cpu_setup_power4.S
@@ -63,8 +63,6 @@ _GLOBAL(__970_cpu_preinit)
63 isync 63 isync
64 blr 64 blr
65 65
66_GLOBAL(__setup_cpu_power4)
67 blr
68_GLOBAL(__setup_cpu_ppc970) 66_GLOBAL(__setup_cpu_ppc970)
69 mfspr r0,SPRN_HID0 67 mfspr r0,SPRN_HID0
70 li r11,5 /* clear DOZE and SLEEP */ 68 li r11,5 /* clear DOZE and SLEEP */
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 546e1ea4cafa..207d4dd059d9 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -14,23 +14,22 @@
14#include <linux/sched.h> 14#include <linux/sched.h>
15#include <linux/threads.h> 15#include <linux/threads.h>
16#include <linux/init.h> 16#include <linux/init.h>
17#include <linux/module.h>
18
19#include <asm/oprofile_impl.h>
17#include <asm/cputable.h> 20#include <asm/cputable.h>
18 21
19struct cpu_spec* cur_cpu_spec[NR_CPUS]; 22struct cpu_spec* cur_cpu_spec = NULL;
20 23
21extern void __setup_cpu_601(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 24extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
22extern void __setup_cpu_603(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 25extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
23extern void __setup_cpu_604(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 26extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
24extern void __setup_cpu_750(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 27extern void __setup_cpu_750cx(unsigned long offset, struct cpu_spec* spec);
25extern void __setup_cpu_750cx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 28extern void __setup_cpu_750fx(unsigned long offset, struct cpu_spec* spec);
26extern void __setup_cpu_750fx(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 29extern void __setup_cpu_7400(unsigned long offset, struct cpu_spec* spec);
27extern void __setup_cpu_7400(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 30extern void __setup_cpu_7410(unsigned long offset, struct cpu_spec* spec);
28extern void __setup_cpu_7410(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 31extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
29extern void __setup_cpu_745x(unsigned long offset, int cpu_nr, struct cpu_spec* spec); 32extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
30extern void __setup_cpu_power3(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
31extern void __setup_cpu_power4(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
32extern void __setup_cpu_ppc970(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
33extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spec* spec);
34 33
35#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \ 34#define CLASSIC_PPC (!defined(CONFIG_8xx) && !defined(CONFIG_4xx) && \
36 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \ 35 !defined(CONFIG_POWER3) && !defined(CONFIG_POWER4) && \
@@ -42,17 +41,6 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe
42#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \ 41#define COMMON_PPC (PPC_FEATURE_32 | PPC_FEATURE_HAS_FPU | \
43 PPC_FEATURE_HAS_MMU) 42 PPC_FEATURE_HAS_MMU)
44 43
45/* We only set the altivec features if the kernel was compiled with altivec
46 * support
47 */
48#ifdef CONFIG_ALTIVEC
49#define CPU_FTR_ALTIVEC_COMP CPU_FTR_ALTIVEC
50#define PPC_FEATURE_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
51#else
52#define CPU_FTR_ALTIVEC_COMP 0
53#define PPC_FEATURE_ALTIVEC_COMP 0
54#endif
55
56/* We only set the spe features if the kernel was compiled with 44/* We only set the spe features if the kernel was compiled with
57 * spe support 45 * spe support
58 */ 46 */
@@ -62,47 +50,23 @@ extern void __setup_cpu_generic(unsigned long offset, int cpu_nr, struct cpu_spe
62#define PPC_FEATURE_SPE_COMP 0 50#define PPC_FEATURE_SPE_COMP 0
63#endif 51#endif
64 52
65/* We need to mark all pages as being coherent if we're SMP or we
66 * have a 74[45]x and an MPC107 host bridge.
67 */
68#if defined(CONFIG_SMP) || defined(CONFIG_MPC10X_BRIDGE)
69#define CPU_FTR_COMMON CPU_FTR_NEED_COHERENT
70#else
71#define CPU_FTR_COMMON 0
72#endif
73
74/* The powersave features NAP & DOZE seems to confuse BDI when
75 debugging. So if a BDI is used, disable theses
76 */
77#ifndef CONFIG_BDI_SWITCH
78#define CPU_FTR_MAYBE_CAN_DOZE CPU_FTR_CAN_DOZE
79#define CPU_FTR_MAYBE_CAN_NAP CPU_FTR_CAN_NAP
80#else
81#define CPU_FTR_MAYBE_CAN_DOZE 0
82#define CPU_FTR_MAYBE_CAN_NAP 0
83#endif
84
85struct cpu_spec cpu_specs[] = { 53struct cpu_spec cpu_specs[] = {
86#if CLASSIC_PPC 54#if CLASSIC_PPC
87 { /* 601 */ 55 { /* 601 */
88 .pvr_mask = 0xffff0000, 56 .pvr_mask = 0xffff0000,
89 .pvr_value = 0x00010000, 57 .pvr_value = 0x00010000,
90 .cpu_name = "601", 58 .cpu_name = "601",
91 .cpu_features = CPU_FTR_COMMON | CPU_FTR_601 | 59 .cpu_features = CPU_FTRS_PPC601,
92 CPU_FTR_HPTE_TABLE,
93 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR | 60 .cpu_user_features = COMMON_PPC | PPC_FEATURE_601_INSTR |
94 PPC_FEATURE_UNIFIED_CACHE, 61 PPC_FEATURE_UNIFIED_CACHE,
95 .icache_bsize = 32, 62 .icache_bsize = 32,
96 .dcache_bsize = 32, 63 .dcache_bsize = 32,
97 .cpu_setup = __setup_cpu_601
98 }, 64 },
99 { /* 603 */ 65 { /* 603 */
100 .pvr_mask = 0xffff0000, 66 .pvr_mask = 0xffff0000,
101 .pvr_value = 0x00030000, 67 .pvr_value = 0x00030000,
102 .cpu_name = "603", 68 .cpu_name = "603",
103 .cpu_features = CPU_FTR_COMMON | 69 .cpu_features = CPU_FTRS_603,
104 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
105 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
106 .cpu_user_features = COMMON_PPC, 70 .cpu_user_features = COMMON_PPC,
107 .icache_bsize = 32, 71 .icache_bsize = 32,
108 .dcache_bsize = 32, 72 .dcache_bsize = 32,
@@ -112,9 +76,7 @@ struct cpu_spec cpu_specs[] = {
112 .pvr_mask = 0xffff0000, 76 .pvr_mask = 0xffff0000,
113 .pvr_value = 0x00060000, 77 .pvr_value = 0x00060000,
114 .cpu_name = "603e", 78 .cpu_name = "603e",
115 .cpu_features = CPU_FTR_COMMON | 79 .cpu_features = CPU_FTRS_603,
116 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
117 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
118 .cpu_user_features = COMMON_PPC, 80 .cpu_user_features = COMMON_PPC,
119 .icache_bsize = 32, 81 .icache_bsize = 32,
120 .dcache_bsize = 32, 82 .dcache_bsize = 32,
@@ -124,9 +86,7 @@ struct cpu_spec cpu_specs[] = {
124 .pvr_mask = 0xffff0000, 86 .pvr_mask = 0xffff0000,
125 .pvr_value = 0x00070000, 87 .pvr_value = 0x00070000,
126 .cpu_name = "603ev", 88 .cpu_name = "603ev",
127 .cpu_features = CPU_FTR_COMMON | 89 .cpu_features = CPU_FTRS_603,
128 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
129 CPU_FTR_USE_TB | CPU_FTR_MAYBE_CAN_NAP,
130 .cpu_user_features = COMMON_PPC, 90 .cpu_user_features = COMMON_PPC,
131 .icache_bsize = 32, 91 .icache_bsize = 32,
132 .dcache_bsize = 32, 92 .dcache_bsize = 32,
@@ -136,9 +96,7 @@ struct cpu_spec cpu_specs[] = {
136 .pvr_mask = 0xffff0000, 96 .pvr_mask = 0xffff0000,
137 .pvr_value = 0x00040000, 97 .pvr_value = 0x00040000,
138 .cpu_name = "604", 98 .cpu_name = "604",
139 .cpu_features = CPU_FTR_COMMON | 99 .cpu_features = CPU_FTRS_604,
140 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
141 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
142 .cpu_user_features = COMMON_PPC, 100 .cpu_user_features = COMMON_PPC,
143 .icache_bsize = 32, 101 .icache_bsize = 32,
144 .dcache_bsize = 32, 102 .dcache_bsize = 32,
@@ -149,9 +107,7 @@ struct cpu_spec cpu_specs[] = {
149 .pvr_mask = 0xfffff000, 107 .pvr_mask = 0xfffff000,
150 .pvr_value = 0x00090000, 108 .pvr_value = 0x00090000,
151 .cpu_name = "604e", 109 .cpu_name = "604e",
152 .cpu_features = CPU_FTR_COMMON | 110 .cpu_features = CPU_FTRS_604,
153 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
154 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
155 .cpu_user_features = COMMON_PPC, 111 .cpu_user_features = COMMON_PPC,
156 .icache_bsize = 32, 112 .icache_bsize = 32,
157 .dcache_bsize = 32, 113 .dcache_bsize = 32,
@@ -162,9 +118,7 @@ struct cpu_spec cpu_specs[] = {
162 .pvr_mask = 0xffff0000, 118 .pvr_mask = 0xffff0000,
163 .pvr_value = 0x00090000, 119 .pvr_value = 0x00090000,
164 .cpu_name = "604r", 120 .cpu_name = "604r",
165 .cpu_features = CPU_FTR_COMMON | 121 .cpu_features = CPU_FTRS_604,
166 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
167 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
168 .cpu_user_features = COMMON_PPC, 122 .cpu_user_features = COMMON_PPC,
169 .icache_bsize = 32, 123 .icache_bsize = 32,
170 .dcache_bsize = 32, 124 .dcache_bsize = 32,
@@ -175,9 +129,7 @@ struct cpu_spec cpu_specs[] = {
175 .pvr_mask = 0xffff0000, 129 .pvr_mask = 0xffff0000,
176 .pvr_value = 0x000a0000, 130 .pvr_value = 0x000a0000,
177 .cpu_name = "604ev", 131 .cpu_name = "604ev",
178 .cpu_features = CPU_FTR_COMMON | 132 .cpu_features = CPU_FTRS_604,
179 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
180 CPU_FTR_604_PERF_MON | CPU_FTR_HPTE_TABLE,
181 .cpu_user_features = COMMON_PPC, 133 .cpu_user_features = COMMON_PPC,
182 .icache_bsize = 32, 134 .icache_bsize = 32,
183 .dcache_bsize = 32, 135 .dcache_bsize = 32,
@@ -188,10 +140,7 @@ struct cpu_spec cpu_specs[] = {
188 .pvr_mask = 0xffffffff, 140 .pvr_mask = 0xffffffff,
189 .pvr_value = 0x00084202, 141 .pvr_value = 0x00084202,
190 .cpu_name = "740/750", 142 .cpu_name = "740/750",
191 .cpu_features = CPU_FTR_COMMON | 143 .cpu_features = CPU_FTRS_740_NOTAU,
192 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
193 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_HPTE_TABLE |
194 CPU_FTR_MAYBE_CAN_NAP,
195 .cpu_user_features = COMMON_PPC, 144 .cpu_user_features = COMMON_PPC,
196 .icache_bsize = 32, 145 .icache_bsize = 32,
197 .dcache_bsize = 32, 146 .dcache_bsize = 32,
@@ -202,10 +151,7 @@ struct cpu_spec cpu_specs[] = {
202 .pvr_mask = 0xfffffff0, 151 .pvr_mask = 0xfffffff0,
203 .pvr_value = 0x00080100, 152 .pvr_value = 0x00080100,
204 .cpu_name = "750CX", 153 .cpu_name = "750CX",
205 .cpu_features = CPU_FTR_COMMON | 154 .cpu_features = CPU_FTRS_750,
206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
208 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
209 .cpu_user_features = COMMON_PPC, 155 .cpu_user_features = COMMON_PPC,
210 .icache_bsize = 32, 156 .icache_bsize = 32,
211 .dcache_bsize = 32, 157 .dcache_bsize = 32,
@@ -216,10 +162,7 @@ struct cpu_spec cpu_specs[] = {
216 .pvr_mask = 0xfffffff0, 162 .pvr_mask = 0xfffffff0,
217 .pvr_value = 0x00082200, 163 .pvr_value = 0x00082200,
218 .cpu_name = "750CX", 164 .cpu_name = "750CX",
219 .cpu_features = CPU_FTR_COMMON | 165 .cpu_features = CPU_FTRS_750,
220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
221 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
222 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
223 .cpu_user_features = COMMON_PPC, 166 .cpu_user_features = COMMON_PPC,
224 .icache_bsize = 32, 167 .icache_bsize = 32,
225 .dcache_bsize = 32, 168 .dcache_bsize = 32,
@@ -230,10 +173,7 @@ struct cpu_spec cpu_specs[] = {
230 .pvr_mask = 0xfffffff0, 173 .pvr_mask = 0xfffffff0,
231 .pvr_value = 0x00082210, 174 .pvr_value = 0x00082210,
232 .cpu_name = "750CXe", 175 .cpu_name = "750CXe",
233 .cpu_features = CPU_FTR_COMMON | 176 .cpu_features = CPU_FTRS_750,
234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
236 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
237 .cpu_user_features = COMMON_PPC, 177 .cpu_user_features = COMMON_PPC,
238 .icache_bsize = 32, 178 .icache_bsize = 32,
239 .dcache_bsize = 32, 179 .dcache_bsize = 32,
@@ -244,10 +184,7 @@ struct cpu_spec cpu_specs[] = {
244 .pvr_mask = 0xffffffff, 184 .pvr_mask = 0xffffffff,
245 .pvr_value = 0x00083214, 185 .pvr_value = 0x00083214,
246 .cpu_name = "750CXe", 186 .cpu_name = "750CXe",
247 .cpu_features = CPU_FTR_COMMON | 187 .cpu_features = CPU_FTRS_750,
248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
249 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
250 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
251 .cpu_user_features = COMMON_PPC, 188 .cpu_user_features = COMMON_PPC,
252 .icache_bsize = 32, 189 .icache_bsize = 32,
253 .dcache_bsize = 32, 190 .dcache_bsize = 32,
@@ -258,10 +195,7 @@ struct cpu_spec cpu_specs[] = {
258 .pvr_mask = 0xfffff000, 195 .pvr_mask = 0xfffff000,
259 .pvr_value = 0x00083000, 196 .pvr_value = 0x00083000,
260 .cpu_name = "745/755", 197 .cpu_name = "745/755",
261 .cpu_features = CPU_FTR_COMMON | 198 .cpu_features = CPU_FTRS_750,
262 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
263 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
264 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
265 .cpu_user_features = COMMON_PPC, 199 .cpu_user_features = COMMON_PPC,
266 .icache_bsize = 32, 200 .icache_bsize = 32,
267 .dcache_bsize = 32, 201 .dcache_bsize = 32,
@@ -272,11 +206,7 @@ struct cpu_spec cpu_specs[] = {
272 .pvr_mask = 0xffffff00, 206 .pvr_mask = 0xffffff00,
273 .pvr_value = 0x70000100, 207 .pvr_value = 0x70000100,
274 .cpu_name = "750FX", 208 .cpu_name = "750FX",
275 .cpu_features = CPU_FTR_COMMON | 209 .cpu_features = CPU_FTRS_750FX1,
276 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
277 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
278 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
279 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_NO_DPM,
280 .cpu_user_features = COMMON_PPC, 210 .cpu_user_features = COMMON_PPC,
281 .icache_bsize = 32, 211 .icache_bsize = 32,
282 .dcache_bsize = 32, 212 .dcache_bsize = 32,
@@ -287,11 +217,7 @@ struct cpu_spec cpu_specs[] = {
287 .pvr_mask = 0xffffffff, 217 .pvr_mask = 0xffffffff,
288 .pvr_value = 0x70000200, 218 .pvr_value = 0x70000200,
289 .cpu_name = "750FX", 219 .cpu_name = "750FX",
290 .cpu_features = CPU_FTR_COMMON | 220 .cpu_features = CPU_FTRS_750FX2,
291 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
292 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
293 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
294 CPU_FTR_NO_DPM,
295 .cpu_user_features = COMMON_PPC, 221 .cpu_user_features = COMMON_PPC,
296 .icache_bsize = 32, 222 .icache_bsize = 32,
297 .dcache_bsize = 32, 223 .dcache_bsize = 32,
@@ -302,11 +228,7 @@ struct cpu_spec cpu_specs[] = {
302 .pvr_mask = 0xffff0000, 228 .pvr_mask = 0xffff0000,
303 .pvr_value = 0x70000000, 229 .pvr_value = 0x70000000,
304 .cpu_name = "750FX", 230 .cpu_name = "750FX",
305 .cpu_features = CPU_FTR_COMMON | 231 .cpu_features = CPU_FTRS_750FX,
306 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
307 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
308 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP |
309 CPU_FTR_DUAL_PLL_750FX | CPU_FTR_HAS_HIGH_BATS,
310 .cpu_user_features = COMMON_PPC, 232 .cpu_user_features = COMMON_PPC,
311 .icache_bsize = 32, 233 .icache_bsize = 32,
312 .dcache_bsize = 32, 234 .dcache_bsize = 32,
@@ -317,11 +239,7 @@ struct cpu_spec cpu_specs[] = {
317 .pvr_mask = 0xffff0000, 239 .pvr_mask = 0xffff0000,
318 .pvr_value = 0x70020000, 240 .pvr_value = 0x70020000,
319 .cpu_name = "750GX", 241 .cpu_name = "750GX",
320 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 242 .cpu_features = CPU_FTRS_750GX,
321 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
322 CPU_FTR_L2CR | CPU_FTR_TAU | CPU_FTR_HPTE_TABLE |
323 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_DUAL_PLL_750FX |
324 CPU_FTR_HAS_HIGH_BATS,
325 .cpu_user_features = COMMON_PPC, 243 .cpu_user_features = COMMON_PPC,
326 .icache_bsize = 32, 244 .icache_bsize = 32,
327 .dcache_bsize = 32, 245 .dcache_bsize = 32,
@@ -332,10 +250,7 @@ struct cpu_spec cpu_specs[] = {
332 .pvr_mask = 0xffff0000, 250 .pvr_mask = 0xffff0000,
333 .pvr_value = 0x00080000, 251 .pvr_value = 0x00080000,
334 .cpu_name = "740/750", 252 .cpu_name = "740/750",
335 .cpu_features = CPU_FTR_COMMON | 253 .cpu_features = CPU_FTRS_740,
336 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
337 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
338 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
339 .cpu_user_features = COMMON_PPC, 254 .cpu_user_features = COMMON_PPC,
340 .icache_bsize = 32, 255 .icache_bsize = 32,
341 .dcache_bsize = 32, 256 .dcache_bsize = 32,
@@ -346,11 +261,8 @@ struct cpu_spec cpu_specs[] = {
346 .pvr_mask = 0xffffffff, 261 .pvr_mask = 0xffffffff,
347 .pvr_value = 0x000c1101, 262 .pvr_value = 0x000c1101,
348 .cpu_name = "7400 (1.1)", 263 .cpu_name = "7400 (1.1)",
349 .cpu_features = CPU_FTR_COMMON | 264 .cpu_features = CPU_FTRS_7400_NOTAU,
350 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 265 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
351 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP |
352 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
353 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
354 .icache_bsize = 32, 266 .icache_bsize = 32,
355 .dcache_bsize = 32, 267 .dcache_bsize = 32,
356 .num_pmcs = 4, 268 .num_pmcs = 4,
@@ -360,12 +272,8 @@ struct cpu_spec cpu_specs[] = {
360 .pvr_mask = 0xffff0000, 272 .pvr_mask = 0xffff0000,
361 .pvr_value = 0x000c0000, 273 .pvr_value = 0x000c0000,
362 .cpu_name = "7400", 274 .cpu_name = "7400",
363 .cpu_features = CPU_FTR_COMMON | 275 .cpu_features = CPU_FTRS_7400,
364 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 276 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
365 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
366 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
367 CPU_FTR_MAYBE_CAN_NAP,
368 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
369 .icache_bsize = 32, 277 .icache_bsize = 32,
370 .dcache_bsize = 32, 278 .dcache_bsize = 32,
371 .num_pmcs = 4, 279 .num_pmcs = 4,
@@ -375,12 +283,8 @@ struct cpu_spec cpu_specs[] = {
375 .pvr_mask = 0xffff0000, 283 .pvr_mask = 0xffff0000,
376 .pvr_value = 0x800c0000, 284 .pvr_value = 0x800c0000,
377 .cpu_name = "7410", 285 .cpu_name = "7410",
378 .cpu_features = CPU_FTR_COMMON | 286 .cpu_features = CPU_FTRS_7400,
379 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 287 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
380 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
381 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
382 CPU_FTR_MAYBE_CAN_NAP,
383 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
384 .icache_bsize = 32, 288 .icache_bsize = 32,
385 .dcache_bsize = 32, 289 .dcache_bsize = 32,
386 .num_pmcs = 4, 290 .num_pmcs = 4,
@@ -390,12 +294,8 @@ struct cpu_spec cpu_specs[] = {
390 .pvr_mask = 0xffffffff, 294 .pvr_mask = 0xffffffff,
391 .pvr_value = 0x80000200, 295 .pvr_value = 0x80000200,
392 .cpu_name = "7450", 296 .cpu_name = "7450",
393 .cpu_features = CPU_FTR_COMMON | 297 .cpu_features = CPU_FTRS_7450_20,
394 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 298 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
395 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
396 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
397 CPU_FTR_NEED_COHERENT,
398 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
399 .icache_bsize = 32, 299 .icache_bsize = 32,
400 .dcache_bsize = 32, 300 .dcache_bsize = 32,
401 .num_pmcs = 6, 301 .num_pmcs = 6,
@@ -405,14 +305,8 @@ struct cpu_spec cpu_specs[] = {
405 .pvr_mask = 0xffffffff, 305 .pvr_mask = 0xffffffff,
406 .pvr_value = 0x80000201, 306 .pvr_value = 0x80000201,
407 .cpu_name = "7450", 307 .cpu_name = "7450",
408 .cpu_features = CPU_FTR_COMMON | 308 .cpu_features = CPU_FTRS_7450_21,
409 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 309 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
410 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
411 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
412 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
413 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
414 CPU_FTR_NEED_COHERENT,
415 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
416 .icache_bsize = 32, 310 .icache_bsize = 32,
417 .dcache_bsize = 32, 311 .dcache_bsize = 32,
418 .num_pmcs = 6, 312 .num_pmcs = 6,
@@ -422,13 +316,8 @@ struct cpu_spec cpu_specs[] = {
422 .pvr_mask = 0xffff0000, 316 .pvr_mask = 0xffff0000,
423 .pvr_value = 0x80000000, 317 .pvr_value = 0x80000000,
424 .cpu_name = "7450", 318 .cpu_name = "7450",
425 .cpu_features = CPU_FTR_COMMON | 319 .cpu_features = CPU_FTRS_7450_23,
426 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 320 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
427 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
428 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
429 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
430 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_NEED_COHERENT,
431 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
432 .icache_bsize = 32, 321 .icache_bsize = 32,
433 .dcache_bsize = 32, 322 .dcache_bsize = 32,
434 .num_pmcs = 6, 323 .num_pmcs = 6,
@@ -438,12 +327,8 @@ struct cpu_spec cpu_specs[] = {
438 .pvr_mask = 0xffffff00, 327 .pvr_mask = 0xffffff00,
439 .pvr_value = 0x80010100, 328 .pvr_value = 0x80010100,
440 .cpu_name = "7455", 329 .cpu_name = "7455",
441 .cpu_features = CPU_FTR_COMMON | 330 .cpu_features = CPU_FTRS_7455_1,
442 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 331 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
443 CPU_FTR_L2CR | CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
444 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
445 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
446 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
447 .icache_bsize = 32, 332 .icache_bsize = 32,
448 .dcache_bsize = 32, 333 .dcache_bsize = 32,
449 .num_pmcs = 6, 334 .num_pmcs = 6,
@@ -453,14 +338,8 @@ struct cpu_spec cpu_specs[] = {
453 .pvr_mask = 0xffffffff, 338 .pvr_mask = 0xffffffff,
454 .pvr_value = 0x80010200, 339 .pvr_value = 0x80010200,
455 .cpu_name = "7455", 340 .cpu_name = "7455",
456 .cpu_features = CPU_FTR_COMMON | 341 .cpu_features = CPU_FTRS_7455_20,
457 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 342 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
458 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
459 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
460 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
461 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_L3_DISABLE_NAP |
462 CPU_FTR_NEED_COHERENT | CPU_FTR_HAS_HIGH_BATS,
463 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
464 .icache_bsize = 32, 343 .icache_bsize = 32,
465 .dcache_bsize = 32, 344 .dcache_bsize = 32,
466 .num_pmcs = 6, 345 .num_pmcs = 6,
@@ -470,14 +349,8 @@ struct cpu_spec cpu_specs[] = {
470 .pvr_mask = 0xffff0000, 349 .pvr_mask = 0xffff0000,
471 .pvr_value = 0x80010000, 350 .pvr_value = 0x80010000,
472 .cpu_name = "7455", 351 .cpu_name = "7455",
473 .cpu_features = CPU_FTR_COMMON | 352 .cpu_features = CPU_FTRS_7455,
474 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 353 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
475 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
476 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
477 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
478 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
479 CPU_FTR_NEED_COHERENT,
480 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
481 .icache_bsize = 32, 354 .icache_bsize = 32,
482 .dcache_bsize = 32, 355 .dcache_bsize = 32,
483 .num_pmcs = 6, 356 .num_pmcs = 6,
@@ -487,14 +360,8 @@ struct cpu_spec cpu_specs[] = {
487 .pvr_mask = 0xffffffff, 360 .pvr_mask = 0xffffffff,
488 .pvr_value = 0x80020100, 361 .pvr_value = 0x80020100,
489 .cpu_name = "7447/7457", 362 .cpu_name = "7447/7457",
490 .cpu_features = CPU_FTR_COMMON | 363 .cpu_features = CPU_FTRS_7447_10,
491 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 364 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
492 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
493 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
494 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
495 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
496 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
497 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
498 .icache_bsize = 32, 365 .icache_bsize = 32,
499 .dcache_bsize = 32, 366 .dcache_bsize = 32,
500 .num_pmcs = 6, 367 .num_pmcs = 6,
@@ -504,14 +371,8 @@ struct cpu_spec cpu_specs[] = {
504 .pvr_mask = 0xffffffff, 371 .pvr_mask = 0xffffffff,
505 .pvr_value = 0x80020101, 372 .pvr_value = 0x80020101,
506 .cpu_name = "7447/7457", 373 .cpu_name = "7447/7457",
507 .cpu_features = CPU_FTR_COMMON | 374 .cpu_features = CPU_FTRS_7447_10,
508 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 375 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
509 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
510 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
511 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
512 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
513 CPU_FTR_NEED_COHERENT | CPU_FTR_NO_BTIC,
514 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
515 .icache_bsize = 32, 376 .icache_bsize = 32,
516 .dcache_bsize = 32, 377 .dcache_bsize = 32,
517 .num_pmcs = 6, 378 .num_pmcs = 6,
@@ -521,14 +382,8 @@ struct cpu_spec cpu_specs[] = {
521 .pvr_mask = 0xffff0000, 382 .pvr_mask = 0xffff0000,
522 .pvr_value = 0x80020000, 383 .pvr_value = 0x80020000,
523 .cpu_name = "7447/7457", 384 .cpu_name = "7447/7457",
524 .cpu_features = CPU_FTR_COMMON | 385 .cpu_features = CPU_FTRS_7447,
525 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 386 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
526 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
527 CPU_FTR_ALTIVEC_COMP | CPU_FTR_L3CR |
528 CPU_FTR_HPTE_TABLE | CPU_FTR_SPEC7450 |
529 CPU_FTR_NAP_DISABLE_L2_PR | CPU_FTR_HAS_HIGH_BATS |
530 CPU_FTR_NEED_COHERENT,
531 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
532 .icache_bsize = 32, 387 .icache_bsize = 32,
533 .dcache_bsize = 32, 388 .dcache_bsize = 32,
534 .num_pmcs = 6, 389 .num_pmcs = 6,
@@ -538,13 +393,8 @@ struct cpu_spec cpu_specs[] = {
538 .pvr_mask = 0xffff0000, 393 .pvr_mask = 0xffff0000,
539 .pvr_value = 0x80030000, 394 .pvr_value = 0x80030000,
540 .cpu_name = "7447A", 395 .cpu_name = "7447A",
541 .cpu_features = CPU_FTR_COMMON | 396 .cpu_features = CPU_FTRS_7447A,
542 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 397 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
543 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
544 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
545 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
546 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
547 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
548 .icache_bsize = 32, 398 .icache_bsize = 32,
549 .dcache_bsize = 32, 399 .dcache_bsize = 32,
550 .num_pmcs = 6, 400 .num_pmcs = 6,
@@ -554,13 +404,8 @@ struct cpu_spec cpu_specs[] = {
554 .pvr_mask = 0xffff0000, 404 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x80040000, 405 .pvr_value = 0x80040000,
556 .cpu_name = "7448", 406 .cpu_name = "7448",
557 .cpu_features = CPU_FTR_COMMON | 407 .cpu_features = CPU_FTRS_7447A,
558 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 408 .cpu_user_features = COMMON_PPC | PPC_FEATURE_HAS_ALTIVEC_COMP,
559 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
560 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
561 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
562 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
563 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
564 .icache_bsize = 32, 409 .icache_bsize = 32,
565 .dcache_bsize = 32, 410 .dcache_bsize = 32,
566 .num_pmcs = 6, 411 .num_pmcs = 6,
@@ -570,9 +415,7 @@ struct cpu_spec cpu_specs[] = {
570 .pvr_mask = 0x7fff0000, 415 .pvr_mask = 0x7fff0000,
571 .pvr_value = 0x00810000, 416 .pvr_value = 0x00810000,
572 .cpu_name = "82xx", 417 .cpu_name = "82xx",
573 .cpu_features = CPU_FTR_COMMON | 418 .cpu_features = CPU_FTRS_82XX,
574 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
575 CPU_FTR_USE_TB,
576 .cpu_user_features = COMMON_PPC, 419 .cpu_user_features = COMMON_PPC,
577 .icache_bsize = 32, 420 .icache_bsize = 32,
578 .dcache_bsize = 32, 421 .dcache_bsize = 32,
@@ -582,9 +425,7 @@ struct cpu_spec cpu_specs[] = {
582 .pvr_mask = 0x7fff0000, 425 .pvr_mask = 0x7fff0000,
583 .pvr_value = 0x00820000, 426 .pvr_value = 0x00820000,
584 .cpu_name = "G2_LE", 427 .cpu_name = "G2_LE",
585 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 428 .cpu_features = CPU_FTRS_G2_LE,
586 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
587 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
588 .cpu_user_features = COMMON_PPC, 429 .cpu_user_features = COMMON_PPC,
589 .icache_bsize = 32, 430 .icache_bsize = 32,
590 .dcache_bsize = 32, 431 .dcache_bsize = 32,
@@ -594,9 +435,7 @@ struct cpu_spec cpu_specs[] = {
594 .pvr_mask = 0x7fff0000, 435 .pvr_mask = 0x7fff0000,
595 .pvr_value = 0x00830000, 436 .pvr_value = 0x00830000,
596 .cpu_name = "e300", 437 .cpu_name = "e300",
597 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 438 .cpu_features = CPU_FTRS_E300,
598 CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB |
599 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_HAS_HIGH_BATS,
600 .cpu_user_features = COMMON_PPC, 439 .cpu_user_features = COMMON_PPC,
601 .icache_bsize = 32, 440 .icache_bsize = 32,
602 .dcache_bsize = 32, 441 .dcache_bsize = 32,
@@ -606,13 +445,10 @@ struct cpu_spec cpu_specs[] = {
606 .pvr_mask = 0x00000000, 445 .pvr_mask = 0x00000000,
607 .pvr_value = 0x00000000, 446 .pvr_value = 0x00000000,
608 .cpu_name = "(generic PPC)", 447 .cpu_name = "(generic PPC)",
609 .cpu_features = CPU_FTR_COMMON | 448 .cpu_features = CPU_FTRS_CLASSIC32,
610 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
611 CPU_FTR_HPTE_TABLE,
612 .cpu_user_features = COMMON_PPC, 449 .cpu_user_features = COMMON_PPC,
613 .icache_bsize = 32, 450 .icache_bsize = 32,
614 .dcache_bsize = 32, 451 .dcache_bsize = 32,
615 .cpu_setup = __setup_cpu_generic
616 }, 452 },
617#endif /* CLASSIC_PPC */ 453#endif /* CLASSIC_PPC */
618#ifdef CONFIG_PPC64BRIDGE 454#ifdef CONFIG_PPC64BRIDGE
@@ -620,94 +456,50 @@ struct cpu_spec cpu_specs[] = {
620 .pvr_mask = 0xffff0000, 456 .pvr_mask = 0xffff0000,
621 .pvr_value = 0x00400000, 457 .pvr_value = 0x00400000,
622 .cpu_name = "Power3 (630)", 458 .cpu_name = "Power3 (630)",
623 .cpu_features = CPU_FTR_COMMON | 459 .cpu_features = CPU_FTRS_POWER3_32,
624 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
625 CPU_FTR_HPTE_TABLE,
626 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, 460 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
627 .icache_bsize = 128, 461 .icache_bsize = 128,
628 .dcache_bsize = 128, 462 .dcache_bsize = 128,
629 .num_pmcs = 8, 463 .num_pmcs = 8,
630 .cpu_setup = __setup_cpu_power3
631 }, 464 },
632 { /* Power3+ */ 465 { /* Power3+ */
633 .pvr_mask = 0xffff0000, 466 .pvr_mask = 0xffff0000,
634 .pvr_value = 0x00410000, 467 .pvr_value = 0x00410000,
635 .cpu_name = "Power3 (630+)", 468 .cpu_name = "Power3 (630+)",
636 .cpu_features = CPU_FTR_COMMON | 469 .cpu_features = CPU_FTRS_POWER3_32,
637 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
638 CPU_FTR_HPTE_TABLE,
639 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, 470 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
640 .icache_bsize = 128, 471 .icache_bsize = 128,
641 .dcache_bsize = 128, 472 .dcache_bsize = 128,
642 .num_pmcs = 8, 473 .num_pmcs = 8,
643 .cpu_setup = __setup_cpu_power3
644 }, 474 },
645 { /* I-star */ 475 { /* I-star */
646 .pvr_mask = 0xffff0000, 476 .pvr_mask = 0xffff0000,
647 .pvr_value = 0x00360000, 477 .pvr_value = 0x00360000,
648 .cpu_name = "I-star", 478 .cpu_name = "I-star",
649 .cpu_features = CPU_FTR_COMMON | 479 .cpu_features = CPU_FTRS_POWER3_32,
650 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
651 CPU_FTR_HPTE_TABLE,
652 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, 480 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
653 .icache_bsize = 128, 481 .icache_bsize = 128,
654 .dcache_bsize = 128, 482 .dcache_bsize = 128,
655 .num_pmcs = 8, 483 .num_pmcs = 8,
656 .cpu_setup = __setup_cpu_power3
657 }, 484 },
658 { /* S-star */ 485 { /* S-star */
659 .pvr_mask = 0xffff0000, 486 .pvr_mask = 0xffff0000,
660 .pvr_value = 0x00370000, 487 .pvr_value = 0x00370000,
661 .cpu_name = "S-star", 488 .cpu_name = "S-star",
662 .cpu_features = CPU_FTR_COMMON | 489 .cpu_features = CPU_FTRS_POWER3_32,
663 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
664 CPU_FTR_HPTE_TABLE,
665 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64, 490 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
666 .icache_bsize = 128, 491 .icache_bsize = 128,
667 .dcache_bsize = 128, 492 .dcache_bsize = 128,
668 .num_pmcs = 8, 493 .num_pmcs = 8,
669 .cpu_setup = __setup_cpu_power3
670 }, 494 },
671#endif /* CONFIG_PPC64BRIDGE */ 495#endif /* CONFIG_PPC64BRIDGE */
672#ifdef CONFIG_POWER4 496#ifdef CONFIG_POWER4
673 { /* Power4 */
674 .pvr_mask = 0xffff0000,
675 .pvr_value = 0x00350000,
676 .cpu_name = "Power4",
677 .cpu_features = CPU_FTR_COMMON |
678 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
679 CPU_FTR_HPTE_TABLE,
680 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64,
681 .icache_bsize = 128,
682 .dcache_bsize = 128,
683 .num_pmcs = 8,
684 .cpu_setup = __setup_cpu_power4
685 },
686 { /* PPC970 */
687 .pvr_mask = 0xffff0000,
688 .pvr_value = 0x00390000,
689 .cpu_name = "PPC970",
690 .cpu_features = CPU_FTR_COMMON |
691 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
692 CPU_FTR_HPTE_TABLE |
693 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
694 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 |
695 PPC_FEATURE_ALTIVEC_COMP,
696 .icache_bsize = 128,
697 .dcache_bsize = 128,
698 .num_pmcs = 8,
699 .cpu_setup = __setup_cpu_ppc970
700 },
701 { /* PPC970FX */ 497 { /* PPC970FX */
702 .pvr_mask = 0xffff0000, 498 .pvr_mask = 0xffff0000,
703 .pvr_value = 0x003c0000, 499 .pvr_value = 0x003c0000,
704 .cpu_name = "PPC970FX", 500 .cpu_name = "PPC970FX",
705 .cpu_features = CPU_FTR_COMMON | 501 .cpu_features = CPU_FTRS_970_32,
706 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB | 502 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 | PPC_FEATURE_HAS_ALTIVEC_COMP,
707 CPU_FTR_HPTE_TABLE |
708 CPU_FTR_ALTIVEC_COMP | CPU_FTR_MAYBE_CAN_NAP,
709 .cpu_user_features = COMMON_PPC | PPC_FEATURE_64 |
710 PPC_FEATURE_ALTIVEC_COMP,
711 .icache_bsize = 128, 503 .icache_bsize = 128,
712 .dcache_bsize = 128, 504 .dcache_bsize = 128,
713 .num_pmcs = 8, 505 .num_pmcs = 8,
@@ -721,8 +513,7 @@ struct cpu_spec cpu_specs[] = {
721 .cpu_name = "8xx", 513 .cpu_name = "8xx",
722 /* CPU_FTR_MAYBE_CAN_DOZE is possible, 514 /* CPU_FTR_MAYBE_CAN_DOZE is possible,
723 * if the 8xx code is there.... */ 515 * if the 8xx code is there.... */
724 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 516 .cpu_features = CPU_FTRS_8XX,
725 CPU_FTR_USE_TB,
726 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 517 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
727 .icache_bsize = 16, 518 .icache_bsize = 16,
728 .dcache_bsize = 16, 519 .dcache_bsize = 16,
@@ -733,8 +524,7 @@ struct cpu_spec cpu_specs[] = {
733 .pvr_mask = 0xffffff00, 524 .pvr_mask = 0xffffff00,
734 .pvr_value = 0x00200200, 525 .pvr_value = 0x00200200,
735 .cpu_name = "403GC", 526 .cpu_name = "403GC",
736 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 527 .cpu_features = CPU_FTRS_40X,
737 CPU_FTR_USE_TB,
738 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 528 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
739 .icache_bsize = 16, 529 .icache_bsize = 16,
740 .dcache_bsize = 16, 530 .dcache_bsize = 16,
@@ -743,8 +533,7 @@ struct cpu_spec cpu_specs[] = {
743 .pvr_mask = 0xffffff00, 533 .pvr_mask = 0xffffff00,
744 .pvr_value = 0x00201400, 534 .pvr_value = 0x00201400,
745 .cpu_name = "403GCX", 535 .cpu_name = "403GCX",
746 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 536 .cpu_features = CPU_FTRS_40X,
747 CPU_FTR_USE_TB,
748 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 537 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
749 .icache_bsize = 16, 538 .icache_bsize = 16,
750 .dcache_bsize = 16, 539 .dcache_bsize = 16,
@@ -753,8 +542,7 @@ struct cpu_spec cpu_specs[] = {
753 .pvr_mask = 0xffff0000, 542 .pvr_mask = 0xffff0000,
754 .pvr_value = 0x00200000, 543 .pvr_value = 0x00200000,
755 .cpu_name = "403G ??", 544 .cpu_name = "403G ??",
756 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 545 .cpu_features = CPU_FTRS_40X,
757 CPU_FTR_USE_TB,
758 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 546 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
759 .icache_bsize = 16, 547 .icache_bsize = 16,
760 .dcache_bsize = 16, 548 .dcache_bsize = 16,
@@ -763,8 +551,7 @@ struct cpu_spec cpu_specs[] = {
763 .pvr_mask = 0xffff0000, 551 .pvr_mask = 0xffff0000,
764 .pvr_value = 0x40110000, 552 .pvr_value = 0x40110000,
765 .cpu_name = "405GP", 553 .cpu_name = "405GP",
766 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 554 .cpu_features = CPU_FTRS_40X,
767 CPU_FTR_USE_TB,
768 .cpu_user_features = PPC_FEATURE_32 | 555 .cpu_user_features = PPC_FEATURE_32 |
769 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 556 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
770 .icache_bsize = 32, 557 .icache_bsize = 32,
@@ -774,8 +561,7 @@ struct cpu_spec cpu_specs[] = {
774 .pvr_mask = 0xffff0000, 561 .pvr_mask = 0xffff0000,
775 .pvr_value = 0x40130000, 562 .pvr_value = 0x40130000,
776 .cpu_name = "STB03xxx", 563 .cpu_name = "STB03xxx",
777 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 564 .cpu_features = CPU_FTRS_40X,
778 CPU_FTR_USE_TB,
779 .cpu_user_features = PPC_FEATURE_32 | 565 .cpu_user_features = PPC_FEATURE_32 |
780 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 566 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
781 .icache_bsize = 32, 567 .icache_bsize = 32,
@@ -785,8 +571,7 @@ struct cpu_spec cpu_specs[] = {
785 .pvr_mask = 0xffff0000, 571 .pvr_mask = 0xffff0000,
786 .pvr_value = 0x41810000, 572 .pvr_value = 0x41810000,
787 .cpu_name = "STB04xxx", 573 .cpu_name = "STB04xxx",
788 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 574 .cpu_features = CPU_FTRS_40X,
789 CPU_FTR_USE_TB,
790 .cpu_user_features = PPC_FEATURE_32 | 575 .cpu_user_features = PPC_FEATURE_32 |
791 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 576 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
792 .icache_bsize = 32, 577 .icache_bsize = 32,
@@ -796,8 +581,7 @@ struct cpu_spec cpu_specs[] = {
796 .pvr_mask = 0xffff0000, 581 .pvr_mask = 0xffff0000,
797 .pvr_value = 0x41610000, 582 .pvr_value = 0x41610000,
798 .cpu_name = "NP405L", 583 .cpu_name = "NP405L",
799 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 584 .cpu_features = CPU_FTRS_40X,
800 CPU_FTR_USE_TB,
801 .cpu_user_features = PPC_FEATURE_32 | 585 .cpu_user_features = PPC_FEATURE_32 |
802 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 586 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
803 .icache_bsize = 32, 587 .icache_bsize = 32,
@@ -807,8 +591,7 @@ struct cpu_spec cpu_specs[] = {
807 .pvr_mask = 0xffff0000, 591 .pvr_mask = 0xffff0000,
808 .pvr_value = 0x40B10000, 592 .pvr_value = 0x40B10000,
809 .cpu_name = "NP4GS3", 593 .cpu_name = "NP4GS3",
810 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 594 .cpu_features = CPU_FTRS_40X,
811 CPU_FTR_USE_TB,
812 .cpu_user_features = PPC_FEATURE_32 | 595 .cpu_user_features = PPC_FEATURE_32 |
813 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 596 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
814 .icache_bsize = 32, 597 .icache_bsize = 32,
@@ -818,8 +601,7 @@ struct cpu_spec cpu_specs[] = {
818 .pvr_mask = 0xffff0000, 601 .pvr_mask = 0xffff0000,
819 .pvr_value = 0x41410000, 602 .pvr_value = 0x41410000,
820 .cpu_name = "NP405H", 603 .cpu_name = "NP405H",
821 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 604 .cpu_features = CPU_FTRS_40X,
822 CPU_FTR_USE_TB,
823 .cpu_user_features = PPC_FEATURE_32 | 605 .cpu_user_features = PPC_FEATURE_32 |
824 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 606 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
825 .icache_bsize = 32, 607 .icache_bsize = 32,
@@ -829,8 +611,7 @@ struct cpu_spec cpu_specs[] = {
829 .pvr_mask = 0xffff0000, 611 .pvr_mask = 0xffff0000,
830 .pvr_value = 0x50910000, 612 .pvr_value = 0x50910000,
831 .cpu_name = "405GPr", 613 .cpu_name = "405GPr",
832 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 614 .cpu_features = CPU_FTRS_40X,
833 CPU_FTR_USE_TB,
834 .cpu_user_features = PPC_FEATURE_32 | 615 .cpu_user_features = PPC_FEATURE_32 |
835 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 616 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
836 .icache_bsize = 32, 617 .icache_bsize = 32,
@@ -840,8 +621,7 @@ struct cpu_spec cpu_specs[] = {
840 .pvr_mask = 0xffff0000, 621 .pvr_mask = 0xffff0000,
841 .pvr_value = 0x51510000, 622 .pvr_value = 0x51510000,
842 .cpu_name = "STBx25xx", 623 .cpu_name = "STBx25xx",
843 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 624 .cpu_features = CPU_FTRS_40X,
844 CPU_FTR_USE_TB,
845 .cpu_user_features = PPC_FEATURE_32 | 625 .cpu_user_features = PPC_FEATURE_32 |
846 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 626 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
847 .icache_bsize = 32, 627 .icache_bsize = 32,
@@ -851,8 +631,7 @@ struct cpu_spec cpu_specs[] = {
851 .pvr_mask = 0xffff0000, 631 .pvr_mask = 0xffff0000,
852 .pvr_value = 0x41F10000, 632 .pvr_value = 0x41F10000,
853 .cpu_name = "405LP", 633 .cpu_name = "405LP",
854 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 634 .cpu_features = CPU_FTRS_40X,
855 CPU_FTR_USE_TB,
856 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 635 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
857 .icache_bsize = 32, 636 .icache_bsize = 32,
858 .dcache_bsize = 32, 637 .dcache_bsize = 32,
@@ -861,8 +640,7 @@ struct cpu_spec cpu_specs[] = {
861 .pvr_mask = 0xffff0000, 640 .pvr_mask = 0xffff0000,
862 .pvr_value = 0x20010000, 641 .pvr_value = 0x20010000,
863 .cpu_name = "Virtex-II Pro", 642 .cpu_name = "Virtex-II Pro",
864 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 643 .cpu_features = CPU_FTRS_40X,
865 CPU_FTR_USE_TB,
866 .cpu_user_features = PPC_FEATURE_32 | 644 .cpu_user_features = PPC_FEATURE_32 |
867 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 645 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
868 .icache_bsize = 32, 646 .icache_bsize = 32,
@@ -872,8 +650,7 @@ struct cpu_spec cpu_specs[] = {
872 .pvr_mask = 0xffff0000, 650 .pvr_mask = 0xffff0000,
873 .pvr_value = 0x51210000, 651 .pvr_value = 0x51210000,
874 .cpu_name = "405EP", 652 .cpu_name = "405EP",
875 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 653 .cpu_features = CPU_FTRS_40X,
876 CPU_FTR_USE_TB,
877 .cpu_user_features = PPC_FEATURE_32 | 654 .cpu_user_features = PPC_FEATURE_32 |
878 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC, 655 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_4xxMAC,
879 .icache_bsize = 32, 656 .icache_bsize = 32,
@@ -886,8 +663,7 @@ struct cpu_spec cpu_specs[] = {
886 .pvr_mask = 0xf0000fff, 663 .pvr_mask = 0xf0000fff,
887 .pvr_value = 0x40000850, 664 .pvr_value = 0x40000850,
888 .cpu_name = "440EP Rev. A", 665 .cpu_name = "440EP Rev. A",
889 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 666 .cpu_features = CPU_FTRS_44X,
890 CPU_FTR_USE_TB,
891 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ 667 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
892 .icache_bsize = 32, 668 .icache_bsize = 32,
893 .dcache_bsize = 32, 669 .dcache_bsize = 32,
@@ -896,8 +672,7 @@ struct cpu_spec cpu_specs[] = {
896 .pvr_mask = 0xf0000fff, 672 .pvr_mask = 0xf0000fff,
897 .pvr_value = 0x400008d3, 673 .pvr_value = 0x400008d3,
898 .cpu_name = "440EP Rev. B", 674 .cpu_name = "440EP Rev. B",
899 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 675 .cpu_features = CPU_FTRS_44X,
900 CPU_FTR_USE_TB,
901 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */ 676 .cpu_user_features = COMMON_PPC, /* 440EP has an FPU */
902 .icache_bsize = 32, 677 .icache_bsize = 32,
903 .dcache_bsize = 32, 678 .dcache_bsize = 32,
@@ -906,8 +681,7 @@ struct cpu_spec cpu_specs[] = {
906 .pvr_mask = 0xf0000fff, 681 .pvr_mask = 0xf0000fff,
907 .pvr_value = 0x40000440, 682 .pvr_value = 0x40000440,
908 .cpu_name = "440GP Rev. B", 683 .cpu_name = "440GP Rev. B",
909 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 684 .cpu_features = CPU_FTRS_44X,
910 CPU_FTR_USE_TB,
911 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 685 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
912 .icache_bsize = 32, 686 .icache_bsize = 32,
913 .dcache_bsize = 32, 687 .dcache_bsize = 32,
@@ -916,8 +690,7 @@ struct cpu_spec cpu_specs[] = {
916 .pvr_mask = 0xf0000fff, 690 .pvr_mask = 0xf0000fff,
917 .pvr_value = 0x40000481, 691 .pvr_value = 0x40000481,
918 .cpu_name = "440GP Rev. C", 692 .cpu_name = "440GP Rev. C",
919 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 693 .cpu_features = CPU_FTRS_44X,
920 CPU_FTR_USE_TB,
921 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 694 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
922 .icache_bsize = 32, 695 .icache_bsize = 32,
923 .dcache_bsize = 32, 696 .dcache_bsize = 32,
@@ -926,8 +699,7 @@ struct cpu_spec cpu_specs[] = {
926 .pvr_mask = 0xf0000fff, 699 .pvr_mask = 0xf0000fff,
927 .pvr_value = 0x50000850, 700 .pvr_value = 0x50000850,
928 .cpu_name = "440GX Rev. A", 701 .cpu_name = "440GX Rev. A",
929 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 702 .cpu_features = CPU_FTRS_44X,
930 CPU_FTR_USE_TB,
931 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 703 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
932 .icache_bsize = 32, 704 .icache_bsize = 32,
933 .dcache_bsize = 32, 705 .dcache_bsize = 32,
@@ -936,8 +708,7 @@ struct cpu_spec cpu_specs[] = {
936 .pvr_mask = 0xf0000fff, 708 .pvr_mask = 0xf0000fff,
937 .pvr_value = 0x50000851, 709 .pvr_value = 0x50000851,
938 .cpu_name = "440GX Rev. B", 710 .cpu_name = "440GX Rev. B",
939 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 711 .cpu_features = CPU_FTRS_44X,
940 CPU_FTR_USE_TB,
941 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 712 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
942 .icache_bsize = 32, 713 .icache_bsize = 32,
943 .dcache_bsize = 32, 714 .dcache_bsize = 32,
@@ -946,8 +717,7 @@ struct cpu_spec cpu_specs[] = {
946 .pvr_mask = 0xf0000fff, 717 .pvr_mask = 0xf0000fff,
947 .pvr_value = 0x50000892, 718 .pvr_value = 0x50000892,
948 .cpu_name = "440GX Rev. C", 719 .cpu_name = "440GX Rev. C",
949 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 720 .cpu_features = CPU_FTRS_44X,
950 CPU_FTR_USE_TB,
951 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 721 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
952 .icache_bsize = 32, 722 .icache_bsize = 32,
953 .dcache_bsize = 32, 723 .dcache_bsize = 32,
@@ -956,8 +726,7 @@ struct cpu_spec cpu_specs[] = {
956 .pvr_mask = 0xf0000fff, 726 .pvr_mask = 0xf0000fff,
957 .pvr_value = 0x50000894, 727 .pvr_value = 0x50000894,
958 .cpu_name = "440GX Rev. F", 728 .cpu_name = "440GX Rev. F",
959 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 729 .cpu_features = CPU_FTRS_44X,
960 CPU_FTR_USE_TB,
961 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 730 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
962 .icache_bsize = 32, 731 .icache_bsize = 32,
963 .dcache_bsize = 32, 732 .dcache_bsize = 32,
@@ -966,8 +735,7 @@ struct cpu_spec cpu_specs[] = {
966 .pvr_mask = 0xff000fff, 735 .pvr_mask = 0xff000fff,
967 .pvr_value = 0x53000891, 736 .pvr_value = 0x53000891,
968 .cpu_name = "440SP Rev. A", 737 .cpu_name = "440SP Rev. A",
969 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 738 .cpu_features = CPU_FTRS_44X,
970 CPU_FTR_USE_TB,
971 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU, 739 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
972 .icache_bsize = 32, 740 .icache_bsize = 32,
973 .dcache_bsize = 32, 741 .dcache_bsize = 32,
@@ -979,7 +747,7 @@ struct cpu_spec cpu_specs[] = {
979 .pvr_value = 0x81000000, 747 .pvr_value = 0x81000000,
980 .cpu_name = "e200z5", 748 .cpu_name = "e200z5",
981 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 749 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
982 .cpu_features = CPU_FTR_USE_TB, 750 .cpu_features = CPU_FTRS_E200,
983 .cpu_user_features = PPC_FEATURE_32 | 751 .cpu_user_features = PPC_FEATURE_32 |
984 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE | 752 PPC_FEATURE_HAS_MMU | PPC_FEATURE_HAS_EFP_SINGLE |
985 PPC_FEATURE_UNIFIED_CACHE, 753 PPC_FEATURE_UNIFIED_CACHE,
@@ -990,7 +758,7 @@ struct cpu_spec cpu_specs[] = {
990 .pvr_value = 0x81100000, 758 .pvr_value = 0x81100000,
991 .cpu_name = "e200z6", 759 .cpu_name = "e200z6",
992 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 760 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
993 .cpu_features = CPU_FTR_USE_TB, 761 .cpu_features = CPU_FTRS_E200,
994 .cpu_user_features = PPC_FEATURE_32 | 762 .cpu_user_features = PPC_FEATURE_32 |
995 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 763 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
996 PPC_FEATURE_HAS_EFP_SINGLE | 764 PPC_FEATURE_HAS_EFP_SINGLE |
@@ -1002,8 +770,7 @@ struct cpu_spec cpu_specs[] = {
1002 .pvr_value = 0x80200000, 770 .pvr_value = 0x80200000,
1003 .cpu_name = "e500", 771 .cpu_name = "e500",
1004 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 772 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1005 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 773 .cpu_features = CPU_FTRS_E500,
1006 CPU_FTR_USE_TB,
1007 .cpu_user_features = PPC_FEATURE_32 | 774 .cpu_user_features = PPC_FEATURE_32 |
1008 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 775 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
1009 PPC_FEATURE_HAS_EFP_SINGLE, 776 PPC_FEATURE_HAS_EFP_SINGLE,
@@ -1016,8 +783,7 @@ struct cpu_spec cpu_specs[] = {
1016 .pvr_value = 0x80210000, 783 .pvr_value = 0x80210000,
1017 .cpu_name = "e500v2", 784 .cpu_name = "e500v2",
1018 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ 785 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1019 .cpu_features = CPU_FTR_SPLIT_ID_CACHE | 786 .cpu_features = CPU_FTRS_E500_2,
1020 CPU_FTR_USE_TB | CPU_FTR_BIG_PHYS,
1021 .cpu_user_features = PPC_FEATURE_32 | 787 .cpu_user_features = PPC_FEATURE_32 |
1022 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP | 788 PPC_FEATURE_HAS_MMU | PPC_FEATURE_SPE_COMP |
1023 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE, 789 PPC_FEATURE_HAS_EFP_SINGLE | PPC_FEATURE_HAS_EFP_DOUBLE,
@@ -1031,7 +797,7 @@ struct cpu_spec cpu_specs[] = {
1031 .pvr_mask = 0x00000000, 797 .pvr_mask = 0x00000000,
1032 .pvr_value = 0x00000000, 798 .pvr_value = 0x00000000,
1033 .cpu_name = "(generic PPC)", 799 .cpu_name = "(generic PPC)",
1034 .cpu_features = CPU_FTR_COMMON, 800 .cpu_features = CPU_FTRS_GENERIC_32,
1035 .cpu_user_features = PPC_FEATURE_32, 801 .cpu_user_features = PPC_FEATURE_32,
1036 .icache_bsize = 32, 802 .icache_bsize = 32,
1037 .dcache_bsize = 32, 803 .dcache_bsize = 32,
diff --git a/arch/ppc/kernel/fpu.S b/arch/ppc/kernel/fpu.S
deleted file mode 100644
index 665d7d34304c..000000000000
--- a/arch/ppc/kernel/fpu.S
+++ /dev/null
@@ -1,133 +0,0 @@
1/*
2 * FPU support code, moved here from head.S so that it can be used
3 * by chips which use other head-whatever.S files.
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 *
10 */
11
12#include <linux/config.h>
13#include <asm/processor.h>
14#include <asm/page.h>
15#include <asm/mmu.h>
16#include <asm/pgtable.h>
17#include <asm/cputable.h>
18#include <asm/cache.h>
19#include <asm/thread_info.h>
20#include <asm/ppc_asm.h>
21#include <asm/asm-offsets.h>
22
23/*
24 * This task wants to use the FPU now.
25 * On UP, disable FP for the task which had the FPU previously,
26 * and save its floating-point registers in its thread_struct.
27 * Load up this task's FP registers from its thread_struct,
28 * enable the FPU for the current task and return to the task.
29 */
30 .globl load_up_fpu
31load_up_fpu:
32 mfmsr r5
33 ori r5,r5,MSR_FP
34#ifdef CONFIG_PPC64BRIDGE
35 clrldi r5,r5,1 /* turn off 64-bit mode */
36#endif /* CONFIG_PPC64BRIDGE */
37 SYNC
38 MTMSRD(r5) /* enable use of fpu now */
39 isync
40/*
41 * For SMP, we don't do lazy FPU switching because it just gets too
42 * horrendously complex, especially when a task switches from one CPU
43 * to another. Instead we call giveup_fpu in switch_to.
44 */
45#ifndef CONFIG_SMP
46 tophys(r6,0) /* get __pa constant */
47 addis r3,r6,last_task_used_math@ha
48 lwz r4,last_task_used_math@l(r3)
49 cmpwi 0,r4,0
50 beq 1f
51 add r4,r4,r6
52 addi r4,r4,THREAD /* want last_task_used_math->thread */
53 SAVE_32FPRS(0, r4)
54 mffs fr0
55 stfd fr0,THREAD_FPSCR-4(r4)
56 lwz r5,PT_REGS(r4)
57 add r5,r5,r6
58 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
59 li r10,MSR_FP|MSR_FE0|MSR_FE1
60 andc r4,r4,r10 /* disable FP for previous task */
61 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
621:
63#endif /* CONFIG_SMP */
64 /* enable use of FP after return */
65 mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
66 lwz r4,THREAD_FPEXC_MODE(r5)
67 ori r9,r9,MSR_FP /* enable FP for current */
68 or r9,r9,r4
69 lfd fr0,THREAD_FPSCR-4(r5)
70 mtfsf 0xff,fr0
71 REST_32FPRS(0, r5)
72#ifndef CONFIG_SMP
73 subi r4,r5,THREAD
74 sub r4,r4,r6
75 stw r4,last_task_used_math@l(r3)
76#endif /* CONFIG_SMP */
77 /* restore registers and return */
78 /* we haven't used ctr or xer or lr */
79 b fast_exception_return
80
81/*
82 * FP unavailable trap from kernel - print a message, but let
83 * the task use FP in the kernel until it returns to user mode.
84 */
85 .globl KernelFP
86KernelFP:
87 lwz r3,_MSR(r1)
88 ori r3,r3,MSR_FP
89 stw r3,_MSR(r1) /* enable use of FP after return */
90 lis r3,86f@h
91 ori r3,r3,86f@l
92 mr r4,r2 /* current */
93 lwz r5,_NIP(r1)
94 bl printk
95 b ret_from_except
9686: .string "floating point used in kernel (task=%p, pc=%x)\n"
97 .align 4,0
98
99/*
100 * giveup_fpu(tsk)
101 * Disable FP for the task given as the argument,
102 * and save the floating-point registers in its thread_struct.
103 * Enables the FPU for use in the kernel on return.
104 */
105 .globl giveup_fpu
106giveup_fpu:
107 mfmsr r5
108 ori r5,r5,MSR_FP
109 SYNC_601
110 ISYNC_601
111 MTMSRD(r5) /* enable use of fpu now */
112 SYNC_601
113 isync
114 cmpwi 0,r3,0
115 beqlr- /* if no previous owner, done */
116 addi r3,r3,THREAD /* want THREAD of task */
117 lwz r5,PT_REGS(r3)
118 cmpwi 0,r5,0
119 SAVE_32FPRS(0, r3)
120 mffs fr0
121 stfd fr0,THREAD_FPSCR-4(r3)
122 beq 1f
123 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
124 li r3,MSR_FP|MSR_FE0|MSR_FE1
125 andc r4,r4,r3 /* disable FP for previous task */
126 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
1271:
128#ifndef CONFIG_SMP
129 li r5,0
130 lis r4,last_task_used_math@ha
131 stw r5,last_task_used_math@l(r4)
132#endif /* CONFIG_SMP */
133 blr
diff --git a/arch/ppc/kernel/head.S b/arch/ppc/kernel/head.S
index 1960fb8c259c..5b43987a943b 100644
--- a/arch/ppc/kernel/head.S
+++ b/arch/ppc/kernel/head.S
@@ -349,12 +349,12 @@ i##n: \
349 349
350/* System reset */ 350/* System reset */
351/* core99 pmac starts the seconary here by changing the vector, and 351/* core99 pmac starts the seconary here by changing the vector, and
352 putting it back to what it was (UnknownException) when done. */ 352 putting it back to what it was (unknown_exception) when done. */
353#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP) 353#if defined(CONFIG_GEMINI) && defined(CONFIG_SMP)
354 . = 0x100 354 . = 0x100
355 b __secondary_start_gemini 355 b __secondary_start_gemini
356#else 356#else
357 EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) 357 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
358#endif 358#endif
359 359
360/* Machine check */ 360/* Machine check */
@@ -389,7 +389,7 @@ i##n: \
389 cmpwi cr1,r4,0 389 cmpwi cr1,r4,0
390 bne cr1,1f 390 bne cr1,1f
391#endif 391#endif
392 EXC_XFER_STD(0x200, MachineCheckException) 392 EXC_XFER_STD(0x200, machine_check_exception)
393#ifdef CONFIG_PPC_CHRP 393#ifdef CONFIG_PPC_CHRP
3941: b machine_check_in_rtas 3941: b machine_check_in_rtas
395#endif 395#endif
@@ -456,10 +456,10 @@ Alignment:
456 mfspr r5,SPRN_DSISR 456 mfspr r5,SPRN_DSISR
457 stw r5,_DSISR(r11) 457 stw r5,_DSISR(r11)
458 addi r3,r1,STACK_FRAME_OVERHEAD 458 addi r3,r1,STACK_FRAME_OVERHEAD
459 EXC_XFER_EE(0x600, AlignmentException) 459 EXC_XFER_EE(0x600, alignment_exception)
460 460
461/* Program check exception */ 461/* Program check exception */
462 EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) 462 EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
463 463
464/* Floating-point unavailable */ 464/* Floating-point unavailable */
465 . = 0x800 465 . = 0x800
@@ -467,13 +467,13 @@ FPUnavailable:
467 EXCEPTION_PROLOG 467 EXCEPTION_PROLOG
468 bne load_up_fpu /* if from user, just load it up */ 468 bne load_up_fpu /* if from user, just load it up */
469 addi r3,r1,STACK_FRAME_OVERHEAD 469 addi r3,r1,STACK_FRAME_OVERHEAD
470 EXC_XFER_EE_LITE(0x800, KernelFP) 470 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
471 471
472/* Decrementer */ 472/* Decrementer */
473 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) 473 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
474 474
475 EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) 475 EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
476 EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) 476 EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
477 477
478/* System call */ 478/* System call */
479 . = 0xc00 479 . = 0xc00
@@ -482,8 +482,8 @@ SystemCall:
482 EXC_XFER_EE_LITE(0xc00, DoSyscall) 482 EXC_XFER_EE_LITE(0xc00, DoSyscall)
483 483
484/* Single step - not used on 601 */ 484/* Single step - not used on 601 */
485 EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) 485 EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
486 EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) 486 EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
487 487
488/* 488/*
489 * The Altivec unavailable trap is at 0x0f20. Foo. 489 * The Altivec unavailable trap is at 0x0f20. Foo.
@@ -502,7 +502,7 @@ SystemCall:
502Trap_0f: 502Trap_0f:
503 EXCEPTION_PROLOG 503 EXCEPTION_PROLOG
504 addi r3,r1,STACK_FRAME_OVERHEAD 504 addi r3,r1,STACK_FRAME_OVERHEAD
505 EXC_XFER_EE(0xf00, UnknownException) 505 EXC_XFER_EE(0xf00, unknown_exception)
506 506
507/* 507/*
508 * Handle TLB miss for instruction on 603/603e. 508 * Handle TLB miss for instruction on 603/603e.
@@ -702,44 +702,44 @@ DataStoreTLBMiss:
702 rfi 702 rfi
703 703
704#ifndef CONFIG_ALTIVEC 704#ifndef CONFIG_ALTIVEC
705#define AltivecAssistException UnknownException 705#define altivec_assist_exception unknown_exception
706#endif 706#endif
707 707
708 EXCEPTION(0x1300, Trap_13, InstructionBreakpoint, EXC_XFER_EE) 708 EXCEPTION(0x1300, Trap_13, instruction_breakpoint_exception, EXC_XFER_EE)
709 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE) 709 EXCEPTION(0x1400, SMI, SMIException, EXC_XFER_EE)
710 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 710 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
711#ifdef CONFIG_POWER4 711#ifdef CONFIG_POWER4
712 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 712 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
713 EXCEPTION(0x1700, Trap_17, AltivecAssistException, EXC_XFER_EE) 713 EXCEPTION(0x1700, Trap_17, altivec_assist_exception, EXC_XFER_EE)
714 EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD) 714 EXCEPTION(0x1800, Trap_18, TAUException, EXC_XFER_STD)
715#else /* !CONFIG_POWER4 */ 715#else /* !CONFIG_POWER4 */
716 EXCEPTION(0x1600, Trap_16, AltivecAssistException, EXC_XFER_EE) 716 EXCEPTION(0x1600, Trap_16, altivec_assist_exception, EXC_XFER_EE)
717 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD) 717 EXCEPTION(0x1700, Trap_17, TAUException, EXC_XFER_STD)
718 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 718 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
719#endif /* CONFIG_POWER4 */ 719#endif /* CONFIG_POWER4 */
720 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 720 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
721 EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) 721 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
722 EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) 722 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
723 EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) 723 EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
724 EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) 724 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
725 EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) 725 EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
726 EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) 726 EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
727 EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE) 727 EXCEPTION(0x2000, RunMode, RunModeException, EXC_XFER_EE)
728 EXCEPTION(0x2100, Trap_21, UnknownException, EXC_XFER_EE) 728 EXCEPTION(0x2100, Trap_21, unknown_exception, EXC_XFER_EE)
729 EXCEPTION(0x2200, Trap_22, UnknownException, EXC_XFER_EE) 729 EXCEPTION(0x2200, Trap_22, unknown_exception, EXC_XFER_EE)
730 EXCEPTION(0x2300, Trap_23, UnknownException, EXC_XFER_EE) 730 EXCEPTION(0x2300, Trap_23, unknown_exception, EXC_XFER_EE)
731 EXCEPTION(0x2400, Trap_24, UnknownException, EXC_XFER_EE) 731 EXCEPTION(0x2400, Trap_24, unknown_exception, EXC_XFER_EE)
732 EXCEPTION(0x2500, Trap_25, UnknownException, EXC_XFER_EE) 732 EXCEPTION(0x2500, Trap_25, unknown_exception, EXC_XFER_EE)
733 EXCEPTION(0x2600, Trap_26, UnknownException, EXC_XFER_EE) 733 EXCEPTION(0x2600, Trap_26, unknown_exception, EXC_XFER_EE)
734 EXCEPTION(0x2700, Trap_27, UnknownException, EXC_XFER_EE) 734 EXCEPTION(0x2700, Trap_27, unknown_exception, EXC_XFER_EE)
735 EXCEPTION(0x2800, Trap_28, UnknownException, EXC_XFER_EE) 735 EXCEPTION(0x2800, Trap_28, unknown_exception, EXC_XFER_EE)
736 EXCEPTION(0x2900, Trap_29, UnknownException, EXC_XFER_EE) 736 EXCEPTION(0x2900, Trap_29, unknown_exception, EXC_XFER_EE)
737 EXCEPTION(0x2a00, Trap_2a, UnknownException, EXC_XFER_EE) 737 EXCEPTION(0x2a00, Trap_2a, unknown_exception, EXC_XFER_EE)
738 EXCEPTION(0x2b00, Trap_2b, UnknownException, EXC_XFER_EE) 738 EXCEPTION(0x2b00, Trap_2b, unknown_exception, EXC_XFER_EE)
739 EXCEPTION(0x2c00, Trap_2c, UnknownException, EXC_XFER_EE) 739 EXCEPTION(0x2c00, Trap_2c, unknown_exception, EXC_XFER_EE)
740 EXCEPTION(0x2d00, Trap_2d, UnknownException, EXC_XFER_EE) 740 EXCEPTION(0x2d00, Trap_2d, unknown_exception, EXC_XFER_EE)
741 EXCEPTION(0x2e00, Trap_2e, UnknownException, EXC_XFER_EE) 741 EXCEPTION(0x2e00, Trap_2e, unknown_exception, EXC_XFER_EE)
742 EXCEPTION(0x2f00, MOLTrampoline, UnknownException, EXC_XFER_EE_LITE) 742 EXCEPTION(0x2f00, MOLTrampoline, unknown_exception, EXC_XFER_EE_LITE)
743 743
744 .globl mol_trampoline 744 .globl mol_trampoline
745 .set mol_trampoline, i0x2f00 745 .set mol_trampoline, i0x2f00
@@ -751,7 +751,7 @@ AltiVecUnavailable:
751#ifdef CONFIG_ALTIVEC 751#ifdef CONFIG_ALTIVEC
752 bne load_up_altivec /* if from user, just load it up */ 752 bne load_up_altivec /* if from user, just load it up */
753#endif /* CONFIG_ALTIVEC */ 753#endif /* CONFIG_ALTIVEC */
754 EXC_XFER_EE_LITE(0xf20, AltivecUnavailException) 754 EXC_XFER_EE_LITE(0xf20, altivec_unavailable_exception)
755 755
756#ifdef CONFIG_PPC64BRIDGE 756#ifdef CONFIG_PPC64BRIDGE
757DataAccess: 757DataAccess:
@@ -767,12 +767,12 @@ DataSegment:
767 addi r3,r1,STACK_FRAME_OVERHEAD 767 addi r3,r1,STACK_FRAME_OVERHEAD
768 mfspr r4,SPRN_DAR 768 mfspr r4,SPRN_DAR
769 stw r4,_DAR(r11) 769 stw r4,_DAR(r11)
770 EXC_XFER_STD(0x380, UnknownException) 770 EXC_XFER_STD(0x380, unknown_exception)
771 771
772InstructionSegment: 772InstructionSegment:
773 EXCEPTION_PROLOG 773 EXCEPTION_PROLOG
774 addi r3,r1,STACK_FRAME_OVERHEAD 774 addi r3,r1,STACK_FRAME_OVERHEAD
775 EXC_XFER_STD(0x480, UnknownException) 775 EXC_XFER_STD(0x480, unknown_exception)
776#endif /* CONFIG_PPC64BRIDGE */ 776#endif /* CONFIG_PPC64BRIDGE */
777 777
778#ifdef CONFIG_ALTIVEC 778#ifdef CONFIG_ALTIVEC
@@ -804,7 +804,7 @@ load_up_altivec:
804 beq 1f 804 beq 1f
805 add r4,r4,r6 805 add r4,r4,r6
806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */ 806 addi r4,r4,THREAD /* want THREAD of last_task_used_altivec */
807 SAVE_32VR(0,r10,r4) 807 SAVE_32VRS(0,r10,r4)
808 mfvscr vr0 808 mfvscr vr0
809 li r10,THREAD_VSCR 809 li r10,THREAD_VSCR
810 stvx vr0,r10,r4 810 stvx vr0,r10,r4
@@ -824,7 +824,7 @@ load_up_altivec:
824 stw r4,THREAD_USED_VR(r5) 824 stw r4,THREAD_USED_VR(r5)
825 lvx vr0,r10,r5 825 lvx vr0,r10,r5
826 mtvscr vr0 826 mtvscr vr0
827 REST_32VR(0,r10,r5) 827 REST_32VRS(0,r10,r5)
828#ifndef CONFIG_SMP 828#ifndef CONFIG_SMP
829 subi r4,r5,THREAD 829 subi r4,r5,THREAD
830 sub r4,r4,r6 830 sub r4,r4,r6
@@ -870,7 +870,7 @@ giveup_altivec:
870 addi r3,r3,THREAD /* want THREAD of task */ 870 addi r3,r3,THREAD /* want THREAD of task */
871 lwz r5,PT_REGS(r3) 871 lwz r5,PT_REGS(r3)
872 cmpwi 0,r5,0 872 cmpwi 0,r5,0
873 SAVE_32VR(0, r4, r3) 873 SAVE_32VRS(0, r4, r3)
874 mfvscr vr0 874 mfvscr vr0
875 li r4,THREAD_VSCR 875 li r4,THREAD_VSCR
876 stvx vr0,r4,r3 876 stvx vr0,r4,r3
@@ -1059,7 +1059,6 @@ __secondary_start:
1059 1059
1060 lis r3,-KERNELBASE@h 1060 lis r3,-KERNELBASE@h
1061 mr r4,r24 1061 mr r4,r24
1062 bl identify_cpu
1063 bl call_setup_cpu /* Call setup_cpu for this CPU */ 1062 bl call_setup_cpu /* Call setup_cpu for this CPU */
1064#ifdef CONFIG_6xx 1063#ifdef CONFIG_6xx
1065 lis r3,-KERNELBASE@h 1064 lis r3,-KERNELBASE@h
@@ -1109,11 +1108,6 @@ __secondary_start:
1109 * Those generic dummy functions are kept for CPUs not 1108 * Those generic dummy functions are kept for CPUs not
1110 * included in CONFIG_6xx 1109 * included in CONFIG_6xx
1111 */ 1110 */
1112_GLOBAL(__setup_cpu_power3)
1113 blr
1114_GLOBAL(__setup_cpu_generic)
1115 blr
1116
1117#if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4) 1111#if !defined(CONFIG_6xx) && !defined(CONFIG_POWER4)
1118_GLOBAL(__save_cpu_setup) 1112_GLOBAL(__save_cpu_setup)
1119 blr 1113 blr
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 599245b0407e..b1b9dc08abca 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -309,13 +309,13 @@ skpinv: addi r4,r4,1 /* Increment */
309 309
310interrupt_base: 310interrupt_base:
311 /* Critical Input Interrupt */ 311 /* Critical Input Interrupt */
312 CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) 312 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
313 313
314 /* Machine Check Interrupt */ 314 /* Machine Check Interrupt */
315#ifdef CONFIG_440A 315#ifdef CONFIG_440A
316 MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 316 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
317#else 317#else
318 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 318 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
319#endif 319#endif
320 320
321 /* Data Storage Interrupt */ 321 /* Data Storage Interrupt */
@@ -442,7 +442,7 @@ interrupt_base:
442#ifdef CONFIG_PPC_FPU 442#ifdef CONFIG_PPC_FPU
443 FP_UNAVAILABLE_EXCEPTION 443 FP_UNAVAILABLE_EXCEPTION
444#else 444#else
445 EXCEPTION(0x2010, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) 445 EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
446#endif 446#endif
447 447
448 /* System Call Interrupt */ 448 /* System Call Interrupt */
@@ -451,21 +451,21 @@ interrupt_base:
451 EXC_XFER_EE_LITE(0x0c00, DoSyscall) 451 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
452 452
453 /* Auxillary Processor Unavailable Interrupt */ 453 /* Auxillary Processor Unavailable Interrupt */
454 EXCEPTION(0x2020, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) 454 EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
455 455
456 /* Decrementer Interrupt */ 456 /* Decrementer Interrupt */
457 DECREMENTER_EXCEPTION 457 DECREMENTER_EXCEPTION
458 458
459 /* Fixed Internal Timer Interrupt */ 459 /* Fixed Internal Timer Interrupt */
460 /* TODO: Add FIT support */ 460 /* TODO: Add FIT support */
461 EXCEPTION(0x1010, FixedIntervalTimer, UnknownException, EXC_XFER_EE) 461 EXCEPTION(0x1010, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
462 462
463 /* Watchdog Timer Interrupt */ 463 /* Watchdog Timer Interrupt */
464 /* TODO: Add watchdog support */ 464 /* TODO: Add watchdog support */
465#ifdef CONFIG_BOOKE_WDT 465#ifdef CONFIG_BOOKE_WDT
466 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException) 466 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, WatchdogException)
467#else 467#else
468 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, UnknownException) 468 CRITICAL_EXCEPTION(0x1020, WatchdogTimer, unknown_exception)
469#endif 469#endif
470 470
471 /* Data TLB Error Interrupt */ 471 /* Data TLB Error Interrupt */
diff --git a/arch/ppc/kernel/head_4xx.S b/arch/ppc/kernel/head_4xx.S
index 8562b807b37c..5772ce97e24e 100644
--- a/arch/ppc/kernel/head_4xx.S
+++ b/arch/ppc/kernel/head_4xx.S
@@ -245,12 +245,12 @@ label:
245/* 245/*
246 * 0x0100 - Critical Interrupt Exception 246 * 0x0100 - Critical Interrupt Exception
247 */ 247 */
248 CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, UnknownException) 248 CRITICAL_EXCEPTION(0x0100, CriticalInterrupt, unknown_exception)
249 249
250/* 250/*
251 * 0x0200 - Machine Check Exception 251 * 0x0200 - Machine Check Exception
252 */ 252 */
253 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 253 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
254 254
255/* 255/*
256 * 0x0300 - Data Storage Exception 256 * 0x0300 - Data Storage Exception
@@ -405,7 +405,7 @@ label:
405 mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */ 405 mfspr r4,SPRN_DEAR /* Grab the DEAR and save it */
406 stw r4,_DEAR(r11) 406 stw r4,_DEAR(r11)
407 addi r3,r1,STACK_FRAME_OVERHEAD 407 addi r3,r1,STACK_FRAME_OVERHEAD
408 EXC_XFER_EE(0x600, AlignmentException) 408 EXC_XFER_EE(0x600, alignment_exception)
409 409
410/* 0x0700 - Program Exception */ 410/* 0x0700 - Program Exception */
411 START_EXCEPTION(0x0700, ProgramCheck) 411 START_EXCEPTION(0x0700, ProgramCheck)
@@ -413,21 +413,21 @@ label:
413 mfspr r4,SPRN_ESR /* Grab the ESR and save it */ 413 mfspr r4,SPRN_ESR /* Grab the ESR and save it */
414 stw r4,_ESR(r11) 414 stw r4,_ESR(r11)
415 addi r3,r1,STACK_FRAME_OVERHEAD 415 addi r3,r1,STACK_FRAME_OVERHEAD
416 EXC_XFER_STD(0x700, ProgramCheckException) 416 EXC_XFER_STD(0x700, program_check_exception)
417 417
418 EXCEPTION(0x0800, Trap_08, UnknownException, EXC_XFER_EE) 418 EXCEPTION(0x0800, Trap_08, unknown_exception, EXC_XFER_EE)
419 EXCEPTION(0x0900, Trap_09, UnknownException, EXC_XFER_EE) 419 EXCEPTION(0x0900, Trap_09, unknown_exception, EXC_XFER_EE)
420 EXCEPTION(0x0A00, Trap_0A, UnknownException, EXC_XFER_EE) 420 EXCEPTION(0x0A00, Trap_0A, unknown_exception, EXC_XFER_EE)
421 EXCEPTION(0x0B00, Trap_0B, UnknownException, EXC_XFER_EE) 421 EXCEPTION(0x0B00, Trap_0B, unknown_exception, EXC_XFER_EE)
422 422
423/* 0x0C00 - System Call Exception */ 423/* 0x0C00 - System Call Exception */
424 START_EXCEPTION(0x0C00, SystemCall) 424 START_EXCEPTION(0x0C00, SystemCall)
425 NORMAL_EXCEPTION_PROLOG 425 NORMAL_EXCEPTION_PROLOG
426 EXC_XFER_EE_LITE(0xc00, DoSyscall) 426 EXC_XFER_EE_LITE(0xc00, DoSyscall)
427 427
428 EXCEPTION(0x0D00, Trap_0D, UnknownException, EXC_XFER_EE) 428 EXCEPTION(0x0D00, Trap_0D, unknown_exception, EXC_XFER_EE)
429 EXCEPTION(0x0E00, Trap_0E, UnknownException, EXC_XFER_EE) 429 EXCEPTION(0x0E00, Trap_0E, unknown_exception, EXC_XFER_EE)
430 EXCEPTION(0x0F00, Trap_0F, UnknownException, EXC_XFER_EE) 430 EXCEPTION(0x0F00, Trap_0F, unknown_exception, EXC_XFER_EE)
431 431
432/* 0x1000 - Programmable Interval Timer (PIT) Exception */ 432/* 0x1000 - Programmable Interval Timer (PIT) Exception */
433 START_EXCEPTION(0x1000, Decrementer) 433 START_EXCEPTION(0x1000, Decrementer)
@@ -444,14 +444,14 @@ label:
444 444
445/* 0x1010 - Fixed Interval Timer (FIT) Exception 445/* 0x1010 - Fixed Interval Timer (FIT) Exception
446*/ 446*/
447 STND_EXCEPTION(0x1010, FITException, UnknownException) 447 STND_EXCEPTION(0x1010, FITException, unknown_exception)
448 448
449/* 0x1020 - Watchdog Timer (WDT) Exception 449/* 0x1020 - Watchdog Timer (WDT) Exception
450*/ 450*/
451#ifdef CONFIG_BOOKE_WDT 451#ifdef CONFIG_BOOKE_WDT
452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException) 452 CRITICAL_EXCEPTION(0x1020, WDTException, WatchdogException)
453#else 453#else
454 CRITICAL_EXCEPTION(0x1020, WDTException, UnknownException) 454 CRITICAL_EXCEPTION(0x1020, WDTException, unknown_exception)
455#endif 455#endif
456#endif 456#endif
457 457
@@ -656,25 +656,25 @@ label:
656 mfspr r10, SPRN_SPRG0 656 mfspr r10, SPRN_SPRG0
657 b InstructionAccess 657 b InstructionAccess
658 658
659 EXCEPTION(0x1300, Trap_13, UnknownException, EXC_XFER_EE) 659 EXCEPTION(0x1300, Trap_13, unknown_exception, EXC_XFER_EE)
660 EXCEPTION(0x1400, Trap_14, UnknownException, EXC_XFER_EE) 660 EXCEPTION(0x1400, Trap_14, unknown_exception, EXC_XFER_EE)
661 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 661 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
662 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 662 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
663#ifdef CONFIG_IBM405_ERR51 663#ifdef CONFIG_IBM405_ERR51
664 /* 405GP errata 51 */ 664 /* 405GP errata 51 */
665 START_EXCEPTION(0x1700, Trap_17) 665 START_EXCEPTION(0x1700, Trap_17)
666 b DTLBMiss 666 b DTLBMiss
667#else 667#else
668 EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) 668 EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
669#endif 669#endif
670 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 670 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
671 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 671 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
672 EXCEPTION(0x1A00, Trap_1A, UnknownException, EXC_XFER_EE) 672 EXCEPTION(0x1A00, Trap_1A, unknown_exception, EXC_XFER_EE)
673 EXCEPTION(0x1B00, Trap_1B, UnknownException, EXC_XFER_EE) 673 EXCEPTION(0x1B00, Trap_1B, unknown_exception, EXC_XFER_EE)
674 EXCEPTION(0x1C00, Trap_1C, UnknownException, EXC_XFER_EE) 674 EXCEPTION(0x1C00, Trap_1C, unknown_exception, EXC_XFER_EE)
675 EXCEPTION(0x1D00, Trap_1D, UnknownException, EXC_XFER_EE) 675 EXCEPTION(0x1D00, Trap_1D, unknown_exception, EXC_XFER_EE)
676 EXCEPTION(0x1E00, Trap_1E, UnknownException, EXC_XFER_EE) 676 EXCEPTION(0x1E00, Trap_1E, unknown_exception, EXC_XFER_EE)
677 EXCEPTION(0x1F00, Trap_1F, UnknownException, EXC_XFER_EE) 677 EXCEPTION(0x1F00, Trap_1F, unknown_exception, EXC_XFER_EE)
678 678
679/* Check for a single step debug exception while in an exception 679/* Check for a single step debug exception while in an exception
680 * handler before state has been saved. This is to catch the case 680 * handler before state has been saved. This is to catch the case
diff --git a/arch/ppc/kernel/head_8xx.S b/arch/ppc/kernel/head_8xx.S
index cb1a3a54a026..de0978742221 100644
--- a/arch/ppc/kernel/head_8xx.S
+++ b/arch/ppc/kernel/head_8xx.S
@@ -203,7 +203,7 @@ i##n: \
203 ret_from_except) 203 ret_from_except)
204 204
205/* System reset */ 205/* System reset */
206 EXCEPTION(0x100, Reset, UnknownException, EXC_XFER_STD) 206 EXCEPTION(0x100, Reset, unknown_exception, EXC_XFER_STD)
207 207
208/* Machine check */ 208/* Machine check */
209 . = 0x200 209 . = 0x200
@@ -214,7 +214,7 @@ MachineCheck:
214 mfspr r5,SPRN_DSISR 214 mfspr r5,SPRN_DSISR
215 stw r5,_DSISR(r11) 215 stw r5,_DSISR(r11)
216 addi r3,r1,STACK_FRAME_OVERHEAD 216 addi r3,r1,STACK_FRAME_OVERHEAD
217 EXC_XFER_STD(0x200, MachineCheckException) 217 EXC_XFER_STD(0x200, machine_check_exception)
218 218
219/* Data access exception. 219/* Data access exception.
220 * This is "never generated" by the MPC8xx. We jump to it for other 220 * This is "never generated" by the MPC8xx. We jump to it for other
@@ -252,20 +252,20 @@ Alignment:
252 mfspr r5,SPRN_DSISR 252 mfspr r5,SPRN_DSISR
253 stw r5,_DSISR(r11) 253 stw r5,_DSISR(r11)
254 addi r3,r1,STACK_FRAME_OVERHEAD 254 addi r3,r1,STACK_FRAME_OVERHEAD
255 EXC_XFER_EE(0x600, AlignmentException) 255 EXC_XFER_EE(0x600, alignment_exception)
256 256
257/* Program check exception */ 257/* Program check exception */
258 EXCEPTION(0x700, ProgramCheck, ProgramCheckException, EXC_XFER_STD) 258 EXCEPTION(0x700, ProgramCheck, program_check_exception, EXC_XFER_STD)
259 259
260/* No FPU on MPC8xx. This exception is not supposed to happen. 260/* No FPU on MPC8xx. This exception is not supposed to happen.
261*/ 261*/
262 EXCEPTION(0x800, FPUnavailable, UnknownException, EXC_XFER_STD) 262 EXCEPTION(0x800, FPUnavailable, unknown_exception, EXC_XFER_STD)
263 263
264/* Decrementer */ 264/* Decrementer */
265 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE) 265 EXCEPTION(0x900, Decrementer, timer_interrupt, EXC_XFER_LITE)
266 266
267 EXCEPTION(0xa00, Trap_0a, UnknownException, EXC_XFER_EE) 267 EXCEPTION(0xa00, Trap_0a, unknown_exception, EXC_XFER_EE)
268 EXCEPTION(0xb00, Trap_0b, UnknownException, EXC_XFER_EE) 268 EXCEPTION(0xb00, Trap_0b, unknown_exception, EXC_XFER_EE)
269 269
270/* System call */ 270/* System call */
271 . = 0xc00 271 . = 0xc00
@@ -274,9 +274,9 @@ SystemCall:
274 EXC_XFER_EE_LITE(0xc00, DoSyscall) 274 EXC_XFER_EE_LITE(0xc00, DoSyscall)
275 275
276/* Single step - not used on 601 */ 276/* Single step - not used on 601 */
277 EXCEPTION(0xd00, SingleStep, SingleStepException, EXC_XFER_STD) 277 EXCEPTION(0xd00, SingleStep, single_step_exception, EXC_XFER_STD)
278 EXCEPTION(0xe00, Trap_0e, UnknownException, EXC_XFER_EE) 278 EXCEPTION(0xe00, Trap_0e, unknown_exception, EXC_XFER_EE)
279 EXCEPTION(0xf00, Trap_0f, UnknownException, EXC_XFER_EE) 279 EXCEPTION(0xf00, Trap_0f, unknown_exception, EXC_XFER_EE)
280 280
281/* On the MPC8xx, this is a software emulation interrupt. It occurs 281/* On the MPC8xx, this is a software emulation interrupt. It occurs
282 * for all unimplemented and illegal instructions. 282 * for all unimplemented and illegal instructions.
@@ -540,22 +540,22 @@ DataTLBError:
540#endif 540#endif
541 b DataAccess 541 b DataAccess
542 542
543 EXCEPTION(0x1500, Trap_15, UnknownException, EXC_XFER_EE) 543 EXCEPTION(0x1500, Trap_15, unknown_exception, EXC_XFER_EE)
544 EXCEPTION(0x1600, Trap_16, UnknownException, EXC_XFER_EE) 544 EXCEPTION(0x1600, Trap_16, unknown_exception, EXC_XFER_EE)
545 EXCEPTION(0x1700, Trap_17, UnknownException, EXC_XFER_EE) 545 EXCEPTION(0x1700, Trap_17, unknown_exception, EXC_XFER_EE)
546 EXCEPTION(0x1800, Trap_18, UnknownException, EXC_XFER_EE) 546 EXCEPTION(0x1800, Trap_18, unknown_exception, EXC_XFER_EE)
547 EXCEPTION(0x1900, Trap_19, UnknownException, EXC_XFER_EE) 547 EXCEPTION(0x1900, Trap_19, unknown_exception, EXC_XFER_EE)
548 EXCEPTION(0x1a00, Trap_1a, UnknownException, EXC_XFER_EE) 548 EXCEPTION(0x1a00, Trap_1a, unknown_exception, EXC_XFER_EE)
549 EXCEPTION(0x1b00, Trap_1b, UnknownException, EXC_XFER_EE) 549 EXCEPTION(0x1b00, Trap_1b, unknown_exception, EXC_XFER_EE)
550 550
551/* On the MPC8xx, these next four traps are used for development 551/* On the MPC8xx, these next four traps are used for development
552 * support of breakpoints and such. Someday I will get around to 552 * support of breakpoints and such. Someday I will get around to
553 * using them. 553 * using them.
554 */ 554 */
555 EXCEPTION(0x1c00, Trap_1c, UnknownException, EXC_XFER_EE) 555 EXCEPTION(0x1c00, Trap_1c, unknown_exception, EXC_XFER_EE)
556 EXCEPTION(0x1d00, Trap_1d, UnknownException, EXC_XFER_EE) 556 EXCEPTION(0x1d00, Trap_1d, unknown_exception, EXC_XFER_EE)
557 EXCEPTION(0x1e00, Trap_1e, UnknownException, EXC_XFER_EE) 557 EXCEPTION(0x1e00, Trap_1e, unknown_exception, EXC_XFER_EE)
558 EXCEPTION(0x1f00, Trap_1f, UnknownException, EXC_XFER_EE) 558 EXCEPTION(0x1f00, Trap_1f, unknown_exception, EXC_XFER_EE)
559 559
560 . = 0x2000 560 . = 0x2000
561 561
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index 9342acf12e72..aeb349b47af3 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -335,7 +335,7 @@ label:
335 mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \ 335 mfspr r4,SPRN_DEAR; /* Grab the DEAR and save it */ \
336 stw r4,_DEAR(r11); \ 336 stw r4,_DEAR(r11); \
337 addi r3,r1,STACK_FRAME_OVERHEAD; \ 337 addi r3,r1,STACK_FRAME_OVERHEAD; \
338 EXC_XFER_EE(0x0600, AlignmentException) 338 EXC_XFER_EE(0x0600, alignment_exception)
339 339
340#define PROGRAM_EXCEPTION \ 340#define PROGRAM_EXCEPTION \
341 START_EXCEPTION(Program) \ 341 START_EXCEPTION(Program) \
@@ -343,7 +343,7 @@ label:
343 mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \ 343 mfspr r4,SPRN_ESR; /* Grab the ESR and save it */ \
344 stw r4,_ESR(r11); \ 344 stw r4,_ESR(r11); \
345 addi r3,r1,STACK_FRAME_OVERHEAD; \ 345 addi r3,r1,STACK_FRAME_OVERHEAD; \
346 EXC_XFER_STD(0x0700, ProgramCheckException) 346 EXC_XFER_STD(0x0700, program_check_exception)
347 347
348#define DECREMENTER_EXCEPTION \ 348#define DECREMENTER_EXCEPTION \
349 START_EXCEPTION(Decrementer) \ 349 START_EXCEPTION(Decrementer) \
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
index 8e52e8408316..53949811efda 100644
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ b/arch/ppc/kernel/head_fsl_booke.S
@@ -426,14 +426,14 @@ skpinv: addi r6,r6,1 /* Increment */
426 426
427interrupt_base: 427interrupt_base:
428 /* Critical Input Interrupt */ 428 /* Critical Input Interrupt */
429 CRITICAL_EXCEPTION(0x0100, CriticalInput, UnknownException) 429 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
430 430
431 /* Machine Check Interrupt */ 431 /* Machine Check Interrupt */
432#ifdef CONFIG_E200 432#ifdef CONFIG_E200
433 /* no RFMCI, MCSRRs on E200 */ 433 /* no RFMCI, MCSRRs on E200 */
434 CRITICAL_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 434 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
435#else 435#else
436 MCHECK_EXCEPTION(0x0200, MachineCheck, MachineCheckException) 436 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
437#endif 437#endif
438 438
439 /* Data Storage Interrupt */ 439 /* Data Storage Interrupt */
@@ -542,9 +542,9 @@ interrupt_base:
542#else 542#else
543#ifdef CONFIG_E200 543#ifdef CONFIG_E200
544 /* E200 treats 'normal' floating point instructions as FP Unavail exception */ 544 /* E200 treats 'normal' floating point instructions as FP Unavail exception */
545 EXCEPTION(0x0800, FloatingPointUnavailable, ProgramCheckException, EXC_XFER_EE) 545 EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
546#else 546#else
547 EXCEPTION(0x0800, FloatingPointUnavailable, UnknownException, EXC_XFER_EE) 547 EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
548#endif 548#endif
549#endif 549#endif
550 550
@@ -554,20 +554,20 @@ interrupt_base:
554 EXC_XFER_EE_LITE(0x0c00, DoSyscall) 554 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
555 555
556 /* Auxillary Processor Unavailable Interrupt */ 556 /* Auxillary Processor Unavailable Interrupt */
557 EXCEPTION(0x2900, AuxillaryProcessorUnavailable, UnknownException, EXC_XFER_EE) 557 EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
558 558
559 /* Decrementer Interrupt */ 559 /* Decrementer Interrupt */
560 DECREMENTER_EXCEPTION 560 DECREMENTER_EXCEPTION
561 561
562 /* Fixed Internal Timer Interrupt */ 562 /* Fixed Internal Timer Interrupt */
563 /* TODO: Add FIT support */ 563 /* TODO: Add FIT support */
564 EXCEPTION(0x3100, FixedIntervalTimer, UnknownException, EXC_XFER_EE) 564 EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
565 565
566 /* Watchdog Timer Interrupt */ 566 /* Watchdog Timer Interrupt */
567#ifdef CONFIG_BOOKE_WDT 567#ifdef CONFIG_BOOKE_WDT
568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException) 568 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
569#else 569#else
570 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, UnknownException) 570 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
571#endif 571#endif
572 572
573 /* Data TLB Error Interrupt */ 573 /* Data TLB Error Interrupt */
@@ -696,21 +696,21 @@ interrupt_base:
696 addi r3,r1,STACK_FRAME_OVERHEAD 696 addi r3,r1,STACK_FRAME_OVERHEAD
697 EXC_XFER_EE_LITE(0x2010, KernelSPE) 697 EXC_XFER_EE_LITE(0x2010, KernelSPE)
698#else 698#else
699 EXCEPTION(0x2020, SPEUnavailable, UnknownException, EXC_XFER_EE) 699 EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
700#endif /* CONFIG_SPE */ 700#endif /* CONFIG_SPE */
701 701
702 /* SPE Floating Point Data */ 702 /* SPE Floating Point Data */
703#ifdef CONFIG_SPE 703#ifdef CONFIG_SPE
704 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE); 704 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
705#else 705#else
706 EXCEPTION(0x2040, SPEFloatingPointData, UnknownException, EXC_XFER_EE) 706 EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
707#endif /* CONFIG_SPE */ 707#endif /* CONFIG_SPE */
708 708
709 /* SPE Floating Point Round */ 709 /* SPE Floating Point Round */
710 EXCEPTION(0x2050, SPEFloatingPointRound, UnknownException, EXC_XFER_EE) 710 EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
711 711
712 /* Performance Monitor */ 712 /* Performance Monitor */
713 EXCEPTION(0x2060, PerformanceMonitor, PerformanceMonitorException, EXC_XFER_STD) 713 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
714 714
715 715
716 /* Debug Interrupt */ 716 /* Debug Interrupt */
@@ -853,7 +853,7 @@ load_up_spe:
853 cmpi 0,r4,0 853 cmpi 0,r4,0
854 beq 1f 854 beq 1f
855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */ 855 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
856 SAVE_32EVR(0,r10,r4) 856 SAVE_32EVRS(0,r10,r4)
857 evxor evr10, evr10, evr10 /* clear out evr10 */ 857 evxor evr10, evr10, evr10 /* clear out evr10 */
858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */ 858 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
859 li r5,THREAD_ACC 859 li r5,THREAD_ACC
@@ -873,7 +873,7 @@ load_up_spe:
873 stw r4,THREAD_USED_SPE(r5) 873 stw r4,THREAD_USED_SPE(r5)
874 evlddx evr4,r10,r5 874 evlddx evr4,r10,r5
875 evmra evr4,evr4 875 evmra evr4,evr4
876 REST_32EVR(0,r10,r5) 876 REST_32EVRS(0,r10,r5)
877#ifndef CONFIG_SMP 877#ifndef CONFIG_SMP
878 subi r4,r5,THREAD 878 subi r4,r5,THREAD
879 stw r4,last_task_used_spe@l(r3) 879 stw r4,last_task_used_spe@l(r3)
@@ -963,7 +963,7 @@ _GLOBAL(giveup_spe)
963 addi r3,r3,THREAD /* want THREAD of task */ 963 addi r3,r3,THREAD /* want THREAD of task */
964 lwz r5,PT_REGS(r3) 964 lwz r5,PT_REGS(r3)
965 cmpi 0,r5,0 965 cmpi 0,r5,0
966 SAVE_32EVR(0, r4, r3) 966 SAVE_32EVRS(0, r4, r3)
967 evxor evr6, evr6, evr6 /* clear out evr6 */ 967 evxor evr6, evr6, evr6 /* clear out evr6 */
968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */ 968 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
969 li r4,THREAD_ACC 969 li r4,THREAD_ACC
diff --git a/arch/ppc/kernel/idle.c b/arch/ppc/kernel/idle.c
index fba29c876b62..0a12fbef7347 100644
--- a/arch/ppc/kernel/idle.c
+++ b/arch/ppc/kernel/idle.c
@@ -32,6 +32,7 @@
32#include <asm/cache.h> 32#include <asm/cache.h>
33#include <asm/cputable.h> 33#include <asm/cputable.h>
34#include <asm/machdep.h> 34#include <asm/machdep.h>
35#include <asm/smp.h>
35 36
36void default_idle(void) 37void default_idle(void)
37{ 38{
diff --git a/arch/ppc/kernel/irq.c b/arch/ppc/kernel/irq.c
index 8843f3af230f..772e428aaa59 100644
--- a/arch/ppc/kernel/irq.c
+++ b/arch/ppc/kernel/irq.c
@@ -57,6 +57,7 @@
57#include <asm/cache.h> 57#include <asm/cache.h>
58#include <asm/prom.h> 58#include <asm/prom.h>
59#include <asm/ptrace.h> 59#include <asm/ptrace.h>
60#include <asm/machdep.h>
60 61
61#define NR_MASK_WORDS ((NR_IRQS + 31) / 32) 62#define NR_MASK_WORDS ((NR_IRQS + 31) / 32)
62 63
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 90d917d2e856..2b9a16274b0b 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -125,9 +125,8 @@ _GLOBAL(identify_cpu)
1251: 1251:
126 addis r6,r3,cur_cpu_spec@ha 126 addis r6,r3,cur_cpu_spec@ha
127 addi r6,r6,cur_cpu_spec@l 127 addi r6,r6,cur_cpu_spec@l
128 slwi r4,r4,2
129 sub r8,r8,r3 128 sub r8,r8,r3
130 stwx r8,r4,r6 129 stw r8,0(r6)
131 blr 130 blr
132 131
133/* 132/*
@@ -186,19 +185,18 @@ _GLOBAL(do_cpu_ftr_fixups)
186 * 185 *
187 * Setup function is called with: 186 * Setup function is called with:
188 * r3 = data offset 187 * r3 = data offset
189 * r4 = CPU number 188 * r4 = ptr to CPU spec (relocated)
190 * r5 = ptr to CPU spec (relocated)
191 */ 189 */
192_GLOBAL(call_setup_cpu) 190_GLOBAL(call_setup_cpu)
193 addis r5,r3,cur_cpu_spec@ha 191 addis r4,r3,cur_cpu_spec@ha
194 addi r5,r5,cur_cpu_spec@l 192 addi r4,r4,cur_cpu_spec@l
195 slwi r4,r24,2 193 lwz r4,0(r4)
196 lwzx r5,r4,r5 194 add r4,r4,r3
195 lwz r5,CPU_SPEC_SETUP(r4)
196 cmpi 0,r5,0
197 add r5,r5,r3 197 add r5,r5,r3
198 lwz r6,CPU_SPEC_SETUP(r5) 198 beqlr
199 add r6,r6,r3 199 mtctr r5
200 mtctr r6
201 mr r4,r24
202 bctr 200 bctr
203 201
204#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) 202#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
@@ -273,134 +271,6 @@ _GLOBAL(low_choose_7447a_dfs)
273 271
274#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ 272#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
275 273
276/* void local_save_flags_ptr(unsigned long *flags) */
277_GLOBAL(local_save_flags_ptr)
278 mfmsr r4
279 stw r4,0(r3)
280 blr
281 /*
282 * Need these nops here for taking over save/restore to
283 * handle lost intrs
284 * -- Cort
285 */
286 nop
287 nop
288 nop
289 nop
290 nop
291 nop
292 nop
293 nop
294 nop
295 nop
296 nop
297 nop
298 nop
299 nop
300 nop
301 nop
302 nop
303_GLOBAL(local_save_flags_ptr_end)
304
305/* void local_irq_restore(unsigned long flags) */
306_GLOBAL(local_irq_restore)
307/*
308 * Just set/clear the MSR_EE bit through restore/flags but do not
309 * change anything else. This is needed by the RT system and makes
310 * sense anyway.
311 * -- Cort
312 */
313 mfmsr r4
314 /* Copy all except the MSR_EE bit from r4 (current MSR value)
315 to r3. This is the sort of thing the rlwimi instruction is
316 designed for. -- paulus. */
317 rlwimi r3,r4,0,17,15
318 /* Check if things are setup the way we want _already_. */
319 cmpw 0,r3,r4
320 beqlr
3211: SYNC
322 mtmsr r3
323 SYNC
324 blr
325 nop
326 nop
327 nop
328 nop
329 nop
330 nop
331 nop
332 nop
333 nop
334 nop
335 nop
336 nop
337 nop
338 nop
339 nop
340 nop
341 nop
342 nop
343 nop
344_GLOBAL(local_irq_restore_end)
345
346_GLOBAL(local_irq_disable)
347 mfmsr r0 /* Get current interrupt state */
348 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
349 rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
350 SYNC /* Some chip revs have problems here... */
351 mtmsr r0 /* Update machine state */
352 blr /* Done */
353 /*
354 * Need these nops here for taking over save/restore to
355 * handle lost intrs
356 * -- Cort
357 */
358 nop
359 nop
360 nop
361 nop
362 nop
363 nop
364 nop
365 nop
366 nop
367 nop
368 nop
369 nop
370 nop
371 nop
372 nop
373_GLOBAL(local_irq_disable_end)
374
375_GLOBAL(local_irq_enable)
376 mfmsr r3 /* Get current state */
377 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
378 SYNC /* Some chip revs have problems here... */
379 mtmsr r3 /* Update machine state */
380 blr
381 /*
382 * Need these nops here for taking over save/restore to
383 * handle lost intrs
384 * -- Cort
385 */
386 nop
387 nop
388 nop
389 nop
390 nop
391 nop
392 nop
393 nop
394 nop
395 nop
396 nop
397 nop
398 nop
399 nop
400 nop
401 nop
402_GLOBAL(local_irq_enable_end)
403
404/* 274/*
405 * complement mask on the msr then "or" some values on. 275 * complement mask on the msr then "or" some values on.
406 * _nmask_and_or_msr(nmask, value_to_or) 276 * _nmask_and_or_msr(nmask, value_to_or)
diff --git a/arch/ppc/kernel/pci.c b/arch/ppc/kernel/pci.c
index 854e45beb387..163276be7cc5 100644
--- a/arch/ppc/kernel/pci.c
+++ b/arch/ppc/kernel/pci.c
@@ -21,6 +21,7 @@
21#include <asm/byteorder.h> 21#include <asm/byteorder.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/uaccess.h> 23#include <asm/uaccess.h>
24#include <asm/machdep.h>
24 25
25#undef DEBUG 26#undef DEBUG
26 27
@@ -644,7 +645,7 @@ pcibios_alloc_controller(void)
644/* 645/*
645 * Functions below are used on OpenFirmware machines. 646 * Functions below are used on OpenFirmware machines.
646 */ 647 */
647static void __openfirmware 648static void
648make_one_node_map(struct device_node* node, u8 pci_bus) 649make_one_node_map(struct device_node* node, u8 pci_bus)
649{ 650{
650 int *bus_range; 651 int *bus_range;
@@ -678,7 +679,7 @@ make_one_node_map(struct device_node* node, u8 pci_bus)
678 } 679 }
679} 680}
680 681
681void __openfirmware 682void
682pcibios_make_OF_bus_map(void) 683pcibios_make_OF_bus_map(void)
683{ 684{
684 int i; 685 int i;
@@ -720,7 +721,7 @@ pcibios_make_OF_bus_map(void)
720 721
721typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data); 722typedef int (*pci_OF_scan_iterator)(struct device_node* node, void* data);
722 723
723static struct device_node* __openfirmware 724static struct device_node*
724scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data) 725scan_OF_pci_childs(struct device_node* node, pci_OF_scan_iterator filter, void* data)
725{ 726{
726 struct device_node* sub_node; 727 struct device_node* sub_node;
@@ -761,7 +762,7 @@ scan_OF_pci_childs_iterator(struct device_node* node, void* data)
761 return 0; 762 return 0;
762} 763}
763 764
764static struct device_node* __openfirmware 765static struct device_node*
765scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn) 766scan_OF_childs_for_device(struct device_node* node, u8 bus, u8 dev_fn)
766{ 767{
767 u8 filter_data[2] = {bus, dev_fn}; 768 u8 filter_data[2] = {bus, dev_fn};
@@ -813,12 +814,14 @@ pci_busdev_to_OF_node(struct pci_bus *bus, int devfn)
813 /* Now, lookup childs of the hose */ 814 /* Now, lookup childs of the hose */
814 return scan_OF_childs_for_device(node->child, busnr, devfn); 815 return scan_OF_childs_for_device(node->child, busnr, devfn);
815} 816}
817EXPORT_SYMBOL(pci_busdev_to_OF_node);
816 818
817struct device_node* 819struct device_node*
818pci_device_to_OF_node(struct pci_dev *dev) 820pci_device_to_OF_node(struct pci_dev *dev)
819{ 821{
820 return pci_busdev_to_OF_node(dev->bus, dev->devfn); 822 return pci_busdev_to_OF_node(dev->bus, dev->devfn);
821} 823}
824EXPORT_SYMBOL(pci_device_to_OF_node);
822 825
823/* This routine is meant to be used early during boot, when the 826/* This routine is meant to be used early during boot, when the
824 * PCI bus numbers have not yet been assigned, and you need to 827 * PCI bus numbers have not yet been assigned, and you need to
@@ -842,7 +845,7 @@ pci_find_hose_for_OF_device(struct device_node* node)
842 return NULL; 845 return NULL;
843} 846}
844 847
845static int __openfirmware 848static int
846find_OF_pci_device_filter(struct device_node* node, void* data) 849find_OF_pci_device_filter(struct device_node* node, void* data)
847{ 850{
848 return ((void *)node == data); 851 return ((void *)node == data);
@@ -890,6 +893,7 @@ pci_device_from_OF_node(struct device_node* node, u8* bus, u8* devfn)
890 } 893 }
891 return -ENODEV; 894 return -ENODEV;
892} 895}
896EXPORT_SYMBOL(pci_device_from_OF_node);
893 897
894void __init 898void __init
895pci_process_bridge_OF_ranges(struct pci_controller *hose, 899pci_process_bridge_OF_ranges(struct pci_controller *hose,
@@ -1030,6 +1034,10 @@ static ssize_t pci_show_devspec(struct device *dev, struct device_attribute *att
1030} 1034}
1031static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL); 1035static DEVICE_ATTR(devspec, S_IRUGO, pci_show_devspec, NULL);
1032 1036
1037#else /* CONFIG_PPC_OF */
1038void pcibios_make_OF_bus_map(void)
1039{
1040}
1033#endif /* CONFIG_PPC_OF */ 1041#endif /* CONFIG_PPC_OF */
1034 1042
1035/* Add sysfs properties */ 1043/* Add sysfs properties */
diff --git a/arch/ppc/kernel/perfmon.c b/arch/ppc/kernel/perfmon.c
index 22df9a596a0f..c9a38dd0cdc4 100644
--- a/arch/ppc/kernel/perfmon.c
+++ b/arch/ppc/kernel/perfmon.c
@@ -64,7 +64,7 @@ void (*perf_irq)(struct pt_regs *) = dummy_perf;
64 64
65/* Grab the interrupt, if it's free. 65/* Grab the interrupt, if it's free.
66 * Returns 0 on success, -1 if the interrupt is taken already */ 66 * Returns 0 on success, -1 if the interrupt is taken already */
67int request_perfmon_irq(void (*handler)(struct pt_regs *)) 67int reserve_pmc_hardware(void (*handler)(struct pt_regs *))
68{ 68{
69 int err = 0; 69 int err = 0;
70 70
@@ -74,7 +74,7 @@ int request_perfmon_irq(void (*handler)(struct pt_regs *))
74 perf_irq = handler; 74 perf_irq = handler;
75 else { 75 else {
76 pr_info("perfmon irq already handled by %p\n", perf_irq); 76 pr_info("perfmon irq already handled by %p\n", perf_irq);
77 err = -1; 77 err = -EBUSY;
78 } 78 }
79 79
80 spin_unlock(&perfmon_lock); 80 spin_unlock(&perfmon_lock);
@@ -82,7 +82,7 @@ int request_perfmon_irq(void (*handler)(struct pt_regs *))
82 return err; 82 return err;
83} 83}
84 84
85void free_perfmon_irq(void) 85void release_pmc_hardware(void)
86{ 86{
87 spin_lock(&perfmon_lock); 87 spin_lock(&perfmon_lock);
88 88
@@ -92,5 +92,5 @@ void free_perfmon_irq(void)
92} 92}
93 93
94EXPORT_SYMBOL(perf_irq); 94EXPORT_SYMBOL(perf_irq);
95EXPORT_SYMBOL(request_perfmon_irq); 95EXPORT_SYMBOL(reserve_pmc_hardware);
96EXPORT_SYMBOL(free_perfmon_irq); 96EXPORT_SYMBOL(release_pmc_hardware);
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 88f6bb7b6964..f4373fb9181f 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -53,10 +53,10 @@
53 53
54extern void transfer_to_handler(void); 54extern void transfer_to_handler(void);
55extern void do_IRQ(struct pt_regs *regs); 55extern void do_IRQ(struct pt_regs *regs);
56extern void MachineCheckException(struct pt_regs *regs); 56extern void machine_check_exception(struct pt_regs *regs);
57extern void AlignmentException(struct pt_regs *regs); 57extern void alignment_exception(struct pt_regs *regs);
58extern void ProgramCheckException(struct pt_regs *regs); 58extern void program_check_exception(struct pt_regs *regs);
59extern void SingleStepException(struct pt_regs *regs); 59extern void single_step_exception(struct pt_regs *regs);
60extern int do_signal(sigset_t *, struct pt_regs *); 60extern int do_signal(sigset_t *, struct pt_regs *);
61extern int pmac_newworld; 61extern int pmac_newworld;
62extern int sys_sigreturn(struct pt_regs *regs); 62extern int sys_sigreturn(struct pt_regs *regs);
@@ -72,10 +72,10 @@ EXPORT_SYMBOL(clear_user_page);
72EXPORT_SYMBOL(do_signal); 72EXPORT_SYMBOL(do_signal);
73EXPORT_SYMBOL(transfer_to_handler); 73EXPORT_SYMBOL(transfer_to_handler);
74EXPORT_SYMBOL(do_IRQ); 74EXPORT_SYMBOL(do_IRQ);
75EXPORT_SYMBOL(MachineCheckException); 75EXPORT_SYMBOL(machine_check_exception);
76EXPORT_SYMBOL(AlignmentException); 76EXPORT_SYMBOL(alignment_exception);
77EXPORT_SYMBOL(ProgramCheckException); 77EXPORT_SYMBOL(program_check_exception);
78EXPORT_SYMBOL(SingleStepException); 78EXPORT_SYMBOL(single_step_exception);
79EXPORT_SYMBOL(sys_sigreturn); 79EXPORT_SYMBOL(sys_sigreturn);
80EXPORT_SYMBOL(ppc_n_lost_interrupts); 80EXPORT_SYMBOL(ppc_n_lost_interrupts);
81EXPORT_SYMBOL(ppc_lost_interrupts); 81EXPORT_SYMBOL(ppc_lost_interrupts);
@@ -230,9 +230,6 @@ EXPORT_SYMBOL(find_all_nodes);
230EXPORT_SYMBOL(get_property); 230EXPORT_SYMBOL(get_property);
231EXPORT_SYMBOL(request_OF_resource); 231EXPORT_SYMBOL(request_OF_resource);
232EXPORT_SYMBOL(release_OF_resource); 232EXPORT_SYMBOL(release_OF_resource);
233EXPORT_SYMBOL(pci_busdev_to_OF_node);
234EXPORT_SYMBOL(pci_device_to_OF_node);
235EXPORT_SYMBOL(pci_device_from_OF_node);
236EXPORT_SYMBOL(of_find_node_by_name); 233EXPORT_SYMBOL(of_find_node_by_name);
237EXPORT_SYMBOL(of_find_node_by_type); 234EXPORT_SYMBOL(of_find_node_by_type);
238EXPORT_SYMBOL(of_find_compatible_node); 235EXPORT_SYMBOL(of_find_compatible_node);
@@ -272,16 +269,6 @@ EXPORT_SYMBOL(screen_info);
272#endif 269#endif
273 270
274EXPORT_SYMBOL(__delay); 271EXPORT_SYMBOL(__delay);
275#ifndef INLINE_IRQS
276EXPORT_SYMBOL(local_irq_enable);
277EXPORT_SYMBOL(local_irq_enable_end);
278EXPORT_SYMBOL(local_irq_disable);
279EXPORT_SYMBOL(local_irq_disable_end);
280EXPORT_SYMBOL(local_save_flags_ptr);
281EXPORT_SYMBOL(local_save_flags_ptr_end);
282EXPORT_SYMBOL(local_irq_restore);
283EXPORT_SYMBOL(local_irq_restore_end);
284#endif
285EXPORT_SYMBOL(timer_interrupt); 272EXPORT_SYMBOL(timer_interrupt);
286EXPORT_SYMBOL(irq_desc); 273EXPORT_SYMBOL(irq_desc);
287EXPORT_SYMBOL(tb_ticks_per_jiffy); 274EXPORT_SYMBOL(tb_ticks_per_jiffy);
diff --git a/arch/ppc/kernel/process.c b/arch/ppc/kernel/process.c
index 82de66e4db6d..0870e5553453 100644
--- a/arch/ppc/kernel/process.c
+++ b/arch/ppc/kernel/process.c
@@ -557,14 +557,16 @@ int sys_clone(unsigned long clone_flags, unsigned long usp,
557 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp); 557 return do_fork(clone_flags, usp, regs, 0, parent_tidp, child_tidp);
558} 558}
559 559
560int sys_fork(int p1, int p2, int p3, int p4, int p5, int p6, 560int sys_fork(unsigned long p1, unsigned long p2, unsigned long p3,
561 unsigned long p4, unsigned long p5, unsigned long p6,
561 struct pt_regs *regs) 562 struct pt_regs *regs)
562{ 563{
563 CHECK_FULL_REGS(regs); 564 CHECK_FULL_REGS(regs);
564 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL); 565 return do_fork(SIGCHLD, regs->gpr[1], regs, 0, NULL, NULL);
565} 566}
566 567
567int sys_vfork(int p1, int p2, int p3, int p4, int p5, int p6, 568int sys_vfork(unsigned long p1, unsigned long p2, unsigned long p3,
569 unsigned long p4, unsigned long p5, unsigned long p6,
568 struct pt_regs *regs) 570 struct pt_regs *regs)
569{ 571{
570 CHECK_FULL_REGS(regs); 572 CHECK_FULL_REGS(regs);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 545cfd0fab59..6bcb85d2b7fd 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -71,7 +71,8 @@ struct ide_machdep_calls ppc_ide_md;
71unsigned long boot_mem_size; 71unsigned long boot_mem_size;
72 72
73unsigned long ISA_DMA_THRESHOLD; 73unsigned long ISA_DMA_THRESHOLD;
74unsigned long DMA_MODE_READ, DMA_MODE_WRITE; 74unsigned int DMA_MODE_READ;
75unsigned int DMA_MODE_WRITE;
75 76
76#ifdef CONFIG_PPC_MULTIPLATFORM 77#ifdef CONFIG_PPC_MULTIPLATFORM
77int _machine = 0; 78int _machine = 0;
@@ -82,8 +83,18 @@ extern void pmac_init(unsigned long r3, unsigned long r4,
82 unsigned long r5, unsigned long r6, unsigned long r7); 83 unsigned long r5, unsigned long r6, unsigned long r7);
83extern void chrp_init(unsigned long r3, unsigned long r4, 84extern void chrp_init(unsigned long r3, unsigned long r4,
84 unsigned long r5, unsigned long r6, unsigned long r7); 85 unsigned long r5, unsigned long r6, unsigned long r7);
86
87dev_t boot_dev;
85#endif /* CONFIG_PPC_MULTIPLATFORM */ 88#endif /* CONFIG_PPC_MULTIPLATFORM */
86 89
90int have_of;
91EXPORT_SYMBOL(have_of);
92
93#ifdef __DO_IRQ_CANON
94int ppc_do_canonicalize_irqs;
95EXPORT_SYMBOL(ppc_do_canonicalize_irqs);
96#endif
97
87#ifdef CONFIG_MAGIC_SYSRQ 98#ifdef CONFIG_MAGIC_SYSRQ
88unsigned long SYSRQ_KEY = 0x54; 99unsigned long SYSRQ_KEY = 0x54;
89#endif /* CONFIG_MAGIC_SYSRQ */ 100#endif /* CONFIG_MAGIC_SYSRQ */
@@ -185,18 +196,18 @@ int show_cpuinfo(struct seq_file *m, void *v)
185 seq_printf(m, "processor\t: %d\n", i); 196 seq_printf(m, "processor\t: %d\n", i);
186 seq_printf(m, "cpu\t\t: "); 197 seq_printf(m, "cpu\t\t: ");
187 198
188 if (cur_cpu_spec[i]->pvr_mask) 199 if (cur_cpu_spec->pvr_mask)
189 seq_printf(m, "%s", cur_cpu_spec[i]->cpu_name); 200 seq_printf(m, "%s", cur_cpu_spec->cpu_name);
190 else 201 else
191 seq_printf(m, "unknown (%08x)", pvr); 202 seq_printf(m, "unknown (%08x)", pvr);
192#ifdef CONFIG_ALTIVEC 203#ifdef CONFIG_ALTIVEC
193 if (cur_cpu_spec[i]->cpu_features & CPU_FTR_ALTIVEC) 204 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
194 seq_printf(m, ", altivec supported"); 205 seq_printf(m, ", altivec supported");
195#endif 206#endif
196 seq_printf(m, "\n"); 207 seq_printf(m, "\n");
197 208
198#ifdef CONFIG_TAU 209#ifdef CONFIG_TAU
199 if (cur_cpu_spec[i]->cpu_features & CPU_FTR_TAU) { 210 if (cur_cpu_spec->cpu_features & CPU_FTR_TAU) {
200#ifdef CONFIG_TAU_AVERAGE 211#ifdef CONFIG_TAU_AVERAGE
201 /* more straightforward, but potentially misleading */ 212 /* more straightforward, but potentially misleading */
202 seq_printf(m, "temperature \t: %u C (uncalibrated)\n", 213 seq_printf(m, "temperature \t: %u C (uncalibrated)\n",
@@ -339,7 +350,7 @@ early_init(int r3, int r4, int r5)
339 * Assume here that all clock rates are the same in a 350 * Assume here that all clock rates are the same in a
340 * smp system. -- Cort 351 * smp system. -- Cort
341 */ 352 */
342int __openfirmware 353int
343of_show_percpuinfo(struct seq_file *m, int i) 354of_show_percpuinfo(struct seq_file *m, int i)
344{ 355{
345 struct device_node *cpu_node; 356 struct device_node *cpu_node;
@@ -404,11 +415,15 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
404 _machine = _MACH_prep; 415 _machine = _MACH_prep;
405 } 416 }
406 417
418#ifdef CONFIG_PPC_PREP
407 /* not much more to do here, if prep */ 419 /* not much more to do here, if prep */
408 if (_machine == _MACH_prep) { 420 if (_machine == _MACH_prep) {
409 prep_init(r3, r4, r5, r6, r7); 421 prep_init(r3, r4, r5, r6, r7);
410 return; 422 return;
411 } 423 }
424#endif
425
426 have_of = 1;
412 427
413 /* prom_init has already been called from __start */ 428 /* prom_init has already been called from __start */
414 if (boot_infos) 429 if (boot_infos)
@@ -479,12 +494,16 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
479#endif /* CONFIG_ADB */ 494#endif /* CONFIG_ADB */
480 495
481 switch (_machine) { 496 switch (_machine) {
497#ifdef CONFIG_PPC_PMAC
482 case _MACH_Pmac: 498 case _MACH_Pmac:
483 pmac_init(r3, r4, r5, r6, r7); 499 pmac_init(r3, r4, r5, r6, r7);
484 break; 500 break;
501#endif
502#ifdef CONFIG_PPC_CHRP
485 case _MACH_chrp: 503 case _MACH_chrp:
486 chrp_init(r3, r4, r5, r6, r7); 504 chrp_init(r3, r4, r5, r6, r7);
487 break; 505 break;
506#endif
488 } 507 }
489} 508}
490 509
@@ -721,7 +740,7 @@ void __init setup_arch(char **cmdline_p)
721#endif 740#endif
722 741
723#ifdef CONFIG_XMON 742#ifdef CONFIG_XMON
724 xmon_map_scc(); 743 xmon_init(1);
725 if (strstr(cmd_line, "xmon")) 744 if (strstr(cmd_line, "xmon"))
726 xmon(NULL); 745 xmon(NULL);
727#endif /* CONFIG_XMON */ 746#endif /* CONFIG_XMON */
@@ -745,12 +764,12 @@ void __init setup_arch(char **cmdline_p)
745 * for a possibly more accurate value. 764 * for a possibly more accurate value.
746 */ 765 */
747 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) { 766 if (cpu_has_feature(CPU_FTR_SPLIT_ID_CACHE)) {
748 dcache_bsize = cur_cpu_spec[0]->dcache_bsize; 767 dcache_bsize = cur_cpu_spec->dcache_bsize;
749 icache_bsize = cur_cpu_spec[0]->icache_bsize; 768 icache_bsize = cur_cpu_spec->icache_bsize;
750 ucache_bsize = 0; 769 ucache_bsize = 0;
751 } else 770 } else
752 ucache_bsize = dcache_bsize = icache_bsize 771 ucache_bsize = dcache_bsize = icache_bsize
753 = cur_cpu_spec[0]->dcache_bsize; 772 = cur_cpu_spec->dcache_bsize;
754 773
755 /* reboot on panic */ 774 /* reboot on panic */
756 panic_timeout = 180; 775 panic_timeout = 180;
diff --git a/arch/ppc/kernel/smp.c b/arch/ppc/kernel/smp.c
index 726fe7ce1747..801c793fdec8 100644
--- a/arch/ppc/kernel/smp.c
+++ b/arch/ppc/kernel/smp.c
@@ -34,11 +34,11 @@
34#include <asm/thread_info.h> 34#include <asm/thread_info.h>
35#include <asm/tlbflush.h> 35#include <asm/tlbflush.h>
36#include <asm/xmon.h> 36#include <asm/xmon.h>
37#include <asm/machdep.h>
37 38
38volatile int smp_commenced; 39volatile int smp_commenced;
39int smp_tb_synchronized; 40int smp_tb_synchronized;
40struct cpuinfo_PPC cpu_data[NR_CPUS]; 41struct cpuinfo_PPC cpu_data[NR_CPUS];
41struct klock_info_struct klock_info = { KLOCK_CLEAR, 0 };
42atomic_t ipi_recv; 42atomic_t ipi_recv;
43atomic_t ipi_sent; 43atomic_t ipi_sent;
44cpumask_t cpu_online_map; 44cpumask_t cpu_online_map;
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index 961ede87be72..3145e9773db9 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -44,6 +44,11 @@
44#include <asm/perfmon.h> 44#include <asm/perfmon.h>
45 45
46#ifdef CONFIG_XMON 46#ifdef CONFIG_XMON
47extern int xmon_bpt(struct pt_regs *regs);
48extern int xmon_sstep(struct pt_regs *regs);
49extern int xmon_iabr_match(struct pt_regs *regs);
50extern int xmon_dabr_match(struct pt_regs *regs);
51
47void (*debugger)(struct pt_regs *regs) = xmon; 52void (*debugger)(struct pt_regs *regs) = xmon;
48int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt; 53int (*debugger_bpt)(struct pt_regs *regs) = xmon_bpt;
49int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep; 54int (*debugger_sstep)(struct pt_regs *regs) = xmon_sstep;
@@ -74,7 +79,7 @@ void (*debugger_fault_handler)(struct pt_regs *regs);
74 79
75DEFINE_SPINLOCK(die_lock); 80DEFINE_SPINLOCK(die_lock);
76 81
77void die(const char * str, struct pt_regs * fp, long err) 82int die(const char * str, struct pt_regs * fp, long err)
78{ 83{
79 static int die_counter; 84 static int die_counter;
80 int nl = 0; 85 int nl = 0;
@@ -232,7 +237,7 @@ platform_machine_check(struct pt_regs *regs)
232{ 237{
233} 238}
234 239
235void MachineCheckException(struct pt_regs *regs) 240void machine_check_exception(struct pt_regs *regs)
236{ 241{
237 unsigned long reason = get_mc_reason(regs); 242 unsigned long reason = get_mc_reason(regs);
238 243
@@ -393,14 +398,14 @@ void SMIException(struct pt_regs *regs)
393#endif 398#endif
394} 399}
395 400
396void UnknownException(struct pt_regs *regs) 401void unknown_exception(struct pt_regs *regs)
397{ 402{
398 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n", 403 printk("Bad trap at PC: %lx, MSR: %lx, vector=%lx %s\n",
399 regs->nip, regs->msr, regs->trap, print_tainted()); 404 regs->nip, regs->msr, regs->trap, print_tainted());
400 _exception(SIGTRAP, regs, 0, 0); 405 _exception(SIGTRAP, regs, 0, 0);
401} 406}
402 407
403void InstructionBreakpoint(struct pt_regs *regs) 408void instruction_breakpoint_exception(struct pt_regs *regs)
404{ 409{
405 if (debugger_iabr_match(regs)) 410 if (debugger_iabr_match(regs))
406 return; 411 return;
@@ -575,7 +580,7 @@ extern struct bug_entry __start___bug_table[], __stop___bug_table[];
575#define module_find_bug(x) NULL 580#define module_find_bug(x) NULL
576#endif 581#endif
577 582
578static struct bug_entry *find_bug(unsigned long bugaddr) 583struct bug_entry *find_bug(unsigned long bugaddr)
579{ 584{
580 struct bug_entry *bug; 585 struct bug_entry *bug;
581 586
@@ -622,7 +627,7 @@ int check_bug_trap(struct pt_regs *regs)
622 return 0; 627 return 0;
623} 628}
624 629
625void ProgramCheckException(struct pt_regs *regs) 630void program_check_exception(struct pt_regs *regs)
626{ 631{
627 unsigned int reason = get_reason(regs); 632 unsigned int reason = get_reason(regs);
628 extern int do_mathemu(struct pt_regs *regs); 633 extern int do_mathemu(struct pt_regs *regs);
@@ -701,7 +706,7 @@ void ProgramCheckException(struct pt_regs *regs)
701 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip); 706 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
702} 707}
703 708
704void SingleStepException(struct pt_regs *regs) 709void single_step_exception(struct pt_regs *regs)
705{ 710{
706 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */ 711 regs->msr &= ~(MSR_SE | MSR_BE); /* Turn off 'trace' bits */
707 if (debugger_sstep(regs)) 712 if (debugger_sstep(regs))
@@ -709,7 +714,7 @@ void SingleStepException(struct pt_regs *regs)
709 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 714 _exception(SIGTRAP, regs, TRAP_TRACE, 0);
710} 715}
711 716
712void AlignmentException(struct pt_regs *regs) 717void alignment_exception(struct pt_regs *regs)
713{ 718{
714 int fixed; 719 int fixed;
715 720
@@ -814,7 +819,18 @@ void TAUException(struct pt_regs *regs)
814} 819}
815#endif /* CONFIG_INT_TAU */ 820#endif /* CONFIG_INT_TAU */
816 821
817void AltivecUnavailException(struct pt_regs *regs) 822/*
823 * FP unavailable trap from kernel - print a message, but let
824 * the task use FP in the kernel until it returns to user mode.
825 */
826void kernel_fp_unavailable_exception(struct pt_regs *regs)
827{
828 regs->msr |= MSR_FP;
829 printk(KERN_ERR "floating point used in kernel (task=%p, pc=%lx)\n",
830 current, regs->nip);
831}
832
833void altivec_unavailable_exception(struct pt_regs *regs)
818{ 834{
819 static int kernel_altivec_count; 835 static int kernel_altivec_count;
820 836
@@ -835,7 +851,7 @@ void AltivecUnavailException(struct pt_regs *regs)
835} 851}
836 852
837#ifdef CONFIG_ALTIVEC 853#ifdef CONFIG_ALTIVEC
838void AltivecAssistException(struct pt_regs *regs) 854void altivec_assist_exception(struct pt_regs *regs)
839{ 855{
840 int err; 856 int err;
841 857
@@ -872,7 +888,7 @@ void AltivecAssistException(struct pt_regs *regs)
872#endif /* CONFIG_ALTIVEC */ 888#endif /* CONFIG_ALTIVEC */
873 889
874#ifdef CONFIG_E500 890#ifdef CONFIG_E500
875void PerformanceMonitorException(struct pt_regs *regs) 891void performance_monitor_exception(struct pt_regs *regs)
876{ 892{
877 perf_irq(regs); 893 perf_irq(regs);
878} 894}
diff --git a/arch/ppc/kernel/vecemu.c b/arch/ppc/kernel/vecemu.c
deleted file mode 100644
index 604d0947cb20..000000000000
--- a/arch/ppc/kernel/vecemu.c
+++ /dev/null
@@ -1,345 +0,0 @@
1/*
2 * Routines to emulate some Altivec/VMX instructions, specifically
3 * those that can trap when given denormalized operands in Java mode.
4 */
5#include <linux/kernel.h>
6#include <linux/errno.h>
7#include <linux/sched.h>
8#include <asm/ptrace.h>
9#include <asm/processor.h>
10#include <asm/uaccess.h>
11
12/* Functions in vector.S */
13extern void vaddfp(vector128 *dst, vector128 *a, vector128 *b);
14extern void vsubfp(vector128 *dst, vector128 *a, vector128 *b);
15extern void vmaddfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
16extern void vnmsubfp(vector128 *dst, vector128 *a, vector128 *b, vector128 *c);
17extern void vrefp(vector128 *dst, vector128 *src);
18extern void vrsqrtefp(vector128 *dst, vector128 *src);
19extern void vexptep(vector128 *dst, vector128 *src);
20
21static unsigned int exp2s[8] = {
22 0x800000,
23 0x8b95c2,
24 0x9837f0,
25 0xa5fed7,
26 0xb504f3,
27 0xc5672a,
28 0xd744fd,
29 0xeac0c7
30};
31
32/*
33 * Computes an estimate of 2^x. The `s' argument is the 32-bit
34 * single-precision floating-point representation of x.
35 */
36static unsigned int eexp2(unsigned int s)
37{
38 int exp, pwr;
39 unsigned int mant, frac;
40
41 /* extract exponent field from input */
42 exp = ((s >> 23) & 0xff) - 127;
43 if (exp > 7) {
44 /* check for NaN input */
45 if (exp == 128 && (s & 0x7fffff) != 0)
46 return s | 0x400000; /* return QNaN */
47 /* 2^-big = 0, 2^+big = +Inf */
48 return (s & 0x80000000)? 0: 0x7f800000; /* 0 or +Inf */
49 }
50 if (exp < -23)
51 return 0x3f800000; /* 1.0 */
52
53 /* convert to fixed point integer in 9.23 representation */
54 pwr = (s & 0x7fffff) | 0x800000;
55 if (exp > 0)
56 pwr <<= exp;
57 else
58 pwr >>= -exp;
59 if (s & 0x80000000)
60 pwr = -pwr;
61
62 /* extract integer part, which becomes exponent part of result */
63 exp = (pwr >> 23) + 126;
64 if (exp >= 254)
65 return 0x7f800000;
66 if (exp < -23)
67 return 0;
68
69 /* table lookup on top 3 bits of fraction to get mantissa */
70 mant = exp2s[(pwr >> 20) & 7];
71
72 /* linear interpolation using remaining 20 bits of fraction */
73 asm("mulhwu %0,%1,%2" : "=r" (frac)
74 : "r" (pwr << 12), "r" (0x172b83ff));
75 asm("mulhwu %0,%1,%2" : "=r" (frac) : "r" (frac), "r" (mant));
76 mant += frac;
77
78 if (exp >= 0)
79 return mant + (exp << 23);
80
81 /* denormalized result */
82 exp = -exp;
83 mant += 1 << (exp - 1);
84 return mant >> exp;
85}
86
87/*
88 * Computes an estimate of log_2(x). The `s' argument is the 32-bit
89 * single-precision floating-point representation of x.
90 */
91static unsigned int elog2(unsigned int s)
92{
93 int exp, mant, lz, frac;
94
95 exp = s & 0x7f800000;
96 mant = s & 0x7fffff;
97 if (exp == 0x7f800000) { /* Inf or NaN */
98 if (mant != 0)
99 s |= 0x400000; /* turn NaN into QNaN */
100 return s;
101 }
102 if ((exp | mant) == 0) /* +0 or -0 */
103 return 0xff800000; /* return -Inf */
104
105 if (exp == 0) {
106 /* denormalized */
107 asm("cntlzw %0,%1" : "=r" (lz) : "r" (mant));
108 mant <<= lz - 8;
109 exp = (-118 - lz) << 23;
110 } else {
111 mant |= 0x800000;
112 exp -= 127 << 23;
113 }
114
115 if (mant >= 0xb504f3) { /* 2^0.5 * 2^23 */
116 exp |= 0x400000; /* 0.5 * 2^23 */
117 asm("mulhwu %0,%1,%2" : "=r" (mant)
118 : "r" (mant), "r" (0xb504f334)); /* 2^-0.5 * 2^32 */
119 }
120 if (mant >= 0x9837f0) { /* 2^0.25 * 2^23 */
121 exp |= 0x200000; /* 0.25 * 2^23 */
122 asm("mulhwu %0,%1,%2" : "=r" (mant)
123 : "r" (mant), "r" (0xd744fccb)); /* 2^-0.25 * 2^32 */
124 }
125 if (mant >= 0x8b95c2) { /* 2^0.125 * 2^23 */
126 exp |= 0x100000; /* 0.125 * 2^23 */
127 asm("mulhwu %0,%1,%2" : "=r" (mant)
128 : "r" (mant), "r" (0xeac0c6e8)); /* 2^-0.125 * 2^32 */
129 }
130 if (mant > 0x800000) { /* 1.0 * 2^23 */
131 /* calculate (mant - 1) * 1.381097463 */
132 /* 1.381097463 == 0.125 / (2^0.125 - 1) */
133 asm("mulhwu %0,%1,%2" : "=r" (frac)
134 : "r" ((mant - 0x800000) << 1), "r" (0xb0c7cd3a));
135 exp += frac;
136 }
137 s = exp & 0x80000000;
138 if (exp != 0) {
139 if (s)
140 exp = -exp;
141 asm("cntlzw %0,%1" : "=r" (lz) : "r" (exp));
142 lz = 8 - lz;
143 if (lz > 0)
144 exp >>= lz;
145 else if (lz < 0)
146 exp <<= -lz;
147 s += ((lz + 126) << 23) + exp;
148 }
149 return s;
150}
151
152#define VSCR_SAT 1
153
154static int ctsxs(unsigned int x, int scale, unsigned int *vscrp)
155{
156 int exp, mant;
157
158 exp = (x >> 23) & 0xff;
159 mant = x & 0x7fffff;
160 if (exp == 255 && mant != 0)
161 return 0; /* NaN -> 0 */
162 exp = exp - 127 + scale;
163 if (exp < 0)
164 return 0; /* round towards zero */
165 if (exp >= 31) {
166 /* saturate, unless the result would be -2^31 */
167 if (x + (scale << 23) != 0xcf000000)
168 *vscrp |= VSCR_SAT;
169 return (x & 0x80000000)? 0x80000000: 0x7fffffff;
170 }
171 mant |= 0x800000;
172 mant = (mant << 7) >> (30 - exp);
173 return (x & 0x80000000)? -mant: mant;
174}
175
176static unsigned int ctuxs(unsigned int x, int scale, unsigned int *vscrp)
177{
178 int exp;
179 unsigned int mant;
180
181 exp = (x >> 23) & 0xff;
182 mant = x & 0x7fffff;
183 if (exp == 255 && mant != 0)
184 return 0; /* NaN -> 0 */
185 exp = exp - 127 + scale;
186 if (exp < 0)
187 return 0; /* round towards zero */
188 if (x & 0x80000000) {
189 /* negative => saturate to 0 */
190 *vscrp |= VSCR_SAT;
191 return 0;
192 }
193 if (exp >= 32) {
194 /* saturate */
195 *vscrp |= VSCR_SAT;
196 return 0xffffffff;
197 }
198 mant |= 0x800000;
199 mant = (mant << 8) >> (31 - exp);
200 return mant;
201}
202
203/* Round to floating integer, towards 0 */
204static unsigned int rfiz(unsigned int x)
205{
206 int exp;
207
208 exp = ((x >> 23) & 0xff) - 127;
209 if (exp == 128 && (x & 0x7fffff) != 0)
210 return x | 0x400000; /* NaN -> make it a QNaN */
211 if (exp >= 23)
212 return x; /* it's an integer already (or Inf) */
213 if (exp < 0)
214 return x & 0x80000000; /* |x| < 1.0 rounds to 0 */
215 return x & ~(0x7fffff >> exp);
216}
217
218/* Round to floating integer, towards +/- Inf */
219static unsigned int rfii(unsigned int x)
220{
221 int exp, mask;
222
223 exp = ((x >> 23) & 0xff) - 127;
224 if (exp == 128 && (x & 0x7fffff) != 0)
225 return x | 0x400000; /* NaN -> make it a QNaN */
226 if (exp >= 23)
227 return x; /* it's an integer already (or Inf) */
228 if ((x & 0x7fffffff) == 0)
229 return x; /* +/-0 -> +/-0 */
230 if (exp < 0)
231 /* 0 < |x| < 1.0 rounds to +/- 1.0 */
232 return (x & 0x80000000) | 0x3f800000;
233 mask = 0x7fffff >> exp;
234 /* mantissa overflows into exponent - that's OK,
235 it can't overflow into the sign bit */
236 return (x + mask) & ~mask;
237}
238
239/* Round to floating integer, to nearest */
240static unsigned int rfin(unsigned int x)
241{
242 int exp, half;
243
244 exp = ((x >> 23) & 0xff) - 127;
245 if (exp == 128 && (x & 0x7fffff) != 0)
246 return x | 0x400000; /* NaN -> make it a QNaN */
247 if (exp >= 23)
248 return x; /* it's an integer already (or Inf) */
249 if (exp < -1)
250 return x & 0x80000000; /* |x| < 0.5 -> +/-0 */
251 if (exp == -1)
252 /* 0.5 <= |x| < 1.0 rounds to +/- 1.0 */
253 return (x & 0x80000000) | 0x3f800000;
254 half = 0x400000 >> exp;
255 /* add 0.5 to the magnitude and chop off the fraction bits */
256 return (x + half) & ~(0x7fffff >> exp);
257}
258
259int emulate_altivec(struct pt_regs *regs)
260{
261 unsigned int instr, i;
262 unsigned int va, vb, vc, vd;
263 vector128 *vrs;
264
265 if (get_user(instr, (unsigned int __user *) regs->nip))
266 return -EFAULT;
267 if ((instr >> 26) != 4)
268 return -EINVAL; /* not an altivec instruction */
269 vd = (instr >> 21) & 0x1f;
270 va = (instr >> 16) & 0x1f;
271 vb = (instr >> 11) & 0x1f;
272 vc = (instr >> 6) & 0x1f;
273
274 vrs = current->thread.vr;
275 switch (instr & 0x3f) {
276 case 10:
277 switch (vc) {
278 case 0: /* vaddfp */
279 vaddfp(&vrs[vd], &vrs[va], &vrs[vb]);
280 break;
281 case 1: /* vsubfp */
282 vsubfp(&vrs[vd], &vrs[va], &vrs[vb]);
283 break;
284 case 4: /* vrefp */
285 vrefp(&vrs[vd], &vrs[vb]);
286 break;
287 case 5: /* vrsqrtefp */
288 vrsqrtefp(&vrs[vd], &vrs[vb]);
289 break;
290 case 6: /* vexptefp */
291 for (i = 0; i < 4; ++i)
292 vrs[vd].u[i] = eexp2(vrs[vb].u[i]);
293 break;
294 case 7: /* vlogefp */
295 for (i = 0; i < 4; ++i)
296 vrs[vd].u[i] = elog2(vrs[vb].u[i]);
297 break;
298 case 8: /* vrfin */
299 for (i = 0; i < 4; ++i)
300 vrs[vd].u[i] = rfin(vrs[vb].u[i]);
301 break;
302 case 9: /* vrfiz */
303 for (i = 0; i < 4; ++i)
304 vrs[vd].u[i] = rfiz(vrs[vb].u[i]);
305 break;
306 case 10: /* vrfip */
307 for (i = 0; i < 4; ++i) {
308 u32 x = vrs[vb].u[i];
309 x = (x & 0x80000000)? rfiz(x): rfii(x);
310 vrs[vd].u[i] = x;
311 }
312 break;
313 case 11: /* vrfim */
314 for (i = 0; i < 4; ++i) {
315 u32 x = vrs[vb].u[i];
316 x = (x & 0x80000000)? rfii(x): rfiz(x);
317 vrs[vd].u[i] = x;
318 }
319 break;
320 case 14: /* vctuxs */
321 for (i = 0; i < 4; ++i)
322 vrs[vd].u[i] = ctuxs(vrs[vb].u[i], va,
323 &current->thread.vscr.u[3]);
324 break;
325 case 15: /* vctsxs */
326 for (i = 0; i < 4; ++i)
327 vrs[vd].u[i] = ctsxs(vrs[vb].u[i], va,
328 &current->thread.vscr.u[3]);
329 break;
330 default:
331 return -EINVAL;
332 }
333 break;
334 case 46: /* vmaddfp */
335 vmaddfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
336 break;
337 case 47: /* vnmsubfp */
338 vnmsubfp(&vrs[vd], &vrs[va], &vrs[vb], &vrs[vc]);
339 break;
340 default:
341 return -EINVAL;
342 }
343
344 return 0;
345}
diff --git a/arch/ppc/kernel/vector.S b/arch/ppc/kernel/vector.S
deleted file mode 100644
index 82a21346bf80..000000000000
--- a/arch/ppc/kernel/vector.S
+++ /dev/null
@@ -1,217 +0,0 @@
1#include <asm/ppc_asm.h>
2#include <asm/processor.h>
3
4/*
5 * The routines below are in assembler so we can closely control the
6 * usage of floating-point registers. These routines must be called
7 * with preempt disabled.
8 */
9 .data
10fpzero:
11 .long 0
12fpone:
13 .long 0x3f800000 /* 1.0 in single-precision FP */
14fphalf:
15 .long 0x3f000000 /* 0.5 in single-precision FP */
16
17 .text
18/*
19 * Internal routine to enable floating point and set FPSCR to 0.
20 * Don't call it from C; it doesn't use the normal calling convention.
21 */
22fpenable:
23 mfmsr r10
24 ori r11,r10,MSR_FP
25 mtmsr r11
26 isync
27 stfd fr0,24(r1)
28 stfd fr1,16(r1)
29 stfd fr31,8(r1)
30 lis r11,fpzero@ha
31 mffs fr31
32 lfs fr1,fpzero@l(r11)
33 mtfsf 0xff,fr1
34 blr
35
36fpdisable:
37 mtfsf 0xff,fr31
38 lfd fr31,8(r1)
39 lfd fr1,16(r1)
40 lfd fr0,24(r1)
41 mtmsr r10
42 isync
43 blr
44
45/*
46 * Vector add, floating point.
47 */
48 .globl vaddfp
49vaddfp:
50 stwu r1,-32(r1)
51 mflr r0
52 stw r0,36(r1)
53 bl fpenable
54 li r0,4
55 mtctr r0
56 li r6,0
571: lfsx fr0,r4,r6
58 lfsx fr1,r5,r6
59 fadds fr0,fr0,fr1
60 stfsx fr0,r3,r6
61 addi r6,r6,4
62 bdnz 1b
63 bl fpdisable
64 lwz r0,36(r1)
65 mtlr r0
66 addi r1,r1,32
67 blr
68
69/*
70 * Vector subtract, floating point.
71 */
72 .globl vsubfp
73vsubfp:
74 stwu r1,-32(r1)
75 mflr r0
76 stw r0,36(r1)
77 bl fpenable
78 li r0,4
79 mtctr r0
80 li r6,0
811: lfsx fr0,r4,r6
82 lfsx fr1,r5,r6
83 fsubs fr0,fr0,fr1
84 stfsx fr0,r3,r6
85 addi r6,r6,4
86 bdnz 1b
87 bl fpdisable
88 lwz r0,36(r1)
89 mtlr r0
90 addi r1,r1,32
91 blr
92
93/*
94 * Vector multiply and add, floating point.
95 */
96 .globl vmaddfp
97vmaddfp:
98 stwu r1,-48(r1)
99 mflr r0
100 stw r0,52(r1)
101 bl fpenable
102 stfd fr2,32(r1)
103 li r0,4
104 mtctr r0
105 li r7,0
1061: lfsx fr0,r4,r7
107 lfsx fr1,r5,r7
108 lfsx fr2,r6,r7
109 fmadds fr0,fr0,fr2,fr1
110 stfsx fr0,r3,r7
111 addi r7,r7,4
112 bdnz 1b
113 lfd fr2,32(r1)
114 bl fpdisable
115 lwz r0,52(r1)
116 mtlr r0
117 addi r1,r1,48
118 blr
119
120/*
121 * Vector negative multiply and subtract, floating point.
122 */
123 .globl vnmsubfp
124vnmsubfp:
125 stwu r1,-48(r1)
126 mflr r0
127 stw r0,52(r1)
128 bl fpenable
129 stfd fr2,32(r1)
130 li r0,4
131 mtctr r0
132 li r7,0
1331: lfsx fr0,r4,r7
134 lfsx fr1,r5,r7
135 lfsx fr2,r6,r7
136 fnmsubs fr0,fr0,fr2,fr1
137 stfsx fr0,r3,r7
138 addi r7,r7,4
139 bdnz 1b
140 lfd fr2,32(r1)
141 bl fpdisable
142 lwz r0,52(r1)
143 mtlr r0
144 addi r1,r1,48
145 blr
146
147/*
148 * Vector reciprocal estimate. We just compute 1.0/x.
149 * r3 -> destination, r4 -> source.
150 */
151 .globl vrefp
152vrefp:
153 stwu r1,-32(r1)
154 mflr r0
155 stw r0,36(r1)
156 bl fpenable
157 lis r9,fpone@ha
158 li r0,4
159 lfs fr1,fpone@l(r9)
160 mtctr r0
161 li r6,0
1621: lfsx fr0,r4,r6
163 fdivs fr0,fr1,fr0
164 stfsx fr0,r3,r6
165 addi r6,r6,4
166 bdnz 1b
167 bl fpdisable
168 lwz r0,36(r1)
169 mtlr r0
170 addi r1,r1,32
171 blr
172
173/*
174 * Vector reciprocal square-root estimate, floating point.
175 * We use the frsqrte instruction for the initial estimate followed
176 * by 2 iterations of Newton-Raphson to get sufficient accuracy.
177 * r3 -> destination, r4 -> source.
178 */
179 .globl vrsqrtefp
180vrsqrtefp:
181 stwu r1,-48(r1)
182 mflr r0
183 stw r0,52(r1)
184 bl fpenable
185 stfd fr2,32(r1)
186 stfd fr3,40(r1)
187 stfd fr4,48(r1)
188 stfd fr5,56(r1)
189 lis r9,fpone@ha
190 lis r8,fphalf@ha
191 li r0,4
192 lfs fr4,fpone@l(r9)
193 lfs fr5,fphalf@l(r8)
194 mtctr r0
195 li r6,0
1961: lfsx fr0,r4,r6
197 frsqrte fr1,fr0 /* r = frsqrte(s) */
198 fmuls fr3,fr1,fr0 /* r * s */
199 fmuls fr2,fr1,fr5 /* r * 0.5 */
200 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
201 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
202 fmuls fr3,fr1,fr0 /* r * s */
203 fmuls fr2,fr1,fr5 /* r * 0.5 */
204 fnmsubs fr3,fr1,fr3,fr4 /* 1 - s * r * r */
205 fmadds fr1,fr2,fr3,fr1 /* r = r + 0.5 * r * (1 - s * r * r) */
206 stfsx fr1,r3,r6
207 addi r6,r6,4
208 bdnz 1b
209 lfd fr5,56(r1)
210 lfd fr4,48(r1)
211 lfd fr3,40(r1)
212 lfd fr2,32(r1)
213 bl fpdisable
214 lwz r0,36(r1)
215 mtlr r0
216 addi r1,r1,32
217 blr
diff --git a/arch/ppc/kernel/vmlinux.lds.S b/arch/ppc/kernel/vmlinux.lds.S
index 17d2db7e537d..09c6525cfa61 100644
--- a/arch/ppc/kernel/vmlinux.lds.S
+++ b/arch/ppc/kernel/vmlinux.lds.S
@@ -149,32 +149,6 @@ SECTIONS
149 149
150 . = ALIGN(4096); 150 . = ALIGN(4096);
151 _sextratext = .; 151 _sextratext = .;
152 __pmac_begin = .;
153 .pmac.text : { *(.pmac.text) }
154 .pmac.data : { *(.pmac.data) }
155 . = ALIGN(4096);
156 __pmac_end = .;
157
158 . = ALIGN(4096);
159 __prep_begin = .;
160 .prep.text : { *(.prep.text) }
161 .prep.data : { *(.prep.data) }
162 . = ALIGN(4096);
163 __prep_end = .;
164
165 . = ALIGN(4096);
166 __chrp_begin = .;
167 .chrp.text : { *(.chrp.text) }
168 .chrp.data : { *(.chrp.data) }
169 . = ALIGN(4096);
170 __chrp_end = .;
171
172 . = ALIGN(4096);
173 __openfirmware_begin = .;
174 .openfirmware.text : { *(.openfirmware.text) }
175 .openfirmware.data : { *(.openfirmware.data) }
176 . = ALIGN(4096);
177 __openfirmware_end = .;
178 _eextratext = .; 152 _eextratext = .;
179 153
180 __bss_start = .; 154 __bss_start = .;
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index f421a4b337f6..5e9ef23b4671 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -74,10 +74,6 @@ unsigned long agp_special_page;
74extern char _end[]; 74extern char _end[];
75extern char etext[], _stext[]; 75extern char etext[], _stext[];
76extern char __init_begin, __init_end; 76extern char __init_begin, __init_end;
77extern char __prep_begin, __prep_end;
78extern char __chrp_begin, __chrp_end;
79extern char __pmac_begin, __pmac_end;
80extern char __openfirmware_begin, __openfirmware_end;
81 77
82#ifdef CONFIG_HIGHMEM 78#ifdef CONFIG_HIGHMEM
83pte_t *kmap_pte; 79pte_t *kmap_pte;
@@ -167,14 +163,6 @@ void free_initmem(void)
167 163
168 printk ("Freeing unused kernel memory:"); 164 printk ("Freeing unused kernel memory:");
169 FREESEC(init); 165 FREESEC(init);
170 if (_machine != _MACH_Pmac)
171 FREESEC(pmac);
172 if (_machine != _MACH_chrp)
173 FREESEC(chrp);
174 if (_machine != _MACH_prep)
175 FREESEC(prep);
176 if (!have_of)
177 FREESEC(openfirmware);
178 printk("\n"); 166 printk("\n");
179 ppc_md.progress = NULL; 167 ppc_md.progress = NULL;
180#undef FREESEC 168#undef FREESEC
diff --git a/arch/ppc/oprofile/Kconfig b/arch/ppc/oprofile/Kconfig
deleted file mode 100644
index 19d37730b664..000000000000
--- a/arch/ppc/oprofile/Kconfig
+++ /dev/null
@@ -1,23 +0,0 @@
1
2menu "Profiling support"
3 depends on EXPERIMENTAL
4
5config PROFILING
6 bool "Profiling support (EXPERIMENTAL)"
7 help
8 Say Y here to enable the extended profiling support mechanisms used
9 by profilers such as OProfile.
10
11
12config OPROFILE
13 tristate "OProfile system profiling (EXPERIMENTAL)"
14 depends on PROFILING
15 help
16 OProfile is a profiling system capable of profiling the
17 whole system, include the kernel, kernel modules, libraries,
18 and applications.
19
20 If unsure, say N.
21
22endmenu
23
diff --git a/arch/ppc/oprofile/Makefile b/arch/ppc/oprofile/Makefile
deleted file mode 100644
index e2218d32a4eb..000000000000
--- a/arch/ppc/oprofile/Makefile
+++ /dev/null
@@ -1,14 +0,0 @@
1obj-$(CONFIG_OPROFILE) += oprofile.o
2
3DRIVER_OBJS := $(addprefix ../../../drivers/oprofile/, \
4 oprof.o cpu_buffer.o buffer_sync.o \
5 event_buffer.o oprofile_files.o \
6 oprofilefs.o oprofile_stats.o \
7 timer_int.o )
8
9oprofile-y := $(DRIVER_OBJS) common.o
10
11ifeq ($(CONFIG_FSL_BOOKE),y)
12 oprofile-y += op_model_fsl_booke.o
13endif
14
diff --git a/arch/ppc/oprofile/common.c b/arch/ppc/oprofile/common.c
deleted file mode 100644
index 3169c67abea7..000000000000
--- a/arch/ppc/oprofile/common.c
+++ /dev/null
@@ -1,161 +0,0 @@
1/*
2 * PPC 32 oprofile support
3 * Based on PPC64 oprofile support
4 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
5 *
6 * Copyright (C) Freescale Semiconductor, Inc 2004
7 *
8 * Author: Andy Fleming
9 *
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License
12 * as published by the Free Software Foundation; either version
13 * 2 of the License, or (at your option) any later version.
14 */
15
16#include <linux/oprofile.h>
17#include <linux/slab.h>
18#include <linux/init.h>
19#include <linux/smp.h>
20#include <linux/errno.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23#include <asm/perfmon.h>
24#include <asm/cputable.h>
25
26#include "op_impl.h"
27
28static struct op_ppc32_model *model;
29
30static struct op_counter_config ctr[OP_MAX_COUNTER];
31static struct op_system_config sys;
32
33static void op_handle_interrupt(struct pt_regs *regs)
34{
35 model->handle_interrupt(regs, ctr);
36}
37
38static int op_ppc32_setup(void)
39{
40 /* Install our interrupt handler into the existing hook. */
41 if(request_perfmon_irq(&op_handle_interrupt))
42 return -EBUSY;
43
44 mb();
45
46 /* Pre-compute the values to stuff in the hardware registers. */
47 model->reg_setup(ctr, &sys, model->num_counters);
48
49#if 0
50 /* FIXME: Make multi-cpu work */
51 /* Configure the registers on all cpus. */
52 on_each_cpu(model->reg_setup, NULL, 0, 1);
53#endif
54
55 return 0;
56}
57
58static void op_ppc32_shutdown(void)
59{
60 mb();
61
62 /* Remove our interrupt handler. We may be removing this module. */
63 free_perfmon_irq();
64}
65
66static void op_ppc32_cpu_start(void *dummy)
67{
68 model->start(ctr);
69}
70
71static int op_ppc32_start(void)
72{
73 on_each_cpu(op_ppc32_cpu_start, NULL, 0, 1);
74 return 0;
75}
76
77static inline void op_ppc32_cpu_stop(void *dummy)
78{
79 model->stop();
80}
81
82static void op_ppc32_stop(void)
83{
84 on_each_cpu(op_ppc32_cpu_stop, NULL, 0, 1);
85}
86
87static int op_ppc32_create_files(struct super_block *sb, struct dentry *root)
88{
89 int i;
90
91 for (i = 0; i < model->num_counters; ++i) {
92 struct dentry *dir;
93 char buf[3];
94
95 snprintf(buf, sizeof buf, "%d", i);
96 dir = oprofilefs_mkdir(sb, root, buf);
97
98 oprofilefs_create_ulong(sb, dir, "enabled", &ctr[i].enabled);
99 oprofilefs_create_ulong(sb, dir, "event", &ctr[i].event);
100 oprofilefs_create_ulong(sb, dir, "count", &ctr[i].count);
101 oprofilefs_create_ulong(sb, dir, "kernel", &ctr[i].kernel);
102 oprofilefs_create_ulong(sb, dir, "user", &ctr[i].user);
103
104 /* FIXME: Not sure if this is used */
105 oprofilefs_create_ulong(sb, dir, "unit_mask", &ctr[i].unit_mask);
106 }
107
108 oprofilefs_create_ulong(sb, root, "enable_kernel", &sys.enable_kernel);
109 oprofilefs_create_ulong(sb, root, "enable_user", &sys.enable_user);
110
111 /* Default to tracing both kernel and user */
112 sys.enable_kernel = 1;
113 sys.enable_user = 1;
114
115 return 0;
116}
117
118static struct oprofile_operations oprof_ppc32_ops = {
119 .create_files = op_ppc32_create_files,
120 .setup = op_ppc32_setup,
121 .shutdown = op_ppc32_shutdown,
122 .start = op_ppc32_start,
123 .stop = op_ppc32_stop,
124 .cpu_type = NULL /* To be filled in below. */
125};
126
127int __init oprofile_arch_init(struct oprofile_operations *ops)
128{
129 char *name;
130 int cpu_id = smp_processor_id();
131
132#ifdef CONFIG_FSL_BOOKE
133 model = &op_model_fsl_booke;
134#else
135 return -ENODEV;
136#endif
137
138 name = kmalloc(32, GFP_KERNEL);
139
140 if (NULL == name)
141 return -ENOMEM;
142
143 sprintf(name, "ppc/%s", cur_cpu_spec[cpu_id]->cpu_name);
144
145 oprof_ppc32_ops.cpu_type = name;
146
147 model->num_counters = cur_cpu_spec[cpu_id]->num_pmcs;
148
149 *ops = oprof_ppc32_ops;
150
151 printk(KERN_INFO "oprofile: using %s performance monitoring.\n",
152 oprof_ppc32_ops.cpu_type);
153
154 return 0;
155}
156
157void oprofile_arch_exit(void)
158{
159 kfree(oprof_ppc32_ops.cpu_type);
160 oprof_ppc32_ops.cpu_type = NULL;
161}
diff --git a/arch/ppc/oprofile/op_impl.h b/arch/ppc/oprofile/op_impl.h
deleted file mode 100644
index bc336dc971e3..000000000000
--- a/arch/ppc/oprofile/op_impl.h
+++ /dev/null
@@ -1,45 +0,0 @@
1/*
2 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
3 *
4 * Based on alpha version.
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#ifndef OP_IMPL_H
13#define OP_IMPL_H 1
14
15#define OP_MAX_COUNTER 8
16
17/* Per-counter configuration as set via oprofilefs. */
18struct op_counter_config {
19 unsigned long enabled;
20 unsigned long event;
21 unsigned long count;
22 unsigned long kernel;
23 unsigned long user;
24 unsigned long unit_mask;
25};
26
27/* System-wide configuration as set via oprofilefs. */
28struct op_system_config {
29 unsigned long enable_kernel;
30 unsigned long enable_user;
31};
32
33/* Per-arch configuration */
34struct op_ppc32_model {
35 void (*reg_setup) (struct op_counter_config *,
36 struct op_system_config *,
37 int num_counters);
38 void (*start) (struct op_counter_config *);
39 void (*stop) (void);
40 void (*handle_interrupt) (struct pt_regs *,
41 struct op_counter_config *);
42 int num_counters;
43};
44
45#endif /* OP_IMPL_H */
diff --git a/arch/ppc/oprofile/op_model_fsl_booke.c b/arch/ppc/oprofile/op_model_fsl_booke.c
deleted file mode 100644
index fc9c859358c6..000000000000
--- a/arch/ppc/oprofile/op_model_fsl_booke.c
+++ /dev/null
@@ -1,184 +0,0 @@
1/*
2 * oprofile/op_model_e500.c
3 *
4 * Freescale Book-E oprofile support, based on ppc64 oprofile support
5 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
6 *
7 * Copyright (c) 2004 Freescale Semiconductor, Inc
8 *
9 * Author: Andy Fleming
10 * Maintainer: Kumar Gala <Kumar.Gala@freescale.com>
11 *
12 * This program is free software; you can redistribute it and/or
13 * modify it under the terms of the GNU General Public License
14 * as published by the Free Software Foundation; either version
15 * 2 of the License, or (at your option) any later version.
16 */
17
18#include <linux/oprofile.h>
19#include <linux/init.h>
20#include <linux/smp.h>
21#include <asm/ptrace.h>
22#include <asm/system.h>
23#include <asm/processor.h>
24#include <asm/cputable.h>
25#include <asm/reg_booke.h>
26#include <asm/page.h>
27#include <asm/perfmon.h>
28
29#include "op_impl.h"
30
31static unsigned long reset_value[OP_MAX_COUNTER];
32
33static int num_counters;
34static int oprofile_running;
35
36static inline unsigned int ctr_read(unsigned int i)
37{
38 switch(i) {
39 case 0:
40 return mfpmr(PMRN_PMC0);
41 case 1:
42 return mfpmr(PMRN_PMC1);
43 case 2:
44 return mfpmr(PMRN_PMC2);
45 case 3:
46 return mfpmr(PMRN_PMC3);
47 default:
48 return 0;
49 }
50}
51
52static inline void ctr_write(unsigned int i, unsigned int val)
53{
54 switch(i) {
55 case 0:
56 mtpmr(PMRN_PMC0, val);
57 break;
58 case 1:
59 mtpmr(PMRN_PMC1, val);
60 break;
61 case 2:
62 mtpmr(PMRN_PMC2, val);
63 break;
64 case 3:
65 mtpmr(PMRN_PMC3, val);
66 break;
67 default:
68 break;
69 }
70}
71
72
73static void fsl_booke_reg_setup(struct op_counter_config *ctr,
74 struct op_system_config *sys,
75 int num_ctrs)
76{
77 int i;
78
79 num_counters = num_ctrs;
80
81 /* freeze all counters */
82 pmc_stop_ctrs();
83
84 /* Our counters count up, and "count" refers to
85 * how much before the next interrupt, and we interrupt
86 * on overflow. So we calculate the starting value
87 * which will give us "count" until overflow.
88 * Then we set the events on the enabled counters */
89 for (i = 0; i < num_counters; ++i) {
90 reset_value[i] = 0x80000000UL - ctr[i].count;
91
92 init_pmc_stop(i);
93
94 set_pmc_event(i, ctr[i].event);
95
96 set_pmc_user_kernel(i, ctr[i].user, ctr[i].kernel);
97 }
98}
99
100static void fsl_booke_start(struct op_counter_config *ctr)
101{
102 int i;
103
104 mtmsr(mfmsr() | MSR_PMM);
105
106 for (i = 0; i < num_counters; ++i) {
107 if (ctr[i].enabled) {
108 ctr_write(i, reset_value[i]);
109 /* Set Each enabled counterd to only
110 * count when the Mark bit is not set */
111 set_pmc_marked(i, 1, 0);
112 pmc_start_ctr(i, 1);
113 } else {
114 ctr_write(i, 0);
115
116 /* Set the ctr to be stopped */
117 pmc_start_ctr(i, 0);
118 }
119 }
120
121 /* Clear the freeze bit, and enable the interrupt.
122 * The counters won't actually start until the rfi clears
123 * the PMM bit */
124 pmc_start_ctrs(1);
125
126 oprofile_running = 1;
127
128 pr_debug("start on cpu %d, pmgc0 %x\n", smp_processor_id(),
129 mfpmr(PMRN_PMGC0));
130}
131
132static void fsl_booke_stop(void)
133{
134 /* freeze counters */
135 pmc_stop_ctrs();
136
137 oprofile_running = 0;
138
139 pr_debug("stop on cpu %d, pmgc0 %x\n", smp_processor_id(),
140 mfpmr(PMRN_PMGC0));
141
142 mb();
143}
144
145
146static void fsl_booke_handle_interrupt(struct pt_regs *regs,
147 struct op_counter_config *ctr)
148{
149 unsigned long pc;
150 int is_kernel;
151 int val;
152 int i;
153
154 /* set the PMM bit (see comment below) */
155 mtmsr(mfmsr() | MSR_PMM);
156
157 pc = regs->nip;
158 is_kernel = (pc >= KERNELBASE);
159
160 for (i = 0; i < num_counters; ++i) {
161 val = ctr_read(i);
162 if (val < 0) {
163 if (oprofile_running && ctr[i].enabled) {
164 oprofile_add_pc(pc, is_kernel, i);
165 ctr_write(i, reset_value[i]);
166 } else {
167 ctr_write(i, 0);
168 }
169 }
170 }
171
172 /* The freeze bit was set by the interrupt. */
173 /* Clear the freeze bit, and reenable the interrupt.
174 * The counters won't actually start until the rfi clears
175 * the PMM bit */
176 pmc_start_ctrs(1);
177}
178
179struct op_ppc32_model op_model_fsl_booke = {
180 .reg_setup = fsl_booke_reg_setup,
181 .start = fsl_booke_start,
182 .stop = fsl_booke_stop,
183 .handle_interrupt = fsl_booke_handle_interrupt,
184};
diff --git a/arch/ppc/platforms/4xx/ebony.c b/arch/ppc/platforms/4xx/ebony.c
index 27b778ab903b..d32ae112f639 100644
--- a/arch/ppc/platforms/4xx/ebony.c
+++ b/arch/ppc/platforms/4xx/ebony.c
@@ -90,7 +90,7 @@ ebony_calibrate_decr(void)
90 * on Rev. C silicon then errata forces us to 90 * on Rev. C silicon then errata forces us to
91 * use the internal clock. 91 * use the internal clock.
92 */ 92 */
93 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GP Rev. B") == 0) 93 if (strcmp(cur_cpu_spec->cpu_name, "440GP Rev. B") == 0)
94 freq = EBONY_440GP_RB_SYSCLK; 94 freq = EBONY_440GP_RB_SYSCLK;
95 else 95 else
96 freq = EBONY_440GP_RC_SYSCLK; 96 freq = EBONY_440GP_RC_SYSCLK;
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
index 1584cd77a9ef..58e44c042535 100644
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ b/arch/ppc/platforms/83xx/mpc834x_sys.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <syslib/ppc83xx_setup.h> 22#include <syslib/ppc83xx_setup.h>
24#include <asm/ppcboot.h> 23#include <asm/ppcboot.h>
25 24
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
index 3875e839cff7..84acf6e8d45e 100644
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
@@ -19,7 +19,6 @@
19 19
20#include <linux/config.h> 20#include <linux/config.h>
21#include <linux/init.h> 21#include <linux/init.h>
22#include <linux/seq_file.h>
23#include <asm/ppcboot.h> 22#include <asm/ppcboot.h>
24 23
25#define BOARD_CCSRBAR ((uint)0xe0000000) 24#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
index 7bcc6c35a417..95fdf4b0680b 100644
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ b/arch/ppc/platforms/85xx/stx_gp3.h
@@ -21,7 +21,6 @@
21 21
22#include <linux/config.h> 22#include <linux/config.h>
23#include <linux/init.h> 23#include <linux/init.h>
24#include <linux/seq_file.h>
25#include <asm/ppcboot.h> 24#include <asm/ppcboot.h>
26 25
27#define BOARD_CCSRBAR ((uint)0xe0000000) 26#define BOARD_CCSRBAR ((uint)0xe0000000)
diff --git a/arch/ppc/platforms/chestnut.c b/arch/ppc/platforms/chestnut.c
index df6ff98c023a..48a4a510d598 100644
--- a/arch/ppc/platforms/chestnut.c
+++ b/arch/ppc/platforms/chestnut.c
@@ -541,7 +541,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
541 541
542 ppc_md.setup_arch = chestnut_setup_arch; 542 ppc_md.setup_arch = chestnut_setup_arch;
543 ppc_md.show_cpuinfo = chestnut_show_cpuinfo; 543 ppc_md.show_cpuinfo = chestnut_show_cpuinfo;
544 ppc_md.irq_canonicalize = NULL;
545 ppc_md.init_IRQ = mv64360_init_irq; 544 ppc_md.init_IRQ = mv64360_init_irq;
546 ppc_md.get_irq = mv64360_get_irq; 545 ppc_md.get_irq = mv64360_get_irq;
547 ppc_md.init = NULL; 546 ppc_md.init = NULL;
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 7d3fbb5c5db2..f12192cc4d42 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -29,7 +29,7 @@ void __iomem *gg2_pci_config_base;
29 * limit the bus number to 3 bits 29 * limit the bus number to 3 bits
30 */ 30 */
31 31
32int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off, 32int gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
33 int len, u32 *val) 33 int len, u32 *val)
34{ 34{
35 volatile void __iomem *cfg_data; 35 volatile void __iomem *cfg_data;
@@ -56,7 +56,7 @@ int __chrp gg2_read_config(struct pci_bus *bus, unsigned int devfn, int off,
56 return PCIBIOS_SUCCESSFUL; 56 return PCIBIOS_SUCCESSFUL;
57} 57}
58 58
59int __chrp gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off, 59int gg2_write_config(struct pci_bus *bus, unsigned int devfn, int off,
60 int len, u32 val) 60 int len, u32 val)
61{ 61{
62 volatile void __iomem *cfg_data; 62 volatile void __iomem *cfg_data;
@@ -92,7 +92,7 @@ static struct pci_ops gg2_pci_ops =
92/* 92/*
93 * Access functions for PCI config space using RTAS calls. 93 * Access functions for PCI config space using RTAS calls.
94 */ 94 */
95int __chrp 95int
96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 96rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
97 int len, u32 *val) 97 int len, u32 *val)
98{ 98{
@@ -108,7 +108,7 @@ rtas_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL; 108 return rval? PCIBIOS_DEVICE_NOT_FOUND: PCIBIOS_SUCCESSFUL;
109} 109}
110 110
111int __chrp 111int
112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 112rtas_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
113 int len, u32 val) 113 int len, u32 val)
114{ 114{
diff --git a/arch/ppc/platforms/chrp_setup.c b/arch/ppc/platforms/chrp_setup.c
index 66346f0de7ec..8c874e957a4b 100644
--- a/arch/ppc/platforms/chrp_setup.c
+++ b/arch/ppc/platforms/chrp_setup.c
@@ -104,7 +104,7 @@ static const char *gg2_cachemodes[4] = {
104 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode" 104 "Disabled", "Write-Through", "Copy-Back", "Transparent Mode"
105}; 105};
106 106
107int __chrp 107int
108chrp_show_cpuinfo(struct seq_file *m) 108chrp_show_cpuinfo(struct seq_file *m)
109{ 109{
110 int i, sdramen; 110 int i, sdramen;
@@ -302,7 +302,7 @@ void __init chrp_setup_arch(void)
302 pci_create_OF_bus_map(); 302 pci_create_OF_bus_map();
303} 303}
304 304
305void __chrp 305void
306chrp_event_scan(void) 306chrp_event_scan(void)
307{ 307{
308 unsigned char log[1024]; 308 unsigned char log[1024];
@@ -313,7 +313,7 @@ chrp_event_scan(void)
313 ppc_md.heartbeat_count = ppc_md.heartbeat_reset; 313 ppc_md.heartbeat_count = ppc_md.heartbeat_reset;
314} 314}
315 315
316void __chrp 316void
317chrp_restart(char *cmd) 317chrp_restart(char *cmd)
318{ 318{
319 printk("RTAS system-reboot returned %d\n", 319 printk("RTAS system-reboot returned %d\n",
@@ -321,7 +321,7 @@ chrp_restart(char *cmd)
321 for (;;); 321 for (;;);
322} 322}
323 323
324void __chrp 324void
325chrp_power_off(void) 325chrp_power_off(void)
326{ 326{
327 /* allow power on only with power button press */ 327 /* allow power on only with power button press */
@@ -330,20 +330,12 @@ chrp_power_off(void)
330 for (;;); 330 for (;;);
331} 331}
332 332
333void __chrp 333void
334chrp_halt(void) 334chrp_halt(void)
335{ 335{
336 chrp_power_off(); 336 chrp_power_off();
337} 337}
338 338
339u_int __chrp
340chrp_irq_canonicalize(u_int irq)
341{
342 if (irq == 2)
343 return 9;
344 return irq;
345}
346
347/* 339/*
348 * Finds the open-pic node and sets OpenPIC_Addr based on its reg property. 340 * Finds the open-pic node and sets OpenPIC_Addr based on its reg property.
349 * Then checks if it has an interrupt-ranges property. If it does then 341 * Then checks if it has an interrupt-ranges property. If it does then
@@ -499,6 +491,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
499 DMA_MODE_READ = 0x44; 491 DMA_MODE_READ = 0x44;
500 DMA_MODE_WRITE = 0x48; 492 DMA_MODE_WRITE = 0x48;
501 isa_io_base = CHRP_ISA_IO_BASE; /* default value */ 493 isa_io_base = CHRP_ISA_IO_BASE; /* default value */
494 ppc_do_canonicalize_irqs = 1;
502 495
503 if (root) 496 if (root)
504 machine = get_property(root, "model", NULL); 497 machine = get_property(root, "model", NULL);
@@ -517,7 +510,6 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
517 ppc_md.show_percpuinfo = of_show_percpuinfo; 510 ppc_md.show_percpuinfo = of_show_percpuinfo;
518 ppc_md.show_cpuinfo = chrp_show_cpuinfo; 511 ppc_md.show_cpuinfo = chrp_show_cpuinfo;
519 512
520 ppc_md.irq_canonicalize = chrp_irq_canonicalize;
521 ppc_md.init_IRQ = chrp_init_IRQ; 513 ppc_md.init_IRQ = chrp_init_IRQ;
522 if (_chrp_type == _CHRP_Pegasos) 514 if (_chrp_type == _CHRP_Pegasos)
523 ppc_md.get_irq = i8259_irq; 515 ppc_md.get_irq = i8259_irq;
@@ -571,7 +563,7 @@ chrp_init(unsigned long r3, unsigned long r4, unsigned long r5,
571 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0); 563 if (ppc_md.progress) ppc_md.progress("Linux/PPC "UTS_RELEASE"\n", 0x0);
572} 564}
573 565
574void __chrp 566void
575rtas_display_progress(char *s, unsigned short hex) 567rtas_display_progress(char *s, unsigned short hex)
576{ 568{
577 int width; 569 int width;
@@ -598,7 +590,7 @@ rtas_display_progress(char *s, unsigned short hex)
598 call_rtas( "display-character", 1, 1, NULL, ' ' ); 590 call_rtas( "display-character", 1, 1, NULL, ' ' );
599} 591}
600 592
601void __chrp 593void
602rtas_indicator_progress(char *s, unsigned short hex) 594rtas_indicator_progress(char *s, unsigned short hex)
603{ 595{
604 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex); 596 call_rtas("set-indicator", 3, 1, NULL, 6, 0, hex);
diff --git a/arch/ppc/platforms/chrp_smp.c b/arch/ppc/platforms/chrp_smp.c
index 0ea1f7d9e46a..97e539557ecb 100644
--- a/arch/ppc/platforms/chrp_smp.c
+++ b/arch/ppc/platforms/chrp_smp.c
@@ -31,6 +31,7 @@
31#include <asm/residual.h> 31#include <asm/residual.h>
32#include <asm/time.h> 32#include <asm/time.h>
33#include <asm/open_pic.h> 33#include <asm/open_pic.h>
34#include <asm/machdep.h>
34 35
35extern unsigned long smp_chrp_cpu_nr; 36extern unsigned long smp_chrp_cpu_nr;
36 37
@@ -88,7 +89,7 @@ smp_chrp_take_timebase(void)
88} 89}
89 90
90/* CHRP with openpic */ 91/* CHRP with openpic */
91struct smp_ops_t chrp_smp_ops __chrpdata = { 92struct smp_ops_t chrp_smp_ops = {
92 .message_pass = smp_openpic_message_pass, 93 .message_pass = smp_openpic_message_pass,
93 .probe = smp_chrp_probe, 94 .probe = smp_chrp_probe,
94 .kick_cpu = smp_chrp_kick_cpu, 95 .kick_cpu = smp_chrp_kick_cpu,
diff --git a/arch/ppc/platforms/chrp_time.c b/arch/ppc/platforms/chrp_time.c
index 6037ce7796f5..29d074c305f0 100644
--- a/arch/ppc/platforms/chrp_time.c
+++ b/arch/ppc/platforms/chrp_time.c
@@ -52,7 +52,7 @@ long __init chrp_time_init(void)
52 return 0; 52 return 0;
53} 53}
54 54
55int __chrp chrp_cmos_clock_read(int addr) 55int chrp_cmos_clock_read(int addr)
56{ 56{
57 if (nvram_as1 != 0) 57 if (nvram_as1 != 0)
58 outb(addr>>8, nvram_as1); 58 outb(addr>>8, nvram_as1);
@@ -60,7 +60,7 @@ int __chrp chrp_cmos_clock_read(int addr)
60 return (inb(nvram_data)); 60 return (inb(nvram_data));
61} 61}
62 62
63void __chrp chrp_cmos_clock_write(unsigned long val, int addr) 63void chrp_cmos_clock_write(unsigned long val, int addr)
64{ 64{
65 if (nvram_as1 != 0) 65 if (nvram_as1 != 0)
66 outb(addr>>8, nvram_as1); 66 outb(addr>>8, nvram_as1);
@@ -72,7 +72,7 @@ void __chrp chrp_cmos_clock_write(unsigned long val, int addr)
72/* 72/*
73 * Set the hardware clock. -- Cort 73 * Set the hardware clock. -- Cort
74 */ 74 */
75int __chrp chrp_set_rtc_time(unsigned long nowtime) 75int chrp_set_rtc_time(unsigned long nowtime)
76{ 76{
77 unsigned char save_control, save_freq_select; 77 unsigned char save_control, save_freq_select;
78 struct rtc_time tm; 78 struct rtc_time tm;
@@ -118,7 +118,7 @@ int __chrp chrp_set_rtc_time(unsigned long nowtime)
118 return 0; 118 return 0;
119} 119}
120 120
121unsigned long __chrp chrp_get_rtc_time(void) 121unsigned long chrp_get_rtc_time(void)
122{ 122{
123 unsigned int year, mon, day, hour, min, sec; 123 unsigned int year, mon, day, hour, min, sec;
124 int uip, i; 124 int uip, i;
diff --git a/arch/ppc/platforms/ev64360.c b/arch/ppc/platforms/ev64360.c
index 9811a8a52c25..53388a1c334f 100644
--- a/arch/ppc/platforms/ev64360.c
+++ b/arch/ppc/platforms/ev64360.c
@@ -35,6 +35,7 @@
35#include <asm/bootinfo.h> 35#include <asm/bootinfo.h>
36#include <asm/ppcboot.h> 36#include <asm/ppcboot.h>
37#include <asm/mv64x60.h> 37#include <asm/mv64x60.h>
38#include <asm/machdep.h>
38#include <platforms/ev64360.h> 39#include <platforms/ev64360.h>
39 40
40#define BOARD_VENDOR "Marvell" 41#define BOARD_VENDOR "Marvell"
diff --git a/arch/ppc/platforms/gemini_setup.c b/arch/ppc/platforms/gemini_setup.c
index 3a5ff9fb71d6..ec6aa04d001e 100644
--- a/arch/ppc/platforms/gemini_setup.c
+++ b/arch/ppc/platforms/gemini_setup.c
@@ -35,6 +35,7 @@
35#include <asm/time.h> 35#include <asm/time.h>
36#include <asm/open_pic.h> 36#include <asm/open_pic.h>
37#include <asm/bootinfo.h> 37#include <asm/bootinfo.h>
38#include <asm/machdep.h>
38 39
39void gemini_find_bridges(void); 40void gemini_find_bridges(void);
40static int gemini_get_clock_speed(void); 41static int gemini_get_clock_speed(void);
@@ -555,7 +556,6 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
555 556
556 ppc_md.setup_arch = gemini_setup_arch; 557 ppc_md.setup_arch = gemini_setup_arch;
557 ppc_md.show_cpuinfo = gemini_show_cpuinfo; 558 ppc_md.show_cpuinfo = gemini_show_cpuinfo;
558 ppc_md.irq_canonicalize = NULL;
559 ppc_md.init_IRQ = gemini_init_IRQ; 559 ppc_md.init_IRQ = gemini_init_IRQ;
560 ppc_md.get_irq = openpic_get_irq; 560 ppc_md.get_irq = openpic_get_irq;
561 ppc_md.init = NULL; 561 ppc_md.init = NULL;
diff --git a/arch/ppc/platforms/katana.c b/arch/ppc/platforms/katana.c
index 2b53afae0e9c..3eb611e23f69 100644
--- a/arch/ppc/platforms/katana.c
+++ b/arch/ppc/platforms/katana.c
@@ -42,6 +42,7 @@
42#include <asm/ppcboot.h> 42#include <asm/ppcboot.h>
43#include <asm/mv64x60.h> 43#include <asm/mv64x60.h>
44#include <platforms/katana.h> 44#include <platforms/katana.h>
45#include <asm/machdep.h>
45 46
46static struct mv64x60_handle bh; 47static struct mv64x60_handle bh;
47static katana_id_t katana_id; 48static katana_id_t katana_id;
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index b604cf8b3cae..d44cc991179f 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -35,6 +35,7 @@
35#include <asm/io.h> 35#include <asm/io.h>
36#include <asm/mpc52xx.h> 36#include <asm/mpc52xx.h>
37#include <asm/ppc_sys.h> 37#include <asm/ppc_sys.h>
38#include <asm/machdep.h>
38 39
39#include <syslib/mpc52xx_pci.h> 40#include <syslib/mpc52xx_pci.h>
40 41
diff --git a/arch/ppc/platforms/lopec.c b/arch/ppc/platforms/lopec.c
index a5569525e0af..800c56a07a97 100644
--- a/arch/ppc/platforms/lopec.c
+++ b/arch/ppc/platforms/lopec.c
@@ -144,15 +144,6 @@ lopec_show_cpuinfo(struct seq_file *m)
144 return 0; 144 return 0;
145} 145}
146 146
147static u32
148lopec_irq_canonicalize(u32 irq)
149{
150 if (irq == 2)
151 return 9;
152 else
153 return irq;
154}
155
156static void 147static void
157lopec_restart(char *cmd) 148lopec_restart(char *cmd)
158{ 149{
@@ -379,10 +370,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
379 ISA_DMA_THRESHOLD = 0x00ffffff; 370 ISA_DMA_THRESHOLD = 0x00ffffff;
380 DMA_MODE_READ = 0x44; 371 DMA_MODE_READ = 0x44;
381 DMA_MODE_WRITE = 0x48; 372 DMA_MODE_WRITE = 0x48;
373 ppc_do_canonicalize_irqs = 1;
382 374
383 ppc_md.setup_arch = lopec_setup_arch; 375 ppc_md.setup_arch = lopec_setup_arch;
384 ppc_md.show_cpuinfo = lopec_show_cpuinfo; 376 ppc_md.show_cpuinfo = lopec_show_cpuinfo;
385 ppc_md.irq_canonicalize = lopec_irq_canonicalize;
386 ppc_md.init_IRQ = lopec_init_IRQ; 377 ppc_md.init_IRQ = lopec_init_IRQ;
387 ppc_md.get_irq = openpic_get_irq; 378 ppc_md.get_irq = openpic_get_irq;
388 379
diff --git a/arch/ppc/platforms/pal4_setup.c b/arch/ppc/platforms/pal4_setup.c
index 12446b93e38c..f93a3f871932 100644
--- a/arch/ppc/platforms/pal4_setup.c
+++ b/arch/ppc/platforms/pal4_setup.c
@@ -28,6 +28,7 @@
28#include <asm/io.h> 28#include <asm/io.h>
29#include <asm/todc.h> 29#include <asm/todc.h>
30#include <asm/bootinfo.h> 30#include <asm/bootinfo.h>
31#include <asm/machdep.h>
31 32
32#include <syslib/cpc700.h> 33#include <syslib/cpc700.h>
33 34
diff --git a/arch/ppc/platforms/pmac_backlight.c b/arch/ppc/platforms/pmac_backlight.c
index ed2b1cebc19a..8be2f7d071f0 100644
--- a/arch/ppc/platforms/pmac_backlight.c
+++ b/arch/ppc/platforms/pmac_backlight.c
@@ -37,7 +37,7 @@ static int backlight_req_enable = -1;
37static void backlight_callback(void *); 37static void backlight_callback(void *);
38static DECLARE_WORK(backlight_work, backlight_callback, NULL); 38static DECLARE_WORK(backlight_work, backlight_callback, NULL);
39 39
40void __pmac register_backlight_controller(struct backlight_controller *ctrler, 40void register_backlight_controller(struct backlight_controller *ctrler,
41 void *data, char *type) 41 void *data, char *type)
42{ 42{
43 struct device_node* bk_node; 43 struct device_node* bk_node;
@@ -99,7 +99,7 @@ void __pmac register_backlight_controller(struct backlight_controller *ctrler,
99} 99}
100EXPORT_SYMBOL(register_backlight_controller); 100EXPORT_SYMBOL(register_backlight_controller);
101 101
102void __pmac unregister_backlight_controller(struct backlight_controller 102void unregister_backlight_controller(struct backlight_controller
103 *ctrler, void *data) 103 *ctrler, void *data)
104{ 104{
105 /* We keep the current backlight level (for now) */ 105 /* We keep the current backlight level (for now) */
@@ -108,7 +108,7 @@ void __pmac unregister_backlight_controller(struct backlight_controller
108} 108}
109EXPORT_SYMBOL(unregister_backlight_controller); 109EXPORT_SYMBOL(unregister_backlight_controller);
110 110
111static int __pmac __set_backlight_enable(int enable) 111static int __set_backlight_enable(int enable)
112{ 112{
113 int rc; 113 int rc;
114 114
@@ -122,7 +122,7 @@ static int __pmac __set_backlight_enable(int enable)
122 release_console_sem(); 122 release_console_sem();
123 return rc; 123 return rc;
124} 124}
125int __pmac set_backlight_enable(int enable) 125int set_backlight_enable(int enable)
126{ 126{
127 if (!backlighter) 127 if (!backlighter)
128 return -ENODEV; 128 return -ENODEV;
@@ -133,7 +133,7 @@ int __pmac set_backlight_enable(int enable)
133 133
134EXPORT_SYMBOL(set_backlight_enable); 134EXPORT_SYMBOL(set_backlight_enable);
135 135
136int __pmac get_backlight_enable(void) 136int get_backlight_enable(void)
137{ 137{
138 if (!backlighter) 138 if (!backlighter)
139 return -ENODEV; 139 return -ENODEV;
@@ -141,7 +141,7 @@ int __pmac get_backlight_enable(void)
141} 141}
142EXPORT_SYMBOL(get_backlight_enable); 142EXPORT_SYMBOL(get_backlight_enable);
143 143
144static int __pmac __set_backlight_level(int level) 144static int __set_backlight_level(int level)
145{ 145{
146 int rc = 0; 146 int rc = 0;
147 147
@@ -165,7 +165,7 @@ static int __pmac __set_backlight_level(int level)
165 } 165 }
166 return rc; 166 return rc;
167} 167}
168int __pmac set_backlight_level(int level) 168int set_backlight_level(int level)
169{ 169{
170 if (!backlighter) 170 if (!backlighter)
171 return -ENODEV; 171 return -ENODEV;
@@ -176,7 +176,7 @@ int __pmac set_backlight_level(int level)
176 176
177EXPORT_SYMBOL(set_backlight_level); 177EXPORT_SYMBOL(set_backlight_level);
178 178
179int __pmac get_backlight_level(void) 179int get_backlight_level(void)
180{ 180{
181 if (!backlighter) 181 if (!backlighter)
182 return -ENODEV; 182 return -ENODEV;
diff --git a/arch/ppc/platforms/pmac_cpufreq.c b/arch/ppc/platforms/pmac_cpufreq.c
index d4bc5f67ec53..fba7e4d7c0bf 100644
--- a/arch/ppc/platforms/pmac_cpufreq.c
+++ b/arch/ppc/platforms/pmac_cpufreq.c
@@ -136,7 +136,7 @@ static inline void debug_calc_bogomips(void)
136 136
137/* Switch CPU speed under 750FX CPU control 137/* Switch CPU speed under 750FX CPU control
138 */ 138 */
139static int __pmac cpu_750fx_cpu_speed(int low_speed) 139static int cpu_750fx_cpu_speed(int low_speed)
140{ 140{
141 u32 hid2; 141 u32 hid2;
142 142
@@ -172,7 +172,7 @@ static int __pmac cpu_750fx_cpu_speed(int low_speed)
172 return 0; 172 return 0;
173} 173}
174 174
175static unsigned int __pmac cpu_750fx_get_cpu_speed(void) 175static unsigned int cpu_750fx_get_cpu_speed(void)
176{ 176{
177 if (mfspr(SPRN_HID1) & HID1_PS) 177 if (mfspr(SPRN_HID1) & HID1_PS)
178 return low_freq; 178 return low_freq;
@@ -181,7 +181,7 @@ static unsigned int __pmac cpu_750fx_get_cpu_speed(void)
181} 181}
182 182
183/* Switch CPU speed using DFS */ 183/* Switch CPU speed using DFS */
184static int __pmac dfs_set_cpu_speed(int low_speed) 184static int dfs_set_cpu_speed(int low_speed)
185{ 185{
186 if (low_speed == 0) { 186 if (low_speed == 0) {
187 /* ramping up, set voltage first */ 187 /* ramping up, set voltage first */
@@ -205,7 +205,7 @@ static int __pmac dfs_set_cpu_speed(int low_speed)
205 return 0; 205 return 0;
206} 206}
207 207
208static unsigned int __pmac dfs_get_cpu_speed(void) 208static unsigned int dfs_get_cpu_speed(void)
209{ 209{
210 if (mfspr(SPRN_HID1) & HID1_DFS) 210 if (mfspr(SPRN_HID1) & HID1_DFS)
211 return low_freq; 211 return low_freq;
@@ -216,7 +216,7 @@ static unsigned int __pmac dfs_get_cpu_speed(void)
216 216
217/* Switch CPU speed using slewing GPIOs 217/* Switch CPU speed using slewing GPIOs
218 */ 218 */
219static int __pmac gpios_set_cpu_speed(int low_speed) 219static int gpios_set_cpu_speed(int low_speed)
220{ 220{
221 int gpio, timeout = 0; 221 int gpio, timeout = 0;
222 222
@@ -258,7 +258,7 @@ static int __pmac gpios_set_cpu_speed(int low_speed)
258 258
259/* Switch CPU speed under PMU control 259/* Switch CPU speed under PMU control
260 */ 260 */
261static int __pmac pmu_set_cpu_speed(int low_speed) 261static int pmu_set_cpu_speed(int low_speed)
262{ 262{
263 struct adb_request req; 263 struct adb_request req;
264 unsigned long save_l2cr; 264 unsigned long save_l2cr;
@@ -354,7 +354,7 @@ static int __pmac pmu_set_cpu_speed(int low_speed)
354 return 0; 354 return 0;
355} 355}
356 356
357static int __pmac do_set_cpu_speed(int speed_mode, int notify) 357static int do_set_cpu_speed(int speed_mode, int notify)
358{ 358{
359 struct cpufreq_freqs freqs; 359 struct cpufreq_freqs freqs;
360 unsigned long l3cr; 360 unsigned long l3cr;
@@ -391,17 +391,17 @@ static int __pmac do_set_cpu_speed(int speed_mode, int notify)
391 return 0; 391 return 0;
392} 392}
393 393
394static unsigned int __pmac pmac_cpufreq_get_speed(unsigned int cpu) 394static unsigned int pmac_cpufreq_get_speed(unsigned int cpu)
395{ 395{
396 return cur_freq; 396 return cur_freq;
397} 397}
398 398
399static int __pmac pmac_cpufreq_verify(struct cpufreq_policy *policy) 399static int pmac_cpufreq_verify(struct cpufreq_policy *policy)
400{ 400{
401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs); 401 return cpufreq_frequency_table_verify(policy, pmac_cpu_freqs);
402} 402}
403 403
404static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy, 404static int pmac_cpufreq_target( struct cpufreq_policy *policy,
405 unsigned int target_freq, 405 unsigned int target_freq,
406 unsigned int relation) 406 unsigned int relation)
407{ 407{
@@ -414,13 +414,13 @@ static int __pmac pmac_cpufreq_target( struct cpufreq_policy *policy,
414 return do_set_cpu_speed(newstate, 1); 414 return do_set_cpu_speed(newstate, 1);
415} 415}
416 416
417unsigned int __pmac pmac_get_one_cpufreq(int i) 417unsigned int pmac_get_one_cpufreq(int i)
418{ 418{
419 /* Supports only one CPU for now */ 419 /* Supports only one CPU for now */
420 return (i == 0) ? cur_freq : 0; 420 return (i == 0) ? cur_freq : 0;
421} 421}
422 422
423static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy) 423static int pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
424{ 424{
425 if (policy->cpu != 0) 425 if (policy->cpu != 0)
426 return -ENODEV; 426 return -ENODEV;
@@ -433,7 +433,7 @@ static int __pmac pmac_cpufreq_cpu_init(struct cpufreq_policy *policy)
433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs); 433 return cpufreq_frequency_table_cpuinfo(policy, pmac_cpu_freqs);
434} 434}
435 435
436static u32 __pmac read_gpio(struct device_node *np) 436static u32 read_gpio(struct device_node *np)
437{ 437{
438 u32 *reg = (u32 *)get_property(np, "reg", NULL); 438 u32 *reg = (u32 *)get_property(np, "reg", NULL);
439 u32 offset; 439 u32 offset;
@@ -452,7 +452,7 @@ static u32 __pmac read_gpio(struct device_node *np)
452 return offset; 452 return offset;
453} 453}
454 454
455static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg) 455static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
456{ 456{
457 /* Ok, this could be made a bit smarter, but let's be robust for now. We 457 /* Ok, this could be made a bit smarter, but let's be robust for now. We
458 * always force a speed change to high speed before sleep, to make sure 458 * always force a speed change to high speed before sleep, to make sure
@@ -468,7 +468,7 @@ static int __pmac pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message
468 return 0; 468 return 0;
469} 469}
470 470
471static int __pmac pmac_cpufreq_resume(struct cpufreq_policy *policy) 471static int pmac_cpufreq_resume(struct cpufreq_policy *policy)
472{ 472{
473 /* If we resume, first check if we have a get() function */ 473 /* If we resume, first check if we have a get() function */
474 if (get_speed_proc) 474 if (get_speed_proc)
@@ -501,7 +501,7 @@ static struct cpufreq_driver pmac_cpufreq_driver = {
501}; 501};
502 502
503 503
504static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode) 504static int pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
505{ 505{
506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL, 506 struct device_node *volt_gpio_np = of_find_node_by_name(NULL,
507 "voltage-gpio"); 507 "voltage-gpio");
@@ -593,7 +593,7 @@ static int __pmac pmac_cpufreq_init_MacRISC3(struct device_node *cpunode)
593 return 0; 593 return 0;
594} 594}
595 595
596static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode) 596static int pmac_cpufreq_init_7447A(struct device_node *cpunode)
597{ 597{
598 struct device_node *volt_gpio_np; 598 struct device_node *volt_gpio_np;
599 599
@@ -620,7 +620,7 @@ static int __pmac pmac_cpufreq_init_7447A(struct device_node *cpunode)
620 return 0; 620 return 0;
621} 621}
622 622
623static int __pmac pmac_cpufreq_init_750FX(struct device_node *cpunode) 623static int pmac_cpufreq_init_750FX(struct device_node *cpunode)
624{ 624{
625 struct device_node *volt_gpio_np; 625 struct device_node *volt_gpio_np;
626 u32 pvr, *value; 626 u32 pvr, *value;
diff --git a/arch/ppc/platforms/pmac_feature.c b/arch/ppc/platforms/pmac_feature.c
index dd6d45ae0501..58884a63ebdb 100644
--- a/arch/ppc/platforms/pmac_feature.c
+++ b/arch/ppc/platforms/pmac_feature.c
@@ -63,7 +63,7 @@ extern struct device_node *k2_skiplist[2];
63 * We use a single global lock to protect accesses. Each driver has 63 * We use a single global lock to protect accesses. Each driver has
64 * to take care of its own locking 64 * to take care of its own locking
65 */ 65 */
66static DEFINE_SPINLOCK(feature_lock __pmacdata); 66static DEFINE_SPINLOCK(feature_lock);
67 67
68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags); 68#define LOCK(flags) spin_lock_irqsave(&feature_lock, flags);
69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags); 69#define UNLOCK(flags) spin_unlock_irqrestore(&feature_lock, flags);
@@ -72,9 +72,9 @@ static DEFINE_SPINLOCK(feature_lock __pmacdata);
72/* 72/*
73 * Instance of some macio stuffs 73 * Instance of some macio stuffs
74 */ 74 */
75struct macio_chip macio_chips[MAX_MACIO_CHIPS] __pmacdata; 75struct macio_chip macio_chips[MAX_MACIO_CHIPS];
76 76
77struct macio_chip* __pmac macio_find(struct device_node* child, int type) 77struct macio_chip* macio_find(struct device_node* child, int type)
78{ 78{
79 while(child) { 79 while(child) {
80 int i; 80 int i;
@@ -89,7 +89,7 @@ struct macio_chip* __pmac macio_find(struct device_node* child, int type)
89} 89}
90EXPORT_SYMBOL_GPL(macio_find); 90EXPORT_SYMBOL_GPL(macio_find);
91 91
92static const char* macio_names[] __pmacdata = 92static const char* macio_names[] =
93{ 93{
94 "Unknown", 94 "Unknown",
95 "Grand Central", 95 "Grand Central",
@@ -116,10 +116,10 @@ static const char* macio_names[] __pmacdata =
116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v))) 116#define UN_BIS(r,v) (UN_OUT((r), UN_IN(r) | (v)))
117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v))) 117#define UN_BIC(r,v) (UN_OUT((r), UN_IN(r) & ~(v)))
118 118
119static struct device_node* uninorth_node __pmacdata; 119static struct device_node* uninorth_node;
120static u32 __iomem * uninorth_base __pmacdata; 120static u32 __iomem * uninorth_base;
121static u32 uninorth_rev __pmacdata; 121static u32 uninorth_rev;
122static int uninorth_u3 __pmacdata; 122static int uninorth_u3;
123static void __iomem *u3_ht; 123static void __iomem *u3_ht;
124 124
125/* 125/*
@@ -142,13 +142,13 @@ struct pmac_mb_def
142 struct feature_table_entry* features; 142 struct feature_table_entry* features;
143 unsigned long board_flags; 143 unsigned long board_flags;
144}; 144};
145static struct pmac_mb_def pmac_mb __pmacdata; 145static struct pmac_mb_def pmac_mb;
146 146
147/* 147/*
148 * Here are the chip specific feature functions 148 * Here are the chip specific feature functions
149 */ 149 */
150 150
151static inline int __pmac 151static inline int
152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value) 152simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int value)
153{ 153{
154 struct macio_chip* macio; 154 struct macio_chip* macio;
@@ -170,7 +170,7 @@ simple_feature_tweak(struct device_node* node, int type, int reg, u32 mask, int
170 170
171#ifndef CONFIG_POWER4 171#ifndef CONFIG_POWER4
172 172
173static long __pmac 173static long
174ohare_htw_scc_enable(struct device_node* node, long param, long value) 174ohare_htw_scc_enable(struct device_node* node, long param, long value)
175{ 175{
176 struct macio_chip* macio; 176 struct macio_chip* macio;
@@ -263,21 +263,21 @@ ohare_htw_scc_enable(struct device_node* node, long param, long value)
263 return 0; 263 return 0;
264} 264}
265 265
266static long __pmac 266static long
267ohare_floppy_enable(struct device_node* node, long param, long value) 267ohare_floppy_enable(struct device_node* node, long param, long value)
268{ 268{
269 return simple_feature_tweak(node, macio_ohare, 269 return simple_feature_tweak(node, macio_ohare,
270 OHARE_FCR, OH_FLOPPY_ENABLE, value); 270 OHARE_FCR, OH_FLOPPY_ENABLE, value);
271} 271}
272 272
273static long __pmac 273static long
274ohare_mesh_enable(struct device_node* node, long param, long value) 274ohare_mesh_enable(struct device_node* node, long param, long value)
275{ 275{
276 return simple_feature_tweak(node, macio_ohare, 276 return simple_feature_tweak(node, macio_ohare,
277 OHARE_FCR, OH_MESH_ENABLE, value); 277 OHARE_FCR, OH_MESH_ENABLE, value);
278} 278}
279 279
280static long __pmac 280static long
281ohare_ide_enable(struct device_node* node, long param, long value) 281ohare_ide_enable(struct device_node* node, long param, long value)
282{ 282{
283 switch(param) { 283 switch(param) {
@@ -298,7 +298,7 @@ ohare_ide_enable(struct device_node* node, long param, long value)
298 } 298 }
299} 299}
300 300
301static long __pmac 301static long
302ohare_ide_reset(struct device_node* node, long param, long value) 302ohare_ide_reset(struct device_node* node, long param, long value)
303{ 303{
304 switch(param) { 304 switch(param) {
@@ -313,7 +313,7 @@ ohare_ide_reset(struct device_node* node, long param, long value)
313 } 313 }
314} 314}
315 315
316static long __pmac 316static long
317ohare_sleep_state(struct device_node* node, long param, long value) 317ohare_sleep_state(struct device_node* node, long param, long value)
318{ 318{
319 struct macio_chip* macio = &macio_chips[0]; 319 struct macio_chip* macio = &macio_chips[0];
@@ -329,7 +329,7 @@ ohare_sleep_state(struct device_node* node, long param, long value)
329 return 0; 329 return 0;
330} 330}
331 331
332static long __pmac 332static long
333heathrow_modem_enable(struct device_node* node, long param, long value) 333heathrow_modem_enable(struct device_node* node, long param, long value)
334{ 334{
335 struct macio_chip* macio; 335 struct macio_chip* macio;
@@ -373,7 +373,7 @@ heathrow_modem_enable(struct device_node* node, long param, long value)
373 return 0; 373 return 0;
374} 374}
375 375
376static long __pmac 376static long
377heathrow_floppy_enable(struct device_node* node, long param, long value) 377heathrow_floppy_enable(struct device_node* node, long param, long value)
378{ 378{
379 return simple_feature_tweak(node, macio_unknown, 379 return simple_feature_tweak(node, macio_unknown,
@@ -382,7 +382,7 @@ heathrow_floppy_enable(struct device_node* node, long param, long value)
382 value); 382 value);
383} 383}
384 384
385static long __pmac 385static long
386heathrow_mesh_enable(struct device_node* node, long param, long value) 386heathrow_mesh_enable(struct device_node* node, long param, long value)
387{ 387{
388 struct macio_chip* macio; 388 struct macio_chip* macio;
@@ -411,7 +411,7 @@ heathrow_mesh_enable(struct device_node* node, long param, long value)
411 return 0; 411 return 0;
412} 412}
413 413
414static long __pmac 414static long
415heathrow_ide_enable(struct device_node* node, long param, long value) 415heathrow_ide_enable(struct device_node* node, long param, long value)
416{ 416{
417 switch(param) { 417 switch(param) {
@@ -426,7 +426,7 @@ heathrow_ide_enable(struct device_node* node, long param, long value)
426 } 426 }
427} 427}
428 428
429static long __pmac 429static long
430heathrow_ide_reset(struct device_node* node, long param, long value) 430heathrow_ide_reset(struct device_node* node, long param, long value)
431{ 431{
432 switch(param) { 432 switch(param) {
@@ -441,7 +441,7 @@ heathrow_ide_reset(struct device_node* node, long param, long value)
441 } 441 }
442} 442}
443 443
444static long __pmac 444static long
445heathrow_bmac_enable(struct device_node* node, long param, long value) 445heathrow_bmac_enable(struct device_node* node, long param, long value)
446{ 446{
447 struct macio_chip* macio; 447 struct macio_chip* macio;
@@ -470,7 +470,7 @@ heathrow_bmac_enable(struct device_node* node, long param, long value)
470 return 0; 470 return 0;
471} 471}
472 472
473static long __pmac 473static long
474heathrow_sound_enable(struct device_node* node, long param, long value) 474heathrow_sound_enable(struct device_node* node, long param, long value)
475{ 475{
476 struct macio_chip* macio; 476 struct macio_chip* macio;
@@ -501,16 +501,16 @@ heathrow_sound_enable(struct device_node* node, long param, long value)
501 return 0; 501 return 0;
502} 502}
503 503
504static u32 save_fcr[6] __pmacdata; 504static u32 save_fcr[6];
505static u32 save_mbcr __pmacdata; 505static u32 save_mbcr;
506static u32 save_gpio_levels[2] __pmacdata; 506static u32 save_gpio_levels[2];
507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT] __pmacdata; 507static u8 save_gpio_extint[KEYLARGO_GPIO_EXTINT_CNT];
508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT] __pmacdata; 508static u8 save_gpio_normal[KEYLARGO_GPIO_CNT];
509static u32 save_unin_clock_ctl __pmacdata; 509static u32 save_unin_clock_ctl;
510static struct dbdma_regs save_dbdma[13] __pmacdata; 510static struct dbdma_regs save_dbdma[13];
511static struct dbdma_regs save_alt_dbdma[13] __pmacdata; 511static struct dbdma_regs save_alt_dbdma[13];
512 512
513static void __pmac 513static void
514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save) 514dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
515{ 515{
516 int i; 516 int i;
@@ -527,7 +527,7 @@ dbdma_save(struct macio_chip* macio, struct dbdma_regs* save)
527 } 527 }
528} 528}
529 529
530static void __pmac 530static void
531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save) 531dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
532{ 532{
533 int i; 533 int i;
@@ -547,7 +547,7 @@ dbdma_restore(struct macio_chip* macio, struct dbdma_regs* save)
547 } 547 }
548} 548}
549 549
550static void __pmac 550static void
551heathrow_sleep(struct macio_chip* macio, int secondary) 551heathrow_sleep(struct macio_chip* macio, int secondary)
552{ 552{
553 if (secondary) { 553 if (secondary) {
@@ -580,7 +580,7 @@ heathrow_sleep(struct macio_chip* macio, int secondary)
580 (void)MACIO_IN32(HEATHROW_FCR); 580 (void)MACIO_IN32(HEATHROW_FCR);
581} 581}
582 582
583static void __pmac 583static void
584heathrow_wakeup(struct macio_chip* macio, int secondary) 584heathrow_wakeup(struct macio_chip* macio, int secondary)
585{ 585{
586 if (secondary) { 586 if (secondary) {
@@ -605,7 +605,7 @@ heathrow_wakeup(struct macio_chip* macio, int secondary)
605 } 605 }
606} 606}
607 607
608static long __pmac 608static long
609heathrow_sleep_state(struct device_node* node, long param, long value) 609heathrow_sleep_state(struct device_node* node, long param, long value)
610{ 610{
611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0) 611 if ((pmac_mb.board_flags & PMAC_MB_CAN_SLEEP) == 0)
@@ -622,7 +622,7 @@ heathrow_sleep_state(struct device_node* node, long param, long value)
622 return 0; 622 return 0;
623} 623}
624 624
625static long __pmac 625static long
626core99_scc_enable(struct device_node* node, long param, long value) 626core99_scc_enable(struct device_node* node, long param, long value)
627{ 627{
628 struct macio_chip* macio; 628 struct macio_chip* macio;
@@ -723,7 +723,7 @@ core99_scc_enable(struct device_node* node, long param, long value)
723 return 0; 723 return 0;
724} 724}
725 725
726static long __pmac 726static long
727core99_modem_enable(struct device_node* node, long param, long value) 727core99_modem_enable(struct device_node* node, long param, long value)
728{ 728{
729 struct macio_chip* macio; 729 struct macio_chip* macio;
@@ -775,7 +775,7 @@ core99_modem_enable(struct device_node* node, long param, long value)
775 return 0; 775 return 0;
776} 776}
777 777
778static long __pmac 778static long
779pangea_modem_enable(struct device_node* node, long param, long value) 779pangea_modem_enable(struct device_node* node, long param, long value)
780{ 780{
781 struct macio_chip* macio; 781 struct macio_chip* macio;
@@ -830,7 +830,7 @@ pangea_modem_enable(struct device_node* node, long param, long value)
830 return 0; 830 return 0;
831} 831}
832 832
833static long __pmac 833static long
834core99_ata100_enable(struct device_node* node, long value) 834core99_ata100_enable(struct device_node* node, long value)
835{ 835{
836 unsigned long flags; 836 unsigned long flags;
@@ -860,7 +860,7 @@ core99_ata100_enable(struct device_node* node, long value)
860 return 0; 860 return 0;
861} 861}
862 862
863static long __pmac 863static long
864core99_ide_enable(struct device_node* node, long param, long value) 864core99_ide_enable(struct device_node* node, long param, long value)
865{ 865{
866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2 866 /* Bus ID 0 to 2 are KeyLargo based IDE, busID 3 is U2
@@ -883,7 +883,7 @@ core99_ide_enable(struct device_node* node, long param, long value)
883 } 883 }
884} 884}
885 885
886static long __pmac 886static long
887core99_ide_reset(struct device_node* node, long param, long value) 887core99_ide_reset(struct device_node* node, long param, long value)
888{ 888{
889 switch(param) { 889 switch(param) {
@@ -901,7 +901,7 @@ core99_ide_reset(struct device_node* node, long param, long value)
901 } 901 }
902} 902}
903 903
904static long __pmac 904static long
905core99_gmac_enable(struct device_node* node, long param, long value) 905core99_gmac_enable(struct device_node* node, long param, long value)
906{ 906{
907 unsigned long flags; 907 unsigned long flags;
@@ -918,7 +918,7 @@ core99_gmac_enable(struct device_node* node, long param, long value)
918 return 0; 918 return 0;
919} 919}
920 920
921static long __pmac 921static long
922core99_gmac_phy_reset(struct device_node* node, long param, long value) 922core99_gmac_phy_reset(struct device_node* node, long param, long value)
923{ 923{
924 unsigned long flags; 924 unsigned long flags;
@@ -943,7 +943,7 @@ core99_gmac_phy_reset(struct device_node* node, long param, long value)
943 return 0; 943 return 0;
944} 944}
945 945
946static long __pmac 946static long
947core99_sound_chip_enable(struct device_node* node, long param, long value) 947core99_sound_chip_enable(struct device_node* node, long param, long value)
948{ 948{
949 struct macio_chip* macio; 949 struct macio_chip* macio;
@@ -973,7 +973,7 @@ core99_sound_chip_enable(struct device_node* node, long param, long value)
973 return 0; 973 return 0;
974} 974}
975 975
976static long __pmac 976static long
977core99_airport_enable(struct device_node* node, long param, long value) 977core99_airport_enable(struct device_node* node, long param, long value)
978{ 978{
979 struct macio_chip* macio; 979 struct macio_chip* macio;
@@ -1060,7 +1060,7 @@ core99_airport_enable(struct device_node* node, long param, long value)
1060} 1060}
1061 1061
1062#ifdef CONFIG_SMP 1062#ifdef CONFIG_SMP
1063static long __pmac 1063static long
1064core99_reset_cpu(struct device_node* node, long param, long value) 1064core99_reset_cpu(struct device_node* node, long param, long value)
1065{ 1065{
1066 unsigned int reset_io = 0; 1066 unsigned int reset_io = 0;
@@ -1104,7 +1104,7 @@ core99_reset_cpu(struct device_node* node, long param, long value)
1104} 1104}
1105#endif /* CONFIG_SMP */ 1105#endif /* CONFIG_SMP */
1106 1106
1107static long __pmac 1107static long
1108core99_usb_enable(struct device_node* node, long param, long value) 1108core99_usb_enable(struct device_node* node, long param, long value)
1109{ 1109{
1110 struct macio_chip* macio; 1110 struct macio_chip* macio;
@@ -1257,7 +1257,7 @@ core99_usb_enable(struct device_node* node, long param, long value)
1257 return 0; 1257 return 0;
1258} 1258}
1259 1259
1260static long __pmac 1260static long
1261core99_firewire_enable(struct device_node* node, long param, long value) 1261core99_firewire_enable(struct device_node* node, long param, long value)
1262{ 1262{
1263 unsigned long flags; 1263 unsigned long flags;
@@ -1284,7 +1284,7 @@ core99_firewire_enable(struct device_node* node, long param, long value)
1284 return 0; 1284 return 0;
1285} 1285}
1286 1286
1287static long __pmac 1287static long
1288core99_firewire_cable_power(struct device_node* node, long param, long value) 1288core99_firewire_cable_power(struct device_node* node, long param, long value)
1289{ 1289{
1290 unsigned long flags; 1290 unsigned long flags;
@@ -1315,7 +1315,7 @@ core99_firewire_cable_power(struct device_node* node, long param, long value)
1315 return 0; 1315 return 0;
1316} 1316}
1317 1317
1318static long __pmac 1318static long
1319intrepid_aack_delay_enable(struct device_node* node, long param, long value) 1319intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1320{ 1320{
1321 unsigned long flags; 1321 unsigned long flags;
@@ -1336,7 +1336,7 @@ intrepid_aack_delay_enable(struct device_node* node, long param, long value)
1336 1336
1337#endif /* CONFIG_POWER4 */ 1337#endif /* CONFIG_POWER4 */
1338 1338
1339static long __pmac 1339static long
1340core99_read_gpio(struct device_node* node, long param, long value) 1340core99_read_gpio(struct device_node* node, long param, long value)
1341{ 1341{
1342 struct macio_chip* macio = &macio_chips[0]; 1342 struct macio_chip* macio = &macio_chips[0];
@@ -1345,7 +1345,7 @@ core99_read_gpio(struct device_node* node, long param, long value)
1345} 1345}
1346 1346
1347 1347
1348static long __pmac 1348static long
1349core99_write_gpio(struct device_node* node, long param, long value) 1349core99_write_gpio(struct device_node* node, long param, long value)
1350{ 1350{
1351 struct macio_chip* macio = &macio_chips[0]; 1351 struct macio_chip* macio = &macio_chips[0];
@@ -1356,7 +1356,7 @@ core99_write_gpio(struct device_node* node, long param, long value)
1356 1356
1357#ifdef CONFIG_POWER4 1357#ifdef CONFIG_POWER4
1358 1358
1359static long __pmac 1359static long
1360g5_gmac_enable(struct device_node* node, long param, long value) 1360g5_gmac_enable(struct device_node* node, long param, long value)
1361{ 1361{
1362 struct macio_chip* macio = &macio_chips[0]; 1362 struct macio_chip* macio = &macio_chips[0];
@@ -1380,7 +1380,7 @@ g5_gmac_enable(struct device_node* node, long param, long value)
1380 return 0; 1380 return 0;
1381} 1381}
1382 1382
1383static long __pmac 1383static long
1384g5_fw_enable(struct device_node* node, long param, long value) 1384g5_fw_enable(struct device_node* node, long param, long value)
1385{ 1385{
1386 struct macio_chip* macio = &macio_chips[0]; 1386 struct macio_chip* macio = &macio_chips[0];
@@ -1403,7 +1403,7 @@ g5_fw_enable(struct device_node* node, long param, long value)
1403 return 0; 1403 return 0;
1404} 1404}
1405 1405
1406static long __pmac 1406static long
1407g5_mpic_enable(struct device_node* node, long param, long value) 1407g5_mpic_enable(struct device_node* node, long param, long value)
1408{ 1408{
1409 unsigned long flags; 1409 unsigned long flags;
@@ -1419,7 +1419,7 @@ g5_mpic_enable(struct device_node* node, long param, long value)
1419} 1419}
1420 1420
1421#ifdef CONFIG_SMP 1421#ifdef CONFIG_SMP
1422static long __pmac 1422static long
1423g5_reset_cpu(struct device_node* node, long param, long value) 1423g5_reset_cpu(struct device_node* node, long param, long value)
1424{ 1424{
1425 unsigned int reset_io = 0; 1425 unsigned int reset_io = 0;
@@ -1465,7 +1465,7 @@ g5_reset_cpu(struct device_node* node, long param, long value)
1465 * This takes the second CPU off the bus on dual CPU machines 1465 * This takes the second CPU off the bus on dual CPU machines
1466 * running UP 1466 * running UP
1467 */ 1467 */
1468void __pmac g5_phy_disable_cpu1(void) 1468void g5_phy_disable_cpu1(void)
1469{ 1469{
1470 UN_OUT(U3_API_PHY_CONFIG_1, 0); 1470 UN_OUT(U3_API_PHY_CONFIG_1, 0);
1471} 1471}
@@ -1474,7 +1474,7 @@ void __pmac g5_phy_disable_cpu1(void)
1474 1474
1475#ifndef CONFIG_POWER4 1475#ifndef CONFIG_POWER4
1476 1476
1477static void __pmac 1477static void
1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode) 1478keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1479{ 1479{
1480 u32 temp; 1480 u32 temp;
@@ -1528,7 +1528,7 @@ keylargo_shutdown(struct macio_chip* macio, int sleep_mode)
1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1528 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1529} 1529}
1530 1530
1531static void __pmac 1531static void
1532pangea_shutdown(struct macio_chip* macio, int sleep_mode) 1532pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1533{ 1533{
1534 u32 temp; 1534 u32 temp;
@@ -1562,7 +1562,7 @@ pangea_shutdown(struct macio_chip* macio, int sleep_mode)
1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1); 1562 (void)MACIO_IN32(KEYLARGO_FCR0); mdelay(1);
1563} 1563}
1564 1564
1565static void __pmac 1565static void
1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode) 1566intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1567{ 1567{
1568 u32 temp; 1568 u32 temp;
@@ -1591,7 +1591,7 @@ intrepid_shutdown(struct macio_chip* macio, int sleep_mode)
1591} 1591}
1592 1592
1593 1593
1594void __pmac pmac_tweak_clock_spreading(int enable) 1594void pmac_tweak_clock_spreading(int enable)
1595{ 1595{
1596 struct macio_chip* macio = &macio_chips[0]; 1596 struct macio_chip* macio = &macio_chips[0];
1597 1597
@@ -1698,7 +1698,7 @@ void __pmac pmac_tweak_clock_spreading(int enable)
1698} 1698}
1699 1699
1700 1700
1701static int __pmac 1701static int
1702core99_sleep(void) 1702core99_sleep(void)
1703{ 1703{
1704 struct macio_chip* macio; 1704 struct macio_chip* macio;
@@ -1791,7 +1791,7 @@ core99_sleep(void)
1791 return 0; 1791 return 0;
1792} 1792}
1793 1793
1794static int __pmac 1794static int
1795core99_wake_up(void) 1795core99_wake_up(void)
1796{ 1796{
1797 struct macio_chip* macio; 1797 struct macio_chip* macio;
@@ -1854,7 +1854,7 @@ core99_wake_up(void)
1854 return 0; 1854 return 0;
1855} 1855}
1856 1856
1857static long __pmac 1857static long
1858core99_sleep_state(struct device_node* node, long param, long value) 1858core99_sleep_state(struct device_node* node, long param, long value)
1859{ 1859{
1860 /* Param == 1 means to enter the "fake sleep" mode that is 1860 /* Param == 1 means to enter the "fake sleep" mode that is
@@ -1884,7 +1884,7 @@ core99_sleep_state(struct device_node* node, long param, long value)
1884 1884
1885#endif /* CONFIG_POWER4 */ 1885#endif /* CONFIG_POWER4 */
1886 1886
1887static long __pmac 1887static long
1888generic_dev_can_wake(struct device_node* node, long param, long value) 1888generic_dev_can_wake(struct device_node* node, long param, long value)
1889{ 1889{
1890 /* Todo: eventually check we are really dealing with on-board 1890 /* Todo: eventually check we are really dealing with on-board
@@ -1896,7 +1896,7 @@ generic_dev_can_wake(struct device_node* node, long param, long value)
1896 return 0; 1896 return 0;
1897} 1897}
1898 1898
1899static long __pmac 1899static long
1900generic_get_mb_info(struct device_node* node, long param, long value) 1900generic_get_mb_info(struct device_node* node, long param, long value)
1901{ 1901{
1902 switch(param) { 1902 switch(param) {
@@ -1919,7 +1919,7 @@ generic_get_mb_info(struct device_node* node, long param, long value)
1919 1919
1920/* Used on any machine 1920/* Used on any machine
1921 */ 1921 */
1922static struct feature_table_entry any_features[] __pmacdata = { 1922static struct feature_table_entry any_features[] = {
1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info }, 1923 { PMAC_FTR_GET_MB_INFO, generic_get_mb_info },
1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake }, 1924 { PMAC_FTR_DEVICE_CAN_WAKE, generic_dev_can_wake },
1925 { 0, NULL } 1925 { 0, NULL }
@@ -1931,7 +1931,7 @@ static struct feature_table_entry any_features[] __pmacdata = {
1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem 1931 * 2400,3400 and 3500 series powerbooks. Some older desktops seem
1932 * to have issues with turning on/off those asic cells 1932 * to have issues with turning on/off those asic cells
1933 */ 1933 */
1934static struct feature_table_entry ohare_features[] __pmacdata = { 1934static struct feature_table_entry ohare_features[] = {
1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1935 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable }, 1936 { PMAC_FTR_SWIM3_ENABLE, ohare_floppy_enable },
1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable }, 1937 { PMAC_FTR_MESH_ENABLE, ohare_mesh_enable },
@@ -1945,7 +1945,7 @@ static struct feature_table_entry ohare_features[] __pmacdata = {
1945 * Separated as some features couldn't be properly tested 1945 * Separated as some features couldn't be properly tested
1946 * and the serial port control bits appear to confuse it. 1946 * and the serial port control bits appear to confuse it.
1947 */ 1947 */
1948static struct feature_table_entry heathrow_desktop_features[] __pmacdata = { 1948static struct feature_table_entry heathrow_desktop_features[] = {
1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1949 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable }, 1950 { PMAC_FTR_MESH_ENABLE, heathrow_mesh_enable },
1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable }, 1951 { PMAC_FTR_IDE_ENABLE, heathrow_ide_enable },
@@ -1957,7 +1957,7 @@ static struct feature_table_entry heathrow_desktop_features[] __pmacdata = {
1957/* Heathrow based laptop, that is the Wallstreet and mainstreet 1957/* Heathrow based laptop, that is the Wallstreet and mainstreet
1958 * powerbooks. 1958 * powerbooks.
1959 */ 1959 */
1960static struct feature_table_entry heathrow_laptop_features[] __pmacdata = { 1960static struct feature_table_entry heathrow_laptop_features[] = {
1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1961 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1962 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1963 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1973,7 +1973,7 @@ static struct feature_table_entry heathrow_laptop_features[] __pmacdata = {
1973/* Paddington based machines 1973/* Paddington based machines
1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4. 1974 * The lombard (101) powerbook, first iMac models, B&W G3 and Yikes G4.
1975 */ 1975 */
1976static struct feature_table_entry paddington_features[] __pmacdata = { 1976static struct feature_table_entry paddington_features[] = {
1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable }, 1977 { PMAC_FTR_SCC_ENABLE, ohare_htw_scc_enable },
1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable }, 1978 { PMAC_FTR_MODEM_ENABLE, heathrow_modem_enable },
1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable }, 1979 { PMAC_FTR_SWIM3_ENABLE, heathrow_floppy_enable },
@@ -1991,7 +1991,7 @@ static struct feature_table_entry paddington_features[] __pmacdata = {
1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo 1991 * chipset. The pangea chipset is the "combo" UniNorth/KeyLargo
1992 * used on iBook2 & iMac "flow power". 1992 * used on iBook2 & iMac "flow power".
1993 */ 1993 */
1994static struct feature_table_entry core99_features[] __pmacdata = { 1994static struct feature_table_entry core99_features[] = {
1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 1995 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable }, 1996 { PMAC_FTR_MODEM_ENABLE, core99_modem_enable },
1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 1997 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2014,7 +2014,7 @@ static struct feature_table_entry core99_features[] __pmacdata = {
2014 2014
2015/* RackMac 2015/* RackMac
2016 */ 2016 */
2017static struct feature_table_entry rackmac_features[] __pmacdata = { 2017static struct feature_table_entry rackmac_features[] = {
2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2018 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2019 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
2020 { PMAC_FTR_IDE_RESET, core99_ide_reset }, 2020 { PMAC_FTR_IDE_RESET, core99_ide_reset },
@@ -2034,7 +2034,7 @@ static struct feature_table_entry rackmac_features[] __pmacdata = {
2034 2034
2035/* Pangea features 2035/* Pangea features
2036 */ 2036 */
2037static struct feature_table_entry pangea_features[] __pmacdata = { 2037static struct feature_table_entry pangea_features[] = {
2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2038 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2039 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2040 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2054,7 +2054,7 @@ static struct feature_table_entry pangea_features[] __pmacdata = {
2054 2054
2055/* Intrepid features 2055/* Intrepid features
2056 */ 2056 */
2057static struct feature_table_entry intrepid_features[] __pmacdata = { 2057static struct feature_table_entry intrepid_features[] = {
2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable }, 2058 { PMAC_FTR_SCC_ENABLE, core99_scc_enable },
2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable }, 2059 { PMAC_FTR_MODEM_ENABLE, pangea_modem_enable },
2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable }, 2060 { PMAC_FTR_IDE_ENABLE, core99_ide_enable },
@@ -2077,7 +2077,7 @@ static struct feature_table_entry intrepid_features[] __pmacdata = {
2077 2077
2078/* G5 features 2078/* G5 features
2079 */ 2079 */
2080static struct feature_table_entry g5_features[] __pmacdata = { 2080static struct feature_table_entry g5_features[] = {
2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable }, 2081 { PMAC_FTR_GMAC_ENABLE, g5_gmac_enable },
2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable }, 2082 { PMAC_FTR_1394_ENABLE, g5_fw_enable },
2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable }, 2083 { PMAC_FTR_ENABLE_MPIC, g5_mpic_enable },
@@ -2091,7 +2091,7 @@ static struct feature_table_entry g5_features[] __pmacdata = {
2091 2091
2092#endif /* CONFIG_POWER4 */ 2092#endif /* CONFIG_POWER4 */
2093 2093
2094static struct pmac_mb_def pmac_mb_defs[] __pmacdata = { 2094static struct pmac_mb_def pmac_mb_defs[] = {
2095#ifndef CONFIG_POWER4 2095#ifndef CONFIG_POWER4
2096 /* 2096 /*
2097 * Desktops 2097 * Desktops
@@ -2356,7 +2356,7 @@ static struct pmac_mb_def pmac_mb_defs[] __pmacdata = {
2356/* 2356/*
2357 * The toplevel feature_call callback 2357 * The toplevel feature_call callback
2358 */ 2358 */
2359long __pmac 2359long
2360pmac_do_feature_call(unsigned int selector, ...) 2360pmac_do_feature_call(unsigned int selector, ...)
2361{ 2361{
2362 struct device_node* node; 2362 struct device_node* node;
@@ -2939,8 +2939,8 @@ void __init pmac_check_ht_link(void)
2939 * Early video resume hook 2939 * Early video resume hook
2940 */ 2940 */
2941 2941
2942static void (*pmac_early_vresume_proc)(void *data) __pmacdata; 2942static void (*pmac_early_vresume_proc)(void *data);
2943static void *pmac_early_vresume_data __pmacdata; 2943static void *pmac_early_vresume_data;
2944 2944
2945void pmac_set_early_video_resume(void (*proc)(void *data), void *data) 2945void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2946{ 2946{
@@ -2953,7 +2953,7 @@ void pmac_set_early_video_resume(void (*proc)(void *data), void *data)
2953} 2953}
2954EXPORT_SYMBOL(pmac_set_early_video_resume); 2954EXPORT_SYMBOL(pmac_set_early_video_resume);
2955 2955
2956void __pmac pmac_call_early_video_resume(void) 2956void pmac_call_early_video_resume(void)
2957{ 2957{
2958 if (pmac_early_vresume_proc) 2958 if (pmac_early_vresume_proc)
2959 pmac_early_vresume_proc(pmac_early_vresume_data); 2959 pmac_early_vresume_proc(pmac_early_vresume_data);
@@ -2963,11 +2963,11 @@ void __pmac pmac_call_early_video_resume(void)
2963 * AGP related suspend/resume code 2963 * AGP related suspend/resume code
2964 */ 2964 */
2965 2965
2966static struct pci_dev *pmac_agp_bridge __pmacdata; 2966static struct pci_dev *pmac_agp_bridge;
2967static int (*pmac_agp_suspend)(struct pci_dev *bridge) __pmacdata; 2967static int (*pmac_agp_suspend)(struct pci_dev *bridge);
2968static int (*pmac_agp_resume)(struct pci_dev *bridge) __pmacdata; 2968static int (*pmac_agp_resume)(struct pci_dev *bridge);
2969 2969
2970void __pmac pmac_register_agp_pm(struct pci_dev *bridge, 2970void pmac_register_agp_pm(struct pci_dev *bridge,
2971 int (*suspend)(struct pci_dev *bridge), 2971 int (*suspend)(struct pci_dev *bridge),
2972 int (*resume)(struct pci_dev *bridge)) 2972 int (*resume)(struct pci_dev *bridge))
2973{ 2973{
@@ -2984,7 +2984,7 @@ void __pmac pmac_register_agp_pm(struct pci_dev *bridge,
2984} 2984}
2985EXPORT_SYMBOL(pmac_register_agp_pm); 2985EXPORT_SYMBOL(pmac_register_agp_pm);
2986 2986
2987void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev) 2987void pmac_suspend_agp_for_card(struct pci_dev *dev)
2988{ 2988{
2989 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL) 2989 if (pmac_agp_bridge == NULL || pmac_agp_suspend == NULL)
2990 return; 2990 return;
@@ -2994,7 +2994,7 @@ void __pmac pmac_suspend_agp_for_card(struct pci_dev *dev)
2994} 2994}
2995EXPORT_SYMBOL(pmac_suspend_agp_for_card); 2995EXPORT_SYMBOL(pmac_suspend_agp_for_card);
2996 2996
2997void __pmac pmac_resume_agp_for_card(struct pci_dev *dev) 2997void pmac_resume_agp_for_card(struct pci_dev *dev)
2998{ 2998{
2999 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL) 2999 if (pmac_agp_bridge == NULL || pmac_agp_resume == NULL)
3000 return; 3000 return;
diff --git a/arch/ppc/platforms/pmac_nvram.c b/arch/ppc/platforms/pmac_nvram.c
index c9de64205996..8c9b008c7226 100644
--- a/arch/ppc/platforms/pmac_nvram.c
+++ b/arch/ppc/platforms/pmac_nvram.c
@@ -88,17 +88,17 @@ extern int system_running;
88static int (*core99_write_bank)(int bank, u8* datas); 88static int (*core99_write_bank)(int bank, u8* datas);
89static int (*core99_erase_bank)(int bank); 89static int (*core99_erase_bank)(int bank);
90 90
91static char *nvram_image __pmacdata; 91static char *nvram_image;
92 92
93 93
94static unsigned char __pmac core99_nvram_read_byte(int addr) 94static unsigned char core99_nvram_read_byte(int addr)
95{ 95{
96 if (nvram_image == NULL) 96 if (nvram_image == NULL)
97 return 0xff; 97 return 0xff;
98 return nvram_image[addr]; 98 return nvram_image[addr];
99} 99}
100 100
101static void __pmac core99_nvram_write_byte(int addr, unsigned char val) 101static void core99_nvram_write_byte(int addr, unsigned char val)
102{ 102{
103 if (nvram_image == NULL) 103 if (nvram_image == NULL)
104 return; 104 return;
@@ -106,18 +106,18 @@ static void __pmac core99_nvram_write_byte(int addr, unsigned char val)
106} 106}
107 107
108 108
109static unsigned char __openfirmware direct_nvram_read_byte(int addr) 109static unsigned char direct_nvram_read_byte(int addr)
110{ 110{
111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]); 111 return in_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult]);
112} 112}
113 113
114static void __openfirmware direct_nvram_write_byte(int addr, unsigned char val) 114static void direct_nvram_write_byte(int addr, unsigned char val)
115{ 115{
116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val); 116 out_8(&nvram_data[(addr & (NVRAM_SIZE - 1)) * nvram_mult], val);
117} 117}
118 118
119 119
120static unsigned char __pmac indirect_nvram_read_byte(int addr) 120static unsigned char indirect_nvram_read_byte(int addr)
121{ 121{
122 unsigned char val; 122 unsigned char val;
123 unsigned long flags; 123 unsigned long flags;
@@ -130,7 +130,7 @@ static unsigned char __pmac indirect_nvram_read_byte(int addr)
130 return val; 130 return val;
131} 131}
132 132
133static void __pmac indirect_nvram_write_byte(int addr, unsigned char val) 133static void indirect_nvram_write_byte(int addr, unsigned char val)
134{ 134{
135 unsigned long flags; 135 unsigned long flags;
136 136
@@ -143,13 +143,13 @@ static void __pmac indirect_nvram_write_byte(int addr, unsigned char val)
143 143
144#ifdef CONFIG_ADB_PMU 144#ifdef CONFIG_ADB_PMU
145 145
146static void __pmac pmu_nvram_complete(struct adb_request *req) 146static void pmu_nvram_complete(struct adb_request *req)
147{ 147{
148 if (req->arg) 148 if (req->arg)
149 complete((struct completion *)req->arg); 149 complete((struct completion *)req->arg);
150} 150}
151 151
152static unsigned char __pmac pmu_nvram_read_byte(int addr) 152static unsigned char pmu_nvram_read_byte(int addr)
153{ 153{
154 struct adb_request req; 154 struct adb_request req;
155 DECLARE_COMPLETION(req_complete); 155 DECLARE_COMPLETION(req_complete);
@@ -165,7 +165,7 @@ static unsigned char __pmac pmu_nvram_read_byte(int addr)
165 return req.reply[0]; 165 return req.reply[0];
166} 166}
167 167
168static void __pmac pmu_nvram_write_byte(int addr, unsigned char val) 168static void pmu_nvram_write_byte(int addr, unsigned char val)
169{ 169{
170 struct adb_request req; 170 struct adb_request req;
171 DECLARE_COMPLETION(req_complete); 171 DECLARE_COMPLETION(req_complete);
@@ -183,7 +183,7 @@ static void __pmac pmu_nvram_write_byte(int addr, unsigned char val)
183#endif /* CONFIG_ADB_PMU */ 183#endif /* CONFIG_ADB_PMU */
184 184
185 185
186static u8 __pmac chrp_checksum(struct chrp_header* hdr) 186static u8 chrp_checksum(struct chrp_header* hdr)
187{ 187{
188 u8 *ptr; 188 u8 *ptr;
189 u16 sum = hdr->signature; 189 u16 sum = hdr->signature;
@@ -194,7 +194,7 @@ static u8 __pmac chrp_checksum(struct chrp_header* hdr)
194 return sum; 194 return sum;
195} 195}
196 196
197static u32 __pmac core99_calc_adler(u8 *buffer) 197static u32 core99_calc_adler(u8 *buffer)
198{ 198{
199 int cnt; 199 int cnt;
200 u32 low, high; 200 u32 low, high;
@@ -216,7 +216,7 @@ static u32 __pmac core99_calc_adler(u8 *buffer)
216 return (high << 16) | low; 216 return (high << 16) | low;
217} 217}
218 218
219static u32 __pmac core99_check(u8* datas) 219static u32 core99_check(u8* datas)
220{ 220{
221 struct core99_header* hdr99 = (struct core99_header*)datas; 221 struct core99_header* hdr99 = (struct core99_header*)datas;
222 222
@@ -235,7 +235,7 @@ static u32 __pmac core99_check(u8* datas)
235 return hdr99->generation; 235 return hdr99->generation;
236} 236}
237 237
238static int __pmac sm_erase_bank(int bank) 238static int sm_erase_bank(int bank)
239{ 239{
240 int stat, i; 240 int stat, i;
241 unsigned long timeout; 241 unsigned long timeout;
@@ -267,7 +267,7 @@ static int __pmac sm_erase_bank(int bank)
267 return 0; 267 return 0;
268} 268}
269 269
270static int __pmac sm_write_bank(int bank, u8* datas) 270static int sm_write_bank(int bank, u8* datas)
271{ 271{
272 int i, stat = 0; 272 int i, stat = 0;
273 unsigned long timeout; 273 unsigned long timeout;
@@ -302,7 +302,7 @@ static int __pmac sm_write_bank(int bank, u8* datas)
302 return 0; 302 return 0;
303} 303}
304 304
305static int __pmac amd_erase_bank(int bank) 305static int amd_erase_bank(int bank)
306{ 306{
307 int i, stat = 0; 307 int i, stat = 0;
308 unsigned long timeout; 308 unsigned long timeout;
@@ -349,7 +349,7 @@ static int __pmac amd_erase_bank(int bank)
349 return 0; 349 return 0;
350} 350}
351 351
352static int __pmac amd_write_bank(int bank, u8* datas) 352static int amd_write_bank(int bank, u8* datas)
353{ 353{
354 int i, stat = 0; 354 int i, stat = 0;
355 unsigned long timeout; 355 unsigned long timeout;
@@ -430,7 +430,7 @@ static void __init lookup_partitions(void)
430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]); 430 DBG("nvram: NR partition at 0x%x\n", nvram_partitions[pmac_nvram_NR]);
431} 431}
432 432
433static void __pmac core99_nvram_sync(void) 433static void core99_nvram_sync(void)
434{ 434{
435 struct core99_header* hdr99; 435 struct core99_header* hdr99;
436 unsigned long flags; 436 unsigned long flags;
@@ -554,12 +554,12 @@ void __init pmac_nvram_init(void)
554 lookup_partitions(); 554 lookup_partitions();
555} 555}
556 556
557int __pmac pmac_get_partition(int partition) 557int pmac_get_partition(int partition)
558{ 558{
559 return nvram_partitions[partition]; 559 return nvram_partitions[partition];
560} 560}
561 561
562u8 __pmac pmac_xpram_read(int xpaddr) 562u8 pmac_xpram_read(int xpaddr)
563{ 563{
564 int offset = nvram_partitions[pmac_nvram_XPRAM]; 564 int offset = nvram_partitions[pmac_nvram_XPRAM];
565 565
@@ -569,7 +569,7 @@ u8 __pmac pmac_xpram_read(int xpaddr)
569 return ppc_md.nvram_read_val(xpaddr + offset); 569 return ppc_md.nvram_read_val(xpaddr + offset);
570} 570}
571 571
572void __pmac pmac_xpram_write(int xpaddr, u8 data) 572void pmac_xpram_write(int xpaddr, u8 data)
573{ 573{
574 int offset = nvram_partitions[pmac_nvram_XPRAM]; 574 int offset = nvram_partitions[pmac_nvram_XPRAM];
575 575
diff --git a/arch/ppc/platforms/pmac_pci.c b/arch/ppc/platforms/pmac_pci.c
index 719fb49fe2bc..1dc638f72239 100644
--- a/arch/ppc/platforms/pmac_pci.c
+++ b/arch/ppc/platforms/pmac_pci.c
@@ -141,7 +141,7 @@ fixup_bus_range(struct device_node *bridge)
141 |(((unsigned long)(off)) & 0xFCUL) \ 141 |(((unsigned long)(off)) & 0xFCUL) \
142 |1UL) 142 |1UL)
143 143
144static void volatile __iomem * __pmac 144static void volatile __iomem *
145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset) 145macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
146{ 146{
147 unsigned int caddr; 147 unsigned int caddr;
@@ -162,7 +162,7 @@ macrisc_cfg_access(struct pci_controller* hose, u8 bus, u8 dev_fn, u8 offset)
162 return hose->cfg_data + offset; 162 return hose->cfg_data + offset;
163} 163}
164 164
165static int __pmac 165static int
166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 166macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
167 int len, u32 *val) 167 int len, u32 *val)
168{ 168{
@@ -190,7 +190,7 @@ macrisc_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
190 return PCIBIOS_SUCCESSFUL; 190 return PCIBIOS_SUCCESSFUL;
191} 191}
192 192
193static int __pmac 193static int
194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 194macrisc_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
195 int len, u32 val) 195 int len, u32 val)
196{ 196{
@@ -230,7 +230,7 @@ static struct pci_ops macrisc_pci_ops =
230/* 230/*
231 * Verifiy that a specific (bus, dev_fn) exists on chaos 231 * Verifiy that a specific (bus, dev_fn) exists on chaos
232 */ 232 */
233static int __pmac 233static int
234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset) 234chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
235{ 235{
236 struct device_node *np; 236 struct device_node *np;
@@ -252,7 +252,7 @@ chaos_validate_dev(struct pci_bus *bus, int devfn, int offset)
252 return PCIBIOS_SUCCESSFUL; 252 return PCIBIOS_SUCCESSFUL;
253} 253}
254 254
255static int __pmac 255static int
256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 256chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
257 int len, u32 *val) 257 int len, u32 *val)
258{ 258{
@@ -264,7 +264,7 @@ chaos_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
264 return macrisc_read_config(bus, devfn, offset, len, val); 264 return macrisc_read_config(bus, devfn, offset, len, val);
265} 265}
266 266
267static int __pmac 267static int
268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 268chaos_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
269 int len, u32 val) 269 int len, u32 val)
270{ 270{
@@ -294,7 +294,7 @@ static struct pci_ops chaos_pci_ops =
294 + (((unsigned long)bus) << 16) \ 294 + (((unsigned long)bus) << 16) \
295 + 0x01000000UL) 295 + 0x01000000UL)
296 296
297static void volatile __iomem * __pmac 297static void volatile __iomem *
298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset) 298u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
299{ 299{
300 if (bus == hose->first_busno) { 300 if (bus == hose->first_busno) {
@@ -307,7 +307,7 @@ u3_ht_cfg_access(struct pci_controller* hose, u8 bus, u8 devfn, u8 offset)
307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset); 307 return hose->cfg_data + U3_HT_CFA1(bus, devfn, offset);
308} 308}
309 309
310static int __pmac 310static int
311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 311u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
312 int len, u32 *val) 312 int len, u32 *val)
313{ 313{
@@ -357,7 +357,7 @@ u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
357 return PCIBIOS_SUCCESSFUL; 357 return PCIBIOS_SUCCESSFUL;
358} 358}
359 359
360static int __pmac 360static int
361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 361u3_ht_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
362 int len, u32 val) 362 int len, u32 val)
363{ 363{
@@ -899,7 +899,7 @@ pmac_pcibios_fixup(void)
899 pcibios_fixup_OF_interrupts(); 899 pcibios_fixup_OF_interrupts();
900} 900}
901 901
902int __pmac 902int
903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial) 903pmac_pci_enable_device_hook(struct pci_dev *dev, int initial)
904{ 904{
905 struct device_node* node; 905 struct device_node* node;
@@ -1096,7 +1096,7 @@ DECLARE_PCI_FIXUP_FINAL(PCI_ANY_ID, PCI_ANY_ID, pmac_pci_fixup_pciata);
1096 * Disable second function on K2-SATA, it's broken 1096 * Disable second function on K2-SATA, it's broken
1097 * and disable IO BARs on first one 1097 * and disable IO BARs on first one
1098 */ 1098 */
1099void __pmac pmac_pci_fixup_k2_sata(struct pci_dev* dev) 1099void pmac_pci_fixup_k2_sata(struct pci_dev* dev)
1100{ 1100{
1101 int i; 1101 int i;
1102 u16 cmd; 1102 u16 cmd;
diff --git a/arch/ppc/platforms/pmac_pic.c b/arch/ppc/platforms/pmac_pic.c
index 2ce058895e03..9f2d95ea8564 100644
--- a/arch/ppc/platforms/pmac_pic.c
+++ b/arch/ppc/platforms/pmac_pic.c
@@ -35,6 +35,7 @@
35#include <asm/open_pic.h> 35#include <asm/open_pic.h>
36#include <asm/xmon.h> 36#include <asm/xmon.h>
37#include <asm/pmac_feature.h> 37#include <asm/pmac_feature.h>
38#include <asm/machdep.h>
38 39
39#include "pmac_pic.h" 40#include "pmac_pic.h"
40 41
@@ -53,7 +54,7 @@ struct pmac_irq_hw {
53}; 54};
54 55
55/* Default addresses */ 56/* Default addresses */
56static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = { 57static volatile struct pmac_irq_hw *pmac_irq_hw[4] = {
57 (struct pmac_irq_hw *) 0xf3000020, 58 (struct pmac_irq_hw *) 0xf3000020,
58 (struct pmac_irq_hw *) 0xf3000010, 59 (struct pmac_irq_hw *) 0xf3000010,
59 (struct pmac_irq_hw *) 0xf4000020, 60 (struct pmac_irq_hw *) 0xf4000020,
@@ -64,22 +65,22 @@ static volatile struct pmac_irq_hw *pmac_irq_hw[4] __pmacdata = {
64#define OHARE_LEVEL_MASK 0x1ff00000 65#define OHARE_LEVEL_MASK 0x1ff00000
65#define HEATHROW_LEVEL_MASK 0x1ff00000 66#define HEATHROW_LEVEL_MASK 0x1ff00000
66 67
67static int max_irqs __pmacdata; 68static int max_irqs;
68static int max_real_irqs __pmacdata; 69static int max_real_irqs;
69static u32 level_mask[4] __pmacdata; 70static u32 level_mask[4];
70 71
71static DEFINE_SPINLOCK(pmac_pic_lock __pmacdata); 72static DEFINE_SPINLOCK(pmac_pic_lock);
72 73
73 74
74#define GATWICK_IRQ_POOL_SIZE 10 75#define GATWICK_IRQ_POOL_SIZE 10
75static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE] __pmacdata; 76static struct interrupt_info gatwick_int_pool[GATWICK_IRQ_POOL_SIZE];
76 77
77/* 78/*
78 * Mark an irq as "lost". This is only used on the pmac 79 * Mark an irq as "lost". This is only used on the pmac
79 * since it can lose interrupts (see pmac_set_irq_mask). 80 * since it can lose interrupts (see pmac_set_irq_mask).
80 * -- Cort 81 * -- Cort
81 */ 82 */
82void __pmac 83void
83__set_lost(unsigned long irq_nr, int nokick) 84__set_lost(unsigned long irq_nr, int nokick)
84{ 85{
85 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) { 86 if (!test_and_set_bit(irq_nr, ppc_lost_interrupts)) {
@@ -89,7 +90,7 @@ __set_lost(unsigned long irq_nr, int nokick)
89 } 90 }
90} 91}
91 92
92static void __pmac 93static void
93pmac_mask_and_ack_irq(unsigned int irq_nr) 94pmac_mask_and_ack_irq(unsigned int irq_nr)
94{ 95{
95 unsigned long bit = 1UL << (irq_nr & 0x1f); 96 unsigned long bit = 1UL << (irq_nr & 0x1f);
@@ -114,7 +115,7 @@ pmac_mask_and_ack_irq(unsigned int irq_nr)
114 spin_unlock_irqrestore(&pmac_pic_lock, flags); 115 spin_unlock_irqrestore(&pmac_pic_lock, flags);
115} 116}
116 117
117static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost) 118static void pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
118{ 119{
119 unsigned long bit = 1UL << (irq_nr & 0x1f); 120 unsigned long bit = 1UL << (irq_nr & 0x1f);
120 int i = irq_nr >> 5; 121 int i = irq_nr >> 5;
@@ -147,7 +148,7 @@ static void __pmac pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
147/* When an irq gets requested for the first client, if it's an 148/* When an irq gets requested for the first client, if it's an
148 * edge interrupt, we clear any previous one on the controller 149 * edge interrupt, we clear any previous one on the controller
149 */ 150 */
150static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr) 151static unsigned int pmac_startup_irq(unsigned int irq_nr)
151{ 152{
152 unsigned long bit = 1UL << (irq_nr & 0x1f); 153 unsigned long bit = 1UL << (irq_nr & 0x1f);
153 int i = irq_nr >> 5; 154 int i = irq_nr >> 5;
@@ -160,20 +161,20 @@ static unsigned int __pmac pmac_startup_irq(unsigned int irq_nr)
160 return 0; 161 return 0;
161} 162}
162 163
163static void __pmac pmac_mask_irq(unsigned int irq_nr) 164static void pmac_mask_irq(unsigned int irq_nr)
164{ 165{
165 clear_bit(irq_nr, ppc_cached_irq_mask); 166 clear_bit(irq_nr, ppc_cached_irq_mask);
166 pmac_set_irq_mask(irq_nr, 0); 167 pmac_set_irq_mask(irq_nr, 0);
167 mb(); 168 mb();
168} 169}
169 170
170static void __pmac pmac_unmask_irq(unsigned int irq_nr) 171static void pmac_unmask_irq(unsigned int irq_nr)
171{ 172{
172 set_bit(irq_nr, ppc_cached_irq_mask); 173 set_bit(irq_nr, ppc_cached_irq_mask);
173 pmac_set_irq_mask(irq_nr, 0); 174 pmac_set_irq_mask(irq_nr, 0);
174} 175}
175 176
176static void __pmac pmac_end_irq(unsigned int irq_nr) 177static void pmac_end_irq(unsigned int irq_nr)
177{ 178{
178 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS)) 179 if (!(irq_desc[irq_nr].status & (IRQ_DISABLED|IRQ_INPROGRESS))
179 && irq_desc[irq_nr].action) { 180 && irq_desc[irq_nr].action) {
diff --git a/arch/ppc/platforms/pmac_setup.c b/arch/ppc/platforms/pmac_setup.c
index d6356f480d90..74165684552a 100644
--- a/arch/ppc/platforms/pmac_setup.c
+++ b/arch/ppc/platforms/pmac_setup.c
@@ -122,7 +122,7 @@ extern struct smp_ops_t psurge_smp_ops;
122extern struct smp_ops_t core99_smp_ops; 122extern struct smp_ops_t core99_smp_ops;
123#endif /* CONFIG_SMP */ 123#endif /* CONFIG_SMP */
124 124
125static int __pmac 125static int
126pmac_show_cpuinfo(struct seq_file *m) 126pmac_show_cpuinfo(struct seq_file *m)
127{ 127{
128 struct device_node *np; 128 struct device_node *np;
@@ -226,7 +226,7 @@ pmac_show_cpuinfo(struct seq_file *m)
226 return 0; 226 return 0;
227} 227}
228 228
229static int __openfirmware 229static int
230pmac_show_percpuinfo(struct seq_file *m, int i) 230pmac_show_percpuinfo(struct seq_file *m, int i)
231{ 231{
232#ifdef CONFIG_CPU_FREQ_PMAC 232#ifdef CONFIG_CPU_FREQ_PMAC
@@ -447,7 +447,7 @@ static int pmac_pm_enter(suspend_state_t state)
447 enable_kernel_fp(); 447 enable_kernel_fp();
448 448
449#ifdef CONFIG_ALTIVEC 449#ifdef CONFIG_ALTIVEC
450 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_ALTIVEC) 450 if (cur_cpu_spec->cpu_features & CPU_FTR_ALTIVEC)
451 enable_kernel_altivec(); 451 enable_kernel_altivec();
452#endif /* CONFIG_ALTIVEC */ 452#endif /* CONFIG_ALTIVEC */
453 453
@@ -485,7 +485,7 @@ static int pmac_late_init(void)
485late_initcall(pmac_late_init); 485late_initcall(pmac_late_init);
486 486
487/* can't be __init - can be called whenever a disk is first accessed */ 487/* can't be __init - can be called whenever a disk is first accessed */
488void __pmac 488void
489note_bootable_part(dev_t dev, int part, int goodness) 489note_bootable_part(dev_t dev, int part, int goodness)
490{ 490{
491 static int found_boot = 0; 491 static int found_boot = 0;
@@ -511,7 +511,7 @@ note_bootable_part(dev_t dev, int part, int goodness)
511 } 511 }
512} 512}
513 513
514static void __pmac 514static void
515pmac_restart(char *cmd) 515pmac_restart(char *cmd)
516{ 516{
517#ifdef CONFIG_ADB_CUDA 517#ifdef CONFIG_ADB_CUDA
@@ -536,7 +536,7 @@ pmac_restart(char *cmd)
536 } 536 }
537} 537}
538 538
539static void __pmac 539static void
540pmac_power_off(void) 540pmac_power_off(void)
541{ 541{
542#ifdef CONFIG_ADB_CUDA 542#ifdef CONFIG_ADB_CUDA
@@ -561,7 +561,7 @@ pmac_power_off(void)
561 } 561 }
562} 562}
563 563
564static void __pmac 564static void
565pmac_halt(void) 565pmac_halt(void)
566{ 566{
567 pmac_power_off(); 567 pmac_power_off();
@@ -661,7 +661,6 @@ pmac_init(unsigned long r3, unsigned long r4, unsigned long r5,
661 ppc_md.setup_arch = pmac_setup_arch; 661 ppc_md.setup_arch = pmac_setup_arch;
662 ppc_md.show_cpuinfo = pmac_show_cpuinfo; 662 ppc_md.show_cpuinfo = pmac_show_cpuinfo;
663 ppc_md.show_percpuinfo = pmac_show_percpuinfo; 663 ppc_md.show_percpuinfo = pmac_show_percpuinfo;
664 ppc_md.irq_canonicalize = NULL;
665 ppc_md.init_IRQ = pmac_pic_init; 664 ppc_md.init_IRQ = pmac_pic_init;
666 ppc_md.get_irq = pmac_get_irq; /* Changed later on ... */ 665 ppc_md.get_irq = pmac_get_irq; /* Changed later on ... */
667 666
diff --git a/arch/ppc/platforms/pmac_smp.c b/arch/ppc/platforms/pmac_smp.c
index 794a23994b82..e613f0e0d9eb 100644
--- a/arch/ppc/platforms/pmac_smp.c
+++ b/arch/ppc/platforms/pmac_smp.c
@@ -186,7 +186,7 @@ static inline void psurge_clr_ipi(int cpu)
186 */ 186 */
187static unsigned long psurge_smp_message[NR_CPUS]; 187static unsigned long psurge_smp_message[NR_CPUS];
188 188
189void __pmac psurge_smp_message_recv(struct pt_regs *regs) 189void psurge_smp_message_recv(struct pt_regs *regs)
190{ 190{
191 int cpu = smp_processor_id(); 191 int cpu = smp_processor_id();
192 int msg; 192 int msg;
@@ -203,13 +203,13 @@ void __pmac psurge_smp_message_recv(struct pt_regs *regs)
203 smp_message_recv(msg, regs); 203 smp_message_recv(msg, regs);
204} 204}
205 205
206irqreturn_t __pmac psurge_primary_intr(int irq, void *d, struct pt_regs *regs) 206irqreturn_t psurge_primary_intr(int irq, void *d, struct pt_regs *regs)
207{ 207{
208 psurge_smp_message_recv(regs); 208 psurge_smp_message_recv(regs);
209 return IRQ_HANDLED; 209 return IRQ_HANDLED;
210} 210}
211 211
212static void __pmac smp_psurge_message_pass(int target, int msg, unsigned long data, 212static void smp_psurge_message_pass(int target, int msg, unsigned long data,
213 int wait) 213 int wait)
214{ 214{
215 int i; 215 int i;
@@ -629,7 +629,7 @@ void smp_core99_give_timebase(void)
629 629
630 630
631/* PowerSurge-style Macs */ 631/* PowerSurge-style Macs */
632struct smp_ops_t psurge_smp_ops __pmacdata = { 632struct smp_ops_t psurge_smp_ops = {
633 .message_pass = smp_psurge_message_pass, 633 .message_pass = smp_psurge_message_pass,
634 .probe = smp_psurge_probe, 634 .probe = smp_psurge_probe,
635 .kick_cpu = smp_psurge_kick_cpu, 635 .kick_cpu = smp_psurge_kick_cpu,
@@ -639,7 +639,7 @@ struct smp_ops_t psurge_smp_ops __pmacdata = {
639}; 639};
640 640
641/* Core99 Macs (dual G4s) */ 641/* Core99 Macs (dual G4s) */
642struct smp_ops_t core99_smp_ops __pmacdata = { 642struct smp_ops_t core99_smp_ops = {
643 .message_pass = smp_openpic_message_pass, 643 .message_pass = smp_openpic_message_pass,
644 .probe = smp_core99_probe, 644 .probe = smp_core99_probe,
645 .kick_cpu = smp_core99_kick_cpu, 645 .kick_cpu = smp_core99_kick_cpu,
diff --git a/arch/ppc/platforms/pmac_time.c b/arch/ppc/platforms/pmac_time.c
index efb819f9490d..edb9fcc64790 100644
--- a/arch/ppc/platforms/pmac_time.c
+++ b/arch/ppc/platforms/pmac_time.c
@@ -77,7 +77,7 @@ pmac_time_init(void)
77#endif 77#endif
78} 78}
79 79
80unsigned long __pmac 80unsigned long
81pmac_get_rtc_time(void) 81pmac_get_rtc_time(void)
82{ 82{
83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 83#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -118,7 +118,7 @@ pmac_get_rtc_time(void)
118 return 0; 118 return 0;
119} 119}
120 120
121int __pmac 121int
122pmac_set_rtc_time(unsigned long nowtime) 122pmac_set_rtc_time(unsigned long nowtime)
123{ 123{
124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU) 124#if defined(CONFIG_ADB_CUDA) || defined(CONFIG_ADB_PMU)
@@ -210,7 +210,7 @@ via_calibrate_decr(void)
210/* 210/*
211 * Reset the time after a sleep. 211 * Reset the time after a sleep.
212 */ 212 */
213static int __pmac 213static int
214time_sleep_notify(struct pmu_sleep_notifier *self, int when) 214time_sleep_notify(struct pmu_sleep_notifier *self, int when)
215{ 215{
216 static unsigned long time_diff; 216 static unsigned long time_diff;
@@ -235,7 +235,7 @@ time_sleep_notify(struct pmu_sleep_notifier *self, int when)
235 return PBOOK_SLEEP_OK; 235 return PBOOK_SLEEP_OK;
236} 236}
237 237
238static struct pmu_sleep_notifier time_sleep_notifier __pmacdata = { 238static struct pmu_sleep_notifier time_sleep_notifier = {
239 time_sleep_notify, SLEEP_LEVEL_MISC, 239 time_sleep_notify, SLEEP_LEVEL_MISC,
240}; 240};
241#endif /* CONFIG_PM */ 241#endif /* CONFIG_PM */
diff --git a/arch/ppc/platforms/pplus.c b/arch/ppc/platforms/pplus.c
index e70aae20d6f9..c8803214405d 100644
--- a/arch/ppc/platforms/pplus.c
+++ b/arch/ppc/platforms/pplus.c
@@ -646,14 +646,6 @@ static void pplus_power_off(void)
646 pplus_halt(); 646 pplus_halt();
647} 647}
648 648
649static unsigned int pplus_irq_canonicalize(u_int irq)
650{
651 if (irq == 2)
652 return 9;
653 else
654 return irq;
655}
656
657static void __init pplus_init_IRQ(void) 649static void __init pplus_init_IRQ(void)
658{ 650{
659 int i; 651 int i;
@@ -872,10 +864,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
872 ISA_DMA_THRESHOLD = 0x00ffffff; 864 ISA_DMA_THRESHOLD = 0x00ffffff;
873 DMA_MODE_READ = 0x44; 865 DMA_MODE_READ = 0x44;
874 DMA_MODE_WRITE = 0x48; 866 DMA_MODE_WRITE = 0x48;
867 ppc_do_canonicalize_irqs = 1;
875 868
876 ppc_md.setup_arch = pplus_setup_arch; 869 ppc_md.setup_arch = pplus_setup_arch;
877 ppc_md.show_cpuinfo = pplus_show_cpuinfo; 870 ppc_md.show_cpuinfo = pplus_show_cpuinfo;
878 ppc_md.irq_canonicalize = pplus_irq_canonicalize;
879 ppc_md.init_IRQ = pplus_init_IRQ; 871 ppc_md.init_IRQ = pplus_init_IRQ;
880 /* this gets changed later on if we have an OpenPIC -- Cort */ 872 /* this gets changed later on if we have an OpenPIC -- Cort */
881 ppc_md.get_irq = i8259_irq; 873 ppc_md.get_irq = i8259_irq;
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index 4760cb64251d..e50b9996848c 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -43,7 +43,7 @@ static unsigned long *ProcInfo;
43/* Tables for known hardware */ 43/* Tables for known hardware */
44 44
45/* Motorola PowerStackII - Utah */ 45/* Motorola PowerStackII - Utah */
46static char Utah_pci_IRQ_map[23] __prepdata = 46static char Utah_pci_IRQ_map[23] =
47{ 47{
48 0, /* Slot 0 - unused */ 48 0, /* Slot 0 - unused */
49 0, /* Slot 1 - unused */ 49 0, /* Slot 1 - unused */
@@ -72,7 +72,7 @@ static char Utah_pci_IRQ_map[23] __prepdata =
72 0, /* Slot 22 - unused */ 72 0, /* Slot 22 - unused */
73}; 73};
74 74
75static char Utah_pci_IRQ_routes[] __prepdata = 75static char Utah_pci_IRQ_routes[] =
76{ 76{
77 0, /* Line 0 - Unused */ 77 0, /* Line 0 - Unused */
78 9, /* Line 1 */ 78 9, /* Line 1 */
@@ -84,7 +84,7 @@ static char Utah_pci_IRQ_routes[] __prepdata =
84 84
85/* Motorola PowerStackII - Omaha */ 85/* Motorola PowerStackII - Omaha */
86/* no integrated SCSI or ethernet */ 86/* no integrated SCSI or ethernet */
87static char Omaha_pci_IRQ_map[23] __prepdata = 87static char Omaha_pci_IRQ_map[23] =
88{ 88{
89 0, /* Slot 0 - unused */ 89 0, /* Slot 0 - unused */
90 0, /* Slot 1 - unused */ 90 0, /* Slot 1 - unused */
@@ -111,7 +111,7 @@ static char Omaha_pci_IRQ_map[23] __prepdata =
111 0, 111 0,
112}; 112};
113 113
114static char Omaha_pci_IRQ_routes[] __prepdata = 114static char Omaha_pci_IRQ_routes[] =
115{ 115{
116 0, /* Line 0 - Unused */ 116 0, /* Line 0 - Unused */
117 9, /* Line 1 */ 117 9, /* Line 1 */
@@ -121,7 +121,7 @@ static char Omaha_pci_IRQ_routes[] __prepdata =
121}; 121};
122 122
123/* Motorola PowerStack */ 123/* Motorola PowerStack */
124static char Blackhawk_pci_IRQ_map[19] __prepdata = 124static char Blackhawk_pci_IRQ_map[19] =
125{ 125{
126 0, /* Slot 0 - unused */ 126 0, /* Slot 0 - unused */
127 0, /* Slot 1 - unused */ 127 0, /* Slot 1 - unused */
@@ -144,7 +144,7 @@ static char Blackhawk_pci_IRQ_map[19] __prepdata =
144 3, /* Slot P5 */ 144 3, /* Slot P5 */
145}; 145};
146 146
147static char Blackhawk_pci_IRQ_routes[] __prepdata = 147static char Blackhawk_pci_IRQ_routes[] =
148{ 148{
149 0, /* Line 0 - Unused */ 149 0, /* Line 0 - Unused */
150 9, /* Line 1 */ 150 9, /* Line 1 */
@@ -154,7 +154,7 @@ static char Blackhawk_pci_IRQ_routes[] __prepdata =
154}; 154};
155 155
156/* Motorola Mesquite */ 156/* Motorola Mesquite */
157static char Mesquite_pci_IRQ_map[23] __prepdata = 157static char Mesquite_pci_IRQ_map[23] =
158{ 158{
159 0, /* Slot 0 - unused */ 159 0, /* Slot 0 - unused */
160 0, /* Slot 1 - unused */ 160 0, /* Slot 1 - unused */
@@ -182,7 +182,7 @@ static char Mesquite_pci_IRQ_map[23] __prepdata =
182}; 182};
183 183
184/* Motorola Sitka */ 184/* Motorola Sitka */
185static char Sitka_pci_IRQ_map[21] __prepdata = 185static char Sitka_pci_IRQ_map[21] =
186{ 186{
187 0, /* Slot 0 - unused */ 187 0, /* Slot 0 - unused */
188 0, /* Slot 1 - unused */ 188 0, /* Slot 1 - unused */
@@ -208,7 +208,7 @@ static char Sitka_pci_IRQ_map[21] __prepdata =
208}; 208};
209 209
210/* Motorola MTX */ 210/* Motorola MTX */
211static char MTX_pci_IRQ_map[23] __prepdata = 211static char MTX_pci_IRQ_map[23] =
212{ 212{
213 0, /* Slot 0 - unused */ 213 0, /* Slot 0 - unused */
214 0, /* Slot 1 - unused */ 214 0, /* Slot 1 - unused */
@@ -237,7 +237,7 @@ static char MTX_pci_IRQ_map[23] __prepdata =
237 237
238/* Motorola MTX Plus */ 238/* Motorola MTX Plus */
239/* Secondary bus interrupt routing is not supported yet */ 239/* Secondary bus interrupt routing is not supported yet */
240static char MTXplus_pci_IRQ_map[23] __prepdata = 240static char MTXplus_pci_IRQ_map[23] =
241{ 241{
242 0, /* Slot 0 - unused */ 242 0, /* Slot 0 - unused */
243 0, /* Slot 1 - unused */ 243 0, /* Slot 1 - unused */
@@ -264,13 +264,13 @@ static char MTXplus_pci_IRQ_map[23] __prepdata =
264 0, /* Slot 22 - unused */ 264 0, /* Slot 22 - unused */
265}; 265};
266 266
267static char Raven_pci_IRQ_routes[] __prepdata = 267static char Raven_pci_IRQ_routes[] =
268{ 268{
269 0, /* This is a dummy structure */ 269 0, /* This is a dummy structure */
270}; 270};
271 271
272/* Motorola MVME16xx */ 272/* Motorola MVME16xx */
273static char Genesis_pci_IRQ_map[16] __prepdata = 273static char Genesis_pci_IRQ_map[16] =
274{ 274{
275 0, /* Slot 0 - unused */ 275 0, /* Slot 0 - unused */
276 0, /* Slot 1 - unused */ 276 0, /* Slot 1 - unused */
@@ -290,7 +290,7 @@ static char Genesis_pci_IRQ_map[16] __prepdata =
290 0, /* Slot 15 - unused */ 290 0, /* Slot 15 - unused */
291}; 291};
292 292
293static char Genesis_pci_IRQ_routes[] __prepdata = 293static char Genesis_pci_IRQ_routes[] =
294{ 294{
295 0, /* Line 0 - Unused */ 295 0, /* Line 0 - Unused */
296 10, /* Line 1 */ 296 10, /* Line 1 */
@@ -299,7 +299,7 @@ static char Genesis_pci_IRQ_routes[] __prepdata =
299 15 /* Line 4 */ 299 15 /* Line 4 */
300}; 300};
301 301
302static char Genesis2_pci_IRQ_map[23] __prepdata = 302static char Genesis2_pci_IRQ_map[23] =
303{ 303{
304 0, /* Slot 0 - unused */ 304 0, /* Slot 0 - unused */
305 0, /* Slot 1 - unused */ 305 0, /* Slot 1 - unused */
@@ -327,7 +327,7 @@ static char Genesis2_pci_IRQ_map[23] __prepdata =
327}; 327};
328 328
329/* Motorola Series-E */ 329/* Motorola Series-E */
330static char Comet_pci_IRQ_map[23] __prepdata = 330static char Comet_pci_IRQ_map[23] =
331{ 331{
332 0, /* Slot 0 - unused */ 332 0, /* Slot 0 - unused */
333 0, /* Slot 1 - unused */ 333 0, /* Slot 1 - unused */
@@ -354,7 +354,7 @@ static char Comet_pci_IRQ_map[23] __prepdata =
354 0, 354 0,
355}; 355};
356 356
357static char Comet_pci_IRQ_routes[] __prepdata = 357static char Comet_pci_IRQ_routes[] =
358{ 358{
359 0, /* Line 0 - Unused */ 359 0, /* Line 0 - Unused */
360 10, /* Line 1 */ 360 10, /* Line 1 */
@@ -364,7 +364,7 @@ static char Comet_pci_IRQ_routes[] __prepdata =
364}; 364};
365 365
366/* Motorola Series-EX */ 366/* Motorola Series-EX */
367static char Comet2_pci_IRQ_map[23] __prepdata = 367static char Comet2_pci_IRQ_map[23] =
368{ 368{
369 0, /* Slot 0 - unused */ 369 0, /* Slot 0 - unused */
370 0, /* Slot 1 - unused */ 370 0, /* Slot 1 - unused */
@@ -391,7 +391,7 @@ static char Comet2_pci_IRQ_map[23] __prepdata =
391 0, 391 0,
392}; 392};
393 393
394static char Comet2_pci_IRQ_routes[] __prepdata = 394static char Comet2_pci_IRQ_routes[] =
395{ 395{
396 0, /* Line 0 - Unused */ 396 0, /* Line 0 - Unused */
397 10, /* Line 1 */ 397 10, /* Line 1 */
@@ -405,7 +405,7 @@ static char Comet2_pci_IRQ_routes[] __prepdata =
405 * This is actually based on the Carolina motherboard 405 * This is actually based on the Carolina motherboard
406 * -- Cort 406 * -- Cort
407 */ 407 */
408static char ibm8xx_pci_IRQ_map[23] __prepdata = { 408static char ibm8xx_pci_IRQ_map[23] = {
409 0, /* Slot 0 - unused */ 409 0, /* Slot 0 - unused */
410 0, /* Slot 1 - unused */ 410 0, /* Slot 1 - unused */
411 0, /* Slot 2 - unused */ 411 0, /* Slot 2 - unused */
@@ -431,7 +431,7 @@ static char ibm8xx_pci_IRQ_map[23] __prepdata = {
431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 431 2, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
432}; 432};
433 433
434static char ibm8xx_pci_IRQ_routes[] __prepdata = { 434static char ibm8xx_pci_IRQ_routes[] = {
435 0, /* Line 0 - unused */ 435 0, /* Line 0 - unused */
436 15, /* Line 1 */ 436 15, /* Line 1 */
437 15, /* Line 2 */ 437 15, /* Line 2 */
@@ -443,7 +443,7 @@ static char ibm8xx_pci_IRQ_routes[] __prepdata = {
443 * a 6015 ibm board 443 * a 6015 ibm board
444 * -- Cort 444 * -- Cort
445 */ 445 */
446static char ibm6015_pci_IRQ_map[23] __prepdata = { 446static char ibm6015_pci_IRQ_map[23] = {
447 0, /* Slot 0 - unused */ 447 0, /* Slot 0 - unused */
448 0, /* Slot 1 - unused */ 448 0, /* Slot 1 - unused */
449 0, /* Slot 2 - unused */ 449 0, /* Slot 2 - unused */
@@ -469,7 +469,7 @@ static char ibm6015_pci_IRQ_map[23] __prepdata = {
469 2, /* Slot 22 - */ 469 2, /* Slot 22 - */
470}; 470};
471 471
472static char ibm6015_pci_IRQ_routes[] __prepdata = { 472static char ibm6015_pci_IRQ_routes[] = {
473 0, /* Line 0 - unused */ 473 0, /* Line 0 - unused */
474 13, /* Line 1 */ 474 13, /* Line 1 */
475 15, /* Line 2 */ 475 15, /* Line 2 */
@@ -479,7 +479,7 @@ static char ibm6015_pci_IRQ_routes[] __prepdata = {
479 479
480 480
481/* IBM Nobis and Thinkpad 850 */ 481/* IBM Nobis and Thinkpad 850 */
482static char Nobis_pci_IRQ_map[23] __prepdata ={ 482static char Nobis_pci_IRQ_map[23] ={
483 0, /* Slot 0 - unused */ 483 0, /* Slot 0 - unused */
484 0, /* Slot 1 - unused */ 484 0, /* Slot 1 - unused */
485 0, /* Slot 2 - unused */ 485 0, /* Slot 2 - unused */
@@ -498,7 +498,7 @@ static char Nobis_pci_IRQ_map[23] __prepdata ={
498 0, /* Slot 15 - unused */ 498 0, /* Slot 15 - unused */
499}; 499};
500 500
501static char Nobis_pci_IRQ_routes[] __prepdata = { 501static char Nobis_pci_IRQ_routes[] = {
502 0, /* Line 0 - Unused */ 502 0, /* Line 0 - Unused */
503 13, /* Line 1 */ 503 13, /* Line 1 */
504 13, /* Line 2 */ 504 13, /* Line 2 */
@@ -510,7 +510,7 @@ static char Nobis_pci_IRQ_routes[] __prepdata = {
510 * IBM RS/6000 43p/140 -- paulus 510 * IBM RS/6000 43p/140 -- paulus
511 * XXX we should get all this from the residual data 511 * XXX we should get all this from the residual data
512 */ 512 */
513static char ibm43p_pci_IRQ_map[23] __prepdata = { 513static char ibm43p_pci_IRQ_map[23] = {
514 0, /* Slot 0 - unused */ 514 0, /* Slot 0 - unused */
515 0, /* Slot 1 - unused */ 515 0, /* Slot 1 - unused */
516 0, /* Slot 2 - unused */ 516 0, /* Slot 2 - unused */
@@ -536,7 +536,7 @@ static char ibm43p_pci_IRQ_map[23] __prepdata = {
536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */ 536 1, /* Slot 22 - PCI slot 1 PCIINTx# (See below) */
537}; 537};
538 538
539static char ibm43p_pci_IRQ_routes[] __prepdata = { 539static char ibm43p_pci_IRQ_routes[] = {
540 0, /* Line 0 - unused */ 540 0, /* Line 0 - unused */
541 15, /* Line 1 */ 541 15, /* Line 1 */
542 15, /* Line 2 */ 542 15, /* Line 2 */
@@ -559,7 +559,7 @@ struct powerplus_irq_list
559 * are routed to OpenPIC inputs 5-8. These values are offset by 559 * are routed to OpenPIC inputs 5-8. These values are offset by
560 * 16 in the table to reflect the Linux kernel interrupt value. 560 * 16 in the table to reflect the Linux kernel interrupt value.
561 */ 561 */
562struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata = 562struct powerplus_irq_list Powerplus_pci_IRQ_list =
563{ 563{
564 {25, 26, 27, 28}, 564 {25, 26, 27, 28},
565 {21, 22, 23, 24} 565 {21, 22, 23, 24}
@@ -572,7 +572,7 @@ struct powerplus_irq_list Powerplus_pci_IRQ_list __prepdata =
572 * are routed to OpenPIC inputs 12-15. These values are offset by 572 * are routed to OpenPIC inputs 12-15. These values are offset by
573 * 16 in the table to reflect the Linux kernel interrupt value. 573 * 16 in the table to reflect the Linux kernel interrupt value.
574 */ 574 */
575struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata = 575struct powerplus_irq_list Mesquite_pci_IRQ_list =
576{ 576{
577 {24, 25, 26, 27}, 577 {24, 25, 26, 27},
578 {28, 29, 30, 31} 578 {28, 29, 30, 31}
@@ -582,7 +582,7 @@ struct powerplus_irq_list Mesquite_pci_IRQ_list __prepdata =
582 * This table represents the standard PCI swizzle defined in the 582 * This table represents the standard PCI swizzle defined in the
583 * PCI bus specification. 583 * PCI bus specification.
584 */ 584 */
585static unsigned char prep_pci_intpins[4][4] __prepdata = 585static unsigned char prep_pci_intpins[4][4] =
586{ 586{
587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */ 587 { 1, 2, 3, 4}, /* Buses 0, 4, 8, ... */
588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */ 588 { 2, 3, 4, 1}, /* Buses 1, 5, 9, ... */
@@ -622,7 +622,7 @@ static unsigned char prep_pci_intpins[4][4] __prepdata =
622#define MIN_DEVNR 11 622#define MIN_DEVNR 11
623#define MAX_DEVNR 22 623#define MAX_DEVNR 22
624 624
625static int __prep 625static int
626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset, 626prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
627 int len, u32 *val) 627 int len, u32 *val)
628{ 628{
@@ -652,7 +652,7 @@ prep_read_config(struct pci_bus *bus, unsigned int devfn, int offset,
652 return PCIBIOS_SUCCESSFUL; 652 return PCIBIOS_SUCCESSFUL;
653} 653}
654 654
655static int __prep 655static int
656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset, 656prep_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
657 int len, u32 val) 657 int len, u32 val)
658{ 658{
@@ -804,7 +804,7 @@ struct mot_info {
804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */ 804 void (*map_non0_bus)(struct pci_dev *); /* For boards with more than bus 0 devices. */
805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */ 805 struct powerplus_irq_list *pci_irq_list; /* List of PCI MPIC inputs */
806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */ 806 unsigned char secondary_bridge_devfn; /* devfn of secondary bus transparent bridge */
807} mot_info[] __prepdata = { 807} mot_info[] = {
808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF}, 808 {0x300, 0x00, 0x00, "MVME 2400", Genesis2_pci_IRQ_map, Raven_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0xFF},
809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00}, 809 {0x010, 0x00, 0x00, "Genesis", Genesis_pci_IRQ_map, Genesis_pci_IRQ_routes, Powerplus_Map_Non0, &Powerplus_pci_IRQ_list, 0x00},
810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00}, 810 {0x020, 0x00, 0x00, "Powerstack (Series E)", Comet_pci_IRQ_map, Comet_pci_IRQ_routes, NULL, NULL, 0x00},
diff --git a/arch/ppc/platforms/prep_setup.c b/arch/ppc/platforms/prep_setup.c
index bc926be95472..490ff175c902 100644
--- a/arch/ppc/platforms/prep_setup.c
+++ b/arch/ppc/platforms/prep_setup.c
@@ -89,9 +89,6 @@ extern void prep_tiger1_setup_pci(char *irq_edge_mask_lo, char *irq_edge_mask_hi
89#define cached_21 (((char *)(ppc_cached_irq_mask))[3]) 89#define cached_21 (((char *)(ppc_cached_irq_mask))[3])
90#define cached_A1 (((char *)(ppc_cached_irq_mask))[2]) 90#define cached_A1 (((char *)(ppc_cached_irq_mask))[2])
91 91
92/* for the mac fs */
93dev_t boot_dev;
94
95#ifdef CONFIG_SOUND_CS4232 92#ifdef CONFIG_SOUND_CS4232
96long ppc_cs4232_dma, ppc_cs4232_dma2; 93long ppc_cs4232_dma, ppc_cs4232_dma2;
97#endif 94#endif
@@ -173,7 +170,7 @@ prep_carolina_enable_l2(void)
173} 170}
174 171
175/* cpuinfo code common to all IBM PReP */ 172/* cpuinfo code common to all IBM PReP */
176static void __prep 173static void
177prep_ibm_cpuinfo(struct seq_file *m) 174prep_ibm_cpuinfo(struct seq_file *m)
178{ 175{
179 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 176 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -209,14 +206,14 @@ prep_ibm_cpuinfo(struct seq_file *m)
209 } 206 }
210} 207}
211 208
212static int __prep 209static int
213prep_gen_cpuinfo(struct seq_file *m) 210prep_gen_cpuinfo(struct seq_file *m)
214{ 211{
215 prep_ibm_cpuinfo(m); 212 prep_ibm_cpuinfo(m);
216 return 0; 213 return 0;
217} 214}
218 215
219static int __prep 216static int
220prep_sandalfoot_cpuinfo(struct seq_file *m) 217prep_sandalfoot_cpuinfo(struct seq_file *m)
221{ 218{
222 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 219 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -243,7 +240,7 @@ prep_sandalfoot_cpuinfo(struct seq_file *m)
243 return 0; 240 return 0;
244} 241}
245 242
246static int __prep 243static int
247prep_thinkpad_cpuinfo(struct seq_file *m) 244prep_thinkpad_cpuinfo(struct seq_file *m)
248{ 245{
249 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 246 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -314,7 +311,7 @@ prep_thinkpad_cpuinfo(struct seq_file *m)
314 return 0; 311 return 0;
315} 312}
316 313
317static int __prep 314static int
318prep_carolina_cpuinfo(struct seq_file *m) 315prep_carolina_cpuinfo(struct seq_file *m)
319{ 316{
320 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT); 317 unsigned int equip_reg = inb(PREP_IBM_EQUIPMENT);
@@ -350,7 +347,7 @@ prep_carolina_cpuinfo(struct seq_file *m)
350 return 0; 347 return 0;
351} 348}
352 349
353static int __prep 350static int
354prep_tiger1_cpuinfo(struct seq_file *m) 351prep_tiger1_cpuinfo(struct seq_file *m)
355{ 352{
356 unsigned int l2_reg = inb(PREP_IBM_L2INFO); 353 unsigned int l2_reg = inb(PREP_IBM_L2INFO);
@@ -393,7 +390,7 @@ prep_tiger1_cpuinfo(struct seq_file *m)
393 390
394 391
395/* Used by all Motorola PReP */ 392/* Used by all Motorola PReP */
396static int __prep 393static int
397prep_mot_cpuinfo(struct seq_file *m) 394prep_mot_cpuinfo(struct seq_file *m)
398{ 395{
399 unsigned int cachew = *((unsigned char *)CACHECRBA); 396 unsigned int cachew = *((unsigned char *)CACHECRBA);
@@ -454,7 +451,7 @@ no_l2:
454 return 0; 451 return 0;
455} 452}
456 453
457static void __prep 454static void
458prep_restart(char *cmd) 455prep_restart(char *cmd)
459{ 456{
460#define PREP_SP92 0x92 /* Special Port 92 */ 457#define PREP_SP92 0x92 /* Special Port 92 */
@@ -473,7 +470,7 @@ prep_restart(char *cmd)
473#undef PREP_SP92 470#undef PREP_SP92
474} 471}
475 472
476static void __prep 473static void
477prep_halt(void) 474prep_halt(void)
478{ 475{
479 local_irq_disable(); /* no interrupts */ 476 local_irq_disable(); /* no interrupts */
@@ -488,7 +485,7 @@ prep_halt(void)
488/* Carrera is the power manager in the Thinkpads. Unfortunately not much is 485/* Carrera is the power manager in the Thinkpads. Unfortunately not much is
489 * known about it, so we can't power down. 486 * known about it, so we can't power down.
490 */ 487 */
491static void __prep 488static void
492prep_carrera_poweroff(void) 489prep_carrera_poweroff(void)
493{ 490{
494 prep_halt(); 491 prep_halt();
@@ -501,7 +498,7 @@ prep_carrera_poweroff(void)
501 * somewhat in the IBM Carolina Technical Specification. 498 * somewhat in the IBM Carolina Technical Specification.
502 * -Hollis 499 * -Hollis
503 */ 500 */
504static void __prep 501static void
505utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value) 502utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
506{ 503{
507 /* 504 /*
@@ -539,7 +536,7 @@ utah_sig87c750_setbit(unsigned int bytenum, unsigned int bitnum, int value)
539 udelay(100); /* important: let controller recover */ 536 udelay(100); /* important: let controller recover */
540} 537}
541 538
542static void __prep 539static void
543prep_sig750_poweroff(void) 540prep_sig750_poweroff(void)
544{ 541{
545 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */ 542 /* tweak the power manager found in most IBM PRePs (except Thinkpads) */
@@ -554,7 +551,7 @@ prep_sig750_poweroff(void)
554 /* not reached */ 551 /* not reached */
555} 552}
556 553
557static int __prep 554static int
558prep_show_percpuinfo(struct seq_file *m, int i) 555prep_show_percpuinfo(struct seq_file *m, int i)
559{ 556{
560 /* PREP's without residual data will give incorrect values here */ 557 /* PREP's without residual data will give incorrect values here */
@@ -700,12 +697,12 @@ prep_set_bat(void)
700/* 697/*
701 * IBM 3-digit status LED 698 * IBM 3-digit status LED
702 */ 699 */
703static unsigned int ibm_statusled_base __prepdata; 700static unsigned int ibm_statusled_base;
704 701
705static void __prep 702static void
706ibm_statusled_progress(char *s, unsigned short hex); 703ibm_statusled_progress(char *s, unsigned short hex);
707 704
708static int __prep 705static int
709ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2, 706ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
710 void * dummy3) 707 void * dummy3)
711{ 708{
@@ -713,13 +710,13 @@ ibm_statusled_panic(struct notifier_block *dummy1, unsigned long dummy2,
713 return NOTIFY_DONE; 710 return NOTIFY_DONE;
714} 711}
715 712
716static struct notifier_block ibm_statusled_block __prepdata = { 713static struct notifier_block ibm_statusled_block = {
717 ibm_statusled_panic, 714 ibm_statusled_panic,
718 NULL, 715 NULL,
719 INT_MAX /* try to do it first */ 716 INT_MAX /* try to do it first */
720}; 717};
721 718
722static void __prep 719static void
723ibm_statusled_progress(char *s, unsigned short hex) 720ibm_statusled_progress(char *s, unsigned short hex)
724{ 721{
725 static int notifier_installed; 722 static int notifier_installed;
@@ -945,19 +942,6 @@ prep_calibrate_decr(void)
945 todc_calibrate_decr(); 942 todc_calibrate_decr();
946} 943}
947 944
948static unsigned int __prep
949prep_irq_canonicalize(u_int irq)
950{
951 if (irq == 2)
952 {
953 return 9;
954 }
955 else
956 {
957 return irq;
958 }
959}
960
961static void __init 945static void __init
962prep_init_IRQ(void) 946prep_init_IRQ(void)
963{ 947{
@@ -996,7 +980,7 @@ prep_init_IRQ(void)
996/* 980/*
997 * IDE stuff. 981 * IDE stuff.
998 */ 982 */
999static int __prep 983static int
1000prep_ide_default_irq(unsigned long base) 984prep_ide_default_irq(unsigned long base)
1001{ 985{
1002 switch (base) { 986 switch (base) {
@@ -1010,7 +994,7 @@ prep_ide_default_irq(unsigned long base)
1010 } 994 }
1011} 995}
1012 996
1013static unsigned long __prep 997static unsigned long
1014prep_ide_default_io_base(int index) 998prep_ide_default_io_base(int index)
1015{ 999{
1016 switch (index) { 1000 switch (index) {
@@ -1055,7 +1039,7 @@ smp_prep_setup_cpu(int cpu_nr)
1055 do_openpic_setup_cpu(); 1039 do_openpic_setup_cpu();
1056} 1040}
1057 1041
1058static struct smp_ops_t prep_smp_ops __prepdata = { 1042static struct smp_ops_t prep_smp_ops = {
1059 smp_openpic_message_pass, 1043 smp_openpic_message_pass,
1060 smp_prep_probe, 1044 smp_prep_probe,
1061 smp_prep_kick_cpu, 1045 smp_prep_kick_cpu,
@@ -1113,6 +1097,7 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1113 ISA_DMA_THRESHOLD = 0x00ffffff; 1097 ISA_DMA_THRESHOLD = 0x00ffffff;
1114 DMA_MODE_READ = 0x44; 1098 DMA_MODE_READ = 0x44;
1115 DMA_MODE_WRITE = 0x48; 1099 DMA_MODE_WRITE = 0x48;
1100 ppc_do_canonicalize_irqs = 1;
1116 1101
1117 /* figure out what kind of prep workstation we are */ 1102 /* figure out what kind of prep workstation we are */
1118 if (have_residual_data) { 1103 if (have_residual_data) {
@@ -1139,7 +1124,6 @@ prep_init(unsigned long r3, unsigned long r4, unsigned long r5,
1139 ppc_md.setup_arch = prep_setup_arch; 1124 ppc_md.setup_arch = prep_setup_arch;
1140 ppc_md.show_percpuinfo = prep_show_percpuinfo; 1125 ppc_md.show_percpuinfo = prep_show_percpuinfo;
1141 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */ 1126 ppc_md.show_cpuinfo = NULL; /* set in prep_setup_arch() */
1142 ppc_md.irq_canonicalize = prep_irq_canonicalize;
1143 ppc_md.init_IRQ = prep_init_IRQ; 1127 ppc_md.init_IRQ = prep_init_IRQ;
1144 /* this gets changed later on if we have an OpenPIC -- Cort */ 1128 /* this gets changed later on if we have an OpenPIC -- Cort */
1145 ppc_md.get_irq = i8259_irq; 1129 ppc_md.get_irq = i8259_irq;
diff --git a/arch/ppc/platforms/radstone_ppc7d.c b/arch/ppc/platforms/radstone_ppc7d.c
index 0376c8cff5d1..5058568c13ec 100644
--- a/arch/ppc/platforms/radstone_ppc7d.c
+++ b/arch/ppc/platforms/radstone_ppc7d.c
@@ -1183,18 +1183,18 @@ static void __init ppc7d_setup_arch(void)
1183 ROOT_DEV = Root_HDA1; 1183 ROOT_DEV = Root_HDA1;
1184#endif 1184#endif
1185 1185
1186 if ((cur_cpu_spec[0]->cpu_features & CPU_FTR_SPEC7450) || 1186 if ((cur_cpu_spec->cpu_features & CPU_FTR_SPEC7450) ||
1187 (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR)) 1187 (cur_cpu_spec->cpu_features & CPU_FTR_L3CR))
1188 /* 745x is different. We only want to pass along enable. */ 1188 /* 745x is different. We only want to pass along enable. */
1189 _set_L2CR(L2CR_L2E); 1189 _set_L2CR(L2CR_L2E);
1190 else if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L2CR) 1190 else if (cur_cpu_spec->cpu_features & CPU_FTR_L2CR)
1191 /* All modules have 1MB of L2. We also assume that an 1191 /* All modules have 1MB of L2. We also assume that an
1192 * L2 divisor of 3 will work. 1192 * L2 divisor of 3 will work.
1193 */ 1193 */
1194 _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3 1194 _set_L2CR(L2CR_L2E | L2CR_L2SIZ_1MB | L2CR_L2CLK_DIV3
1195 | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF); 1195 | L2CR_L2RAM_PIPE | L2CR_L2OH_1_0 | L2CR_L2DF);
1196 1196
1197 if (cur_cpu_spec[0]->cpu_features & CPU_FTR_L3CR) 1197 if (cur_cpu_spec->cpu_features & CPU_FTR_L3CR)
1198 /* No L3 cache */ 1198 /* No L3 cache */
1199 _set_L3CR(0); 1199 _set_L3CR(0);
1200 1200
@@ -1424,6 +1424,7 @@ void __init platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
1424 ppc_md.setup_arch = ppc7d_setup_arch; 1424 ppc_md.setup_arch = ppc7d_setup_arch;
1425 ppc_md.init = ppc7d_init2; 1425 ppc_md.init = ppc7d_init2;
1426 ppc_md.show_cpuinfo = ppc7d_show_cpuinfo; 1426 ppc_md.show_cpuinfo = ppc7d_show_cpuinfo;
1427 /* XXX this is broken... */
1427 ppc_md.irq_canonicalize = ppc7d_irq_canonicalize; 1428 ppc_md.irq_canonicalize = ppc7d_irq_canonicalize;
1428 ppc_md.init_IRQ = ppc7d_init_irq; 1429 ppc_md.init_IRQ = ppc7d_init_irq;
1429 ppc_md.get_irq = ppc7d_get_irq; 1430 ppc_md.get_irq = ppc7d_get_irq;
diff --git a/arch/ppc/platforms/residual.c b/arch/ppc/platforms/residual.c
index 0f84ca603612..c9911601cfdf 100644
--- a/arch/ppc/platforms/residual.c
+++ b/arch/ppc/platforms/residual.c
@@ -47,7 +47,7 @@
47#include <asm/ide.h> 47#include <asm/ide.h>
48 48
49 49
50unsigned char __res[sizeof(RESIDUAL)] __prepdata = {0,}; 50unsigned char __res[sizeof(RESIDUAL)] = {0,};
51RESIDUAL *res = (RESIDUAL *)&__res; 51RESIDUAL *res = (RESIDUAL *)&__res;
52 52
53char * PnP_BASE_TYPES[] __initdata = { 53char * PnP_BASE_TYPES[] __initdata = {
diff --git a/arch/ppc/platforms/sandpoint.c b/arch/ppc/platforms/sandpoint.c
index 5232283c1974..d4c9781989fb 100644
--- a/arch/ppc/platforms/sandpoint.c
+++ b/arch/ppc/platforms/sandpoint.c
@@ -508,15 +508,6 @@ sandpoint_init_IRQ(void)
508 i8259_init(0xfef00000); 508 i8259_init(0xfef00000);
509} 509}
510 510
511static u32
512sandpoint_irq_canonicalize(u32 irq)
513{
514 if (irq == 2)
515 return 9;
516 else
517 return irq;
518}
519
520static unsigned long __init 511static unsigned long __init
521sandpoint_find_end_of_memory(void) 512sandpoint_find_end_of_memory(void)
522{ 513{
@@ -727,10 +718,10 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
727 ISA_DMA_THRESHOLD = 0x00ffffff; 718 ISA_DMA_THRESHOLD = 0x00ffffff;
728 DMA_MODE_READ = 0x44; 719 DMA_MODE_READ = 0x44;
729 DMA_MODE_WRITE = 0x48; 720 DMA_MODE_WRITE = 0x48;
721 ppc_do_canonicalize_irqs = 1;
730 722
731 ppc_md.setup_arch = sandpoint_setup_arch; 723 ppc_md.setup_arch = sandpoint_setup_arch;
732 ppc_md.show_cpuinfo = sandpoint_show_cpuinfo; 724 ppc_md.show_cpuinfo = sandpoint_show_cpuinfo;
733 ppc_md.irq_canonicalize = sandpoint_irq_canonicalize;
734 ppc_md.init_IRQ = sandpoint_init_IRQ; 725 ppc_md.init_IRQ = sandpoint_init_IRQ;
735 ppc_md.get_irq = openpic_get_irq; 726 ppc_md.get_irq = openpic_get_irq;
736 727
diff --git a/arch/ppc/syslib/btext.c b/arch/ppc/syslib/btext.c
index 7734f6836174..12fa83e6774a 100644
--- a/arch/ppc/syslib/btext.c
+++ b/arch/ppc/syslib/btext.c
@@ -53,8 +53,8 @@ extern char *klimit;
53 * chrp only uses it during early boot. 53 * chrp only uses it during early boot.
54 */ 54 */
55#ifdef CONFIG_XMON 55#ifdef CONFIG_XMON
56#define BTEXT __pmac 56#define BTEXT
57#define BTDATA __pmacdata 57#define BTDATA
58#else 58#else
59#define BTEXT __init 59#define BTEXT __init
60#define BTDATA __initdata 60#define BTDATA __initdata
@@ -187,7 +187,7 @@ btext_setup_display(int width, int height, int depth, int pitch,
187 * changes. 187 * changes.
188 */ 188 */
189 189
190void __openfirmware 190void
191map_boot_text(void) 191map_boot_text(void)
192{ 192{
193 unsigned long base, offset, size; 193 unsigned long base, offset, size;
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index 44aa87385451..f97b3a9abd1e 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -45,6 +45,7 @@
45#include <asm/system.h> 45#include <asm/system.h>
46#include <asm/irq.h> 46#include <asm/irq.h>
47#include <asm/mv64x60.h> 47#include <asm/mv64x60.h>
48#include <asm/machdep.h>
48 49
49#define CPU_INTR_STR "gt64260 cpu interface error" 50#define CPU_INTR_STR "gt64260 cpu interface error"
50#define PCI0_INTR_STR "gt64260 pci 0 error" 51#define PCI0_INTR_STR "gt64260 pci 0 error"
diff --git a/arch/ppc/syslib/ibm440gx_common.c b/arch/ppc/syslib/ibm440gx_common.c
index 0bb919859b8b..c36db279b43d 100644
--- a/arch/ppc/syslib/ibm440gx_common.c
+++ b/arch/ppc/syslib/ibm440gx_common.c
@@ -236,9 +236,9 @@ void __init ibm440gx_l2c_setup(struct ibm44x_clocks* p)
236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C, 236 /* Disable L2C on rev.A, rev.B and 800MHz version of rev.C,
237 enable it on all other revisions 237 enable it on all other revisions
238 */ 238 */
239 if (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. A") == 0 || 239 if (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. A") == 0 ||
240 strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. B") == 0 240 strcmp(cur_cpu_spec->cpu_name, "440GX Rev. B") == 0
241 || (strcmp(cur_cpu_spec[0]->cpu_name, "440GX Rev. C") 241 || (strcmp(cur_cpu_spec->cpu_name, "440GX Rev. C")
242 == 0 && p->cpu > 667000000)) 242 == 0 && p->cpu > 667000000))
243 ibm440gx_l2c_disable(); 243 ibm440gx_l2c_disable();
244 else 244 else
diff --git a/arch/ppc/syslib/ibm44x_common.c b/arch/ppc/syslib/ibm44x_common.c
index 7612e0623f99..95e11f93c15d 100644
--- a/arch/ppc/syslib/ibm44x_common.c
+++ b/arch/ppc/syslib/ibm44x_common.c
@@ -178,7 +178,7 @@ void __init ibm44x_platform_init(void)
178#endif 178#endif
179} 179}
180 180
181/* Called from MachineCheckException */ 181/* Called from machine_check_exception */
182void platform_machine_check(struct pt_regs *regs) 182void platform_machine_check(struct pt_regs *regs)
183{ 183{
184 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n", 184 printk("PLB0: BEAR=0x%08x%08x ACR= 0x%08x BESR= 0x%08x\n",
diff --git a/arch/ppc/syslib/m8xx_setup.c b/arch/ppc/syslib/m8xx_setup.c
index 4c888da89b3c..c88e2d4dceb7 100644
--- a/arch/ppc/syslib/m8xx_setup.c
+++ b/arch/ppc/syslib/m8xx_setup.c
@@ -406,7 +406,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
406 406
407 ppc_md.setup_arch = m8xx_setup_arch; 407 ppc_md.setup_arch = m8xx_setup_arch;
408 ppc_md.show_percpuinfo = m8xx_show_percpuinfo; 408 ppc_md.show_percpuinfo = m8xx_show_percpuinfo;
409 ppc_md.irq_canonicalize = NULL;
410 ppc_md.init_IRQ = m8xx_init_IRQ; 409 ppc_md.init_IRQ = m8xx_init_IRQ;
411 ppc_md.get_irq = m8xx_get_irq; 410 ppc_md.get_irq = m8xx_get_irq;
412 ppc_md.init = NULL; 411 ppc_md.init = NULL;
diff --git a/arch/ppc/syslib/mpc52xx_pci.c b/arch/ppc/syslib/mpc52xx_pci.c
index 59cf3e8bd1a0..02edff8befd0 100644
--- a/arch/ppc/syslib/mpc52xx_pci.c
+++ b/arch/ppc/syslib/mpc52xx_pci.c
@@ -21,6 +21,7 @@
21#include "mpc52xx_pci.h" 21#include "mpc52xx_pci.h"
22 22
23#include <asm/delay.h> 23#include <asm/delay.h>
24#include <asm/machdep.h>
24 25
25 26
26static int 27static int
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
index 95b3b8a7f0ba..dbf8acac507f 100644
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ b/arch/ppc/syslib/mpc83xx_devices.c
@@ -21,6 +21,7 @@
21#include <asm/mpc83xx.h> 21#include <asm/mpc83xx.h>
22#include <asm/irq.h> 22#include <asm/irq.h>
23#include <asm/ppc_sys.h> 23#include <asm/ppc_sys.h>
24#include <asm/machdep.h>
24 25
25/* We use offsets for IORESOURCE_MEM since we do not know at compile time 26/* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup 27 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 8356da4678a2..58b0aa813e85 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -48,6 +48,7 @@
48#include <asm/system.h> 48#include <asm/system.h>
49#include <asm/irq.h> 49#include <asm/irq.h>
50#include <asm/mv64x60.h> 50#include <asm/mv64x60.h>
51#include <asm/machdep.h>
51 52
52#ifdef CONFIG_IRQ_ALL_CPUS 53#ifdef CONFIG_IRQ_ALL_CPUS
53#error "The mv64360 does not support distribution of IRQs on all CPUs" 54#error "The mv64360 does not support distribution of IRQs on all CPUs"
diff --git a/arch/ppc/syslib/mv64x60_dbg.c b/arch/ppc/syslib/mv64x60_dbg.c
index 2927c7adf5e5..fa5b2e45e0ca 100644
--- a/arch/ppc/syslib/mv64x60_dbg.c
+++ b/arch/ppc/syslib/mv64x60_dbg.c
@@ -24,6 +24,7 @@
24#include <linux/irq.h> 24#include <linux/irq.h>
25#include <asm/delay.h> 25#include <asm/delay.h>
26#include <asm/mv64x60.h> 26#include <asm/mv64x60.h>
27#include <asm/machdep.h>
27 28
28 29
29#if defined(CONFIG_SERIAL_TEXT_DEBUG) 30#if defined(CONFIG_SERIAL_TEXT_DEBUG)
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index 1cf5de21a3fd..361f113260d7 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -23,6 +23,7 @@
23#include <asm/sections.h> 23#include <asm/sections.h>
24#include <asm/open_pic.h> 24#include <asm/open_pic.h>
25#include <asm/i8259.h> 25#include <asm/i8259.h>
26#include <asm/machdep.h>
26 27
27#include "open_pic_defs.h" 28#include "open_pic_defs.h"
28 29
diff --git a/arch/ppc/syslib/open_pic2.c b/arch/ppc/syslib/open_pic2.c
index 16cff91d9f41..1c40049b9a45 100644
--- a/arch/ppc/syslib/open_pic2.c
+++ b/arch/ppc/syslib/open_pic2.c
@@ -27,6 +27,7 @@
27#include <asm/sections.h> 27#include <asm/sections.h>
28#include <asm/open_pic.h> 28#include <asm/open_pic.h>
29#include <asm/i8259.h> 29#include <asm/i8259.h>
30#include <asm/machdep.h>
30 31
31#include "open_pic_defs.h" 32#include "open_pic_defs.h"
32 33
diff --git a/arch/ppc/syslib/ppc403_pic.c b/arch/ppc/syslib/ppc403_pic.c
index ce4d1deb86e9..c46043c47225 100644
--- a/arch/ppc/syslib/ppc403_pic.c
+++ b/arch/ppc/syslib/ppc403_pic.c
@@ -26,6 +26,7 @@
26#include <asm/system.h> 26#include <asm/system.h>
27#include <asm/irq.h> 27#include <asm/irq.h>
28#include <asm/ppc4xx_pic.h> 28#include <asm/ppc4xx_pic.h>
29#include <asm/machdep.h>
29 30
30/* Function Prototypes */ 31/* Function Prototypes */
31 32
diff --git a/arch/ppc/syslib/ppc4xx_pic.c b/arch/ppc/syslib/ppc4xx_pic.c
index 40086212b9c3..0b435633a0d1 100644
--- a/arch/ppc/syslib/ppc4xx_pic.c
+++ b/arch/ppc/syslib/ppc4xx_pic.c
@@ -25,6 +25,7 @@
25#include <asm/system.h> 25#include <asm/system.h>
26#include <asm/irq.h> 26#include <asm/irq.h>
27#include <asm/ppc4xx_pic.h> 27#include <asm/ppc4xx_pic.h>
28#include <asm/machdep.h>
28 29
29/* See comment in include/arch-ppc/ppc4xx_pic.h 30/* See comment in include/arch-ppc/ppc4xx_pic.h
30 * for more info about these two variables 31 * for more info about these two variables
diff --git a/arch/ppc/syslib/ppc4xx_setup.c b/arch/ppc/syslib/ppc4xx_setup.c
index bf83240689dc..e83a83fd95e1 100644
--- a/arch/ppc/syslib/ppc4xx_setup.c
+++ b/arch/ppc/syslib/ppc4xx_setup.c
@@ -278,7 +278,7 @@ ppc4xx_init(unsigned long r3, unsigned long r4, unsigned long r5,
278#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */ 278#endif /* defined(CONFIG_PCI) && defined(CONFIG_IDE) */
279} 279}
280 280
281/* Called from MachineCheckException */ 281/* Called from machine_check_exception */
282void platform_machine_check(struct pt_regs *regs) 282void platform_machine_check(struct pt_regs *regs)
283{ 283{
284#if defined(DCRN_PLB0_BEAR) 284#if defined(DCRN_PLB0_BEAR)
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
index 890484e576e7..4da168a6ad03 100644
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ b/arch/ppc/syslib/ppc83xx_setup.c
@@ -40,6 +40,7 @@
40#include <asm/ppc_sys.h> 40#include <asm/ppc_sys.h>
41#include <asm/kgdb.h> 41#include <asm/kgdb.h>
42#include <asm/delay.h> 42#include <asm/delay.h>
43#include <asm/machdep.h>
43 44
44#include <syslib/ppc83xx_setup.h> 45#include <syslib/ppc83xx_setup.h>
45#if defined(CONFIG_PCI) 46#if defined(CONFIG_PCI)
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
index 832b8bf99ae7..de2f90576577 100644
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ b/arch/ppc/syslib/ppc85xx_setup.c
@@ -29,6 +29,7 @@
29#include <asm/mmu.h> 29#include <asm/mmu.h>
30#include <asm/ppc_sys.h> 30#include <asm/ppc_sys.h>
31#include <asm/kgdb.h> 31#include <asm/kgdb.h>
32#include <asm/machdep.h>
32 33
33#include <syslib/ppc85xx_setup.h> 34#include <syslib/ppc85xx_setup.h>
34 35
diff --git a/arch/ppc/syslib/pq2_devices.c b/arch/ppc/syslib/pq2_devices.c
index 1d3869768f96..6f88ba93412b 100644
--- a/arch/ppc/syslib/pq2_devices.c
+++ b/arch/ppc/syslib/pq2_devices.c
@@ -18,6 +18,7 @@
18#include <asm/cpm2.h> 18#include <asm/cpm2.h>
19#include <asm/irq.h> 19#include <asm/irq.h>
20#include <asm/ppc_sys.h> 20#include <asm/ppc_sys.h>
21#include <asm/machdep.h>
21 22
22struct platform_device ppc_sys_platform_devices[] = { 23struct platform_device ppc_sys_platform_devices[] = {
23 [MPC82xx_CPM_FCC1] = { 24 [MPC82xx_CPM_FCC1] = {
diff --git a/arch/ppc/syslib/prep_nvram.c b/arch/ppc/syslib/prep_nvram.c
index 8599850ca772..2c6364d9641f 100644
--- a/arch/ppc/syslib/prep_nvram.c
+++ b/arch/ppc/syslib/prep_nvram.c
@@ -22,14 +22,14 @@
22static char nvramData[MAX_PREP_NVRAM]; 22static char nvramData[MAX_PREP_NVRAM];
23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0]; 23static NVRAM_MAP *nvram=(NVRAM_MAP *)&nvramData[0];
24 24
25unsigned char __prep prep_nvram_read_val(int addr) 25unsigned char prep_nvram_read_val(int addr)
26{ 26{
27 outb(addr, PREP_NVRAM_AS0); 27 outb(addr, PREP_NVRAM_AS0);
28 outb(addr>>8, PREP_NVRAM_AS1); 28 outb(addr>>8, PREP_NVRAM_AS1);
29 return inb(PREP_NVRAM_DATA); 29 return inb(PREP_NVRAM_DATA);
30} 30}
31 31
32void __prep prep_nvram_write_val(int addr, 32void prep_nvram_write_val(int addr,
33 unsigned char val) 33 unsigned char val)
34{ 34{
35 outb(addr, PREP_NVRAM_AS0); 35 outb(addr, PREP_NVRAM_AS0);
@@ -81,8 +81,7 @@ void __init init_prep_nvram(void)
81 } 81 }
82} 82}
83 83
84__prep 84char *prep_nvram_get_var(const char *name)
85char __prep *prep_nvram_get_var(const char *name)
86{ 85{
87 char *cp; 86 char *cp;
88 int namelen; 87 int namelen;
@@ -101,8 +100,7 @@ char __prep *prep_nvram_get_var(const char *name)
101 return NULL; 100 return NULL;
102} 101}
103 102
104__prep 103char *prep_nvram_first_var(void)
105char __prep *prep_nvram_first_var(void)
106{ 104{
107 if (nvram->Header.GELength == 0) { 105 if (nvram->Header.GELength == 0) {
108 return NULL; 106 return NULL;
@@ -112,8 +110,7 @@ char __prep *prep_nvram_first_var(void)
112 } 110 }
113} 111}
114 112
115__prep 113char *prep_nvram_next_var(char *name)
116char __prep *prep_nvram_next_var(char *name)
117{ 114{
118 char *cp; 115 char *cp;
119 116
diff --git a/arch/ppc/syslib/prom.c b/arch/ppc/syslib/prom.c
index 2c64ed627475..278da6ee62ea 100644
--- a/arch/ppc/syslib/prom.c
+++ b/arch/ppc/syslib/prom.c
@@ -89,7 +89,7 @@ extern char cmd_line[512]; /* XXX */
89extern boot_infos_t *boot_infos; 89extern boot_infos_t *boot_infos;
90unsigned long dev_tree_size; 90unsigned long dev_tree_size;
91 91
92void __openfirmware 92void
93phys_call_rtas(int service, int nargs, int nret, ...) 93phys_call_rtas(int service, int nargs, int nret, ...)
94{ 94{
95 va_list list; 95 va_list list;
@@ -862,7 +862,7 @@ find_type_devices(const char *type)
862/* 862/*
863 * Returns all nodes linked together 863 * Returns all nodes linked together
864 */ 864 */
865struct device_node * __openfirmware 865struct device_node *
866find_all_nodes(void) 866find_all_nodes(void)
867{ 867{
868 struct device_node *head, **prevp, *np; 868 struct device_node *head, **prevp, *np;
@@ -1165,7 +1165,7 @@ get_property(struct device_node *np, const char *name, int *lenp)
1165/* 1165/*
1166 * Add a property to a node 1166 * Add a property to a node
1167 */ 1167 */
1168void __openfirmware 1168void
1169prom_add_property(struct device_node* np, struct property* prop) 1169prom_add_property(struct device_node* np, struct property* prop)
1170{ 1170{
1171 struct property **next = &np->properties; 1171 struct property **next = &np->properties;
@@ -1177,7 +1177,7 @@ prom_add_property(struct device_node* np, struct property* prop)
1177} 1177}
1178 1178
1179/* I quickly hacked that one, check against spec ! */ 1179/* I quickly hacked that one, check against spec ! */
1180static inline unsigned long __openfirmware 1180static inline unsigned long
1181bus_space_to_resource_flags(unsigned int bus_space) 1181bus_space_to_resource_flags(unsigned int bus_space)
1182{ 1182{
1183 u8 space = (bus_space >> 24) & 0xf; 1183 u8 space = (bus_space >> 24) & 0xf;
@@ -1194,7 +1194,7 @@ bus_space_to_resource_flags(unsigned int bus_space)
1194 } 1194 }
1195} 1195}
1196 1196
1197static struct resource* __openfirmware 1197static struct resource*
1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range) 1198find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1199{ 1199{
1200 unsigned long mask; 1200 unsigned long mask;
@@ -1224,7 +1224,7 @@ find_parent_pci_resource(struct pci_dev* pdev, struct address_range *range)
1224 * or other nodes attached to the root node. Ultimately, put some 1224 * or other nodes attached to the root node. Ultimately, put some
1225 * link to resources in the OF node. 1225 * link to resources in the OF node.
1226 */ 1226 */
1227struct resource* __openfirmware 1227struct resource*
1228request_OF_resource(struct device_node* node, int index, const char* name_postfix) 1228request_OF_resource(struct device_node* node, int index, const char* name_postfix)
1229{ 1229{
1230 struct pci_dev* pcidev; 1230 struct pci_dev* pcidev;
@@ -1280,7 +1280,7 @@ fail:
1280 return NULL; 1280 return NULL;
1281} 1281}
1282 1282
1283int __openfirmware 1283int
1284release_OF_resource(struct device_node* node, int index) 1284release_OF_resource(struct device_node* node, int index)
1285{ 1285{
1286 struct pci_dev* pcidev; 1286 struct pci_dev* pcidev;
@@ -1346,7 +1346,7 @@ release_OF_resource(struct device_node* node, int index)
1346} 1346}
1347 1347
1348#if 0 1348#if 0
1349void __openfirmware 1349void
1350print_properties(struct device_node *np) 1350print_properties(struct device_node *np)
1351{ 1351{
1352 struct property *pp; 1352 struct property *pp;
@@ -1400,7 +1400,7 @@ print_properties(struct device_node *np)
1400static DEFINE_SPINLOCK(rtas_lock); 1400static DEFINE_SPINLOCK(rtas_lock);
1401 1401
1402/* this can be called after setup -- Cort */ 1402/* this can be called after setup -- Cort */
1403int __openfirmware 1403int
1404call_rtas(const char *service, int nargs, int nret, 1404call_rtas(const char *service, int nargs, int nret,
1405 unsigned long *outputs, ...) 1405 unsigned long *outputs, ...)
1406{ 1406{
diff --git a/arch/ppc/syslib/xilinx_pic.c b/arch/ppc/syslib/xilinx_pic.c
index 2cbcad278cef..47f04c71fe9c 100644
--- a/arch/ppc/syslib/xilinx_pic.c
+++ b/arch/ppc/syslib/xilinx_pic.c
@@ -17,6 +17,7 @@
17#include <asm/io.h> 17#include <asm/io.h>
18#include <asm/xparameters.h> 18#include <asm/xparameters.h>
19#include <asm/ibm4xx.h> 19#include <asm/ibm4xx.h>
20#include <asm/machdep.h>
20 21
21/* No one else should require these constants, so define them locally here. */ 22/* No one else should require these constants, so define them locally here. */
22#define ISR 0 /* Interrupt Status Register */ 23#define ISR 0 /* Interrupt Status Register */
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index 507d4eeffe07..98612d420346 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -478,8 +478,9 @@ void *xmon_stdout;
478void *xmon_stderr; 478void *xmon_stderr;
479 479
480void 480void
481xmon_init(void) 481xmon_init(int arg)
482{ 482{
483 xmon_map_scc();
483} 484}
484 485
485int 486int
generated by cgit v1.2.2 (git 2.25.0) at 2025-02-23 17:34:44 -0500