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-rw-r--r--arch/ppc/8260_io/enet.c2
-rw-r--r--arch/ppc/8xx_io/commproc.c40
-rw-r--r--arch/ppc/8xx_io/enet.c6
-rw-r--r--arch/ppc/8xx_io/fec.c2
-rw-r--r--arch/ppc/8xx_io/micropatch.c2
-rw-r--r--arch/ppc/Kconfig91
-rw-r--r--arch/ppc/Makefile9
-rw-r--r--arch/ppc/boot/simple/iic.c2
-rw-r--r--arch/ppc/boot/simple/m8xx_tty.c2
-rw-r--r--arch/ppc/configs/TQM8540_defconfig973
-rw-r--r--arch/ppc/configs/TQM8541_defconfig986
-rw-r--r--arch/ppc/configs/TQM8555_defconfig983
-rw-r--r--arch/ppc/configs/TQM8560_defconfig992
-rw-r--r--arch/ppc/configs/mpc834x_sys_defconfig844
-rw-r--r--arch/ppc/configs/mpc8540_ads_defconfig706
-rw-r--r--arch/ppc/configs/mpc8548_cds_defconfig658
-rw-r--r--arch/ppc/configs/mpc8555_cds_defconfig784
-rw-r--r--arch/ppc/configs/mpc8560_ads_defconfig769
-rw-r--r--arch/ppc/configs/stx_gp3_defconfig989
-rw-r--r--arch/ppc/kernel/Makefile2
-rw-r--r--arch/ppc/kernel/asm-offsets.c6
-rw-r--r--arch/ppc/kernel/entry.S12
-rw-r--r--arch/ppc/kernel/head_44x.S2
-rw-r--r--arch/ppc/kernel/head_booke.h55
-rw-r--r--arch/ppc/kernel/head_fsl_booke.S1065
-rw-r--r--arch/ppc/kernel/misc.S46
-rw-r--r--arch/ppc/kernel/ppc_ksyms.c11
-rw-r--r--arch/ppc/kernel/rio.c52
-rw-r--r--arch/ppc/kernel/setup.c4
-rw-r--r--arch/ppc/kernel/traps.c185
-rw-r--r--arch/ppc/mm/44x_mmu.c51
-rw-r--r--arch/ppc/mm/Makefile1
-rw-r--r--arch/ppc/mm/fsl_booke_mmu.c236
-rw-r--r--arch/ppc/mm/init.c6
-rw-r--r--arch/ppc/mm/mmu_context.c2
-rw-r--r--arch/ppc/mm/mmu_decl.h6
-rw-r--r--arch/ppc/mm/pgtable.c28
-rw-r--r--arch/ppc/mm/ppc_mmu.c2
-rw-r--r--arch/ppc/platforms/83xx/Makefile4
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.c326
-rw-r--r--arch/ppc/platforms/83xx/mpc834x_sys.h54
-rw-r--r--arch/ppc/platforms/85xx/Kconfig106
-rw-r--r--arch/ppc/platforms/85xx/Makefile13
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.c226
-rw-r--r--arch/ppc/platforms/85xx/mpc8540_ads.h22
-rw-r--r--arch/ppc/platforms/85xx/mpc8555_cds.h23
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.c303
-rw-r--r--arch/ppc/platforms/85xx/mpc8560_ads.h24
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.c198
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_ads_common.h67
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.c601
-rw-r--r--arch/ppc/platforms/85xx/mpc85xx_cds_common.h80
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.c234
-rw-r--r--arch/ppc/platforms/85xx/sbc8560.h47
-rw-r--r--arch/ppc/platforms/85xx/sbc85xx.c166
-rw-r--r--arch/ppc/platforms/85xx/sbc85xx.h70
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.c340
-rw-r--r--arch/ppc/platforms/85xx/stx_gp3.h69
-rw-r--r--arch/ppc/platforms/85xx/tqm85xx.c391
-rw-r--r--arch/ppc/platforms/85xx/tqm85xx.h53
-rw-r--r--arch/ppc/platforms/ev64260.c4
-rw-r--r--arch/ppc/platforms/mpc866ads_setup.c2
-rw-r--r--arch/ppc/platforms/mpc885ads_setup.c2
-rw-r--r--arch/ppc/platforms/prep_pci.c1
-rw-r--r--arch/ppc/syslib/Makefile14
-rw-r--r--arch/ppc/syslib/gt64260_pic.c1
-rw-r--r--arch/ppc/syslib/ipic.c646
-rw-r--r--arch/ppc/syslib/ipic.h47
-rw-r--r--arch/ppc/syslib/mpc52xx_pic.c1
-rw-r--r--arch/ppc/syslib/mpc52xx_setup.c36
-rw-r--r--arch/ppc/syslib/mpc83xx_devices.c251
-rw-r--r--arch/ppc/syslib/mpc83xx_sys.c122
-rw-r--r--arch/ppc/syslib/mpc85xx_devices.c826
-rw-r--r--arch/ppc/syslib/mpc85xx_sys.c233
-rw-r--r--arch/ppc/syslib/mpc8xx_devices.c2
-rw-r--r--arch/ppc/syslib/mv64360_pic.c1
-rw-r--r--arch/ppc/syslib/ocp.c4
-rw-r--r--arch/ppc/syslib/open_pic.c2
-rw-r--r--arch/ppc/syslib/ppc83xx_pci.h151
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.c411
-rw-r--r--arch/ppc/syslib/ppc83xx_setup.h55
-rw-r--r--arch/ppc/syslib/ppc85xx_common.c38
-rw-r--r--arch/ppc/syslib/ppc85xx_common.h22
-rw-r--r--arch/ppc/syslib/ppc85xx_rio.c932
-rw-r--r--arch/ppc/syslib/ppc85xx_rio.h20
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.c367
-rw-r--r--arch/ppc/syslib/ppc85xx_setup.h56
-rw-r--r--arch/ppc/syslib/ppc8xx_pic.c2
-rw-r--r--arch/ppc/syslib/ppc8xx_pic.h1
-rw-r--r--arch/ppc/syslib/ppc_sys.c2
-rw-r--r--arch/ppc/xmon/start.c1
-rw-r--r--arch/ppc/xmon/start_8xx.c2
92 files changed, 146 insertions, 18138 deletions
diff --git a/arch/ppc/8260_io/enet.c b/arch/ppc/8260_io/enet.c
index 06bb5b77ea62..25ef55bacd99 100644
--- a/arch/ppc/8260_io/enet.c
+++ b/arch/ppc/8260_io/enet.c
@@ -10,7 +10,7 @@
10 * This version of the driver is somewhat selectable for the different 10 * This version of the driver is somewhat selectable for the different
11 * processor/board combinations. It works for the boards I know about 11 * processor/board combinations. It works for the boards I know about
12 * now, and should be easily modified to include others. Some of the 12 * now, and should be easily modified to include others. Some of the
13 * configuration information is contained in <asm/commproc.h> and the 13 * configuration information is contained in <asm/cpm1.h> and the
14 * remainder is here. 14 * remainder is here.
15 * 15 *
16 * Buffer descriptors are kept in the CPM dual port RAM, and the frame 16 * Buffer descriptors are kept in the CPM dual port RAM, and the frame
diff --git a/arch/ppc/8xx_io/commproc.c b/arch/ppc/8xx_io/commproc.c
index 9da880be4dc0..9d656de0f0f1 100644
--- a/arch/ppc/8xx_io/commproc.c
+++ b/arch/ppc/8xx_io/commproc.c
@@ -34,7 +34,7 @@
34#include <asm/page.h> 34#include <asm/page.h>
35#include <asm/pgtable.h> 35#include <asm/pgtable.h>
36#include <asm/8xx_immap.h> 36#include <asm/8xx_immap.h>
37#include <asm/commproc.h> 37#include <asm/cpm1.h>
38#include <asm/io.h> 38#include <asm/io.h>
39#include <asm/tlbflush.h> 39#include <asm/tlbflush.h>
40#include <asm/rheap.h> 40#include <asm/rheap.h>
@@ -55,8 +55,6 @@
55}) 55})
56 56
57static void m8xx_cpm_dpinit(void); 57static void m8xx_cpm_dpinit(void);
58static uint host_buffer; /* One page of host buffer */
59static uint host_end; /* end + 1 */
60cpm8xx_t *cpmp; /* Pointer to comm processor space */ 58cpm8xx_t *cpmp; /* Pointer to comm processor space */
61 59
62/* CPM interrupt vector functions. 60/* CPM interrupt vector functions.
@@ -68,7 +66,6 @@ struct cpm_action {
68static struct cpm_action cpm_vecs[CPMVEC_NR]; 66static struct cpm_action cpm_vecs[CPMVEC_NR];
69static irqreturn_t cpm_interrupt(int irq, void * dev); 67static irqreturn_t cpm_interrupt(int irq, void * dev);
70static irqreturn_t cpm_error_interrupt(int irq, void *dev); 68static irqreturn_t cpm_error_interrupt(int irq, void *dev);
71static void alloc_host_memory(void);
72/* Define a table of names to identify CPM interrupt handlers in 69/* Define a table of names to identify CPM interrupt handlers in
73 * /proc/interrupts. 70 * /proc/interrupts.
74 */ 71 */
@@ -158,21 +155,6 @@ m8xx_cpm_reset(void)
158 cpmp = (cpm8xx_t *)commproc; 155 cpmp = (cpm8xx_t *)commproc;
159} 156}
160 157
161/* We used to do this earlier, but have to postpone as long as possible
162 * to ensure the kernel VM is now running.
163 */
164static void
165alloc_host_memory(void)
166{
167 dma_addr_t physaddr;
168
169 /* Set the host page for allocation.
170 */
171 host_buffer = (uint)dma_alloc_coherent(NULL, PAGE_SIZE, &physaddr,
172 GFP_KERNEL);
173 host_end = host_buffer + PAGE_SIZE;
174}
175
176/* This is called during init_IRQ. We used to do it above, but this 158/* This is called during init_IRQ. We used to do it above, but this
177 * was too early since init_IRQ was not yet called. 159 * was too early since init_IRQ was not yet called.
178 */ 160 */
@@ -319,26 +301,6 @@ cpm_free_handler(int cpm_vec)
319 cpm_vecs[cpm_vec].dev_id = NULL; 301 cpm_vecs[cpm_vec].dev_id = NULL;
320} 302}
321 303
322/* We also own one page of host buffer space for the allocation of
323 * UART "fifos" and the like.
324 */
325uint
326m8xx_cpm_hostalloc(uint size)
327{
328 uint retloc;
329
330 if (host_buffer == 0)
331 alloc_host_memory();
332
333 if ((host_buffer + size) >= host_end)
334 return(0);
335
336 retloc = host_buffer;
337 host_buffer += size;
338
339 return(retloc);
340}
341
342/* Set a baud rate generator. This needs lots of work. There are 304/* Set a baud rate generator. This needs lots of work. There are
343 * four BRGs, any of which can be wired to any channel. 305 * four BRGs, any of which can be wired to any channel.
344 * The internal baud rate clock is the system clock divided by 16. 306 * The internal baud rate clock is the system clock divided by 16.
diff --git a/arch/ppc/8xx_io/enet.c b/arch/ppc/8xx_io/enet.c
index eace3bc118d2..c6d047ae77ac 100644
--- a/arch/ppc/8xx_io/enet.c
+++ b/arch/ppc/8xx_io/enet.c
@@ -8,7 +8,7 @@
8 * This version of the driver is somewhat selectable for the different 8 * This version of the driver is somewhat selectable for the different
9 * processor/board combinations. It works for the boards I know about 9 * processor/board combinations. It works for the boards I know about
10 * now, and should be easily modified to include others. Some of the 10 * now, and should be easily modified to include others. Some of the
11 * configuration information is contained in <asm/commproc.h> and the 11 * configuration information is contained in <asm/cpm1.h> and the
12 * remainder is here. 12 * remainder is here.
13 * 13 *
14 * Buffer descriptors are kept in the CPM dual port RAM, and the frame 14 * Buffer descriptors are kept in the CPM dual port RAM, and the frame
@@ -43,7 +43,7 @@
43#include <asm/pgtable.h> 43#include <asm/pgtable.h>
44#include <asm/mpc8xx.h> 44#include <asm/mpc8xx.h>
45#include <asm/uaccess.h> 45#include <asm/uaccess.h>
46#include <asm/commproc.h> 46#include <asm/cpm1.h>
47#include <asm/cacheflush.h> 47#include <asm/cacheflush.h>
48 48
49/* 49/*
@@ -80,7 +80,7 @@
80 * programming documents for details unique to your board. 80 * programming documents for details unique to your board.
81 * 81 *
82 * For the TQM8xx(L) modules, there is no control register interface. 82 * For the TQM8xx(L) modules, there is no control register interface.
83 * All functions are directly controlled using I/O pins. See <asm/commproc.h>. 83 * All functions are directly controlled using I/O pins. See <asm/cpm1.h>.
84 */ 84 */
85 85
86/* The transmitter timeout 86/* The transmitter timeout
diff --git a/arch/ppc/8xx_io/fec.c b/arch/ppc/8xx_io/fec.c
index 0288279be9aa..11b0aa6ca97e 100644
--- a/arch/ppc/8xx_io/fec.c
+++ b/arch/ppc/8xx_io/fec.c
@@ -53,7 +53,7 @@
53#include <asm/mpc8xx.h> 53#include <asm/mpc8xx.h>
54#include <asm/irq.h> 54#include <asm/irq.h>
55#include <asm/uaccess.h> 55#include <asm/uaccess.h>
56#include <asm/commproc.h> 56#include <asm/cpm1.h>
57 57
58#ifdef CONFIG_USE_MDIO 58#ifdef CONFIG_USE_MDIO
59/* Forward declarations of some structures to support different PHYs 59/* Forward declarations of some structures to support different PHYs
diff --git a/arch/ppc/8xx_io/micropatch.c b/arch/ppc/8xx_io/micropatch.c
index cfad46ba17e3..9a5d95da7c28 100644
--- a/arch/ppc/8xx_io/micropatch.c
+++ b/arch/ppc/8xx_io/micropatch.c
@@ -16,7 +16,7 @@
16#include <asm/page.h> 16#include <asm/page.h>
17#include <asm/pgtable.h> 17#include <asm/pgtable.h>
18#include <asm/8xx_immap.h> 18#include <asm/8xx_immap.h>
19#include <asm/commproc.h> 19#include <asm/cpm1.h>
20 20
21/* 21/*
22 * I2C/SPI relocation patch arrays. 22 * I2C/SPI relocation patch arrays.
diff --git a/arch/ppc/Kconfig b/arch/ppc/Kconfig
index 6473fa7cb4b9..db5934cdafb3 100644
--- a/arch/ppc/Kconfig
+++ b/arch/ppc/Kconfig
@@ -78,18 +78,18 @@ choice
78 default 6xx 78 default 6xx
79 79
80config 6xx 80config 6xx
81 bool "6xx/7xx/74xx/52xx/82xx/83xx" 81 bool "6xx/7xx/74xx/52xx/82xx"
82 select PPC_FPU 82 select PPC_FPU
83 help 83 help
84 There are four types of PowerPC chips supported. The more common 84 There are four types of PowerPC chips supported. The more common
85 types (601, 603, 604, 740, 750, 7400), the older Freescale 85 types (601, 603, 604, 740, 750, 7400), the older Freescale
86 (formerly Motorola) embedded versions (821, 823, 850, 855, 860, 86 (formerly Motorola) embedded versions (821, 823, 850, 855, 860,
87 52xx, 82xx, 83xx), the IBM embedded versions (403 and 405) and 87 52xx, 82xx), the IBM embedded versions (403 and 405) and
88 the Book E embedded processors from IBM (44x) and Freescale (85xx). 88 the Book E embedded processors from IBM (44x) and Freescale (85xx).
89 For support for 64-bit processors, set ARCH=powerpc. 89 For support for 64-bit processors, set ARCH=powerpc.
90 Unless you are building a kernel for one of the embedded processor 90 Unless you are building a kernel for one of the embedded processor
91 systems, choose 6xx. 91 systems, choose 6xx.
92 Also note that because the 52xx, 82xx, & 83xx family have a 603e 92 Also note that because the 52xx, 82xx family have a 603e
93 core, specific support for that chipset is asked later on. 93 core, specific support for that chipset is asked later on.
94 94
95config 40x 95config 40x
@@ -104,12 +104,6 @@ config 8xx
104 bool "8xx" 104 bool "8xx"
105 select PPC_LIB_RHEAP 105 select PPC_LIB_RHEAP
106 106
107config E200
108 bool "e200"
109
110config E500
111 bool "e500"
112
113endchoice 107endchoice
114 108
115config PPC_FPU 109config PPC_FPU
@@ -124,25 +118,14 @@ config PPC_DCR
124 depends on PPC_DCR_NATIVE 118 depends on PPC_DCR_NATIVE
125 default y 119 default y
126 120
127config BOOKE
128 bool
129 depends on E200 || E500
130 default y
131
132config FSL_BOOKE
133 bool
134 depends on E200 || E500
135 default y
136
137config PTE_64BIT 121config PTE_64BIT
138 bool 122 bool
139 depends on 44x || E500 123 depends on 44x
140 default y if 44x 124 default y if 44x
141 default y if E500 && PHYS_64BIT
142 125
143config PHYS_64BIT 126config PHYS_64BIT
144 bool 'Large physical address support' if E500 127 bool
145 depends on 44x || E500 128 depends on 44x
146 default y if 44x 129 default y if 44x
147 ---help--- 130 ---help---
148 This option enables kernel support for larger than 32-bit physical 131 This option enables kernel support for larger than 32-bit physical
@@ -153,7 +136,7 @@ config PHYS_64BIT
153config ALTIVEC 136config ALTIVEC
154 bool "AltiVec Support" 137 bool "AltiVec Support"
155 depends on 6xx 138 depends on 6xx
156 depends on !8260 && !83xx 139 depends on !8260
157 ---help--- 140 ---help---
158 This option enables kernel support for the Altivec extensions to the 141 This option enables kernel support for the Altivec extensions to the
159 PowerPC processor. The kernel currently supports saving and restoring 142 PowerPC processor. The kernel currently supports saving and restoring
@@ -167,24 +150,9 @@ config ALTIVEC
167 150
168 If in doubt, say Y here. 151 If in doubt, say Y here.
169 152
170config SPE
171 bool "SPE Support"
172 depends on E200 || E500
173 ---help---
174 This option enables kernel support for the Signal Processing
175 Extensions (SPE) to the PowerPC processor. The kernel currently
176 supports saving and restoring SPE registers, and turning on the
177 'spe enable' bit so user processes can execute SPE instructions.
178
179 This option is only useful if you have a processor that supports
180 SPE (e500, otherwise known as 85xx series), but does not have any
181 effect on a non-spe cpu (it does, however add code to the kernel).
182
183 If in doubt, say Y here.
184
185config TAU 153config TAU
186 bool "Thermal Management Support" 154 bool "Thermal Management Support"
187 depends on 6xx && !8260 && !83xx 155 depends on 6xx && !8260
188 help 156 help
189 G3 and G4 processors have an on-chip temperature sensor called the 157 G3 and G4 processors have an on-chip temperature sensor called the
190 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die 158 'Thermal Assist Unit (TAU)', which, in theory, can measure the on-die
@@ -228,7 +196,7 @@ config TAU_AVERAGE
228 196
229config MATH_EMULATION 197config MATH_EMULATION
230 bool "Math emulation" 198 bool "Math emulation"
231 depends on 4xx || 8xx || E200 || E500 199 depends on 4xx || 8xx
232 ---help--- 200 ---help---
233 Some PowerPC chips designed for embedded applications do not have 201 Some PowerPC chips designed for embedded applications do not have
234 a floating-point unit and therefore do not implement the 202 a floating-point unit and therefore do not implement the
@@ -279,7 +247,6 @@ config PPC601_SYNC_FIX
279 If in doubt, say Y here. 247 If in doubt, say Y here.
280 248
281source arch/ppc/platforms/4xx/Kconfig 249source arch/ppc/platforms/4xx/Kconfig
282source arch/ppc/platforms/85xx/Kconfig
283 250
284config PPC_STD_MMU 251config PPC_STD_MMU
285 bool 252 bool
@@ -288,7 +255,7 @@ config PPC_STD_MMU
288 255
289config NOT_COHERENT_CACHE 256config NOT_COHERENT_CACHE
290 bool 257 bool
291 depends on 4xx || 8xx || E200 258 depends on 4xx || 8xx
292 default y 259 default y
293 260
294endmenu 261endmenu
@@ -721,16 +688,6 @@ config LITE5200B
721 Support for the LITE5200B dev board for the MPC5200 from Freescale. 688 Support for the LITE5200B dev board for the MPC5200 from Freescale.
722 This is the new board with 2 PCI slots. 689 This is the new board with 2 PCI slots.
723 690
724config MPC834x_SYS
725 bool "Freescale MPC834x SYS"
726 help
727 This option enables support for the MPC 834x SYS evaluation board.
728
729 Be aware that PCI buses can only function when SYS board is plugged
730 into the PIB (Platform IO Board) board from Freescale which provide
731 3 PCI slots. The PIBs PCI initialization is the bootloader's
732 responsibility.
733
734config EV64360 691config EV64360
735 bool "Marvell-EV64360BP" 692 bool "Marvell-EV64360BP"
736 help 693 help
@@ -774,18 +731,6 @@ config 8272
774 The MPC8272 CPM has a different internal dpram setup than other CPM2 731 The MPC8272 CPM has a different internal dpram setup than other CPM2
775 devices 732 devices
776 733
777config 83xx
778 bool
779 default y if MPC834x_SYS
780
781config MPC834x
782 bool
783 default y if MPC834x_SYS
784
785config PPC_83xx
786 bool
787 default y if 83xx
788
789config CPM1 734config CPM1
790 bool 735 bool
791 depends on 8xx 736 depends on 8xx
@@ -811,8 +756,7 @@ config PPC_GEN550
811 bool 756 bool
812 depends on SANDPOINT || SPRUCE || PPLUS || \ 757 depends on SANDPOINT || SPRUCE || PPLUS || \
813 PRPMC750 || PRPMC800 || LOPEC || \ 758 PRPMC750 || PRPMC800 || LOPEC || \
814 (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D || \ 759 (EV64260 && !SERIAL_MPSC) || CHESTNUT || RADSTONE_PPC7D
815 83xx
816 default y 760 default y
817 761
818config FORCE 762config FORCE
@@ -1068,13 +1012,13 @@ config GENERIC_ISA_DMA
1068 1012
1069config PPC_I8259 1013config PPC_I8259
1070 bool 1014 bool
1071 default y if 85xx || PPC_PREP 1015 default y if PPC_PREP
1072 default n 1016 default n
1073 1017
1074config PPC_INDIRECT_PCI 1018config PPC_INDIRECT_PCI
1075 bool 1019 bool
1076 depends on PCI 1020 depends on PCI
1077 default y if 40x || 44x || 85xx || 83xx || PPC_PREP 1021 default y if 40x || 44x || PPC_PREP
1078 default n 1022 default n
1079 1023
1080config EISA 1024config EISA
@@ -1091,8 +1035,8 @@ config MCA
1091 bool 1035 bool
1092 1036
1093config PCI 1037config PCI
1094 bool "PCI support" if 40x || CPM2 || 83xx || 85xx || PPC_MPC52xx 1038 bool "PCI support" if 40x || CPM2 || PPC_MPC52xx
1095 default y if !40x && !CPM2 && !8xx && !83xx && !85xx 1039 default y if !40x && !CPM2 && !8xx
1096 default PCI_QSPAN if !4xx && !CPM2 && 8xx 1040 default PCI_QSPAN if !4xx && !CPM2 && 8xx
1097 help 1041 help
1098 Find out whether your system includes a PCI bus. PCI is the name of 1042 Find out whether your system includes a PCI bus. PCI is the name of
@@ -1106,11 +1050,6 @@ config PCI_DOMAINS
1106config PCI_SYSCALL 1050config PCI_SYSCALL
1107 def_bool PCI 1051 def_bool PCI
1108 1052
1109config MPC83xx_PCI2
1110 bool "Support for 2nd PCI host controller"
1111 depends on PCI && MPC834x
1112 default y if MPC834x_SYS
1113
1114config PCI_QSPAN 1053config PCI_QSPAN
1115 bool "QSpan PCI" 1054 bool "QSpan PCI"
1116 depends on !4xx && !CPM2 && 8xx 1055 depends on !4xx && !CPM2 && 8xx
diff --git a/arch/ppc/Makefile b/arch/ppc/Makefile
index 95894ef7beaa..8df7f0e4c3a6 100644
--- a/arch/ppc/Makefile
+++ b/arch/ppc/Makefile
@@ -36,14 +36,8 @@ LINUXINCLUDE += -Iarch/$(ARCH)/include
36 36
37CHECKFLAGS += -D__powerpc__ 37CHECKFLAGS += -D__powerpc__
38 38
39ifndef CONFIG_FSL_BOOKE
40KBUILD_CFLAGS += -mstring
41endif
42
43cpu-as-$(CONFIG_4xx) += -Wa,-m405 39cpu-as-$(CONFIG_4xx) += -Wa,-m405
44cpu-as-$(CONFIG_6xx) += -Wa,-maltivec 40cpu-as-$(CONFIG_6xx) += -Wa,-maltivec
45cpu-as-$(CONFIG_E500) += -Wa,-me500
46cpu-as-$(CONFIG_E200) += -Wa,-me200
47 41
48KBUILD_AFLAGS += $(cpu-as-y) 42KBUILD_AFLAGS += $(cpu-as-y)
49KBUILD_CFLAGS += $(cpu-as-y) 43KBUILD_CFLAGS += $(cpu-as-y)
@@ -55,7 +49,6 @@ head-y := arch/ppc/kernel/head.o
55head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o 49head-$(CONFIG_8xx) := arch/ppc/kernel/head_8xx.o
56head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o 50head-$(CONFIG_4xx) := arch/ppc/kernel/head_4xx.o
57head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o 51head-$(CONFIG_44x) := arch/ppc/kernel/head_44x.o
58head-$(CONFIG_FSL_BOOKE) := arch/ppc/kernel/head_fsl_booke.o
59 52
60head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o 53head-$(CONFIG_PPC_FPU) += arch/powerpc/kernel/fpu.o
61 54
@@ -65,8 +58,6 @@ core-y += arch/ppc/kernel/ arch/powerpc/kernel/ \
65 arch/ppc/syslib/ arch/powerpc/sysdev/ \ 58 arch/ppc/syslib/ arch/powerpc/sysdev/ \
66 arch/powerpc/lib/ 59 arch/powerpc/lib/
67core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/ 60core-$(CONFIG_4xx) += arch/ppc/platforms/4xx/
68core-$(CONFIG_83xx) += arch/ppc/platforms/83xx/
69core-$(CONFIG_85xx) += arch/ppc/platforms/85xx/
70core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/ 61core-$(CONFIG_MATH_EMULATION) += arch/powerpc/math-emu/
71core-$(CONFIG_XMON) += arch/ppc/xmon/ 62core-$(CONFIG_XMON) += arch/ppc/xmon/
72drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/ 63drivers-$(CONFIG_8xx) += arch/ppc/8xx_io/
diff --git a/arch/ppc/boot/simple/iic.c b/arch/ppc/boot/simple/iic.c
index e4efd838bfaa..5e91489426b4 100644
--- a/arch/ppc/boot/simple/iic.c
+++ b/arch/ppc/boot/simple/iic.c
@@ -5,7 +5,7 @@
5#include <linux/types.h> 5#include <linux/types.h>
6#include <asm/uaccess.h> 6#include <asm/uaccess.h>
7#include <asm/mpc8xx.h> 7#include <asm/mpc8xx.h>
8#include <asm/commproc.h> 8#include <asm/cpm1.h>
9 9
10 10
11/* IIC functions. 11/* IIC functions.
diff --git a/arch/ppc/boot/simple/m8xx_tty.c b/arch/ppc/boot/simple/m8xx_tty.c
index ea615d8ca541..f28924e6aeb4 100644
--- a/arch/ppc/boot/simple/m8xx_tty.c
+++ b/arch/ppc/boot/simple/m8xx_tty.c
@@ -11,7 +11,7 @@
11#include <linux/types.h> 11#include <linux/types.h>
12#include <asm/uaccess.h> 12#include <asm/uaccess.h>
13#include <asm/mpc8xx.h> 13#include <asm/mpc8xx.h>
14#include <asm/commproc.h> 14#include <asm/cpm1.h>
15 15
16#ifdef CONFIG_MBX 16#ifdef CONFIG_MBX
17#define MBX_CSR1 ((volatile u_char *)0xfa100000) 17#define MBX_CSR1 ((volatile u_char *)0xfa100000)
diff --git a/arch/ppc/configs/TQM8540_defconfig b/arch/ppc/configs/TQM8540_defconfig
deleted file mode 100644
index f33f0e772dcb..000000000000
--- a/arch/ppc/configs/TQM8540_defconfig
+++ /dev/null
@@ -1,973 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2
4# Fri Nov 25 17:26:50 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SWAP=y
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33CONFIG_SYSCTL=y
34# CONFIG_AUDIT is not set
35# CONFIG_HOTPLUG is not set
36CONFIG_KOBJECT_UEVENT=y
37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_EMBEDDED=y
40# CONFIG_KALLSYMS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45# CONFIG_EPOLL is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58# CONFIG_MODULES is not set
59
60#
61# Block layer
62#
63# CONFIG_LBD is not set
64
65#
66# IO Schedulers
67#
68CONFIG_IOSCHED_NOOP=y
69CONFIG_IOSCHED_AS=y
70CONFIG_IOSCHED_DEADLINE=y
71CONFIG_IOSCHED_CFQ=y
72CONFIG_DEFAULT_AS=y
73# CONFIG_DEFAULT_DEADLINE is not set
74# CONFIG_DEFAULT_CFQ is not set
75# CONFIG_DEFAULT_NOOP is not set
76CONFIG_DEFAULT_IOSCHED="anticipatory"
77
78#
79# Processor
80#
81# CONFIG_6xx is not set
82# CONFIG_40x is not set
83# CONFIG_44x is not set
84# CONFIG_POWER3 is not set
85# CONFIG_POWER4 is not set
86# CONFIG_8xx is not set
87# CONFIG_E200 is not set
88CONFIG_E500=y
89CONFIG_BOOKE=y
90CONFIG_FSL_BOOKE=y
91# CONFIG_PHYS_64BIT is not set
92CONFIG_SPE=y
93CONFIG_MATH_EMULATION=y
94# CONFIG_KEXEC is not set
95# CONFIG_CPU_FREQ is not set
96# CONFIG_WANT_EARLY_SERIAL is not set
97CONFIG_PPC_GEN550=y
98CONFIG_85xx=y
99CONFIG_PPC_INDIRECT_PCI_BE=y
100
101#
102# Freescale 85xx options
103#
104# CONFIG_MPC8540_ADS is not set
105# CONFIG_MPC8548_CDS is not set
106# CONFIG_MPC8555_CDS is not set
107# CONFIG_MPC8560_ADS is not set
108# CONFIG_SBC8560 is not set
109# CONFIG_STX_GP3 is not set
110CONFIG_TQM8540=y
111# CONFIG_TQM8541 is not set
112# CONFIG_TQM8555 is not set
113# CONFIG_TQM8560 is not set
114CONFIG_MPC8540=y
115
116#
117# Platform options
118#
119# CONFIG_HIGHMEM is not set
120# CONFIG_HZ_100 is not set
121CONFIG_HZ_250=y
122# CONFIG_HZ_1000 is not set
123CONFIG_HZ=250
124CONFIG_PREEMPT_NONE=y
125# CONFIG_PREEMPT_VOLUNTARY is not set
126# CONFIG_PREEMPT is not set
127CONFIG_SELECT_MEMORY_MODEL=y
128CONFIG_FLATMEM_MANUAL=y
129# CONFIG_DISCONTIGMEM_MANUAL is not set
130# CONFIG_SPARSEMEM_MANUAL is not set
131CONFIG_FLATMEM=y
132CONFIG_FLAT_NODE_MEM_MAP=y
133# CONFIG_SPARSEMEM_STATIC is not set
134CONFIG_SPLIT_PTLOCK_CPUS=4
135CONFIG_BINFMT_ELF=y
136# CONFIG_BINFMT_MISC is not set
137# CONFIG_CMDLINE_BOOL is not set
138# CONFIG_PM is not set
139# CONFIG_HIBERNATION is not set
140CONFIG_SECCOMP=y
141CONFIG_ISA_DMA_API=y
142
143#
144# Bus options
145#
146CONFIG_PPC_I8259=y
147CONFIG_PPC_INDIRECT_PCI=y
148CONFIG_PCI=y
149CONFIG_PCI_DOMAINS=y
150# CONFIG_PCI_LEGACY_PROC is not set
151
152#
153# PCCARD (PCMCIA/CardBus) support
154#
155# CONFIG_PCCARD is not set
156# CONFIG_RAPIDIO is not set
157
158#
159# Advanced setup
160#
161# CONFIG_ADVANCED_OPTIONS is not set
162
163#
164# Default settings for advanced configuration options are used
165#
166CONFIG_HIGHMEM_START=0xfe000000
167CONFIG_LOWMEM_SIZE=0x30000000
168CONFIG_KERNEL_START=0xc0000000
169CONFIG_TASK_SIZE=0x80000000
170CONFIG_BOOT_LOAD=0x00800000
171
172#
173# Networking
174#
175CONFIG_NET=y
176
177#
178# Networking options
179#
180CONFIG_PACKET=y
181# CONFIG_PACKET_MMAP is not set
182CONFIG_UNIX=y
183# CONFIG_NET_KEY is not set
184CONFIG_INET=y
185CONFIG_IP_MULTICAST=y
186# CONFIG_IP_ADVANCED_ROUTER is not set
187CONFIG_IP_FIB_HASH=y
188CONFIG_IP_PNP=y
189CONFIG_IP_PNP_DHCP=y
190CONFIG_IP_PNP_BOOTP=y
191# CONFIG_IP_PNP_RARP is not set
192# CONFIG_NET_IPIP is not set
193# CONFIG_NET_IPGRE is not set
194# CONFIG_IP_MROUTE is not set
195# CONFIG_ARPD is not set
196CONFIG_SYN_COOKIES=y
197# CONFIG_INET_AH is not set
198# CONFIG_INET_ESP is not set
199# CONFIG_INET_IPCOMP is not set
200# CONFIG_INET_TUNNEL is not set
201CONFIG_INET_DIAG=y
202CONFIG_INET_TCP_DIAG=y
203# CONFIG_TCP_CONG_ADVANCED is not set
204CONFIG_TCP_CONG_BIC=y
205# CONFIG_IPV6 is not set
206# CONFIG_NETFILTER is not set
207
208#
209# DCCP Configuration (EXPERIMENTAL)
210#
211# CONFIG_IP_DCCP is not set
212
213#
214# SCTP Configuration (EXPERIMENTAL)
215#
216# CONFIG_IP_SCTP is not set
217# CONFIG_ATM is not set
218# CONFIG_BRIDGE is not set
219# CONFIG_VLAN_8021Q is not set
220# CONFIG_DECNET is not set
221# CONFIG_LLC2 is not set
222# CONFIG_IPX is not set
223# CONFIG_ATALK is not set
224# CONFIG_X25 is not set
225# CONFIG_LAPB is not set
226# CONFIG_NET_DIVERT is not set
227# CONFIG_ECONET is not set
228# CONFIG_WAN_ROUTER is not set
229
230#
231# QoS and/or fair queueing
232#
233# CONFIG_NET_SCHED is not set
234
235#
236# Network testing
237#
238# CONFIG_NET_PKTGEN is not set
239# CONFIG_HAMRADIO is not set
240# CONFIG_IRDA is not set
241# CONFIG_BT is not set
242# CONFIG_IEEE80211 is not set
243
244#
245# Device Drivers
246#
247
248#
249# Generic Driver Options
250#
251CONFIG_STANDALONE=y
252CONFIG_PREVENT_FIRMWARE_BUILD=y
253# CONFIG_FW_LOADER is not set
254
255#
256# Connector - unified userspace <-> kernelspace linker
257#
258# CONFIG_CONNECTOR is not set
259
260#
261# Memory Technology Devices (MTD)
262#
263CONFIG_MTD=y
264# CONFIG_MTD_DEBUG is not set
265CONFIG_MTD_CONCAT=y
266CONFIG_MTD_PARTITIONS=y
267# CONFIG_MTD_REDBOOT_PARTS is not set
268CONFIG_MTD_CMDLINE_PARTS=y
269
270#
271# User Modules And Translation Layers
272#
273CONFIG_MTD_CHAR=y
274CONFIG_MTD_BLOCK=y
275# CONFIG_FTL is not set
276# CONFIG_NFTL is not set
277# CONFIG_INFTL is not set
278# CONFIG_RFD_FTL is not set
279
280#
281# RAM/ROM/Flash chip drivers
282#
283CONFIG_MTD_CFI=y
284# CONFIG_MTD_JEDECPROBE is not set
285CONFIG_MTD_GEN_PROBE=y
286# CONFIG_MTD_CFI_ADV_OPTIONS is not set
287CONFIG_MTD_MAP_BANK_WIDTH_1=y
288CONFIG_MTD_MAP_BANK_WIDTH_2=y
289CONFIG_MTD_MAP_BANK_WIDTH_4=y
290# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
291# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
292# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
293CONFIG_MTD_CFI_I1=y
294CONFIG_MTD_CFI_I2=y
295# CONFIG_MTD_CFI_I4 is not set
296# CONFIG_MTD_CFI_I8 is not set
297# CONFIG_MTD_CFI_INTELEXT is not set
298CONFIG_MTD_CFI_AMDSTD=y
299CONFIG_MTD_CFI_AMDSTD_RETRY=0
300# CONFIG_MTD_CFI_STAA is not set
301CONFIG_MTD_CFI_UTIL=y
302# CONFIG_MTD_RAM is not set
303# CONFIG_MTD_ROM is not set
304# CONFIG_MTD_ABSENT is not set
305
306#
307# Mapping drivers for chip access
308#
309# CONFIG_MTD_COMPLEX_MAPPINGS is not set
310# CONFIG_MTD_PHYSMAP is not set
311CONFIG_MTD_TQM85xx=y
312# CONFIG_MTD_PLATRAM is not set
313
314#
315# Self-contained MTD device drivers
316#
317# CONFIG_MTD_PMC551 is not set
318# CONFIG_MTD_SLRAM is not set
319# CONFIG_MTD_PHRAM is not set
320# CONFIG_MTD_MTDRAM is not set
321# CONFIG_MTD_BLKMTD is not set
322# CONFIG_MTD_BLOCK2MTD is not set
323
324#
325# Disk-On-Chip Device Drivers
326#
327# CONFIG_MTD_DOC2000 is not set
328# CONFIG_MTD_DOC2001 is not set
329# CONFIG_MTD_DOC2001PLUS is not set
330
331#
332# NAND Flash Device Drivers
333#
334# CONFIG_MTD_NAND is not set
335
336#
337# OneNAND Flash Device Drivers
338#
339# CONFIG_MTD_ONENAND is not set
340
341#
342# Parallel port support
343#
344# CONFIG_PARPORT is not set
345
346#
347# Plug and Play support
348#
349
350#
351# Block devices
352#
353# CONFIG_BLK_DEV_FD is not set
354# CONFIG_BLK_CPQ_DA is not set
355# CONFIG_BLK_CPQ_CISS_DA is not set
356# CONFIG_BLK_DEV_DAC960 is not set
357# CONFIG_BLK_DEV_UMEM is not set
358# CONFIG_BLK_DEV_COW_COMMON is not set
359CONFIG_BLK_DEV_LOOP=y
360# CONFIG_BLK_DEV_CRYPTOLOOP is not set
361# CONFIG_BLK_DEV_NBD is not set
362# CONFIG_BLK_DEV_SX8 is not set
363CONFIG_BLK_DEV_RAM=y
364CONFIG_BLK_DEV_RAM_COUNT=16
365CONFIG_BLK_DEV_RAM_SIZE=32768
366CONFIG_BLK_DEV_INITRD=y
367# CONFIG_CDROM_PKTCDVD is not set
368# CONFIG_ATA_OVER_ETH is not set
369
370#
371# ATA/ATAPI/MFM/RLL support
372#
373CONFIG_IDE=y
374CONFIG_BLK_DEV_IDE=y
375
376#
377# Please see Documentation/ide.txt for help/info on IDE drives
378#
379# CONFIG_BLK_DEV_IDE_SATA is not set
380CONFIG_BLK_DEV_IDEDISK=y
381# CONFIG_IDEDISK_MULTI_MODE is not set
382# CONFIG_BLK_DEV_IDECD is not set
383# CONFIG_BLK_DEV_IDETAPE is not set
384# CONFIG_BLK_DEV_IDEFLOPPY is not set
385# CONFIG_IDE_TASK_IOCTL is not set
386
387#
388# IDE chipset support/bugfixes
389#
390CONFIG_IDE_GENERIC=y
391CONFIG_BLK_DEV_IDEPCI=y
392CONFIG_IDEPCI_SHARE_IRQ=y
393# CONFIG_BLK_DEV_OFFBOARD is not set
394CONFIG_BLK_DEV_GENERIC=y
395# CONFIG_BLK_DEV_OPTI621 is not set
396# CONFIG_BLK_DEV_SL82C105 is not set
397CONFIG_BLK_DEV_IDEDMA_PCI=y
398# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
399CONFIG_IDEDMA_PCI_AUTO=y
400# CONFIG_IDEDMA_ONLYDISK is not set
401# CONFIG_BLK_DEV_AEC62XX is not set
402# CONFIG_BLK_DEV_ALI15X3 is not set
403# CONFIG_BLK_DEV_AMD74XX is not set
404# CONFIG_BLK_DEV_CMD64X is not set
405# CONFIG_BLK_DEV_TRIFLEX is not set
406# CONFIG_BLK_DEV_CY82C693 is not set
407# CONFIG_BLK_DEV_CS5520 is not set
408# CONFIG_BLK_DEV_CS5530 is not set
409# CONFIG_BLK_DEV_HPT34X is not set
410# CONFIG_BLK_DEV_HPT366 is not set
411# CONFIG_BLK_DEV_SC1200 is not set
412# CONFIG_BLK_DEV_PIIX is not set
413# CONFIG_BLK_DEV_IT821X is not set
414# CONFIG_BLK_DEV_NS87415 is not set
415# CONFIG_BLK_DEV_PDC202XX_OLD is not set
416# CONFIG_BLK_DEV_PDC202XX_NEW is not set
417# CONFIG_BLK_DEV_SVWKS is not set
418# CONFIG_BLK_DEV_SIIMAGE is not set
419# CONFIG_BLK_DEV_SLC90E66 is not set
420# CONFIG_BLK_DEV_TRM290 is not set
421CONFIG_BLK_DEV_VIA82CXXX=y
422# CONFIG_IDE_ARM is not set
423CONFIG_BLK_DEV_IDEDMA=y
424# CONFIG_IDEDMA_IVB is not set
425CONFIG_IDEDMA_AUTO=y
426# CONFIG_BLK_DEV_HD is not set
427
428#
429# SCSI device support
430#
431# CONFIG_RAID_ATTRS is not set
432# CONFIG_SCSI is not set
433
434#
435# Multi-device support (RAID and LVM)
436#
437# CONFIG_MD is not set
438
439#
440# Fusion MPT device support
441#
442# CONFIG_FUSION is not set
443
444#
445# IEEE 1394 (FireWire) support
446#
447# CONFIG_IEEE1394 is not set
448
449#
450# I2O device support
451#
452# CONFIG_I2O is not set
453
454#
455# Macintosh device drivers
456#
457# CONFIG_WINDFARM is not set
458
459#
460# Network device support
461#
462CONFIG_NETDEVICES=y
463# CONFIG_DUMMY is not set
464# CONFIG_BONDING is not set
465# CONFIG_EQUALIZER is not set
466# CONFIG_TUN is not set
467
468#
469# ARCnet devices
470#
471# CONFIG_ARCNET is not set
472
473#
474# PHY device support
475#
476CONFIG_PHYLIB=y
477
478#
479# MII PHY device drivers
480#
481# CONFIG_MARVELL_PHY is not set
482# CONFIG_DAVICOM_PHY is not set
483# CONFIG_QSEMI_PHY is not set
484# CONFIG_LXT_PHY is not set
485# CONFIG_CICADA_PHY is not set
486
487#
488# Ethernet (10 or 100Mbit)
489#
490CONFIG_NET_ETHERNET=y
491CONFIG_MII=y
492# CONFIG_HAPPYMEAL is not set
493# CONFIG_SUNGEM is not set
494# CONFIG_CASSINI is not set
495# CONFIG_NET_VENDOR_3COM is not set
496
497#
498# Tulip family network device support
499#
500# CONFIG_NET_TULIP is not set
501# CONFIG_HP100 is not set
502CONFIG_NET_PCI=y
503# CONFIG_PCNET32 is not set
504# CONFIG_AMD8111_ETH is not set
505# CONFIG_ADAPTEC_STARFIRE is not set
506# CONFIG_B44 is not set
507# CONFIG_FORCEDETH is not set
508# CONFIG_DGRS is not set
509# CONFIG_EEPRO100 is not set
510CONFIG_E100=y
511# CONFIG_FEALNX is not set
512# CONFIG_NATSEMI is not set
513# CONFIG_NE2K_PCI is not set
514# CONFIG_8139CP is not set
515# CONFIG_8139TOO is not set
516# CONFIG_SIS900 is not set
517# CONFIG_EPIC100 is not set
518# CONFIG_SUNDANCE is not set
519# CONFIG_TLAN is not set
520# CONFIG_VIA_RHINE is not set
521
522#
523# Ethernet (1000 Mbit)
524#
525# CONFIG_ACENIC is not set
526# CONFIG_DL2K is not set
527# CONFIG_E1000 is not set
528# CONFIG_NS83820 is not set
529# CONFIG_HAMACHI is not set
530# CONFIG_YELLOWFIN is not set
531# CONFIG_R8169 is not set
532# CONFIG_SIS190 is not set
533# CONFIG_SKGE is not set
534# CONFIG_SK98LIN is not set
535# CONFIG_VIA_VELOCITY is not set
536# CONFIG_TIGON3 is not set
537# CONFIG_BNX2 is not set
538CONFIG_GIANFAR=y
539CONFIG_GFAR_NAPI=y
540
541#
542# Ethernet (10000 Mbit)
543#
544# CONFIG_CHELSIO_T1 is not set
545# CONFIG_IXGB is not set
546# CONFIG_S2IO is not set
547
548#
549# Token Ring devices
550#
551# CONFIG_TR is not set
552
553#
554# Wireless LAN (non-hamradio)
555#
556# CONFIG_NET_RADIO is not set
557
558#
559# Wan interfaces
560#
561# CONFIG_WAN is not set
562# CONFIG_FDDI is not set
563# CONFIG_HIPPI is not set
564# CONFIG_PPP is not set
565# CONFIG_SLIP is not set
566# CONFIG_SHAPER is not set
567# CONFIG_NETCONSOLE is not set
568# CONFIG_NETPOLL is not set
569# CONFIG_NET_POLL_CONTROLLER is not set
570
571#
572# ISDN subsystem
573#
574# CONFIG_ISDN is not set
575
576#
577# Telephony Support
578#
579# CONFIG_PHONE is not set
580
581#
582# Input device support
583#
584CONFIG_INPUT=y
585
586#
587# Userland interfaces
588#
589# CONFIG_INPUT_MOUSEDEV is not set
590# CONFIG_INPUT_JOYDEV is not set
591# CONFIG_INPUT_TSDEV is not set
592# CONFIG_INPUT_EVDEV is not set
593# CONFIG_INPUT_EVBUG is not set
594
595#
596# Input Device Drivers
597#
598# CONFIG_INPUT_KEYBOARD is not set
599# CONFIG_INPUT_MOUSE is not set
600# CONFIG_INPUT_JOYSTICK is not set
601# CONFIG_INPUT_TOUCHSCREEN is not set
602# CONFIG_INPUT_MISC is not set
603
604#
605# Hardware I/O ports
606#
607# CONFIG_SERIO is not set
608# CONFIG_GAMEPORT is not set
609
610#
611# Character devices
612#
613# CONFIG_VT is not set
614# CONFIG_SERIAL_NONSTANDARD is not set
615
616#
617# Serial drivers
618#
619CONFIG_SERIAL_8250=y
620CONFIG_SERIAL_8250_CONSOLE=y
621CONFIG_SERIAL_8250_NR_UARTS=4
622# CONFIG_SERIAL_8250_EXTENDED is not set
623
624#
625# Non-8250 serial port support
626#
627CONFIG_SERIAL_CORE=y
628CONFIG_SERIAL_CORE_CONSOLE=y
629# CONFIG_SERIAL_JSM is not set
630CONFIG_UNIX98_PTYS=y
631CONFIG_LEGACY_PTYS=y
632CONFIG_LEGACY_PTY_COUNT=256
633
634#
635# IPMI
636#
637# CONFIG_IPMI_HANDLER is not set
638
639#
640# Watchdog Cards
641#
642# CONFIG_WATCHDOG is not set
643# CONFIG_NVRAM is not set
644CONFIG_GEN_RTC=y
645# CONFIG_GEN_RTC_X is not set
646# CONFIG_DTLK is not set
647# CONFIG_R3964 is not set
648# CONFIG_APPLICOM is not set
649
650#
651# Ftape, the floppy tape device driver
652#
653# CONFIG_AGP is not set
654# CONFIG_DRM is not set
655# CONFIG_RAW_DRIVER is not set
656
657#
658# TPM devices
659#
660# CONFIG_TCG_TPM is not set
661# CONFIG_TELCLOCK is not set
662
663#
664# I2C support
665#
666CONFIG_I2C=y
667CONFIG_I2C_CHARDEV=y
668
669#
670# I2C Algorithms
671#
672# CONFIG_I2C_ALGOBIT is not set
673# CONFIG_I2C_ALGOPCF is not set
674# CONFIG_I2C_ALGOPCA is not set
675
676#
677# I2C Hardware Bus support
678#
679# CONFIG_I2C_ALI1535 is not set
680# CONFIG_I2C_ALI1563 is not set
681# CONFIG_I2C_ALI15X3 is not set
682# CONFIG_I2C_AMD756 is not set
683# CONFIG_I2C_AMD8111 is not set
684# CONFIG_I2C_I801 is not set
685# CONFIG_I2C_I810 is not set
686# CONFIG_I2C_PIIX4 is not set
687CONFIG_I2C_MPC=y
688# CONFIG_I2C_NFORCE2 is not set
689# CONFIG_I2C_PARPORT_LIGHT is not set
690# CONFIG_I2C_PROSAVAGE is not set
691# CONFIG_I2C_SAVAGE4 is not set
692# CONFIG_SCx200_ACB is not set
693# CONFIG_I2C_SIS5595 is not set
694# CONFIG_I2C_SIS630 is not set
695# CONFIG_I2C_SIS96X is not set
696# CONFIG_I2C_VIA is not set
697# CONFIG_I2C_VIAPRO is not set
698# CONFIG_I2C_VOODOO3 is not set
699# CONFIG_I2C_PCA_ISA is not set
700
701#
702# Miscellaneous I2C Chip support
703#
704CONFIG_SENSORS_DS1337=y
705# CONFIG_SENSORS_DS1374 is not set
706# CONFIG_SENSORS_EEPROM is not set
707# CONFIG_SENSORS_PCF8574 is not set
708# CONFIG_SENSORS_PCA9539 is not set
709# CONFIG_SENSORS_PCF8591 is not set
710# CONFIG_SENSORS_RTC8564 is not set
711# CONFIG_SENSORS_M41T00 is not set
712# CONFIG_SENSORS_MAX6875 is not set
713# CONFIG_RTC_X1205_I2C is not set
714# CONFIG_I2C_DEBUG_CORE is not set
715# CONFIG_I2C_DEBUG_ALGO is not set
716# CONFIG_I2C_DEBUG_BUS is not set
717# CONFIG_I2C_DEBUG_CHIP is not set
718
719#
720# Dallas's 1-wire bus
721#
722# CONFIG_W1 is not set
723
724#
725# Hardware Monitoring support
726#
727CONFIG_HWMON=y
728# CONFIG_HWMON_VID is not set
729# CONFIG_SENSORS_ADM1021 is not set
730# CONFIG_SENSORS_ADM1025 is not set
731# CONFIG_SENSORS_ADM1026 is not set
732# CONFIG_SENSORS_ADM1031 is not set
733# CONFIG_SENSORS_ADM9240 is not set
734# CONFIG_SENSORS_ASB100 is not set
735# CONFIG_SENSORS_ATXP1 is not set
736# CONFIG_SENSORS_DS1621 is not set
737# CONFIG_SENSORS_FSCHER is not set
738# CONFIG_SENSORS_FSCPOS is not set
739# CONFIG_SENSORS_GL518SM is not set
740# CONFIG_SENSORS_GL520SM is not set
741# CONFIG_SENSORS_IT87 is not set
742# CONFIG_SENSORS_LM63 is not set
743CONFIG_SENSORS_LM75=y
744# CONFIG_SENSORS_LM77 is not set
745# CONFIG_SENSORS_LM78 is not set
746# CONFIG_SENSORS_LM80 is not set
747# CONFIG_SENSORS_LM83 is not set
748# CONFIG_SENSORS_LM85 is not set
749# CONFIG_SENSORS_LM87 is not set
750# CONFIG_SENSORS_LM90 is not set
751# CONFIG_SENSORS_LM92 is not set
752# CONFIG_SENSORS_MAX1619 is not set
753# CONFIG_SENSORS_PC87360 is not set
754# CONFIG_SENSORS_SIS5595 is not set
755# CONFIG_SENSORS_SMSC47M1 is not set
756# CONFIG_SENSORS_SMSC47B397 is not set
757# CONFIG_SENSORS_VIA686A is not set
758# CONFIG_SENSORS_W83781D is not set
759# CONFIG_SENSORS_W83792D is not set
760# CONFIG_SENSORS_W83L785TS is not set
761# CONFIG_SENSORS_W83627HF is not set
762# CONFIG_SENSORS_W83627EHF is not set
763CONFIG_HWMON_DEBUG_CHIP=y
764
765#
766# Misc devices
767#
768
769#
770# Multimedia Capabilities Port drivers
771#
772
773#
774# Multimedia devices
775#
776# CONFIG_VIDEO_DEV is not set
777
778#
779# Digital Video Broadcasting Devices
780#
781# CONFIG_DVB is not set
782
783#
784# Graphics support
785#
786# CONFIG_FB is not set
787
788#
789# Sound
790#
791# CONFIG_SOUND is not set
792
793#
794# USB support
795#
796CONFIG_USB_ARCH_HAS_HCD=y
797CONFIG_USB_ARCH_HAS_OHCI=y
798# CONFIG_USB is not set
799
800#
801# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
802#
803
804#
805# USB Gadget Support
806#
807# CONFIG_USB_GADGET is not set
808
809#
810# MMC/SD Card support
811#
812# CONFIG_MMC is not set
813
814#
815# InfiniBand support
816#
817# CONFIG_INFINIBAND is not set
818
819#
820# SN Devices
821#
822
823#
824# File systems
825#
826CONFIG_EXT2_FS=y
827# CONFIG_EXT2_FS_XATTR is not set
828# CONFIG_EXT2_FS_XIP is not set
829CONFIG_EXT3_FS=y
830CONFIG_EXT3_FS_XATTR=y
831# CONFIG_EXT3_FS_POSIX_ACL is not set
832# CONFIG_EXT3_FS_SECURITY is not set
833CONFIG_JBD=y
834# CONFIG_JBD_DEBUG is not set
835CONFIG_FS_MBCACHE=y
836# CONFIG_REISERFS_FS is not set
837# CONFIG_JFS_FS is not set
838# CONFIG_FS_POSIX_ACL is not set
839# CONFIG_XFS_FS is not set
840# CONFIG_MINIX_FS is not set
841# CONFIG_ROMFS_FS is not set
842CONFIG_INOTIFY=y
843# CONFIG_QUOTA is not set
844CONFIG_DNOTIFY=y
845# CONFIG_AUTOFS_FS is not set
846# CONFIG_AUTOFS4_FS is not set
847# CONFIG_FUSE_FS is not set
848
849#
850# CD-ROM/DVD Filesystems
851#
852# CONFIG_ISO9660_FS is not set
853# CONFIG_UDF_FS is not set
854
855#
856# DOS/FAT/NT Filesystems
857#
858# CONFIG_MSDOS_FS is not set
859# CONFIG_VFAT_FS is not set
860# CONFIG_NTFS_FS is not set
861
862#
863# Pseudo filesystems
864#
865CONFIG_PROC_FS=y
866CONFIG_PROC_KCORE=y
867CONFIG_SYSFS=y
868CONFIG_TMPFS=y
869# CONFIG_HUGETLB_PAGE is not set
870CONFIG_RAMFS=y
871# CONFIG_RELAYFS_FS is not set
872
873#
874# Miscellaneous filesystems
875#
876# CONFIG_ADFS_FS is not set
877# CONFIG_AFFS_FS is not set
878# CONFIG_HFS_FS is not set
879# CONFIG_HFSPLUS_FS is not set
880# CONFIG_BEFS_FS is not set
881# CONFIG_BFS_FS is not set
882# CONFIG_EFS_FS is not set
883# CONFIG_JFFS_FS is not set
884CONFIG_JFFS2_FS=y
885CONFIG_JFFS2_FS_DEBUG=0
886CONFIG_JFFS2_FS_WRITEBUFFER=y
887# CONFIG_JFFS2_SUMMARY is not set
888# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
889CONFIG_JFFS2_ZLIB=y
890CONFIG_JFFS2_RTIME=y
891# CONFIG_JFFS2_RUBIN is not set
892CONFIG_CRAMFS=y
893# CONFIG_VXFS_FS is not set
894# CONFIG_HPFS_FS is not set
895# CONFIG_QNX4FS_FS is not set
896# CONFIG_SYSV_FS is not set
897# CONFIG_UFS_FS is not set
898
899#
900# Network File Systems
901#
902CONFIG_NFS_FS=y
903# CONFIG_NFS_V3 is not set
904# CONFIG_NFS_V4 is not set
905# CONFIG_NFS_DIRECTIO is not set
906# CONFIG_NFSD is not set
907CONFIG_ROOT_NFS=y
908CONFIG_LOCKD=y
909CONFIG_NFS_COMMON=y
910CONFIG_SUNRPC=y
911# CONFIG_RPCSEC_GSS_KRB5 is not set
912# CONFIG_RPCSEC_GSS_SPKM3 is not set
913# CONFIG_SMB_FS is not set
914# CONFIG_CIFS is not set
915# CONFIG_NCP_FS is not set
916# CONFIG_CODA_FS is not set
917# CONFIG_AFS_FS is not set
918# CONFIG_9P_FS is not set
919
920#
921# Partition Types
922#
923CONFIG_PARTITION_ADVANCED=y
924# CONFIG_ACORN_PARTITION is not set
925# CONFIG_OSF_PARTITION is not set
926# CONFIG_AMIGA_PARTITION is not set
927# CONFIG_ATARI_PARTITION is not set
928# CONFIG_MAC_PARTITION is not set
929# CONFIG_MSDOS_PARTITION is not set
930# CONFIG_LDM_PARTITION is not set
931# CONFIG_SGI_PARTITION is not set
932# CONFIG_ULTRIX_PARTITION is not set
933# CONFIG_SUN_PARTITION is not set
934# CONFIG_EFI_PARTITION is not set
935
936#
937# Native Language Support
938#
939# CONFIG_NLS is not set
940
941#
942# Library routines
943#
944# CONFIG_CRC_CCITT is not set
945# CONFIG_CRC16 is not set
946CONFIG_CRC32=y
947# CONFIG_LIBCRC32C is not set
948CONFIG_ZLIB_INFLATE=y
949CONFIG_ZLIB_DEFLATE=y
950# CONFIG_PROFILING is not set
951
952#
953# Kernel hacking
954#
955# CONFIG_PRINTK_TIME is not set
956# CONFIG_DEBUG_KERNEL is not set
957CONFIG_LOG_BUF_SHIFT=14
958# CONFIG_SERIAL_TEXT_DEBUG is not set
959
960#
961# Security options
962#
963# CONFIG_KEYS is not set
964# CONFIG_SECURITY is not set
965
966#
967# Cryptographic options
968#
969# CONFIG_CRYPTO is not set
970
971#
972# Hardware crypto devices
973#
diff --git a/arch/ppc/configs/TQM8541_defconfig b/arch/ppc/configs/TQM8541_defconfig
deleted file mode 100644
index e00cd62daa3f..000000000000
--- a/arch/ppc/configs/TQM8541_defconfig
+++ /dev/null
@@ -1,986 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2
4# Wed Nov 30 13:36:28 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SWAP=y
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33CONFIG_SYSCTL=y
34# CONFIG_AUDIT is not set
35# CONFIG_HOTPLUG is not set
36CONFIG_KOBJECT_UEVENT=y
37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_EMBEDDED=y
40# CONFIG_KALLSYMS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45# CONFIG_EPOLL is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58# CONFIG_MODULES is not set
59
60#
61# Block layer
62#
63# CONFIG_LBD is not set
64
65#
66# IO Schedulers
67#
68CONFIG_IOSCHED_NOOP=y
69CONFIG_IOSCHED_AS=y
70CONFIG_IOSCHED_DEADLINE=y
71CONFIG_IOSCHED_CFQ=y
72CONFIG_DEFAULT_AS=y
73# CONFIG_DEFAULT_DEADLINE is not set
74# CONFIG_DEFAULT_CFQ is not set
75# CONFIG_DEFAULT_NOOP is not set
76CONFIG_DEFAULT_IOSCHED="anticipatory"
77
78#
79# Processor
80#
81# CONFIG_6xx is not set
82# CONFIG_40x is not set
83# CONFIG_44x is not set
84# CONFIG_POWER3 is not set
85# CONFIG_POWER4 is not set
86# CONFIG_8xx is not set
87# CONFIG_E200 is not set
88CONFIG_E500=y
89CONFIG_BOOKE=y
90CONFIG_FSL_BOOKE=y
91# CONFIG_PHYS_64BIT is not set
92CONFIG_SPE=y
93CONFIG_MATH_EMULATION=y
94# CONFIG_KEXEC is not set
95# CONFIG_CPU_FREQ is not set
96# CONFIG_WANT_EARLY_SERIAL is not set
97CONFIG_PPC_GEN550=y
98CONFIG_85xx=y
99CONFIG_PPC_INDIRECT_PCI_BE=y
100
101#
102# Freescale 85xx options
103#
104# CONFIG_MPC8540_ADS is not set
105# CONFIG_MPC8548_CDS is not set
106# CONFIG_MPC8555_CDS is not set
107# CONFIG_MPC8560_ADS is not set
108# CONFIG_SBC8560 is not set
109# CONFIG_STX_GP3 is not set
110# CONFIG_TQM8540 is not set
111CONFIG_TQM8541=y
112# CONFIG_TQM8555 is not set
113# CONFIG_TQM8560 is not set
114CONFIG_MPC8555=y
115
116#
117# Platform options
118#
119CONFIG_CPM2=y
120# CONFIG_PC_KEYBOARD is not set
121# CONFIG_HIGHMEM is not set
122# CONFIG_HZ_100 is not set
123CONFIG_HZ_250=y
124# CONFIG_HZ_1000 is not set
125CONFIG_HZ=250
126CONFIG_PREEMPT_NONE=y
127# CONFIG_PREEMPT_VOLUNTARY is not set
128# CONFIG_PREEMPT is not set
129CONFIG_SELECT_MEMORY_MODEL=y
130CONFIG_FLATMEM_MANUAL=y
131# CONFIG_DISCONTIGMEM_MANUAL is not set
132# CONFIG_SPARSEMEM_MANUAL is not set
133CONFIG_FLATMEM=y
134CONFIG_FLAT_NODE_MEM_MAP=y
135# CONFIG_SPARSEMEM_STATIC is not set
136CONFIG_SPLIT_PTLOCK_CPUS=4
137CONFIG_BINFMT_ELF=y
138# CONFIG_BINFMT_MISC is not set
139# CONFIG_CMDLINE_BOOL is not set
140# CONFIG_PM is not set
141# CONFIG_HIBERNATION is not set
142CONFIG_SECCOMP=y
143CONFIG_ISA_DMA_API=y
144
145#
146# Bus options
147#
148CONFIG_PPC_I8259=y
149CONFIG_PPC_INDIRECT_PCI=y
150CONFIG_PCI=y
151CONFIG_PCI_DOMAINS=y
152# CONFIG_PCI_LEGACY_PROC is not set
153
154#
155# PCCARD (PCMCIA/CardBus) support
156#
157# CONFIG_PCCARD is not set
158
159#
160# Advanced setup
161#
162# CONFIG_ADVANCED_OPTIONS is not set
163
164#
165# Default settings for advanced configuration options are used
166#
167CONFIG_HIGHMEM_START=0xfe000000
168CONFIG_LOWMEM_SIZE=0x30000000
169CONFIG_KERNEL_START=0xc0000000
170CONFIG_TASK_SIZE=0x80000000
171CONFIG_BOOT_LOAD=0x00800000
172
173#
174# Networking
175#
176CONFIG_NET=y
177
178#
179# Networking options
180#
181CONFIG_PACKET=y
182# CONFIG_PACKET_MMAP is not set
183CONFIG_UNIX=y
184# CONFIG_NET_KEY is not set
185CONFIG_INET=y
186CONFIG_IP_MULTICAST=y
187# CONFIG_IP_ADVANCED_ROUTER is not set
188CONFIG_IP_FIB_HASH=y
189CONFIG_IP_PNP=y
190CONFIG_IP_PNP_DHCP=y
191CONFIG_IP_PNP_BOOTP=y
192# CONFIG_IP_PNP_RARP is not set
193# CONFIG_NET_IPIP is not set
194# CONFIG_NET_IPGRE is not set
195# CONFIG_IP_MROUTE is not set
196# CONFIG_ARPD is not set
197CONFIG_SYN_COOKIES=y
198# CONFIG_INET_AH is not set
199# CONFIG_INET_ESP is not set
200# CONFIG_INET_IPCOMP is not set
201# CONFIG_INET_TUNNEL is not set
202CONFIG_INET_DIAG=y
203CONFIG_INET_TCP_DIAG=y
204# CONFIG_TCP_CONG_ADVANCED is not set
205CONFIG_TCP_CONG_BIC=y
206# CONFIG_IPV6 is not set
207# CONFIG_NETFILTER is not set
208
209#
210# DCCP Configuration (EXPERIMENTAL)
211#
212# CONFIG_IP_DCCP is not set
213
214#
215# SCTP Configuration (EXPERIMENTAL)
216#
217# CONFIG_IP_SCTP is not set
218# CONFIG_ATM is not set
219# CONFIG_BRIDGE is not set
220# CONFIG_VLAN_8021Q is not set
221# CONFIG_DECNET is not set
222# CONFIG_LLC2 is not set
223# CONFIG_IPX is not set
224# CONFIG_ATALK is not set
225# CONFIG_X25 is not set
226# CONFIG_LAPB is not set
227# CONFIG_NET_DIVERT is not set
228# CONFIG_ECONET is not set
229# CONFIG_WAN_ROUTER is not set
230
231#
232# QoS and/or fair queueing
233#
234# CONFIG_NET_SCHED is not set
235
236#
237# Network testing
238#
239# CONFIG_NET_PKTGEN is not set
240# CONFIG_HAMRADIO is not set
241# CONFIG_IRDA is not set
242# CONFIG_BT is not set
243# CONFIG_IEEE80211 is not set
244
245#
246# Device Drivers
247#
248
249#
250# Generic Driver Options
251#
252CONFIG_STANDALONE=y
253CONFIG_PREVENT_FIRMWARE_BUILD=y
254# CONFIG_FW_LOADER is not set
255
256#
257# Connector - unified userspace <-> kernelspace linker
258#
259# CONFIG_CONNECTOR is not set
260
261#
262# Memory Technology Devices (MTD)
263#
264CONFIG_MTD=y
265# CONFIG_MTD_DEBUG is not set
266CONFIG_MTD_CONCAT=y
267CONFIG_MTD_PARTITIONS=y
268# CONFIG_MTD_REDBOOT_PARTS is not set
269CONFIG_MTD_CMDLINE_PARTS=y
270
271#
272# User Modules And Translation Layers
273#
274CONFIG_MTD_CHAR=y
275CONFIG_MTD_BLOCK=y
276# CONFIG_FTL is not set
277# CONFIG_NFTL is not set
278# CONFIG_INFTL is not set
279# CONFIG_RFD_FTL is not set
280
281#
282# RAM/ROM/Flash chip drivers
283#
284CONFIG_MTD_CFI=y
285# CONFIG_MTD_JEDECPROBE is not set
286CONFIG_MTD_GEN_PROBE=y
287# CONFIG_MTD_CFI_ADV_OPTIONS is not set
288CONFIG_MTD_MAP_BANK_WIDTH_1=y
289CONFIG_MTD_MAP_BANK_WIDTH_2=y
290CONFIG_MTD_MAP_BANK_WIDTH_4=y
291# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
292# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
293# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
294CONFIG_MTD_CFI_I1=y
295CONFIG_MTD_CFI_I2=y
296# CONFIG_MTD_CFI_I4 is not set
297# CONFIG_MTD_CFI_I8 is not set
298# CONFIG_MTD_CFI_INTELEXT is not set
299CONFIG_MTD_CFI_AMDSTD=y
300CONFIG_MTD_CFI_AMDSTD_RETRY=0
301# CONFIG_MTD_CFI_STAA is not set
302CONFIG_MTD_CFI_UTIL=y
303# CONFIG_MTD_RAM is not set
304# CONFIG_MTD_ROM is not set
305# CONFIG_MTD_ABSENT is not set
306
307#
308# Mapping drivers for chip access
309#
310# CONFIG_MTD_COMPLEX_MAPPINGS is not set
311# CONFIG_MTD_PHYSMAP is not set
312CONFIG_MTD_TQM85xx=y
313# CONFIG_MTD_PLATRAM is not set
314
315#
316# Self-contained MTD device drivers
317#
318# CONFIG_MTD_PMC551 is not set
319# CONFIG_MTD_SLRAM is not set
320# CONFIG_MTD_PHRAM is not set
321# CONFIG_MTD_MTDRAM is not set
322# CONFIG_MTD_BLKMTD is not set
323# CONFIG_MTD_BLOCK2MTD is not set
324
325#
326# Disk-On-Chip Device Drivers
327#
328# CONFIG_MTD_DOC2000 is not set
329# CONFIG_MTD_DOC2001 is not set
330# CONFIG_MTD_DOC2001PLUS is not set
331
332#
333# NAND Flash Device Drivers
334#
335# CONFIG_MTD_NAND is not set
336
337#
338# OneNAND Flash Device Drivers
339#
340# CONFIG_MTD_ONENAND is not set
341
342#
343# Parallel port support
344#
345# CONFIG_PARPORT is not set
346
347#
348# Plug and Play support
349#
350
351#
352# Block devices
353#
354# CONFIG_BLK_DEV_FD is not set
355# CONFIG_BLK_CPQ_DA is not set
356# CONFIG_BLK_CPQ_CISS_DA is not set
357# CONFIG_BLK_DEV_DAC960 is not set
358# CONFIG_BLK_DEV_UMEM is not set
359# CONFIG_BLK_DEV_COW_COMMON is not set
360CONFIG_BLK_DEV_LOOP=y
361# CONFIG_BLK_DEV_CRYPTOLOOP is not set
362# CONFIG_BLK_DEV_NBD is not set
363# CONFIG_BLK_DEV_SX8 is not set
364CONFIG_BLK_DEV_RAM=y
365CONFIG_BLK_DEV_RAM_COUNT=16
366CONFIG_BLK_DEV_RAM_SIZE=32768
367CONFIG_BLK_DEV_INITRD=y
368# CONFIG_CDROM_PKTCDVD is not set
369# CONFIG_ATA_OVER_ETH is not set
370
371#
372# ATA/ATAPI/MFM/RLL support
373#
374CONFIG_IDE=y
375CONFIG_BLK_DEV_IDE=y
376
377#
378# Please see Documentation/ide.txt for help/info on IDE drives
379#
380# CONFIG_BLK_DEV_IDE_SATA is not set
381CONFIG_BLK_DEV_IDEDISK=y
382# CONFIG_IDEDISK_MULTI_MODE is not set
383# CONFIG_BLK_DEV_IDECD is not set
384# CONFIG_BLK_DEV_IDETAPE is not set
385# CONFIG_BLK_DEV_IDEFLOPPY is not set
386# CONFIG_IDE_TASK_IOCTL is not set
387
388#
389# IDE chipset support/bugfixes
390#
391CONFIG_IDE_GENERIC=y
392CONFIG_BLK_DEV_IDEPCI=y
393CONFIG_IDEPCI_SHARE_IRQ=y
394# CONFIG_BLK_DEV_OFFBOARD is not set
395CONFIG_BLK_DEV_GENERIC=y
396# CONFIG_BLK_DEV_OPTI621 is not set
397# CONFIG_BLK_DEV_SL82C105 is not set
398CONFIG_BLK_DEV_IDEDMA_PCI=y
399# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
400CONFIG_IDEDMA_PCI_AUTO=y
401# CONFIG_IDEDMA_ONLYDISK is not set
402# CONFIG_BLK_DEV_AEC62XX is not set
403# CONFIG_BLK_DEV_ALI15X3 is not set
404# CONFIG_BLK_DEV_AMD74XX is not set
405# CONFIG_BLK_DEV_CMD64X is not set
406# CONFIG_BLK_DEV_TRIFLEX is not set
407# CONFIG_BLK_DEV_CY82C693 is not set
408# CONFIG_BLK_DEV_CS5520 is not set
409# CONFIG_BLK_DEV_CS5530 is not set
410# CONFIG_BLK_DEV_HPT34X is not set
411# CONFIG_BLK_DEV_HPT366 is not set
412# CONFIG_BLK_DEV_SC1200 is not set
413# CONFIG_BLK_DEV_PIIX is not set
414# CONFIG_BLK_DEV_IT821X is not set
415# CONFIG_BLK_DEV_NS87415 is not set
416# CONFIG_BLK_DEV_PDC202XX_OLD is not set
417# CONFIG_BLK_DEV_PDC202XX_NEW is not set
418# CONFIG_BLK_DEV_SVWKS is not set
419# CONFIG_BLK_DEV_SIIMAGE is not set
420# CONFIG_BLK_DEV_SLC90E66 is not set
421# CONFIG_BLK_DEV_TRM290 is not set
422CONFIG_BLK_DEV_VIA82CXXX=y
423# CONFIG_IDE_ARM is not set
424CONFIG_BLK_DEV_IDEDMA=y
425# CONFIG_IDEDMA_IVB is not set
426CONFIG_IDEDMA_AUTO=y
427# CONFIG_BLK_DEV_HD is not set
428
429#
430# SCSI device support
431#
432# CONFIG_RAID_ATTRS is not set
433# CONFIG_SCSI is not set
434
435#
436# Multi-device support (RAID and LVM)
437#
438# CONFIG_MD is not set
439
440#
441# Fusion MPT device support
442#
443# CONFIG_FUSION is not set
444
445#
446# IEEE 1394 (FireWire) support
447#
448# CONFIG_IEEE1394 is not set
449
450#
451# I2O device support
452#
453# CONFIG_I2O is not set
454
455#
456# Macintosh device drivers
457#
458# CONFIG_WINDFARM is not set
459
460#
461# Network device support
462#
463CONFIG_NETDEVICES=y
464# CONFIG_DUMMY is not set
465# CONFIG_BONDING is not set
466# CONFIG_EQUALIZER is not set
467# CONFIG_TUN is not set
468
469#
470# ARCnet devices
471#
472# CONFIG_ARCNET is not set
473
474#
475# PHY device support
476#
477CONFIG_PHYLIB=y
478
479#
480# MII PHY device drivers
481#
482# CONFIG_MARVELL_PHY is not set
483# CONFIG_DAVICOM_PHY is not set
484# CONFIG_QSEMI_PHY is not set
485# CONFIG_LXT_PHY is not set
486# CONFIG_CICADA_PHY is not set
487
488#
489# Ethernet (10 or 100Mbit)
490#
491CONFIG_NET_ETHERNET=y
492CONFIG_MII=y
493# CONFIG_HAPPYMEAL is not set
494# CONFIG_SUNGEM is not set
495# CONFIG_CASSINI is not set
496# CONFIG_NET_VENDOR_3COM is not set
497
498#
499# Tulip family network device support
500#
501# CONFIG_NET_TULIP is not set
502# CONFIG_HP100 is not set
503CONFIG_NET_PCI=y
504# CONFIG_PCNET32 is not set
505# CONFIG_AMD8111_ETH is not set
506# CONFIG_ADAPTEC_STARFIRE is not set
507# CONFIG_B44 is not set
508# CONFIG_FORCEDETH is not set
509# CONFIG_DGRS is not set
510# CONFIG_EEPRO100 is not set
511CONFIG_E100=y
512# CONFIG_FEALNX is not set
513# CONFIG_NATSEMI is not set
514# CONFIG_NE2K_PCI is not set
515# CONFIG_8139CP is not set
516# CONFIG_8139TOO is not set
517# CONFIG_SIS900 is not set
518# CONFIG_EPIC100 is not set
519# CONFIG_SUNDANCE is not set
520# CONFIG_TLAN is not set
521# CONFIG_VIA_RHINE is not set
522# CONFIG_FS_ENET is not set
523
524#
525# Ethernet (1000 Mbit)
526#
527# CONFIG_ACENIC is not set
528# CONFIG_DL2K is not set
529# CONFIG_E1000 is not set
530# CONFIG_NS83820 is not set
531# CONFIG_HAMACHI is not set
532# CONFIG_YELLOWFIN is not set
533# CONFIG_R8169 is not set
534# CONFIG_SIS190 is not set
535# CONFIG_SKGE is not set
536# CONFIG_SK98LIN is not set
537# CONFIG_VIA_VELOCITY is not set
538# CONFIG_TIGON3 is not set
539# CONFIG_BNX2 is not set
540CONFIG_GIANFAR=y
541CONFIG_GFAR_NAPI=y
542
543#
544# Ethernet (10000 Mbit)
545#
546# CONFIG_CHELSIO_T1 is not set
547# CONFIG_IXGB is not set
548# CONFIG_S2IO is not set
549
550#
551# Token Ring devices
552#
553# CONFIG_TR is not set
554
555#
556# Wireless LAN (non-hamradio)
557#
558# CONFIG_NET_RADIO is not set
559
560#
561# Wan interfaces
562#
563# CONFIG_WAN is not set
564# CONFIG_FDDI is not set
565# CONFIG_HIPPI is not set
566# CONFIG_PPP is not set
567# CONFIG_SLIP is not set
568# CONFIG_SHAPER is not set
569# CONFIG_NETCONSOLE is not set
570# CONFIG_NETPOLL is not set
571# CONFIG_NET_POLL_CONTROLLER is not set
572
573#
574# ISDN subsystem
575#
576# CONFIG_ISDN is not set
577
578#
579# Telephony Support
580#
581# CONFIG_PHONE is not set
582
583#
584# Input device support
585#
586CONFIG_INPUT=y
587
588#
589# Userland interfaces
590#
591# CONFIG_INPUT_MOUSEDEV is not set
592# CONFIG_INPUT_JOYDEV is not set
593# CONFIG_INPUT_TSDEV is not set
594# CONFIG_INPUT_EVDEV is not set
595# CONFIG_INPUT_EVBUG is not set
596
597#
598# Input Device Drivers
599#
600# CONFIG_INPUT_KEYBOARD is not set
601# CONFIG_INPUT_MOUSE is not set
602# CONFIG_INPUT_JOYSTICK is not set
603# CONFIG_INPUT_TOUCHSCREEN is not set
604# CONFIG_INPUT_MISC is not set
605
606#
607# Hardware I/O ports
608#
609# CONFIG_SERIO is not set
610# CONFIG_GAMEPORT is not set
611
612#
613# Character devices
614#
615# CONFIG_VT is not set
616# CONFIG_SERIAL_NONSTANDARD is not set
617
618#
619# Serial drivers
620#
621CONFIG_SERIAL_8250=y
622CONFIG_SERIAL_8250_CONSOLE=y
623CONFIG_SERIAL_8250_NR_UARTS=4
624# CONFIG_SERIAL_8250_EXTENDED is not set
625
626#
627# Non-8250 serial port support
628#
629CONFIG_SERIAL_CORE=y
630CONFIG_SERIAL_CORE_CONSOLE=y
631# CONFIG_SERIAL_CPM is not set
632# CONFIG_SERIAL_JSM is not set
633CONFIG_UNIX98_PTYS=y
634CONFIG_LEGACY_PTYS=y
635CONFIG_LEGACY_PTY_COUNT=256
636
637#
638# IPMI
639#
640# CONFIG_IPMI_HANDLER is not set
641
642#
643# Watchdog Cards
644#
645# CONFIG_WATCHDOG is not set
646# CONFIG_NVRAM is not set
647CONFIG_GEN_RTC=y
648# CONFIG_GEN_RTC_X is not set
649# CONFIG_DTLK is not set
650# CONFIG_R3964 is not set
651# CONFIG_APPLICOM is not set
652
653#
654# Ftape, the floppy tape device driver
655#
656# CONFIG_AGP is not set
657# CONFIG_DRM is not set
658# CONFIG_RAW_DRIVER is not set
659
660#
661# TPM devices
662#
663# CONFIG_TCG_TPM is not set
664# CONFIG_TELCLOCK is not set
665
666#
667# I2C support
668#
669CONFIG_I2C=y
670CONFIG_I2C_CHARDEV=y
671
672#
673# I2C Algorithms
674#
675# CONFIG_I2C_ALGOBIT is not set
676# CONFIG_I2C_ALGOPCF is not set
677# CONFIG_I2C_ALGOPCA is not set
678
679#
680# I2C Hardware Bus support
681#
682# CONFIG_I2C_ALI1535 is not set
683# CONFIG_I2C_ALI1563 is not set
684# CONFIG_I2C_ALI15X3 is not set
685# CONFIG_I2C_AMD756 is not set
686# CONFIG_I2C_AMD8111 is not set
687# CONFIG_I2C_I801 is not set
688# CONFIG_I2C_I810 is not set
689# CONFIG_I2C_PIIX4 is not set
690CONFIG_I2C_MPC=y
691# CONFIG_I2C_MPC8260 is not set
692# CONFIG_I2C_NFORCE2 is not set
693# CONFIG_I2C_PARPORT_LIGHT is not set
694# CONFIG_I2C_PROSAVAGE is not set
695# CONFIG_I2C_SAVAGE4 is not set
696# CONFIG_SCx200_ACB is not set
697# CONFIG_I2C_SIS5595 is not set
698# CONFIG_I2C_SIS630 is not set
699# CONFIG_I2C_SIS96X is not set
700# CONFIG_I2C_VIA is not set
701# CONFIG_I2C_VIAPRO is not set
702# CONFIG_I2C_VOODOO3 is not set
703# CONFIG_I2C_PCA_ISA is not set
704
705#
706# Miscellaneous I2C Chip support
707#
708CONFIG_SENSORS_DS1337=y
709# CONFIG_SENSORS_DS1374 is not set
710# CONFIG_SENSORS_EEPROM is not set
711# CONFIG_SENSORS_MAX6900 is not set
712# CONFIG_SENSORS_PCF8574 is not set
713# CONFIG_SENSORS_PCF8563 is not set
714# CONFIG_SENSORS_PCA9539 is not set
715# CONFIG_SENSORS_PCF8591 is not set
716# CONFIG_SENSORS_RTC8564 is not set
717# CONFIG_SENSORS_M41T00 is not set
718# CONFIG_SENSORS_MAX6875 is not set
719# CONFIG_RTC_X1205_I2C is not set
720# CONFIG_I2C_DEBUG_CORE is not set
721# CONFIG_I2C_DEBUG_ALGO is not set
722# CONFIG_I2C_DEBUG_BUS is not set
723# CONFIG_I2C_DEBUG_CHIP is not set
724
725#
726# Dallas's 1-wire bus
727#
728# CONFIG_W1 is not set
729
730#
731# Hardware Monitoring support
732#
733CONFIG_HWMON=y
734# CONFIG_HWMON_VID is not set
735# CONFIG_SENSORS_ADM1021 is not set
736# CONFIG_SENSORS_ADM1025 is not set
737# CONFIG_SENSORS_ADM1026 is not set
738# CONFIG_SENSORS_ADM1031 is not set
739# CONFIG_SENSORS_ADM9240 is not set
740# CONFIG_SENSORS_ASB100 is not set
741# CONFIG_SENSORS_ATXP1 is not set
742# CONFIG_SENSORS_DS1621 is not set
743# CONFIG_SENSORS_FSCHER is not set
744# CONFIG_SENSORS_FSCPOS is not set
745# CONFIG_SENSORS_GL518SM is not set
746# CONFIG_SENSORS_GL520SM is not set
747# CONFIG_SENSORS_IT87 is not set
748# CONFIG_SENSORS_LM63 is not set
749CONFIG_SENSORS_LM75=y
750# CONFIG_SENSORS_LM77 is not set
751# CONFIG_SENSORS_LM78 is not set
752# CONFIG_SENSORS_LM80 is not set
753# CONFIG_SENSORS_LM83 is not set
754# CONFIG_SENSORS_LM85 is not set
755# CONFIG_SENSORS_LM87 is not set
756# CONFIG_SENSORS_LM90 is not set
757# CONFIG_SENSORS_LM92 is not set
758# CONFIG_SENSORS_MAX1619 is not set
759# CONFIG_SENSORS_PC87360 is not set
760# CONFIG_SENSORS_SIS5595 is not set
761# CONFIG_SENSORS_SMSC47M1 is not set
762# CONFIG_SENSORS_SMSC47B397 is not set
763# CONFIG_SENSORS_VIA686A is not set
764# CONFIG_SENSORS_W83781D is not set
765# CONFIG_SENSORS_W83792D is not set
766# CONFIG_SENSORS_W83L785TS is not set
767# CONFIG_SENSORS_W83627HF is not set
768# CONFIG_SENSORS_W83627EHF is not set
769CONFIG_HWMON_DEBUG_CHIP=y
770
771#
772# Misc devices
773#
774
775#
776# Multimedia Capabilities Port drivers
777#
778
779#
780# Multimedia devices
781#
782# CONFIG_VIDEO_DEV is not set
783
784#
785# Digital Video Broadcasting Devices
786#
787# CONFIG_DVB is not set
788
789#
790# Graphics support
791#
792# CONFIG_FB is not set
793
794#
795# Sound
796#
797# CONFIG_SOUND is not set
798
799#
800# USB support
801#
802CONFIG_USB_ARCH_HAS_HCD=y
803CONFIG_USB_ARCH_HAS_OHCI=y
804# CONFIG_USB is not set
805
806#
807# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
808#
809
810#
811# USB Gadget Support
812#
813# CONFIG_USB_GADGET is not set
814
815#
816# MMC/SD Card support
817#
818# CONFIG_MMC is not set
819
820#
821# InfiniBand support
822#
823# CONFIG_INFINIBAND is not set
824
825#
826# SN Devices
827#
828
829#
830# File systems
831#
832CONFIG_EXT2_FS=y
833# CONFIG_EXT2_FS_XATTR is not set
834# CONFIG_EXT2_FS_XIP is not set
835CONFIG_EXT3_FS=y
836CONFIG_EXT3_FS_XATTR=y
837# CONFIG_EXT3_FS_POSIX_ACL is not set
838# CONFIG_EXT3_FS_SECURITY is not set
839CONFIG_JBD=y
840# CONFIG_JBD_DEBUG is not set
841CONFIG_FS_MBCACHE=y
842# CONFIG_REISERFS_FS is not set
843# CONFIG_JFS_FS is not set
844# CONFIG_FS_POSIX_ACL is not set
845# CONFIG_XFS_FS is not set
846# CONFIG_MINIX_FS is not set
847# CONFIG_ROMFS_FS is not set
848CONFIG_INOTIFY=y
849# CONFIG_QUOTA is not set
850CONFIG_DNOTIFY=y
851# CONFIG_AUTOFS_FS is not set
852# CONFIG_AUTOFS4_FS is not set
853# CONFIG_FUSE_FS is not set
854
855#
856# CD-ROM/DVD Filesystems
857#
858# CONFIG_ISO9660_FS is not set
859# CONFIG_UDF_FS is not set
860
861#
862# DOS/FAT/NT Filesystems
863#
864# CONFIG_MSDOS_FS is not set
865# CONFIG_VFAT_FS is not set
866# CONFIG_NTFS_FS is not set
867
868#
869# Pseudo filesystems
870#
871CONFIG_PROC_FS=y
872CONFIG_PROC_KCORE=y
873CONFIG_SYSFS=y
874CONFIG_TMPFS=y
875# CONFIG_HUGETLB_PAGE is not set
876CONFIG_RAMFS=y
877# CONFIG_RELAYFS_FS is not set
878
879#
880# Miscellaneous filesystems
881#
882# CONFIG_ADFS_FS is not set
883# CONFIG_AFFS_FS is not set
884# CONFIG_HFS_FS is not set
885# CONFIG_HFSPLUS_FS is not set
886# CONFIG_BEFS_FS is not set
887# CONFIG_BFS_FS is not set
888# CONFIG_EFS_FS is not set
889# CONFIG_JFFS_FS is not set
890CONFIG_JFFS2_FS=y
891CONFIG_JFFS2_FS_DEBUG=0
892CONFIG_JFFS2_FS_WRITEBUFFER=y
893# CONFIG_JFFS2_SUMMARY is not set
894# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
895CONFIG_JFFS2_ZLIB=y
896CONFIG_JFFS2_RTIME=y
897# CONFIG_JFFS2_RUBIN is not set
898CONFIG_CRAMFS=y
899# CONFIG_VXFS_FS is not set
900# CONFIG_HPFS_FS is not set
901# CONFIG_QNX4FS_FS is not set
902# CONFIG_SYSV_FS is not set
903# CONFIG_UFS_FS is not set
904
905#
906# Network File Systems
907#
908CONFIG_NFS_FS=y
909# CONFIG_NFS_V3 is not set
910# CONFIG_NFS_V4 is not set
911# CONFIG_NFS_DIRECTIO is not set
912# CONFIG_NFSD is not set
913CONFIG_ROOT_NFS=y
914CONFIG_LOCKD=y
915CONFIG_NFS_COMMON=y
916CONFIG_SUNRPC=y
917# CONFIG_RPCSEC_GSS_KRB5 is not set
918# CONFIG_RPCSEC_GSS_SPKM3 is not set
919# CONFIG_SMB_FS is not set
920# CONFIG_CIFS is not set
921# CONFIG_NCP_FS is not set
922# CONFIG_CODA_FS is not set
923# CONFIG_AFS_FS is not set
924# CONFIG_9P_FS is not set
925
926#
927# Partition Types
928#
929CONFIG_PARTITION_ADVANCED=y
930# CONFIG_ACORN_PARTITION is not set
931# CONFIG_OSF_PARTITION is not set
932# CONFIG_AMIGA_PARTITION is not set
933# CONFIG_ATARI_PARTITION is not set
934# CONFIG_MAC_PARTITION is not set
935# CONFIG_MSDOS_PARTITION is not set
936# CONFIG_LDM_PARTITION is not set
937# CONFIG_SGI_PARTITION is not set
938# CONFIG_ULTRIX_PARTITION is not set
939# CONFIG_SUN_PARTITION is not set
940# CONFIG_EFI_PARTITION is not set
941
942#
943# Native Language Support
944#
945# CONFIG_NLS is not set
946# CONFIG_SCC_ENET is not set
947# CONFIG_FEC_ENET is not set
948
949#
950# CPM2 Options
951#
952
953#
954# Library routines
955#
956# CONFIG_CRC_CCITT is not set
957# CONFIG_CRC16 is not set
958CONFIG_CRC32=y
959# CONFIG_LIBCRC32C is not set
960CONFIG_ZLIB_INFLATE=y
961CONFIG_ZLIB_DEFLATE=y
962# CONFIG_PROFILING is not set
963
964#
965# Kernel hacking
966#
967# CONFIG_PRINTK_TIME is not set
968# CONFIG_DEBUG_KERNEL is not set
969CONFIG_LOG_BUF_SHIFT=14
970# CONFIG_KGDB_CONSOLE is not set
971# CONFIG_SERIAL_TEXT_DEBUG is not set
972
973#
974# Security options
975#
976# CONFIG_KEYS is not set
977# CONFIG_SECURITY is not set
978
979#
980# Cryptographic options
981#
982# CONFIG_CRYPTO is not set
983
984#
985# Hardware crypto devices
986#
diff --git a/arch/ppc/configs/TQM8555_defconfig b/arch/ppc/configs/TQM8555_defconfig
deleted file mode 100644
index 43a0d9df1e23..000000000000
--- a/arch/ppc/configs/TQM8555_defconfig
+++ /dev/null
@@ -1,983 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2
4# Thu Nov 24 17:10:52 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SWAP=y
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33CONFIG_SYSCTL=y
34# CONFIG_AUDIT is not set
35# CONFIG_HOTPLUG is not set
36CONFIG_KOBJECT_UEVENT=y
37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_EMBEDDED=y
40# CONFIG_KALLSYMS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45# CONFIG_EPOLL is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58# CONFIG_MODULES is not set
59
60#
61# Block layer
62#
63# CONFIG_LBD is not set
64
65#
66# IO Schedulers
67#
68CONFIG_IOSCHED_NOOP=y
69CONFIG_IOSCHED_AS=y
70CONFIG_IOSCHED_DEADLINE=y
71CONFIG_IOSCHED_CFQ=y
72CONFIG_DEFAULT_AS=y
73# CONFIG_DEFAULT_DEADLINE is not set
74# CONFIG_DEFAULT_CFQ is not set
75# CONFIG_DEFAULT_NOOP is not set
76CONFIG_DEFAULT_IOSCHED="anticipatory"
77
78#
79# Processor
80#
81# CONFIG_6xx is not set
82# CONFIG_40x is not set
83# CONFIG_44x is not set
84# CONFIG_POWER3 is not set
85# CONFIG_POWER4 is not set
86# CONFIG_8xx is not set
87# CONFIG_E200 is not set
88CONFIG_E500=y
89CONFIG_BOOKE=y
90CONFIG_FSL_BOOKE=y
91# CONFIG_PHYS_64BIT is not set
92CONFIG_SPE=y
93CONFIG_MATH_EMULATION=y
94# CONFIG_KEXEC is not set
95# CONFIG_CPU_FREQ is not set
96# CONFIG_WANT_EARLY_SERIAL is not set
97CONFIG_PPC_GEN550=y
98CONFIG_85xx=y
99CONFIG_PPC_INDIRECT_PCI_BE=y
100
101#
102# Freescale 85xx options
103#
104# CONFIG_MPC8540_ADS is not set
105# CONFIG_MPC8548_CDS is not set
106# CONFIG_MPC8555_CDS is not set
107# CONFIG_MPC8560_ADS is not set
108# CONFIG_SBC8560 is not set
109# CONFIG_STX_GP3 is not set
110# CONFIG_TQM8540 is not set
111# CONFIG_TQM8541 is not set
112CONFIG_TQM8555=y
113# CONFIG_TQM8560 is not set
114CONFIG_MPC8555=y
115
116#
117# Platform options
118#
119CONFIG_CPM2=y
120# CONFIG_PC_KEYBOARD is not set
121# CONFIG_HIGHMEM is not set
122# CONFIG_HZ_100 is not set
123CONFIG_HZ_250=y
124# CONFIG_HZ_1000 is not set
125CONFIG_HZ=250
126CONFIG_PREEMPT_NONE=y
127# CONFIG_PREEMPT_VOLUNTARY is not set
128# CONFIG_PREEMPT is not set
129CONFIG_SELECT_MEMORY_MODEL=y
130CONFIG_FLATMEM_MANUAL=y
131# CONFIG_DISCONTIGMEM_MANUAL is not set
132# CONFIG_SPARSEMEM_MANUAL is not set
133CONFIG_FLATMEM=y
134CONFIG_FLAT_NODE_MEM_MAP=y
135# CONFIG_SPARSEMEM_STATIC is not set
136CONFIG_SPLIT_PTLOCK_CPUS=4
137CONFIG_BINFMT_ELF=y
138# CONFIG_BINFMT_MISC is not set
139# CONFIG_CMDLINE_BOOL is not set
140# CONFIG_PM is not set
141# CONFIG_HIBERNATION is not set
142CONFIG_SECCOMP=y
143CONFIG_ISA_DMA_API=y
144
145#
146# Bus options
147#
148CONFIG_PPC_I8259=y
149CONFIG_PPC_INDIRECT_PCI=y
150CONFIG_PCI=y
151CONFIG_PCI_DOMAINS=y
152# CONFIG_PCI_LEGACY_PROC is not set
153
154#
155# PCCARD (PCMCIA/CardBus) support
156#
157# CONFIG_PCCARD is not set
158
159#
160# Advanced setup
161#
162# CONFIG_ADVANCED_OPTIONS is not set
163
164#
165# Default settings for advanced configuration options are used
166#
167CONFIG_HIGHMEM_START=0xfe000000
168CONFIG_LOWMEM_SIZE=0x30000000
169CONFIG_KERNEL_START=0xc0000000
170CONFIG_TASK_SIZE=0x80000000
171CONFIG_BOOT_LOAD=0x00800000
172
173#
174# Networking
175#
176CONFIG_NET=y
177
178#
179# Networking options
180#
181CONFIG_PACKET=y
182# CONFIG_PACKET_MMAP is not set
183CONFIG_UNIX=y
184# CONFIG_NET_KEY is not set
185CONFIG_INET=y
186CONFIG_IP_MULTICAST=y
187# CONFIG_IP_ADVANCED_ROUTER is not set
188CONFIG_IP_FIB_HASH=y
189CONFIG_IP_PNP=y
190CONFIG_IP_PNP_DHCP=y
191CONFIG_IP_PNP_BOOTP=y
192# CONFIG_IP_PNP_RARP is not set
193# CONFIG_NET_IPIP is not set
194# CONFIG_NET_IPGRE is not set
195# CONFIG_IP_MROUTE is not set
196# CONFIG_ARPD is not set
197CONFIG_SYN_COOKIES=y
198# CONFIG_INET_AH is not set
199# CONFIG_INET_ESP is not set
200# CONFIG_INET_IPCOMP is not set
201# CONFIG_INET_TUNNEL is not set
202CONFIG_INET_DIAG=y
203CONFIG_INET_TCP_DIAG=y
204# CONFIG_TCP_CONG_ADVANCED is not set
205CONFIG_TCP_CONG_BIC=y
206# CONFIG_IPV6 is not set
207# CONFIG_NETFILTER is not set
208
209#
210# DCCP Configuration (EXPERIMENTAL)
211#
212# CONFIG_IP_DCCP is not set
213
214#
215# SCTP Configuration (EXPERIMENTAL)
216#
217# CONFIG_IP_SCTP is not set
218# CONFIG_ATM is not set
219# CONFIG_BRIDGE is not set
220# CONFIG_VLAN_8021Q is not set
221# CONFIG_DECNET is not set
222# CONFIG_LLC2 is not set
223# CONFIG_IPX is not set
224# CONFIG_ATALK is not set
225# CONFIG_X25 is not set
226# CONFIG_LAPB is not set
227# CONFIG_NET_DIVERT is not set
228# CONFIG_ECONET is not set
229# CONFIG_WAN_ROUTER is not set
230
231#
232# QoS and/or fair queueing
233#
234# CONFIG_NET_SCHED is not set
235
236#
237# Network testing
238#
239# CONFIG_NET_PKTGEN is not set
240# CONFIG_HAMRADIO is not set
241# CONFIG_IRDA is not set
242# CONFIG_BT is not set
243# CONFIG_IEEE80211 is not set
244
245#
246# Device Drivers
247#
248
249#
250# Generic Driver Options
251#
252CONFIG_STANDALONE=y
253CONFIG_PREVENT_FIRMWARE_BUILD=y
254# CONFIG_FW_LOADER is not set
255
256#
257# Connector - unified userspace <-> kernelspace linker
258#
259# CONFIG_CONNECTOR is not set
260
261#
262# Memory Technology Devices (MTD)
263#
264CONFIG_MTD=y
265# CONFIG_MTD_DEBUG is not set
266CONFIG_MTD_CONCAT=y
267CONFIG_MTD_PARTITIONS=y
268# CONFIG_MTD_REDBOOT_PARTS is not set
269CONFIG_MTD_CMDLINE_PARTS=y
270
271#
272# User Modules And Translation Layers
273#
274CONFIG_MTD_CHAR=y
275CONFIG_MTD_BLOCK=y
276# CONFIG_FTL is not set
277# CONFIG_NFTL is not set
278# CONFIG_INFTL is not set
279# CONFIG_RFD_FTL is not set
280
281#
282# RAM/ROM/Flash chip drivers
283#
284CONFIG_MTD_CFI=y
285# CONFIG_MTD_JEDECPROBE is not set
286CONFIG_MTD_GEN_PROBE=y
287# CONFIG_MTD_CFI_ADV_OPTIONS is not set
288CONFIG_MTD_MAP_BANK_WIDTH_1=y
289CONFIG_MTD_MAP_BANK_WIDTH_2=y
290CONFIG_MTD_MAP_BANK_WIDTH_4=y
291# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
292# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
293# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
294CONFIG_MTD_CFI_I1=y
295CONFIG_MTD_CFI_I2=y
296# CONFIG_MTD_CFI_I4 is not set
297# CONFIG_MTD_CFI_I8 is not set
298# CONFIG_MTD_CFI_INTELEXT is not set
299CONFIG_MTD_CFI_AMDSTD=y
300CONFIG_MTD_CFI_AMDSTD_RETRY=0
301# CONFIG_MTD_CFI_STAA is not set
302CONFIG_MTD_CFI_UTIL=y
303# CONFIG_MTD_RAM is not set
304# CONFIG_MTD_ROM is not set
305# CONFIG_MTD_ABSENT is not set
306
307#
308# Mapping drivers for chip access
309#
310# CONFIG_MTD_COMPLEX_MAPPINGS is not set
311# CONFIG_MTD_PHYSMAP is not set
312CONFIG_MTD_TQM85xx=y
313# CONFIG_MTD_PLATRAM is not set
314
315#
316# Self-contained MTD device drivers
317#
318# CONFIG_MTD_PMC551 is not set
319# CONFIG_MTD_SLRAM is not set
320# CONFIG_MTD_PHRAM is not set
321# CONFIG_MTD_MTDRAM is not set
322# CONFIG_MTD_BLKMTD is not set
323# CONFIG_MTD_BLOCK2MTD is not set
324
325#
326# Disk-On-Chip Device Drivers
327#
328# CONFIG_MTD_DOC2000 is not set
329# CONFIG_MTD_DOC2001 is not set
330# CONFIG_MTD_DOC2001PLUS is not set
331
332#
333# NAND Flash Device Drivers
334#
335# CONFIG_MTD_NAND is not set
336
337#
338# OneNAND Flash Device Drivers
339#
340# CONFIG_MTD_ONENAND is not set
341
342#
343# Parallel port support
344#
345# CONFIG_PARPORT is not set
346
347#
348# Plug and Play support
349#
350
351#
352# Block devices
353#
354# CONFIG_BLK_DEV_FD is not set
355# CONFIG_BLK_CPQ_DA is not set
356# CONFIG_BLK_CPQ_CISS_DA is not set
357# CONFIG_BLK_DEV_DAC960 is not set
358# CONFIG_BLK_DEV_UMEM is not set
359# CONFIG_BLK_DEV_COW_COMMON is not set
360CONFIG_BLK_DEV_LOOP=y
361# CONFIG_BLK_DEV_CRYPTOLOOP is not set
362# CONFIG_BLK_DEV_NBD is not set
363# CONFIG_BLK_DEV_SX8 is not set
364CONFIG_BLK_DEV_RAM=y
365CONFIG_BLK_DEV_RAM_COUNT=16
366CONFIG_BLK_DEV_RAM_SIZE=32768
367CONFIG_BLK_DEV_INITRD=y
368# CONFIG_CDROM_PKTCDVD is not set
369# CONFIG_ATA_OVER_ETH is not set
370
371#
372# ATA/ATAPI/MFM/RLL support
373#
374CONFIG_IDE=y
375CONFIG_BLK_DEV_IDE=y
376
377#
378# Please see Documentation/ide.txt for help/info on IDE drives
379#
380# CONFIG_BLK_DEV_IDE_SATA is not set
381CONFIG_BLK_DEV_IDEDISK=y
382# CONFIG_IDEDISK_MULTI_MODE is not set
383# CONFIG_BLK_DEV_IDECD is not set
384# CONFIG_BLK_DEV_IDETAPE is not set
385# CONFIG_BLK_DEV_IDEFLOPPY is not set
386# CONFIG_IDE_TASK_IOCTL is not set
387
388#
389# IDE chipset support/bugfixes
390#
391CONFIG_IDE_GENERIC=y
392CONFIG_BLK_DEV_IDEPCI=y
393CONFIG_IDEPCI_SHARE_IRQ=y
394# CONFIG_BLK_DEV_OFFBOARD is not set
395CONFIG_BLK_DEV_GENERIC=y
396# CONFIG_BLK_DEV_OPTI621 is not set
397# CONFIG_BLK_DEV_SL82C105 is not set
398CONFIG_BLK_DEV_IDEDMA_PCI=y
399# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
400CONFIG_IDEDMA_PCI_AUTO=y
401# CONFIG_IDEDMA_ONLYDISK is not set
402# CONFIG_BLK_DEV_AEC62XX is not set
403# CONFIG_BLK_DEV_ALI15X3 is not set
404# CONFIG_BLK_DEV_AMD74XX is not set
405# CONFIG_BLK_DEV_CMD64X is not set
406# CONFIG_BLK_DEV_TRIFLEX is not set
407# CONFIG_BLK_DEV_CY82C693 is not set
408# CONFIG_BLK_DEV_CS5520 is not set
409# CONFIG_BLK_DEV_CS5530 is not set
410# CONFIG_BLK_DEV_HPT34X is not set
411# CONFIG_BLK_DEV_HPT366 is not set
412# CONFIG_BLK_DEV_SC1200 is not set
413# CONFIG_BLK_DEV_PIIX is not set
414# CONFIG_BLK_DEV_IT821X is not set
415# CONFIG_BLK_DEV_NS87415 is not set
416# CONFIG_BLK_DEV_PDC202XX_OLD is not set
417# CONFIG_BLK_DEV_PDC202XX_NEW is not set
418# CONFIG_BLK_DEV_SVWKS is not set
419# CONFIG_BLK_DEV_SIIMAGE is not set
420# CONFIG_BLK_DEV_SLC90E66 is not set
421# CONFIG_BLK_DEV_TRM290 is not set
422CONFIG_BLK_DEV_VIA82CXXX=y
423# CONFIG_IDE_ARM is not set
424CONFIG_BLK_DEV_IDEDMA=y
425# CONFIG_IDEDMA_IVB is not set
426CONFIG_IDEDMA_AUTO=y
427# CONFIG_BLK_DEV_HD is not set
428
429#
430# SCSI device support
431#
432# CONFIG_RAID_ATTRS is not set
433# CONFIG_SCSI is not set
434
435#
436# Multi-device support (RAID and LVM)
437#
438# CONFIG_MD is not set
439
440#
441# Fusion MPT device support
442#
443# CONFIG_FUSION is not set
444
445#
446# IEEE 1394 (FireWire) support
447#
448# CONFIG_IEEE1394 is not set
449
450#
451# I2O device support
452#
453# CONFIG_I2O is not set
454
455#
456# Macintosh device drivers
457#
458# CONFIG_WINDFARM is not set
459
460#
461# Network device support
462#
463CONFIG_NETDEVICES=y
464# CONFIG_DUMMY is not set
465# CONFIG_BONDING is not set
466# CONFIG_EQUALIZER is not set
467# CONFIG_TUN is not set
468
469#
470# ARCnet devices
471#
472# CONFIG_ARCNET is not set
473
474#
475# PHY device support
476#
477CONFIG_PHYLIB=y
478
479#
480# MII PHY device drivers
481#
482# CONFIG_MARVELL_PHY is not set
483# CONFIG_DAVICOM_PHY is not set
484# CONFIG_QSEMI_PHY is not set
485# CONFIG_LXT_PHY is not set
486# CONFIG_CICADA_PHY is not set
487
488#
489# Ethernet (10 or 100Mbit)
490#
491CONFIG_NET_ETHERNET=y
492CONFIG_MII=y
493# CONFIG_HAPPYMEAL is not set
494# CONFIG_SUNGEM is not set
495# CONFIG_CASSINI is not set
496# CONFIG_NET_VENDOR_3COM is not set
497
498#
499# Tulip family network device support
500#
501# CONFIG_NET_TULIP is not set
502# CONFIG_HP100 is not set
503CONFIG_NET_PCI=y
504# CONFIG_PCNET32 is not set
505# CONFIG_AMD8111_ETH is not set
506# CONFIG_ADAPTEC_STARFIRE is not set
507# CONFIG_B44 is not set
508# CONFIG_FORCEDETH is not set
509# CONFIG_DGRS is not set
510# CONFIG_EEPRO100 is not set
511CONFIG_E100=y
512# CONFIG_FEALNX is not set
513# CONFIG_NATSEMI is not set
514# CONFIG_NE2K_PCI is not set
515# CONFIG_8139CP is not set
516# CONFIG_8139TOO is not set
517# CONFIG_SIS900 is not set
518# CONFIG_EPIC100 is not set
519# CONFIG_SUNDANCE is not set
520# CONFIG_TLAN is not set
521# CONFIG_VIA_RHINE is not set
522# CONFIG_FS_ENET is not set
523
524#
525# Ethernet (1000 Mbit)
526#
527# CONFIG_ACENIC is not set
528# CONFIG_DL2K is not set
529# CONFIG_E1000 is not set
530# CONFIG_NS83820 is not set
531# CONFIG_HAMACHI is not set
532# CONFIG_YELLOWFIN is not set
533# CONFIG_R8169 is not set
534# CONFIG_SIS190 is not set
535# CONFIG_SKGE is not set
536# CONFIG_SK98LIN is not set
537# CONFIG_VIA_VELOCITY is not set
538# CONFIG_TIGON3 is not set
539# CONFIG_BNX2 is not set
540CONFIG_GIANFAR=y
541CONFIG_GFAR_NAPI=y
542
543#
544# Ethernet (10000 Mbit)
545#
546# CONFIG_CHELSIO_T1 is not set
547# CONFIG_IXGB is not set
548# CONFIG_S2IO is not set
549
550#
551# Token Ring devices
552#
553# CONFIG_TR is not set
554
555#
556# Wireless LAN (non-hamradio)
557#
558# CONFIG_NET_RADIO is not set
559
560#
561# Wan interfaces
562#
563# CONFIG_WAN is not set
564# CONFIG_FDDI is not set
565# CONFIG_HIPPI is not set
566# CONFIG_PPP is not set
567# CONFIG_SLIP is not set
568# CONFIG_SHAPER is not set
569# CONFIG_NETCONSOLE is not set
570# CONFIG_NETPOLL is not set
571# CONFIG_NET_POLL_CONTROLLER is not set
572
573#
574# ISDN subsystem
575#
576# CONFIG_ISDN is not set
577
578#
579# Telephony Support
580#
581# CONFIG_PHONE is not set
582
583#
584# Input device support
585#
586CONFIG_INPUT=y
587
588#
589# Userland interfaces
590#
591# CONFIG_INPUT_MOUSEDEV is not set
592# CONFIG_INPUT_JOYDEV is not set
593# CONFIG_INPUT_TSDEV is not set
594# CONFIG_INPUT_EVDEV is not set
595# CONFIG_INPUT_EVBUG is not set
596
597#
598# Input Device Drivers
599#
600# CONFIG_INPUT_KEYBOARD is not set
601# CONFIG_INPUT_MOUSE is not set
602# CONFIG_INPUT_JOYSTICK is not set
603# CONFIG_INPUT_TOUCHSCREEN is not set
604# CONFIG_INPUT_MISC is not set
605
606#
607# Hardware I/O ports
608#
609# CONFIG_SERIO is not set
610# CONFIG_GAMEPORT is not set
611
612#
613# Character devices
614#
615# CONFIG_VT is not set
616# CONFIG_SERIAL_NONSTANDARD is not set
617
618#
619# Serial drivers
620#
621CONFIG_SERIAL_8250=y
622CONFIG_SERIAL_8250_CONSOLE=y
623CONFIG_SERIAL_8250_NR_UARTS=4
624# CONFIG_SERIAL_8250_EXTENDED is not set
625
626#
627# Non-8250 serial port support
628#
629CONFIG_SERIAL_CORE=y
630CONFIG_SERIAL_CORE_CONSOLE=y
631# CONFIG_SERIAL_CPM is not set
632# CONFIG_SERIAL_JSM is not set
633CONFIG_UNIX98_PTYS=y
634CONFIG_LEGACY_PTYS=y
635CONFIG_LEGACY_PTY_COUNT=256
636
637#
638# IPMI
639#
640# CONFIG_IPMI_HANDLER is not set
641
642#
643# Watchdog Cards
644#
645# CONFIG_WATCHDOG is not set
646# CONFIG_NVRAM is not set
647CONFIG_GEN_RTC=y
648# CONFIG_GEN_RTC_X is not set
649# CONFIG_DTLK is not set
650# CONFIG_R3964 is not set
651# CONFIG_APPLICOM is not set
652
653#
654# Ftape, the floppy tape device driver
655#
656# CONFIG_AGP is not set
657# CONFIG_DRM is not set
658# CONFIG_RAW_DRIVER is not set
659
660#
661# TPM devices
662#
663# CONFIG_TCG_TPM is not set
664# CONFIG_TELCLOCK is not set
665
666#
667# I2C support
668#
669CONFIG_I2C=y
670CONFIG_I2C_CHARDEV=y
671
672#
673# I2C Algorithms
674#
675# CONFIG_I2C_ALGOBIT is not set
676# CONFIG_I2C_ALGOPCF is not set
677# CONFIG_I2C_ALGOPCA is not set
678
679#
680# I2C Hardware Bus support
681#
682# CONFIG_I2C_ALI1535 is not set
683# CONFIG_I2C_ALI1563 is not set
684# CONFIG_I2C_ALI15X3 is not set
685# CONFIG_I2C_AMD756 is not set
686# CONFIG_I2C_AMD8111 is not set
687# CONFIG_I2C_I801 is not set
688# CONFIG_I2C_I810 is not set
689# CONFIG_I2C_PIIX4 is not set
690CONFIG_I2C_MPC=y
691# CONFIG_I2C_NFORCE2 is not set
692# CONFIG_I2C_PARPORT_LIGHT is not set
693# CONFIG_I2C_PROSAVAGE is not set
694# CONFIG_I2C_SAVAGE4 is not set
695# CONFIG_SCx200_ACB is not set
696# CONFIG_I2C_SIS5595 is not set
697# CONFIG_I2C_SIS630 is not set
698# CONFIG_I2C_SIS96X is not set
699# CONFIG_I2C_VIA is not set
700# CONFIG_I2C_VIAPRO is not set
701# CONFIG_I2C_VOODOO3 is not set
702# CONFIG_I2C_PCA_ISA is not set
703
704#
705# Miscellaneous I2C Chip support
706#
707CONFIG_SENSORS_DS1337=y
708# CONFIG_SENSORS_DS1374 is not set
709# CONFIG_SENSORS_EEPROM is not set
710# CONFIG_SENSORS_PCF8574 is not set
711# CONFIG_SENSORS_PCA9539 is not set
712# CONFIG_SENSORS_PCF8591 is not set
713# CONFIG_SENSORS_RTC8564 is not set
714# CONFIG_SENSORS_M41T00 is not set
715# CONFIG_SENSORS_MAX6875 is not set
716# CONFIG_RTC_X1205_I2C is not set
717# CONFIG_I2C_DEBUG_CORE is not set
718# CONFIG_I2C_DEBUG_ALGO is not set
719# CONFIG_I2C_DEBUG_BUS is not set
720# CONFIG_I2C_DEBUG_CHIP is not set
721
722#
723# Dallas's 1-wire bus
724#
725# CONFIG_W1 is not set
726
727#
728# Hardware Monitoring support
729#
730CONFIG_HWMON=y
731# CONFIG_HWMON_VID is not set
732# CONFIG_SENSORS_ADM1021 is not set
733# CONFIG_SENSORS_ADM1025 is not set
734# CONFIG_SENSORS_ADM1026 is not set
735# CONFIG_SENSORS_ADM1031 is not set
736# CONFIG_SENSORS_ADM9240 is not set
737# CONFIG_SENSORS_ASB100 is not set
738# CONFIG_SENSORS_ATXP1 is not set
739# CONFIG_SENSORS_DS1621 is not set
740# CONFIG_SENSORS_FSCHER is not set
741# CONFIG_SENSORS_FSCPOS is not set
742# CONFIG_SENSORS_GL518SM is not set
743# CONFIG_SENSORS_GL520SM is not set
744# CONFIG_SENSORS_IT87 is not set
745# CONFIG_SENSORS_LM63 is not set
746CONFIG_SENSORS_LM75=y
747# CONFIG_SENSORS_LM77 is not set
748# CONFIG_SENSORS_LM78 is not set
749# CONFIG_SENSORS_LM80 is not set
750# CONFIG_SENSORS_LM83 is not set
751# CONFIG_SENSORS_LM85 is not set
752# CONFIG_SENSORS_LM87 is not set
753# CONFIG_SENSORS_LM90 is not set
754# CONFIG_SENSORS_LM92 is not set
755# CONFIG_SENSORS_MAX1619 is not set
756# CONFIG_SENSORS_PC87360 is not set
757# CONFIG_SENSORS_SIS5595 is not set
758# CONFIG_SENSORS_SMSC47M1 is not set
759# CONFIG_SENSORS_SMSC47B397 is not set
760# CONFIG_SENSORS_VIA686A is not set
761# CONFIG_SENSORS_W83781D is not set
762# CONFIG_SENSORS_W83792D is not set
763# CONFIG_SENSORS_W83L785TS is not set
764# CONFIG_SENSORS_W83627HF is not set
765# CONFIG_SENSORS_W83627EHF is not set
766CONFIG_HWMON_DEBUG_CHIP=y
767
768#
769# Misc devices
770#
771
772#
773# Multimedia Capabilities Port drivers
774#
775
776#
777# Multimedia devices
778#
779# CONFIG_VIDEO_DEV is not set
780
781#
782# Digital Video Broadcasting Devices
783#
784# CONFIG_DVB is not set
785
786#
787# Graphics support
788#
789# CONFIG_FB is not set
790
791#
792# Sound
793#
794# CONFIG_SOUND is not set
795
796#
797# USB support
798#
799CONFIG_USB_ARCH_HAS_HCD=y
800CONFIG_USB_ARCH_HAS_OHCI=y
801# CONFIG_USB is not set
802
803#
804# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
805#
806
807#
808# USB Gadget Support
809#
810# CONFIG_USB_GADGET is not set
811
812#
813# MMC/SD Card support
814#
815# CONFIG_MMC is not set
816
817#
818# InfiniBand support
819#
820# CONFIG_INFINIBAND is not set
821
822#
823# SN Devices
824#
825
826#
827# File systems
828#
829CONFIG_EXT2_FS=y
830# CONFIG_EXT2_FS_XATTR is not set
831# CONFIG_EXT2_FS_XIP is not set
832CONFIG_EXT3_FS=y
833CONFIG_EXT3_FS_XATTR=y
834# CONFIG_EXT3_FS_POSIX_ACL is not set
835# CONFIG_EXT3_FS_SECURITY is not set
836CONFIG_JBD=y
837# CONFIG_JBD_DEBUG is not set
838CONFIG_FS_MBCACHE=y
839# CONFIG_REISERFS_FS is not set
840# CONFIG_JFS_FS is not set
841# CONFIG_FS_POSIX_ACL is not set
842# CONFIG_XFS_FS is not set
843# CONFIG_MINIX_FS is not set
844# CONFIG_ROMFS_FS is not set
845CONFIG_INOTIFY=y
846# CONFIG_QUOTA is not set
847CONFIG_DNOTIFY=y
848# CONFIG_AUTOFS_FS is not set
849# CONFIG_AUTOFS4_FS is not set
850# CONFIG_FUSE_FS is not set
851
852#
853# CD-ROM/DVD Filesystems
854#
855# CONFIG_ISO9660_FS is not set
856# CONFIG_UDF_FS is not set
857
858#
859# DOS/FAT/NT Filesystems
860#
861# CONFIG_MSDOS_FS is not set
862# CONFIG_VFAT_FS is not set
863# CONFIG_NTFS_FS is not set
864
865#
866# Pseudo filesystems
867#
868CONFIG_PROC_FS=y
869CONFIG_PROC_KCORE=y
870CONFIG_SYSFS=y
871CONFIG_TMPFS=y
872# CONFIG_HUGETLB_PAGE is not set
873CONFIG_RAMFS=y
874# CONFIG_RELAYFS_FS is not set
875
876#
877# Miscellaneous filesystems
878#
879# CONFIG_ADFS_FS is not set
880# CONFIG_AFFS_FS is not set
881# CONFIG_HFS_FS is not set
882# CONFIG_HFSPLUS_FS is not set
883# CONFIG_BEFS_FS is not set
884# CONFIG_BFS_FS is not set
885# CONFIG_EFS_FS is not set
886# CONFIG_JFFS_FS is not set
887CONFIG_JFFS2_FS=y
888CONFIG_JFFS2_FS_DEBUG=0
889CONFIG_JFFS2_FS_WRITEBUFFER=y
890# CONFIG_JFFS2_SUMMARY is not set
891# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
892CONFIG_JFFS2_ZLIB=y
893CONFIG_JFFS2_RTIME=y
894# CONFIG_JFFS2_RUBIN is not set
895CONFIG_CRAMFS=y
896# CONFIG_VXFS_FS is not set
897# CONFIG_HPFS_FS is not set
898# CONFIG_QNX4FS_FS is not set
899# CONFIG_SYSV_FS is not set
900# CONFIG_UFS_FS is not set
901
902#
903# Network File Systems
904#
905CONFIG_NFS_FS=y
906# CONFIG_NFS_V3 is not set
907# CONFIG_NFS_V4 is not set
908# CONFIG_NFS_DIRECTIO is not set
909# CONFIG_NFSD is not set
910CONFIG_ROOT_NFS=y
911CONFIG_LOCKD=y
912CONFIG_NFS_COMMON=y
913CONFIG_SUNRPC=y
914# CONFIG_RPCSEC_GSS_KRB5 is not set
915# CONFIG_RPCSEC_GSS_SPKM3 is not set
916# CONFIG_SMB_FS is not set
917# CONFIG_CIFS is not set
918# CONFIG_NCP_FS is not set
919# CONFIG_CODA_FS is not set
920# CONFIG_AFS_FS is not set
921# CONFIG_9P_FS is not set
922
923#
924# Partition Types
925#
926CONFIG_PARTITION_ADVANCED=y
927# CONFIG_ACORN_PARTITION is not set
928# CONFIG_OSF_PARTITION is not set
929# CONFIG_AMIGA_PARTITION is not set
930# CONFIG_ATARI_PARTITION is not set
931# CONFIG_MAC_PARTITION is not set
932# CONFIG_MSDOS_PARTITION is not set
933# CONFIG_LDM_PARTITION is not set
934# CONFIG_SGI_PARTITION is not set
935# CONFIG_ULTRIX_PARTITION is not set
936# CONFIG_SUN_PARTITION is not set
937# CONFIG_EFI_PARTITION is not set
938
939#
940# Native Language Support
941#
942# CONFIG_NLS is not set
943# CONFIG_SCC_ENET is not set
944# CONFIG_FEC_ENET is not set
945
946#
947# CPM2 Options
948#
949
950#
951# Library routines
952#
953# CONFIG_CRC_CCITT is not set
954# CONFIG_CRC16 is not set
955CONFIG_CRC32=y
956# CONFIG_LIBCRC32C is not set
957CONFIG_ZLIB_INFLATE=y
958CONFIG_ZLIB_DEFLATE=y
959# CONFIG_PROFILING is not set
960
961#
962# Kernel hacking
963#
964# CONFIG_PRINTK_TIME is not set
965# CONFIG_DEBUG_KERNEL is not set
966CONFIG_LOG_BUF_SHIFT=14
967# CONFIG_KGDB_CONSOLE is not set
968# CONFIG_SERIAL_TEXT_DEBUG is not set
969
970#
971# Security options
972#
973# CONFIG_KEYS is not set
974# CONFIG_SECURITY is not set
975
976#
977# Cryptographic options
978#
979# CONFIG_CRYPTO is not set
980
981#
982# Hardware crypto devices
983#
diff --git a/arch/ppc/configs/TQM8560_defconfig b/arch/ppc/configs/TQM8560_defconfig
deleted file mode 100644
index a814d17a2be9..000000000000
--- a/arch/ppc/configs/TQM8560_defconfig
+++ /dev/null
@@ -1,992 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.15-rc2
4# Wed Nov 30 16:47:53 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SWAP=y
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33CONFIG_SYSCTL=y
34# CONFIG_AUDIT is not set
35# CONFIG_HOTPLUG is not set
36CONFIG_KOBJECT_UEVENT=y
37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_EMBEDDED=y
40# CONFIG_KALLSYMS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45# CONFIG_EPOLL is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58# CONFIG_MODULES is not set
59
60#
61# Block layer
62#
63# CONFIG_LBD is not set
64
65#
66# IO Schedulers
67#
68CONFIG_IOSCHED_NOOP=y
69CONFIG_IOSCHED_AS=y
70CONFIG_IOSCHED_DEADLINE=y
71CONFIG_IOSCHED_CFQ=y
72CONFIG_DEFAULT_AS=y
73# CONFIG_DEFAULT_DEADLINE is not set
74# CONFIG_DEFAULT_CFQ is not set
75# CONFIG_DEFAULT_NOOP is not set
76CONFIG_DEFAULT_IOSCHED="anticipatory"
77
78#
79# Processor
80#
81# CONFIG_6xx is not set
82# CONFIG_40x is not set
83# CONFIG_44x is not set
84# CONFIG_POWER3 is not set
85# CONFIG_POWER4 is not set
86# CONFIG_8xx is not set
87# CONFIG_E200 is not set
88CONFIG_E500=y
89CONFIG_BOOKE=y
90CONFIG_FSL_BOOKE=y
91# CONFIG_PHYS_64BIT is not set
92CONFIG_SPE=y
93CONFIG_MATH_EMULATION=y
94# CONFIG_KEXEC is not set
95# CONFIG_CPU_FREQ is not set
96# CONFIG_WANT_EARLY_SERIAL is not set
97CONFIG_85xx=y
98CONFIG_PPC_INDIRECT_PCI_BE=y
99
100#
101# Freescale 85xx options
102#
103# CONFIG_MPC8540_ADS is not set
104# CONFIG_MPC8548_CDS is not set
105# CONFIG_MPC8555_CDS is not set
106# CONFIG_MPC8560_ADS is not set
107# CONFIG_SBC8560 is not set
108# CONFIG_STX_GP3 is not set
109# CONFIG_TQM8540 is not set
110# CONFIG_TQM8541 is not set
111# CONFIG_TQM8555 is not set
112CONFIG_TQM8560=y
113CONFIG_MPC8560=y
114
115#
116# Platform options
117#
118CONFIG_CPM2=y
119# CONFIG_PC_KEYBOARD is not set
120# CONFIG_HIGHMEM is not set
121# CONFIG_HZ_100 is not set
122CONFIG_HZ_250=y
123# CONFIG_HZ_1000 is not set
124CONFIG_HZ=250
125CONFIG_PREEMPT_NONE=y
126# CONFIG_PREEMPT_VOLUNTARY is not set
127# CONFIG_PREEMPT is not set
128CONFIG_SELECT_MEMORY_MODEL=y
129CONFIG_FLATMEM_MANUAL=y
130# CONFIG_DISCONTIGMEM_MANUAL is not set
131# CONFIG_SPARSEMEM_MANUAL is not set
132CONFIG_FLATMEM=y
133CONFIG_FLAT_NODE_MEM_MAP=y
134# CONFIG_SPARSEMEM_STATIC is not set
135CONFIG_SPLIT_PTLOCK_CPUS=4
136CONFIG_BINFMT_ELF=y
137# CONFIG_BINFMT_MISC is not set
138# CONFIG_CMDLINE_BOOL is not set
139# CONFIG_PM is not set
140# CONFIG_HIBERNATION is not set
141CONFIG_SECCOMP=y
142CONFIG_ISA_DMA_API=y
143
144#
145# Bus options
146#
147CONFIG_PPC_I8259=y
148CONFIG_PPC_INDIRECT_PCI=y
149CONFIG_PCI=y
150CONFIG_PCI_DOMAINS=y
151# CONFIG_PCI_LEGACY_PROC is not set
152
153#
154# PCCARD (PCMCIA/CardBus) support
155#
156# CONFIG_PCCARD is not set
157# CONFIG_RAPIDIO is not set
158
159#
160# Advanced setup
161#
162# CONFIG_ADVANCED_OPTIONS is not set
163
164#
165# Default settings for advanced configuration options are used
166#
167CONFIG_HIGHMEM_START=0xfe000000
168CONFIG_LOWMEM_SIZE=0x30000000
169CONFIG_KERNEL_START=0xc0000000
170CONFIG_TASK_SIZE=0x80000000
171CONFIG_BOOT_LOAD=0x00800000
172
173#
174# Networking
175#
176CONFIG_NET=y
177
178#
179# Networking options
180#
181CONFIG_PACKET=y
182# CONFIG_PACKET_MMAP is not set
183CONFIG_UNIX=y
184# CONFIG_NET_KEY is not set
185CONFIG_INET=y
186CONFIG_IP_MULTICAST=y
187# CONFIG_IP_ADVANCED_ROUTER is not set
188CONFIG_IP_FIB_HASH=y
189CONFIG_IP_PNP=y
190CONFIG_IP_PNP_DHCP=y
191CONFIG_IP_PNP_BOOTP=y
192# CONFIG_IP_PNP_RARP is not set
193# CONFIG_NET_IPIP is not set
194# CONFIG_NET_IPGRE is not set
195# CONFIG_IP_MROUTE is not set
196# CONFIG_ARPD is not set
197CONFIG_SYN_COOKIES=y
198# CONFIG_INET_AH is not set
199# CONFIG_INET_ESP is not set
200# CONFIG_INET_IPCOMP is not set
201# CONFIG_INET_TUNNEL is not set
202CONFIG_INET_DIAG=y
203CONFIG_INET_TCP_DIAG=y
204# CONFIG_TCP_CONG_ADVANCED is not set
205CONFIG_TCP_CONG_BIC=y
206# CONFIG_IPV6 is not set
207# CONFIG_NETFILTER is not set
208
209#
210# DCCP Configuration (EXPERIMENTAL)
211#
212# CONFIG_IP_DCCP is not set
213
214#
215# SCTP Configuration (EXPERIMENTAL)
216#
217# CONFIG_IP_SCTP is not set
218# CONFIG_ATM is not set
219# CONFIG_BRIDGE is not set
220# CONFIG_VLAN_8021Q is not set
221# CONFIG_DECNET is not set
222# CONFIG_LLC2 is not set
223# CONFIG_IPX is not set
224# CONFIG_ATALK is not set
225# CONFIG_X25 is not set
226# CONFIG_LAPB is not set
227# CONFIG_NET_DIVERT is not set
228# CONFIG_ECONET is not set
229# CONFIG_WAN_ROUTER is not set
230
231#
232# QoS and/or fair queueing
233#
234# CONFIG_NET_SCHED is not set
235
236#
237# Network testing
238#
239# CONFIG_NET_PKTGEN is not set
240# CONFIG_HAMRADIO is not set
241# CONFIG_IRDA is not set
242# CONFIG_BT is not set
243# CONFIG_IEEE80211 is not set
244
245#
246# Device Drivers
247#
248
249#
250# Generic Driver Options
251#
252CONFIG_STANDALONE=y
253CONFIG_PREVENT_FIRMWARE_BUILD=y
254# CONFIG_FW_LOADER is not set
255
256#
257# Connector - unified userspace <-> kernelspace linker
258#
259# CONFIG_CONNECTOR is not set
260
261#
262# Memory Technology Devices (MTD)
263#
264CONFIG_MTD=y
265# CONFIG_MTD_DEBUG is not set
266CONFIG_MTD_CONCAT=y
267CONFIG_MTD_PARTITIONS=y
268# CONFIG_MTD_REDBOOT_PARTS is not set
269CONFIG_MTD_CMDLINE_PARTS=y
270
271#
272# User Modules And Translation Layers
273#
274CONFIG_MTD_CHAR=y
275CONFIG_MTD_BLOCK=y
276# CONFIG_FTL is not set
277# CONFIG_NFTL is not set
278# CONFIG_INFTL is not set
279# CONFIG_RFD_FTL is not set
280
281#
282# RAM/ROM/Flash chip drivers
283#
284CONFIG_MTD_CFI=y
285# CONFIG_MTD_JEDECPROBE is not set
286CONFIG_MTD_GEN_PROBE=y
287# CONFIG_MTD_CFI_ADV_OPTIONS is not set
288CONFIG_MTD_MAP_BANK_WIDTH_1=y
289CONFIG_MTD_MAP_BANK_WIDTH_2=y
290CONFIG_MTD_MAP_BANK_WIDTH_4=y
291# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
292# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
293# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
294CONFIG_MTD_CFI_I1=y
295CONFIG_MTD_CFI_I2=y
296# CONFIG_MTD_CFI_I4 is not set
297# CONFIG_MTD_CFI_I8 is not set
298# CONFIG_MTD_CFI_INTELEXT is not set
299CONFIG_MTD_CFI_AMDSTD=y
300CONFIG_MTD_CFI_AMDSTD_RETRY=0
301# CONFIG_MTD_CFI_STAA is not set
302CONFIG_MTD_CFI_UTIL=y
303# CONFIG_MTD_RAM is not set
304# CONFIG_MTD_ROM is not set
305# CONFIG_MTD_ABSENT is not set
306
307#
308# Mapping drivers for chip access
309#
310# CONFIG_MTD_COMPLEX_MAPPINGS is not set
311# CONFIG_MTD_PHYSMAP is not set
312CONFIG_MTD_TQM85xx=y
313# CONFIG_MTD_PLATRAM is not set
314
315#
316# Self-contained MTD device drivers
317#
318# CONFIG_MTD_PMC551 is not set
319# CONFIG_MTD_SLRAM is not set
320# CONFIG_MTD_PHRAM is not set
321# CONFIG_MTD_MTDRAM is not set
322# CONFIG_MTD_BLKMTD is not set
323# CONFIG_MTD_BLOCK2MTD is not set
324
325#
326# Disk-On-Chip Device Drivers
327#
328# CONFIG_MTD_DOC2000 is not set
329# CONFIG_MTD_DOC2001 is not set
330# CONFIG_MTD_DOC2001PLUS is not set
331
332#
333# NAND Flash Device Drivers
334#
335# CONFIG_MTD_NAND is not set
336
337#
338# OneNAND Flash Device Drivers
339#
340# CONFIG_MTD_ONENAND is not set
341
342#
343# Parallel port support
344#
345# CONFIG_PARPORT is not set
346
347#
348# Plug and Play support
349#
350
351#
352# Block devices
353#
354# CONFIG_BLK_DEV_FD is not set
355# CONFIG_BLK_CPQ_DA is not set
356# CONFIG_BLK_CPQ_CISS_DA is not set
357# CONFIG_BLK_DEV_DAC960 is not set
358# CONFIG_BLK_DEV_UMEM is not set
359# CONFIG_BLK_DEV_COW_COMMON is not set
360CONFIG_BLK_DEV_LOOP=y
361# CONFIG_BLK_DEV_CRYPTOLOOP is not set
362# CONFIG_BLK_DEV_NBD is not set
363# CONFIG_BLK_DEV_SX8 is not set
364CONFIG_BLK_DEV_RAM=y
365CONFIG_BLK_DEV_RAM_COUNT=16
366CONFIG_BLK_DEV_RAM_SIZE=32768
367CONFIG_BLK_DEV_INITRD=y
368# CONFIG_CDROM_PKTCDVD is not set
369# CONFIG_ATA_OVER_ETH is not set
370
371#
372# ATA/ATAPI/MFM/RLL support
373#
374CONFIG_IDE=y
375CONFIG_BLK_DEV_IDE=y
376
377#
378# Please see Documentation/ide.txt for help/info on IDE drives
379#
380# CONFIG_BLK_DEV_IDE_SATA is not set
381CONFIG_BLK_DEV_IDEDISK=y
382# CONFIG_IDEDISK_MULTI_MODE is not set
383# CONFIG_BLK_DEV_IDECD is not set
384# CONFIG_BLK_DEV_IDETAPE is not set
385# CONFIG_BLK_DEV_IDEFLOPPY is not set
386# CONFIG_IDE_TASK_IOCTL is not set
387
388#
389# IDE chipset support/bugfixes
390#
391CONFIG_IDE_GENERIC=y
392CONFIG_BLK_DEV_IDEPCI=y
393CONFIG_IDEPCI_SHARE_IRQ=y
394# CONFIG_BLK_DEV_OFFBOARD is not set
395CONFIG_BLK_DEV_GENERIC=y
396# CONFIG_BLK_DEV_OPTI621 is not set
397# CONFIG_BLK_DEV_SL82C105 is not set
398CONFIG_BLK_DEV_IDEDMA_PCI=y
399# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
400CONFIG_IDEDMA_PCI_AUTO=y
401# CONFIG_IDEDMA_ONLYDISK is not set
402# CONFIG_BLK_DEV_AEC62XX is not set
403# CONFIG_BLK_DEV_ALI15X3 is not set
404# CONFIG_BLK_DEV_AMD74XX is not set
405# CONFIG_BLK_DEV_CMD64X is not set
406# CONFIG_BLK_DEV_TRIFLEX is not set
407# CONFIG_BLK_DEV_CY82C693 is not set
408# CONFIG_BLK_DEV_CS5520 is not set
409# CONFIG_BLK_DEV_CS5530 is not set
410# CONFIG_BLK_DEV_HPT34X is not set
411# CONFIG_BLK_DEV_HPT366 is not set
412# CONFIG_BLK_DEV_SC1200 is not set
413# CONFIG_BLK_DEV_PIIX is not set
414# CONFIG_BLK_DEV_IT821X is not set
415# CONFIG_BLK_DEV_NS87415 is not set
416# CONFIG_BLK_DEV_PDC202XX_OLD is not set
417# CONFIG_BLK_DEV_PDC202XX_NEW is not set
418# CONFIG_BLK_DEV_SVWKS is not set
419# CONFIG_BLK_DEV_SIIMAGE is not set
420# CONFIG_BLK_DEV_SLC90E66 is not set
421# CONFIG_BLK_DEV_TRM290 is not set
422CONFIG_BLK_DEV_VIA82CXXX=y
423# CONFIG_IDE_ARM is not set
424CONFIG_BLK_DEV_IDEDMA=y
425# CONFIG_IDEDMA_IVB is not set
426CONFIG_IDEDMA_AUTO=y
427# CONFIG_BLK_DEV_HD is not set
428
429#
430# SCSI device support
431#
432# CONFIG_RAID_ATTRS is not set
433# CONFIG_SCSI is not set
434
435#
436# Multi-device support (RAID and LVM)
437#
438# CONFIG_MD is not set
439
440#
441# Fusion MPT device support
442#
443# CONFIG_FUSION is not set
444
445#
446# IEEE 1394 (FireWire) support
447#
448# CONFIG_IEEE1394 is not set
449
450#
451# I2O device support
452#
453# CONFIG_I2O is not set
454
455#
456# Macintosh device drivers
457#
458# CONFIG_WINDFARM is not set
459
460#
461# Network device support
462#
463CONFIG_NETDEVICES=y
464# CONFIG_DUMMY is not set
465# CONFIG_BONDING is not set
466# CONFIG_EQUALIZER is not set
467# CONFIG_TUN is not set
468
469#
470# ARCnet devices
471#
472# CONFIG_ARCNET is not set
473
474#
475# PHY device support
476#
477CONFIG_PHYLIB=y
478
479#
480# MII PHY device drivers
481#
482# CONFIG_MARVELL_PHY is not set
483# CONFIG_DAVICOM_PHY is not set
484# CONFIG_QSEMI_PHY is not set
485# CONFIG_LXT_PHY is not set
486# CONFIG_CICADA_PHY is not set
487
488#
489# Ethernet (10 or 100Mbit)
490#
491CONFIG_NET_ETHERNET=y
492CONFIG_MII=y
493# CONFIG_HAPPYMEAL is not set
494# CONFIG_SUNGEM is not set
495# CONFIG_CASSINI is not set
496# CONFIG_NET_VENDOR_3COM is not set
497
498#
499# Tulip family network device support
500#
501# CONFIG_NET_TULIP is not set
502# CONFIG_HP100 is not set
503CONFIG_NET_PCI=y
504# CONFIG_PCNET32 is not set
505# CONFIG_AMD8111_ETH is not set
506# CONFIG_ADAPTEC_STARFIRE is not set
507# CONFIG_B44 is not set
508# CONFIG_FORCEDETH is not set
509# CONFIG_DGRS is not set
510# CONFIG_EEPRO100 is not set
511CONFIG_E100=y
512# CONFIG_FEALNX is not set
513# CONFIG_NATSEMI is not set
514# CONFIG_NE2K_PCI is not set
515# CONFIG_8139CP is not set
516# CONFIG_8139TOO is not set
517# CONFIG_SIS900 is not set
518# CONFIG_EPIC100 is not set
519# CONFIG_SUNDANCE is not set
520# CONFIG_TLAN is not set
521# CONFIG_VIA_RHINE is not set
522# CONFIG_FS_ENET is not set
523
524#
525# Ethernet (1000 Mbit)
526#
527# CONFIG_ACENIC is not set
528# CONFIG_DL2K is not set
529# CONFIG_E1000 is not set
530# CONFIG_NS83820 is not set
531# CONFIG_HAMACHI is not set
532# CONFIG_YELLOWFIN is not set
533# CONFIG_R8169 is not set
534# CONFIG_SIS190 is not set
535# CONFIG_SKGE is not set
536# CONFIG_SK98LIN is not set
537# CONFIG_VIA_VELOCITY is not set
538# CONFIG_TIGON3 is not set
539# CONFIG_BNX2 is not set
540CONFIG_GIANFAR=y
541CONFIG_GFAR_NAPI=y
542
543#
544# Ethernet (10000 Mbit)
545#
546# CONFIG_CHELSIO_T1 is not set
547# CONFIG_IXGB is not set
548# CONFIG_S2IO is not set
549
550#
551# Token Ring devices
552#
553# CONFIG_TR is not set
554
555#
556# Wireless LAN (non-hamradio)
557#
558# CONFIG_NET_RADIO is not set
559
560#
561# Wan interfaces
562#
563# CONFIG_WAN is not set
564# CONFIG_FDDI is not set
565# CONFIG_HIPPI is not set
566# CONFIG_PPP is not set
567# CONFIG_SLIP is not set
568# CONFIG_SHAPER is not set
569# CONFIG_NETCONSOLE is not set
570# CONFIG_NETPOLL is not set
571# CONFIG_NET_POLL_CONTROLLER is not set
572
573#
574# ISDN subsystem
575#
576# CONFIG_ISDN is not set
577
578#
579# Telephony Support
580#
581# CONFIG_PHONE is not set
582
583#
584# Input device support
585#
586CONFIG_INPUT=y
587
588#
589# Userland interfaces
590#
591# CONFIG_INPUT_MOUSEDEV is not set
592# CONFIG_INPUT_JOYDEV is not set
593# CONFIG_INPUT_TSDEV is not set
594# CONFIG_INPUT_EVDEV is not set
595# CONFIG_INPUT_EVBUG is not set
596
597#
598# Input Device Drivers
599#
600# CONFIG_INPUT_KEYBOARD is not set
601# CONFIG_INPUT_MOUSE is not set
602# CONFIG_INPUT_JOYSTICK is not set
603# CONFIG_INPUT_TOUCHSCREEN is not set
604# CONFIG_INPUT_MISC is not set
605
606#
607# Hardware I/O ports
608#
609# CONFIG_SERIO is not set
610# CONFIG_GAMEPORT is not set
611
612#
613# Character devices
614#
615# CONFIG_VT is not set
616# CONFIG_SERIAL_NONSTANDARD is not set
617
618#
619# Serial drivers
620#
621CONFIG_SERIAL_8250=y
622CONFIG_SERIAL_8250_CONSOLE=y
623CONFIG_SERIAL_8250_NR_UARTS=4
624# CONFIG_SERIAL_8250_EXTENDED is not set
625
626#
627# Non-8250 serial port support
628#
629CONFIG_SERIAL_CORE=y
630CONFIG_SERIAL_CORE_CONSOLE=y
631CONFIG_SERIAL_CPM=y
632CONFIG_SERIAL_CPM_CONSOLE=y
633CONFIG_SERIAL_CPM_SCC1=y
634# CONFIG_SERIAL_CPM_SCC2 is not set
635# CONFIG_SERIAL_CPM_SCC3 is not set
636# CONFIG_SERIAL_CPM_SCC4 is not set
637# CONFIG_SERIAL_CPM_SMC1 is not set
638# CONFIG_SERIAL_CPM_SMC2 is not set
639# CONFIG_SERIAL_JSM is not set
640CONFIG_UNIX98_PTYS=y
641CONFIG_LEGACY_PTYS=y
642CONFIG_LEGACY_PTY_COUNT=256
643
644#
645# IPMI
646#
647# CONFIG_IPMI_HANDLER is not set
648
649#
650# Watchdog Cards
651#
652# CONFIG_WATCHDOG is not set
653# CONFIG_NVRAM is not set
654CONFIG_GEN_RTC=y
655# CONFIG_GEN_RTC_X is not set
656# CONFIG_DTLK is not set
657# CONFIG_R3964 is not set
658# CONFIG_APPLICOM is not set
659
660#
661# Ftape, the floppy tape device driver
662#
663# CONFIG_AGP is not set
664# CONFIG_DRM is not set
665# CONFIG_RAW_DRIVER is not set
666
667#
668# TPM devices
669#
670# CONFIG_TCG_TPM is not set
671# CONFIG_TELCLOCK is not set
672
673#
674# I2C support
675#
676CONFIG_I2C=y
677CONFIG_I2C_CHARDEV=y
678
679#
680# I2C Algorithms
681#
682# CONFIG_I2C_ALGOBIT is not set
683# CONFIG_I2C_ALGOPCF is not set
684# CONFIG_I2C_ALGOPCA is not set
685
686#
687# I2C Hardware Bus support
688#
689# CONFIG_I2C_ALI1535 is not set
690# CONFIG_I2C_ALI1563 is not set
691# CONFIG_I2C_ALI15X3 is not set
692# CONFIG_I2C_AMD756 is not set
693# CONFIG_I2C_AMD8111 is not set
694# CONFIG_I2C_I801 is not set
695# CONFIG_I2C_I810 is not set
696# CONFIG_I2C_PIIX4 is not set
697CONFIG_I2C_MPC=y
698# CONFIG_I2C_MPC8260 is not set
699# CONFIG_I2C_NFORCE2 is not set
700# CONFIG_I2C_PARPORT_LIGHT is not set
701# CONFIG_I2C_PROSAVAGE is not set
702# CONFIG_I2C_SAVAGE4 is not set
703# CONFIG_SCx200_ACB is not set
704# CONFIG_I2C_SIS5595 is not set
705# CONFIG_I2C_SIS630 is not set
706# CONFIG_I2C_SIS96X is not set
707# CONFIG_I2C_VIA is not set
708# CONFIG_I2C_VIAPRO is not set
709# CONFIG_I2C_VOODOO3 is not set
710# CONFIG_I2C_PCA_ISA is not set
711
712#
713# Miscellaneous I2C Chip support
714#
715CONFIG_SENSORS_DS1337=y
716# CONFIG_SENSORS_DS1374 is not set
717# CONFIG_SENSORS_EEPROM is not set
718# CONFIG_SENSORS_MAX6900 is not set
719# CONFIG_SENSORS_PCF8574 is not set
720# CONFIG_SENSORS_PCF8563 is not set
721# CONFIG_SENSORS_PCA9539 is not set
722# CONFIG_SENSORS_PCF8591 is not set
723# CONFIG_SENSORS_RTC8564 is not set
724# CONFIG_SENSORS_M41T00 is not set
725# CONFIG_SENSORS_MAX6875 is not set
726# CONFIG_RTC_X1205_I2C is not set
727# CONFIG_I2C_DEBUG_CORE is not set
728# CONFIG_I2C_DEBUG_ALGO is not set
729# CONFIG_I2C_DEBUG_BUS is not set
730# CONFIG_I2C_DEBUG_CHIP is not set
731
732#
733# Dallas's 1-wire bus
734#
735# CONFIG_W1 is not set
736
737#
738# Hardware Monitoring support
739#
740CONFIG_HWMON=y
741# CONFIG_HWMON_VID is not set
742# CONFIG_SENSORS_ADM1021 is not set
743# CONFIG_SENSORS_ADM1025 is not set
744# CONFIG_SENSORS_ADM1026 is not set
745# CONFIG_SENSORS_ADM1031 is not set
746# CONFIG_SENSORS_ADM9240 is not set
747# CONFIG_SENSORS_ASB100 is not set
748# CONFIG_SENSORS_ATXP1 is not set
749# CONFIG_SENSORS_DS1621 is not set
750# CONFIG_SENSORS_FSCHER is not set
751# CONFIG_SENSORS_FSCPOS is not set
752# CONFIG_SENSORS_GL518SM is not set
753# CONFIG_SENSORS_GL520SM is not set
754# CONFIG_SENSORS_IT87 is not set
755# CONFIG_SENSORS_LM63 is not set
756CONFIG_SENSORS_LM75=y
757# CONFIG_SENSORS_LM77 is not set
758# CONFIG_SENSORS_LM78 is not set
759# CONFIG_SENSORS_LM80 is not set
760# CONFIG_SENSORS_LM83 is not set
761# CONFIG_SENSORS_LM85 is not set
762# CONFIG_SENSORS_LM87 is not set
763# CONFIG_SENSORS_LM90 is not set
764# CONFIG_SENSORS_LM92 is not set
765# CONFIG_SENSORS_MAX1619 is not set
766# CONFIG_SENSORS_PC87360 is not set
767# CONFIG_SENSORS_SIS5595 is not set
768# CONFIG_SENSORS_SMSC47M1 is not set
769# CONFIG_SENSORS_SMSC47B397 is not set
770# CONFIG_SENSORS_VIA686A is not set
771# CONFIG_SENSORS_W83781D is not set
772# CONFIG_SENSORS_W83792D is not set
773# CONFIG_SENSORS_W83L785TS is not set
774# CONFIG_SENSORS_W83627HF is not set
775# CONFIG_SENSORS_W83627EHF is not set
776CONFIG_HWMON_DEBUG_CHIP=y
777
778#
779# Misc devices
780#
781
782#
783# Multimedia Capabilities Port drivers
784#
785
786#
787# Multimedia devices
788#
789# CONFIG_VIDEO_DEV is not set
790
791#
792# Digital Video Broadcasting Devices
793#
794# CONFIG_DVB is not set
795
796#
797# Graphics support
798#
799# CONFIG_FB is not set
800
801#
802# Sound
803#
804# CONFIG_SOUND is not set
805
806#
807# USB support
808#
809CONFIG_USB_ARCH_HAS_HCD=y
810CONFIG_USB_ARCH_HAS_OHCI=y
811# CONFIG_USB is not set
812
813#
814# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
815#
816
817#
818# USB Gadget Support
819#
820# CONFIG_USB_GADGET is not set
821
822#
823# MMC/SD Card support
824#
825# CONFIG_MMC is not set
826
827#
828# InfiniBand support
829#
830# CONFIG_INFINIBAND is not set
831
832#
833# SN Devices
834#
835
836#
837# File systems
838#
839CONFIG_EXT2_FS=y
840# CONFIG_EXT2_FS_XATTR is not set
841# CONFIG_EXT2_FS_XIP is not set
842CONFIG_EXT3_FS=y
843CONFIG_EXT3_FS_XATTR=y
844# CONFIG_EXT3_FS_POSIX_ACL is not set
845# CONFIG_EXT3_FS_SECURITY is not set
846CONFIG_JBD=y
847# CONFIG_JBD_DEBUG is not set
848CONFIG_FS_MBCACHE=y
849# CONFIG_REISERFS_FS is not set
850# CONFIG_JFS_FS is not set
851# CONFIG_FS_POSIX_ACL is not set
852# CONFIG_XFS_FS is not set
853# CONFIG_MINIX_FS is not set
854# CONFIG_ROMFS_FS is not set
855CONFIG_INOTIFY=y
856# CONFIG_QUOTA is not set
857CONFIG_DNOTIFY=y
858# CONFIG_AUTOFS_FS is not set
859# CONFIG_AUTOFS4_FS is not set
860# CONFIG_FUSE_FS is not set
861
862#
863# CD-ROM/DVD Filesystems
864#
865# CONFIG_ISO9660_FS is not set
866# CONFIG_UDF_FS is not set
867
868#
869# DOS/FAT/NT Filesystems
870#
871# CONFIG_MSDOS_FS is not set
872# CONFIG_VFAT_FS is not set
873# CONFIG_NTFS_FS is not set
874
875#
876# Pseudo filesystems
877#
878CONFIG_PROC_FS=y
879CONFIG_PROC_KCORE=y
880CONFIG_SYSFS=y
881CONFIG_TMPFS=y
882# CONFIG_HUGETLB_PAGE is not set
883CONFIG_RAMFS=y
884# CONFIG_RELAYFS_FS is not set
885
886#
887# Miscellaneous filesystems
888#
889# CONFIG_ADFS_FS is not set
890# CONFIG_AFFS_FS is not set
891# CONFIG_HFS_FS is not set
892# CONFIG_HFSPLUS_FS is not set
893# CONFIG_BEFS_FS is not set
894# CONFIG_BFS_FS is not set
895# CONFIG_EFS_FS is not set
896# CONFIG_JFFS_FS is not set
897CONFIG_JFFS2_FS=y
898CONFIG_JFFS2_FS_DEBUG=0
899CONFIG_JFFS2_FS_WRITEBUFFER=y
900# CONFIG_JFFS2_SUMMARY is not set
901# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
902CONFIG_JFFS2_ZLIB=y
903CONFIG_JFFS2_RTIME=y
904# CONFIG_JFFS2_RUBIN is not set
905CONFIG_CRAMFS=y
906# CONFIG_VXFS_FS is not set
907# CONFIG_HPFS_FS is not set
908# CONFIG_QNX4FS_FS is not set
909# CONFIG_SYSV_FS is not set
910# CONFIG_UFS_FS is not set
911
912#
913# Network File Systems
914#
915CONFIG_NFS_FS=y
916# CONFIG_NFS_V3 is not set
917# CONFIG_NFS_V4 is not set
918# CONFIG_NFS_DIRECTIO is not set
919# CONFIG_NFSD is not set
920CONFIG_ROOT_NFS=y
921CONFIG_LOCKD=y
922CONFIG_NFS_COMMON=y
923CONFIG_SUNRPC=y
924# CONFIG_RPCSEC_GSS_KRB5 is not set
925# CONFIG_RPCSEC_GSS_SPKM3 is not set
926# CONFIG_SMB_FS is not set
927# CONFIG_CIFS is not set
928# CONFIG_NCP_FS is not set
929# CONFIG_CODA_FS is not set
930# CONFIG_AFS_FS is not set
931# CONFIG_9P_FS is not set
932
933#
934# Partition Types
935#
936CONFIG_PARTITION_ADVANCED=y
937# CONFIG_ACORN_PARTITION is not set
938# CONFIG_OSF_PARTITION is not set
939# CONFIG_AMIGA_PARTITION is not set
940# CONFIG_ATARI_PARTITION is not set
941# CONFIG_MAC_PARTITION is not set
942# CONFIG_MSDOS_PARTITION is not set
943# CONFIG_LDM_PARTITION is not set
944# CONFIG_SGI_PARTITION is not set
945# CONFIG_ULTRIX_PARTITION is not set
946# CONFIG_SUN_PARTITION is not set
947# CONFIG_EFI_PARTITION is not set
948
949#
950# Native Language Support
951#
952# CONFIG_NLS is not set
953# CONFIG_SCC_ENET is not set
954# CONFIG_FEC_ENET is not set
955
956#
957# CPM2 Options
958#
959
960#
961# Library routines
962#
963# CONFIG_CRC_CCITT is not set
964# CONFIG_CRC16 is not set
965CONFIG_CRC32=y
966# CONFIG_LIBCRC32C is not set
967CONFIG_ZLIB_INFLATE=y
968CONFIG_ZLIB_DEFLATE=y
969# CONFIG_PROFILING is not set
970
971#
972# Kernel hacking
973#
974# CONFIG_PRINTK_TIME is not set
975# CONFIG_DEBUG_KERNEL is not set
976CONFIG_LOG_BUF_SHIFT=14
977# CONFIG_KGDB_CONSOLE is not set
978
979#
980# Security options
981#
982# CONFIG_KEYS is not set
983# CONFIG_SECURITY is not set
984
985#
986# Cryptographic options
987#
988# CONFIG_CRYPTO is not set
989
990#
991# Hardware crypto devices
992#
diff --git a/arch/ppc/configs/mpc834x_sys_defconfig b/arch/ppc/configs/mpc834x_sys_defconfig
deleted file mode 100644
index d90c8a7e060c..000000000000
--- a/arch/ppc/configs/mpc834x_sys_defconfig
+++ /dev/null
@@ -1,844 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.14
4# Mon Nov 7 15:38:29 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_PPC=y
11CONFIG_PPC32=y
12CONFIG_GENERIC_NVRAM=y
13CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
14CONFIG_ARCH_MAY_HAVE_PC_FDC=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_LOCALVERSION_AUTO=y
29CONFIG_SWAP=y
30CONFIG_SYSVIPC=y
31# CONFIG_POSIX_MQUEUE is not set
32# CONFIG_BSD_PROCESS_ACCT is not set
33CONFIG_SYSCTL=y
34# CONFIG_AUDIT is not set
35# CONFIG_HOTPLUG is not set
36CONFIG_KOBJECT_UEVENT=y
37# CONFIG_IKCONFIG is not set
38CONFIG_INITRAMFS_SOURCE=""
39CONFIG_EMBEDDED=y
40# CONFIG_KALLSYMS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45# CONFIG_EPOLL is not set
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58# CONFIG_MODULES is not set
59
60#
61# Processor
62#
63CONFIG_6xx=y
64# CONFIG_40x is not set
65# CONFIG_44x is not set
66# CONFIG_POWER3 is not set
67# CONFIG_POWER4 is not set
68# CONFIG_8xx is not set
69# CONFIG_E200 is not set
70# CONFIG_E500 is not set
71CONFIG_PPC_FPU=y
72# CONFIG_KEXEC is not set
73# CONFIG_CPU_FREQ is not set
74# CONFIG_WANT_EARLY_SERIAL is not set
75CONFIG_PPC_GEN550=y
76CONFIG_PPC_STD_MMU=y
77
78#
79# Platform options
80#
81# CONFIG_PPC_MULTIPLATFORM is not set
82# CONFIG_APUS is not set
83# CONFIG_KATANA is not set
84# CONFIG_WILLOW is not set
85# CONFIG_CPCI690 is not set
86# CONFIG_POWERPMC250 is not set
87# CONFIG_CHESTNUT is not set
88# CONFIG_SPRUCE is not set
89# CONFIG_HDPU is not set
90# CONFIG_EV64260 is not set
91# CONFIG_LOPEC is not set
92# CONFIG_MVME5100 is not set
93# CONFIG_PPLUS is not set
94# CONFIG_PRPMC750 is not set
95# CONFIG_PRPMC800 is not set
96# CONFIG_SANDPOINT is not set
97# CONFIG_RADSTONE_PPC7D is not set
98# CONFIG_PAL4 is not set
99# CONFIG_GEMINI is not set
100# CONFIG_EST8260 is not set
101# CONFIG_SBC82xx is not set
102# CONFIG_SBS8260 is not set
103# CONFIG_RPX8260 is not set
104# CONFIG_TQM8260 is not set
105# CONFIG_ADS8272 is not set
106# CONFIG_PQ2FADS is not set
107# CONFIG_LITE5200 is not set
108CONFIG_MPC834x_SYS=y
109# CONFIG_EV64360 is not set
110CONFIG_83xx=y
111CONFIG_MPC834x=y
112# CONFIG_SMP is not set
113# CONFIG_HIGHMEM is not set
114# CONFIG_HZ_100 is not set
115CONFIG_HZ_250=y
116# CONFIG_HZ_1000 is not set
117CONFIG_HZ=250
118CONFIG_PREEMPT_NONE=y
119# CONFIG_PREEMPT_VOLUNTARY is not set
120# CONFIG_PREEMPT is not set
121CONFIG_SELECT_MEMORY_MODEL=y
122CONFIG_FLATMEM_MANUAL=y
123# CONFIG_DISCONTIGMEM_MANUAL is not set
124# CONFIG_SPARSEMEM_MANUAL is not set
125CONFIG_FLATMEM=y
126CONFIG_FLAT_NODE_MEM_MAP=y
127# CONFIG_SPARSEMEM_STATIC is not set
128CONFIG_SPLIT_PTLOCK_CPUS=4
129CONFIG_BINFMT_ELF=y
130# CONFIG_BINFMT_MISC is not set
131# CONFIG_CMDLINE_BOOL is not set
132# CONFIG_PM is not set
133# CONFIG_HIBERNATION is not set
134CONFIG_SECCOMP=y
135CONFIG_ISA_DMA_API=y
136
137#
138# Bus options
139#
140CONFIG_GENERIC_ISA_DMA=y
141# CONFIG_PPC_I8259 is not set
142CONFIG_PPC_INDIRECT_PCI=y
143CONFIG_PCI=y
144CONFIG_PCI_DOMAINS=y
145# CONFIG_MPC83xx_PCI2 is not set
146CONFIG_PCI_LEGACY_PROC=y
147
148#
149# PCCARD (PCMCIA/CardBus) support
150#
151# CONFIG_PCCARD is not set
152
153#
154# Advanced setup
155#
156# CONFIG_ADVANCED_OPTIONS is not set
157
158#
159# Default settings for advanced configuration options are used
160#
161CONFIG_HIGHMEM_START=0xfe000000
162CONFIG_LOWMEM_SIZE=0x30000000
163CONFIG_KERNEL_START=0xc0000000
164CONFIG_TASK_SIZE=0x80000000
165CONFIG_BOOT_LOAD=0x00800000
166
167#
168# Networking
169#
170CONFIG_NET=y
171
172#
173# Networking options
174#
175CONFIG_PACKET=y
176# CONFIG_PACKET_MMAP is not set
177CONFIG_UNIX=y
178# CONFIG_NET_KEY is not set
179CONFIG_INET=y
180CONFIG_IP_MULTICAST=y
181# CONFIG_IP_ADVANCED_ROUTER is not set
182CONFIG_IP_FIB_HASH=y
183CONFIG_IP_PNP=y
184CONFIG_IP_PNP_DHCP=y
185CONFIG_IP_PNP_BOOTP=y
186# CONFIG_IP_PNP_RARP is not set
187# CONFIG_NET_IPIP is not set
188# CONFIG_NET_IPGRE is not set
189# CONFIG_IP_MROUTE is not set
190# CONFIG_ARPD is not set
191CONFIG_SYN_COOKIES=y
192# CONFIG_INET_AH is not set
193# CONFIG_INET_ESP is not set
194# CONFIG_INET_IPCOMP is not set
195# CONFIG_INET_TUNNEL is not set
196CONFIG_INET_DIAG=y
197CONFIG_INET_TCP_DIAG=y
198# CONFIG_TCP_CONG_ADVANCED is not set
199CONFIG_TCP_CONG_BIC=y
200# CONFIG_IPV6 is not set
201# CONFIG_NETFILTER is not set
202
203#
204# DCCP Configuration (EXPERIMENTAL)
205#
206# CONFIG_IP_DCCP is not set
207
208#
209# SCTP Configuration (EXPERIMENTAL)
210#
211# CONFIG_IP_SCTP is not set
212# CONFIG_ATM is not set
213# CONFIG_BRIDGE is not set
214# CONFIG_VLAN_8021Q is not set
215# CONFIG_DECNET is not set
216# CONFIG_LLC2 is not set
217# CONFIG_IPX is not set
218# CONFIG_ATALK is not set
219# CONFIG_X25 is not set
220# CONFIG_LAPB is not set
221# CONFIG_NET_DIVERT is not set
222# CONFIG_ECONET is not set
223# CONFIG_WAN_ROUTER is not set
224# CONFIG_NET_SCHED is not set
225# CONFIG_NET_CLS_ROUTE is not set
226
227#
228# Network testing
229#
230# CONFIG_NET_PKTGEN is not set
231# CONFIG_HAMRADIO is not set
232# CONFIG_IRDA is not set
233# CONFIG_BT is not set
234# CONFIG_IEEE80211 is not set
235
236#
237# Device Drivers
238#
239
240#
241# Generic Driver Options
242#
243CONFIG_STANDALONE=y
244CONFIG_PREVENT_FIRMWARE_BUILD=y
245# CONFIG_FW_LOADER is not set
246
247#
248# Connector - unified userspace <-> kernelspace linker
249#
250# CONFIG_CONNECTOR is not set
251
252#
253# Memory Technology Devices (MTD)
254#
255# CONFIG_MTD is not set
256
257#
258# Parallel port support
259#
260# CONFIG_PARPORT is not set
261
262#
263# Plug and Play support
264#
265
266#
267# Block devices
268#
269# CONFIG_BLK_DEV_FD is not set
270# CONFIG_BLK_CPQ_DA is not set
271# CONFIG_BLK_CPQ_CISS_DA is not set
272# CONFIG_BLK_DEV_DAC960 is not set
273# CONFIG_BLK_DEV_UMEM is not set
274# CONFIG_BLK_DEV_COW_COMMON is not set
275CONFIG_BLK_DEV_LOOP=y
276# CONFIG_BLK_DEV_CRYPTOLOOP is not set
277# CONFIG_BLK_DEV_NBD is not set
278# CONFIG_BLK_DEV_SX8 is not set
279CONFIG_BLK_DEV_RAM=y
280CONFIG_BLK_DEV_RAM_COUNT=16
281CONFIG_BLK_DEV_RAM_SIZE=32768
282CONFIG_BLK_DEV_INITRD=y
283# CONFIG_LBD is not set
284# CONFIG_CDROM_PKTCDVD is not set
285
286#
287# IO Schedulers
288#
289CONFIG_IOSCHED_NOOP=y
290CONFIG_IOSCHED_AS=y
291CONFIG_IOSCHED_DEADLINE=y
292CONFIG_IOSCHED_CFQ=y
293CONFIG_DEFAULT_AS=y
294# CONFIG_DEFAULT_DEADLINE is not set
295# CONFIG_DEFAULT_CFQ is not set
296# CONFIG_DEFAULT_NOOP is not set
297CONFIG_DEFAULT_IOSCHED="anticipatory"
298# CONFIG_ATA_OVER_ETH is not set
299
300#
301# ATA/ATAPI/MFM/RLL support
302#
303# CONFIG_IDE is not set
304
305#
306# SCSI device support
307#
308# CONFIG_RAID_ATTRS is not set
309# CONFIG_SCSI is not set
310
311#
312# Multi-device support (RAID and LVM)
313#
314# CONFIG_MD is not set
315
316#
317# Fusion MPT device support
318#
319# CONFIG_FUSION is not set
320
321#
322# IEEE 1394 (FireWire) support
323#
324# CONFIG_IEEE1394 is not set
325
326#
327# I2O device support
328#
329# CONFIG_I2O is not set
330
331#
332# Macintosh device drivers
333#
334
335#
336# Network device support
337#
338CONFIG_NETDEVICES=y
339# CONFIG_DUMMY is not set
340# CONFIG_BONDING is not set
341# CONFIG_EQUALIZER is not set
342# CONFIG_TUN is not set
343
344#
345# ARCnet devices
346#
347# CONFIG_ARCNET is not set
348
349#
350# PHY device support
351#
352CONFIG_PHYLIB=y
353
354#
355# MII PHY device drivers
356#
357CONFIG_MARVELL_PHY=y
358# CONFIG_DAVICOM_PHY is not set
359# CONFIG_QSEMI_PHY is not set
360# CONFIG_LXT_PHY is not set
361# CONFIG_CICADA_PHY is not set
362
363#
364# Ethernet (10 or 100Mbit)
365#
366CONFIG_NET_ETHERNET=y
367CONFIG_MII=y
368# CONFIG_HAPPYMEAL is not set
369# CONFIG_SUNGEM is not set
370# CONFIG_CASSINI is not set
371# CONFIG_NET_VENDOR_3COM is not set
372
373#
374# Tulip family network device support
375#
376# CONFIG_NET_TULIP is not set
377# CONFIG_HP100 is not set
378CONFIG_NET_PCI=y
379# CONFIG_PCNET32 is not set
380# CONFIG_AMD8111_ETH is not set
381# CONFIG_ADAPTEC_STARFIRE is not set
382# CONFIG_B44 is not set
383# CONFIG_FORCEDETH is not set
384# CONFIG_DGRS is not set
385# CONFIG_EEPRO100 is not set
386CONFIG_E100=y
387# CONFIG_FEALNX is not set
388# CONFIG_NATSEMI is not set
389# CONFIG_NE2K_PCI is not set
390# CONFIG_8139CP is not set
391# CONFIG_8139TOO is not set
392# CONFIG_SIS900 is not set
393# CONFIG_EPIC100 is not set
394# CONFIG_SUNDANCE is not set
395# CONFIG_TLAN is not set
396# CONFIG_VIA_RHINE is not set
397
398#
399# Ethernet (1000 Mbit)
400#
401# CONFIG_ACENIC is not set
402# CONFIG_DL2K is not set
403CONFIG_E1000=y
404# CONFIG_E1000_NAPI is not set
405# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
406# CONFIG_NS83820 is not set
407# CONFIG_HAMACHI is not set
408# CONFIG_YELLOWFIN is not set
409# CONFIG_R8169 is not set
410# CONFIG_SIS190 is not set
411# CONFIG_SKGE is not set
412# CONFIG_SK98LIN is not set
413# CONFIG_VIA_VELOCITY is not set
414# CONFIG_TIGON3 is not set
415# CONFIG_BNX2 is not set
416CONFIG_GIANFAR=y
417# CONFIG_GFAR_NAPI is not set
418
419#
420# Ethernet (10000 Mbit)
421#
422# CONFIG_CHELSIO_T1 is not set
423# CONFIG_IXGB is not set
424# CONFIG_S2IO is not set
425
426#
427# Token Ring devices
428#
429# CONFIG_TR is not set
430
431#
432# Wireless LAN (non-hamradio)
433#
434# CONFIG_NET_RADIO is not set
435
436#
437# Wan interfaces
438#
439# CONFIG_WAN is not set
440# CONFIG_FDDI is not set
441# CONFIG_HIPPI is not set
442# CONFIG_PPP is not set
443# CONFIG_SLIP is not set
444# CONFIG_SHAPER is not set
445# CONFIG_NETCONSOLE is not set
446# CONFIG_NETPOLL is not set
447# CONFIG_NET_POLL_CONTROLLER is not set
448
449#
450# ISDN subsystem
451#
452# CONFIG_ISDN is not set
453
454#
455# Telephony Support
456#
457# CONFIG_PHONE is not set
458
459#
460# Input device support
461#
462CONFIG_INPUT=y
463
464#
465# Userland interfaces
466#
467# CONFIG_INPUT_MOUSEDEV is not set
468# CONFIG_INPUT_JOYDEV is not set
469# CONFIG_INPUT_TSDEV is not set
470# CONFIG_INPUT_EVDEV is not set
471# CONFIG_INPUT_EVBUG is not set
472
473#
474# Input Device Drivers
475#
476# CONFIG_INPUT_KEYBOARD is not set
477# CONFIG_INPUT_MOUSE is not set
478# CONFIG_INPUT_JOYSTICK is not set
479# CONFIG_INPUT_TOUCHSCREEN is not set
480# CONFIG_INPUT_MISC is not set
481
482#
483# Hardware I/O ports
484#
485# CONFIG_SERIO is not set
486# CONFIG_GAMEPORT is not set
487
488#
489# Character devices
490#
491# CONFIG_VT is not set
492# CONFIG_SERIAL_NONSTANDARD is not set
493
494#
495# Serial drivers
496#
497CONFIG_SERIAL_8250=y
498CONFIG_SERIAL_8250_CONSOLE=y
499CONFIG_SERIAL_8250_NR_UARTS=4
500# CONFIG_SERIAL_8250_EXTENDED is not set
501
502#
503# Non-8250 serial port support
504#
505CONFIG_SERIAL_CORE=y
506CONFIG_SERIAL_CORE_CONSOLE=y
507# CONFIG_SERIAL_JSM is not set
508CONFIG_UNIX98_PTYS=y
509CONFIG_LEGACY_PTYS=y
510CONFIG_LEGACY_PTY_COUNT=256
511
512#
513# IPMI
514#
515# CONFIG_IPMI_HANDLER is not set
516
517#
518# Watchdog Cards
519#
520# CONFIG_WATCHDOG is not set
521# CONFIG_NVRAM is not set
522CONFIG_GEN_RTC=y
523# CONFIG_GEN_RTC_X is not set
524# CONFIG_DTLK is not set
525# CONFIG_R3964 is not set
526# CONFIG_APPLICOM is not set
527
528#
529# Ftape, the floppy tape device driver
530#
531# CONFIG_AGP is not set
532# CONFIG_DRM is not set
533# CONFIG_RAW_DRIVER is not set
534
535#
536# TPM devices
537#
538# CONFIG_TCG_TPM is not set
539# CONFIG_TELCLOCK is not set
540
541#
542# I2C support
543#
544CONFIG_I2C=y
545CONFIG_I2C_CHARDEV=y
546
547#
548# I2C Algorithms
549#
550# CONFIG_I2C_ALGOBIT is not set
551# CONFIG_I2C_ALGOPCF is not set
552# CONFIG_I2C_ALGOPCA is not set
553
554#
555# I2C Hardware Bus support
556#
557# CONFIG_I2C_ALI1535 is not set
558# CONFIG_I2C_ALI1563 is not set
559# CONFIG_I2C_ALI15X3 is not set
560# CONFIG_I2C_AMD756 is not set
561# CONFIG_I2C_AMD8111 is not set
562# CONFIG_I2C_I801 is not set
563# CONFIG_I2C_I810 is not set
564# CONFIG_I2C_PIIX4 is not set
565CONFIG_I2C_MPC=y
566# CONFIG_I2C_NFORCE2 is not set
567# CONFIG_I2C_PARPORT_LIGHT is not set
568# CONFIG_I2C_PROSAVAGE is not set
569# CONFIG_I2C_SAVAGE4 is not set
570# CONFIG_SCx200_ACB is not set
571# CONFIG_I2C_SIS5595 is not set
572# CONFIG_I2C_SIS630 is not set
573# CONFIG_I2C_SIS96X is not set
574# CONFIG_I2C_VIA is not set
575# CONFIG_I2C_VIAPRO is not set
576# CONFIG_I2C_VOODOO3 is not set
577# CONFIG_I2C_PCA_ISA is not set
578
579#
580# Miscellaneous I2C Chip support
581#
582# CONFIG_SENSORS_DS1337 is not set
583# CONFIG_SENSORS_DS1374 is not set
584# CONFIG_SENSORS_EEPROM is not set
585# CONFIG_SENSORS_PCF8574 is not set
586# CONFIG_SENSORS_PCA9539 is not set
587# CONFIG_SENSORS_PCF8591 is not set
588# CONFIG_SENSORS_RTC8564 is not set
589# CONFIG_SENSORS_M41T00 is not set
590# CONFIG_SENSORS_MAX6875 is not set
591# CONFIG_RTC_X1205_I2C is not set
592# CONFIG_I2C_DEBUG_CORE is not set
593# CONFIG_I2C_DEBUG_ALGO is not set
594# CONFIG_I2C_DEBUG_BUS is not set
595# CONFIG_I2C_DEBUG_CHIP is not set
596
597#
598# Dallas's 1-wire bus
599#
600# CONFIG_W1 is not set
601
602#
603# Hardware Monitoring support
604#
605CONFIG_HWMON=y
606# CONFIG_HWMON_VID is not set
607# CONFIG_SENSORS_ADM1021 is not set
608# CONFIG_SENSORS_ADM1025 is not set
609# CONFIG_SENSORS_ADM1026 is not set
610# CONFIG_SENSORS_ADM1031 is not set
611# CONFIG_SENSORS_ADM9240 is not set
612# CONFIG_SENSORS_ASB100 is not set
613# CONFIG_SENSORS_ATXP1 is not set
614# CONFIG_SENSORS_DS1621 is not set
615# CONFIG_SENSORS_FSCHER is not set
616# CONFIG_SENSORS_FSCPOS is not set
617# CONFIG_SENSORS_GL518SM is not set
618# CONFIG_SENSORS_GL520SM is not set
619# CONFIG_SENSORS_IT87 is not set
620# CONFIG_SENSORS_LM63 is not set
621# CONFIG_SENSORS_LM75 is not set
622# CONFIG_SENSORS_LM77 is not set
623# CONFIG_SENSORS_LM78 is not set
624# CONFIG_SENSORS_LM80 is not set
625# CONFIG_SENSORS_LM83 is not set
626# CONFIG_SENSORS_LM85 is not set
627# CONFIG_SENSORS_LM87 is not set
628# CONFIG_SENSORS_LM90 is not set
629# CONFIG_SENSORS_LM92 is not set
630# CONFIG_SENSORS_MAX1619 is not set
631# CONFIG_SENSORS_PC87360 is not set
632# CONFIG_SENSORS_SIS5595 is not set
633# CONFIG_SENSORS_SMSC47M1 is not set
634# CONFIG_SENSORS_SMSC47B397 is not set
635# CONFIG_SENSORS_VIA686A is not set
636# CONFIG_SENSORS_W83781D is not set
637# CONFIG_SENSORS_W83792D is not set
638# CONFIG_SENSORS_W83L785TS is not set
639# CONFIG_SENSORS_W83627HF is not set
640# CONFIG_SENSORS_W83627EHF is not set
641# CONFIG_HWMON_DEBUG_CHIP is not set
642
643#
644# Misc devices
645#
646
647#
648# Multimedia Capabilities Port drivers
649#
650
651#
652# Multimedia devices
653#
654# CONFIG_VIDEO_DEV is not set
655
656#
657# Digital Video Broadcasting Devices
658#
659# CONFIG_DVB is not set
660
661#
662# Graphics support
663#
664# CONFIG_FB is not set
665
666#
667# Sound
668#
669# CONFIG_SOUND is not set
670
671#
672# USB support
673#
674CONFIG_USB_ARCH_HAS_HCD=y
675CONFIG_USB_ARCH_HAS_OHCI=y
676# CONFIG_USB is not set
677
678#
679# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
680#
681
682#
683# USB Gadget Support
684#
685# CONFIG_USB_GADGET is not set
686
687#
688# MMC/SD Card support
689#
690# CONFIG_MMC is not set
691
692#
693# InfiniBand support
694#
695# CONFIG_INFINIBAND is not set
696
697#
698# SN Devices
699#
700
701#
702# File systems
703#
704CONFIG_EXT2_FS=y
705# CONFIG_EXT2_FS_XATTR is not set
706# CONFIG_EXT2_FS_XIP is not set
707CONFIG_EXT3_FS=y
708CONFIG_EXT3_FS_XATTR=y
709# CONFIG_EXT3_FS_POSIX_ACL is not set
710# CONFIG_EXT3_FS_SECURITY is not set
711CONFIG_JBD=y
712# CONFIG_JBD_DEBUG is not set
713CONFIG_FS_MBCACHE=y
714# CONFIG_REISERFS_FS is not set
715# CONFIG_JFS_FS is not set
716# CONFIG_FS_POSIX_ACL is not set
717# CONFIG_XFS_FS is not set
718# CONFIG_MINIX_FS is not set
719# CONFIG_ROMFS_FS is not set
720CONFIG_INOTIFY=y
721# CONFIG_QUOTA is not set
722CONFIG_DNOTIFY=y
723# CONFIG_AUTOFS_FS is not set
724# CONFIG_AUTOFS4_FS is not set
725# CONFIG_FUSE_FS is not set
726
727#
728# CD-ROM/DVD Filesystems
729#
730# CONFIG_ISO9660_FS is not set
731# CONFIG_UDF_FS is not set
732
733#
734# DOS/FAT/NT Filesystems
735#
736# CONFIG_MSDOS_FS is not set
737# CONFIG_VFAT_FS is not set
738# CONFIG_NTFS_FS is not set
739
740#
741# Pseudo filesystems
742#
743CONFIG_PROC_FS=y
744CONFIG_PROC_KCORE=y
745CONFIG_SYSFS=y
746CONFIG_TMPFS=y
747# CONFIG_HUGETLB_PAGE is not set
748CONFIG_RAMFS=y
749# CONFIG_RELAYFS_FS is not set
750
751#
752# Miscellaneous filesystems
753#
754# CONFIG_ADFS_FS is not set
755# CONFIG_AFFS_FS is not set
756# CONFIG_HFS_FS is not set
757# CONFIG_HFSPLUS_FS is not set
758# CONFIG_BEFS_FS is not set
759# CONFIG_BFS_FS is not set
760# CONFIG_EFS_FS is not set
761# CONFIG_CRAMFS is not set
762# CONFIG_VXFS_FS is not set
763# CONFIG_HPFS_FS is not set
764# CONFIG_QNX4FS_FS is not set
765# CONFIG_SYSV_FS is not set
766# CONFIG_UFS_FS is not set
767
768#
769# Network File Systems
770#
771CONFIG_NFS_FS=y
772# CONFIG_NFS_V3 is not set
773# CONFIG_NFS_V4 is not set
774# CONFIG_NFS_DIRECTIO is not set
775# CONFIG_NFSD is not set
776CONFIG_ROOT_NFS=y
777CONFIG_LOCKD=y
778CONFIG_NFS_COMMON=y
779CONFIG_SUNRPC=y
780# CONFIG_RPCSEC_GSS_KRB5 is not set
781# CONFIG_RPCSEC_GSS_SPKM3 is not set
782# CONFIG_SMB_FS is not set
783# CONFIG_CIFS is not set
784# CONFIG_NCP_FS is not set
785# CONFIG_CODA_FS is not set
786# CONFIG_AFS_FS is not set
787# CONFIG_9P_FS is not set
788
789#
790# Partition Types
791#
792CONFIG_PARTITION_ADVANCED=y
793# CONFIG_ACORN_PARTITION is not set
794# CONFIG_OSF_PARTITION is not set
795# CONFIG_AMIGA_PARTITION is not set
796# CONFIG_ATARI_PARTITION is not set
797# CONFIG_MAC_PARTITION is not set
798# CONFIG_MSDOS_PARTITION is not set
799# CONFIG_LDM_PARTITION is not set
800# CONFIG_SGI_PARTITION is not set
801# CONFIG_ULTRIX_PARTITION is not set
802# CONFIG_SUN_PARTITION is not set
803# CONFIG_EFI_PARTITION is not set
804
805#
806# Native Language Support
807#
808# CONFIG_NLS is not set
809
810#
811# Library routines
812#
813# CONFIG_CRC_CCITT is not set
814# CONFIG_CRC16 is not set
815CONFIG_CRC32=y
816# CONFIG_LIBCRC32C is not set
817
818#
819# Profiling support
820#
821# CONFIG_PROFILING is not set
822
823#
824# Kernel hacking
825#
826# CONFIG_PRINTK_TIME is not set
827# CONFIG_DEBUG_KERNEL is not set
828CONFIG_LOG_BUF_SHIFT=14
829# CONFIG_SERIAL_TEXT_DEBUG is not set
830
831#
832# Security options
833#
834# CONFIG_KEYS is not set
835# CONFIG_SECURITY is not set
836
837#
838# Cryptographic options
839#
840# CONFIG_CRYPTO is not set
841
842#
843# Hardware crypto devices
844#
diff --git a/arch/ppc/configs/mpc8540_ads_defconfig b/arch/ppc/configs/mpc8540_ads_defconfig
deleted file mode 100644
index bf676ebd99ab..000000000000
--- a/arch/ppc/configs/mpc8540_ads_defconfig
+++ /dev/null
@@ -1,706 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.11-rc1
4# Thu Jan 20 01:23:13 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14
15#
16# Code maturity level options
17#
18CONFIG_EXPERIMENTAL=y
19CONFIG_CLEAN_COMPILE=y
20CONFIG_BROKEN_ON_SMP=y
21
22#
23# General setup
24#
25CONFIG_LOCALVERSION=""
26CONFIG_SWAP=y
27CONFIG_SYSVIPC=y
28# CONFIG_POSIX_MQUEUE is not set
29# CONFIG_BSD_PROCESS_ACCT is not set
30CONFIG_SYSCTL=y
31# CONFIG_AUDIT is not set
32CONFIG_LOG_BUF_SHIFT=14
33# CONFIG_HOTPLUG is not set
34CONFIG_KOBJECT_UEVENT=y
35# CONFIG_IKCONFIG is not set
36CONFIG_EMBEDDED=y
37# CONFIG_KALLSYMS is not set
38CONFIG_FUTEX=y
39# CONFIG_EPOLL is not set
40# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
41CONFIG_SHMEM=y
42CONFIG_CC_ALIGN_FUNCTIONS=0
43CONFIG_CC_ALIGN_LABELS=0
44CONFIG_CC_ALIGN_LOOPS=0
45CONFIG_CC_ALIGN_JUMPS=0
46# CONFIG_TINY_SHMEM is not set
47
48#
49# Loadable module support
50#
51# CONFIG_MODULES is not set
52
53#
54# Processor
55#
56# CONFIG_6xx is not set
57# CONFIG_40x is not set
58# CONFIG_44x is not set
59# CONFIG_POWER3 is not set
60# CONFIG_POWER4 is not set
61# CONFIG_8xx is not set
62CONFIG_E500=y
63CONFIG_BOOKE=y
64CONFIG_FSL_BOOKE=y
65CONFIG_SPE=y
66CONFIG_MATH_EMULATION=y
67# CONFIG_CPU_FREQ is not set
68CONFIG_PPC_GEN550=y
69CONFIG_85xx=y
70CONFIG_PPC_INDIRECT_PCI_BE=y
71
72#
73# Freescale 85xx options
74#
75CONFIG_MPC8540_ADS=y
76# CONFIG_MPC8555_CDS is not set
77# CONFIG_MPC8560_ADS is not set
78# CONFIG_SBC8560 is not set
79CONFIG_MPC8540=y
80
81#
82# Platform options
83#
84# CONFIG_SMP is not set
85# CONFIG_PREEMPT is not set
86# CONFIG_HIGHMEM is not set
87CONFIG_BINFMT_ELF=y
88# CONFIG_BINFMT_MISC is not set
89# CONFIG_CMDLINE_BOOL is not set
90
91#
92# Bus options
93#
94CONFIG_PCI=y
95CONFIG_PCI_DOMAINS=y
96# CONFIG_PCI_LEGACY_PROC is not set
97CONFIG_PCI_NAMES=y
98
99#
100# PCCARD (PCMCIA/CardBus) support
101#
102# CONFIG_PCCARD is not set
103
104#
105# PC-card bridges
106#
107
108#
109# Advanced setup
110#
111# CONFIG_ADVANCED_OPTIONS is not set
112
113#
114# Default settings for advanced configuration options are used
115#
116CONFIG_HIGHMEM_START=0xfe000000
117CONFIG_LOWMEM_SIZE=0x30000000
118CONFIG_KERNEL_START=0xc0000000
119CONFIG_TASK_SIZE=0x80000000
120CONFIG_BOOT_LOAD=0x00800000
121
122#
123# Device Drivers
124#
125
126#
127# Generic Driver Options
128#
129CONFIG_STANDALONE=y
130CONFIG_PREVENT_FIRMWARE_BUILD=y
131# CONFIG_FW_LOADER is not set
132
133#
134# Memory Technology Devices (MTD)
135#
136# CONFIG_MTD is not set
137
138#
139# Parallel port support
140#
141# CONFIG_PARPORT is not set
142
143#
144# Plug and Play support
145#
146
147#
148# Block devices
149#
150# CONFIG_BLK_DEV_FD is not set
151# CONFIG_BLK_CPQ_DA is not set
152# CONFIG_BLK_CPQ_CISS_DA is not set
153# CONFIG_BLK_DEV_DAC960 is not set
154# CONFIG_BLK_DEV_UMEM is not set
155# CONFIG_BLK_DEV_COW_COMMON is not set
156CONFIG_BLK_DEV_LOOP=y
157# CONFIG_BLK_DEV_CRYPTOLOOP is not set
158# CONFIG_BLK_DEV_NBD is not set
159# CONFIG_BLK_DEV_SX8 is not set
160CONFIG_BLK_DEV_RAM=y
161CONFIG_BLK_DEV_RAM_COUNT=16
162CONFIG_BLK_DEV_RAM_SIZE=32768
163CONFIG_BLK_DEV_INITRD=y
164CONFIG_INITRAMFS_SOURCE=""
165# CONFIG_LBD is not set
166# CONFIG_CDROM_PKTCDVD is not set
167
168#
169# IO Schedulers
170#
171CONFIG_IOSCHED_NOOP=y
172CONFIG_IOSCHED_AS=y
173CONFIG_IOSCHED_DEADLINE=y
174CONFIG_IOSCHED_CFQ=y
175# CONFIG_ATA_OVER_ETH is not set
176
177#
178# ATA/ATAPI/MFM/RLL support
179#
180# CONFIG_IDE is not set
181
182#
183# SCSI device support
184#
185# CONFIG_SCSI is not set
186
187#
188# Multi-device support (RAID and LVM)
189#
190# CONFIG_MD is not set
191
192#
193# Fusion MPT device support
194#
195
196#
197# IEEE 1394 (FireWire) support
198#
199# CONFIG_IEEE1394 is not set
200
201#
202# I2O device support
203#
204# CONFIG_I2O is not set
205
206#
207# Macintosh device drivers
208#
209
210#
211# Networking support
212#
213CONFIG_NET=y
214
215#
216# Networking options
217#
218CONFIG_PACKET=y
219# CONFIG_PACKET_MMAP is not set
220# CONFIG_NETLINK_DEV is not set
221CONFIG_UNIX=y
222# CONFIG_NET_KEY is not set
223CONFIG_INET=y
224CONFIG_IP_MULTICAST=y
225# CONFIG_IP_ADVANCED_ROUTER is not set
226CONFIG_IP_PNP=y
227CONFIG_IP_PNP_DHCP=y
228CONFIG_IP_PNP_BOOTP=y
229# CONFIG_IP_PNP_RARP is not set
230# CONFIG_NET_IPIP is not set
231# CONFIG_NET_IPGRE is not set
232# CONFIG_IP_MROUTE is not set
233# CONFIG_ARPD is not set
234CONFIG_SYN_COOKIES=y
235# CONFIG_INET_AH is not set
236# CONFIG_INET_ESP is not set
237# CONFIG_INET_IPCOMP is not set
238# CONFIG_INET_TUNNEL is not set
239CONFIG_IP_TCPDIAG=y
240# CONFIG_IP_TCPDIAG_IPV6 is not set
241# CONFIG_IPV6 is not set
242# CONFIG_NETFILTER is not set
243
244#
245# SCTP Configuration (EXPERIMENTAL)
246#
247# CONFIG_IP_SCTP is not set
248# CONFIG_ATM is not set
249# CONFIG_BRIDGE is not set
250# CONFIG_VLAN_8021Q is not set
251# CONFIG_DECNET is not set
252# CONFIG_LLC2 is not set
253# CONFIG_IPX is not set
254# CONFIG_ATALK is not set
255# CONFIG_X25 is not set
256# CONFIG_LAPB is not set
257# CONFIG_NET_DIVERT is not set
258# CONFIG_ECONET is not set
259# CONFIG_WAN_ROUTER is not set
260
261#
262# QoS and/or fair queueing
263#
264# CONFIG_NET_SCHED is not set
265# CONFIG_NET_CLS_ROUTE is not set
266
267#
268# Network testing
269#
270# CONFIG_NET_PKTGEN is not set
271# CONFIG_NETPOLL is not set
272# CONFIG_NET_POLL_CONTROLLER is not set
273# CONFIG_HAMRADIO is not set
274# CONFIG_IRDA is not set
275# CONFIG_BT is not set
276CONFIG_NETDEVICES=y
277# CONFIG_DUMMY is not set
278# CONFIG_BONDING is not set
279# CONFIG_EQUALIZER is not set
280# CONFIG_TUN is not set
281
282#
283# ARCnet devices
284#
285# CONFIG_ARCNET is not set
286
287#
288# Ethernet (10 or 100Mbit)
289#
290CONFIG_NET_ETHERNET=y
291CONFIG_MII=y
292# CONFIG_HAPPYMEAL is not set
293# CONFIG_SUNGEM is not set
294# CONFIG_NET_VENDOR_3COM is not set
295
296#
297# Tulip family network device support
298#
299# CONFIG_NET_TULIP is not set
300# CONFIG_HP100 is not set
301# CONFIG_NET_PCI is not set
302
303#
304# Ethernet (1000 Mbit)
305#
306# CONFIG_ACENIC is not set
307# CONFIG_DL2K is not set
308# CONFIG_E1000 is not set
309# CONFIG_NS83820 is not set
310# CONFIG_HAMACHI is not set
311# CONFIG_YELLOWFIN is not set
312# CONFIG_R8169 is not set
313# CONFIG_SK98LIN is not set
314# CONFIG_TIGON3 is not set
315CONFIG_GIANFAR=y
316CONFIG_GFAR_NAPI=y
317
318#
319# Ethernet (10000 Mbit)
320#
321# CONFIG_IXGB is not set
322# CONFIG_S2IO is not set
323
324#
325# Token Ring devices
326#
327# CONFIG_TR is not set
328
329#
330# Wireless LAN (non-hamradio)
331#
332# CONFIG_NET_RADIO is not set
333
334#
335# Wan interfaces
336#
337# CONFIG_WAN is not set
338# CONFIG_FDDI is not set
339# CONFIG_HIPPI is not set
340# CONFIG_PPP is not set
341# CONFIG_SLIP is not set
342# CONFIG_SHAPER is not set
343# CONFIG_NETCONSOLE is not set
344
345#
346# ISDN subsystem
347#
348# CONFIG_ISDN is not set
349
350#
351# Telephony Support
352#
353# CONFIG_PHONE is not set
354
355#
356# Input device support
357#
358CONFIG_INPUT=y
359
360#
361# Userland interfaces
362#
363# CONFIG_INPUT_MOUSEDEV is not set
364# CONFIG_INPUT_JOYDEV is not set
365# CONFIG_INPUT_TSDEV is not set
366# CONFIG_INPUT_EVDEV is not set
367# CONFIG_INPUT_EVBUG is not set
368
369#
370# Input I/O drivers
371#
372# CONFIG_GAMEPORT is not set
373CONFIG_SOUND_GAMEPORT=y
374# CONFIG_SERIO is not set
375# CONFIG_SERIO_I8042 is not set
376
377#
378# Input Device Drivers
379#
380# CONFIG_INPUT_KEYBOARD is not set
381# CONFIG_INPUT_MOUSE is not set
382# CONFIG_INPUT_JOYSTICK is not set
383# CONFIG_INPUT_TOUCHSCREEN is not set
384# CONFIG_INPUT_MISC is not set
385
386#
387# Character devices
388#
389# CONFIG_VT is not set
390# CONFIG_SERIAL_NONSTANDARD is not set
391
392#
393# Serial drivers
394#
395CONFIG_SERIAL_8250=y
396CONFIG_SERIAL_8250_CONSOLE=y
397CONFIG_SERIAL_8250_NR_UARTS=4
398# CONFIG_SERIAL_8250_EXTENDED is not set
399
400#
401# Non-8250 serial port support
402#
403CONFIG_SERIAL_CORE=y
404CONFIG_SERIAL_CORE_CONSOLE=y
405CONFIG_UNIX98_PTYS=y
406CONFIG_LEGACY_PTYS=y
407CONFIG_LEGACY_PTY_COUNT=256
408
409#
410# IPMI
411#
412# CONFIG_IPMI_HANDLER is not set
413
414#
415# Watchdog Cards
416#
417# CONFIG_WATCHDOG is not set
418# CONFIG_NVRAM is not set
419CONFIG_GEN_RTC=y
420# CONFIG_GEN_RTC_X is not set
421# CONFIG_DTLK is not set
422# CONFIG_R3964 is not set
423# CONFIG_APPLICOM is not set
424
425#
426# Ftape, the floppy tape device driver
427#
428# CONFIG_AGP is not set
429# CONFIG_DRM is not set
430# CONFIG_RAW_DRIVER is not set
431
432#
433# I2C support
434#
435CONFIG_I2C=y
436CONFIG_I2C_CHARDEV=y
437
438#
439# I2C Algorithms
440#
441# CONFIG_I2C_ALGOBIT is not set
442# CONFIG_I2C_ALGOPCF is not set
443# CONFIG_I2C_ALGOPCA is not set
444
445#
446# I2C Hardware Bus support
447#
448# CONFIG_I2C_ALI1535 is not set
449# CONFIG_I2C_ALI1563 is not set
450# CONFIG_I2C_ALI15X3 is not set
451# CONFIG_I2C_AMD756 is not set
452# CONFIG_I2C_AMD8111 is not set
453# CONFIG_I2C_I801 is not set
454# CONFIG_I2C_I810 is not set
455CONFIG_I2C_MPC=y
456# CONFIG_I2C_NFORCE2 is not set
457# CONFIG_I2C_PARPORT_LIGHT is not set
458# CONFIG_I2C_PIIX4 is not set
459# CONFIG_I2C_PROSAVAGE is not set
460# CONFIG_I2C_SAVAGE4 is not set
461# CONFIG_SCx200_ACB is not set
462# CONFIG_I2C_SIS5595 is not set
463# CONFIG_I2C_SIS630 is not set
464# CONFIG_I2C_SIS96X is not set
465# CONFIG_I2C_VIA is not set
466# CONFIG_I2C_VIAPRO is not set
467# CONFIG_I2C_VOODOO3 is not set
468# CONFIG_I2C_PCA_ISA is not set
469
470#
471# Hardware Sensors Chip support
472#
473# CONFIG_I2C_SENSOR is not set
474# CONFIG_SENSORS_ADM1021 is not set
475# CONFIG_SENSORS_ADM1025 is not set
476# CONFIG_SENSORS_ADM1026 is not set
477# CONFIG_SENSORS_ADM1031 is not set
478# CONFIG_SENSORS_ASB100 is not set
479# CONFIG_SENSORS_DS1621 is not set
480# CONFIG_SENSORS_FSCHER is not set
481# CONFIG_SENSORS_GL518SM is not set
482# CONFIG_SENSORS_IT87 is not set
483# CONFIG_SENSORS_LM63 is not set
484# CONFIG_SENSORS_LM75 is not set
485# CONFIG_SENSORS_LM77 is not set
486# CONFIG_SENSORS_LM78 is not set
487# CONFIG_SENSORS_LM80 is not set
488# CONFIG_SENSORS_LM83 is not set
489# CONFIG_SENSORS_LM85 is not set
490# CONFIG_SENSORS_LM87 is not set
491# CONFIG_SENSORS_LM90 is not set
492# CONFIG_SENSORS_MAX1619 is not set
493# CONFIG_SENSORS_PC87360 is not set
494# CONFIG_SENSORS_SMSC47B397 is not set
495# CONFIG_SENSORS_SMSC47M1 is not set
496# CONFIG_SENSORS_VIA686A is not set
497# CONFIG_SENSORS_W83781D is not set
498# CONFIG_SENSORS_W83L785TS is not set
499# CONFIG_SENSORS_W83627HF is not set
500
501#
502# Other I2C Chip support
503#
504# CONFIG_SENSORS_EEPROM is not set
505# CONFIG_SENSORS_PCF8574 is not set
506# CONFIG_SENSORS_PCF8591 is not set
507# CONFIG_SENSORS_RTC8564 is not set
508# CONFIG_I2C_DEBUG_CORE is not set
509# CONFIG_I2C_DEBUG_ALGO is not set
510# CONFIG_I2C_DEBUG_BUS is not set
511# CONFIG_I2C_DEBUG_CHIP is not set
512
513#
514# Dallas's 1-wire bus
515#
516# CONFIG_W1 is not set
517
518#
519# Misc devices
520#
521
522#
523# Multimedia devices
524#
525# CONFIG_VIDEO_DEV is not set
526
527#
528# Digital Video Broadcasting Devices
529#
530# CONFIG_DVB is not set
531
532#
533# Graphics support
534#
535# CONFIG_FB is not set
536# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
537
538#
539# Sound
540#
541# CONFIG_SOUND is not set
542
543#
544# USB support
545#
546# CONFIG_USB is not set
547CONFIG_USB_ARCH_HAS_HCD=y
548CONFIG_USB_ARCH_HAS_OHCI=y
549
550#
551# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' may also be needed; see USB_STORAGE Help for more information
552#
553
554#
555# USB Gadget Support
556#
557# CONFIG_USB_GADGET is not set
558
559#
560# MMC/SD Card support
561#
562# CONFIG_MMC is not set
563
564#
565# InfiniBand support
566#
567# CONFIG_INFINIBAND is not set
568
569#
570# File systems
571#
572CONFIG_EXT2_FS=y
573# CONFIG_EXT2_FS_XATTR is not set
574CONFIG_EXT3_FS=y
575CONFIG_EXT3_FS_XATTR=y
576# CONFIG_EXT3_FS_POSIX_ACL is not set
577# CONFIG_EXT3_FS_SECURITY is not set
578CONFIG_JBD=y
579# CONFIG_JBD_DEBUG is not set
580CONFIG_FS_MBCACHE=y
581# CONFIG_REISERFS_FS is not set
582# CONFIG_JFS_FS is not set
583# CONFIG_XFS_FS is not set
584# CONFIG_MINIX_FS is not set
585# CONFIG_ROMFS_FS is not set
586# CONFIG_QUOTA is not set
587CONFIG_DNOTIFY=y
588# CONFIG_AUTOFS_FS is not set
589# CONFIG_AUTOFS4_FS is not set
590
591#
592# CD-ROM/DVD Filesystems
593#
594# CONFIG_ISO9660_FS is not set
595# CONFIG_UDF_FS is not set
596
597#
598# DOS/FAT/NT Filesystems
599#
600# CONFIG_MSDOS_FS is not set
601# CONFIG_VFAT_FS is not set
602# CONFIG_NTFS_FS is not set
603
604#
605# Pseudo filesystems
606#
607CONFIG_PROC_FS=y
608CONFIG_PROC_KCORE=y
609CONFIG_SYSFS=y
610# CONFIG_DEVFS_FS is not set
611# CONFIG_DEVPTS_FS_XATTR is not set
612CONFIG_TMPFS=y
613# CONFIG_TMPFS_XATTR is not set
614# CONFIG_HUGETLB_PAGE is not set
615CONFIG_RAMFS=y
616
617#
618# Miscellaneous filesystems
619#
620# CONFIG_ADFS_FS is not set
621# CONFIG_AFFS_FS is not set
622# CONFIG_HFS_FS is not set
623# CONFIG_HFSPLUS_FS is not set
624# CONFIG_BEFS_FS is not set
625# CONFIG_BFS_FS is not set
626# CONFIG_EFS_FS is not set
627# CONFIG_CRAMFS is not set
628# CONFIG_VXFS_FS is not set
629# CONFIG_HPFS_FS is not set
630# CONFIG_QNX4FS_FS is not set
631# CONFIG_SYSV_FS is not set
632# CONFIG_UFS_FS is not set
633
634#
635# Network File Systems
636#
637CONFIG_NFS_FS=y
638# CONFIG_NFS_V3 is not set
639# CONFIG_NFS_V4 is not set
640# CONFIG_NFS_DIRECTIO is not set
641# CONFIG_NFSD is not set
642CONFIG_ROOT_NFS=y
643CONFIG_LOCKD=y
644# CONFIG_EXPORTFS is not set
645CONFIG_SUNRPC=y
646# CONFIG_RPCSEC_GSS_KRB5 is not set
647# CONFIG_RPCSEC_GSS_SPKM3 is not set
648# CONFIG_SMB_FS is not set
649# CONFIG_CIFS is not set
650# CONFIG_NCP_FS is not set
651# CONFIG_CODA_FS is not set
652# CONFIG_AFS_FS is not set
653
654#
655# Partition Types
656#
657CONFIG_PARTITION_ADVANCED=y
658# CONFIG_ACORN_PARTITION is not set
659# CONFIG_OSF_PARTITION is not set
660# CONFIG_AMIGA_PARTITION is not set
661# CONFIG_ATARI_PARTITION is not set
662# CONFIG_MAC_PARTITION is not set
663# CONFIG_MSDOS_PARTITION is not set
664# CONFIG_LDM_PARTITION is not set
665# CONFIG_SGI_PARTITION is not set
666# CONFIG_ULTRIX_PARTITION is not set
667# CONFIG_SUN_PARTITION is not set
668# CONFIG_EFI_PARTITION is not set
669
670#
671# Native Language Support
672#
673# CONFIG_NLS is not set
674
675#
676# Library routines
677#
678# CONFIG_CRC_CCITT is not set
679CONFIG_CRC32=y
680# CONFIG_LIBCRC32C is not set
681
682#
683# Profiling support
684#
685# CONFIG_PROFILING is not set
686
687#
688# Kernel hacking
689#
690# CONFIG_DEBUG_KERNEL is not set
691# CONFIG_SERIAL_TEXT_DEBUG is not set
692
693#
694# Security options
695#
696# CONFIG_KEYS is not set
697# CONFIG_SECURITY is not set
698
699#
700# Cryptographic options
701#
702# CONFIG_CRYPTO is not set
703
704#
705# Hardware crypto devices
706#
diff --git a/arch/ppc/configs/mpc8548_cds_defconfig b/arch/ppc/configs/mpc8548_cds_defconfig
deleted file mode 100644
index f36fc5db540b..000000000000
--- a/arch/ppc/configs/mpc8548_cds_defconfig
+++ /dev/null
@@ -1,658 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-rc4
4# Tue May 24 22:36:27 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34# CONFIG_HOTPLUG is not set
35CONFIG_KOBJECT_UEVENT=y
36# CONFIG_IKCONFIG is not set
37CONFIG_EMBEDDED=y
38# CONFIG_KALLSYMS is not set
39CONFIG_PRINTK=y
40CONFIG_BUG=y
41CONFIG_BASE_FULL=y
42CONFIG_FUTEX=y
43# CONFIG_EPOLL is not set
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SHMEM=y
46CONFIG_CC_ALIGN_FUNCTIONS=0
47CONFIG_CC_ALIGN_LABELS=0
48CONFIG_CC_ALIGN_LOOPS=0
49CONFIG_CC_ALIGN_JUMPS=0
50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
52
53#
54# Loadable module support
55#
56# CONFIG_MODULES is not set
57
58#
59# Processor
60#
61# CONFIG_6xx is not set
62# CONFIG_40x is not set
63# CONFIG_44x is not set
64# CONFIG_POWER3 is not set
65# CONFIG_POWER4 is not set
66# CONFIG_8xx is not set
67CONFIG_E500=y
68CONFIG_BOOKE=y
69CONFIG_FSL_BOOKE=y
70# CONFIG_PHYS_64BIT is not set
71CONFIG_SPE=y
72CONFIG_MATH_EMULATION=y
73# CONFIG_CPU_FREQ is not set
74# CONFIG_PM is not set
75CONFIG_85xx=y
76CONFIG_PPC_INDIRECT_PCI_BE=y
77
78#
79# Freescale 85xx options
80#
81# CONFIG_MPC8540_ADS is not set
82CONFIG_MPC8548_CDS=y
83# CONFIG_MPC8555_CDS is not set
84# CONFIG_MPC8560_ADS is not set
85# CONFIG_SBC8560 is not set
86# CONFIG_STX_GP3 is not set
87CONFIG_MPC8548=y
88
89#
90# Platform options
91#
92# CONFIG_SMP is not set
93# CONFIG_PREEMPT is not set
94# CONFIG_HIGHMEM is not set
95CONFIG_BINFMT_ELF=y
96# CONFIG_BINFMT_MISC is not set
97# CONFIG_CMDLINE_BOOL is not set
98CONFIG_ISA_DMA_API=y
99
100#
101# Bus options
102#
103# CONFIG_PCI is not set
104# CONFIG_PCI_DOMAINS is not set
105
106#
107# PCCARD (PCMCIA/CardBus) support
108#
109# CONFIG_PCCARD is not set
110
111#
112# Advanced setup
113#
114# CONFIG_ADVANCED_OPTIONS is not set
115
116#
117# Default settings for advanced configuration options are used
118#
119CONFIG_HIGHMEM_START=0xfe000000
120CONFIG_LOWMEM_SIZE=0x30000000
121CONFIG_KERNEL_START=0xc0000000
122CONFIG_TASK_SIZE=0x80000000
123CONFIG_BOOT_LOAD=0x00800000
124
125#
126# Device Drivers
127#
128
129#
130# Generic Driver Options
131#
132CONFIG_STANDALONE=y
133CONFIG_PREVENT_FIRMWARE_BUILD=y
134# CONFIG_FW_LOADER is not set
135
136#
137# Memory Technology Devices (MTD)
138#
139# CONFIG_MTD is not set
140
141#
142# Parallel port support
143#
144# CONFIG_PARPORT is not set
145
146#
147# Plug and Play support
148#
149
150#
151# Block devices
152#
153# CONFIG_BLK_DEV_FD is not set
154# CONFIG_BLK_DEV_COW_COMMON is not set
155CONFIG_BLK_DEV_LOOP=y
156# CONFIG_BLK_DEV_CRYPTOLOOP is not set
157# CONFIG_BLK_DEV_NBD is not set
158CONFIG_BLK_DEV_RAM=y
159CONFIG_BLK_DEV_RAM_COUNT=16
160CONFIG_BLK_DEV_RAM_SIZE=32768
161CONFIG_BLK_DEV_INITRD=y
162CONFIG_INITRAMFS_SOURCE=""
163# CONFIG_LBD is not set
164# CONFIG_CDROM_PKTCDVD is not set
165
166#
167# IO Schedulers
168#
169CONFIG_IOSCHED_NOOP=y
170CONFIG_IOSCHED_AS=y
171CONFIG_IOSCHED_DEADLINE=y
172CONFIG_IOSCHED_CFQ=y
173# CONFIG_ATA_OVER_ETH is not set
174
175#
176# ATA/ATAPI/MFM/RLL support
177#
178# CONFIG_IDE is not set
179
180#
181# SCSI device support
182#
183# CONFIG_SCSI is not set
184
185#
186# Multi-device support (RAID and LVM)
187#
188# CONFIG_MD is not set
189
190#
191# Fusion MPT device support
192#
193
194#
195# IEEE 1394 (FireWire) support
196#
197
198#
199# I2O device support
200#
201
202#
203# Macintosh device drivers
204#
205
206#
207# Networking support
208#
209CONFIG_NET=y
210
211#
212# Networking options
213#
214CONFIG_PACKET=y
215# CONFIG_PACKET_MMAP is not set
216CONFIG_UNIX=y
217# CONFIG_NET_KEY is not set
218CONFIG_INET=y
219CONFIG_IP_MULTICAST=y
220# CONFIG_IP_ADVANCED_ROUTER is not set
221CONFIG_IP_PNP=y
222CONFIG_IP_PNP_DHCP=y
223CONFIG_IP_PNP_BOOTP=y
224# CONFIG_IP_PNP_RARP is not set
225# CONFIG_NET_IPIP is not set
226# CONFIG_NET_IPGRE is not set
227# CONFIG_IP_MROUTE is not set
228# CONFIG_ARPD is not set
229CONFIG_SYN_COOKIES=y
230# CONFIG_INET_AH is not set
231# CONFIG_INET_ESP is not set
232# CONFIG_INET_IPCOMP is not set
233# CONFIG_INET_TUNNEL is not set
234CONFIG_IP_TCPDIAG=y
235# CONFIG_IP_TCPDIAG_IPV6 is not set
236# CONFIG_IPV6 is not set
237# CONFIG_NETFILTER is not set
238
239#
240# SCTP Configuration (EXPERIMENTAL)
241#
242# CONFIG_IP_SCTP is not set
243# CONFIG_ATM is not set
244# CONFIG_BRIDGE is not set
245# CONFIG_VLAN_8021Q is not set
246# CONFIG_DECNET is not set
247# CONFIG_LLC2 is not set
248# CONFIG_IPX is not set
249# CONFIG_ATALK is not set
250# CONFIG_X25 is not set
251# CONFIG_LAPB is not set
252# CONFIG_NET_DIVERT is not set
253# CONFIG_ECONET is not set
254# CONFIG_WAN_ROUTER is not set
255
256#
257# QoS and/or fair queueing
258#
259# CONFIG_NET_SCHED is not set
260# CONFIG_NET_CLS_ROUTE is not set
261
262#
263# Network testing
264#
265# CONFIG_NET_PKTGEN is not set
266# CONFIG_NETPOLL is not set
267# CONFIG_NET_POLL_CONTROLLER is not set
268# CONFIG_HAMRADIO is not set
269# CONFIG_IRDA is not set
270# CONFIG_BT is not set
271CONFIG_NETDEVICES=y
272# CONFIG_DUMMY is not set
273# CONFIG_BONDING is not set
274# CONFIG_EQUALIZER is not set
275# CONFIG_TUN is not set
276
277#
278# Ethernet (10 or 100Mbit)
279#
280CONFIG_NET_ETHERNET=y
281CONFIG_MII=y
282
283#
284# Ethernet (1000 Mbit)
285#
286CONFIG_GIANFAR=y
287CONFIG_GFAR_NAPI=y
288
289#
290# Ethernet (10000 Mbit)
291#
292
293#
294# Token Ring devices
295#
296
297#
298# Wireless LAN (non-hamradio)
299#
300# CONFIG_NET_RADIO is not set
301
302#
303# Wan interfaces
304#
305# CONFIG_WAN is not set
306# CONFIG_PPP is not set
307# CONFIG_SLIP is not set
308# CONFIG_SHAPER is not set
309# CONFIG_NETCONSOLE is not set
310
311#
312# ISDN subsystem
313#
314# CONFIG_ISDN is not set
315
316#
317# Telephony Support
318#
319# CONFIG_PHONE is not set
320
321#
322# Input device support
323#
324CONFIG_INPUT=y
325
326#
327# Userland interfaces
328#
329# CONFIG_INPUT_MOUSEDEV is not set
330# CONFIG_INPUT_JOYDEV is not set
331# CONFIG_INPUT_TSDEV is not set
332# CONFIG_INPUT_EVDEV is not set
333# CONFIG_INPUT_EVBUG is not set
334
335#
336# Input Device Drivers
337#
338# CONFIG_INPUT_KEYBOARD is not set
339# CONFIG_INPUT_MOUSE is not set
340# CONFIG_INPUT_JOYSTICK is not set
341# CONFIG_INPUT_TOUCHSCREEN is not set
342# CONFIG_INPUT_MISC is not set
343
344#
345# Hardware I/O ports
346#
347# CONFIG_SERIO is not set
348# CONFIG_GAMEPORT is not set
349CONFIG_SOUND_GAMEPORT=y
350
351#
352# Character devices
353#
354# CONFIG_VT is not set
355# CONFIG_SERIAL_NONSTANDARD is not set
356
357#
358# Serial drivers
359#
360CONFIG_SERIAL_8250=y
361CONFIG_SERIAL_8250_CONSOLE=y
362CONFIG_SERIAL_8250_NR_UARTS=4
363# CONFIG_SERIAL_8250_EXTENDED is not set
364
365#
366# Non-8250 serial port support
367#
368CONFIG_SERIAL_CORE=y
369CONFIG_SERIAL_CORE_CONSOLE=y
370CONFIG_UNIX98_PTYS=y
371CONFIG_LEGACY_PTYS=y
372CONFIG_LEGACY_PTY_COUNT=256
373
374#
375# IPMI
376#
377# CONFIG_IPMI_HANDLER is not set
378
379#
380# Watchdog Cards
381#
382# CONFIG_WATCHDOG is not set
383# CONFIG_NVRAM is not set
384CONFIG_GEN_RTC=y
385# CONFIG_GEN_RTC_X is not set
386# CONFIG_DTLK is not set
387# CONFIG_R3964 is not set
388
389#
390# Ftape, the floppy tape device driver
391#
392# CONFIG_AGP is not set
393# CONFIG_DRM is not set
394# CONFIG_RAW_DRIVER is not set
395
396#
397# TPM devices
398#
399
400#
401# I2C support
402#
403CONFIG_I2C=y
404CONFIG_I2C_CHARDEV=y
405
406#
407# I2C Algorithms
408#
409# CONFIG_I2C_ALGOBIT is not set
410# CONFIG_I2C_ALGOPCF is not set
411# CONFIG_I2C_ALGOPCA is not set
412
413#
414# I2C Hardware Bus support
415#
416CONFIG_I2C_MPC=y
417# CONFIG_I2C_PARPORT_LIGHT is not set
418# CONFIG_I2C_PCA_ISA is not set
419
420#
421# Hardware Sensors Chip support
422#
423# CONFIG_I2C_SENSOR is not set
424# CONFIG_SENSORS_ADM1021 is not set
425# CONFIG_SENSORS_ADM1025 is not set
426# CONFIG_SENSORS_ADM1026 is not set
427# CONFIG_SENSORS_ADM1031 is not set
428# CONFIG_SENSORS_ASB100 is not set
429# CONFIG_SENSORS_DS1621 is not set
430# CONFIG_SENSORS_FSCHER is not set
431# CONFIG_SENSORS_FSCPOS is not set
432# CONFIG_SENSORS_GL518SM is not set
433# CONFIG_SENSORS_GL520SM is not set
434# CONFIG_SENSORS_IT87 is not set
435# CONFIG_SENSORS_LM63 is not set
436# CONFIG_SENSORS_LM75 is not set
437# CONFIG_SENSORS_LM77 is not set
438# CONFIG_SENSORS_LM78 is not set
439# CONFIG_SENSORS_LM80 is not set
440# CONFIG_SENSORS_LM83 is not set
441# CONFIG_SENSORS_LM85 is not set
442# CONFIG_SENSORS_LM87 is not set
443# CONFIG_SENSORS_LM90 is not set
444# CONFIG_SENSORS_LM92 is not set
445# CONFIG_SENSORS_MAX1619 is not set
446# CONFIG_SENSORS_PC87360 is not set
447# CONFIG_SENSORS_SMSC47B397 is not set
448# CONFIG_SENSORS_SMSC47M1 is not set
449# CONFIG_SENSORS_W83781D is not set
450# CONFIG_SENSORS_W83L785TS is not set
451# CONFIG_SENSORS_W83627HF is not set
452
453#
454# Other I2C Chip support
455#
456# CONFIG_SENSORS_DS1337 is not set
457# CONFIG_SENSORS_EEPROM is not set
458# CONFIG_SENSORS_PCF8574 is not set
459# CONFIG_SENSORS_PCF8591 is not set
460# CONFIG_SENSORS_RTC8564 is not set
461# CONFIG_SENSORS_M41T00 is not set
462# CONFIG_I2C_DEBUG_CORE is not set
463# CONFIG_I2C_DEBUG_ALGO is not set
464# CONFIG_I2C_DEBUG_BUS is not set
465# CONFIG_I2C_DEBUG_CHIP is not set
466
467#
468# Dallas's 1-wire bus
469#
470# CONFIG_W1 is not set
471
472#
473# Misc devices
474#
475
476#
477# Multimedia devices
478#
479# CONFIG_VIDEO_DEV is not set
480
481#
482# Digital Video Broadcasting Devices
483#
484# CONFIG_DVB is not set
485
486#
487# Graphics support
488#
489# CONFIG_FB is not set
490
491#
492# Sound
493#
494# CONFIG_SOUND is not set
495
496#
497# USB support
498#
499# CONFIG_USB_ARCH_HAS_HCD is not set
500# CONFIG_USB_ARCH_HAS_OHCI is not set
501
502#
503# USB Gadget Support
504#
505# CONFIG_USB_GADGET is not set
506
507#
508# MMC/SD Card support
509#
510# CONFIG_MMC is not set
511
512#
513# InfiniBand support
514#
515# CONFIG_INFINIBAND is not set
516
517#
518# File systems
519#
520CONFIG_EXT2_FS=y
521# CONFIG_EXT2_FS_XATTR is not set
522CONFIG_EXT3_FS=y
523CONFIG_EXT3_FS_XATTR=y
524# CONFIG_EXT3_FS_POSIX_ACL is not set
525# CONFIG_EXT3_FS_SECURITY is not set
526CONFIG_JBD=y
527# CONFIG_JBD_DEBUG is not set
528CONFIG_FS_MBCACHE=y
529# CONFIG_REISERFS_FS is not set
530# CONFIG_JFS_FS is not set
531
532#
533# XFS support
534#
535# CONFIG_XFS_FS is not set
536# CONFIG_MINIX_FS is not set
537# CONFIG_ROMFS_FS is not set
538# CONFIG_QUOTA is not set
539CONFIG_DNOTIFY=y
540# CONFIG_AUTOFS_FS is not set
541# CONFIG_AUTOFS4_FS is not set
542
543#
544# CD-ROM/DVD Filesystems
545#
546# CONFIG_ISO9660_FS is not set
547# CONFIG_UDF_FS is not set
548
549#
550# DOS/FAT/NT Filesystems
551#
552# CONFIG_MSDOS_FS is not set
553# CONFIG_VFAT_FS is not set
554# CONFIG_NTFS_FS is not set
555
556#
557# Pseudo filesystems
558#
559CONFIG_PROC_FS=y
560CONFIG_PROC_KCORE=y
561CONFIG_SYSFS=y
562# CONFIG_DEVFS_FS is not set
563# CONFIG_DEVPTS_FS_XATTR is not set
564CONFIG_TMPFS=y
565# CONFIG_TMPFS_XATTR is not set
566# CONFIG_HUGETLB_PAGE is not set
567CONFIG_RAMFS=y
568
569#
570# Miscellaneous filesystems
571#
572# CONFIG_ADFS_FS is not set
573# CONFIG_AFFS_FS is not set
574# CONFIG_HFS_FS is not set
575# CONFIG_HFSPLUS_FS is not set
576# CONFIG_BEFS_FS is not set
577# CONFIG_BFS_FS is not set
578# CONFIG_EFS_FS is not set
579# CONFIG_CRAMFS is not set
580# CONFIG_VXFS_FS is not set
581# CONFIG_HPFS_FS is not set
582# CONFIG_QNX4FS_FS is not set
583# CONFIG_SYSV_FS is not set
584# CONFIG_UFS_FS is not set
585
586#
587# Network File Systems
588#
589CONFIG_NFS_FS=y
590# CONFIG_NFS_V3 is not set
591# CONFIG_NFS_V4 is not set
592# CONFIG_NFS_DIRECTIO is not set
593# CONFIG_NFSD is not set
594CONFIG_ROOT_NFS=y
595CONFIG_LOCKD=y
596CONFIG_SUNRPC=y
597# CONFIG_RPCSEC_GSS_KRB5 is not set
598# CONFIG_RPCSEC_GSS_SPKM3 is not set
599# CONFIG_SMB_FS is not set
600# CONFIG_CIFS is not set
601# CONFIG_NCP_FS is not set
602# CONFIG_CODA_FS is not set
603# CONFIG_AFS_FS is not set
604
605#
606# Partition Types
607#
608CONFIG_PARTITION_ADVANCED=y
609# CONFIG_ACORN_PARTITION is not set
610# CONFIG_OSF_PARTITION is not set
611# CONFIG_AMIGA_PARTITION is not set
612# CONFIG_ATARI_PARTITION is not set
613# CONFIG_MAC_PARTITION is not set
614# CONFIG_MSDOS_PARTITION is not set
615# CONFIG_LDM_PARTITION is not set
616# CONFIG_SGI_PARTITION is not set
617# CONFIG_ULTRIX_PARTITION is not set
618# CONFIG_SUN_PARTITION is not set
619# CONFIG_EFI_PARTITION is not set
620
621#
622# Native Language Support
623#
624# CONFIG_NLS is not set
625
626#
627# Library routines
628#
629# CONFIG_CRC_CCITT is not set
630CONFIG_CRC32=y
631# CONFIG_LIBCRC32C is not set
632
633#
634# Profiling support
635#
636# CONFIG_PROFILING is not set
637
638#
639# Kernel hacking
640#
641# CONFIG_PRINTK_TIME is not set
642# CONFIG_DEBUG_KERNEL is not set
643CONFIG_LOG_BUF_SHIFT=14
644
645#
646# Security options
647#
648# CONFIG_KEYS is not set
649# CONFIG_SECURITY is not set
650
651#
652# Cryptographic options
653#
654# CONFIG_CRYPTO is not set
655
656#
657# Hardware crypto devices
658#
diff --git a/arch/ppc/configs/mpc8555_cds_defconfig b/arch/ppc/configs/mpc8555_cds_defconfig
deleted file mode 100644
index 4f1e320acfbe..000000000000
--- a/arch/ppc/configs/mpc8555_cds_defconfig
+++ /dev/null
@@ -1,784 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-rc4
4# Tue May 17 11:56:01 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34# CONFIG_HOTPLUG is not set
35CONFIG_KOBJECT_UEVENT=y
36# CONFIG_IKCONFIG is not set
37CONFIG_EMBEDDED=y
38# CONFIG_KALLSYMS is not set
39CONFIG_PRINTK=y
40CONFIG_BUG=y
41CONFIG_BASE_FULL=y
42CONFIG_FUTEX=y
43# CONFIG_EPOLL is not set
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SHMEM=y
46CONFIG_CC_ALIGN_FUNCTIONS=0
47CONFIG_CC_ALIGN_LABELS=0
48CONFIG_CC_ALIGN_LOOPS=0
49CONFIG_CC_ALIGN_JUMPS=0
50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
52
53#
54# Loadable module support
55#
56# CONFIG_MODULES is not set
57
58#
59# Processor
60#
61# CONFIG_6xx is not set
62# CONFIG_40x is not set
63# CONFIG_44x is not set
64# CONFIG_POWER3 is not set
65# CONFIG_POWER4 is not set
66# CONFIG_8xx is not set
67CONFIG_E500=y
68CONFIG_BOOKE=y
69CONFIG_FSL_BOOKE=y
70# CONFIG_PHYS_64BIT is not set
71CONFIG_SPE=y
72CONFIG_MATH_EMULATION=y
73# CONFIG_CPU_FREQ is not set
74CONFIG_PPC_GEN550=y
75# CONFIG_PM is not set
76CONFIG_85xx=y
77CONFIG_PPC_INDIRECT_PCI_BE=y
78
79#
80# Freescale 85xx options
81#
82# CONFIG_MPC8540_ADS is not set
83CONFIG_MPC8555_CDS=y
84# CONFIG_MPC8560_ADS is not set
85# CONFIG_SBC8560 is not set
86# CONFIG_STX_GP3 is not set
87CONFIG_MPC8555=y
88CONFIG_85xx_PCI2=y
89
90#
91# Platform options
92#
93CONFIG_CPM2=y
94# CONFIG_PC_KEYBOARD is not set
95# CONFIG_SMP is not set
96# CONFIG_PREEMPT is not set
97# CONFIG_HIGHMEM is not set
98CONFIG_BINFMT_ELF=y
99# CONFIG_BINFMT_MISC is not set
100# CONFIG_CMDLINE_BOOL is not set
101CONFIG_ISA_DMA_API=y
102
103#
104# Bus options
105#
106CONFIG_PCI=y
107CONFIG_PCI_DOMAINS=y
108# CONFIG_PCI_LEGACY_PROC is not set
109CONFIG_PCI_NAMES=y
110
111#
112# PCCARD (PCMCIA/CardBus) support
113#
114# CONFIG_PCCARD is not set
115
116#
117# Advanced setup
118#
119# CONFIG_ADVANCED_OPTIONS is not set
120
121#
122# Default settings for advanced configuration options are used
123#
124CONFIG_HIGHMEM_START=0xfe000000
125CONFIG_LOWMEM_SIZE=0x30000000
126CONFIG_KERNEL_START=0xc0000000
127CONFIG_TASK_SIZE=0x80000000
128CONFIG_BOOT_LOAD=0x00800000
129
130#
131# Device Drivers
132#
133
134#
135# Generic Driver Options
136#
137CONFIG_STANDALONE=y
138CONFIG_PREVENT_FIRMWARE_BUILD=y
139# CONFIG_FW_LOADER is not set
140
141#
142# Memory Technology Devices (MTD)
143#
144# CONFIG_MTD is not set
145
146#
147# Parallel port support
148#
149# CONFIG_PARPORT is not set
150
151#
152# Plug and Play support
153#
154
155#
156# Block devices
157#
158# CONFIG_BLK_DEV_FD is not set
159# CONFIG_BLK_CPQ_DA is not set
160# CONFIG_BLK_CPQ_CISS_DA is not set
161# CONFIG_BLK_DEV_DAC960 is not set
162# CONFIG_BLK_DEV_UMEM is not set
163# CONFIG_BLK_DEV_COW_COMMON is not set
164CONFIG_BLK_DEV_LOOP=y
165# CONFIG_BLK_DEV_CRYPTOLOOP is not set
166# CONFIG_BLK_DEV_NBD is not set
167# CONFIG_BLK_DEV_SX8 is not set
168CONFIG_BLK_DEV_RAM=y
169CONFIG_BLK_DEV_RAM_COUNT=16
170CONFIG_BLK_DEV_RAM_SIZE=32768
171CONFIG_BLK_DEV_INITRD=y
172CONFIG_INITRAMFS_SOURCE=""
173# CONFIG_LBD is not set
174# CONFIG_CDROM_PKTCDVD is not set
175
176#
177# IO Schedulers
178#
179CONFIG_IOSCHED_NOOP=y
180CONFIG_IOSCHED_AS=y
181CONFIG_IOSCHED_DEADLINE=y
182CONFIG_IOSCHED_CFQ=y
183# CONFIG_ATA_OVER_ETH is not set
184
185#
186# ATA/ATAPI/MFM/RLL support
187#
188CONFIG_IDE=y
189CONFIG_BLK_DEV_IDE=y
190
191#
192# Please see Documentation/ide.txt for help/info on IDE drives
193#
194# CONFIG_BLK_DEV_IDE_SATA is not set
195CONFIG_BLK_DEV_IDEDISK=y
196# CONFIG_IDEDISK_MULTI_MODE is not set
197# CONFIG_BLK_DEV_IDECD is not set
198# CONFIG_BLK_DEV_IDETAPE is not set
199# CONFIG_BLK_DEV_IDEFLOPPY is not set
200# CONFIG_IDE_TASK_IOCTL is not set
201
202#
203# IDE chipset support/bugfixes
204#
205CONFIG_IDE_GENERIC=y
206CONFIG_BLK_DEV_IDEPCI=y
207CONFIG_IDEPCI_SHARE_IRQ=y
208# CONFIG_BLK_DEV_OFFBOARD is not set
209CONFIG_BLK_DEV_GENERIC=y
210# CONFIG_BLK_DEV_OPTI621 is not set
211# CONFIG_BLK_DEV_SL82C105 is not set
212CONFIG_BLK_DEV_IDEDMA_PCI=y
213# CONFIG_BLK_DEV_IDEDMA_FORCED is not set
214CONFIG_IDEDMA_PCI_AUTO=y
215# CONFIG_IDEDMA_ONLYDISK is not set
216# CONFIG_BLK_DEV_AEC62XX is not set
217# CONFIG_BLK_DEV_ALI15X3 is not set
218# CONFIG_BLK_DEV_AMD74XX is not set
219# CONFIG_BLK_DEV_CMD64X is not set
220# CONFIG_BLK_DEV_TRIFLEX is not set
221# CONFIG_BLK_DEV_CY82C693 is not set
222# CONFIG_BLK_DEV_CS5520 is not set
223# CONFIG_BLK_DEV_CS5530 is not set
224# CONFIG_BLK_DEV_HPT34X is not set
225# CONFIG_BLK_DEV_HPT366 is not set
226# CONFIG_BLK_DEV_SC1200 is not set
227# CONFIG_BLK_DEV_PIIX is not set
228# CONFIG_BLK_DEV_NS87415 is not set
229# CONFIG_BLK_DEV_PDC202XX_OLD is not set
230# CONFIG_BLK_DEV_PDC202XX_NEW is not set
231# CONFIG_BLK_DEV_SVWKS is not set
232# CONFIG_BLK_DEV_SIIMAGE is not set
233# CONFIG_BLK_DEV_SLC90E66 is not set
234# CONFIG_BLK_DEV_TRM290 is not set
235CONFIG_BLK_DEV_VIA82CXXX=y
236# CONFIG_IDE_ARM is not set
237CONFIG_BLK_DEV_IDEDMA=y
238# CONFIG_IDEDMA_IVB is not set
239CONFIG_IDEDMA_AUTO=y
240# CONFIG_BLK_DEV_HD is not set
241
242#
243# SCSI device support
244#
245# CONFIG_SCSI is not set
246
247#
248# Multi-device support (RAID and LVM)
249#
250# CONFIG_MD is not set
251
252#
253# Fusion MPT device support
254#
255
256#
257# IEEE 1394 (FireWire) support
258#
259# CONFIG_IEEE1394 is not set
260
261#
262# I2O device support
263#
264# CONFIG_I2O is not set
265
266#
267# Macintosh device drivers
268#
269
270#
271# Networking support
272#
273CONFIG_NET=y
274
275#
276# Networking options
277#
278CONFIG_PACKET=y
279# CONFIG_PACKET_MMAP is not set
280CONFIG_UNIX=y
281# CONFIG_NET_KEY is not set
282CONFIG_INET=y
283CONFIG_IP_MULTICAST=y
284# CONFIG_IP_ADVANCED_ROUTER is not set
285CONFIG_IP_PNP=y
286CONFIG_IP_PNP_DHCP=y
287CONFIG_IP_PNP_BOOTP=y
288# CONFIG_IP_PNP_RARP is not set
289# CONFIG_NET_IPIP is not set
290# CONFIG_NET_IPGRE is not set
291# CONFIG_IP_MROUTE is not set
292# CONFIG_ARPD is not set
293CONFIG_SYN_COOKIES=y
294# CONFIG_INET_AH is not set
295# CONFIG_INET_ESP is not set
296# CONFIG_INET_IPCOMP is not set
297# CONFIG_INET_TUNNEL is not set
298CONFIG_IP_TCPDIAG=y
299# CONFIG_IP_TCPDIAG_IPV6 is not set
300# CONFIG_IPV6 is not set
301# CONFIG_NETFILTER is not set
302
303#
304# SCTP Configuration (EXPERIMENTAL)
305#
306# CONFIG_IP_SCTP is not set
307# CONFIG_ATM is not set
308# CONFIG_BRIDGE is not set
309# CONFIG_VLAN_8021Q is not set
310# CONFIG_DECNET is not set
311# CONFIG_LLC2 is not set
312# CONFIG_IPX is not set
313# CONFIG_ATALK is not set
314# CONFIG_X25 is not set
315# CONFIG_LAPB is not set
316# CONFIG_NET_DIVERT is not set
317# CONFIG_ECONET is not set
318# CONFIG_WAN_ROUTER is not set
319
320#
321# QoS and/or fair queueing
322#
323# CONFIG_NET_SCHED is not set
324# CONFIG_NET_CLS_ROUTE is not set
325
326#
327# Network testing
328#
329# CONFIG_NET_PKTGEN is not set
330# CONFIG_NETPOLL is not set
331# CONFIG_NET_POLL_CONTROLLER is not set
332# CONFIG_HAMRADIO is not set
333# CONFIG_IRDA is not set
334# CONFIG_BT is not set
335CONFIG_NETDEVICES=y
336# CONFIG_DUMMY is not set
337# CONFIG_BONDING is not set
338# CONFIG_EQUALIZER is not set
339# CONFIG_TUN is not set
340
341#
342# ARCnet devices
343#
344# CONFIG_ARCNET is not set
345
346#
347# Ethernet (10 or 100Mbit)
348#
349CONFIG_NET_ETHERNET=y
350CONFIG_MII=y
351# CONFIG_HAPPYMEAL is not set
352# CONFIG_SUNGEM is not set
353# CONFIG_NET_VENDOR_3COM is not set
354
355#
356# Tulip family network device support
357#
358# CONFIG_NET_TULIP is not set
359# CONFIG_HP100 is not set
360# CONFIG_NET_PCI is not set
361
362#
363# Ethernet (1000 Mbit)
364#
365# CONFIG_ACENIC is not set
366# CONFIG_DL2K is not set
367# CONFIG_E1000 is not set
368# CONFIG_NS83820 is not set
369# CONFIG_HAMACHI is not set
370# CONFIG_YELLOWFIN is not set
371# CONFIG_R8169 is not set
372# CONFIG_SK98LIN is not set
373# CONFIG_TIGON3 is not set
374CONFIG_GIANFAR=y
375CONFIG_GFAR_NAPI=y
376
377#
378# Ethernet (10000 Mbit)
379#
380# CONFIG_IXGB is not set
381# CONFIG_S2IO is not set
382
383#
384# Token Ring devices
385#
386# CONFIG_TR is not set
387
388#
389# Wireless LAN (non-hamradio)
390#
391# CONFIG_NET_RADIO is not set
392
393#
394# Wan interfaces
395#
396# CONFIG_WAN is not set
397# CONFIG_FDDI is not set
398# CONFIG_HIPPI is not set
399# CONFIG_PPP is not set
400# CONFIG_SLIP is not set
401# CONFIG_SHAPER is not set
402# CONFIG_NETCONSOLE is not set
403
404#
405# ISDN subsystem
406#
407# CONFIG_ISDN is not set
408
409#
410# Telephony Support
411#
412# CONFIG_PHONE is not set
413
414#
415# Input device support
416#
417CONFIG_INPUT=y
418
419#
420# Userland interfaces
421#
422# CONFIG_INPUT_MOUSEDEV is not set
423# CONFIG_INPUT_JOYDEV is not set
424# CONFIG_INPUT_TSDEV is not set
425# CONFIG_INPUT_EVDEV is not set
426# CONFIG_INPUT_EVBUG is not set
427
428#
429# Input Device Drivers
430#
431# CONFIG_INPUT_KEYBOARD is not set
432# CONFIG_INPUT_MOUSE is not set
433# CONFIG_INPUT_JOYSTICK is not set
434# CONFIG_INPUT_TOUCHSCREEN is not set
435# CONFIG_INPUT_MISC is not set
436
437#
438# Hardware I/O ports
439#
440# CONFIG_SERIO is not set
441# CONFIG_GAMEPORT is not set
442CONFIG_SOUND_GAMEPORT=y
443
444#
445# Character devices
446#
447# CONFIG_VT is not set
448# CONFIG_SERIAL_NONSTANDARD is not set
449
450#
451# Serial drivers
452#
453CONFIG_SERIAL_8250=y
454CONFIG_SERIAL_8250_CONSOLE=y
455CONFIG_SERIAL_8250_NR_UARTS=4
456# CONFIG_SERIAL_8250_EXTENDED is not set
457
458#
459# Non-8250 serial port support
460#
461CONFIG_SERIAL_CORE=y
462CONFIG_SERIAL_CORE_CONSOLE=y
463# CONFIG_SERIAL_CPM is not set
464# CONFIG_SERIAL_JSM is not set
465CONFIG_UNIX98_PTYS=y
466CONFIG_LEGACY_PTYS=y
467CONFIG_LEGACY_PTY_COUNT=256
468
469#
470# IPMI
471#
472# CONFIG_IPMI_HANDLER is not set
473
474#
475# Watchdog Cards
476#
477# CONFIG_WATCHDOG is not set
478# CONFIG_NVRAM is not set
479CONFIG_GEN_RTC=y
480# CONFIG_GEN_RTC_X is not set
481# CONFIG_DTLK is not set
482# CONFIG_R3964 is not set
483# CONFIG_APPLICOM is not set
484
485#
486# Ftape, the floppy tape device driver
487#
488# CONFIG_AGP is not set
489# CONFIG_DRM is not set
490# CONFIG_RAW_DRIVER is not set
491
492#
493# TPM devices
494#
495# CONFIG_TCG_TPM is not set
496
497#
498# I2C support
499#
500CONFIG_I2C=y
501CONFIG_I2C_CHARDEV=y
502
503#
504# I2C Algorithms
505#
506# CONFIG_I2C_ALGOBIT is not set
507# CONFIG_I2C_ALGOPCF is not set
508# CONFIG_I2C_ALGOPCA is not set
509
510#
511# I2C Hardware Bus support
512#
513# CONFIG_I2C_ALI1535 is not set
514# CONFIG_I2C_ALI1563 is not set
515# CONFIG_I2C_ALI15X3 is not set
516# CONFIG_I2C_AMD756 is not set
517# CONFIG_I2C_AMD8111 is not set
518# CONFIG_I2C_I801 is not set
519# CONFIG_I2C_I810 is not set
520# CONFIG_I2C_PIIX4 is not set
521CONFIG_I2C_MPC=y
522# CONFIG_I2C_NFORCE2 is not set
523# CONFIG_I2C_PARPORT_LIGHT is not set
524# CONFIG_I2C_PROSAVAGE is not set
525# CONFIG_I2C_SAVAGE4 is not set
526# CONFIG_SCx200_ACB is not set
527# CONFIG_I2C_SIS5595 is not set
528# CONFIG_I2C_SIS630 is not set
529# CONFIG_I2C_SIS96X is not set
530# CONFIG_I2C_VIA is not set
531# CONFIG_I2C_VIAPRO is not set
532# CONFIG_I2C_VOODOO3 is not set
533# CONFIG_I2C_PCA_ISA is not set
534
535#
536# Hardware Sensors Chip support
537#
538# CONFIG_I2C_SENSOR is not set
539# CONFIG_SENSORS_ADM1021 is not set
540# CONFIG_SENSORS_ADM1025 is not set
541# CONFIG_SENSORS_ADM1026 is not set
542# CONFIG_SENSORS_ADM1031 is not set
543# CONFIG_SENSORS_ASB100 is not set
544# CONFIG_SENSORS_DS1621 is not set
545# CONFIG_SENSORS_FSCHER is not set
546# CONFIG_SENSORS_FSCPOS is not set
547# CONFIG_SENSORS_GL518SM is not set
548# CONFIG_SENSORS_GL520SM is not set
549# CONFIG_SENSORS_IT87 is not set
550# CONFIG_SENSORS_LM63 is not set
551# CONFIG_SENSORS_LM75 is not set
552# CONFIG_SENSORS_LM77 is not set
553# CONFIG_SENSORS_LM78 is not set
554# CONFIG_SENSORS_LM80 is not set
555# CONFIG_SENSORS_LM83 is not set
556# CONFIG_SENSORS_LM85 is not set
557# CONFIG_SENSORS_LM87 is not set
558# CONFIG_SENSORS_LM90 is not set
559# CONFIG_SENSORS_LM92 is not set
560# CONFIG_SENSORS_MAX1619 is not set
561# CONFIG_SENSORS_PC87360 is not set
562# CONFIG_SENSORS_SMSC47B397 is not set
563# CONFIG_SENSORS_SIS5595 is not set
564# CONFIG_SENSORS_SMSC47M1 is not set
565# CONFIG_SENSORS_VIA686A is not set
566# CONFIG_SENSORS_W83781D is not set
567# CONFIG_SENSORS_W83L785TS is not set
568# CONFIG_SENSORS_W83627HF is not set
569
570#
571# Other I2C Chip support
572#
573# CONFIG_SENSORS_DS1337 is not set
574# CONFIG_SENSORS_EEPROM is not set
575# CONFIG_SENSORS_PCF8574 is not set
576# CONFIG_SENSORS_PCF8591 is not set
577# CONFIG_SENSORS_RTC8564 is not set
578# CONFIG_SENSORS_M41T00 is not set
579# CONFIG_I2C_DEBUG_CORE is not set
580# CONFIG_I2C_DEBUG_ALGO is not set
581# CONFIG_I2C_DEBUG_BUS is not set
582# CONFIG_I2C_DEBUG_CHIP is not set
583
584#
585# Dallas's 1-wire bus
586#
587# CONFIG_W1 is not set
588
589#
590# Misc devices
591#
592
593#
594# Multimedia devices
595#
596# CONFIG_VIDEO_DEV is not set
597
598#
599# Digital Video Broadcasting Devices
600#
601# CONFIG_DVB is not set
602
603#
604# Graphics support
605#
606# CONFIG_FB is not set
607
608#
609# Sound
610#
611# CONFIG_SOUND is not set
612
613#
614# USB support
615#
616CONFIG_USB_ARCH_HAS_HCD=y
617CONFIG_USB_ARCH_HAS_OHCI=y
618# CONFIG_USB is not set
619
620#
621# USB Gadget Support
622#
623# CONFIG_USB_GADGET is not set
624
625#
626# MMC/SD Card support
627#
628# CONFIG_MMC is not set
629
630#
631# InfiniBand support
632#
633# CONFIG_INFINIBAND is not set
634
635#
636# File systems
637#
638CONFIG_EXT2_FS=y
639# CONFIG_EXT2_FS_XATTR is not set
640CONFIG_EXT3_FS=y
641CONFIG_EXT3_FS_XATTR=y
642# CONFIG_EXT3_FS_POSIX_ACL is not set
643# CONFIG_EXT3_FS_SECURITY is not set
644CONFIG_JBD=y
645# CONFIG_JBD_DEBUG is not set
646CONFIG_FS_MBCACHE=y
647# CONFIG_REISERFS_FS is not set
648# CONFIG_JFS_FS is not set
649
650#
651# XFS support
652#
653# CONFIG_XFS_FS is not set
654# CONFIG_MINIX_FS is not set
655# CONFIG_ROMFS_FS is not set
656# CONFIG_QUOTA is not set
657CONFIG_DNOTIFY=y
658# CONFIG_AUTOFS_FS is not set
659# CONFIG_AUTOFS4_FS is not set
660
661#
662# CD-ROM/DVD Filesystems
663#
664# CONFIG_ISO9660_FS is not set
665# CONFIG_UDF_FS is not set
666
667#
668# DOS/FAT/NT Filesystems
669#
670# CONFIG_MSDOS_FS is not set
671# CONFIG_VFAT_FS is not set
672# CONFIG_NTFS_FS is not set
673
674#
675# Pseudo filesystems
676#
677CONFIG_PROC_FS=y
678CONFIG_PROC_KCORE=y
679CONFIG_SYSFS=y
680# CONFIG_DEVFS_FS is not set
681# CONFIG_DEVPTS_FS_XATTR is not set
682CONFIG_TMPFS=y
683# CONFIG_TMPFS_XATTR is not set
684# CONFIG_HUGETLB_PAGE is not set
685CONFIG_RAMFS=y
686
687#
688# Miscellaneous filesystems
689#
690# CONFIG_ADFS_FS is not set
691# CONFIG_AFFS_FS is not set
692# CONFIG_HFS_FS is not set
693# CONFIG_HFSPLUS_FS is not set
694# CONFIG_BEFS_FS is not set
695# CONFIG_BFS_FS is not set
696# CONFIG_EFS_FS is not set
697# CONFIG_CRAMFS is not set
698# CONFIG_VXFS_FS is not set
699# CONFIG_HPFS_FS is not set
700# CONFIG_QNX4FS_FS is not set
701# CONFIG_SYSV_FS is not set
702# CONFIG_UFS_FS is not set
703
704#
705# Network File Systems
706#
707CONFIG_NFS_FS=y
708# CONFIG_NFS_V3 is not set
709# CONFIG_NFS_V4 is not set
710# CONFIG_NFS_DIRECTIO is not set
711# CONFIG_NFSD is not set
712CONFIG_ROOT_NFS=y
713CONFIG_LOCKD=y
714CONFIG_SUNRPC=y
715# CONFIG_RPCSEC_GSS_KRB5 is not set
716# CONFIG_RPCSEC_GSS_SPKM3 is not set
717# CONFIG_SMB_FS is not set
718# CONFIG_CIFS is not set
719# CONFIG_NCP_FS is not set
720# CONFIG_CODA_FS is not set
721# CONFIG_AFS_FS is not set
722
723#
724# Partition Types
725#
726CONFIG_PARTITION_ADVANCED=y
727# CONFIG_ACORN_PARTITION is not set
728# CONFIG_OSF_PARTITION is not set
729# CONFIG_AMIGA_PARTITION is not set
730# CONFIG_ATARI_PARTITION is not set
731# CONFIG_MAC_PARTITION is not set
732# CONFIG_MSDOS_PARTITION is not set
733# CONFIG_LDM_PARTITION is not set
734# CONFIG_SGI_PARTITION is not set
735# CONFIG_ULTRIX_PARTITION is not set
736# CONFIG_SUN_PARTITION is not set
737# CONFIG_EFI_PARTITION is not set
738
739#
740# Native Language Support
741#
742# CONFIG_NLS is not set
743# CONFIG_SCC_ENET is not set
744# CONFIG_FEC_ENET is not set
745
746#
747# CPM2 Options
748#
749
750#
751# Library routines
752#
753# CONFIG_CRC_CCITT is not set
754CONFIG_CRC32=y
755# CONFIG_LIBCRC32C is not set
756
757#
758# Profiling support
759#
760# CONFIG_PROFILING is not set
761
762#
763# Kernel hacking
764#
765# CONFIG_PRINTK_TIME is not set
766# CONFIG_DEBUG_KERNEL is not set
767CONFIG_LOG_BUF_SHIFT=14
768# CONFIG_KGDB_CONSOLE is not set
769# CONFIG_SERIAL_TEXT_DEBUG is not set
770
771#
772# Security options
773#
774# CONFIG_KEYS is not set
775# CONFIG_SECURITY is not set
776
777#
778# Cryptographic options
779#
780# CONFIG_CRYPTO is not set
781
782#
783# Hardware crypto devices
784#
diff --git a/arch/ppc/configs/mpc8560_ads_defconfig b/arch/ppc/configs/mpc8560_ads_defconfig
deleted file mode 100644
index f12d48fcbba7..000000000000
--- a/arch/ppc/configs/mpc8560_ads_defconfig
+++ /dev/null
@@ -1,769 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.13-rc6
4# Thu Aug 11 18:14:45 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34# CONFIG_HOTPLUG is not set
35CONFIG_KOBJECT_UEVENT=y
36# CONFIG_IKCONFIG is not set
37CONFIG_EMBEDDED=y
38# CONFIG_KALLSYMS is not set
39CONFIG_PRINTK=y
40CONFIG_BUG=y
41CONFIG_BASE_FULL=y
42CONFIG_FUTEX=y
43# CONFIG_EPOLL is not set
44# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
45CONFIG_SHMEM=y
46CONFIG_CC_ALIGN_FUNCTIONS=0
47CONFIG_CC_ALIGN_LABELS=0
48CONFIG_CC_ALIGN_LOOPS=0
49CONFIG_CC_ALIGN_JUMPS=0
50# CONFIG_TINY_SHMEM is not set
51CONFIG_BASE_SMALL=0
52
53#
54# Loadable module support
55#
56# CONFIG_MODULES is not set
57
58#
59# Processor
60#
61# CONFIG_6xx is not set
62# CONFIG_40x is not set
63# CONFIG_44x is not set
64# CONFIG_POWER3 is not set
65# CONFIG_POWER4 is not set
66# CONFIG_8xx is not set
67# CONFIG_E200 is not set
68CONFIG_E500=y
69CONFIG_BOOKE=y
70CONFIG_FSL_BOOKE=y
71# CONFIG_PHYS_64BIT is not set
72CONFIG_SPE=y
73CONFIG_MATH_EMULATION=y
74# CONFIG_KEXEC is not set
75# CONFIG_CPU_FREQ is not set
76# CONFIG_PM is not set
77CONFIG_85xx=y
78CONFIG_PPC_INDIRECT_PCI_BE=y
79
80#
81# Freescale 85xx options
82#
83# CONFIG_MPC8540_ADS is not set
84# CONFIG_MPC8548_CDS is not set
85# CONFIG_MPC8555_CDS is not set
86CONFIG_MPC8560_ADS=y
87# CONFIG_SBC8560 is not set
88# CONFIG_STX_GP3 is not set
89CONFIG_MPC8560=y
90
91#
92# Platform options
93#
94CONFIG_CPM2=y
95# CONFIG_PC_KEYBOARD is not set
96# CONFIG_SMP is not set
97# CONFIG_HIGHMEM is not set
98# CONFIG_HZ_100 is not set
99CONFIG_HZ_250=y
100# CONFIG_HZ_1000 is not set
101CONFIG_HZ=250
102CONFIG_PREEMPT_NONE=y
103# CONFIG_PREEMPT_VOLUNTARY is not set
104# CONFIG_PREEMPT is not set
105CONFIG_SELECT_MEMORY_MODEL=y
106CONFIG_FLATMEM_MANUAL=y
107# CONFIG_DISCONTIGMEM_MANUAL is not set
108# CONFIG_SPARSEMEM_MANUAL is not set
109CONFIG_FLATMEM=y
110CONFIG_FLAT_NODE_MEM_MAP=y
111CONFIG_BINFMT_ELF=y
112# CONFIG_BINFMT_MISC is not set
113# CONFIG_CMDLINE_BOOL is not set
114CONFIG_SECCOMP=y
115CONFIG_ISA_DMA_API=y
116
117#
118# Bus options
119#
120CONFIG_PCI=y
121CONFIG_PCI_DOMAINS=y
122# CONFIG_PCI_LEGACY_PROC is not set
123CONFIG_PCI_NAMES=y
124
125#
126# PCCARD (PCMCIA/CardBus) support
127#
128# CONFIG_PCCARD is not set
129
130#
131# Advanced setup
132#
133# CONFIG_ADVANCED_OPTIONS is not set
134
135#
136# Default settings for advanced configuration options are used
137#
138CONFIG_HIGHMEM_START=0xfe000000
139CONFIG_LOWMEM_SIZE=0x30000000
140CONFIG_KERNEL_START=0xc0000000
141CONFIG_TASK_SIZE=0x80000000
142CONFIG_BOOT_LOAD=0x00800000
143
144#
145# Networking
146#
147CONFIG_NET=y
148
149#
150# Networking options
151#
152CONFIG_PACKET=y
153# CONFIG_PACKET_MMAP is not set
154CONFIG_UNIX=y
155# CONFIG_NET_KEY is not set
156CONFIG_INET=y
157CONFIG_IP_MULTICAST=y
158# CONFIG_IP_ADVANCED_ROUTER is not set
159CONFIG_IP_FIB_HASH=y
160CONFIG_IP_PNP=y
161CONFIG_IP_PNP_DHCP=y
162CONFIG_IP_PNP_BOOTP=y
163# CONFIG_IP_PNP_RARP is not set
164# CONFIG_NET_IPIP is not set
165# CONFIG_NET_IPGRE is not set
166# CONFIG_IP_MROUTE is not set
167# CONFIG_ARPD is not set
168CONFIG_SYN_COOKIES=y
169# CONFIG_INET_AH is not set
170# CONFIG_INET_ESP is not set
171# CONFIG_INET_IPCOMP is not set
172# CONFIG_INET_TUNNEL is not set
173CONFIG_IP_TCPDIAG=y
174# CONFIG_IP_TCPDIAG_IPV6 is not set
175# CONFIG_TCP_CONG_ADVANCED is not set
176CONFIG_TCP_CONG_BIC=y
177# CONFIG_IPV6 is not set
178# CONFIG_NETFILTER is not set
179
180#
181# SCTP Configuration (EXPERIMENTAL)
182#
183# CONFIG_IP_SCTP is not set
184# CONFIG_ATM is not set
185# CONFIG_BRIDGE is not set
186# CONFIG_VLAN_8021Q is not set
187# CONFIG_DECNET is not set
188# CONFIG_LLC2 is not set
189# CONFIG_IPX is not set
190# CONFIG_ATALK is not set
191# CONFIG_X25 is not set
192# CONFIG_LAPB is not set
193# CONFIG_NET_DIVERT is not set
194# CONFIG_ECONET is not set
195# CONFIG_WAN_ROUTER is not set
196# CONFIG_NET_SCHED is not set
197# CONFIG_NET_CLS_ROUTE is not set
198
199#
200# Network testing
201#
202# CONFIG_NET_PKTGEN is not set
203# CONFIG_HAMRADIO is not set
204# CONFIG_IRDA is not set
205# CONFIG_BT is not set
206
207#
208# Device Drivers
209#
210
211#
212# Generic Driver Options
213#
214CONFIG_STANDALONE=y
215CONFIG_PREVENT_FIRMWARE_BUILD=y
216# CONFIG_FW_LOADER is not set
217
218#
219# Memory Technology Devices (MTD)
220#
221# CONFIG_MTD is not set
222
223#
224# Parallel port support
225#
226# CONFIG_PARPORT is not set
227
228#
229# Plug and Play support
230#
231
232#
233# Block devices
234#
235# CONFIG_BLK_DEV_FD is not set
236# CONFIG_BLK_CPQ_DA is not set
237# CONFIG_BLK_CPQ_CISS_DA is not set
238# CONFIG_BLK_DEV_DAC960 is not set
239# CONFIG_BLK_DEV_UMEM is not set
240# CONFIG_BLK_DEV_COW_COMMON is not set
241CONFIG_BLK_DEV_LOOP=y
242# CONFIG_BLK_DEV_CRYPTOLOOP is not set
243# CONFIG_BLK_DEV_NBD is not set
244# CONFIG_BLK_DEV_SX8 is not set
245CONFIG_BLK_DEV_RAM=y
246CONFIG_BLK_DEV_RAM_COUNT=16
247CONFIG_BLK_DEV_RAM_SIZE=32768
248CONFIG_BLK_DEV_INITRD=y
249CONFIG_INITRAMFS_SOURCE=""
250# CONFIG_LBD is not set
251# CONFIG_CDROM_PKTCDVD is not set
252
253#
254# IO Schedulers
255#
256CONFIG_IOSCHED_NOOP=y
257CONFIG_IOSCHED_AS=y
258CONFIG_IOSCHED_DEADLINE=y
259CONFIG_IOSCHED_CFQ=y
260# CONFIG_ATA_OVER_ETH is not set
261
262#
263# ATA/ATAPI/MFM/RLL support
264#
265# CONFIG_IDE is not set
266
267#
268# SCSI device support
269#
270# CONFIG_SCSI is not set
271
272#
273# Multi-device support (RAID and LVM)
274#
275# CONFIG_MD is not set
276
277#
278# Fusion MPT device support
279#
280# CONFIG_FUSION is not set
281
282#
283# IEEE 1394 (FireWire) support
284#
285# CONFIG_IEEE1394 is not set
286
287#
288# I2O device support
289#
290# CONFIG_I2O is not set
291
292#
293# Macintosh device drivers
294#
295
296#
297# Network device support
298#
299CONFIG_NETDEVICES=y
300# CONFIG_DUMMY is not set
301# CONFIG_BONDING is not set
302# CONFIG_EQUALIZER is not set
303# CONFIG_TUN is not set
304
305#
306# ARCnet devices
307#
308# CONFIG_ARCNET is not set
309
310#
311# Ethernet (10 or 100Mbit)
312#
313CONFIG_NET_ETHERNET=y
314CONFIG_MII=y
315# CONFIG_HAPPYMEAL is not set
316# CONFIG_SUNGEM is not set
317# CONFIG_NET_VENDOR_3COM is not set
318
319#
320# Tulip family network device support
321#
322# CONFIG_NET_TULIP is not set
323# CONFIG_HP100 is not set
324# CONFIG_NET_PCI is not set
325
326#
327# Ethernet (1000 Mbit)
328#
329# CONFIG_ACENIC is not set
330# CONFIG_DL2K is not set
331# CONFIG_E1000 is not set
332# CONFIG_NS83820 is not set
333# CONFIG_HAMACHI is not set
334# CONFIG_YELLOWFIN is not set
335# CONFIG_R8169 is not set
336# CONFIG_SKGE is not set
337# CONFIG_SK98LIN is not set
338# CONFIG_TIGON3 is not set
339# CONFIG_BNX2 is not set
340CONFIG_GIANFAR=y
341CONFIG_GFAR_NAPI=y
342
343#
344# Ethernet (10000 Mbit)
345#
346# CONFIG_IXGB is not set
347# CONFIG_S2IO is not set
348
349#
350# Token Ring devices
351#
352# CONFIG_TR is not set
353
354#
355# Wireless LAN (non-hamradio)
356#
357# CONFIG_NET_RADIO is not set
358
359#
360# Wan interfaces
361#
362# CONFIG_WAN is not set
363# CONFIG_FDDI is not set
364# CONFIG_HIPPI is not set
365# CONFIG_PPP is not set
366# CONFIG_SLIP is not set
367# CONFIG_SHAPER is not set
368# CONFIG_NETCONSOLE is not set
369# CONFIG_NETPOLL is not set
370# CONFIG_NET_POLL_CONTROLLER is not set
371
372#
373# ISDN subsystem
374#
375# CONFIG_ISDN is not set
376
377#
378# Telephony Support
379#
380# CONFIG_PHONE is not set
381
382#
383# Input device support
384#
385CONFIG_INPUT=y
386
387#
388# Userland interfaces
389#
390# CONFIG_INPUT_MOUSEDEV is not set
391# CONFIG_INPUT_JOYDEV is not set
392# CONFIG_INPUT_TSDEV is not set
393# CONFIG_INPUT_EVDEV is not set
394# CONFIG_INPUT_EVBUG is not set
395
396#
397# Input Device Drivers
398#
399# CONFIG_INPUT_KEYBOARD is not set
400# CONFIG_INPUT_MOUSE is not set
401# CONFIG_INPUT_JOYSTICK is not set
402# CONFIG_INPUT_TOUCHSCREEN is not set
403# CONFIG_INPUT_MISC is not set
404
405#
406# Hardware I/O ports
407#
408# CONFIG_SERIO is not set
409# CONFIG_GAMEPORT is not set
410
411#
412# Character devices
413#
414# CONFIG_VT is not set
415# CONFIG_SERIAL_NONSTANDARD is not set
416
417#
418# Serial drivers
419#
420# CONFIG_SERIAL_8250 is not set
421
422#
423# Non-8250 serial port support
424#
425CONFIG_SERIAL_CORE=y
426CONFIG_SERIAL_CORE_CONSOLE=y
427CONFIG_SERIAL_CPM=y
428CONFIG_SERIAL_CPM_CONSOLE=y
429CONFIG_SERIAL_CPM_SCC1=y
430CONFIG_SERIAL_CPM_SCC2=y
431# CONFIG_SERIAL_CPM_SCC3 is not set
432# CONFIG_SERIAL_CPM_SCC4 is not set
433# CONFIG_SERIAL_CPM_SMC1 is not set
434# CONFIG_SERIAL_CPM_SMC2 is not set
435# CONFIG_SERIAL_JSM is not set
436CONFIG_UNIX98_PTYS=y
437CONFIG_LEGACY_PTYS=y
438CONFIG_LEGACY_PTY_COUNT=256
439
440#
441# IPMI
442#
443# CONFIG_IPMI_HANDLER is not set
444
445#
446# Watchdog Cards
447#
448# CONFIG_WATCHDOG is not set
449# CONFIG_NVRAM is not set
450CONFIG_GEN_RTC=y
451# CONFIG_GEN_RTC_X is not set
452# CONFIG_DTLK is not set
453# CONFIG_R3964 is not set
454# CONFIG_APPLICOM is not set
455
456#
457# Ftape, the floppy tape device driver
458#
459# CONFIG_AGP is not set
460# CONFIG_DRM is not set
461# CONFIG_RAW_DRIVER is not set
462
463#
464# TPM devices
465#
466# CONFIG_TCG_TPM is not set
467
468#
469# I2C support
470#
471CONFIG_I2C=y
472CONFIG_I2C_CHARDEV=y
473
474#
475# I2C Algorithms
476#
477# CONFIG_I2C_ALGOBIT is not set
478# CONFIG_I2C_ALGOPCF is not set
479# CONFIG_I2C_ALGOPCA is not set
480
481#
482# I2C Hardware Bus support
483#
484# CONFIG_I2C_ALI1535 is not set
485# CONFIG_I2C_ALI1563 is not set
486# CONFIG_I2C_ALI15X3 is not set
487# CONFIG_I2C_AMD756 is not set
488# CONFIG_I2C_AMD8111 is not set
489# CONFIG_I2C_I801 is not set
490# CONFIG_I2C_I810 is not set
491# CONFIG_I2C_PIIX4 is not set
492CONFIG_I2C_MPC=y
493# CONFIG_I2C_NFORCE2 is not set
494# CONFIG_I2C_PARPORT_LIGHT is not set
495# CONFIG_I2C_PROSAVAGE is not set
496# CONFIG_I2C_SAVAGE4 is not set
497# CONFIG_SCx200_ACB is not set
498# CONFIG_I2C_SIS5595 is not set
499# CONFIG_I2C_SIS630 is not set
500# CONFIG_I2C_SIS96X is not set
501# CONFIG_I2C_VIA is not set
502# CONFIG_I2C_VIAPRO is not set
503# CONFIG_I2C_VOODOO3 is not set
504# CONFIG_I2C_PCA_ISA is not set
505# CONFIG_I2C_SENSOR is not set
506
507#
508# Miscellaneous I2C Chip support
509#
510# CONFIG_SENSORS_DS1337 is not set
511# CONFIG_SENSORS_DS1374 is not set
512# CONFIG_SENSORS_EEPROM is not set
513# CONFIG_SENSORS_PCF8574 is not set
514# CONFIG_SENSORS_PCA9539 is not set
515# CONFIG_SENSORS_PCF8591 is not set
516# CONFIG_SENSORS_RTC8564 is not set
517# CONFIG_SENSORS_M41T00 is not set
518# CONFIG_SENSORS_MAX6875 is not set
519# CONFIG_I2C_DEBUG_CORE is not set
520# CONFIG_I2C_DEBUG_ALGO is not set
521# CONFIG_I2C_DEBUG_BUS is not set
522# CONFIG_I2C_DEBUG_CHIP is not set
523
524#
525# Dallas's 1-wire bus
526#
527# CONFIG_W1 is not set
528
529#
530# Hardware Monitoring support
531#
532CONFIG_HWMON=y
533# CONFIG_SENSORS_ADM1021 is not set
534# CONFIG_SENSORS_ADM1025 is not set
535# CONFIG_SENSORS_ADM1026 is not set
536# CONFIG_SENSORS_ADM1031 is not set
537# CONFIG_SENSORS_ADM9240 is not set
538# CONFIG_SENSORS_ASB100 is not set
539# CONFIG_SENSORS_ATXP1 is not set
540# CONFIG_SENSORS_DS1621 is not set
541# CONFIG_SENSORS_FSCHER is not set
542# CONFIG_SENSORS_FSCPOS is not set
543# CONFIG_SENSORS_GL518SM is not set
544# CONFIG_SENSORS_GL520SM is not set
545# CONFIG_SENSORS_IT87 is not set
546# CONFIG_SENSORS_LM63 is not set
547# CONFIG_SENSORS_LM75 is not set
548# CONFIG_SENSORS_LM77 is not set
549# CONFIG_SENSORS_LM78 is not set
550# CONFIG_SENSORS_LM80 is not set
551# CONFIG_SENSORS_LM83 is not set
552# CONFIG_SENSORS_LM85 is not set
553# CONFIG_SENSORS_LM87 is not set
554# CONFIG_SENSORS_LM90 is not set
555# CONFIG_SENSORS_LM92 is not set
556# CONFIG_SENSORS_MAX1619 is not set
557# CONFIG_SENSORS_PC87360 is not set
558# CONFIG_SENSORS_SIS5595 is not set
559# CONFIG_SENSORS_SMSC47M1 is not set
560# CONFIG_SENSORS_SMSC47B397 is not set
561# CONFIG_SENSORS_VIA686A is not set
562# CONFIG_SENSORS_W83781D is not set
563# CONFIG_SENSORS_W83L785TS is not set
564# CONFIG_SENSORS_W83627HF is not set
565# CONFIG_SENSORS_W83627EHF is not set
566# CONFIG_HWMON_DEBUG_CHIP is not set
567
568#
569# Misc devices
570#
571
572#
573# Multimedia devices
574#
575# CONFIG_VIDEO_DEV is not set
576
577#
578# Digital Video Broadcasting Devices
579#
580# CONFIG_DVB is not set
581
582#
583# Graphics support
584#
585# CONFIG_FB is not set
586
587#
588# Sound
589#
590# CONFIG_SOUND is not set
591
592#
593# USB support
594#
595CONFIG_USB_ARCH_HAS_HCD=y
596CONFIG_USB_ARCH_HAS_OHCI=y
597# CONFIG_USB is not set
598
599#
600# USB Gadget Support
601#
602# CONFIG_USB_GADGET is not set
603
604#
605# MMC/SD Card support
606#
607# CONFIG_MMC is not set
608
609#
610# InfiniBand support
611#
612# CONFIG_INFINIBAND is not set
613
614#
615# SN Devices
616#
617
618#
619# File systems
620#
621CONFIG_EXT2_FS=y
622# CONFIG_EXT2_FS_XATTR is not set
623# CONFIG_EXT2_FS_XIP is not set
624CONFIG_EXT3_FS=y
625CONFIG_EXT3_FS_XATTR=y
626# CONFIG_EXT3_FS_POSIX_ACL is not set
627# CONFIG_EXT3_FS_SECURITY is not set
628CONFIG_JBD=y
629# CONFIG_JBD_DEBUG is not set
630CONFIG_FS_MBCACHE=y
631# CONFIG_REISERFS_FS is not set
632# CONFIG_JFS_FS is not set
633# CONFIG_FS_POSIX_ACL is not set
634
635#
636# XFS support
637#
638# CONFIG_XFS_FS is not set
639# CONFIG_MINIX_FS is not set
640# CONFIG_ROMFS_FS is not set
641CONFIG_INOTIFY=y
642# CONFIG_QUOTA is not set
643CONFIG_DNOTIFY=y
644# CONFIG_AUTOFS_FS is not set
645# CONFIG_AUTOFS4_FS is not set
646
647#
648# CD-ROM/DVD Filesystems
649#
650# CONFIG_ISO9660_FS is not set
651# CONFIG_UDF_FS is not set
652
653#
654# DOS/FAT/NT Filesystems
655#
656# CONFIG_MSDOS_FS is not set
657# CONFIG_VFAT_FS is not set
658# CONFIG_NTFS_FS is not set
659
660#
661# Pseudo filesystems
662#
663CONFIG_PROC_FS=y
664CONFIG_PROC_KCORE=y
665CONFIG_SYSFS=y
666# CONFIG_DEVPTS_FS_XATTR is not set
667CONFIG_TMPFS=y
668# CONFIG_TMPFS_XATTR is not set
669# CONFIG_HUGETLB_PAGE is not set
670CONFIG_RAMFS=y
671
672#
673# Miscellaneous filesystems
674#
675# CONFIG_ADFS_FS is not set
676# CONFIG_AFFS_FS is not set
677# CONFIG_HFS_FS is not set
678# CONFIG_HFSPLUS_FS is not set
679# CONFIG_BEFS_FS is not set
680# CONFIG_BFS_FS is not set
681# CONFIG_EFS_FS is not set
682# CONFIG_CRAMFS is not set
683# CONFIG_VXFS_FS is not set
684# CONFIG_HPFS_FS is not set
685# CONFIG_QNX4FS_FS is not set
686# CONFIG_SYSV_FS is not set
687# CONFIG_UFS_FS is not set
688
689#
690# Network File Systems
691#
692CONFIG_NFS_FS=y
693# CONFIG_NFS_V3 is not set
694# CONFIG_NFS_V4 is not set
695# CONFIG_NFS_DIRECTIO is not set
696# CONFIG_NFSD is not set
697CONFIG_ROOT_NFS=y
698CONFIG_LOCKD=y
699CONFIG_NFS_COMMON=y
700CONFIG_SUNRPC=y
701# CONFIG_RPCSEC_GSS_KRB5 is not set
702# CONFIG_RPCSEC_GSS_SPKM3 is not set
703# CONFIG_SMB_FS is not set
704# CONFIG_CIFS is not set
705# CONFIG_NCP_FS is not set
706# CONFIG_CODA_FS is not set
707# CONFIG_AFS_FS is not set
708
709#
710# Partition Types
711#
712CONFIG_PARTITION_ADVANCED=y
713# CONFIG_ACORN_PARTITION is not set
714# CONFIG_OSF_PARTITION is not set
715# CONFIG_AMIGA_PARTITION is not set
716# CONFIG_ATARI_PARTITION is not set
717# CONFIG_MAC_PARTITION is not set
718# CONFIG_MSDOS_PARTITION is not set
719# CONFIG_LDM_PARTITION is not set
720# CONFIG_SGI_PARTITION is not set
721# CONFIG_ULTRIX_PARTITION is not set
722# CONFIG_SUN_PARTITION is not set
723# CONFIG_EFI_PARTITION is not set
724
725#
726# Native Language Support
727#
728# CONFIG_NLS is not set
729# CONFIG_SCC_ENET is not set
730# CONFIG_FEC_ENET is not set
731
732#
733# CPM2 Options
734#
735
736#
737# Library routines
738#
739# CONFIG_CRC_CCITT is not set
740CONFIG_CRC32=y
741# CONFIG_LIBCRC32C is not set
742
743#
744# Profiling support
745#
746# CONFIG_PROFILING is not set
747
748#
749# Kernel hacking
750#
751# CONFIG_PRINTK_TIME is not set
752# CONFIG_DEBUG_KERNEL is not set
753CONFIG_LOG_BUF_SHIFT=14
754# CONFIG_KGDB_CONSOLE is not set
755
756#
757# Security options
758#
759# CONFIG_KEYS is not set
760# CONFIG_SECURITY is not set
761
762#
763# Cryptographic options
764#
765# CONFIG_CRYPTO is not set
766
767#
768# Hardware crypto devices
769#
diff --git a/arch/ppc/configs/stx_gp3_defconfig b/arch/ppc/configs/stx_gp3_defconfig
deleted file mode 100644
index 70d6f842aa9b..000000000000
--- a/arch/ppc/configs/stx_gp3_defconfig
+++ /dev/null
@@ -1,989 +0,0 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.12-rc4
4# Tue May 24 18:11:04 2005
5#
6CONFIG_MMU=y
7CONFIG_GENERIC_HARDIRQS=y
8CONFIG_RWSEM_XCHGADD_ALGORITHM=y
9CONFIG_GENERIC_CALIBRATE_DELAY=y
10CONFIG_HAVE_DEC_LOCK=y
11CONFIG_PPC=y
12CONFIG_PPC32=y
13CONFIG_GENERIC_NVRAM=y
14CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
15
16#
17# Code maturity level options
18#
19CONFIG_EXPERIMENTAL=y
20CONFIG_CLEAN_COMPILE=y
21CONFIG_BROKEN_ON_SMP=y
22CONFIG_INIT_ENV_ARG_LIMIT=32
23
24#
25# General setup
26#
27CONFIG_LOCALVERSION=""
28CONFIG_SWAP=y
29CONFIG_SYSVIPC=y
30# CONFIG_POSIX_MQUEUE is not set
31# CONFIG_BSD_PROCESS_ACCT is not set
32CONFIG_SYSCTL=y
33# CONFIG_AUDIT is not set
34CONFIG_HOTPLUG=y
35CONFIG_KOBJECT_UEVENT=y
36# CONFIG_IKCONFIG is not set
37CONFIG_EMBEDDED=y
38CONFIG_KALLSYMS=y
39# CONFIG_KALLSYMS_ALL is not set
40# CONFIG_KALLSYMS_EXTRA_PASS is not set
41CONFIG_PRINTK=y
42CONFIG_BUG=y
43CONFIG_BASE_FULL=y
44CONFIG_FUTEX=y
45CONFIG_EPOLL=y
46# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
47CONFIG_SHMEM=y
48CONFIG_CC_ALIGN_FUNCTIONS=0
49CONFIG_CC_ALIGN_LABELS=0
50CONFIG_CC_ALIGN_LOOPS=0
51CONFIG_CC_ALIGN_JUMPS=0
52# CONFIG_TINY_SHMEM is not set
53CONFIG_BASE_SMALL=0
54
55#
56# Loadable module support
57#
58CONFIG_MODULES=y
59# CONFIG_MODULE_UNLOAD is not set
60CONFIG_OBSOLETE_MODPARM=y
61CONFIG_MODVERSIONS=y
62# CONFIG_MODULE_SRCVERSION_ALL is not set
63CONFIG_KMOD=y
64
65#
66# Processor
67#
68# CONFIG_6xx is not set
69# CONFIG_40x is not set
70# CONFIG_44x is not set
71# CONFIG_POWER3 is not set
72# CONFIG_POWER4 is not set
73# CONFIG_8xx is not set
74CONFIG_E500=y
75CONFIG_BOOKE=y
76CONFIG_FSL_BOOKE=y
77# CONFIG_PHYS_64BIT is not set
78# CONFIG_SPE is not set
79CONFIG_MATH_EMULATION=y
80# CONFIG_CPU_FREQ is not set
81# CONFIG_PM is not set
82CONFIG_85xx=y
83CONFIG_PPC_INDIRECT_PCI_BE=y
84
85#
86# Freescale 85xx options
87#
88# CONFIG_MPC8540_ADS is not set
89# CONFIG_MPC8555_CDS is not set
90# CONFIG_MPC8560_ADS is not set
91# CONFIG_SBC8560 is not set
92CONFIG_STX_GP3=y
93CONFIG_MPC8560=y
94
95#
96# Platform options
97#
98CONFIG_CPM2=y
99# CONFIG_PC_KEYBOARD is not set
100# CONFIG_SMP is not set
101# CONFIG_PREEMPT is not set
102CONFIG_HIGHMEM=y
103CONFIG_BINFMT_ELF=y
104CONFIG_BINFMT_MISC=m
105# CONFIG_CMDLINE_BOOL is not set
106CONFIG_ISA_DMA_API=y
107
108#
109# Bus options
110#
111CONFIG_PCI=y
112CONFIG_PCI_DOMAINS=y
113# CONFIG_PCI_LEGACY_PROC is not set
114# CONFIG_PCI_NAMES is not set
115# CONFIG_PCI_DEBUG is not set
116
117#
118# PCCARD (PCMCIA/CardBus) support
119#
120# CONFIG_PCCARD is not set
121CONFIG_RAPIDIO=y
122CONFIG_RAPIDIO_8_BIT_TRANSPORT=y
123CONFIG_RAPIDIO_DISC_TIMEOUT=30
124
125#
126# Advanced setup
127#
128# CONFIG_ADVANCED_OPTIONS is not set
129
130#
131# Default settings for advanced configuration options are used
132#
133CONFIG_HIGHMEM_START=0xfe000000
134CONFIG_LOWMEM_SIZE=0x30000000
135CONFIG_KERNEL_START=0xc0000000
136CONFIG_TASK_SIZE=0x80000000
137CONFIG_BOOT_LOAD=0x00800000
138
139#
140# Device Drivers
141#
142
143#
144# Generic Driver Options
145#
146CONFIG_STANDALONE=y
147CONFIG_PREVENT_FIRMWARE_BUILD=y
148# CONFIG_FW_LOADER is not set
149# CONFIG_DEBUG_DRIVER is not set
150
151#
152# Memory Technology Devices (MTD)
153#
154# CONFIG_MTD is not set
155
156#
157# Parallel port support
158#
159CONFIG_PARPORT=m
160CONFIG_PARPORT_PC=m
161# CONFIG_PARPORT_PC_FIFO is not set
162# CONFIG_PARPORT_PC_SUPERIO is not set
163# CONFIG_PARPORT_GSC is not set
164# CONFIG_PARPORT_1284 is not set
165
166#
167# Plug and Play support
168#
169
170#
171# Block devices
172#
173# CONFIG_BLK_DEV_FD is not set
174# CONFIG_PARIDE is not set
175# CONFIG_BLK_CPQ_DA is not set
176# CONFIG_BLK_CPQ_CISS_DA is not set
177# CONFIG_BLK_DEV_DAC960 is not set
178# CONFIG_BLK_DEV_UMEM is not set
179# CONFIG_BLK_DEV_COW_COMMON is not set
180CONFIG_BLK_DEV_LOOP=m
181# CONFIG_BLK_DEV_CRYPTOLOOP is not set
182CONFIG_BLK_DEV_NBD=m
183# CONFIG_BLK_DEV_SX8 is not set
184CONFIG_BLK_DEV_RAM=m
185CONFIG_BLK_DEV_RAM_COUNT=16
186CONFIG_BLK_DEV_RAM_SIZE=4096
187CONFIG_INITRAMFS_SOURCE=""
188# CONFIG_LBD is not set
189# CONFIG_CDROM_PKTCDVD is not set
190
191#
192# IO Schedulers
193#
194CONFIG_IOSCHED_NOOP=y
195CONFIG_IOSCHED_AS=y
196CONFIG_IOSCHED_DEADLINE=y
197CONFIG_IOSCHED_CFQ=y
198# CONFIG_ATA_OVER_ETH is not set
199
200#
201# ATA/ATAPI/MFM/RLL support
202#
203CONFIG_IDE=y
204CONFIG_BLK_DEV_IDE=y
205
206#
207# Please see Documentation/ide.txt for help/info on IDE drives
208#
209# CONFIG_BLK_DEV_IDE_SATA is not set
210CONFIG_BLK_DEV_IDEDISK=y
211# CONFIG_IDEDISK_MULTI_MODE is not set
212CONFIG_BLK_DEV_IDECD=m
213# CONFIG_BLK_DEV_IDETAPE is not set
214# CONFIG_BLK_DEV_IDEFLOPPY is not set
215# CONFIG_BLK_DEV_IDESCSI is not set
216# CONFIG_IDE_TASK_IOCTL is not set
217
218#
219# IDE chipset support/bugfixes
220#
221CONFIG_IDE_GENERIC=y
222# CONFIG_BLK_DEV_IDEPCI is not set
223# CONFIG_IDE_ARM is not set
224# CONFIG_BLK_DEV_IDEDMA is not set
225# CONFIG_IDEDMA_AUTO is not set
226# CONFIG_BLK_DEV_HD is not set
227
228#
229# SCSI device support
230#
231CONFIG_SCSI=m
232CONFIG_SCSI_PROC_FS=y
233
234#
235# SCSI support type (disk, tape, CD-ROM)
236#
237CONFIG_BLK_DEV_SD=m
238CONFIG_CHR_DEV_ST=m
239# CONFIG_CHR_DEV_OSST is not set
240CONFIG_BLK_DEV_SR=m
241# CONFIG_BLK_DEV_SR_VENDOR is not set
242CONFIG_CHR_DEV_SG=m
243
244#
245# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
246#
247CONFIG_SCSI_MULTI_LUN=y
248CONFIG_SCSI_CONSTANTS=y
249# CONFIG_SCSI_LOGGING is not set
250
251#
252# SCSI Transport Attributes
253#
254# CONFIG_SCSI_SPI_ATTRS is not set
255# CONFIG_SCSI_FC_ATTRS is not set
256# CONFIG_SCSI_ISCSI_ATTRS is not set
257
258#
259# SCSI low-level drivers
260#
261# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
262# CONFIG_SCSI_3W_9XXX is not set
263# CONFIG_SCSI_ACARD is not set
264# CONFIG_SCSI_AACRAID is not set
265# CONFIG_SCSI_AIC7XXX is not set
266# CONFIG_SCSI_AIC7XXX_OLD is not set
267# CONFIG_SCSI_AIC79XX is not set
268# CONFIG_SCSI_DPT_I2O is not set
269# CONFIG_MEGARAID_NEWGEN is not set
270# CONFIG_MEGARAID_LEGACY is not set
271# CONFIG_SCSI_SATA is not set
272# CONFIG_SCSI_BUSLOGIC is not set
273# CONFIG_SCSI_DMX3191D is not set
274# CONFIG_SCSI_EATA is not set
275# CONFIG_SCSI_FUTURE_DOMAIN is not set
276# CONFIG_SCSI_GDTH is not set
277# CONFIG_SCSI_IPS is not set
278# CONFIG_SCSI_INITIO is not set
279# CONFIG_SCSI_INIA100 is not set
280# CONFIG_SCSI_PPA is not set
281# CONFIG_SCSI_IMM is not set
282# CONFIG_SCSI_SYM53C8XX_2 is not set
283# CONFIG_SCSI_IPR is not set
284# CONFIG_SCSI_QLOGIC_FC is not set
285# CONFIG_SCSI_QLOGIC_1280 is not set
286CONFIG_SCSI_QLA2XXX=m
287# CONFIG_SCSI_QLA21XX is not set
288# CONFIG_SCSI_QLA22XX is not set
289# CONFIG_SCSI_QLA2300 is not set
290# CONFIG_SCSI_QLA2322 is not set
291# CONFIG_SCSI_QLA6312 is not set
292# CONFIG_SCSI_LPFC is not set
293# CONFIG_SCSI_DC395x is not set
294# CONFIG_SCSI_DC390T is not set
295# CONFIG_SCSI_NSP32 is not set
296# CONFIG_SCSI_DEBUG is not set
297
298#
299# Multi-device support (RAID and LVM)
300#
301# CONFIG_MD is not set
302
303#
304# Fusion MPT device support
305#
306# CONFIG_FUSION is not set
307
308#
309# IEEE 1394 (FireWire) support
310#
311# CONFIG_IEEE1394 is not set
312
313#
314# I2O device support
315#
316# CONFIG_I2O is not set
317
318#
319# Macintosh device drivers
320#
321
322#
323# Networking support
324#
325CONFIG_NET=y
326
327#
328# Networking options
329#
330CONFIG_PACKET=y
331# CONFIG_PACKET_MMAP is not set
332CONFIG_UNIX=y
333# CONFIG_NET_KEY is not set
334CONFIG_INET=y
335# CONFIG_IP_MULTICAST is not set
336# CONFIG_IP_ADVANCED_ROUTER is not set
337CONFIG_IP_PNP=y
338# CONFIG_IP_PNP_DHCP is not set
339CONFIG_IP_PNP_BOOTP=y
340# CONFIG_IP_PNP_RARP is not set
341# CONFIG_NET_IPIP is not set
342# CONFIG_NET_IPGRE is not set
343# CONFIG_ARPD is not set
344# CONFIG_SYN_COOKIES is not set
345# CONFIG_INET_AH is not set
346# CONFIG_INET_ESP is not set
347# CONFIG_INET_IPCOMP is not set
348# CONFIG_INET_TUNNEL is not set
349CONFIG_IP_TCPDIAG=y
350# CONFIG_IP_TCPDIAG_IPV6 is not set
351
352#
353# IP: Virtual Server Configuration
354#
355# CONFIG_IP_VS is not set
356# CONFIG_IPV6 is not set
357CONFIG_NETFILTER=y
358# CONFIG_NETFILTER_DEBUG is not set
359
360#
361# IP: Netfilter Configuration
362#
363CONFIG_IP_NF_CONNTRACK=m
364# CONFIG_IP_NF_CT_ACCT is not set
365# CONFIG_IP_NF_CONNTRACK_MARK is not set
366# CONFIG_IP_NF_CT_PROTO_SCTP is not set
367CONFIG_IP_NF_FTP=m
368CONFIG_IP_NF_IRC=m
369# CONFIG_IP_NF_TFTP is not set
370# CONFIG_IP_NF_AMANDA is not set
371# CONFIG_IP_NF_QUEUE is not set
372CONFIG_IP_NF_IPTABLES=m
373# CONFIG_IP_NF_MATCH_LIMIT is not set
374# CONFIG_IP_NF_MATCH_IPRANGE is not set
375# CONFIG_IP_NF_MATCH_MAC is not set
376# CONFIG_IP_NF_MATCH_PKTTYPE is not set
377# CONFIG_IP_NF_MATCH_MARK is not set
378# CONFIG_IP_NF_MATCH_MULTIPORT is not set
379# CONFIG_IP_NF_MATCH_TOS is not set
380# CONFIG_IP_NF_MATCH_RECENT is not set
381# CONFIG_IP_NF_MATCH_ECN is not set
382# CONFIG_IP_NF_MATCH_DSCP is not set
383# CONFIG_IP_NF_MATCH_AH_ESP is not set
384# CONFIG_IP_NF_MATCH_LENGTH is not set
385# CONFIG_IP_NF_MATCH_TTL is not set
386# CONFIG_IP_NF_MATCH_TCPMSS is not set
387# CONFIG_IP_NF_MATCH_HELPER is not set
388# CONFIG_IP_NF_MATCH_STATE is not set
389# CONFIG_IP_NF_MATCH_CONNTRACK is not set
390# CONFIG_IP_NF_MATCH_OWNER is not set
391# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
392# CONFIG_IP_NF_MATCH_REALM is not set
393# CONFIG_IP_NF_MATCH_SCTP is not set
394# CONFIG_IP_NF_MATCH_COMMENT is not set
395# CONFIG_IP_NF_MATCH_HASHLIMIT is not set
396CONFIG_IP_NF_FILTER=m
397# CONFIG_IP_NF_TARGET_REJECT is not set
398# CONFIG_IP_NF_TARGET_LOG is not set
399# CONFIG_IP_NF_TARGET_ULOG is not set
400# CONFIG_IP_NF_TARGET_TCPMSS is not set
401CONFIG_IP_NF_NAT=m
402CONFIG_IP_NF_NAT_NEEDED=y
403CONFIG_IP_NF_TARGET_MASQUERADE=m
404CONFIG_IP_NF_TARGET_REDIRECT=m
405# CONFIG_IP_NF_TARGET_NETMAP is not set
406# CONFIG_IP_NF_TARGET_SAME is not set
407CONFIG_IP_NF_NAT_SNMP_BASIC=m
408CONFIG_IP_NF_NAT_IRC=m
409CONFIG_IP_NF_NAT_FTP=m
410# CONFIG_IP_NF_MANGLE is not set
411# CONFIG_IP_NF_RAW is not set
412# CONFIG_IP_NF_ARPTABLES is not set
413
414#
415# SCTP Configuration (EXPERIMENTAL)
416#
417# CONFIG_IP_SCTP is not set
418# CONFIG_ATM is not set
419# CONFIG_BRIDGE is not set
420# CONFIG_VLAN_8021Q is not set
421# CONFIG_DECNET is not set
422# CONFIG_LLC2 is not set
423# CONFIG_IPX is not set
424# CONFIG_ATALK is not set
425# CONFIG_X25 is not set
426# CONFIG_LAPB is not set
427# CONFIG_NET_DIVERT is not set
428# CONFIG_ECONET is not set
429# CONFIG_WAN_ROUTER is not set
430
431#
432# QoS and/or fair queueing
433#
434# CONFIG_NET_SCHED is not set
435# CONFIG_NET_CLS_ROUTE is not set
436
437#
438# Network testing
439#
440CONFIG_NET_PKTGEN=y
441# CONFIG_NETPOLL is not set
442# CONFIG_NET_POLL_CONTROLLER is not set
443# CONFIG_HAMRADIO is not set
444# CONFIG_IRDA is not set
445# CONFIG_BT is not set
446CONFIG_NETDEVICES=y
447# CONFIG_DUMMY is not set
448# CONFIG_BONDING is not set
449# CONFIG_EQUALIZER is not set
450# CONFIG_TUN is not set
451
452#
453# ARCnet devices
454#
455# CONFIG_ARCNET is not set
456
457#
458# Ethernet (10 or 100Mbit)
459#
460CONFIG_NET_ETHERNET=y
461# CONFIG_MII is not set
462# CONFIG_HAPPYMEAL is not set
463# CONFIG_SUNGEM is not set
464# CONFIG_NET_VENDOR_3COM is not set
465
466#
467# Tulip family network device support
468#
469# CONFIG_NET_TULIP is not set
470# CONFIG_HP100 is not set
471# CONFIG_NET_PCI is not set
472
473#
474# Ethernet (1000 Mbit)
475#
476# CONFIG_ACENIC is not set
477# CONFIG_DL2K is not set
478# CONFIG_E1000 is not set
479# CONFIG_NS83820 is not set
480# CONFIG_HAMACHI is not set
481# CONFIG_YELLOWFIN is not set
482# CONFIG_R8169 is not set
483# CONFIG_SK98LIN is not set
484# CONFIG_TIGON3 is not set
485CONFIG_GIANFAR=y
486CONFIG_GFAR_NAPI=y
487
488#
489# Ethernet (10000 Mbit)
490#
491# CONFIG_IXGB is not set
492# CONFIG_S2IO is not set
493
494#
495# Token Ring devices
496#
497# CONFIG_TR is not set
498
499#
500# Wireless LAN (non-hamradio)
501#
502# CONFIG_NET_RADIO is not set
503
504#
505# Wan interfaces
506#
507# CONFIG_WAN is not set
508CONFIG_RIONET=y
509# CONFIG_FDDI is not set
510# CONFIG_HIPPI is not set
511# CONFIG_PLIP is not set
512# CONFIG_PPP is not set
513# CONFIG_SLIP is not set
514# CONFIG_NET_FC is not set
515# CONFIG_SHAPER is not set
516# CONFIG_NETCONSOLE is not set
517
518#
519# ISDN subsystem
520#
521# CONFIG_ISDN is not set
522
523#
524# Telephony Support
525#
526# CONFIG_PHONE is not set
527
528#
529# Input device support
530#
531CONFIG_INPUT=y
532
533#
534# Userland interfaces
535#
536CONFIG_INPUT_MOUSEDEV=y
537CONFIG_INPUT_MOUSEDEV_PSAUX=y
538CONFIG_INPUT_MOUSEDEV_SCREEN_X=1280
539CONFIG_INPUT_MOUSEDEV_SCREEN_Y=1024
540CONFIG_INPUT_JOYDEV=m
541# CONFIG_INPUT_TSDEV is not set
542CONFIG_INPUT_EVDEV=m
543# CONFIG_INPUT_EVBUG is not set
544
545#
546# Input Device Drivers
547#
548CONFIG_INPUT_KEYBOARD=y
549CONFIG_KEYBOARD_ATKBD=y
550# CONFIG_KEYBOARD_SUNKBD is not set
551# CONFIG_KEYBOARD_LKKBD is not set
552# CONFIG_KEYBOARD_XTKBD is not set
553# CONFIG_KEYBOARD_NEWTON is not set
554CONFIG_INPUT_MOUSE=y
555CONFIG_MOUSE_PS2=y
556# CONFIG_MOUSE_SERIAL is not set
557# CONFIG_MOUSE_VSXXXAA is not set
558# CONFIG_INPUT_JOYSTICK is not set
559# CONFIG_INPUT_TOUCHSCREEN is not set
560# CONFIG_INPUT_MISC is not set
561
562#
563# Hardware I/O ports
564#
565CONFIG_SERIO=y
566CONFIG_SERIO_I8042=y
567CONFIG_SERIO_SERPORT=y
568# CONFIG_SERIO_PARKBD is not set
569# CONFIG_SERIO_PCIPS2 is not set
570CONFIG_SERIO_LIBPS2=y
571# CONFIG_SERIO_RAW is not set
572# CONFIG_GAMEPORT is not set
573CONFIG_SOUND_GAMEPORT=y
574
575#
576# Character devices
577#
578# CONFIG_VT is not set
579# CONFIG_SERIAL_NONSTANDARD is not set
580
581#
582# Serial drivers
583#
584# CONFIG_SERIAL_8250 is not set
585
586#
587# Non-8250 serial port support
588#
589CONFIG_SERIAL_CORE=y
590CONFIG_SERIAL_CORE_CONSOLE=y
591CONFIG_SERIAL_CPM=y
592CONFIG_SERIAL_CPM_CONSOLE=y
593# CONFIG_SERIAL_CPM_SCC1 is not set
594CONFIG_SERIAL_CPM_SCC2=y
595# CONFIG_SERIAL_CPM_SCC3 is not set
596# CONFIG_SERIAL_CPM_SCC4 is not set
597# CONFIG_SERIAL_CPM_SMC1 is not set
598# CONFIG_SERIAL_CPM_SMC2 is not set
599# CONFIG_SERIAL_JSM is not set
600CONFIG_UNIX98_PTYS=y
601CONFIG_LEGACY_PTYS=y
602CONFIG_LEGACY_PTY_COUNT=256
603CONFIG_PRINTER=m
604# CONFIG_LP_CONSOLE is not set
605# CONFIG_PPDEV is not set
606# CONFIG_TIPAR is not set
607
608#
609# IPMI
610#
611# CONFIG_IPMI_HANDLER is not set
612
613#
614# Watchdog Cards
615#
616# CONFIG_WATCHDOG is not set
617# CONFIG_NVRAM is not set
618# CONFIG_GEN_RTC is not set
619# CONFIG_DTLK is not set
620# CONFIG_R3964 is not set
621# CONFIG_APPLICOM is not set
622
623#
624# Ftape, the floppy tape device driver
625#
626CONFIG_AGP=m
627CONFIG_DRM=m
628# CONFIG_DRM_TDFX is not set
629# CONFIG_DRM_R128 is not set
630# CONFIG_DRM_RADEON is not set
631# CONFIG_DRM_MGA is not set
632# CONFIG_DRM_SIS is not set
633# CONFIG_RAW_DRIVER is not set
634
635#
636# TPM devices
637#
638# CONFIG_TCG_TPM is not set
639
640#
641# I2C support
642#
643CONFIG_I2C=m
644CONFIG_I2C_CHARDEV=m
645
646#
647# I2C Algorithms
648#
649CONFIG_I2C_ALGOBIT=m
650# CONFIG_I2C_ALGOPCF is not set
651# CONFIG_I2C_ALGOPCA is not set
652
653#
654# I2C Hardware Bus support
655#
656# CONFIG_I2C_ALI1535 is not set
657# CONFIG_I2C_ALI1563 is not set
658# CONFIG_I2C_ALI15X3 is not set
659# CONFIG_I2C_AMD756 is not set
660# CONFIG_I2C_AMD8111 is not set
661# CONFIG_I2C_I801 is not set
662# CONFIG_I2C_I810 is not set
663# CONFIG_I2C_PIIX4 is not set
664# CONFIG_I2C_MPC is not set
665# CONFIG_I2C_NFORCE2 is not set
666# CONFIG_I2C_PARPORT is not set
667# CONFIG_I2C_PARPORT_LIGHT is not set
668# CONFIG_I2C_PROSAVAGE is not set
669# CONFIG_I2C_SAVAGE4 is not set
670# CONFIG_SCx200_ACB is not set
671# CONFIG_I2C_SIS5595 is not set
672# CONFIG_I2C_SIS630 is not set
673# CONFIG_I2C_SIS96X is not set
674# CONFIG_I2C_STUB is not set
675# CONFIG_I2C_VIA is not set
676# CONFIG_I2C_VIAPRO is not set
677# CONFIG_I2C_VOODOO3 is not set
678# CONFIG_I2C_PCA_ISA is not set
679
680#
681# Hardware Sensors Chip support
682#
683# CONFIG_I2C_SENSOR is not set
684# CONFIG_SENSORS_ADM1021 is not set
685# CONFIG_SENSORS_ADM1025 is not set
686# CONFIG_SENSORS_ADM1026 is not set
687# CONFIG_SENSORS_ADM1031 is not set
688# CONFIG_SENSORS_ASB100 is not set
689# CONFIG_SENSORS_DS1621 is not set
690# CONFIG_SENSORS_FSCHER is not set
691# CONFIG_SENSORS_FSCPOS is not set
692# CONFIG_SENSORS_GL518SM is not set
693# CONFIG_SENSORS_GL520SM is not set
694# CONFIG_SENSORS_IT87 is not set
695# CONFIG_SENSORS_LM63 is not set
696# CONFIG_SENSORS_LM75 is not set
697# CONFIG_SENSORS_LM77 is not set
698# CONFIG_SENSORS_LM78 is not set
699# CONFIG_SENSORS_LM80 is not set
700# CONFIG_SENSORS_LM83 is not set
701# CONFIG_SENSORS_LM85 is not set
702# CONFIG_SENSORS_LM87 is not set
703# CONFIG_SENSORS_LM90 is not set
704# CONFIG_SENSORS_LM92 is not set
705# CONFIG_SENSORS_MAX1619 is not set
706# CONFIG_SENSORS_PC87360 is not set
707# CONFIG_SENSORS_SMSC47B397 is not set
708# CONFIG_SENSORS_SIS5595 is not set
709# CONFIG_SENSORS_SMSC47M1 is not set
710# CONFIG_SENSORS_VIA686A is not set
711# CONFIG_SENSORS_W83781D is not set
712# CONFIG_SENSORS_W83L785TS is not set
713# CONFIG_SENSORS_W83627HF is not set
714
715#
716# Other I2C Chip support
717#
718# CONFIG_SENSORS_DS1337 is not set
719# CONFIG_SENSORS_EEPROM is not set
720# CONFIG_SENSORS_PCF8574 is not set
721# CONFIG_SENSORS_PCF8591 is not set
722# CONFIG_SENSORS_RTC8564 is not set
723# CONFIG_SENSORS_M41T00 is not set
724# CONFIG_I2C_DEBUG_CORE is not set
725# CONFIG_I2C_DEBUG_ALGO is not set
726# CONFIG_I2C_DEBUG_BUS is not set
727# CONFIG_I2C_DEBUG_CHIP is not set
728
729#
730# Dallas's 1-wire bus
731#
732# CONFIG_W1 is not set
733
734#
735# Misc devices
736#
737
738#
739# Multimedia devices
740#
741# CONFIG_VIDEO_DEV is not set
742
743#
744# Digital Video Broadcasting Devices
745#
746# CONFIG_DVB is not set
747
748#
749# Graphics support
750#
751# CONFIG_FB is not set
752
753#
754# Sound
755#
756CONFIG_SOUND=m
757
758#
759# Advanced Linux Sound Architecture
760#
761# CONFIG_SND is not set
762
763#
764# Open Sound System
765#
766# CONFIG_SOUND_PRIME is not set
767
768#
769# USB support
770#
771CONFIG_USB_ARCH_HAS_HCD=y
772CONFIG_USB_ARCH_HAS_OHCI=y
773# CONFIG_USB is not set
774
775#
776# USB Gadget Support
777#
778# CONFIG_USB_GADGET is not set
779
780#
781# MMC/SD Card support
782#
783# CONFIG_MMC is not set
784
785#
786# InfiniBand support
787#
788# CONFIG_INFINIBAND is not set
789
790#
791# File systems
792#
793CONFIG_EXT2_FS=y
794# CONFIG_EXT2_FS_XATTR is not set
795CONFIG_EXT3_FS=y
796CONFIG_EXT3_FS_XATTR=y
797# CONFIG_EXT3_FS_POSIX_ACL is not set
798# CONFIG_EXT3_FS_SECURITY is not set
799CONFIG_JBD=y
800CONFIG_JBD_DEBUG=y
801CONFIG_FS_MBCACHE=y
802# CONFIG_REISERFS_FS is not set
803# CONFIG_JFS_FS is not set
804
805#
806# XFS support
807#
808# CONFIG_XFS_FS is not set
809# CONFIG_MINIX_FS is not set
810# CONFIG_ROMFS_FS is not set
811# CONFIG_QUOTA is not set
812CONFIG_DNOTIFY=y
813CONFIG_AUTOFS_FS=m
814CONFIG_AUTOFS4_FS=y
815
816#
817# CD-ROM/DVD Filesystems
818#
819CONFIG_ISO9660_FS=m
820# CONFIG_JOLIET is not set
821# CONFIG_ZISOFS is not set
822CONFIG_UDF_FS=m
823CONFIG_UDF_NLS=y
824
825#
826# DOS/FAT/NT Filesystems
827#
828CONFIG_FAT_FS=m
829CONFIG_MSDOS_FS=m
830CONFIG_VFAT_FS=m
831CONFIG_FAT_DEFAULT_CODEPAGE=437
832CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
833# CONFIG_NTFS_FS is not set
834
835#
836# Pseudo filesystems
837#
838CONFIG_PROC_FS=y
839# CONFIG_PROC_KCORE is not set
840CONFIG_SYSFS=y
841CONFIG_DEVFS_FS=y
842# CONFIG_DEVFS_MOUNT is not set
843# CONFIG_DEVFS_DEBUG is not set
844# CONFIG_DEVPTS_FS_XATTR is not set
845CONFIG_TMPFS=y
846# CONFIG_TMPFS_XATTR is not set
847# CONFIG_HUGETLB_PAGE is not set
848CONFIG_RAMFS=y
849
850#
851# Miscellaneous filesystems
852#
853# CONFIG_ADFS_FS is not set
854# CONFIG_AFFS_FS is not set
855# CONFIG_HFS_FS is not set
856# CONFIG_HFSPLUS_FS is not set
857# CONFIG_BEFS_FS is not set
858# CONFIG_BFS_FS is not set
859# CONFIG_EFS_FS is not set
860CONFIG_CRAMFS=m
861# CONFIG_VXFS_FS is not set
862# CONFIG_HPFS_FS is not set
863# CONFIG_QNX4FS_FS is not set
864# CONFIG_SYSV_FS is not set
865# CONFIG_UFS_FS is not set
866
867#
868# Network File Systems
869#
870CONFIG_NFS_FS=y
871CONFIG_NFS_V3=y
872# CONFIG_NFS_V4 is not set
873# CONFIG_NFS_DIRECTIO is not set
874# CONFIG_NFSD is not set
875CONFIG_ROOT_NFS=y
876CONFIG_LOCKD=y
877CONFIG_LOCKD_V4=y
878CONFIG_SUNRPC=y
879# CONFIG_RPCSEC_GSS_KRB5 is not set
880# CONFIG_RPCSEC_GSS_SPKM3 is not set
881CONFIG_SMB_FS=m
882# CONFIG_SMB_NLS_DEFAULT is not set
883# CONFIG_CIFS is not set
884# CONFIG_NCP_FS is not set
885# CONFIG_CODA_FS is not set
886# CONFIG_AFS_FS is not set
887
888#
889# Partition Types
890#
891# CONFIG_PARTITION_ADVANCED is not set
892CONFIG_MSDOS_PARTITION=y
893
894#
895# Native Language Support
896#
897CONFIG_NLS=y
898CONFIG_NLS_DEFAULT="iso8859-1"
899# CONFIG_NLS_CODEPAGE_437 is not set
900# CONFIG_NLS_CODEPAGE_737 is not set
901# CONFIG_NLS_CODEPAGE_775 is not set
902# CONFIG_NLS_CODEPAGE_850 is not set
903# CONFIG_NLS_CODEPAGE_852 is not set
904# CONFIG_NLS_CODEPAGE_855 is not set
905# CONFIG_NLS_CODEPAGE_857 is not set
906# CONFIG_NLS_CODEPAGE_860 is not set
907# CONFIG_NLS_CODEPAGE_861 is not set
908# CONFIG_NLS_CODEPAGE_862 is not set
909# CONFIG_NLS_CODEPAGE_863 is not set
910# CONFIG_NLS_CODEPAGE_864 is not set
911# CONFIG_NLS_CODEPAGE_865 is not set
912# CONFIG_NLS_CODEPAGE_866 is not set
913# CONFIG_NLS_CODEPAGE_869 is not set
914# CONFIG_NLS_CODEPAGE_936 is not set
915# CONFIG_NLS_CODEPAGE_950 is not set
916# CONFIG_NLS_CODEPAGE_932 is not set
917# CONFIG_NLS_CODEPAGE_949 is not set
918# CONFIG_NLS_CODEPAGE_874 is not set
919# CONFIG_NLS_ISO8859_8 is not set
920# CONFIG_NLS_CODEPAGE_1250 is not set
921# CONFIG_NLS_CODEPAGE_1251 is not set
922# CONFIG_NLS_ASCII is not set
923# CONFIG_NLS_ISO8859_1 is not set
924# CONFIG_NLS_ISO8859_2 is not set
925# CONFIG_NLS_ISO8859_3 is not set
926# CONFIG_NLS_ISO8859_4 is not set
927# CONFIG_NLS_ISO8859_5 is not set
928# CONFIG_NLS_ISO8859_6 is not set
929# CONFIG_NLS_ISO8859_7 is not set
930# CONFIG_NLS_ISO8859_9 is not set
931# CONFIG_NLS_ISO8859_13 is not set
932# CONFIG_NLS_ISO8859_14 is not set
933# CONFIG_NLS_ISO8859_15 is not set
934# CONFIG_NLS_KOI8_R is not set
935# CONFIG_NLS_KOI8_U is not set
936# CONFIG_NLS_UTF8 is not set
937# CONFIG_SCC_ENET is not set
938# CONFIG_FEC_ENET is not set
939
940#
941# CPM2 Options
942#
943
944#
945# Library routines
946#
947CONFIG_CRC_CCITT=y
948CONFIG_CRC32=y
949# CONFIG_LIBCRC32C is not set
950CONFIG_ZLIB_INFLATE=m
951
952#
953# Profiling support
954#
955# CONFIG_PROFILING is not set
956
957#
958# Kernel hacking
959#
960# CONFIG_PRINTK_TIME is not set
961CONFIG_DEBUG_KERNEL=y
962# CONFIG_MAGIC_SYSRQ is not set
963CONFIG_LOG_BUF_SHIFT=14
964# CONFIG_SCHEDSTATS is not set
965# CONFIG_DEBUG_SLAB is not set
966# CONFIG_DEBUG_SPINLOCK is not set
967# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
968# CONFIG_DEBUG_KOBJECT is not set
969# CONFIG_DEBUG_HIGHMEM is not set
970# CONFIG_DEBUG_INFO is not set
971# CONFIG_DEBUG_FS is not set
972# CONFIG_KGDB_CONSOLE is not set
973# CONFIG_XMON is not set
974CONFIG_BDI_SWITCH=y
975
976#
977# Security options
978#
979# CONFIG_KEYS is not set
980# CONFIG_SECURITY is not set
981
982#
983# Cryptographic options
984#
985# CONFIG_CRYPTO is not set
986
987#
988# Hardware crypto devices
989#
diff --git a/arch/ppc/kernel/Makefile b/arch/ppc/kernel/Makefile
index 6b4f022111e7..7b739054968f 100644
--- a/arch/ppc/kernel/Makefile
+++ b/arch/ppc/kernel/Makefile
@@ -4,7 +4,6 @@
4extra-$(CONFIG_PPC_STD_MMU) := head.o 4extra-$(CONFIG_PPC_STD_MMU) := head.o
5extra-$(CONFIG_40x) := head_4xx.o 5extra-$(CONFIG_40x) := head_4xx.o
6extra-$(CONFIG_44x) := head_44x.o 6extra-$(CONFIG_44x) := head_44x.o
7extra-$(CONFIG_FSL_BOOKE) := head_fsl_booke.o
8extra-$(CONFIG_8xx) := head_8xx.o 7extra-$(CONFIG_8xx) := head_8xx.o
9extra-y += vmlinux.lds 8extra-y += vmlinux.lds
10 9
@@ -13,7 +12,6 @@ obj-y := entry.o traps.o time.o misc.o \
13 ppc_htab.o 12 ppc_htab.o
14obj-$(CONFIG_MODULES) += ppc_ksyms.o 13obj-$(CONFIG_MODULES) += ppc_ksyms.o
15obj-$(CONFIG_PCI) += pci.o 14obj-$(CONFIG_PCI) += pci.o
16obj-$(CONFIG_RAPIDIO) += rio.o
17obj-$(CONFIG_KGDB) += ppc-stub.o 15obj-$(CONFIG_KGDB) += ppc-stub.o
18obj-$(CONFIG_SMP) += smp.o smp-tbsync.o 16obj-$(CONFIG_SMP) += smp.o smp-tbsync.o
19obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o 17obj-$(CONFIG_KEXEC) += machine_kexec.o relocate_kernel.o
diff --git a/arch/ppc/kernel/asm-offsets.c b/arch/ppc/kernel/asm-offsets.c
index e8e94321b59e..a51a17714231 100644
--- a/arch/ppc/kernel/asm-offsets.c
+++ b/arch/ppc/kernel/asm-offsets.c
@@ -54,12 +54,6 @@ main(void)
54 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr)); 54 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
55 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr)); 55 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
56#endif /* CONFIG_ALTIVEC */ 56#endif /* CONFIG_ALTIVEC */
57#ifdef CONFIG_SPE
58 DEFINE(THREAD_EVR0, offsetof(struct thread_struct, evr[0]));
59 DEFINE(THREAD_ACC, offsetof(struct thread_struct, acc));
60 DEFINE(THREAD_SPEFSCR, offsetof(struct thread_struct, spefscr));
61 DEFINE(THREAD_USED_SPE, offsetof(struct thread_struct, used_spe));
62#endif /* CONFIG_SPE */
63 /* Interrupt register frame */ 57 /* Interrupt register frame */
64 DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD); 58 DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
65 DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs)); 59 DEFINE(INT_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
diff --git a/arch/ppc/kernel/entry.S b/arch/ppc/kernel/entry.S
index 59e77eb63338..5f3a5d068a5c 100644
--- a/arch/ppc/kernel/entry.S
+++ b/arch/ppc/kernel/entry.S
@@ -519,12 +519,7 @@ BEGIN_FTR_SECTION
519 stw r12,THREAD+THREAD_VRSAVE(r2) 519 stw r12,THREAD+THREAD_VRSAVE(r2)
520END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 520END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
521#endif /* CONFIG_ALTIVEC */ 521#endif /* CONFIG_ALTIVEC */
522#ifdef CONFIG_SPE 522 and. r0,r0,r11 /* FP or altivec enabled? */
523 oris r0,r0,MSR_SPE@h /* Disable SPE */
524 mfspr r12,SPRN_SPEFSCR /* save spefscr register value */
525 stw r12,THREAD+THREAD_SPEFSCR(r2)
526#endif /* CONFIG_SPE */
527 and. r0,r0,r11 /* FP or altivec or SPE enabled? */
528 beq+ 1f 523 beq+ 1f
529 andc r11,r11,r0 524 andc r11,r11,r0
530 MTMSRD(r11) 525 MTMSRD(r11)
@@ -557,11 +552,6 @@ BEGIN_FTR_SECTION
557 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */ 552 mtspr SPRN_VRSAVE,r0 /* if G4, restore VRSAVE reg */
558END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 553END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
559#endif /* CONFIG_ALTIVEC */ 554#endif /* CONFIG_ALTIVEC */
560#ifdef CONFIG_SPE
561 lwz r0,THREAD+THREAD_SPEFSCR(r2)
562 mtspr SPRN_SPEFSCR,r0 /* restore SPEFSCR reg */
563#endif /* CONFIG_SPE */
564
565 lwz r0,_CCR(r1) 555 lwz r0,_CCR(r1)
566 mtcrf 0xFF,r0 556 mtcrf 0xFF,r0
567 /* r3-r12 are destroyed -- Cort */ 557 /* r3-r12 are destroyed -- Cort */
diff --git a/arch/ppc/kernel/head_44x.S b/arch/ppc/kernel/head_44x.S
index 75bbc937ed73..ebb5a403829f 100644
--- a/arch/ppc/kernel/head_44x.S
+++ b/arch/ppc/kernel/head_44x.S
@@ -195,7 +195,7 @@ skpinv: addi r4,r4,1 /* Increment */
195 li r5,0 195 li r5,0
196 ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G) 196 ori r5,r5,(PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_I | PPC44x_TLB_G)
197 197
198 li r0,0 /* TLB slot 0 */ 198 li r0,62 /* TLB slot 62 */
199 199
200 tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */ 200 tlbwe r3,r0,PPC44x_TLB_PAGEID /* Load the pageid fields */
201 tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */ 201 tlbwe r4,r0,PPC44x_TLB_XLAT /* Load the translation fields */
diff --git a/arch/ppc/kernel/head_booke.h b/arch/ppc/kernel/head_booke.h
index f3d274c6b231..166d597b6db2 100644
--- a/arch/ppc/kernel/head_booke.h
+++ b/arch/ppc/kernel/head_booke.h
@@ -212,60 +212,6 @@ label:
212 * save (and later restore) the MSR via SPRN_CSRR1, which will still have 212 * save (and later restore) the MSR via SPRN_CSRR1, which will still have
213 * the MSR_DE bit set. 213 * the MSR_DE bit set.
214 */ 214 */
215#ifdef CONFIG_E200
216#define DEBUG_EXCEPTION \
217 START_EXCEPTION(Debug); \
218 DEBUG_EXCEPTION_PROLOG; \
219 \
220 /* \
221 * If there is a single step or branch-taken exception in an \
222 * exception entry sequence, it was probably meant to apply to \
223 * the code where the exception occurred (since exception entry \
224 * doesn't turn off DE automatically). We simulate the effect \
225 * of turning off DE on entry to an exception handler by turning \
226 * off DE in the CSRR1 value and clearing the debug status. \
227 */ \
228 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
229 andis. r10,r10,DBSR_IC@h; \
230 beq+ 2f; \
231 \
232 lis r10,KERNELBASE@h; /* check if exception in vectors */ \
233 ori r10,r10,KERNELBASE@l; \
234 cmplw r12,r10; \
235 blt+ 2f; /* addr below exception vectors */ \
236 \
237 lis r10,Debug@h; \
238 ori r10,r10,Debug@l; \
239 cmplw r12,r10; \
240 bgt+ 2f; /* addr above exception vectors */ \
241 \
242 /* here it looks like we got an inappropriate debug exception. */ \
2431: rlwinm r9,r9,0,~MSR_DE; /* clear DE in the CDRR1 value */ \
244 lis r10,DBSR_IC@h; /* clear the IC event */ \
245 mtspr SPRN_DBSR,r10; \
246 /* restore state and get out */ \
247 lwz r10,_CCR(r11); \
248 lwz r0,GPR0(r11); \
249 lwz r1,GPR1(r11); \
250 mtcrf 0x80,r10; \
251 mtspr SPRN_DSRR0,r12; \
252 mtspr SPRN_DSRR1,r9; \
253 lwz r9,GPR9(r11); \
254 lwz r12,GPR12(r11); \
255 mtspr DEBUG_SPRG,r8; \
256 BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
257 lwz r10,GPR10-INT_FRAME_SIZE(r8); \
258 lwz r11,GPR11-INT_FRAME_SIZE(r8); \
259 mfspr r8,DEBUG_SPRG; \
260 \
261 RFDI; \
262 b .; \
263 \
264 /* continue normal handling for a critical exception... */ \
2652: mfspr r4,SPRN_DBSR; \
266 addi r3,r1,STACK_FRAME_OVERHEAD; \
267 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
268#else
269#define DEBUG_EXCEPTION \ 215#define DEBUG_EXCEPTION \
270 START_EXCEPTION(Debug); \ 216 START_EXCEPTION(Debug); \
271 CRITICAL_EXCEPTION_PROLOG; \ 217 CRITICAL_EXCEPTION_PROLOG; \
@@ -318,7 +264,6 @@ label:
3182: mfspr r4,SPRN_DBSR; \ 2642: mfspr r4,SPRN_DBSR; \
319 addi r3,r1,STACK_FRAME_OVERHEAD; \ 265 addi r3,r1,STACK_FRAME_OVERHEAD; \
320 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) 266 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
321#endif
322 267
323#define INSTRUCTION_STORAGE_EXCEPTION \ 268#define INSTRUCTION_STORAGE_EXCEPTION \
324 START_EXCEPTION(InstructionStorage) \ 269 START_EXCEPTION(InstructionStorage) \
diff --git a/arch/ppc/kernel/head_fsl_booke.S b/arch/ppc/kernel/head_fsl_booke.S
deleted file mode 100644
index 1f155d399d57..000000000000
--- a/arch/ppc/kernel/head_fsl_booke.S
+++ /dev/null
@@ -1,1065 +0,0 @@
1/*
2 * Kernel execution entry point code.
3 *
4 * Copyright (c) 1995-1996 Gary Thomas <gdt@linuxppc.org>
5 * Initial PowerPC version.
6 * Copyright (c) 1996 Cort Dougan <cort@cs.nmt.edu>
7 * Rewritten for PReP
8 * Copyright (c) 1996 Paul Mackerras <paulus@cs.anu.edu.au>
9 * Low-level exception handers, MMU support, and rewrite.
10 * Copyright (c) 1997 Dan Malek <dmalek@jlc.net>
11 * PowerPC 8xx modifications.
12 * Copyright (c) 1998-1999 TiVo, Inc.
13 * PowerPC 403GCX modifications.
14 * Copyright (c) 1999 Grant Erickson <grant@lcse.umn.edu>
15 * PowerPC 403GCX/405GP modifications.
16 * Copyright 2000 MontaVista Software Inc.
17 * PPC405 modifications
18 * PowerPC 403GCX/405GP modifications.
19 * Author: MontaVista Software, Inc.
20 * frank_rowand@mvista.com or source@mvista.com
21 * debbie_chu@mvista.com
22 * Copyright 2002-2004 MontaVista Software, Inc.
23 * PowerPC 44x support, Matt Porter <mporter@kernel.crashing.org>
24 * Copyright 2004 Freescale Semiconductor, Inc
25 * PowerPC e500 modifications, Kumar Gala <galak@kernel.crashing.org>
26 *
27 * This program is free software; you can redistribute it and/or modify it
28 * under the terms of the GNU General Public License as published by the
29 * Free Software Foundation; either version 2 of the License, or (at your
30 * option) any later version.
31 */
32
33#include <linux/threads.h>
34#include <asm/processor.h>
35#include <asm/page.h>
36#include <asm/mmu.h>
37#include <asm/pgtable.h>
38#include <asm/cputable.h>
39#include <asm/thread_info.h>
40#include <asm/ppc_asm.h>
41#include <asm/asm-offsets.h>
42#include "head_booke.h"
43
44/* As with the other PowerPC ports, it is expected that when code
45 * execution begins here, the following registers contain valid, yet
46 * optional, information:
47 *
48 * r3 - Board info structure pointer (DRAM, frequency, MAC address, etc.)
49 * r4 - Starting address of the init RAM disk
50 * r5 - Ending address of the init RAM disk
51 * r6 - Start of kernel command line string (e.g. "mem=128")
52 * r7 - End of kernel command line string
53 *
54 */
55 .text
56_GLOBAL(_stext)
57_GLOBAL(_start)
58 /*
59 * Reserve a word at a fixed location to store the address
60 * of abatron_pteptrs
61 */
62 nop
63/*
64 * Save parameters we are passed
65 */
66 mr r31,r3
67 mr r30,r4
68 mr r29,r5
69 mr r28,r6
70 mr r27,r7
71 li r24,0 /* CPU number */
72
73/* We try to not make any assumptions about how the boot loader
74 * setup or used the TLBs. We invalidate all mappings from the
75 * boot loader and load a single entry in TLB1[0] to map the
76 * first 16M of kernel memory. Any boot info passed from the
77 * bootloader needs to live in this first 16M.
78 *
79 * Requirement on bootloader:
80 * - The page we're executing in needs to reside in TLB1 and
81 * have IPROT=1. If not an invalidate broadcast could
82 * evict the entry we're currently executing in.
83 *
84 * r3 = Index of TLB1 were executing in
85 * r4 = Current MSR[IS]
86 * r5 = Index of TLB1 temp mapping
87 *
88 * Later in mapin_ram we will correctly map lowmem, and resize TLB1[0]
89 * if needed
90 */
91
92/* 1. Find the index of the entry we're executing in */
93 bl invstr /* Find our address */
94invstr: mflr r6 /* Make it accessible */
95 mfmsr r7
96 rlwinm r4,r7,27,31,31 /* extract MSR[IS] */
97 mfspr r7, SPRN_PID0
98 slwi r7,r7,16
99 or r7,r7,r4
100 mtspr SPRN_MAS6,r7
101 tlbsx 0,r6 /* search MSR[IS], SPID=PID0 */
102#ifndef CONFIG_E200
103 mfspr r7,SPRN_MAS1
104 andis. r7,r7,MAS1_VALID@h
105 bne match_TLB
106 mfspr r7,SPRN_PID1
107 slwi r7,r7,16
108 or r7,r7,r4
109 mtspr SPRN_MAS6,r7
110 tlbsx 0,r6 /* search MSR[IS], SPID=PID1 */
111 mfspr r7,SPRN_MAS1
112 andis. r7,r7,MAS1_VALID@h
113 bne match_TLB
114 mfspr r7, SPRN_PID2
115 slwi r7,r7,16
116 or r7,r7,r4
117 mtspr SPRN_MAS6,r7
118 tlbsx 0,r6 /* Fall through, we had to match */
119#endif
120match_TLB:
121 mfspr r7,SPRN_MAS0
122 rlwinm r3,r7,16,20,31 /* Extract MAS0(Entry) */
123
124 mfspr r7,SPRN_MAS1 /* Insure IPROT set */
125 oris r7,r7,MAS1_IPROT@h
126 mtspr SPRN_MAS1,r7
127 tlbwe
128
129/* 2. Invalidate all entries except the entry we're executing in */
130 mfspr r9,SPRN_TLB1CFG
131 andi. r9,r9,0xfff
132 li r6,0 /* Set Entry counter to 0 */
1331: lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
134 rlwimi r7,r6,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r6) */
135 mtspr SPRN_MAS0,r7
136 tlbre
137 mfspr r7,SPRN_MAS1
138 rlwinm r7,r7,0,2,31 /* Clear MAS1 Valid and IPROT */
139 cmpw r3,r6
140 beq skpinv /* Dont update the current execution TLB */
141 mtspr SPRN_MAS1,r7
142 tlbwe
143 isync
144skpinv: addi r6,r6,1 /* Increment */
145 cmpw r6,r9 /* Are we done? */
146 bne 1b /* If not, repeat */
147
148 /* Invalidate TLB0 */
149 li r6,0x04
150 tlbivax 0,r6
151#ifdef CONFIG_SMP
152 tlbsync
153#endif
154 /* Invalidate TLB1 */
155 li r6,0x0c
156 tlbivax 0,r6
157#ifdef CONFIG_SMP
158 tlbsync
159#endif
160 msync
161
162/* 3. Setup a temp mapping and jump to it */
163 andi. r5, r3, 0x1 /* Find an entry not used and is non-zero */
164 addi r5, r5, 0x1
165 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
166 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
167 mtspr SPRN_MAS0,r7
168 tlbre
169
170 /* Just modify the entry ID and EPN for the temp mapping */
171 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
172 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
173 mtspr SPRN_MAS0,r7
174 xori r6,r4,1 /* Setup TMP mapping in the other Address space */
175 slwi r6,r6,12
176 oris r6,r6,(MAS1_VALID|MAS1_IPROT)@h
177 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_4K))@l
178 mtspr SPRN_MAS1,r6
179 mfspr r6,SPRN_MAS2
180 li r7,0 /* temp EPN = 0 */
181 rlwimi r7,r6,0,20,31
182 mtspr SPRN_MAS2,r7
183 tlbwe
184
185 xori r6,r4,1
186 slwi r6,r6,5 /* setup new context with other address space */
187 bl 1f /* Find our address */
1881: mflr r9
189 rlwimi r7,r9,0,20,31
190 addi r7,r7,24
191 mtspr SPRN_SRR0,r7
192 mtspr SPRN_SRR1,r6
193 rfi
194
195/* 4. Clear out PIDs & Search info */
196 li r6,0
197 mtspr SPRN_PID0,r6
198#ifndef CONFIG_E200
199 mtspr SPRN_PID1,r6
200 mtspr SPRN_PID2,r6
201#endif
202 mtspr SPRN_MAS6,r6
203
204/* 5. Invalidate mapping we started in */
205 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
206 rlwimi r7,r3,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r3) */
207 mtspr SPRN_MAS0,r7
208 tlbre
209 mfspr r6,SPRN_MAS1
210 rlwinm r6,r6,0,2,0 /* clear IPROT */
211 mtspr SPRN_MAS1,r6
212 tlbwe
213 /* Invalidate TLB1 */
214 li r9,0x0c
215 tlbivax 0,r9
216#ifdef CONFIG_SMP
217 tlbsync
218#endif
219 msync
220
221/* 6. Setup KERNELBASE mapping in TLB1[0] */
222 lis r6,0x1000 /* Set MAS0(TLBSEL) = TLB1(1), ESEL = 0 */
223 mtspr SPRN_MAS0,r6
224 lis r6,(MAS1_VALID|MAS1_IPROT)@h
225 ori r6,r6,(MAS1_TSIZE(BOOKE_PAGESZ_16M))@l
226 mtspr SPRN_MAS1,r6
227 li r7,0
228 lis r6,KERNELBASE@h
229 ori r6,r6,KERNELBASE@l
230 rlwimi r6,r7,0,20,31
231 mtspr SPRN_MAS2,r6
232 li r7,(MAS3_SX|MAS3_SW|MAS3_SR)
233 mtspr SPRN_MAS3,r7
234 tlbwe
235
236/* 7. Jump to KERNELBASE mapping */
237 lis r7,MSR_KERNEL@h
238 ori r7,r7,MSR_KERNEL@l
239 bl 1f /* Find our address */
2401: mflr r9
241 rlwimi r6,r9,0,20,31
242 addi r6,r6,24
243 mtspr SPRN_SRR0,r6
244 mtspr SPRN_SRR1,r7
245 rfi /* start execution out of TLB1[0] entry */
246
247/* 8. Clear out the temp mapping */
248 lis r7,0x1000 /* Set MAS0(TLBSEL) = 1 */
249 rlwimi r7,r5,16,4,15 /* Setup MAS0 = TLBSEL | ESEL(r5) */
250 mtspr SPRN_MAS0,r7
251 tlbre
252 mfspr r8,SPRN_MAS1
253 rlwinm r8,r8,0,2,0 /* clear IPROT */
254 mtspr SPRN_MAS1,r8
255 tlbwe
256 /* Invalidate TLB1 */
257 li r9,0x0c
258 tlbivax 0,r9
259#ifdef CONFIG_SMP
260 tlbsync
261#endif
262 msync
263
264 /* Establish the interrupt vector offsets */
265 SET_IVOR(0, CriticalInput);
266 SET_IVOR(1, MachineCheck);
267 SET_IVOR(2, DataStorage);
268 SET_IVOR(3, InstructionStorage);
269 SET_IVOR(4, ExternalInput);
270 SET_IVOR(5, Alignment);
271 SET_IVOR(6, Program);
272 SET_IVOR(7, FloatingPointUnavailable);
273 SET_IVOR(8, SystemCall);
274 SET_IVOR(9, AuxillaryProcessorUnavailable);
275 SET_IVOR(10, Decrementer);
276 SET_IVOR(11, FixedIntervalTimer);
277 SET_IVOR(12, WatchdogTimer);
278 SET_IVOR(13, DataTLBError);
279 SET_IVOR(14, InstructionTLBError);
280 SET_IVOR(15, Debug);
281 SET_IVOR(32, SPEUnavailable);
282 SET_IVOR(33, SPEFloatingPointData);
283 SET_IVOR(34, SPEFloatingPointRound);
284#ifndef CONFIG_E200
285 SET_IVOR(35, PerformanceMonitor);
286#endif
287
288 /* Establish the interrupt vector base */
289 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
290 mtspr SPRN_IVPR,r4
291
292 /* Setup the defaults for TLB entries */
293 li r2,(MAS4_TSIZED(BOOKE_PAGESZ_4K))@l
294#ifdef CONFIG_E200
295 oris r2,r2,MAS4_TLBSELD(1)@h
296#endif
297 mtspr SPRN_MAS4, r2
298
299#if 0
300 /* Enable DOZE */
301 mfspr r2,SPRN_HID0
302 oris r2,r2,HID0_DOZE@h
303 mtspr SPRN_HID0, r2
304#endif
305#ifdef CONFIG_E200
306 /* enable dedicated debug exception handling resources (Debug APU) */
307 mfspr r2,SPRN_HID0
308 ori r2,r2,HID0_DAPUEN@l
309 mtspr SPRN_HID0,r2
310#endif
311
312#if !defined(CONFIG_BDI_SWITCH)
313 /*
314 * The Abatron BDI JTAG debugger does not tolerate others
315 * mucking with the debug registers.
316 */
317 lis r2,DBCR0_IDM@h
318 mtspr SPRN_DBCR0,r2
319 isync
320 /* clear any residual debug events */
321 li r2,-1
322 mtspr SPRN_DBSR,r2
323#endif
324
325 /*
326 * This is where the main kernel code starts.
327 */
328
329 /* ptr to current */
330 lis r2,init_task@h
331 ori r2,r2,init_task@l
332
333 /* ptr to current thread */
334 addi r4,r2,THREAD /* init task's THREAD */
335 mtspr SPRN_SPRG3,r4
336
337 /* stack */
338 lis r1,init_thread_union@h
339 ori r1,r1,init_thread_union@l
340 li r0,0
341 stwu r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
342
343 bl early_init
344
345 mfspr r3,SPRN_TLB1CFG
346 andi. r3,r3,0xfff
347 lis r4,num_tlbcam_entries@ha
348 stw r3,num_tlbcam_entries@l(r4)
349/*
350 * Decide what sort of machine this is and initialize the MMU.
351 */
352 mr r3,r31
353 mr r4,r30
354 mr r5,r29
355 mr r6,r28
356 mr r7,r27
357 bl machine_init
358 bl MMU_init
359
360 /* Setup PTE pointers for the Abatron bdiGDB */
361 lis r6, swapper_pg_dir@h
362 ori r6, r6, swapper_pg_dir@l
363 lis r5, abatron_pteptrs@h
364 ori r5, r5, abatron_pteptrs@l
365 lis r4, KERNELBASE@h
366 ori r4, r4, KERNELBASE@l
367 stw r5, 0(r4) /* Save abatron_pteptrs at a fixed location */
368 stw r6, 0(r5)
369
370 /* Let's move on */
371 lis r4,start_kernel@h
372 ori r4,r4,start_kernel@l
373 lis r3,MSR_KERNEL@h
374 ori r3,r3,MSR_KERNEL@l
375 mtspr SPRN_SRR0,r4
376 mtspr SPRN_SRR1,r3
377 rfi /* change context and jump to start_kernel */
378
379/* Macros to hide the PTE size differences
380 *
381 * FIND_PTE -- walks the page tables given EA & pgdir pointer
382 * r10 -- EA of fault
383 * r11 -- PGDIR pointer
384 * r12 -- free
385 * label 2: is the bailout case
386 *
387 * if we find the pte (fall through):
388 * r11 is low pte word
389 * r12 is pointer to the pte
390 */
391#ifdef CONFIG_PTE_64BIT
392#define PTE_FLAGS_OFFSET 4
393#define FIND_PTE \
394 rlwinm r12, r10, 13, 19, 29; /* Compute pgdir/pmd offset */ \
395 lwzx r11, r12, r11; /* Get pgd/pmd entry */ \
396 rlwinm. r12, r11, 0, 0, 20; /* Extract pt base address */ \
397 beq 2f; /* Bail if no table */ \
398 rlwimi r12, r10, 23, 20, 28; /* Compute pte address */ \
399 lwz r11, 4(r12); /* Get pte entry */
400#else
401#define PTE_FLAGS_OFFSET 0
402#define FIND_PTE \
403 rlwimi r11, r10, 12, 20, 29; /* Create L1 (pgdir/pmd) address */ \
404 lwz r11, 0(r11); /* Get L1 entry */ \
405 rlwinm. r12, r11, 0, 0, 19; /* Extract L2 (pte) base address */ \
406 beq 2f; /* Bail if no table */ \
407 rlwimi r12, r10, 22, 20, 29; /* Compute PTE address */ \
408 lwz r11, 0(r12); /* Get Linux PTE */
409#endif
410
411/*
412 * Interrupt vector entry code
413 *
414 * The Book E MMUs are always on so we don't need to handle
415 * interrupts in real mode as with previous PPC processors. In
416 * this case we handle interrupts in the kernel virtual address
417 * space.
418 *
419 * Interrupt vectors are dynamically placed relative to the
420 * interrupt prefix as determined by the address of interrupt_base.
421 * The interrupt vectors offsets are programmed using the labels
422 * for each interrupt vector entry.
423 *
424 * Interrupt vectors must be aligned on a 16 byte boundary.
425 * We align on a 32 byte cache line boundary for good measure.
426 */
427
428interrupt_base:
429 /* Critical Input Interrupt */
430 CRITICAL_EXCEPTION(0x0100, CriticalInput, unknown_exception)
431
432 /* Machine Check Interrupt */
433#ifdef CONFIG_E200
434 /* no RFMCI, MCSRRs on E200 */
435 CRITICAL_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
436#else
437 MCHECK_EXCEPTION(0x0200, MachineCheck, machine_check_exception)
438#endif
439
440 /* Data Storage Interrupt */
441 START_EXCEPTION(DataStorage)
442 mtspr SPRN_SPRG0, r10 /* Save some working registers */
443 mtspr SPRN_SPRG1, r11
444 mtspr SPRN_SPRG4W, r12
445 mtspr SPRN_SPRG5W, r13
446 mfcr r11
447 mtspr SPRN_SPRG7W, r11
448
449 /*
450 * Check if it was a store fault, if not then bail
451 * because a user tried to access a kernel or
452 * read-protected page. Otherwise, get the
453 * offending address and handle it.
454 */
455 mfspr r10, SPRN_ESR
456 andis. r10, r10, ESR_ST@h
457 beq 2f
458
459 mfspr r10, SPRN_DEAR /* Get faulting address */
460
461 /* If we are faulting a kernel address, we have to use the
462 * kernel page tables.
463 */
464 lis r11, TASK_SIZE@h
465 ori r11, r11, TASK_SIZE@l
466 cmplw 0, r10, r11
467 bge 2f
468
469 /* Get the PGD for the current thread */
4703:
471 mfspr r11,SPRN_SPRG3
472 lwz r11,PGDIR(r11)
4734:
474 FIND_PTE
475
476 /* Are _PAGE_USER & _PAGE_RW set & _PAGE_HWWRITE not? */
477 andi. r13, r11, _PAGE_RW|_PAGE_USER|_PAGE_HWWRITE
478 cmpwi 0, r13, _PAGE_RW|_PAGE_USER
479 bne 2f /* Bail if not */
480
481 /* Update 'changed'. */
482 ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
483 stw r11, PTE_FLAGS_OFFSET(r12) /* Update Linux page table */
484
485 /* MAS2 not updated as the entry does exist in the tlb, this
486 fault taken to detect state transition (eg: COW -> DIRTY)
487 */
488 andi. r11, r11, _PAGE_HWEXEC
489 rlwimi r11, r11, 31, 27, 27 /* SX <- _PAGE_HWEXEC */
490 ori r11, r11, (MAS3_UW|MAS3_SW|MAS3_UR|MAS3_SR)@l /* set static perms */
491
492 /* update search PID in MAS6, AS = 0 */
493 mfspr r12, SPRN_PID0
494 slwi r12, r12, 16
495 mtspr SPRN_MAS6, r12
496
497 /* find the TLB index that caused the fault. It has to be here. */
498 tlbsx 0, r10
499
500 /* only update the perm bits, assume the RPN is fine */
501 mfspr r12, SPRN_MAS3
502 rlwimi r12, r11, 0, 20, 31
503 mtspr SPRN_MAS3,r12
504 tlbwe
505
506 /* Done...restore registers and get out of here. */
507 mfspr r11, SPRN_SPRG7R
508 mtcr r11
509 mfspr r13, SPRN_SPRG5R
510 mfspr r12, SPRN_SPRG4R
511 mfspr r11, SPRN_SPRG1
512 mfspr r10, SPRN_SPRG0
513 rfi /* Force context change */
514
5152:
516 /*
517 * The bailout. Restore registers to pre-exception conditions
518 * and call the heavyweights to help us out.
519 */
520 mfspr r11, SPRN_SPRG7R
521 mtcr r11
522 mfspr r13, SPRN_SPRG5R
523 mfspr r12, SPRN_SPRG4R
524 mfspr r11, SPRN_SPRG1
525 mfspr r10, SPRN_SPRG0
526 b data_access
527
528 /* Instruction Storage Interrupt */
529 INSTRUCTION_STORAGE_EXCEPTION
530
531 /* External Input Interrupt */
532 EXCEPTION(0x0500, ExternalInput, do_IRQ, EXC_XFER_LITE)
533
534 /* Alignment Interrupt */
535 ALIGNMENT_EXCEPTION
536
537 /* Program Interrupt */
538 PROGRAM_EXCEPTION
539
540 /* Floating Point Unavailable Interrupt */
541#ifdef CONFIG_PPC_FPU
542 FP_UNAVAILABLE_EXCEPTION
543#else
544#ifdef CONFIG_E200
545 /* E200 treats 'normal' floating point instructions as FP Unavail exception */
546 EXCEPTION(0x0800, FloatingPointUnavailable, program_check_exception, EXC_XFER_EE)
547#else
548 EXCEPTION(0x0800, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
549#endif
550#endif
551
552 /* System Call Interrupt */
553 START_EXCEPTION(SystemCall)
554 NORMAL_EXCEPTION_PROLOG
555 EXC_XFER_EE_LITE(0x0c00, DoSyscall)
556
557 /* Auxillary Processor Unavailable Interrupt */
558 EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
559
560 /* Decrementer Interrupt */
561 DECREMENTER_EXCEPTION
562
563 /* Fixed Internal Timer Interrupt */
564 /* TODO: Add FIT support */
565 EXCEPTION(0x3100, FixedIntervalTimer, unknown_exception, EXC_XFER_EE)
566
567 /* Watchdog Timer Interrupt */
568#ifdef CONFIG_BOOKE_WDT
569 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, WatchdogException)
570#else
571 CRITICAL_EXCEPTION(0x3200, WatchdogTimer, unknown_exception)
572#endif
573
574 /* Data TLB Error Interrupt */
575 START_EXCEPTION(DataTLBError)
576 mtspr SPRN_SPRG0, r10 /* Save some working registers */
577 mtspr SPRN_SPRG1, r11
578 mtspr SPRN_SPRG4W, r12
579 mtspr SPRN_SPRG5W, r13
580 mfcr r11
581 mtspr SPRN_SPRG7W, r11
582 mfspr r10, SPRN_DEAR /* Get faulting address */
583
584 /* If we are faulting a kernel address, we have to use the
585 * kernel page tables.
586 */
587 lis r11, TASK_SIZE@h
588 ori r11, r11, TASK_SIZE@l
589 cmplw 5, r10, r11
590 blt 5, 3f
591 lis r11, swapper_pg_dir@h
592 ori r11, r11, swapper_pg_dir@l
593
594 mfspr r12,SPRN_MAS1 /* Set TID to 0 */
595 rlwinm r12,r12,0,16,1
596 mtspr SPRN_MAS1,r12
597
598 b 4f
599
600 /* Get the PGD for the current thread */
6013:
602 mfspr r11,SPRN_SPRG3
603 lwz r11,PGDIR(r11)
604
6054:
606 FIND_PTE
607 andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
608 beq 2f /* Bail if not present */
609
610#ifdef CONFIG_PTE_64BIT
611 lwz r13, 0(r12)
612#endif
613 ori r11, r11, _PAGE_ACCESSED
614 stw r11, PTE_FLAGS_OFFSET(r12)
615
616 /* Jump to common tlb load */
617 b finish_tlb_load
6182:
619 /* The bailout. Restore registers to pre-exception conditions
620 * and call the heavyweights to help us out.
621 */
622 mfspr r11, SPRN_SPRG7R
623 mtcr r11
624 mfspr r13, SPRN_SPRG5R
625 mfspr r12, SPRN_SPRG4R
626 mfspr r11, SPRN_SPRG1
627 mfspr r10, SPRN_SPRG0
628 b data_access
629
630 /* Instruction TLB Error Interrupt */
631 /*
632 * Nearly the same as above, except we get our
633 * information from different registers and bailout
634 * to a different point.
635 */
636 START_EXCEPTION(InstructionTLBError)
637 mtspr SPRN_SPRG0, r10 /* Save some working registers */
638 mtspr SPRN_SPRG1, r11
639 mtspr SPRN_SPRG4W, r12
640 mtspr SPRN_SPRG5W, r13
641 mfcr r11
642 mtspr SPRN_SPRG7W, r11
643 mfspr r10, SPRN_SRR0 /* Get faulting address */
644
645 /* If we are faulting a kernel address, we have to use the
646 * kernel page tables.
647 */
648 lis r11, TASK_SIZE@h
649 ori r11, r11, TASK_SIZE@l
650 cmplw 5, r10, r11
651 blt 5, 3f
652 lis r11, swapper_pg_dir@h
653 ori r11, r11, swapper_pg_dir@l
654
655 mfspr r12,SPRN_MAS1 /* Set TID to 0 */
656 rlwinm r12,r12,0,16,1
657 mtspr SPRN_MAS1,r12
658
659 b 4f
660
661 /* Get the PGD for the current thread */
6623:
663 mfspr r11,SPRN_SPRG3
664 lwz r11,PGDIR(r11)
665
6664:
667 FIND_PTE
668 andi. r13, r11, _PAGE_PRESENT /* Is the page present? */
669 beq 2f /* Bail if not present */
670
671#ifdef CONFIG_PTE_64BIT
672 lwz r13, 0(r12)
673#endif
674 ori r11, r11, _PAGE_ACCESSED
675 stw r11, PTE_FLAGS_OFFSET(r12)
676
677 /* Jump to common TLB load point */
678 b finish_tlb_load
679
6802:
681 /* The bailout. Restore registers to pre-exception conditions
682 * and call the heavyweights to help us out.
683 */
684 mfspr r11, SPRN_SPRG7R
685 mtcr r11
686 mfspr r13, SPRN_SPRG5R
687 mfspr r12, SPRN_SPRG4R
688 mfspr r11, SPRN_SPRG1
689 mfspr r10, SPRN_SPRG0
690 b InstructionStorage
691
692#ifdef CONFIG_SPE
693 /* SPE Unavailable */
694 START_EXCEPTION(SPEUnavailable)
695 NORMAL_EXCEPTION_PROLOG
696 bne load_up_spe
697 addi r3,r1,STACK_FRAME_OVERHEAD
698 EXC_XFER_EE_LITE(0x2010, KernelSPE)
699#else
700 EXCEPTION(0x2020, SPEUnavailable, unknown_exception, EXC_XFER_EE)
701#endif /* CONFIG_SPE */
702
703 /* SPE Floating Point Data */
704#ifdef CONFIG_SPE
705 EXCEPTION(0x2030, SPEFloatingPointData, SPEFloatingPointException, EXC_XFER_EE);
706#else
707 EXCEPTION(0x2040, SPEFloatingPointData, unknown_exception, EXC_XFER_EE)
708#endif /* CONFIG_SPE */
709
710 /* SPE Floating Point Round */
711 EXCEPTION(0x2050, SPEFloatingPointRound, unknown_exception, EXC_XFER_EE)
712
713 /* Performance Monitor */
714 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
715
716
717 /* Debug Interrupt */
718 DEBUG_EXCEPTION
719
720/*
721 * Local functions
722 */
723
724 /*
725 * Data TLB exceptions will bail out to this point
726 * if they can't resolve the lightweight TLB fault.
727 */
728data_access:
729 NORMAL_EXCEPTION_PROLOG
730 mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
731 stw r5,_ESR(r11)
732 mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
733 andis. r10,r5,(ESR_ILK|ESR_DLK)@h
734 bne 1f
735 EXC_XFER_EE_LITE(0x0300, handle_page_fault)
7361:
737 addi r3,r1,STACK_FRAME_OVERHEAD
738 EXC_XFER_EE_LITE(0x0300, CacheLockingException)
739
740/*
741
742 * Both the instruction and data TLB miss get to this
743 * point to load the TLB.
744 * r10 - EA of fault
745 * r11 - TLB (info from Linux PTE)
746 * r12, r13 - available to use
747 * CR5 - results of addr < TASK_SIZE
748 * MAS0, MAS1 - loaded with proper value when we get here
749 * MAS2, MAS3 - will need additional info from Linux PTE
750 * Upon exit, we reload everything and RFI.
751 */
752finish_tlb_load:
753 /*
754 * We set execute, because we don't have the granularity to
755 * properly set this at the page level (Linux problem).
756 * Many of these bits are software only. Bits we don't set
757 * here we (properly should) assume have the appropriate value.
758 */
759
760 mfspr r12, SPRN_MAS2
761#ifdef CONFIG_PTE_64BIT
762 rlwimi r12, r11, 26, 24, 31 /* extract ...WIMGE from pte */
763#else
764 rlwimi r12, r11, 26, 27, 31 /* extract WIMGE from pte */
765#endif
766 mtspr SPRN_MAS2, r12
767
768 bge 5, 1f
769
770 /* is user addr */
771 andi. r12, r11, (_PAGE_USER | _PAGE_HWWRITE | _PAGE_HWEXEC)
772 andi. r10, r11, _PAGE_USER /* Test for _PAGE_USER */
773 srwi r10, r12, 1
774 or r12, r12, r10 /* Copy user perms into supervisor */
775 iseleq r12, 0, r12
776 b 2f
777
778 /* is kernel addr */
7791: rlwinm r12, r11, 31, 29, 29 /* Extract _PAGE_HWWRITE into SW */
780 ori r12, r12, (MAS3_SX | MAS3_SR)
781
782#ifdef CONFIG_PTE_64BIT
7832: rlwimi r12, r13, 24, 0, 7 /* grab RPN[32:39] */
784 rlwimi r12, r11, 24, 8, 19 /* grab RPN[40:51] */
785 mtspr SPRN_MAS3, r12
786BEGIN_FTR_SECTION
787 srwi r10, r13, 8 /* grab RPN[8:31] */
788 mtspr SPRN_MAS7, r10
789END_FTR_SECTION_IFSET(CPU_FTR_BIG_PHYS)
790#else
7912: rlwimi r11, r12, 0, 20, 31 /* Extract RPN from PTE and merge with perms */
792 mtspr SPRN_MAS3, r11
793#endif
794#ifdef CONFIG_E200
795 /* Round robin TLB1 entries assignment */
796 mfspr r12, SPRN_MAS0
797
798 /* Extract TLB1CFG(NENTRY) */
799 mfspr r11, SPRN_TLB1CFG
800 andi. r11, r11, 0xfff
801
802 /* Extract MAS0(NV) */
803 andi. r13, r12, 0xfff
804 addi r13, r13, 1
805 cmpw 0, r13, r11
806 addi r12, r12, 1
807
808 /* check if we need to wrap */
809 blt 7f
810
811 /* wrap back to first free tlbcam entry */
812 lis r13, tlbcam_index@ha
813 lwz r13, tlbcam_index@l(r13)
814 rlwimi r12, r13, 0, 20, 31
8157:
816 mtspr SPRN_MAS0,r12
817#endif /* CONFIG_E200 */
818
819 tlbwe
820
821 /* Done...restore registers and get out of here. */
822 mfspr r11, SPRN_SPRG7R
823 mtcr r11
824 mfspr r13, SPRN_SPRG5R
825 mfspr r12, SPRN_SPRG4R
826 mfspr r11, SPRN_SPRG1
827 mfspr r10, SPRN_SPRG0
828 rfi /* Force context change */
829
830#ifdef CONFIG_SPE
831/* Note that the SPE support is closely modeled after the AltiVec
832 * support. Changes to one are likely to be applicable to the
833 * other! */
834load_up_spe:
835/*
836 * Disable SPE for the task which had SPE previously,
837 * and save its SPE registers in its thread_struct.
838 * Enables SPE for use in the kernel on return.
839 * On SMP we know the SPE units are free, since we give it up every
840 * switch. -- Kumar
841 */
842 mfmsr r5
843 oris r5,r5,MSR_SPE@h
844 mtmsr r5 /* enable use of SPE now */
845 isync
846/*
847 * For SMP, we don't do lazy SPE switching because it just gets too
848 * horrendously complex, especially when a task switches from one CPU
849 * to another. Instead we call giveup_spe in switch_to.
850 */
851#ifndef CONFIG_SMP
852 lis r3,last_task_used_spe@ha
853 lwz r4,last_task_used_spe@l(r3)
854 cmpi 0,r4,0
855 beq 1f
856 addi r4,r4,THREAD /* want THREAD of last_task_used_spe */
857 SAVE_32EVRS(0,r10,r4)
858 evxor evr10, evr10, evr10 /* clear out evr10 */
859 evmwumiaa evr10, evr10, evr10 /* evr10 <- ACC = 0 * 0 + ACC */
860 li r5,THREAD_ACC
861 evstddx evr10, r4, r5 /* save off accumulator */
862 lwz r5,PT_REGS(r4)
863 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
864 lis r10,MSR_SPE@h
865 andc r4,r4,r10 /* disable SPE for previous task */
866 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
8671:
868#endif /* CONFIG_SMP */
869 /* enable use of SPE after return */
870 oris r9,r9,MSR_SPE@h
871 mfspr r5,SPRN_SPRG3 /* current task's THREAD (phys) */
872 li r4,1
873 li r10,THREAD_ACC
874 stw r4,THREAD_USED_SPE(r5)
875 evlddx evr4,r10,r5
876 evmra evr4,evr4
877 REST_32EVRS(0,r10,r5)
878#ifndef CONFIG_SMP
879 subi r4,r5,THREAD
880 stw r4,last_task_used_spe@l(r3)
881#endif /* CONFIG_SMP */
882 /* restore registers and return */
8832: REST_4GPRS(3, r11)
884 lwz r10,_CCR(r11)
885 REST_GPR(1, r11)
886 mtcr r10
887 lwz r10,_LINK(r11)
888 mtlr r10
889 REST_GPR(10, r11)
890 mtspr SPRN_SRR1,r9
891 mtspr SPRN_SRR0,r12
892 REST_GPR(9, r11)
893 REST_GPR(12, r11)
894 lwz r11,GPR11(r11)
895 rfi
896
897/*
898 * SPE unavailable trap from kernel - print a message, but let
899 * the task use SPE in the kernel until it returns to user mode.
900 */
901KernelSPE:
902 lwz r3,_MSR(r1)
903 oris r3,r3,MSR_SPE@h
904 stw r3,_MSR(r1) /* enable use of SPE after return */
905 lis r3,87f@h
906 ori r3,r3,87f@l
907 mr r4,r2 /* current */
908 lwz r5,_NIP(r1)
909 bl printk
910 b ret_from_except
91187: .string "SPE used in kernel (task=%p, pc=%x) \n"
912 .align 4,0
913
914#endif /* CONFIG_SPE */
915
916/*
917 * Global functions
918 */
919
920/*
921 * extern void loadcam_entry(unsigned int index)
922 *
923 * Load TLBCAM[index] entry in to the L2 CAM MMU
924 */
925_GLOBAL(loadcam_entry)
926 lis r4,TLBCAM@ha
927 addi r4,r4,TLBCAM@l
928 mulli r5,r3,20
929 add r3,r5,r4
930 lwz r4,0(r3)
931 mtspr SPRN_MAS0,r4
932 lwz r4,4(r3)
933 mtspr SPRN_MAS1,r4
934 lwz r4,8(r3)
935 mtspr SPRN_MAS2,r4
936 lwz r4,12(r3)
937 mtspr SPRN_MAS3,r4
938 tlbwe
939 isync
940 blr
941
942/*
943 * extern void giveup_altivec(struct task_struct *prev)
944 *
945 * The e500 core does not have an AltiVec unit.
946 */
947_GLOBAL(giveup_altivec)
948 blr
949
950#ifdef CONFIG_SPE
951/*
952 * extern void giveup_spe(struct task_struct *prev)
953 *
954 */
955_GLOBAL(giveup_spe)
956 mfmsr r5
957 oris r5,r5,MSR_SPE@h
958 mtmsr r5 /* enable use of SPE now */
959 isync
960 cmpi 0,r3,0
961 beqlr- /* if no previous owner, done */
962 addi r3,r3,THREAD /* want THREAD of task */
963 lwz r5,PT_REGS(r3)
964 cmpi 0,r5,0
965 SAVE_32EVRS(0, r4, r3)
966 evxor evr6, evr6, evr6 /* clear out evr6 */
967 evmwumiaa evr6, evr6, evr6 /* evr6 <- ACC = 0 * 0 + ACC */
968 li r4,THREAD_ACC
969 evstddx evr6, r4, r3 /* save off accumulator */
970 mfspr r6,SPRN_SPEFSCR
971 stw r6,THREAD_SPEFSCR(r3) /* save spefscr register value */
972 beq 1f
973 lwz r4,_MSR-STACK_FRAME_OVERHEAD(r5)
974 lis r3,MSR_SPE@h
975 andc r4,r4,r3 /* disable SPE for previous task */
976 stw r4,_MSR-STACK_FRAME_OVERHEAD(r5)
9771:
978#ifndef CONFIG_SMP
979 li r5,0
980 lis r4,last_task_used_spe@ha
981 stw r5,last_task_used_spe@l(r4)
982#endif /* CONFIG_SMP */
983 blr
984#endif /* CONFIG_SPE */
985
986/*
987 * extern void giveup_fpu(struct task_struct *prev)
988 *
989 * Not all FSL Book-E cores have an FPU
990 */
991#ifndef CONFIG_PPC_FPU
992_GLOBAL(giveup_fpu)
993 blr
994#endif
995
996/*
997 * extern void abort(void)
998 *
999 * At present, this routine just applies a system reset.
1000 */
1001_GLOBAL(abort)
1002 li r13,0
1003 mtspr SPRN_DBCR0,r13 /* disable all debug events */
1004 isync
1005 mfmsr r13
1006 ori r13,r13,MSR_DE@l /* Enable Debug Events */
1007 mtmsr r13
1008 isync
1009 mfspr r13,SPRN_DBCR0
1010 lis r13,(DBCR0_IDM|DBCR0_RST_CHIP)@h
1011 mtspr SPRN_DBCR0,r13
1012 isync
1013
1014_GLOBAL(set_context)
1015
1016#ifdef CONFIG_BDI_SWITCH
1017 /* Context switch the PTE pointer for the Abatron BDI2000.
1018 * The PGDIR is the second parameter.
1019 */
1020 lis r5, abatron_pteptrs@h
1021 ori r5, r5, abatron_pteptrs@l
1022 stw r4, 0x4(r5)
1023#endif
1024 mtspr SPRN_PID,r3
1025 isync /* Force context change */
1026 blr
1027
1028/*
1029 * We put a few things here that have to be page-aligned. This stuff
1030 * goes at the beginning of the data segment, which is page-aligned.
1031 */
1032 .data
1033 .align 12
1034 .globl sdata
1035sdata:
1036 .globl empty_zero_page
1037empty_zero_page:
1038 .space 4096
1039 .globl swapper_pg_dir
1040swapper_pg_dir:
1041 .space 4096
1042
1043/* Reserved 4k for the critical exception stack & 4k for the machine
1044 * check stack per CPU for kernel mode exceptions */
1045 .section .bss
1046 .align 12
1047exception_stack_bottom:
1048 .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
1049 .globl exception_stack_top
1050exception_stack_top:
1051
1052/*
1053 * This space gets a copy of optional info passed to us by the bootstrap
1054 * which is used to pass parameters into the kernel like root=/dev/sda1, etc.
1055 */
1056 .globl cmd_line
1057cmd_line:
1058 .space 512
1059
1060/*
1061 * Room for two PTE pointers, usually the kernel and current user pointers
1062 * to their respective root page table.
1063 */
1064abatron_pteptrs:
1065 .space 8
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index e0c850d85c53..d5e0dfc9ffec 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -165,24 +165,7 @@ _GLOBAL(_tlbia)
165 ble 1b 165 ble 1b
166 166
167 isync 167 isync
168#elif defined(CONFIG_FSL_BOOKE) 168#else /* !(CONFIG_40x || CONFIG_44x) */
169 /* Invalidate all entries in TLB0 */
170 li r3, 0x04
171 tlbivax 0,3
172 /* Invalidate all entries in TLB1 */
173 li r3, 0x0c
174 tlbivax 0,3
175 /* Invalidate all entries in TLB2 */
176 li r3, 0x14
177 tlbivax 0,3
178 /* Invalidate all entries in TLB3 */
179 li r3, 0x1c
180 tlbivax 0,3
181 msync
182#ifdef CONFIG_SMP
183 tlbsync
184#endif /* CONFIG_SMP */
185#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
186#if defined(CONFIG_SMP) 169#if defined(CONFIG_SMP)
187 rlwinm r8,r1,0,0,18 170 rlwinm r8,r1,0,0,18
188 lwz r8,TI_CPU(r8) 171 lwz r8,TI_CPU(r8)
@@ -268,20 +251,7 @@ _GLOBAL(_tlbie)
268 tlbwe r3, r3, PPC44x_TLB_PAGEID 251 tlbwe r3, r3, PPC44x_TLB_PAGEID
269 isync 252 isync
27010: 25310:
271#elif defined(CONFIG_FSL_BOOKE) 254#else /* !(CONFIG_40x || CONFIG_44x) */
272 rlwinm r4, r3, 0, 0, 19
273 ori r5, r4, 0x08 /* TLBSEL = 1 */
274 ori r6, r4, 0x10 /* TLBSEL = 2 */
275 ori r7, r4, 0x18 /* TLBSEL = 3 */
276 tlbivax 0, r4
277 tlbivax 0, r5
278 tlbivax 0, r6
279 tlbivax 0, r7
280 msync
281#if defined(CONFIG_SMP)
282 tlbsync
283#endif /* CONFIG_SMP */
284#else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */
285#if defined(CONFIG_SMP) 255#if defined(CONFIG_SMP)
286 rlwinm r8,r1,0,0,18 256 rlwinm r8,r1,0,0,18
287 lwz r8,TI_CPU(r8) 257 lwz r8,TI_CPU(r8)
@@ -338,18 +308,6 @@ _GLOBAL(flush_instruction_cache)
338 lis r3, KERNELBASE@h 308 lis r3, KERNELBASE@h
339 iccci 0,r3 309 iccci 0,r3
340#endif 310#endif
341#elif CONFIG_FSL_BOOKE
342BEGIN_FTR_SECTION
343 mfspr r3,SPRN_L1CSR0
344 ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC
345 /* msync; isync recommended here */
346 mtspr SPRN_L1CSR0,r3
347 isync
348 blr
349END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
350 mfspr r3,SPRN_L1CSR1
351 ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR
352 mtspr SPRN_L1CSR1,r3
353#else 311#else
354 mfspr r3,SPRN_PVR 312 mfspr r3,SPRN_PVR
355 rlwinm r3,r3,16,16,31 313 rlwinm r3,r3,16,16,31
diff --git a/arch/ppc/kernel/ppc_ksyms.c b/arch/ppc/kernel/ppc_ksyms.c
index 22494ec123ea..c35350250cfc 100644
--- a/arch/ppc/kernel/ppc_ksyms.c
+++ b/arch/ppc/kernel/ppc_ksyms.c
@@ -45,7 +45,7 @@
45#include <asm/dcr.h> 45#include <asm/dcr.h>
46 46
47#ifdef CONFIG_8xx 47#ifdef CONFIG_8xx
48#include <asm/commproc.h> 48#include <asm/cpm1.h>
49#endif 49#endif
50 50
51extern void transfer_to_handler(void); 51extern void transfer_to_handler(void);
@@ -166,12 +166,6 @@ EXPORT_SYMBOL(last_task_used_altivec);
166#endif 166#endif
167EXPORT_SYMBOL(giveup_altivec); 167EXPORT_SYMBOL(giveup_altivec);
168#endif /* CONFIG_ALTIVEC */ 168#endif /* CONFIG_ALTIVEC */
169#ifdef CONFIG_SPE
170#ifndef CONFIG_SMP
171EXPORT_SYMBOL(last_task_used_spe);
172#endif
173EXPORT_SYMBOL(giveup_spe);
174#endif /* CONFIG_SPE */
175#ifdef CONFIG_SMP 169#ifdef CONFIG_SMP
176EXPORT_SYMBOL(smp_call_function); 170EXPORT_SYMBOL(smp_call_function);
177EXPORT_SYMBOL(smp_hw_index); 171EXPORT_SYMBOL(smp_hw_index);
@@ -244,8 +238,7 @@ EXPORT_SYMBOL(debugger_fault_handler);
244EXPORT_SYMBOL(cpm_install_handler); 238EXPORT_SYMBOL(cpm_install_handler);
245EXPORT_SYMBOL(cpm_free_handler); 239EXPORT_SYMBOL(cpm_free_handler);
246#endif /* CONFIG_8xx */ 240#endif /* CONFIG_8xx */
247#if defined(CONFIG_8xx) || defined(CONFIG_40x) || defined(CONFIG_85xx) ||\ 241#if defined(CONFIG_8xx) || defined(CONFIG_40x)
248 defined(CONFIG_83xx)
249EXPORT_SYMBOL(__res); 242EXPORT_SYMBOL(__res);
250#endif 243#endif
251 244
diff --git a/arch/ppc/kernel/rio.c b/arch/ppc/kernel/rio.c
deleted file mode 100644
index 29487fedfc76..000000000000
--- a/arch/ppc/kernel/rio.c
+++ /dev/null
@@ -1,52 +0,0 @@
1/*
2 * RapidIO PPC32 support
3 *
4 * Copyright 2005 MontaVista Software, Inc.
5 * Matt Porter <mporter@kernel.crashing.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/init.h>
14#include <linux/kernel.h>
15#include <linux/rio.h>
16
17#include <asm/rio.h>
18
19/**
20 * platform_rio_init - Do platform specific RIO init
21 *
22 * Any platform specific initialization of RapdIO
23 * hardware is done here as well as registration
24 * of any active master ports in the system.
25 */
26void __attribute__ ((weak))
27 platform_rio_init(void)
28{
29 printk(KERN_WARNING "RIO: No platform_rio_init() present\n");
30}
31
32/**
33 * ppc_rio_init - Do PPC32 RIO init
34 *
35 * Calls platform-specific RIO init code and then calls
36 * rio_init_mports() to initialize any master ports that
37 * have been registered with the RIO subsystem.
38 */
39static int __init ppc_rio_init(void)
40{
41 printk(KERN_INFO "RIO: RapidIO init\n");
42
43 /* Platform specific initialization */
44 platform_rio_init();
45
46 /* Enumerate all registered ports */
47 rio_init_mports();
48
49 return 0;
50}
51
52subsys_initcall(ppc_rio_init);
diff --git a/arch/ppc/kernel/setup.c b/arch/ppc/kernel/setup.c
index 5255bd80aa6b..d51368d72e39 100644
--- a/arch/ppc/kernel/setup.c
+++ b/arch/ppc/kernel/setup.c
@@ -37,10 +37,8 @@
37#include <asm/nvram.h> 37#include <asm/nvram.h>
38#include <asm/xmon.h> 38#include <asm/xmon.h>
39#include <asm/ocp.h> 39#include <asm/ocp.h>
40#include <asm/prom.h>
41 40
42#define USES_PPC_SYS (defined(CONFIG_85xx) || defined(CONFIG_83xx) || \ 41#define USES_PPC_SYS (defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
43 defined(CONFIG_MPC10X_BRIDGE) || defined(CONFIG_8260) || \
44 defined(CONFIG_PPC_MPC52xx)) 42 defined(CONFIG_PPC_MPC52xx))
45 43
46#if USES_PPC_SYS 44#if USES_PPC_SYS
diff --git a/arch/ppc/kernel/traps.c b/arch/ppc/kernel/traps.c
index c78568905c3b..a467a429c2fe 100644
--- a/arch/ppc/kernel/traps.c
+++ b/arch/ppc/kernel/traps.c
@@ -194,11 +194,7 @@ static inline int check_io_access(struct pt_regs *regs)
194/* On 4xx, the reason for the machine check or program exception 194/* On 4xx, the reason for the machine check or program exception
195 is in the ESR. */ 195 is in the ESR. */
196#define get_reason(regs) ((regs)->dsisr) 196#define get_reason(regs) ((regs)->dsisr)
197#ifndef CONFIG_FSL_BOOKE
198#define get_mc_reason(regs) ((regs)->dsisr) 197#define get_mc_reason(regs) ((regs)->dsisr)
199#else
200#define get_mc_reason(regs) (mfspr(SPRN_MCSR))
201#endif
202#define REASON_FP ESR_FP 198#define REASON_FP ESR_FP
203#define REASON_ILLEGAL (ESR_PIL | ESR_PUO) 199#define REASON_ILLEGAL (ESR_PIL | ESR_PUO)
204#define REASON_PRIVILEGED ESR_PPR 200#define REASON_PRIVILEGED ESR_PPR
@@ -231,39 +227,25 @@ platform_machine_check(struct pt_regs *regs)
231{ 227{
232} 228}
233 229
234void machine_check_exception(struct pt_regs *regs) 230#if defined(CONFIG_4xx)
231int machine_check_4xx(struct pt_regs *regs)
235{ 232{
236 unsigned long reason = get_mc_reason(regs); 233 unsigned long reason = get_mc_reason(regs);
237 234
238 if (user_mode(regs)) {
239 regs->msr |= MSR_RI;
240 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
241 return;
242 }
243
244#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
245 /* the qspan pci read routines can cause machine checks -- Cort */
246 bad_page_fault(regs, regs->dar, SIGBUS);
247 return;
248#endif
249
250 if (debugger_fault_handler) {
251 debugger_fault_handler(regs);
252 regs->msr |= MSR_RI;
253 return;
254 }
255
256 if (check_io_access(regs))
257 return;
258
259#if defined(CONFIG_4xx) && !defined(CONFIG_440A)
260 if (reason & ESR_IMCP) { 235 if (reason & ESR_IMCP) {
261 printk("Instruction"); 236 printk("Instruction");
262 mtspr(SPRN_ESR, reason & ~ESR_IMCP); 237 mtspr(SPRN_ESR, reason & ~ESR_IMCP);
263 } else 238 } else
264 printk("Data"); 239 printk("Data");
265 printk(" machine check in kernel mode.\n"); 240 printk(" machine check in kernel mode.\n");
266#elif defined(CONFIG_440A) 241
242 return 0;
243}
244
245int machine_check_440A(struct pt_regs *regs)
246{
247 unsigned long reason = get_mc_reason(regs);
248
267 printk("Machine check in kernel mode.\n"); 249 printk("Machine check in kernel mode.\n");
268 if (reason & ESR_IMCP){ 250 if (reason & ESR_IMCP){
269 printk("Instruction Synchronous Machine Check exception\n"); 251 printk("Instruction Synchronous Machine Check exception\n");
@@ -293,55 +275,13 @@ void machine_check_exception(struct pt_regs *regs)
293 /* Clear MCSR */ 275 /* Clear MCSR */
294 mtspr(SPRN_MCSR, mcsr); 276 mtspr(SPRN_MCSR, mcsr);
295 } 277 }
296#elif defined (CONFIG_E500) 278 return 0;
297 printk("Machine check in kernel mode.\n"); 279}
298 printk("Caused by (from MCSR=%lx): ", reason); 280#else
299 281int machine_check_generic(struct pt_regs *regs)
300 if (reason & MCSR_MCP) 282{
301 printk("Machine Check Signal\n"); 283 unsigned long reason = get_mc_reason(regs);
302 if (reason & MCSR_ICPERR) 284
303 printk("Instruction Cache Parity Error\n");
304 if (reason & MCSR_DCP_PERR)
305 printk("Data Cache Push Parity Error\n");
306 if (reason & MCSR_DCPERR)
307 printk("Data Cache Parity Error\n");
308 if (reason & MCSR_GL_CI)
309 printk("Guarded Load or Cache-Inhibited stwcx.\n");
310 if (reason & MCSR_BUS_IAERR)
311 printk("Bus - Instruction Address Error\n");
312 if (reason & MCSR_BUS_RAERR)
313 printk("Bus - Read Address Error\n");
314 if (reason & MCSR_BUS_WAERR)
315 printk("Bus - Write Address Error\n");
316 if (reason & MCSR_BUS_IBERR)
317 printk("Bus - Instruction Data Error\n");
318 if (reason & MCSR_BUS_RBERR)
319 printk("Bus - Read Data Bus Error\n");
320 if (reason & MCSR_BUS_WBERR)
321 printk("Bus - Write Data Bus Error\n");
322 if (reason & MCSR_BUS_IPERR)
323 printk("Bus - Instruction Parity Error\n");
324 if (reason & MCSR_BUS_RPERR)
325 printk("Bus - Read Parity Error\n");
326#elif defined (CONFIG_E200)
327 printk("Machine check in kernel mode.\n");
328 printk("Caused by (from MCSR=%lx): ", reason);
329
330 if (reason & MCSR_MCP)
331 printk("Machine Check Signal\n");
332 if (reason & MCSR_CP_PERR)
333 printk("Cache Push Parity Error\n");
334 if (reason & MCSR_CPERR)
335 printk("Cache Parity Error\n");
336 if (reason & MCSR_EXCP_ERR)
337 printk("ISI, ITLB, or Bus Error on first instruction fetch for an exception handler\n");
338 if (reason & MCSR_BUS_IRERR)
339 printk("Bus - Read Bus Error on instruction fetch\n");
340 if (reason & MCSR_BUS_DRERR)
341 printk("Bus - Read Bus Error on data load\n");
342 if (reason & MCSR_BUS_WRERR)
343 printk("Bus - Write Bus Error on buffered store or cache line push\n");
344#else /* !CONFIG_4xx && !CONFIG_E500 && !CONFIG_E200 */
345 printk("Machine check in kernel mode.\n"); 285 printk("Machine check in kernel mode.\n");
346 printk("Caused by (from SRR1=%lx): ", reason); 286 printk("Caused by (from SRR1=%lx): ", reason);
347 switch (reason & 0x601F0000) { 287 switch (reason & 0x601F0000) {
@@ -371,7 +311,39 @@ void machine_check_exception(struct pt_regs *regs)
371 default: 311 default:
372 printk("Unknown values in msr\n"); 312 printk("Unknown values in msr\n");
373 } 313 }
374#endif /* CONFIG_4xx */ 314 return 0;
315}
316#endif /* everything else */
317
318void machine_check_exception(struct pt_regs *regs)
319{
320 int recover = 0;
321
322 if (cur_cpu_spec->machine_check)
323 recover = cur_cpu_spec->machine_check(regs);
324 if (recover > 0)
325 return;
326
327 if (user_mode(regs)) {
328 regs->msr |= MSR_RI;
329 _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
330 return;
331 }
332
333#if defined(CONFIG_8xx) && defined(CONFIG_PCI)
334 /* the qspan pci read routines can cause machine checks -- Cort */
335 bad_page_fault(regs, regs->dar, SIGBUS);
336 return;
337#endif
338
339 if (debugger_fault_handler) {
340 debugger_fault_handler(regs);
341 regs->msr |= MSR_RI;
342 return;
343 }
344
345 if (check_io_access(regs))
346 return;
375 347
376 /* 348 /*
377 * Optional platform-provided routine to print out 349 * Optional platform-provided routine to print out
@@ -830,63 +802,6 @@ void altivec_assist_exception(struct pt_regs *regs)
830} 802}
831#endif /* CONFIG_ALTIVEC */ 803#endif /* CONFIG_ALTIVEC */
832 804
833#ifdef CONFIG_E500
834void performance_monitor_exception(struct pt_regs *regs)
835{
836 perf_irq(regs);
837}
838#endif
839
840#ifdef CONFIG_FSL_BOOKE
841void CacheLockingException(struct pt_regs *regs, unsigned long address,
842 unsigned long error_code)
843{
844 /* We treat cache locking instructions from the user
845 * as priv ops, in the future we could try to do
846 * something smarter
847 */
848 if (error_code & (ESR_DLK|ESR_ILK))
849 _exception(SIGILL, regs, ILL_PRVOPC, regs->nip);
850 return;
851}
852#endif /* CONFIG_FSL_BOOKE */
853
854#ifdef CONFIG_SPE
855void SPEFloatingPointException(struct pt_regs *regs)
856{
857 unsigned long spefscr;
858 int fpexc_mode;
859 int code = 0;
860
861 spefscr = current->thread.spefscr;
862 fpexc_mode = current->thread.fpexc_mode;
863
864 /* Hardware does not necessarily set sticky
865 * underflow/overflow/invalid flags */
866 if ((spefscr & SPEFSCR_FOVF) && (fpexc_mode & PR_FP_EXC_OVF)) {
867 code = FPE_FLTOVF;
868 spefscr |= SPEFSCR_FOVFS;
869 }
870 else if ((spefscr & SPEFSCR_FUNF) && (fpexc_mode & PR_FP_EXC_UND)) {
871 code = FPE_FLTUND;
872 spefscr |= SPEFSCR_FUNFS;
873 }
874 else if ((spefscr & SPEFSCR_FDBZ) && (fpexc_mode & PR_FP_EXC_DIV))
875 code = FPE_FLTDIV;
876 else if ((spefscr & SPEFSCR_FINV) && (fpexc_mode & PR_FP_EXC_INV)) {
877 code = FPE_FLTINV;
878 spefscr |= SPEFSCR_FINVS;
879 }
880 else if ((spefscr & (SPEFSCR_FG | SPEFSCR_FX)) && (fpexc_mode & PR_FP_EXC_RES))
881 code = FPE_FLTRES;
882
883 current->thread.spefscr = spefscr;
884
885 _exception(SIGFPE, regs, code, regs->nip);
886 return;
887}
888#endif
889
890#ifdef CONFIG_BOOKE_WDT 805#ifdef CONFIG_BOOKE_WDT
891/* 806/*
892 * Default handler for a Watchdog exception, 807 * Default handler for a Watchdog exception,
diff --git a/arch/ppc/mm/44x_mmu.c b/arch/ppc/mm/44x_mmu.c
index 6536a25cfcb8..fbb577a0d165 100644
--- a/arch/ppc/mm/44x_mmu.c
+++ b/arch/ppc/mm/44x_mmu.c
@@ -60,38 +60,28 @@ extern char etext[], _stext[];
60 * Just needed it declared someplace. 60 * Just needed it declared someplace.
61 */ 61 */
62unsigned int tlb_44x_index = 0; 62unsigned int tlb_44x_index = 0;
63unsigned int tlb_44x_hwater = 62; 63unsigned int tlb_44x_hwater = PPC4XX_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
64int icache_44x_need_flush; 64int icache_44x_need_flush;
65 65
66/* 66/*
67 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem 67 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
68 */ 68 */
69static void __init 69static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
70ppc44x_pin_tlb(int slot, unsigned int virt, unsigned int phys)
71{ 70{
72 unsigned long attrib = 0; 71 __asm__ __volatile__(
73 72 "tlbwe %2,%3,%4\n"
74 __asm__ __volatile__("\ 73 "tlbwe %1,%3,%5\n"
75 clrrwi %2,%2,10\n\ 74 "tlbwe %0,%3,%6\n"
76 ori %2,%2,%4\n\
77 clrrwi %1,%1,10\n\
78 li %0,0\n\
79 ori %0,%0,%5\n\
80 tlbwe %2,%3,%6\n\
81 tlbwe %1,%3,%7\n\
82 tlbwe %0,%3,%8"
83 : 75 :
84 : "r" (attrib), "r" (phys), "r" (virt), "r" (slot), 76 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
85 "i" (PPC44x_TLB_VALID | PPC44x_TLB_256M), 77 "r" (phys),
86 "i" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), 78 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
79 "r" (tlb_44x_hwater--), /* slot for this TLB entry */
87 "i" (PPC44x_TLB_PAGEID), 80 "i" (PPC44x_TLB_PAGEID),
88 "i" (PPC44x_TLB_XLAT), 81 "i" (PPC44x_TLB_XLAT),
89 "i" (PPC44x_TLB_ATTRIB)); 82 "i" (PPC44x_TLB_ATTRIB));
90} 83}
91 84
92/*
93 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
94 */
95void __init MMU_init_hw(void) 85void __init MMU_init_hw(void)
96{ 86{
97 flush_instruction_cache(); 87 flush_instruction_cache();
@@ -99,22 +89,13 @@ void __init MMU_init_hw(void)
99 89
100unsigned long __init mmu_mapin_ram(void) 90unsigned long __init mmu_mapin_ram(void)
101{ 91{
102 unsigned int pinned_tlbs = 1; 92 unsigned long addr;
103 int i;
104
105 /* Determine number of entries necessary to cover lowmem */
106 pinned_tlbs = (unsigned int)
107 (_ALIGN(total_lowmem, PPC_PIN_SIZE) >> PPC44x_PIN_SHIFT);
108
109 /* Write upper watermark to save location */
110 tlb_44x_hwater = PPC44x_LOW_SLOT - pinned_tlbs;
111 93
112 /* If necessary, set additional pinned TLBs */ 94 /* Pin in enough TLBs to cover any lowmem not covered by the
113 if (pinned_tlbs > 1) 95 * initial 256M mapping established in head_44x.S */
114 for (i = (PPC44x_LOW_SLOT-(pinned_tlbs-1)); i < PPC44x_LOW_SLOT; i++) { 96 for (addr = PPC_PIN_SIZE; addr < total_lowmem;
115 unsigned int phys_addr = (PPC44x_LOW_SLOT-i) * PPC_PIN_SIZE; 97 addr += PPC_PIN_SIZE)
116 ppc44x_pin_tlb(i, phys_addr+PAGE_OFFSET, phys_addr); 98 ppc44x_pin_tlb(addr + PAGE_OFFSET, addr);
117 }
118 99
119 return total_lowmem; 100 return total_lowmem;
120} 101}
diff --git a/arch/ppc/mm/Makefile b/arch/ppc/mm/Makefile
index cd3eae147cf8..691ba2bae05d 100644
--- a/arch/ppc/mm/Makefile
+++ b/arch/ppc/mm/Makefile
@@ -8,4 +8,3 @@ obj-y := fault.o init.o mem_pieces.o \
8obj-$(CONFIG_PPC_STD_MMU) += hashtable.o ppc_mmu.o tlb.o 8obj-$(CONFIG_PPC_STD_MMU) += hashtable.o ppc_mmu.o tlb.o
9obj-$(CONFIG_40x) += 4xx_mmu.o 9obj-$(CONFIG_40x) += 4xx_mmu.o
10obj-$(CONFIG_44x) += 44x_mmu.o 10obj-$(CONFIG_44x) += 44x_mmu.o
11obj-$(CONFIG_FSL_BOOKE) += fsl_booke_mmu.o
diff --git a/arch/ppc/mm/fsl_booke_mmu.c b/arch/ppc/mm/fsl_booke_mmu.c
deleted file mode 100644
index 123da03ab118..000000000000
--- a/arch/ppc/mm/fsl_booke_mmu.c
+++ /dev/null
@@ -1,236 +0,0 @@
1/*
2 * Modifications by Kumar Gala (galak@kernel.crashing.org) to support
3 * E500 Book E processors.
4 *
5 * Copyright 2004 Freescale Semiconductor, Inc
6 *
7 * This file contains the routines for initializing the MMU
8 * on the 4xx series of chips.
9 * -- paulus
10 *
11 * Derived from arch/ppc/mm/init.c:
12 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
13 *
14 * Modifications by Paul Mackerras (PowerMac) (paulus@cs.anu.edu.au)
15 * and Cort Dougan (PReP) (cort@cs.nmt.edu)
16 * Copyright (C) 1996 Paul Mackerras
17 * Amiga/APUS changes by Jesper Skov (jskov@cygnus.co.uk).
18 *
19 * Derived from "arch/i386/mm/init.c"
20 * Copyright (C) 1991, 1992, 1993, 1994 Linus Torvalds
21 *
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
26 *
27 */
28
29#include <linux/signal.h>
30#include <linux/sched.h>
31#include <linux/kernel.h>
32#include <linux/errno.h>
33#include <linux/string.h>
34#include <linux/types.h>
35#include <linux/ptrace.h>
36#include <linux/mman.h>
37#include <linux/mm.h>
38#include <linux/swap.h>
39#include <linux/stddef.h>
40#include <linux/vmalloc.h>
41#include <linux/init.h>
42#include <linux/delay.h>
43#include <linux/highmem.h>
44
45#include <asm/pgalloc.h>
46#include <asm/prom.h>
47#include <asm/io.h>
48#include <asm/mmu_context.h>
49#include <asm/pgtable.h>
50#include <asm/mmu.h>
51#include <asm/uaccess.h>
52#include <asm/smp.h>
53#include <asm/bootx.h>
54#include <asm/machdep.h>
55#include <asm/setup.h>
56
57extern void loadcam_entry(unsigned int index);
58unsigned int tlbcam_index;
59unsigned int num_tlbcam_entries;
60static unsigned long __cam0, __cam1, __cam2;
61extern unsigned long total_lowmem;
62extern unsigned long __max_low_memory;
63#define MAX_LOW_MEM CONFIG_LOWMEM_SIZE
64
65#define NUM_TLBCAMS (16)
66
67struct tlbcam {
68 u32 MAS0;
69 u32 MAS1;
70 u32 MAS2;
71 u32 MAS3;
72 u32 MAS7;
73} TLBCAM[NUM_TLBCAMS];
74
75struct tlbcamrange {
76 unsigned long start;
77 unsigned long limit;
78 phys_addr_t phys;
79} tlbcam_addrs[NUM_TLBCAMS];
80
81extern unsigned int tlbcam_index;
82
83/*
84 * Return PA for this VA if it is mapped by a CAM, or 0
85 */
86unsigned long v_mapped_by_tlbcam(unsigned long va)
87{
88 int b;
89 for (b = 0; b < tlbcam_index; ++b)
90 if (va >= tlbcam_addrs[b].start && va < tlbcam_addrs[b].limit)
91 return tlbcam_addrs[b].phys + (va - tlbcam_addrs[b].start);
92 return 0;
93}
94
95/*
96 * Return VA for a given PA or 0 if not mapped
97 */
98unsigned long p_mapped_by_tlbcam(unsigned long pa)
99{
100 int b;
101 for (b = 0; b < tlbcam_index; ++b)
102 if (pa >= tlbcam_addrs[b].phys
103 && pa < (tlbcam_addrs[b].limit-tlbcam_addrs[b].start)
104 +tlbcam_addrs[b].phys)
105 return tlbcam_addrs[b].start+(pa-tlbcam_addrs[b].phys);
106 return 0;
107}
108
109/*
110 * Set up one of the I/D BAT (block address translation) register pairs.
111 * The parameters are not checked; in particular size must be a power
112 * of 4 between 4k and 256M.
113 */
114void settlbcam(int index, unsigned long virt, phys_addr_t phys,
115 unsigned int size, int flags, unsigned int pid)
116{
117 unsigned int tsize, lz;
118
119 asm ("cntlzw %0,%1" : "=r" (lz) : "r" (size));
120 tsize = (21 - lz) / 2;
121
122#ifdef CONFIG_SMP
123 if ((flags & _PAGE_NO_CACHE) == 0)
124 flags |= _PAGE_COHERENT;
125#endif
126
127 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index) | MAS0_NV(index+1);
128 TLBCAM[index].MAS1 = MAS1_VALID | MAS1_IPROT | MAS1_TSIZE(tsize) | MAS1_TID(pid);
129 TLBCAM[index].MAS2 = virt & PAGE_MASK;
130
131 TLBCAM[index].MAS2 |= (flags & _PAGE_WRITETHRU) ? MAS2_W : 0;
132 TLBCAM[index].MAS2 |= (flags & _PAGE_NO_CACHE) ? MAS2_I : 0;
133 TLBCAM[index].MAS2 |= (flags & _PAGE_COHERENT) ? MAS2_M : 0;
134 TLBCAM[index].MAS2 |= (flags & _PAGE_GUARDED) ? MAS2_G : 0;
135 TLBCAM[index].MAS2 |= (flags & _PAGE_ENDIAN) ? MAS2_E : 0;
136
137 TLBCAM[index].MAS3 = (phys & PAGE_MASK) | MAS3_SX | MAS3_SR;
138 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_SW : 0);
139
140#ifndef CONFIG_KGDB /* want user access for breakpoints */
141 if (flags & _PAGE_USER) {
142 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
143 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
144 }
145#else
146 TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
147 TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
148#endif
149
150 tlbcam_addrs[index].start = virt;
151 tlbcam_addrs[index].limit = virt + size - 1;
152 tlbcam_addrs[index].phys = phys;
153
154 loadcam_entry(index);
155}
156
157void invalidate_tlbcam_entry(int index)
158{
159 TLBCAM[index].MAS0 = MAS0_TLBSEL(1) | MAS0_ESEL(index);
160 TLBCAM[index].MAS1 = ~MAS1_VALID;
161
162 loadcam_entry(index);
163}
164
165void __init cam_mapin_ram(unsigned long cam0, unsigned long cam1,
166 unsigned long cam2)
167{
168 settlbcam(0, KERNELBASE, PPC_MEMSTART, cam0, _PAGE_KERNEL, 0);
169 tlbcam_index++;
170 if (cam1) {
171 tlbcam_index++;
172 settlbcam(1, KERNELBASE+cam0, PPC_MEMSTART+cam0, cam1, _PAGE_KERNEL, 0);
173 }
174 if (cam2) {
175 tlbcam_index++;
176 settlbcam(2, KERNELBASE+cam0+cam1, PPC_MEMSTART+cam0+cam1, cam2, _PAGE_KERNEL, 0);
177 }
178}
179
180/*
181 * MMU_init_hw does the chip-specific initialization of the MMU hardware.
182 */
183void __init MMU_init_hw(void)
184{
185 flush_instruction_cache();
186}
187
188unsigned long __init mmu_mapin_ram(void)
189{
190 cam_mapin_ram(__cam0, __cam1, __cam2);
191
192 return __cam0 + __cam1 + __cam2;
193}
194
195
196void __init
197adjust_total_lowmem(void)
198{
199 unsigned long max_low_mem = MAX_LOW_MEM;
200 unsigned long cam_max = 0x10000000;
201 unsigned long ram;
202
203 /* adjust CAM size to max_low_mem */
204 if (max_low_mem < cam_max)
205 cam_max = max_low_mem;
206
207 /* adjust lowmem size to max_low_mem */
208 if (max_low_mem < total_lowmem)
209 ram = max_low_mem;
210 else
211 ram = total_lowmem;
212
213 /* Calculate CAM values */
214 __cam0 = 1UL << 2 * (__ilog2(ram) / 2);
215 if (__cam0 > cam_max)
216 __cam0 = cam_max;
217 ram -= __cam0;
218 if (ram) {
219 __cam1 = 1UL << 2 * (__ilog2(ram) / 2);
220 if (__cam1 > cam_max)
221 __cam1 = cam_max;
222 ram -= __cam1;
223 }
224 if (ram) {
225 __cam2 = 1UL << 2 * (__ilog2(ram) / 2);
226 if (__cam2 > cam_max)
227 __cam2 = cam_max;
228 ram -= __cam2;
229 }
230
231 printk(KERN_INFO "Memory CAM mapping: CAM0=%ldMb, CAM1=%ldMb,"
232 " CAM2=%ldMb residual: %ldMb\n",
233 __cam0 >> 20, __cam1 >> 20, __cam2 >> 20,
234 (total_lowmem - __cam0 - __cam1 - __cam2) >> 20);
235 __max_low_memory = max_low_mem = __cam0 + __cam1 + __cam2;
236}
diff --git a/arch/ppc/mm/init.c b/arch/ppc/mm/init.c
index dd898d32480e..7444df3889c5 100644
--- a/arch/ppc/mm/init.c
+++ b/arch/ppc/mm/init.c
@@ -241,12 +241,6 @@ void __init MMU_init(void)
241 if (__max_memory && total_memory > __max_memory) 241 if (__max_memory && total_memory > __max_memory)
242 total_memory = __max_memory; 242 total_memory = __max_memory;
243 total_lowmem = total_memory; 243 total_lowmem = total_memory;
244#ifdef CONFIG_FSL_BOOKE
245 /* Freescale Book-E parts expect lowmem to be mapped by fixed TLB
246 * entries, so we need to adjust lowmem to match the amount we can map
247 * in the fixed entries */
248 adjust_total_lowmem();
249#endif /* CONFIG_FSL_BOOKE */
250 if (total_lowmem > __max_low_memory) { 244 if (total_lowmem > __max_low_memory) {
251 total_lowmem = __max_low_memory; 245 total_lowmem = __max_low_memory;
252#ifndef CONFIG_HIGHMEM 246#ifndef CONFIG_HIGHMEM
diff --git a/arch/ppc/mm/mmu_context.c b/arch/ppc/mm/mmu_context.c
index 85afa7f8aa78..dacf45ced473 100644
--- a/arch/ppc/mm/mmu_context.c
+++ b/arch/ppc/mm/mmu_context.c
@@ -2,7 +2,7 @@
2 * This file contains the routines for handling the MMU on those 2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the 3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx, 4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and 83xx implementations but excludes the 8xx and 4xx. 5 * and 8260 implementations but excludes the 8xx and 4xx.
6 * -- paulus 6 * -- paulus
7 * 7 *
8 * Derived from arch/ppc/mm/init.c: 8 * Derived from arch/ppc/mm/init.c:
diff --git a/arch/ppc/mm/mmu_decl.h b/arch/ppc/mm/mmu_decl.h
index b298b60c202f..5f813e386b87 100644
--- a/arch/ppc/mm/mmu_decl.h
+++ b/arch/ppc/mm/mmu_decl.h
@@ -58,12 +58,6 @@ extern unsigned int num_tlbcam_entries;
58extern void MMU_init_hw(void); 58extern void MMU_init_hw(void);
59extern unsigned long mmu_mapin_ram(void); 59extern unsigned long mmu_mapin_ram(void);
60 60
61#elif defined(CONFIG_FSL_BOOKE)
62#define flush_HPTE(pid, va, pg) _tlbie(va, pid)
63extern void MMU_init_hw(void);
64extern unsigned long mmu_mapin_ram(void);
65extern void adjust_total_lowmem(void);
66
67#else 61#else
68/* anything except 4xx or 8xx */ 62/* anything except 4xx or 8xx */
69extern void MMU_init_hw(void); 63extern void MMU_init_hw(void);
diff --git a/arch/ppc/mm/pgtable.c b/arch/ppc/mm/pgtable.c
index 1f51e6c94507..fadacfd18806 100644
--- a/arch/ppc/mm/pgtable.c
+++ b/arch/ppc/mm/pgtable.c
@@ -42,10 +42,6 @@ int io_bat_index;
42#define HAVE_BATS 1 42#define HAVE_BATS 1
43#endif 43#endif
44 44
45#if defined(CONFIG_FSL_BOOKE)
46#define HAVE_TLBCAM 1
47#endif
48
49extern char etext[], _stext[]; 45extern char etext[], _stext[];
50 46
51#ifdef CONFIG_SMP 47#ifdef CONFIG_SMP
@@ -63,15 +59,6 @@ void setbat(int index, unsigned long virt, unsigned long phys,
63#define p_mapped_by_bats(x) (0UL) 59#define p_mapped_by_bats(x) (0UL)
64#endif /* HAVE_BATS */ 60#endif /* HAVE_BATS */
65 61
66#ifdef HAVE_TLBCAM
67extern unsigned int tlbcam_index;
68extern unsigned long v_mapped_by_tlbcam(unsigned long va);
69extern unsigned long p_mapped_by_tlbcam(unsigned long pa);
70#else /* !HAVE_TLBCAM */
71#define v_mapped_by_tlbcam(x) (0UL)
72#define p_mapped_by_tlbcam(x) (0UL)
73#endif /* HAVE_TLBCAM */
74
75#ifdef CONFIG_PTE_64BIT 62#ifdef CONFIG_PTE_64BIT
76/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */ 63/* 44x uses an 8kB pgdir because it has 8-byte Linux PTEs. */
77#define PGDIR_ORDER 1 64#define PGDIR_ORDER 1
@@ -213,9 +200,6 @@ __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
213 if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ ) 200 if ((v = p_mapped_by_bats(p)) /*&& p_mapped_by_bats(p+size-1)*/ )
214 goto out; 201 goto out;
215 202
216 if ((v = p_mapped_by_tlbcam(p)))
217 goto out;
218
219 if (mem_init_done) { 203 if (mem_init_done) {
220 struct vm_struct *area; 204 struct vm_struct *area;
221 area = get_vm_area(size, VM_IOREMAP); 205 area = get_vm_area(size, VM_IOREMAP);
@@ -341,18 +325,6 @@ void __init io_block_mapping(unsigned long virt, phys_addr_t phys,
341 } 325 }
342#endif /* HAVE_BATS */ 326#endif /* HAVE_BATS */
343 327
344#ifdef HAVE_TLBCAM
345 /*
346 * Use a CAM for this if possible...
347 */
348 if (tlbcam_index < num_tlbcam_entries && is_power_of_4(size)
349 && (virt & (size - 1)) == 0 && (phys & (size - 1)) == 0) {
350 settlbcam(tlbcam_index, virt, phys, size, flags, 0);
351 ++tlbcam_index;
352 return;
353 }
354#endif /* HAVE_TLBCAM */
355
356 /* No BATs available, put it in the page tables. */ 328 /* No BATs available, put it in the page tables. */
357 for (i = 0; i < size; i += PAGE_SIZE) 329 for (i = 0; i < size; i += PAGE_SIZE)
358 map_page(virt + i, phys + i, flags); 330 map_page(virt + i, phys + i, flags);
diff --git a/arch/ppc/mm/ppc_mmu.c b/arch/ppc/mm/ppc_mmu.c
index 973f1e6afa53..0c1dc155996a 100644
--- a/arch/ppc/mm/ppc_mmu.c
+++ b/arch/ppc/mm/ppc_mmu.c
@@ -2,7 +2,7 @@
2 * This file contains the routines for handling the MMU on those 2 * This file contains the routines for handling the MMU on those
3 * PowerPC implementations where the MMU substantially follows the 3 * PowerPC implementations where the MMU substantially follows the
4 * architecture specification. This includes the 6xx, 7xx, 7xxx, 4 * architecture specification. This includes the 6xx, 7xx, 7xxx,
5 * 8260, and 83xx implementations but excludes the 8xx and 4xx. 5 * and 8260 implementations but excludes the 8xx and 4xx.
6 * -- paulus 6 * -- paulus
7 * 7 *
8 * Derived from arch/ppc/mm/init.c: 8 * Derived from arch/ppc/mm/init.c:
diff --git a/arch/ppc/platforms/83xx/Makefile b/arch/ppc/platforms/83xx/Makefile
deleted file mode 100644
index eb55341d6a17..000000000000
--- a/arch/ppc/platforms/83xx/Makefile
+++ /dev/null
@@ -1,4 +0,0 @@
1#
2# Makefile for the PowerPC 83xx linux kernel.
3#
4obj-$(CONFIG_MPC834x_SYS) += mpc834x_sys.o
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.c b/arch/ppc/platforms/83xx/mpc834x_sys.c
deleted file mode 100644
index cb0a7493ff64..000000000000
--- a/arch/ppc/platforms/83xx/mpc834x_sys.c
+++ /dev/null
@@ -1,326 +0,0 @@
1/*
2 * MPC834x SYS board specific routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/root_dev.h>
26#include <linux/serial.h>
27#include <linux/tty.h> /* for linux/serial_core.h */
28#include <linux/serial_core.h>
29#include <linux/initrd.h>
30#include <linux/module.h>
31#include <linux/fsl_devices.h>
32
33#include <asm/system.h>
34#include <asm/pgtable.h>
35#include <asm/page.h>
36#include <asm/atomic.h>
37#include <asm/time.h>
38#include <asm/io.h>
39#include <asm/machdep.h>
40#include <asm/ipic.h>
41#include <asm/bootinfo.h>
42#include <asm/pci-bridge.h>
43#include <asm/mpc83xx.h>
44#include <asm/irq.h>
45#include <asm/kgdb.h>
46#include <asm/ppc_sys.h>
47#include <mm/mmu_decl.h>
48
49#include <syslib/ppc83xx_setup.h>
50
51#ifndef CONFIG_PCI
52unsigned long isa_io_base = 0;
53unsigned long isa_mem_base = 0;
54#endif
55
56extern unsigned long total_memory; /* in mm/init */
57
58unsigned char __res[sizeof (bd_t)];
59
60#ifdef CONFIG_PCI
61int
62mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
63{
64 static char pci_irq_table[][4] =
65 /*
66 * PCI IDSEL/INTPIN->INTLINE
67 * A B C D
68 */
69 {
70 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x11 */
71 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x12 */
72 {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x13 */
73 {0, 0, 0, 0},
74 {PIRQA, PIRQB, PIRQC, PIRQD}, /* idsel 0x15 */
75 {PIRQD, PIRQA, PIRQB, PIRQC}, /* idsel 0x16 */
76 {PIRQC, PIRQD, PIRQA, PIRQB}, /* idsel 0x17 */
77 {PIRQB, PIRQC, PIRQD, PIRQA}, /* idsel 0x18 */
78 {0, 0, 0, 0}, /* idsel 0x19 */
79 {0, 0, 0, 0}, /* idsel 0x20 */
80 };
81
82 const long min_idsel = 0x11, max_idsel = 0x20, irqs_per_slot = 4;
83 return PCI_IRQ_TABLE_LOOKUP;
84}
85
86int
87mpc83xx_exclude_device(u_char bus, u_char devfn)
88{
89 return PCIBIOS_SUCCESSFUL;
90}
91#endif /* CONFIG_PCI */
92
93/* ************************************************************************
94 *
95 * Setup the architecture
96 *
97 */
98static void __init
99mpc834x_sys_setup_arch(void)
100{
101 bd_t *binfo = (bd_t *) __res;
102 unsigned int freq;
103 struct gianfar_platform_data *pdata;
104 struct gianfar_mdio_data *mdata;
105
106 /* get the core frequency */
107 freq = binfo->bi_intfreq;
108
109 /* Set loops_per_jiffy to a half-way reasonable value,
110 for use until calibrate_delay gets called. */
111 loops_per_jiffy = freq / HZ;
112
113#ifdef CONFIG_PCI
114 /* setup PCI host bridges */
115 mpc83xx_setup_hose();
116#endif
117 mpc83xx_early_serial_map();
118
119 /* setup the board related info for the MDIO bus */
120 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC83xx_MDIO);
121
122 mdata->irq[0] = MPC83xx_IRQ_EXT1;
123 mdata->irq[1] = MPC83xx_IRQ_EXT2;
124 mdata->irq[2] = PHY_POLL;
125 mdata->irq[31] = PHY_POLL;
126
127 /* setup the board related information for the enet controllers */
128 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC1);
129 if (pdata) {
130 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
131 pdata->bus_id = 0;
132 pdata->phy_id = 0;
133 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
134 }
135
136 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC83xx_TSEC2);
137 if (pdata) {
138 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
139 pdata->bus_id = 0;
140 pdata->phy_id = 1;
141 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
142 }
143
144#ifdef CONFIG_BLK_DEV_INITRD
145 if (initrd_start)
146 ROOT_DEV = Root_RAM0;
147 else
148#endif
149#ifdef CONFIG_ROOT_NFS
150 ROOT_DEV = Root_NFS;
151#else
152 ROOT_DEV = Root_HDA1;
153#endif
154}
155
156static void __init
157mpc834x_sys_map_io(void)
158{
159 /* we steal the lowest ioremap addr for virt space */
160 io_block_mapping(VIRT_IMMRBAR, immrbar, 1024*1024, _PAGE_IO);
161}
162
163int
164mpc834x_sys_show_cpuinfo(struct seq_file *m)
165{
166 uint pvid, svid, phid1;
167 bd_t *binfo = (bd_t *) __res;
168 unsigned int freq;
169
170 /* get the core frequency */
171 freq = binfo->bi_intfreq;
172
173 pvid = mfspr(SPRN_PVR);
174 svid = mfspr(SPRN_SVR);
175
176 seq_printf(m, "Vendor\t\t: Freescale Inc.\n");
177 seq_printf(m, "Machine\t\t: mpc%s sys\n", cur_ppc_sys_spec->ppc_sys_name);
178 seq_printf(m, "core clock\t: %d MHz\n"
179 "bus clock\t: %d MHz\n",
180 (int)(binfo->bi_intfreq / 1000000),
181 (int)(binfo->bi_busfreq / 1000000));
182 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
183 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
184
185 /* Display cpu Pll setting */
186 phid1 = mfspr(SPRN_HID1);
187 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
188
189 /* Display the amount of memory */
190 seq_printf(m, "Memory\t\t: %d MB\n", (int)(binfo->bi_memsize / (1024 * 1024)));
191
192 return 0;
193}
194
195
196void __init
197mpc834x_sys_init_IRQ(void)
198{
199 bd_t *binfo = (bd_t *) __res;
200
201 u8 senses[8] = {
202 0, /* EXT 0 */
203 IRQ_SENSE_LEVEL, /* EXT 1 */
204 IRQ_SENSE_LEVEL, /* EXT 2 */
205 0, /* EXT 3 */
206#ifdef CONFIG_PCI
207 IRQ_SENSE_LEVEL, /* EXT 4 */
208 IRQ_SENSE_LEVEL, /* EXT 5 */
209 IRQ_SENSE_LEVEL, /* EXT 6 */
210 IRQ_SENSE_LEVEL, /* EXT 7 */
211#else
212 0, /* EXT 4 */
213 0, /* EXT 5 */
214 0, /* EXT 6 */
215 0, /* EXT 7 */
216#endif
217 };
218
219 ipic_init(binfo->bi_immr_base + 0x00700, 0, MPC83xx_IPIC_IRQ_OFFSET, senses, 8);
220
221 /* Initialize the default interrupt mapping priorities,
222 * in case the boot rom changed something on us.
223 */
224 ipic_set_default_priority();
225}
226
227static __inline__ void
228mpc834x_sys_set_bat(void)
229{
230 /* we steal the lowest ioremap addr for virt space */
231 mb();
232 mtspr(SPRN_DBAT1U, VIRT_IMMRBAR | 0x1e);
233 mtspr(SPRN_DBAT1L, immrbar | 0x2a);
234 mb();
235}
236
237void __init
238platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
239 unsigned long r6, unsigned long r7)
240{
241 bd_t *binfo = (bd_t *) __res;
242
243 /* parse_bootinfo must always be called first */
244 parse_bootinfo(find_bootinfo());
245
246 /*
247 * If we were passed in a board information, copy it into the
248 * residual data area.
249 */
250 if (r3) {
251 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
252 sizeof (bd_t));
253 }
254
255#if defined(CONFIG_BLK_DEV_INITRD)
256 /*
257 * If the init RAM disk has been configured in, and there's a valid
258 * starting address for it, set it up.
259 */
260 if (r4) {
261 initrd_start = r4 + KERNELBASE;
262 initrd_end = r5 + KERNELBASE;
263 }
264#endif /* CONFIG_BLK_DEV_INITRD */
265
266 /* Copy the kernel command line arguments to a safe place. */
267 if (r6) {
268 *(char *) (r7 + KERNELBASE) = 0;
269 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
270 }
271
272 immrbar = binfo->bi_immr_base;
273
274 mpc834x_sys_set_bat();
275
276#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
277 {
278 struct uart_port p;
279
280 memset(&p, 0, sizeof (p));
281 p.iotype = UPIO_MEM;
282 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4500);
283 p.uartclk = binfo->bi_busfreq;
284
285 gen550_init(0, &p);
286
287 memset(&p, 0, sizeof (p));
288 p.iotype = UPIO_MEM;
289 p.membase = (unsigned char __iomem *)(VIRT_IMMRBAR + 0x4600);
290 p.uartclk = binfo->bi_busfreq;
291
292 gen550_init(1, &p);
293 }
294#endif
295
296 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
297
298 /* setup the PowerPC module struct */
299 ppc_md.setup_arch = mpc834x_sys_setup_arch;
300 ppc_md.show_cpuinfo = mpc834x_sys_show_cpuinfo;
301
302 ppc_md.init_IRQ = mpc834x_sys_init_IRQ;
303 ppc_md.get_irq = ipic_get_irq;
304
305 ppc_md.restart = mpc83xx_restart;
306 ppc_md.power_off = mpc83xx_power_off;
307 ppc_md.halt = mpc83xx_halt;
308
309 ppc_md.find_end_of_memory = mpc83xx_find_end_of_memory;
310 ppc_md.setup_io_mappings = mpc834x_sys_map_io;
311
312 ppc_md.time_init = mpc83xx_time_init;
313 ppc_md.set_rtc_time = NULL;
314 ppc_md.get_rtc_time = NULL;
315 ppc_md.calibrate_decr = mpc83xx_calibrate_decr;
316
317 ppc_md.early_serial_map = mpc83xx_early_serial_map;
318#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
319 ppc_md.progress = gen550_progress;
320#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
321
322 if (ppc_md.progress)
323 ppc_md.progress("mpc834x_sys_init(): exit", 0);
324
325 return;
326}
diff --git a/arch/ppc/platforms/83xx/mpc834x_sys.h b/arch/ppc/platforms/83xx/mpc834x_sys.h
deleted file mode 100644
index d2e06c95b083..000000000000
--- a/arch/ppc/platforms/83xx/mpc834x_sys.h
+++ /dev/null
@@ -1,54 +0,0 @@
1/*
2 * MPC834X SYS common board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC83XX_SYS_H__
16#define __MACH_MPC83XX_SYS_H__
17
18#include <linux/init.h>
19#include <syslib/ppc83xx_setup.h>
20#include <asm/ppcboot.h>
21
22#define VIRT_IMMRBAR ((uint)0xfe000000)
23
24#define BCSR_PHYS_ADDR ((uint)0xf8000000)
25#define BCSR_SIZE ((uint)(32 * 1024))
26
27#define BCSR_MISC_REG2_OFF 0x07
28#define BCSR_MISC_REG2_PORESET 0x01
29
30#define BCSR_MISC_REG3_OFF 0x08
31#define BCSR_MISC_REG3_CNFLOCK 0x80
32
33#define PIRQA MPC83xx_IRQ_EXT4
34#define PIRQB MPC83xx_IRQ_EXT5
35#define PIRQC MPC83xx_IRQ_EXT6
36#define PIRQD MPC83xx_IRQ_EXT7
37
38#define MPC83xx_PCI1_LOWER_IO 0x00000000
39#define MPC83xx_PCI1_UPPER_IO 0x00ffffff
40#define MPC83xx_PCI1_LOWER_MEM 0x80000000
41#define MPC83xx_PCI1_UPPER_MEM 0x9fffffff
42#define MPC83xx_PCI1_IO_BASE 0xe2000000
43#define MPC83xx_PCI1_MEM_OFFSET 0x00000000
44#define MPC83xx_PCI1_IO_SIZE 0x01000000
45
46#define MPC83xx_PCI2_LOWER_IO 0x00000000
47#define MPC83xx_PCI2_UPPER_IO 0x00ffffff
48#define MPC83xx_PCI2_LOWER_MEM 0xa0000000
49#define MPC83xx_PCI2_UPPER_MEM 0xbfffffff
50#define MPC83xx_PCI2_IO_BASE 0xe3000000
51#define MPC83xx_PCI2_MEM_OFFSET 0x00000000
52#define MPC83xx_PCI2_IO_SIZE 0x01000000
53
54#endif /* __MACH_MPC83XX_SYS_H__ */
diff --git a/arch/ppc/platforms/85xx/Kconfig b/arch/ppc/platforms/85xx/Kconfig
deleted file mode 100644
index 6f2d0add7de6..000000000000
--- a/arch/ppc/platforms/85xx/Kconfig
+++ /dev/null
@@ -1,106 +0,0 @@
1config 85xx
2 bool
3 depends on E500
4 default y
5
6config PPC_INDIRECT_PCI_BE
7 bool
8 depends on 85xx
9 default y
10
11menu "Freescale 85xx options"
12 depends on E500
13
14choice
15 prompt "Machine Type"
16 depends on 85xx
17 default MPC8540_ADS
18
19config MPC8540_ADS
20 bool "Freescale MPC8540 ADS"
21 help
22 This option enables support for the MPC 8540 ADS evaluation board.
23
24config MPC8548_CDS
25 bool "Freescale MPC8548 CDS"
26 help
27 This option enables support for the MPC8548 CDS evaluation board.
28
29config MPC8555_CDS
30 bool "Freescale MPC8555 CDS"
31 help
32 This option enables support for the MPC8555 CDS evaluation board.
33
34config MPC8560_ADS
35 bool "Freescale MPC8560 ADS"
36 help
37 This option enables support for the MPC 8560 ADS evaluation board.
38
39config SBC8560
40 bool "WindRiver PowerQUICC III SBC8560"
41 help
42 This option enables support for the WindRiver PowerQUICC III
43 SBC8560 board.
44
45config STX_GP3
46 bool "Silicon Turnkey Express GP3"
47 help
48 This option enables support for the Silicon Turnkey Express GP3
49 board.
50
51config TQM8540
52 bool "TQ Components TQM8540"
53 help
54 This option enables support for the TQ Components TQM8540 board.
55
56config TQM8541
57 bool "TQ Components TQM8541"
58 help
59 This option enables support for the TQ Components TQM8541 board.
60
61config TQM8555
62 bool "TQ Components TQM8555"
63 help
64 This option enables support for the TQ Components TQM8555 board.
65
66config TQM8560
67 bool "TQ Components TQM8560"
68 help
69 This option enables support for the TQ Components TQM8560 board.
70
71endchoice
72
73# It's often necessary to know the specific 85xx processor type.
74# Fortunately, it is implied (so far) from the board type, so we
75# don't need to ask more redundant questions.
76config MPC8540
77 bool
78 depends on MPC8540_ADS || TQM8540
79 default y
80
81config MPC8548
82 bool
83 depends on MPC8548_CDS
84 default y
85
86config MPC8555
87 bool
88 depends on MPC8555_CDS || TQM8541 || TQM8555
89 default y
90
91config MPC8560
92 bool
93 depends on SBC8560 || MPC8560_ADS || STX_GP3 || TQM8560
94 default y
95
96config 85xx_PCI2
97 bool "Support for 2nd PCI host controller"
98 depends on MPC8555_CDS
99 default y
100
101config PPC_GEN550
102 bool
103 depends on MPC8540 || SBC8560 || MPC8555
104 default y
105
106endmenu
diff --git a/arch/ppc/platforms/85xx/Makefile b/arch/ppc/platforms/85xx/Makefile
deleted file mode 100644
index 6c4753c144d3..000000000000
--- a/arch/ppc/platforms/85xx/Makefile
+++ /dev/null
@@ -1,13 +0,0 @@
1#
2# Makefile for the PowerPC 85xx linux kernel.
3#
4obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads_common.o mpc8540_ads.o
5obj-$(CONFIG_MPC8548_CDS) += mpc85xx_cds_common.o
6obj-$(CONFIG_MPC8555_CDS) += mpc85xx_cds_common.o
7obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads_common.o mpc8560_ads.o
8obj-$(CONFIG_SBC8560) += sbc85xx.o sbc8560.o
9obj-$(CONFIG_STX_GP3) += stx_gp3.o
10obj-$(CONFIG_TQM8540) += tqm85xx.o
11obj-$(CONFIG_TQM8541) += tqm85xx.o
12obj-$(CONFIG_TQM8555) += tqm85xx.o
13obj-$(CONFIG_TQM8560) += tqm85xx.o
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.c b/arch/ppc/platforms/85xx/mpc8540_ads.c
deleted file mode 100644
index 00a3ba57063f..000000000000
--- a/arch/ppc/platforms/85xx/mpc8540_ads.c
+++ /dev/null
@@ -1,226 +0,0 @@
1/*
2 * MPC8540ADS board specific routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/root_dev.h>
26#include <linux/serial.h>
27#include <linux/tty.h> /* for linux/serial_core.h */
28#include <linux/serial_core.h>
29#include <linux/initrd.h>
30#include <linux/module.h>
31#include <linux/fsl_devices.h>
32
33#include <asm/system.h>
34#include <asm/pgtable.h>
35#include <asm/page.h>
36#include <asm/atomic.h>
37#include <asm/time.h>
38#include <asm/io.h>
39#include <asm/machdep.h>
40#include <asm/open_pic.h>
41#include <asm/bootinfo.h>
42#include <asm/pci-bridge.h>
43#include <asm/mpc85xx.h>
44#include <asm/irq.h>
45#include <asm/immap_85xx.h>
46#include <asm/kgdb.h>
47#include <asm/ppc_sys.h>
48#include <mm/mmu_decl.h>
49
50#include <syslib/ppc85xx_setup.h>
51
52/* ************************************************************************
53 *
54 * Setup the architecture
55 *
56 */
57static void __init
58mpc8540ads_setup_arch(void)
59{
60 bd_t *binfo = (bd_t *) __res;
61 unsigned int freq;
62 struct gianfar_platform_data *pdata;
63 struct gianfar_mdio_data *mdata;
64
65 /* get the core frequency */
66 freq = binfo->bi_intfreq;
67
68 if (ppc_md.progress)
69 ppc_md.progress("mpc8540ads_setup_arch()", 0);
70
71 /* Set loops_per_jiffy to a half-way reasonable value,
72 for use until calibrate_delay gets called. */
73 loops_per_jiffy = freq / HZ;
74
75#ifdef CONFIG_PCI
76 /* setup PCI host bridges */
77 mpc85xx_setup_hose();
78#endif
79
80#ifdef CONFIG_SERIAL_8250
81 mpc85xx_early_serial_map();
82#endif
83
84#ifdef CONFIG_SERIAL_TEXT_DEBUG
85 /* Invalidate the entry we stole earlier the serial ports
86 * should be properly mapped */
87 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
88#endif
89
90 /* setup the board related info for the MDIO bus */
91 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
92
93 mdata->irq[0] = MPC85xx_IRQ_EXT5;
94 mdata->irq[1] = MPC85xx_IRQ_EXT5;
95 mdata->irq[2] = PHY_POLL;
96 mdata->irq[3] = MPC85xx_IRQ_EXT5;
97 mdata->irq[31] = PHY_POLL;
98
99 /* setup the board related information for the enet controllers */
100 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
101 if (pdata) {
102 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
103 pdata->bus_id = 0;
104 pdata->phy_id = 0;
105 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
106 }
107
108 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
109 if (pdata) {
110 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
111 pdata->bus_id = 0;
112 pdata->phy_id = 1;
113 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
114 }
115
116 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
117 if (pdata) {
118 pdata->board_flags = 0;
119 pdata->bus_id = 0;
120 pdata->phy_id = 3;
121 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
122 }
123
124#ifdef CONFIG_BLK_DEV_INITRD
125 if (initrd_start)
126 ROOT_DEV = Root_RAM0;
127 else
128#endif
129#ifdef CONFIG_ROOT_NFS
130 ROOT_DEV = Root_NFS;
131#else
132 ROOT_DEV = Root_HDA1;
133#endif
134}
135
136/* ************************************************************************ */
137void __init
138platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
139 unsigned long r6, unsigned long r7)
140{
141 /* parse_bootinfo must always be called first */
142 parse_bootinfo(find_bootinfo());
143
144 /*
145 * If we were passed in a board information, copy it into the
146 * residual data area.
147 */
148 if (r3) {
149 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
150 sizeof (bd_t));
151 }
152#ifdef CONFIG_SERIAL_TEXT_DEBUG
153 {
154 bd_t *binfo = (bd_t *) __res;
155 struct uart_port p;
156
157 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
158 settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
159 binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
160
161 memset(&p, 0, sizeof (p));
162 p.iotype = UPIO_MEM;
163 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
164 p.uartclk = binfo->bi_busfreq;
165
166 gen550_init(0, &p);
167
168 memset(&p, 0, sizeof (p));
169 p.iotype = UPIO_MEM;
170 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
171 p.uartclk = binfo->bi_busfreq;
172
173 gen550_init(1, &p);
174 }
175#endif
176
177#if defined(CONFIG_BLK_DEV_INITRD)
178 /*
179 * If the init RAM disk has been configured in, and there's a valid
180 * starting address for it, set it up.
181 */
182 if (r4) {
183 initrd_start = r4 + KERNELBASE;
184 initrd_end = r5 + KERNELBASE;
185 }
186#endif /* CONFIG_BLK_DEV_INITRD */
187
188 /* Copy the kernel command line arguments to a safe place. */
189
190 if (r6) {
191 *(char *) (r7 + KERNELBASE) = 0;
192 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
193 }
194
195 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
196
197 /* setup the PowerPC module struct */
198 ppc_md.setup_arch = mpc8540ads_setup_arch;
199 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
200
201 ppc_md.init_IRQ = mpc85xx_ads_init_IRQ;
202 ppc_md.get_irq = openpic_get_irq;
203
204 ppc_md.restart = mpc85xx_restart;
205 ppc_md.power_off = mpc85xx_power_off;
206 ppc_md.halt = mpc85xx_halt;
207
208 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
209
210 ppc_md.time_init = NULL;
211 ppc_md.set_rtc_time = NULL;
212 ppc_md.get_rtc_time = NULL;
213 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
214
215#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
216 ppc_md.progress = gen550_progress;
217#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
218#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
219 ppc_md.early_serial_map = mpc85xx_early_serial_map;
220#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
221
222 if (ppc_md.progress)
223 ppc_md.progress("mpc8540ads_init(): exit", 0);
224
225 return;
226}
diff --git a/arch/ppc/platforms/85xx/mpc8540_ads.h b/arch/ppc/platforms/85xx/mpc8540_ads.h
deleted file mode 100644
index 7559f9e6fc28..000000000000
--- a/arch/ppc/platforms/85xx/mpc8540_ads.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * MPC8540ADS board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC8540ADS_H__
16#define __MACH_MPC8540ADS_H__
17
18#include <linux/initrd.h>
19#include <syslib/ppc85xx_setup.h>
20#include <platforms/85xx/mpc85xx_ads_common.h>
21
22#endif /* __MACH_MPC8540ADS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc8555_cds.h b/arch/ppc/platforms/85xx/mpc8555_cds.h
deleted file mode 100644
index 4f79c372c4e7..000000000000
--- a/arch/ppc/platforms/85xx/mpc8555_cds.h
+++ /dev/null
@@ -1,23 +0,0 @@
1/*
2 * MPC8555CDS board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC8555CDS_H__
16#define __MACH_MPC8555CDS_H__
17
18#include <syslib/ppc85xx_setup.h>
19#include <platforms/85xx/mpc85xx_cds_common.h>
20
21#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
22
23#endif /* __MACH_MPC8555CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.c b/arch/ppc/platforms/85xx/mpc8560_ads.c
deleted file mode 100644
index 3a060468dd95..000000000000
--- a/arch/ppc/platforms/85xx/mpc8560_ads.c
+++ /dev/null
@@ -1,303 +0,0 @@
1/*
2 * MPC8560ADS board specific routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/root_dev.h>
26#include <linux/serial.h>
27#include <linux/tty.h> /* for linux/serial_core.h */
28#include <linux/serial_core.h>
29#include <linux/initrd.h>
30#include <linux/module.h>
31#include <linux/fsl_devices.h>
32#include <linux/fs_enet_pd.h>
33
34#include <asm/system.h>
35#include <asm/pgtable.h>
36#include <asm/page.h>
37#include <asm/atomic.h>
38#include <asm/time.h>
39#include <asm/io.h>
40#include <asm/machdep.h>
41#include <asm/open_pic.h>
42#include <asm/bootinfo.h>
43#include <asm/pci-bridge.h>
44#include <asm/mpc85xx.h>
45#include <asm/irq.h>
46#include <asm/immap_85xx.h>
47#include <asm/kgdb.h>
48#include <asm/ppc_sys.h>
49#include <asm/cpm2.h>
50#include <mm/mmu_decl.h>
51
52#include <syslib/cpm2_pic.h>
53#include <syslib/ppc85xx_common.h>
54#include <syslib/ppc85xx_setup.h>
55
56
57/* ************************************************************************
58 *
59 * Setup the architecture
60 *
61 */
62static void init_fcc_ioports(void)
63{
64 struct immap *immap;
65 struct io_port *io;
66 u32 tempval;
67
68 immap = cpm2_immr;
69
70 io = &immap->im_ioport;
71 /* FCC2/3 are on the ports B/C. */
72 tempval = in_be32(&io->iop_pdirb);
73 tempval &= ~PB2_DIRB0;
74 tempval |= PB2_DIRB1;
75 out_be32(&io->iop_pdirb, tempval);
76
77 tempval = in_be32(&io->iop_psorb);
78 tempval &= ~PB2_PSORB0;
79 tempval |= PB2_PSORB1;
80 out_be32(&io->iop_psorb, tempval);
81
82 tempval = in_be32(&io->iop_pparb);
83 tempval |= (PB2_DIRB0 | PB2_DIRB1);
84 out_be32(&io->iop_pparb, tempval);
85
86 tempval = in_be32(&io->iop_pdirb);
87 tempval &= ~PB3_DIRB0;
88 tempval |= PB3_DIRB1;
89 out_be32(&io->iop_pdirb, tempval);
90
91 tempval = in_be32(&io->iop_psorb);
92 tempval &= ~PB3_PSORB0;
93 tempval |= PB3_PSORB1;
94 out_be32(&io->iop_psorb, tempval);
95
96 tempval = in_be32(&io->iop_pparb);
97 tempval |= (PB3_DIRB0 | PB3_DIRB1);
98 out_be32(&io->iop_pparb, tempval);
99
100 tempval = in_be32(&io->iop_pdirc);
101 tempval |= PC3_DIRC1;
102 out_be32(&io->iop_pdirc, tempval);
103
104 tempval = in_be32(&io->iop_pparc);
105 tempval |= PC3_DIRC1;
106 out_be32(&io->iop_pparc, tempval);
107
108 /* Port C has clocks...... */
109 tempval = in_be32(&io->iop_psorc);
110 tempval &= ~(CLK_TRX);
111 out_be32(&io->iop_psorc, tempval);
112
113 tempval = in_be32(&io->iop_pdirc);
114 tempval &= ~(CLK_TRX);
115 out_be32(&io->iop_pdirc, tempval);
116 tempval = in_be32(&io->iop_pparc);
117 tempval |= (CLK_TRX);
118 out_be32(&io->iop_pparc, tempval);
119
120 /* Configure Serial Interface clock routing.
121 * First, clear all FCC bits to zero,
122 * then set the ones we want.
123 */
124 immap->im_cpmux.cmx_fcr &= ~(CPMUX_CLK_MASK);
125 immap->im_cpmux.cmx_fcr |= CPMUX_CLK_ROUTE;
126}
127
128static void __init
129mpc8560ads_setup_arch(void)
130{
131 bd_t *binfo = (bd_t *) __res;
132 unsigned int freq;
133 struct gianfar_platform_data *pdata;
134 struct gianfar_mdio_data *mdata;
135 struct fs_platform_info *fpi;
136
137 cpm2_reset();
138
139 /* get the core frequency */
140 freq = binfo->bi_intfreq;
141
142 if (ppc_md.progress)
143 ppc_md.progress("mpc8560ads_setup_arch()", 0);
144
145 /* Set loops_per_jiffy to a half-way reasonable value,
146 for use until calibrate_delay gets called. */
147 loops_per_jiffy = freq / HZ;
148
149#ifdef CONFIG_PCI
150 /* setup PCI host bridges */
151 mpc85xx_setup_hose();
152#endif
153
154 /* setup the board related info for the MDIO bus */
155 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
156
157 mdata->irq[0] = MPC85xx_IRQ_EXT5;
158 mdata->irq[1] = MPC85xx_IRQ_EXT5;
159 mdata->irq[2] = PHY_POLL;
160 mdata->irq[3] = MPC85xx_IRQ_EXT5;
161 mdata->irq[31] = PHY_POLL;
162
163 /* setup the board related information for the enet controllers */
164 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
165 if (pdata) {
166 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
167 pdata->bus_id = 0;
168 pdata->phy_id = 0;
169 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
170 }
171
172 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
173 if (pdata) {
174 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
175 pdata->bus_id = 0;
176 pdata->phy_id = 1;
177 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
178 }
179
180 init_fcc_ioports();
181 ppc_sys_device_remove(MPC85xx_CPM_FCC1);
182
183 fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC2);
184 if (fpi) {
185 memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
186 fpi->bus_id = "0:02";
187 fpi->phy_addr = 2;
188 fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
189 fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[1];
190 }
191
192 fpi = (struct fs_platform_info *) ppc_sys_get_pdata(MPC85xx_CPM_FCC3);
193 if (fpi) {
194 memcpy(fpi->macaddr, binfo->bi_enet2addr, 6);
195 fpi->macaddr[5] += 1;
196 fpi->bus_id = "0:03";
197 fpi->phy_addr = 3;
198 fpi->dpram_offset = (u32)cpm2_immr->im_dprambase;
199 fpi->fcc_regs_c = (u32)&cpm2_immr->im_fcc_c[2];
200 }
201
202#ifdef CONFIG_BLK_DEV_INITRD
203 if (initrd_start)
204 ROOT_DEV = Root_RAM0;
205 else
206#endif
207#ifdef CONFIG_ROOT_NFS
208 ROOT_DEV = Root_NFS;
209#else
210 ROOT_DEV = Root_HDA1;
211#endif
212}
213
214static irqreturn_t cpm2_cascade(int irq, void *dev_id)
215{
216 while ((irq = cpm2_get_irq()) >= 0)
217 __do_IRQ(irq);
218 return IRQ_HANDLED;
219}
220
221static struct irqaction cpm2_irqaction = {
222 .handler = cpm2_cascade,
223 .flags = IRQF_DISABLED,
224 .mask = CPU_MASK_NONE,
225 .name = "cpm2_cascade",
226};
227
228static void __init
229mpc8560_ads_init_IRQ(void)
230{
231 /* Setup OpenPIC */
232 mpc85xx_ads_init_IRQ();
233
234 /* Setup CPM2 PIC */
235 cpm2_init_IRQ();
236
237 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
238
239 return;
240}
241
242
243
244/* ************************************************************************ */
245void __init
246platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
247 unsigned long r6, unsigned long r7)
248{
249 /* parse_bootinfo must always be called first */
250 parse_bootinfo(find_bootinfo());
251
252 /*
253 * If we were passed in a board information, copy it into the
254 * residual data area.
255 */
256 if (r3) {
257 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
258 sizeof (bd_t));
259
260 }
261#if defined(CONFIG_BLK_DEV_INITRD)
262 /*
263 * If the init RAM disk has been configured in, and there's a valid
264 * starting address for it, set it up.
265 */
266 if (r4) {
267 initrd_start = r4 + KERNELBASE;
268 initrd_end = r5 + KERNELBASE;
269 }
270#endif /* CONFIG_BLK_DEV_INITRD */
271
272 /* Copy the kernel command line arguments to a safe place. */
273
274 if (r6) {
275 *(char *) (r7 + KERNELBASE) = 0;
276 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
277 }
278
279 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
280
281 /* setup the PowerPC module struct */
282 ppc_md.setup_arch = mpc8560ads_setup_arch;
283 ppc_md.show_cpuinfo = mpc85xx_ads_show_cpuinfo;
284
285 ppc_md.init_IRQ = mpc8560_ads_init_IRQ;
286 ppc_md.get_irq = openpic_get_irq;
287
288 ppc_md.restart = mpc85xx_restart;
289 ppc_md.power_off = mpc85xx_power_off;
290 ppc_md.halt = mpc85xx_halt;
291
292 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
293
294 ppc_md.time_init = NULL;
295 ppc_md.set_rtc_time = NULL;
296 ppc_md.get_rtc_time = NULL;
297 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
298
299 if (ppc_md.progress)
300 ppc_md.progress("mpc8560ads_init(): exit", 0);
301
302 return;
303}
diff --git a/arch/ppc/platforms/85xx/mpc8560_ads.h b/arch/ppc/platforms/85xx/mpc8560_ads.h
deleted file mode 100644
index 9f185ab2e019..000000000000
--- a/arch/ppc/platforms/85xx/mpc8560_ads.h
+++ /dev/null
@@ -1,24 +0,0 @@
1/*
2 * MPC8540ADS board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC8560ADS_H
16#define __MACH_MPC8560ADS_H
17
18#include <syslib/ppc85xx_setup.h>
19#include <platforms/85xx/mpc85xx_ads_common.h>
20
21#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
22#define PHY_INTERRUPT MPC85xx_IRQ_EXT7
23
24#endif /* __MACH_MPC8560ADS_H */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c b/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
deleted file mode 100644
index 674806e001f6..000000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.c
+++ /dev/null
@@ -1,198 +0,0 @@
1/*
2 * MPC85xx ADS board common routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/serial.h>
26#include <linux/module.h>
27
28#include <asm/system.h>
29#include <asm/pgtable.h>
30#include <asm/page.h>
31#include <asm/atomic.h>
32#include <asm/time.h>
33#include <asm/io.h>
34#include <asm/machdep.h>
35#include <asm/open_pic.h>
36#include <asm/bootinfo.h>
37#include <asm/pci-bridge.h>
38#include <asm/mpc85xx.h>
39#include <asm/irq.h>
40#include <asm/immap_85xx.h>
41#include <asm/ppc_sys.h>
42
43#include <mm/mmu_decl.h>
44
45#include <syslib/ppc85xx_rio.h>
46
47#include <platforms/85xx/mpc85xx_ads_common.h>
48
49#ifndef CONFIG_PCI
50unsigned long isa_io_base = 0;
51unsigned long isa_mem_base = 0;
52#endif
53
54extern unsigned long total_memory; /* in mm/init */
55
56unsigned char __res[sizeof (bd_t)];
57
58/* Internal interrupts are all Level Sensitive, and Positive Polarity */
59static u_char mpc85xx_ads_openpic_initsenses[] __initdata = {
60 MPC85XX_INTERNAL_IRQ_SENSES,
61 0x0, /* External 0: */
62#if defined(CONFIG_PCI)
63 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 1: PCI slot 0 */
64 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 1 */
65 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 2 */
66 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 3 */
67#else
68 0x0, /* External 1: */
69 0x0, /* External 2: */
70 0x0, /* External 3: */
71 0x0, /* External 4: */
72#endif
73 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
74 0x0, /* External 6: */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
76 0x0, /* External 8: */
77 0x0, /* External 9: */
78 0x0, /* External 10: */
79 0x0, /* External 11: */
80};
81
82/* ************************************************************************ */
83int
84mpc85xx_ads_show_cpuinfo(struct seq_file *m)
85{
86 uint pvid, svid, phid1;
87 uint memsize = total_memory;
88 bd_t *binfo = (bd_t *) __res;
89 unsigned int freq;
90
91 /* get the core frequency */
92 freq = binfo->bi_intfreq;
93
94 pvid = mfspr(SPRN_PVR);
95 svid = mfspr(SPRN_SVR);
96
97 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
98 seq_printf(m, "Machine\t\t: mpc%sads\n", cur_ppc_sys_spec->ppc_sys_name);
99 seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
100 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
101 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
102
103 /* Display cpu Pll setting */
104 phid1 = mfspr(SPRN_HID1);
105 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
106
107 /* Display the amount of memory */
108 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
109
110 return 0;
111}
112
113void __init
114mpc85xx_ads_init_IRQ(void)
115{
116 bd_t *binfo = (bd_t *) __res;
117 /* Determine the Physical Address of the OpenPIC regs */
118 phys_addr_t OpenPIC_PAddr =
119 binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
120 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
121 OpenPIC_InitSenses = mpc85xx_ads_openpic_initsenses;
122 OpenPIC_NumInitSenses = sizeof (mpc85xx_ads_openpic_initsenses);
123
124 /* Skip reserved space and internal sources */
125 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
126 /* Map PIC IRQs 0-11 */
127 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
128
129 /* we let openpic interrupts starting from an offset, to
130 * leave space for cascading interrupts underneath.
131 */
132 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
133
134 return;
135}
136
137#ifdef CONFIG_PCI
138/*
139 * interrupt routing
140 */
141
142int
143mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
144{
145 static char pci_irq_table[][4] =
146 /*
147 * This is little evil, but works around the fact
148 * that revA boards have IDSEL starting at 18
149 * and others boards (older) start at 12
150 *
151 * PCI IDSEL/INTPIN->INTLINE
152 * A B C D
153 */
154 {
155 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 2 */
156 {PIRQD, PIRQA, PIRQB, PIRQC},
157 {PIRQC, PIRQD, PIRQA, PIRQB},
158 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 5 */
159 {0, 0, 0, 0}, /* -- */
160 {0, 0, 0, 0}, /* -- */
161 {0, 0, 0, 0}, /* -- */
162 {0, 0, 0, 0}, /* -- */
163 {0, 0, 0, 0}, /* -- */
164 {0, 0, 0, 0}, /* -- */
165 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 12 */
166 {PIRQD, PIRQA, PIRQB, PIRQC},
167 {PIRQC, PIRQD, PIRQA, PIRQB},
168 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 15 */
169 {0, 0, 0, 0}, /* -- */
170 {0, 0, 0, 0}, /* -- */
171 {PIRQA, PIRQB, PIRQC, PIRQD}, /* IDSEL 18 */
172 {PIRQD, PIRQA, PIRQB, PIRQC},
173 {PIRQC, PIRQD, PIRQA, PIRQB},
174 {PIRQB, PIRQC, PIRQD, PIRQA}, /* IDSEL 21 */
175 };
176
177 const long min_idsel = 2, max_idsel = 21, irqs_per_slot = 4;
178 return PCI_IRQ_TABLE_LOOKUP;
179}
180
181int
182mpc85xx_exclude_device(u_char bus, u_char devfn)
183{
184 if (bus == 0 && PCI_SLOT(devfn) == 0)
185 return PCIBIOS_DEVICE_NOT_FOUND;
186 else
187 return PCIBIOS_SUCCESSFUL;
188}
189
190#endif /* CONFIG_PCI */
191
192#ifdef CONFIG_RAPIDIO
193void platform_rio_init(void)
194{
195 /* 512MB RIO LAW at 0xc0000000 */
196 mpc85xx_rio_setup(0xc0000000, 0x20000000);
197}
198#endif /* CONFIG_RAPIDIO */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h b/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
deleted file mode 100644
index c8c322fe3680..000000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_ads_common.h
+++ /dev/null
@@ -1,67 +0,0 @@
1/*
2 * MPC85XX ADS common board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC85XX_ADS_H__
16#define __MACH_MPC85XX_ADS_H__
17
18#include <linux/init.h>
19#include <asm/ppcboot.h>
20
21#define BOARD_CCSRBAR ((uint)0xe0000000)
22#define BCSR_ADDR ((uint)0xf8000000)
23#define BCSR_SIZE ((uint)(32 * 1024))
24
25struct seq_file;
26
27extern int mpc85xx_ads_show_cpuinfo(struct seq_file *m);
28extern void mpc85xx_ads_init_IRQ(void) __init;
29extern void mpc85xx_ads_map_io(void) __init;
30
31/* PCI interrupt controller */
32#define PIRQA MPC85xx_IRQ_EXT1
33#define PIRQB MPC85xx_IRQ_EXT2
34#define PIRQC MPC85xx_IRQ_EXT3
35#define PIRQD MPC85xx_IRQ_EXT4
36
37#define MPC85XX_PCI1_LOWER_IO 0x00000000
38#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
39
40#define MPC85XX_PCI1_LOWER_MEM 0x80000000
41#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
42
43#define MPC85XX_PCI1_IO_BASE 0xe2000000
44#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
45
46#define MPC85XX_PCI1_IO_SIZE 0x01000000
47
48/* FCC1 Clock Source Configuration. These can be
49 * redefined in the board specific file.
50 * Can only choose from CLK9-12 */
51#define F1_RXCLK 12
52#define F1_TXCLK 11
53
54/* FCC2 Clock Source Configuration. These can be
55 * redefined in the board specific file.
56 * Can only choose from CLK13-16 */
57#define F2_RXCLK 13
58#define F2_TXCLK 14
59
60/* FCC3 Clock Source Configuration. These can be
61 * redefined in the board specific file.
62 * Can only choose from CLK13-16 */
63#define F3_RXCLK 15
64#define F3_TXCLK 16
65
66
67#endif /* __MACH_MPC85XX_ADS_H__ */
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c b/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
deleted file mode 100644
index 2d59eb776c95..000000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.c
+++ /dev/null
@@ -1,601 +0,0 @@
1/*
2 * MPC85xx CDS board specific routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/serial.h>
26#include <linux/module.h>
27#include <linux/root_dev.h>
28#include <linux/initrd.h>
29#include <linux/tty.h>
30#include <linux/serial_core.h>
31#include <linux/fsl_devices.h>
32
33#include <asm/system.h>
34#include <asm/pgtable.h>
35#include <asm/page.h>
36#include <asm/atomic.h>
37#include <asm/time.h>
38#include <asm/todc.h>
39#include <asm/io.h>
40#include <asm/machdep.h>
41#include <asm/open_pic.h>
42#include <asm/i8259.h>
43#include <asm/bootinfo.h>
44#include <asm/pci-bridge.h>
45#include <asm/mpc85xx.h>
46#include <asm/irq.h>
47#include <asm/immap_85xx.h>
48#include <asm/cpm2.h>
49#include <asm/ppc_sys.h>
50#include <asm/kgdb.h>
51
52#include <mm/mmu_decl.h>
53#include <syslib/cpm2_pic.h>
54#include <syslib/ppc85xx_common.h>
55#include <syslib/ppc85xx_setup.h>
56
57
58#ifndef CONFIG_PCI
59unsigned long isa_io_base = 0;
60unsigned long isa_mem_base = 0;
61#endif
62
63extern unsigned long total_memory; /* in mm/init */
64
65unsigned char __res[sizeof (bd_t)];
66
67static int cds_pci_slot = 2;
68static volatile u8 * cadmus;
69
70/* Internal interrupts are all Level Sensitive, and Positive Polarity */
71static u_char mpc85xx_cds_openpic_initsenses[] __initdata = {
72 MPC85XX_INTERNAL_IRQ_SENSES,
73#if defined(CONFIG_PCI)
74 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 0: PCI1 slot */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 1: PCI1 slot */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI1 slot */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI1 slot */
78#else
79 0x0, /* External 0: */
80 0x0, /* External 1: */
81 0x0, /* External 2: */
82 0x0, /* External 3: */
83#endif
84 0x0, /* External 4: */
85 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PHY */
86 0x0, /* External 6: */
87 0x0, /* External 7: */
88 0x0, /* External 8: */
89 0x0, /* External 9: */
90 0x0, /* External 10: */
91#if defined(CONFIG_85xx_PCI2) && defined(CONFIG_PCI)
92 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 11: PCI2 slot 0 */
93#else
94 0x0, /* External 11: */
95#endif
96};
97
98/* ************************************************************************ */
99int
100mpc85xx_cds_show_cpuinfo(struct seq_file *m)
101{
102 uint pvid, svid, phid1;
103 uint memsize = total_memory;
104 bd_t *binfo = (bd_t *) __res;
105 unsigned int freq;
106
107 /* get the core frequency */
108 freq = binfo->bi_intfreq;
109
110 pvid = mfspr(SPRN_PVR);
111 svid = mfspr(SPRN_SVR);
112
113 seq_printf(m, "Vendor\t\t: Freescale Semiconductor\n");
114 seq_printf(m, "Machine\t\t: CDS - MPC%s (%x)\n", cur_ppc_sys_spec->ppc_sys_name, cadmus[CM_VER]);
115 seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
116 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
117 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
118
119 /* Display cpu Pll setting */
120 phid1 = mfspr(SPRN_HID1);
121 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
122
123 /* Display the amount of memory */
124 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
125
126 return 0;
127}
128
129#ifdef CONFIG_CPM2
130static irqreturn_t cpm2_cascade(int irq, void *dev_id)
131{
132 while((irq = cpm2_get_irq()) >= 0)
133 __do_IRQ(irq);
134 return IRQ_HANDLED;
135}
136
137static struct irqaction cpm2_irqaction = {
138 .handler = cpm2_cascade,
139 .flags = IRQF_DISABLED,
140 .mask = CPU_MASK_NONE,
141 .name = "cpm2_cascade",
142};
143#endif /* CONFIG_CPM2 */
144
145void __init
146mpc85xx_cds_init_IRQ(void)
147{
148 bd_t *binfo = (bd_t *) __res;
149 int i;
150
151 /* Determine the Physical Address of the OpenPIC regs */
152 phys_addr_t OpenPIC_PAddr = binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
153 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
154 OpenPIC_InitSenses = mpc85xx_cds_openpic_initsenses;
155 OpenPIC_NumInitSenses = sizeof (mpc85xx_cds_openpic_initsenses);
156
157 /* Skip reserved space and internal sources */
158#ifdef CONFIG_MPC8548
159 openpic_set_sources(0, 48, OpenPIC_Addr + 0x10200);
160#else
161 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
162#endif
163 /* Map PIC IRQs 0-11 */
164 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
165
166 /* we let openpic interrupts starting from an offset, to
167 * leave space for cascading interrupts underneath.
168 */
169 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
170
171#ifdef CONFIG_PCI
172 openpic_hookup_cascade(PIRQ0A, "82c59 cascade", i8259_irq);
173
174 i8259_init(0, 0);
175#endif
176
177#ifdef CONFIG_CPM2
178 /* Setup CPM2 PIC */
179 cpm2_init_IRQ();
180
181 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
182#endif
183
184 return;
185}
186
187#ifdef CONFIG_PCI
188/*
189 * interrupt routing
190 */
191int
192mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
193{
194 struct pci_controller *hose = pci_bus_to_hose(dev->bus->number);
195
196 if (!hose->index)
197 {
198 /* Handle PCI1 interrupts */
199 char pci_irq_table[][4] =
200 /*
201 * PCI IDSEL/INTPIN->INTLINE
202 * A B C D
203 */
204
205 /* Note IRQ assignment for slots is based on which slot the elysium is
206 * in -- in this setup elysium is in slot #2 (this PIRQA as first
207 * interrupt on slot */
208 {
209 { 0, 1, 2, 3 }, /* 16 - PMC */
210 { 0, 1, 2, 3 }, /* 17 P2P (Tsi320) */
211 { 0, 1, 2, 3 }, /* 18 - Slot 1 */
212 { 1, 2, 3, 0 }, /* 19 - Slot 2 */
213 { 2, 3, 0, 1 }, /* 20 - Slot 3 */
214 { 3, 0, 1, 2 }, /* 21 - Slot 4 */
215 };
216
217 const long min_idsel = 16, max_idsel = 21, irqs_per_slot = 4;
218 int i, j;
219
220 for (i = 0; i < 6; i++)
221 for (j = 0; j < 4; j++)
222 pci_irq_table[i][j] =
223 ((pci_irq_table[i][j] + 5 -
224 cds_pci_slot) & 0x3) + PIRQ0A;
225
226 return PCI_IRQ_TABLE_LOOKUP;
227 } else {
228 /* Handle PCI2 interrupts (if we have one) */
229 char pci_irq_table[][4] =
230 {
231 /*
232 * We only have one slot and one interrupt
233 * going to PIRQA - PIRQD */
234 { PIRQ1A, PIRQ1A, PIRQ1A, PIRQ1A }, /* 21 - slot 0 */
235 };
236
237 const long min_idsel = 21, max_idsel = 21, irqs_per_slot = 4;
238
239 return PCI_IRQ_TABLE_LOOKUP;
240 }
241}
242
243#define ARCADIA_HOST_BRIDGE_IDSEL 17
244#define ARCADIA_2ND_BRIDGE_IDSEL 3
245
246extern int mpc85xx_pci1_last_busno;
247
248int
249mpc85xx_exclude_device(u_char bus, u_char devfn)
250{
251 if (bus == 0 && PCI_SLOT(devfn) == 0)
252 return PCIBIOS_DEVICE_NOT_FOUND;
253#ifdef CONFIG_85xx_PCI2
254 if (mpc85xx_pci1_last_busno)
255 if (bus == (mpc85xx_pci1_last_busno + 1) && PCI_SLOT(devfn) == 0)
256 return PCIBIOS_DEVICE_NOT_FOUND;
257#endif
258 /* We explicitly do not go past the Tundra 320 Bridge */
259 if ((bus == 1) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
260 return PCIBIOS_DEVICE_NOT_FOUND;
261 if ((bus == 0) && (PCI_SLOT(devfn) == ARCADIA_2ND_BRIDGE_IDSEL))
262 return PCIBIOS_DEVICE_NOT_FOUND;
263 else
264 return PCIBIOS_SUCCESSFUL;
265}
266
267void __init
268mpc85xx_cds_enable_via(struct pci_controller *hose)
269{
270 u32 pci_class;
271 u16 vid, did;
272
273 early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
274 if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
275 return;
276
277 /* Configure P2P so that we can reach bus 1 */
278 early_write_config_byte(hose, 0, 0x88, PCI_PRIMARY_BUS, 0);
279 early_write_config_byte(hose, 0, 0x88, PCI_SECONDARY_BUS, 1);
280 early_write_config_byte(hose, 0, 0x88, PCI_SUBORDINATE_BUS, 0xff);
281
282 early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
283 early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
284
285 if ((vid != PCI_VENDOR_ID_VIA) ||
286 (did != PCI_DEVICE_ID_VIA_82C686))
287 return;
288
289 /* Enable USB and IDE functions */
290 early_write_config_byte(hose, 1, 0x10, 0x48, 0x08);
291}
292
293void __init
294mpc85xx_cds_fixup_via(struct pci_controller *hose)
295{
296 u32 pci_class;
297 u16 vid, did;
298
299 early_read_config_dword(hose, 0, 0x88, PCI_CLASS_REVISION, &pci_class);
300 if ((pci_class >> 16) != PCI_CLASS_BRIDGE_PCI)
301 return;
302
303 /*
304 * Force the backplane P2P bridge to have a window
305 * open from 0x00000000-0x00001fff in PCI I/O space.
306 * This allows legacy I/O (i8259, etc) on the VIA
307 * southbridge to be accessed.
308 */
309 early_write_config_byte(hose, 0, 0x88, PCI_IO_BASE, 0x00);
310 early_write_config_word(hose, 0, 0x88, PCI_IO_BASE_UPPER16, 0x0000);
311 early_write_config_byte(hose, 0, 0x88, PCI_IO_LIMIT, 0x10);
312 early_write_config_word(hose, 0, 0x88, PCI_IO_LIMIT_UPPER16, 0x0000);
313
314 early_read_config_word(hose, 1, 0x10, PCI_VENDOR_ID, &vid);
315 early_read_config_word(hose, 1, 0x10, PCI_DEVICE_ID, &did);
316 if ((vid != PCI_VENDOR_ID_VIA) ||
317 (did != PCI_DEVICE_ID_VIA_82C686))
318 return;
319
320 /*
321 * Since the P2P window was forced to cover the fixed
322 * legacy I/O addresses, it is necessary to manually
323 * place the base addresses for the IDE and USB functions
324 * within this window.
325 */
326 /* Function 1, IDE */
327 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_0, 0x1ff8);
328 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_1, 0x1ff4);
329 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_2, 0x1fe8);
330 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_3, 0x1fe4);
331 early_write_config_dword(hose, 1, 0x11, PCI_BASE_ADDRESS_4, 0x1fd0);
332
333 /* Function 2, USB ports 0-1 */
334 early_write_config_dword(hose, 1, 0x12, PCI_BASE_ADDRESS_4, 0x1fa0);
335
336 /* Function 3, USB ports 2-3 */
337 early_write_config_dword(hose, 1, 0x13, PCI_BASE_ADDRESS_4, 0x1f80);
338
339 /* Function 5, Power Management */
340 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_0, 0x1e00);
341 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_1, 0x1dfc);
342 early_write_config_dword(hose, 1, 0x15, PCI_BASE_ADDRESS_2, 0x1df8);
343
344 /* Function 6, AC97 Interface */
345 early_write_config_dword(hose, 1, 0x16, PCI_BASE_ADDRESS_0, 0x1c00);
346}
347
348void __init
349mpc85xx_cds_pcibios_fixup(void)
350{
351 struct pci_dev *dev;
352 u_char c;
353
354 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
355 PCI_DEVICE_ID_VIA_82C586_1, NULL))) {
356 /*
357 * U-Boot does not set the enable bits
358 * for the IDE device. Force them on here.
359 */
360 pci_read_config_byte(dev, 0x40, &c);
361 c |= 0x03; /* IDE: Chip Enable Bits */
362 pci_write_config_byte(dev, 0x40, c);
363
364 /*
365 * Since only primary interface works, force the
366 * IDE function to standard primary IDE interrupt
367 * w/ 8259 offset
368 */
369 dev->irq = 14;
370 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, dev->irq);
371 pci_dev_put(dev);
372 }
373
374 /*
375 * Force legacy USB interrupt routing
376 */
377 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
378 PCI_DEVICE_ID_VIA_82C586_2, NULL))) {
379 dev->irq = 10;
380 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 10);
381
382 if ((dev = pci_get_device(PCI_VENDOR_ID_VIA,
383 PCI_DEVICE_ID_VIA_82C586_2, dev))) {
384 dev->irq = 11;
385 pci_write_config_byte(dev, PCI_INTERRUPT_LINE, 11);
386 }
387 pci_dev_put(dev);
388 }
389}
390#endif /* CONFIG_PCI */
391
392TODC_ALLOC();
393
394/* ************************************************************************
395 *
396 * Setup the architecture
397 *
398 */
399static void __init
400mpc85xx_cds_setup_arch(void)
401{
402 bd_t *binfo = (bd_t *) __res;
403 unsigned int freq;
404 struct gianfar_platform_data *pdata;
405 struct gianfar_mdio_data *mdata;
406
407 /* get the core frequency */
408 freq = binfo->bi_intfreq;
409
410 printk("mpc85xx_cds_setup_arch\n");
411
412#ifdef CONFIG_CPM2
413 cpm2_reset();
414#endif
415
416 cadmus = ioremap(CADMUS_BASE, CADMUS_SIZE);
417 cds_pci_slot = ((cadmus[CM_CSR] >> 6) & 0x3) + 1;
418 printk("CDS Version = %x in PCI slot %d\n", cadmus[CM_VER], cds_pci_slot);
419
420 /* Setup TODC access */
421 TODC_INIT(TODC_TYPE_DS1743,
422 0,
423 0,
424 ioremap(CDS_RTC_ADDR, CDS_RTC_SIZE),
425 8);
426
427 /* Set loops_per_jiffy to a half-way reasonable value,
428 for use until calibrate_delay gets called. */
429 loops_per_jiffy = freq / HZ;
430
431#ifdef CONFIG_PCI
432 /* VIA IDE configuration */
433 ppc_md.pcibios_fixup = mpc85xx_cds_pcibios_fixup;
434
435 /* setup PCI host bridges */
436 mpc85xx_setup_hose();
437#endif
438
439#ifdef CONFIG_SERIAL_8250
440 mpc85xx_early_serial_map();
441#endif
442
443#ifdef CONFIG_SERIAL_TEXT_DEBUG
444 /* Invalidate the entry we stole earlier the serial ports
445 * should be properly mapped */
446 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
447#endif
448
449 /* setup the board related info for the MDIO bus */
450 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
451
452 mdata->irq[0] = MPC85xx_IRQ_EXT5;
453 mdata->irq[1] = MPC85xx_IRQ_EXT5;
454 mdata->irq[2] = PHY_POLL;
455 mdata->irq[3] = PHY_POLL;
456 mdata->irq[31] = PHY_POLL;
457
458 /* setup the board related information for the enet controllers */
459 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
460 if (pdata) {
461 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
462 pdata->bus_id = 0;
463 pdata->phy_id = 0;
464 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
465 }
466
467 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
468 if (pdata) {
469 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
470 pdata->bus_id = 0;
471 pdata->phy_id = 1;
472 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
473 }
474
475 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC1);
476 if (pdata) {
477 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
478 pdata->bus_id = 0;
479 pdata->phy_id = 0;
480 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
481 }
482
483 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_eTSEC2);
484 if (pdata) {
485 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
486 pdata->bus_id = 0;
487 pdata->phy_id = 1;
488 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
489 }
490
491 ppc_sys_device_remove(MPC85xx_eTSEC3);
492 ppc_sys_device_remove(MPC85xx_eTSEC4);
493
494#ifdef CONFIG_BLK_DEV_INITRD
495 if (initrd_start)
496 ROOT_DEV = Root_RAM0;
497 else
498#endif
499#ifdef CONFIG_ROOT_NFS
500 ROOT_DEV = Root_NFS;
501#else
502 ROOT_DEV = Root_HDA1;
503#endif
504}
505
506/* ************************************************************************ */
507void __init
508platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
509 unsigned long r6, unsigned long r7)
510{
511 /* parse_bootinfo must always be called first */
512 parse_bootinfo(find_bootinfo());
513
514 /*
515 * If we were passed in a board information, copy it into the
516 * residual data area.
517 */
518 if (r3) {
519 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
520 sizeof (bd_t));
521
522 }
523#ifdef CONFIG_SERIAL_TEXT_DEBUG
524 {
525 bd_t *binfo = (bd_t *) __res;
526 struct uart_port p;
527
528 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
529 settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
530 binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
531
532 memset(&p, 0, sizeof (p));
533 p.iotype = UPIO_MEM;
534 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
535 p.uartclk = binfo->bi_busfreq;
536
537 gen550_init(0, &p);
538
539 memset(&p, 0, sizeof (p));
540 p.iotype = UPIO_MEM;
541 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
542 p.uartclk = binfo->bi_busfreq;
543
544 gen550_init(1, &p);
545 }
546#endif
547
548#if defined(CONFIG_BLK_DEV_INITRD)
549 /*
550 * If the init RAM disk has been configured in, and there's a valid
551 * starting address for it, set it up.
552 */
553 if (r4) {
554 initrd_start = r4 + KERNELBASE;
555 initrd_end = r5 + KERNELBASE;
556 }
557#endif /* CONFIG_BLK_DEV_INITRD */
558
559 /* Copy the kernel command line arguments to a safe place. */
560
561 if (r6) {
562 *(char *) (r7 + KERNELBASE) = 0;
563 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
564 }
565
566 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
567
568 /* setup the PowerPC module struct */
569 ppc_md.setup_arch = mpc85xx_cds_setup_arch;
570 ppc_md.show_cpuinfo = mpc85xx_cds_show_cpuinfo;
571
572 ppc_md.init_IRQ = mpc85xx_cds_init_IRQ;
573 ppc_md.get_irq = openpic_get_irq;
574
575 ppc_md.restart = mpc85xx_restart;
576 ppc_md.power_off = mpc85xx_power_off;
577 ppc_md.halt = mpc85xx_halt;
578
579 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
580
581 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
582
583 ppc_md.time_init = todc_time_init;
584 ppc_md.set_rtc_time = todc_set_rtc_time;
585 ppc_md.get_rtc_time = todc_get_rtc_time;
586
587 ppc_md.nvram_read_val = todc_direct_read_val;
588 ppc_md.nvram_write_val = todc_direct_write_val;
589
590#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
591 ppc_md.progress = gen550_progress;
592#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
593#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
594 ppc_md.early_serial_map = mpc85xx_early_serial_map;
595#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
596
597 if (ppc_md.progress)
598 ppc_md.progress("mpc85xx_cds_init(): exit", 0);
599
600 return;
601}
diff --git a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h b/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
deleted file mode 100644
index 32c5455c8b82..000000000000
--- a/arch/ppc/platforms/85xx/mpc85xx_cds_common.h
+++ /dev/null
@@ -1,80 +0,0 @@
1/*
2 * MPC85xx CDS board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __MACH_MPC85XX_CDS_H__
16#define __MACH_MPC85XX_CDS_H__
17
18#include <linux/serial.h>
19#include <asm/ppcboot.h>
20#include <linux/initrd.h>
21#include <syslib/ppc85xx_setup.h>
22
23#define BOARD_CCSRBAR ((uint)0xe0000000)
24#define CCSRBAR_SIZE ((uint)1024*1024)
25
26/* CADMUS info */
27#define CADMUS_BASE (0xf8004000)
28#define CADMUS_SIZE (256)
29#define CM_VER (0)
30#define CM_CSR (1)
31#define CM_RST (2)
32
33/* CDS NVRAM/RTC */
34#define CDS_RTC_ADDR (0xf8000000)
35#define CDS_RTC_SIZE (8 * 1024)
36
37/* PCI config */
38#define PCI1_CFG_ADDR_OFFSET (0x8000)
39#define PCI1_CFG_DATA_OFFSET (0x8004)
40
41#define PCI2_CFG_ADDR_OFFSET (0x9000)
42#define PCI2_CFG_DATA_OFFSET (0x9004)
43
44/* PCI interrupt controller */
45#define PIRQ0A MPC85xx_IRQ_EXT0
46#define PIRQ0B MPC85xx_IRQ_EXT1
47#define PIRQ0C MPC85xx_IRQ_EXT2
48#define PIRQ0D MPC85xx_IRQ_EXT3
49#define PIRQ1A MPC85xx_IRQ_EXT11
50
51/* PCI 1 memory map */
52#define MPC85XX_PCI1_LOWER_IO 0x00000000
53#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
54
55#define MPC85XX_PCI1_LOWER_MEM 0x80000000
56#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
57
58#define MPC85XX_PCI1_IO_BASE 0xe2000000
59#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
60
61#define MPC85XX_PCI1_IO_SIZE 0x01000000
62
63/* PCI 2 memory map */
64/* Note: the standard PPC fixups will cause IO space to get bumped by
65 * hose->io_base_virt - isa_io_base => MPC85XX_PCI1_IO_SIZE */
66#define MPC85XX_PCI2_LOWER_IO 0x00000000
67#define MPC85XX_PCI2_UPPER_IO 0x00ffffff
68
69#define MPC85XX_PCI2_LOWER_MEM 0xa0000000
70#define MPC85XX_PCI2_UPPER_MEM 0xbfffffff
71
72#define MPC85XX_PCI2_IO_BASE 0xe3000000
73#define MPC85XX_PCI2_MEM_OFFSET 0x00000000
74
75#define MPC85XX_PCI2_IO_SIZE 0x01000000
76
77#define NR_8259_INTS 16
78#define CPM_IRQ_OFFSET NR_8259_INTS
79
80#endif /* __MACH_MPC85XX_CDS_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc8560.c b/arch/ppc/platforms/85xx/sbc8560.c
deleted file mode 100644
index 3d7addbdecfd..000000000000
--- a/arch/ppc/platforms/85xx/sbc8560.c
+++ /dev/null
@@ -1,234 +0,0 @@
1/*
2 * Wind River SBC8560 board specific routines
3 *
4 * Maintainer: Kumar Gala
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/stddef.h>
15#include <linux/kernel.h>
16#include <linux/init.h>
17#include <linux/errno.h>
18#include <linux/reboot.h>
19#include <linux/pci.h>
20#include <linux/kdev_t.h>
21#include <linux/major.h>
22#include <linux/console.h>
23#include <linux/delay.h>
24#include <linux/seq_file.h>
25#include <linux/root_dev.h>
26#include <linux/serial.h>
27#include <linux/tty.h> /* for linux/serial_core.h */
28#include <linux/serial_core.h>
29#include <linux/serial_8250.h>
30#include <linux/initrd.h>
31#include <linux/module.h>
32#include <linux/fsl_devices.h>
33
34#include <asm/system.h>
35#include <asm/pgtable.h>
36#include <asm/page.h>
37#include <asm/atomic.h>
38#include <asm/time.h>
39#include <asm/io.h>
40#include <asm/machdep.h>
41#include <asm/open_pic.h>
42#include <asm/bootinfo.h>
43#include <asm/pci-bridge.h>
44#include <asm/mpc85xx.h>
45#include <asm/irq.h>
46#include <asm/immap_85xx.h>
47#include <asm/kgdb.h>
48#include <asm/ppc_sys.h>
49#include <mm/mmu_decl.h>
50
51#include <syslib/ppc85xx_common.h>
52#include <syslib/ppc85xx_setup.h>
53
54#ifdef CONFIG_SERIAL_8250
55static void __init
56sbc8560_early_serial_map(void)
57{
58 struct uart_port uart_req;
59
60 /* Setup serial port access */
61 memset(&uart_req, 0, sizeof (uart_req));
62 uart_req.irq = MPC85xx_IRQ_EXT9;
63 uart_req.flags = STD_COM_FLAGS;
64 uart_req.uartclk = BASE_BAUD * 16;
65 uart_req.iotype = UPIO_MEM;
66 uart_req.mapbase = UARTA_ADDR;
67 uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART0_SIZE);
68 uart_req.type = PORT_16650;
69
70#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
71 gen550_init(0, &uart_req);
72#endif
73
74 if (early_serial_setup(&uart_req) != 0)
75 printk("Early serial init of port 0 failed\n");
76
77 /* Assume early_serial_setup() doesn't modify uart_req */
78 uart_req.line = 1;
79 uart_req.mapbase = UARTB_ADDR;
80 uart_req.membase = ioremap(uart_req.mapbase, MPC85xx_UART1_SIZE);
81 uart_req.irq = MPC85xx_IRQ_EXT10;
82
83#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
84 gen550_init(1, &uart_req);
85#endif
86
87 if (early_serial_setup(&uart_req) != 0)
88 printk("Early serial init of port 1 failed\n");
89}
90#endif
91
92/* ************************************************************************
93 *
94 * Setup the architecture
95 *
96 */
97static void __init
98sbc8560_setup_arch(void)
99{
100 bd_t *binfo = (bd_t *) __res;
101 unsigned int freq;
102 struct gianfar_platform_data *pdata;
103 struct gianfar_mdio_data *mdata;
104
105 /* get the core frequency */
106 freq = binfo->bi_intfreq;
107
108 if (ppc_md.progress)
109 ppc_md.progress("sbc8560_setup_arch()", 0);
110
111 /* Set loops_per_jiffy to a half-way reasonable value,
112 for use until calibrate_delay gets called. */
113 loops_per_jiffy = freq / HZ;
114
115#ifdef CONFIG_PCI
116 /* setup PCI host bridges */
117 mpc85xx_setup_hose();
118#endif
119#ifdef CONFIG_SERIAL_8250
120 sbc8560_early_serial_map();
121#endif
122#ifdef CONFIG_SERIAL_TEXT_DEBUG
123 /* Invalidate the entry we stole earlier the serial ports
124 * should be properly mapped */
125 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
126#endif
127
128 /* setup the board related info for the MDIO bus */
129 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
130
131 mdata->irq[25] = MPC85xx_IRQ_EXT6;
132 mdata->irq[26] = MPC85xx_IRQ_EXT7;
133 mdata->irq[31] = PHY_POLL;
134
135 /* setup the board related information for the enet controllers */
136 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
137 if (pdata) {
138 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
139 pdata->bus_id = 0;
140 pdata->phy_id = 25;
141 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
142 }
143
144 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
145 if (pdata) {
146 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
147 pdata->bus_id = 0;
148 pdata->phy_id = 26;
149 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
150 }
151
152#ifdef CONFIG_BLK_DEV_INITRD
153 if (initrd_start)
154 ROOT_DEV = Root_RAM0;
155 else
156#endif
157#ifdef CONFIG_ROOT_NFS
158 ROOT_DEV = Root_NFS;
159#else
160 ROOT_DEV = Root_HDA1;
161#endif
162}
163
164/* ************************************************************************ */
165void __init
166platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
167 unsigned long r6, unsigned long r7)
168{
169 /* parse_bootinfo must always be called first */
170 parse_bootinfo(find_bootinfo());
171
172 /*
173 * If we were passed in a board information, copy it into the
174 * residual data area.
175 */
176 if (r3) {
177 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
178 sizeof (bd_t));
179 }
180
181#ifdef CONFIG_SERIAL_TEXT_DEBUG
182 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
183 settlbcam(num_tlbcam_entries - 1, UARTA_ADDR,
184 UARTA_ADDR, 0x1000, _PAGE_IO, 0);
185#endif
186
187#if defined(CONFIG_BLK_DEV_INITRD)
188 /*
189 * If the init RAM disk has been configured in, and there's a valid
190 * starting address for it, set it up.
191 */
192 if (r4) {
193 initrd_start = r4 + KERNELBASE;
194 initrd_end = r5 + KERNELBASE;
195 }
196#endif /* CONFIG_BLK_DEV_INITRD */
197
198 /* Copy the kernel command line arguments to a safe place. */
199
200 if (r6) {
201 *(char *) (r7 + KERNELBASE) = 0;
202 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
203 }
204
205 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
206
207 /* setup the PowerPC module struct */
208 ppc_md.setup_arch = sbc8560_setup_arch;
209 ppc_md.show_cpuinfo = sbc8560_show_cpuinfo;
210
211 ppc_md.init_IRQ = sbc8560_init_IRQ;
212 ppc_md.get_irq = openpic_get_irq;
213
214 ppc_md.restart = mpc85xx_restart;
215 ppc_md.power_off = mpc85xx_power_off;
216 ppc_md.halt = mpc85xx_halt;
217
218 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
219
220 ppc_md.time_init = NULL;
221 ppc_md.set_rtc_time = NULL;
222 ppc_md.get_rtc_time = NULL;
223 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
224
225#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
226 ppc_md.progress = gen550_progress;
227#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
228#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
229 ppc_md.early_serial_map = sbc8560_early_serial_map;
230#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
231
232 if (ppc_md.progress)
233 ppc_md.progress("sbc8560_init(): exit", 0);
234}
diff --git a/arch/ppc/platforms/85xx/sbc8560.h b/arch/ppc/platforms/85xx/sbc8560.h
deleted file mode 100644
index e5e156f60100..000000000000
--- a/arch/ppc/platforms/85xx/sbc8560.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * Wind River SBC8560 board definitions
3 *
4 * Copyright 2003 Motorola Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 *
11 */
12
13#ifndef __MACH_SBC8560_H__
14#define __MACH_SBC8560_H__
15
16#include <platforms/85xx/sbc85xx.h>
17#include <asm/irq.h>
18
19#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
20
21#ifdef CONFIG_SERIAL_MANY_PORTS
22#define RS_TABLE_SIZE 64
23#else
24#define RS_TABLE_SIZE 2
25#endif
26
27/* Rate for the 1.8432 Mhz clock for the onboard serial chip */
28#define BASE_BAUD ( 1843200 / 16 )
29
30#ifdef CONFIG_SERIAL_DETECT_IRQ
31#define STD_COM_FLAGS (ASYNC_SKIP_TEST|ASYNC_AUTO_IRQ)
32#else
33#define STD_COM_FLAGS (ASYNC_SKIP_TEST)
34#endif
35
36#define STD_SERIAL_PORT_DFNS \
37 { 0, BASE_BAUD, UARTA_ADDR, MPC85xx_IRQ_EXT9, STD_COM_FLAGS, /* ttyS0 */ \
38 iomem_base: (u8 *)UARTA_ADDR, \
39 io_type: SERIAL_IO_MEM }, \
40 { 0, BASE_BAUD, UARTB_ADDR, MPC85xx_IRQ_EXT10, STD_COM_FLAGS, /* ttyS1 */ \
41 iomem_base: (u8 *)UARTB_ADDR, \
42 io_type: SERIAL_IO_MEM },
43
44#define SERIAL_PORT_DFNS \
45 STD_SERIAL_PORT_DFNS
46
47#endif /* __MACH_SBC8560_H__ */
diff --git a/arch/ppc/platforms/85xx/sbc85xx.c b/arch/ppc/platforms/85xx/sbc85xx.c
deleted file mode 100644
index 2c587ca97bce..000000000000
--- a/arch/ppc/platforms/85xx/sbc85xx.c
+++ /dev/null
@@ -1,166 +0,0 @@
1/*
2 * WindRiver PowerQUICC III SBC85xx board common routines
3 *
4 * Copyright 2002, 2003 Motorola Inc.
5 * Copyright 2004 Red Hat, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/stddef.h>
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/errno.h>
17#include <linux/reboot.h>
18#include <linux/pci.h>
19#include <linux/kdev_t.h>
20#include <linux/major.h>
21#include <linux/console.h>
22#include <linux/delay.h>
23#include <linux/seq_file.h>
24#include <linux/serial.h>
25#include <linux/module.h>
26
27#include <asm/system.h>
28#include <asm/pgtable.h>
29#include <asm/page.h>
30#include <asm/atomic.h>
31#include <asm/time.h>
32#include <asm/io.h>
33#include <asm/machdep.h>
34#include <asm/open_pic.h>
35#include <asm/bootinfo.h>
36#include <asm/pci-bridge.h>
37#include <asm/mpc85xx.h>
38#include <asm/irq.h>
39#include <asm/immap_85xx.h>
40#include <asm/ppc_sys.h>
41
42#include <mm/mmu_decl.h>
43
44#include <platforms/85xx/sbc85xx.h>
45
46unsigned char __res[sizeof (bd_t)];
47
48#ifndef CONFIG_PCI
49unsigned long isa_io_base = 0;
50unsigned long isa_mem_base = 0;
51unsigned long pci_dram_offset = 0;
52#endif
53
54extern unsigned long total_memory; /* in mm/init */
55
56/* Internal interrupts are all Level Sensitive, and Positive Polarity */
57static u_char sbc8560_openpic_initsenses[] __initdata = {
58 MPC85XX_INTERNAL_IRQ_SENSES,
59 0x0, /* External 0: */
60 0x0, /* External 1: */
61#if defined(CONFIG_PCI)
62 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 0 */
63 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 1 */
64 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 2 */
65 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 5: PCI slot 3 */
66#else
67 0x0, /* External 2: */
68 0x0, /* External 3: */
69 0x0, /* External 4: */
70 0x0, /* External 5: */
71#endif
72 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 6: PHY */
73 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 7: PHY */
74 0x0, /* External 8: */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 9: PHY */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_POSITIVE), /* External 10: PHY */
77 0x0, /* External 11: */
78};
79
80/* ************************************************************************ */
81int
82sbc8560_show_cpuinfo(struct seq_file *m)
83{
84 uint pvid, svid, phid1;
85 uint memsize = total_memory;
86 bd_t *binfo = (bd_t *) __res;
87 unsigned int freq;
88
89 /* get the core frequency */
90 freq = binfo->bi_intfreq;
91
92 pvid = mfspr(SPRN_PVR);
93 svid = mfspr(SPRN_SVR);
94
95 seq_printf(m, "Vendor\t\t: Wind River\n");
96 seq_printf(m, "Machine\t\t: SBC%s\n", cur_ppc_sys_spec->ppc_sys_name);
97 seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
98 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
99 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
100
101 /* Display cpu Pll setting */
102 phid1 = mfspr(SPRN_HID1);
103 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
104
105 /* Display the amount of memory */
106 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
107
108 return 0;
109}
110
111void __init
112sbc8560_init_IRQ(void)
113{
114 bd_t *binfo = (bd_t *) __res;
115 /* Determine the Physical Address of the OpenPIC regs */
116 phys_addr_t OpenPIC_PAddr =
117 binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
118 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
119 OpenPIC_InitSenses = sbc8560_openpic_initsenses;
120 OpenPIC_NumInitSenses = sizeof (sbc8560_openpic_initsenses);
121
122 /* Skip reserved space and internal sources */
123 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
124 /* Map PIC IRQs 0-11 */
125 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
126
127 /* we let openpic interrupts starting from an offset, to
128 * leave space for cascading interrupts underneath.
129 */
130 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
131
132 return;
133}
134
135/*
136 * interrupt routing
137 */
138
139#ifdef CONFIG_PCI
140int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
141 unsigned char pin)
142{
143 static char pci_irq_table[][4] =
144 /*
145 * PCI IDSEL/INTPIN->INTLINE
146 * A B C D
147 */
148 {
149 {PIRQA, PIRQB, PIRQC, PIRQD},
150 {PIRQD, PIRQA, PIRQB, PIRQC},
151 {PIRQC, PIRQD, PIRQA, PIRQB},
152 {PIRQB, PIRQC, PIRQD, PIRQA},
153 };
154
155 const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
156 return PCI_IRQ_TABLE_LOOKUP;
157}
158
159int mpc85xx_exclude_device(u_char bus, u_char devfn)
160{
161 if (bus == 0 && PCI_SLOT(devfn) == 0)
162 return PCIBIOS_DEVICE_NOT_FOUND;
163 else
164 return PCIBIOS_SUCCESSFUL;
165}
166#endif /* CONFIG_PCI */
diff --git a/arch/ppc/platforms/85xx/sbc85xx.h b/arch/ppc/platforms/85xx/sbc85xx.h
deleted file mode 100644
index 51df4dc04e22..000000000000
--- a/arch/ppc/platforms/85xx/sbc85xx.h
+++ /dev/null
@@ -1,70 +0,0 @@
1/*
2 * WindRiver PowerQUICC III SBC85xx common board definitions
3 *
4 * Copyright 2003 Motorola Inc.
5 * Copyright 2004 Red Hat, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#ifndef __PLATFORMS_85XX_SBC85XX_H__
15#define __PLATFORMS_85XX_SBC85XX_H__
16
17#include <linux/init.h>
18#include <linux/seq_file.h>
19#include <asm/ppcboot.h>
20
21#define BOARD_CCSRBAR ((uint)0xff700000)
22#define CCSRBAR_SIZE ((uint)1024*1024)
23
24#define BCSR_ADDR ((uint)0xfc000000)
25#define BCSR_SIZE ((uint)(16 * 1024 * 1024))
26
27#define UARTA_ADDR (BCSR_ADDR + 0x00700000)
28#define UARTB_ADDR (BCSR_ADDR + 0x00800000)
29#define RTC_DEVICE_ADDR (BCSR_ADDR + 0x00900000)
30#define EEPROM_ADDR (BCSR_ADDR + 0x00b00000)
31
32extern int sbc8560_show_cpuinfo(struct seq_file *m);
33extern void sbc8560_init_IRQ(void) __init;
34
35/* PCI interrupt controller */
36#define PIRQA MPC85xx_IRQ_EXT1
37#define PIRQB MPC85xx_IRQ_EXT2
38#define PIRQC MPC85xx_IRQ_EXT3
39#define PIRQD MPC85xx_IRQ_EXT4
40
41#define MPC85XX_PCI1_LOWER_IO 0x00000000
42#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
43
44#define MPC85XX_PCI1_LOWER_MEM 0x80000000
45#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
46
47#define MPC85XX_PCI1_IO_BASE 0xe2000000
48#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
49
50#define MPC85XX_PCI1_IO_SIZE 0x01000000
51
52/* FCC1 Clock Source Configuration. These can be
53 * redefined in the board specific file.
54 * Can only choose from CLK9-12 */
55#define F1_RXCLK 12
56#define F1_TXCLK 11
57
58/* FCC2 Clock Source Configuration. These can be
59 * redefined in the board specific file.
60 * Can only choose from CLK13-16 */
61#define F2_RXCLK 13
62#define F2_TXCLK 14
63
64/* FCC3 Clock Source Configuration. These can be
65 * redefined in the board specific file.
66 * Can only choose from CLK13-16 */
67#define F3_RXCLK 15
68#define F3_TXCLK 16
69
70#endif /* __PLATFORMS_85XX_SBC85XX_H__ */
diff --git a/arch/ppc/platforms/85xx/stx_gp3.c b/arch/ppc/platforms/85xx/stx_gp3.c
deleted file mode 100644
index b1f5b737c70d..000000000000
--- a/arch/ppc/platforms/85xx/stx_gp3.c
+++ /dev/null
@@ -1,340 +0,0 @@
1/*
2 * STx GP3 board specific routines
3 *
4 * Dan Malek <dan@embeddededge.com>
5 * Copyright 2004 Embedded Edge, LLC
6 *
7 * Copied from mpc8560_ads.c
8 * Copyright 2002, 2003 Motorola Inc.
9 *
10 * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
11 * Copyright 2004-2005 MontaVista Software, Inc.
12 *
13 * This program is free software; you can redistribute it and/or modify it
14 * under the terms of the GNU General Public License as published by the
15 * Free Software Foundation; either version 2 of the License, or (at your
16 * option) any later version.
17 */
18
19#include <linux/stddef.h>
20#include <linux/kernel.h>
21#include <linux/init.h>
22#include <linux/errno.h>
23#include <linux/reboot.h>
24#include <linux/pci.h>
25#include <linux/kdev_t.h>
26#include <linux/major.h>
27#include <linux/blkdev.h>
28#include <linux/console.h>
29#include <linux/delay.h>
30#include <linux/root_dev.h>
31#include <linux/seq_file.h>
32#include <linux/serial.h>
33#include <linux/initrd.h>
34#include <linux/module.h>
35#include <linux/fsl_devices.h>
36#include <linux/interrupt.h>
37#include <linux/rio.h>
38
39#include <asm/system.h>
40#include <asm/pgtable.h>
41#include <asm/page.h>
42#include <asm/atomic.h>
43#include <asm/time.h>
44#include <asm/io.h>
45#include <asm/machdep.h>
46#include <asm/open_pic.h>
47#include <asm/bootinfo.h>
48#include <asm/pci-bridge.h>
49#include <asm/mpc85xx.h>
50#include <asm/irq.h>
51#include <asm/immap_85xx.h>
52#include <asm/cpm2.h>
53#include <asm/mpc85xx.h>
54#include <asm/ppc_sys.h>
55
56#include <syslib/cpm2_pic.h>
57#include <syslib/ppc85xx_common.h>
58#include <syslib/ppc85xx_rio.h>
59
60
61unsigned char __res[sizeof(bd_t)];
62
63#ifndef CONFIG_PCI
64unsigned long isa_io_base = 0;
65unsigned long isa_mem_base = 0;
66unsigned long pci_dram_offset = 0;
67#endif
68
69/* Internal interrupts are all Level Sensitive, and Positive Polarity */
70static u8 gp3_openpic_initsenses[] __initdata = {
71 MPC85XX_INTERNAL_IRQ_SENSES,
72 0x0, /* External 0: */
73#if defined(CONFIG_PCI)
74 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 1: PCI slot 0 */
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI slot 1 */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI slot 2 */
77 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 4: PCI slot 3 */
78#else
79 0x0, /* External 1: */
80 0x0, /* External 2: */
81 0x0, /* External 3: */
82 0x0, /* External 4: */
83#endif
84 0x0, /* External 5: */
85 0x0, /* External 6: */
86 0x0, /* External 7: */
87 0x0, /* External 8: */
88 0x0, /* External 9: */
89 0x0, /* External 10: */
90 0x0, /* External 11: */
91};
92
93/*
94 * Setup the architecture
95 */
96static void __init
97gp3_setup_arch(void)
98{
99 bd_t *binfo = (bd_t *) __res;
100 unsigned int freq;
101 struct gianfar_platform_data *pdata;
102 struct gianfar_mdio_data *mdata;
103
104 cpm2_reset();
105
106 /* get the core frequency */
107 freq = binfo->bi_intfreq;
108
109 if (ppc_md.progress)
110 ppc_md.progress("gp3_setup_arch()", 0);
111
112 /* Set loops_per_jiffy to a half-way reasonable value,
113 for use until calibrate_delay gets called. */
114 loops_per_jiffy = freq / HZ;
115
116#ifdef CONFIG_PCI
117 /* setup PCI host bridges */
118 mpc85xx_setup_hose();
119#endif
120
121 /* setup the board related info for the MDIO bus */
122 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
123
124 mdata->irq[2] = MPC85xx_IRQ_EXT5;
125 mdata->irq[4] = MPC85xx_IRQ_EXT5;
126 mdata->irq[31] = PHY_POLL;
127
128 /* setup the board related information for the enet controllers */
129 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
130 if (pdata) {
131 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
132 pdata->bus_id = 0;
133 pdata->phy_id = 2;
134 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
135 }
136
137 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
138 if (pdata) {
139 /* pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR; */
140 pdata->bus_id = 0;
141 pdata->phy_id = 4;
142 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
143 }
144
145#ifdef CONFIG_BLK_DEV_INITRD
146 if (initrd_start)
147 ROOT_DEV = Root_RAM0;
148 else
149#endif
150#ifdef CONFIG_ROOT_NFS
151 ROOT_DEV = Root_NFS;
152#else
153 ROOT_DEV = Root_HDA1;
154#endif
155
156 printk ("bi_immr_base = %8.8lx\n", binfo->bi_immr_base);
157}
158
159static irqreturn_t cpm2_cascade(int irq, void *dev_id)
160{
161 while ((irq = cpm2_get_irq()) >= 0)
162 __do_IRQ(irq);
163
164 return IRQ_HANDLED;
165}
166
167static struct irqaction cpm2_irqaction = {
168 .handler = cpm2_cascade,
169 .flags = IRQF_DISABLED,
170 .mask = CPU_MASK_NONE,
171 .name = "cpm2_cascade",
172};
173
174static void __init
175gp3_init_IRQ(void)
176{
177 bd_t *binfo = (bd_t *) __res;
178
179 /*
180 * Setup OpenPIC
181 */
182
183 /* Determine the Physical Address of the OpenPIC regs */
184 phys_addr_t OpenPIC_PAddr =
185 binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
186 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
187 OpenPIC_InitSenses = gp3_openpic_initsenses;
188 OpenPIC_NumInitSenses = sizeof (gp3_openpic_initsenses);
189
190 /* Skip reserved space and internal sources */
191 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
192
193 /* Map PIC IRQs 0-11 */
194 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
195
196 /*
197 * Let openpic interrupts starting from an offset, to
198 * leave space for cascading interrupts underneath.
199 */
200 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
201
202 /* Setup CPM2 PIC */
203 cpm2_init_IRQ();
204
205 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
206
207 return;
208}
209
210static int
211gp3_show_cpuinfo(struct seq_file *m)
212{
213 uint pvid, svid, phid1;
214 bd_t *binfo = (bd_t *) __res;
215 uint memsize;
216 unsigned int freq;
217 extern unsigned long total_memory; /* in mm/init */
218
219 /* get the core frequency */
220 freq = binfo->bi_intfreq;
221
222 pvid = mfspr(SPRN_PVR);
223 svid = mfspr(SPRN_SVR);
224
225 memsize = total_memory;
226
227 seq_printf(m, "Vendor\t\t: RPC Electronics STx \n");
228 seq_printf(m, "Machine\t\t: GP3 - MPC%s\n", cur_ppc_sys_spec->ppc_sys_name);
229 seq_printf(m, "bus freq\t: %u.%.6u MHz\n", freq / 1000000,
230 freq % 1000000);
231 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
232 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
233
234 /* Display cpu Pll setting */
235 phid1 = mfspr(SPRN_HID1);
236 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
237
238 /* Display the amount of memory */
239 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
240
241 return 0;
242}
243
244#ifdef CONFIG_PCI
245int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel,
246 unsigned char pin)
247{
248 static char pci_irq_table[][4] =
249 /*
250 * PCI IDSEL/INTPIN->INTLINE
251 * A B C D
252 */
253 {
254 {PIRQA, PIRQB, PIRQC, PIRQD},
255 {PIRQD, PIRQA, PIRQB, PIRQC},
256 {PIRQC, PIRQD, PIRQA, PIRQB},
257 {PIRQB, PIRQC, PIRQD, PIRQA},
258 };
259
260 const long min_idsel = 12, max_idsel = 15, irqs_per_slot = 4;
261 return PCI_IRQ_TABLE_LOOKUP;
262}
263
264int mpc85xx_exclude_device(u_char bus, u_char devfn)
265{
266 if (bus == 0 && PCI_SLOT(devfn) == 0)
267 return PCIBIOS_DEVICE_NOT_FOUND;
268 else
269 return PCIBIOS_SUCCESSFUL;
270}
271#endif /* CONFIG_PCI */
272
273#ifdef CONFIG_RAPIDIO
274void
275platform_rio_init(void)
276{
277 /*
278 * The STx firmware configures the RapidIO Local Access Window
279 * at 0xc0000000 with a size of 512MB.
280 */
281 mpc85xx_rio_setup(0xc0000000, 0x20000000);
282}
283#endif /* CONFIG_RAPIDIO */
284
285void __init
286platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
287 unsigned long r6, unsigned long r7)
288{
289 /* parse_bootinfo must always be called first */
290 parse_bootinfo(find_bootinfo());
291
292 /*
293 * If we were passed in a board information, copy it into the
294 * residual data area.
295 */
296 if (r3) {
297 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
298 sizeof (bd_t));
299
300 }
301#if defined(CONFIG_BLK_DEV_INITRD)
302 /*
303 * If the init RAM disk has been configured in, and there's a valid
304 * starting address for it, set it up.
305 */
306 if (r4) {
307 initrd_start = r4 + KERNELBASE;
308 initrd_end = r5 + KERNELBASE;
309 }
310#endif /* CONFIG_BLK_DEV_INITRD */
311
312 /* Copy the kernel command line arguments to a safe place. */
313
314 if (r6) {
315 *(char *) (r7 + KERNELBASE) = 0;
316 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
317 }
318
319 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
320
321 /* setup the PowerPC module struct */
322 ppc_md.setup_arch = gp3_setup_arch;
323 ppc_md.show_cpuinfo = gp3_show_cpuinfo;
324
325 ppc_md.init_IRQ = gp3_init_IRQ;
326 ppc_md.get_irq = openpic_get_irq;
327
328 ppc_md.restart = mpc85xx_restart;
329 ppc_md.power_off = mpc85xx_power_off;
330 ppc_md.halt = mpc85xx_halt;
331
332 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
333
334 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
335
336 if (ppc_md.progress)
337 ppc_md.progress("platform_init(): exit", 0);
338
339 return;
340}
diff --git a/arch/ppc/platforms/85xx/stx_gp3.h b/arch/ppc/platforms/85xx/stx_gp3.h
deleted file mode 100644
index c6e34c09e979..000000000000
--- a/arch/ppc/platforms/85xx/stx_gp3.h
+++ /dev/null
@@ -1,69 +0,0 @@
1/*
2 * STx GP3 board definitions
3 *
4 * Dan Malek (dan@embeddededge.com)
5 * Copyright 2004 Embedded Edge, LLC
6 *
7 * Ported to 2.6, Matt Porter <mporter@kernel.crashing.org>
8 * Copyright 2004-2005 MontaVista Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 *
15 */
16
17#ifndef __MACH_STX_GP3_H
18#define __MACH_STX_GP3_H
19
20#include <linux/init.h>
21#include <asm/ppcboot.h>
22
23#define BOARD_CCSRBAR ((uint)0xe0000000)
24#define CCSRBAR_SIZE ((uint)1024*1024)
25
26#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
27
28#define BCSR_ADDR ((uint)0xfc000000)
29#define BCSR_SIZE ((uint)(16 * 1024))
30
31#define BCSR_TSEC1_RESET 0x00000080
32#define BCSR_TSEC2_RESET 0x00000040
33#define BCSR_LED1 0x00000008
34#define BCSR_LED2 0x00000004
35#define BCSR_LED3 0x00000002
36#define BCSR_LED4 0x00000001
37
38extern void mpc85xx_setup_hose(void) __init;
39extern void mpc85xx_restart(char *cmd);
40extern void mpc85xx_power_off(void);
41extern void mpc85xx_halt(void);
42extern void mpc85xx_init_IRQ(void) __init;
43extern unsigned long mpc85xx_find_end_of_memory(void) __init;
44extern void mpc85xx_calibrate_decr(void) __init;
45
46#define PCI_CFG_ADDR_OFFSET (0x8000)
47#define PCI_CFG_DATA_OFFSET (0x8004)
48
49/* PCI interrupt controller */
50#define PIRQA MPC85xx_IRQ_EXT1
51#define PIRQB MPC85xx_IRQ_EXT2
52#define PIRQC MPC85xx_IRQ_EXT3
53#define PIRQD MPC85xx_IRQ_EXT4
54#define PCI_MIN_IDSEL 16
55#define PCI_MAX_IDSEL 19
56#define PCI_IRQ_SLOT 4
57
58#define MPC85XX_PCI1_LOWER_IO 0x00000000
59#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
60
61#define MPC85XX_PCI1_LOWER_MEM 0x80000000
62#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
63
64#define MPC85XX_PCI1_IO_BASE 0xe2000000
65#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
66
67#define MPC85XX_PCI1_IO_SIZE 0x01000000
68
69#endif /* __MACH_STX_GP3_H */
diff --git a/arch/ppc/platforms/85xx/tqm85xx.c b/arch/ppc/platforms/85xx/tqm85xx.c
deleted file mode 100644
index 27ce389c1224..000000000000
--- a/arch/ppc/platforms/85xx/tqm85xx.c
+++ /dev/null
@@ -1,391 +0,0 @@
1/*
2 * TQM85xx (40/41/55/60) board specific routines
3 *
4 * Copyright (c) 2005 DENX Software Engineering
5 * Stefan Roese <sr@denx.de>
6 *
7 * Based on original work by
8 * Kumar Gala <galak@kernel.crashing.org>
9 * Copyright 2004 Freescale Semiconductor Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#include <linux/stddef.h>
18#include <linux/kernel.h>
19#include <linux/init.h>
20#include <linux/errno.h>
21#include <linux/reboot.h>
22#include <linux/pci.h>
23#include <linux/kdev_t.h>
24#include <linux/major.h>
25#include <linux/console.h>
26#include <linux/delay.h>
27#include <linux/seq_file.h>
28#include <linux/root_dev.h>
29#include <linux/serial.h>
30#include <linux/tty.h> /* for linux/serial_core.h */
31#include <linux/serial_core.h>
32#include <linux/initrd.h>
33#include <linux/module.h>
34#include <linux/fsl_devices.h>
35
36#include <asm/system.h>
37#include <asm/pgtable.h>
38#include <asm/page.h>
39#include <asm/atomic.h>
40#include <asm/time.h>
41#include <asm/io.h>
42#include <asm/machdep.h>
43#include <asm/open_pic.h>
44#include <asm/bootinfo.h>
45#include <asm/pci-bridge.h>
46#include <asm/mpc85xx.h>
47#include <asm/irq.h>
48#include <asm/immap_85xx.h>
49#include <asm/kgdb.h>
50#include <asm/ppc_sys.h>
51#include <asm/cpm2.h>
52#include <mm/mmu_decl.h>
53
54#include <syslib/ppc85xx_setup.h>
55#include <syslib/cpm2_pic.h>
56#include <syslib/ppc85xx_common.h>
57#include <syslib/ppc85xx_rio.h>
58
59#ifndef CONFIG_PCI
60unsigned long isa_io_base = 0;
61unsigned long isa_mem_base = 0;
62#endif
63
64
65extern unsigned long total_memory; /* in mm/init */
66
67unsigned char __res[sizeof (bd_t)];
68
69/* Internal interrupts are all Level Sensitive, and Positive Polarity */
70static u_char tqm85xx_openpic_initsenses[] __initdata = {
71 MPC85XX_INTERNAL_IRQ_SENSES,
72 0x0, /* External 0: */
73 0x0, /* External 1: */
74#if defined(CONFIG_PCI)
75 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 2: PCI INTA */
76 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 3: PCI INTB */
77#else
78 0x0, /* External 2: */
79 0x0, /* External 3: */
80#endif
81 0x0, /* External 4: */
82 0x0, /* External 5: */
83 0x0, /* External 6: */
84 0x0, /* External 7: */
85 (IRQ_SENSE_LEVEL | IRQ_POLARITY_NEGATIVE), /* External 8: PHY */
86 0x0, /* External 9: */
87 0x0, /* External 10: */
88 0x0, /* External 11: */
89};
90
91/* ************************************************************************
92 *
93 * Setup the architecture
94 *
95 */
96static void __init
97tqm85xx_setup_arch(void)
98{
99 bd_t *binfo = (bd_t *) __res;
100 unsigned int freq;
101 struct gianfar_platform_data *pdata;
102 struct gianfar_mdio_data *mdata;
103
104#ifdef CONFIG_MPC8560
105 cpm2_reset();
106#endif
107
108 /* get the core frequency */
109 freq = binfo->bi_intfreq;
110
111 if (ppc_md.progress)
112 ppc_md.progress("tqm85xx_setup_arch()", 0);
113
114 /* Set loops_per_jiffy to a half-way reasonable value,
115 for use until calibrate_delay gets called. */
116 loops_per_jiffy = freq / HZ;
117
118#ifdef CONFIG_PCI
119 /* setup PCI host bridges */
120 mpc85xx_setup_hose();
121#endif
122
123#ifndef CONFIG_MPC8560
124#if defined(CONFIG_SERIAL_8250)
125 mpc85xx_early_serial_map();
126#endif
127
128#ifdef CONFIG_SERIAL_TEXT_DEBUG
129 /* Invalidate the entry we stole earlier the serial ports
130 * should be properly mapped */
131 invalidate_tlbcam_entry(num_tlbcam_entries - 1);
132#endif
133#endif /* CONFIG_MPC8560 */
134
135 /* setup the board related info for the MDIO bus */
136 mdata = (struct gianfar_mdio_data *) ppc_sys_get_pdata(MPC85xx_MDIO);
137
138 mdata->irq[0] = MPC85xx_IRQ_EXT8;
139 mdata->irq[1] = MPC85xx_IRQ_EXT8;
140 mdata->irq[2] = PHY_POLL;
141 mdata->irq[3] = MPC85xx_IRQ_EXT8;
142 mdata->irq[31] = PHY_POLL;
143
144 /* setup the board related information for the enet controllers */
145 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC1);
146 if (pdata) {
147 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
148 pdata->bus_id = 0;
149 pdata->phy_id = 2;
150 memcpy(pdata->mac_addr, binfo->bi_enetaddr, 6);
151 }
152
153 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_TSEC2);
154 if (pdata) {
155 pdata->board_flags = FSL_GIANFAR_BRD_HAS_PHY_INTR;
156 pdata->bus_id = 0;
157 pdata->phy_id = 1;
158 memcpy(pdata->mac_addr, binfo->bi_enet1addr, 6);
159 }
160
161#ifdef CONFIG_MPC8540
162 pdata = (struct gianfar_platform_data *) ppc_sys_get_pdata(MPC85xx_FEC);
163 if (pdata) {
164 pdata->board_flags = 0;
165 pdata->bus_id = 0;
166 pdata->phy_id = 3;
167 memcpy(pdata->mac_addr, binfo->bi_enet2addr, 6);
168 }
169#endif
170
171#ifdef CONFIG_BLK_DEV_INITRD
172 if (initrd_start)
173 ROOT_DEV = Root_RAM0;
174 else
175#endif
176#ifdef CONFIG_ROOT_NFS
177 ROOT_DEV = Root_NFS;
178#else
179 ROOT_DEV = Root_HDA1;
180#endif
181}
182
183#ifdef CONFIG_MPC8560
184static irqreturn_t cpm2_cascade(int irq, void *dev_id)
185{
186 while ((irq = cpm2_get_irq()) >= 0)
187 __do_IRQ(irq);
188 return IRQ_HANDLED;
189}
190
191static struct irqaction cpm2_irqaction = {
192 .handler = cpm2_cascade,
193 .flags = IRQF_DISABLED,
194 .mask = CPU_MASK_NONE,
195 .name = "cpm2_cascade",
196};
197#endif /* CONFIG_MPC8560 */
198
199void __init
200tqm85xx_init_IRQ(void)
201{
202 bd_t *binfo = (bd_t *) __res;
203
204 /* Determine the Physical Address of the OpenPIC regs */
205 phys_addr_t OpenPIC_PAddr =
206 binfo->bi_immr_base + MPC85xx_OPENPIC_OFFSET;
207 OpenPIC_Addr = ioremap(OpenPIC_PAddr, MPC85xx_OPENPIC_SIZE);
208 OpenPIC_InitSenses = tqm85xx_openpic_initsenses;
209 OpenPIC_NumInitSenses = sizeof (tqm85xx_openpic_initsenses);
210
211 /* Skip reserved space and internal sources */
212 openpic_set_sources(0, 32, OpenPIC_Addr + 0x10200);
213
214 /* Map PIC IRQs 0-11 */
215 openpic_set_sources(48, 12, OpenPIC_Addr + 0x10000);
216
217 /* we let openpic interrupts starting from an offset, to
218 * leave space for cascading interrupts underneath.
219 */
220 openpic_init(MPC85xx_OPENPIC_IRQ_OFFSET);
221
222#ifdef CONFIG_MPC8560
223 /* Setup CPM2 PIC */
224 cpm2_init_IRQ();
225
226 setup_irq(MPC85xx_IRQ_CPM, &cpm2_irqaction);
227#endif /* CONFIG_MPC8560 */
228
229 return;
230}
231
232int tqm85xx_show_cpuinfo(struct seq_file *m)
233{
234 uint pvid, svid, phid1;
235 uint memsize = total_memory;
236 bd_t *binfo = (bd_t *) __res;
237 unsigned int freq;
238
239 /* get the core frequency */
240 freq = binfo->bi_intfreq;
241
242 pvid = mfspr(SPRN_PVR);
243 svid = mfspr(SPRN_SVR);
244
245 seq_printf(m, "Vendor\t\t: TQ Components\n");
246 seq_printf(m, "Machine\t\t: TQM%s\n", cur_ppc_sys_spec->ppc_sys_name);
247 seq_printf(m, "clock\t\t: %dMHz\n", freq / 1000000);
248 seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
249 seq_printf(m, "SVR\t\t: 0x%x\n", svid);
250
251 /* Display cpu Pll setting */
252 phid1 = mfspr(SPRN_HID1);
253 seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
254
255 /* Display the amount of memory */
256 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
257
258 return 0;
259}
260
261#ifdef CONFIG_PCI
262/*
263 * interrupt routing
264 */
265int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
266{
267 static char pci_irq_table[][4] =
268 /*
269 * PCI IDSEL/INTPIN->INTLINE
270 * A B C D
271 */
272 {
273 {PIRQA, PIRQB, 0, 0},
274 };
275
276 const long min_idsel = 0x1c, max_idsel = 0x1c, irqs_per_slot = 4;
277 return PCI_IRQ_TABLE_LOOKUP;
278}
279
280int mpc85xx_exclude_device(u_char bus, u_char devfn)
281{
282 if (bus == 0 && PCI_SLOT(devfn) == 0)
283 return PCIBIOS_DEVICE_NOT_FOUND;
284 else
285 return PCIBIOS_SUCCESSFUL;
286}
287
288#endif /* CONFIG_PCI */
289
290#ifdef CONFIG_RAPIDIO
291void platform_rio_init(void)
292{
293 /* 512MB RIO LAW at 0xc0000000 */
294 mpc85xx_rio_setup(0xc0000000, 0x20000000);
295}
296#endif /* CONFIG_RAPIDIO */
297
298/* ************************************************************************ */
299void __init
300platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
301 unsigned long r6, unsigned long r7)
302{
303 /* parse_bootinfo must always be called first */
304 parse_bootinfo(find_bootinfo());
305
306 /*
307 * If we were passed in a board information, copy it into the
308 * residual data area.
309 */
310 if (r3) {
311 memcpy((void *) __res, (void *) (r3 + KERNELBASE),
312 sizeof (bd_t));
313 }
314
315#if defined(CONFIG_SERIAL_TEXT_DEBUG) && !defined(CONFIG_MPC8560)
316 {
317 bd_t *binfo = (bd_t *) __res;
318 struct uart_port p;
319
320 /* Use the last TLB entry to map CCSRBAR to allow access to DUART regs */
321 settlbcam(num_tlbcam_entries - 1, binfo->bi_immr_base,
322 binfo->bi_immr_base, MPC85xx_CCSRBAR_SIZE, _PAGE_IO, 0);
323
324 memset(&p, 0, sizeof (p));
325 p.iotype = UPIO_MEM;
326 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART0_OFFSET;
327 p.uartclk = binfo->bi_busfreq;
328
329 gen550_init(0, &p);
330
331 memset(&p, 0, sizeof (p));
332 p.iotype = UPIO_MEM;
333 p.membase = (void *) binfo->bi_immr_base + MPC85xx_UART1_OFFSET;
334 p.uartclk = binfo->bi_busfreq;
335
336 gen550_init(1, &p);
337 }
338#endif
339
340#if defined(CONFIG_BLK_DEV_INITRD)
341 /*
342 * If the init RAM disk has been configured in, and there's a valid
343 * starting address for it, set it up.
344 */
345 if (r4) {
346 initrd_start = r4 + KERNELBASE;
347 initrd_end = r5 + KERNELBASE;
348 }
349#endif /* CONFIG_BLK_DEV_INITRD */
350
351 /* Copy the kernel command line arguments to a safe place. */
352
353 if (r6) {
354 *(char *) (r7 + KERNELBASE) = 0;
355 strcpy(cmd_line, (char *) (r6 + KERNELBASE));
356 }
357
358 identify_ppc_sys_by_id(mfspr(SPRN_SVR));
359
360 /* setup the PowerPC module struct */
361 ppc_md.setup_arch = tqm85xx_setup_arch;
362 ppc_md.show_cpuinfo = tqm85xx_show_cpuinfo;
363
364 ppc_md.init_IRQ = tqm85xx_init_IRQ;
365 ppc_md.get_irq = openpic_get_irq;
366
367 ppc_md.restart = mpc85xx_restart;
368 ppc_md.power_off = mpc85xx_power_off;
369 ppc_md.halt = mpc85xx_halt;
370
371 ppc_md.find_end_of_memory = mpc85xx_find_end_of_memory;
372
373 ppc_md.time_init = NULL;
374 ppc_md.set_rtc_time = NULL;
375 ppc_md.get_rtc_time = NULL;
376 ppc_md.calibrate_decr = mpc85xx_calibrate_decr;
377
378#ifndef CONFIG_MPC8560
379#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_SERIAL_TEXT_DEBUG)
380 ppc_md.progress = gen550_progress;
381#endif /* CONFIG_SERIAL_8250 && CONFIG_SERIAL_TEXT_DEBUG */
382#if defined(CONFIG_SERIAL_8250) && defined(CONFIG_KGDB)
383 ppc_md.early_serial_map = mpc85xx_early_serial_map;
384#endif /* CONFIG_SERIAL_8250 && CONFIG_KGDB */
385#endif /* CONFIG_MPC8560 */
386
387 if (ppc_md.progress)
388 ppc_md.progress("tqm85xx_init(): exit", 0);
389
390 return;
391}
diff --git a/arch/ppc/platforms/85xx/tqm85xx.h b/arch/ppc/platforms/85xx/tqm85xx.h
deleted file mode 100644
index 57284e68f676..000000000000
--- a/arch/ppc/platforms/85xx/tqm85xx.h
+++ /dev/null
@@ -1,53 +0,0 @@
1/*
2 * TQM85xx (40/41/55/60) board definitions
3 *
4 * Copyright (c) 2005 DENX Software Engineering
5 * Stefan Roese <sr@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 *
12 */
13
14#ifndef __MACH_TQM85XX_H
15#define __MACH_TQM85XX_H
16
17#include <linux/init.h>
18#include <asm/ppcboot.h>
19
20#define BOARD_CCSRBAR ((uint)0xe0000000)
21#define CCSRBAR_SIZE ((uint)1024*1024)
22
23#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
24
25#define PCI_CFG_ADDR_OFFSET (0x8000)
26#define PCI_CFG_DATA_OFFSET (0x8004)
27
28/* PCI interrupt controller */
29#define PIRQA MPC85xx_IRQ_EXT2
30#define PIRQB MPC85xx_IRQ_EXT3
31
32#define MPC85XX_PCI1_LOWER_IO 0x00000000
33#define MPC85XX_PCI1_UPPER_IO 0x00ffffff
34
35#define MPC85XX_PCI1_LOWER_MEM 0x80000000
36#define MPC85XX_PCI1_UPPER_MEM 0x9fffffff
37
38#define MPC85XX_PCI1_IO_BASE 0xe2000000
39#define MPC85XX_PCI1_MEM_OFFSET 0x00000000
40
41#define MPC85XX_PCI1_IO_SIZE 0x01000000
42
43#define BASE_BAUD 115200
44
45extern void mpc85xx_setup_hose(void) __init;
46extern void mpc85xx_restart(char *cmd);
47extern void mpc85xx_power_off(void);
48extern void mpc85xx_halt(void);
49extern void mpc85xx_init_IRQ(void) __init;
50extern unsigned long mpc85xx_find_end_of_memory(void) __init;
51extern void mpc85xx_calibrate_decr(void) __init;
52
53#endif /* __MACH_TQM85XX_H */
diff --git a/arch/ppc/platforms/ev64260.c b/arch/ppc/platforms/ev64260.c
index 976270d537c1..c1f77e1d368e 100644
--- a/arch/ppc/platforms/ev64260.c
+++ b/arch/ppc/platforms/ev64260.c
@@ -336,7 +336,7 @@ ev64260_early_serial_map(void)
336#endif 336#endif
337 337
338 if (early_serial_setup(&port) != 0) 338 if (early_serial_setup(&port) != 0)
339 printk(KERN_WARNING "Early serial init of port 0" 339 printk(KERN_WARNING "Early serial init of port 0 "
340 "failed\n"); 340 "failed\n");
341 341
342 first_time = 0; 342 first_time = 0;
@@ -388,7 +388,7 @@ ev64260_setup_arch(void)
388 ev64260_early_serial_map(); 388 ev64260_early_serial_map();
389#endif 389#endif
390 390
391 printk(KERN_INFO "%s %s port (C) 2001 MontaVista Software, Inc." 391 printk(KERN_INFO "%s %s port (C) 2001 MontaVista Software, Inc. "
392 "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE); 392 "(source@mvista.com)\n", BOARD_VENDOR, BOARD_MACHINE);
393 393
394 if (ppc_md.progress) 394 if (ppc_md.progress)
diff --git a/arch/ppc/platforms/mpc866ads_setup.c b/arch/ppc/platforms/mpc866ads_setup.c
index bf72204125c5..62370f4a5a0f 100644
--- a/arch/ppc/platforms/mpc866ads_setup.c
+++ b/arch/ppc/platforms/mpc866ads_setup.c
@@ -32,7 +32,7 @@
32#include <asm/time.h> 32#include <asm/time.h>
33#include <asm/ppcboot.h> 33#include <asm/ppcboot.h>
34#include <asm/8xx_immap.h> 34#include <asm/8xx_immap.h>
35#include <asm/commproc.h> 35#include <asm/cpm1.h>
36#include <asm/ppc_sys.h> 36#include <asm/ppc_sys.h>
37#include <asm/mpc8xx.h> 37#include <asm/mpc8xx.h>
38 38
diff --git a/arch/ppc/platforms/mpc885ads_setup.c b/arch/ppc/platforms/mpc885ads_setup.c
index 87deaefd6c5b..ba06cc08cdab 100644
--- a/arch/ppc/platforms/mpc885ads_setup.c
+++ b/arch/ppc/platforms/mpc885ads_setup.c
@@ -31,7 +31,7 @@
31#include <asm/time.h> 31#include <asm/time.h>
32#include <asm/ppcboot.h> 32#include <asm/ppcboot.h>
33#include <asm/8xx_immap.h> 33#include <asm/8xx_immap.h>
34#include <asm/commproc.h> 34#include <asm/cpm1.h>
35#include <asm/ppc_sys.h> 35#include <asm/ppc_sys.h>
36 36
37extern unsigned char __res[]; 37extern unsigned char __res[];
diff --git a/arch/ppc/platforms/prep_pci.c b/arch/ppc/platforms/prep_pci.c
index 1df3150f016e..8ed433e2a5c7 100644
--- a/arch/ppc/platforms/prep_pci.c
+++ b/arch/ppc/platforms/prep_pci.c
@@ -1099,7 +1099,6 @@ prep_pib_init(void)
1099 pci_write_config_byte(dev, 0x43, reg); 1099 pci_write_config_byte(dev, 0x43, reg);
1100 } 1100 }
1101 } 1101 }
1102 pci_dev_put(dev);
1103 } 1102 }
1104 1103
1105 if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND, 1104 if ((dev = pci_get_device(PCI_VENDOR_ID_WINBOND,
diff --git a/arch/ppc/syslib/Makefile b/arch/ppc/syslib/Makefile
index 543795be58c8..52ddebe6c6d1 100644
--- a/arch/ppc/syslib/Makefile
+++ b/arch/ppc/syslib/Makefile
@@ -87,20 +87,6 @@ endif
87obj-$(CONFIG_BOOTX_TEXT) += btext.o 87obj-$(CONFIG_BOOTX_TEXT) += btext.o
88obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o 88obj-$(CONFIG_MPC10X_BRIDGE) += mpc10x_common.o ppc_sys.o
89obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o 89obj-$(CONFIG_MPC10X_OPENPIC) += open_pic.o
90obj-$(CONFIG_85xx) += open_pic.o ppc85xx_common.o ppc85xx_setup.o \
91 ppc_sys.o mpc85xx_sys.o \
92 mpc85xx_devices.o
93ifeq ($(CONFIG_85xx),y)
94obj-$(CONFIG_PCI) += pci_auto.o
95endif
96obj-$(CONFIG_RAPIDIO) += ppc85xx_rio.o
97obj-$(CONFIG_83xx) += ppc83xx_setup.o ppc_sys.o \
98 mpc83xx_sys.o mpc83xx_devices.o ipic.o
99ifeq ($(CONFIG_83xx),y)
100obj-$(CONFIG_PCI) += pci_auto.o
101endif
102obj-$(CONFIG_MPC8548_CDS) += todc_time.o
103obj-$(CONFIG_MPC8555_CDS) += todc_time.o
104obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \ 90obj-$(CONFIG_PPC_MPC52xx) += mpc52xx_setup.o mpc52xx_pic.o \
105 mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o 91 mpc52xx_sys.o mpc52xx_devices.o ppc_sys.o
106ifeq ($(CONFIG_PPC_MPC52xx),y) 92ifeq ($(CONFIG_PPC_MPC52xx),y)
diff --git a/arch/ppc/syslib/gt64260_pic.c b/arch/ppc/syslib/gt64260_pic.c
index e84d432c0657..3b4fcca5d1e1 100644
--- a/arch/ppc/syslib/gt64260_pic.c
+++ b/arch/ppc/syslib/gt64260_pic.c
@@ -35,7 +35,6 @@
35#include <linux/interrupt.h> 35#include <linux/interrupt.h>
36#include <linux/sched.h> 36#include <linux/sched.h>
37#include <linux/signal.h> 37#include <linux/signal.h>
38#include <linux/stddef.h>
39#include <linux/delay.h> 38#include <linux/delay.h>
40#include <linux/irq.h> 39#include <linux/irq.h>
41 40
diff --git a/arch/ppc/syslib/ipic.c b/arch/ppc/syslib/ipic.c
deleted file mode 100644
index 4f163e20939e..000000000000
--- a/arch/ppc/syslib/ipic.c
+++ /dev/null
@@ -1,646 +0,0 @@
1/*
2 * arch/ppc/syslib/ipic.c
3 *
4 * IPIC routines implementations.
5 *
6 * Copyright 2005 Freescale Semiconductor, Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#include <linux/kernel.h>
14#include <linux/init.h>
15#include <linux/errno.h>
16#include <linux/reboot.h>
17#include <linux/slab.h>
18#include <linux/stddef.h>
19#include <linux/sched.h>
20#include <linux/signal.h>
21#include <linux/sysdev.h>
22#include <asm/irq.h>
23#include <asm/io.h>
24#include <asm/ipic.h>
25#include <asm/mpc83xx.h>
26
27#include "ipic.h"
28
29static struct ipic p_ipic;
30static struct ipic * primary_ipic;
31
32static struct ipic_info ipic_info[] = {
33 [9] = {
34 .pend = IPIC_SIPNR_H,
35 .mask = IPIC_SIMSR_H,
36 .prio = IPIC_SIPRR_D,
37 .force = IPIC_SIFCR_H,
38 .bit = 24,
39 .prio_mask = 0,
40 },
41 [10] = {
42 .pend = IPIC_SIPNR_H,
43 .mask = IPIC_SIMSR_H,
44 .prio = IPIC_SIPRR_D,
45 .force = IPIC_SIFCR_H,
46 .bit = 25,
47 .prio_mask = 1,
48 },
49 [11] = {
50 .pend = IPIC_SIPNR_H,
51 .mask = IPIC_SIMSR_H,
52 .prio = IPIC_SIPRR_D,
53 .force = IPIC_SIFCR_H,
54 .bit = 26,
55 .prio_mask = 2,
56 },
57 [14] = {
58 .pend = IPIC_SIPNR_H,
59 .mask = IPIC_SIMSR_H,
60 .prio = IPIC_SIPRR_D,
61 .force = IPIC_SIFCR_H,
62 .bit = 29,
63 .prio_mask = 5,
64 },
65 [15] = {
66 .pend = IPIC_SIPNR_H,
67 .mask = IPIC_SIMSR_H,
68 .prio = IPIC_SIPRR_D,
69 .force = IPIC_SIFCR_H,
70 .bit = 30,
71 .prio_mask = 6,
72 },
73 [16] = {
74 .pend = IPIC_SIPNR_H,
75 .mask = IPIC_SIMSR_H,
76 .prio = IPIC_SIPRR_D,
77 .force = IPIC_SIFCR_H,
78 .bit = 31,
79 .prio_mask = 7,
80 },
81 [17] = {
82 .pend = IPIC_SEPNR,
83 .mask = IPIC_SEMSR,
84 .prio = IPIC_SMPRR_A,
85 .force = IPIC_SEFCR,
86 .bit = 1,
87 .prio_mask = 5,
88 },
89 [18] = {
90 .pend = IPIC_SEPNR,
91 .mask = IPIC_SEMSR,
92 .prio = IPIC_SMPRR_A,
93 .force = IPIC_SEFCR,
94 .bit = 2,
95 .prio_mask = 6,
96 },
97 [19] = {
98 .pend = IPIC_SEPNR,
99 .mask = IPIC_SEMSR,
100 .prio = IPIC_SMPRR_A,
101 .force = IPIC_SEFCR,
102 .bit = 3,
103 .prio_mask = 7,
104 },
105 [20] = {
106 .pend = IPIC_SEPNR,
107 .mask = IPIC_SEMSR,
108 .prio = IPIC_SMPRR_B,
109 .force = IPIC_SEFCR,
110 .bit = 4,
111 .prio_mask = 4,
112 },
113 [21] = {
114 .pend = IPIC_SEPNR,
115 .mask = IPIC_SEMSR,
116 .prio = IPIC_SMPRR_B,
117 .force = IPIC_SEFCR,
118 .bit = 5,
119 .prio_mask = 5,
120 },
121 [22] = {
122 .pend = IPIC_SEPNR,
123 .mask = IPIC_SEMSR,
124 .prio = IPIC_SMPRR_B,
125 .force = IPIC_SEFCR,
126 .bit = 6,
127 .prio_mask = 6,
128 },
129 [23] = {
130 .pend = IPIC_SEPNR,
131 .mask = IPIC_SEMSR,
132 .prio = IPIC_SMPRR_B,
133 .force = IPIC_SEFCR,
134 .bit = 7,
135 .prio_mask = 7,
136 },
137 [32] = {
138 .pend = IPIC_SIPNR_H,
139 .mask = IPIC_SIMSR_H,
140 .prio = IPIC_SIPRR_A,
141 .force = IPIC_SIFCR_H,
142 .bit = 0,
143 .prio_mask = 0,
144 },
145 [33] = {
146 .pend = IPIC_SIPNR_H,
147 .mask = IPIC_SIMSR_H,
148 .prio = IPIC_SIPRR_A,
149 .force = IPIC_SIFCR_H,
150 .bit = 1,
151 .prio_mask = 1,
152 },
153 [34] = {
154 .pend = IPIC_SIPNR_H,
155 .mask = IPIC_SIMSR_H,
156 .prio = IPIC_SIPRR_A,
157 .force = IPIC_SIFCR_H,
158 .bit = 2,
159 .prio_mask = 2,
160 },
161 [35] = {
162 .pend = IPIC_SIPNR_H,
163 .mask = IPIC_SIMSR_H,
164 .prio = IPIC_SIPRR_A,
165 .force = IPIC_SIFCR_H,
166 .bit = 3,
167 .prio_mask = 3,
168 },
169 [36] = {
170 .pend = IPIC_SIPNR_H,
171 .mask = IPIC_SIMSR_H,
172 .prio = IPIC_SIPRR_A,
173 .force = IPIC_SIFCR_H,
174 .bit = 4,
175 .prio_mask = 4,
176 },
177 [37] = {
178 .pend = IPIC_SIPNR_H,
179 .mask = IPIC_SIMSR_H,
180 .prio = IPIC_SIPRR_A,
181 .force = IPIC_SIFCR_H,
182 .bit = 5,
183 .prio_mask = 5,
184 },
185 [38] = {
186 .pend = IPIC_SIPNR_H,
187 .mask = IPIC_SIMSR_H,
188 .prio = IPIC_SIPRR_A,
189 .force = IPIC_SIFCR_H,
190 .bit = 6,
191 .prio_mask = 6,
192 },
193 [39] = {
194 .pend = IPIC_SIPNR_H,
195 .mask = IPIC_SIMSR_H,
196 .prio = IPIC_SIPRR_A,
197 .force = IPIC_SIFCR_H,
198 .bit = 7,
199 .prio_mask = 7,
200 },
201 [48] = {
202 .pend = IPIC_SEPNR,
203 .mask = IPIC_SEMSR,
204 .prio = IPIC_SMPRR_A,
205 .force = IPIC_SEFCR,
206 .bit = 0,
207 .prio_mask = 4,
208 },
209 [64] = {
210 .pend = IPIC_SIPNR_H,
211 .mask = IPIC_SIMSR_L,
212 .prio = IPIC_SMPRR_A,
213 .force = IPIC_SIFCR_L,
214 .bit = 0,
215 .prio_mask = 0,
216 },
217 [65] = {
218 .pend = IPIC_SIPNR_H,
219 .mask = IPIC_SIMSR_L,
220 .prio = IPIC_SMPRR_A,
221 .force = IPIC_SIFCR_L,
222 .bit = 1,
223 .prio_mask = 1,
224 },
225 [66] = {
226 .pend = IPIC_SIPNR_H,
227 .mask = IPIC_SIMSR_L,
228 .prio = IPIC_SMPRR_A,
229 .force = IPIC_SIFCR_L,
230 .bit = 2,
231 .prio_mask = 2,
232 },
233 [67] = {
234 .pend = IPIC_SIPNR_H,
235 .mask = IPIC_SIMSR_L,
236 .prio = IPIC_SMPRR_A,
237 .force = IPIC_SIFCR_L,
238 .bit = 3,
239 .prio_mask = 3,
240 },
241 [68] = {
242 .pend = IPIC_SIPNR_H,
243 .mask = IPIC_SIMSR_L,
244 .prio = IPIC_SMPRR_B,
245 .force = IPIC_SIFCR_L,
246 .bit = 4,
247 .prio_mask = 0,
248 },
249 [69] = {
250 .pend = IPIC_SIPNR_H,
251 .mask = IPIC_SIMSR_L,
252 .prio = IPIC_SMPRR_B,
253 .force = IPIC_SIFCR_L,
254 .bit = 5,
255 .prio_mask = 1,
256 },
257 [70] = {
258 .pend = IPIC_SIPNR_H,
259 .mask = IPIC_SIMSR_L,
260 .prio = IPIC_SMPRR_B,
261 .force = IPIC_SIFCR_L,
262 .bit = 6,
263 .prio_mask = 2,
264 },
265 [71] = {
266 .pend = IPIC_SIPNR_H,
267 .mask = IPIC_SIMSR_L,
268 .prio = IPIC_SMPRR_B,
269 .force = IPIC_SIFCR_L,
270 .bit = 7,
271 .prio_mask = 3,
272 },
273 [72] = {
274 .pend = IPIC_SIPNR_H,
275 .mask = IPIC_SIMSR_L,
276 .prio = 0,
277 .force = IPIC_SIFCR_L,
278 .bit = 8,
279 },
280 [73] = {
281 .pend = IPIC_SIPNR_H,
282 .mask = IPIC_SIMSR_L,
283 .prio = 0,
284 .force = IPIC_SIFCR_L,
285 .bit = 9,
286 },
287 [74] = {
288 .pend = IPIC_SIPNR_H,
289 .mask = IPIC_SIMSR_L,
290 .prio = 0,
291 .force = IPIC_SIFCR_L,
292 .bit = 10,
293 },
294 [75] = {
295 .pend = IPIC_SIPNR_H,
296 .mask = IPIC_SIMSR_L,
297 .prio = 0,
298 .force = IPIC_SIFCR_L,
299 .bit = 11,
300 },
301 [76] = {
302 .pend = IPIC_SIPNR_H,
303 .mask = IPIC_SIMSR_L,
304 .prio = 0,
305 .force = IPIC_SIFCR_L,
306 .bit = 12,
307 },
308 [77] = {
309 .pend = IPIC_SIPNR_H,
310 .mask = IPIC_SIMSR_L,
311 .prio = 0,
312 .force = IPIC_SIFCR_L,
313 .bit = 13,
314 },
315 [78] = {
316 .pend = IPIC_SIPNR_H,
317 .mask = IPIC_SIMSR_L,
318 .prio = 0,
319 .force = IPIC_SIFCR_L,
320 .bit = 14,
321 },
322 [79] = {
323 .pend = IPIC_SIPNR_H,
324 .mask = IPIC_SIMSR_L,
325 .prio = 0,
326 .force = IPIC_SIFCR_L,
327 .bit = 15,
328 },
329 [80] = {
330 .pend = IPIC_SIPNR_H,
331 .mask = IPIC_SIMSR_L,
332 .prio = 0,
333 .force = IPIC_SIFCR_L,
334 .bit = 16,
335 },
336 [84] = {
337 .pend = IPIC_SIPNR_H,
338 .mask = IPIC_SIMSR_L,
339 .prio = 0,
340 .force = IPIC_SIFCR_L,
341 .bit = 20,
342 },
343 [85] = {
344 .pend = IPIC_SIPNR_H,
345 .mask = IPIC_SIMSR_L,
346 .prio = 0,
347 .force = IPIC_SIFCR_L,
348 .bit = 21,
349 },
350 [90] = {
351 .pend = IPIC_SIPNR_H,
352 .mask = IPIC_SIMSR_L,
353 .prio = 0,
354 .force = IPIC_SIFCR_L,
355 .bit = 26,
356 },
357 [91] = {
358 .pend = IPIC_SIPNR_H,
359 .mask = IPIC_SIMSR_L,
360 .prio = 0,
361 .force = IPIC_SIFCR_L,
362 .bit = 27,
363 },
364};
365
366static inline u32 ipic_read(volatile u32 __iomem *base, unsigned int reg)
367{
368 return in_be32(base + (reg >> 2));
369}
370
371static inline void ipic_write(volatile u32 __iomem *base, unsigned int reg, u32 value)
372{
373 out_be32(base + (reg >> 2), value);
374}
375
376static inline struct ipic * ipic_from_irq(unsigned int irq)
377{
378 return primary_ipic;
379}
380
381static void ipic_enable_irq(unsigned int irq)
382{
383 struct ipic *ipic = ipic_from_irq(irq);
384 unsigned int src = irq - ipic->irq_offset;
385 u32 temp;
386
387 temp = ipic_read(ipic->regs, ipic_info[src].mask);
388 temp |= (1 << (31 - ipic_info[src].bit));
389 ipic_write(ipic->regs, ipic_info[src].mask, temp);
390}
391
392static void ipic_disable_irq(unsigned int irq)
393{
394 struct ipic *ipic = ipic_from_irq(irq);
395 unsigned int src = irq - ipic->irq_offset;
396 u32 temp;
397
398 temp = ipic_read(ipic->regs, ipic_info[src].mask);
399 temp &= ~(1 << (31 - ipic_info[src].bit));
400 ipic_write(ipic->regs, ipic_info[src].mask, temp);
401}
402
403static void ipic_disable_irq_and_ack(unsigned int irq)
404{
405 struct ipic *ipic = ipic_from_irq(irq);
406 unsigned int src = irq - ipic->irq_offset;
407 u32 temp;
408
409 ipic_disable_irq(irq);
410
411 temp = ipic_read(ipic->regs, ipic_info[src].pend);
412 temp |= (1 << (31 - ipic_info[src].bit));
413 ipic_write(ipic->regs, ipic_info[src].pend, temp);
414}
415
416static void ipic_end_irq(unsigned int irq)
417{
418 if (!(irq_desc[irq].status & (IRQ_DISABLED|IRQ_INPROGRESS)))
419 ipic_enable_irq(irq);
420}
421
422struct hw_interrupt_type ipic = {
423 .typename = " IPIC ",
424 .enable = ipic_enable_irq,
425 .disable = ipic_disable_irq,
426 .ack = ipic_disable_irq_and_ack,
427 .end = ipic_end_irq,
428};
429
430void __init ipic_init(phys_addr_t phys_addr,
431 unsigned int flags,
432 unsigned int irq_offset,
433 unsigned char *senses,
434 unsigned int senses_count)
435{
436 u32 i, temp = 0;
437
438 primary_ipic = &p_ipic;
439 primary_ipic->regs = ioremap(phys_addr, MPC83xx_IPIC_SIZE);
440
441 primary_ipic->irq_offset = irq_offset;
442
443 ipic_write(primary_ipic->regs, IPIC_SICNR, 0x0);
444
445 /* default priority scheme is grouped. If spread mode is required
446 * configure SICFR accordingly */
447 if (flags & IPIC_SPREADMODE_GRP_A)
448 temp |= SICFR_IPSA;
449 if (flags & IPIC_SPREADMODE_GRP_D)
450 temp |= SICFR_IPSD;
451 if (flags & IPIC_SPREADMODE_MIX_A)
452 temp |= SICFR_MPSA;
453 if (flags & IPIC_SPREADMODE_MIX_B)
454 temp |= SICFR_MPSB;
455
456 ipic_write(primary_ipic->regs, IPIC_SICNR, temp);
457
458 /* handle MCP route */
459 temp = 0;
460 if (flags & IPIC_DISABLE_MCP_OUT)
461 temp = SERCR_MCPR;
462 ipic_write(primary_ipic->regs, IPIC_SERCR, temp);
463
464 /* handle routing of IRQ0 to MCP */
465 temp = ipic_read(primary_ipic->regs, IPIC_SEMSR);
466
467 if (flags & IPIC_IRQ0_MCP)
468 temp |= SEMSR_SIRQ0;
469 else
470 temp &= ~SEMSR_SIRQ0;
471
472 ipic_write(primary_ipic->regs, IPIC_SEMSR, temp);
473
474 for (i = 0 ; i < NR_IPIC_INTS ; i++) {
475 irq_desc[i+irq_offset].chip = &ipic;
476 irq_desc[i+irq_offset].status = IRQ_LEVEL;
477 }
478
479 temp = 0;
480 for (i = 0 ; i < senses_count ; i++) {
481 if ((senses[i] & IRQ_SENSE_MASK) == IRQ_SENSE_EDGE) {
482 temp |= 1 << (15 - i);
483 if (i != 0)
484 irq_desc[i + irq_offset + MPC83xx_IRQ_EXT1 - 1].status = 0;
485 else
486 irq_desc[irq_offset + MPC83xx_IRQ_EXT0].status = 0;
487 }
488 }
489 ipic_write(primary_ipic->regs, IPIC_SECNR, temp);
490
491 printk ("IPIC (%d IRQ sources, %d External IRQs) at %p\n", NR_IPIC_INTS,
492 senses_count, primary_ipic->regs);
493}
494
495int ipic_set_priority(unsigned int irq, unsigned int priority)
496{
497 struct ipic *ipic = ipic_from_irq(irq);
498 unsigned int src = irq - ipic->irq_offset;
499 u32 temp;
500
501 if (priority > 7)
502 return -EINVAL;
503 if (src > 127)
504 return -EINVAL;
505 if (ipic_info[src].prio == 0)
506 return -EINVAL;
507
508 temp = ipic_read(ipic->regs, ipic_info[src].prio);
509
510 if (priority < 4) {
511 temp &= ~(0x7 << (20 + (3 - priority) * 3));
512 temp |= ipic_info[src].prio_mask << (20 + (3 - priority) * 3);
513 } else {
514 temp &= ~(0x7 << (4 + (7 - priority) * 3));
515 temp |= ipic_info[src].prio_mask << (4 + (7 - priority) * 3);
516 }
517
518 ipic_write(ipic->regs, ipic_info[src].prio, temp);
519
520 return 0;
521}
522
523void ipic_set_highest_priority(unsigned int irq)
524{
525 struct ipic *ipic = ipic_from_irq(irq);
526 unsigned int src = irq - ipic->irq_offset;
527 u32 temp;
528
529 temp = ipic_read(ipic->regs, IPIC_SICFR);
530
531 /* clear and set HPI */
532 temp &= 0x7f000000;
533 temp |= (src & 0x7f) << 24;
534
535 ipic_write(ipic->regs, IPIC_SICFR, temp);
536}
537
538void ipic_set_default_priority(void)
539{
540 ipic_set_priority(MPC83xx_IRQ_TSEC1_TX, 0);
541 ipic_set_priority(MPC83xx_IRQ_TSEC1_RX, 1);
542 ipic_set_priority(MPC83xx_IRQ_TSEC1_ERROR, 2);
543 ipic_set_priority(MPC83xx_IRQ_TSEC2_TX, 3);
544 ipic_set_priority(MPC83xx_IRQ_TSEC2_RX, 4);
545 ipic_set_priority(MPC83xx_IRQ_TSEC2_ERROR, 5);
546 ipic_set_priority(MPC83xx_IRQ_USB2_DR, 6);
547 ipic_set_priority(MPC83xx_IRQ_USB2_MPH, 7);
548
549 ipic_set_priority(MPC83xx_IRQ_UART1, 0);
550 ipic_set_priority(MPC83xx_IRQ_UART2, 1);
551 ipic_set_priority(MPC83xx_IRQ_SEC2, 2);
552 ipic_set_priority(MPC83xx_IRQ_IIC1, 5);
553 ipic_set_priority(MPC83xx_IRQ_IIC2, 6);
554 ipic_set_priority(MPC83xx_IRQ_SPI, 7);
555 ipic_set_priority(MPC83xx_IRQ_RTC_SEC, 0);
556 ipic_set_priority(MPC83xx_IRQ_PIT, 1);
557 ipic_set_priority(MPC83xx_IRQ_PCI1, 2);
558 ipic_set_priority(MPC83xx_IRQ_PCI2, 3);
559 ipic_set_priority(MPC83xx_IRQ_EXT0, 4);
560 ipic_set_priority(MPC83xx_IRQ_EXT1, 5);
561 ipic_set_priority(MPC83xx_IRQ_EXT2, 6);
562 ipic_set_priority(MPC83xx_IRQ_EXT3, 7);
563 ipic_set_priority(MPC83xx_IRQ_RTC_ALR, 0);
564 ipic_set_priority(MPC83xx_IRQ_MU, 1);
565 ipic_set_priority(MPC83xx_IRQ_SBA, 2);
566 ipic_set_priority(MPC83xx_IRQ_DMA, 3);
567 ipic_set_priority(MPC83xx_IRQ_EXT4, 4);
568 ipic_set_priority(MPC83xx_IRQ_EXT5, 5);
569 ipic_set_priority(MPC83xx_IRQ_EXT6, 6);
570 ipic_set_priority(MPC83xx_IRQ_EXT7, 7);
571}
572
573void ipic_enable_mcp(enum ipic_mcp_irq mcp_irq)
574{
575 struct ipic *ipic = primary_ipic;
576 u32 temp;
577
578 temp = ipic_read(ipic->regs, IPIC_SERMR);
579 temp |= (1 << (31 - mcp_irq));
580 ipic_write(ipic->regs, IPIC_SERMR, temp);
581}
582
583void ipic_disable_mcp(enum ipic_mcp_irq mcp_irq)
584{
585 struct ipic *ipic = primary_ipic;
586 u32 temp;
587
588 temp = ipic_read(ipic->regs, IPIC_SERMR);
589 temp &= (1 << (31 - mcp_irq));
590 ipic_write(ipic->regs, IPIC_SERMR, temp);
591}
592
593u32 ipic_get_mcp_status(void)
594{
595 return ipic_read(primary_ipic->regs, IPIC_SERMR);
596}
597
598void ipic_clear_mcp_status(u32 mask)
599{
600 ipic_write(primary_ipic->regs, IPIC_SERMR, mask);
601}
602
603/* Return an interrupt vector or -1 if no interrupt is pending. */
604int ipic_get_irq(void)
605{
606 int irq;
607
608 irq = ipic_read(primary_ipic->regs, IPIC_SIVCR) & 0x7f;
609
610 if (irq == 0) /* 0 --> no irq is pending */
611 irq = -1;
612
613 return irq;
614}
615
616static struct sysdev_class ipic_sysclass = {
617 .name = "ipic",
618};
619
620static struct sys_device device_ipic = {
621 .id = 0,
622 .cls = &ipic_sysclass,
623};
624
625static int __init init_ipic_sysfs(void)
626{
627 int rc;
628
629 if (!primary_ipic->regs)
630 return -ENODEV;
631 printk(KERN_DEBUG "Registering ipic with sysfs...\n");
632
633 rc = sysdev_class_register(&ipic_sysclass);
634 if (rc) {
635 printk(KERN_ERR "Failed registering ipic sys class\n");
636 return -ENODEV;
637 }
638 rc = sysdev_register(&device_ipic);
639 if (rc) {
640 printk(KERN_ERR "Failed registering ipic sys device\n");
641 return -ENODEV;
642 }
643 return 0;
644}
645
646subsys_initcall(init_ipic_sysfs);
diff --git a/arch/ppc/syslib/ipic.h b/arch/ppc/syslib/ipic.h
deleted file mode 100644
index a60c9d18bb7f..000000000000
--- a/arch/ppc/syslib/ipic.h
+++ /dev/null
@@ -1,47 +0,0 @@
1/*
2 * IPIC private definitions and structure.
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor, Inc
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13#ifndef __IPIC_H__
14#define __IPIC_H__
15
16#include <asm/ipic.h>
17
18#define MPC83xx_IPIC_SIZE (0x00100)
19
20/* System Global Interrupt Configuration Register */
21#define SICFR_IPSA 0x00010000
22#define SICFR_IPSD 0x00080000
23#define SICFR_MPSA 0x00200000
24#define SICFR_MPSB 0x00400000
25
26/* System External Interrupt Mask Register */
27#define SEMSR_SIRQ0 0x00008000
28
29/* System Error Control Register */
30#define SERCR_MCPR 0x00000001
31
32struct ipic {
33 volatile u32 __iomem *regs;
34 unsigned int irq_offset;
35};
36
37struct ipic_info {
38 u8 pend; /* pending register offset from base */
39 u8 mask; /* mask register offset from base */
40 u8 prio; /* priority register offset from base */
41 u8 force; /* force register offset from base */
42 u8 bit; /* register bit position (as per doc)
43 bit mask = 1 << (31 - bit) */
44 u8 prio_mask; /* priority mask value */
45};
46
47#endif /* __IPIC_H__ */
diff --git a/arch/ppc/syslib/mpc52xx_pic.c b/arch/ppc/syslib/mpc52xx_pic.c
index af35a316544a..f58149c03b0f 100644
--- a/arch/ppc/syslib/mpc52xx_pic.c
+++ b/arch/ppc/syslib/mpc52xx_pic.c
@@ -20,7 +20,6 @@
20#include <linux/init.h> 20#include <linux/init.h>
21#include <linux/sched.h> 21#include <linux/sched.h>
22#include <linux/signal.h> 22#include <linux/signal.h>
23#include <linux/stddef.h>
24#include <linux/delay.h> 23#include <linux/delay.h>
25#include <linux/irq.h> 24#include <linux/irq.h>
26 25
diff --git a/arch/ppc/syslib/mpc52xx_setup.c b/arch/ppc/syslib/mpc52xx_setup.c
index ecfa2c0f8ba3..9f504fc7693e 100644
--- a/arch/ppc/syslib/mpc52xx_setup.c
+++ b/arch/ppc/syslib/mpc52xx_setup.c
@@ -16,6 +16,7 @@
16 */ 16 */
17 17
18 18
19#include <linux/spinlock.h>
19#include <asm/io.h> 20#include <asm/io.h>
20#include <asm/time.h> 21#include <asm/time.h>
21#include <asm/mpc52xx.h> 22#include <asm/mpc52xx.h>
@@ -275,3 +276,38 @@ int mpc52xx_match_psc_function(int psc_idx, const char *func)
275 276
276 return 0; 277 return 0;
277} 278}
279
280int mpc52xx_set_psc_clkdiv(int psc_id, int clkdiv)
281{
282 static spinlock_t lock = SPIN_LOCK_UNLOCKED;
283 struct mpc52xx_cdm __iomem *cdm;
284 unsigned long flags;
285 u16 mclken_div;
286 u16 __iomem *reg;
287 u32 mask;
288
289 cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
290 if (!cdm) {
291 printk(KERN_ERR __FILE__ ": Error mapping CDM\n");
292 return -ENODEV;
293 }
294
295 mclken_div = 0x8000 | (clkdiv & 0x1FF);
296 switch (psc_id) {
297 case 1: reg = &cdm->mclken_div_psc1; mask = 0x20; break;
298 case 2: reg = &cdm->mclken_div_psc2; mask = 0x40; break;
299 case 3: reg = &cdm->mclken_div_psc3; mask = 0x80; break;
300 case 6: reg = &cdm->mclken_div_psc6; mask = 0x10; break;
301 default:
302 return -ENODEV;
303 }
304
305 /* Set the rate and enable the clock */
306 spin_lock_irqsave(&lock, flags);
307 out_be16(reg, mclken_div);
308 out_be32(&cdm->clk_enables, in_be32(&cdm->clk_enables) | mask);
309 spin_unlock_irqrestore(&lock, flags);
310
311 iounmap(cdm);
312 return 0;
313}
diff --git a/arch/ppc/syslib/mpc83xx_devices.c b/arch/ppc/syslib/mpc83xx_devices.c
deleted file mode 100644
index 5c4932ca8e9b..000000000000
--- a/arch/ppc/syslib/mpc83xx_devices.c
+++ /dev/null
@@ -1,251 +0,0 @@
1/*
2 * MPC83xx Device descriptions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/serial_8250.h>
18#include <linux/fsl_devices.h>
19#include <asm/mpc83xx.h>
20#include <asm/irq.h>
21#include <asm/ppc_sys.h>
22#include <asm/machdep.h>
23
24/* We use offsets for IORESOURCE_MEM since we do not know at compile time
25 * what IMMRBAR is, will get fixed up by mach_mpc83xx_fixup
26 */
27
28struct gianfar_mdio_data mpc83xx_mdio_pdata = {
29};
30
31static struct gianfar_platform_data mpc83xx_tsec1_pdata = {
32 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
33 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
34 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
35};
36
37static struct gianfar_platform_data mpc83xx_tsec2_pdata = {
38 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
39 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
40 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
41};
42
43static struct fsl_i2c_platform_data mpc83xx_fsl_i2c1_pdata = {
44 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
45};
46
47static struct fsl_i2c_platform_data mpc83xx_fsl_i2c2_pdata = {
48 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
49};
50
51static struct plat_serial8250_port serial_platform_data[] = {
52 [0] = {
53 .mapbase = 0x4500,
54 .irq = MPC83xx_IRQ_UART1,
55 .iotype = UPIO_MEM,
56 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
57 },
58 [1] = {
59 .mapbase = 0x4600,
60 .irq = MPC83xx_IRQ_UART2,
61 .iotype = UPIO_MEM,
62 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
63 },
64 { },
65};
66
67struct platform_device ppc_sys_platform_devices[] = {
68 [MPC83xx_TSEC1] = {
69 .name = "fsl-gianfar",
70 .id = 1,
71 .dev.platform_data = &mpc83xx_tsec1_pdata,
72 .num_resources = 4,
73 .resource = (struct resource[]) {
74 {
75 .start = 0x24000,
76 .end = 0x24fff,
77 .flags = IORESOURCE_MEM,
78 },
79 {
80 .name = "tx",
81 .start = MPC83xx_IRQ_TSEC1_TX,
82 .end = MPC83xx_IRQ_TSEC1_TX,
83 .flags = IORESOURCE_IRQ,
84 },
85 {
86 .name = "rx",
87 .start = MPC83xx_IRQ_TSEC1_RX,
88 .end = MPC83xx_IRQ_TSEC1_RX,
89 .flags = IORESOURCE_IRQ,
90 },
91 {
92 .name = "error",
93 .start = MPC83xx_IRQ_TSEC1_ERROR,
94 .end = MPC83xx_IRQ_TSEC1_ERROR,
95 .flags = IORESOURCE_IRQ,
96 },
97 },
98 },
99 [MPC83xx_TSEC2] = {
100 .name = "fsl-gianfar",
101 .id = 2,
102 .dev.platform_data = &mpc83xx_tsec2_pdata,
103 .num_resources = 4,
104 .resource = (struct resource[]) {
105 {
106 .start = 0x25000,
107 .end = 0x25fff,
108 .flags = IORESOURCE_MEM,
109 },
110 {
111 .name = "tx",
112 .start = MPC83xx_IRQ_TSEC2_TX,
113 .end = MPC83xx_IRQ_TSEC2_TX,
114 .flags = IORESOURCE_IRQ,
115 },
116 {
117 .name = "rx",
118 .start = MPC83xx_IRQ_TSEC2_RX,
119 .end = MPC83xx_IRQ_TSEC2_RX,
120 .flags = IORESOURCE_IRQ,
121 },
122 {
123 .name = "error",
124 .start = MPC83xx_IRQ_TSEC2_ERROR,
125 .end = MPC83xx_IRQ_TSEC2_ERROR,
126 .flags = IORESOURCE_IRQ,
127 },
128 },
129 },
130 [MPC83xx_IIC1] = {
131 .name = "fsl-i2c",
132 .id = 1,
133 .dev.platform_data = &mpc83xx_fsl_i2c1_pdata,
134 .num_resources = 2,
135 .resource = (struct resource[]) {
136 {
137 .start = 0x3000,
138 .end = 0x30ff,
139 .flags = IORESOURCE_MEM,
140 },
141 {
142 .start = MPC83xx_IRQ_IIC1,
143 .end = MPC83xx_IRQ_IIC1,
144 .flags = IORESOURCE_IRQ,
145 },
146 },
147 },
148 [MPC83xx_IIC2] = {
149 .name = "fsl-i2c",
150 .id = 2,
151 .dev.platform_data = &mpc83xx_fsl_i2c2_pdata,
152 .num_resources = 2,
153 .resource = (struct resource[]) {
154 {
155 .start = 0x3100,
156 .end = 0x31ff,
157 .flags = IORESOURCE_MEM,
158 },
159 {
160 .start = MPC83xx_IRQ_IIC2,
161 .end = MPC83xx_IRQ_IIC2,
162 .flags = IORESOURCE_IRQ,
163 },
164 },
165 },
166 [MPC83xx_DUART] = {
167 .name = "serial8250",
168 .id = PLAT8250_DEV_PLATFORM,
169 .dev.platform_data = serial_platform_data,
170 },
171 [MPC83xx_SEC2] = {
172 .name = "fsl-sec2",
173 .id = 1,
174 .num_resources = 2,
175 .resource = (struct resource[]) {
176 {
177 .start = 0x30000,
178 .end = 0x3ffff,
179 .flags = IORESOURCE_MEM,
180 },
181 {
182 .start = MPC83xx_IRQ_SEC2,
183 .end = MPC83xx_IRQ_SEC2,
184 .flags = IORESOURCE_IRQ,
185 },
186 },
187 },
188 [MPC83xx_USB2_DR] = {
189 .name = "fsl-ehci",
190 .id = 1,
191 .num_resources = 2,
192 .resource = (struct resource[]) {
193 {
194 .start = 0x23000,
195 .end = 0x23fff,
196 .flags = IORESOURCE_MEM,
197 },
198 {
199 .start = MPC83xx_IRQ_USB2_DR,
200 .end = MPC83xx_IRQ_USB2_DR,
201 .flags = IORESOURCE_IRQ,
202 },
203 },
204 },
205 [MPC83xx_USB2_MPH] = {
206 .name = "fsl-ehci",
207 .id = 2,
208 .num_resources = 2,
209 .resource = (struct resource[]) {
210 {
211 .start = 0x22000,
212 .end = 0x22fff,
213 .flags = IORESOURCE_MEM,
214 },
215 {
216 .start = MPC83xx_IRQ_USB2_MPH,
217 .end = MPC83xx_IRQ_USB2_MPH,
218 .flags = IORESOURCE_IRQ,
219 },
220 },
221 },
222 [MPC83xx_MDIO] = {
223 .name = "fsl-gianfar_mdio",
224 .id = 0,
225 .dev.platform_data = &mpc83xx_mdio_pdata,
226 .num_resources = 1,
227 .resource = (struct resource[]) {
228 {
229 .start = 0x24520,
230 .end = 0x2453f,
231 .flags = IORESOURCE_MEM,
232 },
233 },
234 },
235};
236
237static int __init mach_mpc83xx_fixup(struct platform_device *pdev)
238{
239 ppc_sys_fixup_mem_resource(pdev, immrbar);
240 return 0;
241}
242
243static int __init mach_mpc83xx_init(void)
244{
245 if (ppc_md.progress)
246 ppc_md.progress("mach_mpc83xx_init:enter", 0);
247 ppc_sys_device_fixup = mach_mpc83xx_fixup;
248 return 0;
249}
250
251postcore_initcall(mach_mpc83xx_init);
diff --git a/arch/ppc/syslib/mpc83xx_sys.c b/arch/ppc/syslib/mpc83xx_sys.c
deleted file mode 100644
index 0498ae7e01e3..000000000000
--- a/arch/ppc/syslib/mpc83xx_sys.c
+++ /dev/null
@@ -1,122 +0,0 @@
1/*
2 * MPC83xx System descriptions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <asm/ppc_sys.h>
18
19struct ppc_sys_spec *cur_ppc_sys_spec;
20struct ppc_sys_spec ppc_sys_specs[] = {
21 {
22 .ppc_sys_name = "8349E",
23 .mask = 0xFFFF0000,
24 .value = 0x80500000,
25 .num_devices = 9,
26 .device_list = (enum ppc_sys_devices[])
27 {
28 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
29 MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
30 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
31 },
32 },
33 {
34 .ppc_sys_name = "8349",
35 .mask = 0xFFFF0000,
36 .value = 0x80510000,
37 .num_devices = 8,
38 .device_list = (enum ppc_sys_devices[])
39 {
40 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
41 MPC83xx_IIC2, MPC83xx_DUART,
42 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
43 },
44 },
45 {
46 .ppc_sys_name = "8347E",
47 .mask = 0xFFFF0000,
48 .value = 0x80520000,
49 .num_devices = 9,
50 .device_list = (enum ppc_sys_devices[])
51 {
52 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
53 MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
54 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
55 },
56 },
57 {
58 .ppc_sys_name = "8347",
59 .mask = 0xFFFF0000,
60 .value = 0x80530000,
61 .num_devices = 8,
62 .device_list = (enum ppc_sys_devices[])
63 {
64 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
65 MPC83xx_IIC2, MPC83xx_DUART,
66 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
67 },
68 },
69 {
70 .ppc_sys_name = "8347E",
71 .mask = 0xFFFF0000,
72 .value = 0x80540000,
73 .num_devices = 9,
74 .device_list = (enum ppc_sys_devices[])
75 {
76 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
77 MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
78 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
79 },
80 },
81 {
82 .ppc_sys_name = "8347",
83 .mask = 0xFFFF0000,
84 .value = 0x80550000,
85 .num_devices = 8,
86 .device_list = (enum ppc_sys_devices[])
87 {
88 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
89 MPC83xx_IIC2, MPC83xx_DUART,
90 MPC83xx_USB2_DR, MPC83xx_USB2_MPH, MPC83xx_MDIO
91 },
92 },
93 {
94 .ppc_sys_name = "8343E",
95 .mask = 0xFFFF0000,
96 .value = 0x80560000,
97 .num_devices = 8,
98 .device_list = (enum ppc_sys_devices[])
99 {
100 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
101 MPC83xx_IIC2, MPC83xx_DUART, MPC83xx_SEC2,
102 MPC83xx_USB2_DR, MPC83xx_MDIO
103 },
104 },
105 {
106 .ppc_sys_name = "8343",
107 .mask = 0xFFFF0000,
108 .value = 0x80570000,
109 .num_devices = 7,
110 .device_list = (enum ppc_sys_devices[])
111 {
112 MPC83xx_TSEC1, MPC83xx_TSEC2, MPC83xx_IIC1,
113 MPC83xx_IIC2, MPC83xx_DUART,
114 MPC83xx_USB2_DR, MPC83xx_MDIO
115 },
116 },
117 { /* default match */
118 .ppc_sys_name = "",
119 .mask = 0x00000000,
120 .value = 0x00000000,
121 },
122};
diff --git a/arch/ppc/syslib/mpc85xx_devices.c b/arch/ppc/syslib/mpc85xx_devices.c
deleted file mode 100644
index 325136e5aee0..000000000000
--- a/arch/ppc/syslib/mpc85xx_devices.c
+++ /dev/null
@@ -1,826 +0,0 @@
1/*
2 * MPC85xx Device descriptions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <linux/serial_8250.h>
18#include <linux/fsl_devices.h>
19#include <linux/fs_enet_pd.h>
20#include <asm/mpc85xx.h>
21#include <asm/irq.h>
22#include <asm/ppc_sys.h>
23#include <asm/cpm2.h>
24
25/* We use offsets for IORESOURCE_MEM since we do not know at compile time
26 * what CCSRBAR is, will get fixed up by mach_mpc85xx_fixup
27 */
28struct gianfar_mdio_data mpc85xx_mdio_pdata = {
29};
30
31static struct gianfar_platform_data mpc85xx_tsec1_pdata = {
32 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
33 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
34 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
35};
36
37static struct gianfar_platform_data mpc85xx_tsec2_pdata = {
38 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
39 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
40 FSL_GIANFAR_DEV_HAS_MULTI_INTR,
41};
42
43static struct gianfar_platform_data mpc85xx_etsec1_pdata = {
44 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
45 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
46 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
47 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
48 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
49};
50
51static struct gianfar_platform_data mpc85xx_etsec2_pdata = {
52 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
53 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
54 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
55 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
56 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
57};
58
59static struct gianfar_platform_data mpc85xx_etsec3_pdata = {
60 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
61 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
62 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
63 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
64 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
65};
66
67static struct gianfar_platform_data mpc85xx_etsec4_pdata = {
68 .device_flags = FSL_GIANFAR_DEV_HAS_GIGABIT |
69 FSL_GIANFAR_DEV_HAS_COALESCE | FSL_GIANFAR_DEV_HAS_RMON |
70 FSL_GIANFAR_DEV_HAS_MULTI_INTR |
71 FSL_GIANFAR_DEV_HAS_CSUM | FSL_GIANFAR_DEV_HAS_VLAN |
72 FSL_GIANFAR_DEV_HAS_EXTENDED_HASH,
73};
74
75static struct gianfar_platform_data mpc85xx_fec_pdata = {
76 .device_flags = 0,
77};
78
79static struct fsl_i2c_platform_data mpc85xx_fsl_i2c_pdata = {
80 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
81};
82
83static struct fsl_i2c_platform_data mpc85xx_fsl_i2c2_pdata = {
84 .device_flags = FSL_I2C_DEV_SEPARATE_DFSRR,
85};
86
87static struct fs_platform_info mpc85xx_fcc1_pdata = {
88 .fs_no = fsid_fcc1,
89 .cp_page = CPM_CR_FCC1_PAGE,
90 .cp_block = CPM_CR_FCC1_SBLOCK,
91
92 .rx_ring = 32,
93 .tx_ring = 32,
94 .rx_copybreak = 240,
95 .use_napi = 0,
96 .napi_weight = 17,
97
98 .clk_mask = CMX1_CLK_MASK,
99 .clk_route = CMX1_CLK_ROUTE,
100 .clk_trx = (PC_F1RXCLK | PC_F1TXCLK),
101
102 .mem_offset = FCC1_MEM_OFFSET,
103};
104
105static struct fs_platform_info mpc85xx_fcc2_pdata = {
106 .fs_no = fsid_fcc2,
107 .cp_page = CPM_CR_FCC2_PAGE,
108 .cp_block = CPM_CR_FCC2_SBLOCK,
109
110 .rx_ring = 32,
111 .tx_ring = 32,
112 .rx_copybreak = 240,
113 .use_napi = 0,
114 .napi_weight = 17,
115
116 .clk_mask = CMX2_CLK_MASK,
117 .clk_route = CMX2_CLK_ROUTE,
118 .clk_trx = (PC_F2RXCLK | PC_F2TXCLK),
119
120 .mem_offset = FCC2_MEM_OFFSET,
121};
122
123static struct fs_platform_info mpc85xx_fcc3_pdata = {
124 .fs_no = fsid_fcc3,
125 .cp_page = CPM_CR_FCC3_PAGE,
126 .cp_block = CPM_CR_FCC3_SBLOCK,
127
128 .rx_ring = 32,
129 .tx_ring = 32,
130 .rx_copybreak = 240,
131 .use_napi = 0,
132 .napi_weight = 17,
133
134 .clk_mask = CMX3_CLK_MASK,
135 .clk_route = CMX3_CLK_ROUTE,
136 .clk_trx = (PC_F3RXCLK | PC_F3TXCLK),
137
138 .mem_offset = FCC3_MEM_OFFSET,
139};
140
141static struct plat_serial8250_port serial_platform_data[] = {
142 [0] = {
143 .mapbase = 0x4500,
144 .irq = MPC85xx_IRQ_DUART,
145 .iotype = UPIO_MEM,
146 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
147 },
148 [1] = {
149 .mapbase = 0x4600,
150 .irq = MPC85xx_IRQ_DUART,
151 .iotype = UPIO_MEM,
152 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST | UPF_SHARE_IRQ,
153 },
154 { },
155};
156
157struct platform_device ppc_sys_platform_devices[] = {
158 [MPC85xx_TSEC1] = {
159 .name = "fsl-gianfar",
160 .id = 1,
161 .dev.platform_data = &mpc85xx_tsec1_pdata,
162 .num_resources = 4,
163 .resource = (struct resource[]) {
164 {
165 .start = MPC85xx_ENET1_OFFSET,
166 .end = MPC85xx_ENET1_OFFSET +
167 MPC85xx_ENET1_SIZE - 1,
168 .flags = IORESOURCE_MEM,
169 },
170 {
171 .name = "tx",
172 .start = MPC85xx_IRQ_TSEC1_TX,
173 .end = MPC85xx_IRQ_TSEC1_TX,
174 .flags = IORESOURCE_IRQ,
175 },
176 {
177 .name = "rx",
178 .start = MPC85xx_IRQ_TSEC1_RX,
179 .end = MPC85xx_IRQ_TSEC1_RX,
180 .flags = IORESOURCE_IRQ,
181 },
182 {
183 .name = "error",
184 .start = MPC85xx_IRQ_TSEC1_ERROR,
185 .end = MPC85xx_IRQ_TSEC1_ERROR,
186 .flags = IORESOURCE_IRQ,
187 },
188 },
189 },
190 [MPC85xx_TSEC2] = {
191 .name = "fsl-gianfar",
192 .id = 2,
193 .dev.platform_data = &mpc85xx_tsec2_pdata,
194 .num_resources = 4,
195 .resource = (struct resource[]) {
196 {
197 .start = MPC85xx_ENET2_OFFSET,
198 .end = MPC85xx_ENET2_OFFSET +
199 MPC85xx_ENET2_SIZE - 1,
200 .flags = IORESOURCE_MEM,
201 },
202 {
203 .name = "tx",
204 .start = MPC85xx_IRQ_TSEC2_TX,
205 .end = MPC85xx_IRQ_TSEC2_TX,
206 .flags = IORESOURCE_IRQ,
207 },
208 {
209 .name = "rx",
210 .start = MPC85xx_IRQ_TSEC2_RX,
211 .end = MPC85xx_IRQ_TSEC2_RX,
212 .flags = IORESOURCE_IRQ,
213 },
214 {
215 .name = "error",
216 .start = MPC85xx_IRQ_TSEC2_ERROR,
217 .end = MPC85xx_IRQ_TSEC2_ERROR,
218 .flags = IORESOURCE_IRQ,
219 },
220 },
221 },
222 [MPC85xx_FEC] = {
223 .name = "fsl-gianfar",
224 .id = 3,
225 .dev.platform_data = &mpc85xx_fec_pdata,
226 .num_resources = 2,
227 .resource = (struct resource[]) {
228 {
229 .start = MPC85xx_ENET3_OFFSET,
230 .end = MPC85xx_ENET3_OFFSET +
231 MPC85xx_ENET3_SIZE - 1,
232 .flags = IORESOURCE_MEM,
233
234 },
235 {
236 .start = MPC85xx_IRQ_FEC,
237 .end = MPC85xx_IRQ_FEC,
238 .flags = IORESOURCE_IRQ,
239 },
240 },
241 },
242 [MPC85xx_IIC1] = {
243 .name = "fsl-i2c",
244 .id = 1,
245 .dev.platform_data = &mpc85xx_fsl_i2c_pdata,
246 .num_resources = 2,
247 .resource = (struct resource[]) {
248 {
249 .start = MPC85xx_IIC1_OFFSET,
250 .end = MPC85xx_IIC1_OFFSET +
251 MPC85xx_IIC1_SIZE - 1,
252 .flags = IORESOURCE_MEM,
253 },
254 {
255 .start = MPC85xx_IRQ_IIC1,
256 .end = MPC85xx_IRQ_IIC1,
257 .flags = IORESOURCE_IRQ,
258 },
259 },
260 },
261 [MPC85xx_DMA0] = {
262 .name = "fsl-dma",
263 .id = 0,
264 .num_resources = 2,
265 .resource = (struct resource[]) {
266 {
267 .start = MPC85xx_DMA0_OFFSET,
268 .end = MPC85xx_DMA0_OFFSET +
269 MPC85xx_DMA0_SIZE - 1,
270 .flags = IORESOURCE_MEM,
271 },
272 {
273 .start = MPC85xx_IRQ_DMA0,
274 .end = MPC85xx_IRQ_DMA0,
275 .flags = IORESOURCE_IRQ,
276 },
277 },
278 },
279 [MPC85xx_DMA1] = {
280 .name = "fsl-dma",
281 .id = 1,
282 .num_resources = 2,
283 .resource = (struct resource[]) {
284 {
285 .start = MPC85xx_DMA1_OFFSET,
286 .end = MPC85xx_DMA1_OFFSET +
287 MPC85xx_DMA1_SIZE - 1,
288 .flags = IORESOURCE_MEM,
289 },
290 {
291 .start = MPC85xx_IRQ_DMA1,
292 .end = MPC85xx_IRQ_DMA1,
293 .flags = IORESOURCE_IRQ,
294 },
295 },
296 },
297 [MPC85xx_DMA2] = {
298 .name = "fsl-dma",
299 .id = 2,
300 .num_resources = 2,
301 .resource = (struct resource[]) {
302 {
303 .start = MPC85xx_DMA2_OFFSET,
304 .end = MPC85xx_DMA2_OFFSET +
305 MPC85xx_DMA2_SIZE - 1,
306 .flags = IORESOURCE_MEM,
307 },
308 {
309 .start = MPC85xx_IRQ_DMA2,
310 .end = MPC85xx_IRQ_DMA2,
311 .flags = IORESOURCE_IRQ,
312 },
313 },
314 },
315 [MPC85xx_DMA3] = {
316 .name = "fsl-dma",
317 .id = 3,
318 .num_resources = 2,
319 .resource = (struct resource[]) {
320 {
321 .start = MPC85xx_DMA3_OFFSET,
322 .end = MPC85xx_DMA3_OFFSET +
323 MPC85xx_DMA3_SIZE - 1,
324 .flags = IORESOURCE_MEM,
325 },
326 {
327 .start = MPC85xx_IRQ_DMA3,
328 .end = MPC85xx_IRQ_DMA3,
329 .flags = IORESOURCE_IRQ,
330 },
331 },
332 },
333 [MPC85xx_DUART] = {
334 .name = "serial8250",
335 .id = PLAT8250_DEV_PLATFORM,
336 .dev.platform_data = serial_platform_data,
337 },
338 [MPC85xx_PERFMON] = {
339 .name = "fsl-perfmon",
340 .id = 1,
341 .num_resources = 2,
342 .resource = (struct resource[]) {
343 {
344 .start = MPC85xx_PERFMON_OFFSET,
345 .end = MPC85xx_PERFMON_OFFSET +
346 MPC85xx_PERFMON_SIZE - 1,
347 .flags = IORESOURCE_MEM,
348 },
349 {
350 .start = MPC85xx_IRQ_PERFMON,
351 .end = MPC85xx_IRQ_PERFMON,
352 .flags = IORESOURCE_IRQ,
353 },
354 },
355 },
356 [MPC85xx_SEC2] = {
357 .name = "fsl-sec2",
358 .id = 1,
359 .num_resources = 2,
360 .resource = (struct resource[]) {
361 {
362 .start = MPC85xx_SEC2_OFFSET,
363 .end = MPC85xx_SEC2_OFFSET +
364 MPC85xx_SEC2_SIZE - 1,
365 .flags = IORESOURCE_MEM,
366 },
367 {
368 .start = MPC85xx_IRQ_SEC2,
369 .end = MPC85xx_IRQ_SEC2,
370 .flags = IORESOURCE_IRQ,
371 },
372 },
373 },
374 [MPC85xx_CPM_FCC1] = {
375 .name = "fsl-cpm-fcc",
376 .id = 1,
377 .num_resources = 4,
378 .dev.platform_data = &mpc85xx_fcc1_pdata,
379 .resource = (struct resource[]) {
380 {
381 .name = "fcc_regs",
382 .start = 0x91300,
383 .end = 0x9131F,
384 .flags = IORESOURCE_MEM,
385 },
386 {
387 .name = "fcc_regs_c",
388 .start = 0x91380,
389 .end = 0x9139F,
390 .flags = IORESOURCE_MEM,
391 },
392 {
393 .name = "fcc_pram",
394 .start = 0x88400,
395 .end = 0x884ff,
396 .flags = IORESOURCE_MEM,
397 },
398 {
399 .start = SIU_INT_FCC1,
400 .end = SIU_INT_FCC1,
401 .flags = IORESOURCE_IRQ,
402 },
403 },
404 },
405 [MPC85xx_CPM_FCC2] = {
406 .name = "fsl-cpm-fcc",
407 .id = 2,
408 .num_resources = 4,
409 .dev.platform_data = &mpc85xx_fcc2_pdata,
410 .resource = (struct resource[]) {
411 {
412 .name = "fcc_regs",
413 .start = 0x91320,
414 .end = 0x9133F,
415 .flags = IORESOURCE_MEM,
416 },
417 {
418 .name = "fcc_regs_c",
419 .start = 0x913A0,
420 .end = 0x913CF,
421 .flags = IORESOURCE_MEM,
422 },
423 {
424 .name = "fcc_pram",
425 .start = 0x88500,
426 .end = 0x885ff,
427 .flags = IORESOURCE_MEM,
428 },
429 {
430 .start = SIU_INT_FCC2,
431 .end = SIU_INT_FCC2,
432 .flags = IORESOURCE_IRQ,
433 },
434 },
435 },
436 [MPC85xx_CPM_FCC3] = {
437 .name = "fsl-cpm-fcc",
438 .id = 3,
439 .num_resources = 4,
440 .dev.platform_data = &mpc85xx_fcc3_pdata,
441 .resource = (struct resource[]) {
442 {
443 .name = "fcc_regs",
444 .start = 0x91340,
445 .end = 0x9135F,
446 .flags = IORESOURCE_MEM,
447 },
448 {
449 .name = "fcc_regs_c",
450 .start = 0x913D0,
451 .end = 0x913FF,
452 .flags = IORESOURCE_MEM,
453 },
454 {
455 .name = "fcc_pram",
456 .start = 0x88600,
457 .end = 0x886ff,
458 .flags = IORESOURCE_MEM,
459 },
460 {
461 .start = SIU_INT_FCC3,
462 .end = SIU_INT_FCC3,
463 .flags = IORESOURCE_IRQ,
464 },
465 },
466 },
467 [MPC85xx_CPM_I2C] = {
468 .name = "fsl-cpm-i2c",
469 .id = 1,
470 .num_resources = 2,
471 .resource = (struct resource[]) {
472 {
473 .start = 0x91860,
474 .end = 0x918BF,
475 .flags = IORESOURCE_MEM,
476 },
477 {
478 .start = SIU_INT_I2C,
479 .end = SIU_INT_I2C,
480 .flags = IORESOURCE_IRQ,
481 },
482 },
483 },
484 [MPC85xx_CPM_SCC1] = {
485 .name = "fsl-cpm-scc",
486 .id = 1,
487 .num_resources = 2,
488 .resource = (struct resource[]) {
489 {
490 .start = 0x91A00,
491 .end = 0x91A1F,
492 .flags = IORESOURCE_MEM,
493 },
494 {
495 .start = SIU_INT_SCC1,
496 .end = SIU_INT_SCC1,
497 .flags = IORESOURCE_IRQ,
498 },
499 },
500 },
501 [MPC85xx_CPM_SCC2] = {
502 .name = "fsl-cpm-scc",
503 .id = 2,
504 .num_resources = 2,
505 .resource = (struct resource[]) {
506 {
507 .start = 0x91A20,
508 .end = 0x91A3F,
509 .flags = IORESOURCE_MEM,
510 },
511 {
512 .start = SIU_INT_SCC2,
513 .end = SIU_INT_SCC2,
514 .flags = IORESOURCE_IRQ,
515 },
516 },
517 },
518 [MPC85xx_CPM_SCC3] = {
519 .name = "fsl-cpm-scc",
520 .id = 3,
521 .num_resources = 2,
522 .resource = (struct resource[]) {
523 {
524 .start = 0x91A40,
525 .end = 0x91A5F,
526 .flags = IORESOURCE_MEM,
527 },
528 {
529 .start = SIU_INT_SCC3,
530 .end = SIU_INT_SCC3,
531 .flags = IORESOURCE_IRQ,
532 },
533 },
534 },
535 [MPC85xx_CPM_SCC4] = {
536 .name = "fsl-cpm-scc",
537 .id = 4,
538 .num_resources = 2,
539 .resource = (struct resource[]) {
540 {
541 .start = 0x91A60,
542 .end = 0x91A7F,
543 .flags = IORESOURCE_MEM,
544 },
545 {
546 .start = SIU_INT_SCC4,
547 .end = SIU_INT_SCC4,
548 .flags = IORESOURCE_IRQ,
549 },
550 },
551 },
552 [MPC85xx_CPM_SPI] = {
553 .name = "fsl-cpm-spi",
554 .id = 1,
555 .num_resources = 2,
556 .resource = (struct resource[]) {
557 {
558 .start = 0x91AA0,
559 .end = 0x91AFF,
560 .flags = IORESOURCE_MEM,
561 },
562 {
563 .start = SIU_INT_SPI,
564 .end = SIU_INT_SPI,
565 .flags = IORESOURCE_IRQ,
566 },
567 },
568 },
569 [MPC85xx_CPM_MCC1] = {
570 .name = "fsl-cpm-mcc",
571 .id = 1,
572 .num_resources = 2,
573 .resource = (struct resource[]) {
574 {
575 .start = 0x91B30,
576 .end = 0x91B3F,
577 .flags = IORESOURCE_MEM,
578 },
579 {
580 .start = SIU_INT_MCC1,
581 .end = SIU_INT_MCC1,
582 .flags = IORESOURCE_IRQ,
583 },
584 },
585 },
586 [MPC85xx_CPM_MCC2] = {
587 .name = "fsl-cpm-mcc",
588 .id = 2,
589 .num_resources = 2,
590 .resource = (struct resource[]) {
591 {
592 .start = 0x91B50,
593 .end = 0x91B5F,
594 .flags = IORESOURCE_MEM,
595 },
596 {
597 .start = SIU_INT_MCC2,
598 .end = SIU_INT_MCC2,
599 .flags = IORESOURCE_IRQ,
600 },
601 },
602 },
603 [MPC85xx_CPM_SMC1] = {
604 .name = "fsl-cpm-smc",
605 .id = 1,
606 .num_resources = 2,
607 .resource = (struct resource[]) {
608 {
609 .start = 0x91A80,
610 .end = 0x91A8F,
611 .flags = IORESOURCE_MEM,
612 },
613 {
614 .start = SIU_INT_SMC1,
615 .end = SIU_INT_SMC1,
616 .flags = IORESOURCE_IRQ,
617 },
618 },
619 },
620 [MPC85xx_CPM_SMC2] = {
621 .name = "fsl-cpm-smc",
622 .id = 2,
623 .num_resources = 2,
624 .resource = (struct resource[]) {
625 {
626 .start = 0x91A90,
627 .end = 0x91A9F,
628 .flags = IORESOURCE_MEM,
629 },
630 {
631 .start = SIU_INT_SMC2,
632 .end = SIU_INT_SMC2,
633 .flags = IORESOURCE_IRQ,
634 },
635 },
636 },
637 [MPC85xx_CPM_USB] = {
638 .name = "fsl-cpm-usb",
639 .id = 2,
640 .num_resources = 2,
641 .resource = (struct resource[]) {
642 {
643 .start = 0x91B60,
644 .end = 0x91B7F,
645 .flags = IORESOURCE_MEM,
646 },
647 {
648 .start = SIU_INT_USB,
649 .end = SIU_INT_USB,
650 .flags = IORESOURCE_IRQ,
651 },
652 },
653 },
654 [MPC85xx_eTSEC1] = {
655 .name = "fsl-gianfar",
656 .id = 1,
657 .dev.platform_data = &mpc85xx_etsec1_pdata,
658 .num_resources = 4,
659 .resource = (struct resource[]) {
660 {
661 .start = MPC85xx_ENET1_OFFSET,
662 .end = MPC85xx_ENET1_OFFSET +
663 MPC85xx_ENET1_SIZE - 1,
664 .flags = IORESOURCE_MEM,
665 },
666 {
667 .name = "tx",
668 .start = MPC85xx_IRQ_TSEC1_TX,
669 .end = MPC85xx_IRQ_TSEC1_TX,
670 .flags = IORESOURCE_IRQ,
671 },
672 {
673 .name = "rx",
674 .start = MPC85xx_IRQ_TSEC1_RX,
675 .end = MPC85xx_IRQ_TSEC1_RX,
676 .flags = IORESOURCE_IRQ,
677 },
678 {
679 .name = "error",
680 .start = MPC85xx_IRQ_TSEC1_ERROR,
681 .end = MPC85xx_IRQ_TSEC1_ERROR,
682 .flags = IORESOURCE_IRQ,
683 },
684 },
685 },
686 [MPC85xx_eTSEC2] = {
687 .name = "fsl-gianfar",
688 .id = 2,
689 .dev.platform_data = &mpc85xx_etsec2_pdata,
690 .num_resources = 4,
691 .resource = (struct resource[]) {
692 {
693 .start = MPC85xx_ENET2_OFFSET,
694 .end = MPC85xx_ENET2_OFFSET +
695 MPC85xx_ENET2_SIZE - 1,
696 .flags = IORESOURCE_MEM,
697 },
698 {
699 .name = "tx",
700 .start = MPC85xx_IRQ_TSEC2_TX,
701 .end = MPC85xx_IRQ_TSEC2_TX,
702 .flags = IORESOURCE_IRQ,
703 },
704 {
705 .name = "rx",
706 .start = MPC85xx_IRQ_TSEC2_RX,
707 .end = MPC85xx_IRQ_TSEC2_RX,
708 .flags = IORESOURCE_IRQ,
709 },
710 {
711 .name = "error",
712 .start = MPC85xx_IRQ_TSEC2_ERROR,
713 .end = MPC85xx_IRQ_TSEC2_ERROR,
714 .flags = IORESOURCE_IRQ,
715 },
716 },
717 },
718 [MPC85xx_eTSEC3] = {
719 .name = "fsl-gianfar",
720 .id = 3,
721 .dev.platform_data = &mpc85xx_etsec3_pdata,
722 .num_resources = 4,
723 .resource = (struct resource[]) {
724 {
725 .start = MPC85xx_ENET3_OFFSET,
726 .end = MPC85xx_ENET3_OFFSET +
727 MPC85xx_ENET3_SIZE - 1,
728 .flags = IORESOURCE_MEM,
729 },
730 {
731 .name = "tx",
732 .start = MPC85xx_IRQ_TSEC3_TX,
733 .end = MPC85xx_IRQ_TSEC3_TX,
734 .flags = IORESOURCE_IRQ,
735 },
736 {
737 .name = "rx",
738 .start = MPC85xx_IRQ_TSEC3_RX,
739 .end = MPC85xx_IRQ_TSEC3_RX,
740 .flags = IORESOURCE_IRQ,
741 },
742 {
743 .name = "error",
744 .start = MPC85xx_IRQ_TSEC3_ERROR,
745 .end = MPC85xx_IRQ_TSEC3_ERROR,
746 .flags = IORESOURCE_IRQ,
747 },
748 },
749 },
750 [MPC85xx_eTSEC4] = {
751 .name = "fsl-gianfar",
752 .id = 4,
753 .dev.platform_data = &mpc85xx_etsec4_pdata,
754 .num_resources = 4,
755 .resource = (struct resource[]) {
756 {
757 .start = 0x27000,
758 .end = 0x27fff,
759 .flags = IORESOURCE_MEM,
760 },
761 {
762 .name = "tx",
763 .start = MPC85xx_IRQ_TSEC4_TX,
764 .end = MPC85xx_IRQ_TSEC4_TX,
765 .flags = IORESOURCE_IRQ,
766 },
767 {
768 .name = "rx",
769 .start = MPC85xx_IRQ_TSEC4_RX,
770 .end = MPC85xx_IRQ_TSEC4_RX,
771 .flags = IORESOURCE_IRQ,
772 },
773 {
774 .name = "error",
775 .start = MPC85xx_IRQ_TSEC4_ERROR,
776 .end = MPC85xx_IRQ_TSEC4_ERROR,
777 .flags = IORESOURCE_IRQ,
778 },
779 },
780 },
781 [MPC85xx_IIC2] = {
782 .name = "fsl-i2c",
783 .id = 2,
784 .dev.platform_data = &mpc85xx_fsl_i2c2_pdata,
785 .num_resources = 2,
786 .resource = (struct resource[]) {
787 {
788 .start = 0x03100,
789 .end = 0x031ff,
790 .flags = IORESOURCE_MEM,
791 },
792 {
793 .start = MPC85xx_IRQ_IIC1,
794 .end = MPC85xx_IRQ_IIC1,
795 .flags = IORESOURCE_IRQ,
796 },
797 },
798 },
799 [MPC85xx_MDIO] = {
800 .name = "fsl-gianfar_mdio",
801 .id = 0,
802 .dev.platform_data = &mpc85xx_mdio_pdata,
803 .num_resources = 1,
804 .resource = (struct resource[]) {
805 {
806 .start = 0x24520,
807 .end = 0x2453f,
808 .flags = IORESOURCE_MEM,
809 },
810 },
811 },
812};
813
814static int __init mach_mpc85xx_fixup(struct platform_device *pdev)
815{
816 ppc_sys_fixup_mem_resource(pdev, CCSRBAR);
817 return 0;
818}
819
820static int __init mach_mpc85xx_init(void)
821{
822 ppc_sys_device_fixup = mach_mpc85xx_fixup;
823 return 0;
824}
825
826postcore_initcall(mach_mpc85xx_init);
diff --git a/arch/ppc/syslib/mpc85xx_sys.c b/arch/ppc/syslib/mpc85xx_sys.c
deleted file mode 100644
index d96a93dbcb5a..000000000000
--- a/arch/ppc/syslib/mpc85xx_sys.c
+++ /dev/null
@@ -1,233 +0,0 @@
1/*
2 * MPC85xx System descriptions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/init.h>
15#include <linux/module.h>
16#include <linux/device.h>
17#include <asm/ppc_sys.h>
18
19struct ppc_sys_spec *cur_ppc_sys_spec;
20struct ppc_sys_spec ppc_sys_specs[] = {
21 {
22 .ppc_sys_name = "8540",
23 .mask = 0xFFFF0000,
24 .value = 0x80300000,
25 .num_devices = 11,
26 .device_list = (enum ppc_sys_devices[])
27 {
28 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_FEC, MPC85xx_IIC1,
29 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
30 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_MDIO,
31 },
32 },
33 {
34 .ppc_sys_name = "8560",
35 .mask = 0xFFFF0000,
36 .value = 0x80700000,
37 .num_devices = 20,
38 .device_list = (enum ppc_sys_devices[])
39 {
40 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
41 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
42 MPC85xx_PERFMON,
43 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
44 MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3, MPC85xx_CPM_SCC4,
45 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2, MPC85xx_CPM_FCC3,
46 MPC85xx_CPM_MCC1, MPC85xx_CPM_MCC2, MPC85xx_MDIO,
47 },
48 },
49 {
50 .ppc_sys_name = "8541",
51 .mask = 0xFFFF0000,
52 .value = 0x80720000,
53 .num_devices = 14,
54 .device_list = (enum ppc_sys_devices[])
55 {
56 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
57 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
58 MPC85xx_PERFMON, MPC85xx_DUART,
59 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
60 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
61 MPC85xx_MDIO,
62 },
63 },
64 {
65 .ppc_sys_name = "8541E",
66 .mask = 0xFFFF0000,
67 .value = 0x807A0000,
68 .num_devices = 15,
69 .device_list = (enum ppc_sys_devices[])
70 {
71 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
72 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
73 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
74 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C,
75 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
76 MPC85xx_MDIO,
77 },
78 },
79 {
80 .ppc_sys_name = "8555",
81 .mask = 0xFFFF0000,
82 .value = 0x80710000,
83 .num_devices = 20,
84 .device_list = (enum ppc_sys_devices[])
85 {
86 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
87 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
88 MPC85xx_PERFMON, MPC85xx_DUART,
89 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
90 MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3,
91 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
92 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
93 MPC85xx_CPM_USB,
94 MPC85xx_MDIO,
95 },
96 },
97 {
98 .ppc_sys_name = "8555E",
99 .mask = 0xFFFF0000,
100 .value = 0x80790000,
101 .num_devices = 21,
102 .device_list = (enum ppc_sys_devices[])
103 {
104 MPC85xx_TSEC1, MPC85xx_TSEC2, MPC85xx_IIC1,
105 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
106 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
107 MPC85xx_CPM_SPI, MPC85xx_CPM_I2C, MPC85xx_CPM_SCC1,
108 MPC85xx_CPM_SCC2, MPC85xx_CPM_SCC3,
109 MPC85xx_CPM_FCC1, MPC85xx_CPM_FCC2,
110 MPC85xx_CPM_SMC1, MPC85xx_CPM_SMC2,
111 MPC85xx_CPM_USB,
112 MPC85xx_MDIO,
113 },
114 },
115 /* SVRs on 8548 rev1.0 matches for 8548/8547/8545 */
116 {
117 .ppc_sys_name = "8548E",
118 .mask = 0xFFFF00F0,
119 .value = 0x80390010,
120 .num_devices = 14,
121 .device_list = (enum ppc_sys_devices[])
122 {
123 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
124 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
125 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
126 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
127 MPC85xx_MDIO,
128 },
129 },
130 {
131 .ppc_sys_name = "8548",
132 .mask = 0xFFFF00F0,
133 .value = 0x80310010,
134 .num_devices = 13,
135 .device_list = (enum ppc_sys_devices[])
136 {
137 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
138 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
139 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
140 MPC85xx_PERFMON, MPC85xx_DUART,
141 MPC85xx_MDIO,
142 },
143 },
144 {
145 .ppc_sys_name = "8547E",
146 .mask = 0xFFFF00F0,
147 .value = 0x80390010,
148 .num_devices = 14,
149 .device_list = (enum ppc_sys_devices[])
150 {
151 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
152 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
153 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
154 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
155 MPC85xx_MDIO,
156 },
157 },
158 {
159 .ppc_sys_name = "8547",
160 .mask = 0xFFFF00F0,
161 .value = 0x80310010,
162 .num_devices = 13,
163 .device_list = (enum ppc_sys_devices[])
164 {
165 MPC85xx_eTSEC1, MPC85xx_eTSEC2, MPC85xx_eTSEC3,
166 MPC85xx_eTSEC4, MPC85xx_IIC1, MPC85xx_IIC2,
167 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
168 MPC85xx_PERFMON, MPC85xx_DUART,
169 MPC85xx_MDIO,
170 },
171 },
172 {
173 .ppc_sys_name = "8545E",
174 .mask = 0xFFFF00F0,
175 .value = 0x80390010,
176 .num_devices = 12,
177 .device_list = (enum ppc_sys_devices[])
178 {
179 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
180 MPC85xx_IIC1, MPC85xx_IIC2,
181 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
182 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
183 MPC85xx_MDIO,
184 },
185 },
186 {
187 .ppc_sys_name = "8545",
188 .mask = 0xFFFF00F0,
189 .value = 0x80310010,
190 .num_devices = 11,
191 .device_list = (enum ppc_sys_devices[])
192 {
193 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
194 MPC85xx_IIC1, MPC85xx_IIC2,
195 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
196 MPC85xx_PERFMON, MPC85xx_DUART,
197 MPC85xx_MDIO,
198 },
199 },
200 {
201 .ppc_sys_name = "8543E",
202 .mask = 0xFFFF00F0,
203 .value = 0x803A0010,
204 .num_devices = 12,
205 .device_list = (enum ppc_sys_devices[])
206 {
207 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
208 MPC85xx_IIC1, MPC85xx_IIC2,
209 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
210 MPC85xx_PERFMON, MPC85xx_DUART, MPC85xx_SEC2,
211 MPC85xx_MDIO,
212 },
213 },
214 {
215 .ppc_sys_name = "8543",
216 .mask = 0xFFFF00F0,
217 .value = 0x80320010,
218 .num_devices = 11,
219 .device_list = (enum ppc_sys_devices[])
220 {
221 MPC85xx_eTSEC1, MPC85xx_eTSEC2,
222 MPC85xx_IIC1, MPC85xx_IIC2,
223 MPC85xx_DMA0, MPC85xx_DMA1, MPC85xx_DMA2, MPC85xx_DMA3,
224 MPC85xx_PERFMON, MPC85xx_DUART,
225 MPC85xx_MDIO,
226 },
227 },
228 { /* default match */
229 .ppc_sys_name = "",
230 .mask = 0x00000000,
231 .value = 0x00000000,
232 },
233};
diff --git a/arch/ppc/syslib/mpc8xx_devices.c b/arch/ppc/syslib/mpc8xx_devices.c
index c05ac87ece4c..80804eee5795 100644
--- a/arch/ppc/syslib/mpc8xx_devices.c
+++ b/arch/ppc/syslib/mpc8xx_devices.c
@@ -16,7 +16,7 @@
16#include <linux/device.h> 16#include <linux/device.h>
17#include <linux/serial_8250.h> 17#include <linux/serial_8250.h>
18#include <linux/mii.h> 18#include <linux/mii.h>
19#include <asm/commproc.h> 19#include <asm/cpm1.h>
20#include <asm/mpc8xx.h> 20#include <asm/mpc8xx.h>
21#include <asm/irq.h> 21#include <asm/irq.h>
22#include <asm/ppc_sys.h> 22#include <asm/ppc_sys.h>
diff --git a/arch/ppc/syslib/mv64360_pic.c b/arch/ppc/syslib/mv64360_pic.c
index 4b7a3338e122..2dd2dc5cd404 100644
--- a/arch/ppc/syslib/mv64360_pic.c
+++ b/arch/ppc/syslib/mv64360_pic.c
@@ -36,7 +36,6 @@
36#include <linux/init.h> 36#include <linux/init.h>
37#include <linux/sched.h> 37#include <linux/sched.h>
38#include <linux/signal.h> 38#include <linux/signal.h>
39#include <linux/stddef.h>
40#include <linux/delay.h> 39#include <linux/delay.h>
41#include <linux/irq.h> 40#include <linux/irq.h>
42#include <linux/interrupt.h> 41#include <linux/interrupt.h>
diff --git a/arch/ppc/syslib/ocp.c b/arch/ppc/syslib/ocp.c
index 3f5be2c5ce99..ac80370ed2f7 100644
--- a/arch/ppc/syslib/ocp.c
+++ b/arch/ppc/syslib/ocp.c
@@ -20,7 +20,7 @@
20 * of peripherals are found on embedded SoC (System On a Chip) 20 * of peripherals are found on embedded SoC (System On a Chip)
21 * processors or highly integrated system controllers that have 21 * processors or highly integrated system controllers that have
22 * a host bridge and many peripherals. Common examples where 22 * a host bridge and many peripherals. Common examples where
23 * this is already used include the PPC4xx, PPC85xx, MPC52xx, 23 * this is already used include the PPC4xx, MPC52xx,
24 * and MV64xxx parts. 24 * and MV64xxx parts.
25 * 25 *
26 * This subsystem creates a standard OCP bus type within the 26 * This subsystem creates a standard OCP bus type within the
@@ -376,7 +376,7 @@ ocp_remove_one_device(unsigned int vendor, unsigned int function, int index)
376 376
377 down_write(&ocp_devices_sem); 377 down_write(&ocp_devices_sem);
378 dev = __ocp_find_device(vendor, function, index); 378 dev = __ocp_find_device(vendor, function, index);
379 list_del((struct list_head *)dev); 379 list_del(&dev->link);
380 up_write(&ocp_devices_sem); 380 up_write(&ocp_devices_sem);
381 381
382 DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)... done.\n", vendor, function, index)); 382 DBG(("ocp: ocp_remove_one_device(vendor: %x, function: %x, index: %d)... done.\n", vendor, function, index));
diff --git a/arch/ppc/syslib/open_pic.c b/arch/ppc/syslib/open_pic.c
index da36522d327a..67dffe27b5c3 100644
--- a/arch/ppc/syslib/open_pic.c
+++ b/arch/ppc/syslib/open_pic.c
@@ -24,7 +24,7 @@
24 24
25#include "open_pic_defs.h" 25#include "open_pic_defs.h"
26 26
27#if defined(CONFIG_PRPMC800) || defined(CONFIG_85xx) 27#if defined(CONFIG_PRPMC800)
28#define OPENPIC_BIG_ENDIAN 28#define OPENPIC_BIG_ENDIAN
29#endif 29#endif
30 30
diff --git a/arch/ppc/syslib/ppc83xx_pci.h b/arch/ppc/syslib/ppc83xx_pci.h
deleted file mode 100644
index ec691640f6be..000000000000
--- a/arch/ppc/syslib/ppc83xx_pci.h
+++ /dev/null
@@ -1,151 +0,0 @@
1/* Created by Tony Li <tony.li@freescale.com>
2 * Copyright (c) 2005 freescale semiconductor
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * This program is distributed in the hope that it will be useful, but
10 * WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
12 * General Public License for more details.
13 *
14 * You should have received a copy of the GNU General Public License along
15 * with this program; if not, write to the Free Software Foundation, Inc.,
16 * 675 Mass Ave, Cambridge, MA 02139, USA.
17 */
18
19#ifndef __PPC_SYSLIB_PPC83XX_PCI_H
20#define __PPC_SYSLIB_PPC83XX_PCI_H
21
22typedef struct immr_clk {
23 u32 spmr; /* system PLL mode Register */
24 u32 occr; /* output clock control Register */
25 u32 sccr; /* system clock control Register */
26 u8 res0[0xF4];
27} immr_clk_t;
28
29/*
30 * Sequencer
31 */
32typedef struct immr_ios {
33 u32 potar0;
34 u8 res0[4];
35 u32 pobar0;
36 u8 res1[4];
37 u32 pocmr0;
38 u8 res2[4];
39 u32 potar1;
40 u8 res3[4];
41 u32 pobar1;
42 u8 res4[4];
43 u32 pocmr1;
44 u8 res5[4];
45 u32 potar2;
46 u8 res6[4];
47 u32 pobar2;
48 u8 res7[4];
49 u32 pocmr2;
50 u8 res8[4];
51 u32 potar3;
52 u8 res9[4];
53 u32 pobar3;
54 u8 res10[4];
55 u32 pocmr3;
56 u8 res11[4];
57 u32 potar4;
58 u8 res12[4];
59 u32 pobar4;
60 u8 res13[4];
61 u32 pocmr4;
62 u8 res14[4];
63 u32 potar5;
64 u8 res15[4];
65 u32 pobar5;
66 u8 res16[4];
67 u32 pocmr5;
68 u8 res17[4];
69 u8 res18[0x60];
70 u32 pmcr;
71 u8 res19[4];
72 u32 dtcr;
73 u8 res20[4];
74} immr_ios_t;
75#define POTAR_TA_MASK 0x000fffff
76#define POBAR_BA_MASK 0x000fffff
77#define POCMR_EN 0x80000000
78#define POCMR_IO 0x40000000 /* 0--memory space 1--I/O space */
79#define POCMR_SE 0x20000000 /* streaming enable */
80#define POCMR_DST 0x10000000 /* 0--PCI1 1--PCI2 */
81#define POCMR_CM_MASK 0x000fffff
82
83/*
84 * PCI Controller Control and Status Registers
85 */
86typedef struct immr_pcictrl {
87 u32 esr;
88 u32 ecdr;
89 u32 eer;
90 u32 eatcr;
91 u32 eacr;
92 u32 eeacr;
93 u32 edlcr;
94 u32 edhcr;
95 u32 gcr;
96 u32 ecr;
97 u32 gsr;
98 u8 res0[12];
99 u32 pitar2;
100 u8 res1[4];
101 u32 pibar2;
102 u32 piebar2;
103 u32 piwar2;
104 u8 res2[4];
105 u32 pitar1;
106 u8 res3[4];
107 u32 pibar1;
108 u32 piebar1;
109 u32 piwar1;
110 u8 res4[4];
111 u32 pitar0;
112 u8 res5[4];
113 u32 pibar0;
114 u8 res6[4];
115 u32 piwar0;
116 u8 res7[132];
117} immr_pcictrl_t;
118#define PITAR_TA_MASK 0x000fffff
119#define PIBAR_MASK 0xffffffff
120#define PIEBAR_EBA_MASK 0x000fffff
121#define PIWAR_EN 0x80000000
122#define PIWAR_PF 0x20000000
123#define PIWAR_RTT_MASK 0x000f0000
124#define PIWAR_RTT_NO_SNOOP 0x00040000
125#define PIWAR_RTT_SNOOP 0x00050000
126#define PIWAR_WTT_MASK 0x0000f000
127#define PIWAR_WTT_NO_SNOOP 0x00004000
128#define PIWAR_WTT_SNOOP 0x00005000
129#define PIWAR_IWS_MASK 0x0000003F
130#define PIWAR_IWS_4K 0x0000000B
131#define PIWAR_IWS_8K 0x0000000C
132#define PIWAR_IWS_16K 0x0000000D
133#define PIWAR_IWS_32K 0x0000000E
134#define PIWAR_IWS_64K 0x0000000F
135#define PIWAR_IWS_128K 0x00000010
136#define PIWAR_IWS_256K 0x00000011
137#define PIWAR_IWS_512K 0x00000012
138#define PIWAR_IWS_1M 0x00000013
139#define PIWAR_IWS_2M 0x00000014
140#define PIWAR_IWS_4M 0x00000015
141#define PIWAR_IWS_8M 0x00000016
142#define PIWAR_IWS_16M 0x00000017
143#define PIWAR_IWS_32M 0x00000018
144#define PIWAR_IWS_64M 0x00000019
145#define PIWAR_IWS_128M 0x0000001A
146#define PIWAR_IWS_256M 0x0000001B
147#define PIWAR_IWS_512M 0x0000001C
148#define PIWAR_IWS_1G 0x0000001D
149#define PIWAR_IWS_2G 0x0000001E
150
151#endif /* __PPC_SYSLIB_PPC83XX_PCI_H */
diff --git a/arch/ppc/syslib/ppc83xx_setup.c b/arch/ppc/syslib/ppc83xx_setup.c
deleted file mode 100644
index ec466db52114..000000000000
--- a/arch/ppc/syslib/ppc83xx_setup.c
+++ /dev/null
@@ -1,411 +0,0 @@
1/*
2 * MPC83XX common board code
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 *
22 * Added PCI support -- Tony Li <tony.li@freescale.com>
23 */
24
25#include <linux/types.h>
26#include <linux/module.h>
27#include <linux/init.h>
28#include <linux/pci.h>
29#include <linux/serial.h>
30#include <linux/tty.h> /* for linux/serial_core.h */
31#include <linux/serial_core.h>
32#include <linux/serial_8250.h>
33
34#include <asm/time.h>
35#include <asm/mpc83xx.h>
36#include <asm/mmu.h>
37#include <asm/ppc_sys.h>
38#include <asm/kgdb.h>
39#include <asm/delay.h>
40#include <asm/machdep.h>
41
42#include <syslib/ppc83xx_setup.h>
43#if defined(CONFIG_PCI)
44#include <asm/delay.h>
45#include <syslib/ppc83xx_pci.h>
46#endif
47
48phys_addr_t immrbar;
49
50/* Return the amount of memory */
51unsigned long __init
52mpc83xx_find_end_of_memory(void)
53{
54 bd_t *binfo;
55
56 binfo = (bd_t *) __res;
57
58 return binfo->bi_memsize;
59}
60
61long __init
62mpc83xx_time_init(void)
63{
64#define SPCR_OFFS 0x00000110
65#define SPCR_TBEN 0x00400000
66
67 bd_t *binfo = (bd_t *)__res;
68 u32 *spcr = ioremap(binfo->bi_immr_base + SPCR_OFFS, 4);
69
70 *spcr |= SPCR_TBEN;
71
72 iounmap(spcr);
73
74 return 0;
75}
76
77/* The decrementer counts at the system (internal) clock freq divided by 4 */
78void __init
79mpc83xx_calibrate_decr(void)
80{
81 bd_t *binfo = (bd_t *) __res;
82 unsigned int freq, divisor;
83
84 freq = binfo->bi_busfreq;
85 divisor = 4;
86 tb_ticks_per_jiffy = freq / HZ / divisor;
87 tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
88}
89
90#ifdef CONFIG_SERIAL_8250
91void __init
92mpc83xx_early_serial_map(void)
93{
94#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
95 struct uart_port serial_req;
96#endif
97 struct plat_serial8250_port *pdata;
98 bd_t *binfo = (bd_t *) __res;
99 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC83xx_DUART);
100
101 /* Setup serial port access */
102 pdata[0].uartclk = binfo->bi_busfreq;
103 pdata[0].mapbase += binfo->bi_immr_base;
104 pdata[0].membase = ioremap(pdata[0].mapbase, 0x100);
105
106#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
107 memset(&serial_req, 0, sizeof (serial_req));
108 serial_req.iotype = UPIO_MEM;
109 serial_req.mapbase = pdata[0].mapbase;
110 serial_req.membase = pdata[0].membase;
111 serial_req.regshift = 0;
112
113 gen550_init(0, &serial_req);
114#endif
115
116 pdata[1].uartclk = binfo->bi_busfreq;
117 pdata[1].mapbase += binfo->bi_immr_base;
118 pdata[1].membase = ioremap(pdata[1].mapbase, 0x100);
119
120#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
121 /* Assume gen550_init() doesn't modify serial_req */
122 serial_req.mapbase = pdata[1].mapbase;
123 serial_req.membase = pdata[1].membase;
124
125 gen550_init(1, &serial_req);
126#endif
127}
128#endif
129
130void
131mpc83xx_restart(char *cmd)
132{
133 volatile unsigned char __iomem *reg;
134 unsigned char tmp;
135
136 reg = ioremap(BCSR_PHYS_ADDR, BCSR_SIZE);
137
138 local_irq_disable();
139
140 /*
141 * Unlock the BCSR bits so a PRST will update the contents.
142 * Otherwise the reset asserts but doesn't clear.
143 */
144 tmp = in_8(reg + BCSR_MISC_REG3_OFF);
145 tmp |= BCSR_MISC_REG3_CNFLOCK; /* low true, high false */
146 out_8(reg + BCSR_MISC_REG3_OFF, tmp);
147
148 /*
149 * Trigger a reset via a low->high transition of the
150 * PORESET bit.
151 */
152 tmp = in_8(reg + BCSR_MISC_REG2_OFF);
153 tmp &= ~BCSR_MISC_REG2_PORESET;
154 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
155
156 udelay(1);
157
158 tmp |= BCSR_MISC_REG2_PORESET;
159 out_8(reg + BCSR_MISC_REG2_OFF, tmp);
160
161 for(;;);
162}
163
164void
165mpc83xx_power_off(void)
166{
167 local_irq_disable();
168 for(;;);
169}
170
171void
172mpc83xx_halt(void)
173{
174 local_irq_disable();
175 for(;;);
176}
177
178#if defined(CONFIG_PCI)
179void __init
180mpc83xx_setup_pci1(struct pci_controller *hose)
181{
182 u16 reg16;
183 volatile immr_pcictrl_t * pci_ctrl;
184 volatile immr_ios_t * ios;
185 bd_t *binfo = (bd_t *) __res;
186
187 pci_ctrl = ioremap(binfo->bi_immr_base + 0x8500, sizeof(immr_pcictrl_t));
188 ios = ioremap(binfo->bi_immr_base + 0x8400, sizeof(immr_ios_t));
189
190 /*
191 * Configure PCI Outbound Translation Windows
192 */
193 ios->potar0 = (MPC83xx_PCI1_LOWER_MEM >> 12) & POTAR_TA_MASK;
194 ios->pobar0 = (MPC83xx_PCI1_LOWER_MEM >> 12) & POBAR_BA_MASK;
195 ios->pocmr0 = POCMR_EN |
196 (((0xffffffff - (MPC83xx_PCI1_UPPER_MEM -
197 MPC83xx_PCI1_LOWER_MEM)) >> 12) & POCMR_CM_MASK);
198
199 /* mapped to PCI1 IO space */
200 ios->potar1 = (MPC83xx_PCI1_LOWER_IO >> 12) & POTAR_TA_MASK;
201 ios->pobar1 = (MPC83xx_PCI1_IO_BASE >> 12) & POBAR_BA_MASK;
202 ios->pocmr1 = POCMR_EN | POCMR_IO |
203 (((0xffffffff - (MPC83xx_PCI1_UPPER_IO -
204 MPC83xx_PCI1_LOWER_IO)) >> 12) & POCMR_CM_MASK);
205
206 /*
207 * Configure PCI Inbound Translation Windows
208 */
209 pci_ctrl->pitar1 = 0x0;
210 pci_ctrl->pibar1 = 0x0;
211 pci_ctrl->piebar1 = 0x0;
212 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G;
213
214 /*
215 * Release PCI RST signal
216 */
217 pci_ctrl->gcr = 0;
218 udelay(2000);
219 pci_ctrl->gcr = 1;
220 udelay(2000);
221
222 reg16 = 0xff;
223 early_read_config_word(hose, hose->first_busno, 0, PCI_COMMAND, &reg16);
224 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
225 early_write_config_word(hose, hose->first_busno, 0, PCI_COMMAND, reg16);
226
227 /*
228 * Clear non-reserved bits in status register.
229 */
230 early_write_config_word(hose, hose->first_busno, 0, PCI_STATUS, 0xffff);
231 early_write_config_byte(hose, hose->first_busno, 0, PCI_LATENCY_TIMER, 0x80);
232
233 iounmap(pci_ctrl);
234 iounmap(ios);
235}
236
237void __init
238mpc83xx_setup_pci2(struct pci_controller *hose)
239{
240 u16 reg16;
241 volatile immr_pcictrl_t * pci_ctrl;
242 volatile immr_ios_t * ios;
243 bd_t *binfo = (bd_t *) __res;
244
245 pci_ctrl = ioremap(binfo->bi_immr_base + 0x8600, sizeof(immr_pcictrl_t));
246 ios = ioremap(binfo->bi_immr_base + 0x8400, sizeof(immr_ios_t));
247
248 /*
249 * Configure PCI Outbound Translation Windows
250 */
251 ios->potar3 = (MPC83xx_PCI2_LOWER_MEM >> 12) & POTAR_TA_MASK;
252 ios->pobar3 = (MPC83xx_PCI2_LOWER_MEM >> 12) & POBAR_BA_MASK;
253 ios->pocmr3 = POCMR_EN | POCMR_DST |
254 (((0xffffffff - (MPC83xx_PCI2_UPPER_MEM -
255 MPC83xx_PCI2_LOWER_MEM)) >> 12) & POCMR_CM_MASK);
256
257 /* mapped to PCI2 IO space */
258 ios->potar4 = (MPC83xx_PCI2_LOWER_IO >> 12) & POTAR_TA_MASK;
259 ios->pobar4 = (MPC83xx_PCI2_IO_BASE >> 12) & POBAR_BA_MASK;
260 ios->pocmr4 = POCMR_EN | POCMR_DST | POCMR_IO |
261 (((0xffffffff - (MPC83xx_PCI2_UPPER_IO -
262 MPC83xx_PCI2_LOWER_IO)) >> 12) & POCMR_CM_MASK);
263
264 /*
265 * Configure PCI Inbound Translation Windows
266 */
267 pci_ctrl->pitar1 = 0x0;
268 pci_ctrl->pibar1 = 0x0;
269 pci_ctrl->piebar1 = 0x0;
270 pci_ctrl->piwar1 = PIWAR_EN | PIWAR_PF | PIWAR_RTT_SNOOP | PIWAR_WTT_SNOOP | PIWAR_IWS_2G;
271
272 /*
273 * Release PCI RST signal
274 */
275 pci_ctrl->gcr = 0;
276 udelay(2000);
277 pci_ctrl->gcr = 1;
278 udelay(2000);
279
280 reg16 = 0xff;
281 early_read_config_word(hose, hose->first_busno, 0, PCI_COMMAND, &reg16);
282 reg16 |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
283 early_write_config_word(hose, hose->first_busno, 0, PCI_COMMAND, reg16);
284
285 /*
286 * Clear non-reserved bits in status register.
287 */
288 early_write_config_word(hose, hose->first_busno, 0, PCI_STATUS, 0xffff);
289 early_write_config_byte(hose, hose->first_busno, 0, PCI_LATENCY_TIMER, 0x80);
290
291 iounmap(pci_ctrl);
292 iounmap(ios);
293}
294
295/*
296 * PCI buses can be enabled only if SYS board combinates with PIB
297 * (Platform IO Board) board which provide 3 PCI slots. There is 2 PCI buses
298 * and 3 PCI slots, so people must configure the routes between them before
299 * enable PCI bus. This routes are under the control of PCA9555PW device which
300 * can be accessed via I2C bus 2 and are configured by firmware. Refer to
301 * Freescale to get more information about firmware configuration.
302 */
303
304extern int mpc83xx_exclude_device(u_char bus, u_char devfn);
305extern int mpc83xx_map_irq(struct pci_dev *dev, unsigned char idsel,
306 unsigned char pin);
307void __init
308mpc83xx_setup_hose(void)
309{
310 u32 val32;
311 volatile immr_clk_t * clk;
312 struct pci_controller * hose1;
313#ifdef CONFIG_MPC83xx_PCI2
314 struct pci_controller * hose2;
315#endif
316 bd_t * binfo = (bd_t *)__res;
317
318 clk = ioremap(binfo->bi_immr_base + 0xA00,
319 sizeof(immr_clk_t));
320
321 /*
322 * Configure PCI controller and PCI_CLK_OUTPUT both in 66M mode
323 */
324 val32 = clk->occr;
325 udelay(2000);
326 clk->occr = 0xff000000;
327 udelay(2000);
328
329 iounmap(clk);
330
331 hose1 = pcibios_alloc_controller();
332 if(!hose1)
333 return;
334
335 ppc_md.pci_swizzle = common_swizzle;
336 ppc_md.pci_map_irq = mpc83xx_map_irq;
337
338 hose1->bus_offset = 0;
339 hose1->first_busno = 0;
340 hose1->last_busno = 0xff;
341
342 setup_indirect_pci(hose1, binfo->bi_immr_base + PCI1_CFG_ADDR_OFFSET,
343 binfo->bi_immr_base + PCI1_CFG_DATA_OFFSET);
344 hose1->set_cfg_type = 1;
345
346 mpc83xx_setup_pci1(hose1);
347
348 hose1->pci_mem_offset = MPC83xx_PCI1_MEM_OFFSET;
349 hose1->mem_space.start = MPC83xx_PCI1_LOWER_MEM;
350 hose1->mem_space.end = MPC83xx_PCI1_UPPER_MEM;
351
352 hose1->io_base_phys = MPC83xx_PCI1_IO_BASE;
353 hose1->io_space.start = MPC83xx_PCI1_LOWER_IO;
354 hose1->io_space.end = MPC83xx_PCI1_UPPER_IO;
355#ifdef CONFIG_MPC83xx_PCI2
356 isa_io_base = (unsigned long)ioremap(MPC83xx_PCI1_IO_BASE,
357 MPC83xx_PCI1_IO_SIZE + MPC83xx_PCI2_IO_SIZE);
358#else
359 isa_io_base = (unsigned long)ioremap(MPC83xx_PCI1_IO_BASE,
360 MPC83xx_PCI1_IO_SIZE);
361#endif /* CONFIG_MPC83xx_PCI2 */
362 hose1->io_base_virt = (void *)isa_io_base;
363 /* setup resources */
364 pci_init_resource(&hose1->io_resource,
365 MPC83xx_PCI1_LOWER_IO,
366 MPC83xx_PCI1_UPPER_IO,
367 IORESOURCE_IO, "PCI host bridge 1");
368 pci_init_resource(&hose1->mem_resources[0],
369 MPC83xx_PCI1_LOWER_MEM,
370 MPC83xx_PCI1_UPPER_MEM,
371 IORESOURCE_MEM, "PCI host bridge 1");
372
373 ppc_md.pci_exclude_device = mpc83xx_exclude_device;
374 hose1->last_busno = pciauto_bus_scan(hose1, hose1->first_busno);
375
376#ifdef CONFIG_MPC83xx_PCI2
377 hose2 = pcibios_alloc_controller();
378 if(!hose2)
379 return;
380
381 hose2->bus_offset = hose1->last_busno + 1;
382 hose2->first_busno = hose1->last_busno + 1;
383 hose2->last_busno = 0xff;
384 setup_indirect_pci(hose2, binfo->bi_immr_base + PCI2_CFG_ADDR_OFFSET,
385 binfo->bi_immr_base + PCI2_CFG_DATA_OFFSET);
386 hose2->set_cfg_type = 1;
387
388 mpc83xx_setup_pci2(hose2);
389
390 hose2->pci_mem_offset = MPC83xx_PCI2_MEM_OFFSET;
391 hose2->mem_space.start = MPC83xx_PCI2_LOWER_MEM;
392 hose2->mem_space.end = MPC83xx_PCI2_UPPER_MEM;
393
394 hose2->io_base_phys = MPC83xx_PCI2_IO_BASE;
395 hose2->io_space.start = MPC83xx_PCI2_LOWER_IO;
396 hose2->io_space.end = MPC83xx_PCI2_UPPER_IO;
397 hose2->io_base_virt = (void *)(isa_io_base + MPC83xx_PCI1_IO_SIZE);
398 /* setup resources */
399 pci_init_resource(&hose2->io_resource,
400 MPC83xx_PCI2_LOWER_IO,
401 MPC83xx_PCI2_UPPER_IO,
402 IORESOURCE_IO, "PCI host bridge 2");
403 pci_init_resource(&hose2->mem_resources[0],
404 MPC83xx_PCI2_LOWER_MEM,
405 MPC83xx_PCI2_UPPER_MEM,
406 IORESOURCE_MEM, "PCI host bridge 2");
407
408 hose2->last_busno = pciauto_bus_scan(hose2, hose2->first_busno);
409#endif /* CONFIG_MPC83xx_PCI2 */
410}
411#endif /*CONFIG_PCI*/
diff --git a/arch/ppc/syslib/ppc83xx_setup.h b/arch/ppc/syslib/ppc83xx_setup.h
deleted file mode 100644
index b918a2d245ea..000000000000
--- a/arch/ppc/syslib/ppc83xx_setup.h
+++ /dev/null
@@ -1,55 +0,0 @@
1/*
2 * MPC83XX common board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2005 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 * This program is distributed in the hope that it will be useful, but
14 * WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
17 *
18 * You should have received a copy of the GNU General Public License along
19 * with this program; if not, write to the Free Software Foundation, Inc.,
20 * 675 Mass Ave, Cambridge, MA 02139, USA.
21 */
22
23#ifndef __PPC_SYSLIB_PPC83XX_SETUP_H
24#define __PPC_SYSLIB_PPC83XX_SETUP_H
25
26#include <linux/init.h>
27
28extern unsigned long mpc83xx_find_end_of_memory(void) __init;
29extern long mpc83xx_time_init(void) __init;
30extern void mpc83xx_calibrate_decr(void) __init;
31extern void mpc83xx_early_serial_map(void) __init;
32extern void mpc83xx_restart(char *cmd);
33extern void mpc83xx_power_off(void);
34extern void mpc83xx_halt(void);
35extern void mpc83xx_setup_hose(void) __init;
36
37/* PCI config */
38#define PCI1_CFG_ADDR_OFFSET (0x8300)
39#define PCI1_CFG_DATA_OFFSET (0x8304)
40
41#define PCI2_CFG_ADDR_OFFSET (0x8380)
42#define PCI2_CFG_DATA_OFFSET (0x8384)
43
44/* Serial Config */
45#ifdef CONFIG_SERIAL_MANY_PORTS
46#define RS_TABLE_SIZE 64
47#else
48#define RS_TABLE_SIZE 2
49#endif
50
51#ifndef BASE_BAUD
52#define BASE_BAUD 115200
53#endif
54
55#endif /* __PPC_SYSLIB_PPC83XX_SETUP_H */
diff --git a/arch/ppc/syslib/ppc85xx_common.c b/arch/ppc/syslib/ppc85xx_common.c
deleted file mode 100644
index e5ac699e7316..000000000000
--- a/arch/ppc/syslib/ppc85xx_common.c
+++ /dev/null
@@ -1,38 +0,0 @@
1/*
2 * MPC85xx support routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/init.h>
17
18#include <asm/mpc85xx.h>
19#include <asm/mmu.h>
20
21/* ************************************************************************ */
22/* Return the value of CCSRBAR for the current board */
23
24phys_addr_t
25get_ccsrbar(void)
26{
27 return BOARD_CCSRBAR;
28}
29
30EXPORT_SYMBOL(get_ccsrbar);
31
32/* For now this is a pass through */
33phys_addr_t fixup_bigphys_addr(phys_addr_t addr, phys_addr_t size)
34{
35 return addr;
36};
37EXPORT_SYMBOL(fixup_bigphys_addr);
38
diff --git a/arch/ppc/syslib/ppc85xx_common.h b/arch/ppc/syslib/ppc85xx_common.h
deleted file mode 100644
index 4fc405425113..000000000000
--- a/arch/ppc/syslib/ppc85xx_common.h
+++ /dev/null
@@ -1,22 +0,0 @@
1/*
2 * MPC85xx support routines
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#ifndef __PPC_SYSLIB_PPC85XX_COMMON_H
15#define __PPC_SYSLIB_PPC85XX_COMMON_H
16
17#include <linux/init.h>
18
19/* Provide access to ccsrbar for any modules, etc */
20phys_addr_t get_ccsrbar(void);
21
22#endif /* __PPC_SYSLIB_PPC85XX_COMMON_H */
diff --git a/arch/ppc/syslib/ppc85xx_rio.c b/arch/ppc/syslib/ppc85xx_rio.c
deleted file mode 100644
index af2425e4655f..000000000000
--- a/arch/ppc/syslib/ppc85xx_rio.c
+++ /dev/null
@@ -1,932 +0,0 @@
1/*
2 * MPC85xx RapidIO support
3 *
4 * Copyright 2005 MontaVista Software, Inc.
5 * Matt Porter <mporter@kernel.crashing.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#include <linux/init.h>
14#include <linux/module.h>
15#include <linux/types.h>
16#include <linux/dma-mapping.h>
17#include <linux/interrupt.h>
18#include <linux/rio.h>
19#include <linux/rio_drv.h>
20
21#include <asm/io.h>
22
23#define RIO_REGS_BASE (CCSRBAR + 0xc0000)
24#define RIO_ATMU_REGS_OFFSET 0x10c00
25#define RIO_MSG_REGS_OFFSET 0x11000
26#define RIO_MAINT_WIN_SIZE 0x400000
27#define RIO_DBELL_WIN_SIZE 0x1000
28
29#define RIO_MSG_OMR_MUI 0x00000002
30#define RIO_MSG_OSR_TE 0x00000080
31#define RIO_MSG_OSR_QOI 0x00000020
32#define RIO_MSG_OSR_QFI 0x00000010
33#define RIO_MSG_OSR_MUB 0x00000004
34#define RIO_MSG_OSR_EOMI 0x00000002
35#define RIO_MSG_OSR_QEI 0x00000001
36
37#define RIO_MSG_IMR_MI 0x00000002
38#define RIO_MSG_ISR_TE 0x00000080
39#define RIO_MSG_ISR_QFI 0x00000010
40#define RIO_MSG_ISR_DIQI 0x00000001
41
42#define RIO_MSG_DESC_SIZE 32
43#define RIO_MSG_BUFFER_SIZE 4096
44#define RIO_MIN_TX_RING_SIZE 2
45#define RIO_MAX_TX_RING_SIZE 2048
46#define RIO_MIN_RX_RING_SIZE 2
47#define RIO_MAX_RX_RING_SIZE 2048
48
49#define DOORBELL_DMR_DI 0x00000002
50#define DOORBELL_DSR_TE 0x00000080
51#define DOORBELL_DSR_QFI 0x00000010
52#define DOORBELL_DSR_DIQI 0x00000001
53#define DOORBELL_TID_OFFSET 0x03
54#define DOORBELL_SID_OFFSET 0x05
55#define DOORBELL_INFO_OFFSET 0x06
56
57#define DOORBELL_MESSAGE_SIZE 0x08
58#define DBELL_SID(x) (*(u8 *)(x + DOORBELL_SID_OFFSET))
59#define DBELL_TID(x) (*(u8 *)(x + DOORBELL_TID_OFFSET))
60#define DBELL_INF(x) (*(u16 *)(x + DOORBELL_INFO_OFFSET))
61
62struct rio_atmu_regs {
63 u32 rowtar;
64 u32 pad1;
65 u32 rowbar;
66 u32 pad2;
67 u32 rowar;
68 u32 pad3[3];
69};
70
71struct rio_msg_regs {
72 u32 omr;
73 u32 osr;
74 u32 pad1;
75 u32 odqdpar;
76 u32 pad2;
77 u32 osar;
78 u32 odpr;
79 u32 odatr;
80 u32 odcr;
81 u32 pad3;
82 u32 odqepar;
83 u32 pad4[13];
84 u32 imr;
85 u32 isr;
86 u32 pad5;
87 u32 ifqdpar;
88 u32 pad6;
89 u32 ifqepar;
90 u32 pad7[250];
91 u32 dmr;
92 u32 dsr;
93 u32 pad8;
94 u32 dqdpar;
95 u32 pad9;
96 u32 dqepar;
97 u32 pad10[26];
98 u32 pwmr;
99 u32 pwsr;
100 u32 pad11;
101 u32 pwqbar;
102};
103
104struct rio_tx_desc {
105 u32 res1;
106 u32 saddr;
107 u32 dport;
108 u32 dattr;
109 u32 res2;
110 u32 res3;
111 u32 dwcnt;
112 u32 res4;
113};
114
115static u32 regs_win;
116static struct rio_atmu_regs *atmu_regs;
117static struct rio_atmu_regs *maint_atmu_regs;
118static struct rio_atmu_regs *dbell_atmu_regs;
119static u32 dbell_win;
120static u32 maint_win;
121static struct rio_msg_regs *msg_regs;
122
123static struct rio_dbell_ring {
124 void *virt;
125 dma_addr_t phys;
126} dbell_ring;
127
128static struct rio_msg_tx_ring {
129 void *virt;
130 dma_addr_t phys;
131 void *virt_buffer[RIO_MAX_TX_RING_SIZE];
132 dma_addr_t phys_buffer[RIO_MAX_TX_RING_SIZE];
133 int tx_slot;
134 int size;
135 void *dev_id;
136} msg_tx_ring;
137
138static struct rio_msg_rx_ring {
139 void *virt;
140 dma_addr_t phys;
141 void *virt_buffer[RIO_MAX_RX_RING_SIZE];
142 int rx_slot;
143 int size;
144 void *dev_id;
145} msg_rx_ring;
146
147/**
148 * mpc85xx_rio_doorbell_send - Send a MPC85xx doorbell message
149 * @index: ID of RapidIO interface
150 * @destid: Destination ID of target device
151 * @data: 16-bit info field of RapidIO doorbell message
152 *
153 * Sends a MPC85xx doorbell message. Returns %0 on success or
154 * %-EINVAL on failure.
155 */
156static int mpc85xx_rio_doorbell_send(int index, u16 destid, u16 data)
157{
158 pr_debug("mpc85xx_doorbell_send: index %d destid %4.4x data %4.4x\n",
159 index, destid, data);
160 out_be32((void *)&dbell_atmu_regs->rowtar, destid << 22);
161 out_be16((void *)(dbell_win), data);
162
163 return 0;
164}
165
166/**
167 * mpc85xx_local_config_read - Generate a MPC85xx local config space read
168 * @index: ID of RapdiIO interface
169 * @offset: Offset into configuration space
170 * @len: Length (in bytes) of the maintenance transaction
171 * @data: Value to be read into
172 *
173 * Generates a MPC85xx local configuration space read. Returns %0 on
174 * success or %-EINVAL on failure.
175 */
176static int mpc85xx_local_config_read(int index, u32 offset, int len, u32 * data)
177{
178 pr_debug("mpc85xx_local_config_read: index %d offset %8.8x\n", index,
179 offset);
180 *data = in_be32((void *)(regs_win + offset));
181
182 return 0;
183}
184
185/**
186 * mpc85xx_local_config_write - Generate a MPC85xx local config space write
187 * @index: ID of RapdiIO interface
188 * @offset: Offset into configuration space
189 * @len: Length (in bytes) of the maintenance transaction
190 * @data: Value to be written
191 *
192 * Generates a MPC85xx local configuration space write. Returns %0 on
193 * success or %-EINVAL on failure.
194 */
195static int mpc85xx_local_config_write(int index, u32 offset, int len, u32 data)
196{
197 pr_debug
198 ("mpc85xx_local_config_write: index %d offset %8.8x data %8.8x\n",
199 index, offset, data);
200 out_be32((void *)(regs_win + offset), data);
201
202 return 0;
203}
204
205/**
206 * mpc85xx_rio_config_read - Generate a MPC85xx read maintenance transaction
207 * @index: ID of RapdiIO interface
208 * @destid: Destination ID of transaction
209 * @hopcount: Number of hops to target device
210 * @offset: Offset into configuration space
211 * @len: Length (in bytes) of the maintenance transaction
212 * @val: Location to be read into
213 *
214 * Generates a MPC85xx read maintenance transaction. Returns %0 on
215 * success or %-EINVAL on failure.
216 */
217static int
218mpc85xx_rio_config_read(int index, u16 destid, u8 hopcount, u32 offset, int len,
219 u32 * val)
220{
221 u8 *data;
222
223 pr_debug
224 ("mpc85xx_rio_config_read: index %d destid %d hopcount %d offset %8.8x len %d\n",
225 index, destid, hopcount, offset, len);
226 out_be32((void *)&maint_atmu_regs->rowtar,
227 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
228
229 data = (u8 *) maint_win + offset;
230 switch (len) {
231 case 1:
232 *val = in_8((u8 *) data);
233 break;
234 case 2:
235 *val = in_be16((u16 *) data);
236 break;
237 default:
238 *val = in_be32((u32 *) data);
239 break;
240 }
241
242 return 0;
243}
244
245/**
246 * mpc85xx_rio_config_write - Generate a MPC85xx write maintenance transaction
247 * @index: ID of RapdiIO interface
248 * @destid: Destination ID of transaction
249 * @hopcount: Number of hops to target device
250 * @offset: Offset into configuration space
251 * @len: Length (in bytes) of the maintenance transaction
252 * @val: Value to be written
253 *
254 * Generates an MPC85xx write maintenance transaction. Returns %0 on
255 * success or %-EINVAL on failure.
256 */
257static int
258mpc85xx_rio_config_write(int index, u16 destid, u8 hopcount, u32 offset,
259 int len, u32 val)
260{
261 u8 *data;
262 pr_debug
263 ("mpc85xx_rio_config_write: index %d destid %d hopcount %d offset %8.8x len %d val %8.8x\n",
264 index, destid, hopcount, offset, len, val);
265 out_be32((void *)&maint_atmu_regs->rowtar,
266 (destid << 22) | (hopcount << 12) | ((offset & ~0x3) >> 9));
267
268 data = (u8 *) maint_win + offset;
269 switch (len) {
270 case 1:
271 out_8((u8 *) data, val);
272 break;
273 case 2:
274 out_be16((u16 *) data, val);
275 break;
276 default:
277 out_be32((u32 *) data, val);
278 break;
279 }
280
281 return 0;
282}
283
284/**
285 * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
286 * @mport: Master port with outbound message queue
287 * @rdev: Target of outbound message
288 * @mbox: Outbound mailbox
289 * @buffer: Message to add to outbound queue
290 * @len: Length of message
291 *
292 * Adds the @buffer message to the MPC85xx outbound message queue. Returns
293 * %0 on success or %-EINVAL on failure.
294 */
295int
296rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
297 void *buffer, size_t len)
298{
299 u32 omr;
300 struct rio_tx_desc *desc =
301 (struct rio_tx_desc *)msg_tx_ring.virt + msg_tx_ring.tx_slot;
302 int ret = 0;
303
304 pr_debug
305 ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
306 rdev->destid, mbox, (int)buffer, len);
307
308 if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
309 ret = -EINVAL;
310 goto out;
311 }
312
313 /* Copy and clear rest of buffer */
314 memcpy(msg_tx_ring.virt_buffer[msg_tx_ring.tx_slot], buffer, len);
315 if (len < (RIO_MAX_MSG_SIZE - 4))
316 memset((void *)((u32) msg_tx_ring.
317 virt_buffer[msg_tx_ring.tx_slot] + len), 0,
318 RIO_MAX_MSG_SIZE - len);
319
320 /* Set mbox field for message */
321 desc->dport = mbox & 0x3;
322
323 /* Enable EOMI interrupt, set priority, and set destid */
324 desc->dattr = 0x28000000 | (rdev->destid << 2);
325
326 /* Set transfer size aligned to next power of 2 (in double words) */
327 desc->dwcnt = is_power_of_2(len) ? len : 1 << get_bitmask_order(len);
328
329 /* Set snooping and source buffer address */
330 desc->saddr = 0x00000004 | msg_tx_ring.phys_buffer[msg_tx_ring.tx_slot];
331
332 /* Increment enqueue pointer */
333 omr = in_be32((void *)&msg_regs->omr);
334 out_be32((void *)&msg_regs->omr, omr | RIO_MSG_OMR_MUI);
335
336 /* Go to next descriptor */
337 if (++msg_tx_ring.tx_slot == msg_tx_ring.size)
338 msg_tx_ring.tx_slot = 0;
339
340 out:
341 return ret;
342}
343
344EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
345
346/**
347 * mpc85xx_rio_tx_handler - MPC85xx outbound message interrupt handler
348 * @irq: Linux interrupt number
349 * @dev_instance: Pointer to interrupt-specific data
350 *
351 * Handles outbound message interrupts. Executes a register outbound
352 * mailbox event handler and acks the interrupt occurrence.
353 */
354static irqreturn_t
355mpc85xx_rio_tx_handler(int irq, void *dev_instance)
356{
357 int osr;
358 struct rio_mport *port = (struct rio_mport *)dev_instance;
359
360 osr = in_be32((void *)&msg_regs->osr);
361
362 if (osr & RIO_MSG_OSR_TE) {
363 pr_info("RIO: outbound message transmission error\n");
364 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_TE);
365 goto out;
366 }
367
368 if (osr & RIO_MSG_OSR_QOI) {
369 pr_info("RIO: outbound message queue overflow\n");
370 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_QOI);
371 goto out;
372 }
373
374 if (osr & RIO_MSG_OSR_EOMI) {
375 u32 dqp = in_be32((void *)&msg_regs->odqdpar);
376 int slot = (dqp - msg_tx_ring.phys) >> 5;
377 port->outb_msg[0].mcback(port, msg_tx_ring.dev_id, -1, slot);
378
379 /* Ack the end-of-message interrupt */
380 out_be32((void *)&msg_regs->osr, RIO_MSG_OSR_EOMI);
381 }
382
383 out:
384 return IRQ_HANDLED;
385}
386
387/**
388 * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
389 * @mport: Master port implementing the outbound message unit
390 * @dev_id: Device specific pointer to pass on event
391 * @mbox: Mailbox to open
392 * @entries: Number of entries in the outbound mailbox ring
393 *
394 * Initializes buffer ring, request the outbound message interrupt,
395 * and enables the outbound message unit. Returns %0 on success and
396 * %-EINVAL or %-ENOMEM on failure.
397 */
398int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
399{
400 int i, j, rc = 0;
401
402 if ((entries < RIO_MIN_TX_RING_SIZE) ||
403 (entries > RIO_MAX_TX_RING_SIZE) || (!is_power_of_2(entries))) {
404 rc = -EINVAL;
405 goto out;
406 }
407
408 /* Initialize shadow copy ring */
409 msg_tx_ring.dev_id = dev_id;
410 msg_tx_ring.size = entries;
411
412 for (i = 0; i < msg_tx_ring.size; i++) {
413 if (!
414 (msg_tx_ring.virt_buffer[i] =
415 dma_alloc_coherent(NULL, RIO_MSG_BUFFER_SIZE,
416 &msg_tx_ring.phys_buffer[i],
417 GFP_KERNEL))) {
418 rc = -ENOMEM;
419 for (j = 0; j < msg_tx_ring.size; j++)
420 if (msg_tx_ring.virt_buffer[j])
421 dma_free_coherent(NULL,
422 RIO_MSG_BUFFER_SIZE,
423 msg_tx_ring.
424 virt_buffer[j],
425 msg_tx_ring.
426 phys_buffer[j]);
427 goto out;
428 }
429 }
430
431 /* Initialize outbound message descriptor ring */
432 if (!(msg_tx_ring.virt = dma_alloc_coherent(NULL,
433 msg_tx_ring.size *
434 RIO_MSG_DESC_SIZE,
435 &msg_tx_ring.phys,
436 GFP_KERNEL))) {
437 rc = -ENOMEM;
438 goto out_dma;
439 }
440 memset(msg_tx_ring.virt, 0, msg_tx_ring.size * RIO_MSG_DESC_SIZE);
441 msg_tx_ring.tx_slot = 0;
442
443 /* Point dequeue/enqueue pointers at first entry in ring */
444 out_be32((void *)&msg_regs->odqdpar, msg_tx_ring.phys);
445 out_be32((void *)&msg_regs->odqepar, msg_tx_ring.phys);
446
447 /* Configure for snooping */
448 out_be32((void *)&msg_regs->osar, 0x00000004);
449
450 /* Clear interrupt status */
451 out_be32((void *)&msg_regs->osr, 0x000000b3);
452
453 /* Hook up outbound message handler */
454 if ((rc =
455 request_irq(MPC85xx_IRQ_RIO_TX, mpc85xx_rio_tx_handler, 0,
456 "msg_tx", (void *)mport)) < 0)
457 goto out_irq;
458
459 /*
460 * Configure outbound message unit
461 * Snooping
462 * Interrupts (all enabled, except QEIE)
463 * Chaining mode
464 * Disable
465 */
466 out_be32((void *)&msg_regs->omr, 0x00100220);
467
468 /* Set number of entries */
469 out_be32((void *)&msg_regs->omr,
470 in_be32((void *)&msg_regs->omr) |
471 ((get_bitmask_order(entries) - 2) << 12));
472
473 /* Now enable the unit */
474 out_be32((void *)&msg_regs->omr, in_be32((void *)&msg_regs->omr) | 0x1);
475
476 out:
477 return rc;
478
479 out_irq:
480 dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
481 msg_tx_ring.virt, msg_tx_ring.phys);
482
483 out_dma:
484 for (i = 0; i < msg_tx_ring.size; i++)
485 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
486 msg_tx_ring.virt_buffer[i],
487 msg_tx_ring.phys_buffer[i]);
488
489 return rc;
490}
491
492/**
493 * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
494 * @mport: Master port implementing the outbound message unit
495 * @mbox: Mailbox to close
496 *
497 * Disables the outbound message unit, free all buffers, and
498 * frees the outbound message interrupt.
499 */
500void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
501{
502 /* Disable inbound message unit */
503 out_be32((void *)&msg_regs->omr, 0);
504
505 /* Free ring */
506 dma_free_coherent(NULL, msg_tx_ring.size * RIO_MSG_DESC_SIZE,
507 msg_tx_ring.virt, msg_tx_ring.phys);
508
509 /* Free interrupt */
510 free_irq(MPC85xx_IRQ_RIO_TX, (void *)mport);
511}
512
513/**
514 * mpc85xx_rio_rx_handler - MPC85xx inbound message interrupt handler
515 * @irq: Linux interrupt number
516 * @dev_instance: Pointer to interrupt-specific data
517 *
518 * Handles inbound message interrupts. Executes a registered inbound
519 * mailbox event handler and acks the interrupt occurrence.
520 */
521static irqreturn_t
522mpc85xx_rio_rx_handler(int irq, void *dev_instance)
523{
524 int isr;
525 struct rio_mport *port = (struct rio_mport *)dev_instance;
526
527 isr = in_be32((void *)&msg_regs->isr);
528
529 if (isr & RIO_MSG_ISR_TE) {
530 pr_info("RIO: inbound message reception error\n");
531 out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_TE);
532 goto out;
533 }
534
535 /* XXX Need to check/dispatch until queue empty */
536 if (isr & RIO_MSG_ISR_DIQI) {
537 /*
538 * We implement *only* mailbox 0, but can receive messages
539 * for any mailbox/letter to that mailbox destination. So,
540 * make the callback with an unknown/invalid mailbox number
541 * argument.
542 */
543 port->inb_msg[0].mcback(port, msg_rx_ring.dev_id, -1, -1);
544
545 /* Ack the queueing interrupt */
546 out_be32((void *)&msg_regs->isr, RIO_MSG_ISR_DIQI);
547 }
548
549 out:
550 return IRQ_HANDLED;
551}
552
553/**
554 * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
555 * @mport: Master port implementing the inbound message unit
556 * @dev_id: Device specific pointer to pass on event
557 * @mbox: Mailbox to open
558 * @entries: Number of entries in the inbound mailbox ring
559 *
560 * Initializes buffer ring, request the inbound message interrupt,
561 * and enables the inbound message unit. Returns %0 on success
562 * and %-EINVAL or %-ENOMEM on failure.
563 */
564int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
565{
566 int i, rc = 0;
567
568 if ((entries < RIO_MIN_RX_RING_SIZE) ||
569 (entries > RIO_MAX_RX_RING_SIZE) || (!is_power_of_2(entries))) {
570 rc = -EINVAL;
571 goto out;
572 }
573
574 /* Initialize client buffer ring */
575 msg_rx_ring.dev_id = dev_id;
576 msg_rx_ring.size = entries;
577 msg_rx_ring.rx_slot = 0;
578 for (i = 0; i < msg_rx_ring.size; i++)
579 msg_rx_ring.virt_buffer[i] = NULL;
580
581 /* Initialize inbound message ring */
582 if (!(msg_rx_ring.virt = dma_alloc_coherent(NULL,
583 msg_rx_ring.size *
584 RIO_MAX_MSG_SIZE,
585 &msg_rx_ring.phys,
586 GFP_KERNEL))) {
587 rc = -ENOMEM;
588 goto out;
589 }
590
591 /* Point dequeue/enqueue pointers at first entry in ring */
592 out_be32((void *)&msg_regs->ifqdpar, (u32) msg_rx_ring.phys);
593 out_be32((void *)&msg_regs->ifqepar, (u32) msg_rx_ring.phys);
594
595 /* Clear interrupt status */
596 out_be32((void *)&msg_regs->isr, 0x00000091);
597
598 /* Hook up inbound message handler */
599 if ((rc =
600 request_irq(MPC85xx_IRQ_RIO_RX, mpc85xx_rio_rx_handler, 0,
601 "msg_rx", (void *)mport)) < 0) {
602 dma_free_coherent(NULL, RIO_MSG_BUFFER_SIZE,
603 msg_tx_ring.virt_buffer[i],
604 msg_tx_ring.phys_buffer[i]);
605 goto out;
606 }
607
608 /*
609 * Configure inbound message unit:
610 * Snooping
611 * 4KB max message size
612 * Unmask all interrupt sources
613 * Disable
614 */
615 out_be32((void *)&msg_regs->imr, 0x001b0060);
616
617 /* Set number of queue entries */
618 out_be32((void *)&msg_regs->imr,
619 in_be32((void *)&msg_regs->imr) |
620 ((get_bitmask_order(entries) - 2) << 12));
621
622 /* Now enable the unit */
623 out_be32((void *)&msg_regs->imr, in_be32((void *)&msg_regs->imr) | 0x1);
624
625 out:
626 return rc;
627}
628
629/**
630 * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
631 * @mport: Master port implementing the inbound message unit
632 * @mbox: Mailbox to close
633 *
634 * Disables the inbound message unit, free all buffers, and
635 * frees the inbound message interrupt.
636 */
637void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
638{
639 /* Disable inbound message unit */
640 out_be32((void *)&msg_regs->imr, 0);
641
642 /* Free ring */
643 dma_free_coherent(NULL, msg_rx_ring.size * RIO_MAX_MSG_SIZE,
644 msg_rx_ring.virt, msg_rx_ring.phys);
645
646 /* Free interrupt */
647 free_irq(MPC85xx_IRQ_RIO_RX, (void *)mport);
648}
649
650/**
651 * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
652 * @mport: Master port implementing the inbound message unit
653 * @mbox: Inbound mailbox number
654 * @buf: Buffer to add to inbound queue
655 *
656 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
657 * %0 on success or %-EINVAL on failure.
658 */
659int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
660{
661 int rc = 0;
662
663 pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
664 msg_rx_ring.rx_slot);
665
666 if (msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot]) {
667 printk(KERN_ERR
668 "RIO: error adding inbound buffer %d, buffer exists\n",
669 msg_rx_ring.rx_slot);
670 rc = -EINVAL;
671 goto out;
672 }
673
674 msg_rx_ring.virt_buffer[msg_rx_ring.rx_slot] = buf;
675 if (++msg_rx_ring.rx_slot == msg_rx_ring.size)
676 msg_rx_ring.rx_slot = 0;
677
678 out:
679 return rc;
680}
681
682EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
683
684/**
685 * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
686 * @mport: Master port implementing the inbound message unit
687 * @mbox: Inbound mailbox number
688 *
689 * Gets the next available inbound message from the inbound message queue.
690 * A pointer to the message is returned on success or NULL on failure.
691 */
692void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
693{
694 u32 imr;
695 u32 phys_buf, virt_buf;
696 void *buf = NULL;
697 int buf_idx;
698
699 phys_buf = in_be32((void *)&msg_regs->ifqdpar);
700
701 /* If no more messages, then bail out */
702 if (phys_buf == in_be32((void *)&msg_regs->ifqepar))
703 goto out2;
704
705 virt_buf = (u32) msg_rx_ring.virt + (phys_buf - msg_rx_ring.phys);
706 buf_idx = (phys_buf - msg_rx_ring.phys) / RIO_MAX_MSG_SIZE;
707 buf = msg_rx_ring.virt_buffer[buf_idx];
708
709 if (!buf) {
710 printk(KERN_ERR
711 "RIO: inbound message copy failed, no buffers\n");
712 goto out1;
713 }
714
715 /* Copy max message size, caller is expected to allocate that big */
716 memcpy(buf, (void *)virt_buf, RIO_MAX_MSG_SIZE);
717
718 /* Clear the available buffer */
719 msg_rx_ring.virt_buffer[buf_idx] = NULL;
720
721 out1:
722 imr = in_be32((void *)&msg_regs->imr);
723 out_be32((void *)&msg_regs->imr, imr | RIO_MSG_IMR_MI);
724
725 out2:
726 return buf;
727}
728
729EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
730
731/**
732 * mpc85xx_rio_dbell_handler - MPC85xx doorbell interrupt handler
733 * @irq: Linux interrupt number
734 * @dev_instance: Pointer to interrupt-specific data
735 *
736 * Handles doorbell interrupts. Parses a list of registered
737 * doorbell event handlers and executes a matching event handler.
738 */
739static irqreturn_t
740mpc85xx_rio_dbell_handler(int irq, void *dev_instance)
741{
742 int dsr;
743 struct rio_mport *port = (struct rio_mport *)dev_instance;
744
745 dsr = in_be32((void *)&msg_regs->dsr);
746
747 if (dsr & DOORBELL_DSR_TE) {
748 pr_info("RIO: doorbell reception error\n");
749 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_TE);
750 goto out;
751 }
752
753 if (dsr & DOORBELL_DSR_QFI) {
754 pr_info("RIO: doorbell queue full\n");
755 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_QFI);
756 goto out;
757 }
758
759 /* XXX Need to check/dispatch until queue empty */
760 if (dsr & DOORBELL_DSR_DIQI) {
761 u32 dmsg =
762 (u32) dbell_ring.virt +
763 (in_be32((void *)&msg_regs->dqdpar) & 0xfff);
764 u32 dmr;
765 struct rio_dbell *dbell;
766 int found = 0;
767
768 pr_debug
769 ("RIO: processing doorbell, sid %2.2x tid %2.2x info %4.4x\n",
770 DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
771
772 list_for_each_entry(dbell, &port->dbells, node) {
773 if ((dbell->res->start <= DBELL_INF(dmsg)) &&
774 (dbell->res->end >= DBELL_INF(dmsg))) {
775 found = 1;
776 break;
777 }
778 }
779 if (found) {
780 dbell->dinb(port, dbell->dev_id, DBELL_SID(dmsg), DBELL_TID(dmsg),
781 DBELL_INF(dmsg));
782 } else {
783 pr_debug
784 ("RIO: spurious doorbell, sid %2.2x tid %2.2x info %4.4x\n",
785 DBELL_SID(dmsg), DBELL_TID(dmsg), DBELL_INF(dmsg));
786 }
787 dmr = in_be32((void *)&msg_regs->dmr);
788 out_be32((void *)&msg_regs->dmr, dmr | DOORBELL_DMR_DI);
789 out_be32((void *)&msg_regs->dsr, DOORBELL_DSR_DIQI);
790 }
791
792 out:
793 return IRQ_HANDLED;
794}
795
796/**
797 * mpc85xx_rio_doorbell_init - MPC85xx doorbell interface init
798 * @mport: Master port implementing the inbound doorbell unit
799 *
800 * Initializes doorbell unit hardware and inbound DMA buffer
801 * ring. Called from mpc85xx_rio_setup(). Returns %0 on success
802 * or %-ENOMEM on failure.
803 */
804static int mpc85xx_rio_doorbell_init(struct rio_mport *mport)
805{
806 int rc = 0;
807
808 /* Map outbound doorbell window immediately after maintenance window */
809 if (!(dbell_win =
810 (u32) ioremap(mport->iores.start + RIO_MAINT_WIN_SIZE,
811 RIO_DBELL_WIN_SIZE))) {
812 printk(KERN_ERR
813 "RIO: unable to map outbound doorbell window\n");
814 rc = -ENOMEM;
815 goto out;
816 }
817
818 /* Initialize inbound doorbells */
819 if (!(dbell_ring.virt = dma_alloc_coherent(NULL,
820 512 * DOORBELL_MESSAGE_SIZE,
821 &dbell_ring.phys,
822 GFP_KERNEL))) {
823 printk(KERN_ERR "RIO: unable allocate inbound doorbell ring\n");
824 rc = -ENOMEM;
825 iounmap((void *)dbell_win);
826 goto out;
827 }
828
829 /* Point dequeue/enqueue pointers at first entry in ring */
830 out_be32((void *)&msg_regs->dqdpar, (u32) dbell_ring.phys);
831 out_be32((void *)&msg_regs->dqepar, (u32) dbell_ring.phys);
832
833 /* Clear interrupt status */
834 out_be32((void *)&msg_regs->dsr, 0x00000091);
835
836 /* Hook up doorbell handler */
837 if ((rc =
838 request_irq(MPC85xx_IRQ_RIO_BELL, mpc85xx_rio_dbell_handler, 0,
839 "dbell_rx", (void *)mport) < 0)) {
840 iounmap((void *)dbell_win);
841 dma_free_coherent(NULL, 512 * DOORBELL_MESSAGE_SIZE,
842 dbell_ring.virt, dbell_ring.phys);
843 printk(KERN_ERR
844 "MPC85xx RIO: unable to request inbound doorbell irq");
845 goto out;
846 }
847
848 /* Configure doorbells for snooping, 512 entries, and enable */
849 out_be32((void *)&msg_regs->dmr, 0x00108161);
850
851 out:
852 return rc;
853}
854
855static char *cmdline = NULL;
856
857static int mpc85xx_rio_get_hdid(int index)
858{
859 /* XXX Need to parse multiple entries in some format */
860 if (!cmdline)
861 return -1;
862
863 return simple_strtol(cmdline, NULL, 0);
864}
865
866static int mpc85xx_rio_get_cmdline(char *s)
867{
868 if (!s)
869 return 0;
870
871 cmdline = s;
872 return 1;
873}
874
875__setup("riohdid=", mpc85xx_rio_get_cmdline);
876
877/**
878 * mpc85xx_rio_setup - Setup MPC85xx RapidIO interface
879 * @law_start: Starting physical address of RapidIO LAW
880 * @law_size: Size of RapidIO LAW
881 *
882 * Initializes MPC85xx RapidIO hardware interface, configures
883 * master port with system-specific info, and registers the
884 * master port with the RapidIO subsystem.
885 */
886void mpc85xx_rio_setup(int law_start, int law_size)
887{
888 struct rio_ops *ops;
889 struct rio_mport *port;
890
891 ops = kmalloc(sizeof(struct rio_ops), GFP_KERNEL);
892 ops->lcread = mpc85xx_local_config_read;
893 ops->lcwrite = mpc85xx_local_config_write;
894 ops->cread = mpc85xx_rio_config_read;
895 ops->cwrite = mpc85xx_rio_config_write;
896 ops->dsend = mpc85xx_rio_doorbell_send;
897
898 port = kmalloc(sizeof(struct rio_mport), GFP_KERNEL);
899 port->id = 0;
900 port->index = 0;
901 INIT_LIST_HEAD(&port->dbells);
902 port->iores.start = law_start;
903 port->iores.end = law_start + law_size;
904 port->iores.flags = IORESOURCE_MEM;
905
906 rio_init_dbell_res(&port->riores[RIO_DOORBELL_RESOURCE], 0, 0xffff);
907 rio_init_mbox_res(&port->riores[RIO_INB_MBOX_RESOURCE], 0, 0);
908 rio_init_mbox_res(&port->riores[RIO_OUTB_MBOX_RESOURCE], 0, 0);
909 strcpy(port->name, "RIO0 mport");
910
911 port->ops = ops;
912 port->host_deviceid = mpc85xx_rio_get_hdid(port->id);
913
914 rio_register_mport(port);
915
916 regs_win = (u32) ioremap(RIO_REGS_BASE, 0x20000);
917 atmu_regs = (struct rio_atmu_regs *)(regs_win + RIO_ATMU_REGS_OFFSET);
918 maint_atmu_regs = atmu_regs + 1;
919 dbell_atmu_regs = atmu_regs + 2;
920 msg_regs = (struct rio_msg_regs *)(regs_win + RIO_MSG_REGS_OFFSET);
921
922 /* Configure maintenance transaction window */
923 out_be32((void *)&maint_atmu_regs->rowbar, 0x000c0000);
924 out_be32((void *)&maint_atmu_regs->rowar, 0x80077015);
925
926 maint_win = (u32) ioremap(law_start, RIO_MAINT_WIN_SIZE);
927
928 /* Configure outbound doorbell window */
929 out_be32((void *)&dbell_atmu_regs->rowbar, 0x000c0400);
930 out_be32((void *)&dbell_atmu_regs->rowar, 0x8004200b);
931 mpc85xx_rio_doorbell_init(port);
932}
diff --git a/arch/ppc/syslib/ppc85xx_rio.h b/arch/ppc/syslib/ppc85xx_rio.h
deleted file mode 100644
index 6d3ff30b1579..000000000000
--- a/arch/ppc/syslib/ppc85xx_rio.h
+++ /dev/null
@@ -1,20 +0,0 @@
1/*
2 * MPC85xx RapidIO definitions
3 *
4 * Copyright 2005 MontaVista Software, Inc.
5 * Matt Porter <mporter@kernel.crashing.org>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13#ifndef __PPC_SYSLIB_PPC85XX_RIO_H
14#define __PPC_SYSLIB_PPC85XX_RIO_H
15
16#include <linux/init.h>
17
18extern void mpc85xx_rio_setup(int law_start, int law_size);
19
20#endif /* __PPC_SYSLIB_PPC85XX_RIO_H */
diff --git a/arch/ppc/syslib/ppc85xx_setup.c b/arch/ppc/syslib/ppc85xx_setup.c
deleted file mode 100644
index 2475ec6600fe..000000000000
--- a/arch/ppc/syslib/ppc85xx_setup.c
+++ /dev/null
@@ -1,367 +0,0 @@
1/*
2 * MPC85XX common board code
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/types.h>
15#include <linux/module.h>
16#include <linux/init.h>
17#include <linux/pci.h>
18#include <linux/serial.h>
19#include <linux/tty.h> /* for linux/serial_core.h */
20#include <linux/serial_core.h>
21#include <linux/serial_8250.h>
22
23#include <asm/time.h>
24#include <asm/mpc85xx.h>
25#include <asm/immap_85xx.h>
26#include <asm/mmu.h>
27#include <asm/ppc_sys.h>
28#include <asm/kgdb.h>
29#include <asm/machdep.h>
30
31#include <syslib/ppc85xx_setup.h>
32
33extern void abort(void);
34
35/* Return the amount of memory */
36unsigned long __init
37mpc85xx_find_end_of_memory(void)
38{
39 bd_t *binfo;
40
41 binfo = (bd_t *) __res;
42
43 return binfo->bi_memsize;
44}
45
46/* The decrementer counts at the system (internal) clock freq divided by 8 */
47void __init
48mpc85xx_calibrate_decr(void)
49{
50 bd_t *binfo = (bd_t *) __res;
51 unsigned int freq, divisor;
52
53 /* get the core frequency */
54 freq = binfo->bi_busfreq;
55
56 /* The timebase is updated every 8 bus clocks, HID0[SEL_TBCLK] = 0 */
57 divisor = 8;
58 tb_ticks_per_jiffy = freq / divisor / HZ;
59 tb_to_us = mulhwu_scale_factor(freq / divisor, 1000000);
60
61 /* Set the time base to zero */
62 mtspr(SPRN_TBWL, 0);
63 mtspr(SPRN_TBWU, 0);
64
65 /* Clear any pending timer interrupts */
66 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
67
68 /* Enable decrementer interrupt */
69 mtspr(SPRN_TCR, TCR_DIE);
70}
71
72#ifdef CONFIG_SERIAL_8250
73void __init
74mpc85xx_early_serial_map(void)
75{
76#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
77 struct uart_port serial_req;
78#endif
79 struct plat_serial8250_port *pdata;
80 bd_t *binfo = (bd_t *) __res;
81 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(MPC85xx_DUART);
82
83 /* Setup serial port access */
84 pdata[0].uartclk = binfo->bi_busfreq;
85 pdata[0].mapbase += binfo->bi_immr_base;
86 pdata[0].membase = ioremap(pdata[0].mapbase, MPC85xx_UART0_SIZE);
87
88#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
89 memset(&serial_req, 0, sizeof (serial_req));
90 serial_req.iotype = UPIO_MEM;
91 serial_req.mapbase = pdata[0].mapbase;
92 serial_req.membase = pdata[0].membase;
93 serial_req.regshift = 0;
94
95 gen550_init(0, &serial_req);
96#endif
97
98 pdata[1].uartclk = binfo->bi_busfreq;
99 pdata[1].mapbase += binfo->bi_immr_base;
100 pdata[1].membase = ioremap(pdata[1].mapbase, MPC85xx_UART0_SIZE);
101
102#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
103 /* Assume gen550_init() doesn't modify serial_req */
104 serial_req.mapbase = pdata[1].mapbase;
105 serial_req.membase = pdata[1].membase;
106
107 gen550_init(1, &serial_req);
108#endif
109}
110#endif
111
112void
113mpc85xx_restart(char *cmd)
114{
115 local_irq_disable();
116 abort();
117}
118
119void
120mpc85xx_power_off(void)
121{
122 local_irq_disable();
123 for(;;);
124}
125
126void
127mpc85xx_halt(void)
128{
129 local_irq_disable();
130 for(;;);
131}
132
133#ifdef CONFIG_PCI
134
135#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
136extern void mpc85xx_cds_enable_via(struct pci_controller *hose);
137extern void mpc85xx_cds_fixup_via(struct pci_controller *hose);
138#endif
139
140static void __init
141mpc85xx_setup_pci1(struct pci_controller *hose)
142{
143 volatile struct ccsr_pci *pci;
144 volatile struct ccsr_guts *guts;
145 unsigned short temps;
146 bd_t *binfo = (bd_t *) __res;
147
148 pci = ioremap(binfo->bi_immr_base + MPC85xx_PCI1_OFFSET,
149 MPC85xx_PCI1_SIZE);
150
151 guts = ioremap(binfo->bi_immr_base + MPC85xx_GUTS_OFFSET,
152 MPC85xx_GUTS_SIZE);
153
154 early_read_config_word(hose, 0, 0, PCI_COMMAND, &temps);
155 temps |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
156 early_write_config_word(hose, 0, 0, PCI_COMMAND, temps);
157
158#define PORDEVSR_PCI (0x00800000) /* PCI Mode */
159 if (guts->pordevsr & PORDEVSR_PCI) {
160 early_write_config_byte(hose, 0, 0, PCI_LATENCY_TIMER, 0x80);
161 } else {
162 /* PCI-X init */
163 temps = PCI_X_CMD_MAX_SPLIT | PCI_X_CMD_MAX_READ
164 | PCI_X_CMD_ERO | PCI_X_CMD_DPERR_E;
165 early_write_config_word(hose, 0, 0, PCIX_COMMAND, temps);
166 }
167
168 /* Disable all windows (except powar0 since its ignored) */
169 pci->powar1 = 0;
170 pci->powar2 = 0;
171 pci->powar3 = 0;
172 pci->powar4 = 0;
173 pci->piwar1 = 0;
174 pci->piwar2 = 0;
175 pci->piwar3 = 0;
176
177 /* Setup Phys:PCI 1:1 outbound mem window @ MPC85XX_PCI1_LOWER_MEM */
178 pci->potar1 = (MPC85XX_PCI1_LOWER_MEM >> 12) & 0x000fffff;
179 pci->potear1 = 0x00000000;
180 pci->powbar1 = (MPC85XX_PCI1_LOWER_MEM >> 12) & 0x000fffff;
181 /* Enable, Mem R/W */
182 pci->powar1 = 0x80044000 |
183 (__ilog2(MPC85XX_PCI1_UPPER_MEM - MPC85XX_PCI1_LOWER_MEM + 1) - 1);
184
185 /* Setup outbound IO windows @ MPC85XX_PCI1_IO_BASE */
186 pci->potar2 = (MPC85XX_PCI1_LOWER_IO >> 12) & 0x000fffff;
187 pci->potear2 = 0x00000000;
188 pci->powbar2 = (MPC85XX_PCI1_IO_BASE >> 12) & 0x000fffff;
189 /* Enable, IO R/W */
190 pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI1_IO_SIZE) - 1);
191
192 /* Setup 2G inbound Memory Window @ 0 */
193 pci->pitar1 = 0x00000000;
194 pci->piwbar1 = 0x00000000;
195 pci->piwar1 = 0xa0f5501e; /* Enable, Prefetch, Local
196 Mem, Snoop R/W, 2G */
197}
198
199
200extern int mpc85xx_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin);
201extern int mpc85xx_exclude_device(u_char bus, u_char devfn);
202
203#ifdef CONFIG_85xx_PCI2
204static void __init
205mpc85xx_setup_pci2(struct pci_controller *hose)
206{
207 volatile struct ccsr_pci *pci;
208 unsigned short temps;
209 bd_t *binfo = (bd_t *) __res;
210
211 pci = ioremap(binfo->bi_immr_base + MPC85xx_PCI2_OFFSET,
212 MPC85xx_PCI2_SIZE);
213
214 early_read_config_word(hose, hose->bus_offset, 0, PCI_COMMAND, &temps);
215 temps |= PCI_COMMAND_SERR | PCI_COMMAND_MASTER | PCI_COMMAND_MEMORY;
216 early_write_config_word(hose, hose->bus_offset, 0, PCI_COMMAND, temps);
217 early_write_config_byte(hose, hose->bus_offset, 0, PCI_LATENCY_TIMER, 0x80);
218
219 /* Disable all windows (except powar0 since its ignored) */
220 pci->powar1 = 0;
221 pci->powar2 = 0;
222 pci->powar3 = 0;
223 pci->powar4 = 0;
224 pci->piwar1 = 0;
225 pci->piwar2 = 0;
226 pci->piwar3 = 0;
227
228 /* Setup Phys:PCI 1:1 outbound mem window @ MPC85XX_PCI2_LOWER_MEM */
229 pci->potar1 = (MPC85XX_PCI2_LOWER_MEM >> 12) & 0x000fffff;
230 pci->potear1 = 0x00000000;
231 pci->powbar1 = (MPC85XX_PCI2_LOWER_MEM >> 12) & 0x000fffff;
232 /* Enable, Mem R/W */
233 pci->powar1 = 0x80044000 |
234 (__ilog2(MPC85XX_PCI2_UPPER_MEM - MPC85XX_PCI2_LOWER_MEM + 1) - 1);
235
236 /* Setup outbound IO windows @ MPC85XX_PCI2_IO_BASE */
237 pci->potar2 = (MPC85XX_PCI2_LOWER_IO >> 12) & 0x000fffff;
238 pci->potear2 = 0x00000000;
239 pci->powbar2 = (MPC85XX_PCI2_IO_BASE >> 12) & 0x000fffff;
240 /* Enable, IO R/W */
241 pci->powar2 = 0x80088000 | (__ilog2(MPC85XX_PCI2_IO_SIZE) - 1);
242
243 /* Setup 2G inbound Memory Window @ 0 */
244 pci->pitar1 = 0x00000000;
245 pci->piwbar1 = 0x00000000;
246 pci->piwar1 = 0xa0f5501e; /* Enable, Prefetch, Local
247 Mem, Snoop R/W, 2G */
248}
249#endif /* CONFIG_85xx_PCI2 */
250
251int mpc85xx_pci1_last_busno = 0;
252
253void __init
254mpc85xx_setup_hose(void)
255{
256 struct pci_controller *hose_a;
257#ifdef CONFIG_85xx_PCI2
258 struct pci_controller *hose_b;
259#endif
260 bd_t *binfo = (bd_t *) __res;
261
262 hose_a = pcibios_alloc_controller();
263
264 if (!hose_a)
265 return;
266
267 ppc_md.pci_swizzle = common_swizzle;
268 ppc_md.pci_map_irq = mpc85xx_map_irq;
269
270 hose_a->first_busno = 0;
271 hose_a->bus_offset = 0;
272 hose_a->last_busno = 0xff;
273
274 setup_indirect_pci(hose_a, binfo->bi_immr_base + PCI1_CFG_ADDR_OFFSET,
275 binfo->bi_immr_base + PCI1_CFG_DATA_OFFSET);
276 hose_a->set_cfg_type = 1;
277
278 mpc85xx_setup_pci1(hose_a);
279
280 hose_a->pci_mem_offset = MPC85XX_PCI1_MEM_OFFSET;
281 hose_a->mem_space.start = MPC85XX_PCI1_LOWER_MEM;
282 hose_a->mem_space.end = MPC85XX_PCI1_UPPER_MEM;
283
284 hose_a->io_space.start = MPC85XX_PCI1_LOWER_IO;
285 hose_a->io_space.end = MPC85XX_PCI1_UPPER_IO;
286 hose_a->io_base_phys = MPC85XX_PCI1_IO_BASE;
287#ifdef CONFIG_85xx_PCI2
288 hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
289 MPC85XX_PCI1_IO_SIZE +
290 MPC85XX_PCI2_IO_SIZE);
291#else
292 hose_a->io_base_virt = ioremap(MPC85XX_PCI1_IO_BASE,
293 MPC85XX_PCI1_IO_SIZE);
294#endif
295 isa_io_base = (unsigned long)hose_a->io_base_virt;
296
297 /* setup resources */
298 pci_init_resource(&hose_a->mem_resources[0],
299 MPC85XX_PCI1_LOWER_MEM,
300 MPC85XX_PCI1_UPPER_MEM,
301 IORESOURCE_MEM, "PCI1 host bridge");
302
303 pci_init_resource(&hose_a->io_resource,
304 MPC85XX_PCI1_LOWER_IO,
305 MPC85XX_PCI1_UPPER_IO,
306 IORESOURCE_IO, "PCI1 host bridge");
307
308 ppc_md.pci_exclude_device = mpc85xx_exclude_device;
309
310#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
311 /* Pre pciauto_bus_scan VIA init */
312 mpc85xx_cds_enable_via(hose_a);
313#endif
314
315 hose_a->last_busno = pciauto_bus_scan(hose_a, hose_a->first_busno);
316
317#if defined(CONFIG_MPC8555_CDS) || defined(CONFIG_MPC8548_CDS)
318 /* Post pciauto_bus_scan VIA fixup */
319 mpc85xx_cds_fixup_via(hose_a);
320#endif
321
322#ifdef CONFIG_85xx_PCI2
323 hose_b = pcibios_alloc_controller();
324
325 if (!hose_b)
326 return;
327
328 hose_b->bus_offset = hose_a->last_busno + 1;
329 hose_b->first_busno = hose_a->last_busno + 1;
330 hose_b->last_busno = 0xff;
331
332 setup_indirect_pci(hose_b, binfo->bi_immr_base + PCI2_CFG_ADDR_OFFSET,
333 binfo->bi_immr_base + PCI2_CFG_DATA_OFFSET);
334 hose_b->set_cfg_type = 1;
335
336 mpc85xx_setup_pci2(hose_b);
337
338 hose_b->pci_mem_offset = MPC85XX_PCI2_MEM_OFFSET;
339 hose_b->mem_space.start = MPC85XX_PCI2_LOWER_MEM;
340 hose_b->mem_space.end = MPC85XX_PCI2_UPPER_MEM;
341
342 hose_b->io_space.start = MPC85XX_PCI2_LOWER_IO;
343 hose_b->io_space.end = MPC85XX_PCI2_UPPER_IO;
344 hose_b->io_base_phys = MPC85XX_PCI2_IO_BASE;
345 hose_b->io_base_virt = hose_a->io_base_virt + MPC85XX_PCI1_IO_SIZE;
346
347 /* setup resources */
348 pci_init_resource(&hose_b->mem_resources[0],
349 MPC85XX_PCI2_LOWER_MEM,
350 MPC85XX_PCI2_UPPER_MEM,
351 IORESOURCE_MEM, "PCI2 host bridge");
352
353 pci_init_resource(&hose_b->io_resource,
354 MPC85XX_PCI2_LOWER_IO,
355 MPC85XX_PCI2_UPPER_IO,
356 IORESOURCE_IO, "PCI2 host bridge");
357
358 hose_b->last_busno = pciauto_bus_scan(hose_b, hose_b->first_busno);
359
360 /* let board code know what the last bus number was on PCI1 */
361 mpc85xx_pci1_last_busno = hose_a->last_busno;
362#endif
363 return;
364}
365#endif /* CONFIG_PCI */
366
367
diff --git a/arch/ppc/syslib/ppc85xx_setup.h b/arch/ppc/syslib/ppc85xx_setup.h
deleted file mode 100644
index 6ff79995210b..000000000000
--- a/arch/ppc/syslib/ppc85xx_setup.h
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * MPC85XX common board definitions
3 *
4 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
5 *
6 * Copyright 2004 Freescale Semiconductor Inc.
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 *
13 */
14
15#ifndef __PPC_SYSLIB_PPC85XX_SETUP_H
16#define __PPC_SYSLIB_PPC85XX_SETUP_H
17
18#include <linux/init.h>
19#include <asm/ppcboot.h>
20
21extern unsigned long mpc85xx_find_end_of_memory(void) __init;
22extern void mpc85xx_calibrate_decr(void) __init;
23extern void mpc85xx_early_serial_map(void) __init;
24extern void mpc85xx_restart(char *cmd);
25extern void mpc85xx_power_off(void);
26extern void mpc85xx_halt(void);
27extern void mpc85xx_setup_hose(void) __init;
28
29/* PCI config */
30#define PCI1_CFG_ADDR_OFFSET (0x8000)
31#define PCI1_CFG_DATA_OFFSET (0x8004)
32
33#define PCI2_CFG_ADDR_OFFSET (0x9000)
34#define PCI2_CFG_DATA_OFFSET (0x9004)
35
36/* Additional register for PCI-X configuration */
37#define PCIX_NEXT_CAP 0x60
38#define PCIX_CAP_ID 0x61
39#define PCIX_COMMAND 0x62
40#define PCIX_STATUS 0x64
41
42/* Serial Config */
43#ifdef CONFIG_SERIAL_MANY_PORTS
44#define RS_TABLE_SIZE 64
45#else
46#define RS_TABLE_SIZE 2
47#endif
48
49#ifndef BASE_BAUD
50#define BASE_BAUD 115200
51#endif
52
53/* Offset of CPM register space */
54#define CPM_MAP_ADDR (CCSRBAR + MPC85xx_CPM_OFFSET)
55
56#endif /* __PPC_SYSLIB_PPC85XX_SETUP_H */
diff --git a/arch/ppc/syslib/ppc8xx_pic.c b/arch/ppc/syslib/ppc8xx_pic.c
index e8619c750732..bce9a75c80e3 100644
--- a/arch/ppc/syslib/ppc8xx_pic.c
+++ b/arch/ppc/syslib/ppc8xx_pic.c
@@ -16,7 +16,7 @@ extern int cpm_get_irq(void);
16 * the only interrupt controller. Some boards, like the MBX and 16 * the only interrupt controller. Some boards, like the MBX and
17 * Sandpoint have the 8259 as a secondary controller. Depending 17 * Sandpoint have the 8259 as a secondary controller. Depending
18 * upon the processor type, the internal controller can have as 18 * upon the processor type, the internal controller can have as
19 * few as 16 interrups or as many as 64. We could use the 19 * few as 16 interrupts or as many as 64. We could use the
20 * "clear_bit()" and "set_bit()" functions like other platforms, 20 * "clear_bit()" and "set_bit()" functions like other platforms,
21 * but they are overkill for us. 21 * but they are overkill for us.
22 */ 22 */
diff --git a/arch/ppc/syslib/ppc8xx_pic.h b/arch/ppc/syslib/ppc8xx_pic.h
index d7d9f651a91b..53bcd97ef7f5 100644
--- a/arch/ppc/syslib/ppc8xx_pic.h
+++ b/arch/ppc/syslib/ppc8xx_pic.h
@@ -6,7 +6,6 @@
6 6
7extern struct hw_interrupt_type ppc8xx_pic; 7extern struct hw_interrupt_type ppc8xx_pic;
8 8
9void m8xx_pic_init(void);
10void m8xx_do_IRQ(struct pt_regs *regs, 9void m8xx_do_IRQ(struct pt_regs *regs,
11 int cpu); 10 int cpu);
12int m8xx_get_irq(struct pt_regs *regs); 11int m8xx_get_irq(struct pt_regs *regs);
diff --git a/arch/ppc/syslib/ppc_sys.c b/arch/ppc/syslib/ppc_sys.c
index 2d48018b71d9..837183c24dfc 100644
--- a/arch/ppc/syslib/ppc_sys.c
+++ b/arch/ppc/syslib/ppc_sys.c
@@ -185,7 +185,7 @@ void platform_notify_map(const struct platform_notify_dev_map *map,
185 */ 185 */
186 186
187/* 187/*
188 Here we'll replace .name pointers with fixed-lenght strings 188 Here we'll replace .name pointers with fixed-length strings
189 Hereby, this should be called *before* any func stuff triggeded. 189 Hereby, this should be called *before* any func stuff triggeded.
190 */ 190 */
191void ppc_sys_device_initfunc(void) 191void ppc_sys_device_initfunc(void)
diff --git a/arch/ppc/xmon/start.c b/arch/ppc/xmon/start.c
index 8f0b953179fa..9056fe58aaa1 100644
--- a/arch/ppc/xmon/start.c
+++ b/arch/ppc/xmon/start.c
@@ -10,7 +10,6 @@
10#include <linux/sysrq.h> 10#include <linux/sysrq.h>
11#include <linux/bitops.h> 11#include <linux/bitops.h>
12#include <asm/xmon.h> 12#include <asm/xmon.h>
13#include <asm/machdep.h>
14#include <asm/errno.h> 13#include <asm/errno.h>
15#include <asm/processor.h> 14#include <asm/processor.h>
16#include <asm/delay.h> 15#include <asm/delay.h>
diff --git a/arch/ppc/xmon/start_8xx.c b/arch/ppc/xmon/start_8xx.c
index a48bd594cf61..30974068c223 100644
--- a/arch/ppc/xmon/start_8xx.c
+++ b/arch/ppc/xmon/start_8xx.c
@@ -14,7 +14,7 @@
14#include <linux/kernel.h> 14#include <linux/kernel.h>
15#include <asm/8xx_immap.h> 15#include <asm/8xx_immap.h>
16#include <asm/mpc8xx.h> 16#include <asm/mpc8xx.h>
17#include <asm/commproc.h> 17#include <asm/cpm1.h>
18 18
19extern void xmon_printf(const char *fmt, ...); 19extern void xmon_printf(const char *fmt, ...);
20extern int xmon_8xx_write(char *str, int nb); 20extern int xmon_8xx_write(char *str, int nb);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-08 20:26:22 -0500