aboutsummaryrefslogtreecommitdiffstats
path: root/arch/ppc64/mm
diff options
context:
space:
mode:
Diffstat (limited to 'arch/ppc64/mm')
-rw-r--r--arch/ppc64/mm/fault.c1
-rw-r--r--arch/ppc64/mm/hash_native.c6
-rw-r--r--arch/ppc64/mm/hugetlbpage.c7
-rw-r--r--arch/ppc64/mm/tlb.c4
4 files changed, 11 insertions, 7 deletions
diff --git a/arch/ppc64/mm/fault.c b/arch/ppc64/mm/fault.c
index 7fbc68bbb739..be3f25cf3e9f 100644
--- a/arch/ppc64/mm/fault.c
+++ b/arch/ppc64/mm/fault.c
@@ -38,6 +38,7 @@
38#include <asm/system.h> 38#include <asm/system.h>
39#include <asm/uaccess.h> 39#include <asm/uaccess.h>
40#include <asm/kdebug.h> 40#include <asm/kdebug.h>
41#include <asm/siginfo.h>
41 42
42/* 43/*
43 * Check whether the instruction at regs->nip is a store using 44 * Check whether the instruction at regs->nip is a store using
diff --git a/arch/ppc64/mm/hash_native.c b/arch/ppc64/mm/hash_native.c
index 7626bb59954d..bfd385b7713c 100644
--- a/arch/ppc64/mm/hash_native.c
+++ b/arch/ppc64/mm/hash_native.c
@@ -343,9 +343,7 @@ static void native_flush_hash_range(unsigned long context,
343 hpte_t *hptep; 343 hpte_t *hptep;
344 unsigned long hpte_v; 344 unsigned long hpte_v;
345 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 345 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
346 346 unsigned long large = batch->large;
347 /* XXX fix for large ptes */
348 unsigned long large = 0;
349 347
350 local_irq_save(flags); 348 local_irq_save(flags);
351 349
@@ -407,7 +405,7 @@ static void native_flush_hash_range(unsigned long context,
407 asm volatile("ptesync":::"memory"); 405 asm volatile("ptesync":::"memory");
408 406
409 for (i = 0; i < j; i++) 407 for (i = 0; i < j; i++)
410 __tlbie(batch->vaddr[i], 0); 408 __tlbie(batch->vaddr[i], large);
411 409
412 asm volatile("eieio; tlbsync; ptesync":::"memory"); 410 asm volatile("eieio; tlbsync; ptesync":::"memory");
413 411
diff --git a/arch/ppc64/mm/hugetlbpage.c b/arch/ppc64/mm/hugetlbpage.c
index 338771ec70d7..0ea0994ed974 100644
--- a/arch/ppc64/mm/hugetlbpage.c
+++ b/arch/ppc64/mm/hugetlbpage.c
@@ -710,10 +710,13 @@ repeat:
710 hpte_group = ((~hash & htab_hash_mask) * 710 hpte_group = ((~hash & htab_hash_mask) *
711 HPTES_PER_GROUP) & ~0x7UL; 711 HPTES_PER_GROUP) & ~0x7UL;
712 slot = ppc_md.hpte_insert(hpte_group, va, prpn, 712 slot = ppc_md.hpte_insert(hpte_group, va, prpn,
713 HPTE_V_LARGE, rflags); 713 HPTE_V_LARGE |
714 HPTE_V_SECONDARY,
715 rflags);
714 if (slot == -1) { 716 if (slot == -1) {
715 if (mftb() & 0x1) 717 if (mftb() & 0x1)
716 hpte_group = ((hash & htab_hash_mask) * HPTES_PER_GROUP) & ~0x7UL; 718 hpte_group = ((hash & htab_hash_mask) *
719 HPTES_PER_GROUP)&~0x7UL;
717 720
718 ppc_md.hpte_remove(hpte_group); 721 ppc_md.hpte_remove(hpte_group);
719 goto repeat; 722 goto repeat;
diff --git a/arch/ppc64/mm/tlb.c b/arch/ppc64/mm/tlb.c
index d8a6593a13f0..21fbffb23a43 100644
--- a/arch/ppc64/mm/tlb.c
+++ b/arch/ppc64/mm/tlb.c
@@ -143,7 +143,8 @@ void hpte_update(struct mm_struct *mm, unsigned long addr,
143 * up scanning and resetting referenced bits then our batch context 143 * up scanning and resetting referenced bits then our batch context
144 * will change mid stream. 144 * will change mid stream.
145 */ 145 */
146 if (unlikely(i != 0 && context != batch->context)) { 146 if (i != 0 && (context != batch->context ||
147 batch->large != pte_huge(pte))) {
147 flush_tlb_pending(); 148 flush_tlb_pending();
148 i = 0; 149 i = 0;
149 } 150 }
@@ -151,6 +152,7 @@ void hpte_update(struct mm_struct *mm, unsigned long addr,
151 if (i == 0) { 152 if (i == 0) {
152 batch->context = context; 153 batch->context = context;
153 batch->mm = mm; 154 batch->mm = mm;
155 batch->large = pte_huge(pte);
154 } 156 }
155 batch->pte[i] = __pte(pte); 157 batch->pte[i] = __pte(pte);
156 batch->addr[i] = addr; 158 batch->addr[i] = addr;