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-rw-r--r--arch/ppc64/mm/hash_native.c6
1 files changed, 2 insertions, 4 deletions
diff --git a/arch/ppc64/mm/hash_native.c b/arch/ppc64/mm/hash_native.c
index 7626bb59954d..bfd385b7713c 100644
--- a/arch/ppc64/mm/hash_native.c
+++ b/arch/ppc64/mm/hash_native.c
@@ -343,9 +343,7 @@ static void native_flush_hash_range(unsigned long context,
343 hpte_t *hptep; 343 hpte_t *hptep;
344 unsigned long hpte_v; 344 unsigned long hpte_v;
345 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch); 345 struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
346 346 unsigned long large = batch->large;
347 /* XXX fix for large ptes */
348 unsigned long large = 0;
349 347
350 local_irq_save(flags); 348 local_irq_save(flags);
351 349
@@ -407,7 +405,7 @@ static void native_flush_hash_range(unsigned long context,
407 asm volatile("ptesync":::"memory"); 405 asm volatile("ptesync":::"memory");
408 406
409 for (i = 0; i < j; i++) 407 for (i = 0; i < j; i++)
410 __tlbie(batch->vaddr[i], 0); 408 __tlbie(batch->vaddr[i], large);
411 409
412 asm volatile("eieio; tlbsync; ptesync":::"memory"); 410 asm volatile("eieio; tlbsync; ptesync":::"memory");
413 411