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-rw-r--r--arch/ppc64/kernel/Makefile1
-rw-r--r--arch/ppc64/kernel/eeh.c1093
2 files changed, 0 insertions, 1094 deletions
diff --git a/arch/ppc64/kernel/Makefile b/arch/ppc64/kernel/Makefile
index eb3187f18fb0..7548968b7997 100644
--- a/arch/ppc64/kernel/Makefile
+++ b/arch/ppc64/kernel/Makefile
@@ -30,7 +30,6 @@ endif
30obj-$(CONFIG_PPC_PSERIES) += udbg_16550.o 30obj-$(CONFIG_PPC_PSERIES) += udbg_16550.o
31 31
32obj-$(CONFIG_KEXEC) += machine_kexec.o 32obj-$(CONFIG_KEXEC) += machine_kexec.o
33obj-$(CONFIG_EEH) += eeh.o
34obj-$(CONFIG_PROC_FS) += proc_ppc64.o 33obj-$(CONFIG_PROC_FS) += proc_ppc64.o
35obj-$(CONFIG_MODULES) += module.o 34obj-$(CONFIG_MODULES) += module.o
36ifneq ($(CONFIG_PPC_MERGE),y) 35ifneq ($(CONFIG_PPC_MERGE),y)
diff --git a/arch/ppc64/kernel/eeh.c b/arch/ppc64/kernel/eeh.c
deleted file mode 100644
index 9df1d5018363..000000000000
--- a/arch/ppc64/kernel/eeh.c
+++ /dev/null
@@ -1,1093 +0,0 @@
1/*
2 * eeh.c
3 * Copyright (C) 2001 Dave Engebretsen & Todd Inglett IBM Corporation
4 *
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License as published by
7 * the Free Software Foundation; either version 2 of the License, or
8 * (at your option) any later version.
9 *
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
14 *
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18 */
19
20#include <linux/init.h>
21#include <linux/list.h>
22#include <linux/notifier.h>
23#include <linux/pci.h>
24#include <linux/proc_fs.h>
25#include <linux/rbtree.h>
26#include <linux/seq_file.h>
27#include <linux/spinlock.h>
28#include <asm/atomic.h>
29#include <asm/eeh.h>
30#include <asm/io.h>
31#include <asm/machdep.h>
32#include <asm/rtas.h>
33#include <asm/atomic.h>
34#include <asm/systemcfg.h>
35#include <asm/ppc-pci.h>
36
37#undef DEBUG
38
39/** Overview:
40 * EEH, or "Extended Error Handling" is a PCI bridge technology for
41 * dealing with PCI bus errors that can't be dealt with within the
42 * usual PCI framework, except by check-stopping the CPU. Systems
43 * that are designed for high-availability/reliability cannot afford
44 * to crash due to a "mere" PCI error, thus the need for EEH.
45 * An EEH-capable bridge operates by converting a detected error
46 * into a "slot freeze", taking the PCI adapter off-line, making
47 * the slot behave, from the OS'es point of view, as if the slot
48 * were "empty": all reads return 0xff's and all writes are silently
49 * ignored. EEH slot isolation events can be triggered by parity
50 * errors on the address or data busses (e.g. during posted writes),
51 * which in turn might be caused by low voltage on the bus, dust,
52 * vibration, humidity, radioactivity or plain-old failed hardware.
53 *
54 * Note, however, that one of the leading causes of EEH slot
55 * freeze events are buggy device drivers, buggy device microcode,
56 * or buggy device hardware. This is because any attempt by the
57 * device to bus-master data to a memory address that is not
58 * assigned to the device will trigger a slot freeze. (The idea
59 * is to prevent devices-gone-wild from corrupting system memory).
60 * Buggy hardware/drivers will have a miserable time co-existing
61 * with EEH.
62 *
63 * Ideally, a PCI device driver, when suspecting that an isolation
64 * event has occured (e.g. by reading 0xff's), will then ask EEH
65 * whether this is the case, and then take appropriate steps to
66 * reset the PCI slot, the PCI device, and then resume operations.
67 * However, until that day, the checking is done here, with the
68 * eeh_check_failure() routine embedded in the MMIO macros. If
69 * the slot is found to be isolated, an "EEH Event" is synthesized
70 * and sent out for processing.
71 */
72
73/* EEH event workqueue setup. */
74static DEFINE_SPINLOCK(eeh_eventlist_lock);
75LIST_HEAD(eeh_eventlist);
76static void eeh_event_handler(void *);
77DECLARE_WORK(eeh_event_wq, eeh_event_handler, NULL);
78
79static struct notifier_block *eeh_notifier_chain;
80
81/* If a device driver keeps reading an MMIO register in an interrupt
82 * handler after a slot isolation event has occurred, we assume it
83 * is broken and panic. This sets the threshold for how many read
84 * attempts we allow before panicking.
85 */
86#define EEH_MAX_FAILS 100000
87
88/* RTAS tokens */
89static int ibm_set_eeh_option;
90static int ibm_set_slot_reset;
91static int ibm_read_slot_reset_state;
92static int ibm_read_slot_reset_state2;
93static int ibm_slot_error_detail;
94
95static int eeh_subsystem_enabled;
96
97/* Lock to avoid races due to multiple reports of an error */
98static DEFINE_SPINLOCK(confirm_error_lock);
99
100/* Buffer for reporting slot-error-detail rtas calls */
101static unsigned char slot_errbuf[RTAS_ERROR_LOG_MAX];
102static DEFINE_SPINLOCK(slot_errbuf_lock);
103static int eeh_error_buf_size;
104
105/* System monitoring statistics */
106static DEFINE_PER_CPU(unsigned long, no_device);
107static DEFINE_PER_CPU(unsigned long, no_dn);
108static DEFINE_PER_CPU(unsigned long, no_cfg_addr);
109static DEFINE_PER_CPU(unsigned long, ignored_check);
110static DEFINE_PER_CPU(unsigned long, total_mmio_ffs);
111static DEFINE_PER_CPU(unsigned long, false_positives);
112static DEFINE_PER_CPU(unsigned long, ignored_failures);
113static DEFINE_PER_CPU(unsigned long, slot_resets);
114
115/**
116 * The pci address cache subsystem. This subsystem places
117 * PCI device address resources into a red-black tree, sorted
118 * according to the address range, so that given only an i/o
119 * address, the corresponding PCI device can be **quickly**
120 * found. It is safe to perform an address lookup in an interrupt
121 * context; this ability is an important feature.
122 *
123 * Currently, the only customer of this code is the EEH subsystem;
124 * thus, this code has been somewhat tailored to suit EEH better.
125 * In particular, the cache does *not* hold the addresses of devices
126 * for which EEH is not enabled.
127 *
128 * (Implementation Note: The RB tree seems to be better/faster
129 * than any hash algo I could think of for this problem, even
130 * with the penalty of slow pointer chases for d-cache misses).
131 */
132struct pci_io_addr_range
133{
134 struct rb_node rb_node;
135 unsigned long addr_lo;
136 unsigned long addr_hi;
137 struct pci_dev *pcidev;
138 unsigned int flags;
139};
140
141static struct pci_io_addr_cache
142{
143 struct rb_root rb_root;
144 spinlock_t piar_lock;
145} pci_io_addr_cache_root;
146
147static inline struct pci_dev *__pci_get_device_by_addr(unsigned long addr)
148{
149 struct rb_node *n = pci_io_addr_cache_root.rb_root.rb_node;
150
151 while (n) {
152 struct pci_io_addr_range *piar;
153 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
154
155 if (addr < piar->addr_lo) {
156 n = n->rb_left;
157 } else {
158 if (addr > piar->addr_hi) {
159 n = n->rb_right;
160 } else {
161 pci_dev_get(piar->pcidev);
162 return piar->pcidev;
163 }
164 }
165 }
166
167 return NULL;
168}
169
170/**
171 * pci_get_device_by_addr - Get device, given only address
172 * @addr: mmio (PIO) phys address or i/o port number
173 *
174 * Given an mmio phys address, or a port number, find a pci device
175 * that implements this address. Be sure to pci_dev_put the device
176 * when finished. I/O port numbers are assumed to be offset
177 * from zero (that is, they do *not* have pci_io_addr added in).
178 * It is safe to call this function within an interrupt.
179 */
180static struct pci_dev *pci_get_device_by_addr(unsigned long addr)
181{
182 struct pci_dev *dev;
183 unsigned long flags;
184
185 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
186 dev = __pci_get_device_by_addr(addr);
187 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
188 return dev;
189}
190
191#ifdef DEBUG
192/*
193 * Handy-dandy debug print routine, does nothing more
194 * than print out the contents of our addr cache.
195 */
196static void pci_addr_cache_print(struct pci_io_addr_cache *cache)
197{
198 struct rb_node *n;
199 int cnt = 0;
200
201 n = rb_first(&cache->rb_root);
202 while (n) {
203 struct pci_io_addr_range *piar;
204 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
205 printk(KERN_DEBUG "PCI: %s addr range %d [%lx-%lx]: %s\n",
206 (piar->flags & IORESOURCE_IO) ? "i/o" : "mem", cnt,
207 piar->addr_lo, piar->addr_hi, pci_name(piar->pcidev));
208 cnt++;
209 n = rb_next(n);
210 }
211}
212#endif
213
214/* Insert address range into the rb tree. */
215static struct pci_io_addr_range *
216pci_addr_cache_insert(struct pci_dev *dev, unsigned long alo,
217 unsigned long ahi, unsigned int flags)
218{
219 struct rb_node **p = &pci_io_addr_cache_root.rb_root.rb_node;
220 struct rb_node *parent = NULL;
221 struct pci_io_addr_range *piar;
222
223 /* Walk tree, find a place to insert into tree */
224 while (*p) {
225 parent = *p;
226 piar = rb_entry(parent, struct pci_io_addr_range, rb_node);
227 if (ahi < piar->addr_lo) {
228 p = &parent->rb_left;
229 } else if (alo > piar->addr_hi) {
230 p = &parent->rb_right;
231 } else {
232 if (dev != piar->pcidev ||
233 alo != piar->addr_lo || ahi != piar->addr_hi) {
234 printk(KERN_WARNING "PIAR: overlapping address range\n");
235 }
236 return piar;
237 }
238 }
239 piar = (struct pci_io_addr_range *)kmalloc(sizeof(struct pci_io_addr_range), GFP_ATOMIC);
240 if (!piar)
241 return NULL;
242
243 piar->addr_lo = alo;
244 piar->addr_hi = ahi;
245 piar->pcidev = dev;
246 piar->flags = flags;
247
248#ifdef DEBUG
249 printk(KERN_DEBUG "PIAR: insert range=[%lx:%lx] dev=%s\n",
250 alo, ahi, pci_name (dev));
251#endif
252
253 rb_link_node(&piar->rb_node, parent, p);
254 rb_insert_color(&piar->rb_node, &pci_io_addr_cache_root.rb_root);
255
256 return piar;
257}
258
259static void __pci_addr_cache_insert_device(struct pci_dev *dev)
260{
261 struct device_node *dn;
262 struct pci_dn *pdn;
263 int i;
264 int inserted = 0;
265
266 dn = pci_device_to_OF_node(dev);
267 if (!dn) {
268 printk(KERN_WARNING "PCI: no pci dn found for dev=%s\n", pci_name(dev));
269 return;
270 }
271
272 /* Skip any devices for which EEH is not enabled. */
273 pdn = PCI_DN(dn);
274 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
275 pdn->eeh_mode & EEH_MODE_NOCHECK) {
276#ifdef DEBUG
277 printk(KERN_INFO "PCI: skip building address cache for=%s - %s\n",
278 pci_name(dev), pdn->node->full_name);
279#endif
280 return;
281 }
282
283 /* The cache holds a reference to the device... */
284 pci_dev_get(dev);
285
286 /* Walk resources on this device, poke them into the tree */
287 for (i = 0; i < DEVICE_COUNT_RESOURCE; i++) {
288 unsigned long start = pci_resource_start(dev,i);
289 unsigned long end = pci_resource_end(dev,i);
290 unsigned int flags = pci_resource_flags(dev,i);
291
292 /* We are interested only bus addresses, not dma or other stuff */
293 if (0 == (flags & (IORESOURCE_IO | IORESOURCE_MEM)))
294 continue;
295 if (start == 0 || ~start == 0 || end == 0 || ~end == 0)
296 continue;
297 pci_addr_cache_insert(dev, start, end, flags);
298 inserted = 1;
299 }
300
301 /* If there was nothing to add, the cache has no reference... */
302 if (!inserted)
303 pci_dev_put(dev);
304}
305
306/**
307 * pci_addr_cache_insert_device - Add a device to the address cache
308 * @dev: PCI device whose I/O addresses we are interested in.
309 *
310 * In order to support the fast lookup of devices based on addresses,
311 * we maintain a cache of devices that can be quickly searched.
312 * This routine adds a device to that cache.
313 */
314static void pci_addr_cache_insert_device(struct pci_dev *dev)
315{
316 unsigned long flags;
317
318 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
319 __pci_addr_cache_insert_device(dev);
320 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
321}
322
323static inline void __pci_addr_cache_remove_device(struct pci_dev *dev)
324{
325 struct rb_node *n;
326 int removed = 0;
327
328restart:
329 n = rb_first(&pci_io_addr_cache_root.rb_root);
330 while (n) {
331 struct pci_io_addr_range *piar;
332 piar = rb_entry(n, struct pci_io_addr_range, rb_node);
333
334 if (piar->pcidev == dev) {
335 rb_erase(n, &pci_io_addr_cache_root.rb_root);
336 removed = 1;
337 kfree(piar);
338 goto restart;
339 }
340 n = rb_next(n);
341 }
342
343 /* The cache no longer holds its reference to this device... */
344 if (removed)
345 pci_dev_put(dev);
346}
347
348/**
349 * pci_addr_cache_remove_device - remove pci device from addr cache
350 * @dev: device to remove
351 *
352 * Remove a device from the addr-cache tree.
353 * This is potentially expensive, since it will walk
354 * the tree multiple times (once per resource).
355 * But so what; device removal doesn't need to be that fast.
356 */
357static void pci_addr_cache_remove_device(struct pci_dev *dev)
358{
359 unsigned long flags;
360
361 spin_lock_irqsave(&pci_io_addr_cache_root.piar_lock, flags);
362 __pci_addr_cache_remove_device(dev);
363 spin_unlock_irqrestore(&pci_io_addr_cache_root.piar_lock, flags);
364}
365
366/**
367 * pci_addr_cache_build - Build a cache of I/O addresses
368 *
369 * Build a cache of pci i/o addresses. This cache will be used to
370 * find the pci device that corresponds to a given address.
371 * This routine scans all pci busses to build the cache.
372 * Must be run late in boot process, after the pci controllers
373 * have been scaned for devices (after all device resources are known).
374 */
375void __init pci_addr_cache_build(void)
376{
377 struct pci_dev *dev = NULL;
378
379 if (!eeh_subsystem_enabled)
380 return;
381
382 spin_lock_init(&pci_io_addr_cache_root.piar_lock);
383
384 while ((dev = pci_get_device(PCI_ANY_ID, PCI_ANY_ID, dev)) != NULL) {
385 /* Ignore PCI bridges ( XXX why ??) */
386 if ((dev->class >> 16) == PCI_BASE_CLASS_BRIDGE) {
387 continue;
388 }
389 pci_addr_cache_insert_device(dev);
390 }
391
392#ifdef DEBUG
393 /* Verify tree built up above, echo back the list of addrs. */
394 pci_addr_cache_print(&pci_io_addr_cache_root);
395#endif
396}
397
398/* --------------------------------------------------------------- */
399/* Above lies the PCI Address Cache. Below lies the EEH event infrastructure */
400
401void eeh_slot_error_detail (struct pci_dn *pdn, int severity)
402{
403 unsigned long flags;
404 int rc;
405
406 /* Log the error with the rtas logger */
407 spin_lock_irqsave(&slot_errbuf_lock, flags);
408 memset(slot_errbuf, 0, eeh_error_buf_size);
409
410 rc = rtas_call(ibm_slot_error_detail,
411 8, 1, NULL, pdn->eeh_config_addr,
412 BUID_HI(pdn->phb->buid),
413 BUID_LO(pdn->phb->buid), NULL, 0,
414 virt_to_phys(slot_errbuf),
415 eeh_error_buf_size,
416 severity);
417
418 if (rc == 0)
419 log_error(slot_errbuf, ERR_TYPE_RTAS_LOG, 0);
420 spin_unlock_irqrestore(&slot_errbuf_lock, flags);
421}
422
423/**
424 * eeh_register_notifier - Register to find out about EEH events.
425 * @nb: notifier block to callback on events
426 */
427int eeh_register_notifier(struct notifier_block *nb)
428{
429 return notifier_chain_register(&eeh_notifier_chain, nb);
430}
431
432/**
433 * eeh_unregister_notifier - Unregister to an EEH event notifier.
434 * @nb: notifier block to callback on events
435 */
436int eeh_unregister_notifier(struct notifier_block *nb)
437{
438 return notifier_chain_unregister(&eeh_notifier_chain, nb);
439}
440
441/**
442 * read_slot_reset_state - Read the reset state of a device node's slot
443 * @dn: device node to read
444 * @rets: array to return results in
445 */
446static int read_slot_reset_state(struct pci_dn *pdn, int rets[])
447{
448 int token, outputs;
449
450 if (ibm_read_slot_reset_state2 != RTAS_UNKNOWN_SERVICE) {
451 token = ibm_read_slot_reset_state2;
452 outputs = 4;
453 } else {
454 token = ibm_read_slot_reset_state;
455 rets[2] = 0; /* fake PE Unavailable info */
456 outputs = 3;
457 }
458
459 return rtas_call(token, 3, outputs, rets, pdn->eeh_config_addr,
460 BUID_HI(pdn->phb->buid), BUID_LO(pdn->phb->buid));
461}
462
463/**
464 * eeh_panic - call panic() for an eeh event that cannot be handled.
465 * The philosophy of this routine is that it is better to panic and
466 * halt the OS than it is to risk possible data corruption by
467 * oblivious device drivers that don't know better.
468 *
469 * @dev pci device that had an eeh event
470 * @reset_state current reset state of the device slot
471 */
472static void eeh_panic(struct pci_dev *dev, int reset_state)
473{
474 /*
475 * XXX We should create a separate sysctl for this.
476 *
477 * Since the panic_on_oops sysctl is used to halt the system
478 * in light of potential corruption, we can use it here.
479 */
480 if (panic_on_oops) {
481 struct device_node *dn = pci_device_to_OF_node(dev);
482 eeh_slot_error_detail (PCI_DN(dn), 2 /* Permanent Error */);
483 panic("EEH: MMIO failure (%d) on device:%s\n", reset_state,
484 pci_name(dev));
485 }
486 else {
487 __get_cpu_var(ignored_failures)++;
488 printk(KERN_INFO "EEH: Ignored MMIO failure (%d) on device:%s\n",
489 reset_state, pci_name(dev));
490 }
491}
492
493/**
494 * eeh_event_handler - dispatch EEH events. The detection of a frozen
495 * slot can occur inside an interrupt, where it can be hard to do
496 * anything about it. The goal of this routine is to pull these
497 * detection events out of the context of the interrupt handler, and
498 * re-dispatch them for processing at a later time in a normal context.
499 *
500 * @dummy - unused
501 */
502static void eeh_event_handler(void *dummy)
503{
504 unsigned long flags;
505 struct eeh_event *event;
506
507 while (1) {
508 spin_lock_irqsave(&eeh_eventlist_lock, flags);
509 event = NULL;
510 if (!list_empty(&eeh_eventlist)) {
511 event = list_entry(eeh_eventlist.next, struct eeh_event, list);
512 list_del(&event->list);
513 }
514 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
515 if (event == NULL)
516 break;
517
518 printk(KERN_INFO "EEH: MMIO failure (%d), notifiying device "
519 "%s\n", event->reset_state,
520 pci_name(event->dev));
521
522 notifier_call_chain (&eeh_notifier_chain,
523 EEH_NOTIFY_FREEZE, event);
524
525 pci_dev_put(event->dev);
526 kfree(event);
527 }
528}
529
530/**
531 * eeh_token_to_phys - convert EEH address token to phys address
532 * @token i/o token, should be address in the form 0xA....
533 */
534static inline unsigned long eeh_token_to_phys(unsigned long token)
535{
536 pte_t *ptep;
537 unsigned long pa;
538
539 ptep = find_linux_pte(init_mm.pgd, token);
540 if (!ptep)
541 return token;
542 pa = pte_pfn(*ptep) << PAGE_SHIFT;
543
544 return pa | (token & (PAGE_SIZE-1));
545}
546
547/**
548 * Return the "partitionable endpoint" (pe) under which this device lies
549 */
550static struct device_node * find_device_pe(struct device_node *dn)
551{
552 while ((dn->parent) && PCI_DN(dn->parent) &&
553 (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
554 dn = dn->parent;
555 }
556 return dn;
557}
558
559/** Mark all devices that are peers of this device as failed.
560 * Mark the device driver too, so that it can see the failure
561 * immediately; this is critical, since some drivers poll
562 * status registers in interrupts ... If a driver is polling,
563 * and the slot is frozen, then the driver can deadlock in
564 * an interrupt context, which is bad.
565 */
566
567static inline void __eeh_mark_slot (struct device_node *dn)
568{
569 while (dn) {
570 PCI_DN(dn)->eeh_mode |= EEH_MODE_ISOLATED;
571
572 if (dn->child)
573 __eeh_mark_slot (dn->child);
574 dn = dn->sibling;
575 }
576}
577
578static inline void __eeh_clear_slot (struct device_node *dn)
579{
580 while (dn) {
581 PCI_DN(dn)->eeh_mode &= ~EEH_MODE_ISOLATED;
582 if (dn->child)
583 __eeh_clear_slot (dn->child);
584 dn = dn->sibling;
585 }
586}
587
588static inline void eeh_clear_slot (struct device_node *dn)
589{
590 unsigned long flags;
591 spin_lock_irqsave(&confirm_error_lock, flags);
592 __eeh_clear_slot (dn);
593 spin_unlock_irqrestore(&confirm_error_lock, flags);
594}
595
596/**
597 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
598 * @dn device node
599 * @dev pci device, if known
600 *
601 * Check for an EEH failure for the given device node. Call this
602 * routine if the result of a read was all 0xff's and you want to
603 * find out if this is due to an EEH slot freeze. This routine
604 * will query firmware for the EEH status.
605 *
606 * Returns 0 if there has not been an EEH error; otherwise returns
607 * a non-zero value and queues up a slot isolation event notification.
608 *
609 * It is safe to call this routine in an interrupt context.
610 */
611int eeh_dn_check_failure(struct device_node *dn, struct pci_dev *dev)
612{
613 int ret;
614 int rets[3];
615 unsigned long flags;
616 int reset_state;
617 struct eeh_event *event;
618 struct pci_dn *pdn;
619 struct device_node *pe_dn;
620 int rc = 0;
621
622 __get_cpu_var(total_mmio_ffs)++;
623
624 if (!eeh_subsystem_enabled)
625 return 0;
626
627 if (!dn) {
628 __get_cpu_var(no_dn)++;
629 return 0;
630 }
631 pdn = PCI_DN(dn);
632
633 /* Access to IO BARs might get this far and still not want checking. */
634 if (!(pdn->eeh_mode & EEH_MODE_SUPPORTED) ||
635 pdn->eeh_mode & EEH_MODE_NOCHECK) {
636 __get_cpu_var(ignored_check)++;
637#ifdef DEBUG
638 printk ("EEH:ignored check (%x) for %s %s\n",
639 pdn->eeh_mode, pci_name (dev), dn->full_name);
640#endif
641 return 0;
642 }
643
644 if (!pdn->eeh_config_addr) {
645 __get_cpu_var(no_cfg_addr)++;
646 return 0;
647 }
648
649 /* If we already have a pending isolation event for this
650 * slot, we know it's bad already, we don't need to check.
651 * Do this checking under a lock; as multiple PCI devices
652 * in one slot might report errors simultaneously, and we
653 * only want one error recovery routine running.
654 */
655 spin_lock_irqsave(&confirm_error_lock, flags);
656 rc = 1;
657 if (pdn->eeh_mode & EEH_MODE_ISOLATED) {
658 pdn->eeh_check_count ++;
659 if (pdn->eeh_check_count >= EEH_MAX_FAILS) {
660 printk (KERN_ERR "EEH: Device driver ignored %d bad reads, panicing\n",
661 pdn->eeh_check_count);
662 dump_stack();
663
664 /* re-read the slot reset state */
665 if (read_slot_reset_state(pdn, rets) != 0)
666 rets[0] = -1; /* reset state unknown */
667
668 /* If we are here, then we hit an infinite loop. Stop. */
669 panic("EEH: MMIO halt (%d) on device:%s\n", rets[0], pci_name(dev));
670 }
671 goto dn_unlock;
672 }
673
674 /*
675 * Now test for an EEH failure. This is VERY expensive.
676 * Note that the eeh_config_addr may be a parent device
677 * in the case of a device behind a bridge, or it may be
678 * function zero of a multi-function device.
679 * In any case they must share a common PHB.
680 */
681 ret = read_slot_reset_state(pdn, rets);
682
683 /* If the call to firmware failed, punt */
684 if (ret != 0) {
685 printk(KERN_WARNING "EEH: read_slot_reset_state() failed; rc=%d dn=%s\n",
686 ret, dn->full_name);
687 __get_cpu_var(false_positives)++;
688 rc = 0;
689 goto dn_unlock;
690 }
691
692 /* If EEH is not supported on this device, punt. */
693 if (rets[1] != 1) {
694 printk(KERN_WARNING "EEH: event on unsupported device, rc=%d dn=%s\n",
695 ret, dn->full_name);
696 __get_cpu_var(false_positives)++;
697 rc = 0;
698 goto dn_unlock;
699 }
700
701 /* If not the kind of error we know about, punt. */
702 if (rets[0] != 2 && rets[0] != 4 && rets[0] != 5) {
703 __get_cpu_var(false_positives)++;
704 rc = 0;
705 goto dn_unlock;
706 }
707
708 /* Note that config-io to empty slots may fail;
709 * we recognize empty because they don't have children. */
710 if ((rets[0] == 5) && (dn->child == NULL)) {
711 __get_cpu_var(false_positives)++;
712 rc = 0;
713 goto dn_unlock;
714 }
715
716 __get_cpu_var(slot_resets)++;
717
718 /* Avoid repeated reports of this failure, including problems
719 * with other functions on this device, and functions under
720 * bridges. */
721 pe_dn = find_device_pe (dn);
722 __eeh_mark_slot (pe_dn);
723 spin_unlock_irqrestore(&confirm_error_lock, flags);
724
725 reset_state = rets[0];
726
727 eeh_slot_error_detail (pdn, 1 /* Temporary Error */);
728
729 printk(KERN_INFO "EEH: MMIO failure (%d) on device: %s %s\n",
730 rets[0], dn->name, dn->full_name);
731 event = kmalloc(sizeof(*event), GFP_ATOMIC);
732 if (event == NULL) {
733 eeh_panic(dev, reset_state);
734 return 1;
735 }
736
737 event->dev = dev;
738 event->dn = dn;
739 event->reset_state = reset_state;
740
741 /* We may or may not be called in an interrupt context */
742 spin_lock_irqsave(&eeh_eventlist_lock, flags);
743 list_add(&event->list, &eeh_eventlist);
744 spin_unlock_irqrestore(&eeh_eventlist_lock, flags);
745
746 /* Most EEH events are due to device driver bugs. Having
747 * a stack trace will help the device-driver authors figure
748 * out what happened. So print that out. */
749 if (rets[0] != 5) dump_stack();
750 schedule_work(&eeh_event_wq);
751
752 return 1;
753
754dn_unlock:
755 spin_unlock_irqrestore(&confirm_error_lock, flags);
756 return rc;
757}
758
759EXPORT_SYMBOL_GPL(eeh_dn_check_failure);
760
761/**
762 * eeh_check_failure - check if all 1's data is due to EEH slot freeze
763 * @token i/o token, should be address in the form 0xA....
764 * @val value, should be all 1's (XXX why do we need this arg??)
765 *
766 * Check for an EEH failure at the given token address. Call this
767 * routine if the result of a read was all 0xff's and you want to
768 * find out if this is due to an EEH slot freeze event. This routine
769 * will query firmware for the EEH status.
770 *
771 * Note this routine is safe to call in an interrupt context.
772 */
773unsigned long eeh_check_failure(const volatile void __iomem *token, unsigned long val)
774{
775 unsigned long addr;
776 struct pci_dev *dev;
777 struct device_node *dn;
778
779 /* Finding the phys addr + pci device; this is pretty quick. */
780 addr = eeh_token_to_phys((unsigned long __force) token);
781 dev = pci_get_device_by_addr(addr);
782 if (!dev) {
783 __get_cpu_var(no_device)++;
784 return val;
785 }
786
787 dn = pci_device_to_OF_node(dev);
788 eeh_dn_check_failure (dn, dev);
789
790 pci_dev_put(dev);
791 return val;
792}
793
794EXPORT_SYMBOL(eeh_check_failure);
795
796struct eeh_early_enable_info {
797 unsigned int buid_hi;
798 unsigned int buid_lo;
799};
800
801/* Enable eeh for the given device node. */
802static void *early_enable_eeh(struct device_node *dn, void *data)
803{
804 struct eeh_early_enable_info *info = data;
805 int ret;
806 char *status = get_property(dn, "status", NULL);
807 u32 *class_code = (u32 *)get_property(dn, "class-code", NULL);
808 u32 *vendor_id = (u32 *)get_property(dn, "vendor-id", NULL);
809 u32 *device_id = (u32 *)get_property(dn, "device-id", NULL);
810 u32 *regs;
811 int enable;
812 struct pci_dn *pdn = PCI_DN(dn);
813
814 pdn->eeh_mode = 0;
815 pdn->eeh_check_count = 0;
816 pdn->eeh_freeze_count = 0;
817
818 if (status && strcmp(status, "ok") != 0)
819 return NULL; /* ignore devices with bad status */
820
821 /* Ignore bad nodes. */
822 if (!class_code || !vendor_id || !device_id)
823 return NULL;
824
825 /* There is nothing to check on PCI to ISA bridges */
826 if (dn->type && !strcmp(dn->type, "isa")) {
827 pdn->eeh_mode |= EEH_MODE_NOCHECK;
828 return NULL;
829 }
830
831 /*
832 * Now decide if we are going to "Disable" EEH checking
833 * for this device. We still run with the EEH hardware active,
834 * but we won't be checking for ff's. This means a driver
835 * could return bad data (very bad!), an interrupt handler could
836 * hang waiting on status bits that won't change, etc.
837 * But there are a few cases like display devices that make sense.
838 */
839 enable = 1; /* i.e. we will do checking */
840 if ((*class_code >> 16) == PCI_BASE_CLASS_DISPLAY)
841 enable = 0;
842
843 if (!enable)
844 pdn->eeh_mode |= EEH_MODE_NOCHECK;
845
846 /* Ok... see if this device supports EEH. Some do, some don't,
847 * and the only way to find out is to check each and every one. */
848 regs = (u32 *)get_property(dn, "reg", NULL);
849 if (regs) {
850 /* First register entry is addr (00BBSS00) */
851 /* Try to enable eeh */
852 ret = rtas_call(ibm_set_eeh_option, 4, 1, NULL,
853 regs[0], info->buid_hi, info->buid_lo,
854 EEH_ENABLE);
855 if (ret == 0) {
856 eeh_subsystem_enabled = 1;
857 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
858 pdn->eeh_config_addr = regs[0];
859#ifdef DEBUG
860 printk(KERN_DEBUG "EEH: %s: eeh enabled\n", dn->full_name);
861#endif
862 } else {
863
864 /* This device doesn't support EEH, but it may have an
865 * EEH parent, in which case we mark it as supported. */
866 if (dn->parent && PCI_DN(dn->parent)
867 && (PCI_DN(dn->parent)->eeh_mode & EEH_MODE_SUPPORTED)) {
868 /* Parent supports EEH. */
869 pdn->eeh_mode |= EEH_MODE_SUPPORTED;
870 pdn->eeh_config_addr = PCI_DN(dn->parent)->eeh_config_addr;
871 return NULL;
872 }
873 }
874 } else {
875 printk(KERN_WARNING "EEH: %s: unable to get reg property.\n",
876 dn->full_name);
877 }
878
879 return NULL;
880}
881
882/*
883 * Initialize EEH by trying to enable it for all of the adapters in the system.
884 * As a side effect we can determine here if eeh is supported at all.
885 * Note that we leave EEH on so failed config cycles won't cause a machine
886 * check. If a user turns off EEH for a particular adapter they are really
887 * telling Linux to ignore errors. Some hardware (e.g. POWER5) won't
888 * grant access to a slot if EEH isn't enabled, and so we always enable
889 * EEH for all slots/all devices.
890 *
891 * The eeh-force-off option disables EEH checking globally, for all slots.
892 * Even if force-off is set, the EEH hardware is still enabled, so that
893 * newer systems can boot.
894 */
895void __init eeh_init(void)
896{
897 struct device_node *phb, *np;
898 struct eeh_early_enable_info info;
899
900 spin_lock_init(&confirm_error_lock);
901 spin_lock_init(&slot_errbuf_lock);
902
903 np = of_find_node_by_path("/rtas");
904 if (np == NULL)
905 return;
906
907 ibm_set_eeh_option = rtas_token("ibm,set-eeh-option");
908 ibm_set_slot_reset = rtas_token("ibm,set-slot-reset");
909 ibm_read_slot_reset_state2 = rtas_token("ibm,read-slot-reset-state2");
910 ibm_read_slot_reset_state = rtas_token("ibm,read-slot-reset-state");
911 ibm_slot_error_detail = rtas_token("ibm,slot-error-detail");
912
913 if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
914 return;
915
916 eeh_error_buf_size = rtas_token("rtas-error-log-max");
917 if (eeh_error_buf_size == RTAS_UNKNOWN_SERVICE) {
918 eeh_error_buf_size = 1024;
919 }
920 if (eeh_error_buf_size > RTAS_ERROR_LOG_MAX) {
921 printk(KERN_WARNING "EEH: rtas-error-log-max is bigger than allocated "
922 "buffer ! (%d vs %d)", eeh_error_buf_size, RTAS_ERROR_LOG_MAX);
923 eeh_error_buf_size = RTAS_ERROR_LOG_MAX;
924 }
925
926 /* Enable EEH for all adapters. Note that eeh requires buid's */
927 for (phb = of_find_node_by_name(NULL, "pci"); phb;
928 phb = of_find_node_by_name(phb, "pci")) {
929 unsigned long buid;
930
931 buid = get_phb_buid(phb);
932 if (buid == 0 || PCI_DN(phb) == NULL)
933 continue;
934
935 info.buid_lo = BUID_LO(buid);
936 info.buid_hi = BUID_HI(buid);
937 traverse_pci_devices(phb, early_enable_eeh, &info);
938 }
939
940 if (eeh_subsystem_enabled)
941 printk(KERN_INFO "EEH: PCI Enhanced I/O Error Handling Enabled\n");
942 else
943 printk(KERN_WARNING "EEH: No capable adapters found\n");
944}
945
946/**
947 * eeh_add_device_early - enable EEH for the indicated device_node
948 * @dn: device node for which to set up EEH
949 *
950 * This routine must be used to perform EEH initialization for PCI
951 * devices that were added after system boot (e.g. hotplug, dlpar).
952 * This routine must be called before any i/o is performed to the
953 * adapter (inluding any config-space i/o).
954 * Whether this actually enables EEH or not for this device depends
955 * on the CEC architecture, type of the device, on earlier boot
956 * command-line arguments & etc.
957 */
958void eeh_add_device_early(struct device_node *dn)
959{
960 struct pci_controller *phb;
961 struct eeh_early_enable_info info;
962
963 if (!dn || !PCI_DN(dn))
964 return;
965 phb = PCI_DN(dn)->phb;
966 if (NULL == phb || 0 == phb->buid) {
967 printk(KERN_WARNING "EEH: Expected buid but found none for %s\n",
968 dn->full_name);
969 dump_stack();
970 return;
971 }
972
973 info.buid_hi = BUID_HI(phb->buid);
974 info.buid_lo = BUID_LO(phb->buid);
975 early_enable_eeh(dn, &info);
976}
977EXPORT_SYMBOL_GPL(eeh_add_device_early);
978
979/**
980 * eeh_add_device_late - perform EEH initialization for the indicated pci device
981 * @dev: pci device for which to set up EEH
982 *
983 * This routine must be used to complete EEH initialization for PCI
984 * devices that were added after system boot (e.g. hotplug, dlpar).
985 */
986void eeh_add_device_late(struct pci_dev *dev)
987{
988 struct device_node *dn;
989
990 if (!dev || !eeh_subsystem_enabled)
991 return;
992
993#ifdef DEBUG
994 printk(KERN_DEBUG "EEH: adding device %s\n", pci_name(dev));
995#endif
996
997 pci_dev_get (dev);
998 dn = pci_device_to_OF_node(dev);
999 PCI_DN(dn)->pcidev = dev;
1000
1001 pci_addr_cache_insert_device (dev);
1002}
1003EXPORT_SYMBOL_GPL(eeh_add_device_late);
1004
1005/**
1006 * eeh_remove_device - undo EEH setup for the indicated pci device
1007 * @dev: pci device to be removed
1008 *
1009 * This routine should be when a device is removed from a running
1010 * system (e.g. by hotplug or dlpar).
1011 */
1012void eeh_remove_device(struct pci_dev *dev)
1013{
1014 struct device_node *dn;
1015 if (!dev || !eeh_subsystem_enabled)
1016 return;
1017
1018 /* Unregister the device with the EEH/PCI address search system */
1019#ifdef DEBUG
1020 printk(KERN_DEBUG "EEH: remove device %s\n", pci_name(dev));
1021#endif
1022 pci_addr_cache_remove_device(dev);
1023
1024 dn = pci_device_to_OF_node(dev);
1025 PCI_DN(dn)->pcidev = NULL;
1026 pci_dev_put (dev);
1027}
1028EXPORT_SYMBOL_GPL(eeh_remove_device);
1029
1030static int proc_eeh_show(struct seq_file *m, void *v)
1031{
1032 unsigned int cpu;
1033 unsigned long ffs = 0, positives = 0, failures = 0;
1034 unsigned long resets = 0;
1035 unsigned long no_dev = 0, no_dn = 0, no_cfg = 0, no_check = 0;
1036
1037 for_each_cpu(cpu) {
1038 ffs += per_cpu(total_mmio_ffs, cpu);
1039 positives += per_cpu(false_positives, cpu);
1040 failures += per_cpu(ignored_failures, cpu);
1041 resets += per_cpu(slot_resets, cpu);
1042 no_dev += per_cpu(no_device, cpu);
1043 no_dn += per_cpu(no_dn, cpu);
1044 no_cfg += per_cpu(no_cfg_addr, cpu);
1045 no_check += per_cpu(ignored_check, cpu);
1046 }
1047
1048 if (0 == eeh_subsystem_enabled) {
1049 seq_printf(m, "EEH Subsystem is globally disabled\n");
1050 seq_printf(m, "eeh_total_mmio_ffs=%ld\n", ffs);
1051 } else {
1052 seq_printf(m, "EEH Subsystem is enabled\n");
1053 seq_printf(m,
1054 "no device=%ld\n"
1055 "no device node=%ld\n"
1056 "no config address=%ld\n"
1057 "check not wanted=%ld\n"
1058 "eeh_total_mmio_ffs=%ld\n"
1059 "eeh_false_positives=%ld\n"
1060 "eeh_ignored_failures=%ld\n"
1061 "eeh_slot_resets=%ld\n",
1062 no_dev, no_dn, no_cfg, no_check,
1063 ffs, positives, failures, resets);
1064 }
1065
1066 return 0;
1067}
1068
1069static int proc_eeh_open(struct inode *inode, struct file *file)
1070{
1071 return single_open(file, proc_eeh_show, NULL);
1072}
1073
1074static struct file_operations proc_eeh_operations = {
1075 .open = proc_eeh_open,
1076 .read = seq_read,
1077 .llseek = seq_lseek,
1078 .release = single_release,
1079};
1080
1081static int __init eeh_init_proc(void)
1082{
1083 struct proc_dir_entry *e;
1084
1085 if (systemcfg->platform & PLATFORM_PSERIES) {
1086 e = create_proc_entry("ppc64/eeh", 0, NULL);
1087 if (e)
1088 e->proc_fops = &proc_eeh_operations;
1089 }
1090
1091 return 0;
1092}
1093__initcall(eeh_init_proc);
generated by cgit v1.2.2 (git 2.25.0) at 2024-11-30 07:42:30 -0500