9 files changed, 57 insertions, 24 deletions

diff --git a/arch/ppc64/kernel/head.S b/arch/ppc64/kernel/head.S
index 74fc3bc68604..784f56d4684c 100644
--- a/arch/ppc64/kernel/head.S
+++ b/arch/ppc64/kernel/head.S
@@ -2071,7 +2071,7 @@ _GLOBAL(hmt_start_secondary)
         blr
 #endif
 
-#if defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES)
+#if defined(CONFIG_KEXEC) || (defined(CONFIG_SMP) && !defined(CONFIG_PPC_ISERIES))
 _GLOBAL(smp_release_cpus)
         /* All secondary cpus are spinning on a common
          * spinloop, release them all now so they can start
diff --git a/arch/ppc64/kernel/machine_kexec.c b/arch/ppc64/kernel/machine_kexec.c
index fdb2fc649d72..4775f12a013c 100644
--- a/arch/ppc64/kernel/machine_kexec.c
+++ b/arch/ppc64/kernel/machine_kexec.c
@@ -185,7 +185,7 @@ void kexec_copy_flush(struct kimage *image)
 void kexec_smp_down(void *arg)
 {
         if (ppc_md.cpu_irq_down)
-                ppc_md.cpu_irq_down();
+                ppc_md.cpu_irq_down(1);
 
         local_irq_disable();
         kexec_smp_wait();
@@ -232,7 +232,7 @@ static void kexec_prepare_cpus(void)
 
         /* after we tell the others to go down */
         if (ppc_md.cpu_irq_down)
-                ppc_md.cpu_irq_down();
+                ppc_md.cpu_irq_down(0);
 
         put_cpu();
 
@@ -243,15 +243,19 @@ static void kexec_prepare_cpus(void)
 
 static void kexec_prepare_cpus(void)
 {
+        extern void smp_release_cpus(void);
         /*
          * move the secondarys to us so that we can copy
          * the new kernel 0-0x100 safely
          *
          * do this if kexec in setup.c ?
+         *
+         * We need to release the cpus if we are ever going from an
+         * UP to an SMP kernel.
          */
-        smp_relase_cpus();
+        smp_release_cpus();
         if (ppc_md.cpu_irq_down)
-                ppc_md.cpu_irq_down();
+                ppc_md.cpu_irq_down(0);
         local_irq_disable();
 }
 
diff --git a/arch/ppc64/kernel/misc.S b/arch/ppc64/kernel/misc.S
index 59f4f9973818..a05b50b738e9 100644
--- a/arch/ppc64/kernel/misc.S
+++ b/arch/ppc64/kernel/misc.S
@@ -1129,6 +1129,9 @@ _GLOBAL(sys_call_table32)
         .llong .compat_sys_waitid
         .llong .sys32_ioprio_set
         .llong .sys32_ioprio_get
+        .llong .sys_inotify_init        /* 275 */
+        .llong .sys_inotify_add_watch
+        .llong .sys_inotify_rm_watch
 
         .balign 8
 _GLOBAL(sys_call_table)
@@ -1407,3 +1410,6 @@ _GLOBAL(sys_call_table)
         .llong .sys_waitid
         .llong .sys_ioprio_set
         .llong .sys_ioprio_get
+        .llong .sys_inotify_init        /* 275 */
+        .llong .sys_inotify_add_watch
+        .llong .sys_inotify_rm_watch
diff --git a/arch/ppc64/kernel/mpic.c b/arch/ppc64/kernel/mpic.c
index e8fbab1df37f..cc262a05ddb4 100644
--- a/arch/ppc64/kernel/mpic.c
+++ b/arch/ppc64/kernel/mpic.c
@@ -794,10 +794,10 @@ void mpic_setup_this_cpu(void)
 
 /*
  * XXX: someone who knows mpic should check this.
- * do we need to eoi the ipi here (see xics comments)?
+ * do we need to eoi the ipi including for kexec cpu here (see xics comments)?
  * or can we reset the mpic in the new kernel?
  */
-void mpic_teardown_this_cpu(void)
+void mpic_teardown_this_cpu(int secondary)
 {
         struct mpic *mpic = mpic_primary;
         unsigned long flags;
diff --git a/arch/ppc64/kernel/mpic.h b/arch/ppc64/kernel/mpic.h
index 99fbbc9a084c..ca78a7f10528 100644
--- a/arch/ppc64/kernel/mpic.h
+++ b/arch/ppc64/kernel/mpic.h
@@ -256,7 +256,7 @@ extern unsigned int mpic_irq_get_priority(unsigned int irq);
 extern void mpic_setup_this_cpu(void);
 
 /* Clean up for kexec (or cpu offline or ...) */
-extern void mpic_teardown_this_cpu(void);
+extern void mpic_teardown_this_cpu(int secondary);
 
 /* Request IPIs on primary mpic */
 extern void mpic_request_ipis(void);
diff --git a/arch/ppc64/kernel/pci.c b/arch/ppc64/kernel/pci.c
index ae6f579d3fa0..d0d55c7908ef 100644
--- a/arch/ppc64/kernel/pci.c
+++ b/arch/ppc64/kernel/pci.c
@@ -108,8 +108,28 @@ void  pcibios_resource_to_bus(struct pci_dev *dev, struct pci_bus_region *region
         region->end = res->end - offset;
 }
 
+void pcibios_bus_to_resource(struct pci_dev *dev, struct resource *res,
+                              struct pci_bus_region *region)
+{
+        unsigned long offset = 0;
+        struct pci_controller *hose = pci_bus_to_host(dev->bus);
+
+        if (!hose)
+                return;
+
+        if (res->flags & IORESOURCE_IO)
+                offset = (unsigned long)hose->io_base_virt - pci_io_base;
+
+        if (res->flags & IORESOURCE_MEM)
+                offset = hose->pci_mem_offset;
+
+        res->start = region->start + offset;
+        res->end = region->end + offset;
+}
+
 #ifdef CONFIG_HOTPLUG
 EXPORT_SYMBOL(pcibios_resource_to_bus);
+EXPORT_SYMBOL(pcibios_bus_to_resource);
 #endif
 
 /*
diff --git a/arch/ppc64/kernel/prom.c b/arch/ppc64/kernel/prom.c
index 47727a6f7346..5aca01ddd81f 100644
--- a/arch/ppc64/kernel/prom.c
+++ b/arch/ppc64/kernel/prom.c
@@ -916,6 +916,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                 }
         }
 
+#ifdef CONFIG_ALTIVEC
         /* Check if we have a VMX and eventually update CPU features */
         prop = (u32 *)get_flat_dt_prop(node, "ibm,vmx", NULL);
         if (prop && (*prop) > 0) {
@@ -929,6 +930,7 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                 cur_cpu_spec->cpu_features |= CPU_FTR_ALTIVEC;
                 cur_cpu_spec->cpu_user_features |= PPC_FEATURE_HAS_ALTIVEC;
         }
+#endif /* CONFIG_ALTIVEC */
 
         /*
          * Check for an SMT capable CPU and set the CPU feature. We do
diff --git a/arch/ppc64/kernel/prom_init.c b/arch/ppc64/kernel/prom_init.c
index e248a7950aeb..dbbe6c79d8da 100644
--- a/arch/ppc64/kernel/prom_init.c
+++ b/arch/ppc64/kernel/prom_init.c
@@ -1803,7 +1803,7 @@ static void __init fixup_device_tree(void)
         if (prom_getprop(u3, "device-rev", &u3_rev, sizeof(u3_rev))
             == PROM_ERROR)
                 return;
-        if (u3_rev != 0x35)
+        if (u3_rev != 0x35 && u3_rev != 0x37)
                 return;
         /* does it need fixup ? */
         if (prom_getproplen(i2c, "interrupts") > 0)
diff --git a/arch/ppc64/kernel/xics.c b/arch/ppc64/kernel/xics.c
index 677c4450984a..d9dc6f28d050 100644
--- a/arch/ppc64/kernel/xics.c
+++ b/arch/ppc64/kernel/xics.c
@@ -647,29 +647,30 @@ static void xics_set_affinity(unsigned int virq, cpumask_t cpumask)
         }
 }
 
-void xics_teardown_cpu(void)
+void xics_teardown_cpu(int secondary)
 {
         int cpu = smp_processor_id();
-        int status;
 
         ops->cppr_info(cpu, 0x00);
         iosync();
 
         /*
-         * we need to EOI the IPI if we got here from kexec down IPI
-         *
-         * xics doesn't care if we duplicate an EOI as long as we
-         * don't EOI and raise priority.
-         *
-         * probably need to check all the other interrupts too
-         * should we be flagging idle loop instead?
-         * or creating some task to be scheduled?
+         * Some machines need to have at least one cpu in the GIQ,
+         * so leave the master cpu in the group.
          */
-        ops->xirr_info_set(cpu, XICS_IPI);
-
-        status = rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
-                (1UL << interrupt_server_size) - 1 - default_distrib_server, 0);
-        WARN_ON(status != 0);
+        if (secondary) {
+                /*
+                 * we need to EOI the IPI if we got here from kexec down IPI
+                 *
+                 * probably need to check all the other interrupts too
+                 * should we be flagging idle loop instead?
+                 * or creating some task to be scheduled?
+                 */
+                ops->xirr_info_set(cpu, XICS_IPI);
+                rtas_set_indicator(GLOBAL_INTERRUPT_QUEUE,
+                        (1UL << interrupt_server_size) - 1 -
+                        default_distrib_server, 0);
+        }
 }
 
 #ifdef CONFIG_HOTPLUG_CPU