diff options
Diffstat (limited to 'arch/ppc64/kernel/vdso32/cacheflush.S')
-rw-r--r-- | arch/ppc64/kernel/vdso32/cacheflush.S | 65 |
1 files changed, 65 insertions, 0 deletions
diff --git a/arch/ppc64/kernel/vdso32/cacheflush.S b/arch/ppc64/kernel/vdso32/cacheflush.S new file mode 100644 index 000000000000..c74fddb6afd4 --- /dev/null +++ b/arch/ppc64/kernel/vdso32/cacheflush.S | |||
@@ -0,0 +1,65 @@ | |||
1 | /* | ||
2 | * vDSO provided cache flush routines | ||
3 | * | ||
4 | * Copyright (C) 2004 Benjamin Herrenschmuidt (benh@kernel.crashing.org), | ||
5 | * IBM Corp. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | #include <linux/config.h> | ||
13 | #include <asm/processor.h> | ||
14 | #include <asm/ppc_asm.h> | ||
15 | #include <asm/vdso.h> | ||
16 | #include <asm/offsets.h> | ||
17 | |||
18 | .text | ||
19 | |||
20 | /* | ||
21 | * Default "generic" version of __kernel_sync_dicache. | ||
22 | * | ||
23 | * void __kernel_sync_dicache(unsigned long start, unsigned long end) | ||
24 | * | ||
25 | * Flushes the data cache & invalidate the instruction cache for the | ||
26 | * provided range [start, end[ | ||
27 | * | ||
28 | * Note: all CPUs supported by this kernel have a 128 bytes cache | ||
29 | * line size so we don't have to peek that info from the datapage | ||
30 | */ | ||
31 | V_FUNCTION_BEGIN(__kernel_sync_dicache) | ||
32 | .cfi_startproc | ||
33 | li r5,127 | ||
34 | andc r6,r3,r5 /* round low to line bdy */ | ||
35 | subf r8,r6,r4 /* compute length */ | ||
36 | add r8,r8,r5 /* ensure we get enough */ | ||
37 | srwi. r8,r8,7 /* compute line count */ | ||
38 | beqlr /* nothing to do? */ | ||
39 | mtctr r8 | ||
40 | mr r3,r6 | ||
41 | 1: dcbst 0,r3 | ||
42 | addi r3,r3,128 | ||
43 | bdnz 1b | ||
44 | sync | ||
45 | mtctr r8 | ||
46 | 1: icbi 0,r6 | ||
47 | addi r6,r6,128 | ||
48 | bdnz 1b | ||
49 | isync | ||
50 | blr | ||
51 | .cfi_endproc | ||
52 | V_FUNCTION_END(__kernel_sync_dicache) | ||
53 | |||
54 | |||
55 | /* | ||
56 | * POWER5 version of __kernel_sync_dicache | ||
57 | */ | ||
58 | V_FUNCTION_BEGIN(__kernel_sync_dicache_p5) | ||
59 | .cfi_startproc | ||
60 | sync | ||
61 | isync | ||
62 | blr | ||
63 | .cfi_endproc | ||
64 | V_FUNCTION_END(__kernel_sync_dicache_p5) | ||
65 | |||