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-rw-r--r--arch/ppc64/kernel/udbg.c360
1 files changed, 360 insertions, 0 deletions
diff --git a/arch/ppc64/kernel/udbg.c b/arch/ppc64/kernel/udbg.c
new file mode 100644
index 000000000000..d4ccd6f1ef47
--- /dev/null
+++ b/arch/ppc64/kernel/udbg.c
@@ -0,0 +1,360 @@
1/*
2 * NS16550 Serial Port (uart) debugging stuff.
3 *
4 * c 2001 PPC 64 Team, IBM Corp
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version
9 * 2 of the License, or (at your option) any later version.
10 */
11
12#include <stdarg.h>
13#define WANT_PPCDBG_TAB /* Only defined here */
14#include <linux/config.h>
15#include <linux/types.h>
16#include <asm/ppcdebug.h>
17#include <asm/processor.h>
18#include <asm/uaccess.h>
19#include <asm/machdep.h>
20#include <asm/io.h>
21#include <asm/prom.h>
22#include <asm/pmac_feature.h>
23
24extern u8 real_readb(volatile u8 __iomem *addr);
25extern void real_writeb(u8 data, volatile u8 __iomem *addr);
26
27struct NS16550 {
28 /* this struct must be packed */
29 unsigned char rbr; /* 0 */
30 unsigned char ier; /* 1 */
31 unsigned char fcr; /* 2 */
32 unsigned char lcr; /* 3 */
33 unsigned char mcr; /* 4 */
34 unsigned char lsr; /* 5 */
35 unsigned char msr; /* 6 */
36 unsigned char scr; /* 7 */
37};
38
39#define thr rbr
40#define iir fcr
41#define dll rbr
42#define dlm ier
43#define dlab lcr
44
45#define LSR_DR 0x01 /* Data ready */
46#define LSR_OE 0x02 /* Overrun */
47#define LSR_PE 0x04 /* Parity error */
48#define LSR_FE 0x08 /* Framing error */
49#define LSR_BI 0x10 /* Break */
50#define LSR_THRE 0x20 /* Xmit holding register empty */
51#define LSR_TEMT 0x40 /* Xmitter empty */
52#define LSR_ERR 0x80 /* Error */
53
54static volatile struct NS16550 __iomem *udbg_comport;
55
56void udbg_init_uart(void __iomem *comport, unsigned int speed)
57{
58 u16 dll = speed ? (115200 / speed) : 12;
59
60 if (comport) {
61 udbg_comport = (struct NS16550 __iomem *)comport;
62 out_8(&udbg_comport->lcr, 0x00);
63 out_8(&udbg_comport->ier, 0xff);
64 out_8(&udbg_comport->ier, 0x00);
65 out_8(&udbg_comport->lcr, 0x80); /* Access baud rate */
66 out_8(&udbg_comport->dll, dll & 0xff); /* 1 = 115200, 2 = 57600,
67 3 = 38400, 12 = 9600 baud */
68 out_8(&udbg_comport->dlm, dll >> 8); /* dll >> 8 which should be zero
69 for fast rates; */
70 out_8(&udbg_comport->lcr, 0x03); /* 8 data, 1 stop, no parity */
71 out_8(&udbg_comport->mcr, 0x03); /* RTS/DTR */
72 out_8(&udbg_comport->fcr ,0x07); /* Clear & enable FIFOs */
73 }
74}
75
76#ifdef CONFIG_PPC_PMAC
77
78#define SCC_TXRDY 4
79#define SCC_RXRDY 1
80
81static volatile u8 __iomem *sccc;
82static volatile u8 __iomem *sccd;
83
84static unsigned char scc_inittab[] = {
85 13, 0, /* set baud rate divisor */
86 12, 0,
87 14, 1, /* baud rate gen enable, src=rtxc */
88 11, 0x50, /* clocks = br gen */
89 5, 0xea, /* tx 8 bits, assert DTR & RTS */
90 4, 0x46, /* x16 clock, 1 stop */
91 3, 0xc1, /* rx enable, 8 bits */
92};
93
94void udbg_init_scc(struct device_node *np)
95{
96 u32 *reg;
97 unsigned long addr;
98 int i, x;
99
100 if (np == NULL)
101 np = of_find_node_by_name(NULL, "escc");
102 if (np == NULL || np->parent == NULL)
103 return;
104
105 udbg_printf("found SCC...\n");
106 /* Get address within mac-io ASIC */
107 reg = (u32 *)get_property(np, "reg", NULL);
108 if (reg == NULL)
109 return;
110 addr = reg[0];
111 udbg_printf("local addr: %lx\n", addr);
112 /* Get address of mac-io PCI itself */
113 reg = (u32 *)get_property(np->parent, "assigned-addresses", NULL);
114 if (reg == NULL)
115 return;
116 addr += reg[2];
117 udbg_printf("final addr: %lx\n", addr);
118
119 /* Setup for 57600 8N1 */
120 addr += 0x20;
121 sccc = (volatile u8 * __iomem) ioremap(addr & PAGE_MASK, PAGE_SIZE) ;
122 sccc += addr & ~PAGE_MASK;
123 sccd = sccc + 0x10;
124
125 udbg_printf("ioremap result sccc: %p\n", sccc);
126 mb();
127
128 for (i = 20000; i != 0; --i)
129 x = in_8(sccc);
130 out_8(sccc, 0x09); /* reset A or B side */
131 out_8(sccc, 0xc0);
132 for (i = 0; i < sizeof(scc_inittab); ++i)
133 out_8(sccc, scc_inittab[i]);
134
135 ppc_md.udbg_putc = udbg_putc;
136 ppc_md.udbg_getc = udbg_getc;
137 ppc_md.udbg_getc_poll = udbg_getc_poll;
138
139 udbg_puts("Hello World !\n");
140}
141
142#endif /* CONFIG_PPC_PMAC */
143
144#if CONFIG_PPC_PMAC
145static void udbg_real_putc(unsigned char c)
146{
147 while ((real_readb(sccc) & SCC_TXRDY) == 0)
148 ;
149 real_writeb(c, sccd);
150 if (c == '\n')
151 udbg_real_putc('\r');
152}
153
154void udbg_init_pmac_realmode(void)
155{
156 sccc = (volatile u8 __iomem *)0x80013020ul;
157 sccd = (volatile u8 __iomem *)0x80013030ul;
158
159 ppc_md.udbg_putc = udbg_real_putc;
160 ppc_md.udbg_getc = NULL;
161 ppc_md.udbg_getc_poll = NULL;
162}
163#endif /* CONFIG_PPC_PMAC */
164
165#ifdef CONFIG_PPC_MAPLE
166void udbg_maple_real_putc(unsigned char c)
167{
168 if (udbg_comport) {
169 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
170 /* wait for idle */;
171 real_writeb(c, &udbg_comport->thr); eieio();
172 if (c == '\n') {
173 /* Also put a CR. This is for convenience. */
174 while ((real_readb(&udbg_comport->lsr) & LSR_THRE) == 0)
175 /* wait for idle */;
176 real_writeb('\r', &udbg_comport->thr); eieio();
177 }
178 }
179}
180
181void udbg_init_maple_realmode(void)
182{
183 udbg_comport = (volatile struct NS16550 __iomem *)0xf40003f8;
184
185 ppc_md.udbg_putc = udbg_maple_real_putc;
186 ppc_md.udbg_getc = NULL;
187 ppc_md.udbg_getc_poll = NULL;
188}
189#endif /* CONFIG_PPC_MAPLE */
190
191void udbg_putc(unsigned char c)
192{
193 if (udbg_comport) {
194 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
195 /* wait for idle */;
196 out_8(&udbg_comport->thr, c);
197 if (c == '\n') {
198 /* Also put a CR. This is for convenience. */
199 while ((in_8(&udbg_comport->lsr) & LSR_THRE) == 0)
200 /* wait for idle */;
201 out_8(&udbg_comport->thr, '\r');
202 }
203 }
204#ifdef CONFIG_PPC_PMAC
205 else if (sccc) {
206 while ((in_8(sccc) & SCC_TXRDY) == 0)
207 ;
208 out_8(sccd, c);
209 if (c == '\n')
210 udbg_putc('\r');
211 }
212#endif /* CONFIG_PPC_PMAC */
213}
214
215int udbg_getc_poll(void)
216{
217 if (udbg_comport) {
218 if ((in_8(&udbg_comport->lsr) & LSR_DR) != 0)
219 return in_8(&udbg_comport->rbr);
220 else
221 return -1;
222 }
223#ifdef CONFIG_PPC_PMAC
224 else if (sccc) {
225 if ((in_8(sccc) & SCC_RXRDY) != 0)
226 return in_8(sccd);
227 else
228 return -1;
229 }
230#endif /* CONFIG_PPC_PMAC */
231 return -1;
232}
233
234unsigned char udbg_getc(void)
235{
236 if (udbg_comport) {
237 while ((in_8(&udbg_comport->lsr) & LSR_DR) == 0)
238 /* wait for char */;
239 return in_8(&udbg_comport->rbr);
240 }
241#ifdef CONFIG_PPC_PMAC
242 else if (sccc) {
243 while ((in_8(sccc) & SCC_RXRDY) == 0)
244 ;
245 return in_8(sccd);
246 }
247#endif /* CONFIG_PPC_PMAC */
248 return 0;
249}
250
251void udbg_puts(const char *s)
252{
253 if (ppc_md.udbg_putc) {
254 char c;
255
256 if (s && *s != '\0') {
257 while ((c = *s++) != '\0')
258 ppc_md.udbg_putc(c);
259 }
260 }
261#if 0
262 else {
263 printk("%s", s);
264 }
265#endif
266}
267
268int udbg_write(const char *s, int n)
269{
270 int remain = n;
271 char c;
272
273 if (!ppc_md.udbg_putc)
274 return 0;
275
276 if (s && *s != '\0') {
277 while (((c = *s++) != '\0') && (remain-- > 0)) {
278 ppc_md.udbg_putc(c);
279 }
280 }
281
282 return n - remain;
283}
284
285int udbg_read(char *buf, int buflen)
286{
287 char c, *p = buf;
288 int i;
289
290 if (!ppc_md.udbg_getc)
291 return 0;
292
293 for (i = 0; i < buflen; ++i) {
294 do {
295 c = ppc_md.udbg_getc();
296 } while (c == 0x11 || c == 0x13);
297 if (c == 0)
298 break;
299 *p++ = c;
300 }
301
302 return i;
303}
304
305void udbg_console_write(struct console *con, const char *s, unsigned int n)
306{
307 udbg_write(s, n);
308}
309
310#define UDBG_BUFSIZE 256
311void udbg_printf(const char *fmt, ...)
312{
313 unsigned char buf[UDBG_BUFSIZE];
314 va_list args;
315
316 va_start(args, fmt);
317 vsnprintf(buf, UDBG_BUFSIZE, fmt, args);
318 udbg_puts(buf);
319 va_end(args);
320}
321
322/* Special print used by PPCDBG() macro */
323void udbg_ppcdbg(unsigned long debug_flags, const char *fmt, ...)
324{
325 unsigned long active_debugs = debug_flags & ppc64_debug_switch;
326
327 if (active_debugs) {
328 va_list ap;
329 unsigned char buf[UDBG_BUFSIZE];
330 unsigned long i, len = 0;
331
332 for (i=0; i < PPCDBG_NUM_FLAGS; i++) {
333 if (((1U << i) & active_debugs) &&
334 trace_names[i]) {
335 len += strlen(trace_names[i]);
336 udbg_puts(trace_names[i]);
337 break;
338 }
339 }
340
341 snprintf(buf, UDBG_BUFSIZE, " [%s]: ", current->comm);
342 len += strlen(buf);
343 udbg_puts(buf);
344
345 while (len < 18) {
346 udbg_puts(" ");
347 len++;
348 }
349
350 va_start(ap, fmt);
351 vsnprintf(buf, UDBG_BUFSIZE, fmt, ap);
352 udbg_puts(buf);
353 va_end(ap);
354 }
355}
356
357unsigned long udbg_ifdebug(unsigned long flags)
358{
359 return (flags & ppc64_debug_switch);
360}
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