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-rw-r--r--arch/ppc64/kernel/pmac_setup.c476
1 files changed, 0 insertions, 476 deletions
diff --git a/arch/ppc64/kernel/pmac_setup.c b/arch/ppc64/kernel/pmac_setup.c
deleted file mode 100644
index c3ea73df937d..000000000000
--- a/arch/ppc64/kernel/pmac_setup.c
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@@ -1,476 +0,0 @@
1/*
2 * arch/ppc/platforms/setup.c
3 *
4 * PowerPC version
5 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
6 *
7 * Adapted for Power Macintosh by Paul Mackerras
8 * Copyright (C) 1996 Paul Mackerras (paulus@cs.anu.edu.au)
9 *
10 * Derived from "arch/alpha/kernel/setup.c"
11 * Copyright (C) 1995 Linus Torvalds
12 *
13 * Maintained by Benjamin Herrenschmidt (benh@kernel.crashing.org)
14 *
15 * This program is free software; you can redistribute it and/or
16 * modify it under the terms of the GNU General Public License
17 * as published by the Free Software Foundation; either version
18 * 2 of the License, or (at your option) any later version.
19 *
20 */
21
22/*
23 * bootup setup stuff..
24 */
25
26#undef DEBUG
27
28#include <linux/config.h>
29#include <linux/init.h>
30#include <linux/errno.h>
31#include <linux/sched.h>
32#include <linux/kernel.h>
33#include <linux/mm.h>
34#include <linux/stddef.h>
35#include <linux/unistd.h>
36#include <linux/ptrace.h>
37#include <linux/slab.h>
38#include <linux/user.h>
39#include <linux/a.out.h>
40#include <linux/tty.h>
41#include <linux/string.h>
42#include <linux/delay.h>
43#include <linux/ioport.h>
44#include <linux/major.h>
45#include <linux/initrd.h>
46#include <linux/vt_kern.h>
47#include <linux/console.h>
48#include <linux/ide.h>
49#include <linux/pci.h>
50#include <linux/adb.h>
51#include <linux/cuda.h>
52#include <linux/pmu.h>
53#include <linux/irq.h>
54#include <linux/seq_file.h>
55#include <linux/root_dev.h>
56#include <linux/bitops.h>
57
58#include <asm/processor.h>
59#include <asm/sections.h>
60#include <asm/prom.h>
61#include <asm/system.h>
62#include <asm/io.h>
63#include <asm/pci-bridge.h>
64#include <asm/iommu.h>
65#include <asm/machdep.h>
66#include <asm/dma.h>
67#include <asm/btext.h>
68#include <asm/cputable.h>
69#include <asm/pmac_feature.h>
70#include <asm/time.h>
71#include <asm/of_device.h>
72#include <asm/lmb.h>
73#include <asm/smu.h>
74#include <asm/pmc.h>
75#include <asm/mpic.h>
76#include <asm/udbg.h>
77
78#include "pmac.h"
79
80#ifdef DEBUG
81#define DBG(fmt...) udbg_printf(fmt)
82#else
83#define DBG(fmt...)
84#endif
85
86static int current_root_goodness = -1;
87#define DEFAULT_ROOT_DEVICE Root_SDA1 /* sda1 - slightly silly choice */
88
89extern int powersave_nap;
90int sccdbg;
91
92sys_ctrler_t sys_ctrler;
93EXPORT_SYMBOL(sys_ctrler);
94
95#ifdef CONFIG_PMAC_SMU
96unsigned long smu_cmdbuf_abs;
97EXPORT_SYMBOL(smu_cmdbuf_abs);
98#endif
99
100extern void udbg_init_scc(struct device_node *np);
101
102static void pmac_show_cpuinfo(struct seq_file *m)
103{
104 struct device_node *np;
105 char *pp;
106 int plen;
107 char* mbname;
108 int mbmodel = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
109 PMAC_MB_INFO_MODEL, 0);
110 unsigned int mbflags = pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL,
111 PMAC_MB_INFO_FLAGS, 0);
112
113 if (pmac_call_feature(PMAC_FTR_GET_MB_INFO, NULL, PMAC_MB_INFO_NAME,
114 (long)&mbname) != 0)
115 mbname = "Unknown";
116
117 /* find motherboard type */
118 seq_printf(m, "machine\t\t: ");
119 np = find_devices("device-tree");
120 if (np != NULL) {
121 pp = (char *) get_property(np, "model", NULL);
122 if (pp != NULL)
123 seq_printf(m, "%s\n", pp);
124 else
125 seq_printf(m, "PowerMac\n");
126 pp = (char *) get_property(np, "compatible", &plen);
127 if (pp != NULL) {
128 seq_printf(m, "motherboard\t:");
129 while (plen > 0) {
130 int l = strlen(pp) + 1;
131 seq_printf(m, " %s", pp);
132 plen -= l;
133 pp += l;
134 }
135 seq_printf(m, "\n");
136 }
137 } else
138 seq_printf(m, "PowerMac\n");
139
140 /* print parsed model */
141 seq_printf(m, "detected as\t: %d (%s)\n", mbmodel, mbname);
142 seq_printf(m, "pmac flags\t: %08x\n", mbflags);
143
144 /* Indicate newworld */
145 seq_printf(m, "pmac-generation\t: NewWorld\n");
146}
147
148
149static void __init pmac_setup_arch(void)
150{
151 /* init to some ~sane value until calibrate_delay() runs */
152 loops_per_jiffy = 50000000;
153
154 /* Probe motherboard chipset */
155 pmac_feature_init();
156#if 0
157 /* Lock-enable the SCC channel used for debug */
158 if (sccdbg) {
159 np = of_find_node_by_name(NULL, "escc");
160 if (np)
161 pmac_call_feature(PMAC_FTR_SCC_ENABLE, np,
162 PMAC_SCC_ASYNC | PMAC_SCC_FLAG_XMON, 1);
163 }
164#endif
165 /* We can NAP */
166 powersave_nap = 1;
167
168#ifdef CONFIG_ADB_PMU
169 /* Initialize the PMU if any */
170 find_via_pmu();
171#endif
172#ifdef CONFIG_PMAC_SMU
173 /* Initialize the SMU if any */
174 smu_init();
175#endif
176
177 /* Init NVRAM access */
178 pmac_nvram_init();
179
180 /* Setup SMP callback */
181#ifdef CONFIG_SMP
182 pmac_setup_smp();
183#endif
184
185 /* Lookup PCI hosts */
186 pmac_pci_init();
187
188#ifdef CONFIG_DUMMY_CONSOLE
189 conswitchp = &dummy_con;
190#endif
191
192 printk(KERN_INFO "Using native/NAP idle loop\n");
193}
194
195#ifdef CONFIG_SCSI
196void note_scsi_host(struct device_node *node, void *host)
197{
198 /* Obsolete */
199}
200#endif
201
202
203static int initializing = 1;
204
205static int pmac_late_init(void)
206{
207 initializing = 0;
208 return 0;
209}
210
211late_initcall(pmac_late_init);
212
213/* can't be __init - can be called whenever a disk is first accessed */
214void note_bootable_part(dev_t dev, int part, int goodness)
215{
216 extern dev_t boot_dev;
217 char *p;
218
219 if (!initializing)
220 return;
221 if ((goodness <= current_root_goodness) &&
222 ROOT_DEV != DEFAULT_ROOT_DEVICE)
223 return;
224 p = strstr(saved_command_line, "root=");
225 if (p != NULL && (p == saved_command_line || p[-1] == ' '))
226 return;
227
228 if (!boot_dev || dev == boot_dev) {
229 ROOT_DEV = dev + part;
230 boot_dev = 0;
231 current_root_goodness = goodness;
232 }
233}
234
235static void pmac_restart(char *cmd)
236{
237 switch(sys_ctrler) {
238#ifdef CONFIG_ADB_PMU
239 case SYS_CTRLER_PMU:
240 pmu_restart();
241 break;
242#endif
243
244#ifdef CONFIG_PMAC_SMU
245 case SYS_CTRLER_SMU:
246 smu_restart();
247 break;
248#endif
249 default:
250 ;
251 }
252}
253
254static void pmac_power_off(void)
255{
256 switch(sys_ctrler) {
257#ifdef CONFIG_ADB_PMU
258 case SYS_CTRLER_PMU:
259 pmu_shutdown();
260 break;
261#endif
262#ifdef CONFIG_PMAC_SMU
263 case SYS_CTRLER_SMU:
264 smu_shutdown();
265 break;
266#endif
267 default:
268 ;
269 }
270}
271
272static void pmac_halt(void)
273{
274 pmac_power_off();
275}
276
277/*
278 * Early initialization.
279 */
280static void __init pmac_init_early(void)
281{
282 DBG(" -> pmac_init_early\n");
283
284 /* Initialize hash table, from now on, we can take hash faults
285 * and call ioremap
286 */
287 hpte_init_native();
288
289 /* Init SCC */
290 if (strstr(cmd_line, "sccdbg")) {
291 sccdbg = 1;
292 udbg_init_scc(NULL);
293 }
294
295 /* Setup interrupt mapping options */
296 ppc64_interrupt_controller = IC_OPEN_PIC;
297
298 iommu_init_early_u3();
299
300 DBG(" <- pmac_init_early\n");
301}
302
303static int pmac_u3_cascade(struct pt_regs *regs, void *data)
304{
305 return mpic_get_one_irq((struct mpic *)data, regs);
306}
307
308static __init void pmac_init_IRQ(void)
309{
310 struct device_node *irqctrler = NULL;
311 struct device_node *irqctrler2 = NULL;
312 struct device_node *np = NULL;
313 struct mpic *mpic1, *mpic2;
314
315 /* We first try to detect Apple's new Core99 chipset, since mac-io
316 * is quite different on those machines and contains an IBM MPIC2.
317 */
318 while ((np = of_find_node_by_type(np, "open-pic")) != NULL) {
319 struct device_node *parent = of_get_parent(np);
320 if (parent && !strcmp(parent->name, "u3"))
321 irqctrler2 = of_node_get(np);
322 else
323 irqctrler = of_node_get(np);
324 of_node_put(parent);
325 }
326 if (irqctrler != NULL && irqctrler->n_addrs > 0) {
327 unsigned char senses[128];
328
329 printk(KERN_INFO "PowerMac using OpenPIC irq controller at 0x%08x\n",
330 (unsigned int)irqctrler->addrs[0].address);
331
332 prom_get_irq_senses(senses, 0, 128);
333 mpic1 = mpic_alloc(irqctrler->addrs[0].address,
334 MPIC_PRIMARY | MPIC_WANTS_RESET,
335 0, 0, 128, 256, senses, 128, " K2-MPIC ");
336 BUG_ON(mpic1 == NULL);
337 mpic_init(mpic1);
338
339 if (irqctrler2 != NULL && irqctrler2->n_intrs > 0 &&
340 irqctrler2->n_addrs > 0) {
341 printk(KERN_INFO "Slave OpenPIC at 0x%08x hooked on IRQ %d\n",
342 (u32)irqctrler2->addrs[0].address,
343 irqctrler2->intrs[0].line);
344
345 pmac_call_feature(PMAC_FTR_ENABLE_MPIC, irqctrler2, 0, 0);
346 prom_get_irq_senses(senses, 128, 128 + 128);
347
348 /* We don't need to set MPIC_BROKEN_U3 here since we don't have
349 * hypertransport interrupts routed to it
350 */
351 mpic2 = mpic_alloc(irqctrler2->addrs[0].address,
352 MPIC_BIG_ENDIAN | MPIC_WANTS_RESET,
353 0, 128, 128, 0, senses, 128, " U3-MPIC ");
354 BUG_ON(mpic2 == NULL);
355 mpic_init(mpic2);
356 mpic_setup_cascade(irqctrler2->intrs[0].line,
357 pmac_u3_cascade, mpic2);
358 }
359 }
360 of_node_put(irqctrler);
361 of_node_put(irqctrler2);
362}
363
364static void __init pmac_progress(char *s, unsigned short hex)
365{
366 if (sccdbg) {
367 udbg_puts(s);
368 udbg_puts("\n");
369 }
370#ifdef CONFIG_BOOTX_TEXT
371 else if (boot_text_mapped) {
372 btext_drawstring(s);
373 btext_drawstring("\n");
374 }
375#endif /* CONFIG_BOOTX_TEXT */
376}
377
378/*
379 * pmac has no legacy IO, anything calling this function has to
380 * fail or bad things will happen
381 */
382static int pmac_check_legacy_ioport(unsigned int baseport)
383{
384 return -ENODEV;
385}
386
387static int __init pmac_declare_of_platform_devices(void)
388{
389 struct device_node *np, *npp;
390
391 npp = of_find_node_by_name(NULL, "u3");
392 if (npp) {
393 for (np = NULL; (np = of_get_next_child(npp, np)) != NULL;) {
394 if (strncmp(np->name, "i2c", 3) == 0) {
395 of_platform_device_create(np, "u3-i2c", NULL);
396 of_node_put(np);
397 break;
398 }
399 }
400 of_node_put(npp);
401 }
402 npp = of_find_node_by_type(NULL, "smu");
403 if (npp) {
404 of_platform_device_create(npp, "smu", NULL);
405 of_node_put(npp);
406 }
407
408 return 0;
409}
410
411device_initcall(pmac_declare_of_platform_devices);
412
413/*
414 * Called very early, MMU is off, device-tree isn't unflattened
415 */
416static int __init pmac_probe(int platform)
417{
418 if (platform != PLATFORM_POWERMAC)
419 return 0;
420 /*
421 * On U3, the DART (iommu) must be allocated now since it
422 * has an impact on htab_initialize (due to the large page it
423 * occupies having to be broken up so the DART itself is not
424 * part of the cacheable linar mapping
425 */
426 alloc_u3_dart_table();
427
428#ifdef CONFIG_PMAC_SMU
429 /*
430 * SMU based G5s need some memory below 2Gb, at least the current
431 * driver needs that. We have to allocate it now. We allocate 4k
432 * (1 small page) for now.
433 */
434 smu_cmdbuf_abs = lmb_alloc_base(4096, 4096, 0x80000000UL);
435#endif /* CONFIG_PMAC_SMU */
436
437 return 1;
438}
439
440static int pmac_probe_mode(struct pci_bus *bus)
441{
442 struct device_node *node = bus->sysdata;
443
444 /* We need to use normal PCI probing for the AGP bus,
445 since the device for the AGP bridge isn't in the tree. */
446 if (bus->self == NULL && device_is_compatible(node, "u3-agp"))
447 return PCI_PROBE_NORMAL;
448
449 return PCI_PROBE_DEVTREE;
450}
451
452struct machdep_calls __initdata pmac_md = {
453#ifdef CONFIG_HOTPLUG_CPU
454 .cpu_die = generic_mach_cpu_die,
455#endif
456 .probe = pmac_probe,
457 .setup_arch = pmac_setup_arch,
458 .init_early = pmac_init_early,
459 .show_cpuinfo = pmac_show_cpuinfo,
460 .init_IRQ = pmac_init_IRQ,
461 .get_irq = mpic_get_irq,
462 .pcibios_fixup = pmac_pcibios_fixup,
463 .pci_probe_mode = pmac_probe_mode,
464 .restart = pmac_restart,
465 .power_off = pmac_power_off,
466 .halt = pmac_halt,
467 .get_boot_time = pmac_get_boot_time,
468 .set_rtc_time = pmac_set_rtc_time,
469 .get_rtc_time = pmac_get_rtc_time,
470 .calibrate_decr = pmac_calibrate_decr,
471 .feature_call = pmac_do_feature_call,
472 .progress = pmac_progress,
473 .check_legacy_ioport = pmac_check_legacy_ioport,
474 .idle_loop = native_idle,
475 .enable_pmcs = power4_enable_pmcs,
476};
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