diff options
Diffstat (limited to 'arch/ppc64/kernel/pSeries_setup.c')
-rw-r--r-- | arch/ppc64/kernel/pSeries_setup.c | 612 |
1 files changed, 612 insertions, 0 deletions
diff --git a/arch/ppc64/kernel/pSeries_setup.c b/arch/ppc64/kernel/pSeries_setup.c new file mode 100644 index 000000000000..06536de51257 --- /dev/null +++ b/arch/ppc64/kernel/pSeries_setup.c | |||
@@ -0,0 +1,612 @@ | |||
1 | /* | ||
2 | * linux/arch/ppc/kernel/setup.c | ||
3 | * | ||
4 | * Copyright (C) 1995 Linus Torvalds | ||
5 | * Adapted from 'alpha' version by Gary Thomas | ||
6 | * Modified by Cort Dougan (cort@cs.nmt.edu) | ||
7 | * Modified by PPC64 Team, IBM Corp | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; either version | ||
12 | * 2 of the License, or (at your option) any later version. | ||
13 | */ | ||
14 | |||
15 | /* | ||
16 | * bootup setup stuff.. | ||
17 | */ | ||
18 | |||
19 | #undef DEBUG | ||
20 | |||
21 | #include <linux/config.h> | ||
22 | #include <linux/errno.h> | ||
23 | #include <linux/sched.h> | ||
24 | #include <linux/kernel.h> | ||
25 | #include <linux/mm.h> | ||
26 | #include <linux/stddef.h> | ||
27 | #include <linux/unistd.h> | ||
28 | #include <linux/slab.h> | ||
29 | #include <linux/user.h> | ||
30 | #include <linux/a.out.h> | ||
31 | #include <linux/tty.h> | ||
32 | #include <linux/major.h> | ||
33 | #include <linux/interrupt.h> | ||
34 | #include <linux/reboot.h> | ||
35 | #include <linux/init.h> | ||
36 | #include <linux/ioport.h> | ||
37 | #include <linux/console.h> | ||
38 | #include <linux/pci.h> | ||
39 | #include <linux/version.h> | ||
40 | #include <linux/adb.h> | ||
41 | #include <linux/module.h> | ||
42 | #include <linux/delay.h> | ||
43 | #include <linux/irq.h> | ||
44 | #include <linux/seq_file.h> | ||
45 | #include <linux/root_dev.h> | ||
46 | |||
47 | #include <asm/mmu.h> | ||
48 | #include <asm/processor.h> | ||
49 | #include <asm/io.h> | ||
50 | #include <asm/pgtable.h> | ||
51 | #include <asm/prom.h> | ||
52 | #include <asm/rtas.h> | ||
53 | #include <asm/pci-bridge.h> | ||
54 | #include <asm/iommu.h> | ||
55 | #include <asm/dma.h> | ||
56 | #include <asm/machdep.h> | ||
57 | #include <asm/irq.h> | ||
58 | #include <asm/time.h> | ||
59 | #include <asm/nvram.h> | ||
60 | #include <asm/plpar_wrappers.h> | ||
61 | #include <asm/xics.h> | ||
62 | #include <asm/cputable.h> | ||
63 | |||
64 | #include "i8259.h" | ||
65 | #include "mpic.h" | ||
66 | #include "pci.h" | ||
67 | |||
68 | #ifdef DEBUG | ||
69 | #define DBG(fmt...) udbg_printf(fmt) | ||
70 | #else | ||
71 | #define DBG(fmt...) | ||
72 | #endif | ||
73 | |||
74 | extern void pSeries_final_fixup(void); | ||
75 | |||
76 | extern void pSeries_get_boot_time(struct rtc_time *rtc_time); | ||
77 | extern void pSeries_get_rtc_time(struct rtc_time *rtc_time); | ||
78 | extern int pSeries_set_rtc_time(struct rtc_time *rtc_time); | ||
79 | extern void find_udbg_vterm(void); | ||
80 | extern void system_reset_fwnmi(void); /* from head.S */ | ||
81 | extern void machine_check_fwnmi(void); /* from head.S */ | ||
82 | extern void generic_find_legacy_serial_ports(u64 *physport, | ||
83 | unsigned int *default_speed); | ||
84 | |||
85 | int fwnmi_active; /* TRUE if an FWNMI handler is present */ | ||
86 | |||
87 | extern unsigned long ppc_proc_freq; | ||
88 | extern unsigned long ppc_tb_freq; | ||
89 | |||
90 | extern void pSeries_system_reset_exception(struct pt_regs *regs); | ||
91 | extern int pSeries_machine_check_exception(struct pt_regs *regs); | ||
92 | |||
93 | static volatile void __iomem * chrp_int_ack_special; | ||
94 | struct mpic *pSeries_mpic; | ||
95 | |||
96 | void pSeries_get_cpuinfo(struct seq_file *m) | ||
97 | { | ||
98 | struct device_node *root; | ||
99 | const char *model = ""; | ||
100 | |||
101 | root = of_find_node_by_path("/"); | ||
102 | if (root) | ||
103 | model = get_property(root, "model", NULL); | ||
104 | seq_printf(m, "machine\t\t: CHRP %s\n", model); | ||
105 | of_node_put(root); | ||
106 | } | ||
107 | |||
108 | /* Initialize firmware assisted non-maskable interrupts if | ||
109 | * the firmware supports this feature. | ||
110 | * | ||
111 | */ | ||
112 | static void __init fwnmi_init(void) | ||
113 | { | ||
114 | int ret; | ||
115 | int ibm_nmi_register = rtas_token("ibm,nmi-register"); | ||
116 | if (ibm_nmi_register == RTAS_UNKNOWN_SERVICE) | ||
117 | return; | ||
118 | ret = rtas_call(ibm_nmi_register, 2, 1, NULL, | ||
119 | __pa((unsigned long)system_reset_fwnmi), | ||
120 | __pa((unsigned long)machine_check_fwnmi)); | ||
121 | if (ret == 0) | ||
122 | fwnmi_active = 1; | ||
123 | } | ||
124 | |||
125 | static int pSeries_irq_cascade(struct pt_regs *regs, void *data) | ||
126 | { | ||
127 | if (chrp_int_ack_special) | ||
128 | return readb(chrp_int_ack_special); | ||
129 | else | ||
130 | return i8259_irq(smp_processor_id()); | ||
131 | } | ||
132 | |||
133 | static void __init pSeries_init_mpic(void) | ||
134 | { | ||
135 | unsigned int *addrp; | ||
136 | struct device_node *np; | ||
137 | int i; | ||
138 | |||
139 | /* All ISUs are setup, complete initialization */ | ||
140 | mpic_init(pSeries_mpic); | ||
141 | |||
142 | /* Check what kind of cascade ACK we have */ | ||
143 | if (!(np = of_find_node_by_name(NULL, "pci")) | ||
144 | || !(addrp = (unsigned int *) | ||
145 | get_property(np, "8259-interrupt-acknowledge", NULL))) | ||
146 | printk(KERN_ERR "Cannot find pci to get ack address\n"); | ||
147 | else | ||
148 | chrp_int_ack_special = ioremap(addrp[prom_n_addr_cells(np)-1], 1); | ||
149 | of_node_put(np); | ||
150 | |||
151 | /* Setup the legacy interrupts & controller */ | ||
152 | for (i = 0; i < NUM_ISA_INTERRUPTS; i++) | ||
153 | irq_desc[i].handler = &i8259_pic; | ||
154 | i8259_init(0); | ||
155 | |||
156 | /* Hook cascade to mpic */ | ||
157 | mpic_setup_cascade(NUM_ISA_INTERRUPTS, pSeries_irq_cascade, NULL); | ||
158 | } | ||
159 | |||
160 | static void __init pSeries_setup_mpic(void) | ||
161 | { | ||
162 | unsigned int *opprop; | ||
163 | unsigned long openpic_addr = 0; | ||
164 | unsigned char senses[NR_IRQS - NUM_ISA_INTERRUPTS]; | ||
165 | struct device_node *root; | ||
166 | int irq_count; | ||
167 | |||
168 | /* Find the Open PIC if present */ | ||
169 | root = of_find_node_by_path("/"); | ||
170 | opprop = (unsigned int *) get_property(root, "platform-open-pic", NULL); | ||
171 | if (opprop != 0) { | ||
172 | int n = prom_n_addr_cells(root); | ||
173 | |||
174 | for (openpic_addr = 0; n > 0; --n) | ||
175 | openpic_addr = (openpic_addr << 32) + *opprop++; | ||
176 | printk(KERN_DEBUG "OpenPIC addr: %lx\n", openpic_addr); | ||
177 | } | ||
178 | of_node_put(root); | ||
179 | |||
180 | BUG_ON(openpic_addr == 0); | ||
181 | |||
182 | /* Get the sense values from OF */ | ||
183 | prom_get_irq_senses(senses, NUM_ISA_INTERRUPTS, NR_IRQS); | ||
184 | |||
185 | /* Setup the openpic driver */ | ||
186 | irq_count = NR_IRQS - NUM_ISA_INTERRUPTS - 4; /* leave room for IPIs */ | ||
187 | pSeries_mpic = mpic_alloc(openpic_addr, MPIC_PRIMARY, | ||
188 | 16, 16, irq_count, /* isu size, irq offset, irq count */ | ||
189 | NR_IRQS - 4, /* ipi offset */ | ||
190 | senses, irq_count, /* sense & sense size */ | ||
191 | " MPIC "); | ||
192 | } | ||
193 | |||
194 | static void __init pSeries_setup_arch(void) | ||
195 | { | ||
196 | /* Fixup ppc_md depending on the type of interrupt controller */ | ||
197 | if (ppc64_interrupt_controller == IC_OPEN_PIC) { | ||
198 | ppc_md.init_IRQ = pSeries_init_mpic; | ||
199 | ppc_md.get_irq = mpic_get_irq; | ||
200 | /* Allocate the mpic now, so that find_and_init_phbs() can | ||
201 | * fill the ISUs */ | ||
202 | pSeries_setup_mpic(); | ||
203 | } else { | ||
204 | ppc_md.init_IRQ = xics_init_IRQ; | ||
205 | ppc_md.get_irq = xics_get_irq; | ||
206 | } | ||
207 | |||
208 | #ifdef CONFIG_SMP | ||
209 | smp_init_pSeries(); | ||
210 | #endif | ||
211 | /* openpic global configuration register (64-bit format). */ | ||
212 | /* openpic Interrupt Source Unit pointer (64-bit format). */ | ||
213 | /* python0 facility area (mmio) (64-bit format) REAL address. */ | ||
214 | |||
215 | /* init to some ~sane value until calibrate_delay() runs */ | ||
216 | loops_per_jiffy = 50000000; | ||
217 | |||
218 | if (ROOT_DEV == 0) { | ||
219 | printk("No ramdisk, default root is /dev/sda2\n"); | ||
220 | ROOT_DEV = Root_SDA2; | ||
221 | } | ||
222 | |||
223 | fwnmi_init(); | ||
224 | |||
225 | /* Find and initialize PCI host bridges */ | ||
226 | init_pci_config_tokens(); | ||
227 | eeh_init(); | ||
228 | find_and_init_phbs(); | ||
229 | |||
230 | #ifdef CONFIG_DUMMY_CONSOLE | ||
231 | conswitchp = &dummy_con; | ||
232 | #endif | ||
233 | |||
234 | pSeries_nvram_init(); | ||
235 | |||
236 | if (cur_cpu_spec->firmware_features & FW_FEATURE_SPLPAR) | ||
237 | vpa_init(boot_cpuid); | ||
238 | } | ||
239 | |||
240 | static int __init pSeries_init_panel(void) | ||
241 | { | ||
242 | /* Manually leave the kernel version on the panel. */ | ||
243 | ppc_md.progress("Linux ppc64\n", 0); | ||
244 | ppc_md.progress(UTS_RELEASE, 0); | ||
245 | |||
246 | return 0; | ||
247 | } | ||
248 | arch_initcall(pSeries_init_panel); | ||
249 | |||
250 | |||
251 | /* Build up the firmware_features bitmask field | ||
252 | * using contents of device-tree/ibm,hypertas-functions. | ||
253 | * Ultimately this functionality may be moved into prom.c prom_init(). | ||
254 | */ | ||
255 | void __init fw_feature_init(void) | ||
256 | { | ||
257 | struct device_node * dn; | ||
258 | char * hypertas; | ||
259 | unsigned int len; | ||
260 | |||
261 | DBG(" -> fw_feature_init()\n"); | ||
262 | |||
263 | cur_cpu_spec->firmware_features = 0; | ||
264 | dn = of_find_node_by_path("/rtas"); | ||
265 | if (dn == NULL) { | ||
266 | printk(KERN_ERR "WARNING ! Cannot find RTAS in device-tree !\n"); | ||
267 | goto no_rtas; | ||
268 | } | ||
269 | |||
270 | hypertas = get_property(dn, "ibm,hypertas-functions", &len); | ||
271 | if (hypertas) { | ||
272 | while (len > 0){ | ||
273 | int i, hypertas_len; | ||
274 | /* check value against table of strings */ | ||
275 | for(i=0; i < FIRMWARE_MAX_FEATURES ;i++) { | ||
276 | if ((firmware_features_table[i].name) && | ||
277 | (strcmp(firmware_features_table[i].name,hypertas))==0) { | ||
278 | /* we have a match */ | ||
279 | cur_cpu_spec->firmware_features |= | ||
280 | (firmware_features_table[i].val); | ||
281 | break; | ||
282 | } | ||
283 | } | ||
284 | hypertas_len = strlen(hypertas); | ||
285 | len -= hypertas_len +1; | ||
286 | hypertas+= hypertas_len +1; | ||
287 | } | ||
288 | } | ||
289 | |||
290 | of_node_put(dn); | ||
291 | no_rtas: | ||
292 | printk(KERN_INFO "firmware_features = 0x%lx\n", | ||
293 | cur_cpu_spec->firmware_features); | ||
294 | |||
295 | DBG(" <- fw_feature_init()\n"); | ||
296 | } | ||
297 | |||
298 | |||
299 | static void __init pSeries_discover_pic(void) | ||
300 | { | ||
301 | struct device_node *np; | ||
302 | char *typep; | ||
303 | |||
304 | /* | ||
305 | * Setup interrupt mapping options that are needed for finish_device_tree | ||
306 | * to properly parse the OF interrupt tree & do the virtual irq mapping | ||
307 | */ | ||
308 | __irq_offset_value = NUM_ISA_INTERRUPTS; | ||
309 | ppc64_interrupt_controller = IC_INVALID; | ||
310 | for (np = NULL; (np = of_find_node_by_name(np, "interrupt-controller"));) { | ||
311 | typep = (char *)get_property(np, "compatible", NULL); | ||
312 | if (strstr(typep, "open-pic")) | ||
313 | ppc64_interrupt_controller = IC_OPEN_PIC; | ||
314 | else if (strstr(typep, "ppc-xicp")) | ||
315 | ppc64_interrupt_controller = IC_PPC_XIC; | ||
316 | else | ||
317 | printk("pSeries_discover_pic: failed to recognize" | ||
318 | " interrupt-controller\n"); | ||
319 | break; | ||
320 | } | ||
321 | } | ||
322 | |||
323 | static void pSeries_mach_cpu_die(void) | ||
324 | { | ||
325 | local_irq_disable(); | ||
326 | idle_task_exit(); | ||
327 | /* Some hardware requires clearing the CPPR, while other hardware does not | ||
328 | * it is safe either way | ||
329 | */ | ||
330 | pSeriesLP_cppr_info(0, 0); | ||
331 | rtas_stop_self(); | ||
332 | /* Should never get here... */ | ||
333 | BUG(); | ||
334 | for(;;); | ||
335 | } | ||
336 | |||
337 | |||
338 | /* | ||
339 | * Early initialization. Relocation is on but do not reference unbolted pages | ||
340 | */ | ||
341 | static void __init pSeries_init_early(void) | ||
342 | { | ||
343 | void *comport; | ||
344 | int iommu_off = 0; | ||
345 | unsigned int default_speed; | ||
346 | u64 physport; | ||
347 | |||
348 | DBG(" -> pSeries_init_early()\n"); | ||
349 | |||
350 | fw_feature_init(); | ||
351 | |||
352 | if (systemcfg->platform & PLATFORM_LPAR) | ||
353 | hpte_init_lpar(); | ||
354 | else { | ||
355 | hpte_init_native(); | ||
356 | iommu_off = (of_chosen && | ||
357 | get_property(of_chosen, "linux,iommu-off", NULL)); | ||
358 | } | ||
359 | |||
360 | generic_find_legacy_serial_ports(&physport, &default_speed); | ||
361 | |||
362 | if (systemcfg->platform & PLATFORM_LPAR) | ||
363 | find_udbg_vterm(); | ||
364 | else if (physport) { | ||
365 | /* Map the uart for udbg. */ | ||
366 | comport = (void *)__ioremap(physport, 16, _PAGE_NO_CACHE); | ||
367 | udbg_init_uart(comport, default_speed); | ||
368 | |||
369 | ppc_md.udbg_putc = udbg_putc; | ||
370 | ppc_md.udbg_getc = udbg_getc; | ||
371 | ppc_md.udbg_getc_poll = udbg_getc_poll; | ||
372 | DBG("Hello World !\n"); | ||
373 | } | ||
374 | |||
375 | |||
376 | iommu_init_early_pSeries(); | ||
377 | |||
378 | pSeries_discover_pic(); | ||
379 | |||
380 | DBG(" <- pSeries_init_early()\n"); | ||
381 | } | ||
382 | |||
383 | |||
384 | static void pSeries_progress(char *s, unsigned short hex) | ||
385 | { | ||
386 | struct device_node *root; | ||
387 | int width, *p; | ||
388 | char *os; | ||
389 | static int display_character, set_indicator; | ||
390 | static int max_width; | ||
391 | static DEFINE_SPINLOCK(progress_lock); | ||
392 | static int pending_newline = 0; /* did last write end with unprinted newline? */ | ||
393 | |||
394 | if (!rtas.base) | ||
395 | return; | ||
396 | |||
397 | if (max_width == 0) { | ||
398 | if ((root = find_path_device("/rtas")) && | ||
399 | (p = (unsigned int *)get_property(root, | ||
400 | "ibm,display-line-length", | ||
401 | NULL))) | ||
402 | max_width = *p; | ||
403 | else | ||
404 | max_width = 0x10; | ||
405 | display_character = rtas_token("display-character"); | ||
406 | set_indicator = rtas_token("set-indicator"); | ||
407 | } | ||
408 | |||
409 | if (display_character == RTAS_UNKNOWN_SERVICE) { | ||
410 | /* use hex display if available */ | ||
411 | if (set_indicator != RTAS_UNKNOWN_SERVICE) | ||
412 | rtas_call(set_indicator, 3, 1, NULL, 6, 0, hex); | ||
413 | return; | ||
414 | } | ||
415 | |||
416 | spin_lock(&progress_lock); | ||
417 | |||
418 | /* | ||
419 | * Last write ended with newline, but we didn't print it since | ||
420 | * it would just clear the bottom line of output. Print it now | ||
421 | * instead. | ||
422 | * | ||
423 | * If no newline is pending, print a CR to start output at the | ||
424 | * beginning of the line. | ||
425 | */ | ||
426 | if (pending_newline) { | ||
427 | rtas_call(display_character, 1, 1, NULL, '\r'); | ||
428 | rtas_call(display_character, 1, 1, NULL, '\n'); | ||
429 | pending_newline = 0; | ||
430 | } else { | ||
431 | rtas_call(display_character, 1, 1, NULL, '\r'); | ||
432 | } | ||
433 | |||
434 | width = max_width; | ||
435 | os = s; | ||
436 | while (*os) { | ||
437 | if (*os == '\n' || *os == '\r') { | ||
438 | /* Blank to end of line. */ | ||
439 | while (width-- > 0) | ||
440 | rtas_call(display_character, 1, 1, NULL, ' '); | ||
441 | |||
442 | /* If newline is the last character, save it | ||
443 | * until next call to avoid bumping up the | ||
444 | * display output. | ||
445 | */ | ||
446 | if (*os == '\n' && !os[1]) { | ||
447 | pending_newline = 1; | ||
448 | spin_unlock(&progress_lock); | ||
449 | return; | ||
450 | } | ||
451 | |||
452 | /* RTAS wants CR-LF, not just LF */ | ||
453 | |||
454 | if (*os == '\n') { | ||
455 | rtas_call(display_character, 1, 1, NULL, '\r'); | ||
456 | rtas_call(display_character, 1, 1, NULL, '\n'); | ||
457 | } else { | ||
458 | /* CR might be used to re-draw a line, so we'll | ||
459 | * leave it alone and not add LF. | ||
460 | */ | ||
461 | rtas_call(display_character, 1, 1, NULL, *os); | ||
462 | } | ||
463 | |||
464 | width = max_width; | ||
465 | } else { | ||
466 | width--; | ||
467 | rtas_call(display_character, 1, 1, NULL, *os); | ||
468 | } | ||
469 | |||
470 | os++; | ||
471 | |||
472 | /* if we overwrite the screen length */ | ||
473 | if (width <= 0) | ||
474 | while ((*os != 0) && (*os != '\n') && (*os != '\r')) | ||
475 | os++; | ||
476 | } | ||
477 | |||
478 | /* Blank to end of line. */ | ||
479 | while (width-- > 0) | ||
480 | rtas_call(display_character, 1, 1, NULL, ' '); | ||
481 | |||
482 | spin_unlock(&progress_lock); | ||
483 | } | ||
484 | |||
485 | extern void setup_default_decr(void); | ||
486 | |||
487 | /* Some sane defaults: 125 MHz timebase, 1GHz processor */ | ||
488 | #define DEFAULT_TB_FREQ 125000000UL | ||
489 | #define DEFAULT_PROC_FREQ (DEFAULT_TB_FREQ * 8) | ||
490 | |||
491 | static void __init pSeries_calibrate_decr(void) | ||
492 | { | ||
493 | struct device_node *cpu; | ||
494 | struct div_result divres; | ||
495 | unsigned int *fp; | ||
496 | int node_found; | ||
497 | |||
498 | /* | ||
499 | * The cpu node should have a timebase-frequency property | ||
500 | * to tell us the rate at which the decrementer counts. | ||
501 | */ | ||
502 | cpu = of_find_node_by_type(NULL, "cpu"); | ||
503 | |||
504 | ppc_tb_freq = DEFAULT_TB_FREQ; /* hardcoded default */ | ||
505 | node_found = 0; | ||
506 | if (cpu != 0) { | ||
507 | fp = (unsigned int *)get_property(cpu, "timebase-frequency", | ||
508 | NULL); | ||
509 | if (fp != 0) { | ||
510 | node_found = 1; | ||
511 | ppc_tb_freq = *fp; | ||
512 | } | ||
513 | } | ||
514 | if (!node_found) | ||
515 | printk(KERN_ERR "WARNING: Estimating decrementer frequency " | ||
516 | "(not found)\n"); | ||
517 | |||
518 | ppc_proc_freq = DEFAULT_PROC_FREQ; | ||
519 | node_found = 0; | ||
520 | if (cpu != 0) { | ||
521 | fp = (unsigned int *)get_property(cpu, "clock-frequency", | ||
522 | NULL); | ||
523 | if (fp != 0) { | ||
524 | node_found = 1; | ||
525 | ppc_proc_freq = *fp; | ||
526 | } | ||
527 | } | ||
528 | if (!node_found) | ||
529 | printk(KERN_ERR "WARNING: Estimating processor frequency " | ||
530 | "(not found)\n"); | ||
531 | |||
532 | of_node_put(cpu); | ||
533 | |||
534 | printk(KERN_INFO "time_init: decrementer frequency = %lu.%.6lu MHz\n", | ||
535 | ppc_tb_freq/1000000, ppc_tb_freq%1000000); | ||
536 | printk(KERN_INFO "time_init: processor frequency = %lu.%.6lu MHz\n", | ||
537 | ppc_proc_freq/1000000, ppc_proc_freq%1000000); | ||
538 | |||
539 | tb_ticks_per_jiffy = ppc_tb_freq / HZ; | ||
540 | tb_ticks_per_sec = tb_ticks_per_jiffy * HZ; | ||
541 | tb_ticks_per_usec = ppc_tb_freq / 1000000; | ||
542 | tb_to_us = mulhwu_scale_factor(ppc_tb_freq, 1000000); | ||
543 | div128_by_32(1024*1024, 0, tb_ticks_per_sec, &divres); | ||
544 | tb_to_xs = divres.result_low; | ||
545 | |||
546 | setup_default_decr(); | ||
547 | } | ||
548 | |||
549 | static int pSeries_check_legacy_ioport(unsigned int baseport) | ||
550 | { | ||
551 | struct device_node *np; | ||
552 | |||
553 | #define I8042_DATA_REG 0x60 | ||
554 | #define FDC_BASE 0x3f0 | ||
555 | |||
556 | |||
557 | switch(baseport) { | ||
558 | case I8042_DATA_REG: | ||
559 | np = of_find_node_by_type(NULL, "8042"); | ||
560 | if (np == NULL) | ||
561 | return -ENODEV; | ||
562 | of_node_put(np); | ||
563 | break; | ||
564 | case FDC_BASE: | ||
565 | np = of_find_node_by_type(NULL, "fdc"); | ||
566 | if (np == NULL) | ||
567 | return -ENODEV; | ||
568 | of_node_put(np); | ||
569 | break; | ||
570 | } | ||
571 | return 0; | ||
572 | } | ||
573 | |||
574 | /* | ||
575 | * Called very early, MMU is off, device-tree isn't unflattened | ||
576 | */ | ||
577 | extern struct machdep_calls pSeries_md; | ||
578 | |||
579 | static int __init pSeries_probe(int platform) | ||
580 | { | ||
581 | if (platform != PLATFORM_PSERIES && | ||
582 | platform != PLATFORM_PSERIES_LPAR) | ||
583 | return 0; | ||
584 | |||
585 | /* if we have some ppc_md fixups for LPAR to do, do | ||
586 | * it here ... | ||
587 | */ | ||
588 | |||
589 | return 1; | ||
590 | } | ||
591 | |||
592 | struct machdep_calls __initdata pSeries_md = { | ||
593 | .probe = pSeries_probe, | ||
594 | .setup_arch = pSeries_setup_arch, | ||
595 | .init_early = pSeries_init_early, | ||
596 | .get_cpuinfo = pSeries_get_cpuinfo, | ||
597 | .log_error = pSeries_log_error, | ||
598 | .pcibios_fixup = pSeries_final_fixup, | ||
599 | .restart = rtas_restart, | ||
600 | .power_off = rtas_power_off, | ||
601 | .halt = rtas_halt, | ||
602 | .panic = rtas_os_term, | ||
603 | .cpu_die = pSeries_mach_cpu_die, | ||
604 | .get_boot_time = pSeries_get_boot_time, | ||
605 | .get_rtc_time = pSeries_get_rtc_time, | ||
606 | .set_rtc_time = pSeries_set_rtc_time, | ||
607 | .calibrate_decr = pSeries_calibrate_decr, | ||
608 | .progress = pSeries_progress, | ||
609 | .check_legacy_ioport = pSeries_check_legacy_ioport, | ||
610 | .system_reset_exception = pSeries_system_reset_exception, | ||
611 | .machine_check_exception = pSeries_machine_check_exception, | ||
612 | }; | ||