diff options
Diffstat (limited to 'arch/ppc64/kernel/cputable.c')
-rw-r--r-- | arch/ppc64/kernel/cputable.c | 16 |
1 files changed, 1 insertions, 15 deletions
diff --git a/arch/ppc64/kernel/cputable.c b/arch/ppc64/kernel/cputable.c index 77cec42f9525..84fdd27498a5 100644 --- a/arch/ppc64/kernel/cputable.c +++ b/arch/ppc64/kernel/cputable.c | |||
@@ -23,6 +23,7 @@ | |||
23 | 23 | ||
24 | struct cpu_spec* cur_cpu_spec = NULL; | 24 | struct cpu_spec* cur_cpu_spec = NULL; |
25 | EXPORT_SYMBOL(cur_cpu_spec); | 25 | EXPORT_SYMBOL(cur_cpu_spec); |
26 | unsigned long ppc64_firmware_features; | ||
26 | 27 | ||
27 | /* NOTE: | 28 | /* NOTE: |
28 | * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's | 29 | * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's |
@@ -60,7 +61,6 @@ struct cpu_spec cpu_specs[] = { | |||
60 | .icache_bsize = 128, | 61 | .icache_bsize = 128, |
61 | .dcache_bsize = 128, | 62 | .dcache_bsize = 128, |
62 | .cpu_setup = __setup_cpu_power3, | 63 | .cpu_setup = __setup_cpu_power3, |
63 | .firmware_features = COMMON_PPC64_FW, | ||
64 | }, | 64 | }, |
65 | { /* Power3+ */ | 65 | { /* Power3+ */ |
66 | .pvr_mask = 0xffff0000, | 66 | .pvr_mask = 0xffff0000, |
@@ -73,7 +73,6 @@ struct cpu_spec cpu_specs[] = { | |||
73 | .icache_bsize = 128, | 73 | .icache_bsize = 128, |
74 | .dcache_bsize = 128, | 74 | .dcache_bsize = 128, |
75 | .cpu_setup = __setup_cpu_power3, | 75 | .cpu_setup = __setup_cpu_power3, |
76 | .firmware_features = COMMON_PPC64_FW, | ||
77 | }, | 76 | }, |
78 | { /* Northstar */ | 77 | { /* Northstar */ |
79 | .pvr_mask = 0xffff0000, | 78 | .pvr_mask = 0xffff0000, |
@@ -86,7 +85,6 @@ struct cpu_spec cpu_specs[] = { | |||
86 | .icache_bsize = 128, | 85 | .icache_bsize = 128, |
87 | .dcache_bsize = 128, | 86 | .dcache_bsize = 128, |
88 | .cpu_setup = __setup_cpu_power3, | 87 | .cpu_setup = __setup_cpu_power3, |
89 | .firmware_features = COMMON_PPC64_FW, | ||
90 | }, | 88 | }, |
91 | { /* Pulsar */ | 89 | { /* Pulsar */ |
92 | .pvr_mask = 0xffff0000, | 90 | .pvr_mask = 0xffff0000, |
@@ -99,7 +97,6 @@ struct cpu_spec cpu_specs[] = { | |||
99 | .icache_bsize = 128, | 97 | .icache_bsize = 128, |
100 | .dcache_bsize = 128, | 98 | .dcache_bsize = 128, |
101 | .cpu_setup = __setup_cpu_power3, | 99 | .cpu_setup = __setup_cpu_power3, |
102 | .firmware_features = COMMON_PPC64_FW, | ||
103 | }, | 100 | }, |
104 | { /* I-star */ | 101 | { /* I-star */ |
105 | .pvr_mask = 0xffff0000, | 102 | .pvr_mask = 0xffff0000, |
@@ -112,7 +109,6 @@ struct cpu_spec cpu_specs[] = { | |||
112 | .icache_bsize = 128, | 109 | .icache_bsize = 128, |
113 | .dcache_bsize = 128, | 110 | .dcache_bsize = 128, |
114 | .cpu_setup = __setup_cpu_power3, | 111 | .cpu_setup = __setup_cpu_power3, |
115 | .firmware_features = COMMON_PPC64_FW, | ||
116 | }, | 112 | }, |
117 | { /* S-star */ | 113 | { /* S-star */ |
118 | .pvr_mask = 0xffff0000, | 114 | .pvr_mask = 0xffff0000, |
@@ -125,7 +121,6 @@ struct cpu_spec cpu_specs[] = { | |||
125 | .icache_bsize = 128, | 121 | .icache_bsize = 128, |
126 | .dcache_bsize = 128, | 122 | .dcache_bsize = 128, |
127 | .cpu_setup = __setup_cpu_power3, | 123 | .cpu_setup = __setup_cpu_power3, |
128 | .firmware_features = COMMON_PPC64_FW, | ||
129 | }, | 124 | }, |
130 | { /* Power4 */ | 125 | { /* Power4 */ |
131 | .pvr_mask = 0xffff0000, | 126 | .pvr_mask = 0xffff0000, |
@@ -138,7 +133,6 @@ struct cpu_spec cpu_specs[] = { | |||
138 | .icache_bsize = 128, | 133 | .icache_bsize = 128, |
139 | .dcache_bsize = 128, | 134 | .dcache_bsize = 128, |
140 | .cpu_setup = __setup_cpu_power4, | 135 | .cpu_setup = __setup_cpu_power4, |
141 | .firmware_features = COMMON_PPC64_FW, | ||
142 | }, | 136 | }, |
143 | { /* Power4+ */ | 137 | { /* Power4+ */ |
144 | .pvr_mask = 0xffff0000, | 138 | .pvr_mask = 0xffff0000, |
@@ -151,7 +145,6 @@ struct cpu_spec cpu_specs[] = { | |||
151 | .icache_bsize = 128, | 145 | .icache_bsize = 128, |
152 | .dcache_bsize = 128, | 146 | .dcache_bsize = 128, |
153 | .cpu_setup = __setup_cpu_power4, | 147 | .cpu_setup = __setup_cpu_power4, |
154 | .firmware_features = COMMON_PPC64_FW, | ||
155 | }, | 148 | }, |
156 | { /* PPC970 */ | 149 | { /* PPC970 */ |
157 | .pvr_mask = 0xffff0000, | 150 | .pvr_mask = 0xffff0000, |
@@ -166,7 +159,6 @@ struct cpu_spec cpu_specs[] = { | |||
166 | .icache_bsize = 128, | 159 | .icache_bsize = 128, |
167 | .dcache_bsize = 128, | 160 | .dcache_bsize = 128, |
168 | .cpu_setup = __setup_cpu_ppc970, | 161 | .cpu_setup = __setup_cpu_ppc970, |
169 | .firmware_features = COMMON_PPC64_FW, | ||
170 | }, | 162 | }, |
171 | { /* PPC970FX */ | 163 | { /* PPC970FX */ |
172 | .pvr_mask = 0xffff0000, | 164 | .pvr_mask = 0xffff0000, |
@@ -181,7 +173,6 @@ struct cpu_spec cpu_specs[] = { | |||
181 | .icache_bsize = 128, | 173 | .icache_bsize = 128, |
182 | .dcache_bsize = 128, | 174 | .dcache_bsize = 128, |
183 | .cpu_setup = __setup_cpu_ppc970, | 175 | .cpu_setup = __setup_cpu_ppc970, |
184 | .firmware_features = COMMON_PPC64_FW, | ||
185 | }, | 176 | }, |
186 | { /* PPC970MP */ | 177 | { /* PPC970MP */ |
187 | .pvr_mask = 0xffff0000, | 178 | .pvr_mask = 0xffff0000, |
@@ -196,7 +187,6 @@ struct cpu_spec cpu_specs[] = { | |||
196 | .icache_bsize = 128, | 187 | .icache_bsize = 128, |
197 | .dcache_bsize = 128, | 188 | .dcache_bsize = 128, |
198 | .cpu_setup = __setup_cpu_ppc970, | 189 | .cpu_setup = __setup_cpu_ppc970, |
199 | .firmware_features = COMMON_PPC64_FW, | ||
200 | }, | 190 | }, |
201 | { /* Power5 */ | 191 | { /* Power5 */ |
202 | .pvr_mask = 0xffff0000, | 192 | .pvr_mask = 0xffff0000, |
@@ -211,7 +201,6 @@ struct cpu_spec cpu_specs[] = { | |||
211 | .icache_bsize = 128, | 201 | .icache_bsize = 128, |
212 | .dcache_bsize = 128, | 202 | .dcache_bsize = 128, |
213 | .cpu_setup = __setup_cpu_power4, | 203 | .cpu_setup = __setup_cpu_power4, |
214 | .firmware_features = COMMON_PPC64_FW, | ||
215 | }, | 204 | }, |
216 | { /* Power5 */ | 205 | { /* Power5 */ |
217 | .pvr_mask = 0xffff0000, | 206 | .pvr_mask = 0xffff0000, |
@@ -226,7 +215,6 @@ struct cpu_spec cpu_specs[] = { | |||
226 | .icache_bsize = 128, | 215 | .icache_bsize = 128, |
227 | .dcache_bsize = 128, | 216 | .dcache_bsize = 128, |
228 | .cpu_setup = __setup_cpu_power4, | 217 | .cpu_setup = __setup_cpu_power4, |
229 | .firmware_features = COMMON_PPC64_FW, | ||
230 | }, | 218 | }, |
231 | { /* BE DD1.x */ | 219 | { /* BE DD1.x */ |
232 | .pvr_mask = 0xffff0000, | 220 | .pvr_mask = 0xffff0000, |
@@ -241,7 +229,6 @@ struct cpu_spec cpu_specs[] = { | |||
241 | .icache_bsize = 128, | 229 | .icache_bsize = 128, |
242 | .dcache_bsize = 128, | 230 | .dcache_bsize = 128, |
243 | .cpu_setup = __setup_cpu_be, | 231 | .cpu_setup = __setup_cpu_be, |
244 | .firmware_features = COMMON_PPC64_FW, | ||
245 | }, | 232 | }, |
246 | { /* default match */ | 233 | { /* default match */ |
247 | .pvr_mask = 0x00000000, | 234 | .pvr_mask = 0x00000000, |
@@ -254,7 +241,6 @@ struct cpu_spec cpu_specs[] = { | |||
254 | .icache_bsize = 128, | 241 | .icache_bsize = 128, |
255 | .dcache_bsize = 128, | 242 | .dcache_bsize = 128, |
256 | .cpu_setup = __setup_cpu_power4, | 243 | .cpu_setup = __setup_cpu_power4, |
257 | .firmware_features = COMMON_PPC64_FW, | ||
258 | } | 244 | } |
259 | }; | 245 | }; |
260 | 246 | ||