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Diffstat (limited to 'arch/ppc/syslib/mpc10x_common.c')
-rw-r--r--arch/ppc/syslib/mpc10x_common.c53
1 files changed, 43 insertions, 10 deletions
diff --git a/arch/ppc/syslib/mpc10x_common.c b/arch/ppc/syslib/mpc10x_common.c
index 8fc5f4154521..87065e2e4c5f 100644
--- a/arch/ppc/syslib/mpc10x_common.c
+++ b/arch/ppc/syslib/mpc10x_common.c
@@ -45,24 +45,29 @@
45#define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS) 45#define MPC10X_DMA0_IRQ (EPIC_IRQ_BASE + 1 + NUM_8259_INTERRUPTS)
46#define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS) 46#define MPC10X_DMA1_IRQ (EPIC_IRQ_BASE + 2 + NUM_8259_INTERRUPTS)
47#define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS) 47#define MPC10X_UART0_IRQ (EPIC_IRQ_BASE + 4 + NUM_8259_INTERRUPTS)
48#define MPC10X_UART1_IRQ (EPIC_IRQ_BASE + 5 + NUM_8259_INTERRUPTS)
48#else 49#else
49#define MPC10X_I2C_IRQ -1 50#define MPC10X_I2C_IRQ -1
50#define MPC10X_DMA0_IRQ -1 51#define MPC10X_DMA0_IRQ -1
51#define MPC10X_DMA1_IRQ -1 52#define MPC10X_DMA1_IRQ -1
52#define MPC10X_UART0_IRQ -1 53#define MPC10X_UART0_IRQ -1
54#define MPC10X_UART1_IRQ -1
53#endif 55#endif
54 56
55static struct fsl_i2c_platform_data mpc10x_i2c_pdata = { 57static struct fsl_i2c_platform_data mpc10x_i2c_pdata = {
56 .device_flags = 0, 58 .device_flags = 0,
57}; 59};
58 60
59static struct plat_serial8250_port serial_platform_data[] = { 61static struct plat_serial8250_port serial_plat_uart0[] = {
60 [0] = { 62 [0] = {
61 .mapbase = 0x4500, 63 .mapbase = 0x4500,
62 .iotype = UPIO_MEM, 64 .iotype = UPIO_MEM,
63 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 65 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
64 }, 66 },
65 [1] = { 67 { },
68};
69static struct plat_serial8250_port serial_plat_uart1[] = {
70 [0] = {
66 .mapbase = 0x4600, 71 .mapbase = 0x4600,
67 .iotype = UPIO_MEM, 72 .iotype = UPIO_MEM,
68 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST, 73 .flags = UPF_BOOT_AUTOCONF | UPF_SKIP_TEST,
@@ -133,11 +138,17 @@ struct platform_device ppc_sys_platform_devices[] = {
133 }, 138 },
134 }, 139 },
135 }, 140 },
136 [MPC10X_DUART] = { 141 [MPC10X_UART0] = {
137 .name = "serial8250", 142 .name = "serial8250",
138 .id = 0, 143 .id = 0,
139 .dev.platform_data = serial_platform_data, 144 .dev.platform_data = serial_plat_uart0,
140 }, 145 },
146 [MPC10X_UART1] = {
147 .name = "serial8250",
148 .id = 1,
149 .dev.platform_data = serial_plat_uart1,
150 },
151
141}; 152};
142 153
143/* We use the PCI ID to match on */ 154/* We use the PCI ID to match on */
@@ -147,10 +158,10 @@ struct ppc_sys_spec ppc_sys_specs[] = {
147 .ppc_sys_name = "8245", 158 .ppc_sys_name = "8245",
148 .mask = 0xFFFFFFFF, 159 .mask = 0xFFFFFFFF,
149 .value = MPC10X_BRIDGE_8245, 160 .value = MPC10X_BRIDGE_8245,
150 .num_devices = 4, 161 .num_devices = 5,
151 .device_list = (enum ppc_sys_devices[]) 162 .device_list = (enum ppc_sys_devices[])
152 { 163 {
153 MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_DUART, 164 MPC10X_IIC1, MPC10X_DMA0, MPC10X_DMA1, MPC10X_UART0, MPC10X_UART1,
154 }, 165 },
155 }, 166 },
156 { 167 {
@@ -180,6 +191,25 @@ struct ppc_sys_spec ppc_sys_specs[] = {
180 }, 191 },
181}; 192};
182 193
194/*
195 * mach_mpc10x_fixup: This function enables DUART mode if it detects
196 * if it detects two UARTS in the platform device entries.
197 */
198static int __init mach_mpc10x_fixup(struct platform_device *pdev)
199{
200 if (strncmp (pdev->name, "serial8250", 10) == 0 && pdev->id == 1)
201 writeb(readb(serial_plat_uart1[0].membase + 0x11) | 0x1,
202 serial_plat_uart1[0].membase + 0x11);
203 return 0;
204}
205
206static int __init mach_mpc10x_init(void)
207{
208 ppc_sys_device_fixup = mach_mpc10x_fixup;
209 return 0;
210}
211postcore_initcall(mach_mpc10x_init);
212
183/* Set resources to match bridge memory map */ 213/* Set resources to match bridge memory map */
184void __init 214void __init
185mpc10x_bridge_set_resources(int map, struct pci_controller *hose) 215mpc10x_bridge_set_resources(int map, struct pci_controller *hose)
@@ -219,6 +249,7 @@ mpc10x_bridge_set_resources(int map, struct pci_controller *hose)
219 ppc_md.progress("mpc10x:exit1", 0x100); 249 ppc_md.progress("mpc10x:exit1", 0x100);
220 } 250 }
221} 251}
252
222/* 253/*
223 * Do some initialization and put the EUMB registers at the specified address 254 * Do some initialization and put the EUMB registers at the specified address
224 * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set). 255 * (also map the EPIC registers into virtual space--OpenPIC_Addr will be set).
@@ -411,11 +442,13 @@ mpc10x_bridge_init(struct pci_controller *hose,
411 ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ; 442 ppc_sys_platform_devices[MPC10X_DMA1].resource[1].start = MPC10X_DMA1_IRQ;
412 ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ; 443 ppc_sys_platform_devices[MPC10X_DMA1].resource[1].end = MPC10X_DMA1_IRQ;
413 444
414 serial_platform_data[0].mapbase += phys_eumb_base; 445 serial_plat_uart0[0].mapbase += phys_eumb_base;
415 serial_platform_data[0].irq = MPC10X_UART0_IRQ; 446 serial_plat_uart0[0].irq = MPC10X_UART0_IRQ;
447 serial_plat_uart0[0].membase = ioremap(serial_plat_uart0[0].mapbase, 0x100);
416 448
417 serial_platform_data[1].mapbase += phys_eumb_base; 449 serial_plat_uart1[0].mapbase += phys_eumb_base;
418 serial_platform_data[1].irq = MPC10X_UART0_IRQ + 1; 450 serial_plat_uart1[0].irq = MPC10X_UART1_IRQ;
451 serial_plat_uart1[0].membase = ioremap(serial_plat_uart1[0].mapbase, 0x100);
419 452
420 /* 453 /*
421 * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative 454 * 8240 erratum 26, 8241/8245 erratum 29, 107 erratum 23: speculative