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-rw-r--r--arch/ppc/platforms/4xx/Makefile1
-rw-r--r--arch/ppc/platforms/4xx/virtex.c56
-rw-r--r--arch/ppc/platforms/4xx/virtex.h7
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml300.c64
-rw-r--r--arch/ppc/platforms/4xx/xilinx_ml403.c65
5 files changed, 9 insertions, 184 deletions
diff --git a/arch/ppc/platforms/4xx/Makefile b/arch/ppc/platforms/4xx/Makefile
index fa6610bccaf9..723ad7985cc6 100644
--- a/arch/ppc/platforms/4xx/Makefile
+++ b/arch/ppc/platforms/4xx/Makefile
@@ -28,5 +28,4 @@ obj-$(CONFIG_440SP) += ibm440sp.o
28obj-$(CONFIG_440SPE) += ppc440spe.o 28obj-$(CONFIG_440SPE) += ppc440spe.o
29obj-$(CONFIG_405EP) += ibm405ep.o 29obj-$(CONFIG_405EP) += ibm405ep.o
30obj-$(CONFIG_405GPR) += ibm405gpr.o 30obj-$(CONFIG_405GPR) += ibm405gpr.o
31obj-$(CONFIG_XILINX_VIRTEX) += virtex.o
32 31
diff --git a/arch/ppc/platforms/4xx/virtex.c b/arch/ppc/platforms/4xx/virtex.c
deleted file mode 100644
index 133a83147199..000000000000
--- a/arch/ppc/platforms/4xx/virtex.c
+++ /dev/null
@@ -1,56 +0,0 @@
1/*
2 * Virtex-II Pro & Virtex-4 FX common infrastructure
3 *
4 * Maintainer: Grant Likely <grant.likely@secretlab.ca>
5 *
6 * Copyright 2005 Secret Lab Technologies Ltd.
7 * Copyright 2005 General Dynamics Canada Ltd.
8 * Copyright 2005 Freescale Semiconductor Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/init.h>
17#include <linux/module.h>
18#include <linux/device.h>
19#include <linux/serial_8250.h>
20#include <asm/ppc_sys.h>
21#include <platforms/4xx/virtex.h>
22#include <platforms/4xx/xparameters/xparameters.h>
23
24#define XPAR_UART(num) { \
25 .mapbase = XPAR_UARTNS550_##num##_BASEADDR + 3, \
26 .irq = XPAR_INTC_0_UARTNS550_##num##_VEC_ID, \
27 .iotype = UPIO_MEM, \
28 .uartclk = XPAR_UARTNS550_##num##_CLOCK_FREQ_HZ, \
29 .flags = UPF_BOOT_AUTOCONF, \
30 .regshift = 2, \
31 }
32
33struct plat_serial8250_port serial_platform_data[] = {
34#ifdef XPAR_UARTNS550_0_BASEADDR
35 XPAR_UART(0),
36#endif
37#ifdef XPAR_UARTNS550_1_BASEADDR
38 XPAR_UART(1),
39#endif
40#ifdef XPAR_UARTNS550_2_BASEADDR
41 XPAR_UART(2),
42#endif
43#ifdef XPAR_UARTNS550_3_BASEADDR
44 XPAR_UART(3),
45#endif
46 { }, /* terminated by empty record */
47};
48
49struct platform_device ppc_sys_platform_devices[] = {
50 [VIRTEX_UART] = {
51 .name = "serial8250",
52 .id = 0,
53 .dev.platform_data = serial_platform_data,
54 },
55};
56
diff --git a/arch/ppc/platforms/4xx/virtex.h b/arch/ppc/platforms/4xx/virtex.h
index e9f58a784314..4fc76da2a4ba 100644
--- a/arch/ppc/platforms/4xx/virtex.h
+++ b/arch/ppc/platforms/4xx/virtex.h
@@ -19,13 +19,8 @@
19#if !defined(BASE_BAUD) 19#if !defined(BASE_BAUD)
20 #define BASE_BAUD (0) /* dummy value; not used */ 20 #define BASE_BAUD (0) /* dummy value; not used */
21#endif 21#endif
22 22
23/* Device type enumeration for platform bus definitions */
24#ifndef __ASSEMBLY__ 23#ifndef __ASSEMBLY__
25enum ppc_sys_devices {
26 VIRTEX_UART, NUM_PPC_SYS_DEVS,
27};
28
29typedef struct board_info { 24typedef struct board_info {
30 unsigned int bi_memsize; /* DRAM installed, in bytes */ 25 unsigned int bi_memsize; /* DRAM installed, in bytes */
31 unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */ 26 unsigned char bi_enetaddr[6]; /* Local Ethernet MAC address */
diff --git a/arch/ppc/platforms/4xx/xilinx_ml300.c b/arch/ppc/platforms/4xx/xilinx_ml300.c
index 4e4aca43c890..6e522fefc26f 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml300.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml300.c
@@ -18,9 +18,9 @@
18#include <linux/serialP.h> 18#include <linux/serialP.h>
19#include <asm/io.h> 19#include <asm/io.h>
20#include <asm/machdep.h> 20#include <asm/machdep.h>
21#include <asm/ppc_sys.h>
22 21
23#include <syslib/gen550.h> 22#include <syslib/gen550.h>
23#include <syslib/virtex_devices.h>
24#include <platforms/4xx/xparameters/xparameters.h> 24#include <platforms/4xx/xparameters/xparameters.h>
25 25
26/* 26/*
@@ -53,25 +53,9 @@
53 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c 53 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
54 */ 54 */
55 55
56/* Board specifications structures */
57struct ppc_sys_spec *cur_ppc_sys_spec;
58struct ppc_sys_spec ppc_sys_specs[] = {
59 {
60 /* Only one entry, always assume the same design */
61 .ppc_sys_name = "Xilinx ML300 Reference Design",
62 .mask = 0x00000000,
63 .value = 0x00000000,
64 .num_devices = 1,
65 .device_list = (enum ppc_sys_devices[])
66 {
67 VIRTEX_UART,
68 },
69 },
70};
71const char* virtex_machine_name = "ML300 Reference Design"; 56const char* virtex_machine_name = "ML300 Reference Design";
72 57
73#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) 58#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
74
75static volatile unsigned *powerdown_base = 59static volatile unsigned *powerdown_base =
76 (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR; 60 (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
77 61
@@ -96,52 +80,14 @@ ml300_map_io(void)
96#endif 80#endif
97} 81}
98 82
99/* Early serial support functions */
100static void __init
101ml300_early_serial_init(int num, struct plat_serial8250_port *pdata)
102{
103#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
104 struct uart_port serial_req;
105
106 memset(&serial_req, 0, sizeof(serial_req));
107 serial_req.mapbase = pdata->mapbase;
108 serial_req.membase = pdata->membase;
109 serial_req.irq = pdata->irq;
110 serial_req.uartclk = pdata->uartclk;
111 serial_req.regshift = pdata->regshift;
112 serial_req.iotype = pdata->iotype;
113 serial_req.flags = pdata->flags;
114 gen550_init(num, &serial_req);
115#endif
116}
117
118void __init
119ml300_early_serial_map(void)
120{
121#ifdef CONFIG_SERIAL_8250
122 struct plat_serial8250_port *pdata;
123 int i = 0;
124
125 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
126 while(pdata && pdata->flags)
127 {
128 pdata->membase = ioremap(pdata->mapbase, 0x100);
129 ml300_early_serial_init(i, pdata);
130 pdata++;
131 i++;
132 }
133#endif /* CONFIG_SERIAL_8250 */
134}
135
136void __init 83void __init
137ml300_setup_arch(void) 84ml300_setup_arch(void)
138{ 85{
139 ml300_early_serial_map(); 86 virtex_early_serial_map();
140 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */ 87 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
141 88
142 /* Identify the system */ 89 /* Identify the system */
143 printk(KERN_INFO "Xilinx Virtex-II Pro port\n"); 90 printk(KERN_INFO "Xilinx ML300 Reference System (Virtex-II Pro)\n");
144 printk(KERN_INFO "Port by MontaVista Software, Inc. (source@mvista.com)\n");
145} 91}
146 92
147/* Called after board_setup_irq from ppc4xx_init_IRQ(). */ 93/* Called after board_setup_irq from ppc4xx_init_IRQ(). */
@@ -157,8 +103,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
157{ 103{
158 ppc4xx_init(r3, r4, r5, r6, r7); 104 ppc4xx_init(r3, r4, r5, r6, r7);
159 105
160 identify_ppc_sys_by_id(mfspr(SPRN_PVR));
161
162 ppc_md.setup_arch = ml300_setup_arch; 106 ppc_md.setup_arch = ml300_setup_arch;
163 ppc_md.setup_io_mappings = ml300_map_io; 107 ppc_md.setup_io_mappings = ml300_map_io;
164 ppc_md.init_IRQ = ml300_init_irq; 108 ppc_md.init_IRQ = ml300_init_irq;
@@ -168,7 +112,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
168#endif 112#endif
169 113
170#ifdef CONFIG_KGDB 114#ifdef CONFIG_KGDB
171 ppc_md.early_serial_map = ml300_early_serial_map; 115 ppc_md.early_serial_map = virtex_early_serial_map;
172#endif 116#endif
173} 117}
174 118
diff --git a/arch/ppc/platforms/4xx/xilinx_ml403.c b/arch/ppc/platforms/4xx/xilinx_ml403.c
index c98e40a8799f..bc3ace3762e7 100644
--- a/arch/ppc/platforms/4xx/xilinx_ml403.c
+++ b/arch/ppc/platforms/4xx/xilinx_ml403.c
@@ -1,11 +1,9 @@
1/* 1/*
2 * arch/ppc/platforms/4xx/xilinx_ml403.c
3 *
4 * Xilinx ML403 evaluation board initialization 2 * Xilinx ML403 evaluation board initialization
5 * 3 *
6 * Author: Grant Likely <grant.likely@secretlab.ca> 4 * Author: Grant Likely <grant.likely@secretlab.ca>
7 * 5 *
8 * 2005 (c) Secret Lab Technologies Ltd. 6 * 2005-2007 (c) Secret Lab Technologies Ltd.
9 * 2002-2004 (c) MontaVista Software, Inc. 7 * 2002-2004 (c) MontaVista Software, Inc.
10 * 8 *
11 * This file is licensed under the terms of the GNU General Public License 9 * This file is licensed under the terms of the GNU General Public License
@@ -22,9 +20,9 @@
22#include <linux/serialP.h> 20#include <linux/serialP.h>
23#include <asm/io.h> 21#include <asm/io.h>
24#include <asm/machdep.h> 22#include <asm/machdep.h>
25#include <asm/ppc_sys.h>
26 23
27#include <syslib/gen550.h> 24#include <syslib/gen550.h>
25#include <syslib/virtex_devices.h>
28#include <platforms/4xx/xparameters/xparameters.h> 26#include <platforms/4xx/xparameters/xparameters.h>
29 27
30/* 28/*
@@ -57,25 +55,9 @@
57 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c 55 * ppc4xx_pic_init arch/ppc/syslib/xilinx_pic.c
58 */ 56 */
59 57
60/* Board specifications structures */
61struct ppc_sys_spec *cur_ppc_sys_spec;
62struct ppc_sys_spec ppc_sys_specs[] = {
63 {
64 /* Only one entry, always assume the same design */
65 .ppc_sys_name = "Xilinx ML403 Reference Design",
66 .mask = 0x00000000,
67 .value = 0x00000000,
68 .num_devices = 1,
69 .device_list = (enum ppc_sys_devices[])
70 {
71 VIRTEX_UART,
72 },
73 },
74};
75const char* virtex_machine_name = "ML403 Reference Design"; 58const char* virtex_machine_name = "ML403 Reference Design";
76 59
77#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR) 60#if defined(XPAR_POWER_0_POWERDOWN_BASEADDR)
78
79static volatile unsigned *powerdown_base = 61static volatile unsigned *powerdown_base =
80 (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR; 62 (volatile unsigned *) XPAR_POWER_0_POWERDOWN_BASEADDR;
81 63
@@ -100,47 +82,10 @@ ml403_map_io(void)
100#endif 82#endif
101} 83}
102 84
103/* Early serial support functions */
104static void __init
105ml403_early_serial_init(int num, struct plat_serial8250_port *pdata)
106{
107#if defined(CONFIG_SERIAL_TEXT_DEBUG) || defined(CONFIG_KGDB)
108 struct uart_port serial_req;
109
110 memset(&serial_req, 0, sizeof(serial_req));
111 serial_req.mapbase = pdata->mapbase;
112 serial_req.membase = pdata->membase;
113 serial_req.irq = pdata->irq;
114 serial_req.uartclk = pdata->uartclk;
115 serial_req.regshift = pdata->regshift;
116 serial_req.iotype = pdata->iotype;
117 serial_req.flags = pdata->flags;
118 gen550_init(num, &serial_req);
119#endif
120}
121
122void __init
123ml403_early_serial_map(void)
124{
125#ifdef CONFIG_SERIAL_8250
126 struct plat_serial8250_port *pdata;
127 int i = 0;
128
129 pdata = (struct plat_serial8250_port *) ppc_sys_get_pdata(VIRTEX_UART);
130 while(pdata && pdata->flags)
131 {
132 pdata->membase = ioremap(pdata->mapbase, 0x100);
133 ml403_early_serial_init(i, pdata);
134 pdata++;
135 i++;
136 }
137#endif /* CONFIG_SERIAL_8250 */
138}
139
140void __init 85void __init
141ml403_setup_arch(void) 86ml403_setup_arch(void)
142{ 87{
143 ml403_early_serial_map(); 88 virtex_early_serial_map();
144 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */ 89 ppc4xx_setup_arch(); /* calls ppc4xx_find_bridges() */
145 90
146 /* Identify the system */ 91 /* Identify the system */
@@ -160,8 +105,6 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
160{ 105{
161 ppc4xx_init(r3, r4, r5, r6, r7); 106 ppc4xx_init(r3, r4, r5, r6, r7);
162 107
163 identify_ppc_sys_by_id(mfspr(SPRN_PVR));
164
165 ppc_md.setup_arch = ml403_setup_arch; 108 ppc_md.setup_arch = ml403_setup_arch;
166 ppc_md.setup_io_mappings = ml403_map_io; 109 ppc_md.setup_io_mappings = ml403_map_io;
167 ppc_md.init_IRQ = ml403_init_irq; 110 ppc_md.init_IRQ = ml403_init_irq;
@@ -171,7 +114,7 @@ platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
171#endif 114#endif
172 115
173#ifdef CONFIG_KGDB 116#ifdef CONFIG_KGDB
174 ppc_md.early_serial_map = ml403_early_serial_map; 117 ppc_md.early_serial_map = virtex_early_serial_map;
175#endif 118#endif
176} 119}
177 120