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Diffstat (limited to 'arch/ppc/platforms/lite5200.c')
-rw-r--r--arch/ppc/platforms/lite5200.c38
1 files changed, 10 insertions, 28 deletions
diff --git a/arch/ppc/platforms/lite5200.c b/arch/ppc/platforms/lite5200.c
index d91efe1dc2d1..fecbe9adc9e0 100644
--- a/arch/ppc/platforms/lite5200.c
+++ b/arch/ppc/platforms/lite5200.c
@@ -36,8 +36,6 @@
36#include <asm/machdep.h> 36#include <asm/machdep.h>
37#include <asm/pci-bridge.h> 37#include <asm/pci-bridge.h>
38 38
39#include <syslib/mpc52xx_pci.h>
40
41 39
42extern int powersave_nap; 40extern int powersave_nap;
43 41
@@ -99,34 +97,23 @@ lite5200_map_irq(struct pci_dev *dev, unsigned char idsel, unsigned char pin)
99static void __init 97static void __init
100lite5200_setup_cpu(void) 98lite5200_setup_cpu(void)
101{ 99{
102 struct mpc52xx_cdm __iomem *cdm;
103 struct mpc52xx_gpio __iomem *gpio; 100 struct mpc52xx_gpio __iomem *gpio;
104 struct mpc52xx_intr __iomem *intr; 101 struct mpc52xx_intr __iomem *intr;
105 struct mpc52xx_xlb __iomem *xlb;
106 102
107 u32 port_config; 103 u32 port_config;
108 u32 intr_ctrl; 104 u32 intr_ctrl;
109 105
110 /* Map zones */ 106 /* Map zones */
111 cdm = ioremap(MPC52xx_PA(MPC52xx_CDM_OFFSET), MPC52xx_CDM_SIZE);
112 gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE); 107 gpio = ioremap(MPC52xx_PA(MPC52xx_GPIO_OFFSET), MPC52xx_GPIO_SIZE);
113 xlb = ioremap(MPC52xx_PA(MPC52xx_XLB_OFFSET), MPC52xx_XLB_SIZE);
114 intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE); 108 intr = ioremap(MPC52xx_PA(MPC52xx_INTR_OFFSET), MPC52xx_INTR_SIZE);
115 109
116 if (!cdm || !gpio || !xlb || !intr) { 110 if (!gpio || !intr) {
117 printk("lite5200.c: Error while mapping CDM/GPIO/XLB/INTR during" 111 printk(KERN_ERR __FILE__ ": "
118 "lite5200_setup_cpu\n"); 112 "Error while mapping GPIO/INTR during "
113 "lite5200_setup_cpu\n");
119 goto unmap_regs; 114 goto unmap_regs;
120 } 115 }
121 116
122 /* Use internal 48 Mhz */
123 out_8(&cdm->ext_48mhz_en, 0x00);
124 out_8(&cdm->fd_enable, 0x01);
125 if (in_be32(&cdm->rstcfg) & 0x40) /* Assumes 33Mhz clock */
126 out_be16(&cdm->fd_counters, 0x0001);
127 else
128 out_be16(&cdm->fd_counters, 0x5555);
129
130 /* Get port mux config */ 117 /* Get port mux config */
131 port_config = in_be32(&gpio->port_config); 118 port_config = in_be32(&gpio->port_config);
132 119
@@ -137,17 +124,13 @@ lite5200_setup_cpu(void)
137 port_config &= ~0x00007000; /* Differential mode - USB1 only */ 124 port_config &= ~0x00007000; /* Differential mode - USB1 only */
138 port_config |= 0x00001000; 125 port_config |= 0x00001000;
139 126
127 /* ATA CS is on csb_4/5 */
128 port_config &= ~0x03000000;
129 port_config |= 0x01000000;
130
140 /* Commit port config */ 131 /* Commit port config */
141 out_be32(&gpio->port_config, port_config); 132 out_be32(&gpio->port_config, port_config);
142 133
143 /* Configure the XLB Arbiter */
144 out_be32(&xlb->master_pri_enable, 0xff);
145 out_be32(&xlb->master_priority, 0x11111111);
146
147 /* Enable ram snooping for 1GB window */
148 out_be32(&xlb->config, in_be32(&xlb->config) | MPC52xx_XLB_CFG_SNOOP);
149 out_be32(&xlb->snoop_window, MPC52xx_PCI_TARGET_MEM | 0x1d);
150
151 /* IRQ[0-3] setup */ 134 /* IRQ[0-3] setup */
152 intr_ctrl = in_be32(&intr->ctrl); 135 intr_ctrl = in_be32(&intr->ctrl);
153 intr_ctrl &= ~0x00ff0000; 136 intr_ctrl &= ~0x00ff0000;
@@ -163,9 +146,7 @@ lite5200_setup_cpu(void)
163 146
164 /* Unmap reg zone */ 147 /* Unmap reg zone */
165unmap_regs: 148unmap_regs:
166 if (cdm) iounmap(cdm);
167 if (gpio) iounmap(gpio); 149 if (gpio) iounmap(gpio);
168 if (xlb) iounmap(xlb);
169 if (intr) iounmap(intr); 150 if (intr) iounmap(intr);
170} 151}
171 152
@@ -173,7 +154,8 @@ static void __init
173lite5200_setup_arch(void) 154lite5200_setup_arch(void)
174{ 155{
175 /* CPU & Port mux setup */ 156 /* CPU & Port mux setup */
176 lite5200_setup_cpu(); 157 mpc52xx_setup_cpu(); /* Generic */
158 lite5200_setup_cpu(); /* Platform specific */
177 159
178#ifdef CONFIG_PCI 160#ifdef CONFIG_PCI
179 /* PCI Bridge setup */ 161 /* PCI Bridge setup */