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-rw-r--r--arch/ppc/platforms/chrp_pci.c7
1 files changed, 4 insertions, 3 deletions
diff --git a/arch/ppc/platforms/chrp_pci.c b/arch/ppc/platforms/chrp_pci.c
index 5bb6492ecf8c..7d0ee308f662 100644
--- a/arch/ppc/platforms/chrp_pci.c
+++ b/arch/ppc/platforms/chrp_pci.c
@@ -129,7 +129,7 @@ static struct pci_ops rtas_pci_ops =
129 rtas_write_config 129 rtas_write_config
130}; 130};
131 131
132volatile struct Hydra *Hydra = NULL; 132volatile struct Hydra __iomem *Hydra = NULL;
133 133
134int __init 134int __init
135hydra_init(void) 135hydra_init(void)
@@ -175,13 +175,14 @@ chrp_pcibios_fixup(void)
175static void __init 175static void __init
176setup_python(struct pci_controller *hose, struct device_node *dev) 176setup_python(struct pci_controller *hose, struct device_node *dev)
177{ 177{
178 u32 *reg, val; 178 u32 __iomem *reg;
179 u32 val;
179 unsigned long addr = dev->addrs[0].address; 180 unsigned long addr = dev->addrs[0].address;
180 181
181 setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010); 182 setup_indirect_pci(hose, addr + 0xf8000, addr + 0xf8010);
182 183
183 /* Clear the magic go-slow bit */ 184 /* Clear the magic go-slow bit */
184 reg = (u32 *) ioremap(dev->addrs[0].address + 0xf6000, 0x40); 185 reg = ioremap(dev->addrs[0].address + 0xf6000, 0x40);
185 val = in_be32(&reg[12]); 186 val = in_be32(&reg[12]);
186 if (val & PRG_CL_RESET_VALID) { 187 if (val & PRG_CL_RESET_VALID) {
187 out_be32(&reg[12], val & ~PRG_CL_RESET_VALID); 188 out_be32(&reg[12], val & ~PRG_CL_RESET_VALID);