diff options
Diffstat (limited to 'arch/ppc/platforms/adir.h')
| -rw-r--r-- | arch/ppc/platforms/adir.h | 95 |
1 files changed, 0 insertions, 95 deletions
diff --git a/arch/ppc/platforms/adir.h b/arch/ppc/platforms/adir.h deleted file mode 100644 index 13a748b46956..000000000000 --- a/arch/ppc/platforms/adir.h +++ /dev/null | |||
| @@ -1,95 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * arch/ppc/platforms/adir.h | ||
| 3 | * | ||
| 4 | * Definitions for SBS Adirondack board support | ||
| 5 | * | ||
| 6 | * By Michael Sokolov <msokolov@ivan.Harhan.ORG> | ||
| 7 | */ | ||
| 8 | |||
| 9 | #ifndef __PPC_PLATFORMS_ADIR_H | ||
| 10 | #define __PPC_PLATFORMS_ADIR_H | ||
| 11 | |||
| 12 | /* | ||
| 13 | * SBS Adirondack definitions | ||
| 14 | */ | ||
| 15 | |||
| 16 | /* PPC physical address space layout. We use the one set up by the firmware. */ | ||
| 17 | #define ADIR_PCI32_MEM_BASE 0x80000000 | ||
| 18 | #define ADIR_PCI32_MEM_SIZE 0x20000000 | ||
| 19 | #define ADIR_PCI64_MEM_BASE 0xA0000000 | ||
| 20 | #define ADIR_PCI64_MEM_SIZE 0x20000000 | ||
| 21 | #define ADIR_PCI32_IO_BASE 0xC0000000 | ||
| 22 | #define ADIR_PCI32_IO_SIZE 0x10000000 | ||
| 23 | #define ADIR_PCI64_IO_BASE 0xD0000000 | ||
| 24 | #define ADIR_PCI64_IO_SIZE 0x10000000 | ||
| 25 | #define ADIR_PCI64_PHB 0xFF400000 | ||
| 26 | #define ADIR_PCI32_PHB 0xFF500000 | ||
| 27 | |||
| 28 | #define ADIR_PCI64_CONFIG_ADDR (ADIR_PCI64_PHB + 0x000f8000) | ||
| 29 | #define ADIR_PCI64_CONFIG_DATA (ADIR_PCI64_PHB + 0x000f8010) | ||
| 30 | |||
| 31 | #define ADIR_PCI32_CONFIG_ADDR (ADIR_PCI32_PHB + 0x000f8000) | ||
| 32 | #define ADIR_PCI32_CONFIG_DATA (ADIR_PCI32_PHB + 0x000f8010) | ||
| 33 | |||
| 34 | /* System memory as seen from PCI */ | ||
| 35 | #define ADIR_PCI_SYS_MEM_BASE 0x80000000 | ||
| 36 | |||
| 37 | /* Static virtual mapping of PCI I/O */ | ||
| 38 | #define ADIR_PCI32_VIRT_IO_BASE 0xFE000000 | ||
| 39 | #define ADIR_PCI32_VIRT_IO_SIZE 0x01000000 | ||
| 40 | #define ADIR_PCI64_VIRT_IO_BASE 0xFF000000 | ||
| 41 | #define ADIR_PCI64_VIRT_IO_SIZE 0x01000000 | ||
| 42 | |||
| 43 | /* Registers */ | ||
| 44 | #define ADIR_NVRAM_RTC_ADDR 0x74 | ||
| 45 | #define ADIR_NVRAM_RTC_DATA 0x75 | ||
| 46 | |||
| 47 | #define ADIR_BOARD_ID_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF0) | ||
| 48 | #define ADIR_CPLD1REV_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF1) | ||
| 49 | #define ADIR_CPLD2REV_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF2) | ||
| 50 | #define ADIR_FLASHCTL_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF3) | ||
| 51 | #define ADIR_CPC710_STAT_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF4) | ||
| 52 | #define ADIR_CLOCK_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF5) | ||
| 53 | #define ADIR_GPIO_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF8) | ||
| 54 | #define ADIR_MISC_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFF9) | ||
| 55 | #define ADIR_LED_REG (ADIR_PCI32_VIRT_IO_BASE + 0x08FFFA) | ||
| 56 | |||
| 57 | #define ADIR_CLOCK_REG_PD 0x10 | ||
| 58 | #define ADIR_CLOCK_REG_SPREAD 0x08 | ||
| 59 | #define ADIR_CLOCK_REG_SEL133 0x04 | ||
| 60 | #define ADIR_CLOCK_REG_SEL1 0x02 | ||
| 61 | #define ADIR_CLOCK_REG_SEL0 0x01 | ||
| 62 | |||
| 63 | #define ADIR_PROCA_INT_MASK (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF0) | ||
| 64 | #define ADIR_PROCB_INT_MASK (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF2) | ||
| 65 | #define ADIR_PROCA_INT_STAT (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF4) | ||
| 66 | #define ADIR_PROCB_INT_STAT (ADIR_PCI32_VIRT_IO_BASE + 0x0EFFF6) | ||
| 67 | |||
| 68 | /* Linux IRQ numbers */ | ||
| 69 | #define ADIR_IRQ_NONE -1 | ||
| 70 | #define ADIR_IRQ_SERIAL2 3 | ||
| 71 | #define ADIR_IRQ_SERIAL1 4 | ||
| 72 | #define ADIR_IRQ_FDC 6 | ||
| 73 | #define ADIR_IRQ_PARALLEL 7 | ||
| 74 | #define ADIR_IRQ_VIA_AUDIO 10 | ||
| 75 | #define ADIR_IRQ_VIA_USB 11 | ||
| 76 | #define ADIR_IRQ_IDE0 14 | ||
| 77 | #define ADIR_IRQ_IDE1 15 | ||
| 78 | #define ADIR_IRQ_PCI0_INTA 16 | ||
| 79 | #define ADIR_IRQ_PCI0_INTB 17 | ||
| 80 | #define ADIR_IRQ_PCI0_INTC 18 | ||
| 81 | #define ADIR_IRQ_PCI0_INTD 19 | ||
| 82 | #define ADIR_IRQ_PCI1_INTA 20 | ||
| 83 | #define ADIR_IRQ_PCI1_INTB 21 | ||
| 84 | #define ADIR_IRQ_PCI1_INTC 22 | ||
| 85 | #define ADIR_IRQ_PCI1_INTD 23 | ||
| 86 | #define ADIR_IRQ_MBSCSI 24 /* motherboard SCSI */ | ||
| 87 | #define ADIR_IRQ_MBETH1 25 /* motherboard Ethernet 1 */ | ||
| 88 | #define ADIR_IRQ_MBETH0 26 /* motherboard Ethernet 0 */ | ||
| 89 | #define ADIR_IRQ_CPC710_INT1 27 | ||
| 90 | #define ADIR_IRQ_CPC710_INT2 28 | ||
| 91 | #define ADIR_IRQ_VT82C686_NMI 29 | ||
| 92 | #define ADIR_IRQ_VT82C686_INTR 30 | ||
| 93 | #define ADIR_IRQ_INTERPROC 31 | ||
| 94 | |||
| 95 | #endif /* __PPC_PLATFORMS_ADIR_H */ | ||