diff options
Diffstat (limited to 'arch/ppc/platforms/4xx/bamboo.h')
| -rw-r--r-- | arch/ppc/platforms/4xx/bamboo.h | 133 |
1 files changed, 0 insertions, 133 deletions
diff --git a/arch/ppc/platforms/4xx/bamboo.h b/arch/ppc/platforms/4xx/bamboo.h deleted file mode 100644 index dcd3d09a0a71..000000000000 --- a/arch/ppc/platforms/4xx/bamboo.h +++ /dev/null | |||
| @@ -1,133 +0,0 @@ | |||
| 1 | /* | ||
| 2 | * Bamboo board definitions | ||
| 3 | * | ||
| 4 | * Wade Farnsworth <wfarnsworth@mvista.com> | ||
| 5 | * | ||
| 6 | * Copyright 2004 MontaVista Software Inc. | ||
| 7 | * | ||
| 8 | * This program is free software; you can redistribute it and/or modify it | ||
| 9 | * under the terms of the GNU General Public License as published by the | ||
| 10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
| 11 | * option) any later version. | ||
| 12 | */ | ||
| 13 | |||
| 14 | #ifdef __KERNEL__ | ||
| 15 | #ifndef __ASM_BAMBOO_H__ | ||
| 16 | #define __ASM_BAMBOO_H__ | ||
| 17 | |||
| 18 | #include <platforms/4xx/ibm440ep.h> | ||
| 19 | |||
| 20 | /* F/W TLB mapping used in bootloader glue to reset EMAC */ | ||
| 21 | #define PPC44x_EMAC0_MR0 0x0EF600E00 | ||
| 22 | |||
| 23 | /* Location of MAC addresses in PIBS image */ | ||
| 24 | #define PIBS_FLASH_BASE 0xfff00000 | ||
| 25 | #define PIBS_MAC_BASE (PIBS_FLASH_BASE+0xc0400) | ||
| 26 | #define PIBS_MAC_SIZE 0x200 | ||
| 27 | #define PIBS_MAC_OFFSET 0x100 | ||
| 28 | |||
| 29 | /* Default clock rate */ | ||
| 30 | #define BAMBOO_TMRCLK 25000000 | ||
| 31 | |||
| 32 | /* RTC/NVRAM location */ | ||
| 33 | #define BAMBOO_RTC_ADDR 0x080000000ULL | ||
| 34 | #define BAMBOO_RTC_SIZE 0x2000 | ||
| 35 | |||
| 36 | /* FPGA Registers */ | ||
| 37 | #define BAMBOO_FPGA_ADDR 0x080002000ULL | ||
| 38 | |||
| 39 | #define BAMBOO_FPGA_CONFIG2_REG_ADDR (BAMBOO_FPGA_ADDR + 0x1) | ||
| 40 | #define BAMBOO_FULL_DUPLEX_EN(x) (x & 0x08) | ||
| 41 | #define BAMBOO_FORCE_100Mbps(x) (x & 0x04) | ||
| 42 | #define BAMBOO_AUTONEGOTIATE(x) (x & 0x02) | ||
| 43 | |||
| 44 | #define BAMBOO_FPGA_SETTING_REG_ADDR (BAMBOO_FPGA_ADDR + 0x3) | ||
| 45 | #define BAMBOO_BOOT_SMALL_FLASH(x) (!(x & 0x80)) | ||
| 46 | #define BAMBOO_LARGE_FLASH_EN(x) (!(x & 0x40)) | ||
| 47 | #define BAMBOO_BOOT_NAND_FLASH(x) (!(x & 0x20)) | ||
| 48 | |||
| 49 | #define BAMBOO_FPGA_SELECTION1_REG_ADDR (BAMBOO_FPGA_ADDR + 0x4) | ||
| 50 | #define BAMBOO_SEL_MII(x) (x & 0x80) | ||
| 51 | #define BAMBOO_SEL_RMII(x) (x & 0x40) | ||
| 52 | #define BAMBOO_SEL_SMII(x) (x & 0x20) | ||
| 53 | |||
| 54 | /* Flash */ | ||
| 55 | #define BAMBOO_SMALL_FLASH_LOW 0x087f00000ULL | ||
| 56 | #define BAMBOO_SMALL_FLASH_HIGH 0x0fff00000ULL | ||
| 57 | #define BAMBOO_SMALL_FLASH_SIZE 0x100000 | ||
| 58 | #define BAMBOO_LARGE_FLASH_LOW 0x087800000ULL | ||
| 59 | #define BAMBOO_LARGE_FLASH_HIGH1 0x0ff800000ULL | ||
| 60 | #define BAMBOO_LARGE_FLASH_HIGH2 0x0ffc00000ULL | ||
| 61 | #define BAMBOO_LARGE_FLASH_SIZE 0x400000 | ||
| 62 | #define BAMBOO_SRAM_LOW 0x087f00000ULL | ||
| 63 | #define BAMBOO_SRAM_HIGH1 0x0fff00000ULL | ||
| 64 | #define BAMBOO_SRAM_HIGH2 0x0ff800000ULL | ||
| 65 | #define BAMBOO_SRAM_SIZE 0x100000 | ||
| 66 | #define BAMBOO_NAND_FLASH_REG_ADDR 0x090000000ULL | ||
| 67 | #define BAMBOO_NAND_FLASH_REG_SIZE 0x2000 | ||
| 68 | |||
| 69 | /* | ||
| 70 | * Serial port defines | ||
| 71 | */ | ||
| 72 | #define RS_TABLE_SIZE 4 | ||
| 73 | |||
| 74 | #define UART0_IO_BASE 0xEF600300 | ||
| 75 | #define UART1_IO_BASE 0xEF600400 | ||
| 76 | #define UART2_IO_BASE 0xEF600500 | ||
| 77 | #define UART3_IO_BASE 0xEF600600 | ||
| 78 | |||
| 79 | #define BASE_BAUD 33177600/3/16 | ||
| 80 | #define UART0_INT 0 | ||
| 81 | #define UART1_INT 1 | ||
| 82 | #define UART2_INT 3 | ||
| 83 | #define UART3_INT 4 | ||
| 84 | |||
| 85 | #define STD_UART_OP(num) \ | ||
| 86 | { 0, BASE_BAUD, 0, UART##num##_INT, \ | ||
| 87 | (ASYNC_BOOT_AUTOCONF | ASYNC_SKIP_TEST), \ | ||
| 88 | iomem_base: (void*)UART##num##_IO_BASE, \ | ||
| 89 | io_type: SERIAL_IO_MEM}, | ||
| 90 | |||
| 91 | #define SERIAL_PORT_DFNS \ | ||
| 92 | STD_UART_OP(0) \ | ||
| 93 | STD_UART_OP(1) \ | ||
| 94 | STD_UART_OP(2) \ | ||
| 95 | STD_UART_OP(3) | ||
| 96 | |||
| 97 | /* PCI support */ | ||
| 98 | #define BAMBOO_PCI_CFGA_PLB32 0xeec00000 | ||
| 99 | #define BAMBOO_PCI_CFGD_PLB32 0xeec00004 | ||
| 100 | |||
| 101 | #define BAMBOO_PCI_IO_BASE 0x00000000e8000000ULL | ||
| 102 | #define BAMBOO_PCI_IO_SIZE 0x00010000 | ||
| 103 | #define BAMBOO_PCI_MEM_OFFSET 0x00000000 | ||
| 104 | #define BAMBOO_PCI_PHY_MEM_BASE 0x00000000a0000000ULL | ||
| 105 | |||
| 106 | #define BAMBOO_PCI_LOWER_IO 0x00000000 | ||
| 107 | #define BAMBOO_PCI_UPPER_IO 0x0000ffff | ||
| 108 | #define BAMBOO_PCI_LOWER_MEM 0xa0000000 | ||
| 109 | #define BAMBOO_PCI_UPPER_MEM 0xafffffff | ||
| 110 | #define BAMBOO_PCI_MEM_BASE 0xa0000000 | ||
| 111 | |||
| 112 | #define BAMBOO_PCIL0_BASE 0x00000000ef400000ULL | ||
| 113 | #define BAMBOO_PCIL0_SIZE 0x40 | ||
| 114 | |||
| 115 | #define BAMBOO_PCIL0_PMM0LA 0x000 | ||
| 116 | #define BAMBOO_PCIL0_PMM0MA 0x004 | ||
| 117 | #define BAMBOO_PCIL0_PMM0PCILA 0x008 | ||
| 118 | #define BAMBOO_PCIL0_PMM0PCIHA 0x00C | ||
| 119 | #define BAMBOO_PCIL0_PMM1LA 0x010 | ||
| 120 | #define BAMBOO_PCIL0_PMM1MA 0x014 | ||
| 121 | #define BAMBOO_PCIL0_PMM1PCILA 0x018 | ||
| 122 | #define BAMBOO_PCIL0_PMM1PCIHA 0x01C | ||
| 123 | #define BAMBOO_PCIL0_PMM2LA 0x020 | ||
| 124 | #define BAMBOO_PCIL0_PMM2MA 0x024 | ||
| 125 | #define BAMBOO_PCIL0_PMM2PCILA 0x028 | ||
| 126 | #define BAMBOO_PCIL0_PMM2PCIHA 0x02C | ||
| 127 | #define BAMBOO_PCIL0_PTM1MS 0x030 | ||
| 128 | #define BAMBOO_PCIL0_PTM1LA 0x034 | ||
| 129 | #define BAMBOO_PCIL0_PTM2MS 0x038 | ||
| 130 | #define BAMBOO_PCIL0_PTM2LA 0x03C | ||
| 131 | |||
| 132 | #endif /* __ASM_BAMBOO_H__ */ | ||
| 133 | #endif /* __KERNEL__ */ | ||