diff options
Diffstat (limited to 'arch/ppc/mm/hashtable.S')
-rw-r--r-- | arch/ppc/mm/hashtable.S | 34 |
1 files changed, 0 insertions, 34 deletions
diff --git a/arch/ppc/mm/hashtable.S b/arch/ppc/mm/hashtable.S index f09fa88db35a..31d0a924317c 100644 --- a/arch/ppc/mm/hashtable.S +++ b/arch/ppc/mm/hashtable.S | |||
@@ -74,12 +74,6 @@ _GLOBAL(hash_page_sync) | |||
74 | */ | 74 | */ |
75 | .text | 75 | .text |
76 | _GLOBAL(hash_page) | 76 | _GLOBAL(hash_page) |
77 | #ifdef CONFIG_PPC64BRIDGE | ||
78 | mfmsr r0 | ||
79 | clrldi r0,r0,1 /* make sure it's in 32-bit mode */ | ||
80 | MTMSRD(r0) | ||
81 | isync | ||
82 | #endif | ||
83 | tophys(r7,0) /* gets -KERNELBASE into r7 */ | 77 | tophys(r7,0) /* gets -KERNELBASE into r7 */ |
84 | #ifdef CONFIG_SMP | 78 | #ifdef CONFIG_SMP |
85 | addis r8,r7,mmu_hash_lock@h | 79 | addis r8,r7,mmu_hash_lock@h |
@@ -303,7 +297,6 @@ Hash_base = 0xc0180000 | |||
303 | Hash_bits = 12 /* e.g. 256kB hash table */ | 297 | Hash_bits = 12 /* e.g. 256kB hash table */ |
304 | Hash_msk = (((1 << Hash_bits) - 1) * 64) | 298 | Hash_msk = (((1 << Hash_bits) - 1) * 64) |
305 | 299 | ||
306 | #ifndef CONFIG_PPC64BRIDGE | ||
307 | /* defines for the PTE format for 32-bit PPCs */ | 300 | /* defines for the PTE format for 32-bit PPCs */ |
308 | #define PTE_SIZE 8 | 301 | #define PTE_SIZE 8 |
309 | #define PTEG_SIZE 64 | 302 | #define PTEG_SIZE 64 |
@@ -317,21 +310,6 @@ Hash_msk = (((1 << Hash_bits) - 1) * 64) | |||
317 | #define SET_V(r) oris r,r,PTE_V@h | 310 | #define SET_V(r) oris r,r,PTE_V@h |
318 | #define CLR_V(r,t) rlwinm r,r,0,1,31 | 311 | #define CLR_V(r,t) rlwinm r,r,0,1,31 |
319 | 312 | ||
320 | #else | ||
321 | /* defines for the PTE format for 64-bit PPCs */ | ||
322 | #define PTE_SIZE 16 | ||
323 | #define PTEG_SIZE 128 | ||
324 | #define LG_PTEG_SIZE 7 | ||
325 | #define LDPTEu ldu | ||
326 | #define STPTE std | ||
327 | #define CMPPTE cmpd | ||
328 | #define PTE_H 2 | ||
329 | #define PTE_V 1 | ||
330 | #define TST_V(r) andi. r,r,PTE_V | ||
331 | #define SET_V(r) ori r,r,PTE_V | ||
332 | #define CLR_V(r,t) li t,PTE_V; andc r,r,t | ||
333 | #endif /* CONFIG_PPC64BRIDGE */ | ||
334 | |||
335 | #define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1) | 313 | #define HASH_LEFT 31-(LG_PTEG_SIZE+Hash_bits-1) |
336 | #define HASH_RIGHT 31-LG_PTEG_SIZE | 314 | #define HASH_RIGHT 31-LG_PTEG_SIZE |
337 | 315 | ||
@@ -349,14 +327,8 @@ BEGIN_FTR_SECTION | |||
349 | END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) | 327 | END_FTR_SECTION_IFSET(CPU_FTR_NEED_COHERENT) |
350 | 328 | ||
351 | /* Construct the high word of the PPC-style PTE (r5) */ | 329 | /* Construct the high word of the PPC-style PTE (r5) */ |
352 | #ifndef CONFIG_PPC64BRIDGE | ||
353 | rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ | 330 | rlwinm r5,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ |
354 | rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */ | 331 | rlwimi r5,r4,10,26,31 /* put in API (abbrev page index) */ |
355 | #else /* CONFIG_PPC64BRIDGE */ | ||
356 | clrlwi r3,r3,8 /* reduce vsid to 24 bits */ | ||
357 | sldi r5,r3,12 /* shift vsid into position */ | ||
358 | rlwimi r5,r4,16,20,24 /* put in API (abbrev page index) */ | ||
359 | #endif /* CONFIG_PPC64BRIDGE */ | ||
360 | SET_V(r5) /* set V (valid) bit */ | 332 | SET_V(r5) /* set V (valid) bit */ |
361 | 333 | ||
362 | /* Get the address of the primary PTE group in the hash table (r3) */ | 334 | /* Get the address of the primary PTE group in the hash table (r3) */ |
@@ -540,14 +512,8 @@ _GLOBAL(flush_hash_pages) | |||
540 | add r3,r3,r0 /* note code below trims to 24 bits */ | 512 | add r3,r3,r0 /* note code below trims to 24 bits */ |
541 | 513 | ||
542 | /* Construct the high word of the PPC-style PTE (r11) */ | 514 | /* Construct the high word of the PPC-style PTE (r11) */ |
543 | #ifndef CONFIG_PPC64BRIDGE | ||
544 | rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ | 515 | rlwinm r11,r3,7,1,24 /* put VSID in 0x7fffff80 bits */ |
545 | rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */ | 516 | rlwimi r11,r4,10,26,31 /* put in API (abbrev page index) */ |
546 | #else /* CONFIG_PPC64BRIDGE */ | ||
547 | clrlwi r3,r3,8 /* reduce vsid to 24 bits */ | ||
548 | sldi r11,r3,12 /* shift vsid into position */ | ||
549 | rlwimi r11,r4,16,20,24 /* put in API (abbrev page index) */ | ||
550 | #endif /* CONFIG_PPC64BRIDGE */ | ||
551 | SET_V(r11) /* set V (valid) bit */ | 517 | SET_V(r11) /* set V (valid) bit */ |
552 | 518 | ||
553 | #ifdef CONFIG_SMP | 519 | #ifdef CONFIG_SMP |