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-rw-r--r--arch/ppc/kernel/misc.S12
1 files changed, 11 insertions, 1 deletions
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 0da55368655c..a22e1f4d94c8 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -237,9 +237,19 @@ _GLOBAL(_tlbie)
237 mfspr r4,SPRN_MMUCR 237 mfspr r4,SPRN_MMUCR
238 mfspr r5,SPRN_PID /* Get PID */ 238 mfspr r5,SPRN_PID /* Get PID */
239 rlwimi r4,r5,0,24,31 /* Set TID */ 239 rlwimi r4,r5,0,24,31 /* Set TID */
240 mtspr SPRN_MMUCR,r4
241 240
241 /* We have to run the search with interrupts disabled, even critical
242 * and debug interrupts (in fact the only critical exceptions we have
243 * are debug and machine check). Otherwise an interrupt which causes
244 * a TLB miss can clobber the MMUCR between the mtspr and the tlbsx. */
245 mfmsr r5
246 lis r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@ha
247 addi r6,r6,(MSR_EE|MSR_CE|MSR_ME|MSR_DE)@l
248 andc r6,r5,r6
249 mtmsr r6
250 mtspr SPRN_MMUCR,r4
242 tlbsx. r3, 0, r3 251 tlbsx. r3, 0, r3
252 mtmsr r5
243 bne 10f 253 bne 10f
244 sync 254 sync
245 /* There are only 64 TLB entries, so r3 < 64, 255 /* There are only 64 TLB entries, so r3 < 64,