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-rw-r--r--arch/ppc/kernel/misc.S235
1 files changed, 39 insertions, 196 deletions
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S
index 90d917d2e856..3056ede2424d 100644
--- a/arch/ppc/kernel/misc.S
+++ b/arch/ppc/kernel/misc.S
@@ -125,9 +125,8 @@ _GLOBAL(identify_cpu)
1251: 1251:
126 addis r6,r3,cur_cpu_spec@ha 126 addis r6,r3,cur_cpu_spec@ha
127 addi r6,r6,cur_cpu_spec@l 127 addi r6,r6,cur_cpu_spec@l
128 slwi r4,r4,2
129 sub r8,r8,r3 128 sub r8,r8,r3
130 stwx r8,r4,r6 129 stw r8,0(r6)
131 blr 130 blr
132 131
133/* 132/*
@@ -186,19 +185,18 @@ _GLOBAL(do_cpu_ftr_fixups)
186 * 185 *
187 * Setup function is called with: 186 * Setup function is called with:
188 * r3 = data offset 187 * r3 = data offset
189 * r4 = CPU number 188 * r4 = ptr to CPU spec (relocated)
190 * r5 = ptr to CPU spec (relocated)
191 */ 189 */
192_GLOBAL(call_setup_cpu) 190_GLOBAL(call_setup_cpu)
193 addis r5,r3,cur_cpu_spec@ha 191 addis r4,r3,cur_cpu_spec@ha
194 addi r5,r5,cur_cpu_spec@l 192 addi r4,r4,cur_cpu_spec@l
195 slwi r4,r24,2 193 lwz r4,0(r4)
196 lwzx r5,r4,r5 194 add r4,r4,r3
195 lwz r5,CPU_SPEC_SETUP(r4)
196 cmpi 0,r5,0
197 add r5,r5,r3 197 add r5,r5,r3
198 lwz r6,CPU_SPEC_SETUP(r5) 198 beqlr
199 add r6,r6,r3 199 mtctr r5
200 mtctr r6
201 mr r4,r24
202 bctr 200 bctr
203 201
204#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx) 202#if defined(CONFIG_CPU_FREQ_PMAC) && defined(CONFIG_6xx)
@@ -273,134 +271,6 @@ _GLOBAL(low_choose_7447a_dfs)
273 271
274#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */ 272#endif /* CONFIG_CPU_FREQ_PMAC && CONFIG_6xx */
275 273
276/* void local_save_flags_ptr(unsigned long *flags) */
277_GLOBAL(local_save_flags_ptr)
278 mfmsr r4
279 stw r4,0(r3)
280 blr
281 /*
282 * Need these nops here for taking over save/restore to
283 * handle lost intrs
284 * -- Cort
285 */
286 nop
287 nop
288 nop
289 nop
290 nop
291 nop
292 nop
293 nop
294 nop
295 nop
296 nop
297 nop
298 nop
299 nop
300 nop
301 nop
302 nop
303_GLOBAL(local_save_flags_ptr_end)
304
305/* void local_irq_restore(unsigned long flags) */
306_GLOBAL(local_irq_restore)
307/*
308 * Just set/clear the MSR_EE bit through restore/flags but do not
309 * change anything else. This is needed by the RT system and makes
310 * sense anyway.
311 * -- Cort
312 */
313 mfmsr r4
314 /* Copy all except the MSR_EE bit from r4 (current MSR value)
315 to r3. This is the sort of thing the rlwimi instruction is
316 designed for. -- paulus. */
317 rlwimi r3,r4,0,17,15
318 /* Check if things are setup the way we want _already_. */
319 cmpw 0,r3,r4
320 beqlr
3211: SYNC
322 mtmsr r3
323 SYNC
324 blr
325 nop
326 nop
327 nop
328 nop
329 nop
330 nop
331 nop
332 nop
333 nop
334 nop
335 nop
336 nop
337 nop
338 nop
339 nop
340 nop
341 nop
342 nop
343 nop
344_GLOBAL(local_irq_restore_end)
345
346_GLOBAL(local_irq_disable)
347 mfmsr r0 /* Get current interrupt state */
348 rlwinm r3,r0,16+1,32-1,31 /* Extract old value of 'EE' */
349 rlwinm r0,r0,0,17,15 /* clear MSR_EE in r0 */
350 SYNC /* Some chip revs have problems here... */
351 mtmsr r0 /* Update machine state */
352 blr /* Done */
353 /*
354 * Need these nops here for taking over save/restore to
355 * handle lost intrs
356 * -- Cort
357 */
358 nop
359 nop
360 nop
361 nop
362 nop
363 nop
364 nop
365 nop
366 nop
367 nop
368 nop
369 nop
370 nop
371 nop
372 nop
373_GLOBAL(local_irq_disable_end)
374
375_GLOBAL(local_irq_enable)
376 mfmsr r3 /* Get current state */
377 ori r3,r3,MSR_EE /* Turn on 'EE' bit */
378 SYNC /* Some chip revs have problems here... */
379 mtmsr r3 /* Update machine state */
380 blr
381 /*
382 * Need these nops here for taking over save/restore to
383 * handle lost intrs
384 * -- Cort
385 */
386 nop
387 nop
388 nop
389 nop
390 nop
391 nop
392 nop
393 nop
394 nop
395 nop
396 nop
397 nop
398 nop
399 nop
400 nop
401 nop
402_GLOBAL(local_irq_enable_end)
403
404/* 274/*
405 * complement mask on the msr then "or" some values on. 275 * complement mask on the msr then "or" some values on.
406 * _nmask_and_or_msr(nmask, value_to_or) 276 * _nmask_and_or_msr(nmask, value_to_or)
@@ -628,21 +498,21 @@ _GLOBAL(flush_icache_range)
628BEGIN_FTR_SECTION 498BEGIN_FTR_SECTION
629 blr /* for 601, do nothing */ 499 blr /* for 601, do nothing */
630END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 500END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
631 li r5,L1_CACHE_LINE_SIZE-1 501 li r5,L1_CACHE_BYTES-1
632 andc r3,r3,r5 502 andc r3,r3,r5
633 subf r4,r3,r4 503 subf r4,r3,r4
634 add r4,r4,r5 504 add r4,r4,r5
635 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 505 srwi. r4,r4,L1_CACHE_SHIFT
636 beqlr 506 beqlr
637 mtctr r4 507 mtctr r4
638 mr r6,r3 508 mr r6,r3
6391: dcbst 0,r3 5091: dcbst 0,r3
640 addi r3,r3,L1_CACHE_LINE_SIZE 510 addi r3,r3,L1_CACHE_BYTES
641 bdnz 1b 511 bdnz 1b
642 sync /* wait for dcbst's to get to ram */ 512 sync /* wait for dcbst's to get to ram */
643 mtctr r4 513 mtctr r4
6442: icbi 0,r6 5142: icbi 0,r6
645 addi r6,r6,L1_CACHE_LINE_SIZE 515 addi r6,r6,L1_CACHE_BYTES
646 bdnz 2b 516 bdnz 2b
647 sync /* additional sync needed on g4 */ 517 sync /* additional sync needed on g4 */
648 isync 518 isync
@@ -655,16 +525,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
655 * clean_dcache_range(unsigned long start, unsigned long stop) 525 * clean_dcache_range(unsigned long start, unsigned long stop)
656 */ 526 */
657_GLOBAL(clean_dcache_range) 527_GLOBAL(clean_dcache_range)
658 li r5,L1_CACHE_LINE_SIZE-1 528 li r5,L1_CACHE_BYTES-1
659 andc r3,r3,r5 529 andc r3,r3,r5
660 subf r4,r3,r4 530 subf r4,r3,r4
661 add r4,r4,r5 531 add r4,r4,r5
662 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 532 srwi. r4,r4,L1_CACHE_SHIFT
663 beqlr 533 beqlr
664 mtctr r4 534 mtctr r4
665 535
6661: dcbst 0,r3 5361: dcbst 0,r3
667 addi r3,r3,L1_CACHE_LINE_SIZE 537 addi r3,r3,L1_CACHE_BYTES
668 bdnz 1b 538 bdnz 1b
669 sync /* wait for dcbst's to get to ram */ 539 sync /* wait for dcbst's to get to ram */
670 blr 540 blr
@@ -676,16 +546,16 @@ _GLOBAL(clean_dcache_range)
676 * flush_dcache_range(unsigned long start, unsigned long stop) 546 * flush_dcache_range(unsigned long start, unsigned long stop)
677 */ 547 */
678_GLOBAL(flush_dcache_range) 548_GLOBAL(flush_dcache_range)
679 li r5,L1_CACHE_LINE_SIZE-1 549 li r5,L1_CACHE_BYTES-1
680 andc r3,r3,r5 550 andc r3,r3,r5
681 subf r4,r3,r4 551 subf r4,r3,r4
682 add r4,r4,r5 552 add r4,r4,r5
683 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 553 srwi. r4,r4,L1_CACHE_SHIFT
684 beqlr 554 beqlr
685 mtctr r4 555 mtctr r4
686 556
6871: dcbf 0,r3 5571: dcbf 0,r3
688 addi r3,r3,L1_CACHE_LINE_SIZE 558 addi r3,r3,L1_CACHE_BYTES
689 bdnz 1b 559 bdnz 1b
690 sync /* wait for dcbst's to get to ram */ 560 sync /* wait for dcbst's to get to ram */
691 blr 561 blr
@@ -698,16 +568,16 @@ _GLOBAL(flush_dcache_range)
698 * invalidate_dcache_range(unsigned long start, unsigned long stop) 568 * invalidate_dcache_range(unsigned long start, unsigned long stop)
699 */ 569 */
700_GLOBAL(invalidate_dcache_range) 570_GLOBAL(invalidate_dcache_range)
701 li r5,L1_CACHE_LINE_SIZE-1 571 li r5,L1_CACHE_BYTES-1
702 andc r3,r3,r5 572 andc r3,r3,r5
703 subf r4,r3,r4 573 subf r4,r3,r4
704 add r4,r4,r5 574 add r4,r4,r5
705 srwi. r4,r4,LG_L1_CACHE_LINE_SIZE 575 srwi. r4,r4,L1_CACHE_SHIFT
706 beqlr 576 beqlr
707 mtctr r4 577 mtctr r4
708 578
7091: dcbi 0,r3 5791: dcbi 0,r3
710 addi r3,r3,L1_CACHE_LINE_SIZE 580 addi r3,r3,L1_CACHE_BYTES
711 bdnz 1b 581 bdnz 1b
712 sync /* wait for dcbi's to get to ram */ 582 sync /* wait for dcbi's to get to ram */
713 blr 583 blr
@@ -728,7 +598,7 @@ _GLOBAL(flush_dcache_all)
728 mtctr r4 598 mtctr r4
729 lis r5, KERNELBASE@h 599 lis r5, KERNELBASE@h
7301: lwz r3, 0(r5) /* Load one word from every line */ 6001: lwz r3, 0(r5) /* Load one word from every line */
731 addi r5, r5, L1_CACHE_LINE_SIZE 601 addi r5, r5, L1_CACHE_BYTES
732 bdnz 1b 602 bdnz 1b
733 blr 603 blr
734#endif /* CONFIG_NOT_COHERENT_CACHE */ 604#endif /* CONFIG_NOT_COHERENT_CACHE */
@@ -746,16 +616,16 @@ BEGIN_FTR_SECTION
746 blr /* for 601, do nothing */ 616 blr /* for 601, do nothing */
747END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE) 617END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
748 rlwinm r3,r3,0,0,19 /* Get page base address */ 618 rlwinm r3,r3,0,0,19 /* Get page base address */
749 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ 619 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
750 mtctr r4 620 mtctr r4
751 mr r6,r3 621 mr r6,r3
7520: dcbst 0,r3 /* Write line to ram */ 6220: dcbst 0,r3 /* Write line to ram */
753 addi r3,r3,L1_CACHE_LINE_SIZE 623 addi r3,r3,L1_CACHE_BYTES
754 bdnz 0b 624 bdnz 0b
755 sync 625 sync
756 mtctr r4 626 mtctr r4
7571: icbi 0,r6 6271: icbi 0,r6
758 addi r6,r6,L1_CACHE_LINE_SIZE 628 addi r6,r6,L1_CACHE_BYTES
759 bdnz 1b 629 bdnz 1b
760 sync 630 sync
761 isync 631 isync
@@ -778,16 +648,16 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
778 mtmsr r0 648 mtmsr r0
779 isync 649 isync
780 rlwinm r3,r3,0,0,19 /* Get page base address */ 650 rlwinm r3,r3,0,0,19 /* Get page base address */
781 li r4,4096/L1_CACHE_LINE_SIZE /* Number of lines in a page */ 651 li r4,4096/L1_CACHE_BYTES /* Number of lines in a page */
782 mtctr r4 652 mtctr r4
783 mr r6,r3 653 mr r6,r3
7840: dcbst 0,r3 /* Write line to ram */ 6540: dcbst 0,r3 /* Write line to ram */
785 addi r3,r3,L1_CACHE_LINE_SIZE 655 addi r3,r3,L1_CACHE_BYTES
786 bdnz 0b 656 bdnz 0b
787 sync 657 sync
788 mtctr r4 658 mtctr r4
7891: icbi 0,r6 6591: icbi 0,r6
790 addi r6,r6,L1_CACHE_LINE_SIZE 660 addi r6,r6,L1_CACHE_BYTES
791 bdnz 1b 661 bdnz 1b
792 sync 662 sync
793 mtmsr r10 /* restore DR */ 663 mtmsr r10 /* restore DR */
@@ -802,7 +672,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_SPLIT_ID_CACHE)
802 * void clear_pages(void *page, int order) ; 672 * void clear_pages(void *page, int order) ;
803 */ 673 */
804_GLOBAL(clear_pages) 674_GLOBAL(clear_pages)
805 li r0,4096/L1_CACHE_LINE_SIZE 675 li r0,4096/L1_CACHE_BYTES
806 slw r0,r0,r4 676 slw r0,r0,r4
807 mtctr r0 677 mtctr r0
808#ifdef CONFIG_8xx 678#ifdef CONFIG_8xx
@@ -814,7 +684,7 @@ _GLOBAL(clear_pages)
814#else 684#else
8151: dcbz 0,r3 6851: dcbz 0,r3
816#endif 686#endif
817 addi r3,r3,L1_CACHE_LINE_SIZE 687 addi r3,r3,L1_CACHE_BYTES
818 bdnz 1b 688 bdnz 1b
819 blr 689 blr
820 690
@@ -840,7 +710,7 @@ _GLOBAL(copy_page)
840 710
841#ifdef CONFIG_8xx 711#ifdef CONFIG_8xx
842 /* don't use prefetch on 8xx */ 712 /* don't use prefetch on 8xx */
843 li r0,4096/L1_CACHE_LINE_SIZE 713 li r0,4096/L1_CACHE_BYTES
844 mtctr r0 714 mtctr r0
8451: COPY_16_BYTES 7151: COPY_16_BYTES
846 bdnz 1b 716 bdnz 1b
@@ -854,13 +724,13 @@ _GLOBAL(copy_page)
854 li r11,4 724 li r11,4
855 mtctr r0 725 mtctr r0
85611: dcbt r11,r4 72611: dcbt r11,r4
857 addi r11,r11,L1_CACHE_LINE_SIZE 727 addi r11,r11,L1_CACHE_BYTES
858 bdnz 11b 728 bdnz 11b
859#else /* MAX_COPY_PREFETCH == 1 */ 729#else /* MAX_COPY_PREFETCH == 1 */
860 dcbt r5,r4 730 dcbt r5,r4
861 li r11,L1_CACHE_LINE_SIZE+4 731 li r11,L1_CACHE_BYTES+4
862#endif /* MAX_COPY_PREFETCH */ 732#endif /* MAX_COPY_PREFETCH */
863 li r0,4096/L1_CACHE_LINE_SIZE - MAX_COPY_PREFETCH 733 li r0,4096/L1_CACHE_BYTES - MAX_COPY_PREFETCH
864 crclr 4*cr0+eq 734 crclr 4*cr0+eq
8652: 7352:
866 mtctr r0 736 mtctr r0
@@ -868,12 +738,12 @@ _GLOBAL(copy_page)
868 dcbt r11,r4 738 dcbt r11,r4
869 dcbz r5,r3 739 dcbz r5,r3
870 COPY_16_BYTES 740 COPY_16_BYTES
871#if L1_CACHE_LINE_SIZE >= 32 741#if L1_CACHE_BYTES >= 32
872 COPY_16_BYTES 742 COPY_16_BYTES
873#if L1_CACHE_LINE_SIZE >= 64 743#if L1_CACHE_BYTES >= 64
874 COPY_16_BYTES 744 COPY_16_BYTES
875 COPY_16_BYTES 745 COPY_16_BYTES
876#if L1_CACHE_LINE_SIZE >= 128 746#if L1_CACHE_BYTES >= 128
877 COPY_16_BYTES 747 COPY_16_BYTES
878 COPY_16_BYTES 748 COPY_16_BYTES
879 COPY_16_BYTES 749 COPY_16_BYTES
@@ -1098,33 +968,6 @@ _GLOBAL(_get_SP)
1098 blr 968 blr
1099 969
1100/* 970/*
1101 * These are used in the alignment trap handler when emulating
1102 * single-precision loads and stores.
1103 * We restore and save the fpscr so the task gets the same result
1104 * and exceptions as if the cpu had performed the load or store.
1105 */
1106
1107#ifdef CONFIG_PPC_FPU
1108_GLOBAL(cvt_fd)
1109 lfd 0,-4(r5) /* load up fpscr value */
1110 mtfsf 0xff,0
1111 lfs 0,0(r3)
1112 stfd 0,0(r4)
1113 mffs 0 /* save new fpscr value */
1114 stfd 0,-4(r5)
1115 blr
1116
1117_GLOBAL(cvt_df)
1118 lfd 0,-4(r5) /* load up fpscr value */
1119 mtfsf 0xff,0
1120 lfd 0,0(r3)
1121 stfs 0,0(r4)
1122 mffs 0 /* save new fpscr value */
1123 stfd 0,-4(r5)
1124 blr
1125#endif
1126
1127/*
1128 * Create a kernel thread 971 * Create a kernel thread
1129 * kernel_thread(fn, arg, flags) 972 * kernel_thread(fn, arg, flags)
1130 */ 973 */
generated by cgit v1.2.2 (git 2.25.0) at 2025-03-10 16:13:04 -0400