diff options
Diffstat (limited to 'arch/ppc/kernel/misc.S')
-rw-r--r-- | arch/ppc/kernel/misc.S | 46 |
1 files changed, 2 insertions, 44 deletions
diff --git a/arch/ppc/kernel/misc.S b/arch/ppc/kernel/misc.S index e0c850d85c53..d5e0dfc9ffec 100644 --- a/arch/ppc/kernel/misc.S +++ b/arch/ppc/kernel/misc.S | |||
@@ -165,24 +165,7 @@ _GLOBAL(_tlbia) | |||
165 | ble 1b | 165 | ble 1b |
166 | 166 | ||
167 | isync | 167 | isync |
168 | #elif defined(CONFIG_FSL_BOOKE) | 168 | #else /* !(CONFIG_40x || CONFIG_44x) */ |
169 | /* Invalidate all entries in TLB0 */ | ||
170 | li r3, 0x04 | ||
171 | tlbivax 0,3 | ||
172 | /* Invalidate all entries in TLB1 */ | ||
173 | li r3, 0x0c | ||
174 | tlbivax 0,3 | ||
175 | /* Invalidate all entries in TLB2 */ | ||
176 | li r3, 0x14 | ||
177 | tlbivax 0,3 | ||
178 | /* Invalidate all entries in TLB3 */ | ||
179 | li r3, 0x1c | ||
180 | tlbivax 0,3 | ||
181 | msync | ||
182 | #ifdef CONFIG_SMP | ||
183 | tlbsync | ||
184 | #endif /* CONFIG_SMP */ | ||
185 | #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */ | ||
186 | #if defined(CONFIG_SMP) | 169 | #if defined(CONFIG_SMP) |
187 | rlwinm r8,r1,0,0,18 | 170 | rlwinm r8,r1,0,0,18 |
188 | lwz r8,TI_CPU(r8) | 171 | lwz r8,TI_CPU(r8) |
@@ -268,20 +251,7 @@ _GLOBAL(_tlbie) | |||
268 | tlbwe r3, r3, PPC44x_TLB_PAGEID | 251 | tlbwe r3, r3, PPC44x_TLB_PAGEID |
269 | isync | 252 | isync |
270 | 10: | 253 | 10: |
271 | #elif defined(CONFIG_FSL_BOOKE) | 254 | #else /* !(CONFIG_40x || CONFIG_44x) */ |
272 | rlwinm r4, r3, 0, 0, 19 | ||
273 | ori r5, r4, 0x08 /* TLBSEL = 1 */ | ||
274 | ori r6, r4, 0x10 /* TLBSEL = 2 */ | ||
275 | ori r7, r4, 0x18 /* TLBSEL = 3 */ | ||
276 | tlbivax 0, r4 | ||
277 | tlbivax 0, r5 | ||
278 | tlbivax 0, r6 | ||
279 | tlbivax 0, r7 | ||
280 | msync | ||
281 | #if defined(CONFIG_SMP) | ||
282 | tlbsync | ||
283 | #endif /* CONFIG_SMP */ | ||
284 | #else /* !(CONFIG_40x || CONFIG_44x || CONFIG_FSL_BOOKE) */ | ||
285 | #if defined(CONFIG_SMP) | 255 | #if defined(CONFIG_SMP) |
286 | rlwinm r8,r1,0,0,18 | 256 | rlwinm r8,r1,0,0,18 |
287 | lwz r8,TI_CPU(r8) | 257 | lwz r8,TI_CPU(r8) |
@@ -338,18 +308,6 @@ _GLOBAL(flush_instruction_cache) | |||
338 | lis r3, KERNELBASE@h | 308 | lis r3, KERNELBASE@h |
339 | iccci 0,r3 | 309 | iccci 0,r3 |
340 | #endif | 310 | #endif |
341 | #elif CONFIG_FSL_BOOKE | ||
342 | BEGIN_FTR_SECTION | ||
343 | mfspr r3,SPRN_L1CSR0 | ||
344 | ori r3,r3,L1CSR0_CFI|L1CSR0_CLFC | ||
345 | /* msync; isync recommended here */ | ||
346 | mtspr SPRN_L1CSR0,r3 | ||
347 | isync | ||
348 | blr | ||
349 | END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE) | ||
350 | mfspr r3,SPRN_L1CSR1 | ||
351 | ori r3,r3,L1CSR1_ICFI|L1CSR1_ICLFR | ||
352 | mtspr SPRN_L1CSR1,r3 | ||
353 | #else | 311 | #else |
354 | mfspr r3,SPRN_PVR | 312 | mfspr r3,SPRN_PVR |
355 | rlwinm r3,r3,16,16,31 | 313 | rlwinm r3,r3,16,16,31 |