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-rw-r--r--arch/ppc/kernel/cputable.c76
1 files changed, 63 insertions, 13 deletions
diff --git a/arch/ppc/kernel/cputable.c b/arch/ppc/kernel/cputable.c
index 8a3d74f2531e..546e1ea4cafa 100644
--- a/arch/ppc/kernel/cputable.c
+++ b/arch/ppc/kernel/cputable.c
@@ -198,10 +198,10 @@ struct cpu_spec cpu_specs[] = {
198 .num_pmcs = 4, 198 .num_pmcs = 4,
199 .cpu_setup = __setup_cpu_750 199 .cpu_setup = __setup_cpu_750
200 }, 200 },
201 { /* 745/755 */ 201 { /* 750CX (80100 and 8010x?) */
202 .pvr_mask = 0xfffff000, 202 .pvr_mask = 0xfffffff0,
203 .pvr_value = 0x00083000, 203 .pvr_value = 0x00080100,
204 .cpu_name = "745/755", 204 .cpu_name = "750CX",
205 .cpu_features = CPU_FTR_COMMON | 205 .cpu_features = CPU_FTR_COMMON |
206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 206 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | 207 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
@@ -210,11 +210,11 @@ struct cpu_spec cpu_specs[] = {
210 .icache_bsize = 32, 210 .icache_bsize = 32,
211 .dcache_bsize = 32, 211 .dcache_bsize = 32,
212 .num_pmcs = 4, 212 .num_pmcs = 4,
213 .cpu_setup = __setup_cpu_750 213 .cpu_setup = __setup_cpu_750cx
214 }, 214 },
215 { /* 750CX (80100 and 8010x?) */ 215 { /* 750CX (82201 and 82202) */
216 .pvr_mask = 0xfffffff0, 216 .pvr_mask = 0xfffffff0,
217 .pvr_value = 0x00080100, 217 .pvr_value = 0x00082200,
218 .cpu_name = "750CX", 218 .cpu_name = "750CX",
219 .cpu_features = CPU_FTR_COMMON | 219 .cpu_features = CPU_FTR_COMMON |
220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 220 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
@@ -226,10 +226,10 @@ struct cpu_spec cpu_specs[] = {
226 .num_pmcs = 4, 226 .num_pmcs = 4,
227 .cpu_setup = __setup_cpu_750cx 227 .cpu_setup = __setup_cpu_750cx
228 }, 228 },
229 { /* 750CX (82201 and 82202) */ 229 { /* 750CXe (82214) */
230 .pvr_mask = 0xfffffff0, 230 .pvr_mask = 0xfffffff0,
231 .pvr_value = 0x00082200, 231 .pvr_value = 0x00082210,
232 .cpu_name = "750CX", 232 .cpu_name = "750CXe",
233 .cpu_features = CPU_FTR_COMMON | 233 .cpu_features = CPU_FTR_COMMON |
234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 234 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU | 235 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
@@ -240,9 +240,9 @@ struct cpu_spec cpu_specs[] = {
240 .num_pmcs = 4, 240 .num_pmcs = 4,
241 .cpu_setup = __setup_cpu_750cx 241 .cpu_setup = __setup_cpu_750cx
242 }, 242 },
243 { /* 750CXe (82214) */ 243 { /* 750CXe "Gekko" (83214) */
244 .pvr_mask = 0xfffffff0, 244 .pvr_mask = 0xffffffff,
245 .pvr_value = 0x00082210, 245 .pvr_value = 0x00083214,
246 .cpu_name = "750CXe", 246 .cpu_name = "750CXe",
247 .cpu_features = CPU_FTR_COMMON | 247 .cpu_features = CPU_FTR_COMMON |
248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE | 248 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
@@ -254,6 +254,20 @@ struct cpu_spec cpu_specs[] = {
254 .num_pmcs = 4, 254 .num_pmcs = 4,
255 .cpu_setup = __setup_cpu_750cx 255 .cpu_setup = __setup_cpu_750cx
256 }, 256 },
257 { /* 745/755 */
258 .pvr_mask = 0xfffff000,
259 .pvr_value = 0x00083000,
260 .cpu_name = "745/755",
261 .cpu_features = CPU_FTR_COMMON |
262 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_MAYBE_CAN_DOZE |
263 CPU_FTR_USE_TB | CPU_FTR_L2CR | CPU_FTR_TAU |
264 CPU_FTR_HPTE_TABLE | CPU_FTR_MAYBE_CAN_NAP,
265 .cpu_user_features = COMMON_PPC,
266 .icache_bsize = 32,
267 .dcache_bsize = 32,
268 .num_pmcs = 4,
269 .cpu_setup = __setup_cpu_750
270 },
257 { /* 750FX rev 1.x */ 271 { /* 750FX rev 1.x */
258 .pvr_mask = 0xffffff00, 272 .pvr_mask = 0xffffff00,
259 .pvr_value = 0x70000100, 273 .pvr_value = 0x70000100,
@@ -536,6 +550,22 @@ struct cpu_spec cpu_specs[] = {
536 .num_pmcs = 6, 550 .num_pmcs = 6,
537 .cpu_setup = __setup_cpu_745x 551 .cpu_setup = __setup_cpu_745x
538 }, 552 },
553 { /* 7448 */
554 .pvr_mask = 0xffff0000,
555 .pvr_value = 0x80040000,
556 .cpu_name = "7448",
557 .cpu_features = CPU_FTR_COMMON |
558 CPU_FTR_SPLIT_ID_CACHE | CPU_FTR_USE_TB |
559 CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_L2CR |
560 CPU_FTR_ALTIVEC_COMP | CPU_FTR_HPTE_TABLE |
561 CPU_FTR_SPEC7450 | CPU_FTR_NAP_DISABLE_L2_PR |
562 CPU_FTR_HAS_HIGH_BATS | CPU_FTR_NEED_COHERENT,
563 .cpu_user_features = COMMON_PPC | PPC_FEATURE_ALTIVEC_COMP,
564 .icache_bsize = 32,
565 .dcache_bsize = 32,
566 .num_pmcs = 6,
567 .cpu_setup = __setup_cpu_745x
568 },
539 { /* 82xx (8240, 8245, 8260 are all 603e cores) */ 569 { /* 82xx (8240, 8245, 8260 are all 603e cores) */
540 .pvr_mask = 0x7fff0000, 570 .pvr_mask = 0x7fff0000,
541 .pvr_value = 0x00810000, 571 .pvr_value = 0x00810000,
@@ -922,6 +952,26 @@ struct cpu_spec cpu_specs[] = {
922 .icache_bsize = 32, 952 .icache_bsize = 32,
923 .dcache_bsize = 32, 953 .dcache_bsize = 32,
924 }, 954 },
955 { /* 440GX Rev. F */
956 .pvr_mask = 0xf0000fff,
957 .pvr_value = 0x50000894,
958 .cpu_name = "440GX Rev. F",
959 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
960 CPU_FTR_USE_TB,
961 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
962 .icache_bsize = 32,
963 .dcache_bsize = 32,
964 },
965 { /* 440SP Rev. A */
966 .pvr_mask = 0xff000fff,
967 .pvr_value = 0x53000891,
968 .cpu_name = "440SP Rev. A",
969 .cpu_features = CPU_FTR_SPLIT_ID_CACHE |
970 CPU_FTR_USE_TB,
971 .cpu_user_features = PPC_FEATURE_32 | PPC_FEATURE_HAS_MMU,
972 .icache_bsize = 32,
973 .dcache_bsize = 32,
974 },
925#endif /* CONFIG_44x */ 975#endif /* CONFIG_44x */
926#ifdef CONFIG_FSL_BOOKE 976#ifdef CONFIG_FSL_BOOKE
927 { /* e200z5 */ 977 { /* e200z5 */
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