165 files changed, 4664 insertions, 3028 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 050cb371a69e..9a5d3cdc3e12 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -653,7 +653,7 @@ config SBUS
 config FSL_SOC
        bool
        select HAVE_CAN_FLEXCAN if NET && CAN
-        select PPC_CLOCK if CAN_FLEXCAN
+        select PPC_CLOCK
 config FSL_PCI
        bool
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index e5f26890a69e..5416e28a7538 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -331,4 +331,13 @@ config STRICT_DEVMEM
          If you are unsure, say Y.
+config FAIL_IOMMU
+        bool "Fault-injection capability for IOMMU"
+        depends on FAULT_INJECTION
+        help
+          Provide fault-injection capability for IOMMU. Each device can
+          be selectively enabled via the fail_iommu property.
+          If you are unsure, say N.
 endmenu
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index e8461cb18d04..b7d833382be4 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -62,26 +62,45 @@ libfdtheader := fdt.h libfdt.h libfdt_internal.h
 $(addprefix $(obj)/,$(libfdt) libfdt-wrapper.o simpleboot.o epapr.o): \
        $(addprefix $(obj)/,$(libfdtheader))
-src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
+src-wlib-y := string.S crt0.S crtsavres.S stdio.c main.c \
                $(libfdt) libfdt-wrapper.c \
                ns16550.c serial.c simple_alloc.c div64.S util.S \
-                gunzip_util.c elf_util.c $(zlib) devtree.c oflib.c ofconsole.c \
+                gunzip_util.c elf_util.c $(zlib) devtree.c stdlib.c \
-                4xx.c ebony.c mv64x60.c mpsc.c mv64x60_i2c.c cuboot.c bamboo.c \
+                oflib.c ofconsole.c cuboot.c mpsc.c cpm-serial.c \
-                cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
+                uartlite.c mpc52xx-psc.c
-                fsl-soc.c mpc8xx.c pq2.c ugecon.c
+src-wlib-$(CONFIG_40x) += 4xx.c planetcore.c
-src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
+src-wlib-$(CONFIG_44x) += 4xx.c ebony.c bamboo.c
-                cuboot-ebony.c cuboot-hotfoot.c epapr.c treeboot-ebony.c \
+src-wlib-$(CONFIG_8xx) += mpc8xx.c planetcore.c
-                prpmc2800.c \
+src-wlib-$(CONFIG_PPC_82xx) += pq2.c fsl-soc.c planetcore.c
-                ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
+src-wlib-$(CONFIG_EMBEDDED6xx) += mv64x60.c mv64x60_i2c.c ugecon.c
-                cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
-                cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
+src-plat-y := of.c
-                fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
+src-plat-$(CONFIG_40x) += fixed-head.S ep405.c cuboot-hotfoot.c \
-                cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
+                                treeboot-walnut.c cuboot-acadia.c \
-                cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
+                                cuboot-kilauea.c simpleboot.c \
-                virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c \
+                                virtex405-head.S virtex.c
-                cuboot-acadia.c cuboot-amigaone.c cuboot-kilauea.c \
+src-plat-$(CONFIG_44x) += treeboot-ebony.c cuboot-ebony.c treeboot-bamboo.c \
-                gamecube-head.S gamecube.c wii-head.S wii.c treeboot-iss4xx.c \
+                                cuboot-bamboo.c cuboot-sam440ep.c \
-                treeboot-currituck.c
+                                cuboot-sequoia.c cuboot-rainier.c \
+                                cuboot-taishan.c cuboot-katmai.c \
+                                cuboot-warp.c cuboot-yosemite.c \
+                                treeboot-iss4xx.c treeboot-currituck.c \
+                                simpleboot.c fixed-head.S virtex.c
+src-plat-$(CONFIG_8xx) += cuboot-8xx.c fixed-head.S ep88xc.c redboot-8xx.c
+src-plat-$(CONFIG_PPC_MPC52xx) += cuboot-52xx.c
+src-plat-$(CONFIG_PPC_82xx) += cuboot-pq2.c fixed-head.S ep8248e.c cuboot-824x.c
+src-plat-$(CONFIG_PPC_83xx) += cuboot-83xx.c fixed-head.S redboot-83xx.c
+src-plat-$(CONFIG_FSL_SOC_BOOKE) += cuboot-85xx.c cuboot-85xx-cpm2.c
+src-plat-$(CONFIG_EMBEDDED6xx) += cuboot-pq2.c cuboot-mpc7448hpc2.c \
+                                        cuboot-c2k.c gamecube-head.S \
+                                        gamecube.c wii-head.S wii.c holly.c \
+                                        prpmc2800.c
+src-plat-$(CONFIG_AMIGAONE) += cuboot-amigaone.c
+src-plat-$(CONFIG_PPC_PS3) += ps3-head.S ps3-hvcall.S ps3.c
+src-plat-$(CONFIG_EPAPR_BOOT) += epapr.c
+src-wlib := $(sort $(src-wlib-y))
+src-plat := $(sort $(src-plat-y))
 src-boot := $(src-wlib) $(src-plat) empty.c
 src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -257,7 +276,6 @@ image-$(CONFIG_TQM8548)			+= cuImage.tqm8548
 image-$(CONFIG_TQM8555)                 += cuImage.tqm8555
 image-$(CONFIG_TQM8560)                 += cuImage.tqm8560
 image-$(CONFIG_SBC8548)                 += cuImage.sbc8548
-image-$(CONFIG_SBC8560)                 += cuImage.sbc8560
 image-$(CONFIG_KSI8560)                 += cuImage.ksi8560
 # Board ports in arch/powerpc/platform/embedded6xx/Kconfig
@@ -412,4 +430,3 @@ $(wrapper-installed): $(DESTDIR)$(WRAPPER_BINDIR) $(srctree)/$(obj)/wrapper | $(
        $(call cmd,install_wrapper)
 $(obj)/bootwrapper_install: $(all-installed)
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dts b/arch/powerpc/boot/dts/bsc9131rdb.dts
new file mode 100644
index 000000000000..e13d2d4877b0
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dts
@@ -0,0 +1,34 @@
+/*
+ * BSC9131 RDB Device Tree Source
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/include/ "fsl/bsc9131si-pre.dtsi"
+/ {
+        model = "fsl,bsc9131rdb";
+        compatible = "fsl,bsc9131rdb";
+        memory {
+                device_type = "memory";
+        };
+        board_ifc: ifc: ifc@ff71e000 {
+                /* NAND Flash on board */
+                ranges = <0x0 0x0 0x0 0xff800000 0x00004000>;
+                reg = <0x0 0xff71e000 0x0 0x2000>;
+        };
+        board_soc: soc: soc@ff700000 {
+                ranges = <0x0 0x0 0xff700000 0x100000>;
+        };
+};
+/include/ "bsc9131rdb.dtsi"
+/include/ "fsl/bsc9131si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/bsc9131rdb.dtsi b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
new file mode 100644
index 000000000000..638adda2c218
--- /dev/null
+++ b/arch/powerpc/boot/dts/bsc9131rdb.dtsi
@@ -0,0 +1,142 @@
+/*
+ * BSC9131 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+&board_ifc {
+        nand@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,ifc-nand";
+                reg = <0x0 0x0 0x4000>;
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 3MB for u-boot Bootloader Image */
+                        reg = <0x0 0x00300000>;
+                        label = "NAND U-Boot Image";
+                        read-only;
+                };
+                partition@300000 {
+                        /* 1MB for DTB Image */
+                        reg = <0x00300000 0x00100000>;
+                        label = "NAND DTB Image";
+                };
+                partition@400000 {
+                        /* 8MB for Linux Kernel Image */
+                        reg = <0x00400000 0x00800000>;
+                        label = "NAND Linux Kernel Image";
+                };
+                partition@c00000 {
+                        /* Rest space for Root file System Image */
+                        reg = <0x00c00000 0x07400000>;
+                        label = "NAND RFS Image";
+                };
+        };
+};
+&board_soc {
+        /* BSC9131RDB does not have any device on i2c@3100 */
+        i2c@3100 {
+                status = "disabled";
+        };
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,s25sl12801";
+                        reg = <0>;
+                        spi-max-frequency = <50000000>;
+                        /* 512KB for u-boot Bootloader Image */
+                        partition@0 {
+                                reg = <0x0 0x00080000>;
+                                label = "SPI Flash U-Boot Image";
+                                read-only;
+                        };
+                        /* 512KB for DTB Image */
+                        partition@80000 {
+                                reg = <0x00080000 0x00080000>;
+                                label = "SPI Flash DTB Image";
+                        };
+                        /* 4MB for Linux Kernel Image */
+                        partition@100000 {
+                                reg = <0x00100000 0x00400000>;
+                                label = "SPI Flash Kernel Image";
+                        };
+                        /*11MB for RFS Image */
+                        partition@500000 {
+                                reg = <0x00500000 0x00B00000>;
+                                label = "SPI Flash RFS Image";
+                        };
+                };
+        };
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x0>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x3>;
+                };
+        };
+        sdhci@2e000 {
+                status = "disabled";
+        };
+        enet0: ethernet@b0000 {
+                phy-handle = <&phy0>;
+                phy-connection-type = "rgmii-id";
+        };
+        enet1: ethernet@b1000 {
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
new file mode 100644
index 000000000000..5180d9d37989
--- /dev/null
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-post.dtsi
@@ -0,0 +1,193 @@
+/*
+ * BSC9131 Silicon/SoC Device Tree Source (post include)
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+&ifc {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        compatible = "fsl,ifc", "simple-bus";
+        interrupts = <16 2 0 0 20 2 0 0>;
+};
+&soc {
+        #address-cells = <1>;
+        #size-cells = <1>;
+        device_type = "soc";
+        compatible = "fsl,bsc9131-immr", "simple-bus";
+        bus-frequency = <0>;            // Filled out by uboot.
+        ecm-law@0 {
+                compatible = "fsl,ecm-law";
+                reg = <0x0 0x1000>;
+                fsl,num-laws = <12>;
+        };
+        ecm@1000 {
+                compatible = "fsl,bsc9131-ecm", "fsl,ecm";
+                reg = <0x1000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+        memory-controller@2000 {
+                compatible = "fsl,bsc9131-memory-controller";
+                reg = <0x2000 0x1000>;
+                interrupts = <16 2 0 0>;
+        };
+/include/ "pq3-i2c-0.dtsi"
+        i2c@3000 {
+                interrupts = <17 2 0 0>;
+        };
+/include/ "pq3-i2c-1.dtsi"
+        i2c@3100 {
+                interrupts = <17 2 0 0>;
+        };
+/include/ "pq3-duart-0.dtsi"
+        serial0: serial@4500 {
+                interrupts = <18 2 0 0>;
+        };
+        serial1: serial@4600 {
+                interrupts = <18 2 0 0 >;
+        };
+/include/ "pq3-espi-0.dtsi"
+        spi0: spi@7000 {
+                fsl,espi-num-chipselects = <1>;
+                interrupts = <22 0x2 0 0>;
+        };
+/include/ "pq3-gpio-0.dtsi"
+        gpio-controller@f000 {
+                interrupts = <19 0x2 0 0>;
+                };
+        L2: l2-cache-controller@20000 {
+                compatible = "fsl,bsc9131-l2-cache-controller";
+                reg = <0x20000 0x1000>;
+                cache-line-size = <32>; // 32 bytes
+                cache-size = <0x40000>; // L2,256K
+                interrupts = <16 2 0 0>;
+        };
+/include/ "pq3-dma-0.dtsi"
+dma@21300 {
+        dma-channel@0 {
+                interrupts = <62 2 0 0>;
+        };
+        dma-channel@80 {
+                interrupts = <63 2 0 0>;
+        };
+        dma-channel@100 {
+                interrupts = <64 2 0 0>;
+        };
+        dma-channel@180 {
+                interrupts = <65 2 0 0>;
+        };
+};
+/include/ "pq3-usb2-dr-0.dtsi"
+usb@22000 {
+        compatible = "fsl-usb2-dr","fsl-usb2-dr-v2.2";
+        interrupts = <40 0x2 0 0>;
+};
+/include/ "pq3-esdhc-0.dtsi"
+        sdhc@2e000 {
+                fsl,sdhci-auto-cmd12;
+                interrupts = <41 0x2 0 0>;
+        };
+/include/ "pq3-sec4.4-0.dtsi"
+crypto@30000 {
+        interrupts       = <57 2 0 0>;
+        sec_jr0: jr@1000 {
+                interrupts       = <58 2 0 0>;
+        };
+        sec_jr1: jr@2000 {
+                interrupts       = <59 2 0 0>;
+        };
+        sec_jr2: jr@3000 {
+                interrupts       = <60 2 0 0>;
+        };
+        sec_jr3: jr@4000 {
+                interrupts       = <61 2 0 0>;
+        };
+};
+/include/ "pq3-mpic.dtsi"
+timer@41100 {
+        compatible = "fsl,mpic-v1.2-msgr", "fsl,mpic-msg";
+        reg = <0x41400 0x200>;
+        interrupts = <
+                0xb0 2
+                0xb1 2
+                0xb2 2
+                0xb3 2>;
+};
+/include/ "pq3-etsec2-0.dtsi"
+enet0: ethernet@b0000 {
+        queue-group@b0000 {
+                fsl,rx-bit-map = <0xff>;
+                fsl,tx-bit-map = <0xff>;
+                interrupts = <26 2 0 0 27 2 0 0 28 2 0 0>;
+        };
+};
+/include/ "pq3-etsec2-1.dtsi"
+enet1: ethernet@b1000 {
+        queue-group@b1000 {
+                fsl,rx-bit-map = <0xff>;
+                fsl,tx-bit-map = <0xff>;
+                interrupts = <33 2 0 0 34 2 0 0 35 2 0 0>;
+        };
+};
+global-utilities@e0000 {
+                compatible = "fsl,bsc9131-guts";
+                reg = <0xe0000 0x1000>;
+                fsl,has-rstcr;
+        };
+};
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
index 00c8e70e7b90..743e4aeda349 100644
--- a/arch/powerpc/boot/dts/fsl/p3060si-pre.dtsi
+++ b/arch/powerpc/boot/dts/fsl/bsc9131si-pre.dtsi
@@ -1,7 +1,7 @@
 /*
- * P3060 Silicon/SoC Device Tree Source (pre include)
+ * BSC9131 Silicon/SoC Device Tree Source (pre include)
 *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
@@ -34,92 +34,26 @@
 /dts-v1/;
 / {
-        compatible = "fsl,P3060";
+        compatible = "fsl,BSC9131";
        #address-cells = <2>;
        #size-cells = <2>;
        interrupt-parent = <&mpic>;
        aliases {
-                ccsr = &soc;
-                dcsr = &dcsr;
                serial0 = &serial0;
-                serial1 = &serial1;
+                ethernet0 = &enet0;
-                serial2 = &serial2;
+                ethernet1 = &enet1;
-                serial3 = &serial3;
-                pci0 = &pci0;
-                pci1 = &pci1;
-                usb0 = &usb0;
-                usb1 = &usb1;
-                dma0 = &dma0;
-                dma1 = &dma1;
-                msi0 = &msi0;
-                msi1 = &msi1;
-                msi2 = &msi2;
-                crypto = &crypto;
-                sec_jr0 = &sec_jr0;
-                sec_jr1 = &sec_jr1;
-                sec_jr2 = &sec_jr2;
-                sec_jr3 = &sec_jr3;
-                rtic_a = &rtic_a;
-                rtic_b = &rtic_b;
-                rtic_c = &rtic_c;
-                rtic_d = &rtic_d;
-                sec_mon = &sec_mon;
        };
        cpus {
                #address-cells = <1>;
                #size-cells = <0>;
-                cpu0: PowerPC,e500mc@0 {
+                PowerPC,BSC9131@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        next-level-cache = <&L2_0>;
-                        L2_0: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu1: PowerPC,e500mc@1 {
-                        device_type = "cpu";
-                        reg = <1>;
-                        next-level-cache = <&L2_1>;
-                        L2_1: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu4: PowerPC,e500mc@4 {
-                        device_type = "cpu";
-                        reg = <4>;
-                        next-level-cache = <&L2_4>;
-                        L2_4: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu5: PowerPC,e500mc@5 {
-                        device_type = "cpu";
-                        reg = <5>;
-                        next-level-cache = <&L2_5>;
-                        L2_5: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu6: PowerPC,e500mc@6 {
-                        device_type = "cpu";
-                        reg = <6>;
-                        next-level-cache = <&L2_6>;
-                        L2_6: l2-cache {
-                                next-level-cache = <&cpc>;
-                        };
-                };
-                cpu7: PowerPC,e500mc@7 {
                        device_type = "cpu";
-                        reg = <7>;
+                        compatible = "fsl,e500v2";
-                        next-level-cache = <&L2_7>;
+                        reg = <0x0>;
-                        L2_7: l2-cache {
+                        next-level-cache = <&L2>;
-                                next-level-cache = <&cpc>;
-                        };
                };
        };
 };
diff --git a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
index 4252ef85fb7a..adb82fd9057f 100644
--- a/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
+++ b/arch/powerpc/boot/dts/fsl/p1021si-post.dtsi
@@ -1,7 +1,7 @@
 /*
 * P1021/P1012 Silicon/SoC Device Tree Source (post include)
 *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
@@ -213,6 +213,20 @@
                interrupt-parent = <&qeic>;
        };
+        ucc@2600 {
+                cell-index = <7>;
+                reg = <0x2600 0x200>;
+                interrupts = <42>;
+                interrupt-parent = <&qeic>;
+        };
+        ucc@2200 {
+                cell-index = <3>;
+                reg = <0x2200 0x200>;
+                interrupts = <34>;
+                interrupt-parent = <&qeic>;
+        };
        muram@10000 {
                #address-cells = <1>;
                #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi b/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
deleted file mode 100644
index b3e56929eee2..000000000000
--- a/arch/powerpc/boot/dts/fsl/p3060si-post.dtsi
+++ /dev/null
@@ -1,302 +0,0 @@
-/*
- * P3060 Silicon/SoC Device Tree Source (post include)
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-&lbc {
-        compatible = "fsl,p3060-elbc", "fsl,elbc", "simple-bus";
-        interrupts = <25 2 0 0>;
-        #address-cells = <2>;
-        #size-cells = <1>;
-};
-/* controller at 0x200000 */
-&pci0 {
-        compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
-        device_type = "pci";
-        #size-cells = <2>;
-        #address-cells = <3>;
-        bus-range = <0x0 0xff>;
-        clock-frequency = <33333333>;
-        interrupts = <16 2 1 15>;
-        pcie@0 {
-                reg = <0 0 0 0 0>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                interrupts = <16 2 1 15>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 40 1 0 0
-                        0000 0 0 2 &mpic 1 1 0 0
-                        0000 0 0 3 &mpic 2 1 0 0
-                        0000 0 0 4 &mpic 3 1 0 0
-                        >;
-        };
-};
-/* controller at 0x201000 */
-&pci1 {
-        compatible = "fsl,p3060-pcie", "fsl,qoriq-pcie-v2.2";
-        device_type = "pci";
-        #size-cells = <2>;
-        #address-cells = <3>;
-        bus-range = <0 0xff>;
-        clock-frequency = <33333333>;
-        interrupts = <16 2 1 14>;
-        pcie@0 {
-                reg = <0 0 0 0 0>;
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                interrupts = <16 2 1 14>;
-                interrupt-map-mask = <0xf800 0 0 7>;
-                interrupt-map = <
-                        /* IDSEL 0x0 */
-                        0000 0 0 1 &mpic 41 1 0 0
-                        0000 0 0 2 &mpic 5 1 0 0
-                        0000 0 0 3 &mpic 6 1 0 0
-                        0000 0 0 4 &mpic 7 1 0 0
-                        >;
-        };
-};
-&rio {
-        compatible = "fsl,srio";
-        interrupts = <16 2 1 11>;
-        #address-cells = <2>;
-        #size-cells = <2>;
-        fsl,srio-rmu-handle = <&rmu>;
-        ranges;
-        port1 {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                cell-index = <1>;
-        };
-        port2 {
-                #address-cells = <2>;
-                #size-cells = <2>;
-                cell-index = <2>;
-        };
-};
-&dcsr {
-        #address-cells = <1>;
-        #size-cells = <1>;
-        compatible = "fsl,dcsr", "simple-bus";
-        dcsr-epu@0 {
-                compatible = "fsl,dcsr-epu";
-                interrupts = <52 2 0 0
-                              84 2 0 0
-                              85 2 0 0>;
-                reg = <0x0 0x1000>;
-        };
-        dcsr-npc {
-                compatible = "fsl,dcsr-npc";
-                reg = <0x1000 0x1000 0x1000000 0x8000>;
-        };
-        dcsr-nxc@2000 {
-                compatible = "fsl,dcsr-nxc";
-                reg = <0x2000 0x1000>;
-        };
-        dcsr-corenet {
-                compatible = "fsl,dcsr-corenet";
-                reg = <0x8000 0x1000 0xB0000 0x1000>;
-        };
-        dcsr-dpaa@9000 {
-                compatible = "fsl,p3060-dcsr-dpaa", "fsl,dcsr-dpaa";
-                reg = <0x9000 0x1000>;
-        };
-        dcsr-ocn@11000 {
-                compatible = "fsl,p3060-dcsr-ocn", "fsl,dcsr-ocn";
-                reg = <0x11000 0x1000>;
-        };
-        dcsr-ddr@12000 {
-                compatible = "fsl,dcsr-ddr";
-                dev-handle = <&ddr1>;
-                reg = <0x12000 0x1000>;
-        };
-        dcsr-nal@18000 {
-                compatible = "fsl,p3060-dcsr-nal", "fsl,dcsr-nal";
-                reg = <0x18000 0x1000>;
-        };
-        dcsr-rcpm@22000 {
-                compatible = "fsl,p3060-dcsr-rcpm", "fsl,dcsr-rcpm";
-                reg = <0x22000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@40000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu0>;
-                reg = <0x40000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@41000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu1>;
-                reg = <0x41000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@44000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu4>;
-                reg = <0x44000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@45000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu5>;
-                reg = <0x45000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@46000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu6>;
-                reg = <0x46000 0x1000>;
-        };
-        dcsr-cpu-sb-proxy@47000 {
-                compatible = "fsl,dcsr-e500mc-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
-                cpu-handle = <&cpu7>;
-                reg = <0x47000 0x1000>;
-        };
-};
-&soc {
-        #address-cells = <1>;
-        #size-cells = <1>;
-        device_type = "soc";
-        compatible = "simple-bus";
-        soc-sram-error {
-                compatible = "fsl,soc-sram-error";
-                interrupts = <16 2 1 29>;
-        };
-        corenet-law@0 {
-                compatible = "fsl,corenet-law";
-                reg = <0x0 0x1000>;
-                fsl,num-laws = <32>;
-        };
-        ddr1: memory-controller@8000 {
-                compatible = "fsl,qoriq-memory-controller-v4.4", "fsl,qoriq-memory-controller";
-                reg = <0x8000 0x1000>;
-                interrupts = <16 2 1 23>;
-        };
-        cpc: l3-cache-controller@10000 {
-                compatible = "fsl,p3060-l3-cache-controller", "cache";
-                reg = <0x10000 0x1000
-                       0x11000 0x1000>;
-                interrupts = <16 2 1 27
-                              16 2 1 26>;
-        };
-        corenet-cf@18000 {
-                compatible = "fsl,corenet-cf";
-                reg = <0x18000 0x1000>;
-                interrupts = <16 2 1 31>;
-                fsl,ccf-num-csdids = <32>;
-                fsl,ccf-num-snoopids = <32>;
-        };
-        iommu@20000 {
-                compatible = "fsl,pamu-v1.0", "fsl,pamu";
-                reg = <0x20000 0x5000>;
-                interrupts = <
-                        24 2 0 0
-                        16 2 1 30>;
-        };
-/include/ "qoriq-rmu-0.dtsi"
-/include/ "qoriq-mpic.dtsi"
-        guts: global-utilities@e0000 {
-                compatible = "fsl,qoriq-device-config-1.0";
-                reg = <0xe0000 0xe00>;
-                fsl,has-rstcr;
-                #sleep-cells = <1>;
-                fsl,liodn-bits = <12>;
-        };
-        pins: global-utilities@e0e00 {
-                compatible = "fsl,qoriq-pin-control-1.0";
-                reg = <0xe0e00 0x200>;
-                #sleep-cells = <2>;
-        };
-        clockgen: global-utilities@e1000 {
-                compatible = "fsl,p3060-clockgen", "fsl,qoriq-clockgen-1.0";
-                reg = <0xe1000 0x1000>;
-                clock-frequency = <0>;
-        };
-        rcpm: global-utilities@e2000 {
-                compatible = "fsl,qoriq-rcpm-1.0";
-                reg = <0xe2000 0x1000>;
-                #sleep-cells = <1>;
-        };
-        sfp: sfp@e8000 {
-                compatible = "fsl,p3060-sfp", "fsl,qoriq-sfp-1.0";
-                reg        = <0xe8000 0x1000>;
-        };
-        serdes: serdes@ea000 {
-                compatible = "fsl,p3060-serdes";
-                reg        = <0xea000 0x1000>;
-        };
-/include/ "qoriq-dma-0.dtsi"
-/include/ "qoriq-dma-1.dtsi"
-/include/ "qoriq-espi-0.dtsi"
-        spi@110000 {
-                fsl,espi-num-chipselects = <4>;
-        };
-/include/ "qoriq-i2c-0.dtsi"
-/include/ "qoriq-i2c-1.dtsi"
-/include/ "qoriq-duart-0.dtsi"
-/include/ "qoriq-duart-1.dtsi"
-/include/ "qoriq-gpio-0.dtsi"
-/include/ "qoriq-usb2-mph-0.dtsi"
-        usb@210000 {
-                compatible = "fsl-usb2-mph-v2.2", "fsl,mpc85xx-usb2-mph", "fsl-usb2-mph";
-        };
-/include/ "qoriq-usb2-dr-0.dtsi"
-        usb@211000 {
-                compatible = "fsl-usb2-dr-v2.2", "fsl,mpc85xx-usb2-dr", "fsl-usb2-dr";
-        };
-/include/ "qoriq-sec4.1-0.dtsi"
-};
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
index ededaf5ac015..d72fb5e219d0 100644
--- a/arch/powerpc/boot/dts/mgcoge.dts
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -222,6 +222,29 @@
                                interrupt-parent = <&PIC>;
                                usb-clock = <5>;
                        };
+                        spi@11aa0 {
+                                cell-index = <0>;
+                                compatible = "fsl,spi", "fsl,cpm2-spi";
+                                reg = <0x11a80 0x40 0x89fc 0x2>;
+                                interrupts = <2 8>;
+                                interrupt-parent = <&PIC>;
+                                gpios = < &cpm2_pio_d 19 0>;
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                ds3106@1 {
+                                        compatible = "gen,spidev";
+                                        reg = <0>;
+                                        spi-max-frequency = <8000000>;
+                                };
+                        };
+                };
+                cpm2_pio_d: gpio-controller@10d60 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,cpm2-pario-bank";
+                        reg = <0x10d60 0x14>;
+                        gpio-controller;
                };
                cpm2_pio_c: gpio-controller@10d40 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dtsi b/arch/powerpc/boot/dts/mpc8536ds.dtsi
index cc46dbd9746d..d304a2d68c62 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8536ds.dtsi
@@ -203,6 +203,14 @@
                        reg = <1>;
                        device_type = "ethernet-phy";
                };
+                sgmii_phy0: sgmii-phy@0 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1d>;
+                };
+                sgmii_phy1: sgmii-phy@1 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1c>;
+                };
                tbi0: tbi-phy@11 {
                        reg = <0x11>;
                        device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dtsi b/arch/powerpc/boot/dts/mpc8544ds.dtsi
index 270f64b90f4e..77ebc9f1d37c 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8544ds.dtsi
@@ -51,6 +51,15 @@
                        device_type = "ethernet-phy";
                };
+                sgmii_phy0: sgmii-phy@0 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1c>;
+                };
+                sgmii_phy1: sgmii-phy@1 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1d>;
+                };
                tbi0: tbi-phy@11 {
                        reg = <0x11>;
                        device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dtsi b/arch/powerpc/boot/dts/mpc8572ds.dtsi
index 14178944e220..357490bb84da 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dtsi
+++ b/arch/powerpc/boot/dts/mpc8572ds.dtsi
@@ -169,6 +169,23 @@
                        reg = <0x3>;
                };
+                sgmii_phy0: sgmii-phy@0 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1c>;
+                };
+                sgmii_phy1: sgmii-phy@1 {
+                        interrupts = <6 1 0 0>;
+                        reg = <0x1d>;
+                };
+                sgmii_phy2: sgmii-phy@2 {
+                        interrupts = <7 1 0 0>;
+                        reg = <0x1e>;
+                };
+                sgmii_phy3: sgmii-phy@3 {
+                        interrupts = <7 1 0 0>;
+                        reg = <0x1f>;
+                };
                tbi0: tbi-phy@11 {
                        reg = <0x11>;
                        device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
index d34d12712125..ef9ef56b3eeb 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core0.dts
@@ -67,10 +67,10 @@
                msi@41600 {
                        msi-available-ranges = <0 0x80>;
                        interrupts = <
-                                0xe0 0
+                                0xe0 0 0 0
-                                0xe1 0
+                                0xe1 0 0 0
-                                0xe2 0
+                                0xe2 0 0 0
-                                0xe3 0>;
+                                0xe3 0 0 0>;
                };
                timer@42100 {
                        status = "disabled";
diff --git a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
index d6a8fafc0d0d..24564ee108e5 100644
--- a/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds_camp_core1.dts
@@ -67,9 +67,6 @@
                ethernet@24000 {
                        status = "disabled";
                };
-                mdio@24520 {
-                        status = "disabled";
-                };
                ptp_clock@24e00 {
                        status = "disabled";
                };
@@ -100,10 +97,10 @@
                msi@41600 {
                        msi-available-ranges = <0x80 0x80>;
                        interrupts = <
-                                0xe4 0
+                                0xe4 0 0 0
-                                0xe5 0
+                                0xe5 0 0 0
-                                0xe6 0
+                                0xe6 0 0 0
-                                0xe7 0>;
+                                0xe7 0 0 0>;
                };
                global-utilities@e0000 {
                        status = "disabled";
diff --git a/arch/powerpc/boot/dts/p1010rdb.dtsi b/arch/powerpc/boot/dts/p1010rdb.dtsi
index 49776143a1b8..ec7c27a64671 100644
--- a/arch/powerpc/boot/dts/p1010rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1010rdb.dtsi
@@ -126,12 +126,24 @@
 &board_soc {
        i2c@3000 {
+                eeprom@50 {
+                        compatible = "st,24c256";
+                        reg = <0x50>;
+                };
                rtc@68 {
                        compatible = "pericom,pt7c4338";
                        reg = <0x68>;
                };
        };
+        i2c@3100 {
+                eeprom@52 {
+                        compatible = "atmel,24c01";
+                        reg = <0x52>;
+                };
+        };
        spi@7000 {
                flash@0 {
                        #address-cells = <1>;
diff --git a/arch/powerpc/boot/dts/p1021rdb.dtsi b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
index b973461ab751..c13abfbbe2e2 100644
--- a/arch/powerpc/boot/dts/p1021rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1021rdb-pc.dtsi
@@ -1,7 +1,7 @@
 /*
 * P1021 RDB Device Tree Source stub (no addresses or top-level ranges)
 *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
diff --git a/arch/powerpc/boot/dts/p1021rdb.dts b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
index 90b6b4caa273..7cefa12b629a 100644
--- a/arch/powerpc/boot/dts/p1021rdb.dts
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_32b.dts
@@ -1,7 +1,7 @@
 /*
 * P1021 RDB Device Tree Source
 *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
@@ -92,5 +92,5 @@
        };
 };
-/include/ "p1021rdb.dtsi"
+/include/ "p1021rdb-pc.dtsi"
 /include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1021rdb_36b.dts b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
index ea6d8b5fa10b..53d0c889039c 100644
--- a/arch/powerpc/boot/dts/p1021rdb_36b.dts
+++ b/arch/powerpc/boot/dts/p1021rdb-pc_36b.dts
@@ -1,7 +1,7 @@
 /*
 * P1021 RDB Device Tree Source (36-bit address map)
 *
- * Copyright 2011 Freescale Semiconductor Inc.
+ * Copyright 2012 Freescale Semiconductor Inc.
 *
 * Redistribution and use in source and binary forms, with or without
 * modification, are permitted provided that the following conditions are met:
@@ -92,5 +92,5 @@
        };
 };
-/include/ "p1021rdb.dtsi"
+/include/ "p1021rdb-pc.dtsi"
 /include/ "fsl/p1021si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1022ds.dtsi b/arch/powerpc/boot/dts/p1022ds.dtsi
index 7cdb505036bb..c3344b04d8ff 100644
--- a/arch/powerpc/boot/dts/p1022ds.dtsi
+++ b/arch/powerpc/boot/dts/p1022ds.dtsi
@@ -33,22 +33,6 @@
 */
 &board_lbc {
-        /*
-         * This node is used to access the pixis via "indirect" mode,
-         * which is done by writing the pixis register index to chip
-         * select 0 and the value to/from chip select 1.  Indirect
-         * mode is the only way to access the pixis when DIU video
-         * is enabled.  Note that this assumes that the first column
-         * of the 'ranges' property above is the chip select number.
-         */
-        board-control@0,0 {
-                compatible = "fsl,p1022ds-indirect-pixis";
-                reg = <0x0 0x0 1        /* CS0 */
-                       0x1 0x0 1>;      /* CS1 */
-                interrupt-parent = <&mpic>;
-                interrupts = <8 0 0 0>;
-        };
        nor@0,0 {
                #address-cells = <1>;
                #size-cells = <1>;
@@ -161,6 +145,10 @@
                         * the clock is enabled.
                         */
                };
+                rtc@68 {
+                        compatible = "dallas,ds1339";
+                        reg = <0x68>;
+                };
        };
        spi@7000 {
diff --git a/arch/powerpc/boot/dts/p1024rdb.dtsi b/arch/powerpc/boot/dts/p1024rdb.dtsi
new file mode 100644
index 000000000000..b05dcb40f800
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb.dtsi
@@ -0,0 +1,228 @@
+/*
+ * P1024 RDB Device Tree Source stub (no addresses or top-level ranges)
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+&lbc {
+        nor@0,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "cfi-flash";
+                reg = <0x0 0x0 0x1000000>;
+                bank-width = <2>;
+                device-width = <1>;
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 256KB for Vitesse 7385 Switch firmware */
+                        reg = <0x0 0x00040000>;
+                        label = "NOR Vitesse-7385 Firmware";
+                        read-only;
+                };
+                partition@40000 {
+                        /* 256KB for DTB Image */
+                        reg = <0x00040000 0x00040000>;
+                        label = "NOR DTB Image";
+                };
+                partition@80000 {
+                        /* 3.5 MB for Linux Kernel Image */
+                        reg = <0x00080000 0x00380000>;
+                        label = "NOR Linux Kernel Image";
+                };
+                partition@400000 {
+                        /* 11MB for JFFS2 based Root file System */
+                        reg = <0x00400000 0x00b00000>;
+                        label = "NOR JFFS2 Root File System";
+                };
+                partition@f00000 {
+                        /* This location must not be altered  */
+                        /* 512KB for u-boot Bootloader Image */
+                        /* 512KB for u-boot Environment Variables */
+                        reg = <0x00f00000 0x00100000>;
+                        label = "NOR U-Boot Image";
+                        read-only;
+                };
+        };
+        nand@1,0 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,p1020-fcm-nand",
+                                 "fsl,elbc-fcm-nand";
+                reg = <0x1 0x0 0x40000>;
+                partition@0 {
+                        /* This location must not be altered  */
+                        /* 1MB for u-boot Bootloader Image */
+                        reg = <0x0 0x00100000>;
+                        label = "NAND U-Boot Image";
+                        read-only;
+                };
+                partition@100000 {
+                        /* 1MB for DTB Image */
+                        reg = <0x00100000 0x00100000>;
+                        label = "NAND DTB Image";
+                };
+                partition@200000 {
+                        /* 4MB for Linux Kernel Image */
+                        reg = <0x00200000 0x00400000>;
+                        label = "NAND Linux Kernel Image";
+                };
+                partition@600000 {
+                        /* 4MB for Compressed Root file System Image */
+                        reg = <0x00600000 0x00400000>;
+                        label = "NAND Compressed RFS Image";
+                };
+                partition@a00000 {
+                        /* 15MB for JFFS2 based Root file System */
+                        reg = <0x00a00000 0x00f00000>;
+                        label = "NAND JFFS2 Root File System";
+                };
+                partition@1900000 {
+                        /* 7MB for User Writable Area */
+                        reg = <0x01900000 0x00700000>;
+                        label = "NAND Writable User area";
+                };
+        };
+};
+&soc {
+        spi@7000 {
+                flash@0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "spansion,m25p80";
+                        reg = <0>;
+                        spi-max-frequency = <40000000>;
+                        partition@0 {
+                                /* 512KB for u-boot Bootloader Image */
+                                reg = <0x0 0x00080000>;
+                                label = "SPI U-Boot Image";
+                                read-only;
+                        };
+                        partition@80000 {
+                                /* 512KB for DTB Image */
+                                reg = <0x00080000 0x00080000>;
+                                label = "SPI DTB Image";
+                        };
+                        partition@100000 {
+                                /* 4MB for Linux Kernel Image */
+                                reg = <0x00100000 0x00400000>;
+                                label = "SPI Linux Kernel Image";
+                        };
+                        partition@500000 {
+                                /* 4MB for Compressed RFS Image */
+                                reg = <0x00500000 0x00400000>;
+                                label = "SPI Compressed RFS Image";
+                        };
+                        partition@900000 {
+                                /* 7MB for JFFS2 based RFS */
+                                reg = <0x00900000 0x00700000>;
+                                label = "SPI JFFS2 RFS";
+                        };
+                };
+        };
+        i2c@3000 {
+                rtc@68 {
+                        compatible = "dallas,ds1339";
+                        reg = <0x68>;
+                };
+        };
+        usb@22000 {
+                phy_type = "ulpi";
+        };
+        usb@23000 {
+                status = "disabled";
+        };
+        mdio@24000 {
+                phy0: ethernet-phy@0 {
+                        interrupts = <3 1 0 0>;
+                        reg = <0x0>;
+                };
+                phy1: ethernet-phy@1 {
+                        interrupts = <2 1 0 0>;
+                        reg = <0x1>;
+                };
+                phy2: ethernet-phy@2 {
+                        interrupts = <1 1 0 0>;
+                        reg = <0x2>;
+                };
+        };
+        mdio@25000 {
+                tbi0: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+        mdio@26000 {
+                tbi1: tbi-phy@11 {
+                        reg = <0x11>;
+                        device_type = "tbi-phy";
+                };
+        };
+        ethernet@b0000 {
+                phy-handle = <&phy2>;
+                phy-connection-type = "rgmii-id";
+        };
+        ethernet@b1000 {
+                phy-handle = <&phy0>;
+                tbi-handle = <&tbi0>;
+                phy-connection-type = "sgmii";
+        };
+        ethernet@b2000 {
+                phy-handle = <&phy1>;
+                phy-connection-type = "rgmii-id";
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1024rdb_32b.dts b/arch/powerpc/boot/dts/p1024rdb_32b.dts
new file mode 100644
index 000000000000..90e803e9ba5f
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_32b.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 32Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+        model = "fsl,P1024RDB";
+        compatible = "fsl,P1024RDB";
+        memory {
+                device_type = "memory";
+        };
+        lbc: localbus@ffe05000 {
+                reg = <0x0 0xffe05000 0 0x1000>;
+                ranges = <0x0 0x0 0x0 0xef000000 0x01000000
+                          0x1 0x0 0x0 0xff800000 0x00040000>;
+        };
+        soc: soc@ffe00000 {
+                ranges = <0x0 0x0 0xffe00000 0x100000>;
+        };
+        pci0: pcie@ffe09000 {
+                reg = <0x0 0xffe09000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0x0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+        pci1: pcie@ffe0a000 {
+                reg = <0x0 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0x0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0x0 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1024rdb_36b.dts b/arch/powerpc/boot/dts/p1024rdb_36b.dts
new file mode 100644
index 000000000000..3656825b65a1
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1024rdb_36b.dts
@@ -0,0 +1,87 @@
+/*
+ * P1024 RDB 36Bit Physical Address Map Device Tree Source
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions are met:
+ *     * Redistributions of source code must retain the above copyright
+ *       notice, this list of conditions and the following disclaimer.
+ *     * Redistributions in binary form must reproduce the above copyright
+ *       notice, this list of conditions and the following disclaimer in the
+ *       documentation and/or other materials provided with the distribution.
+ *     * Neither the name of Freescale Semiconductor nor the
+ *       names of its contributors may be used to endorse or promote products
+ *       derived from this software without specific prior written permission.
+ *
+ *
+ * ALTERNATIVELY, this software may be distributed under the terms of the
+ * GNU General Public License ("GPL") as published by the Free Software
+ * Foundation, either version 2 of that License or (at your option) any
+ * later version.
+ *
+ * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
+ * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
+ * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
+ * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
+ * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
+ * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
+ */
+/include/ "fsl/p1020si-pre.dtsi"
+/ {
+        model = "fsl,P1024RDB";
+        compatible = "fsl,P1024RDB";
+        memory {
+                device_type = "memory";
+        };
+        lbc: localbus@fffe05000 {
+                reg = <0xf 0xffe05000 0 0x1000>;
+                ranges = <0x0 0x0 0xf 0xef000000 0x01000000
+                          0x1 0x0 0xf 0xff800000 0x00040000>;
+        };
+        soc: soc@fffe00000 {
+                ranges = <0x0 0xf 0xffe00000 0x100000>;
+        };
+        pci0: pcie@fffe09000 {
+                reg = <0xf 0xffe09000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
+                pcie@0 {
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+        pci1: pcie@fffe0a000 {
+                reg = <0xf 0xffe0a000 0 0x1000>;
+                ranges = <0x2000000 0x0 0xe0000000 0xc 0x00000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        ranges = <0x2000000 0x0 0xe0000000
+                                  0x2000000 0x0 0xe0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
+/include/ "p1024rdb.dtsi"
+/include/ "fsl/p1020si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/p1025rdb.dtsi b/arch/powerpc/boot/dts/p1025rdb.dtsi
index cf3676fc714b..f50256482297 100644
--- a/arch/powerpc/boot/dts/p1025rdb.dtsi
+++ b/arch/powerpc/boot/dts/p1025rdb.dtsi
@@ -282,5 +282,45 @@
                                0x1  0x4  0x2  0x0  0x2  0x0    /* ENET5_RX_DV_SER5_CTS_B */
                                0x1  0x8  0x2  0x0  0x2  0x0>;    /* ENET5_RX_ER_SER5_CD_B */
                };
+                pio3: ucc_pin@03 {
+                        pio-map = <
+                /* port  pin  dir  open_drain  assignment  has_irq */
+                                0x0  0x16 0x2  0x0  0x2  0x0    /* SER7_CD_B*/
+                                0x0  0x12 0x2  0x0  0x2  0x0    /* SER7_CTS_B*/
+                                0x0  0x13 0x1  0x0  0x2  0x0    /* SER7_RTS_B*/
+                                0x0  0x14 0x2  0x0  0x2  0x0    /* SER7_RXD0*/
+                                0x0  0x15 0x1  0x0  0x2  0x0>;    /* SER7_TXD0*/
+                };
+                pio4: ucc_pin@04 {
+                        pio-map = <
+                /* port  pin  dir  open_drain  assignment  has_irq */
+                                0x1  0x0  0x2  0x0  0x2  0x0    /* SER3_CD_B*/
+                                0x0  0x1c 0x2  0x0  0x2  0x0    /* SER3_CTS_B*/
+                                0x0  0x1d 0x1  0x0  0x2  0x0    /* SER3_RTS_B*/
+                                0x0  0x1e 0x2  0x0  0x2  0x0    /* SER3_RXD0*/
+                                0x0  0x1f 0x1  0x0  0x2  0x0>;    /* SER3_TXD0*/
+                };
+        };
+};
+&qe {
+        serial2: ucc@2600 {
+                device_type = "serial";
+                compatible = "ucc_uart";
+                port-number = <0>;
+                rx-clock-name = "brg6";
+                tx-clock-name = "brg6";
+                pio-handle = <&pio3>;
+        };
+        serial3: ucc@2200 {
+                device_type = "serial";
+                compatible = "ucc_uart";
+                port-number = <1>;
+                rx-clock-name = "brg2";
+                tx-clock-name = "brg2";
+                pio-handle = <&pio4>;
        };
 };
diff --git a/arch/powerpc/boot/dts/p2020ds.dtsi b/arch/powerpc/boot/dts/p2020ds.dtsi
index d3b939c573b0..e699cf95b063 100644
--- a/arch/powerpc/boot/dts/p2020ds.dtsi
+++ b/arch/powerpc/boot/dts/p2020ds.dtsi
@@ -150,6 +150,16 @@
                        interrupts = <3 1 0 0>;
                        reg = <0x2>;
                };
+                sgmii_phy1: sgmii-phy@1 {
+                        interrupts = <5 1 0 0>;
+                        reg = <0x1c>;
+                };
+                sgmii_phy2: sgmii-phy@2 {
+                        interrupts = <5 1 0 0>;
+                        reg = <0x1d>;
+                };
                tbi0: tbi-phy@11 {
                        reg = <0x11>;
                        device_type = "tbi-phy";
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index 153bc76bb48e..4d52bce1d5b0 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -34,7 +34,7 @@
                /* NOR and NAND Flashes */
                ranges = <0x0 0x0 0x0 0xef000000 0x01000000
-                          0x1 0x0 0x0 0xff800000 0x00040000
+                          0x1 0x0 0x0 0xffa00000 0x00040000
                          0x2 0x0 0x0 0xffb00000 0x00020000>;
                nor@0,0 {
diff --git a/arch/powerpc/boot/dts/p2041rdb.dts b/arch/powerpc/boot/dts/p2041rdb.dts
index 285213976a7f..baab0347dab0 100644
--- a/arch/powerpc/boot/dts/p2041rdb.dts
+++ b/arch/powerpc/boot/dts/p2041rdb.dts
@@ -121,7 +121,8 @@
        lbc: localbus@ffe124000 {
                reg = <0xf 0xfe124000 0 0x1000>;
-                ranges = <0 0 0xf 0xe8000000 0x08000000>;
+                ranges = <0 0 0xf 0xe8000000 0x08000000
+                          1 0 0xf 0xffa00000 0x00040000>;
                flash@0,0 {
                        compatible = "cfi-flash";
@@ -129,6 +130,44 @@
                        bank-width = <2>;
                        device-width = <2>;
                };
+                nand@1,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,elbc-fcm-nand";
+                        reg = <0x1 0x0 0x40000>;
+                        partition@0 {
+                                label = "NAND U-Boot Image";
+                                reg = <0x0 0x02000000>;
+                                read-only;
+                        };
+                        partition@2000000 {
+                                label = "NAND Root File System";
+                                reg = <0x02000000 0x10000000>;
+                        };
+                        partition@12000000 {
+                                label = "NAND Compressed RFS Image";
+                                reg = <0x12000000 0x08000000>;
+                        };
+                        partition@1a000000 {
+                                label = "NAND Linux Kernel Image";
+                                reg = <0x1a000000 0x04000000>;
+                        };
+                        partition@1e000000 {
+                                label = "NAND DTB Image";
+                                reg = <0x1e000000 0x01000000>;
+                        };
+                        partition@1f000000 {
+                                label = "NAND Writable User area";
+                                reg = <0x1f000000 0x01000000>;
+                        };
+                };
        };
        pci0: pcie@ffe200000 {
diff --git a/arch/powerpc/boot/dts/p3060qds.dts b/arch/powerpc/boot/dts/p3060qds.dts
deleted file mode 100644
index 9ae875c8a211..000000000000
--- a/arch/powerpc/boot/dts/p3060qds.dts
+++ /dev/null
@@ -1,242 +0,0 @@
-/*
- * P3060QDS Device Tree Source
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * Redistribution and use in source and binary forms, with or without
- * modification, are permitted provided that the following conditions are met:
- *     * Redistributions of source code must retain the above copyright
- *       notice, this list of conditions and the following disclaimer.
- *     * Redistributions in binary form must reproduce the above copyright
- *       notice, this list of conditions and the following disclaimer in the
- *       documentation and/or other materials provided with the distribution.
- *     * Neither the name of Freescale Semiconductor nor the
- *       names of its contributors may be used to endorse or promote products
- *       derived from this software without specific prior written permission.
- *
- *
- * ALTERNATIVELY, this software may be distributed under the terms of the
- * GNU General Public License ("GPL") as published by the Free Software
- * Foundation, either version 2 of that License or (at your option) any
- * later version.
- *
- * THIS SOFTWARE IS PROVIDED BY Freescale Semiconductor ``AS IS'' AND ANY
- * EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
- * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
- * DISCLAIMED. IN NO EVENT SHALL Freescale Semiconductor BE LIABLE FOR ANY
- * DIRECT, INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
- * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
- * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND
- * ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
- * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF THIS
- * SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
- */
-/include/ "fsl/p3060si-pre.dtsi"
-/ {
-        model = "fsl,P3060QDS";
-        compatible = "fsl,P3060QDS";
-        #address-cells = <2>;
-        #size-cells = <2>;
-        interrupt-parent = <&mpic>;
-        memory {
-                device_type = "memory";
-        };
-        dcsr: dcsr@f00000000 {
-                ranges = <0x00000000 0xf 0x00000000 0x01008000>;
-        };
-        soc: soc@ffe000000 {
-                ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
-                reg = <0xf 0xfe000000 0 0x00001000>;
-                spi@110000 {
-                        flash@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "spansion,s25sl12801";
-                                reg = <0>;
-                                spi-max-frequency = <40000000>; /* input clock */
-                                partition@u-boot {
-                                        label = "u-boot";
-                                        reg = <0x00000000 0x00100000>;
-                                        read-only;
-                                };
-                                partition@kernel {
-                                        label = "kernel";
-                                        reg = <0x00100000 0x00500000>;
-                                        read-only;
-                                };
-                                partition@dtb {
-                                        label = "dtb";
-                                        reg = <0x00600000 0x00100000>;
-                                        read-only;
-                                };
-                                partition@fs {
-                                        label = "file system";
-                                        reg = <0x00700000 0x00900000>;
-                                };
-                        };
-                        flash@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "spansion,en25q32b";
-                                reg = <1>;
-                                spi-max-frequency = <40000000>; /* input clock */
-                                partition@spi1 {
-                                        label = "spi1";
-                                        reg = <0x00000000 0x00400000>;
-                                };
-                        };
-                        flash@2 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "atmel,at45db081d";
-                                reg = <2>;
-                                spi-max-frequency = <40000000>; /* input clock */
-                                partition@spi1 {
-                                        label = "spi2";
-                                        reg = <0x00000000 0x00100000>;
-                                };
-                        };
-                        flash@3 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                compatible = "spansion,sst25wf040";
-                                reg = <3>;
-                                spi-max-frequency = <40000000>; /* input clock */
-                                partition@spi3 {
-                                        label = "spi3";
-                                        reg = <0x00000000 0x00080000>;
-                                };
-                        };
-                };
-                i2c@118000 {
-                        eeprom@51 {
-                                compatible = "at24,24c256";
-                                reg = <0x51>;
-                        };
-                        eeprom@53 {
-                                compatible = "at24,24c256";
-                                reg = <0x53>;
-                        };
-                        rtc@68 {
-                                compatible = "dallas,ds3232";
-                                reg = <0x68>;
-                                interrupts = <0x1 0x1 0 0>;
-                        };
-                };
-                usb0: usb@210000 {
-                        phy_type = "ulpi";
-                };
-                usb1: usb@211000 {
-                        dr_mode = "host";
-                        phy_type = "ulpi";
-                };
-        };
-        rio: rapidio@ffe0c0000 {
-                reg = <0xf 0xfe0c0000 0 0x11000>;
-                port1 {
-                        ranges = <0 0 0xc 0x20000000 0 0x10000000>;
-                };
-                port2 {
-                        ranges = <0 0 0xc 0x30000000 0 0x10000000>;
-                };
-        };
-        lbc: localbus@ffe124000 {
-                reg = <0xf 0xfe124000 0 0x1000>;
-                ranges = <0 0 0xf 0xe8000000 0x08000000
-                          2 0 0xf 0xffa00000 0x00040000
-                          3 0 0xf 0xffdf0000 0x00008000>;
-                flash@0,0 {
-                        compatible = "cfi-flash";
-                        reg = <0 0 0x08000000>;
-                        bank-width = <2>;
-                        device-width = <2>;
-                };
-                nand@2,0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,elbc-fcm-nand";
-                        reg = <0x2 0x0 0x40000>;
-                        partition@0 {
-                                label = "NAND U-Boot Image";
-                                reg = <0x0 0x02000000>;
-                                read-only;
-                        };
-                        partition@2000000 {
-                                label = "NAND Root File System";
-                                reg = <0x02000000 0x10000000>;
-                        };
-                        partition@12000000 {
-                                label = "NAND Compressed RFS Image";
-                                reg = <0x12000000 0x08000000>;
-                        };
-                        partition@1a000000 {
-                                label = "NAND Linux Kernel Image";
-                                reg = <0x1a000000 0x04000000>;
-                        };
-                        partition@1e000000 {
-                                label = "NAND DTB Image";
-                                reg = <0x1e000000 0x01000000>;
-                        };
-                        partition@1f000000 {
-                                label = "NAND Writable User area";
-                                reg = <0x1f000000 0x21000000>;
-                        };
-                };
-                board-control@3,0 {
-                        compatible = "fsl,p3060qds-fpga", "fsl,fpga-qixis";
-                        reg = <3 0 0x100>;
-                };
-        };
-        pci0: pcie@ffe200000 {
-                reg = <0xf 0xfe200000 0 0x1000>;
-                ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
-                          0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
-                pcie@0 {
-                        ranges = <0x02000000 0 0xe0000000
-                                  0x02000000 0 0xe0000000
-                                  0 0x20000000
-                                  0x01000000 0 0x00000000
-                                  0x01000000 0 0x00000000
-                                  0 0x00010000>;
-                };
-        };
-        pci1: pcie@ffe201000 {
-                reg = <0xf 0xfe201000 0 0x1000>;
-                ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
-                          0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
-                pcie@0 {
-                        ranges = <0x02000000 0 0xe0000000
-                                  0x02000000 0 0xe0000000
-                                  0 0x20000000
-                                  0x01000000 0 0x00000000
-                                  0x01000000 0 0x00000000
-                                  0 0x00010000>;
-                };
-        };
-};
-/include/ "fsl/p3060si-post.dtsi"
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
deleted file mode 100644
index 72078eb15616..000000000000
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ /dev/null
@@ -1,406 +0,0 @@
-/*
- * SBC8560 Device Tree Source
- *
- * Copyright 2007 Wind River Systems Inc.
- *
- * Paul Gortmaker (see MAINTAINERS for contact information)
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-/dts-v1/;
-/ {
-        model = "SBC8560";
-        compatible = "SBC8560";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        aliases {
-                ethernet0 = &enet0;
-                ethernet1 = &enet1;
-                ethernet2 = &enet2;
-                ethernet3 = &enet3;
-                serial0 = &serial0;
-                serial1 = &serial1;
-                pci0 = &pci0;
-        };
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,8560@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <0x20>;     // 32 bytes
-                        i-cache-line-size = <0x20>;     // 32 bytes
-                        d-cache-size = <0x8000>;        // L1, 32K
-                        i-cache-size = <0x8000>;        // L1, 32K
-                        timebase-frequency = <0>;       // From uboot
-                        bus-frequency = <0>;
-                        clock-frequency = <0>;
-                        next-level-cache = <&L2>;
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x20000000>;
-        };
-        soc@ff700000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                ranges = <0x0 0xff700000 0x00100000>;
-                clock-frequency = <0>;
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <8>;
-                };
-                ecm@1000 {
-                        compatible = "fsl,mpc8560-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                memory-controller@2000 {
-                        compatible = "fsl,mpc8560-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <0x12 0x2>;
-                };
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,mpc8560-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <0x20>;       // 32 bytes
-                        cache-size = <0x40000>;         // L2, 256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <0x10 0x2>;
-                };
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <0x2b 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <0x2b 0x2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,mpc8560-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,mpc8560-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,mpc8560-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,mpc8560-dma-channel",
-                                                "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "TSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi0>;
-                        phy-handle = <&phy0>;
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-                                phy0: ethernet-phy@19 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <0x6 0x1>;
-                                        reg = <0x19>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy1: ethernet-phy@1a {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <0x7 0x1>;
-                                        reg = <0x1a>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy2: ethernet-phy@1b {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <0x8 0x1>;
-                                        reg = <0x1b>;
-                                        device_type = "ethernet-phy";
-                                };
-                                phy3: ethernet-phy@1c {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <0x8 0x1>;
-                                        reg = <0x1c>;
-                                        device_type = "ethernet-phy";
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "TSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
-                        interrupt-parent = <&mpic>;
-                        tbi-handle = <&tbi1>;
-                        phy-handle = <&phy1>;
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        compatible = "chrp,open-pic";
-                        reg = <0x40000 0x40000>;
-                        device_type = "open-pic";
-                };
-                cpm@919c0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc8560-cpm", "fsl,cpm2";
-                        reg = <0x919c0 0x30>;
-                        ranges;
-                        muram@80000 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                ranges = <0x0 0x80000 0x10000>;
-                                data@0 {
-                                        compatible = "fsl,cpm-muram-data";
-                                        reg = <0x0 0x4000 0x9000 0x2000>;
-                                };
-                        };
-                        brg@919f0 {
-                                compatible = "fsl,mpc8560-brg",
-                                             "fsl,cpm2-brg",
-                                             "fsl,cpm-brg";
-                                reg = <0x919f0 0x10 0x915f0 0x10>;
-                                clock-frequency = <165000000>;
-                        };
-                        cpmpic: pic@90c00 {
-                                interrupt-controller;
-                                #address-cells = <0>;
-                                #interrupt-cells = <2>;
-                                interrupts = <0x2e 0x2>;
-                                interrupt-parent = <&mpic>;
-                                reg = <0x90c00 0x80>;
-                                compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
-                        };
-                        enet2: ethernet@91320 {
-                                device_type = "network";
-                                compatible = "fsl,mpc8560-fcc-enet",
-                                             "fsl,cpm2-fcc-enet";
-                                reg = <0x91320 0x20 0x88500 0x100 0x913b0 0x1>;
-                                local-mac-address = [ 00 00 00 00 00 00 ];
-                                fsl,cpm-command = <0x16200300>;
-                                interrupts = <0x21 0x8>;
-                                interrupt-parent = <&cpmpic>;
-                                phy-handle = <&phy2>;
-                        };
-                        enet3: ethernet@91340 {
-                                device_type = "network";
-                                compatible = "fsl,mpc8560-fcc-enet",
-                                             "fsl,cpm2-fcc-enet";
-                                reg = <0x91340 0x20 0x88600 0x100 0x913d0 0x1>;
-                                local-mac-address = [ 00 00 00 00 00 00 ];
-                                fsl,cpm-command = <0x1a400300>;
-                                interrupts = <0x22 0x8>;
-                                interrupt-parent = <&cpmpic>;
-                                phy-handle = <&phy3>;
-                        };
-                };
-                global-utilities@e0000 {
-                        compatible = "fsl,mpc8560-guts";
-                        reg = <0xe0000 0x1000>;
-                };
-        };
-        pci0: pci@ff708000 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
-                device_type = "pci";
-                reg = <0xff708000 0x1000>;
-                clock-frequency = <66666666>;
-                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-map = <
-                        /* IDSEL 0x02 */
-                        0x1000 0x0 0x0 0x1 &mpic 0x2 0x1
-                        0x1000 0x0 0x0 0x2 &mpic 0x3 0x1
-                        0x1000 0x0 0x0 0x3 &mpic 0x4 0x1
-                        0x1000 0x0 0x0 0x4 &mpic 0x5 0x1>;
-                interrupt-parent = <&mpic>;
-                interrupts = <0x18 0x2>;
-                bus-range = <0x0 0x0>;
-                ranges = <0x02000000 0x0 0x80000000 0x80000000 0x0 0x20000000
-                          0x01000000 0x0 0x00000000 0xe2000000 0x0 0x00100000>;
-        };
-        localbus@ff705000 {
-                compatible = "fsl,mpc8560-localbus", "simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
-                reg = <0xff705000 0x100>;       // BRx, ORx, etc.
-                ranges = <
-                        0x0 0x0 0xff800000 0x0800000    // 8MB boot flash
-                        0x1 0x0 0xe4000000 0x4000000    // 64MB flash
-                        0x3 0x0 0x20000000 0x4000000    // 64MB SDRAM
-                        0x4 0x0 0x24000000 0x4000000    // 64MB SDRAM
-                        0x5 0x0 0xfc000000 0x0c00000    // EPLD
-                        0x6 0x0 0xe0000000 0x4000000    // 64MB flash
-                        0x7 0x0 0x80000000 0x0200000    // ATM1,2
-                >;
-                epld@5,0 {
-                        compatible = "wrs,epld-localbus";
-                        #address-cells = <2>;
-                        #size-cells = <1>;
-                        reg = <0x5 0x0 0xc00000>;
-                        ranges = <
-                                0x0 0x0 0x5 0x000000 0x1fff     // LED disp.
-                                0x1 0x0 0x5 0x100000 0x1fff     // switches
-                                0x2 0x0 0x5 0x200000 0x1fff     // ID reg.
-                                0x3 0x0 0x5 0x300000 0x1fff     // status reg.
-                                0x4 0x0 0x5 0x400000 0x1fff     // reset reg.
-                                0x5 0x0 0x5 0x500000 0x1fff     // Wind port
-                                0x7 0x0 0x5 0x700000 0x1fff     // UART #1
-                                0x8 0x0 0x5 0x800000 0x1fff     // UART #2
-                                0x9 0x0 0x5 0x900000 0x1fff     // RTC
-                                0xb 0x0 0x5 0xb00000 0x1fff     // EEPROM
-                        >;
-                        bidr@2,0 {
-                                compatible = "wrs,sbc8560-bidr";
-                                reg = <0x2 0x0 0x10>;
-                        };
-                        bcsr@3,0 {
-                                compatible = "wrs,sbc8560-bcsr";
-                                reg = <0x3 0x0 0x10>;
-                        };
-                        brstcr@4,0 {
-                                compatible = "wrs,sbc8560-brstcr";
-                                reg = <0x4 0x0 0x10>;
-                        };
-                        serial0: serial@7,0 {
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x7 0x0 0x100>;
-                                clock-frequency = <1843200>;
-                                interrupts = <0x9 0x2>;
-                                interrupt-parent = <&mpic>;
-                        };
-                        serial1: serial@8,0 {
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0x8 0x0 0x100>;
-                                clock-frequency = <1843200>;
-                                interrupts = <0xa 0x2>;
-                                interrupt-parent = <&mpic>;
-                        };
-                        rtc@9,0 {
-                                compatible = "m48t59";
-                                reg = <0x9 0x0 0x1fff>;
-                        };
-                };
-        };
-};
diff --git a/arch/powerpc/boot/flatdevtree_env.h b/arch/powerpc/boot/flatdevtree_env.h
deleted file mode 100644
index 66e0ebb1a364..000000000000
--- a/arch/powerpc/boot/flatdevtree_env.h
+++ /dev/null
@@ -1,27 +0,0 @@
-/*
- * This file adds the header file glue so that the shared files
- * flatdevicetree.[ch] can compile and work in the powerpc bootwrapper.
- *
- * strncmp & strchr copied from <file:lib/string.c>
- * Copyright (C) 1991, 1992  Linus Torvalds
- *
- * Maintained by: Mark A. Greer <mgreer@mvista.com>
- */
-#ifndef _PPC_BOOT_FLATDEVTREE_ENV_H_
-#define _PPC_BOOT_FLATDEVTREE_ENV_H_
-#include <stdarg.h>
-#include <stddef.h>
-#include "types.h"
-#include "string.h"
-#include "stdio.h"
-#include "ops.h"
-#define be16_to_cpu(x)          (x)
-#define cpu_to_be16(x)          (x)
-#define be32_to_cpu(x)          (x)
-#define cpu_to_be32(x)          (x)
-#define be64_to_cpu(x)          (x)
-#define cpu_to_be64(x)          (x)
-#endif /* _PPC_BOOT_FLATDEVTREE_ENV_H_ */
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
index 07e1bbadebfe..a0dfef1fcdb7 100644
--- a/arch/powerpc/configs/83xx/kmeter1_defconfig
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -2,14 +2,14 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
-CONFIG_SPARSE_IRQ=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_EXPERT=y
-# CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+# CONFIG_MSDOS_PARTITION is not set
 # CONFIG_IOSCHED_DEADLINE is not set
 # CONFIG_IOSCHED_CFQ is not set
 # CONFIG_PPC_CHRP is not set
@@ -31,11 +31,10 @@ CONFIG_IP_PNP=y
 # CONFIG_INET_XFRM_MODE_BEET is not set
 # CONFIG_INET_LRO is not set
 # CONFIG_IPV6 is not set
+CONFIG_TIPC=y
 CONFIG_BRIDGE=m
 CONFIG_VLAN_8021Q=y
 CONFIG_MTD=y
-CONFIG_MTD_CONCAT=y
-CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
@@ -50,17 +49,15 @@ CONFIG_MTD_UBI_DEBUG=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
-CONFIG_TUN=y
 CONFIG_MII=y
-CONFIG_MARVELL_PHY=y
+CONFIG_TUN=y
-CONFIG_NET_ETHERNET=y
 CONFIG_UCC_GETH=y
-# CONFIG_NETDEV_10000 is not set
+CONFIG_MARVELL_PHY=y
-CONFIG_WAN=y
-CONFIG_HDLC=y
 CONFIG_PPP=y
 CONFIG_PPP_MULTILINK=y
 CONFIG_PPPOE=y
+CONFIG_WAN=y
+CONFIG_HDLC=y
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
 # CONFIG_VT is not set
@@ -77,10 +74,7 @@ CONFIG_UIO=y
 # CONFIG_DNOTIFY is not set
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
+CONFIG_UBIFS_FS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/85xx/sbc8560_defconfig b/arch/powerpc/configs/85xx/sbc8560_defconfig
deleted file mode 100644
index f7fdb0318e4c..000000000000
--- a/arch/powerpc/configs/85xx/sbc8560_defconfig
+++ /dev/null
@@ -1,65 +0,0 @@
-CONFIG_PPC_85xx=y
-CONFIG_EXPERIMENTAL=y
-CONFIG_SYSVIPC=y
-CONFIG_LOG_BUF_SHIFT=14
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EXPERT=y
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_SBC8560=y
-CONFIG_BINFMT_MISC=y
-CONFIG_SPARSE_IRQ=y
-# CONFIG_SECCOMP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_XFRM_USER=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_IP_PNP_DHCP=y
-CONFIG_IP_PNP_BOOTP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
-# CONFIG_FW_LOADER is not set
-CONFIG_PROC_DEVICETREE=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-CONFIG_BLK_DEV_RAM_SIZE=32768
-CONFIG_NETDEVICES=y
-CONFIG_BROADCOM_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
-CONFIG_GIANFAR=y
-# CONFIG_INPUT_MOUSEDEV is not set
-# CONFIG_INPUT_KEYBOARD is not set
-# CONFIG_INPUT_MOUSE is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_8250=y
-CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_NR_UARTS=2
-CONFIG_SERIAL_8250_RUNTIME_UARTS=2
-# CONFIG_HW_RANDOM is not set
-CONFIG_VIDEO_OUTPUT_CONTROL=y
-CONFIG_RTC_CLASS=y
-CONFIG_RTC_DRV_M48T59=y
-CONFIG_INOTIFY=y
-CONFIG_PROC_KCORE=y
-CONFIG_TMPFS=y
-CONFIG_NFS_FS=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-# CONFIG_MSDOS_PARTITION is not set
-CONFIG_MAGIC_SYSRQ=y
-CONFIG_DEBUG_KERNEL=y
-CONFIG_DETECT_HUNG_TASK=y
-CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_PPC_EARLY_DEBUG=y
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/corenet32_smp_defconfig b/arch/powerpc/configs/corenet32_smp_defconfig
index 91db656294e8..cbb98c1234fd 100644
--- a/arch/powerpc/configs/corenet32_smp_defconfig
+++ b/arch/powerpc/configs/corenet32_smp_defconfig
@@ -23,7 +23,6 @@ CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_P2041_RDB=y
 CONFIG_P3041_DS=y
-CONFIG_P3060_QDS=y
 CONFIG_P4080_DS=y
 CONFIG_P5020_DS=y
 CONFIG_HIGHMEM=y
@@ -32,10 +31,12 @@ CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_CORE_DUMP_DEFAULT_ELF_HEADERS is not set
 CONFIG_BINFMT_MISC=m
 CONFIG_KEXEC=y
+CONFIG_IRQ_ALL_CPUS=y
 CONFIG_FORCE_MAX_ZONEORDER=13
 CONFIG_FSL_LBC=y
 CONFIG_PCI=y
 CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_MSI=y
 # CONFIG_PCIEASPM is not set
 CONFIG_RAPIDIO=y
 CONFIG_FSL_RIO=y
@@ -76,6 +77,11 @@ CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
 CONFIG_MTD_CFI_AMDSTD=y
 CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_FSL_IFC=y
+CONFIG_MTD_NAND_FSL_ELBC=y
 CONFIG_MTD_M25P80=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
@@ -136,6 +142,8 @@ CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
 CONFIG_USB_STORAGE=y
 CONFIG_MMC=y
 CONFIG_MMC_SDHCI=y
+CONFIG_MMC_SDHCI_OF=y
+CONFIG_MMC_SDHCI_OF_ESDHC=y
 CONFIG_EDAC=y
 CONFIG_EDAC_MM_EDAC=y
 CONFIG_EDAC_MPC85XX=y
diff --git a/arch/powerpc/configs/corenet64_smp_defconfig b/arch/powerpc/configs/corenet64_smp_defconfig
index 6798343580f0..dd89de8b0b7f 100644
--- a/arch/powerpc/configs/corenet64_smp_defconfig
+++ b/arch/powerpc/configs/corenet64_smp_defconfig
@@ -6,7 +6,9 @@ CONFIG_NR_CPUS=2
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_BSD_PROCESS_ACCT=y
-CONFIG_SPARSE_IRQ=y
+CONFIG_IRQ_DOMAIN_DEBUG=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -18,11 +20,14 @@ CONFIG_MODULE_UNLOAD=y
 CONFIG_MODULE_FORCE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
 CONFIG_P5020_DS=y
 # CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
-CONFIG_NO_HZ=y
-CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BINFMT_MISC=m
+CONFIG_IRQ_ALL_CPUS=y
+CONFIG_PCIEPORTBUS=y
+CONFIG_PCI_MSI=y
 CONFIG_RAPIDIO=y
 CONFIG_FSL_RIO=y
 CONFIG_NET=y
@@ -51,12 +56,25 @@ CONFIG_INET_ESP=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_M25P80=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSL_ELBC=y
+CONFIG_MTD_NAND_FSL_IFC=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
-CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
+CONFIG_ATA=y
+CONFIG_SATA_FSL=y
+CONFIG_SATA_SIL24=y
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
 CONFIG_INPUT_FF_MEMLESS=m
@@ -66,39 +84,59 @@ CONFIG_INPUT_FF_MEMLESS=m
 CONFIG_SERIO_LIBPS2=y
 CONFIG_SERIAL_8250=y
 CONFIG_SERIAL_8250_CONSOLE=y
-CONFIG_SERIAL_8250_EXTENDED=y
 CONFIG_SERIAL_8250_MANY_PORTS=y
 CONFIG_SERIAL_8250_DETECT_IRQ=y
 CONFIG_SERIAL_8250_RSA=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_MPC=y
+CONFIG_SPI=y
+CONFIG_SPI_GPIO=y
+CONFIG_SPI_FSL_SPI=y
+CONFIG_SPI_FSL_ESPI=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
-# CONFIG_HID_SUPPORT is not set
+CONFIG_USB_HID=m
-# CONFIG_USB_SUPPORT is not set
+CONFIG_USB=y
+CONFIG_USB_MON=y
+CONFIG_USB_EHCI_HCD=y
+CONFIG_USB_EHCI_FSL=y
+CONFIG_USB_STORAGE=y
+CONFIG_MMC=y
+CONFIG_MMC_SDHCI=y
+CONFIG_EDAC=y
+CONFIG_EDAC_MM_EDAC=y
 CONFIG_DMADEVICES=y
 CONFIG_FSL_DMA=y
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_ISO9660_FS=m
+CONFIG_JOLIET=y
+CONFIG_ZISOFS=y
+CONFIG_UDF_FS=m
+CONFIG_MSDOS_FS=m
+CONFIG_VFAT_FS=y
+CONFIG_NTFS_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_HUGETLBFS=y
 # CONFIG_MISC_FILESYSTEMS is not set
-CONFIG_PARTITION_ADVANCED=y
+CONFIG_NFS_FS=y
-CONFIG_MAC_PARTITION=y
+CONFIG_NFS_V4=y
-CONFIG_NLS=y
+CONFIG_ROOT_NFS=y
+CONFIG_NFSD=m
+CONFIG_NLS_ISO8859_1=y
 CONFIG_NLS_UTF8=m
 CONFIG_CRC_T10DIF=y
-CONFIG_CRC_ITU_T=m
 CONFIG_FRAME_WARN=1024
+CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_SHIRQ=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_CRYPTO_NULL=y
-CONFIG_IRQ_DOMAIN_DEBUG=y
 CONFIG_CRYPTO_PCBC=m
+CONFIG_CRYPTO_MD4=y
 CONFIG_CRYPTO_SHA256=y
 CONFIG_CRYPTO_SHA512=y
 CONFIG_CRYPTO_AES=y
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig
index 0d36b0e1e268..8fa84f156ef3 100644
--- a/arch/powerpc/configs/mgcoge_defconfig
+++ b/arch/powerpc/configs/mgcoge_defconfig
@@ -2,7 +2,6 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
-CONFIG_SPARSE_IRQ=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
@@ -12,6 +11,7 @@ CONFIG_KALLSYMS_ALL=y
 # CONFIG_PCSPKR_PLATFORM is not set
 CONFIG_EMBEDDED=y
 CONFIG_SLAB=y
+CONFIG_PARTITION_ADVANCED=y
 # CONFIG_IOSCHED_CFQ is not set
 # CONFIG_PPC_PMAC is not set
 CONFIG_PPC_82xx=y
@@ -49,12 +49,9 @@ CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_NETDEVICES=y
-CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
 CONFIG_FS_ENET=y
 CONFIG_FS_ENET_MDIO_FCC=y
-# CONFIG_NETDEV_1000 is not set
+CONFIG_FIXED_PHY=y
-# CONFIG_NETDEV_10000 is not set
 # CONFIG_WLAN is not set
 # CONFIG_INPUT is not set
 # CONFIG_SERIO is not set
@@ -64,6 +61,8 @@ CONFIG_SERIAL_CPM_CONSOLE=y
 CONFIG_I2C=y
 CONFIG_I2C_CHARDEV=y
 CONFIG_I2C_CPM=y
+CONFIG_SPI=y
+CONFIG_SPI_FSL_SPI=y
 # CONFIG_HWMON is not set
 CONFIG_USB_GADGET=y
 CONFIG_USB_FSL_USB2=y
@@ -80,8 +79,6 @@ CONFIG_SQUASHFS=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_NLS=y
 CONFIG_NLS_CODEPAGE_437=y
 CONFIG_NLS_ASCII=y
 CONFIG_NLS_ISO8859_1=y
@@ -90,7 +87,6 @@ CONFIG_MAGIC_SYSRQ=y
 CONFIG_DEBUG_FS=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_DEBUG_INFO=y
-CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_BDI_SWITCH=y
 CONFIG_CRYPTO_ECB=y
 CONFIG_CRYPTO_PCBC=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index 62bb723c5b54..03ee911c4577 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -74,6 +74,30 @@ CONFIG_INET_ESP=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_FTL=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSL_ELBC=y
+CONFIG_MTD_NAND_FSL_IFC=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_M25P80=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index d1828427ae55..fdfa84dc908f 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -46,6 +46,7 @@ CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_BINFMT_MISC=m
 CONFIG_MATH_EMULATION=y
+CONFIG_IRQ_ALL_CPUS=y
 CONFIG_FORCE_MAX_ZONEORDER=12
 CONFIG_PCI=y
 CONFIG_PCI_MSI=y
@@ -76,6 +77,30 @@ CONFIG_INET_ESP=y
 CONFIG_IPV6=y
 CONFIG_IP_SCTP=m
 CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_MTD=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_FTL=y
+CONFIG_MTD_GEN_PROBE=y
+CONFIG_MTD_MAP_BANK_WIDTH_1=y
+CONFIG_MTD_MAP_BANK_WIDTH_2=y
+CONFIG_MTD_MAP_BANK_WIDTH_4=y
+CONFIG_MTD_CFI_I1=y
+CONFIG_MTD_CFI_I2=y
+CONFIG_MTD_CFI_INTELEXT=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_CFI_UTIL=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_NAND=y
+CONFIG_MTD_NAND_FSL_ELBC=y
+CONFIG_MTD_NAND_FSL_IFC=y
+CONFIG_MTD_NAND_IDS=y
+CONFIG_MTD_NAND_ECC=y
+CONFIG_MTD_M25P80=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index c1442a3758ae..f2fe0c2b41e4 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -16,6 +16,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
@@ -489,3 +490,4 @@ CONFIG_VIRTUALIZATION=y
 CONFIG_KVM_BOOK3S_64=m
 CONFIG_KVM_BOOK3S_64_HV=y
 CONFIG_VHOST_NET=m
+CONFIG_BPF_JIT=y
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index 6608232663cb..187fb8d53605 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -24,6 +24,7 @@ CONFIG_BLK_DEV_INITRD=y
 CONFIG_PROFILING=y
 CONFIG_OPROFILE=y
 CONFIG_KPROBES=y
+CONFIG_JUMP_LABEL=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
diff --git a/arch/powerpc/include/asm/asm-compat.h b/arch/powerpc/include/asm/asm-compat.h
index 5d7fbe1950f9..6e82f5f9a6fd 100644
--- a/arch/powerpc/include/asm/asm-compat.h
+++ b/arch/powerpc/include/asm/asm-compat.h
@@ -29,7 +29,7 @@
 #define PPC_LLARX(t, a, b, eh)  PPC_LDARX(t, a, b, eh)
 #define PPC_STLCX       stringify_in_c(stdcx.)
 #define PPC_CNTLZL      stringify_in_c(cntlzd)
-#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), (RS))
+#define PPC_MTOCRF(FXM, RS) MTOCRF((FXM), RS)
 #define PPC_LR_STKOFF   16
 #define PPC_MIN_STKFRM  112
 #else /* 32-bit */
diff --git a/arch/powerpc/include/asm/code-patching.h b/arch/powerpc/include/asm/code-patching.h
index 37c32aba79b7..a6f8c7a5cbb7 100644
--- a/arch/powerpc/include/asm/code-patching.h
+++ b/arch/powerpc/include/asm/code-patching.h
@@ -26,8 +26,8 @@ unsigned int create_branch(const unsigned int *addr,
                           unsigned long target, int flags);
 unsigned int create_cond_branch(const unsigned int *addr,
                                unsigned long target, int flags);
-void patch_branch(unsigned int *addr, unsigned long target, int flags);
+int patch_branch(unsigned int *addr, unsigned long target, int flags);
-void patch_instruction(unsigned int *addr, unsigned int instr);
+int patch_instruction(unsigned int *addr, unsigned int instr);
 int instr_is_relative_branch(unsigned int instr);
 int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr);
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index 63d5ca49cece..77e97dd0c15d 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -34,6 +34,9 @@ struct dev_archdata {
 #ifdef CONFIG_EEH
        struct eeh_dev          *edev;
 #endif
+#ifdef CONFIG_FAIL_IOMMU
+        int fail_iommu;
+#endif
 };
 struct pdev_archdata {
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index d58fc4e4149c..a43c1473915f 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -293,7 +293,7 @@ label##_hv:								\
 #define RUNLATCH_ON                             \
 BEGIN_FTR_SECTION                               \
-        clrrdi  r3,r1,THREAD_SHIFT;             \
+        CURRENT_THREAD_INFO(r3, r1);            \
        ld      r4,TI_LOCAL_FLAGS(r3);          \
        andi.   r0,r4,_TLF_RUNLATCH;            \
        beql    ppc64_runlatch_on_trampoline;   \
@@ -332,7 +332,7 @@ label##_common:							\
 #ifdef CONFIG_PPC_970_NAP
 #define FINISH_NAP                              \
 BEGIN_FTR_SECTION                               \
-        clrrdi  r11,r1,THREAD_SHIFT;            \
+        CURRENT_THREAD_INFO(r11, r1);           \
        ld      r9,TI_LOCAL_FLAGS(r11);         \
        andi.   r10,r9,_TLF_NAPPING;            \
        bnel    power4_fixup_nap;               \
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index 2aadb47efaec..e45c4947a772 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -88,8 +88,8 @@ static inline bool arch_irqs_disabled(void)
 }
 #ifdef CONFIG_PPC_BOOK3E
-#define __hard_irq_enable()     asm volatile("wrteei 1" : : : "memory");
+#define __hard_irq_enable()     asm volatile("wrteei 1" : : : "memory")
-#define __hard_irq_disable()    asm volatile("wrteei 0" : : : "memory");
+#define __hard_irq_disable()    asm volatile("wrteei 0" : : : "memory")
 #else
 #define __hard_irq_enable()     __mtmsrd(local_paca->kernel_msr | MSR_EE, 1)
 #define __hard_irq_disable()    __mtmsrd(local_paca->kernel_msr, 1)
@@ -102,6 +102,14 @@ static inline void hard_irq_disable(void)
        get_paca()->irq_happened |= PACA_IRQ_HARD_DIS;
 }
+/* include/linux/interrupt.h needs hard_irq_disable to be a macro */
+#define hard_irq_disable        hard_irq_disable
+static inline bool lazy_irq_pending(void)
+{
+        return !!(get_paca()->irq_happened & ~PACA_IRQ_HARD_DIS);
+}
 /*
 * This is called by asynchronous interrupts to conditionally
 * re-enable hard interrupts when soft-disabled after having
@@ -119,6 +127,8 @@ static inline bool arch_irq_disabled_regs(struct pt_regs *regs)
        return !regs->softe;
 }
+extern bool prep_irq_for_idle(void);
 #else /* CONFIG_PPC64 */
 #define SET_MSR_EE(x)   mtmsr(x)
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 0edb6842b13d..61e8490786b8 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -26,7 +26,9 @@
 struct qe_iram {
        __be32  iadd;           /* I-RAM Address Register */
        __be32  idata;          /* I-RAM Data Register */
-        u8      res0[0x78];
+        u8      res0[0x04];
+        __be32  iready;         /* I-RAM Ready Register */
+        u8      res1[0x70];
 } __attribute__ ((packed));
 /* QE Interrupt Controller */
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index a3855b81eada..f94ef4213e9d 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -20,6 +20,14 @@ extern int check_legacy_ioport(unsigned long base_port);
 #define _PNPWRP         0xa79
 #define PNPBIOS_BASE    0xf000
+#if defined(CONFIG_PPC64) && defined(CONFIG_PCI)
+extern struct pci_dev *isa_bridge_pcidev;
+/*
+ * has legacy ISA devices ?
+ */
+#define arch_has_dev_port()     (isa_bridge_pcidev != NULL)
+#endif
 #include <linux/device.h>
 #include <linux/io.h>
diff --git a/arch/powerpc/include/asm/iommu.h b/arch/powerpc/include/asm/iommu.h
index 957a83f43646..cbfe678e3dbe 100644
--- a/arch/powerpc/include/asm/iommu.h
+++ b/arch/powerpc/include/asm/iommu.h
@@ -53,6 +53,16 @@ static __inline__ __attribute_const__ int get_iommu_order(unsigned long size)
 */
 #define IOMAP_MAX_ORDER         13
+#define IOMMU_POOL_HASHBITS     2
+#define IOMMU_NR_POOLS          (1 << IOMMU_POOL_HASHBITS)
+struct iommu_pool {
+        unsigned long start;
+        unsigned long end;
+        unsigned long hint;
+        spinlock_t lock;
+} ____cacheline_aligned_in_smp;
 struct iommu_table {
        unsigned long  it_busno;     /* Bus number this table belongs to */
        unsigned long  it_size;      /* Size of iommu table in entries */
@@ -61,10 +71,10 @@ struct iommu_table {
        unsigned long  it_index;     /* which iommu table this is */
        unsigned long  it_type;      /* type: PCI or Virtual Bus */
        unsigned long  it_blocksize; /* Entries in each block (cacheline) */
-        unsigned long  it_hint;      /* Hint for next alloc */
+        unsigned long  poolsize;
-        unsigned long  it_largehint; /* Hint for large allocs */
+        unsigned long  nr_pools;
-        unsigned long  it_halfpoint; /* Breaking point for small/large allocs */
+        struct iommu_pool large_pool;
-        spinlock_t     it_lock;      /* Protects it_map */
+        struct iommu_pool pools[IOMMU_NR_POOLS];
        unsigned long *it_map;       /* A simple allocation bitmap for now */
 };
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 88609b23b775..bfcd00c1485d 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -74,6 +74,7 @@ struct kvmppc_host_state {
        ulong vmhandler;
        ulong scratch0;
        ulong scratch1;
+        ulong sprg3;
        u8 in_guest;
        u8 restore_hid5;
        u8 napping;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index f0145522cfba..e8a26db2e8f3 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -163,12 +163,7 @@ extern u64 ppc64_rma_size;
 * to think about, feedback welcome. --BenH.
 */
-/* There are #define as they have to be used in assembly
+/* These are #defines as they have to be used in assembly */
- *
- * WARNING: If you change this list, make sure to update the array of
- * names currently in arch/powerpc/mm/hugetlbpage.c or bad things will
- * happen
- */
 #define MMU_PAGE_4K     0
 #define MMU_PAGE_16K    1
 #define MMU_PAGE_64K    2
diff --git a/arch/powerpc/include/asm/perf_event.h b/arch/powerpc/include/asm/perf_event.h
index 5c16b891d501..0bb23725b1e7 100644
--- a/arch/powerpc/include/asm/perf_event.h
+++ b/arch/powerpc/include/asm/perf_event.h
@@ -26,8 +26,13 @@
 #include <asm/ptrace.h>
 #include <asm/reg.h>
+/*
+ * Overload regs->result to specify whether we should use the MSR (result
+ * is zero) or the SIAR (result is non zero).
+ */
 #define perf_arch_fetch_caller_regs(regs, __ip)                 \
        do {                                                    \
+                (regs)->result = 0;                             \
                (regs)->nip = __ip;                             \
                (regs)->gpr[1] = *(unsigned long *)__get_SP();  \
                asm volatile("mfmsr %0" : "=r" ((regs)->msr));  \
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index d81f99430fe7..4c25319f2fbc 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -15,6 +15,72 @@
 #include <linux/stringify.h>
 #include <asm/asm-compat.h>
+#define __REG_R0        0
+#define __REG_R1        1
+#define __REG_R2        2
+#define __REG_R3        3
+#define __REG_R4        4
+#define __REG_R5        5
+#define __REG_R6        6
+#define __REG_R7        7
+#define __REG_R8        8
+#define __REG_R9        9
+#define __REG_R10       10
+#define __REG_R11       11
+#define __REG_R12       12
+#define __REG_R13       13
+#define __REG_R14       14
+#define __REG_R15       15
+#define __REG_R16       16
+#define __REG_R17       17
+#define __REG_R18       18
+#define __REG_R19       19
+#define __REG_R20       20
+#define __REG_R21       21
+#define __REG_R22       22
+#define __REG_R23       23
+#define __REG_R24       24
+#define __REG_R25       25
+#define __REG_R26       26
+#define __REG_R27       27
+#define __REG_R28       28
+#define __REG_R29       29
+#define __REG_R30       30
+#define __REG_R31       31
+#define __REGA0_0       0
+#define __REGA0_R1      1
+#define __REGA0_R2      2
+#define __REGA0_R3      3
+#define __REGA0_R4      4
+#define __REGA0_R5      5
+#define __REGA0_R6      6
+#define __REGA0_R7      7
+#define __REGA0_R8      8
+#define __REGA0_R9      9
+#define __REGA0_R10     10
+#define __REGA0_R11     11
+#define __REGA0_R12     12
+#define __REGA0_R13     13
+#define __REGA0_R14     14
+#define __REGA0_R15     15
+#define __REGA0_R16     16
+#define __REGA0_R17     17
+#define __REGA0_R18     18
+#define __REGA0_R19     19
+#define __REGA0_R20     20
+#define __REGA0_R21     21
+#define __REGA0_R22     22
+#define __REGA0_R23     23
+#define __REGA0_R24     24
+#define __REGA0_R25     25
+#define __REGA0_R26     26
+#define __REGA0_R27     27
+#define __REGA0_R28     28
+#define __REGA0_R29     29
+#define __REGA0_R30     30
+#define __REGA0_R31     31
 /* sorted alphabetically */
 #define PPC_INST_DCBA                   0x7c0005ec
 #define PPC_INST_DCBA_MASK              0xfc0007fe
@@ -107,12 +173,19 @@
 #define PPC_INST_NEG                    0x7c0000d0
 #define PPC_INST_BRANCH                 0x48000000
 #define PPC_INST_BRANCH_COND            0x40800000
+#define PPC_INST_LBZCIX                 0x7c0006aa
+#define PPC_INST_STBCIX                 0x7c0007aa
 /* macros to insert fields into opcodes */
-#define __PPC_RA(a)     (((a) & 0x1f) << 16)
+#define ___PPC_RA(a)    (((a) & 0x1f) << 16)
-#define __PPC_RB(b)     (((b) & 0x1f) << 11)
+#define ___PPC_RB(b)    (((b) & 0x1f) << 11)
-#define __PPC_RS(s)     (((s) & 0x1f) << 21)
+#define ___PPC_RS(s)    (((s) & 0x1f) << 21)
-#define __PPC_RT(s)     __PPC_RS(s)
+#define ___PPC_RT(t)    ___PPC_RS(t)
+#define __PPC_RA(a)     ___PPC_RA(__REG_##a)
+#define __PPC_RA0(a)    ___PPC_RA(__REGA0_##a)
+#define __PPC_RB(b)     ___PPC_RB(__REG_##b)
+#define __PPC_RS(s)     ___PPC_RS(__REG_##s)
+#define __PPC_RT(t)     ___PPC_RT(__REG_##t)
 #define __PPC_XA(a)     ((((a) & 0x1f) << 16) | (((a) & 0x20) >> 3))
 #define __PPC_XB(b)     ((((b) & 0x1f) << 11) | (((b) & 0x20) >> 4))
 #define __PPC_XS(s)     ((((s) & 0x1f) << 21) | (((s) & 0x20) >> 5))
@@ -141,13 +214,13 @@
 #define PPC_DCBZL(a, b)         stringify_in_c(.long PPC_INST_DCBZL | \
                                        __PPC_RA(a) | __PPC_RB(b))
 #define PPC_LDARX(t, a, b, eh)  stringify_in_c(.long PPC_INST_LDARX | \
-                                        __PPC_RT(t) | __PPC_RA(a) | \
+                                        ___PPC_RT(t) | ___PPC_RA(a) | \
-                                        __PPC_RB(b) | __PPC_EH(eh))
+                                        ___PPC_RB(b) | __PPC_EH(eh))
 #define PPC_LWARX(t, a, b, eh)  stringify_in_c(.long PPC_INST_LWARX | \
-                                        __PPC_RT(t) | __PPC_RA(a) | \
+                                        ___PPC_RT(t) | ___PPC_RA(a) | \
-                                        __PPC_RB(b) | __PPC_EH(eh))
+                                        ___PPC_RB(b) | __PPC_EH(eh))
 #define PPC_MSGSND(b)           stringify_in_c(.long PPC_INST_MSGSND | \
-                                        __PPC_RB(b))
+                                        ___PPC_RB(b))
 #define PPC_POPCNTB(a, s)       stringify_in_c(.long PPC_INST_POPCNTB | \
                                        __PPC_RA(a) | __PPC_RS(s))
 #define PPC_POPCNTD(a, s)       stringify_in_c(.long PPC_INST_POPCNTD | \
@@ -158,34 +231,39 @@
 #define PPC_RFDI                stringify_in_c(.long PPC_INST_RFDI)
 #define PPC_RFMCI               stringify_in_c(.long PPC_INST_RFMCI)
 #define PPC_TLBILX(t, a, b)     stringify_in_c(.long PPC_INST_TLBILX | \
-                                        __PPC_T_TLB(t) | __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_T_TLB(t) | __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_TLBILX_ALL(a, b)    PPC_TLBILX(0, a, b)
 #define PPC_TLBILX_PID(a, b)    PPC_TLBILX(1, a, b)
 #define PPC_TLBILX_VA(a, b)     PPC_TLBILX(3, a, b)
 #define PPC_WAIT(w)             stringify_in_c(.long PPC_INST_WAIT | \
                                        __PPC_WC(w))
 #define PPC_TLBIE(lp,a)         stringify_in_c(.long PPC_INST_TLBIE | \
-                                               __PPC_RB(a) | __PPC_RS(lp))
+                                               ___PPC_RB(a) | ___PPC_RS(lp))
 #define PPC_TLBSRX_DOT(a,b)     stringify_in_c(.long PPC_INST_TLBSRX_DOT | \
-                                        __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_TLBIVAX(a,b)        stringify_in_c(.long PPC_INST_TLBIVAX | \
-                                        __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_ERATWE(s, a, w)     stringify_in_c(.long PPC_INST_ERATWE | \
                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
 #define PPC_ERATRE(s, a, w)     stringify_in_c(.long PPC_INST_ERATRE | \
                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
 #define PPC_ERATILX(t, a, b)    stringify_in_c(.long PPC_INST_ERATILX | \
-                                        __PPC_T_TLB(t) | __PPC_RA(a) | \
+                                        __PPC_T_TLB(t) | __PPC_RA0(a) | \
                                        __PPC_RB(b))
 #define PPC_ERATIVAX(s, a, b)   stringify_in_c(.long PPC_INST_ERATIVAX | \
-                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_RS(s) | __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_ERATSX(t, a, w)     stringify_in_c(.long PPC_INST_ERATSX | \
-                                        __PPC_RS(t) | __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_ERATSX_DOT(t, a, w) stringify_in_c(.long PPC_INST_ERATSX_DOT | \
-                                        __PPC_RS(t) | __PPC_RA(a) | __PPC_RB(b))
+                                        __PPC_RS(t) | __PPC_RA0(a) | __PPC_RB(b))
 #define PPC_SLBFEE_DOT(t, b)    stringify_in_c(.long PPC_INST_SLBFEE | \
                                        __PPC_RT(t) | __PPC_RB(b))
+/* PASemi instructions */
+#define LBZCIX(t,a,b)           stringify_in_c(.long PPC_INST_LBZCIX | \
+                                       __PPC_RT(t) | __PPC_RA(a) | __PPC_RB(b))
+#define STBCIX(s,a,b)           stringify_in_c(.long PPC_INST_STBCIX | \
+                                       __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
 /*
 * Define what the VSX XX1 form instructions will look like, then add
@@ -194,11 +272,11 @@
 #define VSX_XX1(s, a, b)        (__PPC_XS(s) | __PPC_RA(a) | __PPC_RB(b))
 #define VSX_XX3(t, a, b)        (__PPC_XT(t) | __PPC_XA(a) | __PPC_XB(b))
 #define STXVD2X(s, a, b)        stringify_in_c(.long PPC_INST_STXVD2X | \
-                                               VSX_XX1((s), (a), (b)))
+                                               VSX_XX1((s), a, b))
 #define LXVD2X(s, a, b)         stringify_in_c(.long PPC_INST_LXVD2X | \
-                                               VSX_XX1((s), (a), (b)))
+                                               VSX_XX1((s), a, b))
 #define XXLOR(t, a, b)          stringify_in_c(.long PPC_INST_XXLOR | \
-                                               VSX_XX3((t), (a), (b)))
+                                               VSX_XX3((t), a, b))
 #define PPC_NAP                 stringify_in_c(.long PPC_INST_NAP)
 #define PPC_SLEEP               stringify_in_c(.long PPC_INST_SLEEP)
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 15444204a3a1..ea2a86e8ff95 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -126,26 +126,26 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #define REST_32VRS(n,b,base)    REST_16VRS(n,b,base); REST_16VRS(n+16,b,base)
 /* Save the lower 32 VSRs in the thread VSR region */
-#define SAVE_VSR(n,b,base)      li b,THREAD_VSR0+(16*(n));  STXVD2X(n,base,b)
+#define SAVE_VSR(n,b,base)      li b,THREAD_VSR0+(16*(n));  STXVD2X(n,R##base,R##b)
 #define SAVE_2VSRS(n,b,base)    SAVE_VSR(n,b,base); SAVE_VSR(n+1,b,base)
 #define SAVE_4VSRS(n,b,base)    SAVE_2VSRS(n,b,base); SAVE_2VSRS(n+2,b,base)
 #define SAVE_8VSRS(n,b,base)    SAVE_4VSRS(n,b,base); SAVE_4VSRS(n+4,b,base)
 #define SAVE_16VSRS(n,b,base)   SAVE_8VSRS(n,b,base); SAVE_8VSRS(n+8,b,base)
 #define SAVE_32VSRS(n,b,base)   SAVE_16VSRS(n,b,base); SAVE_16VSRS(n+16,b,base)
-#define REST_VSR(n,b,base)      li b,THREAD_VSR0+(16*(n)); LXVD2X(n,base,b)
+#define REST_VSR(n,b,base)      li b,THREAD_VSR0+(16*(n)); LXVD2X(n,R##base,R##b)
 #define REST_2VSRS(n,b,base)    REST_VSR(n,b,base); REST_VSR(n+1,b,base)
 #define REST_4VSRS(n,b,base)    REST_2VSRS(n,b,base); REST_2VSRS(n+2,b,base)
 #define REST_8VSRS(n,b,base)    REST_4VSRS(n,b,base); REST_4VSRS(n+4,b,base)
 #define REST_16VSRS(n,b,base)   REST_8VSRS(n,b,base); REST_8VSRS(n+8,b,base)
 #define REST_32VSRS(n,b,base)   REST_16VSRS(n,b,base); REST_16VSRS(n+16,b,base)
 /* Save the upper 32 VSRs (32-63) in the thread VSX region (0-31) */
-#define SAVE_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n));  STXVD2X(n+32,base,b)
+#define SAVE_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n));  STXVD2X(n+32,R##base,R##b)
 #define SAVE_2VSRSU(n,b,base)   SAVE_VSRU(n,b,base); SAVE_VSRU(n+1,b,base)
 #define SAVE_4VSRSU(n,b,base)   SAVE_2VSRSU(n,b,base); SAVE_2VSRSU(n+2,b,base)
 #define SAVE_8VSRSU(n,b,base)   SAVE_4VSRSU(n,b,base); SAVE_4VSRSU(n+4,b,base)
 #define SAVE_16VSRSU(n,b,base)  SAVE_8VSRSU(n,b,base); SAVE_8VSRSU(n+8,b,base)
 #define SAVE_32VSRSU(n,b,base)  SAVE_16VSRSU(n,b,base); SAVE_16VSRSU(n+16,b,base)
-#define REST_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,base,b)
+#define REST_VSRU(n,b,base)     li b,THREAD_VR0+(16*(n)); LXVD2X(n+32,R##base,R##b)
 #define REST_2VSRSU(n,b,base)   REST_VSRU(n,b,base); REST_VSRU(n+1,b,base)
 #define REST_4VSRSU(n,b,base)   REST_2VSRSU(n,b,base); REST_2VSRSU(n+2,b,base)
 #define REST_8VSRSU(n,b,base)   REST_4VSRSU(n,b,base); REST_4VSRSU(n+4,b,base)
@@ -178,9 +178,24 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
 #define HMT_HIGH        or      3,3,3
 #define HMT_EXTRA_HIGH  or      7,7,7           # power7 only
+#ifdef CONFIG_PPC64
+#define ULONG_SIZE      8
+#else
+#define ULONG_SIZE      4
+#endif
+#define __VCPU_GPR(n)   (VCPU_GPRS + (n * ULONG_SIZE))
+#define VCPU_GPR(n)     __VCPU_GPR(__REG_##n)
 #ifdef __KERNEL__
 #ifdef CONFIG_PPC64
+#define STACKFRAMESIZE 256
+#define __STK_REG(i)   (112 + ((i)-14)*8)
+#define STK_REG(i)     __STK_REG(__REG_##i)
+#define __STK_PARAM(i)  (48 + ((i)-3)*8)
+#define STK_PARAM(i)    __STK_PARAM(__REG_##i)
 #define XGLUE(a,b) a##b
 #define GLUE(a,b) XGLUE(a,b)
@@ -295,14 +310,14 @@ n:
 */
 #ifdef __powerpc64__
 #define LOAD_REG_IMMEDIATE(reg,expr)            \
-        lis     (reg),(expr)@highest;           \
+        lis     reg,(expr)@highest;             \
-        ori     (reg),(reg),(expr)@higher;      \
+        ori     reg,reg,(expr)@higher;  \
-        rldicr  (reg),(reg),32,31;              \
+        rldicr  reg,reg,32,31;          \
-        oris    (reg),(reg),(expr)@h;           \
+        oris    reg,reg,(expr)@h;               \
-        ori     (reg),(reg),(expr)@l;
+        ori     reg,reg,(expr)@l;
 #define LOAD_REG_ADDR(reg,name)                 \
-        ld      (reg),name@got(r2)
+        ld      reg,name@got(r2)
 #define LOAD_REG_ADDRBASE(reg,name)     LOAD_REG_ADDR(reg,name)
 #define ADDROFF(name)                   0
@@ -313,12 +328,12 @@ n:
 #else /* 32-bit */
 #define LOAD_REG_IMMEDIATE(reg,expr)            \
-        lis     (reg),(expr)@ha;                \
+        lis     reg,(expr)@ha;          \
-        addi    (reg),(reg),(expr)@l;
+        addi    reg,reg,(expr)@l;
 #define LOAD_REG_ADDR(reg,name)         LOAD_REG_IMMEDIATE(reg, name)
-#define LOAD_REG_ADDRBASE(reg, name)    lis     (reg),name@ha
+#define LOAD_REG_ADDRBASE(reg, name)    lis     reg,name@ha
 #define ADDROFF(name)                   name@l
 /* offsets for stack frame layout */
@@ -372,9 +387,9 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #ifdef CONFIG_PPC64
 #define MTOCRF(FXM, RS)                 \
        BEGIN_FTR_SECTION_NESTED(848);  \
-        mtcrf   (FXM), (RS);            \
+        mtcrf   (FXM), RS;              \
        FTR_SECTION_ELSE_NESTED(848);   \
-        mtocrf (FXM), (RS);             \
+        mtocrf (FXM), RS;               \
        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_NOEXECUTE, 848)
 #endif
@@ -463,6 +478,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #ifdef CONFIG_PPC_BOOK3S_64
 #define RFI             rfid
 #define MTMSRD(r)       mtmsrd  r
+#define MTMSR_EERI(reg) mtmsrd  reg,1
 #else
 #define FIX_SRR1(ra, rb)
 #ifndef CONFIG_40x
@@ -471,6 +487,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define RFI             rfi; b .        /* Prevent prefetch past rfi */
 #endif
 #define MTMSRD(r)       mtmsr   r
+#define MTMSR_EERI(reg) mtmsr   reg
 #define CLR_TOP32(r)
 #endif
@@ -490,40 +507,46 @@ END_FTR_SECTION_IFCLR(CPU_FTR_601)
 #define cr7     7
-/* General Purpose Registers (GPRs) */
+/*
+ * General Purpose Registers (GPRs)
-#define r0      0
+ *
-#define r1      1
+ * The lower case r0-r31 should be used in preference to the upper
-#define r2      2
+ * case R0-R31 as they provide more error checking in the assembler.
-#define r3      3
+ * Use R0-31 only when really nessesary.
-#define r4      4
+ */
-#define r5      5
-#define r6      6
+#define r0      %r0
-#define r7      7
+#define r1      %r1
-#define r8      8
+#define r2      %r2
-#define r9      9
+#define r3      %r3
-#define r10     10
+#define r4      %r4
-#define r11     11
+#define r5      %r5
-#define r12     12
+#define r6      %r6
-#define r13     13
+#define r7      %r7
-#define r14     14
+#define r8      %r8
-#define r15     15
+#define r9      %r9
-#define r16     16
+#define r10     %r10
-#define r17     17
+#define r11     %r11
-#define r18     18
+#define r12     %r12
-#define r19     19
+#define r13     %r13
-#define r20     20
+#define r14     %r14
-#define r21     21
+#define r15     %r15
-#define r22     22
+#define r16     %r16
-#define r23     23
+#define r17     %r17
-#define r24     24
+#define r18     %r18
-#define r25     25
+#define r19     %r19
-#define r26     26
+#define r20     %r20
-#define r27     27
+#define r21     %r21
-#define r28     28
+#define r22     %r22
-#define r29     29
+#define r23     %r23
-#define r30     30
+#define r24     %r24
-#define r31     31
+#define r25     %r25
+#define r26     %r26
+#define r27     %r27
+#define r28     %r28
+#define r29     %r29
+#define r30     %r30
+#define r31     %r31
 /* Floating Point Registers (FPRs) */
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 413a5eaef56c..53b6dfa83344 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -389,10 +389,8 @@ extern int powersave_nap;	/* set if nap mode can be used in idle loop */
 #ifdef CONFIG_PSERIES_IDLE
 extern void update_smt_snooze_delay(int snooze);
-extern int pseries_notify_cpuidle_add_cpu(int cpu);
 #else
 static inline void update_smt_snooze_delay(int snooze) {}
-static inline int pseries_notify_cpuidle_add_cpu(int cpu) { return 0; }
 #endif
 extern void flush_instruction_cache(void);
diff --git a/arch/powerpc/include/asm/qe.h b/arch/powerpc/include/asm/qe.h
index 5e0b6d511e14..229571a49391 100644
--- a/arch/powerpc/include/asm/qe.h
+++ b/arch/powerpc/include/asm/qe.h
@@ -499,6 +499,7 @@ enum comm_dir {
 /* I-RAM */
 #define QE_IRAM_IADD_AIE        0x80000000      /* Auto Increment Enable */
 #define QE_IRAM_IADD_BADDR      0x00080000      /* Base Address */
+#define QE_IRAM_READY           0x80000000      /* Ready */
 /* UPC */
 #define UPGCR_PROTOCOL  0x80000000      /* protocol ul2 or pl2 */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index f0cb7f461b9d..638608677e2a 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -491,6 +491,7 @@
 #define SPRN_SPRG1      0x111   /* Special Purpose Register General 1 */
 #define SPRN_SPRG2      0x112   /* Special Purpose Register General 2 */
 #define SPRN_SPRG3      0x113   /* Special Purpose Register General 3 */
+#define SPRN_USPRG3     0x103   /* SPRG3 userspace read */
 #define SPRN_SPRG4      0x114   /* Special Purpose Register General 4 */
 #define SPRN_SPRG5      0x115   /* Special Purpose Register General 5 */
 #define SPRN_SPRG6      0x116   /* Special Purpose Register General 6 */
@@ -753,14 +754,14 @@
 * 64-bit server:
 *      - SPRG0 unused (reserved for HV on Power4)
 *      - SPRG2 scratch for exception vectors
- *      - SPRG3 unused (user visible)
+ *      - SPRG3 CPU and NUMA node for VDSO getcpu (user visible)
 *      - HSPRG0 stores PACA in HV mode
 *      - HSPRG1 scratch for "HV" exceptions
 *
 * 64-bit embedded
 *      - SPRG0 generic exception scratch
 *      - SPRG2 TLB exception stack
- *      - SPRG3 unused (user visible)
+ *      - SPRG3 CPU and NUMA node for VDSO getcpu (user visible)
 *      - SPRG4 unused (user visible)
 *      - SPRG6 TLB miss scratch (user visible, sorry !)
 *      - SPRG7 critical exception scratch
@@ -1024,7 +1025,8 @@
 /* Macros for setting and retrieving special purpose registers */
 #ifndef __ASSEMBLY__
 #define mfmsr()         ({unsigned long rval; \
-                        asm volatile("mfmsr %0" : "=r" (rval)); rval;})
+                        asm volatile("mfmsr %0" : "=r" (rval) : \
+                                                : "memory"); rval;})
 #ifdef CONFIG_PPC_BOOK3S_64
 #define __mtmsrd(v, l)  asm volatile("mtmsrd %0," __stringify(l) \
                                     : : "r" (v) : "memory")
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 68831e9cf82f..faf93529cbf0 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -22,6 +22,12 @@
 #define THREAD_SIZE             (1 << THREAD_SHIFT)
+#ifdef CONFIG_PPC64
+#define CURRENT_THREAD_INFO(dest, sp)   clrrdi dest, sp, THREAD_SHIFT
+#else
+#define CURRENT_THREAD_INFO(dest, sp)   rlwinm dest, sp, 0, 0, 31-THREAD_SHIFT
+#endif
 #ifndef __ASSEMBLY__
 #include <linux/cache.h>
 #include <asm/processor.h>
diff --git a/arch/powerpc/include/asm/trace.h b/arch/powerpc/include/asm/trace.h
index cbe2297d68b6..5712f06905a9 100644
--- a/arch/powerpc/include/asm/trace.h
+++ b/arch/powerpc/include/asm/trace.h
@@ -8,7 +8,7 @@
 struct pt_regs;
-TRACE_EVENT(irq_entry,
+DECLARE_EVENT_CLASS(ppc64_interrupt_class,
        TP_PROTO(struct pt_regs *regs),
@@ -25,55 +25,32 @@ TRACE_EVENT(irq_entry,
        TP_printk("pt_regs=%p", __entry->regs)
 );
-TRACE_EVENT(irq_exit,
+DEFINE_EVENT(ppc64_interrupt_class, irq_entry,
        TP_PROTO(struct pt_regs *regs),
-        TP_ARGS(regs),
+        TP_ARGS(regs)
-        TP_STRUCT__entry(
-                __field(struct pt_regs *, regs)
-        ),
-        TP_fast_assign(
-                __entry->regs = regs;
-        ),
-        TP_printk("pt_regs=%p", __entry->regs)
 );
-TRACE_EVENT(timer_interrupt_entry,
+DEFINE_EVENT(ppc64_interrupt_class, irq_exit,
        TP_PROTO(struct pt_regs *regs),
-        TP_ARGS(regs),
+        TP_ARGS(regs)
-        TP_STRUCT__entry(
-                __field(struct pt_regs *, regs)
-        ),
-        TP_fast_assign(
-                __entry->regs = regs;
-        ),
-        TP_printk("pt_regs=%p", __entry->regs)
 );
-TRACE_EVENT(timer_interrupt_exit,
+DEFINE_EVENT(ppc64_interrupt_class, timer_interrupt_entry,
        TP_PROTO(struct pt_regs *regs),
-        TP_ARGS(regs),
+        TP_ARGS(regs)
+);
-        TP_STRUCT__entry(
+DEFINE_EVENT(ppc64_interrupt_class, timer_interrupt_exit,
-                __field(struct pt_regs *, regs)
-        ),
-        TP_fast_assign(
+        TP_PROTO(struct pt_regs *regs),
-                __entry->regs = regs;
-        ),
-        TP_printk("pt_regs=%p", __entry->regs)
+        TP_ARGS(regs)
 );
 #ifdef CONFIG_PPC_PSERIES
diff --git a/arch/powerpc/include/asm/vdso.h b/arch/powerpc/include/asm/vdso.h
index dc0419b66f17..50f261bc3e95 100644
--- a/arch/powerpc/include/asm/vdso.h
+++ b/arch/powerpc/include/asm/vdso.h
@@ -22,6 +22,8 @@ extern unsigned long vdso64_rt_sigtramp;
 extern unsigned long vdso32_sigtramp;
 extern unsigned long vdso32_rt_sigtramp;
+int __cpuinit vdso_getcpu_init(void);
 #else /* __ASSEMBLY__ */
 #ifdef __VDSO64__
diff --git a/arch/powerpc/include/asm/vio.h b/arch/powerpc/include/asm/vio.h
index b19adf751dd9..df81cb72d1e0 100644
--- a/arch/powerpc/include/asm/vio.h
+++ b/arch/powerpc/include/asm/vio.h
@@ -44,6 +44,8 @@
 */
 #define VIO_CMO_MIN_ENT 1562624
+extern struct bus_type vio_bus_type;
 struct iommu_table;
 /*
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 52c7ad78242e..85b05c463fae 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -533,6 +533,7 @@ int main(void)
        HSTATE_FIELD(HSTATE_VMHANDLER, vmhandler);
        HSTATE_FIELD(HSTATE_SCRATCH0, scratch0);
        HSTATE_FIELD(HSTATE_SCRATCH1, scratch1);
+        HSTATE_FIELD(HSTATE_SPRG3, sprg3);
        HSTATE_FIELD(HSTATE_IN_GUEST, in_guest);
        HSTATE_FIELD(HSTATE_RESTORE_HID5, restore_hid5);
        HSTATE_FIELD(HSTATE_NAPPING, napping);
diff --git a/arch/powerpc/kernel/cpu_setup_a2.S b/arch/powerpc/kernel/cpu_setup_a2.S
index ebc62f42a237..61f079e05b61 100644
--- a/arch/powerpc/kernel/cpu_setup_a2.S
+++ b/arch/powerpc/kernel/cpu_setup_a2.S
@@ -100,19 +100,19 @@ _icswx_skip_guest:
        lis     r4,(MMUCR0_TLBSEL_I|MMUCR0_ECL)@h
        mtspr   SPRN_MMUCR0, r4
        li      r4,A2_IERAT_SIZE-1
-        PPC_ERATWE(r4,r4,3)
+        PPC_ERATWE(R4,R4,3)
        /* Now set the D-ERAT watermark to 31 */
        lis     r4,(MMUCR0_TLBSEL_D|MMUCR0_ECL)@h
        mtspr   SPRN_MMUCR0, r4
        li      r4,A2_DERAT_SIZE-1
-        PPC_ERATWE(r4,r4,3)
+        PPC_ERATWE(R4,R4,3)
        /* And invalidate the beast just in case. That won't get rid of
         * a bolted entry though it will be in LRU and so will go away eventually
         * but let's not bother for now
         */
-        PPC_ERATILX(0,0,0)
+        PPC_ERATILX(0,0,R0)
 1:
        blr
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index b1ec983dcec8..289be751cd75 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -11,6 +11,8 @@
 #include <linux/gfp.h>
 #include <linux/memblock.h>
 #include <linux/export.h>
+#include <linux/pci.h>
+#include <asm/vio.h>
 #include <asm/bug.h>
 #include <asm/abs_addr.h>
 #include <asm/machdep.h>
@@ -205,7 +207,13 @@ EXPORT_SYMBOL_GPL(dma_get_required_mask);
 static int __init dma_init(void)
 {
-       dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
+        dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
+#ifdef CONFIG_PCI
+        dma_debug_add_bus(&pci_bus_type);
+#endif
+#ifdef CONFIG_IBMVIO
+        dma_debug_add_bus(&vio_bus_type);
+#endif
       return 0;
 }
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index ba3aeb4bc06a..5207d5a405e2 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -92,7 +92,7 @@ crit_transfer_to_handler:
        mfspr   r8,SPRN_SPRG_THREAD
        lwz     r0,KSP_LIMIT(r8)
        stw     r0,SAVED_KSP_LIMIT(r11)
-        rlwimi  r0,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r0, r1)
        stw     r0,KSP_LIMIT(r8)
        /* fall through */
 #endif
@@ -112,7 +112,7 @@ crit_transfer_to_handler:
        mfspr   r8,SPRN_SPRG_THREAD
        lwz     r0,KSP_LIMIT(r8)
        stw     r0,saved_ksp_limit@l(0)
-        rlwimi  r0,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r0, r1)
        stw     r0,KSP_LIMIT(r8)
        /* fall through */
 #endif
@@ -158,7 +158,7 @@ transfer_to_handler:
        tophys(r11,r11)
        addi    r11,r11,global_dbcr0@l
 #ifdef CONFIG_SMP
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r9,TI_CPU(r9)
        slwi    r9,r9,3
        add     r11,r11,r9
@@ -179,7 +179,7 @@ transfer_to_handler:
        ble-    stack_ovf               /* then the kernel stack overflowed */
 5:
 #if defined(CONFIG_6xx) || defined(CONFIG_E500)
-        rlwinm  r9,r1,0,0,31-THREAD_SHIFT
+        CURRENT_THREAD_INFO(r9, r1)
        tophys(r9,r9)                   /* check local flags */
        lwz     r12,TI_LOCAL_FLAGS(r9)
        mtcrf   0x01,r12
@@ -226,13 +226,7 @@ reenable_mmu:				/* re-enable mmu so we can */
        stw     r3,16(r1)
        stw     r4,20(r1)
        stw     r5,24(r1)
-        andi.   r12,r12,MSR_PR
-        b       11f
        bl      trace_hardirqs_off
-        b       12f
-11:
-        bl      trace_hardirqs_off
-12:
        lwz     r5,24(r1)
        lwz     r4,20(r1)
        lwz     r3,16(r1)
@@ -333,7 +327,7 @@ _GLOBAL(DoSyscall)
        mtmsr   r11
 1:
 #endif /* CONFIG_TRACE_IRQFLAGS */
-        rlwinm  r10,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        CURRENT_THREAD_INFO(r10, r1)
        lwz     r11,TI_FLAGS(r10)
        andi.   r11,r11,_TIF_SYSCALL_T_OR_A
        bne-    syscall_dotrace
@@ -354,7 +348,7 @@ ret_from_syscall:
        bl      do_show_syscall_exit
 #endif
        mr      r6,r3
-        rlwinm  r12,r1,0,0,(31-THREAD_SHIFT)    /* current_thread_info() */
+        CURRENT_THREAD_INFO(r12, r1)
        /* disable interrupts so current_thread_info()->flags can't change */
        LOAD_MSR_KERNEL(r10,MSR_KERNEL) /* doesn't include MSR_EE */
        /* Note: We don't bother telling lockdep about it */
@@ -815,7 +809,7 @@ ret_from_except:
 user_exc_return:                /* r10 contains MSR_KERNEL here */
        /* Check current_thread_info()->flags */
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r9,TI_FLAGS(r9)
        andi.   r0,r9,_TIF_USER_WORK_MASK
        bne     do_work
@@ -835,7 +829,7 @@ restore_user:
 /* N.B. the only way to get here is from the beq following ret_from_except. */
 resume_kernel:
        /* check current_thread_info->preempt_count */
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r0,TI_PREEMPT(r9)
        cmpwi   0,r0,0          /* if non-zero, just restore regs and return */
        bne     restore
@@ -852,7 +846,7 @@ resume_kernel:
        bl      trace_hardirqs_off
 #endif
 1:      bl      preempt_schedule_irq
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r3,TI_FLAGS(r9)
        andi.   r0,r3,_TIF_NEED_RESCHED
        bne-    1b
@@ -1122,7 +1116,7 @@ ret_from_debug_exc:
        lwz     r10,SAVED_KSP_LIMIT(r1)
        stw     r10,KSP_LIMIT(r9)
        lwz     r9,THREAD_INFO-THREAD(r9)
-        rlwinm  r10,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r10, r1)
        lwz     r10,TI_PREEMPT(r10)
        stw     r10,TI_PREEMPT(r9)
        RESTORE_xSRR(SRR0,SRR1);
@@ -1156,7 +1150,7 @@ load_dbcr0:
        lis     r11,global_dbcr0@ha
        addi    r11,r11,global_dbcr0@l
 #ifdef CONFIG_SMP
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r9,TI_CPU(r9)
        slwi    r9,r9,3
        add     r11,r11,r9
@@ -1197,7 +1191,7 @@ recheck:
        LOAD_MSR_KERNEL(r10,MSR_KERNEL)
        SYNC
        MTMSRD(r10)             /* disable interrupts */
-        rlwinm  r9,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r9,TI_FLAGS(r9)
        andi.   r0,r9,_TIF_NEED_RESCHED
        bne-    do_resched
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index ed1718feb9d9..4b01a25e29ef 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -146,7 +146,7 @@ END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
        REST_2GPRS(7,r1)
        addi    r9,r1,STACK_FRAME_OVERHEAD
 #endif
-        clrrdi  r11,r1,THREAD_SHIFT
+        CURRENT_THREAD_INFO(r11, r1)
        ld      r10,TI_FLAGS(r11)
        andi.   r11,r10,_TIF_SYSCALL_T_OR_A
        bne-    syscall_dotrace
@@ -181,7 +181,7 @@ syscall_exit:
        bl      .do_show_syscall_exit
        ld      r3,RESULT(r1)
 #endif
-        clrrdi  r12,r1,THREAD_SHIFT
+        CURRENT_THREAD_INFO(r12, r1)
        ld      r8,_MSR(r1)
 #ifdef CONFIG_PPC_BOOK3S
@@ -197,7 +197,16 @@ syscall_exit:
        wrteei  0
 #else
        ld      r10,PACAKMSR(r13)
-        mtmsrd  r10,1
+        /*
+         * For performance reasons we clear RI the same time that we
+         * clear EE. We only need to clear RI just before we restore r13
+         * below, but batching it with EE saves us one expensive mtmsrd call.
+         * We have to be careful to restore RI if we branch anywhere from
+         * here (eg syscall_exit_work).
+         */
+        li      r9,MSR_RI
+        andc    r11,r10,r9
+        mtmsrd  r11,1
 #endif /* CONFIG_PPC_BOOK3E */
        ld      r9,TI_FLAGS(r12)
@@ -214,17 +223,6 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
        andi.   r6,r8,MSR_PR
        ld      r4,_LINK(r1)
-        /*
-         * Clear RI before restoring r13.  If we are returning to
-         * userspace and we take an exception after restoring r13,
-         * we end up corrupting the userspace r13 value.
-         */
-#ifdef CONFIG_PPC_BOOK3S
-        /* No MSR:RI on BookE */
-        li      r12,MSR_RI
-        andc    r11,r10,r12
-        mtmsrd  r11,1                   /* clear MSR.RI */
-#endif /* CONFIG_PPC_BOOK3S */
        beq-    1f
        ACCOUNT_CPU_USER_EXIT(r11, r12)
@@ -262,7 +260,7 @@ syscall_dotrace:
        ld      r7,GPR7(r1)
        ld      r8,GPR8(r1)
        addi    r9,r1,STACK_FRAME_OVERHEAD
-        clrrdi  r10,r1,THREAD_SHIFT
+        CURRENT_THREAD_INFO(r10, r1)
        ld      r10,TI_FLAGS(r10)
        b       .Lsyscall_dotrace_cont
@@ -271,6 +269,9 @@ syscall_enosys:
        b       syscall_exit
        
 syscall_exit_work:
+#ifdef CONFIG_PPC_BOOK3S
+        mtmsrd  r10,1           /* Restore RI */
+#endif
        /* If TIF_RESTOREALL is set, don't scribble on either r3 or ccr.
         If TIF_NOERROR is set, just save r3 as it is. */
@@ -499,7 +500,7 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
 2:
 #endif /* !CONFIG_PPC_BOOK3S */
-        clrrdi  r7,r8,THREAD_SHIFT      /* base of new stack */
+        CURRENT_THREAD_INFO(r7, r8)  /* base of new stack */
        /* Note: this uses SWITCH_FRAME_SIZE rather than INT_FRAME_SIZE
           because we don't need to leave the 288-byte ABI gap at the
           top of the kernel stack. */
@@ -558,27 +559,54 @@ _GLOBAL(ret_from_except_lite)
        mtmsrd  r10,1             /* Update machine state */
 #endif /* CONFIG_PPC_BOOK3E */
-#ifdef CONFIG_PREEMPT
+        CURRENT_THREAD_INFO(r9, r1)
-        clrrdi  r9,r1,THREAD_SHIFT      /* current_thread_info() */
-        li      r0,_TIF_NEED_RESCHED    /* bits to check */
        ld      r3,_MSR(r1)
        ld      r4,TI_FLAGS(r9)
-        /* Move MSR_PR bit in r3 to _TIF_SIGPENDING position in r0 */
-        rlwimi  r0,r3,32+TIF_SIGPENDING-MSR_PR_LG,_TIF_SIGPENDING
-        and.    r0,r4,r0        /* check NEED_RESCHED and maybe SIGPENDING */
-        bne     do_work
-#else /* !CONFIG_PREEMPT */
-        ld      r3,_MSR(r1)     /* Returning to user mode? */
        andi.   r3,r3,MSR_PR
-        beq     restore         /* if not, just restore regs and return */
+        beq     resume_kernel
        /* Check current_thread_info()->flags */
-        clrrdi  r9,r1,THREAD_SHIFT
-        ld      r4,TI_FLAGS(r9)
        andi.   r0,r4,_TIF_USER_WORK_MASK
-        bne     do_work
+        beq     restore
-#endif /* !CONFIG_PREEMPT */
+        andi.   r0,r4,_TIF_NEED_RESCHED
+        beq     1f
+        bl      .restore_interrupts
+        bl      .schedule
+        b       .ret_from_except_lite
+1:      bl      .save_nvgprs
+        bl      .restore_interrupts
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .do_notify_resume
+        b       .ret_from_except
+resume_kernel:
+#ifdef CONFIG_PREEMPT
+        /* Check if we need to preempt */
+        andi.   r0,r4,_TIF_NEED_RESCHED
+        beq+    restore
+        /* Check that preempt_count() == 0 and interrupts are enabled */
+        lwz     r8,TI_PREEMPT(r9)
+        cmpwi   cr1,r8,0
+        ld      r0,SOFTE(r1)
+        cmpdi   r0,0
+        crandc  eq,cr1*4+eq,eq
+        bne     restore
+        /*
+         * Here we are preempting the current task. We want to make
+         * sure we are soft-disabled first
+         */
+        SOFT_DISABLE_INTS(r3,r4)
+1:      bl      .preempt_schedule_irq
+        /* Re-test flags and eventually loop */
+        CURRENT_THREAD_INFO(r9, r1)
+        ld      r4,TI_FLAGS(r9)
+        andi.   r0,r4,_TIF_NEED_RESCHED
+        bne     1b
+#endif /* CONFIG_PREEMPT */
        .globl  fast_exc_return_irq
 fast_exc_return_irq:
@@ -759,50 +787,6 @@ restore_check_irq_replay:
 #endif /* CONFIG_PPC_BOOK3E */
 1:      b       .ret_from_except /* What else to do here ? */
 
-3:
-do_work:
-#ifdef CONFIG_PREEMPT
-        andi.   r0,r3,MSR_PR    /* Returning to user mode? */
-        bne     user_work
-        /* Check that preempt_count() == 0 and interrupts are enabled */
-        lwz     r8,TI_PREEMPT(r9)
-        cmpwi   cr1,r8,0
-        ld      r0,SOFTE(r1)
-        cmpdi   r0,0
-        crandc  eq,cr1*4+eq,eq
-        bne     restore
-        /*
-         * Here we are preempting the current task. We want to make
-         * sure we are soft-disabled first
-         */
-        SOFT_DISABLE_INTS(r3,r4)
-1:      bl      .preempt_schedule_irq
-        /* Re-test flags and eventually loop */
-        clrrdi  r9,r1,THREAD_SHIFT
-        ld      r4,TI_FLAGS(r9)
-        andi.   r0,r4,_TIF_NEED_RESCHED
-        bne     1b
-        b       restore
-user_work:
-#endif /* CONFIG_PREEMPT */
-        andi.   r0,r4,_TIF_NEED_RESCHED
-        beq     1f
-        bl      .restore_interrupts
-        bl      .schedule
-        b       .ret_from_except_lite
-1:      bl      .save_nvgprs
-        bl      .restore_interrupts
-        addi    r3,r1,STACK_FRAME_OVERHEAD
-        bl      .do_notify_resume
-        b       .ret_from_except
 unrecov_restore:
        addi    r3,r1,STACK_FRAME_OVERHEAD
        bl      .unrecoverable_exception
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 7215cc2495df..98be7f0cd227 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -222,7 +222,7 @@ exc_##n##_bad_stack:							    \
 * interrupts happen before the wait instruction.
 */
 #define CHECK_NAPPING()                                                 \
-        clrrdi  r11,r1,THREAD_SHIFT;                                    \
+        CURRENT_THREAD_INFO(r11, r1);                                   \
        ld      r10,TI_LOCAL_FLAGS(r11);                                \
        andi.   r9,r10,_TLF_NAPPING;                                    \
        beq+    1f;                                                     \
@@ -903,7 +903,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
        bne     1b                              /* If not, repeat */
        /* Invalidate all TLBs */
-        PPC_TLBILX_ALL(0,0)
+        PPC_TLBILX_ALL(0,R0)
        sync
        isync
@@ -961,7 +961,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
        tlbwe
        /* Invalidate TLB1 */
-        PPC_TLBILX_ALL(0,0)
+        PPC_TLBILX_ALL(0,R0)
        sync
        isync
@@ -1020,7 +1020,7 @@ skpinv:	addi	r6,r6,1				/* Increment */
        tlbwe
        /* Invalidate TLB1 */
-        PPC_TLBILX_ALL(0,0)
+        PPC_TLBILX_ALL(0,R0)
        sync
        isync
@@ -1138,7 +1138,7 @@ a2_tlbinit_after_iprot_flush:
        tlbwe
 #endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
-        PPC_TLBILX(0,0,0)
+        PPC_TLBILX(0,0,R0)
        sync
        isync
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index 1c06d2971545..e894515e77bb 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -239,6 +239,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
         * out of line to handle them
         */
        . = 0xe00
+hv_exception_trampoline:
        b       h_data_storage_hv
        . = 0xe20
        b       h_instr_storage_hv
@@ -851,7 +852,7 @@ BEGIN_FTR_SECTION
        bne-    do_ste_alloc            /* If so handle it */
 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
-        clrrdi  r11,r1,THREAD_SHIFT
+        CURRENT_THREAD_INFO(r11, r1)
        lwz     r0,TI_PREEMPT(r11)      /* If we're in an "NMI" */
        andis.  r0,r0,NMI_MASK@h        /* (i.e. an irq when soft-disabled) */
        bne     77f                     /* then don't call hash_page now */
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index de369558bf0a..e0ada05f2df3 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -26,7 +26,7 @@
 #include <asm/ptrace.h>
 #ifdef CONFIG_VSX
-#define REST_32FPVSRS(n,c,base)                                         \
+#define __REST_32FPVSRS(n,c,base)                                       \
 BEGIN_FTR_SECTION                                                       \
        b       2f;                                                     \
 END_FTR_SECTION_IFSET(CPU_FTR_VSX);                                     \
@@ -35,7 +35,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX);					\
 2:      REST_32VSRS(n,c,base);                                          \
 3:
-#define SAVE_32FPVSRS(n,c,base)                                         \
+#define __SAVE_32FPVSRS(n,c,base)                                       \
 BEGIN_FTR_SECTION                                                       \
        b       2f;                                                     \
 END_FTR_SECTION_IFSET(CPU_FTR_VSX);                                     \
@@ -44,9 +44,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX);					\
 2:      SAVE_32VSRS(n,c,base);                                          \
 3:
 #else
-#define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
+#define __REST_32FPVSRS(n,b,base)       REST_32FPRS(n, base)
-#define SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
+#define __SAVE_32FPVSRS(n,b,base)       SAVE_32FPRS(n, base)
 #endif
+#define REST_32FPVSRS(n,c,base) __REST_32FPVSRS(n,__REG_##c,__REG_##base)
+#define SAVE_32FPVSRS(n,c,base) __SAVE_32FPVSRS(n,__REG_##c,__REG_##base)
 /*
 * This task wants to use the FPU now.
@@ -79,7 +81,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
        beq     1f
        toreal(r4)
        addi    r4,r4,THREAD            /* want last_task_used_math->thread */
-        SAVE_32FPVSRS(0, r5, r4)
+        SAVE_32FPVSRS(0, R5, R4)
        mffs    fr0
        stfd    fr0,THREAD_FPSCR(r4)
        PPC_LL  r5,PT_REGS(r4)
@@ -106,7 +108,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 #endif
        lfd     fr0,THREAD_FPSCR(r5)
        MTFSF_L(fr0)
-        REST_32FPVSRS(0, r4, r5)
+        REST_32FPVSRS(0, R4, R5)
 #ifndef CONFIG_SMP
        subi    r4,r5,THREAD
        fromreal(r4)
@@ -140,7 +142,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
        addi    r3,r3,THREAD            /* want THREAD of task */
        PPC_LL  r5,PT_REGS(r3)
        PPC_LCMPI       0,r5,0
-        SAVE_32FPVSRS(0, r4 ,r3)
+        SAVE_32FPVSRS(0, R4 ,R3)
        mffs    fr0
        stfd    fr0,THREAD_FPSCR(r3)
        beq     1f
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index bf99cfa6bbfe..91b46b7f6f0d 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -63,11 +63,9 @@ ftrace_modify_code(unsigned long ip, unsigned int old, unsigned int new)
                return -EINVAL;
        /* replace the text with the new text */
-        if (probe_kernel_write((void *)ip, &new, MCOUNT_INSN_SIZE))
+        if (patch_instruction((unsigned int *)ip, new))
                return -EPERM;
-        flush_icache_range(ip, ip + 8);
        return 0;
 }
@@ -212,12 +210,9 @@ __ftrace_make_nop(struct module *mod,
         */
        op = 0x48000008;        /* b +8 */
-        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+        if (patch_instruction((unsigned int *)ip, op))
                return -EPERM;
-        flush_icache_range(ip, ip + 8);
        return 0;
 }
@@ -245,9 +240,9 @@ __ftrace_make_nop(struct module *mod,
        /*
         * On PPC32 the trampoline looks like:
-         *  0x3d, 0x60, 0x00, 0x00  lis r11,sym@ha
+         *  0x3d, 0x80, 0x00, 0x00  lis r12,sym@ha
-         *  0x39, 0x6b, 0x00, 0x00  addi r11,r11,sym@l
+         *  0x39, 0x8c, 0x00, 0x00  addi r12,r12,sym@l
-         *  0x7d, 0x69, 0x03, 0xa6  mtctr r11
+         *  0x7d, 0x89, 0x03, 0xa6  mtctr r12
         *  0x4e, 0x80, 0x04, 0x20  bctr
         */
@@ -262,9 +257,9 @@ __ftrace_make_nop(struct module *mod,
        pr_devel(" %08x %08x ", jmp[0], jmp[1]);
        /* verify that this is what we expect it to be */
-        if (((jmp[0] & 0xffff0000) != 0x3d600000) ||
+        if (((jmp[0] & 0xffff0000) != 0x3d800000) ||
-            ((jmp[1] & 0xffff0000) != 0x396b0000) ||
+            ((jmp[1] & 0xffff0000) != 0x398c0000) ||
-            (jmp[2] != 0x7d6903a6) ||
+            (jmp[2] != 0x7d8903a6) ||
            (jmp[3] != 0x4e800420)) {
                printk(KERN_ERR "Not a trampoline\n");
                return -EINVAL;
@@ -286,11 +281,9 @@ __ftrace_make_nop(struct module *mod,
        op = PPC_INST_NOP;
-        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+        if (patch_instruction((unsigned int *)ip, op))
                return -EPERM;
-        flush_icache_range(ip, ip + 8);
        return 0;
 }
 #endif /* PPC64 */
@@ -426,11 +419,9 @@ __ftrace_make_call(struct dyn_ftrace *rec, unsigned long addr)
        pr_devel("write to %lx\n", rec->ip);
-        if (probe_kernel_write((void *)ip, &op, MCOUNT_INSN_SIZE))
+        if (patch_instruction((unsigned int *)ip, op))
                return -EPERM;
-        flush_icache_range(ip, ip + 8);
        return 0;
 }
 #endif /* CONFIG_PPC64 */
@@ -484,6 +475,58 @@ int ftrace_update_ftrace_func(ftrace_func_t func)
        return ret;
 }
+static int __ftrace_replace_code(struct dyn_ftrace *rec, int enable)
+{
+        unsigned long ftrace_addr = (unsigned long)FTRACE_ADDR;
+        int ret;
+        ret = ftrace_update_record(rec, enable);
+        switch (ret) {
+        case FTRACE_UPDATE_IGNORE:
+                return 0;
+        case FTRACE_UPDATE_MAKE_CALL:
+                return ftrace_make_call(rec, ftrace_addr);
+        case FTRACE_UPDATE_MAKE_NOP:
+                return ftrace_make_nop(NULL, rec, ftrace_addr);
+        }
+        return 0;
+}
+void ftrace_replace_code(int enable)
+{
+        struct ftrace_rec_iter *iter;
+        struct dyn_ftrace *rec;
+        int ret;
+        for (iter = ftrace_rec_iter_start(); iter;
+             iter = ftrace_rec_iter_next(iter)) {
+                rec = ftrace_rec_iter_record(iter);
+                ret = __ftrace_replace_code(rec, enable);
+                if (ret) {
+                        ftrace_bug(ret, rec->ip);
+                        return;
+                }
+        }
+}
+void arch_ftrace_update_code(int command)
+{
+        if (command & FTRACE_UPDATE_CALLS)
+                ftrace_replace_code(1);
+        else if (command & FTRACE_DISABLE_CALLS)
+                ftrace_replace_code(0);
+        if (command & FTRACE_UPDATE_TRACE_FUNC)
+                ftrace_update_ftrace_func(ftrace_trace_function);
+        if (command & FTRACE_START_FUNC_RET)
+                ftrace_enable_ftrace_graph_caller();
+        else if (command & FTRACE_STOP_FUNC_RET)
+                ftrace_disable_ftrace_graph_caller();
+}
 int __init ftrace_dyn_arch_init(void *data)
 {
        /* caller expects data to be zero */
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 1f4434a38608..0f59863c3ade 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -192,7 +192,7 @@ _ENTRY(__early_start)
        li      r0,0
        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
-        rlwinm  r22,r1,0,0,31-THREAD_SHIFT      /* current thread_info */
+        CURRENT_THREAD_INFO(r22, r1)
        stw     r24, TI_CPU(r22)
        bl      early_init
@@ -556,8 +556,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_EMB_HV)
        /* SPE Unavailable */
        START_EXCEPTION(SPEUnavailable)
        NORMAL_EXCEPTION_PROLOG(SPE_UNAVAIL)
-        bne     load_up_spe
+        beq     1f
-        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      load_up_spe
+        b       fast_exception_return
+1:      addi    r3,r1,STACK_FRAME_OVERHEAD
        EXC_XFER_EE_LITE(0x2010, KernelSPE)
 #else
        EXCEPTION(0x2020, SPE_UNAVAIL, SPEUnavailable, \
@@ -778,7 +780,7 @@ tlb_write_entry:
 /* Note that the SPE support is closely modeled after the AltiVec
 * support.  Changes to one are likely to be applicable to the
 * other!  */
-load_up_spe:
+_GLOBAL(load_up_spe)
 /*
 * Disable SPE for the task which had SPE previously,
 * and save its SPE registers in its thread_struct.
@@ -826,20 +828,7 @@ load_up_spe:
        subi    r4,r5,THREAD
        stw     r4,last_task_used_spe@l(r3)
 #endif /* !CONFIG_SMP */
-        /* restore registers and return */
+        blr
-2:      REST_4GPRS(3, r11)
-        lwz     r10,_CCR(r11)
-        REST_GPR(1, r11)
-        mtcr    r10
-        lwz     r10,_LINK(r11)
-        mtlr    r10
-        REST_GPR(10, r11)
-        mtspr   SPRN_SRR1,r9
-        mtspr   SPRN_SRR0,r12
-        REST_GPR(9, r11)
-        REST_GPR(12, r11)
-        lwz     r11,GPR11(r11)
-        rfi
 /*
 * SPE unavailable trap from kernel - print a message, but let
diff --git a/arch/powerpc/kernel/hw_breakpoint.c b/arch/powerpc/kernel/hw_breakpoint.c
index 2bc0584be81c..f3a82dde61db 100644
--- a/arch/powerpc/kernel/hw_breakpoint.c
+++ b/arch/powerpc/kernel/hw_breakpoint.c
@@ -111,7 +111,7 @@ void arch_unregister_hw_breakpoint(struct perf_event *bp)
         * and the single_step_dabr_instruction(), then cleanup the breakpoint
         * restoration variables to prevent dangling pointers.
         */
-        if (bp->ctx->task)
+        if (bp->ctx && bp->ctx->task)
                bp->ctx->task->thread.last_hit_ubp = NULL;
 }
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 15c611de1ee2..1686916cc7f0 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -135,7 +135,7 @@ BEGIN_FTR_SECTION
        DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-        rlwinm  r9,r1,0,0,31-THREAD_SHIFT       /* current thread_info */
+        CURRENT_THREAD_INFO(r9, r1)
        lwz     r8,TI_LOCAL_FLAGS(r9)   /* set napping bit */
        ori     r8,r8,_TLF_NAPPING      /* so when we take an exception */
        stw     r8,TI_LOCAL_FLAGS(r9)   /* it will return to our caller */
@@ -158,7 +158,7 @@ _GLOBAL(power_save_ppc32_restore)
        stw     r9,_NIP(r11)            /* make it do a blr */
 #ifdef CONFIG_SMP
-        rlwinm  r12,r11,0,0,31-THREAD_SHIFT
+        CURRENT_THREAD_INFO(r12, r11)
        lwz     r11,TI_CPU(r12)         /* get cpu number * 4 */
        slwi    r11,r11,2
 #else
diff --git a/arch/powerpc/kernel/idle_book3e.S b/arch/powerpc/kernel/idle_book3e.S
index ff007b59448d..4c7cb4008585 100644
--- a/arch/powerpc/kernel/idle_book3e.S
+++ b/arch/powerpc/kernel/idle_book3e.S
@@ -60,7 +60,7 @@ _GLOBAL(book3e_idle)
 1:      /* Let's set the _TLF_NAPPING flag so interrupts make us return
         * to the right spot
        */
-        clrrdi  r11,r1,THREAD_SHIFT
+        CURRENT_THREAD_INFO(r11, r1)
        ld      r10,TI_LOCAL_FLAGS(r11)
        ori     r10,r10,_TLF_NAPPING
        std     r10,TI_LOCAL_FLAGS(r11)
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
index 4f0ab85f3788..15448668988d 100644
--- a/arch/powerpc/kernel/idle_e500.S
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -21,7 +21,7 @@
        .text
 _GLOBAL(e500_idle)
-        rlwinm  r3,r1,0,0,31-THREAD_SHIFT       /* current thread_info */
+        CURRENT_THREAD_INFO(r3, r1)
        lwz     r4,TI_LOCAL_FLAGS(r3)   /* set napping bit */
        ori     r4,r4,_TLF_NAPPING      /* so when we take an exception */
        stw     r4,TI_LOCAL_FLAGS(r3)   /* it will return to our caller */
@@ -96,7 +96,7 @@ _GLOBAL(power_save_ppc32_restore)
        stw     r9,_NIP(r11)            /* make it do a blr */
 #ifdef CONFIG_SMP
-        rlwinm  r12,r1,0,0,31-THREAD_SHIFT
+        CURRENT_THREAD_INFO(r12, r1)
        lwz     r11,TI_CPU(r12)         /* get cpu number * 4 */
        slwi    r11,r11,2
 #else
diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index 2c71b0fc9f91..e3edaa189911 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -59,7 +59,7 @@ BEGIN_FTR_SECTION
        DSSALL
        sync
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-        clrrdi  r9,r1,THREAD_SHIFT      /* current thread_info */
+        CURRENT_THREAD_INFO(r9, r1)
        ld      r8,TI_LOCAL_FLAGS(r9)   /* set napping bit */
        ori     r8,r8,_TLF_NAPPING      /* so when we take an exception */
        std     r8,TI_LOCAL_FLAGS(r9)   /* it will return to our caller */
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 359f078571c7..ff5a6ce027b8 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -33,6 +33,9 @@
 #include <linux/bitmap.h>
 #include <linux/iommu-helper.h>
 #include <linux/crash_dump.h>
+#include <linux/hash.h>
+#include <linux/fault-inject.h>
+#include <linux/pci.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/iommu.h>
@@ -40,6 +43,7 @@
 #include <asm/machdep.h>
 #include <asm/kdump.h>
 #include <asm/fadump.h>
+#include <asm/vio.h>
 #define DBG(...)
@@ -58,6 +62,114 @@ static int __init setup_iommu(char *str)
 __setup("iommu=", setup_iommu);
+static DEFINE_PER_CPU(unsigned int, iommu_pool_hash);
+/*
+ * We precalculate the hash to avoid doing it on every allocation.
+ *
+ * The hash is important to spread CPUs across all the pools. For example,
+ * on a POWER7 with 4 way SMT we want interrupts on the primary threads and
+ * with 4 pools all primary threads would map to the same pool.
+ */
+static int __init setup_iommu_pool_hash(void)
+{
+        unsigned int i;
+        for_each_possible_cpu(i)
+                per_cpu(iommu_pool_hash, i) = hash_32(i, IOMMU_POOL_HASHBITS);
+        return 0;
+}
+subsys_initcall(setup_iommu_pool_hash);
+#ifdef CONFIG_FAIL_IOMMU
+static DECLARE_FAULT_ATTR(fail_iommu);
+static int __init setup_fail_iommu(char *str)
+{
+        return setup_fault_attr(&fail_iommu, str);
+}
+__setup("fail_iommu=", setup_fail_iommu);
+static bool should_fail_iommu(struct device *dev)
+{
+        return dev->archdata.fail_iommu && should_fail(&fail_iommu, 1);
+}
+static int __init fail_iommu_debugfs(void)
+{
+        struct dentry *dir = fault_create_debugfs_attr("fail_iommu",
+                                                       NULL, &fail_iommu);
+        return IS_ERR(dir) ? PTR_ERR(dir) : 0;
+}
+late_initcall(fail_iommu_debugfs);
+static ssize_t fail_iommu_show(struct device *dev,
+                               struct device_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%d\n", dev->archdata.fail_iommu);
+}
+static ssize_t fail_iommu_store(struct device *dev,
+                                struct device_attribute *attr, const char *buf,
+                                size_t count)
+{
+        int i;
+        if (count > 0 && sscanf(buf, "%d", &i) > 0)
+                dev->archdata.fail_iommu = (i == 0) ? 0 : 1;
+        return count;
+}
+static DEVICE_ATTR(fail_iommu, S_IRUGO|S_IWUSR, fail_iommu_show,
+                   fail_iommu_store);
+static int fail_iommu_bus_notify(struct notifier_block *nb,
+                                 unsigned long action, void *data)
+{
+        struct device *dev = data;
+        if (action == BUS_NOTIFY_ADD_DEVICE) {
+                if (device_create_file(dev, &dev_attr_fail_iommu))
+                        pr_warn("Unable to create IOMMU fault injection sysfs "
+                                "entries\n");
+        } else if (action == BUS_NOTIFY_DEL_DEVICE) {
+                device_remove_file(dev, &dev_attr_fail_iommu);
+        }
+        return 0;
+}
+static struct notifier_block fail_iommu_bus_notifier = {
+        .notifier_call = fail_iommu_bus_notify
+};
+static int __init fail_iommu_setup(void)
+{
+#ifdef CONFIG_PCI
+        bus_register_notifier(&pci_bus_type, &fail_iommu_bus_notifier);
+#endif
+#ifdef CONFIG_IBMVIO
+        bus_register_notifier(&vio_bus_type, &fail_iommu_bus_notifier);
+#endif
+        return 0;
+}
+/*
+ * Must execute after PCI and VIO subsystem have initialised but before
+ * devices are probed.
+ */
+arch_initcall(fail_iommu_setup);
+#else
+static inline bool should_fail_iommu(struct device *dev)
+{
+        return false;
+}
+#endif
 static unsigned long iommu_range_alloc(struct device *dev,
                                       struct iommu_table *tbl,
                                       unsigned long npages,
@@ -71,6 +183,9 @@ static unsigned long iommu_range_alloc(struct device *dev,
        int pass = 0;
        unsigned long align_mask;
        unsigned long boundary_size;
+        unsigned long flags;
+        unsigned int pool_nr;
+        struct iommu_pool *pool;
        align_mask = 0xffffffffffffffffl >> (64 - align_order);
@@ -83,36 +198,49 @@ static unsigned long iommu_range_alloc(struct device *dev,
                return DMA_ERROR_CODE;
        }
-        if (handle && *handle)
+        if (should_fail_iommu(dev))
-                start = *handle;
+                return DMA_ERROR_CODE;
+        /*
+         * We don't need to disable preemption here because any CPU can
+         * safely use any IOMMU pool.
+         */
+        pool_nr = __raw_get_cpu_var(iommu_pool_hash) & (tbl->nr_pools - 1);
+        if (largealloc)
+                pool = &(tbl->large_pool);
        else
-                start = largealloc ? tbl->it_largehint : tbl->it_hint;
+                pool = &(tbl->pools[pool_nr]);
-        /* Use only half of the table for small allocs (15 pages or less) */
+        spin_lock_irqsave(&(pool->lock), flags);
-        limit = largealloc ? tbl->it_size : tbl->it_halfpoint;
-        if (largealloc && start < tbl->it_halfpoint)
+again:
-                start = tbl->it_halfpoint;
+        if ((pass == 0) && handle && *handle)
+                start = *handle;
+        else
+                start = pool->hint;
+        limit = pool->end;
        /* The case below can happen if we have a small segment appended
         * to a large, or when the previous alloc was at the very end of
         * the available space. If so, go back to the initial start.
         */
        if (start >= limit)
-                start = largealloc ? tbl->it_largehint : tbl->it_hint;
+                start = pool->start;
- again:
        if (limit + tbl->it_offset > mask) {
                limit = mask - tbl->it_offset + 1;
                /* If we're constrained on address range, first try
                 * at the masked hint to avoid O(n) search complexity,
-                 * but on second pass, start at 0.
+                 * but on second pass, start at 0 in pool 0.
                 */
-                if ((start & mask) >= limit || pass > 0)
+                if ((start & mask) >= limit || pass > 0) {
-                        start = 0;
+                        pool = &(tbl->pools[0]);
-                else
+                        start = pool->start;
+                } else {
                        start &= mask;
+                }
        }
        if (dev)
@@ -126,16 +254,25 @@ static unsigned long iommu_range_alloc(struct device *dev,
                             tbl->it_offset, boundary_size >> IOMMU_PAGE_SHIFT,
                             align_mask);
        if (n == -1) {
-                if (likely(pass < 2)) {
+                if (likely(pass == 0)) {
-                        /* First failure, just rescan the half of the table.
+                        /* First try the pool from the start */
-                         * Second failure, rescan the other half of the table.
+                        pool->hint = pool->start;
-                         */
-                        start = (largealloc ^ pass) ? tbl->it_halfpoint : 0;
-                        limit = pass ? tbl->it_size : limit;
                        pass++;
                        goto again;
+                } else if (pass <= tbl->nr_pools) {
+                        /* Now try scanning all the other pools */
+                        spin_unlock(&(pool->lock));
+                        pool_nr = (pool_nr + 1) & (tbl->nr_pools - 1);
+                        pool = &tbl->pools[pool_nr];
+                        spin_lock(&(pool->lock));
+                        pool->hint = pool->start;
+                        pass++;
+                        goto again;
                } else {
-                        /* Third failure, give up */
+                        /* Give up */
+                        spin_unlock_irqrestore(&(pool->lock), flags);
                        return DMA_ERROR_CODE;
                }
        }
@@ -145,10 +282,10 @@ static unsigned long iommu_range_alloc(struct device *dev,
        /* Bump the hint to a new block for small allocs. */
        if (largealloc) {
                /* Don't bump to new block to avoid fragmentation */
-                tbl->it_largehint = end;
+                pool->hint = end;
        } else {
                /* Overflow will be taken care of at the next allocation */
-                tbl->it_hint = (end + tbl->it_blocksize - 1) &
+                pool->hint = (end + tbl->it_blocksize - 1) &
                                ~(tbl->it_blocksize - 1);
        }
@@ -156,6 +293,8 @@ static unsigned long iommu_range_alloc(struct device *dev,
        if (handle)
                *handle = end;
+        spin_unlock_irqrestore(&(pool->lock), flags);
        return n;
 }
@@ -165,18 +304,14 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
                              unsigned long mask, unsigned int align_order,
                              struct dma_attrs *attrs)
 {
-        unsigned long entry, flags;
+        unsigned long entry;
        dma_addr_t ret = DMA_ERROR_CODE;
        int build_fail;
-        spin_lock_irqsave(&(tbl->it_lock), flags);
        entry = iommu_range_alloc(dev, tbl, npages, NULL, mask, align_order);
-        if (unlikely(entry == DMA_ERROR_CODE)) {
+        if (unlikely(entry == DMA_ERROR_CODE))
-                spin_unlock_irqrestore(&(tbl->it_lock), flags);
                return DMA_ERROR_CODE;
-        }
        entry += tbl->it_offset;        /* Offset into real TCE table */
        ret = entry << IOMMU_PAGE_SHIFT;        /* Set the return dma address */
@@ -193,8 +328,6 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
         */
        if (unlikely(build_fail)) {
                __iommu_free(tbl, ret, npages);
-                spin_unlock_irqrestore(&(tbl->it_lock), flags);
                return DMA_ERROR_CODE;
        }
@@ -202,16 +335,14 @@ static dma_addr_t iommu_alloc(struct device *dev, struct iommu_table *tbl,
        if (ppc_md.tce_flush)
                ppc_md.tce_flush(tbl);
-        spin_unlock_irqrestore(&(tbl->it_lock), flags);
        /* Make sure updates are seen by hardware */
        mb();
        return ret;
 }
-static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr, 
+static bool iommu_free_check(struct iommu_table *tbl, dma_addr_t dma_addr,
-                         unsigned int npages)
+                             unsigned int npages)
 {
        unsigned long entry, free_entry;
@@ -231,20 +362,57 @@ static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
                        printk(KERN_INFO "\tindex     = 0x%llx\n", (u64)tbl->it_index);
                        WARN_ON(1);
                }
-                return;
+                return false;
+        }
+        return true;
+}
+static struct iommu_pool *get_pool(struct iommu_table *tbl,
+                                   unsigned long entry)
+{
+        struct iommu_pool *p;
+        unsigned long largepool_start = tbl->large_pool.start;
+        /* The large pool is the last pool at the top of the table */
+        if (entry >= largepool_start) {
+                p = &tbl->large_pool;
+        } else {
+                unsigned int pool_nr = entry / tbl->poolsize;
+                BUG_ON(pool_nr > tbl->nr_pools);
+                p = &tbl->pools[pool_nr];
        }
+        return p;
+}
+static void __iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
+                         unsigned int npages)
+{
+        unsigned long entry, free_entry;
+        unsigned long flags;
+        struct iommu_pool *pool;
+        entry = dma_addr >> IOMMU_PAGE_SHIFT;
+        free_entry = entry - tbl->it_offset;
+        pool = get_pool(tbl, free_entry);
+        if (!iommu_free_check(tbl, dma_addr, npages))
+                return;
        ppc_md.tce_free(tbl, entry, npages);
+        spin_lock_irqsave(&(pool->lock), flags);
        bitmap_clear(tbl->it_map, free_entry, npages);
+        spin_unlock_irqrestore(&(pool->lock), flags);
 }
 static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
                unsigned int npages)
 {
-        unsigned long flags;
-        spin_lock_irqsave(&(tbl->it_lock), flags);
        __iommu_free(tbl, dma_addr, npages);
        /* Make sure TLB cache is flushed if the HW needs it. We do
@@ -253,8 +421,6 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
         */
        if (ppc_md.tce_flush)
                ppc_md.tce_flush(tbl);
-        spin_unlock_irqrestore(&(tbl->it_lock), flags);
 }
 int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
@@ -263,7 +429,6 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
                 struct dma_attrs *attrs)
 {
        dma_addr_t dma_next = 0, dma_addr;
-        unsigned long flags;
        struct scatterlist *s, *outs, *segstart;
        int outcount, incount, i, build_fail = 0;
        unsigned int align;
@@ -285,8 +450,6 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
        DBG("sg mapping %d elements:\n", nelems);
-        spin_lock_irqsave(&(tbl->it_lock), flags);
        max_seg_size = dma_get_max_seg_size(dev);
        for_each_sg(sglist, s, nelems, i) {
                unsigned long vaddr, npages, entry, slen;
@@ -369,8 +532,6 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
        if (ppc_md.tce_flush)
                ppc_md.tce_flush(tbl);
-        spin_unlock_irqrestore(&(tbl->it_lock), flags);
        DBG("mapped %d elements:\n", outcount);
        /* For the sake of iommu_unmap_sg, we clear out the length in the
@@ -402,7 +563,6 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
                if (s == outs)
                        break;
        }
-        spin_unlock_irqrestore(&(tbl->it_lock), flags);
        return 0;
 }
@@ -412,15 +572,12 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
                struct dma_attrs *attrs)
 {
        struct scatterlist *sg;
-        unsigned long flags;
        BUG_ON(direction == DMA_NONE);
        if (!tbl)
                return;
-        spin_lock_irqsave(&(tbl->it_lock), flags);
        sg = sglist;
        while (nelems--) {
                unsigned int npages;
@@ -440,8 +597,6 @@ void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
         */
        if (ppc_md.tce_flush)
                ppc_md.tce_flush(tbl);
-        spin_unlock_irqrestore(&(tbl->it_lock), flags);
 }
 static void iommu_table_clear(struct iommu_table *tbl)
@@ -494,9 +649,8 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
        unsigned long sz;
        static int welcomed = 0;
        struct page *page;
+        unsigned int i;
-        /* Set aside 1/4 of the table for large allocations. */
+        struct iommu_pool *p;
-        tbl->it_halfpoint = tbl->it_size * 3 / 4;
        /* number of bytes needed for the bitmap */
        sz = (tbl->it_size + 7) >> 3;
@@ -515,9 +669,28 @@ struct iommu_table *iommu_init_table(struct iommu_table *tbl, int nid)
        if (tbl->it_offset == 0)
                set_bit(0, tbl->it_map);
-        tbl->it_hint = 0;
+        /* We only split the IOMMU table if we have 1GB or more of space */
-        tbl->it_largehint = tbl->it_halfpoint;
+        if ((tbl->it_size << IOMMU_PAGE_SHIFT) >= (1UL * 1024 * 1024 * 1024))
-        spin_lock_init(&tbl->it_lock);
+                tbl->nr_pools = IOMMU_NR_POOLS;
+        else
+                tbl->nr_pools = 1;
+        /* We reserve the top 1/4 of the table for large allocations */
+        tbl->poolsize = (tbl->it_size * 3 / 4) / tbl->nr_pools;
+        for (i = 0; i < tbl->nr_pools; i++) {
+                p = &tbl->pools[i];
+                spin_lock_init(&(p->lock));
+                p->start = tbl->poolsize * i;
+                p->hint = p->start;
+                p->end = p->start + tbl->poolsize;
+        }
+        p = &tbl->large_pool;
+        spin_lock_init(&(p->lock));
+        p->start = tbl->poolsize * i;
+        p->hint = p->start;
+        p->end = tbl->it_size;
        iommu_table_clear(tbl);
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 7835a5e1ea5f..1f017bb7a7ce 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -229,7 +229,7 @@ notrace void arch_local_irq_restore(unsigned long en)
         */
        if (unlikely(irq_happened != PACA_IRQ_HARD_DIS))
                __hard_irq_disable();
-#ifdef CONFIG_TRACE_IRQFLAG
+#ifdef CONFIG_TRACE_IRQFLAGS
        else {
                /*
                 * We should already be hard disabled here. We had bugs
@@ -277,7 +277,7 @@ EXPORT_SYMBOL(arch_local_irq_restore);
 * NOTE: This is called with interrupts hard disabled but not marked
 * as such in paca->irq_happened, so we need to resync this.
 */
-void restore_interrupts(void)
+void notrace restore_interrupts(void)
 {
        if (irqs_disabled()) {
                local_paca->irq_happened |= PACA_IRQ_HARD_DIS;
@@ -286,6 +286,52 @@ void restore_interrupts(void)
                __hard_irq_enable();
 }
+/*
+ * This is a helper to use when about to go into idle low-power
+ * when the latter has the side effect of re-enabling interrupts
+ * (such as calling H_CEDE under pHyp).
+ *
+ * You call this function with interrupts soft-disabled (this is
+ * already the case when ppc_md.power_save is called). The function
+ * will return whether to enter power save or just return.
+ *
+ * In the former case, it will have notified lockdep of interrupts
+ * being re-enabled and generally sanitized the lazy irq state,
+ * and in the latter case it will leave with interrupts hard
+ * disabled and marked as such, so the local_irq_enable() call
+ * in cpu_idle() will properly re-enable everything.
+ */
+bool prep_irq_for_idle(void)
+{
+        /*
+         * First we need to hard disable to ensure no interrupt
+         * occurs before we effectively enter the low power state
+         */
+        hard_irq_disable();
+        /*
+         * If anything happened while we were soft-disabled,
+         * we return now and do not enter the low power state.
+         */
+        if (lazy_irq_pending())
+                return false;
+        /* Tell lockdep we are about to re-enable */
+        trace_hardirqs_on();
+        /*
+         * Mark interrupts as soft-enabled and clear the
+         * PACA_IRQ_HARD_DIS from the pending mask since we
+         * are about to hard enable as well as a side effect
+         * of entering the low power state.
+         */
+        local_paca->irq_happened &= ~PACA_IRQ_HARD_DIS;
+        local_paca->soft_enabled = 1;
+        /* Tell the caller to enter the low power state */
+        return true;
+}
 #endif /* CONFIG_PPC64 */
 int arch_show_interrupts(struct seq_file *p, int prec)
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
index 1c13307e0308..867db1de8949 100644
--- a/arch/powerpc/kernel/kvm.c
+++ b/arch/powerpc/kernel/kvm.c
@@ -303,7 +303,7 @@ static void kvm_patch_ins_wrtee(u32 *inst, u32 rt, int imm_one)
        if (imm_one) {
                p[kvm_emulate_wrtee_reg_offs] =
-                        KVM_INST_LI | __PPC_RT(30) | MSR_EE;
+                        KVM_INST_LI | __PPC_RT(R30) | MSR_EE;
        } else {
                /* Make clobbered registers work too */
                switch (get_rt(rt)) {
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 386d57f66f28..407e293aad2f 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -179,7 +179,7 @@ _GLOBAL(low_choose_750fx_pll)
        mtspr   SPRN_HID1,r4
        /* Store new HID1 image */
-        rlwinm  r6,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r6, r1)
        lwz     r6,TI_CPU(r6)
        slwi    r6,r6,2
        addis   r6,r6,nap_save_hid1@ha
@@ -699,7 +699,7 @@ _GLOBAL(kernel_thread)
 #ifdef CONFIG_SMP
 _GLOBAL(start_secondary_resume)
        /* Reset stack */
-        rlwinm  r1,r1,0,0,(31-THREAD_SHIFT)     /* current_thread_info() */
+        CURRENT_THREAD_INFO(r1, r1)
        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
        li      r3,0
        stw     r3,0(r1)                /* Zero the stack frame pointer */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 616921ef1439..565b78625a32 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -301,11 +301,6 @@ _GLOBAL(real_writeb)
 #ifdef CONFIG_PPC_PASEMI
-/* No support in all binutils for these yet, so use defines */
-#define LBZCIX(RT,RA,RB)  .long (0x7c0006aa|(RT<<21)|(RA<<16)|(RB << 11))
-#define STBCIX(RS,RA,RB)  .long (0x7c0007aa|(RS<<21)|(RA<<16)|(RB << 11))
 _GLOBAL(real_205_readb)
        mfmsr   r7
        ori     r0,r7,MSR_DR
@@ -314,7 +309,7 @@ _GLOBAL(real_205_readb)
        mtmsrd  r0
        sync
        isync
-        LBZCIX(r3,0,r3)
+        LBZCIX(R3,R0,R3)
        isync
        mtmsrd  r7
        sync
@@ -329,7 +324,7 @@ _GLOBAL(real_205_writeb)
        mtmsrd  r0
        sync
        isync
-        STBCIX(r3,0,r4)
+        STBCIX(R3,R0,R4)
        isync
        mtmsrd  r7
        sync
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index 0b6d79617d7b..2e3200ca485f 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -176,8 +176,8 @@ int module_frob_arch_sections(Elf32_Ehdr *hdr,
 static inline int entry_matches(struct ppc_plt_entry *entry, Elf32_Addr val)
 {
-        if (entry->jump[0] == 0x3d600000 + ((val + 0x8000) >> 16)
+        if (entry->jump[0] == 0x3d800000 + ((val + 0x8000) >> 16)
-            && entry->jump[1] == 0x396b0000 + (val & 0xffff))
+            && entry->jump[1] == 0x398c0000 + (val & 0xffff))
                return 1;
        return 0;
 }
@@ -204,10 +204,9 @@ static uint32_t do_plt_call(void *location,
                entry++;
        }
-        /* Stolen from Paul Mackerras as well... */
+        entry->jump[0] = 0x3d800000+((val+0x8000)>>16); /* lis r12,sym@ha */
-        entry->jump[0] = 0x3d600000+((val+0x8000)>>16); /* lis r11,sym@ha */
+        entry->jump[1] = 0x398c0000 + (val&0xffff);     /* addi r12,r12,sym@l*/
-        entry->jump[1] = 0x396b0000 + (val&0xffff);     /* addi r11,r11,sym@l*/
+        entry->jump[2] = 0x7d8903a6;                    /* mtctr r12 */
-        entry->jump[2] = 0x7d6903a6;                    /* mtctr r11 */
        entry->jump[3] = 0x4e800420;                    /* bctr */
        DEBUGP("Initialized plt for 0x%x at %p\n", val, entry);
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 8e78e93c8185..0f75bd500404 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -1646,7 +1646,6 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose)
                pci_free_resource_list(&resources);
                return;
        }
-        bus->secondary = hose->first_busno;
        hose->bus = bus;
        /* Get probe mode and perform scan */
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index 89dde171a6fa..d7dd42bd1452 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -198,7 +198,6 @@ EXPORT_SYMBOL(of_create_pci_dev);
 /**
 * of_scan_pci_bridge - Set up a PCI bridge and scan for child nodes
- * @node: device tree node of bridge
 * @dev: pci_dev structure for the bridge
 *
 * of_scan_bus() calls this routine for each PCI bridge that it finds, and
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 1b488e5305c5..0794a3017b1b 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -1312,7 +1312,7 @@ static struct opal_secondary_data {
 extern char opal_secondary_entry;
-static void prom_query_opal(void)
+static void __init prom_query_opal(void)
 {
        long rc;
@@ -1436,7 +1436,7 @@ static void __init prom_opal_hold_cpus(void)
        prom_debug("prom_opal_hold_cpus: end...\n");
 }
-static void prom_opal_takeover(void)
+static void __init prom_opal_takeover(void)
 {
        struct opal_secondary_data *data = &RELOC(opal_secondary_data);
        struct opal_takeover_args *args = &data->args;
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index afd4f051f3f2..bdc499c17872 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -720,6 +720,33 @@ static int powerpc_debugfs_init(void)
 arch_initcall(powerpc_debugfs_init);
 #endif
+#ifdef CONFIG_BOOKE_WDT
+extern u32 booke_wdt_enabled;
+extern u32 booke_wdt_period;
+/* Checks wdt=x and wdt_period=xx command-line option */
+notrace int __init early_parse_wdt(char *p)
+{
+        if (p && strncmp(p, "0", 1) != 0)
+                booke_wdt_enabled = 1;
+        return 0;
+}
+early_param("wdt", early_parse_wdt);
+int __init early_parse_wdt_period(char *p)
+{
+        unsigned long ret;
+        if (p) {
+                if (!kstrtol(p, 0, &ret))
+                        booke_wdt_period = ret;
+        }
+        return 0;
+}
+early_param("wdt_period", early_parse_wdt_period);
+#endif  /* CONFIG_BOOKE_WDT */
 void ppc_printk_progress(char *s, unsigned short hex)
 {
        pr_info("%s\n", s);
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index ec8a53fa9e8f..a8f54ecb091f 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -149,30 +149,6 @@ notrace void __init machine_init(u64 dt_ptr)
                ppc_md.progress("id mach(): done", 0x200);
 }
-#ifdef CONFIG_BOOKE_WDT
-extern u32 booke_wdt_enabled;
-extern u32 booke_wdt_period;
-/* Checks wdt=x and wdt_period=xx command-line option */
-notrace int __init early_parse_wdt(char *p)
-{
-        if (p && strncmp(p, "0", 1) != 0)
-               booke_wdt_enabled = 1;
-        return 0;
-}
-early_param("wdt", early_parse_wdt);
-int __init early_parse_wdt_period (char *p)
-{
-        if (p)
-                booke_wdt_period = simple_strtoul(p, NULL, 0);
-        return 0;
-}
-early_param("wdt_period", early_parse_wdt_period);
-#endif  /* CONFIG_BOOKE_WDT */
 /* Checks "l2cr=xxxx" command-line option */
 int __init ppc_setup_l2cr(char *str)
 {
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index e4cb34322de4..0321007086f7 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -48,6 +48,7 @@
 #ifdef CONFIG_PPC64
 #include <asm/paca.h>
 #endif
+#include <asm/vdso.h>
 #include <asm/debug.h>
 #ifdef DEBUG
@@ -570,8 +571,9 @@ void __devinit start_secondary(void *unused)
 #ifdef CONFIG_PPC64
        if (system_state == SYSTEM_RUNNING)
                vdso_data->processorCount++;
+        vdso_getcpu_init();
 #endif
-        ipi_call_lock();
        notify_cpu_starting(cpu);
        set_cpu_online(cpu, true);
        /* Update sibling maps */
@@ -601,7 +603,6 @@ void __devinit start_secondary(void *unused)
                of_node_put(np);
        }
        of_node_put(l2_cache);
-        ipi_call_unlock();
        local_irq_enable();
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 99a995c2a3f2..be171ee73bf8 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -475,6 +475,7 @@ void timer_interrupt(struct pt_regs * regs)
        struct pt_regs *old_regs;
        u64 *next_tb = &__get_cpu_var(decrementers_next_tb);
        struct clock_event_device *evt = &__get_cpu_var(decrementers);
+        u64 now;
        /* Ensure a positive value is written to the decrementer, or else
         * some CPUs will continue to take decrementer exceptions.
@@ -509,9 +510,16 @@ void timer_interrupt(struct pt_regs * regs)
                irq_work_run();
        }
-        *next_tb = ~(u64)0;
+        now = get_tb_or_rtc();
-        if (evt->event_handler)
+        if (now >= *next_tb) {
-                evt->event_handler(evt);
+                *next_tb = ~(u64)0;
+                if (evt->event_handler)
+                        evt->event_handler(evt);
+        } else {
+                now = *next_tb - now;
+                if (now <= DECREMENTER_MAX)
+                        set_dec((int)now);
+        }
 #ifdef CONFIG_PPC64
        /* collect purr register values often, for accurate calculations */
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 9eb5b9b536a7..b67db22e102d 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -706,6 +706,34 @@ static void __init vdso_setup_syscall_map(void)
        }
 }
+#ifdef CONFIG_PPC64
+int __cpuinit vdso_getcpu_init(void)
+{
+        unsigned long cpu, node, val;
+        /*
+         * SPRG3 contains the CPU in the bottom 16 bits and the NUMA node in
+         * the next 16 bits. The VDSO uses this to implement getcpu().
+         */
+        cpu = get_cpu();
+        WARN_ON_ONCE(cpu > 0xffff);
+        node = cpu_to_node(cpu);
+        WARN_ON_ONCE(node > 0xffff);
+        val = (cpu & 0xfff) | ((node & 0xffff) << 16);
+        mtspr(SPRN_SPRG3, val);
+#ifdef CONFIG_KVM_BOOK3S_HANDLER
+        get_paca()->kvm_hstate.sprg3 = val;
+#endif
+        put_cpu();
+        return 0;
+}
+/* We need to call this before SMP init */
+early_initcall(vdso_getcpu_init);
+#endif
 static int __init vdso_init(void)
 {
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index 9a7946c41738..53e6c9b979ec 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -1,7 +1,9 @@
 # List of files in the vdso, has to be asm only for now
-obj-vdso32 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o
+obj-vdso32-$(CONFIG_PPC64) = getcpu.o
+obj-vdso32 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o \
+                $(obj-vdso32-y)
 # Build rules
diff --git a/arch/powerpc/kernel/vdso32/getcpu.S b/arch/powerpc/kernel/vdso32/getcpu.S
new file mode 100644
index 000000000000..47afd08c90f7
--- /dev/null
+++ b/arch/powerpc/kernel/vdso32/getcpu.S
@@ -0,0 +1,45 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2012
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/ppc_asm.h>
+#include <asm/vdso.h>
+        .text
+/*
+ * Exact prototype of getcpu
+ *
+ * int __kernel_getcpu(unsigned *cpu, unsigned *node);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_getcpu)
+  .cfi_startproc
+        mfspr   r5,SPRN_USPRG3
+        cmpdi   cr0,r3,0
+        cmpdi   cr1,r4,0
+        clrlwi  r6,r5,16
+        rlwinm  r7,r5,16,31-15,31-0
+        beq     cr0,1f
+        stw     r6,0(r3)
+1:      beq     cr1,2f
+        stw     r7,0(r4)
+2:      crclr   cr0*4+so
+        li      r3,0                    /* always success */
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_getcpu)
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index 0546bcd49cd0..43200ba2e570 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -147,6 +147,9 @@ VERSION
                __kernel_sync_dicache_p5;
                __kernel_sigtramp32;
                __kernel_sigtramp_rt32;
+#ifdef CONFIG_PPC64
+                __kernel_getcpu;
+#endif
        local: *;
        };
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index 8c500d8622e4..effca9404b17 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
@@ -1,6 +1,6 @@
 # List of files in the vdso, has to be asm only for now
-obj-vdso64 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o
+obj-vdso64 = sigtramp.o gettimeofday.o datapage.o cacheflush.o note.o getcpu.o
 # Build rules
diff --git a/arch/powerpc/kernel/vdso64/getcpu.S b/arch/powerpc/kernel/vdso64/getcpu.S
new file mode 100644
index 000000000000..47afd08c90f7
--- /dev/null
+++ b/arch/powerpc/kernel/vdso64/getcpu.S
@@ -0,0 +1,45 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2012
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/ppc_asm.h>
+#include <asm/vdso.h>
+        .text
+/*
+ * Exact prototype of getcpu
+ *
+ * int __kernel_getcpu(unsigned *cpu, unsigned *node);
+ *
+ */
+V_FUNCTION_BEGIN(__kernel_getcpu)
+  .cfi_startproc
+        mfspr   r5,SPRN_USPRG3
+        cmpdi   cr0,r3,0
+        cmpdi   cr1,r4,0
+        clrlwi  r6,r5,16
+        rlwinm  r7,r5,16,31-15,31-0
+        beq     cr0,1f
+        stw     r6,0(r3)
+1:      beq     cr1,2f
+        stw     r7,0(r4)
+2:      crclr   cr0*4+so
+        li      r3,0                    /* always success */
+        blr
+  .cfi_endproc
+V_FUNCTION_END(__kernel_getcpu)
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index 0e615404e247..e6c1758f3588 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -146,6 +146,7 @@ VERSION
                __kernel_sync_dicache;
                __kernel_sync_dicache_p5;
                __kernel_sigtramp_rt64;
+                __kernel_getcpu;
        local: *;
        };
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index cb87301ccd55..7a421e8fe7ca 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -37,8 +37,6 @@
 #include <asm/page.h>
 #include <asm/hvcall.h>
-static struct bus_type vio_bus_type;
 static struct vio_dev vio_bus_device  = { /* fake "parent" device */
        .name = "vio",
        .type = "",
@@ -625,7 +623,7 @@ struct dma_map_ops vio_dma_mapping_ops = {
 * vio_cmo_set_dev_desired - Set desired entitlement for a device
 *
 * @viodev: struct vio_dev for device to alter
- * @new_desired: new desired entitlement level in bytes
+ * @desired: new desired entitlement level in bytes
 *
 * For use by devices to request a change to their entitlement at runtime or
 * through sysfs.  The desired entitlement level is changed and a balancing
@@ -1262,7 +1260,7 @@ static int vio_bus_remove(struct device *dev)
 /**
 * vio_register_driver: - Register a new vio driver
- * @drv:        The vio_driver structure to be registered.
+ * @viodrv:     The vio_driver structure to be registered.
 */
 int __vio_register_driver(struct vio_driver *viodrv, struct module *owner,
                          const char *mod_name)
@@ -1282,7 +1280,7 @@ EXPORT_SYMBOL(__vio_register_driver);
 /**
 * vio_unregister_driver - Remove registration of vio driver.
- * @driver:     The vio_driver struct to be removed form registration
+ * @viodrv:     The vio_driver struct to be removed form registration
 */
 void vio_unregister_driver(struct vio_driver *viodrv)
 {
@@ -1397,21 +1395,27 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
        viodev->name = of_node->name;
        viodev->dev.of_node = of_node_get(of_node);
-        if (firmware_has_feature(FW_FEATURE_CMO))
-                vio_cmo_set_dma_ops(viodev);
-        else
-                set_dma_ops(&viodev->dev, &dma_iommu_ops);
-        set_iommu_table_base(&viodev->dev, vio_build_iommu_table(viodev));
        set_dev_node(&viodev->dev, of_node_to_nid(of_node));
        /* init generic 'struct device' fields: */
        viodev->dev.parent = &vio_bus_device.dev;
        viodev->dev.bus = &vio_bus_type;
        viodev->dev.release = vio_dev_release;
-        /* needed to ensure proper operation of coherent allocations
-         * later, in case driver doesn't set it explicitly */
+        if (of_get_property(viodev->dev.of_node, "ibm,my-dma-window", NULL)) {
-        dma_set_mask(&viodev->dev, DMA_BIT_MASK(64));
+                if (firmware_has_feature(FW_FEATURE_CMO))
-        dma_set_coherent_mask(&viodev->dev, DMA_BIT_MASK(64));
+                        vio_cmo_set_dma_ops(viodev);
+                else
+                        set_dma_ops(&viodev->dev, &dma_iommu_ops);
+                set_iommu_table_base(&viodev->dev,
+                                     vio_build_iommu_table(viodev));
+                /* needed to ensure proper operation of coherent allocations
+                 * later, in case driver doesn't set it explicitly */
+                dma_set_mask(&viodev->dev, DMA_BIT_MASK(64));
+                dma_set_coherent_mask(&viodev->dev, DMA_BIT_MASK(64));
+        }
        /* register with generic device framework */
        if (device_register(&viodev->dev)) {
@@ -1491,12 +1495,18 @@ static int __init vio_bus_init(void)
        if (firmware_has_feature(FW_FEATURE_CMO))
                vio_cmo_bus_init();
+        return 0;
+}
+postcore_initcall(vio_bus_init);
+static int __init vio_device_init(void)
+{
        vio_bus_scan_register_devices("vdevice");
        vio_bus_scan_register_devices("ibm,platform-facilities");
        return 0;
 }
-__initcall(vio_bus_init);
+device_initcall(vio_device_init);
 static ssize_t name_show(struct device *dev,
                struct device_attribute *attr, char *buf)
@@ -1568,7 +1578,7 @@ static int vio_hotplug(struct device *dev, struct kobj_uevent_env *env)
        return 0;
 }
-static struct bus_type vio_bus_type = {
+struct bus_type vio_bus_type = {
        .name = "vio",
        .dev_attrs = vio_dev_attrs,
        .uevent = vio_hotplug,
diff --git a/arch/powerpc/kvm/book3s_hv.c b/arch/powerpc/kvm/book3s_hv.c
index d084e412b3c5..83e929e66f9d 100644
--- a/arch/powerpc/kvm/book3s_hv.c
+++ b/arch/powerpc/kvm/book3s_hv.c
@@ -268,24 +268,45 @@ static unsigned long do_h_register_vpa(struct kvm_vcpu *vcpu,
        return err;
 }
-static void kvmppc_update_vpa(struct kvm *kvm, struct kvmppc_vpa *vpap)
+static void kvmppc_update_vpa(struct kvm_vcpu *vcpu, struct kvmppc_vpa *vpap)
 {
+        struct kvm *kvm = vcpu->kvm;
        void *va;
        unsigned long nb;
+        unsigned long gpa;
-        vpap->update_pending = 0;
+        /*
-        va = NULL;
+         * We need to pin the page pointed to by vpap->next_gpa,
-        if (vpap->next_gpa) {
+         * but we can't call kvmppc_pin_guest_page under the lock
-                va = kvmppc_pin_guest_page(kvm, vpap->next_gpa, &nb);
+         * as it does get_user_pages() and down_read().  So we
-                if (nb < vpap->len) {
+         * have to drop the lock, pin the page, then get the lock
-                        /*
+         * again and check that a new area didn't get registered
-                         * If it's now too short, it must be that userspace
+         * in the meantime.
-                         * has changed the mappings underlying guest memory,
+         */
-                         * so unregister the region.
+        for (;;) {
-                         */
+                gpa = vpap->next_gpa;
+                spin_unlock(&vcpu->arch.vpa_update_lock);
+                va = NULL;
+                nb = 0;
+                if (gpa)
+                        va = kvmppc_pin_guest_page(kvm, vpap->next_gpa, &nb);
+                spin_lock(&vcpu->arch.vpa_update_lock);
+                if (gpa == vpap->next_gpa)
+                        break;
+                /* sigh... unpin that one and try again */
+                if (va)
                        kvmppc_unpin_guest_page(kvm, va);
-                        va = NULL;
+        }
-                }
+        vpap->update_pending = 0;
+        if (va && nb < vpap->len) {
+                /*
+                 * If it's now too short, it must be that userspace
+                 * has changed the mappings underlying guest memory,
+                 * so unregister the region.
+                 */
+                kvmppc_unpin_guest_page(kvm, va);
+                va = NULL;
        }
        if (vpap->pinned_addr)
                kvmppc_unpin_guest_page(kvm, vpap->pinned_addr);
@@ -296,20 +317,18 @@ static void kvmppc_update_vpa(struct kvm *kvm, struct kvmppc_vpa *vpap)
 static void kvmppc_update_vpas(struct kvm_vcpu *vcpu)
 {
-        struct kvm *kvm = vcpu->kvm;
        spin_lock(&vcpu->arch.vpa_update_lock);
        if (vcpu->arch.vpa.update_pending) {
-                kvmppc_update_vpa(kvm, &vcpu->arch.vpa);
+                kvmppc_update_vpa(vcpu, &vcpu->arch.vpa);
                init_vpa(vcpu, vcpu->arch.vpa.pinned_addr);
        }
        if (vcpu->arch.dtl.update_pending) {
-                kvmppc_update_vpa(kvm, &vcpu->arch.dtl);
+                kvmppc_update_vpa(vcpu, &vcpu->arch.dtl);
                vcpu->arch.dtl_ptr = vcpu->arch.dtl.pinned_addr;
                vcpu->arch.dtl_index = 0;
        }
        if (vcpu->arch.slb_shadow.update_pending)
-                kvmppc_update_vpa(kvm, &vcpu->arch.slb_shadow);
+                kvmppc_update_vpa(vcpu, &vcpu->arch.slb_shadow);
        spin_unlock(&vcpu->arch.vpa_update_lock);
 }
@@ -800,12 +819,39 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)
        struct kvm_vcpu *vcpu, *vcpu0, *vnext;
        long ret;
        u64 now;
-        int ptid, i;
+        int ptid, i, need_vpa_update;
        /* don't start if any threads have a signal pending */
-        list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list)
+        need_vpa_update = 0;
+        list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
                if (signal_pending(vcpu->arch.run_task))
                        return 0;
+                need_vpa_update |= vcpu->arch.vpa.update_pending |
+                        vcpu->arch.slb_shadow.update_pending |
+                        vcpu->arch.dtl.update_pending;
+        }
+        /*
+         * Initialize *vc, in particular vc->vcore_state, so we can
+         * drop the vcore lock if necessary.
+         */
+        vc->n_woken = 0;
+        vc->nap_count = 0;
+        vc->entry_exit_count = 0;
+        vc->vcore_state = VCORE_RUNNING;
+        vc->in_guest = 0;
+        vc->napping_threads = 0;
+        /*
+         * Updating any of the vpas requires calling kvmppc_pin_guest_page,
+         * which can't be called with any spinlocks held.
+         */
+        if (need_vpa_update) {
+                spin_unlock(&vc->lock);
+                list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list)
+                        kvmppc_update_vpas(vcpu);
+                spin_lock(&vc->lock);
+        }
        /*
         * Make sure we are running on thread 0, and that
@@ -838,20 +884,10 @@ static int kvmppc_run_core(struct kvmppc_vcore *vc)
                if (vcpu->arch.ceded)
                        vcpu->arch.ptid = ptid++;
-        vc->n_woken = 0;
-        vc->nap_count = 0;
-        vc->entry_exit_count = 0;
-        vc->vcore_state = VCORE_RUNNING;
        vc->stolen_tb += mftb() - vc->preempt_tb;
-        vc->in_guest = 0;
        vc->pcpu = smp_processor_id();
-        vc->napping_threads = 0;
        list_for_each_entry(vcpu, &vc->runnable_threads, arch.run_list) {
                kvmppc_start_thread(vcpu);
-                if (vcpu->arch.vpa.update_pending ||
-                    vcpu->arch.slb_shadow.update_pending ||
-                    vcpu->arch.dtl.update_pending)
-                        kvmppc_update_vpas(vcpu);
                kvmppc_create_dtl_entry(vcpu, vc);
        }
        /* Grab any remaining hw threads so they can't go into the kernel */
diff --git a/arch/powerpc/kvm/book3s_hv_rmhandlers.S b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
index a84aafce2a12..5a84c8d3d040 100644
--- a/arch/powerpc/kvm/book3s_hv_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_hv_rmhandlers.S
@@ -72,9 +72,6 @@ _GLOBAL(kvmppc_hv_entry_trampoline)
        mtsrr1  r6
        RFI
-#define ULONG_SIZE              8
-#define VCPU_GPR(n)             (VCPU_GPRS + (n * ULONG_SIZE))
 /******************************************************************************
 *                                                                            *
 *                               Entry code                                   *
@@ -206,24 +203,24 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
        /* Load up FP, VMX and VSX registers */
        bl      kvmppc_load_fp
-        ld      r14, VCPU_GPR(r14)(r4)
+        ld      r14, VCPU_GPR(R14)(r4)
-        ld      r15, VCPU_GPR(r15)(r4)
+        ld      r15, VCPU_GPR(R15)(r4)
-        ld      r16, VCPU_GPR(r16)(r4)
+        ld      r16, VCPU_GPR(R16)(r4)
-        ld      r17, VCPU_GPR(r17)(r4)
+        ld      r17, VCPU_GPR(R17)(r4)
-        ld      r18, VCPU_GPR(r18)(r4)
+        ld      r18, VCPU_GPR(R18)(r4)
-        ld      r19, VCPU_GPR(r19)(r4)
+        ld      r19, VCPU_GPR(R19)(r4)
-        ld      r20, VCPU_GPR(r20)(r4)
+        ld      r20, VCPU_GPR(R20)(r4)
-        ld      r21, VCPU_GPR(r21)(r4)
+        ld      r21, VCPU_GPR(R21)(r4)
-        ld      r22, VCPU_GPR(r22)(r4)
+        ld      r22, VCPU_GPR(R22)(r4)
-        ld      r23, VCPU_GPR(r23)(r4)
+        ld      r23, VCPU_GPR(R23)(r4)
-        ld      r24, VCPU_GPR(r24)(r4)
+        ld      r24, VCPU_GPR(R24)(r4)
-        ld      r25, VCPU_GPR(r25)(r4)
+        ld      r25, VCPU_GPR(R25)(r4)
-        ld      r26, VCPU_GPR(r26)(r4)
+        ld      r26, VCPU_GPR(R26)(r4)
-        ld      r27, VCPU_GPR(r27)(r4)
+        ld      r27, VCPU_GPR(R27)(r4)
-        ld      r28, VCPU_GPR(r28)(r4)
+        ld      r28, VCPU_GPR(R28)(r4)
-        ld      r29, VCPU_GPR(r29)(r4)
+        ld      r29, VCPU_GPR(R29)(r4)
-        ld      r30, VCPU_GPR(r30)(r4)
+        ld      r30, VCPU_GPR(R30)(r4)
-        ld      r31, VCPU_GPR(r31)(r4)
+        ld      r31, VCPU_GPR(R31)(r4)
 BEGIN_FTR_SECTION
        /* Switch DSCR to guest value */
@@ -547,21 +544,21 @@ fast_guest_return:
        mtlr    r5
        mtcr    r6
-        ld      r0, VCPU_GPR(r0)(r4)
+        ld      r0, VCPU_GPR(R0)(r4)
-        ld      r1, VCPU_GPR(r1)(r4)
+        ld      r1, VCPU_GPR(R1)(r4)
-        ld      r2, VCPU_GPR(r2)(r4)
+        ld      r2, VCPU_GPR(R2)(r4)
-        ld      r3, VCPU_GPR(r3)(r4)
+        ld      r3, VCPU_GPR(R3)(r4)
-        ld      r5, VCPU_GPR(r5)(r4)
+        ld      r5, VCPU_GPR(R5)(r4)
-        ld      r6, VCPU_GPR(r6)(r4)
+        ld      r6, VCPU_GPR(R6)(r4)
-        ld      r7, VCPU_GPR(r7)(r4)
+        ld      r7, VCPU_GPR(R7)(r4)
-        ld      r8, VCPU_GPR(r8)(r4)
+        ld      r8, VCPU_GPR(R8)(r4)
-        ld      r9, VCPU_GPR(r9)(r4)
+        ld      r9, VCPU_GPR(R9)(r4)
-        ld      r10, VCPU_GPR(r10)(r4)
+        ld      r10, VCPU_GPR(R10)(r4)
-        ld      r11, VCPU_GPR(r11)(r4)
+        ld      r11, VCPU_GPR(R11)(r4)
-        ld      r12, VCPU_GPR(r12)(r4)
+        ld      r12, VCPU_GPR(R12)(r4)
-        ld      r13, VCPU_GPR(r13)(r4)
+        ld      r13, VCPU_GPR(R13)(r4)
-        ld      r4, VCPU_GPR(r4)(r4)
+        ld      r4, VCPU_GPR(R4)(r4)
        hrfid
        b       .
@@ -590,22 +587,22 @@ kvmppc_interrupt:
        /* Save registers */
-        std     r0, VCPU_GPR(r0)(r9)
+        std     r0, VCPU_GPR(R0)(r9)
-        std     r1, VCPU_GPR(r1)(r9)
+        std     r1, VCPU_GPR(R1)(r9)
-        std     r2, VCPU_GPR(r2)(r9)
+        std     r2, VCPU_GPR(R2)(r9)
-        std     r3, VCPU_GPR(r3)(r9)
+        std     r3, VCPU_GPR(R3)(r9)
-        std     r4, VCPU_GPR(r4)(r9)
+        std     r4, VCPU_GPR(R4)(r9)
-        std     r5, VCPU_GPR(r5)(r9)
+        std     r5, VCPU_GPR(R5)(r9)
-        std     r6, VCPU_GPR(r6)(r9)
+        std     r6, VCPU_GPR(R6)(r9)
-        std     r7, VCPU_GPR(r7)(r9)
+        std     r7, VCPU_GPR(R7)(r9)
-        std     r8, VCPU_GPR(r8)(r9)
+        std     r8, VCPU_GPR(R8)(r9)
        ld      r0, HSTATE_HOST_R2(r13)
-        std     r0, VCPU_GPR(r9)(r9)
+        std     r0, VCPU_GPR(R9)(r9)
-        std     r10, VCPU_GPR(r10)(r9)
+        std     r10, VCPU_GPR(R10)(r9)
-        std     r11, VCPU_GPR(r11)(r9)
+        std     r11, VCPU_GPR(R11)(r9)
        ld      r3, HSTATE_SCRATCH0(r13)
        lwz     r4, HSTATE_SCRATCH1(r13)
-        std     r3, VCPU_GPR(r12)(r9)
+        std     r3, VCPU_GPR(R12)(r9)
        stw     r4, VCPU_CR(r9)
        /* Restore R1/R2 so we can handle faults */
@@ -626,7 +623,7 @@ kvmppc_interrupt:
        GET_SCRATCH0(r3)
        mflr    r4
-        std     r3, VCPU_GPR(r13)(r9)
+        std     r3, VCPU_GPR(R13)(r9)
        std     r4, VCPU_LR(r9)
        /* Unset guest mode */
@@ -810,7 +807,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_201)
        lwz     r3,VCORE_NAPPING_THREADS(r5)
        lwz     r4,VCPU_PTID(r9)
        li      r0,1
-        sldi    r0,r0,r4
+        sld     r0,r0,r4
        andc.   r3,r3,r0                /* no sense IPI'ing ourselves */
        beq     43f
        mulli   r4,r4,PACA_SIZE         /* get paca for thread 0 */
@@ -968,24 +965,24 @@ BEGIN_FTR_SECTION
 END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
        /* Save non-volatile GPRs */
-        std     r14, VCPU_GPR(r14)(r9)
+        std     r14, VCPU_GPR(R14)(r9)
-        std     r15, VCPU_GPR(r15)(r9)
+        std     r15, VCPU_GPR(R15)(r9)
-        std     r16, VCPU_GPR(r16)(r9)
+        std     r16, VCPU_GPR(R16)(r9)
-        std     r17, VCPU_GPR(r17)(r9)
+        std     r17, VCPU_GPR(R17)(r9)
-        std     r18, VCPU_GPR(r18)(r9)
+        std     r18, VCPU_GPR(R18)(r9)
-        std     r19, VCPU_GPR(r19)(r9)
+        std     r19, VCPU_GPR(R19)(r9)
-        std     r20, VCPU_GPR(r20)(r9)
+        std     r20, VCPU_GPR(R20)(r9)
-        std     r21, VCPU_GPR(r21)(r9)
+        std     r21, VCPU_GPR(R21)(r9)
-        std     r22, VCPU_GPR(r22)(r9)
+        std     r22, VCPU_GPR(R22)(r9)
-        std     r23, VCPU_GPR(r23)(r9)
+        std     r23, VCPU_GPR(R23)(r9)
-        std     r24, VCPU_GPR(r24)(r9)
+        std     r24, VCPU_GPR(R24)(r9)
-        std     r25, VCPU_GPR(r25)(r9)
+        std     r25, VCPU_GPR(R25)(r9)
-        std     r26, VCPU_GPR(r26)(r9)
+        std     r26, VCPU_GPR(R26)(r9)
-        std     r27, VCPU_GPR(r27)(r9)
+        std     r27, VCPU_GPR(R27)(r9)
-        std     r28, VCPU_GPR(r28)(r9)
+        std     r28, VCPU_GPR(R28)(r9)
-        std     r29, VCPU_GPR(r29)(r9)
+        std     r29, VCPU_GPR(R29)(r9)
-        std     r30, VCPU_GPR(r30)(r9)
+        std     r30, VCPU_GPR(R30)(r9)
-        std     r31, VCPU_GPR(r31)(r9)
+        std     r31, VCPU_GPR(R31)(r9)
        /* Save SPRGs */
        mfspr   r3, SPRN_SPRG0
@@ -1067,6 +1064,10 @@ END_FTR_SECTION_IFSET(CPU_FTR_ARCH_206)
        mtspr   SPRN_DABR,r5
        mtspr   SPRN_DABRX,r6
+        /* Restore SPRG3 */
+        ld      r3,HSTATE_SPRG3(r13)
+        mtspr   SPRN_SPRG3,r3
        /*
         * Reload DEC.  HDEC interrupts were disabled when
         * we reloaded the host's LPCR value.
@@ -1160,7 +1161,7 @@ kvmppc_hdsi:
        andi.   r0, r11, MSR_DR         /* data relocation enabled? */
        beq     3f
        clrrdi  r0, r4, 28
-        PPC_SLBFEE_DOT(r5, r0)          /* if so, look up SLB */
+        PPC_SLBFEE_DOT(R5, R0)          /* if so, look up SLB */
        bne     1f                      /* if no SLB entry found */
 4:      std     r4, VCPU_FAULT_DAR(r9)
        stw     r6, VCPU_FAULT_DSISR(r9)
@@ -1234,7 +1235,7 @@ kvmppc_hisi:
        andi.   r0, r11, MSR_IR         /* instruction relocation enabled? */
        beq     3f
        clrrdi  r0, r10, 28
-        PPC_SLBFEE_DOT(r5, r0)          /* if so, look up SLB */
+        PPC_SLBFEE_DOT(R5, R0)          /* if so, look up SLB */
        bne     1f                      /* if no SLB entry found */
 4:
        /* Search the hash table. */
@@ -1278,7 +1279,7 @@ kvmppc_hisi:
 */
        .globl  hcall_try_real_mode
 hcall_try_real_mode:
-        ld      r3,VCPU_GPR(r3)(r9)
+        ld      r3,VCPU_GPR(R3)(r9)
        andi.   r0,r11,MSR_PR
        bne     hcall_real_cont
        clrrdi  r3,r3,2
@@ -1291,12 +1292,12 @@ hcall_try_real_mode:
        add     r3,r3,r4
        mtctr   r3
        mr      r3,r9           /* get vcpu pointer */
-        ld      r4,VCPU_GPR(r4)(r9)
+        ld      r4,VCPU_GPR(R4)(r9)
        bctrl
        cmpdi   r3,H_TOO_HARD
        beq     hcall_real_fallback
        ld      r4,HSTATE_KVM_VCPU(r13)
-        std     r3,VCPU_GPR(r3)(r4)
+        std     r3,VCPU_GPR(R3)(r4)
        ld      r10,VCPU_PC(r4)
        ld      r11,VCPU_MSR(r4)
        b       fast_guest_return
@@ -1424,7 +1425,7 @@ _GLOBAL(kvmppc_h_cede)
        li      r0,0            /* set trap to 0 to say hcall is handled */
        stw     r0,VCPU_TRAP(r3)
        li      r0,H_SUCCESS
-        std     r0,VCPU_GPR(r3)(r3)
+        std     r0,VCPU_GPR(R3)(r3)
 BEGIN_FTR_SECTION
        b       2f              /* just send it up to host on 970 */
 END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
@@ -1443,7 +1444,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
        addi    r6,r5,VCORE_NAPPING_THREADS
 31:     lwarx   r4,0,r6
        or      r4,r4,r0
-        PPC_POPCNTW(r7,r4)
+        PPC_POPCNTW(R7,R4)
        cmpw    r7,r8
        bge     2f
        stwcx.  r4,0,r6
@@ -1464,24 +1465,24 @@ END_FTR_SECTION_IFCLR(CPU_FTR_ARCH_206)
 * DAR, DSISR, DABR, DABRX, DSCR, PMCx, MMCRx, SIAR, SDAR.
 */
        /* Save non-volatile GPRs */
-        std     r14, VCPU_GPR(r14)(r3)
+        std     r14, VCPU_GPR(R14)(r3)
-        std     r15, VCPU_GPR(r15)(r3)
+        std     r15, VCPU_GPR(R15)(r3)
-        std     r16, VCPU_GPR(r16)(r3)
+        std     r16, VCPU_GPR(R16)(r3)
-        std     r17, VCPU_GPR(r17)(r3)
+        std     r17, VCPU_GPR(R17)(r3)
-        std     r18, VCPU_GPR(r18)(r3)
+        std     r18, VCPU_GPR(R18)(r3)
-        std     r19, VCPU_GPR(r19)(r3)
+        std     r19, VCPU_GPR(R19)(r3)
-        std     r20, VCPU_GPR(r20)(r3)
+        std     r20, VCPU_GPR(R20)(r3)
-        std     r21, VCPU_GPR(r21)(r3)
+        std     r21, VCPU_GPR(R21)(r3)
-        std     r22, VCPU_GPR(r22)(r3)
+        std     r22, VCPU_GPR(R22)(r3)
-        std     r23, VCPU_GPR(r23)(r3)
+        std     r23, VCPU_GPR(R23)(r3)
-        std     r24, VCPU_GPR(r24)(r3)
+        std     r24, VCPU_GPR(R24)(r3)
-        std     r25, VCPU_GPR(r25)(r3)
+        std     r25, VCPU_GPR(R25)(r3)
-        std     r26, VCPU_GPR(r26)(r3)
+        std     r26, VCPU_GPR(R26)(r3)
-        std     r27, VCPU_GPR(r27)(r3)
+        std     r27, VCPU_GPR(R27)(r3)
-        std     r28, VCPU_GPR(r28)(r3)
+        std     r28, VCPU_GPR(R28)(r3)
-        std     r29, VCPU_GPR(r29)(r3)
+        std     r29, VCPU_GPR(R29)(r3)
-        std     r30, VCPU_GPR(r30)(r3)
+        std     r30, VCPU_GPR(R30)(r3)
-        std     r31, VCPU_GPR(r31)(r3)
+        std     r31, VCPU_GPR(R31)(r3)
        /* save FP state */
        bl      .kvmppc_save_fp
@@ -1513,24 +1514,24 @@ kvm_end_cede:
        bl      kvmppc_load_fp
        /* Load NV GPRS */
-        ld      r14, VCPU_GPR(r14)(r4)
+        ld      r14, VCPU_GPR(R14)(r4)
-        ld      r15, VCPU_GPR(r15)(r4)
+        ld      r15, VCPU_GPR(R15)(r4)
-        ld      r16, VCPU_GPR(r16)(r4)
+        ld      r16, VCPU_GPR(R16)(r4)
-        ld      r17, VCPU_GPR(r17)(r4)
+        ld      r17, VCPU_GPR(R17)(r4)
-        ld      r18, VCPU_GPR(r18)(r4)
+        ld      r18, VCPU_GPR(R18)(r4)
-        ld      r19, VCPU_GPR(r19)(r4)
+        ld      r19, VCPU_GPR(R19)(r4)
-        ld      r20, VCPU_GPR(r20)(r4)
+        ld      r20, VCPU_GPR(R20)(r4)
-        ld      r21, VCPU_GPR(r21)(r4)
+        ld      r21, VCPU_GPR(R21)(r4)
-        ld      r22, VCPU_GPR(r22)(r4)
+        ld      r22, VCPU_GPR(R22)(r4)
-        ld      r23, VCPU_GPR(r23)(r4)
+        ld      r23, VCPU_GPR(R23)(r4)
-        ld      r24, VCPU_GPR(r24)(r4)
+        ld      r24, VCPU_GPR(R24)(r4)
-        ld      r25, VCPU_GPR(r25)(r4)
+        ld      r25, VCPU_GPR(R25)(r4)
-        ld      r26, VCPU_GPR(r26)(r4)
+        ld      r26, VCPU_GPR(R26)(r4)
-        ld      r27, VCPU_GPR(r27)(r4)
+        ld      r27, VCPU_GPR(R27)(r4)
-        ld      r28, VCPU_GPR(r28)(r4)
+        ld      r28, VCPU_GPR(R28)(r4)
-        ld      r29, VCPU_GPR(r29)(r4)
+        ld      r29, VCPU_GPR(R29)(r4)
-        ld      r30, VCPU_GPR(r30)(r4)
+        ld      r30, VCPU_GPR(R30)(r4)
-        ld      r31, VCPU_GPR(r31)(r4)
+        ld      r31, VCPU_GPR(R31)(r4)
        /* clear our bit in vcore->napping_threads */
 33:     ld      r5,HSTATE_KVM_VCORE(r13)
@@ -1649,7 +1650,7 @@ BEGIN_FTR_SECTION
        reg = 0
        .rept   32
        li      r6,reg*16+VCPU_VSRS
-        STXVD2X(reg,r6,r3)
+        STXVD2X(reg,R6,R3)
        reg = reg + 1
        .endr
 FTR_SECTION_ELSE
@@ -1711,7 +1712,7 @@ BEGIN_FTR_SECTION
        reg = 0
        .rept   32
        li      r7,reg*16+VCPU_VSRS
-        LXVD2X(reg,r7,r4)
+        LXVD2X(reg,R7,R4)
        reg = reg + 1
        .endr
 FTR_SECTION_ELSE
diff --git a/arch/powerpc/kvm/book3s_interrupts.S b/arch/powerpc/kvm/book3s_interrupts.S
index 3e35383bdb21..48cbbf862958 100644
--- a/arch/powerpc/kvm/book3s_interrupts.S
+++ b/arch/powerpc/kvm/book3s_interrupts.S
@@ -25,38 +25,30 @@
 #include <asm/exception-64s.h>
 #if defined(CONFIG_PPC_BOOK3S_64)
-#define ULONG_SIZE              8
 #define FUNC(name)              GLUE(.,name)
 #elif defined(CONFIG_PPC_BOOK3S_32)
-#define ULONG_SIZE              4
 #define FUNC(name)              name
 #endif /* CONFIG_PPC_BOOK3S_XX */
-#define VCPU_GPR(n)             (VCPU_GPRS + (n * ULONG_SIZE))
 #define VCPU_LOAD_NVGPRS(vcpu) \
-        PPC_LL  r14, VCPU_GPR(r14)(vcpu); \
+        PPC_LL  r14, VCPU_GPR(R14)(vcpu); \
-        PPC_LL  r15, VCPU_GPR(r15)(vcpu); \
+        PPC_LL  r15, VCPU_GPR(R15)(vcpu); \
-        PPC_LL  r16, VCPU_GPR(r16)(vcpu); \
+        PPC_LL  r16, VCPU_GPR(R16)(vcpu); \
-        PPC_LL  r17, VCPU_GPR(r17)(vcpu); \
+        PPC_LL  r17, VCPU_GPR(R17)(vcpu); \
-        PPC_LL  r18, VCPU_GPR(r18)(vcpu); \
+        PPC_LL  r18, VCPU_GPR(R18)(vcpu); \
-        PPC_LL  r19, VCPU_GPR(r19)(vcpu); \
+        PPC_LL  r19, VCPU_GPR(R19)(vcpu); \
-        PPC_LL  r20, VCPU_GPR(r20)(vcpu); \
+        PPC_LL  r20, VCPU_GPR(R20)(vcpu); \
-        PPC_LL  r21, VCPU_GPR(r21)(vcpu); \
+        PPC_LL  r21, VCPU_GPR(R21)(vcpu); \
-        PPC_LL  r22, VCPU_GPR(r22)(vcpu); \
+        PPC_LL  r22, VCPU_GPR(R22)(vcpu); \
-        PPC_LL  r23, VCPU_GPR(r23)(vcpu); \
+        PPC_LL  r23, VCPU_GPR(R23)(vcpu); \
-        PPC_LL  r24, VCPU_GPR(r24)(vcpu); \
+        PPC_LL  r24, VCPU_GPR(R24)(vcpu); \
-        PPC_LL  r25, VCPU_GPR(r25)(vcpu); \
+        PPC_LL  r25, VCPU_GPR(R25)(vcpu); \
-        PPC_LL  r26, VCPU_GPR(r26)(vcpu); \
+        PPC_LL  r26, VCPU_GPR(R26)(vcpu); \
-        PPC_LL  r27, VCPU_GPR(r27)(vcpu); \
+        PPC_LL  r27, VCPU_GPR(R27)(vcpu); \
-        PPC_LL  r28, VCPU_GPR(r28)(vcpu); \
+        PPC_LL  r28, VCPU_GPR(R28)(vcpu); \
-        PPC_LL  r29, VCPU_GPR(r29)(vcpu); \
+        PPC_LL  r29, VCPU_GPR(R29)(vcpu); \
-        PPC_LL  r30, VCPU_GPR(r30)(vcpu); \
+        PPC_LL  r30, VCPU_GPR(R30)(vcpu); \
-        PPC_LL  r31, VCPU_GPR(r31)(vcpu); \
+        PPC_LL  r31, VCPU_GPR(R31)(vcpu); \
 /*****************************************************************************
 *                                                                           *
@@ -131,24 +123,24 @@ kvmppc_handler_highmem:
        /* R7 = vcpu */
        PPC_LL  r7, GPR4(r1)
-        PPC_STL r14, VCPU_GPR(r14)(r7)
+        PPC_STL r14, VCPU_GPR(R14)(r7)
-        PPC_STL r15, VCPU_GPR(r15)(r7)
+        PPC_STL r15, VCPU_GPR(R15)(r7)
-        PPC_STL r16, VCPU_GPR(r16)(r7)
+        PPC_STL r16, VCPU_GPR(R16)(r7)
-        PPC_STL r17, VCPU_GPR(r17)(r7)
+        PPC_STL r17, VCPU_GPR(R17)(r7)
-        PPC_STL r18, VCPU_GPR(r18)(r7)
+        PPC_STL r18, VCPU_GPR(R18)(r7)
-        PPC_STL r19, VCPU_GPR(r19)(r7)
+        PPC_STL r19, VCPU_GPR(R19)(r7)
-        PPC_STL r20, VCPU_GPR(r20)(r7)
+        PPC_STL r20, VCPU_GPR(R20)(r7)
-        PPC_STL r21, VCPU_GPR(r21)(r7)
+        PPC_STL r21, VCPU_GPR(R21)(r7)
-        PPC_STL r22, VCPU_GPR(r22)(r7)
+        PPC_STL r22, VCPU_GPR(R22)(r7)
-        PPC_STL r23, VCPU_GPR(r23)(r7)
+        PPC_STL r23, VCPU_GPR(R23)(r7)
-        PPC_STL r24, VCPU_GPR(r24)(r7)
+        PPC_STL r24, VCPU_GPR(R24)(r7)
-        PPC_STL r25, VCPU_GPR(r25)(r7)
+        PPC_STL r25, VCPU_GPR(R25)(r7)
-        PPC_STL r26, VCPU_GPR(r26)(r7)
+        PPC_STL r26, VCPU_GPR(R26)(r7)
-        PPC_STL r27, VCPU_GPR(r27)(r7)
+        PPC_STL r27, VCPU_GPR(R27)(r7)
-        PPC_STL r28, VCPU_GPR(r28)(r7)
+        PPC_STL r28, VCPU_GPR(R28)(r7)
-        PPC_STL r29, VCPU_GPR(r29)(r7)
+        PPC_STL r29, VCPU_GPR(R29)(r7)
-        PPC_STL r30, VCPU_GPR(r30)(r7)
+        PPC_STL r30, VCPU_GPR(R30)(r7)
-        PPC_STL r31, VCPU_GPR(r31)(r7)
+        PPC_STL r31, VCPU_GPR(R31)(r7)
        /* Pass the exit number as 3rd argument to kvmppc_handle_exit */
        mr      r5, r12
diff --git a/arch/powerpc/kvm/book3s_pr_papr.c b/arch/powerpc/kvm/book3s_pr_papr.c
index 3ff9013d6e79..ee02b30878ed 100644
--- a/arch/powerpc/kvm/book3s_pr_papr.c
+++ b/arch/powerpc/kvm/book3s_pr_papr.c
@@ -241,6 +241,7 @@ int kvmppc_h_pr(struct kvm_vcpu *vcpu, unsigned long cmd)
        case H_PUT_TCE:
                return kvmppc_h_pr_put_tce(vcpu);
        case H_CEDE:
+                vcpu->arch.shared->msr |= MSR_EE;
                kvm_vcpu_block(vcpu);
                clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
                vcpu->stat.halt_wakeup++;
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S
index 34187585c507..ab523f3c1731 100644
--- a/arch/powerpc/kvm/book3s_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_rmhandlers.S
@@ -37,7 +37,6 @@
 #if defined(CONFIG_PPC_BOOK3S_64)
 #define FUNC(name)              GLUE(.,name)
-#define MTMSR_EERI(reg)         mtmsrd  (reg),1
        .globl  kvmppc_skip_interrupt
 kvmppc_skip_interrupt:
diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
index 798491a268b3..1abe4788191a 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -23,7 +23,6 @@
 #define GET_SHADOW_VCPU(reg)    \
        mr      reg, r13
-#define MTMSR_EERI(reg)         mtmsrd  (reg),1
 #elif defined(CONFIG_PPC_BOOK3S_32)
@@ -31,7 +30,6 @@
        tophys(reg, r2);                        \
        lwz     reg, (THREAD + THREAD_KVM_SVCPU)(reg);  \
        tophys(reg, reg)
-#define MTMSR_EERI(reg)         mtmsr   (reg)
 #endif
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 09456c4719f3..bb46b32f9813 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -25,8 +25,6 @@
 #include <asm/page.h>
 #include <asm/asm-offsets.h>
-#define VCPU_GPR(n)     (VCPU_GPRS + (n * 4))
 /* The host stack layout: */
 #define HOST_R1         0 /* Implied by stwu. */
 #define HOST_CALLEE_LR  4
@@ -36,8 +34,9 @@
 #define HOST_R2         12
 #define HOST_CR         16
 #define HOST_NV_GPRS    20
-#define HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * 4))
+#define __HOST_NV_GPR(n)  (HOST_NV_GPRS + ((n - 14) * 4))
-#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(31) + 4)
+#define HOST_NV_GPR(n)  __HOST_NV_GPR(__REG_##n)
+#define HOST_MIN_STACK_SIZE (HOST_NV_GPR(R31) + 4)
 #define HOST_STACK_SIZE (((HOST_MIN_STACK_SIZE + 15) / 16) * 16) /* Align. */
 #define HOST_STACK_LR   (HOST_STACK_SIZE + 4) /* In caller stack frame. */
@@ -58,12 +57,12 @@ _GLOBAL(kvmppc_handler_\ivor_nr)
        /* Get pointer to vcpu and record exit number. */
        mtspr   \scratch , r4
        mfspr   r4, SPRN_SPRG_RVCPU
-        stw     r3, VCPU_GPR(r3)(r4)
+        stw     r3, VCPU_GPR(R3)(r4)
-        stw     r5, VCPU_GPR(r5)(r4)
+        stw     r5, VCPU_GPR(R5)(r4)
-        stw     r6, VCPU_GPR(r6)(r4)
+        stw     r6, VCPU_GPR(R6)(r4)
        mfspr   r3, \scratch
        mfctr   r5
-        stw     r3, VCPU_GPR(r4)(r4)
+        stw     r3, VCPU_GPR(R4)(r4)
        stw     r5, VCPU_CTR(r4)
        mfspr   r3, \srr0
        lis     r6, kvmppc_resume_host@h
@@ -106,9 +105,9 @@ _GLOBAL(kvmppc_handler_len)
 _GLOBAL(kvmppc_resume_host)
        mfcr    r3
        stw     r3, VCPU_CR(r4)
-        stw     r7, VCPU_GPR(r7)(r4)
+        stw     r7, VCPU_GPR(R7)(r4)
-        stw     r8, VCPU_GPR(r8)(r4)
+        stw     r8, VCPU_GPR(R8)(r4)
-        stw     r9, VCPU_GPR(r9)(r4)
+        stw     r9, VCPU_GPR(R9)(r4)
        li      r6, 1
        slw     r6, r6, r5
@@ -138,23 +137,23 @@ _GLOBAL(kvmppc_resume_host)
        isync
        stw     r9, VCPU_LAST_INST(r4)
-        stw     r15, VCPU_GPR(r15)(r4)
+        stw     r15, VCPU_GPR(R15)(r4)
-        stw     r16, VCPU_GPR(r16)(r4)
+        stw     r16, VCPU_GPR(R16)(r4)
-        stw     r17, VCPU_GPR(r17)(r4)
+        stw     r17, VCPU_GPR(R17)(r4)
-        stw     r18, VCPU_GPR(r18)(r4)
+        stw     r18, VCPU_GPR(R18)(r4)
-        stw     r19, VCPU_GPR(r19)(r4)
+        stw     r19, VCPU_GPR(R19)(r4)
-        stw     r20, VCPU_GPR(r20)(r4)
+        stw     r20, VCPU_GPR(R20)(r4)
-        stw     r21, VCPU_GPR(r21)(r4)
+        stw     r21, VCPU_GPR(R21)(r4)
-        stw     r22, VCPU_GPR(r22)(r4)
+        stw     r22, VCPU_GPR(R22)(r4)
-        stw     r23, VCPU_GPR(r23)(r4)
+        stw     r23, VCPU_GPR(R23)(r4)
-        stw     r24, VCPU_GPR(r24)(r4)
+        stw     r24, VCPU_GPR(R24)(r4)
-        stw     r25, VCPU_GPR(r25)(r4)
+        stw     r25, VCPU_GPR(R25)(r4)
-        stw     r26, VCPU_GPR(r26)(r4)
+        stw     r26, VCPU_GPR(R26)(r4)
-        stw     r27, VCPU_GPR(r27)(r4)
+        stw     r27, VCPU_GPR(R27)(r4)
-        stw     r28, VCPU_GPR(r28)(r4)
+        stw     r28, VCPU_GPR(R28)(r4)
-        stw     r29, VCPU_GPR(r29)(r4)
+        stw     r29, VCPU_GPR(R29)(r4)
-        stw     r30, VCPU_GPR(r30)(r4)
+        stw     r30, VCPU_GPR(R30)(r4)
-        stw     r31, VCPU_GPR(r31)(r4)
+        stw     r31, VCPU_GPR(R31)(r4)
 ..skip_inst_copy:
        /* Also grab DEAR and ESR before the host can clobber them. */
@@ -172,14 +171,14 @@ _GLOBAL(kvmppc_resume_host)
 ..skip_esr:
        /* Save remaining volatile guest register state to vcpu. */
-        stw     r0, VCPU_GPR(r0)(r4)
+        stw     r0, VCPU_GPR(R0)(r4)
-        stw     r1, VCPU_GPR(r1)(r4)
+        stw     r1, VCPU_GPR(R1)(r4)
-        stw     r2, VCPU_GPR(r2)(r4)
+        stw     r2, VCPU_GPR(R2)(r4)
-        stw     r10, VCPU_GPR(r10)(r4)
+        stw     r10, VCPU_GPR(R10)(r4)
-        stw     r11, VCPU_GPR(r11)(r4)
+        stw     r11, VCPU_GPR(R11)(r4)
-        stw     r12, VCPU_GPR(r12)(r4)
+        stw     r12, VCPU_GPR(R12)(r4)
-        stw     r13, VCPU_GPR(r13)(r4)
+        stw     r13, VCPU_GPR(R13)(r4)
-        stw     r14, VCPU_GPR(r14)(r4) /* We need a NV GPR below. */
+        stw     r14, VCPU_GPR(R14)(r4) /* We need a NV GPR below. */
        mflr    r3
        stw     r3, VCPU_LR(r4)
        mfxer   r3
@@ -213,28 +212,28 @@ _GLOBAL(kvmppc_resume_host)
        /* Restore vcpu pointer and the nonvolatiles we used. */
        mr      r4, r14
-        lwz     r14, VCPU_GPR(r14)(r4)
+        lwz     r14, VCPU_GPR(R14)(r4)
        /* Sometimes instruction emulation must restore complete GPR state. */
        andi.   r5, r3, RESUME_FLAG_NV
        beq     ..skip_nv_load
-        lwz     r15, VCPU_GPR(r15)(r4)
+        lwz     r15, VCPU_GPR(R15)(r4)
-        lwz     r16, VCPU_GPR(r16)(r4)
+        lwz     r16, VCPU_GPR(R16)(r4)
-        lwz     r17, VCPU_GPR(r17)(r4)
+        lwz     r17, VCPU_GPR(R17)(r4)
-        lwz     r18, VCPU_GPR(r18)(r4)
+        lwz     r18, VCPU_GPR(R18)(r4)
-        lwz     r19, VCPU_GPR(r19)(r4)
+        lwz     r19, VCPU_GPR(R19)(r4)
-        lwz     r20, VCPU_GPR(r20)(r4)
+        lwz     r20, VCPU_GPR(R20)(r4)
-        lwz     r21, VCPU_GPR(r21)(r4)
+        lwz     r21, VCPU_GPR(R21)(r4)
-        lwz     r22, VCPU_GPR(r22)(r4)
+        lwz     r22, VCPU_GPR(R22)(r4)
-        lwz     r23, VCPU_GPR(r23)(r4)
+        lwz     r23, VCPU_GPR(R23)(r4)
-        lwz     r24, VCPU_GPR(r24)(r4)
+        lwz     r24, VCPU_GPR(R24)(r4)
-        lwz     r25, VCPU_GPR(r25)(r4)
+        lwz     r25, VCPU_GPR(R25)(r4)
-        lwz     r26, VCPU_GPR(r26)(r4)
+        lwz     r26, VCPU_GPR(R26)(r4)
-        lwz     r27, VCPU_GPR(r27)(r4)
+        lwz     r27, VCPU_GPR(R27)(r4)
-        lwz     r28, VCPU_GPR(r28)(r4)
+        lwz     r28, VCPU_GPR(R28)(r4)
-        lwz     r29, VCPU_GPR(r29)(r4)
+        lwz     r29, VCPU_GPR(R29)(r4)
-        lwz     r30, VCPU_GPR(r30)(r4)
+        lwz     r30, VCPU_GPR(R30)(r4)
-        lwz     r31, VCPU_GPR(r31)(r4)
+        lwz     r31, VCPU_GPR(R31)(r4)
 ..skip_nv_load:
        /* Should we return to the guest? */
@@ -256,43 +255,43 @@ heavyweight_exit:
        /* We already saved guest volatile register state; now save the
         * non-volatiles. */
-        stw     r15, VCPU_GPR(r15)(r4)
+        stw     r15, VCPU_GPR(R15)(r4)
-        stw     r16, VCPU_GPR(r16)(r4)
+        stw     r16, VCPU_GPR(R16)(r4)
-        stw     r17, VCPU_GPR(r17)(r4)
+        stw     r17, VCPU_GPR(R17)(r4)
-        stw     r18, VCPU_GPR(r18)(r4)
+        stw     r18, VCPU_GPR(R18)(r4)
-        stw     r19, VCPU_GPR(r19)(r4)
+        stw     r19, VCPU_GPR(R19)(r4)
-        stw     r20, VCPU_GPR(r20)(r4)
+        stw     r20, VCPU_GPR(R20)(r4)
-        stw     r21, VCPU_GPR(r21)(r4)
+        stw     r21, VCPU_GPR(R21)(r4)
-        stw     r22, VCPU_GPR(r22)(r4)
+        stw     r22, VCPU_GPR(R22)(r4)
-        stw     r23, VCPU_GPR(r23)(r4)
+        stw     r23, VCPU_GPR(R23)(r4)
-        stw     r24, VCPU_GPR(r24)(r4)
+        stw     r24, VCPU_GPR(R24)(r4)
-        stw     r25, VCPU_GPR(r25)(r4)
+        stw     r25, VCPU_GPR(R25)(r4)
-        stw     r26, VCPU_GPR(r26)(r4)
+        stw     r26, VCPU_GPR(R26)(r4)
-        stw     r27, VCPU_GPR(r27)(r4)
+        stw     r27, VCPU_GPR(R27)(r4)
-        stw     r28, VCPU_GPR(r28)(r4)
+        stw     r28, VCPU_GPR(R28)(r4)
-        stw     r29, VCPU_GPR(r29)(r4)
+        stw     r29, VCPU_GPR(R29)(r4)
-        stw     r30, VCPU_GPR(r30)(r4)
+        stw     r30, VCPU_GPR(R30)(r4)
-        stw     r31, VCPU_GPR(r31)(r4)
+        stw     r31, VCPU_GPR(R31)(r4)
        /* Load host non-volatile register state from host stack. */
-        lwz     r14, HOST_NV_GPR(r14)(r1)
+        lwz     r14, HOST_NV_GPR(R14)(r1)
-        lwz     r15, HOST_NV_GPR(r15)(r1)
+        lwz     r15, HOST_NV_GPR(R15)(r1)
-        lwz     r16, HOST_NV_GPR(r16)(r1)
+        lwz     r16, HOST_NV_GPR(R16)(r1)
-        lwz     r17, HOST_NV_GPR(r17)(r1)
+        lwz     r17, HOST_NV_GPR(R17)(r1)
-        lwz     r18, HOST_NV_GPR(r18)(r1)
+        lwz     r18, HOST_NV_GPR(R18)(r1)
-        lwz     r19, HOST_NV_GPR(r19)(r1)
+        lwz     r19, HOST_NV_GPR(R19)(r1)
-        lwz     r20, HOST_NV_GPR(r20)(r1)
+        lwz     r20, HOST_NV_GPR(R20)(r1)
-        lwz     r21, HOST_NV_GPR(r21)(r1)
+        lwz     r21, HOST_NV_GPR(R21)(r1)
-        lwz     r22, HOST_NV_GPR(r22)(r1)
+        lwz     r22, HOST_NV_GPR(R22)(r1)
-        lwz     r23, HOST_NV_GPR(r23)(r1)
+        lwz     r23, HOST_NV_GPR(R23)(r1)
-        lwz     r24, HOST_NV_GPR(r24)(r1)
+        lwz     r24, HOST_NV_GPR(R24)(r1)
-        lwz     r25, HOST_NV_GPR(r25)(r1)
+        lwz     r25, HOST_NV_GPR(R25)(r1)
-        lwz     r26, HOST_NV_GPR(r26)(r1)
+        lwz     r26, HOST_NV_GPR(R26)(r1)
-        lwz     r27, HOST_NV_GPR(r27)(r1)
+        lwz     r27, HOST_NV_GPR(R27)(r1)
-        lwz     r28, HOST_NV_GPR(r28)(r1)
+        lwz     r28, HOST_NV_GPR(R28)(r1)
-        lwz     r29, HOST_NV_GPR(r29)(r1)
+        lwz     r29, HOST_NV_GPR(R29)(r1)
-        lwz     r30, HOST_NV_GPR(r30)(r1)
+        lwz     r30, HOST_NV_GPR(R30)(r1)
-        lwz     r31, HOST_NV_GPR(r31)(r1)
+        lwz     r31, HOST_NV_GPR(R31)(r1)
        /* Return to kvm_vcpu_run(). */
        lwz     r4, HOST_STACK_LR(r1)
@@ -320,44 +319,44 @@ _GLOBAL(__kvmppc_vcpu_run)
        stw     r5, HOST_CR(r1)
        /* Save host non-volatile register state to stack. */
-        stw     r14, HOST_NV_GPR(r14)(r1)
+        stw     r14, HOST_NV_GPR(R14)(r1)
-        stw     r15, HOST_NV_GPR(r15)(r1)
+        stw     r15, HOST_NV_GPR(R15)(r1)
-        stw     r16, HOST_NV_GPR(r16)(r1)
+        stw     r16, HOST_NV_GPR(R16)(r1)
-        stw     r17, HOST_NV_GPR(r17)(r1)
+        stw     r17, HOST_NV_GPR(R17)(r1)
-        stw     r18, HOST_NV_GPR(r18)(r1)
+        stw     r18, HOST_NV_GPR(R18)(r1)
-        stw     r19, HOST_NV_GPR(r19)(r1)
+        stw     r19, HOST_NV_GPR(R19)(r1)
-        stw     r20, HOST_NV_GPR(r20)(r1)
+        stw     r20, HOST_NV_GPR(R20)(r1)
-        stw     r21, HOST_NV_GPR(r21)(r1)
+        stw     r21, HOST_NV_GPR(R21)(r1)
-        stw     r22, HOST_NV_GPR(r22)(r1)
+        stw     r22, HOST_NV_GPR(R22)(r1)
-        stw     r23, HOST_NV_GPR(r23)(r1)
+        stw     r23, HOST_NV_GPR(R23)(r1)
-        stw     r24, HOST_NV_GPR(r24)(r1)
+        stw     r24, HOST_NV_GPR(R24)(r1)
-        stw     r25, HOST_NV_GPR(r25)(r1)
+        stw     r25, HOST_NV_GPR(R25)(r1)
-        stw     r26, HOST_NV_GPR(r26)(r1)
+        stw     r26, HOST_NV_GPR(R26)(r1)
-        stw     r27, HOST_NV_GPR(r27)(r1)
+        stw     r27, HOST_NV_GPR(R27)(r1)
-        stw     r28, HOST_NV_GPR(r28)(r1)
+        stw     r28, HOST_NV_GPR(R28)(r1)
-        stw     r29, HOST_NV_GPR(r29)(r1)
+        stw     r29, HOST_NV_GPR(R29)(r1)
-        stw     r30, HOST_NV_GPR(r30)(r1)
+        stw     r30, HOST_NV_GPR(R30)(r1)
-        stw     r31, HOST_NV_GPR(r31)(r1)
+        stw     r31, HOST_NV_GPR(R31)(r1)
        /* Load guest non-volatiles. */
-        lwz     r14, VCPU_GPR(r14)(r4)
+        lwz     r14, VCPU_GPR(R14)(r4)
-        lwz     r15, VCPU_GPR(r15)(r4)
+        lwz     r15, VCPU_GPR(R15)(r4)
-        lwz     r16, VCPU_GPR(r16)(r4)
+        lwz     r16, VCPU_GPR(R16)(r4)
-        lwz     r17, VCPU_GPR(r17)(r4)
+        lwz     r17, VCPU_GPR(R17)(r4)
-        lwz     r18, VCPU_GPR(r18)(r4)
+        lwz     r18, VCPU_GPR(R18)(r4)
-        lwz     r19, VCPU_GPR(r19)(r4)
+        lwz     r19, VCPU_GPR(R19)(r4)
-        lwz     r20, VCPU_GPR(r20)(r4)
+        lwz     r20, VCPU_GPR(R20)(r4)
-        lwz     r21, VCPU_GPR(r21)(r4)
+        lwz     r21, VCPU_GPR(R21)(r4)
-        lwz     r22, VCPU_GPR(r22)(r4)
+        lwz     r22, VCPU_GPR(R22)(r4)
-        lwz     r23, VCPU_GPR(r23)(r4)
+        lwz     r23, VCPU_GPR(R23)(r4)
-        lwz     r24, VCPU_GPR(r24)(r4)
+        lwz     r24, VCPU_GPR(R24)(r4)
-        lwz     r25, VCPU_GPR(r25)(r4)
+        lwz     r25, VCPU_GPR(R25)(r4)
-        lwz     r26, VCPU_GPR(r26)(r4)
+        lwz     r26, VCPU_GPR(R26)(r4)
-        lwz     r27, VCPU_GPR(r27)(r4)
+        lwz     r27, VCPU_GPR(R27)(r4)
-        lwz     r28, VCPU_GPR(r28)(r4)
+        lwz     r28, VCPU_GPR(R28)(r4)
-        lwz     r29, VCPU_GPR(r29)(r4)
+        lwz     r29, VCPU_GPR(R29)(r4)
-        lwz     r30, VCPU_GPR(r30)(r4)
+        lwz     r30, VCPU_GPR(R30)(r4)
-        lwz     r31, VCPU_GPR(r31)(r4)
+        lwz     r31, VCPU_GPR(R31)(r4)
 #ifdef CONFIG_SPE
        /* save host SPEFSCR and load guest SPEFSCR */
@@ -385,13 +384,13 @@ lightweight_exit:
 #endif
        /* Load some guest volatiles. */
-        lwz     r0, VCPU_GPR(r0)(r4)
+        lwz     r0, VCPU_GPR(R0)(r4)
-        lwz     r2, VCPU_GPR(r2)(r4)
+        lwz     r2, VCPU_GPR(R2)(r4)
-        lwz     r9, VCPU_GPR(r9)(r4)
+        lwz     r9, VCPU_GPR(R9)(r4)
-        lwz     r10, VCPU_GPR(r10)(r4)
+        lwz     r10, VCPU_GPR(R10)(r4)
-        lwz     r11, VCPU_GPR(r11)(r4)
+        lwz     r11, VCPU_GPR(R11)(r4)
-        lwz     r12, VCPU_GPR(r12)(r4)
+        lwz     r12, VCPU_GPR(R12)(r4)
-        lwz     r13, VCPU_GPR(r13)(r4)
+        lwz     r13, VCPU_GPR(R13)(r4)
        lwz     r3, VCPU_LR(r4)
        mtlr    r3
        lwz     r3, VCPU_XER(r4)
@@ -410,7 +409,7 @@ lightweight_exit:
        /* Can't switch the stack pointer until after IVPR is switched,
         * because host interrupt handlers would get confused. */
-        lwz     r1, VCPU_GPR(r1)(r4)
+        lwz     r1, VCPU_GPR(R1)(r4)
        /*
         * Host interrupt handlers may have clobbered these
@@ -448,10 +447,10 @@ lightweight_exit:
        mtcr    r5
        mtsrr0  r6
        mtsrr1  r7
-        lwz     r5, VCPU_GPR(r5)(r4)
+        lwz     r5, VCPU_GPR(R5)(r4)
-        lwz     r6, VCPU_GPR(r6)(r4)
+        lwz     r6, VCPU_GPR(R6)(r4)
-        lwz     r7, VCPU_GPR(r7)(r4)
+        lwz     r7, VCPU_GPR(R7)(r4)
-        lwz     r8, VCPU_GPR(r8)(r4)
+        lwz     r8, VCPU_GPR(R8)(r4)
        /* Clear any debug events which occurred since we disabled MSR[DE].
         * XXX This gives us a 3-instruction window in which a breakpoint
@@ -460,8 +459,8 @@ lightweight_exit:
        ori     r3, r3, 0xffff
        mtspr   SPRN_DBSR, r3
-        lwz     r3, VCPU_GPR(r3)(r4)
+        lwz     r3, VCPU_GPR(R3)(r4)
-        lwz     r4, VCPU_GPR(r4)(r4)
+        lwz     r4, VCPU_GPR(R4)(r4)
        rfi
 #ifdef CONFIG_SPE
diff --git a/arch/powerpc/kvm/bookehv_interrupts.S b/arch/powerpc/kvm/bookehv_interrupts.S
index 0fa2ef7df036..d28c2d43ac1b 100644
--- a/arch/powerpc/kvm/bookehv_interrupts.S
+++ b/arch/powerpc/kvm/bookehv_interrupts.S
@@ -37,7 +37,6 @@
 #define LONGBYTES               (BITS_PER_LONG / 8)
-#define VCPU_GPR(n)             (VCPU_GPRS + (n * LONGBYTES))
 #define VCPU_GUEST_SPRG(n)      (VCPU_GUEST_SPRGS + (n * LONGBYTES))
 /* The host stack layout: */
@@ -67,15 +66,15 @@
 */
 .macro kvm_handler_common intno, srr0, flags
        /* Restore host stack pointer */
-        PPC_STL r1, VCPU_GPR(r1)(r4)
+        PPC_STL r1, VCPU_GPR(R1)(r4)
-        PPC_STL r2, VCPU_GPR(r2)(r4)
+        PPC_STL r2, VCPU_GPR(R2)(r4)
        PPC_LL  r1, VCPU_HOST_STACK(r4)
        PPC_LL  r2, HOST_R2(r1)
        mfspr   r10, SPRN_PID
        lwz     r8, VCPU_HOST_PID(r4)
        PPC_LL  r11, VCPU_SHARED(r4)
-        PPC_STL r14, VCPU_GPR(r14)(r4) /* We need a non-volatile GPR. */
+        PPC_STL r14, VCPU_GPR(R14)(r4) /* We need a non-volatile GPR. */
        li      r14, \intno
        stw     r10, VCPU_GUEST_PID(r4)
@@ -137,35 +136,31 @@
         */
        mfspr   r3, SPRN_EPLC   /* will already have correct ELPID and EGS */
-        PPC_STL r15, VCPU_GPR(r15)(r4)
+        PPC_STL r15, VCPU_GPR(R15)(r4)
-        PPC_STL r16, VCPU_GPR(r16)(r4)
+        PPC_STL r16, VCPU_GPR(R16)(r4)
-        PPC_STL r17, VCPU_GPR(r17)(r4)
+        PPC_STL r17, VCPU_GPR(R17)(r4)
-        PPC_STL r18, VCPU_GPR(r18)(r4)
+        PPC_STL r18, VCPU_GPR(R18)(r4)
-        PPC_STL r19, VCPU_GPR(r19)(r4)
+        PPC_STL r19, VCPU_GPR(R19)(r4)
        mr      r8, r3
-        PPC_STL r20, VCPU_GPR(r20)(r4)
+        PPC_STL r20, VCPU_GPR(R20)(r4)
        rlwimi  r8, r6, EPC_EAS_SHIFT - MSR_IR_LG, EPC_EAS
-        PPC_STL r21, VCPU_GPR(r21)(r4)
+        PPC_STL r21, VCPU_GPR(R21)(r4)
        rlwimi  r8, r6, EPC_EPR_SHIFT - MSR_PR_LG, EPC_EPR
-        PPC_STL r22, VCPU_GPR(r22)(r4)
+        PPC_STL r22, VCPU_GPR(R22)(r4)
        rlwimi  r8, r10, EPC_EPID_SHIFT, EPC_EPID
-        PPC_STL r23, VCPU_GPR(r23)(r4)
+        PPC_STL r23, VCPU_GPR(R23)(r4)
-        PPC_STL r24, VCPU_GPR(r24)(r4)
+        PPC_STL r24, VCPU_GPR(R24)(r4)
-        PPC_STL r25, VCPU_GPR(r25)(r4)
+        PPC_STL r25, VCPU_GPR(R25)(r4)
-        PPC_STL r26, VCPU_GPR(r26)(r4)
+        PPC_STL r26, VCPU_GPR(R26)(r4)
-        PPC_STL r27, VCPU_GPR(r27)(r4)
+        PPC_STL r27, VCPU_GPR(R27)(r4)
-        PPC_STL r28, VCPU_GPR(r28)(r4)
+        PPC_STL r28, VCPU_GPR(R28)(r4)
-        PPC_STL r29, VCPU_GPR(r29)(r4)
+        PPC_STL r29, VCPU_GPR(R29)(r4)
-        PPC_STL r30, VCPU_GPR(r30)(r4)
+        PPC_STL r30, VCPU_GPR(R30)(r4)
-        PPC_STL r31, VCPU_GPR(r31)(r4)
+        PPC_STL r31, VCPU_GPR(R31)(r4)
        mtspr   SPRN_EPLC, r8
        /* disable preemption, so we are sure we hit the fixup handler */
-#ifdef CONFIG_PPC64
+        CURRENT_THREAD_INFO(r8, r1)
-        clrrdi  r8,r1,THREAD_SHIFT
-#else
-        rlwinm  r8,r1,0,0,31-THREAD_SHIFT       /* current thread_info */
-#endif
        li      r7, 1
        stw     r7, TI_PREEMPT(r8)
@@ -211,24 +206,24 @@
 .macro kvm_handler intno srr0, srr1, flags
 _GLOBAL(kvmppc_handler_\intno\()_\srr1)
        GET_VCPU(r11, r10)
-        PPC_STL r3, VCPU_GPR(r3)(r11)
+        PPC_STL r3, VCPU_GPR(R3)(r11)
        mfspr   r3, SPRN_SPRG_RSCRATCH0
-        PPC_STL r4, VCPU_GPR(r4)(r11)
+        PPC_STL r4, VCPU_GPR(R4)(r11)
        PPC_LL  r4, THREAD_NORMSAVE(0)(r10)
-        PPC_STL r5, VCPU_GPR(r5)(r11)
+        PPC_STL r5, VCPU_GPR(R5)(r11)
        stw     r13, VCPU_CR(r11)
        mfspr   r5, \srr0
-        PPC_STL r3, VCPU_GPR(r10)(r11)
+        PPC_STL r3, VCPU_GPR(R10)(r11)
        PPC_LL  r3, THREAD_NORMSAVE(2)(r10)
-        PPC_STL r6, VCPU_GPR(r6)(r11)
+        PPC_STL r6, VCPU_GPR(R6)(r11)
-        PPC_STL r4, VCPU_GPR(r11)(r11)
+        PPC_STL r4, VCPU_GPR(R11)(r11)
        mfspr   r6, \srr1
-        PPC_STL r7, VCPU_GPR(r7)(r11)
+        PPC_STL r7, VCPU_GPR(R7)(r11)
-        PPC_STL r8, VCPU_GPR(r8)(r11)
+        PPC_STL r8, VCPU_GPR(R8)(r11)
-        PPC_STL r9, VCPU_GPR(r9)(r11)
+        PPC_STL r9, VCPU_GPR(R9)(r11)
-        PPC_STL r3, VCPU_GPR(r13)(r11)
+        PPC_STL r3, VCPU_GPR(R13)(r11)
        mfctr   r7
-        PPC_STL r12, VCPU_GPR(r12)(r11)
+        PPC_STL r12, VCPU_GPR(R12)(r11)
        PPC_STL r7, VCPU_CTR(r11)
        mr      r4, r11
        kvm_handler_common \intno, \srr0, \flags
@@ -238,25 +233,25 @@ _GLOBAL(kvmppc_handler_\intno\()_\srr1)
 _GLOBAL(kvmppc_handler_\intno\()_\srr1)
        mfspr   r10, SPRN_SPRG_THREAD
        GET_VCPU(r11, r10)
-        PPC_STL r3, VCPU_GPR(r3)(r11)
+        PPC_STL r3, VCPU_GPR(R3)(r11)
        mfspr   r3, \scratch
-        PPC_STL r4, VCPU_GPR(r4)(r11)
+        PPC_STL r4, VCPU_GPR(R4)(r11)
        PPC_LL  r4, GPR9(r8)
-        PPC_STL r5, VCPU_GPR(r5)(r11)
+        PPC_STL r5, VCPU_GPR(R5)(r11)
        stw     r9, VCPU_CR(r11)
        mfspr   r5, \srr0
-        PPC_STL r3, VCPU_GPR(r8)(r11)
+        PPC_STL r3, VCPU_GPR(R8)(r11)
        PPC_LL  r3, GPR10(r8)
-        PPC_STL r6, VCPU_GPR(r6)(r11)
+        PPC_STL r6, VCPU_GPR(R6)(r11)
-        PPC_STL r4, VCPU_GPR(r9)(r11)
+        PPC_STL r4, VCPU_GPR(R9)(r11)
        mfspr   r6, \srr1
        PPC_LL  r4, GPR11(r8)
-        PPC_STL r7, VCPU_GPR(r7)(r11)
+        PPC_STL r7, VCPU_GPR(R7)(r11)
-        PPC_STL r3, VCPU_GPR(r10)(r11)
+        PPC_STL r3, VCPU_GPR(R10)(r11)
        mfctr   r7
-        PPC_STL r12, VCPU_GPR(r12)(r11)
+        PPC_STL r12, VCPU_GPR(R12)(r11)
-        PPC_STL r13, VCPU_GPR(r13)(r11)
+        PPC_STL r13, VCPU_GPR(R13)(r11)
-        PPC_STL r4, VCPU_GPR(r11)(r11)
+        PPC_STL r4, VCPU_GPR(R11)(r11)
        PPC_STL r7, VCPU_CTR(r11)
        mr      r4, r11
        kvm_handler_common \intno, \srr0, \flags
@@ -310,7 +305,7 @@ kvm_lvl_handler BOOKE_INTERRUPT_DEBUG, \
 _GLOBAL(kvmppc_resume_host)
        /* Save remaining volatile guest register state to vcpu. */
        mfspr   r3, SPRN_VRSAVE
-        PPC_STL r0, VCPU_GPR(r0)(r4)
+        PPC_STL r0, VCPU_GPR(R0)(r4)
        mflr    r5
        mfspr   r6, SPRN_SPRG4
        PPC_STL r5, VCPU_LR(r4)
@@ -358,27 +353,27 @@ _GLOBAL(kvmppc_resume_host)
        /* Restore vcpu pointer and the nonvolatiles we used. */
        mr      r4, r14
-        PPC_LL  r14, VCPU_GPR(r14)(r4)
+        PPC_LL  r14, VCPU_GPR(R14)(r4)
        andi.   r5, r3, RESUME_FLAG_NV
        beq     skip_nv_load
-        PPC_LL  r15, VCPU_GPR(r15)(r4)
+        PPC_LL  r15, VCPU_GPR(R15)(r4)
-        PPC_LL  r16, VCPU_GPR(r16)(r4)
+        PPC_LL  r16, VCPU_GPR(R16)(r4)
-        PPC_LL  r17, VCPU_GPR(r17)(r4)
+        PPC_LL  r17, VCPU_GPR(R17)(r4)
-        PPC_LL  r18, VCPU_GPR(r18)(r4)
+        PPC_LL  r18, VCPU_GPR(R18)(r4)
-        PPC_LL  r19, VCPU_GPR(r19)(r4)
+        PPC_LL  r19, VCPU_GPR(R19)(r4)
-        PPC_LL  r20, VCPU_GPR(r20)(r4)
+        PPC_LL  r20, VCPU_GPR(R20)(r4)
-        PPC_LL  r21, VCPU_GPR(r21)(r4)
+        PPC_LL  r21, VCPU_GPR(R21)(r4)
-        PPC_LL  r22, VCPU_GPR(r22)(r4)
+        PPC_LL  r22, VCPU_GPR(R22)(r4)
-        PPC_LL  r23, VCPU_GPR(r23)(r4)
+        PPC_LL  r23, VCPU_GPR(R23)(r4)
-        PPC_LL  r24, VCPU_GPR(r24)(r4)
+        PPC_LL  r24, VCPU_GPR(R24)(r4)
-        PPC_LL  r25, VCPU_GPR(r25)(r4)
+        PPC_LL  r25, VCPU_GPR(R25)(r4)
-        PPC_LL  r26, VCPU_GPR(r26)(r4)
+        PPC_LL  r26, VCPU_GPR(R26)(r4)
-        PPC_LL  r27, VCPU_GPR(r27)(r4)
+        PPC_LL  r27, VCPU_GPR(R27)(r4)
-        PPC_LL  r28, VCPU_GPR(r28)(r4)
+        PPC_LL  r28, VCPU_GPR(R28)(r4)
-        PPC_LL  r29, VCPU_GPR(r29)(r4)
+        PPC_LL  r29, VCPU_GPR(R29)(r4)
-        PPC_LL  r30, VCPU_GPR(r30)(r4)
+        PPC_LL  r30, VCPU_GPR(R30)(r4)
-        PPC_LL  r31, VCPU_GPR(r31)(r4)
+        PPC_LL  r31, VCPU_GPR(R31)(r4)
 skip_nv_load:
        /* Should we return to the guest? */
        andi.   r5, r3, RESUME_FLAG_HOST
@@ -396,23 +391,23 @@ heavyweight_exit:
         * non-volatiles.
         */
-        PPC_STL r15, VCPU_GPR(r15)(r4)
+        PPC_STL r15, VCPU_GPR(R15)(r4)
-        PPC_STL r16, VCPU_GPR(r16)(r4)
+        PPC_STL r16, VCPU_GPR(R16)(r4)
-        PPC_STL r17, VCPU_GPR(r17)(r4)
+        PPC_STL r17, VCPU_GPR(R17)(r4)
-        PPC_STL r18, VCPU_GPR(r18)(r4)
+        PPC_STL r18, VCPU_GPR(R18)(r4)
-        PPC_STL r19, VCPU_GPR(r19)(r4)
+        PPC_STL r19, VCPU_GPR(R19)(r4)
-        PPC_STL r20, VCPU_GPR(r20)(r4)
+        PPC_STL r20, VCPU_GPR(R20)(r4)
-        PPC_STL r21, VCPU_GPR(r21)(r4)
+        PPC_STL r21, VCPU_GPR(R21)(r4)
-        PPC_STL r22, VCPU_GPR(r22)(r4)
+        PPC_STL r22, VCPU_GPR(R22)(r4)
-        PPC_STL r23, VCPU_GPR(r23)(r4)
+        PPC_STL r23, VCPU_GPR(R23)(r4)
-        PPC_STL r24, VCPU_GPR(r24)(r4)
+        PPC_STL r24, VCPU_GPR(R24)(r4)
-        PPC_STL r25, VCPU_GPR(r25)(r4)
+        PPC_STL r25, VCPU_GPR(R25)(r4)
-        PPC_STL r26, VCPU_GPR(r26)(r4)
+        PPC_STL r26, VCPU_GPR(R26)(r4)
-        PPC_STL r27, VCPU_GPR(r27)(r4)
+        PPC_STL r27, VCPU_GPR(R27)(r4)
-        PPC_STL r28, VCPU_GPR(r28)(r4)
+        PPC_STL r28, VCPU_GPR(R28)(r4)
-        PPC_STL r29, VCPU_GPR(r29)(r4)
+        PPC_STL r29, VCPU_GPR(R29)(r4)
-        PPC_STL r30, VCPU_GPR(r30)(r4)
+        PPC_STL r30, VCPU_GPR(R30)(r4)
-        PPC_STL r31, VCPU_GPR(r31)(r4)
+        PPC_STL r31, VCPU_GPR(R31)(r4)
        /* Load host non-volatile register state from host stack. */
        PPC_LL  r14, HOST_NV_GPR(r14)(r1)
@@ -478,24 +473,24 @@ _GLOBAL(__kvmppc_vcpu_run)
        PPC_STL r31, HOST_NV_GPR(r31)(r1)
        /* Load guest non-volatiles. */
-        PPC_LL  r14, VCPU_GPR(r14)(r4)
+        PPC_LL  r14, VCPU_GPR(R14)(r4)
-        PPC_LL  r15, VCPU_GPR(r15)(r4)
+        PPC_LL  r15, VCPU_GPR(R15)(r4)
-        PPC_LL  r16, VCPU_GPR(r16)(r4)
+        PPC_LL  r16, VCPU_GPR(R16)(r4)
-        PPC_LL  r17, VCPU_GPR(r17)(r4)
+        PPC_LL  r17, VCPU_GPR(R17)(r4)
-        PPC_LL  r18, VCPU_GPR(r18)(r4)
+        PPC_LL  r18, VCPU_GPR(R18)(r4)
-        PPC_LL  r19, VCPU_GPR(r19)(r4)
+        PPC_LL  r19, VCPU_GPR(R19)(r4)
-        PPC_LL  r20, VCPU_GPR(r20)(r4)
+        PPC_LL  r20, VCPU_GPR(R20)(r4)
-        PPC_LL  r21, VCPU_GPR(r21)(r4)
+        PPC_LL  r21, VCPU_GPR(R21)(r4)
-        PPC_LL  r22, VCPU_GPR(r22)(r4)
+        PPC_LL  r22, VCPU_GPR(R22)(r4)
-        PPC_LL  r23, VCPU_GPR(r23)(r4)
+        PPC_LL  r23, VCPU_GPR(R23)(r4)
-        PPC_LL  r24, VCPU_GPR(r24)(r4)
+        PPC_LL  r24, VCPU_GPR(R24)(r4)
-        PPC_LL  r25, VCPU_GPR(r25)(r4)
+        PPC_LL  r25, VCPU_GPR(R25)(r4)
-        PPC_LL  r26, VCPU_GPR(r26)(r4)
+        PPC_LL  r26, VCPU_GPR(R26)(r4)
-        PPC_LL  r27, VCPU_GPR(r27)(r4)
+        PPC_LL  r27, VCPU_GPR(R27)(r4)
-        PPC_LL  r28, VCPU_GPR(r28)(r4)
+        PPC_LL  r28, VCPU_GPR(R28)(r4)
-        PPC_LL  r29, VCPU_GPR(r29)(r4)
+        PPC_LL  r29, VCPU_GPR(R29)(r4)
-        PPC_LL  r30, VCPU_GPR(r30)(r4)
+        PPC_LL  r30, VCPU_GPR(R30)(r4)
-        PPC_LL  r31, VCPU_GPR(r31)(r4)
+        PPC_LL  r31, VCPU_GPR(R31)(r4)
 lightweight_exit:
@@ -554,13 +549,13 @@ lightweight_exit:
        lwz     r7, VCPU_CR(r4)
        PPC_LL  r8, VCPU_PC(r4)
        PPC_LD(r9, VCPU_SHARED_MSR, r11)
-        PPC_LL  r0, VCPU_GPR(r0)(r4)
+        PPC_LL  r0, VCPU_GPR(R0)(r4)
-        PPC_LL  r1, VCPU_GPR(r1)(r4)
+        PPC_LL  r1, VCPU_GPR(R1)(r4)
-        PPC_LL  r2, VCPU_GPR(r2)(r4)
+        PPC_LL  r2, VCPU_GPR(R2)(r4)
-        PPC_LL  r10, VCPU_GPR(r10)(r4)
+        PPC_LL  r10, VCPU_GPR(R10)(r4)
-        PPC_LL  r11, VCPU_GPR(r11)(r4)
+        PPC_LL  r11, VCPU_GPR(R11)(r4)
-        PPC_LL  r12, VCPU_GPR(r12)(r4)
+        PPC_LL  r12, VCPU_GPR(R12)(r4)
-        PPC_LL  r13, VCPU_GPR(r13)(r4)
+        PPC_LL  r13, VCPU_GPR(R13)(r4)
        mtlr    r3
        mtxer   r5
        mtctr   r6
@@ -586,12 +581,12 @@ lightweight_exit:
        mtcr    r7
        /* Finish loading guest volatiles and jump to guest. */
-        PPC_LL  r5, VCPU_GPR(r5)(r4)
+        PPC_LL  r5, VCPU_GPR(R5)(r4)
-        PPC_LL  r6, VCPU_GPR(r6)(r4)
+        PPC_LL  r6, VCPU_GPR(R6)(r4)
-        PPC_LL  r7, VCPU_GPR(r7)(r4)
+        PPC_LL  r7, VCPU_GPR(R7)(r4)
-        PPC_LL  r8, VCPU_GPR(r8)(r4)
+        PPC_LL  r8, VCPU_GPR(R8)(r4)
-        PPC_LL  r9, VCPU_GPR(r9)(r4)
+        PPC_LL  r9, VCPU_GPR(R9)(r4)
-        PPC_LL  r3, VCPU_GPR(r3)(r4)
+        PPC_LL  r3, VCPU_GPR(R3)(r4)
-        PPC_LL  r4, VCPU_GPR(r4)(r4)
+        PPC_LL  r4, VCPU_GPR(R4)(r4)
        rfi
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 7735a2c2e6d9..746e0c895cd7 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -17,14 +17,15 @@ obj-$(CONFIG_HAS_IOMEM)	+= devres.o
 obj-$(CONFIG_PPC64)     += copypage_64.o copyuser_64.o \
                           memcpy_64.o usercopy_64.o mem_64.o string.o \
                           checksum_wrappers_64.o hweight_64.o \
-                           copyuser_power7.o
+                           copyuser_power7.o string_64.o copypage_power7.o \
+                           memcpy_power7.o
 obj-$(CONFIG_XMON)      += sstep.o ldstfp.o
 obj-$(CONFIG_KPROBES)   += sstep.o ldstfp.o
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += sstep.o ldstfp.o
 ifeq ($(CONFIG_PPC64),y)
 obj-$(CONFIG_SMP)       += locks.o
-obj-$(CONFIG_ALTIVEC)   += copyuser_power7_vmx.o
+obj-$(CONFIG_ALTIVEC)   += vmx-helper.o
 endif
 obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
diff --git a/arch/powerpc/lib/checksum_64.S b/arch/powerpc/lib/checksum_64.S
index 18245af38aea..167f72555d60 100644
--- a/arch/powerpc/lib/checksum_64.S
+++ b/arch/powerpc/lib/checksum_64.S
@@ -65,9 +65,6 @@ _GLOBAL(csum_tcpudp_magic)
        srwi    r3,r3,16
        blr
-#define STACKFRAMESIZE 256
-#define STK_REG(i)      (112 + ((i)-14)*8)
 /*
 * Computes the checksum of a memory block at buff, length len,
 * and adds in "sum" (32-bit).
@@ -114,9 +111,9 @@ _GLOBAL(csum_partial)
        mtctr   r6
        stdu    r1,-STACKFRAMESIZE(r1)
-        std     r14,STK_REG(r14)(r1)
+        std     r14,STK_REG(R14)(r1)
-        std     r15,STK_REG(r15)(r1)
+        std     r15,STK_REG(R15)(r1)
-        std     r16,STK_REG(r16)(r1)
+        std     r16,STK_REG(R16)(r1)
        ld      r6,0(r3)
        ld      r9,8(r3)
@@ -175,9 +172,9 @@ _GLOBAL(csum_partial)
        adde    r0,r0,r15
        adde    r0,r0,r16
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
        addi    r1,r1,STACKFRAMESIZE
        andi.   r4,r4,63
@@ -299,9 +296,9 @@ dest;	sth	r6,0(r4)
        mtctr   r6
        stdu    r1,-STACKFRAMESIZE(r1)
-        std     r14,STK_REG(r14)(r1)
+        std     r14,STK_REG(R14)(r1)
-        std     r15,STK_REG(r15)(r1)
+        std     r15,STK_REG(R15)(r1)
-        std     r16,STK_REG(r16)(r1)
+        std     r16,STK_REG(R16)(r1)
 source; ld      r6,0(r3)
 source; ld      r9,8(r3)
@@ -382,9 +379,9 @@ dest;	std	r16,56(r4)
        adde    r0,r0,r15
        adde    r0,r0,r16
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
        addi    r1,r1,STACKFRAMESIZE
        andi.   r5,r5,63
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
index 7c975d43e3f3..dd223b3eb333 100644
--- a/arch/powerpc/lib/code-patching.c
+++ b/arch/powerpc/lib/code-patching.c
@@ -13,17 +13,23 @@
 #include <linux/mm.h>
 #include <asm/page.h>
 #include <asm/code-patching.h>
+#include <asm/uaccess.h>
-void patch_instruction(unsigned int *addr, unsigned int instr)
+int patch_instruction(unsigned int *addr, unsigned int instr)
 {
-        *addr = instr;
+        int err;
+        err = __put_user(instr, addr);
+        if (err)
+                return err;
        asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));
+        return 0;
 }
-void patch_branch(unsigned int *addr, unsigned long target, int flags)
+int patch_branch(unsigned int *addr, unsigned long target, int flags)
 {
-        patch_instruction(addr, create_branch(addr, target, flags));
+        return patch_instruction(addr, create_branch(addr, target, flags));
 }
 unsigned int create_branch(const unsigned int *addr,
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index 53dcb6b1b708..9f9434a85264 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -17,7 +17,11 @@ PPC64_CACHES:
        .section        ".text"
 _GLOBAL(copy_page)
+BEGIN_FTR_SECTION
        lis     r5,PAGE_SIZE@h
+FTR_SECTION_ELSE
+        b       .copypage_power7
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
        ori     r5,r5,PAGE_SIZE@l
 BEGIN_FTR_SECTION
        ld      r10,PPC64_CACHES@toc(r2)
diff --git a/arch/powerpc/lib/copypage_power7.S b/arch/powerpc/lib/copypage_power7.S
new file mode 100644
index 000000000000..0ef75bf0695c
--- /dev/null
+++ b/arch/powerpc/lib/copypage_power7.S
@@ -0,0 +1,165 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2012
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/page.h>
+#include <asm/ppc_asm.h>
+_GLOBAL(copypage_power7)
+        /*
+         * We prefetch both the source and destination using enhanced touch
+         * instructions. We use a stream ID of 0 for the load side and
+         * 1 for the store side. Since source and destination are page
+         * aligned we don't need to clear the bottom 7 bits of either
+         * address.
+         */
+        ori     r9,r3,1         /* stream=1 */
+#ifdef CONFIG_PPC_64K_PAGES
+        lis     r7,0x0E01       /* depth=7, units=512 */
+#else
+        lis     r7,0x0E00       /* depth=7 */
+        ori     r7,r7,0x1000    /* units=32 */
+#endif
+        ori     r10,r7,1        /* stream=1 */
+        lis     r8,0x8000       /* GO=1 */
+        clrldi  r8,r8,32
+.machine push
+.machine "power4"
+        dcbt    r0,r4,0b01000
+        dcbt    r0,r7,0b01010
+        dcbtst  r0,r9,0b01000
+        dcbtst  r0,r10,0b01010
+        eieio
+        dcbt    r0,r8,0b01010   /* GO */
+.machine pop
+#ifdef CONFIG_ALTIVEC
+        mflr    r0
+        std     r3,48(r1)
+        std     r4,56(r1)
+        std     r0,16(r1)
+        stdu    r1,-STACKFRAMESIZE(r1)
+        bl      .enter_vmx_copy
+        cmpwi   r3,0
+        ld      r0,STACKFRAMESIZE+16(r1)
+        ld      r3,STACKFRAMESIZE+48(r1)
+        ld      r4,STACKFRAMESIZE+56(r1)
+        mtlr    r0
+        li      r0,(PAGE_SIZE/128)
+        mtctr   r0
+        beq     .Lnonvmx_copy
+        addi    r1,r1,STACKFRAMESIZE
+        li      r6,16
+        li      r7,32
+        li      r8,48
+        li      r9,64
+        li      r10,80
+        li      r11,96
+        li      r12,112
+        .align  5
+1:      lvx     vr7,r0,r4
+        lvx     vr6,r4,r6
+        lvx     vr5,r4,r7
+        lvx     vr4,r4,r8
+        lvx     vr3,r4,r9
+        lvx     vr2,r4,r10
+        lvx     vr1,r4,r11
+        lvx     vr0,r4,r12
+        addi    r4,r4,128
+        stvx    vr7,r0,r3
+        stvx    vr6,r3,r6
+        stvx    vr5,r3,r7
+        stvx    vr4,r3,r8
+        stvx    vr3,r3,r9
+        stvx    vr2,r3,r10
+        stvx    vr1,r3,r11
+        stvx    vr0,r3,r12
+        addi    r3,r3,128
+        bdnz    1b
+        b       .exit_vmx_copy          /* tail call optimise */
+#else
+        li      r0,(PAGE_SIZE/128)
+        mtctr   r0
+        stdu    r1,-STACKFRAMESIZE(r1)
+#endif
+.Lnonvmx_copy:
+        std     r14,STK_REG(R14)(r1)
+        std     r15,STK_REG(R15)(r1)
+        std     r16,STK_REG(R16)(r1)
+        std     r17,STK_REG(R17)(r1)
+        std     r18,STK_REG(R18)(r1)
+        std     r19,STK_REG(R19)(r1)
+        std     r20,STK_REG(R20)(r1)
+1:      ld      r0,0(r4)
+        ld      r5,8(r4)
+        ld      r6,16(r4)
+        ld      r7,24(r4)
+        ld      r8,32(r4)
+        ld      r9,40(r4)
+        ld      r10,48(r4)
+        ld      r11,56(r4)
+        ld      r12,64(r4)
+        ld      r14,72(r4)
+        ld      r15,80(r4)
+        ld      r16,88(r4)
+        ld      r17,96(r4)
+        ld      r18,104(r4)
+        ld      r19,112(r4)
+        ld      r20,120(r4)
+        addi    r4,r4,128
+        std     r0,0(r3)
+        std     r5,8(r3)
+        std     r6,16(r3)
+        std     r7,24(r3)
+        std     r8,32(r3)
+        std     r9,40(r3)
+        std     r10,48(r3)
+        std     r11,56(r3)
+        std     r12,64(r3)
+        std     r14,72(r3)
+        std     r15,80(r3)
+        std     r16,88(r3)
+        std     r17,96(r3)
+        std     r18,104(r3)
+        std     r19,112(r3)
+        std     r20,120(r3)
+        addi    r3,r3,128
+        bdnz    1b
+        ld      r14,STK_REG(R14)(r1)
+        ld      r15,STK_REG(R15)(r1)
+        ld      r16,STK_REG(R16)(r1)
+        ld      r17,STK_REG(R17)(r1)
+        ld      r18,STK_REG(R18)(r1)
+        ld      r19,STK_REG(R19)(r1)
+        ld      r20,STK_REG(R20)(r1)
+        addi    r1,r1,STACKFRAMESIZE
+        blr
diff --git a/arch/powerpc/lib/copyuser_power7.S b/arch/powerpc/lib/copyuser_power7.S
index 497db7b23bb1..f9ede7c6606e 100644
--- a/arch/powerpc/lib/copyuser_power7.S
+++ b/arch/powerpc/lib/copyuser_power7.S
@@ -19,9 +19,6 @@
 */
 #include <asm/ppc_asm.h>
-#define STACKFRAMESIZE  256
-#define STK_REG(i)      (112 + ((i)-14)*8)
        .macro err1
 100:
        .section __ex_table,"a"
@@ -57,26 +54,26 @@
 .Ldo_err4:
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
 .Ldo_err3:
-        bl      .exit_vmx_copy
+        bl      .exit_vmx_usercopy
        ld      r0,STACKFRAMESIZE+16(r1)
        mtlr    r0
        b       .Lexit
 #endif /* CONFIG_ALTIVEC */
 .Ldo_err2:
-        ld      r22,STK_REG(r22)(r1)
+        ld      r22,STK_REG(R22)(r1)
-        ld      r21,STK_REG(r21)(r1)
+        ld      r21,STK_REG(R21)(r1)
-        ld      r20,STK_REG(r20)(r1)
+        ld      r20,STK_REG(R20)(r1)
-        ld      r19,STK_REG(r19)(r1)
+        ld      r19,STK_REG(R19)(r1)
-        ld      r18,STK_REG(r18)(r1)
+        ld      r18,STK_REG(R18)(r1)
-        ld      r17,STK_REG(r17)(r1)
+        ld      r17,STK_REG(R17)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
 .Lexit:
        addi    r1,r1,STACKFRAMESIZE
 .Ldo_err1:
@@ -137,15 +134,15 @@ err1;	stw	r0,0(r3)
        mflr    r0
        stdu    r1,-STACKFRAMESIZE(r1)
-        std     r14,STK_REG(r14)(r1)
+        std     r14,STK_REG(R14)(r1)
-        std     r15,STK_REG(r15)(r1)
+        std     r15,STK_REG(R15)(r1)
-        std     r16,STK_REG(r16)(r1)
+        std     r16,STK_REG(R16)(r1)
-        std     r17,STK_REG(r17)(r1)
+        std     r17,STK_REG(R17)(r1)
-        std     r18,STK_REG(r18)(r1)
+        std     r18,STK_REG(R18)(r1)
-        std     r19,STK_REG(r19)(r1)
+        std     r19,STK_REG(R19)(r1)
-        std     r20,STK_REG(r20)(r1)
+        std     r20,STK_REG(R20)(r1)
-        std     r21,STK_REG(r21)(r1)
+        std     r21,STK_REG(R21)(r1)
-        std     r22,STK_REG(r22)(r1)
+        std     r22,STK_REG(R22)(r1)
        std     r0,STACKFRAMESIZE+16(r1)
        srdi    r6,r5,7
@@ -192,15 +189,15 @@ err2;	std	r21,120(r3)
        clrldi  r5,r5,(64-7)
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
-        ld      r17,STK_REG(r17)(r1)
+        ld      r17,STK_REG(R17)(r1)
-        ld      r18,STK_REG(r18)(r1)
+        ld      r18,STK_REG(R18)(r1)
-        ld      r19,STK_REG(r19)(r1)
+        ld      r19,STK_REG(R19)(r1)
-        ld      r20,STK_REG(r20)(r1)
+        ld      r20,STK_REG(R20)(r1)
-        ld      r21,STK_REG(r21)(r1)
+        ld      r21,STK_REG(R21)(r1)
-        ld      r22,STK_REG(r22)(r1)
+        ld      r22,STK_REG(R22)(r1)
        addi    r1,r1,STACKFRAMESIZE
        /* Up to 127B to go */
@@ -290,7 +287,7 @@ err1;	stb	r0,0(r3)
        mflr    r0
        std     r0,16(r1)
        stdu    r1,-STACKFRAMESIZE(r1)
-        bl      .enter_vmx_copy
+        bl      .enter_vmx_usercopy
        cmpwi   r3,0
        ld      r0,STACKFRAMESIZE+16(r1)
        ld      r3,STACKFRAMESIZE+48(r1)
@@ -298,6 +295,68 @@ err1;	stb	r0,0(r3)
        ld      r5,STACKFRAMESIZE+64(r1)
        mtlr    r0
+        /*
+         * We prefetch both the source and destination using enhanced touch
+         * instructions. We use a stream ID of 0 for the load side and
+         * 1 for the store side.
+         */
+        clrrdi  r6,r4,7
+        clrrdi  r9,r3,7
+        ori     r9,r9,1         /* stream=1 */
+        srdi    r7,r5,7         /* length in cachelines, capped at 0x3FF */
+        cmpldi  r7,0x3FF
+        ble     1f
+        li      r7,0x3FF
+1:      lis     r0,0x0E00       /* depth=7 */
+        sldi    r7,r7,7
+        or      r7,r7,r0
+        ori     r10,r7,1        /* stream=1 */
+        lis     r8,0x8000       /* GO=1 */
+        clrldi  r8,r8,32
+.machine push
+.machine "power4"
+        dcbt    r0,r6,0b01000
+        dcbt    r0,r7,0b01010
+        dcbtst  r0,r9,0b01000
+        dcbtst  r0,r10,0b01010
+        eieio
+        dcbt    r0,r8,0b01010   /* GO */
+.machine pop
+        /*
+         * We prefetch both the source and destination using enhanced touch
+         * instructions. We use a stream ID of 0 for the load side and
+         * 1 for the store side.
+         */
+        clrrdi  r6,r4,7
+        clrrdi  r9,r3,7
+        ori     r9,r9,1         /* stream=1 */
+        srdi    r7,r5,7         /* length in cachelines, capped at 0x3FF */
+        cmpldi  cr1,r7,0x3FF
+        ble     cr1,1f
+        li      r7,0x3FF
+1:      lis     r0,0x0E00       /* depth=7 */
+        sldi    r7,r7,7
+        or      r7,r7,r0
+        ori     r10,r7,1        /* stream=1 */
+        lis     r8,0x8000       /* GO=1 */
+        clrldi  r8,r8,32
+.machine push
+.machine "power4"
+        dcbt    r0,r6,0b01000
+        dcbt    r0,r7,0b01010
+        dcbtst  r0,r9,0b01000
+        dcbtst  r0,r10,0b01010
+        eieio
+        dcbt    r0,r8,0b01010   /* GO */
+.machine pop
        beq     .Lunwind_stack_nonvmx_copy
        /*
@@ -378,9 +437,9 @@ err3;	stvx	vr0,r3,r11
 7:      sub     r5,r5,r6
        srdi    r6,r5,7
-        std     r14,STK_REG(r14)(r1)
+        std     r14,STK_REG(R14)(r1)
-        std     r15,STK_REG(r15)(r1)
+        std     r15,STK_REG(R15)(r1)
-        std     r16,STK_REG(r16)(r1)
+        std     r16,STK_REG(R16)(r1)
        li      r12,64
        li      r14,80
@@ -415,9 +474,9 @@ err4;	stvx	vr0,r3,r16
        addi    r3,r3,128
        bdnz    8b
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
        /* Up to 127B to go */
        clrldi  r5,r5,(64-7)
@@ -476,7 +535,7 @@ err3;	lbz	r0,0(r4)
 err3;   stb     r0,0(r3)
 15:     addi    r1,r1,STACKFRAMESIZE
-        b       .exit_vmx_copy          /* tail call optimise */
+        b       .exit_vmx_usercopy      /* tail call optimise */
 .Lvmx_unaligned_copy:
        /* Get the destination 16B aligned */
@@ -563,9 +622,9 @@ err3;	stvx	vr11,r3,r11
 7:      sub     r5,r5,r6
        srdi    r6,r5,7
-        std     r14,STK_REG(r14)(r1)
+        std     r14,STK_REG(R14)(r1)
-        std     r15,STK_REG(r15)(r1)
+        std     r15,STK_REG(R15)(r1)
-        std     r16,STK_REG(r16)(r1)
+        std     r16,STK_REG(R16)(r1)
        li      r12,64
        li      r14,80
@@ -608,9 +667,9 @@ err4;	stvx	vr15,r3,r16
        addi    r3,r3,128
        bdnz    8b
-        ld      r14,STK_REG(r14)(r1)
+        ld      r14,STK_REG(R14)(r1)
-        ld      r15,STK_REG(r15)(r1)
+        ld      r15,STK_REG(R15)(r1)
-        ld      r16,STK_REG(r16)(r1)
+        ld      r16,STK_REG(R16)(r1)
        /* Up to 127B to go */
        clrldi  r5,r5,(64-7)
@@ -679,5 +738,5 @@ err3;	lbz	r0,0(r4)
 err3;   stb     r0,0(r3)
 15:     addi    r1,r1,STACKFRAMESIZE
-        b       .exit_vmx_copy          /* tail call optimise */
+        b       .exit_vmx_usercopy      /* tail call optimise */
 #endif /* CONFiG_ALTIVEC */
diff --git a/arch/powerpc/lib/crtsavres.S b/arch/powerpc/lib/crtsavres.S
index 1c893f05d224..b2c68ce139ae 100644
--- a/arch/powerpc/lib/crtsavres.S
+++ b/arch/powerpc/lib/crtsavres.S
@@ -41,12 +41,13 @@
 #include <asm/ppc_asm.h>
        .file   "crtsavres.S"
-        .section ".text"
 #ifdef CONFIG_CC_OPTIMIZE_FOR_SIZE
 #ifndef CONFIG_PPC64
+        .section ".text"
 /* Routines for saving integer registers, called by the compiler.  */
 /* Called with r11 pointing to the stack header word of the caller of the */
 /* function, just beyond the end of the integer save area.  */
@@ -232,6 +233,8 @@ _GLOBAL(_rest32gpr_31_x)
 #else /* CONFIG_PPC64 */
+        .section ".text.save.restore","ax",@progbits
 .globl  _savegpr0_14
 _savegpr0_14:
        std     r14,-144(r1)
diff --git a/arch/powerpc/lib/hweight_64.S b/arch/powerpc/lib/hweight_64.S
index fda27868cf8c..9b96ff2ecd4d 100644
--- a/arch/powerpc/lib/hweight_64.S
+++ b/arch/powerpc/lib/hweight_64.S
@@ -28,7 +28,7 @@ BEGIN_FTR_SECTION
        nop
        nop
 FTR_SECTION_ELSE
-        PPC_POPCNTB(r3,r3)
+        PPC_POPCNTB(R3,R3)
        clrldi  r3,r3,64-8
        blr
 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
@@ -42,14 +42,14 @@ BEGIN_FTR_SECTION
        nop
 FTR_SECTION_ELSE
  BEGIN_FTR_SECTION_NESTED(50)
-        PPC_POPCNTB(r3,r3)
+        PPC_POPCNTB(R3,R3)
        srdi    r4,r3,8
        add     r3,r4,r3
        clrldi  r3,r3,64-8
        blr
  FTR_SECTION_ELSE_NESTED(50)
        clrlwi  r3,r3,16
-        PPC_POPCNTW(r3,r3)
+        PPC_POPCNTW(R3,R3)
        clrldi  r3,r3,64-8
        blr
  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 50)
@@ -66,7 +66,7 @@ BEGIN_FTR_SECTION
        nop
 FTR_SECTION_ELSE
  BEGIN_FTR_SECTION_NESTED(51)
-        PPC_POPCNTB(r3,r3)
+        PPC_POPCNTB(R3,R3)
        srdi    r4,r3,16
        add     r3,r4,r3
        srdi    r4,r3,8
@@ -74,7 +74,7 @@ FTR_SECTION_ELSE
        clrldi  r3,r3,64-8
        blr
  FTR_SECTION_ELSE_NESTED(51)
-        PPC_POPCNTW(r3,r3)
+        PPC_POPCNTW(R3,R3)
        clrldi  r3,r3,64-8
        blr
  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 51)
@@ -93,7 +93,7 @@ BEGIN_FTR_SECTION
        nop
 FTR_SECTION_ELSE
  BEGIN_FTR_SECTION_NESTED(52)
-        PPC_POPCNTB(r3,r3)
+        PPC_POPCNTB(R3,R3)
        srdi    r4,r3,32
        add     r3,r4,r3
        srdi    r4,r3,16
@@ -103,7 +103,7 @@ FTR_SECTION_ELSE
        clrldi  r3,r3,64-8
        blr
  FTR_SECTION_ELSE_NESTED(52)
-        PPC_POPCNTD(r3,r3)
+        PPC_POPCNTD(R3,R3)
        clrldi  r3,r3,64-8
        blr
  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 52)
diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S
index 6a85380520b6..85aec08ab234 100644
--- a/arch/powerpc/lib/ldstfp.S
+++ b/arch/powerpc/lib/ldstfp.S
@@ -330,13 +330,13 @@ _GLOBAL(do_lxvd2x)
        MTMSRD(r7)
        isync
        beq     cr7,1f
-        STXVD2X(0,r1,r8)
+        STXVD2X(0,R1,R8)
 1:      li      r9,-EFAULT
-2:      LXVD2X(0,0,r4)
+2:      LXVD2X(0,R0,R4)
        li      r9,0
 3:      beq     cr7,4f
        bl      put_vsr
-        LXVD2X(0,r1,r8)
+        LXVD2X(0,R1,R8)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
        MTMSRD(r6)
@@ -358,13 +358,13 @@ _GLOBAL(do_stxvd2x)
        MTMSRD(r7)
        isync
        beq     cr7,1f
-        STXVD2X(0,r1,r8)
+        STXVD2X(0,R1,R8)
        bl      get_vsr
 1:      li      r9,-EFAULT
-2:      STXVD2X(0,0,r4)
+2:      STXVD2X(0,R0,R4)
        li      r9,0
 3:      beq     cr7,4f
-        LXVD2X(0,r1,r8)
+        LXVD2X(0,R1,R8)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
        MTMSRD(r6)
diff --git a/arch/powerpc/lib/memcpy_64.S b/arch/powerpc/lib/memcpy_64.S
index 82fea3963e15..d2bbbc8d7dc0 100644
--- a/arch/powerpc/lib/memcpy_64.S
+++ b/arch/powerpc/lib/memcpy_64.S
@@ -11,7 +11,11 @@
        .align  7
 _GLOBAL(memcpy)
+BEGIN_FTR_SECTION
        std     r3,48(r1)       /* save destination pointer for return value */
+FTR_SECTION_ELSE
+        b       memcpy_power7
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_VMX_COPY)
        PPC_MTOCRF(0x01,r5)
        cmpldi  cr1,r5,16
        neg     r6,r3           # LS 3 bits = # bytes to 8-byte dest bdry
diff --git a/arch/powerpc/lib/memcpy_power7.S b/arch/powerpc/lib/memcpy_power7.S
new file mode 100644
index 000000000000..0efdc51bc716
--- /dev/null
+++ b/arch/powerpc/lib/memcpy_power7.S
@@ -0,0 +1,647 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2012
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/ppc_asm.h>
+_GLOBAL(memcpy_power7)
+#ifdef CONFIG_ALTIVEC
+        cmpldi  r5,16
+        cmpldi  cr1,r5,4096
+        std     r3,48(r1)
+        blt     .Lshort_copy
+        bgt     cr1,.Lvmx_copy
+#else
+        cmpldi  r5,16
+        std     r3,48(r1)
+        blt     .Lshort_copy
+#endif
+.Lnonvmx_copy:
+        /* Get the source 8B aligned */
+        neg     r6,r4
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-3)
+        bf      cr7*4+3,1f
+        lbz     r0,0(r4)
+        addi    r4,r4,1
+        stb     r0,0(r3)
+        addi    r3,r3,1
+1:      bf      cr7*4+2,2f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+2:      bf      cr7*4+1,3f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+3:      sub     r5,r5,r6
+        cmpldi  r5,128
+        blt     5f
+        mflr    r0
+        stdu    r1,-STACKFRAMESIZE(r1)
+        std     r14,STK_REG(R14)(r1)
+        std     r15,STK_REG(R15)(r1)
+        std     r16,STK_REG(R16)(r1)
+        std     r17,STK_REG(R17)(r1)
+        std     r18,STK_REG(R18)(r1)
+        std     r19,STK_REG(R19)(r1)
+        std     r20,STK_REG(R20)(r1)
+        std     r21,STK_REG(R21)(r1)
+        std     r22,STK_REG(R22)(r1)
+        std     r0,STACKFRAMESIZE+16(r1)
+        srdi    r6,r5,7
+        mtctr   r6
+        /* Now do cacheline (128B) sized loads and stores. */
+        .align  5
+4:
+        ld      r0,0(r4)
+        ld      r6,8(r4)
+        ld      r7,16(r4)
+        ld      r8,24(r4)
+        ld      r9,32(r4)
+        ld      r10,40(r4)
+        ld      r11,48(r4)
+        ld      r12,56(r4)
+        ld      r14,64(r4)
+        ld      r15,72(r4)
+        ld      r16,80(r4)
+        ld      r17,88(r4)
+        ld      r18,96(r4)
+        ld      r19,104(r4)
+        ld      r20,112(r4)
+        ld      r21,120(r4)
+        addi    r4,r4,128
+        std     r0,0(r3)
+        std     r6,8(r3)
+        std     r7,16(r3)
+        std     r8,24(r3)
+        std     r9,32(r3)
+        std     r10,40(r3)
+        std     r11,48(r3)
+        std     r12,56(r3)
+        std     r14,64(r3)
+        std     r15,72(r3)
+        std     r16,80(r3)
+        std     r17,88(r3)
+        std     r18,96(r3)
+        std     r19,104(r3)
+        std     r20,112(r3)
+        std     r21,120(r3)
+        addi    r3,r3,128
+        bdnz    4b
+        clrldi  r5,r5,(64-7)
+        ld      r14,STK_REG(R14)(r1)
+        ld      r15,STK_REG(R15)(r1)
+        ld      r16,STK_REG(R16)(r1)
+        ld      r17,STK_REG(R17)(r1)
+        ld      r18,STK_REG(R18)(r1)
+        ld      r19,STK_REG(R19)(r1)
+        ld      r20,STK_REG(R20)(r1)
+        ld      r21,STK_REG(R21)(r1)
+        ld      r22,STK_REG(R22)(r1)
+        addi    r1,r1,STACKFRAMESIZE
+        /* Up to 127B to go */
+5:      srdi    r6,r5,4
+        mtocrf  0x01,r6
+6:      bf      cr7*4+1,7f
+        ld      r0,0(r4)
+        ld      r6,8(r4)
+        ld      r7,16(r4)
+        ld      r8,24(r4)
+        ld      r9,32(r4)
+        ld      r10,40(r4)
+        ld      r11,48(r4)
+        ld      r12,56(r4)
+        addi    r4,r4,64
+        std     r0,0(r3)
+        std     r6,8(r3)
+        std     r7,16(r3)
+        std     r8,24(r3)
+        std     r9,32(r3)
+        std     r10,40(r3)
+        std     r11,48(r3)
+        std     r12,56(r3)
+        addi    r3,r3,64
+        /* Up to 63B to go */
+7:      bf      cr7*4+2,8f
+        ld      r0,0(r4)
+        ld      r6,8(r4)
+        ld      r7,16(r4)
+        ld      r8,24(r4)
+        addi    r4,r4,32
+        std     r0,0(r3)
+        std     r6,8(r3)
+        std     r7,16(r3)
+        std     r8,24(r3)
+        addi    r3,r3,32
+        /* Up to 31B to go */
+8:      bf      cr7*4+3,9f
+        ld      r0,0(r4)
+        ld      r6,8(r4)
+        addi    r4,r4,16
+        std     r0,0(r3)
+        std     r6,8(r3)
+        addi    r3,r3,16
+9:      clrldi  r5,r5,(64-4)
+        /* Up to 15B to go */
+.Lshort_copy:
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+        lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+        lwz     r6,4(r4)
+        addi    r4,r4,8
+        stw     r0,0(r3)
+        stw     r6,4(r3)
+        addi    r3,r3,8
+12:     bf      cr7*4+1,13f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+13:     bf      cr7*4+2,14f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+14:     bf      cr7*4+3,15f
+        lbz     r0,0(r4)
+        stb     r0,0(r3)
+15:     ld      r3,48(r1)
+        blr
+.Lunwind_stack_nonvmx_copy:
+        addi    r1,r1,STACKFRAMESIZE
+        b       .Lnonvmx_copy
+#ifdef CONFIG_ALTIVEC
+.Lvmx_copy:
+        mflr    r0
+        std     r4,56(r1)
+        std     r5,64(r1)
+        std     r0,16(r1)
+        stdu    r1,-STACKFRAMESIZE(r1)
+        bl      .enter_vmx_copy
+        cmpwi   r3,0
+        ld      r0,STACKFRAMESIZE+16(r1)
+        ld      r3,STACKFRAMESIZE+48(r1)
+        ld      r4,STACKFRAMESIZE+56(r1)
+        ld      r5,STACKFRAMESIZE+64(r1)
+        mtlr    r0
+        /*
+         * We prefetch both the source and destination using enhanced touch
+         * instructions. We use a stream ID of 0 for the load side and
+         * 1 for the store side.
+         */
+        clrrdi  r6,r4,7
+        clrrdi  r9,r3,7
+        ori     r9,r9,1         /* stream=1 */
+        srdi    r7,r5,7         /* length in cachelines, capped at 0x3FF */
+        cmpldi  cr1,r7,0x3FF
+        ble     cr1,1f
+        li      r7,0x3FF
+1:      lis     r0,0x0E00       /* depth=7 */
+        sldi    r7,r7,7
+        or      r7,r7,r0
+        ori     r10,r7,1        /* stream=1 */
+        lis     r8,0x8000       /* GO=1 */
+        clrldi  r8,r8,32
+.machine push
+.machine "power4"
+        dcbt    r0,r6,0b01000
+        dcbt    r0,r7,0b01010
+        dcbtst  r0,r9,0b01000
+        dcbtst  r0,r10,0b01010
+        eieio
+        dcbt    r0,r8,0b01010   /* GO */
+.machine pop
+        beq     .Lunwind_stack_nonvmx_copy
+        /*
+         * If source and destination are not relatively aligned we use a
+         * slower permute loop.
+         */
+        xor     r6,r4,r3
+        rldicl. r6,r6,0,(64-4)
+        bne     .Lvmx_unaligned_copy
+        /* Get the destination 16B aligned */
+        neg     r6,r3
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-4)
+        bf      cr7*4+3,1f
+        lbz     r0,0(r4)
+        addi    r4,r4,1
+        stb     r0,0(r3)
+        addi    r3,r3,1
+1:      bf      cr7*4+2,2f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+2:      bf      cr7*4+1,3f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+3:      bf      cr7*4+0,4f
+        ld      r0,0(r4)
+        addi    r4,r4,8
+        std     r0,0(r3)
+        addi    r3,r3,8
+4:      sub     r5,r5,r6
+        /* Get the desination 128B aligned */
+        neg     r6,r3
+        srdi    r7,r6,4
+        mtocrf  0x01,r7
+        clrldi  r6,r6,(64-7)
+        li      r9,16
+        li      r10,32
+        li      r11,48
+        bf      cr7*4+3,5f
+        lvx     vr1,r0,r4
+        addi    r4,r4,16
+        stvx    vr1,r0,r3
+        addi    r3,r3,16
+5:      bf      cr7*4+2,6f
+        lvx     vr1,r0,r4
+        lvx     vr0,r4,r9
+        addi    r4,r4,32
+        stvx    vr1,r0,r3
+        stvx    vr0,r3,r9
+        addi    r3,r3,32
+6:      bf      cr7*4+1,7f
+        lvx     vr3,r0,r4
+        lvx     vr2,r4,r9
+        lvx     vr1,r4,r10
+        lvx     vr0,r4,r11
+        addi    r4,r4,64
+        stvx    vr3,r0,r3
+        stvx    vr2,r3,r9
+        stvx    vr1,r3,r10
+        stvx    vr0,r3,r11
+        addi    r3,r3,64
+7:      sub     r5,r5,r6
+        srdi    r6,r5,7
+        std     r14,STK_REG(R14)(r1)
+        std     r15,STK_REG(R15)(r1)
+        std     r16,STK_REG(R16)(r1)
+        li      r12,64
+        li      r14,80
+        li      r15,96
+        li      r16,112
+        mtctr   r6
+        /*
+         * Now do cacheline sized loads and stores. By this stage the
+         * cacheline stores are also cacheline aligned.
+         */
+        .align  5
+8:
+        lvx     vr7,r0,r4
+        lvx     vr6,r4,r9
+        lvx     vr5,r4,r10
+        lvx     vr4,r4,r11
+        lvx     vr3,r4,r12
+        lvx     vr2,r4,r14
+        lvx     vr1,r4,r15
+        lvx     vr0,r4,r16
+        addi    r4,r4,128
+        stvx    vr7,r0,r3
+        stvx    vr6,r3,r9
+        stvx    vr5,r3,r10
+        stvx    vr4,r3,r11
+        stvx    vr3,r3,r12
+        stvx    vr2,r3,r14
+        stvx    vr1,r3,r15
+        stvx    vr0,r3,r16
+        addi    r3,r3,128
+        bdnz    8b
+        ld      r14,STK_REG(R14)(r1)
+        ld      r15,STK_REG(R15)(r1)
+        ld      r16,STK_REG(R16)(r1)
+        /* Up to 127B to go */
+        clrldi  r5,r5,(64-7)
+        srdi    r6,r5,4
+        mtocrf  0x01,r6
+        bf      cr7*4+1,9f
+        lvx     vr3,r0,r4
+        lvx     vr2,r4,r9
+        lvx     vr1,r4,r10
+        lvx     vr0,r4,r11
+        addi    r4,r4,64
+        stvx    vr3,r0,r3
+        stvx    vr2,r3,r9
+        stvx    vr1,r3,r10
+        stvx    vr0,r3,r11
+        addi    r3,r3,64
+9:      bf      cr7*4+2,10f
+        lvx     vr1,r0,r4
+        lvx     vr0,r4,r9
+        addi    r4,r4,32
+        stvx    vr1,r0,r3
+        stvx    vr0,r3,r9
+        addi    r3,r3,32
+10:     bf      cr7*4+3,11f
+        lvx     vr1,r0,r4
+        addi    r4,r4,16
+        stvx    vr1,r0,r3
+        addi    r3,r3,16
+        /* Up to 15B to go */
+11:     clrldi  r5,r5,(64-4)
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+        ld      r0,0(r4)
+        addi    r4,r4,8
+        std     r0,0(r3)
+        addi    r3,r3,8
+12:     bf      cr7*4+1,13f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+13:     bf      cr7*4+2,14f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+14:     bf      cr7*4+3,15f
+        lbz     r0,0(r4)
+        stb     r0,0(r3)
+15:     addi    r1,r1,STACKFRAMESIZE
+        ld      r3,48(r1)
+        b       .exit_vmx_copy          /* tail call optimise */
+.Lvmx_unaligned_copy:
+        /* Get the destination 16B aligned */
+        neg     r6,r3
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-4)
+        bf      cr7*4+3,1f
+        lbz     r0,0(r4)
+        addi    r4,r4,1
+        stb     r0,0(r3)
+        addi    r3,r3,1
+1:      bf      cr7*4+2,2f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+2:      bf      cr7*4+1,3f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+3:      bf      cr7*4+0,4f
+        lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+        lwz     r7,4(r4)
+        addi    r4,r4,8
+        stw     r0,0(r3)
+        stw     r7,4(r3)
+        addi    r3,r3,8
+4:      sub     r5,r5,r6
+        /* Get the desination 128B aligned */
+        neg     r6,r3
+        srdi    r7,r6,4
+        mtocrf  0x01,r7
+        clrldi  r6,r6,(64-7)
+        li      r9,16
+        li      r10,32
+        li      r11,48
+        lvsl    vr16,0,r4       /* Setup permute control vector */
+        lvx     vr0,0,r4
+        addi    r4,r4,16
+        bf      cr7*4+3,5f
+        lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        addi    r4,r4,16
+        stvx    vr8,r0,r3
+        addi    r3,r3,16
+        vor     vr0,vr1,vr1
+5:      bf      cr7*4+2,6f
+        lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        lvx     vr0,r4,r9
+        vperm   vr9,vr1,vr0,vr16
+        addi    r4,r4,32
+        stvx    vr8,r0,r3
+        stvx    vr9,r3,r9
+        addi    r3,r3,32
+6:      bf      cr7*4+1,7f
+        lvx     vr3,r0,r4
+        vperm   vr8,vr0,vr3,vr16
+        lvx     vr2,r4,r9
+        vperm   vr9,vr3,vr2,vr16
+        lvx     vr1,r4,r10
+        vperm   vr10,vr2,vr1,vr16
+        lvx     vr0,r4,r11
+        vperm   vr11,vr1,vr0,vr16
+        addi    r4,r4,64
+        stvx    vr8,r0,r3
+        stvx    vr9,r3,r9
+        stvx    vr10,r3,r10
+        stvx    vr11,r3,r11
+        addi    r3,r3,64
+7:      sub     r5,r5,r6
+        srdi    r6,r5,7
+        std     r14,STK_REG(R14)(r1)
+        std     r15,STK_REG(R15)(r1)
+        std     r16,STK_REG(R16)(r1)
+        li      r12,64
+        li      r14,80
+        li      r15,96
+        li      r16,112
+        mtctr   r6
+        /*
+         * Now do cacheline sized loads and stores. By this stage the
+         * cacheline stores are also cacheline aligned.
+         */
+        .align  5
+8:
+        lvx     vr7,r0,r4
+        vperm   vr8,vr0,vr7,vr16
+        lvx     vr6,r4,r9
+        vperm   vr9,vr7,vr6,vr16
+        lvx     vr5,r4,r10
+        vperm   vr10,vr6,vr5,vr16
+        lvx     vr4,r4,r11
+        vperm   vr11,vr5,vr4,vr16
+        lvx     vr3,r4,r12
+        vperm   vr12,vr4,vr3,vr16
+        lvx     vr2,r4,r14
+        vperm   vr13,vr3,vr2,vr16
+        lvx     vr1,r4,r15
+        vperm   vr14,vr2,vr1,vr16
+        lvx     vr0,r4,r16
+        vperm   vr15,vr1,vr0,vr16
+        addi    r4,r4,128
+        stvx    vr8,r0,r3
+        stvx    vr9,r3,r9
+        stvx    vr10,r3,r10
+        stvx    vr11,r3,r11
+        stvx    vr12,r3,r12
+        stvx    vr13,r3,r14
+        stvx    vr14,r3,r15
+        stvx    vr15,r3,r16
+        addi    r3,r3,128
+        bdnz    8b
+        ld      r14,STK_REG(R14)(r1)
+        ld      r15,STK_REG(R15)(r1)
+        ld      r16,STK_REG(R16)(r1)
+        /* Up to 127B to go */
+        clrldi  r5,r5,(64-7)
+        srdi    r6,r5,4
+        mtocrf  0x01,r6
+        bf      cr7*4+1,9f
+        lvx     vr3,r0,r4
+        vperm   vr8,vr0,vr3,vr16
+        lvx     vr2,r4,r9
+        vperm   vr9,vr3,vr2,vr16
+        lvx     vr1,r4,r10
+        vperm   vr10,vr2,vr1,vr16
+        lvx     vr0,r4,r11
+        vperm   vr11,vr1,vr0,vr16
+        addi    r4,r4,64
+        stvx    vr8,r0,r3
+        stvx    vr9,r3,r9
+        stvx    vr10,r3,r10
+        stvx    vr11,r3,r11
+        addi    r3,r3,64
+9:      bf      cr7*4+2,10f
+        lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        lvx     vr0,r4,r9
+        vperm   vr9,vr1,vr0,vr16
+        addi    r4,r4,32
+        stvx    vr8,r0,r3
+        stvx    vr9,r3,r9
+        addi    r3,r3,32
+10:     bf      cr7*4+3,11f
+        lvx     vr1,r0,r4
+        vperm   vr8,vr0,vr1,vr16
+        addi    r4,r4,16
+        stvx    vr8,r0,r3
+        addi    r3,r3,16
+        /* Up to 15B to go */
+11:     clrldi  r5,r5,(64-4)
+        addi    r4,r4,-16       /* Unwind the +16 load offset */
+        mtocrf  0x01,r5
+        bf      cr7*4+0,12f
+        lwz     r0,0(r4)        /* Less chance of a reject with word ops */
+        lwz     r6,4(r4)
+        addi    r4,r4,8
+        stw     r0,0(r3)
+        stw     r6,4(r3)
+        addi    r3,r3,8
+12:     bf      cr7*4+1,13f
+        lwz     r0,0(r4)
+        addi    r4,r4,4
+        stw     r0,0(r3)
+        addi    r3,r3,4
+13:     bf      cr7*4+2,14f
+        lhz     r0,0(r4)
+        addi    r4,r4,2
+        sth     r0,0(r3)
+        addi    r3,r3,2
+14:     bf      cr7*4+3,15f
+        lbz     r0,0(r4)
+        stb     r0,0(r3)
+15:     addi    r1,r1,STACKFRAMESIZE
+        ld      r3,48(r1)
+        b       .exit_vmx_copy          /* tail call optimise */
+#endif /* CONFiG_ALTIVEC */
diff --git a/arch/powerpc/lib/string.S b/arch/powerpc/lib/string.S
index 093d6316435c..1b5a0a09d609 100644
--- a/arch/powerpc/lib/string.S
+++ b/arch/powerpc/lib/string.S
@@ -119,6 +119,7 @@ _GLOBAL(memchr)
 2:      li      r3,0
        blr
+#ifdef CONFIG_PPC32
 _GLOBAL(__clear_user)
        addi    r6,r3,-4
        li      r3,0
@@ -160,3 +161,4 @@ _GLOBAL(__clear_user)
        PPC_LONG        1b,91b
        PPC_LONG        8b,92b
        .text
+#endif
diff --git a/arch/powerpc/lib/string_64.S b/arch/powerpc/lib/string_64.S
new file mode 100644
index 000000000000..3b1e48049faf
--- /dev/null
+++ b/arch/powerpc/lib/string_64.S
@@ -0,0 +1,202 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2012
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+        .section        ".toc","aw"
+PPC64_CACHES:
+        .tc             ppc64_caches[TC],ppc64_caches
+        .section        ".text"
+/**
+ * __clear_user: - Zero a block of memory in user space, with less checking.
+ * @to:   Destination address, in user space.
+ * @n:    Number of bytes to zero.
+ *
+ * Zero a block of memory in user space.  Caller must check
+ * the specified block with access_ok() before calling this function.
+ *
+ * Returns number of bytes that could not be cleared.
+ * On success, this will be zero.
+ */
+        .macro err1
+100:
+        .section __ex_table,"a"
+        .align 3
+        .llong 100b,.Ldo_err1
+        .previous
+        .endm
+        .macro err2
+200:
+        .section __ex_table,"a"
+        .align 3
+        .llong 200b,.Ldo_err2
+        .previous
+        .endm
+        .macro err3
+300:
+        .section __ex_table,"a"
+        .align 3
+        .llong 300b,.Ldo_err3
+        .previous
+        .endm
+.Ldo_err1:
+        mr      r3,r8
+.Ldo_err2:
+        mtctr   r4
+1:
+err3;   stb     r0,0(r3)
+        addi    r3,r3,1
+        addi    r4,r4,-1
+        bdnz    1b
+.Ldo_err3:
+        mr      r3,r4
+        blr
+_GLOBAL(__clear_user)
+        cmpdi   r4,32
+        neg     r6,r3
+        li      r0,0
+        blt     .Lshort_clear
+        mr      r8,r3
+        mtocrf  0x01,r6
+        clrldi  r6,r6,(64-3)
+        /* Get the destination 8 byte aligned */
+        bf      cr7*4+3,1f
+err1;   stb     r0,0(r3)
+        addi    r3,r3,1
+1:      bf      cr7*4+2,2f
+err1;   sth     r0,0(r3)
+        addi    r3,r3,2
+2:      bf      cr7*4+1,3f
+err1;   stw     r0,0(r3)
+        addi    r3,r3,4
+3:      sub     r4,r4,r6
+        cmpdi   r4,32
+        cmpdi   cr1,r4,512
+        blt     .Lshort_clear
+        bgt     cr1,.Llong_clear
+.Lmedium_clear:
+        srdi    r6,r4,5
+        mtctr   r6
+        /* Do 32 byte chunks */
+4:
+err2;   std     r0,0(r3)
+err2;   std     r0,8(r3)
+err2;   std     r0,16(r3)
+err2;   std     r0,24(r3)
+        addi    r3,r3,32
+        addi    r4,r4,-32
+        bdnz    4b
+.Lshort_clear:
+        /* up to 31 bytes to go */
+        cmpdi   r4,16
+        blt     6f
+err2;   std     r0,0(r3)
+err2;   std     r0,8(r3)
+        addi    r3,r3,16
+        addi    r4,r4,-16
+        /* Up to 15 bytes to go */
+6:      mr      r8,r3
+        clrldi  r4,r4,(64-4)
+        mtocrf  0x01,r4
+        bf      cr7*4+0,7f
+err1;   std     r0,0(r3)
+        addi    r3,r3,8
+7:      bf      cr7*4+1,8f
+err1;   stw     r0,0(r3)
+        addi    r3,r3,4
+8:      bf      cr7*4+2,9f
+err1;   sth     r0,0(r3)
+        addi    r3,r3,2
+9:      bf      cr7*4+3,10f
+err1;   stb     r0,0(r3)
+10:     li      r3,0
+        blr
+.Llong_clear:
+        ld      r5,PPC64_CACHES@toc(r2)
+        bf      cr7*4+0,11f
+err2;   std     r0,0(r3)
+        addi    r3,r3,8
+        addi    r4,r4,-8
+        /* Destination is 16 byte aligned, need to get it cacheline aligned */
+11:     lwz     r7,DCACHEL1LOGLINESIZE(r5)
+        lwz     r9,DCACHEL1LINESIZE(r5)
+        /*
+         * With worst case alignment the long clear loop takes a minimum
+         * of 1 byte less than 2 cachelines.
+         */
+        sldi    r10,r9,2
+        cmpd    r4,r10
+        blt     .Lmedium_clear
+        neg     r6,r3
+        addi    r10,r9,-1
+        and.    r5,r6,r10
+        beq     13f
+        srdi    r6,r5,4
+        mtctr   r6
+        mr      r8,r3
+12:
+err1;   std     r0,0(r3)
+err1;   std     r0,8(r3)
+        addi    r3,r3,16
+        bdnz    12b
+        sub     r4,r4,r5
+13:     srd     r6,r4,r7
+        mtctr   r6
+        mr      r8,r3
+14:
+err1;   dcbz    r0,r3
+        add     r3,r3,r9
+        bdnz    14b
+        and     r4,r4,r10
+        cmpdi   r4,32
+        blt     .Lshort_clear
+        b       .Lmedium_clear
diff --git a/arch/powerpc/lib/copyuser_power7_vmx.c b/arch/powerpc/lib/vmx-helper.c
index bf2654f2b68e..3cf529ceec5b 100644
--- a/arch/powerpc/lib/copyuser_power7_vmx.c
+++ b/arch/powerpc/lib/vmx-helper.c
@@ -22,7 +22,7 @@
 #include <linux/hardirq.h>
 #include <asm/switch_to.h>
-int enter_vmx_copy(void)
+int enter_vmx_usercopy(void)
 {
        if (in_interrupt())
                return 0;
@@ -44,8 +44,31 @@ int enter_vmx_copy(void)
 * This function must return 0 because we tail call optimise when calling
 * from __copy_tofrom_user_power7 which returns 0 on success.
 */
-int exit_vmx_copy(void)
+int exit_vmx_usercopy(void)
 {
        pagefault_enable();
        return 0;
 }
+int enter_vmx_copy(void)
+{
+        if (in_interrupt())
+                return 0;
+        preempt_disable();
+        enable_kernel_altivec();
+        return 1;
+}
+/*
+ * All calls to this function will be optimised into tail calls. We are
+ * passed a pointer to the destination which we return as required by a
+ * memcpy implementation.
+ */
+void *exit_vmx_copy(void *dest)
+{
+        preempt_enable();
+        return dest;
+}
diff --git a/arch/powerpc/mm/hash_low_32.S b/arch/powerpc/mm/hash_low_32.S
index b13d58932bf6..115347f74ce5 100644
--- a/arch/powerpc/mm/hash_low_32.S
+++ b/arch/powerpc/mm/hash_low_32.S
@@ -184,7 +184,7 @@ _GLOBAL(add_hash_page)
        add     r3,r3,r0                /* note create_hpte trims to 24 bits */
 #ifdef CONFIG_SMP
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT) /* use cpu number to make tag */
+        CURRENT_THREAD_INFO(r8, r1)     /* use cpu number to make tag */
        lwz     r8,TI_CPU(r8)           /* to go in mmu_hash_lock */
        oris    r8,r8,12
 #endif /* CONFIG_SMP */
@@ -545,7 +545,7 @@ _GLOBAL(flush_hash_pages)
 #ifdef CONFIG_SMP
        addis   r9,r7,mmu_hash_lock@ha
        addi    r9,r9,mmu_hash_lock@l
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r8, r1)
        add     r8,r8,r7
        lwz     r8,TI_CPU(r8)
        oris    r8,r8,9
@@ -639,7 +639,7 @@ _GLOBAL(flush_hash_patch_B)
 */
 _GLOBAL(_tlbie)
 #ifdef CONFIG_SMP
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r8, r1)
        lwz     r8,TI_CPU(r8)
        oris    r8,r8,11
        mfmsr   r10
@@ -677,7 +677,7 @@ _GLOBAL(_tlbie)
 */
 _GLOBAL(_tlbia)
 #if defined(CONFIG_SMP)
-        rlwinm  r8,r1,0,0,(31-THREAD_SHIFT)
+        CURRENT_THREAD_INFO(r8, r1)
        lwz     r8,TI_CPU(r8)
        oris    r8,r8,10
        mfmsr   r10
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index a242b5d7cbe4..602aeb06d298 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -34,14 +34,6 @@
 *         |   CR save area                     (SP + 8)
 * SP ---> +-- Back chain                       (SP + 0)
 */
-#define STACKFRAMESIZE  256
-/* Save parameters offsets */
-#define STK_PARM(i)     (STACKFRAMESIZE + 48 + ((i)-3)*8)
-/* Save non-volatile offsets */
-#define STK_REG(i)      (112 + ((i)-14)*8)
 #ifndef CONFIG_PPC_64K_PAGES
@@ -64,9 +56,9 @@ _GLOBAL(__hash_page_4K)
        std     r0,16(r1)
        stdu    r1,-STACKFRAMESIZE(r1)
        /* Save all params that we need after a function call */
-        std     r6,STK_PARM(r6)(r1)
+        std     r6,STK_PARAM(R6)(r1)
-        std     r8,STK_PARM(r8)(r1)
+        std     r8,STK_PARAM(R8)(r1)
-        std     r9,STK_PARM(r9)(r1)
+        std     r9,STK_PARAM(R9)(r1)
        
        /* Save non-volatile registers.
         * r31 will hold "old PTE"
@@ -75,11 +67,11 @@ _GLOBAL(__hash_page_4K)
         * r28 is a hash value
         * r27 is hashtab mask (maybe dynamic patched instead ?)
         */
-        std     r27,STK_REG(r27)(r1)
+        std     r27,STK_REG(R27)(r1)
-        std     r28,STK_REG(r28)(r1)
+        std     r28,STK_REG(R28)(r1)
-        std     r29,STK_REG(r29)(r1)
+        std     r29,STK_REG(R29)(r1)
-        std     r30,STK_REG(r30)(r1)
+        std     r30,STK_REG(R30)(r1)
-        std     r31,STK_REG(r31)(r1)
+        std     r31,STK_REG(R31)(r1)
        
        /* Step 1:
         *
@@ -162,7 +154,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
        /* At this point, r3 contains new PP bits, save them in
         * place of "access" in the param area (sic)
         */
-        std     r3,STK_PARM(r4)(r1)
+        std     r3,STK_PARAM(R4)(r1)
        /* Get htab_hash_mask */
        ld      r4,htab_hash_mask@got(2)
@@ -192,11 +184,11 @@ htab_insert_pte:
        rldicr  r3,r0,3,63-3            /* r3 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_4K          /* page size */
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(htab_call_hpte_insert1)
        bl      .                       /* Patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -215,11 +207,11 @@ _GLOBAL(htab_call_hpte_insert1)
        rldicr  r3,r0,3,63-3    /* r0 = (~hash & mask) << 3 */
        
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_4K          /* page size */
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(htab_call_hpte_insert2)
        bl      .                       /* Patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -255,15 +247,15 @@ htab_pte_insert_ok:
         * (maybe add eieio may be good still ?)
         */
 htab_write_out_pte:
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r30,0(r6)
        li      r3, 0
 htab_bail:
-        ld      r27,STK_REG(r27)(r1)
+        ld      r27,STK_REG(R27)(r1)
-        ld      r28,STK_REG(r28)(r1)
+        ld      r28,STK_REG(R28)(r1)
-        ld      r29,STK_REG(r29)(r1)
+        ld      r29,STK_REG(R29)(r1)
-        ld      r30,STK_REG(r30)(r1)
+        ld      r30,STK_REG(R30)(r1)
-        ld      r31,STK_REG(r31)(r1)
+        ld      r31,STK_REG(R31)(r1)
        addi    r1,r1,STACKFRAMESIZE
        ld      r0,16(r1)
        mtlr    r0
@@ -288,8 +280,8 @@ htab_modify_pte:
        /* Call ppc_md.hpte_updatepp */
        mr      r5,r29                  /* va */
        li      r6,MMU_PAGE_4K          /* page size */
-        ld      r7,STK_PARM(r9)(r1)     /* segment size */
+        ld      r7,STK_PARAM(R9)(r1)    /* segment size */
-        ld      r8,STK_PARM(r8)(r1)     /* get "local" param */
+        ld      r8,STK_PARAM(R8)(r1)    /* get "local" param */
 _GLOBAL(htab_call_hpte_updatepp)
        bl      .                       /* Patched by htab_finish_init() */
@@ -312,7 +304,7 @@ htab_wrong_access:
 htab_pte_insert_failure:
        /* Bail out restoring old PTE */
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r31,0(r6)
        li      r3,-1
        b       htab_bail
@@ -340,9 +332,9 @@ _GLOBAL(__hash_page_4K)
        std     r0,16(r1)
        stdu    r1,-STACKFRAMESIZE(r1)
        /* Save all params that we need after a function call */
-        std     r6,STK_PARM(r6)(r1)
+        std     r6,STK_PARAM(R6)(r1)
-        std     r8,STK_PARM(r8)(r1)
+        std     r8,STK_PARAM(R8)(r1)
-        std     r9,STK_PARM(r9)(r1)
+        std     r9,STK_PARAM(R9)(r1)
        /* Save non-volatile registers.
         * r31 will hold "old PTE"
@@ -353,13 +345,13 @@ _GLOBAL(__hash_page_4K)
         * r26 is the hidx mask
         * r25 is the index in combo page
         */
-        std     r25,STK_REG(r25)(r1)
+        std     r25,STK_REG(R25)(r1)
-        std     r26,STK_REG(r26)(r1)
+        std     r26,STK_REG(R26)(r1)
-        std     r27,STK_REG(r27)(r1)
+        std     r27,STK_REG(R27)(r1)
-        std     r28,STK_REG(r28)(r1)
+        std     r28,STK_REG(R28)(r1)
-        std     r29,STK_REG(r29)(r1)
+        std     r29,STK_REG(R29)(r1)
-        std     r30,STK_REG(r30)(r1)
+        std     r30,STK_REG(R30)(r1)
-        std     r31,STK_REG(r31)(r1)
+        std     r31,STK_REG(R31)(r1)
        /* Step 1:
         *
@@ -452,7 +444,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
        /* At this point, r3 contains new PP bits, save them in
         * place of "access" in the param area (sic)
         */
-        std     r3,STK_PARM(r4)(r1)
+        std     r3,STK_PARAM(R4)(r1)
        /* Get htab_hash_mask */
        ld      r4,htab_hash_mask@got(2)
@@ -473,7 +465,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
        andis.  r0,r31,_PAGE_COMBO@h
        beq     htab_inval_old_hpte
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        ori     r26,r6,0x8000           /* Load the hidx mask */
        ld      r26,0(r26)
        addi    r5,r25,36               /* Check actual HPTE_SUB bit, this */
@@ -495,11 +487,11 @@ htab_special_pfn:
        rldicr  r3,r0,3,63-3            /* r0 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_4K          /* page size */
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(htab_call_hpte_insert1)
        bl      .                       /* patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -522,11 +514,11 @@ _GLOBAL(htab_call_hpte_insert1)
        rldicr  r3,r0,3,63-3            /* r0 = (~hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_4K          /* page size */
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(htab_call_hpte_insert2)
        bl      .                       /* patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -559,8 +551,8 @@ htab_inval_old_hpte:
        mr      r4,r31                  /* PTE.pte */
        li      r5,0                    /* PTE.hidx */
        li      r6,MMU_PAGE_64K         /* psize */
-        ld      r7,STK_PARM(r9)(r1)     /* ssize */
+        ld      r7,STK_PARAM(R9)(r1)    /* ssize */
-        ld      r8,STK_PARM(r8)(r1)     /* local */
+        ld      r8,STK_PARAM(R8)(r1)    /* local */
        bl      .flush_hash_page
        /* Clear out _PAGE_HPTE_SUB bits in the new linux PTE */
        lis     r0,_PAGE_HPTE_SUB@h
@@ -576,7 +568,7 @@ htab_pte_insert_ok:
        /* Insert slot number & secondary bit in PTE second half,
         * clear _PAGE_BUSY and set approriate HPTE slot bit
         */
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        li      r0,_PAGE_BUSY
        andc    r30,r30,r0
        /* HPTE SUB bit */
@@ -597,13 +589,13 @@ htab_pte_insert_ok:
        std     r30,0(r6)
        li      r3, 0
 htab_bail:
-        ld      r25,STK_REG(r25)(r1)
+        ld      r25,STK_REG(R25)(r1)
-        ld      r26,STK_REG(r26)(r1)
+        ld      r26,STK_REG(R26)(r1)
-        ld      r27,STK_REG(r27)(r1)
+        ld      r27,STK_REG(R27)(r1)
-        ld      r28,STK_REG(r28)(r1)
+        ld      r28,STK_REG(R28)(r1)
-        ld      r29,STK_REG(r29)(r1)
+        ld      r29,STK_REG(R29)(r1)
-        ld      r30,STK_REG(r30)(r1)
+        ld      r30,STK_REG(R30)(r1)
-        ld      r31,STK_REG(r31)(r1)
+        ld      r31,STK_REG(R31)(r1)
        addi    r1,r1,STACKFRAMESIZE
        ld      r0,16(r1)
        mtlr    r0
@@ -630,8 +622,8 @@ htab_modify_pte:
        /* Call ppc_md.hpte_updatepp */
        mr      r5,r29                  /* va */
        li      r6,MMU_PAGE_4K          /* page size */
-        ld      r7,STK_PARM(r9)(r1)     /* segment size */
+        ld      r7,STK_PARAM(R9)(r1)    /* segment size */
-        ld      r8,STK_PARM(r8)(r1)     /* get "local" param */
+        ld      r8,STK_PARAM(R8)(r1)    /* get "local" param */
 _GLOBAL(htab_call_hpte_updatepp)
        bl      .                       /* patched by htab_finish_init() */
@@ -644,7 +636,7 @@ _GLOBAL(htab_call_hpte_updatepp)
        /* Clear the BUSY bit and Write out the PTE */
        li      r0,_PAGE_BUSY
        andc    r30,r30,r0
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r30,0(r6)
        li      r3,0
        b       htab_bail
@@ -657,7 +649,7 @@ htab_wrong_access:
 htab_pte_insert_failure:
        /* Bail out restoring old PTE */
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r31,0(r6)
        li      r3,-1
        b       htab_bail
@@ -677,9 +669,9 @@ _GLOBAL(__hash_page_64K)
        std     r0,16(r1)
        stdu    r1,-STACKFRAMESIZE(r1)
        /* Save all params that we need after a function call */
-        std     r6,STK_PARM(r6)(r1)
+        std     r6,STK_PARAM(R6)(r1)
-        std     r8,STK_PARM(r8)(r1)
+        std     r8,STK_PARAM(R8)(r1)
-        std     r9,STK_PARM(r9)(r1)
+        std     r9,STK_PARAM(R9)(r1)
        /* Save non-volatile registers.
         * r31 will hold "old PTE"
@@ -688,11 +680,11 @@ _GLOBAL(__hash_page_64K)
         * r28 is a hash value
         * r27 is hashtab mask (maybe dynamic patched instead ?)
         */
-        std     r27,STK_REG(r27)(r1)
+        std     r27,STK_REG(R27)(r1)
-        std     r28,STK_REG(r28)(r1)
+        std     r28,STK_REG(R28)(r1)
-        std     r29,STK_REG(r29)(r1)
+        std     r29,STK_REG(R29)(r1)
-        std     r30,STK_REG(r30)(r1)
+        std     r30,STK_REG(R30)(r1)
-        std     r31,STK_REG(r31)(r1)
+        std     r31,STK_REG(R31)(r1)
        /* Step 1:
         *
@@ -780,7 +772,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
        /* At this point, r3 contains new PP bits, save them in
         * place of "access" in the param area (sic)
         */
-        std     r3,STK_PARM(r4)(r1)
+        std     r3,STK_PARAM(R4)(r1)
        /* Get htab_hash_mask */
        ld      r4,htab_hash_mask@got(2)
@@ -813,11 +805,11 @@ ht64_insert_pte:
        rldicr  r3,r0,3,63-3    /* r0 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_64K
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(ht64_call_hpte_insert1)
        bl      .                       /* patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -836,11 +828,11 @@ _GLOBAL(ht64_call_hpte_insert1)
        rldicr  r3,r0,3,63-3    /* r0 = (~hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
+        ld      r6,STK_PARAM(R4)(r1)    /* Retrieve new pp bits */
        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_64K
-        ld      r9,STK_PARM(r9)(r1)     /* segment size */
+        ld      r9,STK_PARAM(R9)(r1)    /* segment size */
 _GLOBAL(ht64_call_hpte_insert2)
        bl      .                       /* patched by htab_finish_init() */
        cmpdi   0,r3,0
@@ -876,15 +868,15 @@ ht64_pte_insert_ok:
         * (maybe add eieio may be good still ?)
         */
 ht64_write_out_pte:
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r30,0(r6)
        li      r3, 0
 ht64_bail:
-        ld      r27,STK_REG(r27)(r1)
+        ld      r27,STK_REG(R27)(r1)
-        ld      r28,STK_REG(r28)(r1)
+        ld      r28,STK_REG(R28)(r1)
-        ld      r29,STK_REG(r29)(r1)
+        ld      r29,STK_REG(R29)(r1)
-        ld      r30,STK_REG(r30)(r1)
+        ld      r30,STK_REG(R30)(r1)
-        ld      r31,STK_REG(r31)(r1)
+        ld      r31,STK_REG(R31)(r1)
        addi    r1,r1,STACKFRAMESIZE
        ld      r0,16(r1)
        mtlr    r0
@@ -909,8 +901,8 @@ ht64_modify_pte:
        /* Call ppc_md.hpte_updatepp */
        mr      r5,r29                  /* va */
        li      r6,MMU_PAGE_64K
-        ld      r7,STK_PARM(r9)(r1)     /* segment size */
+        ld      r7,STK_PARAM(R9)(r1)    /* segment size */
-        ld      r8,STK_PARM(r8)(r1)     /* get "local" param */
+        ld      r8,STK_PARAM(R8)(r1)    /* get "local" param */
 _GLOBAL(ht64_call_hpte_updatepp)
        bl      .                       /* patched by htab_finish_init() */
@@ -933,7 +925,7 @@ ht64_wrong_access:
 ht64_pte_insert_failure:
        /* Bail out restoring old PTE */
-        ld      r6,STK_PARM(r6)(r1)
+        ld      r6,STK_PARAM(R6)(r1)
        std     r31,0(r6)
        li      r3,-1
        b       ht64_bail
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index b6edbb3b4a54..39b159751c35 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -340,6 +340,8 @@ static int __init find_min_common_depth(void)
                                dbg("Using form 1 affinity\n");
                                form1_affinity = 1;
                        }
+                        of_node_put(chosen);
                }
        }
@@ -635,11 +637,11 @@ static inline int __init read_usm_ranges(const u32 **usm)
 */
 static void __init parse_drconf_memory(struct device_node *memory)
 {
-        const u32 *dm, *usm;
+        const u32 *uninitialized_var(dm), *usm;
        unsigned int n, rc, ranges, is_kexec_kdump = 0;
        unsigned long lmb_size, base, size, sz;
        int nid;
-        struct assoc_arrays aa;
+        struct assoc_arrays aa = { .arrays = NULL };
        n = of_get_drconf_memory(memory, &dm);
        if (!n)
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index ff672bd8fea9..f09d48e3268d 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -126,7 +126,7 @@ BEGIN_MMU_FTR_SECTION
        /* Set the TLB reservation and search for existing entry. Then load
         * the entry.
         */
-        PPC_TLBSRX_DOT(0,r16)
+        PPC_TLBSRX_DOT(0,R16)
        ldx     r14,r14,r15             /* grab pgd entry */
        beq     normal_tlb_miss_done    /* tlb exists already, bail */
 MMU_FTR_SECTION_ELSE
@@ -395,7 +395,7 @@ BEGIN_MMU_FTR_SECTION
        /* Set the TLB reservation and search for existing entry. Then load
         * the entry.
         */
-        PPC_TLBSRX_DOT(0,r16)
+        PPC_TLBSRX_DOT(0,R16)
        ld      r14,0(r10)
        beq     normal_tlb_miss_done
 MMU_FTR_SECTION_ELSE
@@ -528,7 +528,7 @@ BEGIN_MMU_FTR_SECTION
        /* Search if we already have a TLB entry for that virtual address, and
         * if we do, bail out.
         */
-        PPC_TLBSRX_DOT(0,r16)
+        PPC_TLBSRX_DOT(0,R16)
        beq     virt_page_table_tlb_miss_done
 END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_TLBRSRV)
@@ -779,7 +779,7 @@ htw_tlb_miss:
         *
         * MAS1:IND should be already set based on MAS4
         */
-        PPC_TLBSRX_DOT(0,r16)
+        PPC_TLBSRX_DOT(0,R16)
        beq     htw_tlb_miss_done
        /* Now, we need to walk the page tables. First check if we are in
@@ -919,7 +919,7 @@ tlb_load_linear:
        mtspr   SPRN_MAS1,r15
        /* Already somebody there ? */
-        PPC_TLBSRX_DOT(0,r16)
+        PPC_TLBSRX_DOT(0,R16)
        beq     tlb_load_linear_done
        /* Now we build the remaining MAS. MAS0 and 2 should be fine
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index 7c63c0ed4f1b..fab919fd1384 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -266,7 +266,7 @@ BEGIN_MMU_FTR_SECTION
        andi.   r3,r3,MMUCSR0_TLBFI@l
        bne     1b
 MMU_FTR_SECTION_ELSE
-        PPC_TLBILX_ALL(0,0)
+        PPC_TLBILX_ALL(0,R0)
 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
        msync
        isync
@@ -279,7 +279,7 @@ BEGIN_MMU_FTR_SECTION
        wrteei  0
        mfspr   r4,SPRN_MAS6    /* save MAS6 */
        mtspr   SPRN_MAS6,r3
-        PPC_TLBILX_PID(0,0)
+        PPC_TLBILX_PID(0,R0)
        mtspr   SPRN_MAS6,r4    /* restore MAS6 */
        wrtee   r10
 MMU_FTR_SECTION_ELSE
@@ -313,7 +313,7 @@ BEGIN_MMU_FTR_SECTION
        mtspr   SPRN_MAS1,r4
        tlbwe
 MMU_FTR_SECTION_ELSE
-        PPC_TLBILX_VA(0,r3)
+        PPC_TLBILX_VA(0,R3)
 ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_USE_TLBILX)
        msync
        isync
@@ -331,7 +331,7 @@ _GLOBAL(_tlbil_pid)
        mfmsr   r10
        wrteei  0
        mtspr   SPRN_MAS6,r4
-        PPC_TLBILX_PID(0,0)
+        PPC_TLBILX_PID(0,R0)
        wrtee   r10
        msync
        isync
@@ -343,14 +343,14 @@ _GLOBAL(_tlbil_pid_noind)
        ori     r4,r4,MAS6_SIND
        wrteei  0
        mtspr   SPRN_MAS6,r4
-        PPC_TLBILX_PID(0,0)
+        PPC_TLBILX_PID(0,R0)
        wrtee   r10
        msync
        isync
        blr
 _GLOBAL(_tlbil_all)
-        PPC_TLBILX_ALL(0,0)
+        PPC_TLBILX_ALL(0,R0)
        msync
        isync
        blr
@@ -364,7 +364,7 @@ _GLOBAL(_tlbil_va)
        beq     1f
        rlwimi  r4,r6,MAS6_SIND_SHIFT,MAS6_SIND
 1:      mtspr   SPRN_MAS6,r4            /* assume AS=0 for now */
-        PPC_TLBILX_VA(0,r3)
+        PPC_TLBILX_VA(0,R3)
        msync
        isync
        wrtee   r10
@@ -379,7 +379,7 @@ _GLOBAL(_tlbivax_bcast)
        beq     1f
        rlwimi  r4,r6,MAS6_SIND_SHIFT,MAS6_SIND
 1:      mtspr   SPRN_MAS6,r4            /* assume AS=0 for now */
-        PPC_TLBIVAX(0,r3)
+        PPC_TLBIVAX(0,R3)
        eieio
        tlbsync
        sync
diff --git a/arch/powerpc/net/bpf_jit.h b/arch/powerpc/net/bpf_jit.h
index 5c3cf2d04e41..1fc8109bf2f9 100644
--- a/arch/powerpc/net/bpf_jit.h
+++ b/arch/powerpc/net/bpf_jit.h
@@ -75,23 +75,23 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
 #define PPC_NOP()               EMIT(PPC_INST_NOP)
 #define PPC_BLR()               EMIT(PPC_INST_BLR)
 #define PPC_BLRL()              EMIT(PPC_INST_BLRL)
-#define PPC_MTLR(r)             EMIT(PPC_INST_MTLR | __PPC_RT(r))
+#define PPC_MTLR(r)             EMIT(PPC_INST_MTLR | ___PPC_RT(r))
-#define PPC_ADDI(d, a, i)       EMIT(PPC_INST_ADDI | __PPC_RT(d) |            \
+#define PPC_ADDI(d, a, i)       EMIT(PPC_INST_ADDI | ___PPC_RT(d) |           \
-                                     __PPC_RA(a) | IMM_L(i))
+                                     ___PPC_RA(a) | IMM_L(i))
 #define PPC_MR(d, a)            PPC_OR(d, a, a)
 #define PPC_LI(r, i)            PPC_ADDI(r, 0, i)
 #define PPC_ADDIS(d, a, i)      EMIT(PPC_INST_ADDIS |                         \
-                                     __PPC_RS(d) | __PPC_RA(a) | IMM_L(i))
+                                     ___PPC_RS(d) | ___PPC_RA(a) | IMM_L(i))
 #define PPC_LIS(r, i)           PPC_ADDIS(r, 0, i)
-#define PPC_STD(r, base, i)     EMIT(PPC_INST_STD | __PPC_RS(r) |             \
+#define PPC_STD(r, base, i)     EMIT(PPC_INST_STD | ___PPC_RS(r) |            \
-                                     __PPC_RA(base) | ((i) & 0xfffc))
+                                     ___PPC_RA(base) | ((i) & 0xfffc))
-#define PPC_LD(r, base, i)      EMIT(PPC_INST_LD | __PPC_RT(r) |              \
+#define PPC_LD(r, base, i)      EMIT(PPC_INST_LD | ___PPC_RT(r) |             \
-                                     __PPC_RA(base) | IMM_L(i))
+                                     ___PPC_RA(base) | IMM_L(i))
-#define PPC_LWZ(r, base, i)     EMIT(PPC_INST_LWZ | __PPC_RT(r) |             \
+#define PPC_LWZ(r, base, i)     EMIT(PPC_INST_LWZ | ___PPC_RT(r) |            \
-                                     __PPC_RA(base) | IMM_L(i))
+                                     ___PPC_RA(base) | IMM_L(i))
-#define PPC_LHZ(r, base, i)     EMIT(PPC_INST_LHZ | __PPC_RT(r) |             \
+#define PPC_LHZ(r, base, i)     EMIT(PPC_INST_LHZ | ___PPC_RT(r) |            \
-                                     __PPC_RA(base) | IMM_L(i))
+                                     ___PPC_RA(base) | IMM_L(i))
 /* Convenience helpers for the above with 'far' offsets: */
 #define PPC_LD_OFFS(r, base, i) do { if ((i) < 32768) PPC_LD(r, base, i);     \
                else {  PPC_ADDIS(r, base, IMM_HA(i));                        \
@@ -105,52 +105,52 @@ DECLARE_LOAD_FUNC(sk_load_byte_msh);
                else {  PPC_ADDIS(r, base, IMM_HA(i));                        \
                        PPC_LHZ(r, r, IMM_L(i)); } } while(0)
-#define PPC_CMPWI(a, i)         EMIT(PPC_INST_CMPWI | __PPC_RA(a) | IMM_L(i))
+#define PPC_CMPWI(a, i)         EMIT(PPC_INST_CMPWI | ___PPC_RA(a) | IMM_L(i))
-#define PPC_CMPDI(a, i)         EMIT(PPC_INST_CMPDI | __PPC_RA(a) | IMM_L(i))
+#define PPC_CMPDI(a, i)         EMIT(PPC_INST_CMPDI | ___PPC_RA(a) | IMM_L(i))
-#define PPC_CMPLWI(a, i)        EMIT(PPC_INST_CMPLWI | __PPC_RA(a) | IMM_L(i))
+#define PPC_CMPLWI(a, i)        EMIT(PPC_INST_CMPLWI | ___PPC_RA(a) | IMM_L(i))
-#define PPC_CMPLW(a, b)         EMIT(PPC_INST_CMPLW | __PPC_RA(a) | __PPC_RB(b))
+#define PPC_CMPLW(a, b)         EMIT(PPC_INST_CMPLW | ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_SUB(d, a, b)        EMIT(PPC_INST_SUB | __PPC_RT(d) |             \
+#define PPC_SUB(d, a, b)        EMIT(PPC_INST_SUB | ___PPC_RT(d) |            \
-                                     __PPC_RB(a) | __PPC_RA(b))
+                                     ___PPC_RB(a) | ___PPC_RA(b))
-#define PPC_ADD(d, a, b)        EMIT(PPC_INST_ADD | __PPC_RT(d) |             \
+#define PPC_ADD(d, a, b)        EMIT(PPC_INST_ADD | ___PPC_RT(d) |            \
-                                     __PPC_RA(a) | __PPC_RB(b))
+                                     ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_MUL(d, a, b)        EMIT(PPC_INST_MULLW | __PPC_RT(d) |           \
+#define PPC_MUL(d, a, b)        EMIT(PPC_INST_MULLW | ___PPC_RT(d) |          \
-                                     __PPC_RA(a) | __PPC_RB(b))
+                                     ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_MULHWU(d, a, b)     EMIT(PPC_INST_MULHWU | __PPC_RT(d) |          \
+#define PPC_MULHWU(d, a, b)     EMIT(PPC_INST_MULHWU | ___PPC_RT(d) |         \
-                                     __PPC_RA(a) | __PPC_RB(b))
+                                     ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_MULI(d, a, i)       EMIT(PPC_INST_MULLI | __PPC_RT(d) |           \
+#define PPC_MULI(d, a, i)       EMIT(PPC_INST_MULLI | ___PPC_RT(d) |          \
-                                     __PPC_RA(a) | IMM_L(i))
+                                     ___PPC_RA(a) | IMM_L(i))
-#define PPC_DIVWU(d, a, b)      EMIT(PPC_INST_DIVWU | __PPC_RT(d) |           \
+#define PPC_DIVWU(d, a, b)      EMIT(PPC_INST_DIVWU | ___PPC_RT(d) |          \
-                                     __PPC_RA(a) | __PPC_RB(b))
+                                     ___PPC_RA(a) | ___PPC_RB(b))
-#define PPC_AND(d, a, b)        EMIT(PPC_INST_AND | __PPC_RA(d) |             \
+#define PPC_AND(d, a, b)        EMIT(PPC_INST_AND | ___PPC_RA(d) |            \
-                                     __PPC_RS(a) | __PPC_RB(b))
+                                     ___PPC_RS(a) | ___PPC_RB(b))
-#define PPC_ANDI(d, a, i)       EMIT(PPC_INST_ANDI | __PPC_RA(d) |            \
+#define PPC_ANDI(d, a, i)       EMIT(PPC_INST_ANDI | ___PPC_RA(d) |           \
-                                     __PPC_RS(a) | IMM_L(i))
+                                     ___PPC_RS(a) | IMM_L(i))
-#define PPC_AND_DOT(d, a, b)    EMIT(PPC_INST_ANDDOT | __PPC_RA(d) |          \
+#define PPC_AND_DOT(d, a, b)    EMIT(PPC_INST_ANDDOT | ___PPC_RA(d) |         \
-                                     __PPC_RS(a) | __PPC_RB(b))
+                                     ___PPC_RS(a) | ___PPC_RB(b))
-#define PPC_OR(d, a, b)         EMIT(PPC_INST_OR | __PPC_RA(d) |              \
+#define PPC_OR(d, a, b)         EMIT(PPC_INST_OR | ___PPC_RA(d) |             \
-                                     __PPC_RS(a) | __PPC_RB(b))
+                                     ___PPC_RS(a) | ___PPC_RB(b))
-#define PPC_ORI(d, a, i)        EMIT(PPC_INST_ORI | __PPC_RA(d) |             \
+#define PPC_ORI(d, a, i)        EMIT(PPC_INST_ORI | ___PPC_RA(d) |            \
-                                     __PPC_RS(a) | IMM_L(i))
+                                     ___PPC_RS(a) | IMM_L(i))
-#define PPC_ORIS(d, a, i)       EMIT(PPC_INST_ORIS | __PPC_RA(d) |            \
+#define PPC_ORIS(d, a, i)       EMIT(PPC_INST_ORIS | ___PPC_RA(d) |           \
-                                     __PPC_RS(a) | IMM_L(i))
+                                     ___PPC_RS(a) | IMM_L(i))
-#define PPC_SLW(d, a, s)        EMIT(PPC_INST_SLW | __PPC_RA(d) |             \
+#define PPC_SLW(d, a, s)        EMIT(PPC_INST_SLW | ___PPC_RA(d) |            \
-                                     __PPC_RS(a) | __PPC_RB(s))
+                                     ___PPC_RS(a) | ___PPC_RB(s))
-#define PPC_SRW(d, a, s)        EMIT(PPC_INST_SRW | __PPC_RA(d) |             \
+#define PPC_SRW(d, a, s)        EMIT(PPC_INST_SRW | ___PPC_RA(d) |            \
-                                     __PPC_RS(a) | __PPC_RB(s))
+                                     ___PPC_RS(a) | ___PPC_RB(s))
 /* slwi = rlwinm Rx, Ry, n, 0, 31-n */
-#define PPC_SLWI(d, a, i)       EMIT(PPC_INST_RLWINM | __PPC_RA(d) |          \
+#define PPC_SLWI(d, a, i)       EMIT(PPC_INST_RLWINM | ___PPC_RA(d) |         \
-                                     __PPC_RS(a) | __PPC_SH(i) |              \
+                                     ___PPC_RS(a) | __PPC_SH(i) |             \
                                     __PPC_MB(0) | __PPC_ME(31-(i)))
 /* srwi = rlwinm Rx, Ry, 32-n, n, 31 */
-#define PPC_SRWI(d, a, i)       EMIT(PPC_INST_RLWINM | __PPC_RA(d) |          \
+#define PPC_SRWI(d, a, i)       EMIT(PPC_INST_RLWINM | ___PPC_RA(d) |         \
-                                     __PPC_RS(a) | __PPC_SH(32-(i)) |         \
+                                     ___PPC_RS(a) | __PPC_SH(32-(i)) |        \
                                     __PPC_MB(i) | __PPC_ME(31))
 /* sldi = rldicr Rx, Ry, n, 63-n */
-#define PPC_SLDI(d, a, i)       EMIT(PPC_INST_RLDICR | __PPC_RA(d) |          \
+#define PPC_SLDI(d, a, i)       EMIT(PPC_INST_RLDICR | ___PPC_RA(d) |         \
-                                     __PPC_RS(a) | __PPC_SH(i) |              \
+                                     ___PPC_RS(a) | __PPC_SH(i) |             \
                                     __PPC_MB(63-(i)) | (((i) & 0x20) >> 4))
-#define PPC_NEG(d, a)           EMIT(PPC_INST_NEG | __PPC_RT(d) | __PPC_RA(a))
+#define PPC_NEG(d, a)           EMIT(PPC_INST_NEG | ___PPC_RT(d) | ___PPC_RA(a))
 /* Long jump; (unconditional 'branch') */
 #define PPC_JMP(dest)           EMIT(PPC_INST_BRANCH |                        \
diff --git a/arch/powerpc/net/bpf_jit_64.S b/arch/powerpc/net/bpf_jit_64.S
index 55ba3855a97f..7d3a3b5619a2 100644
--- a/arch/powerpc/net/bpf_jit_64.S
+++ b/arch/powerpc/net/bpf_jit_64.S
@@ -105,6 +105,7 @@ sk_load_byte_msh_positive_offset:
        mr      r4, r_addr;                                     \
        li      r6, SIZE;                                       \
        bl      skb_copy_bits;                                  \
+        nop;                                                    \
        /* R3 = 0 on success */                                 \
        addi    r1, r1, BPF_PPC_SLOWPATH_FRAME;                 \
        ld      r0, 16(r1);                                     \
@@ -156,6 +157,7 @@ bpf_slow_path_byte_msh:
        mr      r4, r_addr;                                     \
        li      r5, SIZE;                                       \
        bl      bpf_internal_load_pointer_neg_helper;           \
+        nop;                                                    \
        /* R3 != 0 on success */                                \
        addi    r1, r1, BPF_PPC_SLOWPATH_FRAME;                 \
        ld      r0, 16(r1);                                     \
diff --git a/arch/powerpc/net/bpf_jit_comp.c b/arch/powerpc/net/bpf_jit_comp.c
index 2dc8b1484845..dd1130642d07 100644
--- a/arch/powerpc/net/bpf_jit_comp.c
+++ b/arch/powerpc/net/bpf_jit_comp.c
@@ -39,7 +39,7 @@ static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image,
                /* Make stackframe */
                if (ctx->seen & SEEN_DATAREF) {
                        /* If we call any helpers (for loads), save LR */
-                        EMIT(PPC_INST_MFLR | __PPC_RT(0));
+                        EMIT(PPC_INST_MFLR | __PPC_RT(R0));
                        PPC_STD(0, 1, 16);
                        /* Back up non-volatile regs. */
@@ -56,7 +56,7 @@ static void bpf_jit_build_prologue(struct sk_filter *fp, u32 *image,
                                        PPC_STD(i, 1, -(8*(32-i)));
                        }
                }
-                EMIT(PPC_INST_STDU | __PPC_RS(1) | __PPC_RA(1) |
+                EMIT(PPC_INST_STDU | __PPC_RS(R1) | __PPC_RA(R1) |
                     (-BPF_PPC_STACKFRAME & 0xfffc));
        }
diff --git a/arch/powerpc/perf/callchain.c b/arch/powerpc/perf/callchain.c
index e8a18d1cc7c9..74d1e780748b 100644
--- a/arch/powerpc/perf/callchain.c
+++ b/arch/powerpc/perf/callchain.c
@@ -57,7 +57,7 @@ perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
        lr = regs->link;
        sp = regs->gpr[1];
-        perf_callchain_store(entry, regs->nip);
+        perf_callchain_store(entry, perf_instruction_pointer(regs));
        if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD))
                return;
@@ -238,7 +238,7 @@ static void perf_callchain_user_64(struct perf_callchain_entry *entry,
        struct signal_frame_64 __user *sigframe;
        unsigned long __user *fp, *uregs;
-        next_ip = regs->nip;
+        next_ip = perf_instruction_pointer(regs);
        lr = regs->link;
        sp = regs->gpr[1];
        perf_callchain_store(entry, next_ip);
@@ -444,7 +444,7 @@ static void perf_callchain_user_32(struct perf_callchain_entry *entry,
        long level = 0;
        unsigned int __user *fp, *uregs;
-        next_ip = regs->nip;
+        next_ip = perf_instruction_pointer(regs);
        lr = regs->link;
        sp = regs->gpr[1];
        perf_callchain_store(entry, next_ip);
diff --git a/arch/powerpc/perf/core-book3s.c b/arch/powerpc/perf/core-book3s.c
index 8f84bcba18da..77b49ddda9d3 100644
--- a/arch/powerpc/perf/core-book3s.c
+++ b/arch/powerpc/perf/core-book3s.c
@@ -73,7 +73,10 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 {
        return 0;
 }
-static inline void perf_read_regs(struct pt_regs *regs) { }
+static inline void perf_read_regs(struct pt_regs *regs)
+{
+        regs->result = 0;
+}
 static inline int perf_intr_is_nmi(struct pt_regs *regs)
 {
        return 0;
@@ -116,6 +119,26 @@ static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp)
                *addrp = mfspr(SPRN_SDAR);
 }
+static bool mmcra_sihv(unsigned long mmcra)
+{
+        unsigned long sihv = MMCRA_SIHV;
+        if (ppmu->flags & PPMU_ALT_SIPR)
+                sihv = POWER6_MMCRA_SIHV;
+        return !!(mmcra & sihv);
+}
+static bool mmcra_sipr(unsigned long mmcra)
+{
+        unsigned long sipr = MMCRA_SIPR;
+        if (ppmu->flags & PPMU_ALT_SIPR)
+                sipr = POWER6_MMCRA_SIPR;
+        return !!(mmcra & sipr);
+}
 static inline u32 perf_flags_from_msr(struct pt_regs *regs)
 {
        if (regs->msr & MSR_PR)
@@ -128,19 +151,9 @@ static inline u32 perf_flags_from_msr(struct pt_regs *regs)
 static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 {
        unsigned long mmcra = regs->dsisr;
-        unsigned long sihv = MMCRA_SIHV;
+        unsigned long use_siar = regs->result;
-        unsigned long sipr = MMCRA_SIPR;
-        /* Not a PMU interrupt: Make up flags from regs->msr */
+        if (!use_siar)
-        if (TRAP(regs) != 0xf00)
-                return perf_flags_from_msr(regs);
-        /*
-         * If we don't support continuous sampling and this
-         * is not a marked event, same deal
-         */
-        if ((ppmu->flags & PPMU_NO_CONT_SAMPLING) &&
-            !(mmcra & MMCRA_SAMPLE_ENABLE))
                return perf_flags_from_msr(regs);
        /*
@@ -156,15 +169,10 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
                return PERF_RECORD_MISC_USER;
        }
-        if (ppmu->flags & PPMU_ALT_SIPR) {
-                sihv = POWER6_MMCRA_SIHV;
-                sipr = POWER6_MMCRA_SIPR;
-        }
        /* PR has priority over HV, so order below is important */
-        if (mmcra & sipr)
+        if (mmcra_sipr(mmcra))
                return PERF_RECORD_MISC_USER;
-        if ((mmcra & sihv) && (freeze_events_kernel != MMCR0_FCHV))
+        if (mmcra_sihv(mmcra) && (freeze_events_kernel != MMCR0_FCHV))
                return PERF_RECORD_MISC_HYPERVISOR;
        return PERF_RECORD_MISC_KERNEL;
 }
@@ -172,10 +180,45 @@ static inline u32 perf_get_misc_flags(struct pt_regs *regs)
 /*
 * Overload regs->dsisr to store MMCRA so we only need to read it once
 * on each interrupt.
+ * Overload regs->result to specify whether we should use the MSR (result
+ * is zero) or the SIAR (result is non zero).
 */
 static inline void perf_read_regs(struct pt_regs *regs)
 {
-        regs->dsisr = mfspr(SPRN_MMCRA);
+        unsigned long mmcra = mfspr(SPRN_MMCRA);
+        int marked = mmcra & MMCRA_SAMPLE_ENABLE;
+        int use_siar;
+        /*
+         * If this isn't a PMU exception (eg a software event) the SIAR is
+         * not valid. Use pt_regs.
+         *
+         * If it is a marked event use the SIAR.
+         *
+         * If the PMU doesn't update the SIAR for non marked events use
+         * pt_regs.
+         *
+         * If the PMU has HV/PR flags then check to see if they
+         * place the exception in userspace. If so, use pt_regs. In
+         * continuous sampling mode the SIAR and the PMU exception are
+         * not synchronised, so they may be many instructions apart.
+         * This can result in confusing backtraces. We still want
+         * hypervisor samples as well as samples in the kernel with
+         * interrupts off hence the userspace check.
+         */
+        if (TRAP(regs) != 0xf00)
+                use_siar = 0;
+        else if (marked)
+                use_siar = 1;
+        else if ((ppmu->flags & PPMU_NO_CONT_SAMPLING))
+                use_siar = 0;
+        else if (!(ppmu->flags & PPMU_NO_SIPR) && mmcra_sipr(mmcra))
+                use_siar = 0;
+        else
+                use_siar = 1;
+        regs->dsisr = mmcra;
+        regs->result = use_siar;
 }
 /*
@@ -1329,18 +1372,12 @@ unsigned long perf_misc_flags(struct pt_regs *regs)
 */
 unsigned long perf_instruction_pointer(struct pt_regs *regs)
 {
-        unsigned long mmcra = regs->dsisr;
+        unsigned long use_siar = regs->result;
-        /* Not a PMU interrupt */
+        if (use_siar)
-        if (TRAP(regs) != 0xf00)
+                return mfspr(SPRN_SIAR) + perf_ip_adjust(regs);
-                return regs->nip;
+        else
-        /* Processor doesn't support sampling non marked events */
-        if ((ppmu->flags & PPMU_NO_CONT_SAMPLING) &&
-            !(mmcra & MMCRA_SAMPLE_ENABLE))
                return regs->nip;
-        return mfspr(SPRN_SIAR) + perf_ip_adjust(regs);
 }
 static bool pmc_overflow(unsigned long val)
diff --git a/arch/powerpc/platforms/44x/currituck.c b/arch/powerpc/platforms/44x/currituck.c
index 583e67fee37e..9f6c33d63a42 100644
--- a/arch/powerpc/platforms/44x/currituck.c
+++ b/arch/powerpc/platforms/44x/currituck.c
@@ -160,7 +160,7 @@ static void __init ppc47x_setup_arch(void)
        /* No need to check the DMA config as we /know/ our windows are all of
         * RAM.  Lets hope that doesn't change */
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > 0xffffffff) {
+        if ((memblock_end_of_DRAM() - 1) > 0xffffffff) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/82xx/km82xx.c b/arch/powerpc/platforms/82xx/km82xx.c
index 3661bcdc326a..cf964e19573a 100644
--- a/arch/powerpc/platforms/82xx/km82xx.c
+++ b/arch/powerpc/platforms/82xx/km82xx.c
@@ -128,6 +128,11 @@ static __initdata struct cpm_pin km82xx_pins[] = {
        {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
        {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
        {3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
+        /* SPI */
+        {3, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MISO PD16 */
+        {3, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_MOSI PD17 */
+        {3, 18, CPM_PIN_INPUT | CPM_PIN_SECONDARY},/* SPI_CLK PD18 */
 };
 static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/83xx/km83xx.c b/arch/powerpc/platforms/83xx/km83xx.c
index a266ba876863..89923d723349 100644
--- a/arch/powerpc/platforms/83xx/km83xx.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -3,7 +3,7 @@
 * Author: Heiko Schocher <hs@denx.de>
 *
 * Description:
- * Keymile KMETER1 board specific routines.
+ * Keymile 83xx platform specific routines.
 *
 * This program is free software; you can redistribute it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -70,54 +70,88 @@ static void __init mpc83xx_km_setup_arch(void)
                for_each_node_by_name(np, "spi")
                        par_io_of_config(np);
-                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
+                for_each_node_by_name(np, "ucc")
                        par_io_of_config(np);
        }
        np = of_find_compatible_node(NULL, "network", "ucc_geth");
        if (np != NULL) {
-                uint svid;
+                /*
+                 * handle mpc8360E Erratum QE_ENET10:
+                 * RGMII AC values do not meet the specification
+                 */
+                uint svid = mfspr(SPRN_SVR);
+                struct  device_node *np_par;
+                struct  resource res;
+                void    __iomem *base;
+                int     ret;
+                np_par = of_find_node_by_name(NULL, "par_io");
+                if (np_par == NULL) {
+                        printk(KERN_WARNING "%s couldn;t find par_io node\n",
+                                __func__);
+                        return;
+                }
+                /* Map Parallel I/O ports registers */
+                ret = of_address_to_resource(np_par, 0, &res);
+                if (ret) {
+                        printk(KERN_WARNING "%s couldn;t map par_io registers\n",
+                                __func__);
+                        return;
+                }
+                base = ioremap(res.start, res.end - res.start + 1);
+                /*
+                 * set output delay adjustments to default values according
+                 * table 5 in Errata Rev. 5, 9/2011:
+                 *
+                 * write 0b01 to UCC1 bits 18:19
+                 * write 0b01 to UCC2 option 1 bits 4:5
+                 * write 0b01 to UCC2 option 2 bits 16:17
+                 */
+                clrsetbits_be32((base + 0xa8), 0x0c00f000, 0x04005000);
+                /*
+                 * set output delay adjustments to default values according
+                 * table 3-13 in Reference Manual Rev.3 05/2010:
+                 *
+                 * write 0b01 to UCC2 option 2 bits 16:17
+                 * write 0b0101 to UCC1 bits 20:23
+                 * write 0b0101 to UCC2 option 1 bits 24:27
+                 */
+                clrsetbits_be32((base + 0xac), 0x0000cff0, 0x00004550);
-                /* handle mpc8360ea rev.2.1 erratum 2: RGMII Timing */
-                svid = mfspr(SPRN_SVR);
                if (SVR_REV(svid) == 0x0021) {
-                        struct  device_node *np_par;
+                        /*
-                        struct  resource res;
+                         * UCC2 option 1: write 0b1010 to bits 24:27
-                        void    __iomem *base;
+                         * at address IMMRBAR+0x14AC
-                        int     ret;
+                         */
+                        clrsetbits_be32((base + 0xac), 0x000000f0, 0x000000a0);
-                        np_par = of_find_node_by_name(NULL, "par_io");
+                } else if (SVR_REV(svid) == 0x0020) {
-                        if (np_par == NULL) {
+                        /*
-                                printk(KERN_WARNING "%s couldn;t find par_io node\n",
+                         * UCC1: write 0b11 to bits 18:19
-                                        __func__);
+                         * at address IMMRBAR+0x14A8
-                                return;
+                         */
-                        }
+                        setbits32((base + 0xa8), 0x00003000);
-                        /* Map Parallel I/O ports registers */
-                        ret = of_address_to_resource(np_par, 0, &res);
-                        if (ret) {
-                                printk(KERN_WARNING "%s couldn;t map par_io registers\n",
-                                        __func__);
-                                return;
-                        }
-                        base = ioremap(res.start, resource_size(&res));
                        /*
-                         * IMMR + 0x14A8[4:5] = 11 (clk delay for UCC 2)
+                         * UCC2 option 1: write 0b11 to bits 4:5
-                         * IMMR + 0x14A8[18:19] = 11 (clk delay for UCC 1)
+                         * at address IMMRBAR+0x14A8
                         */
-                        setbits32((base + 0xa8), 0x0c003000);
+                        setbits32((base + 0xa8), 0x0c000000);
                        /*
-                         * IMMR + 0x14AC[20:27] = 10101010
+                         * UCC2 option 2: write 0b11 to bits 16:17
-                         * (data delay for both UCC's)
+                         * at address IMMRBAR+0x14AC
                         */
-                        clrsetbits_be32((base + 0xac), 0xff0, 0xaa0);
+                        setbits32((base + 0xac), 0x0000c000);
-                        iounmap(base);
-                        of_node_put(np_par);
                }
+                iounmap(base);
+                of_node_put(np_par);
                of_node_put(np);
        }
-#endif                          /* CONFIG_QUICC_ENGINE */
+#endif  /* CONFIG_QUICC_ENGINE */
 }
 machine_device_initcall(mpc83xx_km, mpc83xx_declare_of_platform_devices);
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index f000d81c4e31..159c01e91463 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -23,6 +23,15 @@ config FSL_85XX_CACHE_SRAM
          cache-sram-size and cache-sram-offset kernel boot
          parameters should be passed when this option is enabled.
+config BSC9131_RDB
+        bool "Freescale BSC9131RDB"
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for the Freescale BSC9131RDB board.
+          The BSC9131 is a heterogeneous SoC containing an e500v2 powerpc and a
+          StarCore SC3850 DSP
+          Manufacturer : Freescale Semiconductor, Inc
 config MPC8540_ADS
        bool "Freescale MPC8540 ADS"
        select DEFAULT_UIMAGE
@@ -175,12 +184,6 @@ config SBC8548
        help
          This option enables support for the Wind River SBC8548 board
-config SBC8560
-        bool "Wind River SBC8560"
-        select DEFAULT_UIMAGE
-        help
-          This option enables support for the Wind River SBC8560 board
 config GE_IMP3A
        bool "GE Intelligent Platforms IMP3A"
        select DEFAULT_UIMAGE
@@ -222,18 +225,6 @@ config P3041_DS
        help
          This option enables support for the P3041 DS board
-config P3060_QDS
-        bool "Freescale P3060 QDS"
-        select DEFAULT_UIMAGE
-        select PPC_E500MC
-        select PHYS_64BIT
-        select SWIOTLB
-        select GPIO_MPC8XXX
-        select HAS_RAPIDIO
-        select PPC_EPAPR_HV_PIC
-        help
-          This option enables support for the P3060 QDS board
 config P4080_DS
        bool "Freescale P4080 DS"
        select DEFAULT_UIMAGE
@@ -263,6 +254,22 @@ config P5020_DS
        help
          This option enables support for the P5020 DS board
+config PPC_QEMU_E500
+        bool "QEMU generic e500 platform"
+        depends on EXPERIMENTAL
+        select DEFAULT_UIMAGE
+        help
+          This option enables support for running as a QEMU guest using
+          QEMU's generic e500 machine.  This is not required if you're
+          using a QEMU machine that targets a specific board, such as
+          mpc8544ds.
+          Unlike most e500 boards that target a specific CPU, this
+          platform works with any e500-family CPU that QEMU supports.
+          Thus, you'll need to make sure CONFIG_PPC_E500MC is set or
+          unset based on the emulated CPU (or actual host CPU in the case
+          of KVM).
 endif # FSL_SOC_BOOKE
 config TQM85xx
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 2125d4ca068a..3dfe81175036 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -5,6 +5,7 @@ obj-$(CONFIG_SMP) += smp.o
 obj-y += common.o
+obj-$(CONFIG_BSC9131_RDB) += bsc913x_rdb.o
 obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
 obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
@@ -17,14 +18,13 @@ obj-$(CONFIG_P1022_DS)    += p1022_ds.o
 obj-$(CONFIG_P1023_RDS)   += p1023_rds.o
 obj-$(CONFIG_P2041_RDB)   += p2041_rdb.o corenet_ds.o
 obj-$(CONFIG_P3041_DS)    += p3041_ds.o corenet_ds.o
-obj-$(CONFIG_P3060_QDS)   += p3060_qds.o corenet_ds.o
 obj-$(CONFIG_P4080_DS)    += p4080_ds.o corenet_ds.o
 obj-$(CONFIG_P5020_DS)    += p5020_ds.o corenet_ds.o
 obj-$(CONFIG_STX_GP3)     += stx_gp3.o
 obj-$(CONFIG_TQM85xx)     += tqm85xx.o
-obj-$(CONFIG_SBC8560)     += sbc8560.o
 obj-$(CONFIG_SBC8548)     += sbc8548.o
 obj-$(CONFIG_SOCRATES)    += socrates.o socrates_fpga_pic.o
 obj-$(CONFIG_KSI8560)     += ksi8560.o
 obj-$(CONFIG_XES_MPC85xx) += xes_mpc85xx.o
 obj-$(CONFIG_GE_IMP3A)    += ge_imp3a.o
+obj-$(CONFIG_PPC_QEMU_E500) += qemu_e500.o
diff --git a/arch/powerpc/platforms/85xx/bsc913x_rdb.c b/arch/powerpc/platforms/85xx/bsc913x_rdb.c
new file mode 100644
index 000000000000..9d57bedb940c
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/bsc913x_rdb.c
@@ -0,0 +1,67 @@
+/*
+ * BSC913xRDB Board Setup
+ *
+ * Author: Priyanka Jain <Priyanka.Jain@freescale.com>
+ *
+ * Copyright 2011-2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/of_platform.h>
+#include <linux/pci.h>
+#include <asm/mpic.h>
+#include <sysdev/fsl_soc.h>
+#include <asm/udbg.h>
+#include "mpc85xx.h"
+void __init bsc913x_rdb_pic_init(void)
+{
+        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN |
+          MPIC_SINGLE_DEST_CPU,
+          0, 256, " OpenPIC  ");
+        if (!mpic)
+                pr_err("bsc913x: Failed to allocate MPIC structure\n");
+        else
+                mpic_init(mpic);
+}
+/*
+ * Setup the architecture
+ */
+static void __init bsc913x_rdb_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("bsc913x_rdb_setup_arch()", 0);
+        pr_info("bsc913x board from Freescale Semiconductor\n");
+}
+machine_device_initcall(bsc9131_rdb, mpc85xx_common_publish_devices);
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init bsc9131_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "fsl,bsc9131rdb");
+}
+define_machine(bsc9131_rdb) {
+        .name                   = "BSC9131 RDB",
+        .probe                  = bsc9131_rdb_probe,
+        .setup_arch             = bsc913x_rdb_setup_arch,
+        .init_IRQ               = bsc913x_rdb_pic_init,
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/corenet_ds.c b/arch/powerpc/platforms/85xx/corenet_ds.c
index dd3617c531d7..925b02874233 100644
--- a/arch/powerpc/platforms/85xx/corenet_ds.c
+++ b/arch/powerpc/platforms/85xx/corenet_ds.c
@@ -77,7 +77,7 @@ void __init corenet_ds_setup_arch(void)
 #endif
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/85xx/ge_imp3a.c b/arch/powerpc/platforms/85xx/ge_imp3a.c
index 18014629416d..b6a728b0a8ca 100644
--- a/arch/powerpc/platforms/85xx/ge_imp3a.c
+++ b/arch/powerpc/platforms/85xx/ge_imp3a.c
@@ -125,7 +125,7 @@ static void __init ge_imp3a_setup_arch(void)
        mpc85xx_smp_init();
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
index 585bd22b1406..767c7cf18a9c 100644
--- a/arch/powerpc/platforms/85xx/mpc8536_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -75,7 +75,7 @@ static void __init mpc8536_ds_setup_arch(void)
 #endif
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 1fd91e9e0ffb..6d3265fe7718 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -114,71 +114,53 @@ void __init mpc85xx_ds_pic_init(void)
 }
 #ifdef CONFIG_PCI
-static int primary_phb_addr;
 extern int uli_exclude_device(struct pci_controller *hose,
                                u_char bus, u_char devfn);
+static struct device_node *pci_with_uli;
 static int mpc85xx_exclude_device(struct pci_controller *hose,
                                   u_char bus, u_char devfn)
 {
-        struct device_node* node;
+        if (hose->dn == pci_with_uli)
-        struct resource rsrc;
-        node = hose->dn;
-        of_address_to_resource(node, 0, &rsrc);
-        if ((rsrc.start & 0xfffff) == primary_phb_addr) {
                return uli_exclude_device(hose, bus, devfn);
-        }
        return PCIBIOS_SUCCESSFUL;
 }
 #endif  /* CONFIG_PCI */
-/*
+static void __init mpc85xx_ds_pci_init(void)
- * Setup the architecture
- */
-static void __init mpc85xx_ds_setup_arch(void)
 {
 #ifdef CONFIG_PCI
-        struct device_node *np;
+        struct device_node *node;
-        struct pci_controller *hose;
-#endif
-        dma_addr_t max = 0xffffffff;
-        if (ppc_md.progress)
+        fsl_pci_init();
-                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
-#ifdef CONFIG_PCI
+        /* See if we have a ULI under the primary */
-        for_each_node_by_type(np, "pci") {
-                if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
+        node = of_find_node_by_name(NULL, "uli1575");
-                    of_device_is_compatible(np, "fsl,mpc8548-pcie") ||
+        while ((pci_with_uli = of_get_parent(node))) {
-                    of_device_is_compatible(np, "fsl,p2020-pcie")) {
+                of_node_put(node);
-                        struct resource rsrc;
+                node = pci_with_uli;
-                        of_address_to_resource(np, 0, &rsrc);
-                        if ((rsrc.start & 0xfffff) == primary_phb_addr)
+                if (pci_with_uli == fsl_pci_primary) {
-                                fsl_add_bridge(np, 1);
+                        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
-                        else
+                        break;
-                                fsl_add_bridge(np, 0);
-                        hose = pci_find_hose_for_OF_device(np);
-                        max = min(max, hose->dma_window_base_cur +
-                                        hose->dma_window_size);
                }
        }
-        ppc_md.pci_exclude_device = mpc85xx_exclude_device;
 #endif
+}
-        mpc85xx_smp_init();
+/*
+ * Setup the architecture
+ */
+static void __init mpc85xx_ds_setup_arch(void)
+{
+        if (ppc_md.progress)
+                ppc_md.progress("mpc85xx_ds_setup_arch()", 0);
-#ifdef CONFIG_SWIOTLB
+        mpc85xx_ds_pci_init();
-        if (memblock_end_of_DRAM() > max) {
+        mpc85xx_smp_init();
-                ppc_swiotlb_enable = 1;
-                set_pci_dma_ops(&swiotlb_dma_ops);
-                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
-        }
-#endif
        printk("MPC85xx DS board from Freescale Semiconductor\n");
 }
@@ -190,14 +172,7 @@ static int __init mpc8544_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
-        if (of_flat_dt_is_compatible(root, "MPC8544DS")) {
+        return !!of_flat_dt_is_compatible(root, "MPC8544DS");
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0xb000;
-#endif
-                return 1;
-        }
-        return 0;
 }
 machine_device_initcall(mpc8544_ds, mpc85xx_common_publish_devices);
@@ -215,14 +190,7 @@ static int __init mpc8572_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
-        if (of_flat_dt_is_compatible(root, "fsl,MPC8572DS")) {
+        return !!of_flat_dt_is_compatible(root, "fsl,MPC8572DS");
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0x8000;
-#endif
-                return 1;
-        }
-        return 0;
 }
 /*
@@ -232,14 +200,7 @@ static int __init p2020_ds_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
-        if (of_flat_dt_is_compatible(root, "fsl,P2020DS")) {
+        return !!of_flat_dt_is_compatible(root, "fsl,P2020DS");
-#ifdef CONFIG_PCI
-                primary_phb_addr = 0x9000;
-#endif
-                return 1;
-        }
-        return 0;
 }
 define_machine(mpc8544_ds) {
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index d208ebccb91c..8e4b094c553b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -359,7 +359,7 @@ static void __init mpc85xx_mds_setup_arch(void)
        mpc85xx_mds_qe_init();
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
index 313fce4f5574..1910fdcb75b2 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_rdb.c
@@ -169,6 +169,7 @@ machine_device_initcall(p1020_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1020_utm_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1021_rdb_pc, mpc85xx_common_publish_devices);
 machine_device_initcall(p1025_rdb, mpc85xx_common_publish_devices);
+machine_device_initcall(p1024_rdb, mpc85xx_common_publish_devices);
 /*
 * Called very early, device-tree isn't unflattened
@@ -237,6 +238,13 @@ static int __init p1020_utm_pc_probe(void)
        return of_flat_dt_is_compatible(root, "fsl,P1020UTM-PC");
 }
+static int __init p1024_rdb_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "fsl,P1024RDB");
+}
 define_machine(p2020_rdb) {
        .name                   = "P2020 RDB",
        .probe                  = p2020_rdb_probe,
@@ -348,3 +356,17 @@ define_machine(p1020_rdb_pc) {
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
 };
+define_machine(p1024_rdb) {
+        .name                   = "P1024 RDB",
+        .probe                  = p1024_rdb_probe,
+        .setup_arch             = mpc85xx_rdb_setup_arch,
+        .init_IRQ               = mpc85xx_rdb_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index f700c81a1321..89ee02c54561 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -27,6 +27,7 @@
 #include <sysdev/fsl_pci.h>
 #include <asm/udbg.h>
 #include <asm/fsl_guts.h>
+#include <asm/fsl_lbc.h>
 #include "smp.h"
 #include "mpc85xx.h"
@@ -142,17 +143,73 @@ static void p1022ds_set_gamma_table(enum fsl_diu_monitor_port port,
 {
 }
+struct fsl_law {
+        u32     lawbar;
+        u32     reserved1;
+        u32     lawar;
+        u32     reserved[5];
+};
+#define LAWBAR_MASK     0x00F00000
+#define LAWBAR_SHIFT    12
+#define LAWAR_EN        0x80000000
+#define LAWAR_TGT_MASK  0x01F00000
+#define LAW_TRGT_IF_LBC (0x04 << 20)
+#define LAWAR_MASK      (LAWAR_EN | LAWAR_TGT_MASK)
+#define LAWAR_MATCH     (LAWAR_EN | LAW_TRGT_IF_LBC)
+#define BR_BA           0xFFFF8000
+/*
+ * Map a BRx value to a physical address
+ *
+ * The localbus BRx registers only store the lower 32 bits of the address.  To
+ * obtain the upper four bits, we need to scan the LAW table.  The entry which
+ * maps to the localbus will contain the upper four bits.
+ */
+static phys_addr_t lbc_br_to_phys(const void *ecm, unsigned int count, u32 br)
+{
+#ifndef CONFIG_PHYS_64BIT
+        /*
+         * If we only have 32-bit addressing, then the BRx address *is* the
+         * physical address.
+         */
+        return br & BR_BA;
+#else
+        const struct fsl_law *law = ecm + 0xc08;
+        unsigned int i;
+        for (i = 0; i < count; i++) {
+                u64 lawbar = in_be32(&law[i].lawbar);
+                u32 lawar = in_be32(&law[i].lawar);
+                if ((lawar & LAWAR_MASK) == LAWAR_MATCH)
+                        /* Extract the upper four bits */
+                        return (br & BR_BA) | ((lawbar & LAWBAR_MASK) << 12);
+        }
+        return 0;
+#endif
+}
 /**
 * p1022ds_set_monitor_port: switch the output to a different monitor port
- *
 */
 static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
 {
        struct device_node *guts_node;
-        struct device_node *indirect_node = NULL;
+        struct device_node *lbc_node = NULL;
+        struct device_node *law_node = NULL;
        struct ccsr_guts __iomem *guts;
+        struct fsl_lbc_regs *lbc = NULL;
+        void *ecm = NULL;
        u8 __iomem *lbc_lcs0_ba = NULL;
        u8 __iomem *lbc_lcs1_ba = NULL;
+        phys_addr_t cs0_addr, cs1_addr;
+        const __be32 *iprop;
+        unsigned int num_laws;
        u8 b;
        /* Map the global utilities registers. */
@@ -168,24 +225,42 @@ static void p1022ds_set_monitor_port(enum fsl_diu_monitor_port port)
                goto exit;
        }
-        indirect_node = of_find_compatible_node(NULL, NULL,
+        lbc_node = of_find_compatible_node(NULL, NULL, "fsl,p1022-elbc");
-                                             "fsl,p1022ds-indirect-pixis");
+        if (!lbc_node) {
-        if (!indirect_node) {
+                pr_err("p1022ds: missing localbus node\n");
-                pr_err("p1022ds: missing pixis indirect mode node\n");
+                goto exit;
+        }
+        lbc = of_iomap(lbc_node, 0);
+        if (!lbc) {
+                pr_err("p1022ds: could not map localbus node\n");
+                goto exit;
+        }
+        law_node = of_find_compatible_node(NULL, NULL, "fsl,ecm-law");
+        if (!law_node) {
+                pr_err("p1022ds: missing local access window node\n");
                goto exit;
        }
-        lbc_lcs0_ba = of_iomap(indirect_node, 0);
+        ecm = of_iomap(law_node, 0);
-        if (!lbc_lcs0_ba) {
+        if (!ecm) {
-                pr_err("p1022ds: could not map localbus chip select 0\n");
+                pr_err("p1022ds: could not map local access window node\n");
                goto exit;
        }
-        lbc_lcs1_ba = of_iomap(indirect_node, 1);
+        iprop = of_get_property(law_node, "fsl,num-laws", 0);
-        if (!lbc_lcs1_ba) {
+        if (!iprop) {
-                pr_err("p1022ds: could not map localbus chip select 1\n");
+                pr_err("p1022ds: LAW node is missing fsl,num-laws property\n");
                goto exit;
        }
+        num_laws = be32_to_cpup(iprop);
+        cs0_addr = lbc_br_to_phys(ecm, num_laws, in_be32(&lbc->bank[0].br));
+        cs1_addr = lbc_br_to_phys(ecm, num_laws, in_be32(&lbc->bank[1].br));
+        lbc_lcs0_ba = ioremap(cs0_addr, 1);
+        lbc_lcs1_ba = ioremap(cs1_addr, 1);
        /* Make sure we're in indirect mode first. */
        if ((in_be32(&guts->pmuxcr) & PMUXCR_ELBCDIU_MASK) !=
@@ -254,10 +329,15 @@ exit:
                iounmap(lbc_lcs1_ba);
        if (lbc_lcs0_ba)
                iounmap(lbc_lcs0_ba);
+        if (lbc)
+                iounmap(lbc);
+        if (ecm)
+                iounmap(ecm);
        if (guts)
                iounmap(guts);
-        of_node_put(indirect_node);
+        of_node_put(law_node);
+        of_node_put(lbc_node);
        of_node_put(guts_node);
 }
@@ -348,13 +428,7 @@ void __init p1022_ds_pic_init(void)
 */
 static void __init disable_one_node(struct device_node *np, struct property *new)
 {
-        struct property *old;
+        prom_update_property(np, new);
-        old = of_find_property(np, new->name, NULL);
-        if (old)
-                prom_update_property(np, new, old);
-        else
-                prom_add_property(np, new);
 }
 /* TRUE if there is a "video=fslfb" command-line parameter. */
@@ -450,7 +524,7 @@ static void __init p1022_ds_setup_arch(void)
        mpc85xx_smp_init();
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/85xx/p3060_qds.c b/arch/powerpc/platforms/85xx/p3060_qds.c
deleted file mode 100644
index 081cf4ac1881..000000000000
--- a/arch/powerpc/platforms/85xx/p3060_qds.c
+++ /dev/null
@@ -1,77 +0,0 @@
-/*
- * P3060 QDS Setup
- *
- * Copyright 2011 Freescale Semiconductor Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#include <linux/kernel.h>
-#include <linux/interrupt.h>
-#include <linux/phy.h>
-#include <asm/machdep.h>
-#include <asm/udbg.h>
-#include <asm/mpic.h>
-#include <linux/of_platform.h>
-#include <sysdev/fsl_soc.h>
-#include <sysdev/fsl_pci.h>
-#include <asm/ehv_pic.h>
-#include "corenet_ds.h"
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init p3060_qds_probe(void)
-{
-        unsigned long root = of_get_flat_dt_root();
-#ifdef CONFIG_SMP
-        extern struct smp_ops_t smp_85xx_ops;
-#endif
-        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS"))
-                return 1;
-        /* Check if we're running under the Freescale hypervisor */
-        if (of_flat_dt_is_compatible(root, "fsl,P3060QDS-hv")) {
-                ppc_md.init_IRQ = ehv_pic_init;
-                ppc_md.get_irq = ehv_pic_get_irq;
-                ppc_md.restart = fsl_hv_restart;
-                ppc_md.power_off = fsl_hv_halt;
-                ppc_md.halt = fsl_hv_halt;
-#ifdef CONFIG_SMP
-                /*
-                 * Disable the timebase sync operations because we can't write
-                 * to the timebase registers under the hypervisor.
-                 */
-                smp_85xx_ops.give_timebase = NULL;
-                smp_85xx_ops.take_timebase = NULL;
-#endif
-                return 1;
-        }
-        return 0;
-}
-define_machine(p3060_qds) {
-        .name                   = "P3060 QDS",
-        .probe                  = p3060_qds_probe,
-        .setup_arch             = corenet_ds_setup_arch,
-        .init_IRQ               = corenet_ds_pic_init,
-#ifdef CONFIG_PCI
-        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
-#endif
-        .get_irq                = mpic_get_coreint_irq,
-        .restart                = fsl_rstcr_restart,
-        .calibrate_decr         = generic_calibrate_decr,
-        .progress               = udbg_progress,
-        .power_save             = e500_idle,
-};
-machine_device_initcall(p3060_qds, corenet_ds_publish_devices);
-#ifdef CONFIG_SWIOTLB
-machine_arch_initcall(p3060_qds, swiotlb_setup_bus_notifier);
-#endif
diff --git a/arch/powerpc/platforms/85xx/qemu_e500.c b/arch/powerpc/platforms/85xx/qemu_e500.c
new file mode 100644
index 000000000000..95a2e53af71b
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/qemu_e500.c
@@ -0,0 +1,72 @@
+/*
+ * Paravirt target for a generic QEMU e500 machine
+ *
+ * This is intended to be a flexible device-tree-driven platform, not fixed
+ * to a particular piece of hardware or a particular spec of virtual hardware,
+ * beyond the assumption of an e500-family CPU.  Some things are still hardcoded
+ * here, such as MPIC, but this is a limitation of the current code rather than
+ * an interface contract with QEMU.
+ *
+ * Copyright 2012 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/of_fdt.h>
+#include <asm/machdep.h>
+#include <asm/time.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "smp.h"
+#include "mpc85xx.h"
+void __init qemu_e500_pic_init(void)
+{
+        struct mpic *mpic;
+        mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN | MPIC_SINGLE_DEST_CPU,
+                        0, 256, " OpenPIC  ");
+        BUG_ON(mpic == NULL);
+        mpic_init(mpic);
+}
+static void __init qemu_e500_setup_arch(void)
+{
+        ppc_md.progress("qemu_e500_setup_arch()", 0);
+        fsl_pci_init();
+        mpc85xx_smp_init();
+}
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init qemu_e500_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return !!of_flat_dt_is_compatible(root, "fsl,qemu-e500");
+}
+machine_device_initcall(qemu_e500, mpc85xx_common_publish_devices);
+define_machine(qemu_e500) {
+        .name                   = "QEMU e500",
+        .probe                  = qemu_e500_probe,
+        .setup_arch             = qemu_e500_setup_arch,
+        .init_IRQ               = qemu_e500_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
deleted file mode 100644
index b1be632ede43..000000000000
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ /dev/null
@@ -1,254 +0,0 @@
-/*
- * Wind River SBC8560 setup and early boot code.
- *
- * Copyright 2007 Wind River Systems Inc.
- *
- * By Paul Gortmaker (see MAINTAINERS for contact information)
- *
- * Based largely on the MPC8560ADS support - Copyright 2005 Freescale Inc.
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-#include <linux/stddef.h>
-#include <linux/kernel.h>
-#include <linux/pci.h>
-#include <linux/kdev_t.h>
-#include <linux/delay.h>
-#include <linux/seq_file.h>
-#include <linux/of_platform.h>
-#include <asm/time.h>
-#include <asm/machdep.h>
-#include <asm/pci-bridge.h>
-#include <asm/mpic.h>
-#include <mm/mmu_decl.h>
-#include <asm/udbg.h>
-#include <sysdev/fsl_soc.h>
-#include <sysdev/fsl_pci.h>
-#include "mpc85xx.h"
-#ifdef CONFIG_CPM2
-#include <asm/cpm2.h>
-#include <sysdev/cpm2_pic.h>
-#endif
-static void __init sbc8560_pic_init(void)
-{
-        struct mpic *mpic = mpic_alloc(NULL, 0, MPIC_BIG_ENDIAN,
-                        0, 256, " OpenPIC  ");
-        BUG_ON(mpic == NULL);
-        mpic_init(mpic);
-        mpc85xx_cpm2_pic_init();
-}
-/*
- * Setup the architecture
- */
-#ifdef CONFIG_CPM2
-struct cpm_pin {
-        int port, pin, flags;
-};
-static const struct cpm_pin sbc8560_pins[] = {
-        /* SCC1 */
-        {3, 29, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
-        {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        /* SCC2 */
-        {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        /* FCC2 */
-        {1, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 20, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 22, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 25, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 26, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 27, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 29, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
-        {1, 30, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {2, 18, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK14 */
-        {2, 19, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK13 */
-        /* FCC3 */
-        {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 11, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 14, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
-        {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
-        {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */
-        {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */
-};
-static void __init init_ioports(void)
-{
-        int i;
-        for (i = 0; i < ARRAY_SIZE(sbc8560_pins); i++) {
-                const struct cpm_pin *pin = &sbc8560_pins[i];
-                cpm2_set_pin(pin->port, pin->pin, pin->flags);
-        }
-        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_SCC1, CPM_BRG1, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_SCC2, CPM_BRG2, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
-        cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK15, CPM_CLK_RX);
-        cpm2_clk_setup(CPM_CLK_FCC3, CPM_CLK16, CPM_CLK_TX);
-}
-#endif
-static void __init sbc8560_setup_arch(void)
-{
-#ifdef CONFIG_PCI
-        struct device_node *np;
-#endif
-        if (ppc_md.progress)
-                ppc_md.progress("sbc8560_setup_arch()", 0);
-#ifdef CONFIG_CPM2
-        cpm2_reset();
-        init_ioports();
-#endif
-#ifdef CONFIG_PCI
-        for_each_compatible_node(np, "pci", "fsl,mpc8540-pci")
-                fsl_add_bridge(np, 1);
-#endif
-}
-static void sbc8560_show_cpuinfo(struct seq_file *m)
-{
-        uint pvid, svid, phid1;
-        pvid = mfspr(SPRN_PVR);
-        svid = mfspr(SPRN_SVR);
-        seq_printf(m, "Vendor\t\t: Wind River\n");
-        seq_printf(m, "PVR\t\t: 0x%x\n", pvid);
-        seq_printf(m, "SVR\t\t: 0x%x\n", svid);
-        /* Display cpu Pll setting */
-        phid1 = mfspr(SPRN_HID1);
-        seq_printf(m, "PLL setting\t: 0x%x\n", ((phid1 >> 24) & 0x3f));
-}
-machine_device_initcall(sbc8560, mpc85xx_common_publish_devices);
-/*
- * Called very early, device-tree isn't unflattened
- */
-static int __init sbc8560_probe(void)
-{
-        unsigned long root = of_get_flat_dt_root();
-        return of_flat_dt_is_compatible(root, "SBC8560");
-}
-#ifdef CONFIG_RTC_DRV_M48T59
-static int __init sbc8560_rtc_init(void)
-{
-        struct device_node *np;
-        struct resource res;
-        struct platform_device *rtc_dev;
-        np = of_find_compatible_node(NULL, NULL, "m48t59");
-        if (np == NULL) {
-                printk("No RTC in DTB. Has it been eaten by wild dogs?\n");
-                return -ENODEV;
-        }
-        of_address_to_resource(np, 0, &res);
-        of_node_put(np);
-        printk("Found RTC (m48t59) at i/o 0x%x\n", res.start);
-        rtc_dev = platform_device_register_simple("rtc-m48t59", 0, &res, 1);
-        if (IS_ERR(rtc_dev)) {
-                printk("Registering sbc8560 RTC device failed\n");
-                return PTR_ERR(rtc_dev);
-        }
-        return 0;
-}
-arch_initcall(sbc8560_rtc_init);
-#endif  /* M48T59 */
-static __u8 __iomem *brstcr;
-static int __init sbc8560_bdrstcr_init(void)
-{
-        struct device_node *np;
-        struct resource res;
-        np = of_find_compatible_node(NULL, NULL, "wrs,sbc8560-brstcr");
-        if (np == NULL) {
-                printk(KERN_WARNING "sbc8560: No board specific RSTCR in DTB.\n");
-                return -ENODEV;
-        }
-        of_address_to_resource(np, 0, &res);
-        printk(KERN_INFO "sbc8560: Found BRSTCR at %pR\n", &res);
-        brstcr = ioremap(res.start, resource_size(&res));
-        if(!brstcr)
-                printk(KERN_WARNING "sbc8560: ioremap of brstcr failed.\n");
-        of_node_put(np);
-        return 0;
-}
-arch_initcall(sbc8560_bdrstcr_init);
-void sbc8560_rstcr_restart(char * cmd)
-{
-        local_irq_disable();
-        if(brstcr)
-                clrbits8(brstcr, 0x80);
-        while(1);
-}
-define_machine(sbc8560) {
-        .name                   = "SBC8560",
-        .probe                  = sbc8560_probe,
-        .setup_arch             = sbc8560_setup_arch,
-        .init_IRQ               = sbc8560_pic_init,
-        .show_cpuinfo           = sbc8560_show_cpuinfo,
-        .get_irq                = mpic_get_irq,
-        .restart                = sbc8560_rstcr_restart,
-        .calibrate_decr         = generic_calibrate_decr,
-        .progress               = udbg_progress,
-};
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index 3755e61d7ecf..817245bc0219 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -102,7 +102,7 @@ mpc86xx_hpcn_setup_arch(void)
 #endif
 #ifdef CONFIG_SWIOTLB
-        if (memblock_end_of_DRAM() > max) {
+        if ((memblock_end_of_DRAM() - 1) > max) {
                ppc_swiotlb_enable = 1;
                set_pci_dma_ops(&swiotlb_dma_ops);
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index 61c9550819a2..30fd01de6bed 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -159,6 +159,10 @@ config PPC_E500MC
        bool "e500mc Support"
        select PPC_FPU
        depends on E500
+        help
+          This must be enabled for running on e500mc (and derivatives
+          such as e5500/e6500), and must be disabled for running on
+          e500v1 or e500v2.
 config PPC_FPU
        bool
diff --git a/arch/powerpc/platforms/cell/beat_hvCall.S b/arch/powerpc/platforms/cell/beat_hvCall.S
index 74c817448948..96c801907126 100644
--- a/arch/powerpc/platforms/cell/beat_hvCall.S
+++ b/arch/powerpc/platforms/cell/beat_hvCall.S
@@ -22,8 +22,6 @@
 #include <asm/ppc_asm.h>
-#define STK_PARM(i)     (48 + ((i)-3)*8)
 /* Not implemented on Beat, now */
 #define HCALL_INST_PRECALL
 #define HCALL_INST_POSTCALL
@@ -74,7 +72,7 @@ _GLOBAL(beat_hcall_norets8)
        mr      r6,r7
        mr      r7,r8
        mr      r8,r9
-        ld      r10,STK_PARM(r10)(r1)
+        ld      r10,STK_PARAM(R10)(r1)
        HVSC                            /* invoke the hypervisor */
@@ -94,7 +92,7 @@ _GLOBAL(beat_hcall1)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -108,7 +106,7 @@ _GLOBAL(beat_hcall1)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        lwz     r0,8(r1)
@@ -125,7 +123,7 @@ _GLOBAL(beat_hcall2)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -139,7 +137,7 @@ _GLOBAL(beat_hcall2)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
@@ -157,7 +155,7 @@ _GLOBAL(beat_hcall3)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -171,7 +169,7 @@ _GLOBAL(beat_hcall3)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -190,7 +188,7 @@ _GLOBAL(beat_hcall4)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -204,7 +202,7 @@ _GLOBAL(beat_hcall4)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -224,7 +222,7 @@ _GLOBAL(beat_hcall5)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -238,7 +236,7 @@ _GLOBAL(beat_hcall5)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -259,7 +257,7 @@ _GLOBAL(beat_hcall6)
        HCALL_INST_PRECALL
-        std     r4,STK_PARM(r4)(r1)     /* save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)    /* save ret buffer */
        mr      r11,r3
        mr      r3,r5
@@ -273,7 +271,7 @@ _GLOBAL(beat_hcall6)
        HCALL_INST_POSTCALL
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index b9f509a34c01..c264969c9319 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -518,7 +518,6 @@ cell_iommu_setup_window(struct cbe_iommu *iommu, struct device_node *np,
        __set_bit(0, window->table.it_map);
        tce_build_cell(&window->table, window->table.it_offset, 1,
                       (unsigned long)iommu->pad_page, DMA_TO_DEVICE, NULL);
-        window->table.it_hint = window->table.it_blocksize;
        return window;
 }
diff --git a/arch/powerpc/platforms/cell/pervasive.c b/arch/powerpc/platforms/cell/pervasive.c
index efdacc829576..d17e98bc0c10 100644
--- a/arch/powerpc/platforms/cell/pervasive.c
+++ b/arch/powerpc/platforms/cell/pervasive.c
@@ -42,11 +42,9 @@ static void cbe_power_save(void)
 {
        unsigned long ctrl, thread_switch_control;
-        /*
+        /* Ensure our interrupt state is properly tracked */
-         * We need to hard disable interrupts, the local_irq_enable() done by
+        if (!prep_irq_for_idle())
-         * our caller upon return will hard re-enable.
+                return;
-         */
-        hard_irq_disable();
        ctrl = mfspr(SPRN_CTRLF);
@@ -81,6 +79,9 @@ static void cbe_power_save(void)
         */
        ctrl &= ~(CTRL_RUNLATCH | CTRL_TE);
        mtspr(SPRN_CTRLT, ctrl);
+        /* Re-enable interrupts in MSR */
+        __hard_irq_enable();
 }
 static int cbe_system_reset_exception(struct pt_regs *regs)
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 66519d263da7..d544d7816df3 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -317,28 +317,23 @@ out:
        return ret;
 }
-static int spufs_context_open(struct dentry *dentry, struct vfsmount *mnt)
+static int spufs_context_open(struct path *path)
 {
        int ret;
        struct file *filp;
        ret = get_unused_fd();
-        if (ret < 0) {
+        if (ret < 0)
-                dput(dentry);
+                return ret;
-                mntput(mnt);
-                goto out;
-        }
-        filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
+        filp = dentry_open(path, O_RDONLY, current_cred());
        if (IS_ERR(filp)) {
                put_unused_fd(ret);
-                ret = PTR_ERR(filp);
+                return PTR_ERR(filp);
-                goto out;
        }
        filp->f_op = &spufs_context_fops;
        fd_install(ret, filp);
-out:
        return ret;
 }
@@ -453,6 +448,7 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
        int affinity;
        struct spu_gang *gang;
        struct spu_context *neighbor;
+        struct path path = {.mnt = mnt, .dentry = dentry};
        ret = -EPERM;
        if ((flags & SPU_CREATE_NOSCHED) &&
@@ -495,11 +491,7 @@ spufs_create_context(struct inode *inode, struct dentry *dentry,
                        put_spu_context(neighbor);
        }
-        /*
+        ret = spufs_context_open(&path);
-         * get references for dget and mntget, will be released
-         * in error path of *_open().
-         */
-        ret = spufs_context_open(dget(dentry), mntget(mnt));
        if (ret < 0) {
                WARN_ON(spufs_rmdir(inode, dentry));
                if (affinity)
@@ -556,28 +548,27 @@ out:
        return ret;
 }
-static int spufs_gang_open(struct dentry *dentry, struct vfsmount *mnt)
+static int spufs_gang_open(struct path *path)
 {
        int ret;
        struct file *filp;
        ret = get_unused_fd();
-        if (ret < 0) {
+        if (ret < 0)
-                dput(dentry);
+                return ret;
-                mntput(mnt);
-                goto out;
-        }
-        filp = dentry_open(dentry, mnt, O_RDONLY, current_cred());
+        /*
+         * get references for dget and mntget, will be released
+         * in error path of *_open().
+         */
+        filp = dentry_open(path, O_RDONLY, current_cred());
        if (IS_ERR(filp)) {
                put_unused_fd(ret);
-                ret = PTR_ERR(filp);
+                return PTR_ERR(filp);
-                goto out;
        }
        filp->f_op = &simple_dir_operations;
        fd_install(ret, filp);
-out:
        return ret;
 }
@@ -585,17 +576,14 @@ static int spufs_create_gang(struct inode *inode,
                        struct dentry *dentry,
                        struct vfsmount *mnt, umode_t mode)
 {
+        struct path path = {.mnt = mnt, .dentry = dentry};
        int ret;
        ret = spufs_mkgang(inode, dentry, mode & S_IRWXUGO);
        if (ret)
                goto out;
-        /*
+        ret = spufs_gang_open(&path);
-         * get references for dget and mntget, will be released
-         * in error path of *_open().
-         */
-        ret = spufs_gang_open(dget(dentry), mntget(mnt));
        if (ret < 0) {
                int err = simple_rmdir(inode, dentry);
                WARN_ON(err);
diff --git a/arch/powerpc/platforms/powernv/opal-takeover.S b/arch/powerpc/platforms/powernv/opal-takeover.S
index 77b48b2b9309..3cd262897c27 100644
--- a/arch/powerpc/platforms/powernv/opal-takeover.S
+++ b/arch/powerpc/platforms/powernv/opal-takeover.S
@@ -14,8 +14,6 @@
 #include <asm/asm-offsets.h>
 #include <asm/opal.h>
-#define STK_PARAM(i)    (48 + ((i)-3)*8)
 #define H_HAL_TAKEOVER                  0x5124
 #define H_HAL_TAKEOVER_QUERY_MAGIC      -1
@@ -23,14 +21,14 @@
 _GLOBAL(opal_query_takeover)
        mfcr    r0
        stw     r0,8(r1)
-        std     r3,STK_PARAM(r3)(r1)
+        std     r3,STK_PARAM(R3)(r1)
-        std     r4,STK_PARAM(r4)(r1)
+        std     r4,STK_PARAM(R4)(r1)
        li      r3,H_HAL_TAKEOVER
        li      r4,H_HAL_TAKEOVER_QUERY_MAGIC
        HVSC
-        ld      r10,STK_PARAM(r3)(r1)
+        ld      r10,STK_PARAM(R3)(r1)
        std     r4,0(r10)
-        ld      r10,STK_PARAM(r4)(r1)
+        ld      r10,STK_PARAM(R4)(r1)
        std     r5,0(r10)
        lwz     r0,8(r1)
        mtcrf   0xff,r0
diff --git a/arch/powerpc/platforms/pseries/eeh_event.c b/arch/powerpc/platforms/pseries/eeh_event.c
index 4cb375c0f8d1..fb506317ebb0 100644
--- a/arch/powerpc/platforms/pseries/eeh_event.c
+++ b/arch/powerpc/platforms/pseries/eeh_event.c
@@ -85,8 +85,10 @@ static int eeh_event_handler(void * dummy)
        set_current_state(TASK_INTERRUPTIBLE);  /* Don't add to load average */
        edev = handle_eeh_events(event);
-        eeh_clear_slot(eeh_dev_to_of_node(edev), EEH_MODE_RECOVERING);
+        if (edev) {
-        pci_dev_put(edev->pdev);
+                eeh_clear_slot(eeh_dev_to_of_node(edev), EEH_MODE_RECOVERING);
+                pci_dev_put(edev->pdev);
+        }
        kfree(event);
        mutex_unlock(&eeh_event_mutex);
diff --git a/arch/powerpc/platforms/pseries/eeh_pseries.c b/arch/powerpc/platforms/pseries/eeh_pseries.c
index 8752f79a6af8..c33360ec4f4f 100644
--- a/arch/powerpc/platforms/pseries/eeh_pseries.c
+++ b/arch/powerpc/platforms/pseries/eeh_pseries.c
@@ -81,7 +81,7 @@ static int pseries_eeh_init(void)
        ibm_get_config_addr_info2       = rtas_token("ibm,get-config-addr-info2");
        ibm_get_config_addr_info        = rtas_token("ibm,get-config-addr-info");
        ibm_configure_pe                = rtas_token("ibm,configure-pe");
-        ibm_configure_bridge            = rtas_token ("ibm,configure-bridge");
+        ibm_configure_bridge            = rtas_token("ibm,configure-bridge");
        /* necessary sanity check */
        if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE) {
@@ -89,7 +89,7 @@ static int pseries_eeh_init(void)
                        __func__);
                return -EINVAL;
        } else if (ibm_set_slot_reset == RTAS_UNKNOWN_SERVICE) {
-                pr_warning("%s: RTAS service <ibm, set-slot-reset> invalid\n",
+                pr_warning("%s: RTAS service <ibm,set-slot-reset> invalid\n",
                        __func__);
                return -EINVAL;
        } else if (ibm_read_slot_reset_state2 == RTAS_UNKNOWN_SERVICE &&
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 3ce73d0052b1..444fe7759e55 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -13,8 +13,6 @@
 #include <asm/asm-offsets.h>
 #include <asm/ptrace.h>
        
-#define STK_PARM(i)     (48 + ((i)-3)*8)
 #ifdef CONFIG_TRACEPOINTS
        .section        ".toc","aw"
@@ -26,7 +24,7 @@ hcall_tracepoint_refcount:
        .section        ".text"
 /*
- * precall must preserve all registers.  use unused STK_PARM()
+ * precall must preserve all registers.  use unused STK_PARAM()
 * areas to save snapshots and opcode. We branch around this
 * in early init (eg when populating the MMU hashtable) by using an
 * unconditional cpu feature.
@@ -40,28 +38,28 @@ END_FTR_SECTION(0, 1);						\
        cmpdi   r12,0;                                          \
        beq+    1f;                                             \
        mflr    r0;                                             \
-        std     r3,STK_PARM(r3)(r1);                            \
+        std     r3,STK_PARAM(R3)(r1);                           \
-        std     r4,STK_PARM(r4)(r1);                            \
+        std     r4,STK_PARAM(R4)(r1);                           \
-        std     r5,STK_PARM(r5)(r1);                            \
+        std     r5,STK_PARAM(R5)(r1);                           \
-        std     r6,STK_PARM(r6)(r1);                            \
+        std     r6,STK_PARAM(R6)(r1);                           \
-        std     r7,STK_PARM(r7)(r1);                            \
+        std     r7,STK_PARAM(R7)(r1);                           \
-        std     r8,STK_PARM(r8)(r1);                            \
+        std     r8,STK_PARAM(R8)(r1);                           \
-        std     r9,STK_PARM(r9)(r1);                            \
+        std     r9,STK_PARAM(R9)(r1);                           \
-        std     r10,STK_PARM(r10)(r1);                          \
+        std     r10,STK_PARAM(R10)(r1);                         \
        std     r0,16(r1);                                      \
-        addi    r4,r1,STK_PARM(FIRST_REG);                      \
+        addi    r4,r1,STK_PARAM(FIRST_REG);                     \
        stdu    r1,-STACK_FRAME_OVERHEAD(r1);                   \
        bl      .__trace_hcall_entry;                           \
        addi    r1,r1,STACK_FRAME_OVERHEAD;                     \
        ld      r0,16(r1);                                      \
-        ld      r3,STK_PARM(r3)(r1);                            \
+        ld      r3,STK_PARAM(R3)(r1);                           \
-        ld      r4,STK_PARM(r4)(r1);                            \
+        ld      r4,STK_PARAM(R4)(r1);                           \
-        ld      r5,STK_PARM(r5)(r1);                            \
+        ld      r5,STK_PARAM(R5)(r1);                           \
-        ld      r6,STK_PARM(r6)(r1);                            \
+        ld      r6,STK_PARAM(R6)(r1);                           \
-        ld      r7,STK_PARM(r7)(r1);                            \
+        ld      r7,STK_PARAM(R7)(r1);                           \
-        ld      r8,STK_PARM(r8)(r1);                            \
+        ld      r8,STK_PARAM(R8)(r1);                           \
-        ld      r9,STK_PARM(r9)(r1);                            \
+        ld      r9,STK_PARAM(R9)(r1);                           \
-        ld      r10,STK_PARM(r10)(r1);                          \
+        ld      r10,STK_PARAM(R10)(r1);                         \
        mtlr    r0;                                             \
 1:
@@ -79,8 +77,8 @@ END_FTR_SECTION(0, 1);						\
        cmpdi   r12,0;                                          \
        beq+    1f;                                             \
        mflr    r0;                                             \
-        ld      r6,STK_PARM(r3)(r1);                            \
+        ld      r6,STK_PARAM(R3)(r1);                           \
-        std     r3,STK_PARM(r3)(r1);                            \
+        std     r3,STK_PARAM(R3)(r1);                           \
        mr      r4,r3;                                          \
        mr      r3,r6;                                          \
        std     r0,16(r1);                                      \
@@ -88,7 +86,7 @@ END_FTR_SECTION(0, 1);						\
        bl      .__trace_hcall_exit;                            \
        addi    r1,r1,STACK_FRAME_OVERHEAD;                     \
        ld      r0,16(r1);                                      \
-        ld      r3,STK_PARM(r3)(r1);                            \
+        ld      r3,STK_PARAM(R3)(r1);                           \
        mtlr    r0;                                             \
 1:
@@ -114,7 +112,7 @@ _GLOBAL(plpar_hcall_norets)
        mfcr    r0
        stw     r0,8(r1)
-        HCALL_INST_PRECALL(r4)
+        HCALL_INST_PRECALL(R4)
        HVSC                            /* invoke the hypervisor */
@@ -130,9 +128,9 @@ _GLOBAL(plpar_hcall)
        mfcr    r0
        stw     r0,8(r1)
-        HCALL_INST_PRECALL(r5)
+        HCALL_INST_PRECALL(R5)
-        std     r4,STK_PARM(r4)(r1)     /* Save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)     /* Save ret buffer */
        mr      r4,r5
        mr      r5,r6
@@ -143,7 +141,7 @@ _GLOBAL(plpar_hcall)
        HVSC                            /* invoke the hypervisor */
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -168,7 +166,7 @@ _GLOBAL(plpar_hcall_raw)
        mfcr    r0
        stw     r0,8(r1)
-        std     r4,STK_PARM(r4)(r1)     /* Save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)     /* Save ret buffer */
        mr      r4,r5
        mr      r5,r6
@@ -179,7 +177,7 @@ _GLOBAL(plpar_hcall_raw)
        HVSC                            /* invoke the hypervisor */
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -196,9 +194,9 @@ _GLOBAL(plpar_hcall9)
        mfcr    r0
        stw     r0,8(r1)
-        HCALL_INST_PRECALL(r5)
+        HCALL_INST_PRECALL(R5)
-        std     r4,STK_PARM(r4)(r1)     /* Save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)     /* Save ret buffer */
        mr      r4,r5
        mr      r5,r6
@@ -206,14 +204,14 @@ _GLOBAL(plpar_hcall9)
        mr      r7,r8
        mr      r8,r9
        mr      r9,r10
-        ld      r10,STK_PARM(r11)(r1)    /* put arg7 in R10 */
+        ld      r10,STK_PARAM(R11)(r1)   /* put arg7 in R10 */
-        ld      r11,STK_PARM(r12)(r1)    /* put arg8 in R11 */
+        ld      r11,STK_PARAM(R12)(r1)   /* put arg8 in R11 */
-        ld      r12,STK_PARM(r13)(r1)    /* put arg9 in R12 */
+        ld      r12,STK_PARAM(R13)(r1)    /* put arg9 in R12 */
        HVSC                            /* invoke the hypervisor */
        mr      r0,r12
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
@@ -238,7 +236,7 @@ _GLOBAL(plpar_hcall9_raw)
        mfcr    r0
        stw     r0,8(r1)
-        std     r4,STK_PARM(r4)(r1)     /* Save ret buffer */
+        std     r4,STK_PARAM(R4)(r1)     /* Save ret buffer */
        mr      r4,r5
        mr      r5,r6
@@ -246,14 +244,14 @@ _GLOBAL(plpar_hcall9_raw)
        mr      r7,r8
        mr      r8,r9
        mr      r9,r10
-        ld      r10,STK_PARM(r11)(r1)    /* put arg7 in R10 */
+        ld      r10,STK_PARAM(R11)(r1)   /* put arg7 in R10 */
-        ld      r11,STK_PARM(r12)(r1)    /* put arg8 in R11 */
+        ld      r11,STK_PARAM(R12)(r1)   /* put arg8 in R11 */
-        ld      r12,STK_PARM(r13)(r1)    /* put arg9 in R12 */
+        ld      r12,STK_PARAM(R13)(r1)    /* put arg9 in R12 */
        HVSC                            /* invoke the hypervisor */
        mr      r0,r12
-        ld      r12,STK_PARM(r4)(r1)
+        ld      r12,STK_PARAM(R4)(r1)
        std     r4,  0(r12)
        std     r5,  8(r12)
        std     r6, 16(r12)
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 0915b1ad66ce..07c09cbbfb19 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -106,7 +106,7 @@ static int tce_build_pSeries(struct iommu_table *tbl, long index,
                tcep++;
        }
-        if (tbl->it_type == TCE_PCI_SWINV_CREATE)
+        if (tbl->it_type & TCE_PCI_SWINV_CREATE)
                tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
        return 0;
 }
@@ -121,7 +121,7 @@ static void tce_free_pSeries(struct iommu_table *tbl, long index, long npages)
        while (npages--)
                *(tcep++) = 0;
-        if (tbl->it_type == TCE_PCI_SWINV_FREE)
+        if (tbl->it_type & TCE_PCI_SWINV_FREE)
                tce_invalidate_pSeries_sw(tbl, tces, tcep - 1);
 }
@@ -192,12 +192,15 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
        long l, limit;
        long tcenum_start = tcenum, npages_start = npages;
        int ret = 0;
+        unsigned long flags;
        if (npages == 1) {
                return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
                                           direction, attrs);
        }
+        local_irq_save(flags);  /* to protect tcep and the page behind it */
        tcep = __get_cpu_var(tce_page);
        /* This is safe to do since interrupts are off when we're called
@@ -207,6 +210,7 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
                tcep = (u64 *)__get_free_page(GFP_ATOMIC);
                /* If allocation fails, fall back to the loop implementation */
                if (!tcep) {
+                        local_irq_restore(flags);
                        return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
                                            direction, attrs);
                }
@@ -240,6 +244,8 @@ static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
                tcenum += limit;
        } while (npages > 0 && !rc);
+        local_irq_restore(flags);
        if (unlikely(rc == H_NOT_ENOUGH_RESOURCES)) {
                ret = (int)rc;
                tce_freemulti_pSeriesLP(tbl, tcenum_start,
@@ -707,6 +713,21 @@ static int __init disable_ddw_setup(char *str)
 early_param("disable_ddw", disable_ddw_setup);
+static inline void __remove_ddw(struct device_node *np, const u32 *ddw_avail, u64 liobn)
+{
+        int ret;
+        ret = rtas_call(ddw_avail[2], 1, 1, NULL, liobn);
+        if (ret)
+                pr_warning("%s: failed to remove DMA window: rtas returned "
+                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
+                        np->full_name, ret, ddw_avail[2], liobn);
+        else
+                pr_debug("%s: successfully removed DMA window: rtas returned "
+                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
+                        np->full_name, ret, ddw_avail[2], liobn);
+}
 static void remove_ddw(struct device_node *np)
 {
        struct dynamic_dma_window_prop *dwp;
@@ -736,15 +757,7 @@ static void remove_ddw(struct device_node *np)
                pr_debug("%s successfully cleared tces in window.\n",
                         np->full_name);
-        ret = rtas_call(ddw_avail[2], 1, 1, NULL, liobn);
+        __remove_ddw(np, ddw_avail, liobn);
-        if (ret)
-                pr_warning("%s: failed to remove direct window: rtas returned "
-                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
-                        np->full_name, ret, ddw_avail[2], liobn);
-        else
-                pr_debug("%s: successfully removed direct window: rtas returned "
-                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
-                        np->full_name, ret, ddw_avail[2], liobn);
 delprop:
        ret = prom_remove_property(np, win64);
@@ -869,6 +882,35 @@ static int create_ddw(struct pci_dev *dev, const u32 *ddw_avail,
        return ret;
 }
+static void restore_default_window(struct pci_dev *dev,
+                                u32 ddw_restore_token, unsigned long liobn)
+{
+        struct eeh_dev *edev;
+        u32 cfg_addr;
+        u64 buid;
+        int ret;
+        /*
+         * Get the config address and phb buid of the PE window.
+         * Rely on eeh to retrieve this for us.
+         * Retrieve them from the pci device, not the node with the
+         * dma-window property
+         */
+        edev = pci_dev_to_eeh_dev(dev);
+        cfg_addr = edev->config_addr;
+        if (edev->pe_config_addr)
+                cfg_addr = edev->pe_config_addr;
+        buid = edev->phb->buid;
+        do {
+                ret = rtas_call(ddw_restore_token, 3, 1, NULL, cfg_addr,
+                                        BUID_HI(buid), BUID_LO(buid));
+        } while (rtas_busy_delay(ret));
+        dev_info(&dev->dev,
+                "ibm,reset-pe-dma-windows(%x) %x %x %x returned %d\n",
+                 ddw_restore_token, cfg_addr, BUID_HI(buid), BUID_LO(buid), ret);
+}
 /*
 * If the PE supports dynamic dma windows, and there is space for a table
 * that can map all pages in a linear offset, then setup such a table,
@@ -889,9 +931,13 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
        u64 dma_addr, max_addr;
        struct device_node *dn;
        const u32 *uninitialized_var(ddw_avail);
+        const u32 *uninitialized_var(ddw_extensions);
+        u32 ddw_restore_token = 0;
        struct direct_window *window;
        struct property *win64;
        struct dynamic_dma_window_prop *ddwprop;
+        const void *dma_window = NULL;
+        unsigned long liobn, offset, size;
        mutex_lock(&direct_window_init_mutex);
@@ -911,7 +957,40 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
        if (!ddw_avail || len < 3 * sizeof(u32))
                goto out_unlock;
-       /*
+        /*
+         * the extensions property is only required to exist in certain
+         * levels of firmware and later
+         * the ibm,ddw-extensions property is a list with the first
+         * element containing the number of extensions and each
+         * subsequent entry is a value corresponding to that extension
+         */
+        ddw_extensions = of_get_property(pdn, "ibm,ddw-extensions", &len);
+        if (ddw_extensions) {
+                /*
+                 * each new defined extension length should be added to
+                 * the top of the switch so the "earlier" entries also
+                 * get picked up
+                 */
+                switch (ddw_extensions[0]) {
+                        /* ibm,reset-pe-dma-windows */
+                        case 1:
+                                ddw_restore_token = ddw_extensions[1];
+                                break;
+                }
+        }
+        /*
+         * Only remove the existing DMA window if we can restore back to
+         * the default state. Removing the existing window maximizes the
+         * resources available to firmware for dynamic window creation.
+         */
+        if (ddw_restore_token) {
+                dma_window = of_get_property(pdn, "ibm,dma-window", NULL);
+                of_parse_dma_window(pdn, dma_window, &liobn, &offset, &size);
+                __remove_ddw(pdn, ddw_avail, liobn);
+        }
+        /*
         * Query if there is a second window of size to map the
         * whole partition.  Query returns number of windows, largest
         * block assigned to PE (partition endpoint), and two bitmasks
@@ -920,7 +999,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
        dn = pci_device_to_OF_node(dev);
        ret = query_ddw(dev, ddw_avail, &query);
        if (ret != 0)
-                goto out_unlock;
+                goto out_restore_window;
        if (query.windows_available == 0) {
                /*
@@ -929,7 +1008,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
                 * trading in for a larger page size.
                 */
                dev_dbg(&dev->dev, "no free dynamic windows");
-                goto out_unlock;
+                goto out_restore_window;
        }
        if (query.page_size & 4) {
                page_shift = 24; /* 16MB */
@@ -940,7 +1019,7 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
        } else {
                dev_dbg(&dev->dev, "no supported direct page size in mask %x",
                          query.page_size);
-                goto out_unlock;
+                goto out_restore_window;
        }
        /* verify the window * number of ptes will map the partition */
        /* check largest block * page size > max memory hotplug addr */
@@ -949,14 +1028,14 @@ static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
                dev_dbg(&dev->dev, "can't map partiton max 0x%llx with %u "
                          "%llu-sized pages\n", max_addr,  query.largest_available_block,
                          1ULL << page_shift);
-                goto out_unlock;
+                goto out_restore_window;
        }
        len = order_base_2(max_addr);
        win64 = kzalloc(sizeof(struct property), GFP_KERNEL);
        if (!win64) {
                dev_info(&dev->dev,
                        "couldn't allocate property for 64bit dma window\n");
-                goto out_unlock;
+                goto out_restore_window;
        }
        win64->name = kstrdup(DIRECT64_PROPNAME, GFP_KERNEL);
        win64->value = ddwprop = kmalloc(sizeof(*ddwprop), GFP_KERNEL);
@@ -1018,6 +1097,10 @@ out_free_prop:
        kfree(win64->value);
        kfree(win64);
+out_restore_window:
+        if (ddw_restore_token)
+                restore_default_window(dev, ddw_restore_token, liobn);
 out_unlock:
        mutex_unlock(&direct_window_init_mutex);
        return dma_addr;
diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
index 029a562af373..dd30b12edfe4 100644
--- a/arch/powerpc/platforms/pseries/mobility.c
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -67,7 +67,6 @@ static int update_dt_property(struct device_node *dn, struct property **prop,
                              const char *name, u32 vd, char *value)
 {
        struct property *new_prop = *prop;
-        struct property *old_prop;
        int more = 0;
        /* A negative 'vd' value indicates that only part of the new property
@@ -117,12 +116,7 @@ static int update_dt_property(struct device_node *dn, struct property **prop,
        }
        if (!more) {
-                old_prop = of_find_property(dn, new_prop->name, NULL);
+                prom_update_property(dn, new_prop);
-                if (old_prop)
-                        prom_update_property(dn, new_prop, old_prop);
-                else
-                        prom_add_property(dn, new_prop);
                new_prop = NULL;
        }
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index 36f957f31842..8733a86ad52e 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -68,9 +68,7 @@ static const char *pseries_nvram_os_partitions[] = {
 };
 static void oops_to_nvram(struct kmsg_dumper *dumper,
-                enum kmsg_dump_reason reason,
+                          enum kmsg_dump_reason reason);
-                const char *old_msgs, unsigned long old_len,
-                const char *new_msgs, unsigned long new_len);
 static struct kmsg_dumper nvram_kmsg_dumper = {
        .dump = oops_to_nvram
@@ -504,28 +502,6 @@ int __init pSeries_nvram_init(void)
 }
 /*
- * Try to capture the last capture_len bytes of the printk buffer.  Return
- * the amount actually captured.
- */
-static size_t capture_last_msgs(const char *old_msgs, size_t old_len,
-                                const char *new_msgs, size_t new_len,
-                                char *captured, size_t capture_len)
-{
-        if (new_len >= capture_len) {
-                memcpy(captured, new_msgs + (new_len - capture_len),
-                                                                capture_len);
-                return capture_len;
-        } else {
-                /* Grab the end of old_msgs. */
-                size_t old_tail_len = min(old_len, capture_len - new_len);
-                memcpy(captured, old_msgs + (old_len - old_tail_len),
-                                                                old_tail_len);
-                memcpy(captured + old_tail_len, new_msgs, new_len);
-                return old_tail_len + new_len;
-        }
-}
-/*
 * Are we using the ibm,rtas-log for oops/panic reports?  And if so,
 * would logging this oops/panic overwrite an RTAS event that rtas_errd
 * hasn't had a chance to read and process?  Return 1 if so, else 0.
@@ -541,27 +517,6 @@ static int clobbering_unread_rtas_event(void)
                                                NVRAM_RTAS_READ_TIMEOUT);
 }
-/* Squeeze out each line's <n> severity prefix. */
-static size_t elide_severities(char *buf, size_t len)
-{
-        char *in, *out, *buf_end = buf + len;
-        /* Assume a <n> at the very beginning marks the start of a line. */
-        int newline = 1;
-        in = out = buf;
-        while (in < buf_end) {
-                if (newline && in+3 <= buf_end &&
-                                *in == '<' && isdigit(in[1]) && in[2] == '>') {
-                        in += 3;
-                        newline = 0;
-                } else {
-                        newline = (*in == '\n');
-                        *out++ = *in++;
-                }
-        }
-        return out - buf;
-}
 /* Derived from logfs_compress() */
 static int nvram_compress(const void *in, void *out, size_t inlen,
                                                        size_t outlen)
@@ -619,9 +574,7 @@ static int zip_oops(size_t text_len)
 * partition.  If that's too much, go back and capture uncompressed text.
 */
 static void oops_to_nvram(struct kmsg_dumper *dumper,
-                enum kmsg_dump_reason reason,
+                          enum kmsg_dump_reason reason)
-                const char *old_msgs, unsigned long old_len,
-                const char *new_msgs, unsigned long new_len)
 {
        static unsigned int oops_count = 0;
        static bool panicking = false;
@@ -660,14 +613,14 @@ static void oops_to_nvram(struct kmsg_dumper *dumper,
                return;
        if (big_oops_buf) {
-                text_len = capture_last_msgs(old_msgs, old_len,
+                kmsg_dump_get_buffer(dumper, false,
-                        new_msgs, new_len, big_oops_buf, big_oops_buf_sz);
+                                     big_oops_buf, big_oops_buf_sz, &text_len);
-                text_len = elide_severities(big_oops_buf, text_len);
                rc = zip_oops(text_len);
        }
        if (rc != 0) {
-                text_len = capture_last_msgs(old_msgs, old_len,
+                kmsg_dump_rewind(dumper);
-                                new_msgs, new_len, oops_data, oops_data_sz);
+                kmsg_dump_get_buffer(dumper, true,
+                                     oops_data, oops_data_sz, &text_len);
                err_type = ERR_TYPE_KERNEL_PANIC;
                *oops_len = (u16) text_len;
        }
diff --git a/arch/powerpc/platforms/pseries/processor_idle.c b/arch/powerpc/platforms/pseries/processor_idle.c
index 41a34bc4a9a2..455760b1fe6e 100644
--- a/arch/powerpc/platforms/pseries/processor_idle.c
+++ b/arch/powerpc/platforms/pseries/processor_idle.c
@@ -11,6 +11,7 @@
 #include <linux/moduleparam.h>
 #include <linux/cpuidle.h>
 #include <linux/cpu.h>
+#include <linux/notifier.h>
 #include <asm/paca.h>
 #include <asm/reg.h>
@@ -99,15 +100,18 @@ out:
 static void check_and_cede_processor(void)
 {
        /*
-         * Interrupts are soft-disabled at this point,
+         * Ensure our interrupt state is properly tracked,
-         * but not hard disabled. So an interrupt might have
+         * also checks if no interrupt has occurred while we
-         * occurred before entering NAP, and would be potentially
+         * were soft-disabled
-         * lost (edge events, decrementer events, etc...) unless
-         * we first hard disable then check.
         */
-        hard_irq_disable();
+        if (prep_irq_for_idle()) {
-        if (get_paca()->irq_happened == 0)
                cede_processor();
+#ifdef CONFIG_TRACE_IRQFLAGS
+                /* Ensure that H_CEDE returns with IRQs on */
+                if (WARN_ON(!(mfmsr() & MSR_EE)))
+                        __hard_irq_enable();
+#endif
+        }
 }
 static int dedicated_cede_loop(struct cpuidle_device *dev,
@@ -186,17 +190,40 @@ static struct cpuidle_state shared_states[MAX_IDLE_STATE_COUNT] = {
                .enter = &shared_cede_loop },
 };
-int pseries_notify_cpuidle_add_cpu(int cpu)
+static int pseries_cpuidle_add_cpu_notifier(struct notifier_block *n,
+                        unsigned long action, void *hcpu)
 {
+        int hotcpu = (unsigned long)hcpu;
        struct cpuidle_device *dev =
-                        per_cpu_ptr(pseries_cpuidle_devices, cpu);
+                        per_cpu_ptr(pseries_cpuidle_devices, hotcpu);
        if (dev && cpuidle_get_driver()) {
-                cpuidle_disable_device(dev);
+                switch (action) {
-                cpuidle_enable_device(dev);
+                case CPU_ONLINE:
+                case CPU_ONLINE_FROZEN:
+                        cpuidle_pause_and_lock();
+                        cpuidle_enable_device(dev);
+                        cpuidle_resume_and_unlock();
+                        break;
+                case CPU_DEAD:
+                case CPU_DEAD_FROZEN:
+                        cpuidle_pause_and_lock();
+                        cpuidle_disable_device(dev);
+                        cpuidle_resume_and_unlock();
+                        break;
+                default:
+                        return NOTIFY_DONE;
+                }
        }
-        return 0;
+        return NOTIFY_OK;
 }
+static struct notifier_block setup_hotplug_notifier = {
+        .notifier_call = pseries_cpuidle_add_cpu_notifier,
+};
 /*
 * pseries_cpuidle_driver_init()
 */
@@ -321,6 +348,7 @@ static int __init pseries_processor_idle_init(void)
                return retval;
        }
+        register_cpu_notifier(&setup_hotplug_notifier);
        printk(KERN_DEBUG "pseries_idle_driver registered\n");
        return 0;
@@ -329,6 +357,7 @@ static int __init pseries_processor_idle_init(void)
 static void __exit pseries_processor_idle_exit(void)
 {
+        unregister_cpu_notifier(&setup_hotplug_notifier);
        pseries_idle_devices_uninit();
        cpuidle_unregister_driver(&pseries_idle_driver);
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 7b3bf76ef834..39f71fba9b38 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -432,7 +432,7 @@ static int do_update_property(char *buf, size_t bufsize)
        unsigned char *value;
        char *name, *end, *next_prop;
        int rc, length;
-        struct property *newprop, *oldprop;
+        struct property *newprop;
        buf = parse_node(buf, bufsize, &np);
        end = buf + bufsize;
@@ -443,6 +443,9 @@ static int do_update_property(char *buf, size_t bufsize)
        if (!next_prop)
                return -EINVAL;
+        if (!strlen(name))
+                return -ENODEV;
        newprop = new_property(name, length, value, NULL);
        if (!newprop)
                return -ENOMEM;
@@ -450,18 +453,11 @@ static int do_update_property(char *buf, size_t bufsize)
        if (!strcmp(name, "slb-size") || !strcmp(name, "ibm,slb-size"))
                slb_set_size(*(int *)value);
-        oldprop = of_find_property(np, name,NULL);
-        if (!oldprop) {
-                if (strlen(name))
-                        return prom_add_property(np, newprop);
-                return -ENODEV;
-        }
        upd_value.node = np;
        upd_value.property = newprop;
        pSeries_reconfig_notify(PSERIES_UPDATE_PROPERTY, &upd_value);
-        rc = prom_update_property(np, newprop, oldprop);
+        rc = prom_update_property(np, newprop);
        if (rc)
                return rc;
@@ -486,7 +482,7 @@ static int do_update_property(char *buf, size_t bufsize)
                rc = pSeries_reconfig_notify(action, value);
                if (rc) {
-                        prom_update_property(np, oldprop, newprop);
+                        prom_update_property(np, newprop);
                        return rc;
                }
        }
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index e16bb8d48550..71706bc34a0d 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -147,7 +147,6 @@ static void __devinit smp_xics_setup_cpu(int cpu)
        set_cpu_current_state(cpu, CPU_STATE_ONLINE);
        set_default_offline_state(cpu);
 #endif
-        pseries_notify_cpuidle_add_cpu(cpu);
 }
 static int __devinit smp_pSeries_kick_cpu(int nr)
diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S
index 21cda085d926..cf48e9cb2575 100644
--- a/arch/powerpc/sysdev/6xx-suspend.S
+++ b/arch/powerpc/sysdev/6xx-suspend.S
@@ -29,7 +29,7 @@ _GLOBAL(mpc6xx_enter_standby)
        ori     r5, r5, ret_from_standby@l
        mtlr    r5
-        rlwinm  r5, r1, 0, 0, 31-THREAD_SHIFT
+        CURRENT_THREAD_INFO(r5, r1)
        lwz     r6, TI_LOCAL_FLAGS(r5)
        ori     r6, r6, _TLF_SLEEPING
        stw     r6, TI_LOCAL_FLAGS(r5)
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 6073288fed29..a7b2a600d0a4 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
 /*
 * MPC83xx/85xx/86xx PCI/PCIE support routing.
 *
- * Copyright 2007-2011 Freescale Semiconductor, Inc.
+ * Copyright 2007-2012 Freescale Semiconductor, Inc.
 * Copyright 2008-2009 MontaVista Software, Inc.
 *
 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
@@ -36,7 +36,7 @@
 static int fsl_pcie_bus_fixup, is_mpc83xx_pci;
-static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
+static void __devinit quirk_fsl_pcie_header(struct pci_dev *dev)
 {
        u8 progif;
@@ -807,3 +807,72 @@ u64 fsl_pci_immrbar_base(struct pci_controller *hose)
        return 0;
 }
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+static const struct of_device_id pci_ids[] = {
+        { .compatible = "fsl,mpc8540-pci", },
+        { .compatible = "fsl,mpc8548-pcie", },
+        { .compatible = "fsl,mpc8610-pci", },
+        { .compatible = "fsl,mpc8641-pcie", },
+        { .compatible = "fsl,p1022-pcie", },
+        { .compatible = "fsl,p1010-pcie", },
+        { .compatible = "fsl,p1023-pcie", },
+        { .compatible = "fsl,p4080-pcie", },
+        { .compatible = "fsl,qoriq-pcie-v2.3", },
+        { .compatible = "fsl,qoriq-pcie-v2.2", },
+        {},
+};
+struct device_node *fsl_pci_primary;
+void __devinit fsl_pci_init(void)
+{
+        struct device_node *node;
+        struct pci_controller *hose;
+        dma_addr_t max = 0xffffffff;
+        /* Callers can specify the primary bus using other means. */
+        if (!fsl_pci_primary) {
+                /* If a PCI host bridge contains an ISA node, it's primary. */
+                node = of_find_node_by_type(NULL, "isa");
+                while ((fsl_pci_primary = of_get_parent(node))) {
+                        of_node_put(node);
+                        node = fsl_pci_primary;
+                        if (of_match_node(pci_ids, node))
+                                break;
+                }
+        }
+        node = NULL;
+        for_each_node_by_type(node, "pci") {
+                if (of_match_node(pci_ids, node)) {
+                        /*
+                         * If there's no PCI host bridge with ISA, arbitrarily
+                         * designate one as primary.  This can go away once
+                         * various bugs with primary-less systems are fixed.
+                         */
+                        if (!fsl_pci_primary)
+                                fsl_pci_primary = node;
+                        fsl_add_bridge(node, fsl_pci_primary == node);
+                        hose = pci_find_hose_for_OF_device(node);
+                        max = min(max, hose->dma_window_base_cur +
+                                        hose->dma_window_size);
+                }
+        }
+#ifdef CONFIG_SWIOTLB
+        /*
+         * if we couldn't map all of DRAM via the dma windows
+         * we need SWIOTLB to handle buffers located outside of
+         * dma capable memory region
+         */
+        if (memblock_end_of_DRAM() - 1 > max) {
+                ppc_swiotlb_enable = 1;
+                set_pci_dma_ops(&swiotlb_dma_ops);
+                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_swiotlb;
+        }
+#endif
+}
+#endif
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a39ed5cc2c5a..baa0fd18289f 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -93,5 +93,13 @@ extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
 extern int mpc83xx_add_bridge(struct device_node *dev);
 u64 fsl_pci_immrbar_base(struct pci_controller *hose);
+extern struct device_node *fsl_pci_primary;
+#ifdef CONFIG_FSL_PCI
+void fsl_pci_init(void);
+#else
+static inline void fsl_pci_init(void) {}
+#endif
 #endif /* __POWERPC_FSL_PCI_H */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 395af1347749..bfc6211e5422 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1211,7 +1211,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        if (of_get_property(node, "single-cpu-affinity", NULL))
                flags |= MPIC_SINGLE_DEST_CPU;
        if (of_device_is_compatible(node, "fsl,mpic"))
-                flags |= MPIC_FSL;
+                flags |= MPIC_FSL | MPIC_LARGE_VECTORS;
        mpic = kzalloc(sizeof(struct mpic), GFP_KERNEL);
        if (mpic == NULL)
@@ -1376,7 +1376,7 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->isu_mask = (1 << mpic->isu_shift) - 1;
        mpic->irqhost = irq_domain_add_linear(mpic->node,
-                                       last_irq + 1,
+                                       intvec_top,
                                       &mpic_host_ops, mpic);
        /*
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 818e763f8265..b04367529729 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -395,6 +395,9 @@ static void qe_upload_microcode(const void *base,
        for (i = 0; i < be32_to_cpu(ucode->count); i++)
                out_be32(&qe_immr->iram.idata, be32_to_cpu(code[i]));
+        
+        /* Set I-RAM Ready Register */
+        out_be32(&qe_immr->iram.iready, be32_to_cpu(QE_IRAM_READY));
 }
 /*
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index 0f3ab06d2222..eab3492a45c5 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -971,7 +971,7 @@ static int cpu_cmd(void)
                /* print cpus waiting or in xmon */
                printf("cpus stopped:");
                count = 0;
-                for (cpu = 0; cpu < NR_CPUS; ++cpu) {
+                for_each_possible_cpu(cpu) {
                        if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
                                if (count == 0)
                                        printf(" %x", cpu);