5 files changed, 67 insertions, 7 deletions

diff --git a/arch/powerpc/boot/dts/mpc8569mds.dts b/arch/powerpc/boot/dts/mpc8569mds.dts
index 795eb362fcf9..8b72eaff5b03 100644
--- a/arch/powerpc/boot/dts/mpc8569mds.dts
+++ b/arch/powerpc/boot/dts/mpc8569mds.dts
@@ -535,6 +535,7 @@
                         rx-clock-name = "none";
                         tx-clock-name = "clk12";
                         pio-handle = <&pio1>;
+                        tbi-handle = <&tbi1>;
                         phy-handle = <&qe_phy0>;
                         phy-connection-type = "rgmii-id";
                 };
@@ -579,7 +580,7 @@
                                 reg = <0x6>;
                                 device_type = "ethernet-phy";
                         };
-                        tbi-phy@11 {
+                        tbi1: tbi-phy@11 {
                                 reg = <0x11>;
                                 device_type = "tbi-phy";
                         };
@@ -590,7 +591,7 @@
                         reg = <0x3520 0x18>;
                         compatible = "fsl,ucc-mdio";
 
-                        tbi0: tbi-phy@15 {
+                        tbi6: tbi-phy@15 {
                         reg = <0x15>;
                         device_type = "tbi-phy";
                         };
@@ -600,7 +601,7 @@
                         #size-cells = <0>;
                         reg = <0x3720 0x38>;
                         compatible = "fsl,ucc-mdio";
-                        tbi1: tbi-phy@17 {
+                        tbi8: tbi-phy@17 {
                                 reg = <0x17>;
                                 device_type = "tbi-phy";
                         };
@@ -617,10 +618,22 @@
                         rx-clock-name = "none";
                         tx-clock-name = "clk12";
                         pio-handle = <&pio3>;
+                        tbi-handle = <&tbi3>;
                         phy-handle = <&qe_phy2>;
                         phy-connection-type = "rgmii-id";
                 };
 
+                mdio@2320 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x2320 0x18>;
+                        compatible = "fsl,ucc-mdio";
+                        tbi3: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
                 enet1: ucc@3000 {
                         device_type = "network";
                         compatible = "ucc_geth";
@@ -632,10 +645,22 @@
                         rx-clock-name = "none";
                         tx-clock-name = "clk17";
                         pio-handle = <&pio2>;
+                        tbi-handle = <&tbi2>;
                         phy-handle = <&qe_phy1>;
                         phy-connection-type = "rgmii-id";
                 };
 
+                mdio@3120 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x3120 0x18>;
+                        compatible = "fsl,ucc-mdio";
+                        tbi2: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
                 enet3: ucc@3200 {
                         device_type = "network";
                         compatible = "ucc_geth";
@@ -647,10 +672,22 @@
                         rx-clock-name = "none";
                         tx-clock-name = "clk17";
                         pio-handle = <&pio4>;
+                        tbi-handle = <&tbi4>;
                         phy-handle = <&qe_phy3>;
                         phy-connection-type = "rgmii-id";
                 };
 
+                mdio@3320 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        reg = <0x3320 0x18>;
+                        compatible = "fsl,ucc-mdio";
+                        tbi4: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+
                 enet5: ucc@3400 {
                         device_type = "network";
                         compatible = "ucc_geth";
@@ -661,7 +698,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "none";
-                        tbi-handle = <&tbi0>;
+                        tbi-handle = <&tbi6>;
                         phy-handle = <&qe_phy5>;
                         phy-connection-type = "sgmii";
                 };
@@ -676,7 +713,7 @@
                         local-mac-address = [ 00 00 00 00 00 00 ];
                         rx-clock-name = "none";
                         tx-clock-name = "none";
-                        tbi-handle = <&tbi1>;
+                        tbi-handle = <&tbi8>;
                         phy-handle = <&qe_phy7>;
                         phy-connection-type = "sgmii";
                 };
diff --git a/arch/powerpc/configs/ppc64_defconfig b/arch/powerpc/configs/ppc64_defconfig
index 7b3804a6e363..80e80caed2da 100644
--- a/arch/powerpc/configs/ppc64_defconfig
+++ b/arch/powerpc/configs/ppc64_defconfig
@@ -1000,7 +1000,6 @@ CONFIG_TIGON3=y
 CONFIG_SPIDER_NET=m
 CONFIG_GELIC_NET=m
 CONFIG_GELIC_WIRELESS=y
-# CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE is not set
 # CONFIG_QLA3XXX is not set
 # CONFIG_ATL1 is not set
 # CONFIG_ATL1E is not set
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index 7de127e4ceef..32f7058bb173 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -593,7 +593,6 @@ CONFIG_MII=m
 CONFIG_NETDEV_1000=y
 CONFIG_GELIC_NET=y
 CONFIG_GELIC_WIRELESS=y
-# CONFIG_GELIC_WIRELESS_OLD_PSK_INTERFACE is not set
 # CONFIG_NETDEV_10000 is not set
 
 #
diff --git a/arch/powerpc/kvm/Kconfig b/arch/powerpc/kvm/Kconfig
index 6fb6e8aa3890..fe037fdaf1b3 100644
--- a/arch/powerpc/kvm/Kconfig
+++ b/arch/powerpc/kvm/Kconfig
@@ -75,6 +75,7 @@ config KVM_E500
 
           If unsure, say N.
 
+source drivers/vhost/Kconfig
 source drivers/virtio/Kconfig
 
 endif # VIRTUALIZATION
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index 21f61b8c445b..04ed2156db1c 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -237,6 +237,8 @@ static void __init mpc85xx_mds_setup_arch(void)
                 } else if (machine_is(mpc8569_mds)) {
 #define BCSR7_UCC12_GETHnRST    (0x1 << 2)
 #define BCSR8_UEM_MARVELL_RST   (0x1 << 1)
+#define BCSR_UCC_RGMII          (0x1 << 6)
+#define BCSR_UCC_RTBI           (0x1 << 5)
                         /*
                          * U-Boot mangles interrupt polarity for Marvell PHYs,
                          * so reset built-in and UEM Marvell PHYs, this puts
@@ -247,6 +249,28 @@ static void __init mpc85xx_mds_setup_arch(void)
 
                         setbits8(&bcsr_regs[7], BCSR7_UCC12_GETHnRST);
                         clrbits8(&bcsr_regs[8], BCSR8_UEM_MARVELL_RST);
+
+                        for (np = NULL; (np = of_find_compatible_node(np,
+                                                        "network",
+                                                        "ucc_geth")) != NULL;) {
+                                const unsigned int *prop;
+                                int ucc_num;
+
+                                prop = of_get_property(np, "cell-index", NULL);
+                                if (prop == NULL)
+                                        continue;
+
+                                ucc_num = *prop - 1;
+
+                                prop = of_get_property(np, "phy-connection-type", NULL);
+                                if (prop == NULL)
+                                        continue;
+
+                                if (strcmp("rtbi", (const char *)prop) == 0)
+                                        clrsetbits_8(&bcsr_regs[7 + ucc_num],
+                                                BCSR_UCC_RGMII, BCSR_UCC_RTBI);
+                        }
+
                 }
                 iounmap(bcsr_regs);
         }