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-rw-r--r--arch/powerpc/Kconfig27
-rw-r--r--arch/powerpc/Kconfig.debug10
-rw-r--r--arch/powerpc/Makefile23
-rw-r--r--arch/powerpc/boot/Makefile13
-rw-r--r--arch/powerpc/boot/addnote.c2
-rw-r--r--arch/powerpc/boot/cuboot-c2k.c190
-rw-r--r--arch/powerpc/boot/cuboot-sam440ep.c49
-rw-r--r--arch/powerpc/boot/cuboot-warp.c47
-rw-r--r--arch/powerpc/boot/dts/asp834x-redboot.dts282
-rw-r--r--arch/powerpc/boot/dts/bamboo.dts142
-rw-r--r--arch/powerpc/boot/dts/c2k.dts371
-rw-r--r--arch/powerpc/boot/dts/canyonlands.dts226
-rw-r--r--arch/powerpc/boot/dts/ebony.dts164
-rw-r--r--arch/powerpc/boot/dts/ep405.dts100
-rw-r--r--arch/powerpc/boot/dts/glacier.dts262
-rw-r--r--arch/powerpc/boot/dts/haleakala.dts138
-rw-r--r--arch/powerpc/boot/dts/holly.dts122
-rw-r--r--arch/powerpc/boot/dts/katmai.dts210
-rw-r--r--arch/powerpc/boot/dts/kilauea.dts186
-rw-r--r--arch/powerpc/boot/dts/ksi8560.dts64
-rw-r--r--arch/powerpc/boot/dts/makalu.dts186
-rw-r--r--arch/powerpc/boot/dts/mpc5121ads.dts310
-rw-r--r--arch/powerpc/boot/dts/mpc7448hpc2.dts2
-rw-r--r--arch/powerpc/boot/dts/mpc8272ads.dts32
-rw-r--r--arch/powerpc/boot/dts/mpc8313erdb.dts50
-rw-r--r--arch/powerpc/boot/dts/mpc8315erdb.dts50
-rw-r--r--arch/powerpc/boot/dts/mpc832x_mds.dts50
-rw-r--r--arch/powerpc/boot/dts/mpc832x_rdb.dts86
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitx.dts47
-rw-r--r--arch/powerpc/boot/dts/mpc8349emitxgp.dts47
-rw-r--r--arch/powerpc/boot/dts/mpc834x_mds.dts50
-rw-r--r--arch/powerpc/boot/dts/mpc836x_mds.dts48
-rw-r--r--arch/powerpc/boot/dts/mpc836x_rdk.dts432
-rw-r--r--arch/powerpc/boot/dts/mpc8377_mds.dts69
-rw-r--r--arch/powerpc/boot/dts/mpc8377_rdb.dts49
-rw-r--r--arch/powerpc/boot/dts/mpc8378_mds.dts48
-rw-r--r--arch/powerpc/boot/dts/mpc8378_rdb.dts49
-rw-r--r--arch/powerpc/boot/dts/mpc8379_mds.dts48
-rw-r--r--arch/powerpc/boot/dts/mpc8379_rdb.dts49
-rw-r--r--arch/powerpc/boot/dts/mpc8536ds.dts432
-rw-r--r--arch/powerpc/boot/dts/mpc8540ads.dts46
-rw-r--r--arch/powerpc/boot/dts/mpc8541cds.dts57
-rw-r--r--arch/powerpc/boot/dts/mpc8544ds.dts32
-rw-r--r--arch/powerpc/boot/dts/mpc8548cds.dts57
-rw-r--r--arch/powerpc/boot/dts/mpc8555cds.dts57
-rw-r--r--arch/powerpc/boot/dts/mpc8560ads.dts44
-rw-r--r--arch/powerpc/boot/dts/mpc8568mds.dts60
-rw-r--r--arch/powerpc/boot/dts/mpc8572ds.dts116
-rw-r--r--arch/powerpc/boot/dts/mpc8610_hpcd.dts20
-rw-r--r--arch/powerpc/boot/dts/mpc8641_hpcn.dts43
-rw-r--r--arch/powerpc/boot/dts/mpc866ads.dts11
-rw-r--r--arch/powerpc/boot/dts/mpc885ads.dts11
-rw-r--r--arch/powerpc/boot/dts/ps3.dts16
-rw-r--r--arch/powerpc/boot/dts/rainier.dts163
-rw-r--r--arch/powerpc/boot/dts/sam440ep.dts293
-rw-r--r--arch/powerpc/boot/dts/sbc8349.dts49
-rw-r--r--arch/powerpc/boot/dts/sbc8548.dts57
-rw-r--r--arch/powerpc/boot/dts/sbc8560.dts46
-rw-r--r--arch/powerpc/boot/dts/sbc8641d.dts41
-rw-r--r--arch/powerpc/boot/dts/sequoia.dts172
-rw-r--r--arch/powerpc/boot/dts/storcenter.dts1
-rw-r--r--arch/powerpc/boot/dts/stx_gp3_8560.dts45
-rw-r--r--arch/powerpc/boot/dts/taishan.dts241
-rw-r--r--arch/powerpc/boot/dts/tqm5200.dts14
-rw-r--r--arch/powerpc/boot/dts/tqm8540.dts49
-rw-r--r--arch/powerpc/boot/dts/tqm8541.dts60
-rw-r--r--arch/powerpc/boot/dts/tqm8548-bigflash.dts406
-rw-r--r--arch/powerpc/boot/dts/tqm8548.dts411
-rw-r--r--arch/powerpc/boot/dts/tqm8555.dts60
-rw-r--r--arch/powerpc/boot/dts/tqm8560.dts114
-rw-r--r--arch/powerpc/boot/dts/virtex440-ml507.dts296
-rw-r--r--arch/powerpc/boot/dts/walnut.dts118
-rw-r--r--arch/powerpc/boot/dts/warp.dts145
-rw-r--r--arch/powerpc/boot/dts/yosemite.dts146
-rw-r--r--arch/powerpc/boot/oflib.c15
-rw-r--r--arch/powerpc/boot/redboot-83xx.c60
-rw-r--r--arch/powerpc/boot/simpleboot.c6
-rw-r--r--arch/powerpc/boot/virtex.c100
-rwxr-xr-xarch/powerpc/boot/wrapper32
-rw-r--r--arch/powerpc/boot/zImage.coff.lds.S1
-rw-r--r--arch/powerpc/boot/zImage.lds.S1
-rw-r--r--arch/powerpc/configs/44x/sam440ep_defconfig1192
-rw-r--r--arch/powerpc/configs/44x/taishan_defconfig79
-rw-r--r--arch/powerpc/configs/44x/virtex5_defconfig1107
-rw-r--r--arch/powerpc/configs/83xx/mpc836x_rdk_defconfig1128
-rw-r--r--arch/powerpc/configs/85xx/tqm8548_defconfig1225
-rw-r--r--arch/powerpc/configs/asp8347_defconfig1214
-rw-r--r--arch/powerpc/configs/c2k_defconfig1872
-rw-r--r--arch/powerpc/configs/mpc8536_ds_defconfig1637
-rw-r--r--arch/powerpc/configs/ppc44x_defconfig149
-rw-r--r--arch/powerpc/configs/pseries_defconfig1
-rw-r--r--arch/powerpc/kernel/Makefile3
-rw-r--r--arch/powerpc/kernel/align.c70
-rw-r--r--arch/powerpc/kernel/asm-offsets.c27
-rw-r--r--arch/powerpc/kernel/cpu_setup_44x.S1
-rw-r--r--arch/powerpc/kernel/cputable.c105
-rw-r--r--arch/powerpc/kernel/crash.c2
-rw-r--r--arch/powerpc/kernel/crash_dump.c7
-rw-r--r--arch/powerpc/kernel/dma_64.c45
-rw-r--r--arch/powerpc/kernel/entry_32.S158
-rw-r--r--arch/powerpc/kernel/entry_64.S17
-rw-r--r--arch/powerpc/kernel/fpu.S41
-rw-r--r--arch/powerpc/kernel/head_32.S6
-rw-r--r--arch/powerpc/kernel/head_40x.S24
-rw-r--r--arch/powerpc/kernel/head_44x.S295
-rw-r--r--arch/powerpc/kernel/head_64.S82
-rw-r--r--arch/powerpc/kernel/head_booke.h126
-rw-r--r--arch/powerpc/kernel/head_fsl_booke.S66
-rw-r--r--arch/powerpc/kernel/ibmebus.c16
-rw-r--r--arch/powerpc/kernel/idle_6xx.S2
-rw-r--r--arch/powerpc/kernel/idle_e500.S93
-rw-r--r--arch/powerpc/kernel/iommu.c16
-rw-r--r--arch/powerpc/kernel/irq.c35
-rw-r--r--arch/powerpc/kernel/kprobes.c36
-rw-r--r--arch/powerpc/kernel/lparcfg.c6
-rw-r--r--arch/powerpc/kernel/machine_kexec_64.c4
-rw-r--r--arch/powerpc/kernel/misc.S5
-rw-r--r--arch/powerpc/kernel/misc_32.S2
-rw-r--r--arch/powerpc/kernel/misc_64.S33
-rw-r--r--arch/powerpc/kernel/module.c116
-rw-r--r--arch/powerpc/kernel/module_32.c72
-rw-r--r--arch/powerpc/kernel/module_64.c81
-rw-r--r--arch/powerpc/kernel/msi.c2
-rw-r--r--arch/powerpc/kernel/of_device.c48
-rw-r--r--arch/powerpc/kernel/ppc32.h1
-rw-r--r--arch/powerpc/kernel/ppc_ksyms.c3
-rw-r--r--arch/powerpc/kernel/process.c113
-rw-r--r--arch/powerpc/kernel/prom.c4
-rw-r--r--arch/powerpc/kernel/prom_init.c5
-rw-r--r--arch/powerpc/kernel/ptrace.c114
-rw-r--r--arch/powerpc/kernel/ptrace32.c14
-rw-r--r--arch/powerpc/kernel/rtas-proc.c14
-rw-r--r--arch/powerpc/kernel/rtas.c6
-rw-r--r--arch/powerpc/kernel/rtas_flash.c4
-rw-r--r--arch/powerpc/kernel/rtas_pci.c4
-rw-r--r--arch/powerpc/kernel/setup-common.c2
-rw-r--r--arch/powerpc/kernel/setup_32.c33
-rw-r--r--arch/powerpc/kernel/setup_64.c2
-rw-r--r--arch/powerpc/kernel/signal.c12
-rw-r--r--arch/powerpc/kernel/signal.h10
-rw-r--r--arch/powerpc/kernel/signal_32.c184
-rw-r--r--arch/powerpc/kernel/signal_64.c101
-rw-r--r--arch/powerpc/kernel/smp.c4
-rw-r--r--arch/powerpc/kernel/softemu8xx.c4
-rw-r--r--arch/powerpc/kernel/stacktrace.c36
-rw-r--r--arch/powerpc/kernel/syscalls.c3
-rw-r--r--arch/powerpc/kernel/time.c14
-rw-r--r--arch/powerpc/kernel/traps.c55
-rw-r--r--arch/powerpc/kernel/vdso.c10
-rw-r--r--arch/powerpc/kernel/vdso32/vdso32.lds.S5
-rw-r--r--arch/powerpc/kernel/vdso64/vdso64.lds.S11
-rw-r--r--arch/powerpc/kernel/vmlinux.lds.S8
-rw-r--r--arch/powerpc/lib/Makefile4
-rw-r--r--arch/powerpc/lib/code-patching.c448
-rw-r--r--arch/powerpc/lib/dma-noncoherent.c11
-rw-r--r--arch/powerpc/lib/feature-fixups-test.S742
-rw-r--r--arch/powerpc/lib/feature-fixups.c351
-rw-r--r--arch/powerpc/math-emu/math.c56
-rw-r--r--arch/powerpc/mm/44x_mmu.c29
-rw-r--r--arch/powerpc/mm/fault.c3
-rw-r--r--arch/powerpc/mm/hash_low_64.S17
-rw-r--r--arch/powerpc/mm/hash_utils_64.c42
-rw-r--r--arch/powerpc/mm/hugetlbpage.c13
-rw-r--r--arch/powerpc/mm/init_32.c7
-rw-r--r--arch/powerpc/mm/init_64.c4
-rw-r--r--arch/powerpc/mm/mem.c9
-rw-r--r--arch/powerpc/mm/mmu_decl.h6
-rw-r--r--arch/powerpc/mm/numa.c310
-rw-r--r--arch/powerpc/mm/pgtable_32.c6
-rw-r--r--arch/powerpc/mm/ppc_mmu_32.c27
-rw-r--r--arch/powerpc/mm/slice.c177
-rw-r--r--arch/powerpc/mm/stab.c4
-rw-r--r--arch/powerpc/mm/tlb_64.c7
-rw-r--r--arch/powerpc/platforms/44x/Kconfig35
-rw-r--r--arch/powerpc/platforms/44x/Makefile2
-rw-r--r--arch/powerpc/platforms/44x/sam440ep.c79
-rw-r--r--arch/powerpc/platforms/44x/virtex.c60
-rw-r--r--arch/powerpc/platforms/44x/warp-nand.c57
-rw-r--r--arch/powerpc/platforms/44x/warp.c293
-rw-r--r--arch/powerpc/platforms/512x/Kconfig17
-rw-r--r--arch/powerpc/platforms/512x/Makefile4
-rw-r--r--arch/powerpc/platforms/512x/clock.c729
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads.c69
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads.h16
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_ads_cpld.c204
-rw-r--r--arch/powerpc/platforms/512x/mpc5121_generic.c58
-rw-r--r--arch/powerpc/platforms/512x/mpc512x.h17
-rw-r--r--arch/powerpc/platforms/512x/mpc512x_shared.c83
-rw-r--r--arch/powerpc/platforms/52xx/mpc52xx_pci.c3
-rw-r--r--arch/powerpc/platforms/82xx/Kconfig11
-rw-r--r--arch/powerpc/platforms/82xx/mpc8272_ads.c4
-rw-r--r--arch/powerpc/platforms/82xx/pq2ads-pci-pic.c2
-rw-r--r--arch/powerpc/platforms/83xx/Kconfig30
-rw-r--r--arch/powerpc/platforms/83xx/Makefile2
-rw-r--r--arch/powerpc/platforms/83xx/asp834x.c90
-rw-r--r--arch/powerpc/platforms/83xx/mpc836x_rdk.c102
-rw-r--r--arch/powerpc/platforms/85xx/Kconfig14
-rw-r--r--arch/powerpc/platforms/85xx/Makefile1
-rw-r--r--arch/powerpc/platforms/85xx/mpc8536_ds.c125
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ads.c8
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_cds.c14
-rw-r--r--arch/powerpc/platforms/85xx/mpc85xx_ds.c12
-rw-r--r--arch/powerpc/platforms/85xx/tqm85xx.c23
-rw-r--r--arch/powerpc/platforms/86xx/Kconfig16
-rw-r--r--arch/powerpc/platforms/86xx/Makefile1
-rw-r--r--arch/powerpc/platforms/86xx/mpc8610_hpcd.c25
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx.h3
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_hpcn.c64
-rw-r--r--arch/powerpc/platforms/86xx/mpc86xx_smp.c6
-rw-r--r--arch/powerpc/platforms/86xx/pic.c78
-rw-r--r--arch/powerpc/platforms/86xx/sbc8641d.c25
-rw-r--r--arch/powerpc/platforms/8xx/mpc86xads_setup.c4
-rw-r--r--arch/powerpc/platforms/8xx/mpc885ads_setup.c3
-rw-r--r--arch/powerpc/platforms/Kconfig33
-rw-r--r--arch/powerpc/platforms/Kconfig.cputype25
-rw-r--r--arch/powerpc/platforms/cell/axon_msi.c76
-rw-r--r--arch/powerpc/platforms/cell/beat_htab.c4
-rw-r--r--arch/powerpc/platforms/cell/iommu.c8
-rw-r--r--arch/powerpc/platforms/cell/ras.c22
-rw-r--r--arch/powerpc/platforms/cell/spider-pic.c2
-rw-r--r--arch/powerpc/platforms/cell/spufs/context.c12
-rw-r--r--arch/powerpc/platforms/cell/spufs/file.c203
-rw-r--r--arch/powerpc/platforms/cell/spufs/inode.c47
-rw-r--r--arch/powerpc/platforms/cell/spufs/sched.c9
-rw-r--r--arch/powerpc/platforms/cell/spufs/spufs.h19
-rw-r--r--arch/powerpc/platforms/cell/spufs/sputrace.c8
-rw-r--r--arch/powerpc/platforms/chrp/setup.c7
-rw-r--r--arch/powerpc/platforms/embedded6xx/Kconfig10
-rw-r--r--arch/powerpc/platforms/embedded6xx/Makefile1
-rw-r--r--arch/powerpc/platforms/embedded6xx/c2k.c158
-rw-r--r--arch/powerpc/platforms/iseries/iommu.c4
-rw-r--r--arch/powerpc/platforms/maple/time.c2
-rw-r--r--arch/powerpc/platforms/powermac/pic.c8
-rw-r--r--arch/powerpc/platforms/powermac/smp.c6
-rw-r--r--arch/powerpc/platforms/ps3/system-bus.c38
-rw-r--r--arch/powerpc/platforms/pseries/eeh.c14
-rw-r--r--arch/powerpc/platforms/pseries/firmware.c1
-rw-r--r--arch/powerpc/platforms/pseries/hotplug-memory.c117
-rw-r--r--arch/powerpc/platforms/pseries/iommu.c15
-rw-r--r--arch/powerpc/platforms/pseries/kexec.c2
-rw-r--r--arch/powerpc/platforms/pseries/lpar.c4
-rw-r--r--arch/powerpc/platforms/pseries/ras.c2
-rw-r--r--arch/powerpc/platforms/pseries/reconfig.c38
-rw-r--r--arch/powerpc/platforms/pseries/rtasd.c4
-rw-r--r--arch/powerpc/platforms/pseries/setup.c4
-rw-r--r--arch/powerpc/sysdev/6xx-suspend.S52
-rw-r--r--arch/powerpc/sysdev/Makefile9
-rw-r--r--arch/powerpc/sysdev/bestcomm/bestcomm.c2
-rw-r--r--arch/powerpc/sysdev/bestcomm/gen_bd.c95
-rw-r--r--arch/powerpc/sysdev/bestcomm/gen_bd.h5
-rw-r--r--arch/powerpc/sysdev/bestcomm/sram.c2
-rw-r--r--arch/powerpc/sysdev/cpm1.c2
-rw-r--r--arch/powerpc/sysdev/cpm2_pic.c2
-rw-r--r--arch/powerpc/sysdev/cpm_common.c19
-rw-r--r--arch/powerpc/sysdev/dcr.c156
-rw-r--r--arch/powerpc/sysdev/fsl_gtm.c434
-rw-r--r--arch/powerpc/sysdev/fsl_msi.c429
-rw-r--r--arch/powerpc/sysdev/fsl_msi.h42
-rw-r--r--arch/powerpc/sysdev/fsl_pci.c14
-rw-r--r--arch/powerpc/sysdev/fsl_soc.c122
-rw-r--r--arch/powerpc/sysdev/i8259.c2
-rw-r--r--arch/powerpc/sysdev/indirect_pci.c6
-rw-r--r--arch/powerpc/sysdev/ipic.c16
-rw-r--r--arch/powerpc/sysdev/mpic.c18
-rw-r--r--arch/powerpc/sysdev/mpic_msi.c1
-rw-r--r--arch/powerpc/sysdev/mpic_pasemi_msi.c6
-rw-r--r--arch/powerpc/sysdev/mpic_u3msi.c8
-rw-r--r--arch/powerpc/sysdev/mv64x60_dev.c10
-rw-r--r--arch/powerpc/sysdev/ppc4xx_pci.c14
-rw-r--r--arch/powerpc/sysdev/qe_lib/Kconfig13
-rw-r--r--arch/powerpc/sysdev/qe_lib/Makefile2
-rw-r--r--arch/powerpc/sysdev/qe_lib/gpio.c149
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe.c94
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_ic.c14
-rw-r--r--arch/powerpc/sysdev/qe_lib/qe_io.c94
-rw-r--r--arch/powerpc/sysdev/qe_lib/ucc.c7
-rw-r--r--arch/powerpc/sysdev/qe_lib/usb.c55
-rw-r--r--arch/powerpc/sysdev/tsi108_pci.c3
-rw-r--r--arch/powerpc/sysdev/uic.c6
-rw-r--r--arch/powerpc/xmon/xmon.c66
280 files changed, 24524 insertions, 3506 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 20eacf2a8424..de88972c5896 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -53,6 +53,9 @@ config STACKTRACE_SUPPORT
53 bool 53 bool
54 default y 54 default y
55 55
56config HAVE_LATENCYTOP_SUPPORT
57 def_bool y
58
56config TRACE_IRQFLAGS_SUPPORT 59config TRACE_IRQFLAGS_SUPPORT
57 bool 60 bool
58 depends on PPC64 61 depends on PPC64
@@ -111,6 +114,7 @@ config PPC
111 select HAVE_KPROBES 114 select HAVE_KPROBES
112 select HAVE_KRETPROBES 115 select HAVE_KRETPROBES
113 select HAVE_LMB 116 select HAVE_LMB
117 select HAVE_DMA_ATTRS if PPC64
114 select USE_GENERIC_SMP_HELPERS if SMP 118 select USE_GENERIC_SMP_HELPERS if SMP
115 select HAVE_OPROFILE 119 select HAVE_OPROFILE
116 120
@@ -311,8 +315,8 @@ config KEXEC
311 strongly in flux, so no good recommendation can be made. 315 strongly in flux, so no good recommendation can be made.
312 316
313config CRASH_DUMP 317config CRASH_DUMP
314 bool "Build a kdump crash kernel (EXPERIMENTAL)" 318 bool "Build a kdump crash kernel"
315 depends on PPC_MULTIPLATFORM && PPC64 && EXPERIMENTAL 319 depends on PPC_MULTIPLATFORM && PPC64
316 help 320 help
317 Build a kernel suitable for use as a kdump capture kernel. 321 Build a kernel suitable for use as a kdump capture kernel.
318 The kernel will be linked at a different address than normal, and 322 The kernel will be linked at a different address than normal, and
@@ -461,6 +465,19 @@ config CMDLINE
461 some command-line options at build time by entering them here. In 465 some command-line options at build time by entering them here. In
462 most cases you will need to specify the root device here. 466 most cases you will need to specify the root device here.
463 467
468config EXTRA_TARGETS
469 string "Additional default image types"
470 help
471 List additional targets to be built by the bootwrapper here (separated
472 by spaces). This is useful for targets that depend of device tree
473 files in the .dts directory.
474
475 Targets in this list will be build as part of the default build
476 target, or when the user does a 'make zImage' or a
477 'make zImage.initrd'.
478
479 If unsure, leave blank
480
464if !44x || BROKEN 481if !44x || BROKEN
465config ARCH_WANTS_FREEZER_CONTROL 482config ARCH_WANTS_FREEZER_CONTROL
466 def_bool y 483 def_bool y
@@ -541,6 +558,12 @@ config FSL_LBC
541 help 558 help
542 Freescale Localbus support 559 Freescale Localbus support
543 560
561config FSL_GTM
562 bool
563 depends on PPC_83xx || QUICC_ENGINE || CPM2
564 help
565 Freescale General-purpose Timers support
566
544# Yes MCA RS/6000s exist but Linux-PPC does not currently support any 567# Yes MCA RS/6000s exist but Linux-PPC does not currently support any
545config MCA 568config MCA
546 bool 569 bool
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index a7d24e692bab..2840ab69ef4e 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -57,6 +57,16 @@ config KGDB
57 debugger. See <http://kgdb.sourceforge.net/> for more information. 57 debugger. See <http://kgdb.sourceforge.net/> for more information.
58 Unless you are intending to debug the kernel, say N here. 58 Unless you are intending to debug the kernel, say N here.
59 59
60config CODE_PATCHING_SELFTEST
61 bool "Run self-tests of the code-patching code."
62 depends on DEBUG_KERNEL
63 default n
64
65config FTR_FIXUP_SELFTEST
66 bool "Run self-tests of the feature-fixup code."
67 depends on DEBUG_KERNEL
68 default n
69
60choice 70choice
61 prompt "Serial Port" 71 prompt "Serial Port"
62 depends on KGDB 72 depends on KGDB
diff --git a/arch/powerpc/Makefile b/arch/powerpc/Makefile
index b7d4c4ce2fe6..9155c9312c1e 100644
--- a/arch/powerpc/Makefile
+++ b/arch/powerpc/Makefile
@@ -18,22 +18,16 @@ HAS_BIARCH := $(call cc-option-yn, -m32)
18CROSS32_COMPILE ?= 18CROSS32_COMPILE ?=
19 19
20CROSS32CC := $(CROSS32_COMPILE)gcc 20CROSS32CC := $(CROSS32_COMPILE)gcc
21CROSS32AS := $(CROSS32_COMPILE)as
22CROSS32LD := $(CROSS32_COMPILE)ld
23CROSS32AR := $(CROSS32_COMPILE)ar 21CROSS32AR := $(CROSS32_COMPILE)ar
24CROSS32OBJCOPY := $(CROSS32_COMPILE)objcopy
25 22
26ifeq ($(HAS_BIARCH),y) 23ifeq ($(HAS_BIARCH),y)
27ifeq ($(CROSS32_COMPILE),) 24ifeq ($(CROSS32_COMPILE),)
28CROSS32CC := $(CC) -m32 25CROSS32CC := $(CC) -m32
29CROSS32AS := $(AS) -a32
30CROSS32LD := $(LD) -m elf32ppc
31CROSS32OBJCOPY := $(OBJCOPY)
32CROSS32AR := GNUTARGET=elf32-powerpc $(AR) 26CROSS32AR := GNUTARGET=elf32-powerpc $(AR)
33endif 27endif
34endif 28endif
35 29
36export CROSS32CC CROSS32AS CROSS32LD CROSS32AR CROSS32OBJCOPY 30export CROSS32CC CROSS32AR
37 31
38ifeq ($(CROSS_COMPILE),) 32ifeq ($(CROSS_COMPILE),)
39KBUILD_DEFCONFIG := $(shell uname -m)_defconfig 33KBUILD_DEFCONFIG := $(shell uname -m)_defconfig
@@ -169,12 +163,25 @@ bootwrapper_install %.dtb:
169 $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@) 163 $(Q)$(MAKE) ARCH=ppc64 $(build)=$(boot) $(patsubst %,$(boot)/%,$@)
170 164
171define archhelp 165define archhelp
172 @echo '* zImage - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)' 166 @echo '* zImage - Build default images selected by kernel config'
167 @echo ' zImage.* - Compressed kernel image (arch/$(ARCH)/boot/zImage.*)'
168 @echo ' uImage - U-Boot native image format'
169 @echo ' cuImage.<dt> - Backwards compatible U-Boot image for older'
170 @echo ' versions which do not support device trees'
171 @echo ' dtbImage.<dt> - zImage with an embedded device tree blob'
172 @echo ' simpleImage.<dt> - Firmware independent image.'
173 @echo ' treeImage.<dt> - Support for older IBM 4xx firmware (not U-Boot)'
173 @echo ' install - Install kernel using' 174 @echo ' install - Install kernel using'
174 @echo ' (your) ~/bin/installkernel or' 175 @echo ' (your) ~/bin/installkernel or'
175 @echo ' (distribution) /sbin/installkernel or' 176 @echo ' (distribution) /sbin/installkernel or'
176 @echo ' install to $$(INSTALL_PATH) and run lilo' 177 @echo ' install to $$(INSTALL_PATH) and run lilo'
177 @echo ' *_defconfig - Select default config from arch/$(ARCH)/configs' 178 @echo ' *_defconfig - Select default config from arch/$(ARCH)/configs'
179 @echo ''
180 @echo ' Targets with <dt> embed a device tree blob inside the image'
181 @echo ' These targets support board with firmware that does not'
182 @echo ' support passing a device tree directly. Replace <dt> with the'
183 @echo ' name of a dts file from the arch/$(ARCH)/boot/dts/ directory'
184 @echo ' (minus the .dts extension).'
178endef 185endef
179 186
180install: 187install:
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index 095e04db1c0e..19f83c8f219d 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -35,6 +35,8 @@ endif
35 35
36BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt 36BOOTCFLAGS += -I$(obj) -I$(srctree)/$(obj) -I$(srctree)/$(src)/libfdt
37 37
38DTS_FLAGS ?= -p 1024
39
38$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405 40$(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
39$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405 41$(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
40$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405 42$(obj)/cuboot-taishan.o: BOOTCFLAGS += -mcpu=405
@@ -63,10 +65,10 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c
63 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ 65 ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
64 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ 66 cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
65 cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ 67 cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
66 fixed-head.S ep88xc.c ep405.c \ 68 fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \
67 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ 69 cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \
68 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ 70 cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \
69 virtex405-head.S 71 virtex405-head.S virtex.c redboot-83xx.c cuboot-sam440ep.c
70src-boot := $(src-wlib) $(src-plat) empty.c 72src-boot := $(src-wlib) $(src-plat) empty.c
71 73
72src-boot := $(addprefix $(obj)/, $(src-boot)) 74src-boot := $(addprefix $(obj)/, $(src-boot))
@@ -213,6 +215,7 @@ image-$(CONFIG_WALNUT) += treeImage.walnut
213# Board ports in arch/powerpc/platform/44x/Kconfig 215# Board ports in arch/powerpc/platform/44x/Kconfig
214image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony 216image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony
215image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo 217image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo
218image-$(CONFIG_SAM440EP) += cuImage.sam440ep
216image-$(CONFIG_SEQUOIA) += cuImage.sequoia 219image-$(CONFIG_SEQUOIA) += cuImage.sequoia
217image-$(CONFIG_RAINIER) += cuImage.rainier 220image-$(CONFIG_RAINIER) += cuImage.rainier
218image-$(CONFIG_TAISHAN) += cuImage.taishan 221image-$(CONFIG_TAISHAN) += cuImage.taishan
@@ -242,6 +245,7 @@ image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \
242 cuImage.mpc8349emitxgp 245 cuImage.mpc8349emitxgp
243image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds 246image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds
244image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds 247image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds
248image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot
245 249
246# Board ports in arch/powerpc/platform/85xx/Kconfig 250# Board ports in arch/powerpc/platform/85xx/Kconfig
247image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads 251image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads
@@ -254,6 +258,7 @@ image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \
254 cuImage.mpc8572ds 258 cuImage.mpc8572ds
255image-$(CONFIG_TQM8540) += cuImage.tqm8540 259image-$(CONFIG_TQM8540) += cuImage.tqm8540
256image-$(CONFIG_TQM8541) += cuImage.tqm8541 260image-$(CONFIG_TQM8541) += cuImage.tqm8541
261image-$(CONFIG_TQM8548) += cuImage.tqm8548
257image-$(CONFIG_TQM8555) += cuImage.tqm8555 262image-$(CONFIG_TQM8555) += cuImage.tqm8555
258image-$(CONFIG_TQM8560) += cuImage.tqm8560 263image-$(CONFIG_TQM8560) += cuImage.tqm8560
259image-$(CONFIG_SBC8548) += cuImage.sbc8548 264image-$(CONFIG_SBC8548) += cuImage.sbc8548
@@ -263,6 +268,7 @@ image-$(CONFIG_KSI8560) += cuImage.ksi8560
263# Board ports in arch/powerpc/platform/embedded6xx/Kconfig 268# Board ports in arch/powerpc/platform/embedded6xx/Kconfig
264image-$(CONFIG_STORCENTER) += cuImage.storcenter 269image-$(CONFIG_STORCENTER) += cuImage.storcenter
265image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 270image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2
271image-$(CONFIG_PPC_C2K) += cuImage.c2k
266 272
267# For 32-bit powermacs, build the COFF and miboot images 273# For 32-bit powermacs, build the COFF and miboot images
268# as well as the ELF images. 274# as well as the ELF images.
@@ -270,6 +276,9 @@ ifeq ($(CONFIG_PPC32),y)
270image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot 276image-$(CONFIG_PPC_PMAC) += zImage.coff zImage.miboot
271endif 277endif
272 278
279# Allow extra targets to be added to the defconfig
280image-y += $(subst ",,$(CONFIG_EXTRA_TARGETS))
281
273initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-)) 282initrd- := $(patsubst zImage%, zImage.initrd%, $(image-n) $(image-))
274initrd-y := $(patsubst zImage%, zImage.initrd%, \ 283initrd-y := $(patsubst zImage%, zImage.initrd%, \
275 $(patsubst dtbImage%, dtbImage.initrd%, \ 284 $(patsubst dtbImage%, dtbImage.initrd%, \
diff --git a/arch/powerpc/boot/addnote.c b/arch/powerpc/boot/addnote.c
index 8041a9845ab7..b1e5611b2ab1 100644
--- a/arch/powerpc/boot/addnote.c
+++ b/arch/powerpc/boot/addnote.c
@@ -25,7 +25,7 @@ char arch[] = "PowerPC";
25#define N_DESCR 6 25#define N_DESCR 6
26unsigned int descr[N_DESCR] = { 26unsigned int descr[N_DESCR] = {
27 0xffffffff, /* real-mode = true */ 27 0xffffffff, /* real-mode = true */
28 0x00c00000, /* real-base, i.e. where we expect OF to be */ 28 0x02000000, /* real-base, i.e. where we expect OF to be */
29 0xffffffff, /* real-size */ 29 0xffffffff, /* real-size */
30 0xffffffff, /* virt-base */ 30 0xffffffff, /* virt-base */
31 0xffffffff, /* virt-size */ 31 0xffffffff, /* virt-size */
diff --git a/arch/powerpc/boot/cuboot-c2k.c b/arch/powerpc/boot/cuboot-c2k.c
new file mode 100644
index 000000000000..e43594950ba3
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-c2k.c
@@ -0,0 +1,190 @@
1/*
2 * GEFanuc C2K platform code.
3 *
4 * Author: Remi Machet <rmachet@slac.stanford.edu>
5 *
6 * Originated from prpmc2800.c
7 *
8 * 2008 (c) Stanford University
9 * 2007 (c) MontaVista, Software, Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
14 */
15
16#include "types.h"
17#include "stdio.h"
18#include "io.h"
19#include "ops.h"
20#include "elf.h"
21#include "gunzip_util.h"
22#include "mv64x60.h"
23#include "cuboot.h"
24#include "ppcboot.h"
25
26static u8 *bridge_base;
27
28static void c2k_bridge_setup(u32 mem_size)
29{
30 u32 i, v[30], enables, acc_bits;
31 u32 pci_base_hi, pci_base_lo, size, buf[2];
32 unsigned long cpu_base;
33 int rc;
34 void *devp, *mv64x60_devp;
35 u8 *bridge_pbase, is_coherent;
36 struct mv64x60_cpu2pci_win *tbl;
37 int bus;
38
39 bridge_pbase = mv64x60_get_bridge_pbase();
40 is_coherent = mv64x60_is_coherent();
41
42 if (is_coherent)
43 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB
44 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
45 | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES
46 | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES;
47 else
48 acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE
49 | MV64x60_PCI_ACC_CNTL_SWAP_NONE
50 | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES
51 | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES;
52
53 mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent);
54 mv64x60_devp = find_node_by_compatible(NULL, "marvell,mv64360");
55 if (mv64x60_devp == NULL)
56 fatal("Error: Missing marvell,mv64360 device tree node\n\r");
57
58 enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE));
59 enables |= 0x007ffe00; /* Disable all cpu->pci windows */
60 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables);
61
62 /* Get the cpu -> pci i/o & mem mappings from the device tree */
63 devp = NULL;
64 for (bus = 0; ; bus++) {
65 char name[] = "pci ";
66
67 name[strlen(name)-1] = bus+'0';
68
69 devp = find_node_by_alias(name);
70 if (devp == NULL)
71 break;
72
73 if (bus >= 2)
74 fatal("Error: Only 2 PCI controllers are supported at" \
75 " this time.\n");
76
77 mv64x60_config_pci_windows(bridge_base, bridge_pbase, bus, 0,
78 mem_size, acc_bits);
79
80 rc = getprop(devp, "ranges", v, sizeof(v));
81 if (rc == 0)
82 fatal("Error: Can't find marvell,mv64360-pci ranges"
83 " property\n\r");
84
85 /* Get the cpu -> pci i/o & mem mappings from the device tree */
86
87 for (i = 0; i < rc; i += 6) {
88 switch (v[i] & 0xff000000) {
89 case 0x01000000: /* PCI I/O Space */
90 tbl = mv64x60_cpu2pci_io;
91 break;
92 case 0x02000000: /* PCI MEM Space */
93 tbl = mv64x60_cpu2pci_mem;
94 break;
95 default:
96 continue;
97 }
98
99 pci_base_hi = v[i+1];
100 pci_base_lo = v[i+2];
101 cpu_base = v[i+3];
102 size = v[i+5];
103
104 buf[0] = cpu_base;
105 buf[1] = size;
106
107 if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base))
108 fatal("Error: Can't translate PCI address " \
109 "0x%x\n\r", (u32)cpu_base);
110
111 mv64x60_config_cpu2pci_window(bridge_base, bus,
112 pci_base_hi, pci_base_lo, cpu_base, size, tbl);
113 }
114
115 enables &= ~(3<<(9+bus*5)); /* Enable cpu->pci<bus> i/o,
116 cpu->pci<bus> mem0 */
117 out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE),
118 enables);
119 };
120}
121
122static void c2k_fixups(void)
123{
124 u32 mem_size;
125
126 mem_size = mv64x60_get_mem_size(bridge_base);
127 c2k_bridge_setup(mem_size); /* Do necessary bridge setup */
128}
129
130#define MV64x60_MPP_CNTL_0 0xf000
131#define MV64x60_MPP_CNTL_2 0xf008
132#define MV64x60_GPP_IO_CNTL 0xf100
133#define MV64x60_GPP_LEVEL_CNTL 0xf110
134#define MV64x60_GPP_VALUE_SET 0xf118
135
136static void c2k_reset(void)
137{
138 u32 temp;
139
140 udelay(5000000);
141
142 if (bridge_base != 0) {
143 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0));
144 temp &= 0xFFFF0FFF;
145 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp);
146
147 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
148 temp |= 0x00000004;
149 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
150
151 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
152 temp |= 0x00000004;
153 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
154
155 temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2));
156 temp &= 0xFFFF0FFF;
157 out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp);
158
159 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL));
160 temp |= 0x00080000;
161 out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp);
162
163 temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL));
164 temp |= 0x00080000;
165 out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp);
166
167 out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET),
168 0x00080004);
169 }
170
171 for (;;);
172}
173
174static bd_t bd;
175
176void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
177 unsigned long r6, unsigned long r7)
178{
179 CUBOOT_INIT();
180
181 fdt_init(_dtb_start);
182
183 bridge_base = mv64x60_get_bridge_base();
184
185 platform_ops.fixups = c2k_fixups;
186 platform_ops.exit = c2k_reset;
187
188 if (serial_console_init() < 0)
189 exit();
190}
diff --git a/arch/powerpc/boot/cuboot-sam440ep.c b/arch/powerpc/boot/cuboot-sam440ep.c
new file mode 100644
index 000000000000..ec10a47460dd
--- /dev/null
+++ b/arch/powerpc/boot/cuboot-sam440ep.c
@@ -0,0 +1,49 @@
1/*
2 * Old U-boot compatibility for Sam440ep based off bamboo.c code
3 * original copyrights below
4 *
5 * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com>
6 *
7 * Copyright 2007 IBM Corporation
8 *
9 * Based on cuboot-ebony.c
10 *
11 * Modified from cuboot-bamboo.c for sam440ep:
12 * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
13 *
14 * This program is free software; you can redistribute it and/or modify it
15 * under the terms of the GNU General Public License version 2 as published
16 * by the Free Software Foundation.
17 */
18
19#include "ops.h"
20#include "stdio.h"
21#include "44x.h"
22#include "4xx.h"
23#include "cuboot.h"
24
25#define TARGET_4xx
26#define TARGET_44x
27#include "ppcboot.h"
28
29static bd_t bd;
30
31static void sam440ep_fixups(void)
32{
33 unsigned long sysclk = 66666666;
34
35 ibm440ep_fixup_clocks(sysclk, 11059200, 25000000);
36 ibm4xx_sdram_fixup_memsize();
37 ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00);
38 dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr);
39}
40
41void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
42 unsigned long r6, unsigned long r7)
43{
44 CUBOOT_INIT();
45 platform_ops.fixups = sam440ep_fixups;
46 platform_ops.exit = ibm44x_dbcr_reset;
47 fdt_init(_dtb_start);
48 serial_console_init();
49}
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c
index eb108a877492..21780210057d 100644
--- a/arch/powerpc/boot/cuboot-warp.c
+++ b/arch/powerpc/boot/cuboot-warp.c
@@ -10,6 +10,7 @@
10#include "ops.h" 10#include "ops.h"
11#include "4xx.h" 11#include "4xx.h"
12#include "cuboot.h" 12#include "cuboot.h"
13#include "stdio.h"
13 14
14#define TARGET_4xx 15#define TARGET_4xx
15#define TARGET_44x 16#define TARGET_44x
@@ -17,14 +18,54 @@
17 18
18static bd_t bd; 19static bd_t bd;
19 20
20static void warp_fixups(void) 21static void warp_fixup_one_nor(u32 from, u32 to)
21{ 22{
22 unsigned long sysclk = 66000000; 23 void *devp;
24 char name[50];
25 u32 v[2];
26
27 sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from);
28
29 devp = finddevice(name);
30 if (!devp)
31 return;
32
33 if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
34 v[0] = to;
35 setprop(devp, "reg", v, sizeof(v));
36
37 printf("NOR 64M fixup %x -> %x\r\n", from, to);
38 }
39}
40
23 41
24 ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); 42static void warp_fixups(void)
43{
44 ibm440ep_fixup_clocks(66000000, 11059200, 50000000);
25 ibm4xx_sdram_fixup_memsize(); 45 ibm4xx_sdram_fixup_memsize();
26 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); 46 ibm4xx_fixup_ebc_ranges("/plb/opb/ebc");
27 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); 47 dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr);
48
49 /* Fixup for 64M flash on Rev A boards. */
50 if (bd.bi_flashsize == 0x4000000) {
51 void *devp;
52 u32 v[3];
53
54 devp = finddevice("/plb/opb/ebc/nor_flash@0,0");
55 if (!devp)
56 return;
57
58 /* Fixup the size */
59 if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) {
60 v[2] = bd.bi_flashsize;
61 setprop(devp, "reg", v, sizeof(v));
62 }
63
64 /* Fixup parition offsets */
65 warp_fixup_one_nor(0x300000, 0x3f00000);
66 warp_fixup_one_nor(0x340000, 0x3f40000);
67 warp_fixup_one_nor(0x380000, 0x3f80000);
68 }
28} 69}
29 70
30 71
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts
new file mode 100644
index 000000000000..8b1bb0e41905
--- /dev/null
+++ b/arch/powerpc/boot/dts/asp834x-redboot.dts
@@ -0,0 +1,282 @@
1/*
2 * Analogue & Micro ASP8347 Device Tree Source
3 *
4 * Copyright 2008 Codehermit
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "Analogue & Micro ASP8347E";
16 compatible = "analogue-and-micro,asp8347e";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 };
26
27 cpus {
28 #address-cells = <1>;
29 #size-cells = <0>;
30
31 PowerPC,8347@0 {
32 device_type = "cpu";
33 reg = <0x0>;
34 d-cache-line-size = <32>;
35 i-cache-line-size = <32>;
36 d-cache-size = <32768>;
37 i-cache-size = <32768>;
38 timebase-frequency = <0>; // from bootloader
39 bus-frequency = <0>; // from bootloader
40 clock-frequency = <0>; // from bootloader
41 };
42 };
43
44 memory {
45 device_type = "memory";
46 reg = <0x00000000 0x8000000>; // 128MB at 0
47 };
48
49 localbus@ff005000 {
50 #address-cells = <2>;
51 #size-cells = <1>;
52 compatible = "fsl,mpc8347e-localbus",
53 "fsl,pq2pro-localbus",
54 "simple-bus";
55 reg = <0xff005000 0x1000>;
56 interrupts = <77 0x8>;
57 interrupt-parent = <&ipic>;
58
59 ranges = <
60 0 0 0xf0000000 0x02000000
61 >;
62
63 flash@0,0 {
64 compatible = "cfi-flash";
65 reg = <0 0 0x02000000>;
66 bank-width = <2>;
67 device-width = <2>;
68 };
69 };
70
71 soc8349@ff000000 {
72 #address-cells = <1>;
73 #size-cells = <1>;
74 device_type = "soc";
75 ranges = <0x0 0xff000000 0x00100000>;
76 reg = <0xff000000 0x00000200>;
77 bus-frequency = <0>;
78
79 wdt@200 {
80 device_type = "watchdog";
81 compatible = "mpc83xx_wdt";
82 reg = <0x200 0x100>;
83 };
84
85 i2c@3000 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 cell-index = <0>;
89 compatible = "fsl-i2c";
90 reg = <0x3000 0x100>;
91 interrupts = <14 0x8>;
92 interrupt-parent = <&ipic>;
93 dfsrr;
94
95 rtc@68 {
96 compatible = "dallas,ds1374";
97 reg = <0x68>;
98 };
99 };
100
101 i2c@3100 {
102 #address-cells = <1>;
103 #size-cells = <0>;
104 cell-index = <1>;
105 compatible = "fsl-i2c";
106 reg = <0x3100 0x100>;
107 interrupts = <15 0x8>;
108 interrupt-parent = <&ipic>;
109 dfsrr;
110 };
111
112 spi@7000 {
113 cell-index = <0>;
114 compatible = "fsl,spi";
115 reg = <0x7000 0x1000>;
116 interrupts = <16 0x8>;
117 interrupt-parent = <&ipic>;
118 mode = "cpu";
119 };
120
121 dma@82a8 {
122 #address-cells = <1>;
123 #size-cells = <1>;
124 compatible = "fsl,mpc8347-dma", "fsl,elo-dma";
125 reg = <0x82a8 4>;
126 ranges = <0 0x8100 0x1a8>;
127 interrupt-parent = <&ipic>;
128 interrupts = <71 8>;
129 cell-index = <0>;
130 dma-channel@0 {
131 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
132 reg = <0 0x80>;
133 interrupt-parent = <&ipic>;
134 interrupts = <71 8>;
135 };
136 dma-channel@80 {
137 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
138 reg = <0x80 0x80>;
139 interrupt-parent = <&ipic>;
140 interrupts = <71 8>;
141 };
142 dma-channel@100 {
143 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
144 reg = <0x100 0x80>;
145 interrupt-parent = <&ipic>;
146 interrupts = <71 8>;
147 };
148 dma-channel@180 {
149 compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel";
150 reg = <0x180 0x28>;
151 interrupt-parent = <&ipic>;
152 interrupts = <71 8>;
153 };
154 };
155
156 /* phy type (ULPI or SERIAL) are only types supported for MPH */
157 /* port = 0 or 1 */
158 usb@22000 {
159 compatible = "fsl-usb2-mph";
160 reg = <0x22000 0x1000>;
161 #address-cells = <1>;
162 #size-cells = <0>;
163 interrupt-parent = <&ipic>;
164 interrupts = <39 0x8>;
165 phy_type = "ulpi";
166 port1;
167 };
168 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
169 usb@23000 {
170 compatible = "fsl-usb2-dr";
171 reg = <0x23000 0x1000>;
172 #address-cells = <1>;
173 #size-cells = <0>;
174 interrupt-parent = <&ipic>;
175 interrupts = <38 0x8>;
176 dr_mode = "otg";
177 phy_type = "ulpi";
178 };
179
180 mdio@24520 {
181 #address-cells = <1>;
182 #size-cells = <0>;
183 compatible = "fsl,gianfar-mdio";
184 reg = <0x24520 0x20>;
185
186 phy0: ethernet-phy@0 {
187 interrupt-parent = <&ipic>;
188 interrupts = <17 0x8>;
189 reg = <0x1>;
190 device_type = "ethernet-phy";
191 };
192 phy1: ethernet-phy@1 {
193 interrupt-parent = <&ipic>;
194 interrupts = <18 0x8>;
195 reg = <0x2>;
196 device_type = "ethernet-phy";
197 };
198 };
199
200 enet0: ethernet@24000 {
201 cell-index = <0>;
202 device_type = "network";
203 model = "TSEC";
204 compatible = "gianfar";
205 reg = <0x24000 0x1000>;
206 local-mac-address = [ 00 08 e5 11 32 33 ];
207 interrupts = <32 0x8 33 0x8 34 0x8>;
208 interrupt-parent = <&ipic>;
209 phy-handle = <&phy0>;
210 linux,network-index = <0>;
211 };
212
213 enet1: ethernet@25000 {
214 cell-index = <1>;
215 device_type = "network";
216 model = "TSEC";
217 compatible = "gianfar";
218 reg = <0x25000 0x1000>;
219 local-mac-address = [ 00 08 e5 11 32 34 ];
220 interrupts = <35 0x8 36 0x8 37 0x8>;
221 interrupt-parent = <&ipic>;
222 phy-handle = <&phy1>;
223 linux,network-index = <1>;
224 };
225
226 serial0: serial@4500 {
227 cell-index = <0>;
228 device_type = "serial";
229 compatible = "ns16550";
230 reg = <0x4500 0x100>;
231 clock-frequency = <400000000>;
232 interrupts = <9 0x8>;
233 interrupt-parent = <&ipic>;
234 };
235
236 serial1: serial@4600 {
237 cell-index = <1>;
238 device_type = "serial";
239 compatible = "ns16550";
240 reg = <0x4600 0x100>;
241 clock-frequency = <400000000>;
242 interrupts = <10 0x8>;
243 interrupt-parent = <&ipic>;
244 };
245
246 /* May need to remove if on a part without crypto engine */
247 crypto@30000 {
248 device_type = "crypto";
249 model = "SEC2";
250 compatible = "talitos";
251 reg = <0x30000 0x10000>;
252 interrupts = <11 0x8>;
253 interrupt-parent = <&ipic>;
254 num-channels = <4>;
255 channel-fifo-len = <24>;
256 exec-units-mask = <0x0000007e>;
257 /* desc mask is for rev2.0,
258 * we need runtime fixup for >2.0 */
259 descriptor-types-mask = <0x01010ebf>;
260 };
261
262 /* IPIC
263 * interrupts cell = <intr #, sense>
264 * sense values match linux IORESOURCE_IRQ_* defines:
265 * sense == 8: Level, low assertion
266 * sense == 2: Edge, high-to-low change
267 */
268 ipic: pic@700 {
269 interrupt-controller;
270 #address-cells = <0>;
271 #interrupt-cells = <2>;
272 reg = <0x700 0x100>;
273 device_type = "ipic";
274 };
275 };
276
277 chosen {
278 bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2";
279 linux,stdout-path = &serial0;
280 };
281
282};
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts
index ba2521bdaab1..6ce0cc2c0208 100644
--- a/arch/powerpc/boot/dts/bamboo.dts
+++ b/arch/powerpc/boot/dts/bamboo.dts
@@ -11,12 +11,14 @@
11 * any warranty of any kind, whether express or implied. 11 * any warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14/dts-v1/;
15
14/ { 16/ {
15 #address-cells = <2>; 17 #address-cells = <2>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 model = "amcc,bamboo"; 19 model = "amcc,bamboo";
18 compatible = "amcc,bamboo"; 20 compatible = "amcc,bamboo";
19 dcr-parent = <&/cpus/cpu@0>; 21 dcr-parent = <&{/cpus/cpu@0}>;
20 22
21 aliases { 23 aliases {
22 ethernet0 = &EMAC0; 24 ethernet0 = &EMAC0;
@@ -34,13 +36,13 @@
34 cpu@0 { 36 cpu@0 {
35 device_type = "cpu"; 37 device_type = "cpu";
36 model = "PowerPC,440EP"; 38 model = "PowerPC,440EP";
37 reg = <0>; 39 reg = <0x00000000>;
38 clock-frequency = <0>; /* Filled in by zImage */ 40 clock-frequency = <0>; /* Filled in by zImage */
39 timebase-frequency = <0>; /* Filled in by zImage */ 41 timebase-frequency = <0>; /* Filled in by zImage */
40 i-cache-line-size = <20>; 42 i-cache-line-size = <32>;
41 d-cache-line-size = <20>; 43 d-cache-line-size = <32>;
42 i-cache-size = <8000>; 44 i-cache-size = <32768>;
43 d-cache-size = <8000>; 45 d-cache-size = <32768>;
44 dcr-controller; 46 dcr-controller;
45 dcr-access-method = "native"; 47 dcr-access-method = "native";
46 }; 48 };
@@ -48,14 +50,14 @@
48 50
49 memory { 51 memory {
50 device_type = "memory"; 52 device_type = "memory";
51 reg = <0 0 0>; /* Filled in by zImage */ 53 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
52 }; 54 };
53 55
54 UIC0: interrupt-controller0 { 56 UIC0: interrupt-controller0 {
55 compatible = "ibm,uic-440ep","ibm,uic"; 57 compatible = "ibm,uic-440ep","ibm,uic";
56 interrupt-controller; 58 interrupt-controller;
57 cell-index = <0>; 59 cell-index = <0>;
58 dcr-reg = <0c0 009>; 60 dcr-reg = <0x0c0 0x009>;
59 #address-cells = <0>; 61 #address-cells = <0>;
60 #size-cells = <0>; 62 #size-cells = <0>;
61 #interrupt-cells = <2>; 63 #interrupt-cells = <2>;
@@ -65,22 +67,22 @@
65 compatible = "ibm,uic-440ep","ibm,uic"; 67 compatible = "ibm,uic-440ep","ibm,uic";
66 interrupt-controller; 68 interrupt-controller;
67 cell-index = <1>; 69 cell-index = <1>;
68 dcr-reg = <0d0 009>; 70 dcr-reg = <0x0d0 0x009>;
69 #address-cells = <0>; 71 #address-cells = <0>;
70 #size-cells = <0>; 72 #size-cells = <0>;
71 #interrupt-cells = <2>; 73 #interrupt-cells = <2>;
72 interrupts = <1e 4 1f 4>; /* cascade */ 74 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
73 interrupt-parent = <&UIC0>; 75 interrupt-parent = <&UIC0>;
74 }; 76 };
75 77
76 SDR0: sdr { 78 SDR0: sdr {
77 compatible = "ibm,sdr-440ep"; 79 compatible = "ibm,sdr-440ep";
78 dcr-reg = <00e 002>; 80 dcr-reg = <0x00e 0x002>;
79 }; 81 };
80 82
81 CPR0: cpr { 83 CPR0: cpr {
82 compatible = "ibm,cpr-440ep"; 84 compatible = "ibm,cpr-440ep";
83 dcr-reg = <00c 002>; 85 dcr-reg = <0x00c 0x002>;
84 }; 86 };
85 87
86 plb { 88 plb {
@@ -92,29 +94,29 @@
92 94
93 SDRAM0: sdram { 95 SDRAM0: sdram {
94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 96 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
95 dcr-reg = <010 2>; 97 dcr-reg = <0x010 0x002>;
96 }; 98 };
97 99
98 DMA0: dma { 100 DMA0: dma {
99 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 101 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
100 dcr-reg = <100 027>; 102 dcr-reg = <0x100 0x027>;
101 }; 103 };
102 104
103 MAL0: mcmal { 105 MAL0: mcmal {
104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 106 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
105 dcr-reg = <180 62>; 107 dcr-reg = <0x180 0x062>;
106 num-tx-chans = <4>; 108 num-tx-chans = <4>;
107 num-rx-chans = <2>; 109 num-rx-chans = <2>;
108 interrupt-parent = <&MAL0>; 110 interrupt-parent = <&MAL0>;
109 interrupts = <0 1 2 3 4>; 111 interrupts = <0x0 0x1 0x2 0x3 0x4>;
110 #interrupt-cells = <1>; 112 #interrupt-cells = <1>;
111 #address-cells = <0>; 113 #address-cells = <0>;
112 #size-cells = <0>; 114 #size-cells = <0>;
113 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 115 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
114 /*RXEOB*/ 1 &UIC0 b 4 116 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
115 /*SERR*/ 2 &UIC1 0 4 117 /*SERR*/ 0x2 &UIC1 0x0 0x4
116 /*TXDE*/ 3 &UIC1 1 4 118 /*TXDE*/ 0x3 &UIC1 0x1 0x4
117 /*RXDE*/ 4 &UIC1 2 4>; 119 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
118 }; 120 };
119 121
120 POB0: opb { 122 POB0: opb {
@@ -124,101 +126,101 @@
124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 126 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
125 * bits. 127 * bits.
126 */ 128 */
127 ranges = <00000000 0 00000000 80000000 129 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
128 80000000 0 80000000 80000000>; 130 0x80000000 0x00000000 0x80000000 0x80000000>;
129 interrupt-parent = <&UIC1>; 131 interrupt-parent = <&UIC1>;
130 interrupts = <7 4>; 132 interrupts = <0x7 0x4>;
131 clock-frequency = <0>; /* Filled in by zImage */ 133 clock-frequency = <0>; /* Filled in by zImage */
132 134
133 EBC0: ebc { 135 EBC0: ebc {
134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 136 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
135 dcr-reg = <012 2>; 137 dcr-reg = <0x012 0x002>;
136 #address-cells = <2>; 138 #address-cells = <2>;
137 #size-cells = <1>; 139 #size-cells = <1>;
138 clock-frequency = <0>; /* Filled in by zImage */ 140 clock-frequency = <0>; /* Filled in by zImage */
139 interrupts = <5 1>; 141 interrupts = <0x5 0x1>;
140 interrupt-parent = <&UIC1>; 142 interrupt-parent = <&UIC1>;
141 }; 143 };
142 144
143 UART0: serial@ef600300 { 145 UART0: serial@ef600300 {
144 device_type = "serial"; 146 device_type = "serial";
145 compatible = "ns16550"; 147 compatible = "ns16550";
146 reg = <ef600300 8>; 148 reg = <0xef600300 0x00000008>;
147 virtual-reg = <ef600300>; 149 virtual-reg = <0xef600300>;
148 clock-frequency = <0>; /* Filled in by zImage */ 150 clock-frequency = <0>; /* Filled in by zImage */
149 current-speed = <1c200>; 151 current-speed = <115200>;
150 interrupt-parent = <&UIC0>; 152 interrupt-parent = <&UIC0>;
151 interrupts = <0 4>; 153 interrupts = <0x0 0x4>;
152 }; 154 };
153 155
154 UART1: serial@ef600400 { 156 UART1: serial@ef600400 {
155 device_type = "serial"; 157 device_type = "serial";
156 compatible = "ns16550"; 158 compatible = "ns16550";
157 reg = <ef600400 8>; 159 reg = <0xef600400 0x00000008>;
158 virtual-reg = <ef600400>; 160 virtual-reg = <0xef600400>;
159 clock-frequency = <0>; 161 clock-frequency = <0>;
160 current-speed = <0>; 162 current-speed = <0>;
161 interrupt-parent = <&UIC0>; 163 interrupt-parent = <&UIC0>;
162 interrupts = <1 4>; 164 interrupts = <0x1 0x4>;
163 }; 165 };
164 166
165 UART2: serial@ef600500 { 167 UART2: serial@ef600500 {
166 device_type = "serial"; 168 device_type = "serial";
167 compatible = "ns16550"; 169 compatible = "ns16550";
168 reg = <ef600500 8>; 170 reg = <0xef600500 0x00000008>;
169 virtual-reg = <ef600500>; 171 virtual-reg = <0xef600500>;
170 clock-frequency = <0>; 172 clock-frequency = <0>;
171 current-speed = <0>; 173 current-speed = <0>;
172 interrupt-parent = <&UIC0>; 174 interrupt-parent = <&UIC0>;
173 interrupts = <3 4>; 175 interrupts = <0x3 0x4>;
174 }; 176 };
175 177
176 UART3: serial@ef600600 { 178 UART3: serial@ef600600 {
177 device_type = "serial"; 179 device_type = "serial";
178 compatible = "ns16550"; 180 compatible = "ns16550";
179 reg = <ef600600 8>; 181 reg = <0xef600600 0x00000008>;
180 virtual-reg = <ef600600>; 182 virtual-reg = <0xef600600>;
181 clock-frequency = <0>; 183 clock-frequency = <0>;
182 current-speed = <0>; 184 current-speed = <0>;
183 interrupt-parent = <&UIC0>; 185 interrupt-parent = <&UIC0>;
184 interrupts = <4 4>; 186 interrupts = <0x4 0x4>;
185 }; 187 };
186 188
187 IIC0: i2c@ef600700 { 189 IIC0: i2c@ef600700 {
188 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
189 reg = <ef600700 14>; 191 reg = <0xef600700 0x00000014>;
190 interrupt-parent = <&UIC0>; 192 interrupt-parent = <&UIC0>;
191 interrupts = <2 4>; 193 interrupts = <0x2 0x4>;
192 }; 194 };
193 195
194 IIC1: i2c@ef600800 { 196 IIC1: i2c@ef600800 {
195 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
196 reg = <ef600800 14>; 198 reg = <0xef600800 0x00000014>;
197 interrupt-parent = <&UIC0>; 199 interrupt-parent = <&UIC0>;
198 interrupts = <7 4>; 200 interrupts = <0x7 0x4>;
199 }; 201 };
200 202
201 ZMII0: emac-zmii@ef600d00 { 203 ZMII0: emac-zmii@ef600d00 {
202 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 204 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
203 reg = <ef600d00 c>; 205 reg = <0xef600d00 0x0000000c>;
204 }; 206 };
205 207
206 EMAC0: ethernet@ef600e00 { 208 EMAC0: ethernet@ef600e00 {
207 device_type = "network"; 209 device_type = "network";
208 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 210 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
209 interrupt-parent = <&UIC1>; 211 interrupt-parent = <&UIC1>;
210 interrupts = <1c 4 1d 4>; 212 interrupts = <0x1c 0x4 0x1d 0x4>;
211 reg = <ef600e00 70>; 213 reg = <0xef600e00 0x00000070>;
212 local-mac-address = [000000000000]; 214 local-mac-address = [000000000000];
213 mal-device = <&MAL0>; 215 mal-device = <&MAL0>;
214 mal-tx-channel = <0 1>; 216 mal-tx-channel = <0 1>;
215 mal-rx-channel = <0>; 217 mal-rx-channel = <0>;
216 cell-index = <0>; 218 cell-index = <0>;
217 max-frame-size = <5dc>; 219 max-frame-size = <1500>;
218 rx-fifo-size = <1000>; 220 rx-fifo-size = <4096>;
219 tx-fifo-size = <800>; 221 tx-fifo-size = <2048>;
220 phy-mode = "rmii"; 222 phy-mode = "rmii";
221 phy-map = <00000000>; 223 phy-map = <0x00000000>;
222 zmii-device = <&ZMII0>; 224 zmii-device = <&ZMII0>;
223 zmii-channel = <0>; 225 zmii-channel = <0>;
224 }; 226 };
@@ -227,26 +229,26 @@
227 device_type = "network"; 229 device_type = "network";
228 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 230 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
229 interrupt-parent = <&UIC1>; 231 interrupt-parent = <&UIC1>;
230 interrupts = <1e 4 1f 4>; 232 interrupts = <0x1e 0x4 0x1f 0x4>;
231 reg = <ef600f00 70>; 233 reg = <0xef600f00 0x00000070>;
232 local-mac-address = [000000000000]; 234 local-mac-address = [000000000000];
233 mal-device = <&MAL0>; 235 mal-device = <&MAL0>;
234 mal-tx-channel = <2 3>; 236 mal-tx-channel = <2 3>;
235 mal-rx-channel = <1>; 237 mal-rx-channel = <1>;
236 cell-index = <1>; 238 cell-index = <1>;
237 max-frame-size = <5dc>; 239 max-frame-size = <1500>;
238 rx-fifo-size = <1000>; 240 rx-fifo-size = <4096>;
239 tx-fifo-size = <800>; 241 tx-fifo-size = <2048>;
240 phy-mode = "rmii"; 242 phy-mode = "rmii";
241 phy-map = <00000000>; 243 phy-map = <0x00000000>;
242 zmii-device = <&ZMII0>; 244 zmii-device = <&ZMII0>;
243 zmii-channel = <1>; 245 zmii-channel = <1>;
244 }; 246 };
245 247
246 usb@ef601000 { 248 usb@ef601000 {
247 compatible = "ohci-be"; 249 compatible = "ohci-be";
248 reg = <ef601000 80>; 250 reg = <0xef601000 0x00000080>;
249 interrupts = <8 1 9 1>; 251 interrupts = <0x8 0x1 0x9 0x1>;
250 interrupt-parent = < &UIC1 >; 252 interrupt-parent = < &UIC1 >;
251 }; 253 };
252 }; 254 };
@@ -258,35 +260,35 @@
258 #address-cells = <3>; 260 #address-cells = <3>;
259 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 261 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
260 primary; 262 primary;
261 reg = <0 eec00000 8 /* Config space access */ 263 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
262 0 eed00000 4 /* IACK */ 264 0x00000000 0xeed00000 0x00000004 /* IACK */
263 0 eed00000 4 /* Special cycle */ 265 0x00000000 0xeed00000 0x00000004 /* Special cycle */
264 0 ef400000 40>; /* Internal registers */ 266 0x00000000 0xef400000 0x00000040>; /* Internal registers */
265 267
266 /* Outbound ranges, one memory and one IO, 268 /* Outbound ranges, one memory and one IO,
267 * later cannot be changed. Chip supports a second 269 * later cannot be changed. Chip supports a second
268 * IO range but we don't use it for now 270 * IO range but we don't use it for now
269 */ 271 */
270 ranges = <02000000 0 a0000000 0 a0000000 0 20000000 272 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
271 01000000 0 00000000 0 e8000000 0 00010000>; 273 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
272 274
273 /* Inbound 2GB range starting at 0 */ 275 /* Inbound 2GB range starting at 0 */
274 dma-ranges = <42000000 0 0 0 0 0 80000000>; 276 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
275 277
276 /* Bamboo has all 4 IRQ pins tied together per slot */ 278 /* Bamboo has all 4 IRQ pins tied together per slot */
277 interrupt-map-mask = <f800 0 0 0>; 279 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
278 interrupt-map = < 280 interrupt-map = <
279 /* IDSEL 1 */ 281 /* IDSEL 1 */
280 0800 0 0 0 &UIC0 1c 8 282 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
281 283
282 /* IDSEL 2 */ 284 /* IDSEL 2 */
283 1000 0 0 0 &UIC0 1b 8 285 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
284 286
285 /* IDSEL 3 */ 287 /* IDSEL 3 */
286 1800 0 0 0 &UIC0 1a 8 288 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
287 289
288 /* IDSEL 4 */ 290 /* IDSEL 4 */
289 2000 0 0 0 &UIC0 19 8 291 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
290 >; 292 >;
291 }; 293 };
292 }; 294 };
diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts
new file mode 100644
index 000000000000..f5d625fa3e52
--- /dev/null
+++ b/arch/powerpc/boot/dts/c2k.dts
@@ -0,0 +1,371 @@
1/* Device Tree Source for GEFanuc C2K
2 *
3 * Author: Remi Machet <rmachet@slac.stanford.edu>
4 *
5 * Originated from prpmc2800.dts
6 *
7 * 2008 (c) Stanford University
8 * 2007 (c) MontaVista, Software, Inc.
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License version 2 as published
12 * by the Free Software Foundation.
13 */
14
15/dts-v1/;
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 model = "C2K";
21 compatible = "GEFanuc,C2K";
22 coherency-off;
23
24 aliases {
25 pci0 = &PCI0;
26 pci1 = &PCI1;
27 };
28
29 cpus {
30 #address-cells = <1>;
31 #size-cells = <0>;
32
33 cpu@0 {
34 device_type = "cpu";
35 compatible = "PowerPC,7447";
36 reg = <0>;
37 clock-frequency = <996000000>; /* 996 MHz */
38 bus-frequency = <166666667>; /* 166.6666 MHz */
39 timebase-frequency = <41666667>; /* 166.6666/4 MHz */
40 i-cache-line-size = <32>;
41 d-cache-line-size = <32>;
42 i-cache-size = <32768>;
43 d-cache-size = <32768>;
44 };
45 };
46
47 memory {
48 device_type = "memory";
49 reg = <0x00000000 0x40000000>; /* 1GB */
50 };
51
52 system-controller@d8000000 { /* Marvell Discovery */
53 #address-cells = <1>;
54 #size-cells = <1>;
55 model = "mv64460";
56 compatible = "marvell,mv64360";
57 clock-frequency = <166666667>; /* 166.66... MHz */
58 reg = <0xd8000000 0x00010000>;
59 virtual-reg = <0xd8000000>;
60 ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */
61 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */
62 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */
63 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */
64 0xd8100000 0xd8100000 0x00010000 /* FPGA */
65 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */
66 0xf8000000 0xf8000000 0x08000000 /* User FLASH */
67 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */
68 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */
69
70 mdio@2000 {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 compatible = "marvell,mv64360-mdio";
74 reg = <0x2000 4>;
75 PHY0: ethernet-phy@0 {
76 device_type = "ethernet-phy";
77 interrupts = <76>; /* GPP 12 */
78 interrupt-parent = <&PIC>;
79 reg = <0>;
80 };
81 PHY1: ethernet-phy@1 {
82 device_type = "ethernet-phy";
83 interrupts = <76>; /* GPP 12 */
84 interrupt-parent = <&PIC>;
85 reg = <1>;
86 };
87 PHY2: ethernet-phy@2 {
88 device_type = "ethernet-phy";
89 interrupts = <76>; /* GPP 12 */
90 interrupt-parent = <&PIC>;
91 reg = <2>;
92 };
93 };
94
95 ethernet-group@2000 {
96 #address-cells = <1>;
97 #size-cells = <0>;
98 compatible = "marvell,mv64360-eth-group";
99 reg = <0x2000 0x2000>;
100 ethernet@0 {
101 device_type = "network";
102 compatible = "marvell,mv64360-eth";
103 reg = <0>;
104 interrupts = <32>;
105 interrupt-parent = <&PIC>;
106 phy = <&PHY0>;
107 local-mac-address = [ 00 00 00 00 00 00 ];
108 };
109 ethernet@1 {
110 device_type = "network";
111 compatible = "marvell,mv64360-eth";
112 reg = <1>;
113 interrupts = <33>;
114 interrupt-parent = <&PIC>;
115 phy = <&PHY1>;
116 local-mac-address = [ 00 00 00 00 00 00 ];
117 };
118 ethernet@2 {
119 device_type = "network";
120 compatible = "marvell,mv64360-eth";
121 reg = <2>;
122 interrupts = <34>;
123 interrupt-parent = <&PIC>;
124 phy = <&PHY2>;
125 local-mac-address = [ 00 00 00 00 00 00 ];
126 };
127 };
128
129 SDMA0: sdma@4000 {
130 compatible = "marvell,mv64360-sdma";
131 reg = <0x4000 0xc18>;
132 virtual-reg = <0xd8004000>;
133 interrupt-base = <0>;
134 interrupts = <36>;
135 interrupt-parent = <&PIC>;
136 };
137
138 SDMA1: sdma@6000 {
139 compatible = "marvell,mv64360-sdma";
140 reg = <0x6000 0xc18>;
141 virtual-reg = <0xd8006000>;
142 interrupt-base = <0>;
143 interrupts = <38>;
144 interrupt-parent = <&PIC>;
145 };
146
147 BRG0: brg@b200 {
148 compatible = "marvell,mv64360-brg";
149 reg = <0xb200 0x8>;
150 clock-src = <8>;
151 clock-frequency = <133333333>;
152 current-speed = <115200>;
153 };
154
155 BRG1: brg@b208 {
156 compatible = "marvell,mv64360-brg";
157 reg = <0xb208 0x8>;
158 clock-src = <8>;
159 clock-frequency = <133333333>;
160 current-speed = <115200>;
161 };
162
163 CUNIT: cunit@f200 {
164 reg = <0xf200 0x200>;
165 };
166
167 MPSCROUTING: mpscrouting@b400 {
168 reg = <0xb400 0xc>;
169 };
170
171 MPSCINTR: mpscintr@b800 {
172 reg = <0xb800 0x100>;
173 virtual-reg = <0xd800b800>;
174 };
175
176 MPSC0: mpsc@8000 {
177 device_type = "serial";
178 compatible = "marvell,mv64360-mpsc";
179 reg = <0x8000 0x38>;
180 virtual-reg = <0xd8008000>;
181 sdma = <&SDMA0>;
182 brg = <&BRG0>;
183 cunit = <&CUNIT>;
184 mpscrouting = <&MPSCROUTING>;
185 mpscintr = <&MPSCINTR>;
186 cell-index = <0>;
187 interrupts = <40>;
188 interrupt-parent = <&PIC>;
189 };
190
191 MPSC1: mpsc@9000 {
192 device_type = "serial";
193 compatible = "marvell,mv64360-mpsc";
194 reg = <0x9000 0x38>;
195 virtual-reg = <0xd8009000>;
196 sdma = <&SDMA1>;
197 brg = <&BRG1>;
198 cunit = <&CUNIT>;
199 mpscrouting = <&MPSCROUTING>;
200 mpscintr = <&MPSCINTR>;
201 cell-index = <1>;
202 interrupts = <42>;
203 interrupt-parent = <&PIC>;
204 };
205
206 wdt@b410 { /* watchdog timer */
207 compatible = "marvell,mv64360-wdt";
208 reg = <0xb410 0x8>;
209 };
210
211 i2c@c000 {
212 compatible = "marvell,mv64360-i2c";
213 reg = <0xc000 0x20>;
214 virtual-reg = <0xd800c000>;
215 interrupts = <37>;
216 interrupt-parent = <&PIC>;
217 };
218
219 PIC: pic {
220 #interrupt-cells = <1>;
221 #address-cells = <0>;
222 compatible = "marvell,mv64360-pic";
223 reg = <0x0000 0x88>;
224 interrupt-controller;
225 };
226
227 mpp@f000 {
228 compatible = "marvell,mv64360-mpp";
229 reg = <0xf000 0x10>;
230 };
231
232 gpp@f100 {
233 compatible = "marvell,mv64360-gpp";
234 reg = <0xf100 0x20>;
235 };
236
237 PCI0: pci@80000000 {
238 #address-cells = <3>;
239 #size-cells = <2>;
240 #interrupt-cells = <1>;
241 device_type = "pci";
242 compatible = "marvell,mv64360-pci";
243 reg = <0x0cf8 0x8>;
244 ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000
245 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>;
246 bus-range = <0 255>;
247 clock-frequency = <66000000>;
248 interrupt-pci-iack = <0x0c34>;
249 interrupt-parent = <&PIC>;
250 interrupt-map-mask = <0x0000 0x0 0x0 0x7>;
251 interrupt-map = <
252 /* Only one interrupt line for PMC0 slot (INTA) */
253 0x0000 0 0 1 &PIC 88
254 >;
255 };
256
257
258 PCI1: pci@a0000000 {
259 #address-cells = <3>;
260 #size-cells = <2>;
261 #interrupt-cells = <1>;
262 device_type = "pci";
263 compatible = "marvell,mv64360-pci";
264 reg = <0x0c78 0x8>;
265 ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000
266 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>;
267 bus-range = <0 255>;
268 clock-frequency = <66000000>;
269 interrupt-pci-iack = <0x0cb4>;
270 interrupt-parent = <&PIC>;
271 interrupt-map-mask = <0xf800 0x00 0x00 0x7>;
272 interrupt-map = <
273 /* IDSEL 0x01: PMC1 ? */
274 0x0800 0 0 1 &PIC 88
275 /* IDSEL 0x02: cPCI bridge */
276 0x1000 0 0 1 &PIC 88
277 /* IDSEL 0x03: USB controller */
278 0x1800 0 0 1 &PIC 91
279 /* IDSEL 0x04: SATA controller */
280 0x2000 0 0 1 &PIC 95
281 >;
282 };
283
284 cpu-error@0070 {
285 compatible = "marvell,mv64360-cpu-error";
286 reg = <0x0070 0x10 0x0128 0x28>;
287 interrupts = <3>;
288 interrupt-parent = <&PIC>;
289 };
290
291 sram-ctrl@0380 {
292 compatible = "marvell,mv64360-sram-ctrl";
293 reg = <0x0380 0x80>;
294 interrupts = <13>;
295 interrupt-parent = <&PIC>;
296 };
297
298 pci-error@1d40 {
299 compatible = "marvell,mv64360-pci-error";
300 reg = <0x1d40 0x40 0x0c28 0x4>;
301 interrupts = <12>;
302 interrupt-parent = <&PIC>;
303 };
304
305 pci-error@1dc0 {
306 compatible = "marvell,mv64360-pci-error";
307 reg = <0x1dc0 0x40 0x0ca8 0x4>;
308 interrupts = <16>;
309 interrupt-parent = <&PIC>;
310 };
311
312 mem-ctrl@1400 {
313 compatible = "marvell,mv64360-mem-ctrl";
314 reg = <0x1400 0x60>;
315 interrupts = <17>;
316 interrupt-parent = <&PIC>;
317 };
318 /* Devices attached to the device controller */
319 devicebus@045c {
320 #address-cells = <2>;
321 #size-cells = <1>;
322 compatible = "marvell,mv64306-devctrl";
323 reg = <0x45C 0x88>;
324 interrupts = <1>;
325 interrupt-parent = <&PIC>;
326 ranges = <0 0 0xd8100000 0x10000
327 2 0 0xd8110000 0x10000
328 4 0 0xf8000000 0x8000000>;
329 fpga@0,0 {
330 compatible = "sbs,fpga-c2k";
331 reg = <0 0 0x10000>;
332 };
333 fpga_usart@2,0 {
334 compatible = "sbs,fpga_usart-c2k";
335 reg = <2 0 0x10000>;
336 };
337 nor_flash@4,0 {
338 compatible = "cfi-flash";
339 reg = <4 0 0x8000000>; /* 128MB */
340 bank-width = <4>;
341 device-width = <1>;
342 #address-cells = <1>;
343 #size-cells = <1>;
344 partition@0 {
345 label = "boot";
346 reg = <0x00000000 0x00080000>;
347 };
348 partition@40000 {
349 label = "kernel";
350 reg = <0x00080000 0x00400000>;
351 };
352 partition@440000 {
353 label = "initrd";
354 reg = <0x00480000 0x00B80000>;
355 };
356 partition@1000000 {
357 label = "rootfs";
358 reg = <0x01000000 0x06800000>;
359 };
360 partition@7800000 {
361 label = "recovery";
362 reg = <0x07800000 0x00800000>;
363 read-only;
364 };
365 };
366 };
367 };
368 chosen {
369 linux,stdout-path = &MPSC0;
370 };
371};
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index 39634124929b..79fe412c11c9 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <2>; 14 #address-cells = <2>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,canyonlands"; 16 model = "amcc,canyonlands";
15 compatible = "amcc,canyonlands"; 17 compatible = "amcc,canyonlands";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,460EX"; 33 model = "PowerPC,460EX";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */ 35 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <8000>; 39 i-cache-size = <32768>;
38 d-cache-size = <8000>; 40 d-cache-size = <32768>;
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0 0>; /* Filled in by U-Boot */ 48 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
47 }; 49 };
48 50
49 UIC0: interrupt-controller0 { 51 UIC0: interrupt-controller0 {
50 compatible = "ibm,uic-460ex","ibm,uic"; 52 compatible = "ibm,uic-460ex","ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 009>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -60,11 +62,11 @@
60 compatible = "ibm,uic-460ex","ibm,uic"; 62 compatible = "ibm,uic-460ex","ibm,uic";
61 interrupt-controller; 63 interrupt-controller;
62 cell-index = <1>; 64 cell-index = <1>;
63 dcr-reg = <0d0 009>; 65 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>; 66 #address-cells = <0>;
65 #size-cells = <0>; 67 #size-cells = <0>;
66 #interrupt-cells = <2>; 68 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */ 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>; 70 interrupt-parent = <&UIC0>;
69 }; 71 };
70 72
@@ -72,11 +74,11 @@
72 compatible = "ibm,uic-460ex","ibm,uic"; 74 compatible = "ibm,uic-460ex","ibm,uic";
73 interrupt-controller; 75 interrupt-controller;
74 cell-index = <2>; 76 cell-index = <2>;
75 dcr-reg = <0e0 009>; 77 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>; 78 #address-cells = <0>;
77 #size-cells = <0>; 79 #size-cells = <0>;
78 #interrupt-cells = <2>; 80 #interrupt-cells = <2>;
79 interrupts = <a 4 b 4>; /* cascade */ 81 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>; 82 interrupt-parent = <&UIC0>;
81 }; 83 };
82 84
@@ -84,22 +86,22 @@
84 compatible = "ibm,uic-460ex","ibm,uic"; 86 compatible = "ibm,uic-460ex","ibm,uic";
85 interrupt-controller; 87 interrupt-controller;
86 cell-index = <3>; 88 cell-index = <3>;
87 dcr-reg = <0f0 009>; 89 dcr-reg = <0x0f0 0x009>;
88 #address-cells = <0>; 90 #address-cells = <0>;
89 #size-cells = <0>; 91 #size-cells = <0>;
90 #interrupt-cells = <2>; 92 #interrupt-cells = <2>;
91 interrupts = <10 4 11 4>; /* cascade */ 93 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
92 interrupt-parent = <&UIC0>; 94 interrupt-parent = <&UIC0>;
93 }; 95 };
94 96
95 SDR0: sdr { 97 SDR0: sdr {
96 compatible = "ibm,sdr-460ex"; 98 compatible = "ibm,sdr-460ex";
97 dcr-reg = <00e 002>; 99 dcr-reg = <0x00e 0x002>;
98 }; 100 };
99 101
100 CPR0: cpr { 102 CPR0: cpr {
101 compatible = "ibm,cpr-460ex"; 103 compatible = "ibm,cpr-460ex";
102 dcr-reg = <00c 002>; 104 dcr-reg = <0x00c 0x002>;
103 }; 105 };
104 106
105 plb { 107 plb {
@@ -111,74 +113,74 @@
111 113
112 SDRAM0: sdram { 114 SDRAM0: sdram {
113 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; 115 compatible = "ibm,sdram-460ex", "ibm,sdram-405gp";
114 dcr-reg = <010 2>; 116 dcr-reg = <0x010 0x002>;
115 }; 117 };
116 118
117 MAL0: mcmal { 119 MAL0: mcmal {
118 compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; 120 compatible = "ibm,mcmal-460ex", "ibm,mcmal2";
119 dcr-reg = <180 62>; 121 dcr-reg = <0x180 0x062>;
120 num-tx-chans = <2>; 122 num-tx-chans = <2>;
121 num-rx-chans = <10>; 123 num-rx-chans = <16>;
122 #address-cells = <0>; 124 #address-cells = <0>;
123 #size-cells = <0>; 125 #size-cells = <0>;
124 interrupt-parent = <&UIC2>; 126 interrupt-parent = <&UIC2>;
125 interrupts = < /*TXEOB*/ 6 4 127 interrupts = < /*TXEOB*/ 0x6 0x4
126 /*RXEOB*/ 7 4 128 /*RXEOB*/ 0x7 0x4
127 /*SERR*/ 3 4 129 /*SERR*/ 0x3 0x4
128 /*TXDE*/ 4 4 130 /*TXDE*/ 0x4 0x4
129 /*RXDE*/ 5 4>; 131 /*RXDE*/ 0x5 0x4>;
130 }; 132 };
131 133
132 POB0: opb { 134 POB0: opb {
133 compatible = "ibm,opb-460ex", "ibm,opb"; 135 compatible = "ibm,opb-460ex", "ibm,opb";
134 #address-cells = <1>; 136 #address-cells = <1>;
135 #size-cells = <1>; 137 #size-cells = <1>;
136 ranges = <b0000000 4 b0000000 50000000>; 138 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
137 clock-frequency = <0>; /* Filled in by U-Boot */ 139 clock-frequency = <0>; /* Filled in by U-Boot */
138 140
139 EBC0: ebc { 141 EBC0: ebc {
140 compatible = "ibm,ebc-460ex", "ibm,ebc"; 142 compatible = "ibm,ebc-460ex", "ibm,ebc";
141 dcr-reg = <012 2>; 143 dcr-reg = <0x012 0x002>;
142 #address-cells = <2>; 144 #address-cells = <2>;
143 #size-cells = <1>; 145 #size-cells = <1>;
144 clock-frequency = <0>; /* Filled in by U-Boot */ 146 clock-frequency = <0>; /* Filled in by U-Boot */
145 /* ranges property is supplied by U-Boot */ 147 /* ranges property is supplied by U-Boot */
146 interrupts = <6 4>; 148 interrupts = <0x6 0x4>;
147 interrupt-parent = <&UIC1>; 149 interrupt-parent = <&UIC1>;
148 150
149 nor_flash@0,0 { 151 nor_flash@0,0 {
150 compatible = "amd,s29gl512n", "cfi-flash"; 152 compatible = "amd,s29gl512n", "cfi-flash";
151 bank-width = <2>; 153 bank-width = <2>;
152 reg = <0 000000 4000000>; 154 reg = <0x00000000 0x00000000 0x04000000>;
153 #address-cells = <1>; 155 #address-cells = <1>;
154 #size-cells = <1>; 156 #size-cells = <1>;
155 partition@0 { 157 partition@0 {
156 label = "kernel"; 158 label = "kernel";
157 reg = <0 1e0000>; 159 reg = <0x00000000 0x001e0000>;
158 }; 160 };
159 partition@1e0000 { 161 partition@1e0000 {
160 label = "dtb"; 162 label = "dtb";
161 reg = <1e0000 20000>; 163 reg = <0x001e0000 0x00020000>;
162 }; 164 };
163 partition@200000 { 165 partition@200000 {
164 label = "ramdisk"; 166 label = "ramdisk";
165 reg = <200000 1400000>; 167 reg = <0x00200000 0x01400000>;
166 }; 168 };
167 partition@1600000 { 169 partition@1600000 {
168 label = "jffs2"; 170 label = "jffs2";
169 reg = <1600000 400000>; 171 reg = <0x01600000 0x00400000>;
170 }; 172 };
171 partition@1a00000 { 173 partition@1a00000 {
172 label = "user"; 174 label = "user";
173 reg = <1a00000 2560000>; 175 reg = <0x01a00000 0x02560000>;
174 }; 176 };
175 partition@3f60000 { 177 partition@3f60000 {
176 label = "env"; 178 label = "env";
177 reg = <3f60000 40000>; 179 reg = <0x03f60000 0x00040000>;
178 }; 180 };
179 partition@3fa0000 { 181 partition@3fa0000 {
180 label = "u-boot"; 182 label = "u-boot";
181 reg = <3fa0000 60000>; 183 reg = <0x03fa0000 0x00060000>;
182 }; 184 };
183 }; 185 };
184 }; 186 };
@@ -186,103 +188,103 @@
186 UART0: serial@ef600300 { 188 UART0: serial@ef600300 {
187 device_type = "serial"; 189 device_type = "serial";
188 compatible = "ns16550"; 190 compatible = "ns16550";
189 reg = <ef600300 8>; 191 reg = <0xef600300 0x00000008>;
190 virtual-reg = <ef600300>; 192 virtual-reg = <0xef600300>;
191 clock-frequency = <0>; /* Filled in by U-Boot */ 193 clock-frequency = <0>; /* Filled in by U-Boot */
192 current-speed = <0>; /* Filled in by U-Boot */ 194 current-speed = <0>; /* Filled in by U-Boot */
193 interrupt-parent = <&UIC1>; 195 interrupt-parent = <&UIC1>;
194 interrupts = <1 4>; 196 interrupts = <0x1 0x4>;
195 }; 197 };
196 198
197 UART1: serial@ef600400 { 199 UART1: serial@ef600400 {
198 device_type = "serial"; 200 device_type = "serial";
199 compatible = "ns16550"; 201 compatible = "ns16550";
200 reg = <ef600400 8>; 202 reg = <0xef600400 0x00000008>;
201 virtual-reg = <ef600400>; 203 virtual-reg = <0xef600400>;
202 clock-frequency = <0>; /* Filled in by U-Boot */ 204 clock-frequency = <0>; /* Filled in by U-Boot */
203 current-speed = <0>; /* Filled in by U-Boot */ 205 current-speed = <0>; /* Filled in by U-Boot */
204 interrupt-parent = <&UIC0>; 206 interrupt-parent = <&UIC0>;
205 interrupts = <1 4>; 207 interrupts = <0x1 0x4>;
206 }; 208 };
207 209
208 UART2: serial@ef600500 { 210 UART2: serial@ef600500 {
209 device_type = "serial"; 211 device_type = "serial";
210 compatible = "ns16550"; 212 compatible = "ns16550";
211 reg = <ef600500 8>; 213 reg = <0xef600500 0x00000008>;
212 virtual-reg = <ef600500>; 214 virtual-reg = <0xef600500>;
213 clock-frequency = <0>; /* Filled in by U-Boot */ 215 clock-frequency = <0>; /* Filled in by U-Boot */
214 current-speed = <0>; /* Filled in by U-Boot */ 216 current-speed = <0>; /* Filled in by U-Boot */
215 interrupt-parent = <&UIC1>; 217 interrupt-parent = <&UIC1>;
216 interrupts = <1d 4>; 218 interrupts = <0x1d 0x4>;
217 }; 219 };
218 220
219 UART3: serial@ef600600 { 221 UART3: serial@ef600600 {
220 device_type = "serial"; 222 device_type = "serial";
221 compatible = "ns16550"; 223 compatible = "ns16550";
222 reg = <ef600600 8>; 224 reg = <0xef600600 0x00000008>;
223 virtual-reg = <ef600600>; 225 virtual-reg = <0xef600600>;
224 clock-frequency = <0>; /* Filled in by U-Boot */ 226 clock-frequency = <0>; /* Filled in by U-Boot */
225 current-speed = <0>; /* Filled in by U-Boot */ 227 current-speed = <0>; /* Filled in by U-Boot */
226 interrupt-parent = <&UIC1>; 228 interrupt-parent = <&UIC1>;
227 interrupts = <1e 4>; 229 interrupts = <0x1e 0x4>;
228 }; 230 };
229 231
230 IIC0: i2c@ef600700 { 232 IIC0: i2c@ef600700 {
231 compatible = "ibm,iic-460ex", "ibm,iic"; 233 compatible = "ibm,iic-460ex", "ibm,iic";
232 reg = <ef600700 14>; 234 reg = <0xef600700 0x00000014>;
233 interrupt-parent = <&UIC0>; 235 interrupt-parent = <&UIC0>;
234 interrupts = <2 4>; 236 interrupts = <0x2 0x4>;
235 }; 237 };
236 238
237 IIC1: i2c@ef600800 { 239 IIC1: i2c@ef600800 {
238 compatible = "ibm,iic-460ex", "ibm,iic"; 240 compatible = "ibm,iic-460ex", "ibm,iic";
239 reg = <ef600800 14>; 241 reg = <0xef600800 0x00000014>;
240 interrupt-parent = <&UIC0>; 242 interrupt-parent = <&UIC0>;
241 interrupts = <3 4>; 243 interrupts = <0x3 0x4>;
242 }; 244 };
243 245
244 ZMII0: emac-zmii@ef600d00 { 246 ZMII0: emac-zmii@ef600d00 {
245 compatible = "ibm,zmii-460ex", "ibm,zmii"; 247 compatible = "ibm,zmii-460ex", "ibm,zmii";
246 reg = <ef600d00 c>; 248 reg = <0xef600d00 0x0000000c>;
247 }; 249 };
248 250
249 RGMII0: emac-rgmii@ef601500 { 251 RGMII0: emac-rgmii@ef601500 {
250 compatible = "ibm,rgmii-460ex", "ibm,rgmii"; 252 compatible = "ibm,rgmii-460ex", "ibm,rgmii";
251 reg = <ef601500 8>; 253 reg = <0xef601500 0x00000008>;
252 has-mdio; 254 has-mdio;
253 }; 255 };
254 256
255 TAH0: emac-tah@ef601350 { 257 TAH0: emac-tah@ef601350 {
256 compatible = "ibm,tah-460ex", "ibm,tah"; 258 compatible = "ibm,tah-460ex", "ibm,tah";
257 reg = <ef601350 30>; 259 reg = <0xef601350 0x00000030>;
258 }; 260 };
259 261
260 TAH1: emac-tah@ef601450 { 262 TAH1: emac-tah@ef601450 {
261 compatible = "ibm,tah-460ex", "ibm,tah"; 263 compatible = "ibm,tah-460ex", "ibm,tah";
262 reg = <ef601450 30>; 264 reg = <0xef601450 0x00000030>;
263 }; 265 };
264 266
265 EMAC0: ethernet@ef600e00 { 267 EMAC0: ethernet@ef600e00 {
266 device_type = "network"; 268 device_type = "network";
267 compatible = "ibm,emac-460ex", "ibm,emac4"; 269 compatible = "ibm,emac-460ex", "ibm,emac4sync";
268 interrupt-parent = <&EMAC0>; 270 interrupt-parent = <&EMAC0>;
269 interrupts = <0 1>; 271 interrupts = <0x0 0x1>;
270 #interrupt-cells = <1>; 272 #interrupt-cells = <1>;
271 #address-cells = <0>; 273 #address-cells = <0>;
272 #size-cells = <0>; 274 #size-cells = <0>;
273 interrupt-map = </*Status*/ 0 &UIC2 10 4 275 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
274 /*Wake*/ 1 &UIC2 14 4>; 276 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
275 reg = <ef600e00 70>; 277 reg = <0xef600e00 0x000000c4>;
276 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 278 local-mac-address = [000000000000]; /* Filled in by U-Boot */
277 mal-device = <&MAL0>; 279 mal-device = <&MAL0>;
278 mal-tx-channel = <0>; 280 mal-tx-channel = <0>;
279 mal-rx-channel = <0>; 281 mal-rx-channel = <0>;
280 cell-index = <0>; 282 cell-index = <0>;
281 max-frame-size = <2328>; 283 max-frame-size = <9000>;
282 rx-fifo-size = <1000>; 284 rx-fifo-size = <4096>;
283 tx-fifo-size = <800>; 285 tx-fifo-size = <2048>;
284 phy-mode = "rgmii"; 286 phy-mode = "rgmii";
285 phy-map = <00000000>; 287 phy-map = <0x00000000>;
286 rgmii-device = <&RGMII0>; 288 rgmii-device = <&RGMII0>;
287 rgmii-channel = <0>; 289 rgmii-channel = <0>;
288 tah-device = <&TAH0>; 290 tah-device = <&TAH0>;
@@ -293,25 +295,25 @@
293 295
294 EMAC1: ethernet@ef600f00 { 296 EMAC1: ethernet@ef600f00 {
295 device_type = "network"; 297 device_type = "network";
296 compatible = "ibm,emac-460ex", "ibm,emac4"; 298 compatible = "ibm,emac-460ex", "ibm,emac4sync";
297 interrupt-parent = <&EMAC1>; 299 interrupt-parent = <&EMAC1>;
298 interrupts = <0 1>; 300 interrupts = <0x0 0x1>;
299 #interrupt-cells = <1>; 301 #interrupt-cells = <1>;
300 #address-cells = <0>; 302 #address-cells = <0>;
301 #size-cells = <0>; 303 #size-cells = <0>;
302 interrupt-map = </*Status*/ 0 &UIC2 11 4 304 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
303 /*Wake*/ 1 &UIC2 15 4>; 305 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
304 reg = <ef600f00 70>; 306 reg = <0xef600f00 0x000000c4>;
305 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 307 local-mac-address = [000000000000]; /* Filled in by U-Boot */
306 mal-device = <&MAL0>; 308 mal-device = <&MAL0>;
307 mal-tx-channel = <1>; 309 mal-tx-channel = <1>;
308 mal-rx-channel = <8>; 310 mal-rx-channel = <8>;
309 cell-index = <1>; 311 cell-index = <1>;
310 max-frame-size = <2328>; 312 max-frame-size = <9000>;
311 rx-fifo-size = <1000>; 313 rx-fifo-size = <4096>;
312 tx-fifo-size = <800>; 314 tx-fifo-size = <2048>;
313 phy-mode = "rgmii"; 315 phy-mode = "rgmii";
314 phy-map = <00000000>; 316 phy-map = <0x00000000>;
315 rgmii-device = <&RGMII0>; 317 rgmii-device = <&RGMII0>;
316 rgmii-channel = <1>; 318 rgmii-channel = <1>;
317 tah-device = <&TAH1>; 319 tah-device = <&TAH1>;
@@ -331,27 +333,27 @@
331 primary; 333 primary;
332 large-inbound-windows; 334 large-inbound-windows;
333 enable-msi-hole; 335 enable-msi-hole;
334 reg = <c 0ec00000 8 /* Config space access */ 336 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
335 0 0 0 /* no IACK cycles */ 337 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
336 c 0ed00000 4 /* Special cycles */ 338 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
337 c 0ec80000 100 /* Internal registers */ 339 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
338 c 0ec80100 fc>; /* Internal messaging registers */ 340 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
339 341
340 /* Outbound ranges, one memory and one IO, 342 /* Outbound ranges, one memory and one IO,
341 * later cannot be changed 343 * later cannot be changed
342 */ 344 */
343 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 345 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
344 01000000 0 00000000 0000000c 08000000 0 00010000>; 346 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
345 347
346 /* Inbound 2GB range starting at 0 */ 348 /* Inbound 2GB range starting at 0 */
347 dma-ranges = <42000000 0 0 0 0 0 80000000>; 349 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
348 350
349 /* This drives busses 0 to 0x3f */ 351 /* This drives busses 0 to 0x3f */
350 bus-range = <0 3f>; 352 bus-range = <0x0 0x3f>;
351 353
352 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ 354 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
353 interrupt-map-mask = <0000 0 0 0>; 355 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
354 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; 356 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
355 }; 357 };
356 358
357 PCIE0: pciex@d00000000 { 359 PCIE0: pciex@d00000000 {
@@ -361,23 +363,23 @@
361 #address-cells = <3>; 363 #address-cells = <3>;
362 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 364 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
363 primary; 365 primary;
364 port = <0>; /* port number */ 366 port = <0x0>; /* port number */
365 reg = <d 00000000 20000000 /* Config space access */ 367 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
366 c 08010000 00001000>; /* Registers */ 368 0x0000000c 0x08010000 0x00001000>; /* Registers */
367 dcr-reg = <100 020>; 369 dcr-reg = <0x100 0x020>;
368 sdr-base = <300>; 370 sdr-base = <0x300>;
369 371
370 /* Outbound ranges, one memory and one IO, 372 /* Outbound ranges, one memory and one IO,
371 * later cannot be changed 373 * later cannot be changed
372 */ 374 */
373 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 375 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
374 01000000 0 00000000 0000000f 80000000 0 00010000>; 376 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
375 377
376 /* Inbound 2GB range starting at 0 */ 378 /* Inbound 2GB range starting at 0 */
377 dma-ranges = <42000000 0 0 0 0 0 80000000>; 379 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
378 380
379 /* This drives busses 40 to 0x7f */ 381 /* This drives busses 40 to 0x7f */
380 bus-range = <40 7f>; 382 bus-range = <0x40 0x7f>;
381 383
382 /* Legacy interrupts (note the weird polarity, the bridge seems 384 /* Legacy interrupts (note the weird polarity, the bridge seems
383 * to invert PCIe legacy interrupts). 385 * to invert PCIe legacy interrupts).
@@ -387,12 +389,12 @@
387 * below are basically de-swizzled numbers. 389 * below are basically de-swizzled numbers.
388 * The real slot is on idsel 0, so the swizzling is 1:1 390 * The real slot is on idsel 0, so the swizzling is 1:1
389 */ 391 */
390 interrupt-map-mask = <0000 0 0 7>; 392 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
391 interrupt-map = < 393 interrupt-map = <
392 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ 394 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
393 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ 395 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
394 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ 396 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
395 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; 397 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
396 }; 398 };
397 399
398 PCIE1: pciex@d20000000 { 400 PCIE1: pciex@d20000000 {
@@ -402,23 +404,23 @@
402 #address-cells = <3>; 404 #address-cells = <3>;
403 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 405 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
404 primary; 406 primary;
405 port = <1>; /* port number */ 407 port = <0x1>; /* port number */
406 reg = <d 20000000 20000000 /* Config space access */ 408 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
407 c 08011000 00001000>; /* Registers */ 409 0x0000000c 0x08011000 0x00001000>; /* Registers */
408 dcr-reg = <120 020>; 410 dcr-reg = <0x120 0x020>;
409 sdr-base = <340>; 411 sdr-base = <0x340>;
410 412
411 /* Outbound ranges, one memory and one IO, 413 /* Outbound ranges, one memory and one IO,
412 * later cannot be changed 414 * later cannot be changed
413 */ 415 */
414 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 416 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
415 01000000 0 00000000 0000000f 80010000 0 00010000>; 417 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
416 418
417 /* Inbound 2GB range starting at 0 */ 419 /* Inbound 2GB range starting at 0 */
418 dma-ranges = <42000000 0 0 0 0 0 80000000>; 420 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
419 421
420 /* This drives busses 80 to 0xbf */ 422 /* This drives busses 80 to 0xbf */
421 bus-range = <80 bf>; 423 bus-range = <0x80 0xbf>;
422 424
423 /* Legacy interrupts (note the weird polarity, the bridge seems 425 /* Legacy interrupts (note the weird polarity, the bridge seems
424 * to invert PCIe legacy interrupts). 426 * to invert PCIe legacy interrupts).
@@ -428,12 +430,12 @@
428 * below are basically de-swizzled numbers. 430 * below are basically de-swizzled numbers.
429 * The real slot is on idsel 0, so the swizzling is 1:1 431 * The real slot is on idsel 0, so the swizzling is 1:1
430 */ 432 */
431 interrupt-map-mask = <0000 0 0 7>; 433 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
432 interrupt-map = < 434 interrupt-map = <
433 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ 435 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
434 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ 436 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
435 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ 437 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
436 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; 438 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
437 }; 439 };
438 }; 440 };
439}; 441};
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts
index 5079dc890e0e..ec2d142291b4 100644
--- a/arch/powerpc/boot/dts/ebony.dts
+++ b/arch/powerpc/boot/dts/ebony.dts
@@ -11,12 +11,14 @@
11 * any warranty of any kind, whether express or implied. 11 * any warranty of any kind, whether express or implied.
12 */ 12 */
13 13
14/dts-v1/;
15
14/ { 16/ {
15 #address-cells = <2>; 17 #address-cells = <2>;
16 #size-cells = <1>; 18 #size-cells = <1>;
17 model = "ibm,ebony"; 19 model = "ibm,ebony";
18 compatible = "ibm,ebony"; 20 compatible = "ibm,ebony";
19 dcr-parent = <&/cpus/cpu@0>; 21 dcr-parent = <&{/cpus/cpu@0}>;
20 22
21 aliases { 23 aliases {
22 ethernet0 = &EMAC0; 24 ethernet0 = &EMAC0;
@@ -32,13 +34,13 @@
32 cpu@0 { 34 cpu@0 {
33 device_type = "cpu"; 35 device_type = "cpu";
34 model = "PowerPC,440GP"; 36 model = "PowerPC,440GP";
35 reg = <0>; 37 reg = <0x00000000>;
36 clock-frequency = <0>; // Filled in by zImage 38 clock-frequency = <0>; // Filled in by zImage
37 timebase-frequency = <0>; // Filled in by zImage 39 timebase-frequency = <0>; // Filled in by zImage
38 i-cache-line-size = <20>; 40 i-cache-line-size = <32>;
39 d-cache-line-size = <20>; 41 d-cache-line-size = <32>;
40 i-cache-size = <8000>; /* 32 kB */ 42 i-cache-size = <32768>; /* 32 kB */
41 d-cache-size = <8000>; /* 32 kB */ 43 d-cache-size = <32768>; /* 32 kB */
42 dcr-controller; 44 dcr-controller;
43 dcr-access-method = "native"; 45 dcr-access-method = "native";
44 }; 46 };
@@ -46,14 +48,14 @@
46 48
47 memory { 49 memory {
48 device_type = "memory"; 50 device_type = "memory";
49 reg = <0 0 0>; // Filled in by zImage 51 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
50 }; 52 };
51 53
52 UIC0: interrupt-controller0 { 54 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-440gp", "ibm,uic"; 55 compatible = "ibm,uic-440gp", "ibm,uic";
54 interrupt-controller; 56 interrupt-controller;
55 cell-index = <0>; 57 cell-index = <0>;
56 dcr-reg = <0c0 009>; 58 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>; 59 #address-cells = <0>;
58 #size-cells = <0>; 60 #size-cells = <0>;
59 #interrupt-cells = <2>; 61 #interrupt-cells = <2>;
@@ -64,17 +66,17 @@
64 compatible = "ibm,uic-440gp", "ibm,uic"; 66 compatible = "ibm,uic-440gp", "ibm,uic";
65 interrupt-controller; 67 interrupt-controller;
66 cell-index = <1>; 68 cell-index = <1>;
67 dcr-reg = <0d0 009>; 69 dcr-reg = <0x0d0 0x009>;
68 #address-cells = <0>; 70 #address-cells = <0>;
69 #size-cells = <0>; 71 #size-cells = <0>;
70 #interrupt-cells = <2>; 72 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */ 73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
72 interrupt-parent = <&UIC0>; 74 interrupt-parent = <&UIC0>;
73 }; 75 };
74 76
75 CPC0: cpc { 77 CPC0: cpc {
76 compatible = "ibm,cpc-440gp"; 78 compatible = "ibm,cpc-440gp";
77 dcr-reg = <0b0 003 0e0 010>; 79 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
78 // FIXME: anything else? 80 // FIXME: anything else?
79 }; 81 };
80 82
@@ -87,37 +89,37 @@
87 89
88 SDRAM0: memory-controller { 90 SDRAM0: memory-controller {
89 compatible = "ibm,sdram-440gp"; 91 compatible = "ibm,sdram-440gp";
90 dcr-reg = <010 2>; 92 dcr-reg = <0x010 0x002>;
91 // FIXME: anything else? 93 // FIXME: anything else?
92 }; 94 };
93 95
94 SRAM0: sram { 96 SRAM0: sram {
95 compatible = "ibm,sram-440gp"; 97 compatible = "ibm,sram-440gp";
96 dcr-reg = <020 8 00a 1>; 98 dcr-reg = <0x020 0x008 0x00a 0x001>;
97 }; 99 };
98 100
99 DMA0: dma { 101 DMA0: dma {
100 // FIXME: ??? 102 // FIXME: ???
101 compatible = "ibm,dma-440gp"; 103 compatible = "ibm,dma-440gp";
102 dcr-reg = <100 027>; 104 dcr-reg = <0x100 0x027>;
103 }; 105 };
104 106
105 MAL0: mcmal { 107 MAL0: mcmal {
106 compatible = "ibm,mcmal-440gp", "ibm,mcmal"; 108 compatible = "ibm,mcmal-440gp", "ibm,mcmal";
107 dcr-reg = <180 62>; 109 dcr-reg = <0x180 0x062>;
108 num-tx-chans = <4>; 110 num-tx-chans = <4>;
109 num-rx-chans = <4>; 111 num-rx-chans = <4>;
110 interrupt-parent = <&MAL0>; 112 interrupt-parent = <&MAL0>;
111 interrupts = <0 1 2 3 4>; 113 interrupts = <0x0 0x1 0x2 0x3 0x4>;
112 #interrupt-cells = <1>; 114 #interrupt-cells = <1>;
113 #address-cells = <0>; 115 #address-cells = <0>;
114 #size-cells = <0>; 116 #size-cells = <0>;
115 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 117 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
116 /*RXEOB*/ 1 &UIC0 b 4 118 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
117 /*SERR*/ 2 &UIC1 0 4 119 /*SERR*/ 0x2 &UIC1 0x0 0x4
118 /*TXDE*/ 3 &UIC1 1 4 120 /*TXDE*/ 0x3 &UIC1 0x1 0x4
119 /*RXDE*/ 4 &UIC1 2 4>; 121 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
120 interrupt-map-mask = <ffffffff>; 122 interrupt-map-mask = <0xffffffff>;
121 }; 123 };
122 124
123 POB0: opb { 125 POB0: opb {
@@ -126,34 +128,34 @@
126 #size-cells = <1>; 128 #size-cells = <1>;
127 /* Wish there was a nicer way of specifying a full 32-bit 129 /* Wish there was a nicer way of specifying a full 32-bit
128 range */ 130 range */
129 ranges = <00000000 1 00000000 80000000 131 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
130 80000000 1 80000000 80000000>; 132 0x80000000 0x00000001 0x80000000 0x80000000>;
131 dcr-reg = <090 00b>; 133 dcr-reg = <0x090 0x00b>;
132 interrupt-parent = <&UIC1>; 134 interrupt-parent = <&UIC1>;
133 interrupts = <7 4>; 135 interrupts = <0x7 0x4>;
134 clock-frequency = <0>; // Filled in by zImage 136 clock-frequency = <0>; // Filled in by zImage
135 137
136 EBC0: ebc { 138 EBC0: ebc {
137 compatible = "ibm,ebc-440gp", "ibm,ebc"; 139 compatible = "ibm,ebc-440gp", "ibm,ebc";
138 dcr-reg = <012 2>; 140 dcr-reg = <0x012 0x002>;
139 #address-cells = <2>; 141 #address-cells = <2>;
140 #size-cells = <1>; 142 #size-cells = <1>;
141 clock-frequency = <0>; // Filled in by zImage 143 clock-frequency = <0>; // Filled in by zImage
142 // ranges property is supplied by zImage 144 // ranges property is supplied by zImage
143 // based on firmware's configuration of the 145 // based on firmware's configuration of the
144 // EBC bridge 146 // EBC bridge
145 interrupts = <5 4>; 147 interrupts = <0x5 0x4>;
146 interrupt-parent = <&UIC1>; 148 interrupt-parent = <&UIC1>;
147 149
148 small-flash@0,80000 { 150 small-flash@0,80000 {
149 compatible = "jedec-flash"; 151 compatible = "jedec-flash";
150 bank-width = <1>; 152 bank-width = <1>;
151 reg = <0 80000 80000>; 153 reg = <0x00000000 0x00080000 0x00080000>;
152 #address-cells = <1>; 154 #address-cells = <1>;
153 #size-cells = <1>; 155 #size-cells = <1>;
154 partition@0 { 156 partition@0 {
155 label = "OpenBIOS"; 157 label = "OpenBIOS";
156 reg = <0 80000>; 158 reg = <0x00000000 0x00080000>;
157 read-only; 159 read-only;
158 }; 160 };
159 }; 161 };
@@ -161,101 +163,101 @@
161 nvram@1,0 { 163 nvram@1,0 {
162 /* NVRAM & RTC */ 164 /* NVRAM & RTC */
163 compatible = "ds1743-nvram"; 165 compatible = "ds1743-nvram";
164 #bytes = <2000>; 166 #bytes = <0x2000>;
165 reg = <1 0 2000>; 167 reg = <0x00000001 0x00000000 0x00002000>;
166 }; 168 };
167 169
168 large-flash@2,0 { 170 large-flash@2,0 {
169 compatible = "jedec-flash"; 171 compatible = "jedec-flash";
170 bank-width = <1>; 172 bank-width = <1>;
171 reg = <2 0 400000>; 173 reg = <0x00000002 0x00000000 0x00400000>;
172 #address-cells = <1>; 174 #address-cells = <1>;
173 #size-cells = <1>; 175 #size-cells = <1>;
174 partition@0 { 176 partition@0 {
175 label = "fs"; 177 label = "fs";
176 reg = <0 380000>; 178 reg = <0x00000000 0x00380000>;
177 }; 179 };
178 partition@380000 { 180 partition@380000 {
179 label = "firmware"; 181 label = "firmware";
180 reg = <380000 80000>; 182 reg = <0x00380000 0x00080000>;
181 }; 183 };
182 }; 184 };
183 185
184 ir@3,0 { 186 ir@3,0 {
185 reg = <3 0 10>; 187 reg = <0x00000003 0x00000000 0x00000010>;
186 }; 188 };
187 189
188 fpga@7,0 { 190 fpga@7,0 {
189 compatible = "Ebony-FPGA"; 191 compatible = "Ebony-FPGA";
190 reg = <7 0 10>; 192 reg = <0x00000007 0x00000000 0x00000010>;
191 virtual-reg = <e8300000>; 193 virtual-reg = <0xe8300000>;
192 }; 194 };
193 }; 195 };
194 196
195 UART0: serial@40000200 { 197 UART0: serial@40000200 {
196 device_type = "serial"; 198 device_type = "serial";
197 compatible = "ns16550"; 199 compatible = "ns16550";
198 reg = <40000200 8>; 200 reg = <0x40000200 0x00000008>;
199 virtual-reg = <e0000200>; 201 virtual-reg = <0xe0000200>;
200 clock-frequency = <A8C000>; 202 clock-frequency = <11059200>;
201 current-speed = <2580>; 203 current-speed = <9600>;
202 interrupt-parent = <&UIC0>; 204 interrupt-parent = <&UIC0>;
203 interrupts = <0 4>; 205 interrupts = <0x0 0x4>;
204 }; 206 };
205 207
206 UART1: serial@40000300 { 208 UART1: serial@40000300 {
207 device_type = "serial"; 209 device_type = "serial";
208 compatible = "ns16550"; 210 compatible = "ns16550";
209 reg = <40000300 8>; 211 reg = <0x40000300 0x00000008>;
210 virtual-reg = <e0000300>; 212 virtual-reg = <0xe0000300>;
211 clock-frequency = <A8C000>; 213 clock-frequency = <11059200>;
212 current-speed = <2580>; 214 current-speed = <9600>;
213 interrupt-parent = <&UIC0>; 215 interrupt-parent = <&UIC0>;
214 interrupts = <1 4>; 216 interrupts = <0x1 0x4>;
215 }; 217 };
216 218
217 IIC0: i2c@40000400 { 219 IIC0: i2c@40000400 {
218 /* FIXME */ 220 /* FIXME */
219 compatible = "ibm,iic-440gp", "ibm,iic"; 221 compatible = "ibm,iic-440gp", "ibm,iic";
220 reg = <40000400 14>; 222 reg = <0x40000400 0x00000014>;
221 interrupt-parent = <&UIC0>; 223 interrupt-parent = <&UIC0>;
222 interrupts = <2 4>; 224 interrupts = <0x2 0x4>;
223 }; 225 };
224 IIC1: i2c@40000500 { 226 IIC1: i2c@40000500 {
225 /* FIXME */ 227 /* FIXME */
226 compatible = "ibm,iic-440gp", "ibm,iic"; 228 compatible = "ibm,iic-440gp", "ibm,iic";
227 reg = <40000500 14>; 229 reg = <0x40000500 0x00000014>;
228 interrupt-parent = <&UIC0>; 230 interrupt-parent = <&UIC0>;
229 interrupts = <3 4>; 231 interrupts = <0x3 0x4>;
230 }; 232 };
231 233
232 GPIO0: gpio@40000700 { 234 GPIO0: gpio@40000700 {
233 /* FIXME */ 235 /* FIXME */
234 compatible = "ibm,gpio-440gp"; 236 compatible = "ibm,gpio-440gp";
235 reg = <40000700 20>; 237 reg = <0x40000700 0x00000020>;
236 }; 238 };
237 239
238 ZMII0: emac-zmii@40000780 { 240 ZMII0: emac-zmii@40000780 {
239 compatible = "ibm,zmii-440gp", "ibm,zmii"; 241 compatible = "ibm,zmii-440gp", "ibm,zmii";
240 reg = <40000780 c>; 242 reg = <0x40000780 0x0000000c>;
241 }; 243 };
242 244
243 EMAC0: ethernet@40000800 { 245 EMAC0: ethernet@40000800 {
244 device_type = "network"; 246 device_type = "network";
245 compatible = "ibm,emac-440gp", "ibm,emac"; 247 compatible = "ibm,emac-440gp", "ibm,emac";
246 interrupt-parent = <&UIC1>; 248 interrupt-parent = <&UIC1>;
247 interrupts = <1c 4 1d 4>; 249 interrupts = <0x1c 0x4 0x1d 0x4>;
248 reg = <40000800 70>; 250 reg = <0x40000800 0x00000070>;
249 local-mac-address = [000000000000]; // Filled in by zImage 251 local-mac-address = [000000000000]; // Filled in by zImage
250 mal-device = <&MAL0>; 252 mal-device = <&MAL0>;
251 mal-tx-channel = <0 1>; 253 mal-tx-channel = <0 1>;
252 mal-rx-channel = <0>; 254 mal-rx-channel = <0>;
253 cell-index = <0>; 255 cell-index = <0>;
254 max-frame-size = <5dc>; 256 max-frame-size = <1500>;
255 rx-fifo-size = <1000>; 257 rx-fifo-size = <4096>;
256 tx-fifo-size = <800>; 258 tx-fifo-size = <2048>;
257 phy-mode = "rmii"; 259 phy-mode = "rmii";
258 phy-map = <00000001>; 260 phy-map = <0x00000001>;
259 zmii-device = <&ZMII0>; 261 zmii-device = <&ZMII0>;
260 zmii-channel = <0>; 262 zmii-channel = <0>;
261 }; 263 };
@@ -263,18 +265,18 @@
263 device_type = "network"; 265 device_type = "network";
264 compatible = "ibm,emac-440gp", "ibm,emac"; 266 compatible = "ibm,emac-440gp", "ibm,emac";
265 interrupt-parent = <&UIC1>; 267 interrupt-parent = <&UIC1>;
266 interrupts = <1e 4 1f 4>; 268 interrupts = <0x1e 0x4 0x1f 0x4>;
267 reg = <40000900 70>; 269 reg = <0x40000900 0x00000070>;
268 local-mac-address = [000000000000]; // Filled in by zImage 270 local-mac-address = [000000000000]; // Filled in by zImage
269 mal-device = <&MAL0>; 271 mal-device = <&MAL0>;
270 mal-tx-channel = <2 3>; 272 mal-tx-channel = <2 3>;
271 mal-rx-channel = <1>; 273 mal-rx-channel = <1>;
272 cell-index = <1>; 274 cell-index = <1>;
273 max-frame-size = <5dc>; 275 max-frame-size = <1500>;
274 rx-fifo-size = <1000>; 276 rx-fifo-size = <4096>;
275 tx-fifo-size = <800>; 277 tx-fifo-size = <2048>;
276 phy-mode = "rmii"; 278 phy-mode = "rmii";
277 phy-map = <00000001>; 279 phy-map = <0x00000001>;
278 zmii-device = <&ZMII0>; 280 zmii-device = <&ZMII0>;
279 zmii-channel = <1>; 281 zmii-channel = <1>;
280 }; 282 };
@@ -282,9 +284,9 @@
282 284
283 GPT0: gpt@40000a00 { 285 GPT0: gpt@40000a00 {
284 /* FIXME */ 286 /* FIXME */
285 reg = <40000a00 d4>; 287 reg = <0x40000a00 0x000000d4>;
286 interrupt-parent = <&UIC0>; 288 interrupt-parent = <&UIC0>;
287 interrupts = <12 4 13 4 14 4 15 4 16 4>; 289 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
288 }; 290 };
289 291
290 }; 292 };
@@ -296,35 +298,35 @@
296 #address-cells = <3>; 298 #address-cells = <3>;
297 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; 299 compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix";
298 primary; 300 primary;
299 reg = <2 0ec00000 8 /* Config space access */ 301 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
300 0 0 0 /* no IACK cycles */ 302 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
301 2 0ed00000 4 /* Special cycles */ 303 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
302 2 0ec80000 f0 /* Internal registers */ 304 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */
303 2 0ec80100 fc>; /* Internal messaging registers */ 305 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
304 306
305 /* Outbound ranges, one memory and one IO, 307 /* Outbound ranges, one memory and one IO,
306 * later cannot be changed 308 * later cannot be changed
307 */ 309 */
308 ranges = <02000000 0 80000000 00000003 80000000 0 80000000 310 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
309 01000000 0 00000000 00000002 08000000 0 00010000>; 311 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
310 312
311 /* Inbound 2GB range starting at 0 */ 313 /* Inbound 2GB range starting at 0 */
312 dma-ranges = <42000000 0 0 0 0 0 80000000>; 314 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
313 315
314 /* Ebony has all 4 IRQ pins tied together per slot */ 316 /* Ebony has all 4 IRQ pins tied together per slot */
315 interrupt-map-mask = <f800 0 0 0>; 317 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
316 interrupt-map = < 318 interrupt-map = <
317 /* IDSEL 1 */ 319 /* IDSEL 1 */
318 0800 0 0 0 &UIC0 17 8 320 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8
319 321
320 /* IDSEL 2 */ 322 /* IDSEL 2 */
321 1000 0 0 0 &UIC0 18 8 323 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8
322 324
323 /* IDSEL 3 */ 325 /* IDSEL 3 */
324 1800 0 0 0 &UIC0 19 8 326 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8
325 327
326 /* IDSEL 4 */ 328 /* IDSEL 4 */
327 2000 0 0 0 &UIC0 1a 8 329 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8
328 >; 330 >;
329 }; 331 };
330 }; 332 };
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts
index 92938557ac8a..53ef06cc2134 100644
--- a/arch/powerpc/boot/dts/ep405.dts
+++ b/arch/powerpc/boot/dts/ep405.dts
@@ -9,12 +9,14 @@
9 * any warranty of any kind, whether express or implied. 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 #address-cells = <1>; 15 #address-cells = <1>;
14 #size-cells = <1>; 16 #size-cells = <1>;
15 model = "ep405"; 17 model = "ep405";
16 compatible = "ep405"; 18 compatible = "ep405";
17 dcr-parent = <&/cpus/cpu@0>; 19 dcr-parent = <&{/cpus/cpu@0}>;
18 20
19 aliases { 21 aliases {
20 ethernet0 = &EMAC; 22 ethernet0 = &EMAC;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,405GP"; 33 model = "PowerPC,405GP";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <bebc200>; /* Filled in by zImage */ 35 clock-frequency = <200000000>; /* Filled in by zImage */
34 timebase-frequency = <0>; /* Filled in by zImage */ 36 timebase-frequency = <0>; /* Filled in by zImage */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <4000>; 39 i-cache-size = <16384>;
38 d-cache-size = <4000>; 40 d-cache-size = <16384>;
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0>; /* Filled in by zImage */ 48 reg = <0x00000000 0x00000000>; /* Filled in by zImage */
47 }; 49 };
48 50
49 UIC0: interrupt-controller { 51 UIC0: interrupt-controller {
50 compatible = "ibm,uic"; 52 compatible = "ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 9>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -65,91 +67,91 @@
65 67
66 SDRAM0: memory-controller { 68 SDRAM0: memory-controller {
67 compatible = "ibm,sdram-405gp"; 69 compatible = "ibm,sdram-405gp";
68 dcr-reg = <010 2>; 70 dcr-reg = <0x010 0x002>;
69 }; 71 };
70 72
71 MAL: mcmal { 73 MAL: mcmal {
72 compatible = "ibm,mcmal-405gp", "ibm,mcmal"; 74 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
73 dcr-reg = <180 62>; 75 dcr-reg = <0x180 0x062>;
74 num-tx-chans = <1>; 76 num-tx-chans = <1>;
75 num-rx-chans = <1>; 77 num-rx-chans = <1>;
76 interrupt-parent = <&UIC0>; 78 interrupt-parent = <&UIC0>;
77 interrupts = < 79 interrupts = <
78 b 4 /* TXEOB */ 80 0xb 0x4 /* TXEOB */
79 c 4 /* RXEOB */ 81 0xc 0x4 /* RXEOB */
80 a 4 /* SERR */ 82 0xa 0x4 /* SERR */
81 d 4 /* TXDE */ 83 0xd 0x4 /* TXDE */
82 e 4 /* RXDE */>; 84 0xe 0x4 /* RXDE */>;
83 }; 85 };
84 86
85 POB0: opb { 87 POB0: opb {
86 compatible = "ibm,opb-405gp", "ibm,opb"; 88 compatible = "ibm,opb-405gp", "ibm,opb";
87 #address-cells = <1>; 89 #address-cells = <1>;
88 #size-cells = <1>; 90 #size-cells = <1>;
89 ranges = <ef600000 ef600000 a00000>; 91 ranges = <0xef600000 0xef600000 0x00a00000>;
90 dcr-reg = <0a0 5>; 92 dcr-reg = <0x0a0 0x005>;
91 clock-frequency = <0>; /* Filled in by zImage */ 93 clock-frequency = <0>; /* Filled in by zImage */
92 94
93 UART0: serial@ef600300 { 95 UART0: serial@ef600300 {
94 device_type = "serial"; 96 device_type = "serial";
95 compatible = "ns16550"; 97 compatible = "ns16550";
96 reg = <ef600300 8>; 98 reg = <0xef600300 0x00000008>;
97 virtual-reg = <ef600300>; 99 virtual-reg = <0xef600300>;
98 clock-frequency = <0>; /* Filled in by zImage */ 100 clock-frequency = <0>; /* Filled in by zImage */
99 current-speed = <2580>; 101 current-speed = <9600>;
100 interrupt-parent = <&UIC0>; 102 interrupt-parent = <&UIC0>;
101 interrupts = <0 4>; 103 interrupts = <0x0 0x4>;
102 }; 104 };
103 105
104 UART1: serial@ef600400 { 106 UART1: serial@ef600400 {
105 device_type = "serial"; 107 device_type = "serial";
106 compatible = "ns16550"; 108 compatible = "ns16550";
107 reg = <ef600400 8>; 109 reg = <0xef600400 0x00000008>;
108 virtual-reg = <ef600400>; 110 virtual-reg = <0xef600400>;
109 clock-frequency = <0>; /* Filled in by zImage */ 111 clock-frequency = <0>; /* Filled in by zImage */
110 current-speed = <2580>; 112 current-speed = <9600>;
111 interrupt-parent = <&UIC0>; 113 interrupt-parent = <&UIC0>;
112 interrupts = <1 4>; 114 interrupts = <0x1 0x4>;
113 }; 115 };
114 116
115 IIC: i2c@ef600500 { 117 IIC: i2c@ef600500 {
116 compatible = "ibm,iic-405gp", "ibm,iic"; 118 compatible = "ibm,iic-405gp", "ibm,iic";
117 reg = <ef600500 11>; 119 reg = <0xef600500 0x00000011>;
118 interrupt-parent = <&UIC0>; 120 interrupt-parent = <&UIC0>;
119 interrupts = <2 4>; 121 interrupts = <0x2 0x4>;
120 }; 122 };
121 123
122 GPIO: gpio@ef600700 { 124 GPIO: gpio@ef600700 {
123 compatible = "ibm,gpio-405gp"; 125 compatible = "ibm,gpio-405gp";
124 reg = <ef600700 20>; 126 reg = <0xef600700 0x00000020>;
125 }; 127 };
126 128
127 EMAC: ethernet@ef600800 { 129 EMAC: ethernet@ef600800 {
128 linux,network-index = <0>; 130 linux,network-index = <0x0>;
129 device_type = "network"; 131 device_type = "network";
130 compatible = "ibm,emac-405gp", "ibm,emac"; 132 compatible = "ibm,emac-405gp", "ibm,emac";
131 interrupt-parent = <&UIC0>; 133 interrupt-parent = <&UIC0>;
132 interrupts = < 134 interrupts = <
133 f 4 /* Ethernet */ 135 0xf 0x4 /* Ethernet */
134 9 4 /* Ethernet Wake Up */>; 136 0x9 0x4 /* Ethernet Wake Up */>;
135 local-mac-address = [000000000000]; /* Filled in by zImage */ 137 local-mac-address = [000000000000]; /* Filled in by zImage */
136 reg = <ef600800 70>; 138 reg = <0xef600800 0x00000070>;
137 mal-device = <&MAL>; 139 mal-device = <&MAL>;
138 mal-tx-channel = <0>; 140 mal-tx-channel = <0>;
139 mal-rx-channel = <0>; 141 mal-rx-channel = <0>;
140 cell-index = <0>; 142 cell-index = <0>;
141 max-frame-size = <5dc>; 143 max-frame-size = <1500>;
142 rx-fifo-size = <1000>; 144 rx-fifo-size = <4096>;
143 tx-fifo-size = <800>; 145 tx-fifo-size = <2048>;
144 phy-mode = "rmii"; 146 phy-mode = "rmii";
145 phy-map = <00000000>; 147 phy-map = <0x00000000>;
146 }; 148 };
147 149
148 }; 150 };
149 151
150 EBC0: ebc { 152 EBC0: ebc {
151 compatible = "ibm,ebc-405gp", "ibm,ebc"; 153 compatible = "ibm,ebc-405gp", "ibm,ebc";
152 dcr-reg = <012 2>; 154 dcr-reg = <0x012 0x002>;
153 #address-cells = <2>; 155 #address-cells = <2>;
154 #size-cells = <1>; 156 #size-cells = <1>;
155 157
@@ -163,13 +165,13 @@
163 /* NVRAM and RTC */ 165 /* NVRAM and RTC */
164 nvrtc@4,200000 { 166 nvrtc@4,200000 {
165 compatible = "ds1742"; 167 compatible = "ds1742";
166 reg = <4 200000 0>; /* size fixed up by zImage */ 168 reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */
167 }; 169 };
168 170
169 /* "BCSR" CPLD contains a PCI irq controller */ 171 /* "BCSR" CPLD contains a PCI irq controller */
170 bcsr@4,0 { 172 bcsr@4,0 {
171 compatible = "ep405-bcsr"; 173 compatible = "ep405-bcsr";
172 reg = <4 0 10>; 174 reg = <0x00000004 0x00000000 0x00000010>;
173 interrupt-controller; 175 interrupt-controller;
174 /* Routing table */ 176 /* Routing table */
175 irq-routing = [ 00 /* SYSERR */ 177 irq-routing = [ 00 /* SYSERR */
@@ -198,26 +200,26 @@
198 #address-cells = <3>; 200 #address-cells = <3>;
199 compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; 201 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
200 primary; 202 primary;
201 reg = <eec00000 8 /* Config space access */ 203 reg = <0xeec00000 0x00000008 /* Config space access */
202 eed80000 4 /* IACK */ 204 0xeed80000 0x00000004 /* IACK */
203 eed80000 4 /* Special cycle */ 205 0xeed80000 0x00000004 /* Special cycle */
204 ef480000 40>; /* Internal registers */ 206 0xef480000 0x00000040>; /* Internal registers */
205 207
206 /* Outbound ranges, one memory and one IO, 208 /* Outbound ranges, one memory and one IO,
207 * later cannot be changed. Chip supports a second 209 * later cannot be changed. Chip supports a second
208 * IO range but we don't use it for now 210 * IO range but we don't use it for now
209 */ 211 */
210 ranges = <02000000 0 80000000 80000000 0 20000000 212 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
211 01000000 0 00000000 e8000000 0 00010000>; 213 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
212 214
213 /* Inbound 2GB range starting at 0 */ 215 /* Inbound 2GB range starting at 0 */
214 dma-ranges = <42000000 0 0 0 0 80000000>; 216 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
215 217
216 /* That's all I know about IRQs on that thing ... */ 218 /* That's all I know about IRQs on that thing ... */
217 interrupt-map-mask = <f800 0 0 0>; 219 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
218 interrupt-map = < 220 interrupt-map = <
219 /* USB */ 221 /* USB */
220 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */ 222 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */
221 >; 223 >;
222 }; 224 };
223 }; 225 };
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts
index 0f2fc077d8db..24cf0dba120c 100644
--- a/arch/powerpc/boot/dts/glacier.dts
+++ b/arch/powerpc/boot/dts/glacier.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <2>; 14 #address-cells = <2>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,glacier"; 16 model = "amcc,glacier";
15 compatible = "amcc,glacier", "amcc,canyonlands"; 17 compatible = "amcc,glacier", "amcc,canyonlands";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -31,13 +33,13 @@
31 cpu@0 { 33 cpu@0 {
32 device_type = "cpu"; 34 device_type = "cpu";
33 model = "PowerPC,460GT"; 35 model = "PowerPC,460GT";
34 reg = <0>; 36 reg = <0x00000000>;
35 clock-frequency = <0>; /* Filled in by U-Boot */ 37 clock-frequency = <0>; /* Filled in by U-Boot */
36 timebase-frequency = <0>; /* Filled in by U-Boot */ 38 timebase-frequency = <0>; /* Filled in by U-Boot */
37 i-cache-line-size = <20>; 39 i-cache-line-size = <32>;
38 d-cache-line-size = <20>; 40 d-cache-line-size = <32>;
39 i-cache-size = <8000>; 41 i-cache-size = <32768>;
40 d-cache-size = <8000>; 42 d-cache-size = <32768>;
41 dcr-controller; 43 dcr-controller;
42 dcr-access-method = "native"; 44 dcr-access-method = "native";
43 }; 45 };
@@ -45,14 +47,14 @@
45 47
46 memory { 48 memory {
47 device_type = "memory"; 49 device_type = "memory";
48 reg = <0 0 0>; /* Filled in by U-Boot */ 50 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
49 }; 51 };
50 52
51 UIC0: interrupt-controller0 { 53 UIC0: interrupt-controller0 {
52 compatible = "ibm,uic-460gt","ibm,uic"; 54 compatible = "ibm,uic-460gt","ibm,uic";
53 interrupt-controller; 55 interrupt-controller;
54 cell-index = <0>; 56 cell-index = <0>;
55 dcr-reg = <0c0 009>; 57 dcr-reg = <0x0c0 0x009>;
56 #address-cells = <0>; 58 #address-cells = <0>;
57 #size-cells = <0>; 59 #size-cells = <0>;
58 #interrupt-cells = <2>; 60 #interrupt-cells = <2>;
@@ -62,11 +64,11 @@
62 compatible = "ibm,uic-460gt","ibm,uic"; 64 compatible = "ibm,uic-460gt","ibm,uic";
63 interrupt-controller; 65 interrupt-controller;
64 cell-index = <1>; 66 cell-index = <1>;
65 dcr-reg = <0d0 009>; 67 dcr-reg = <0x0d0 0x009>;
66 #address-cells = <0>; 68 #address-cells = <0>;
67 #size-cells = <0>; 69 #size-cells = <0>;
68 #interrupt-cells = <2>; 70 #interrupt-cells = <2>;
69 interrupts = <1e 4 1f 4>; /* cascade */ 71 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
70 interrupt-parent = <&UIC0>; 72 interrupt-parent = <&UIC0>;
71 }; 73 };
72 74
@@ -74,11 +76,11 @@
74 compatible = "ibm,uic-460gt","ibm,uic"; 76 compatible = "ibm,uic-460gt","ibm,uic";
75 interrupt-controller; 77 interrupt-controller;
76 cell-index = <2>; 78 cell-index = <2>;
77 dcr-reg = <0e0 009>; 79 dcr-reg = <0x0e0 0x009>;
78 #address-cells = <0>; 80 #address-cells = <0>;
79 #size-cells = <0>; 81 #size-cells = <0>;
80 #interrupt-cells = <2>; 82 #interrupt-cells = <2>;
81 interrupts = <a 4 b 4>; /* cascade */ 83 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
82 interrupt-parent = <&UIC0>; 84 interrupt-parent = <&UIC0>;
83 }; 85 };
84 86
@@ -86,22 +88,22 @@
86 compatible = "ibm,uic-460gt","ibm,uic"; 88 compatible = "ibm,uic-460gt","ibm,uic";
87 interrupt-controller; 89 interrupt-controller;
88 cell-index = <3>; 90 cell-index = <3>;
89 dcr-reg = <0f0 009>; 91 dcr-reg = <0x0f0 0x009>;
90 #address-cells = <0>; 92 #address-cells = <0>;
91 #size-cells = <0>; 93 #size-cells = <0>;
92 #interrupt-cells = <2>; 94 #interrupt-cells = <2>;
93 interrupts = <10 4 11 4>; /* cascade */ 95 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
94 interrupt-parent = <&UIC0>; 96 interrupt-parent = <&UIC0>;
95 }; 97 };
96 98
97 SDR0: sdr { 99 SDR0: sdr {
98 compatible = "ibm,sdr-460gt"; 100 compatible = "ibm,sdr-460gt";
99 dcr-reg = <00e 002>; 101 dcr-reg = <0x00e 0x002>;
100 }; 102 };
101 103
102 CPR0: cpr { 104 CPR0: cpr {
103 compatible = "ibm,cpr-460gt"; 105 compatible = "ibm,cpr-460gt";
104 dcr-reg = <00c 002>; 106 dcr-reg = <0x00c 0x002>;
105 }; 107 };
106 108
107 plb { 109 plb {
@@ -113,75 +115,75 @@
113 115
114 SDRAM0: sdram { 116 SDRAM0: sdram {
115 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; 117 compatible = "ibm,sdram-460gt", "ibm,sdram-405gp";
116 dcr-reg = <010 2>; 118 dcr-reg = <0x010 0x002>;
117 }; 119 };
118 120
119 MAL0: mcmal { 121 MAL0: mcmal {
120 compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; 122 compatible = "ibm,mcmal-460gt", "ibm,mcmal2";
121 dcr-reg = <180 62>; 123 dcr-reg = <0x180 0x062>;
122 num-tx-chans = <4>; 124 num-tx-chans = <4>;
123 num-rx-chans = <20>; 125 num-rx-chans = <32>;
124 #address-cells = <0>; 126 #address-cells = <0>;
125 #size-cells = <0>; 127 #size-cells = <0>;
126 interrupt-parent = <&UIC2>; 128 interrupt-parent = <&UIC2>;
127 interrupts = < /*TXEOB*/ 6 4 129 interrupts = < /*TXEOB*/ 0x6 0x4
128 /*RXEOB*/ 7 4 130 /*RXEOB*/ 0x7 0x4
129 /*SERR*/ 3 4 131 /*SERR*/ 0x3 0x4
130 /*TXDE*/ 4 4 132 /*TXDE*/ 0x4 0x4
131 /*RXDE*/ 5 4>; 133 /*RXDE*/ 0x5 0x4>;
132 desc-base-addr-high = <8>; 134 desc-base-addr-high = <0x8>;
133 }; 135 };
134 136
135 POB0: opb { 137 POB0: opb {
136 compatible = "ibm,opb-460gt", "ibm,opb"; 138 compatible = "ibm,opb-460gt", "ibm,opb";
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <1>; 140 #size-cells = <1>;
139 ranges = <b0000000 4 b0000000 50000000>; 141 ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
140 clock-frequency = <0>; /* Filled in by U-Boot */ 142 clock-frequency = <0>; /* Filled in by U-Boot */
141 143
142 EBC0: ebc { 144 EBC0: ebc {
143 compatible = "ibm,ebc-460gt", "ibm,ebc"; 145 compatible = "ibm,ebc-460gt", "ibm,ebc";
144 dcr-reg = <012 2>; 146 dcr-reg = <0x012 0x002>;
145 #address-cells = <2>; 147 #address-cells = <2>;
146 #size-cells = <1>; 148 #size-cells = <1>;
147 clock-frequency = <0>; /* Filled in by U-Boot */ 149 clock-frequency = <0>; /* Filled in by U-Boot */
148 /* ranges property is supplied by U-Boot */ 150 /* ranges property is supplied by U-Boot */
149 interrupts = <6 4>; 151 interrupts = <0x6 0x4>;
150 interrupt-parent = <&UIC1>; 152 interrupt-parent = <&UIC1>;
151 153
152 nor_flash@0,0 { 154 nor_flash@0,0 {
153 compatible = "amd,s29gl512n", "cfi-flash"; 155 compatible = "amd,s29gl512n", "cfi-flash";
154 bank-width = <2>; 156 bank-width = <2>;
155 reg = <0 000000 4000000>; 157 reg = <0x00000000 0x00000000 0x04000000>;
156 #address-cells = <1>; 158 #address-cells = <1>;
157 #size-cells = <1>; 159 #size-cells = <1>;
158 partition@0 { 160 partition@0 {
159 label = "kernel"; 161 label = "kernel";
160 reg = <0 1e0000>; 162 reg = <0x00000000 0x001e0000>;
161 }; 163 };
162 partition@1e0000 { 164 partition@1e0000 {
163 label = "dtb"; 165 label = "dtb";
164 reg = <1e0000 20000>; 166 reg = <0x001e0000 0x00020000>;
165 }; 167 };
166 partition@200000 { 168 partition@200000 {
167 label = "ramdisk"; 169 label = "ramdisk";
168 reg = <200000 1400000>; 170 reg = <0x00200000 0x01400000>;
169 }; 171 };
170 partition@1600000 { 172 partition@1600000 {
171 label = "jffs2"; 173 label = "jffs2";
172 reg = <1600000 400000>; 174 reg = <0x01600000 0x00400000>;
173 }; 175 };
174 partition@1a00000 { 176 partition@1a00000 {
175 label = "user"; 177 label = "user";
176 reg = <1a00000 2560000>; 178 reg = <0x01a00000 0x02560000>;
177 }; 179 };
178 partition@3f60000 { 180 partition@3f60000 {
179 label = "env"; 181 label = "env";
180 reg = <3f60000 40000>; 182 reg = <0x03f60000 0x00040000>;
181 }; 183 };
182 partition@3fa0000 { 184 partition@3fa0000 {
183 label = "u-boot"; 185 label = "u-boot";
184 reg = <3fa0000 60000>; 186 reg = <0x03fa0000 0x00060000>;
185 }; 187 };
186 }; 188 };
187 }; 189 };
@@ -189,109 +191,109 @@
189 UART0: serial@ef600300 { 191 UART0: serial@ef600300 {
190 device_type = "serial"; 192 device_type = "serial";
191 compatible = "ns16550"; 193 compatible = "ns16550";
192 reg = <ef600300 8>; 194 reg = <0xef600300 0x00000008>;
193 virtual-reg = <ef600300>; 195 virtual-reg = <0xef600300>;
194 clock-frequency = <0>; /* Filled in by U-Boot */ 196 clock-frequency = <0>; /* Filled in by U-Boot */
195 current-speed = <0>; /* Filled in by U-Boot */ 197 current-speed = <0>; /* Filled in by U-Boot */
196 interrupt-parent = <&UIC1>; 198 interrupt-parent = <&UIC1>;
197 interrupts = <1 4>; 199 interrupts = <0x1 0x4>;
198 }; 200 };
199 201
200 UART1: serial@ef600400 { 202 UART1: serial@ef600400 {
201 device_type = "serial"; 203 device_type = "serial";
202 compatible = "ns16550"; 204 compatible = "ns16550";
203 reg = <ef600400 8>; 205 reg = <0xef600400 0x00000008>;
204 virtual-reg = <ef600400>; 206 virtual-reg = <0xef600400>;
205 clock-frequency = <0>; /* Filled in by U-Boot */ 207 clock-frequency = <0>; /* Filled in by U-Boot */
206 current-speed = <0>; /* Filled in by U-Boot */ 208 current-speed = <0>; /* Filled in by U-Boot */
207 interrupt-parent = <&UIC0>; 209 interrupt-parent = <&UIC0>;
208 interrupts = <1 4>; 210 interrupts = <0x1 0x4>;
209 }; 211 };
210 212
211 UART2: serial@ef600500 { 213 UART2: serial@ef600500 {
212 device_type = "serial"; 214 device_type = "serial";
213 compatible = "ns16550"; 215 compatible = "ns16550";
214 reg = <ef600500 8>; 216 reg = <0xef600500 0x00000008>;
215 virtual-reg = <ef600500>; 217 virtual-reg = <0xef600500>;
216 clock-frequency = <0>; /* Filled in by U-Boot */ 218 clock-frequency = <0>; /* Filled in by U-Boot */
217 current-speed = <0>; /* Filled in by U-Boot */ 219 current-speed = <0>; /* Filled in by U-Boot */
218 interrupt-parent = <&UIC1>; 220 interrupt-parent = <&UIC1>;
219 interrupts = <1d 4>; 221 interrupts = <0x1d 0x4>;
220 }; 222 };
221 223
222 UART3: serial@ef600600 { 224 UART3: serial@ef600600 {
223 device_type = "serial"; 225 device_type = "serial";
224 compatible = "ns16550"; 226 compatible = "ns16550";
225 reg = <ef600600 8>; 227 reg = <0xef600600 0x00000008>;
226 virtual-reg = <ef600600>; 228 virtual-reg = <0xef600600>;
227 clock-frequency = <0>; /* Filled in by U-Boot */ 229 clock-frequency = <0>; /* Filled in by U-Boot */
228 current-speed = <0>; /* Filled in by U-Boot */ 230 current-speed = <0>; /* Filled in by U-Boot */
229 interrupt-parent = <&UIC1>; 231 interrupt-parent = <&UIC1>;
230 interrupts = <1e 4>; 232 interrupts = <0x1e 0x4>;
231 }; 233 };
232 234
233 IIC0: i2c@ef600700 { 235 IIC0: i2c@ef600700 {
234 compatible = "ibm,iic-460gt", "ibm,iic"; 236 compatible = "ibm,iic-460gt", "ibm,iic";
235 reg = <ef600700 14>; 237 reg = <0xef600700 0x00000014>;
236 interrupt-parent = <&UIC0>; 238 interrupt-parent = <&UIC0>;
237 interrupts = <2 4>; 239 interrupts = <0x2 0x4>;
238 }; 240 };
239 241
240 IIC1: i2c@ef600800 { 242 IIC1: i2c@ef600800 {
241 compatible = "ibm,iic-460gt", "ibm,iic"; 243 compatible = "ibm,iic-460gt", "ibm,iic";
242 reg = <ef600800 14>; 244 reg = <0xef600800 0x00000014>;
243 interrupt-parent = <&UIC0>; 245 interrupt-parent = <&UIC0>;
244 interrupts = <3 4>; 246 interrupts = <0x3 0x4>;
245 }; 247 };
246 248
247 ZMII0: emac-zmii@ef600d00 { 249 ZMII0: emac-zmii@ef600d00 {
248 compatible = "ibm,zmii-460gt", "ibm,zmii"; 250 compatible = "ibm,zmii-460gt", "ibm,zmii";
249 reg = <ef600d00 c>; 251 reg = <0xef600d00 0x0000000c>;
250 }; 252 };
251 253
252 RGMII0: emac-rgmii@ef601500 { 254 RGMII0: emac-rgmii@ef601500 {
253 compatible = "ibm,rgmii-460gt", "ibm,rgmii"; 255 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
254 reg = <ef601500 8>; 256 reg = <0xef601500 0x00000008>;
255 has-mdio; 257 has-mdio;
256 }; 258 };
257 259
258 RGMII1: emac-rgmii@ef601600 { 260 RGMII1: emac-rgmii@ef601600 {
259 compatible = "ibm,rgmii-460gt", "ibm,rgmii"; 261 compatible = "ibm,rgmii-460gt", "ibm,rgmii";
260 reg = <ef601600 8>; 262 reg = <0xef601600 0x00000008>;
261 has-mdio; 263 has-mdio;
262 }; 264 };
263 265
264 TAH0: emac-tah@ef601350 { 266 TAH0: emac-tah@ef601350 {
265 compatible = "ibm,tah-460gt", "ibm,tah"; 267 compatible = "ibm,tah-460gt", "ibm,tah";
266 reg = <ef601350 30>; 268 reg = <0xef601350 0x00000030>;
267 }; 269 };
268 270
269 TAH1: emac-tah@ef601450 { 271 TAH1: emac-tah@ef601450 {
270 compatible = "ibm,tah-460gt", "ibm,tah"; 272 compatible = "ibm,tah-460gt", "ibm,tah";
271 reg = <ef601450 30>; 273 reg = <0xef601450 0x00000030>;
272 }; 274 };
273 275
274 EMAC0: ethernet@ef600e00 { 276 EMAC0: ethernet@ef600e00 {
275 device_type = "network"; 277 device_type = "network";
276 compatible = "ibm,emac-460gt", "ibm,emac4"; 278 compatible = "ibm,emac-460gt", "ibm,emac4";
277 interrupt-parent = <&EMAC0>; 279 interrupt-parent = <&EMAC0>;
278 interrupts = <0 1>; 280 interrupts = <0x0 0x1>;
279 #interrupt-cells = <1>; 281 #interrupt-cells = <1>;
280 #address-cells = <0>; 282 #address-cells = <0>;
281 #size-cells = <0>; 283 #size-cells = <0>;
282 interrupt-map = </*Status*/ 0 &UIC2 10 4 284 interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
283 /*Wake*/ 1 &UIC2 14 4>; 285 /*Wake*/ 0x1 &UIC2 0x14 0x4>;
284 reg = <ef600e00 70>; 286 reg = <0xef600e00 0x00000074>;
285 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 287 local-mac-address = [000000000000]; /* Filled in by U-Boot */
286 mal-device = <&MAL0>; 288 mal-device = <&MAL0>;
287 mal-tx-channel = <0>; 289 mal-tx-channel = <0>;
288 mal-rx-channel = <0>; 290 mal-rx-channel = <0>;
289 cell-index = <0>; 291 cell-index = <0>;
290 max-frame-size = <2328>; 292 max-frame-size = <9000>;
291 rx-fifo-size = <1000>; 293 rx-fifo-size = <4096>;
292 tx-fifo-size = <800>; 294 tx-fifo-size = <2048>;
293 phy-mode = "rgmii"; 295 phy-mode = "rgmii";
294 phy-map = <00000000>; 296 phy-map = <0x00000000>;
295 rgmii-device = <&RGMII0>; 297 rgmii-device = <&RGMII0>;
296 rgmii-channel = <0>; 298 rgmii-channel = <0>;
297 tah-device = <&TAH0>; 299 tah-device = <&TAH0>;
@@ -304,23 +306,23 @@
304 device_type = "network"; 306 device_type = "network";
305 compatible = "ibm,emac-460gt", "ibm,emac4"; 307 compatible = "ibm,emac-460gt", "ibm,emac4";
306 interrupt-parent = <&EMAC1>; 308 interrupt-parent = <&EMAC1>;
307 interrupts = <0 1>; 309 interrupts = <0x0 0x1>;
308 #interrupt-cells = <1>; 310 #interrupt-cells = <1>;
309 #address-cells = <0>; 311 #address-cells = <0>;
310 #size-cells = <0>; 312 #size-cells = <0>;
311 interrupt-map = </*Status*/ 0 &UIC2 11 4 313 interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4
312 /*Wake*/ 1 &UIC2 15 4>; 314 /*Wake*/ 0x1 &UIC2 0x15 0x4>;
313 reg = <ef600f00 70>; 315 reg = <0xef600f00 0x00000074>;
314 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 316 local-mac-address = [000000000000]; /* Filled in by U-Boot */
315 mal-device = <&MAL0>; 317 mal-device = <&MAL0>;
316 mal-tx-channel = <1>; 318 mal-tx-channel = <1>;
317 mal-rx-channel = <8>; 319 mal-rx-channel = <8>;
318 cell-index = <1>; 320 cell-index = <1>;
319 max-frame-size = <2328>; 321 max-frame-size = <9000>;
320 rx-fifo-size = <1000>; 322 rx-fifo-size = <4096>;
321 tx-fifo-size = <800>; 323 tx-fifo-size = <2048>;
322 phy-mode = "rgmii"; 324 phy-mode = "rgmii";
323 phy-map = <00000000>; 325 phy-map = <0x00000000>;
324 rgmii-device = <&RGMII0>; 326 rgmii-device = <&RGMII0>;
325 rgmii-channel = <1>; 327 rgmii-channel = <1>;
326 tah-device = <&TAH1>; 328 tah-device = <&TAH1>;
@@ -334,23 +336,23 @@
334 device_type = "network"; 336 device_type = "network";
335 compatible = "ibm,emac-460gt", "ibm,emac4"; 337 compatible = "ibm,emac-460gt", "ibm,emac4";
336 interrupt-parent = <&EMAC2>; 338 interrupt-parent = <&EMAC2>;
337 interrupts = <0 1>; 339 interrupts = <0x0 0x1>;
338 #interrupt-cells = <1>; 340 #interrupt-cells = <1>;
339 #address-cells = <0>; 341 #address-cells = <0>;
340 #size-cells = <0>; 342 #size-cells = <0>;
341 interrupt-map = </*Status*/ 0 &UIC2 12 4 343 interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4
342 /*Wake*/ 1 &UIC2 16 4>; 344 /*Wake*/ 0x1 &UIC2 0x16 0x4>;
343 reg = <ef601100 70>; 345 reg = <0xef601100 0x00000074>;
344 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 346 local-mac-address = [000000000000]; /* Filled in by U-Boot */
345 mal-device = <&MAL0>; 347 mal-device = <&MAL0>;
346 mal-tx-channel = <2>; 348 mal-tx-channel = <2>;
347 mal-rx-channel = <10>; 349 mal-rx-channel = <16>;
348 cell-index = <2>; 350 cell-index = <2>;
349 max-frame-size = <2328>; 351 max-frame-size = <9000>;
350 rx-fifo-size = <1000>; 352 rx-fifo-size = <4096>;
351 tx-fifo-size = <800>; 353 tx-fifo-size = <2048>;
352 phy-mode = "rgmii"; 354 phy-mode = "rgmii";
353 phy-map = <00000000>; 355 phy-map = <0x00000000>;
354 rgmii-device = <&RGMII1>; 356 rgmii-device = <&RGMII1>;
355 rgmii-channel = <0>; 357 rgmii-channel = <0>;
356 has-inverted-stacr-oc; 358 has-inverted-stacr-oc;
@@ -362,23 +364,23 @@
362 device_type = "network"; 364 device_type = "network";
363 compatible = "ibm,emac-460gt", "ibm,emac4"; 365 compatible = "ibm,emac-460gt", "ibm,emac4";
364 interrupt-parent = <&EMAC3>; 366 interrupt-parent = <&EMAC3>;
365 interrupts = <0 1>; 367 interrupts = <0x0 0x1>;
366 #interrupt-cells = <1>; 368 #interrupt-cells = <1>;
367 #address-cells = <0>; 369 #address-cells = <0>;
368 #size-cells = <0>; 370 #size-cells = <0>;
369 interrupt-map = </*Status*/ 0 &UIC2 13 4 371 interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4
370 /*Wake*/ 1 &UIC2 17 4>; 372 /*Wake*/ 0x1 &UIC2 0x17 0x4>;
371 reg = <ef601200 70>; 373 reg = <0xef601200 0x00000074>;
372 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 374 local-mac-address = [000000000000]; /* Filled in by U-Boot */
373 mal-device = <&MAL0>; 375 mal-device = <&MAL0>;
374 mal-tx-channel = <3>; 376 mal-tx-channel = <3>;
375 mal-rx-channel = <18>; 377 mal-rx-channel = <24>;
376 cell-index = <3>; 378 cell-index = <3>;
377 max-frame-size = <2328>; 379 max-frame-size = <9000>;
378 rx-fifo-size = <1000>; 380 rx-fifo-size = <4096>;
379 tx-fifo-size = <800>; 381 tx-fifo-size = <2048>;
380 phy-mode = "rgmii"; 382 phy-mode = "rgmii";
381 phy-map = <00000000>; 383 phy-map = <0x00000000>;
382 rgmii-device = <&RGMII1>; 384 rgmii-device = <&RGMII1>;
383 rgmii-channel = <1>; 385 rgmii-channel = <1>;
384 has-inverted-stacr-oc; 386 has-inverted-stacr-oc;
@@ -396,27 +398,27 @@
396 primary; 398 primary;
397 large-inbound-windows; 399 large-inbound-windows;
398 enable-msi-hole; 400 enable-msi-hole;
399 reg = <c 0ec00000 8 /* Config space access */ 401 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
400 0 0 0 /* no IACK cycles */ 402 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
401 c 0ed00000 4 /* Special cycles */ 403 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
402 c 0ec80000 100 /* Internal registers */ 404 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
403 c 0ec80100 fc>; /* Internal messaging registers */ 405 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
404 406
405 /* Outbound ranges, one memory and one IO, 407 /* Outbound ranges, one memory and one IO,
406 * later cannot be changed 408 * later cannot be changed
407 */ 409 */
408 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 410 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
409 01000000 0 00000000 0000000c 08000000 0 00010000>; 411 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
410 412
411 /* Inbound 2GB range starting at 0 */ 413 /* Inbound 2GB range starting at 0 */
412 dma-ranges = <42000000 0 0 0 0 0 80000000>; 414 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
413 415
414 /* This drives busses 0 to 0x3f */ 416 /* This drives busses 0 to 0x3f */
415 bus-range = <0 3f>; 417 bus-range = <0x0 0x3f>;
416 418
417 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ 419 /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */
418 interrupt-map-mask = <0000 0 0 0>; 420 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
419 interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; 421 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >;
420 }; 422 };
421 423
422 PCIE0: pciex@d00000000 { 424 PCIE0: pciex@d00000000 {
@@ -426,23 +428,23 @@
426 #address-cells = <3>; 428 #address-cells = <3>;
427 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 429 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
428 primary; 430 primary;
429 port = <0>; /* port number */ 431 port = <0x0>; /* port number */
430 reg = <d 00000000 20000000 /* Config space access */ 432 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
431 c 08010000 00001000>; /* Registers */ 433 0x0000000c 0x08010000 0x00001000>; /* Registers */
432 dcr-reg = <100 020>; 434 dcr-reg = <0x100 0x020>;
433 sdr-base = <300>; 435 sdr-base = <0x300>;
434 436
435 /* Outbound ranges, one memory and one IO, 437 /* Outbound ranges, one memory and one IO,
436 * later cannot be changed 438 * later cannot be changed
437 */ 439 */
438 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 440 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
439 01000000 0 00000000 0000000f 80000000 0 00010000>; 441 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
440 442
441 /* Inbound 2GB range starting at 0 */ 443 /* Inbound 2GB range starting at 0 */
442 dma-ranges = <42000000 0 0 0 0 0 80000000>; 444 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
443 445
444 /* This drives busses 40 to 0x7f */ 446 /* This drives busses 40 to 0x7f */
445 bus-range = <40 7f>; 447 bus-range = <0x40 0x7f>;
446 448
447 /* Legacy interrupts (note the weird polarity, the bridge seems 449 /* Legacy interrupts (note the weird polarity, the bridge seems
448 * to invert PCIe legacy interrupts). 450 * to invert PCIe legacy interrupts).
@@ -452,12 +454,12 @@
452 * below are basically de-swizzled numbers. 454 * below are basically de-swizzled numbers.
453 * The real slot is on idsel 0, so the swizzling is 1:1 455 * The real slot is on idsel 0, so the swizzling is 1:1
454 */ 456 */
455 interrupt-map-mask = <0000 0 0 7>; 457 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
456 interrupt-map = < 458 interrupt-map = <
457 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ 459 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */
458 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ 460 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */
459 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ 461 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */
460 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; 462 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>;
461 }; 463 };
462 464
463 PCIE1: pciex@d20000000 { 465 PCIE1: pciex@d20000000 {
@@ -467,23 +469,23 @@
467 #address-cells = <3>; 469 #address-cells = <3>;
468 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; 470 compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex";
469 primary; 471 primary;
470 port = <1>; /* port number */ 472 port = <0x1>; /* port number */
471 reg = <d 20000000 20000000 /* Config space access */ 473 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
472 c 08011000 00001000>; /* Registers */ 474 0x0000000c 0x08011000 0x00001000>; /* Registers */
473 dcr-reg = <120 020>; 475 dcr-reg = <0x120 0x020>;
474 sdr-base = <340>; 476 sdr-base = <0x340>;
475 477
476 /* Outbound ranges, one memory and one IO, 478 /* Outbound ranges, one memory and one IO,
477 * later cannot be changed 479 * later cannot be changed
478 */ 480 */
479 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 481 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
480 01000000 0 00000000 0000000f 80010000 0 00010000>; 482 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
481 483
482 /* Inbound 2GB range starting at 0 */ 484 /* Inbound 2GB range starting at 0 */
483 dma-ranges = <42000000 0 0 0 0 0 80000000>; 485 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
484 486
485 /* This drives busses 80 to 0xbf */ 487 /* This drives busses 80 to 0xbf */
486 bus-range = <80 bf>; 488 bus-range = <0x80 0xbf>;
487 489
488 /* Legacy interrupts (note the weird polarity, the bridge seems 490 /* Legacy interrupts (note the weird polarity, the bridge seems
489 * to invert PCIe legacy interrupts). 491 * to invert PCIe legacy interrupts).
@@ -493,12 +495,12 @@
493 * below are basically de-swizzled numbers. 495 * below are basically de-swizzled numbers.
494 * The real slot is on idsel 0, so the swizzling is 1:1 496 * The real slot is on idsel 0, so the swizzling is 1:1
495 */ 497 */
496 interrupt-map-mask = <0000 0 0 7>; 498 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
497 interrupt-map = < 499 interrupt-map = <
498 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ 500 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */
499 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ 501 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */
500 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ 502 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
501 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; 503 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
502 }; 504 };
503 }; 505 };
504}; 506};
diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts
index b5d95ac24dbf..513bc43a71af 100644
--- a/arch/powerpc/boot/dts/haleakala.dts
+++ b/arch/powerpc/boot/dts/haleakala.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <1>; 14 #address-cells = <1>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,haleakala"; 16 model = "amcc,haleakala";
15 compatible = "amcc,haleakala", "amcc,kilauea"; 17 compatible = "amcc,haleakala", "amcc,kilauea";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -28,13 +30,13 @@
28 cpu@0 { 30 cpu@0 {
29 device_type = "cpu"; 31 device_type = "cpu";
30 model = "PowerPC,405EXr"; 32 model = "PowerPC,405EXr";
31 reg = <0>; 33 reg = <0x00000000>;
32 clock-frequency = <0>; /* Filled in by U-Boot */ 34 clock-frequency = <0>; /* Filled in by U-Boot */
33 timebase-frequency = <0>; /* Filled in by U-Boot */ 35 timebase-frequency = <0>; /* Filled in by U-Boot */
34 i-cache-line-size = <20>; 36 i-cache-line-size = <32>;
35 d-cache-line-size = <20>; 37 d-cache-line-size = <32>;
36 i-cache-size = <4000>; /* 16 kB */ 38 i-cache-size = <16384>; /* 16 kB */
37 d-cache-size = <4000>; /* 16 kB */ 39 d-cache-size = <16384>; /* 16 kB */
38 dcr-controller; 40 dcr-controller;
39 dcr-access-method = "native"; 41 dcr-access-method = "native";
40 }; 42 };
@@ -42,14 +44,14 @@
42 44
43 memory { 45 memory {
44 device_type = "memory"; 46 device_type = "memory";
45 reg = <0 0>; /* Filled in by U-Boot */ 47 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
46 }; 48 };
47 49
48 UIC0: interrupt-controller { 50 UIC0: interrupt-controller {
49 compatible = "ibm,uic-405exr", "ibm,uic"; 51 compatible = "ibm,uic-405exr", "ibm,uic";
50 interrupt-controller; 52 interrupt-controller;
51 cell-index = <0>; 53 cell-index = <0>;
52 dcr-reg = <0c0 009>; 54 dcr-reg = <0x0c0 0x009>;
53 #address-cells = <0>; 55 #address-cells = <0>;
54 #size-cells = <0>; 56 #size-cells = <0>;
55 #interrupt-cells = <2>; 57 #interrupt-cells = <2>;
@@ -59,11 +61,11 @@
59 compatible = "ibm,uic-405exr","ibm,uic"; 61 compatible = "ibm,uic-405exr","ibm,uic";
60 interrupt-controller; 62 interrupt-controller;
61 cell-index = <1>; 63 cell-index = <1>;
62 dcr-reg = <0d0 009>; 64 dcr-reg = <0x0d0 0x009>;
63 #address-cells = <0>; 65 #address-cells = <0>;
64 #size-cells = <0>; 66 #size-cells = <0>;
65 #interrupt-cells = <2>; 67 #interrupt-cells = <2>;
66 interrupts = <1e 4 1f 4>; /* cascade */ 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
67 interrupt-parent = <&UIC0>; 69 interrupt-parent = <&UIC0>;
68 }; 70 };
69 71
@@ -71,11 +73,11 @@
71 compatible = "ibm,uic-405exr","ibm,uic"; 73 compatible = "ibm,uic-405exr","ibm,uic";
72 interrupt-controller; 74 interrupt-controller;
73 cell-index = <2>; 75 cell-index = <2>;
74 dcr-reg = <0e0 009>; 76 dcr-reg = <0x0e0 0x009>;
75 #address-cells = <0>; 77 #address-cells = <0>;
76 #size-cells = <0>; 78 #size-cells = <0>;
77 #interrupt-cells = <2>; 79 #interrupt-cells = <2>;
78 interrupts = <1c 4 1d 4>; /* cascade */ 80 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
79 interrupt-parent = <&UIC0>; 81 interrupt-parent = <&UIC0>;
80 }; 82 };
81 83
@@ -88,72 +90,72 @@
88 90
89 SDRAM0: memory-controller { 91 SDRAM0: memory-controller {
90 compatible = "ibm,sdram-405exr"; 92 compatible = "ibm,sdram-405exr";
91 dcr-reg = <010 2>; 93 dcr-reg = <0x010 0x002>;
92 }; 94 };
93 95
94 MAL0: mcmal { 96 MAL0: mcmal {
95 compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; 97 compatible = "ibm,mcmal-405exr", "ibm,mcmal2";
96 dcr-reg = <180 62>; 98 dcr-reg = <0x180 0x062>;
97 num-tx-chans = <2>; 99 num-tx-chans = <2>;
98 num-rx-chans = <2>; 100 num-rx-chans = <2>;
99 interrupt-parent = <&MAL0>; 101 interrupt-parent = <&MAL0>;
100 interrupts = <0 1 2 3 4>; 102 interrupts = <0x0 0x1 0x2 0x3 0x4>;
101 #interrupt-cells = <1>; 103 #interrupt-cells = <1>;
102 #address-cells = <0>; 104 #address-cells = <0>;
103 #size-cells = <0>; 105 #size-cells = <0>;
104 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 106 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
105 /*RXEOB*/ 1 &UIC0 b 4 107 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
106 /*SERR*/ 2 &UIC1 0 4 108 /*SERR*/ 0x2 &UIC1 0x0 0x4
107 /*TXDE*/ 3 &UIC1 1 4 109 /*TXDE*/ 0x3 &UIC1 0x1 0x4
108 /*RXDE*/ 4 &UIC1 2 4>; 110 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
109 interrupt-map-mask = <ffffffff>; 111 interrupt-map-mask = <0xffffffff>;
110 }; 112 };
111 113
112 POB0: opb { 114 POB0: opb {
113 compatible = "ibm,opb-405exr", "ibm,opb"; 115 compatible = "ibm,opb-405exr", "ibm,opb";
114 #address-cells = <1>; 116 #address-cells = <1>;
115 #size-cells = <1>; 117 #size-cells = <1>;
116 ranges = <80000000 80000000 10000000 118 ranges = <0x80000000 0x80000000 0x10000000
117 ef600000 ef600000 a00000 119 0xef600000 0xef600000 0x00a00000
118 f0000000 f0000000 10000000>; 120 0xf0000000 0xf0000000 0x10000000>;
119 dcr-reg = <0a0 5>; 121 dcr-reg = <0x0a0 0x005>;
120 clock-frequency = <0>; /* Filled in by U-Boot */ 122 clock-frequency = <0>; /* Filled in by U-Boot */
121 123
122 EBC0: ebc { 124 EBC0: ebc {
123 compatible = "ibm,ebc-405exr", "ibm,ebc"; 125 compatible = "ibm,ebc-405exr", "ibm,ebc";
124 dcr-reg = <012 2>; 126 dcr-reg = <0x012 0x002>;
125 #address-cells = <2>; 127 #address-cells = <2>;
126 #size-cells = <1>; 128 #size-cells = <1>;
127 clock-frequency = <0>; /* Filled in by U-Boot */ 129 clock-frequency = <0>; /* Filled in by U-Boot */
128 /* ranges property is supplied by U-Boot */ 130 /* ranges property is supplied by U-Boot */
129 interrupts = <5 1>; 131 interrupts = <0x5 0x1>;
130 interrupt-parent = <&UIC1>; 132 interrupt-parent = <&UIC1>;
131 133
132 nor_flash@0,0 { 134 nor_flash@0,0 {
133 compatible = "amd,s29gl512n", "cfi-flash"; 135 compatible = "amd,s29gl512n", "cfi-flash";
134 bank-width = <2>; 136 bank-width = <2>;
135 reg = <0 000000 4000000>; 137 reg = <0x00000000 0x00000000 0x04000000>;
136 #address-cells = <1>; 138 #address-cells = <1>;
137 #size-cells = <1>; 139 #size-cells = <1>;
138 partition@0 { 140 partition@0 {
139 label = "kernel"; 141 label = "kernel";
140 reg = <0 200000>; 142 reg = <0x00000000 0x00200000>;
141 }; 143 };
142 partition@200000 { 144 partition@200000 {
143 label = "root"; 145 label = "root";
144 reg = <200000 200000>; 146 reg = <0x00200000 0x00200000>;
145 }; 147 };
146 partition@400000 { 148 partition@400000 {
147 label = "user"; 149 label = "user";
148 reg = <400000 3b60000>; 150 reg = <0x00400000 0x03b60000>;
149 }; 151 };
150 partition@3f60000 { 152 partition@3f60000 {
151 label = "env"; 153 label = "env";
152 reg = <3f60000 40000>; 154 reg = <0x03f60000 0x00040000>;
153 }; 155 };
154 partition@3fa0000 { 156 partition@3fa0000 {
155 label = "u-boot"; 157 label = "u-boot";
156 reg = <3fa0000 60000>; 158 reg = <0x03fa0000 0x00060000>;
157 }; 159 };
158 }; 160 };
159 }; 161 };
@@ -161,68 +163,68 @@
161 UART0: serial@ef600200 { 163 UART0: serial@ef600200 {
162 device_type = "serial"; 164 device_type = "serial";
163 compatible = "ns16550"; 165 compatible = "ns16550";
164 reg = <ef600200 8>; 166 reg = <0xef600200 0x00000008>;
165 virtual-reg = <ef600200>; 167 virtual-reg = <0xef600200>;
166 clock-frequency = <0>; /* Filled in by U-Boot */ 168 clock-frequency = <0>; /* Filled in by U-Boot */
167 current-speed = <0>; 169 current-speed = <0>;
168 interrupt-parent = <&UIC0>; 170 interrupt-parent = <&UIC0>;
169 interrupts = <1a 4>; 171 interrupts = <0x1a 0x4>;
170 }; 172 };
171 173
172 UART1: serial@ef600300 { 174 UART1: serial@ef600300 {
173 device_type = "serial"; 175 device_type = "serial";
174 compatible = "ns16550"; 176 compatible = "ns16550";
175 reg = <ef600300 8>; 177 reg = <0xef600300 0x00000008>;
176 virtual-reg = <ef600300>; 178 virtual-reg = <0xef600300>;
177 clock-frequency = <0>; /* Filled in by U-Boot */ 179 clock-frequency = <0>; /* Filled in by U-Boot */
178 current-speed = <0>; 180 current-speed = <0>;
179 interrupt-parent = <&UIC0>; 181 interrupt-parent = <&UIC0>;
180 interrupts = <1 4>; 182 interrupts = <0x1 0x4>;
181 }; 183 };
182 184
183 IIC0: i2c@ef600400 { 185 IIC0: i2c@ef600400 {
184 compatible = "ibm,iic-405exr", "ibm,iic"; 186 compatible = "ibm,iic-405exr", "ibm,iic";
185 reg = <ef600400 14>; 187 reg = <0xef600400 0x00000014>;
186 interrupt-parent = <&UIC0>; 188 interrupt-parent = <&UIC0>;
187 interrupts = <2 4>; 189 interrupts = <0x2 0x4>;
188 }; 190 };
189 191
190 IIC1: i2c@ef600500 { 192 IIC1: i2c@ef600500 {
191 compatible = "ibm,iic-405exr", "ibm,iic"; 193 compatible = "ibm,iic-405exr", "ibm,iic";
192 reg = <ef600500 14>; 194 reg = <0xef600500 0x00000014>;
193 interrupt-parent = <&UIC0>; 195 interrupt-parent = <&UIC0>;
194 interrupts = <7 4>; 196 interrupts = <0x7 0x4>;
195 }; 197 };
196 198
197 199
198 RGMII0: emac-rgmii@ef600b00 { 200 RGMII0: emac-rgmii@ef600b00 {
199 compatible = "ibm,rgmii-405exr", "ibm,rgmii"; 201 compatible = "ibm,rgmii-405exr", "ibm,rgmii";
200 reg = <ef600b00 104>; 202 reg = <0xef600b00 0x00000104>;
201 has-mdio; 203 has-mdio;
202 }; 204 };
203 205
204 EMAC0: ethernet@ef600900 { 206 EMAC0: ethernet@ef600900 {
205 linux,network-index = <0>; 207 linux,network-index = <0x0>;
206 device_type = "network"; 208 device_type = "network";
207 compatible = "ibm,emac-405exr", "ibm,emac4"; 209 compatible = "ibm,emac-405exr", "ibm,emac4sync";
208 interrupt-parent = <&EMAC0>; 210 interrupt-parent = <&EMAC0>;
209 interrupts = <0 1>; 211 interrupts = <0x0 0x1>;
210 #interrupt-cells = <1>; 212 #interrupt-cells = <1>;
211 #address-cells = <0>; 213 #address-cells = <0>;
212 #size-cells = <0>; 214 #size-cells = <0>;
213 interrupt-map = </*Status*/ 0 &UIC0 18 4 215 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
214 /*Wake*/ 1 &UIC1 1d 4>; 216 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
215 reg = <ef600900 70>; 217 reg = <0xef600900 0x000000c4>;
216 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 218 local-mac-address = [000000000000]; /* Filled in by U-Boot */
217 mal-device = <&MAL0>; 219 mal-device = <&MAL0>;
218 mal-tx-channel = <0>; 220 mal-tx-channel = <0>;
219 mal-rx-channel = <0>; 221 mal-rx-channel = <0>;
220 cell-index = <0>; 222 cell-index = <0>;
221 max-frame-size = <2328>; 223 max-frame-size = <9000>;
222 rx-fifo-size = <1000>; 224 rx-fifo-size = <4096>;
223 tx-fifo-size = <800>; 225 tx-fifo-size = <2048>;
224 phy-mode = "rgmii"; 226 phy-mode = "rgmii";
225 phy-map = <00000000>; 227 phy-map = <0x00000000>;
226 rgmii-device = <&RGMII0>; 228 rgmii-device = <&RGMII0>;
227 rgmii-channel = <0>; 229 rgmii-channel = <0>;
228 has-inverted-stacr-oc; 230 has-inverted-stacr-oc;
@@ -237,23 +239,23 @@
237 #address-cells = <3>; 239 #address-cells = <3>;
238 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 240 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
239 primary; 241 primary;
240 port = <0>; /* port number */ 242 port = <0x0>; /* port number */
241 reg = <a0000000 20000000 /* Config space access */ 243 reg = <0xa0000000 0x20000000 /* Config space access */
242 ef000000 00001000>; /* Registers */ 244 0xef000000 0x00001000>; /* Registers */
243 dcr-reg = <040 020>; 245 dcr-reg = <0x040 0x020>;
244 sdr-base = <400>; 246 sdr-base = <0x400>;
245 247
246 /* Outbound ranges, one memory and one IO, 248 /* Outbound ranges, one memory and one IO,
247 * later cannot be changed 249 * later cannot be changed
248 */ 250 */
249 ranges = <02000000 0 80000000 90000000 0 08000000 251 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
250 01000000 0 00000000 e0000000 0 00010000>; 252 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
251 253
252 /* Inbound 2GB range starting at 0 */ 254 /* Inbound 2GB range starting at 0 */
253 dma-ranges = <42000000 0 0 0 0 80000000>; 255 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
254 256
255 /* This drives busses 0x00 to 0x3f */ 257 /* This drives busses 0x00 to 0x3f */
256 bus-range = <00 3f>; 258 bus-range = <0x0 0x3f>;
257 259
258 /* Legacy interrupts (note the weird polarity, the bridge seems 260 /* Legacy interrupts (note the weird polarity, the bridge seems
259 * to invert PCIe legacy interrupts). 261 * to invert PCIe legacy interrupts).
@@ -263,12 +265,12 @@
263 * below are basically de-swizzled numbers. 265 * below are basically de-swizzled numbers.
264 * The real slot is on idsel 0, so the swizzling is 1:1 266 * The real slot is on idsel 0, so the swizzling is 1:1
265 */ 267 */
266 interrupt-map-mask = <0000 0 0 7>; 268 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
267 interrupt-map = < 269 interrupt-map = <
268 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ 270 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
269 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ 271 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
270 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ 272 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
271 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; 273 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
272 }; 274 };
273 }; 275 };
274}; 276};
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts
index b5d87895fe06..f87fe7b9ced9 100644
--- a/arch/powerpc/boot/dts/holly.dts
+++ b/arch/powerpc/boot/dts/holly.dts
@@ -10,6 +10,8 @@
10 * any warranty of any kind, whether express or implied. 10 * any warranty of any kind, whether express or implied.
11 */ 11 */
12 12
13/dts-v1/;
14
13/ { 15/ {
14 model = "41K7339"; 16 model = "41K7339";
15 compatible = "ibm,holly"; 17 compatible = "ibm,holly";
@@ -21,22 +23,22 @@
21 #size-cells =<0>; 23 #size-cells =<0>;
22 PowerPC,750CL@0 { 24 PowerPC,750CL@0 {
23 device_type = "cpu"; 25 device_type = "cpu";
24 reg = <0>; 26 reg = <0x00000000>;
25 d-cache-line-size = <20>; 27 d-cache-line-size = <32>;
26 i-cache-line-size = <20>; 28 i-cache-line-size = <32>;
27 d-cache-size = <8000>; 29 d-cache-size = <32768>;
28 i-cache-size = <8000>; 30 i-cache-size = <32768>;
29 d-cache-sets = <80>; 31 d-cache-sets = <128>;
30 i-cache-sets = <80>; 32 i-cache-sets = <128>;
31 timebase-frequency = <2faf080>; 33 timebase-frequency = <50000000>;
32 clock-frequency = <23c34600>; 34 clock-frequency = <600000000>;
33 bus-frequency = <bebc200>; 35 bus-frequency = <200000000>;
34 }; 36 };
35 }; 37 };
36 38
37 memory@0 { 39 memory@0 {
38 device_type = "memory"; 40 device_type = "memory";
39 reg = <00000000 20000000>; 41 reg = <0x00000000 0x20000000>;
40 }; 42 };
41 43
42 tsi109@c0000000 { 44 tsi109@c0000000 {
@@ -44,33 +46,33 @@
44 compatible = "tsi109-bridge", "tsi108-bridge"; 46 compatible = "tsi109-bridge", "tsi108-bridge";
45 #address-cells = <1>; 47 #address-cells = <1>;
46 #size-cells = <1>; 48 #size-cells = <1>;
47 ranges = <00000000 c0000000 00010000>; 49 ranges = <0x00000000 0xc0000000 0x00010000>;
48 reg = <c0000000 00010000>; 50 reg = <0xc0000000 0x00010000>;
49 51
50 i2c@7000 { 52 i2c@7000 {
51 device_type = "i2c"; 53 device_type = "i2c";
52 compatible = "tsi109-i2c", "tsi108-i2c"; 54 compatible = "tsi109-i2c", "tsi108-i2c";
53 interrupt-parent = <&MPIC>; 55 interrupt-parent = <&MPIC>;
54 interrupts = <e 2>; 56 interrupts = <0xe 0x2>;
55 reg = <7000 400>; 57 reg = <0x00007000 0x00000400>;
56 }; 58 };
57 59
58 MDIO: mdio@6000 { 60 MDIO: mdio@6000 {
59 device_type = "mdio"; 61 device_type = "mdio";
60 compatible = "tsi109-mdio", "tsi108-mdio"; 62 compatible = "tsi109-mdio", "tsi108-mdio";
61 reg = <6000 50>; 63 reg = <0x00006000 0x00000050>;
62 #address-cells = <1>; 64 #address-cells = <1>;
63 #size-cells = <0>; 65 #size-cells = <0>;
64 66
65 PHY1: ethernet-phy@1 { 67 PHY1: ethernet-phy@1 {
66 compatible = "bcm5461a"; 68 compatible = "bcm5461a";
67 reg = <1>; 69 reg = <0x00000001>;
68 txc-rxc-delay-disable; 70 txc-rxc-delay-disable;
69 }; 71 };
70 72
71 PHY2: ethernet-phy@2 { 73 PHY2: ethernet-phy@2 {
72 compatible = "bcm5461a"; 74 compatible = "bcm5461a";
73 reg = <2>; 75 reg = <0x00000002>;
74 txc-rxc-delay-disable; 76 txc-rxc-delay-disable;
75 }; 77 };
76 }; 78 };
@@ -80,10 +82,10 @@
80 compatible = "tsi109-ethernet", "tsi108-ethernet"; 82 compatible = "tsi109-ethernet", "tsi108-ethernet";
81 #address-cells = <1>; 83 #address-cells = <1>;
82 #size-cells = <0>; 84 #size-cells = <0>;
83 reg = <6000 200>; 85 reg = <0x00006000 0x00000200>;
84 local-mac-address = [ 00 00 00 00 00 00 ]; 86 local-mac-address = [ 00 00 00 00 00 00 ];
85 interrupt-parent = <&MPIC>; 87 interrupt-parent = <&MPIC>;
86 interrupts = <10 2>; 88 interrupts = <0x10 0x2>;
87 mdio-handle = <&MDIO>; 89 mdio-handle = <&MDIO>;
88 phy-handle = <&PHY1>; 90 phy-handle = <&PHY1>;
89 }; 91 };
@@ -93,10 +95,10 @@
93 compatible = "tsi109-ethernet", "tsi108-ethernet"; 95 compatible = "tsi109-ethernet", "tsi108-ethernet";
94 #address-cells = <1>; 96 #address-cells = <1>;
95 #size-cells = <0>; 97 #size-cells = <0>;
96 reg = <6400 200>; 98 reg = <0x00006400 0x00000200>;
97 local-mac-address = [ 00 00 00 00 00 00 ]; 99 local-mac-address = [ 00 00 00 00 00 00 ];
98 interrupt-parent = <&MPIC>; 100 interrupt-parent = <&MPIC>;
99 interrupts = <11 2>; 101 interrupts = <0x11 0x2>;
100 mdio-handle = <&MDIO>; 102 mdio-handle = <&MDIO>;
101 phy-handle = <&PHY2>; 103 phy-handle = <&PHY2>;
102 }; 104 };
@@ -104,23 +106,23 @@
104 serial@7808 { 106 serial@7808 {
105 device_type = "serial"; 107 device_type = "serial";
106 compatible = "ns16550"; 108 compatible = "ns16550";
107 reg = <7808 200>; 109 reg = <0x00007808 0x00000200>;
108 virtual-reg = <c0007808>; 110 virtual-reg = <0xc0007808>;
109 clock-frequency = <3F9C6000>; 111 clock-frequency = <1067212800>;
110 current-speed = <1c200>; 112 current-speed = <115200>;
111 interrupt-parent = <&MPIC>; 113 interrupt-parent = <&MPIC>;
112 interrupts = <c 2>; 114 interrupts = <0xc 0x2>;
113 }; 115 };
114 116
115 serial@7c08 { 117 serial@7c08 {
116 device_type = "serial"; 118 device_type = "serial";
117 compatible = "ns16550"; 119 compatible = "ns16550";
118 reg = <7c08 200>; 120 reg = <0x00007c08 0x00000200>;
119 virtual-reg = <c0007c08>; 121 virtual-reg = <0xc0007c08>;
120 clock-frequency = <3F9C6000>; 122 clock-frequency = <1067212800>;
121 current-speed = <1c200>; 123 current-speed = <115200>;
122 interrupt-parent = <&MPIC>; 124 interrupt-parent = <&MPIC>;
123 interrupts = <d 2>; 125 interrupts = <0xd 0x2>;
124 }; 126 };
125 127
126 MPIC: pic@7400 { 128 MPIC: pic@7400 {
@@ -128,7 +130,7 @@
128 compatible = "chrp,open-pic"; 130 compatible = "chrp,open-pic";
129 interrupt-controller; 131 interrupt-controller;
130 #interrupt-cells = <2>; 132 #interrupt-cells = <2>;
131 reg = <7400 400>; 133 reg = <0x00007400 0x00000400>;
132 big-endian; 134 big-endian;
133 }; 135 };
134 136
@@ -138,42 +140,42 @@
138 #interrupt-cells = <1>; 140 #interrupt-cells = <1>;
139 #size-cells = <2>; 141 #size-cells = <2>;
140 #address-cells = <3>; 142 #address-cells = <3>;
141 reg = <1000 1000>; 143 reg = <0x00001000 0x00001000>;
142 bus-range = <0 0>; 144 bus-range = <0x0 0x0>;
143 /*----------------------------------------------------+ 145 /*----------------------------------------------------+
144 | PCI memory range. 146 | PCI memory range.
145 | 01 denotes I/O space 147 | 01 denotes I/O space
146 | 02 denotes 32-bit memory space 148 | 02 denotes 32-bit memory space
147 +----------------------------------------------------*/ 149 +----------------------------------------------------*/
148 ranges = <02000000 0 40000000 40000000 0 10000000 150 ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000
149 01000000 0 00000000 7e000000 0 00010000>; 151 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>;
150 clock-frequency = <7f28154>; 152 clock-frequency = <133333332>;
151 interrupt-parent = <&MPIC>; 153 interrupt-parent = <&MPIC>;
152 interrupts = <17 2>; 154 interrupts = <0x17 0x2>;
153 interrupt-map-mask = <f800 0 0 7>; 155 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
154 /*----------------------------------------------------+ 156 /*----------------------------------------------------+
155 | The INTA, INTB, INTC, INTD are shared. 157 | The INTA, INTB, INTC, INTD are shared.
156 +----------------------------------------------------*/ 158 +----------------------------------------------------*/
157 interrupt-map = < 159 interrupt-map = <
158 0800 0 0 1 &RT0 24 0 160 0x800 0x0 0x0 0x1 &RT0 0x24 0x0
159 0800 0 0 2 &RT0 25 0 161 0x800 0x0 0x0 0x2 &RT0 0x25 0x0
160 0800 0 0 3 &RT0 26 0 162 0x800 0x0 0x0 0x3 &RT0 0x26 0x0
161 0800 0 0 4 &RT0 27 0 163 0x800 0x0 0x0 0x4 &RT0 0x27 0x0
162 164
163 1000 0 0 1 &RT0 25 0 165 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0
164 1000 0 0 2 &RT0 26 0 166 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0
165 1000 0 0 3 &RT0 27 0 167 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0
166 1000 0 0 4 &RT0 24 0 168 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0
167 169
168 1800 0 0 1 &RT0 26 0 170 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0
169 1800 0 0 2 &RT0 27 0 171 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0
170 1800 0 0 3 &RT0 24 0 172 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0
171 1800 0 0 4 &RT0 25 0 173 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0
172 174
173 2000 0 0 1 &RT0 27 0 175 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0
174 2000 0 0 2 &RT0 24 0 176 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0
175 2000 0 0 3 &RT0 25 0 177 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0
176 2000 0 0 4 &RT0 26 0 178 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0
177 >; 179 >;
178 180
179 RT0: router@1180 { 181 RT0: router@1180 {
@@ -183,7 +185,7 @@
183 clock-frequency = <0>; 185 clock-frequency = <0>;
184 #address-cells = <0>; 186 #address-cells = <0>;
185 #interrupt-cells = <2>; 187 #interrupt-cells = <2>;
186 interrupts = <17 2>; 188 interrupts = <0x17 0x2>;
187 interrupt-parent = <&MPIC>; 189 interrupt-parent = <&MPIC>;
188 }; 190 };
189 }; 191 };
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
index cc2873a531d2..077819bc3cbd 100644
--- a/arch/powerpc/boot/dts/katmai.dts
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -12,12 +12,14 @@
12 * any warranty of any kind, whether express or implied. 12 * any warranty of any kind, whether express or implied.
13 */ 13 */
14 14
15/dts-v1/;
16
15/ { 17/ {
16 #address-cells = <2>; 18 #address-cells = <2>;
17 #size-cells = <1>; 19 #size-cells = <1>;
18 model = "amcc,katmai"; 20 model = "amcc,katmai";
19 compatible = "amcc,katmai"; 21 compatible = "amcc,katmai";
20 dcr-parent = <&/cpus/cpu@0>; 22 dcr-parent = <&{/cpus/cpu@0}>;
21 23
22 aliases { 24 aliases {
23 ethernet0 = &EMAC0; 25 ethernet0 = &EMAC0;
@@ -33,13 +35,13 @@
33 cpu@0 { 35 cpu@0 {
34 device_type = "cpu"; 36 device_type = "cpu";
35 model = "PowerPC,440SPe"; 37 model = "PowerPC,440SPe";
36 reg = <0>; 38 reg = <0x00000000>;
37 clock-frequency = <0>; /* Filled in by zImage */ 39 clock-frequency = <0>; /* Filled in by zImage */
38 timebase-frequency = <0>; /* Filled in by zImage */ 40 timebase-frequency = <0>; /* Filled in by zImage */
39 i-cache-line-size = <20>; 41 i-cache-line-size = <32>;
40 d-cache-line-size = <20>; 42 d-cache-line-size = <32>;
41 i-cache-size = <8000>; 43 i-cache-size = <32768>;
42 d-cache-size = <8000>; 44 d-cache-size = <32768>;
43 dcr-controller; 45 dcr-controller;
44 dcr-access-method = "native"; 46 dcr-access-method = "native";
45 }; 47 };
@@ -47,14 +49,14 @@
47 49
48 memory { 50 memory {
49 device_type = "memory"; 51 device_type = "memory";
50 reg = <0 0 0>; /* Filled in by zImage */ 52 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
51 }; 53 };
52 54
53 UIC0: interrupt-controller0 { 55 UIC0: interrupt-controller0 {
54 compatible = "ibm,uic-440spe","ibm,uic"; 56 compatible = "ibm,uic-440spe","ibm,uic";
55 interrupt-controller; 57 interrupt-controller;
56 cell-index = <0>; 58 cell-index = <0>;
57 dcr-reg = <0c0 009>; 59 dcr-reg = <0x0c0 0x009>;
58 #address-cells = <0>; 60 #address-cells = <0>;
59 #size-cells = <0>; 61 #size-cells = <0>;
60 #interrupt-cells = <2>; 62 #interrupt-cells = <2>;
@@ -64,11 +66,11 @@
64 compatible = "ibm,uic-440spe","ibm,uic"; 66 compatible = "ibm,uic-440spe","ibm,uic";
65 interrupt-controller; 67 interrupt-controller;
66 cell-index = <1>; 68 cell-index = <1>;
67 dcr-reg = <0d0 009>; 69 dcr-reg = <0x0d0 0x009>;
68 #address-cells = <0>; 70 #address-cells = <0>;
69 #size-cells = <0>; 71 #size-cells = <0>;
70 #interrupt-cells = <2>; 72 #interrupt-cells = <2>;
71 interrupts = <1e 4 1f 4>; /* cascade */ 73 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
72 interrupt-parent = <&UIC0>; 74 interrupt-parent = <&UIC0>;
73 }; 75 };
74 76
@@ -76,11 +78,11 @@
76 compatible = "ibm,uic-440spe","ibm,uic"; 78 compatible = "ibm,uic-440spe","ibm,uic";
77 interrupt-controller; 79 interrupt-controller;
78 cell-index = <2>; 80 cell-index = <2>;
79 dcr-reg = <0e0 009>; 81 dcr-reg = <0x0e0 0x009>;
80 #address-cells = <0>; 82 #address-cells = <0>;
81 #size-cells = <0>; 83 #size-cells = <0>;
82 #interrupt-cells = <2>; 84 #interrupt-cells = <2>;
83 interrupts = <a 4 b 4>; /* cascade */ 85 interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
84 interrupt-parent = <&UIC0>; 86 interrupt-parent = <&UIC0>;
85 }; 87 };
86 88
@@ -88,22 +90,22 @@
88 compatible = "ibm,uic-440spe","ibm,uic"; 90 compatible = "ibm,uic-440spe","ibm,uic";
89 interrupt-controller; 91 interrupt-controller;
90 cell-index = <3>; 92 cell-index = <3>;
91 dcr-reg = <0f0 009>; 93 dcr-reg = <0x0f0 0x009>;
92 #address-cells = <0>; 94 #address-cells = <0>;
93 #size-cells = <0>; 95 #size-cells = <0>;
94 #interrupt-cells = <2>; 96 #interrupt-cells = <2>;
95 interrupts = <10 4 11 4>; /* cascade */ 97 interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
96 interrupt-parent = <&UIC0>; 98 interrupt-parent = <&UIC0>;
97 }; 99 };
98 100
99 SDR0: sdr { 101 SDR0: sdr {
100 compatible = "ibm,sdr-440spe"; 102 compatible = "ibm,sdr-440spe";
101 dcr-reg = <00e 002>; 103 dcr-reg = <0x00e 0x002>;
102 }; 104 };
103 105
104 CPR0: cpr { 106 CPR0: cpr {
105 compatible = "ibm,cpr-440spe"; 107 compatible = "ibm,cpr-440spe";
106 dcr-reg = <00c 002>; 108 dcr-reg = <0x00c 0x002>;
107 }; 109 };
108 110
109 plb { 111 plb {
@@ -115,108 +117,108 @@
115 117
116 SDRAM0: sdram { 118 SDRAM0: sdram {
117 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; 119 compatible = "ibm,sdram-440spe", "ibm,sdram-405gp";
118 dcr-reg = <010 2>; 120 dcr-reg = <0x010 0x002>;
119 }; 121 };
120 122
121 MAL0: mcmal { 123 MAL0: mcmal {
122 compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; 124 compatible = "ibm,mcmal-440spe", "ibm,mcmal2";
123 dcr-reg = <180 62>; 125 dcr-reg = <0x180 0x062>;
124 num-tx-chans = <2>; 126 num-tx-chans = <2>;
125 num-rx-chans = <1>; 127 num-rx-chans = <1>;
126 interrupt-parent = <&MAL0>; 128 interrupt-parent = <&MAL0>;
127 interrupts = <0 1 2 3 4>; 129 interrupts = <0x0 0x1 0x2 0x3 0x4>;
128 #interrupt-cells = <1>; 130 #interrupt-cells = <1>;
129 #address-cells = <0>; 131 #address-cells = <0>;
130 #size-cells = <0>; 132 #size-cells = <0>;
131 interrupt-map = </*TXEOB*/ 0 &UIC1 6 4 133 interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4
132 /*RXEOB*/ 1 &UIC1 7 4 134 /*RXEOB*/ 0x1 &UIC1 0x7 0x4
133 /*SERR*/ 2 &UIC1 1 4 135 /*SERR*/ 0x2 &UIC1 0x1 0x4
134 /*TXDE*/ 3 &UIC1 2 4 136 /*TXDE*/ 0x3 &UIC1 0x2 0x4
135 /*RXDE*/ 4 &UIC1 3 4>; 137 /*RXDE*/ 0x4 &UIC1 0x3 0x4>;
136 }; 138 };
137 139
138 POB0: opb { 140 POB0: opb {
139 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; 141 compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb";
140 #address-cells = <1>; 142 #address-cells = <1>;
141 #size-cells = <1>; 143 #size-cells = <1>;
142 ranges = <00000000 4 e0000000 20000000>; 144 ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>;
143 clock-frequency = <0>; /* Filled in by zImage */ 145 clock-frequency = <0>; /* Filled in by zImage */
144 146
145 EBC0: ebc { 147 EBC0: ebc {
146 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; 148 compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc";
147 dcr-reg = <012 2>; 149 dcr-reg = <0x012 0x002>;
148 #address-cells = <2>; 150 #address-cells = <2>;
149 #size-cells = <1>; 151 #size-cells = <1>;
150 clock-frequency = <0>; /* Filled in by zImage */ 152 clock-frequency = <0>; /* Filled in by zImage */
151 interrupts = <5 1>; 153 interrupts = <0x5 0x1>;
152 interrupt-parent = <&UIC1>; 154 interrupt-parent = <&UIC1>;
153 }; 155 };
154 156
155 UART0: serial@10000200 { 157 UART0: serial@10000200 {
156 device_type = "serial"; 158 device_type = "serial";
157 compatible = "ns16550"; 159 compatible = "ns16550";
158 reg = <10000200 8>; 160 reg = <0x10000200 0x00000008>;
159 virtual-reg = <a0000200>; 161 virtual-reg = <0xa0000200>;
160 clock-frequency = <0>; /* Filled in by zImage */ 162 clock-frequency = <0>; /* Filled in by zImage */
161 current-speed = <1c200>; 163 current-speed = <115200>;
162 interrupt-parent = <&UIC0>; 164 interrupt-parent = <&UIC0>;
163 interrupts = <0 4>; 165 interrupts = <0x0 0x4>;
164 }; 166 };
165 167
166 UART1: serial@10000300 { 168 UART1: serial@10000300 {
167 device_type = "serial"; 169 device_type = "serial";
168 compatible = "ns16550"; 170 compatible = "ns16550";
169 reg = <10000300 8>; 171 reg = <0x10000300 0x00000008>;
170 virtual-reg = <a0000300>; 172 virtual-reg = <0xa0000300>;
171 clock-frequency = <0>; 173 clock-frequency = <0>;
172 current-speed = <0>; 174 current-speed = <0>;
173 interrupt-parent = <&UIC0>; 175 interrupt-parent = <&UIC0>;
174 interrupts = <1 4>; 176 interrupts = <0x1 0x4>;
175 }; 177 };
176 178
177 179
178 UART2: serial@10000600 { 180 UART2: serial@10000600 {
179 device_type = "serial"; 181 device_type = "serial";
180 compatible = "ns16550"; 182 compatible = "ns16550";
181 reg = <10000600 8>; 183 reg = <0x10000600 0x00000008>;
182 virtual-reg = <a0000600>; 184 virtual-reg = <0xa0000600>;
183 clock-frequency = <0>; 185 clock-frequency = <0>;
184 current-speed = <0>; 186 current-speed = <0>;
185 interrupt-parent = <&UIC1>; 187 interrupt-parent = <&UIC1>;
186 interrupts = <5 4>; 188 interrupts = <0x5 0x4>;
187 }; 189 };
188 190
189 IIC0: i2c@10000400 { 191 IIC0: i2c@10000400 {
190 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 192 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
191 reg = <10000400 14>; 193 reg = <0x10000400 0x00000014>;
192 interrupt-parent = <&UIC0>; 194 interrupt-parent = <&UIC0>;
193 interrupts = <2 4>; 195 interrupts = <0x2 0x4>;
194 }; 196 };
195 197
196 IIC1: i2c@10000500 { 198 IIC1: i2c@10000500 {
197 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; 199 compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic";
198 reg = <10000500 14>; 200 reg = <0x10000500 0x00000014>;
199 interrupt-parent = <&UIC0>; 201 interrupt-parent = <&UIC0>;
200 interrupts = <3 4>; 202 interrupts = <0x3 0x4>;
201 }; 203 };
202 204
203 EMAC0: ethernet@10000800 { 205 EMAC0: ethernet@10000800 {
204 linux,network-index = <0>; 206 linux,network-index = <0x0>;
205 device_type = "network"; 207 device_type = "network";
206 compatible = "ibm,emac-440spe", "ibm,emac4"; 208 compatible = "ibm,emac-440spe", "ibm,emac4";
207 interrupt-parent = <&UIC1>; 209 interrupt-parent = <&UIC1>;
208 interrupts = <1c 4 1d 4>; 210 interrupts = <0x1c 0x4 0x1d 0x4>;
209 reg = <10000800 70>; 211 reg = <0x10000800 0x00000074>;
210 local-mac-address = [000000000000]; 212 local-mac-address = [000000000000];
211 mal-device = <&MAL0>; 213 mal-device = <&MAL0>;
212 mal-tx-channel = <0>; 214 mal-tx-channel = <0>;
213 mal-rx-channel = <0>; 215 mal-rx-channel = <0>;
214 cell-index = <0>; 216 cell-index = <0>;
215 max-frame-size = <2328>; 217 max-frame-size = <9000>;
216 rx-fifo-size = <1000>; 218 rx-fifo-size = <4096>;
217 tx-fifo-size = <800>; 219 tx-fifo-size = <2048>;
218 phy-mode = "gmii"; 220 phy-mode = "gmii";
219 phy-map = <00000000>; 221 phy-map = <0x00000000>;
220 has-inverted-stacr-oc; 222 has-inverted-stacr-oc;
221 has-new-stacr-staopc; 223 has-new-stacr-staopc;
222 }; 224 };
@@ -231,23 +233,23 @@
231 primary; 233 primary;
232 large-inbound-windows; 234 large-inbound-windows;
233 enable-msi-hole; 235 enable-msi-hole;
234 reg = <c 0ec00000 8 /* Config space access */ 236 reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */
235 0 0 0 /* no IACK cycles */ 237 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
236 c 0ed00000 4 /* Special cycles */ 238 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */
237 c 0ec80000 100 /* Internal registers */ 239 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */
238 c 0ec80100 fc>; /* Internal messaging registers */ 240 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */
239 241
240 /* Outbound ranges, one memory and one IO, 242 /* Outbound ranges, one memory and one IO,
241 * later cannot be changed 243 * later cannot be changed
242 */ 244 */
243 ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 245 ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000
244 01000000 0 00000000 0000000c 08000000 0 00010000>; 246 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>;
245 247
246 /* Inbound 2GB range starting at 0 */ 248 /* Inbound 2GB range starting at 0 */
247 dma-ranges = <42000000 0 0 0 0 0 80000000>; 249 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
248 250
249 /* This drives busses 0 to 0xf */ 251 /* This drives busses 0 to 0xf */
250 bus-range = <0 f>; 252 bus-range = <0x0 0xf>;
251 253
252 /* 254 /*
253 * On Katmai, the following PCI-X interrupts signals 255 * On Katmai, the following PCI-X interrupts signals
@@ -258,13 +260,13 @@
258 * INTC: J2: 1-2 260 * INTC: J2: 1-2
259 * INTD: J1: 1-2 261 * INTD: J1: 1-2
260 */ 262 */
261 interrupt-map-mask = <f800 0 0 7>; 263 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
262 interrupt-map = < 264 interrupt-map = <
263 /* IDSEL 1 */ 265 /* IDSEL 1 */
264 0800 0 0 1 &UIC1 14 8 266 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8
265 0800 0 0 2 &UIC1 13 8 267 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8
266 0800 0 0 3 &UIC1 12 8 268 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8
267 0800 0 0 4 &UIC1 11 8 269 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8
268 >; 270 >;
269 }; 271 };
270 272
@@ -275,23 +277,23 @@
275 #address-cells = <3>; 277 #address-cells = <3>;
276 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 278 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
277 primary; 279 primary;
278 port = <0>; /* port number */ 280 port = <0x0>; /* port number */
279 reg = <d 00000000 20000000 /* Config space access */ 281 reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */
280 c 10000000 00001000>; /* Registers */ 282 0x0000000c 0x10000000 0x00001000>; /* Registers */
281 dcr-reg = <100 020>; 283 dcr-reg = <0x100 0x020>;
282 sdr-base = <300>; 284 sdr-base = <0x300>;
283 285
284 /* Outbound ranges, one memory and one IO, 286 /* Outbound ranges, one memory and one IO,
285 * later cannot be changed 287 * later cannot be changed
286 */ 288 */
287 ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 289 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000
288 01000000 0 00000000 0000000f 80000000 0 00010000>; 290 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>;
289 291
290 /* Inbound 2GB range starting at 0 */ 292 /* Inbound 2GB range starting at 0 */
291 dma-ranges = <42000000 0 0 0 0 0 80000000>; 293 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
292 294
293 /* This drives busses 10 to 0x1f */ 295 /* This drives busses 10 to 0x1f */
294 bus-range = <10 1f>; 296 bus-range = <0x10 0x1f>;
295 297
296 /* Legacy interrupts (note the weird polarity, the bridge seems 298 /* Legacy interrupts (note the weird polarity, the bridge seems
297 * to invert PCIe legacy interrupts). 299 * to invert PCIe legacy interrupts).
@@ -301,12 +303,12 @@
301 * below are basically de-swizzled numbers. 303 * below are basically de-swizzled numbers.
302 * The real slot is on idsel 0, so the swizzling is 1:1 304 * The real slot is on idsel 0, so the swizzling is 1:1
303 */ 305 */
304 interrupt-map-mask = <0000 0 0 7>; 306 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
305 interrupt-map = < 307 interrupt-map = <
306 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ 308 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */
307 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ 309 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */
308 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ 310 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */
309 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; 311 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>;
310 }; 312 };
311 313
312 PCIE1: pciex@d20000000 { 314 PCIE1: pciex@d20000000 {
@@ -316,23 +318,23 @@
316 #address-cells = <3>; 318 #address-cells = <3>;
317 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 319 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
318 primary; 320 primary;
319 port = <1>; /* port number */ 321 port = <0x1>; /* port number */
320 reg = <d 20000000 20000000 /* Config space access */ 322 reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */
321 c 10001000 00001000>; /* Registers */ 323 0x0000000c 0x10001000 0x00001000>; /* Registers */
322 dcr-reg = <120 020>; 324 dcr-reg = <0x120 0x020>;
323 sdr-base = <340>; 325 sdr-base = <0x340>;
324 326
325 /* Outbound ranges, one memory and one IO, 327 /* Outbound ranges, one memory and one IO,
326 * later cannot be changed 328 * later cannot be changed
327 */ 329 */
328 ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 330 ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000
329 01000000 0 00000000 0000000f 80010000 0 00010000>; 331 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>;
330 332
331 /* Inbound 2GB range starting at 0 */ 333 /* Inbound 2GB range starting at 0 */
332 dma-ranges = <42000000 0 0 0 0 0 80000000>; 334 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
333 335
334 /* This drives busses 10 to 0x1f */ 336 /* This drives busses 10 to 0x1f */
335 bus-range = <20 2f>; 337 bus-range = <0x20 0x2f>;
336 338
337 /* Legacy interrupts (note the weird polarity, the bridge seems 339 /* Legacy interrupts (note the weird polarity, the bridge seems
338 * to invert PCIe legacy interrupts). 340 * to invert PCIe legacy interrupts).
@@ -342,12 +344,12 @@
342 * below are basically de-swizzled numbers. 344 * below are basically de-swizzled numbers.
343 * The real slot is on idsel 0, so the swizzling is 1:1 345 * The real slot is on idsel 0, so the swizzling is 1:1
344 */ 346 */
345 interrupt-map-mask = <0000 0 0 7>; 347 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
346 interrupt-map = < 348 interrupt-map = <
347 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ 349 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */
348 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ 350 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */
349 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ 351 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */
350 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; 352 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>;
351 }; 353 };
352 354
353 PCIE2: pciex@d40000000 { 355 PCIE2: pciex@d40000000 {
@@ -357,23 +359,23 @@
357 #address-cells = <3>; 359 #address-cells = <3>;
358 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; 360 compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex";
359 primary; 361 primary;
360 port = <2>; /* port number */ 362 port = <0x2>; /* port number */
361 reg = <d 40000000 20000000 /* Config space access */ 363 reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */
362 c 10002000 00001000>; /* Registers */ 364 0x0000000c 0x10002000 0x00001000>; /* Registers */
363 dcr-reg = <140 020>; 365 dcr-reg = <0x140 0x020>;
364 sdr-base = <370>; 366 sdr-base = <0x370>;
365 367
366 /* Outbound ranges, one memory and one IO, 368 /* Outbound ranges, one memory and one IO,
367 * later cannot be changed 369 * later cannot be changed
368 */ 370 */
369 ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 371 ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000
370 01000000 0 00000000 0000000f 80020000 0 00010000>; 372 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>;
371 373
372 /* Inbound 2GB range starting at 0 */ 374 /* Inbound 2GB range starting at 0 */
373 dma-ranges = <42000000 0 0 0 0 0 80000000>; 375 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
374 376
375 /* This drives busses 10 to 0x1f */ 377 /* This drives busses 10 to 0x1f */
376 bus-range = <30 3f>; 378 bus-range = <0x30 0x3f>;
377 379
378 /* Legacy interrupts (note the weird polarity, the bridge seems 380 /* Legacy interrupts (note the weird polarity, the bridge seems
379 * to invert PCIe legacy interrupts). 381 * to invert PCIe legacy interrupts).
@@ -383,12 +385,12 @@
383 * below are basically de-swizzled numbers. 385 * below are basically de-swizzled numbers.
384 * The real slot is on idsel 0, so the swizzling is 1:1 386 * The real slot is on idsel 0, so the swizzling is 1:1
385 */ 387 */
386 interrupt-map-mask = <0000 0 0 7>; 388 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
387 interrupt-map = < 389 interrupt-map = <
388 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ 390 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */
389 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ 391 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */
390 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ 392 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */
391 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; 393 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
392 }; 394 };
393 }; 395 };
394 396
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 48c9a6e71f1a..dececc4b5ff2 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <1>; 14 #address-cells = <1>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,kilauea"; 16 model = "amcc,kilauea";
15 compatible = "amcc,kilauea"; 17 compatible = "amcc,kilauea";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,405EX"; 33 model = "PowerPC,405EX";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */ 35 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <4000>; /* 16 kB */ 39 i-cache-size = <16384>; /* 16 kB */
38 d-cache-size = <4000>; /* 16 kB */ 40 d-cache-size = <16384>; /* 16 kB */
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0>; /* Filled in by U-Boot */ 48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
47 }; 49 };
48 50
49 UIC0: interrupt-controller { 51 UIC0: interrupt-controller {
50 compatible = "ibm,uic-405ex", "ibm,uic"; 52 compatible = "ibm,uic-405ex", "ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 009>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -60,11 +62,11 @@
60 compatible = "ibm,uic-405ex","ibm,uic"; 62 compatible = "ibm,uic-405ex","ibm,uic";
61 interrupt-controller; 63 interrupt-controller;
62 cell-index = <1>; 64 cell-index = <1>;
63 dcr-reg = <0d0 009>; 65 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>; 66 #address-cells = <0>;
65 #size-cells = <0>; 67 #size-cells = <0>;
66 #interrupt-cells = <2>; 68 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */ 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>; 70 interrupt-parent = <&UIC0>;
69 }; 71 };
70 72
@@ -72,11 +74,11 @@
72 compatible = "ibm,uic-405ex","ibm,uic"; 74 compatible = "ibm,uic-405ex","ibm,uic";
73 interrupt-controller; 75 interrupt-controller;
74 cell-index = <2>; 76 cell-index = <2>;
75 dcr-reg = <0e0 009>; 77 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>; 78 #address-cells = <0>;
77 #size-cells = <0>; 79 #size-cells = <0>;
78 #interrupt-cells = <2>; 80 #interrupt-cells = <2>;
79 interrupts = <1c 4 1d 4>; /* cascade */ 81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>; 82 interrupt-parent = <&UIC0>;
81 }; 83 };
82 84
@@ -89,72 +91,72 @@
89 91
90 SDRAM0: memory-controller { 92 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-405ex"; 93 compatible = "ibm,sdram-405ex";
92 dcr-reg = <010 2>; 94 dcr-reg = <0x010 0x002>;
93 }; 95 };
94 96
95 MAL0: mcmal { 97 MAL0: mcmal {
96 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 98 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
97 dcr-reg = <180 62>; 99 dcr-reg = <0x180 0x062>;
98 num-tx-chans = <2>; 100 num-tx-chans = <2>;
99 num-rx-chans = <2>; 101 num-rx-chans = <2>;
100 interrupt-parent = <&MAL0>; 102 interrupt-parent = <&MAL0>;
101 interrupts = <0 1 2 3 4>; 103 interrupts = <0x0 0x1 0x2 0x3 0x4>;
102 #interrupt-cells = <1>; 104 #interrupt-cells = <1>;
103 #address-cells = <0>; 105 #address-cells = <0>;
104 #size-cells = <0>; 106 #size-cells = <0>;
105 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 107 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
106 /*RXEOB*/ 1 &UIC0 b 4 108 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
107 /*SERR*/ 2 &UIC1 0 4 109 /*SERR*/ 0x2 &UIC1 0x0 0x4
108 /*TXDE*/ 3 &UIC1 1 4 110 /*TXDE*/ 0x3 &UIC1 0x1 0x4
109 /*RXDE*/ 4 &UIC1 2 4>; 111 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
110 interrupt-map-mask = <ffffffff>; 112 interrupt-map-mask = <0xffffffff>;
111 }; 113 };
112 114
113 POB0: opb { 115 POB0: opb {
114 compatible = "ibm,opb-405ex", "ibm,opb"; 116 compatible = "ibm,opb-405ex", "ibm,opb";
115 #address-cells = <1>; 117 #address-cells = <1>;
116 #size-cells = <1>; 118 #size-cells = <1>;
117 ranges = <80000000 80000000 10000000 119 ranges = <0x80000000 0x80000000 0x10000000
118 ef600000 ef600000 a00000 120 0xef600000 0xef600000 0x00a00000
119 f0000000 f0000000 10000000>; 121 0xf0000000 0xf0000000 0x10000000>;
120 dcr-reg = <0a0 5>; 122 dcr-reg = <0x0a0 0x005>;
121 clock-frequency = <0>; /* Filled in by U-Boot */ 123 clock-frequency = <0>; /* Filled in by U-Boot */
122 124
123 EBC0: ebc { 125 EBC0: ebc {
124 compatible = "ibm,ebc-405ex", "ibm,ebc"; 126 compatible = "ibm,ebc-405ex", "ibm,ebc";
125 dcr-reg = <012 2>; 127 dcr-reg = <0x012 0x002>;
126 #address-cells = <2>; 128 #address-cells = <2>;
127 #size-cells = <1>; 129 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */ 130 clock-frequency = <0>; /* Filled in by U-Boot */
129 /* ranges property is supplied by U-Boot */ 131 /* ranges property is supplied by U-Boot */
130 interrupts = <5 1>; 132 interrupts = <0x5 0x1>;
131 interrupt-parent = <&UIC1>; 133 interrupt-parent = <&UIC1>;
132 134
133 nor_flash@0,0 { 135 nor_flash@0,0 {
134 compatible = "amd,s29gl512n", "cfi-flash"; 136 compatible = "amd,s29gl512n", "cfi-flash";
135 bank-width = <2>; 137 bank-width = <2>;
136 reg = <0 000000 4000000>; 138 reg = <0x00000000 0x00000000 0x04000000>;
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <1>; 140 #size-cells = <1>;
139 partition@0 { 141 partition@0 {
140 label = "kernel"; 142 label = "kernel";
141 reg = <0 200000>; 143 reg = <0x00000000 0x00200000>;
142 }; 144 };
143 partition@200000 { 145 partition@200000 {
144 label = "root"; 146 label = "root";
145 reg = <200000 200000>; 147 reg = <0x00200000 0x00200000>;
146 }; 148 };
147 partition@400000 { 149 partition@400000 {
148 label = "user"; 150 label = "user";
149 reg = <400000 3b60000>; 151 reg = <0x00400000 0x03b60000>;
150 }; 152 };
151 partition@3f60000 { 153 partition@3f60000 {
152 label = "env"; 154 label = "env";
153 reg = <3f60000 40000>; 155 reg = <0x03f60000 0x00040000>;
154 }; 156 };
155 partition@3fa0000 { 157 partition@3fa0000 {
156 label = "u-boot"; 158 label = "u-boot";
157 reg = <3fa0000 60000>; 159 reg = <0x03fa0000 0x00060000>;
158 }; 160 };
159 }; 161 };
160 }; 162 };
@@ -162,68 +164,68 @@
162 UART0: serial@ef600200 { 164 UART0: serial@ef600200 {
163 device_type = "serial"; 165 device_type = "serial";
164 compatible = "ns16550"; 166 compatible = "ns16550";
165 reg = <ef600200 8>; 167 reg = <0xef600200 0x00000008>;
166 virtual-reg = <ef600200>; 168 virtual-reg = <0xef600200>;
167 clock-frequency = <0>; /* Filled in by U-Boot */ 169 clock-frequency = <0>; /* Filled in by U-Boot */
168 current-speed = <0>; 170 current-speed = <0>;
169 interrupt-parent = <&UIC0>; 171 interrupt-parent = <&UIC0>;
170 interrupts = <1a 4>; 172 interrupts = <0x1a 0x4>;
171 }; 173 };
172 174
173 UART1: serial@ef600300 { 175 UART1: serial@ef600300 {
174 device_type = "serial"; 176 device_type = "serial";
175 compatible = "ns16550"; 177 compatible = "ns16550";
176 reg = <ef600300 8>; 178 reg = <0xef600300 0x00000008>;
177 virtual-reg = <ef600300>; 179 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */ 180 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>; 181 current-speed = <0>;
180 interrupt-parent = <&UIC0>; 182 interrupt-parent = <&UIC0>;
181 interrupts = <1 4>; 183 interrupts = <0x1 0x4>;
182 }; 184 };
183 185
184 IIC0: i2c@ef600400 { 186 IIC0: i2c@ef600400 {
185 compatible = "ibm,iic-405ex", "ibm,iic"; 187 compatible = "ibm,iic-405ex", "ibm,iic";
186 reg = <ef600400 14>; 188 reg = <0xef600400 0x00000014>;
187 interrupt-parent = <&UIC0>; 189 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>; 190 interrupts = <0x2 0x4>;
189 }; 191 };
190 192
191 IIC1: i2c@ef600500 { 193 IIC1: i2c@ef600500 {
192 compatible = "ibm,iic-405ex", "ibm,iic"; 194 compatible = "ibm,iic-405ex", "ibm,iic";
193 reg = <ef600500 14>; 195 reg = <0xef600500 0x00000014>;
194 interrupt-parent = <&UIC0>; 196 interrupt-parent = <&UIC0>;
195 interrupts = <7 4>; 197 interrupts = <0x7 0x4>;
196 }; 198 };
197 199
198 200
199 RGMII0: emac-rgmii@ef600b00 { 201 RGMII0: emac-rgmii@ef600b00 {
200 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 202 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
201 reg = <ef600b00 104>; 203 reg = <0xef600b00 0x00000104>;
202 has-mdio; 204 has-mdio;
203 }; 205 };
204 206
205 EMAC0: ethernet@ef600900 { 207 EMAC0: ethernet@ef600900 {
206 linux,network-index = <0>; 208 linux,network-index = <0x0>;
207 device_type = "network"; 209 device_type = "network";
208 compatible = "ibm,emac-405ex", "ibm,emac4"; 210 compatible = "ibm,emac-405ex", "ibm,emac4sync";
209 interrupt-parent = <&EMAC0>; 211 interrupt-parent = <&EMAC0>;
210 interrupts = <0 1>; 212 interrupts = <0x0 0x1>;
211 #interrupt-cells = <1>; 213 #interrupt-cells = <1>;
212 #address-cells = <0>; 214 #address-cells = <0>;
213 #size-cells = <0>; 215 #size-cells = <0>;
214 interrupt-map = </*Status*/ 0 &UIC0 18 4 216 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
215 /*Wake*/ 1 &UIC1 1d 4>; 217 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
216 reg = <ef600900 70>; 218 reg = <0xef600900 0x000000c4>;
217 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 219 local-mac-address = [000000000000]; /* Filled in by U-Boot */
218 mal-device = <&MAL0>; 220 mal-device = <&MAL0>;
219 mal-tx-channel = <0>; 221 mal-tx-channel = <0>;
220 mal-rx-channel = <0>; 222 mal-rx-channel = <0>;
221 cell-index = <0>; 223 cell-index = <0>;
222 max-frame-size = <2328>; 224 max-frame-size = <9000>;
223 rx-fifo-size = <1000>; 225 rx-fifo-size = <4096>;
224 tx-fifo-size = <800>; 226 tx-fifo-size = <2048>;
225 phy-mode = "rgmii"; 227 phy-mode = "rgmii";
226 phy-map = <00000000>; 228 phy-map = <0x00000000>;
227 rgmii-device = <&RGMII0>; 229 rgmii-device = <&RGMII0>;
228 rgmii-channel = <0>; 230 rgmii-channel = <0>;
229 has-inverted-stacr-oc; 231 has-inverted-stacr-oc;
@@ -231,27 +233,27 @@
231 }; 233 };
232 234
233 EMAC1: ethernet@ef600a00 { 235 EMAC1: ethernet@ef600a00 {
234 linux,network-index = <1>; 236 linux,network-index = <0x1>;
235 device_type = "network"; 237 device_type = "network";
236 compatible = "ibm,emac-405ex", "ibm,emac4"; 238 compatible = "ibm,emac-405ex", "ibm,emac4sync";
237 interrupt-parent = <&EMAC1>; 239 interrupt-parent = <&EMAC1>;
238 interrupts = <0 1>; 240 interrupts = <0x0 0x1>;
239 #interrupt-cells = <1>; 241 #interrupt-cells = <1>;
240 #address-cells = <0>; 242 #address-cells = <0>;
241 #size-cells = <0>; 243 #size-cells = <0>;
242 interrupt-map = </*Status*/ 0 &UIC0 19 4 244 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
243 /*Wake*/ 1 &UIC1 1f 4>; 245 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
244 reg = <ef600a00 70>; 246 reg = <0xef600a00 0x000000c4>;
245 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 247 local-mac-address = [000000000000]; /* Filled in by U-Boot */
246 mal-device = <&MAL0>; 248 mal-device = <&MAL0>;
247 mal-tx-channel = <1>; 249 mal-tx-channel = <1>;
248 mal-rx-channel = <1>; 250 mal-rx-channel = <1>;
249 cell-index = <1>; 251 cell-index = <1>;
250 max-frame-size = <2328>; 252 max-frame-size = <9000>;
251 rx-fifo-size = <1000>; 253 rx-fifo-size = <4096>;
252 tx-fifo-size = <800>; 254 tx-fifo-size = <2048>;
253 phy-mode = "rgmii"; 255 phy-mode = "rgmii";
254 phy-map = <00000000>; 256 phy-map = <0x00000000>;
255 rgmii-device = <&RGMII0>; 257 rgmii-device = <&RGMII0>;
256 rgmii-channel = <1>; 258 rgmii-channel = <1>;
257 has-inverted-stacr-oc; 259 has-inverted-stacr-oc;
@@ -266,23 +268,23 @@
266 #address-cells = <3>; 268 #address-cells = <3>;
267 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 269 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
268 primary; 270 primary;
269 port = <0>; /* port number */ 271 port = <0x0>; /* port number */
270 reg = <a0000000 20000000 /* Config space access */ 272 reg = <0xa0000000 0x20000000 /* Config space access */
271 ef000000 00001000>; /* Registers */ 273 0xef000000 0x00001000>; /* Registers */
272 dcr-reg = <040 020>; 274 dcr-reg = <0x040 0x020>;
273 sdr-base = <400>; 275 sdr-base = <0x400>;
274 276
275 /* Outbound ranges, one memory and one IO, 277 /* Outbound ranges, one memory and one IO,
276 * later cannot be changed 278 * later cannot be changed
277 */ 279 */
278 ranges = <02000000 0 80000000 90000000 0 08000000 280 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
279 01000000 0 00000000 e0000000 0 00010000>; 281 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
280 282
281 /* Inbound 2GB range starting at 0 */ 283 /* Inbound 2GB range starting at 0 */
282 dma-ranges = <42000000 0 0 0 0 80000000>; 284 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
283 285
284 /* This drives busses 0x00 to 0x3f */ 286 /* This drives busses 0x00 to 0x3f */
285 bus-range = <00 3f>; 287 bus-range = <0x0 0x3f>;
286 288
287 /* Legacy interrupts (note the weird polarity, the bridge seems 289 /* Legacy interrupts (note the weird polarity, the bridge seems
288 * to invert PCIe legacy interrupts). 290 * to invert PCIe legacy interrupts).
@@ -292,12 +294,12 @@
292 * below are basically de-swizzled numbers. 294 * below are basically de-swizzled numbers.
293 * The real slot is on idsel 0, so the swizzling is 1:1 295 * The real slot is on idsel 0, so the swizzling is 1:1
294 */ 296 */
295 interrupt-map-mask = <0000 0 0 7>; 297 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
296 interrupt-map = < 298 interrupt-map = <
297 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ 299 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
298 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ 300 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
299 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ 301 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
300 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; 302 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
301 }; 303 };
302 304
303 PCIE1: pciex@0c0000000 { 305 PCIE1: pciex@0c0000000 {
@@ -307,23 +309,23 @@
307 #address-cells = <3>; 309 #address-cells = <3>;
308 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 310 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
309 primary; 311 primary;
310 port = <1>; /* port number */ 312 port = <0x1>; /* port number */
311 reg = <c0000000 20000000 /* Config space access */ 313 reg = <0xc0000000 0x20000000 /* Config space access */
312 ef001000 00001000>; /* Registers */ 314 0xef001000 0x00001000>; /* Registers */
313 dcr-reg = <060 020>; 315 dcr-reg = <0x060 0x020>;
314 sdr-base = <440>; 316 sdr-base = <0x440>;
315 317
316 /* Outbound ranges, one memory and one IO, 318 /* Outbound ranges, one memory and one IO,
317 * later cannot be changed 319 * later cannot be changed
318 */ 320 */
319 ranges = <02000000 0 80000000 98000000 0 08000000 321 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
320 01000000 0 00000000 e0010000 0 00010000>; 322 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
321 323
322 /* Inbound 2GB range starting at 0 */ 324 /* Inbound 2GB range starting at 0 */
323 dma-ranges = <42000000 0 0 0 0 80000000>; 325 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
324 326
325 /* This drives busses 0x40 to 0x7f */ 327 /* This drives busses 0x40 to 0x7f */
326 bus-range = <40 7f>; 328 bus-range = <0x40 0x7f>;
327 329
328 /* Legacy interrupts (note the weird polarity, the bridge seems 330 /* Legacy interrupts (note the weird polarity, the bridge seems
329 * to invert PCIe legacy interrupts). 331 * to invert PCIe legacy interrupts).
@@ -333,12 +335,12 @@
333 * below are basically de-swizzled numbers. 335 * below are basically de-swizzled numbers.
334 * The real slot is on idsel 0, so the swizzling is 1:1 336 * The real slot is on idsel 0, so the swizzling is 1:1
335 */ 337 */
336 interrupt-map-mask = <0000 0 0 7>; 338 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
337 interrupt-map = < 339 interrupt-map = <
338 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ 340 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
339 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ 341 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
340 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ 342 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
341 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; 343 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
342 }; 344 };
343 }; 345 };
344}; 346};
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts
index f869ce3ca0b7..49737589ffc8 100644
--- a/arch/powerpc/boot/dts/ksi8560.dts
+++ b/arch/powerpc/boot/dts/ksi8560.dts
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; /* From U-boot */ 40 timebase-frequency = <0>; /* From U-boot */
41 bus-frequency = <0>; /* From U-boot */ 41 bus-frequency = <0>; /* From U-boot */
42 clock-frequency = <0>; /* From U-boot */ 42 clock-frequency = <0>; /* From U-boot */
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -58,16 +59,16 @@
58 memory-controller@2000 { 59 memory-controller@2000 {
59 compatible = "fsl,8540-memory-controller"; 60 compatible = "fsl,8540-memory-controller";
60 reg = <0x2000 0x1000>; 61 reg = <0x2000 0x1000>;
61 interrupt-parent = <&MPIC>; 62 interrupt-parent = <&mpic>;
62 interrupts = <0x12 0x2>; 63 interrupts = <0x12 0x2>;
63 }; 64 };
64 65
65 l2-cache-controller@20000 { 66 L2: l2-cache-controller@20000 {
66 compatible = "fsl,8540-l2-cache-controller"; 67 compatible = "fsl,8540-l2-cache-controller";
67 reg = <0x20000 0x1000>; 68 reg = <0x20000 0x1000>;
68 cache-line-size = <0x20>; /* 32 bytes */ 69 cache-line-size = <0x20>; /* 32 bytes */
69 cache-size = <0x40000>; /* L2, 256K */ 70 cache-size = <0x40000>; /* L2, 256K */
70 interrupt-parent = <&MPIC>; 71 interrupt-parent = <&mpic>;
71 interrupts = <0x10 0x2>; 72 interrupts = <0x10 0x2>;
72 }; 73 };
73 74
@@ -78,10 +79,51 @@
78 compatible = "fsl-i2c"; 79 compatible = "fsl-i2c";
79 reg = <0x3000 0x100>; 80 reg = <0x3000 0x100>;
80 interrupts = <0x2b 0x2>; 81 interrupts = <0x2b 0x2>;
81 interrupt-parent = <&MPIC>; 82 interrupt-parent = <&mpic>;
82 dfsrr; 83 dfsrr;
83 }; 84 };
84 85
86 dma@21300 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
90 reg = <0x21300 0x4>;
91 ranges = <0x0 0x21100 0x200>;
92 cell-index = <0>;
93 dma-channel@0 {
94 compatible = "fsl,mpc8560-dma-channel",
95 "fsl,eloplus-dma-channel";
96 reg = <0x0 0x80>;
97 cell-index = <0>;
98 interrupt-parent = <&mpic>;
99 interrupts = <20 2>;
100 };
101 dma-channel@80 {
102 compatible = "fsl,mpc8560-dma-channel",
103 "fsl,eloplus-dma-channel";
104 reg = <0x80 0x80>;
105 cell-index = <1>;
106 interrupt-parent = <&mpic>;
107 interrupts = <21 2>;
108 };
109 dma-channel@100 {
110 compatible = "fsl,mpc8560-dma-channel",
111 "fsl,eloplus-dma-channel";
112 reg = <0x100 0x80>;
113 cell-index = <2>;
114 interrupt-parent = <&mpic>;
115 interrupts = <22 2>;
116 };
117 dma-channel@180 {
118 compatible = "fsl,mpc8560-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x180 0x80>;
121 cell-index = <3>;
122 interrupt-parent = <&mpic>;
123 interrupts = <23 2>;
124 };
125 };
126
85 mdio@24520 { /* For TSECs */ 127 mdio@24520 { /* For TSECs */
86 #address-cells = <1>; 128 #address-cells = <1>;
87 #size-cells = <0>; 129 #size-cells = <0>;
@@ -89,13 +131,13 @@
89 reg = <0x24520 0x20>; 131 reg = <0x24520 0x20>;
90 132
91 PHY1: ethernet-phy@1 { 133 PHY1: ethernet-phy@1 {
92 interrupt-parent = <&MPIC>; 134 interrupt-parent = <&mpic>;
93 reg = <0x1>; 135 reg = <0x1>;
94 device_type = "ethernet-phy"; 136 device_type = "ethernet-phy";
95 }; 137 };
96 138
97 PHY2: ethernet-phy@2 { 139 PHY2: ethernet-phy@2 {
98 interrupt-parent = <&MPIC>; 140 interrupt-parent = <&mpic>;
99 reg = <0x2>; 141 reg = <0x2>;
100 device_type = "ethernet-phy"; 142 device_type = "ethernet-phy";
101 }; 143 };
@@ -109,7 +151,7 @@
109 /* Mac address filled in by bootwrapper */ 151 /* Mac address filled in by bootwrapper */
110 local-mac-address = [ 00 00 00 00 00 00 ]; 152 local-mac-address = [ 00 00 00 00 00 00 ];
111 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>; 153 interrupts = <0x1d 0x2 0x1e 0x2 0x22 0x2>;
112 interrupt-parent = <&MPIC>; 154 interrupt-parent = <&mpic>;
113 phy-handle = <&PHY1>; 155 phy-handle = <&PHY1>;
114 }; 156 };
115 157
@@ -121,11 +163,11 @@
121 /* Mac address filled in by bootwrapper */ 163 /* Mac address filled in by bootwrapper */
122 local-mac-address = [ 00 00 00 00 00 00 ]; 164 local-mac-address = [ 00 00 00 00 00 00 ];
123 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>; 165 interrupts = <0x23 0x2 0x24 0x2 0x28 0x2>;
124 interrupt-parent = <&MPIC>; 166 interrupt-parent = <&mpic>;
125 phy-handle = <&PHY2>; 167 phy-handle = <&PHY2>;
126 }; 168 };
127 169
128 MPIC: pic@40000 { 170 mpic: pic@40000 {
129 #address-cells = <0>; 171 #address-cells = <0>;
130 #interrupt-cells = <2>; 172 #interrupt-cells = <2>;
131 interrupt-controller; 173 interrupt-controller;
@@ -164,7 +206,7 @@
164 #interrupt-cells = <2>; 206 #interrupt-cells = <2>;
165 interrupt-controller; 207 interrupt-controller;
166 interrupts = <0x2e 0x2>; 208 interrupts = <0x2e 0x2>;
167 interrupt-parent = <&MPIC>; 209 interrupt-parent = <&mpic>;
168 reg = <0x90c00 0x80>; 210 reg = <0x90c00 0x80>;
169 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic"; 211 compatible = "fsl,mpc8560-cpm-pic", "fsl,cpm2-pic";
170 }; 212 };
@@ -202,7 +244,7 @@
202 fsl,mdc-pin = <25>; 244 fsl,mdc-pin = <25>;
203 245
204 PHY0: ethernet-phy@0 { 246 PHY0: ethernet-phy@0 {
205 interrupt-parent = <&MPIC>; 247 interrupt-parent = <&mpic>;
206 reg = <0x0>; 248 reg = <0x0>;
207 device_type = "ethernet-phy"; 249 device_type = "ethernet-phy";
208 }; 250 };
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts
index 84cc5e72ddd8..945508c7e7d8 100644
--- a/arch/powerpc/boot/dts/makalu.dts
+++ b/arch/powerpc/boot/dts/makalu.dts
@@ -8,12 +8,14 @@
8 * any warranty of any kind, whether express or implied. 8 * any warranty of any kind, whether express or implied.
9 */ 9 */
10 10
11/dts-v1/;
12
11/ { 13/ {
12 #address-cells = <1>; 14 #address-cells = <1>;
13 #size-cells = <1>; 15 #size-cells = <1>;
14 model = "amcc,makalu"; 16 model = "amcc,makalu";
15 compatible = "amcc,makalu"; 17 compatible = "amcc,makalu";
16 dcr-parent = <&/cpus/cpu@0>; 18 dcr-parent = <&{/cpus/cpu@0}>;
17 19
18 aliases { 20 aliases {
19 ethernet0 = &EMAC0; 21 ethernet0 = &EMAC0;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,405EX"; 33 model = "PowerPC,405EX";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <0>; /* Filled in by U-Boot */ 35 clock-frequency = <0>; /* Filled in by U-Boot */
34 timebase-frequency = <0>; /* Filled in by U-Boot */ 36 timebase-frequency = <0>; /* Filled in by U-Boot */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <4000>; /* 16 kB */ 39 i-cache-size = <16384>; /* 16 kB */
38 d-cache-size = <4000>; /* 16 kB */ 40 d-cache-size = <16384>; /* 16 kB */
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0>; /* Filled in by U-Boot */ 48 reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */
47 }; 49 };
48 50
49 UIC0: interrupt-controller { 51 UIC0: interrupt-controller {
50 compatible = "ibm,uic-405ex", "ibm,uic"; 52 compatible = "ibm,uic-405ex", "ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 009>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -60,11 +62,11 @@
60 compatible = "ibm,uic-405ex","ibm,uic"; 62 compatible = "ibm,uic-405ex","ibm,uic";
61 interrupt-controller; 63 interrupt-controller;
62 cell-index = <1>; 64 cell-index = <1>;
63 dcr-reg = <0d0 009>; 65 dcr-reg = <0x0d0 0x009>;
64 #address-cells = <0>; 66 #address-cells = <0>;
65 #size-cells = <0>; 67 #size-cells = <0>;
66 #interrupt-cells = <2>; 68 #interrupt-cells = <2>;
67 interrupts = <1e 4 1f 4>; /* cascade */ 69 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
68 interrupt-parent = <&UIC0>; 70 interrupt-parent = <&UIC0>;
69 }; 71 };
70 72
@@ -72,11 +74,11 @@
72 compatible = "ibm,uic-405ex","ibm,uic"; 74 compatible = "ibm,uic-405ex","ibm,uic";
73 interrupt-controller; 75 interrupt-controller;
74 cell-index = <2>; 76 cell-index = <2>;
75 dcr-reg = <0e0 009>; 77 dcr-reg = <0x0e0 0x009>;
76 #address-cells = <0>; 78 #address-cells = <0>;
77 #size-cells = <0>; 79 #size-cells = <0>;
78 #interrupt-cells = <2>; 80 #interrupt-cells = <2>;
79 interrupts = <1c 4 1d 4>; /* cascade */ 81 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
80 interrupt-parent = <&UIC0>; 82 interrupt-parent = <&UIC0>;
81 }; 83 };
82 84
@@ -89,72 +91,72 @@
89 91
90 SDRAM0: memory-controller { 92 SDRAM0: memory-controller {
91 compatible = "ibm,sdram-405ex"; 93 compatible = "ibm,sdram-405ex";
92 dcr-reg = <010 2>; 94 dcr-reg = <0x010 0x002>;
93 }; 95 };
94 96
95 MAL0: mcmal { 97 MAL0: mcmal {
96 compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; 98 compatible = "ibm,mcmal-405ex", "ibm,mcmal2";
97 dcr-reg = <180 62>; 99 dcr-reg = <0x180 0x062>;
98 num-tx-chans = <2>; 100 num-tx-chans = <2>;
99 num-rx-chans = <2>; 101 num-rx-chans = <2>;
100 interrupt-parent = <&MAL0>; 102 interrupt-parent = <&MAL0>;
101 interrupts = <0 1 2 3 4>; 103 interrupts = <0x0 0x1 0x2 0x3 0x4>;
102 #interrupt-cells = <1>; 104 #interrupt-cells = <1>;
103 #address-cells = <0>; 105 #address-cells = <0>;
104 #size-cells = <0>; 106 #size-cells = <0>;
105 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 107 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
106 /*RXEOB*/ 1 &UIC0 b 4 108 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
107 /*SERR*/ 2 &UIC1 0 4 109 /*SERR*/ 0x2 &UIC1 0x0 0x4
108 /*TXDE*/ 3 &UIC1 1 4 110 /*TXDE*/ 0x3 &UIC1 0x1 0x4
109 /*RXDE*/ 4 &UIC1 2 4>; 111 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
110 interrupt-map-mask = <ffffffff>; 112 interrupt-map-mask = <0xffffffff>;
111 }; 113 };
112 114
113 POB0: opb { 115 POB0: opb {
114 compatible = "ibm,opb-405ex", "ibm,opb"; 116 compatible = "ibm,opb-405ex", "ibm,opb";
115 #address-cells = <1>; 117 #address-cells = <1>;
116 #size-cells = <1>; 118 #size-cells = <1>;
117 ranges = <80000000 80000000 10000000 119 ranges = <0x80000000 0x80000000 0x10000000
118 ef600000 ef600000 a00000 120 0xef600000 0xef600000 0x00a00000
119 f0000000 f0000000 10000000>; 121 0xf0000000 0xf0000000 0x10000000>;
120 dcr-reg = <0a0 5>; 122 dcr-reg = <0x0a0 0x005>;
121 clock-frequency = <0>; /* Filled in by U-Boot */ 123 clock-frequency = <0>; /* Filled in by U-Boot */
122 124
123 EBC0: ebc { 125 EBC0: ebc {
124 compatible = "ibm,ebc-405ex", "ibm,ebc"; 126 compatible = "ibm,ebc-405ex", "ibm,ebc";
125 dcr-reg = <012 2>; 127 dcr-reg = <0x012 0x002>;
126 #address-cells = <2>; 128 #address-cells = <2>;
127 #size-cells = <1>; 129 #size-cells = <1>;
128 clock-frequency = <0>; /* Filled in by U-Boot */ 130 clock-frequency = <0>; /* Filled in by U-Boot */
129 /* ranges property is supplied by U-Boot */ 131 /* ranges property is supplied by U-Boot */
130 interrupts = <5 1>; 132 interrupts = <0x5 0x1>;
131 interrupt-parent = <&UIC1>; 133 interrupt-parent = <&UIC1>;
132 134
133 nor_flash@0,0 { 135 nor_flash@0,0 {
134 compatible = "amd,s29gl512n", "cfi-flash"; 136 compatible = "amd,s29gl512n", "cfi-flash";
135 bank-width = <2>; 137 bank-width = <2>;
136 reg = <0 000000 4000000>; 138 reg = <0x00000000 0x00000000 0x04000000>;
137 #address-cells = <1>; 139 #address-cells = <1>;
138 #size-cells = <1>; 140 #size-cells = <1>;
139 partition@0 { 141 partition@0 {
140 label = "kernel"; 142 label = "kernel";
141 reg = <0 200000>; 143 reg = <0x00000000 0x00200000>;
142 }; 144 };
143 partition@200000 { 145 partition@200000 {
144 label = "root"; 146 label = "root";
145 reg = <200000 200000>; 147 reg = <0x00200000 0x00200000>;
146 }; 148 };
147 partition@400000 { 149 partition@400000 {
148 label = "user"; 150 label = "user";
149 reg = <400000 3b60000>; 151 reg = <0x00400000 0x03b60000>;
150 }; 152 };
151 partition@3f60000 { 153 partition@3f60000 {
152 label = "env"; 154 label = "env";
153 reg = <3f60000 40000>; 155 reg = <0x03f60000 0x00040000>;
154 }; 156 };
155 partition@3fa0000 { 157 partition@3fa0000 {
156 label = "u-boot"; 158 label = "u-boot";
157 reg = <3fa0000 60000>; 159 reg = <0x03fa0000 0x00060000>;
158 }; 160 };
159 }; 161 };
160 }; 162 };
@@ -162,68 +164,68 @@
162 UART0: serial@ef600200 { 164 UART0: serial@ef600200 {
163 device_type = "serial"; 165 device_type = "serial";
164 compatible = "ns16550"; 166 compatible = "ns16550";
165 reg = <ef600200 8>; 167 reg = <0xef600200 0x00000008>;
166 virtual-reg = <ef600200>; 168 virtual-reg = <0xef600200>;
167 clock-frequency = <0>; /* Filled in by U-Boot */ 169 clock-frequency = <0>; /* Filled in by U-Boot */
168 current-speed = <0>; 170 current-speed = <0>;
169 interrupt-parent = <&UIC0>; 171 interrupt-parent = <&UIC0>;
170 interrupts = <1a 4>; 172 interrupts = <0x1a 0x4>;
171 }; 173 };
172 174
173 UART1: serial@ef600300 { 175 UART1: serial@ef600300 {
174 device_type = "serial"; 176 device_type = "serial";
175 compatible = "ns16550"; 177 compatible = "ns16550";
176 reg = <ef600300 8>; 178 reg = <0xef600300 0x00000008>;
177 virtual-reg = <ef600300>; 179 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by U-Boot */ 180 clock-frequency = <0>; /* Filled in by U-Boot */
179 current-speed = <0>; 181 current-speed = <0>;
180 interrupt-parent = <&UIC0>; 182 interrupt-parent = <&UIC0>;
181 interrupts = <1 4>; 183 interrupts = <0x1 0x4>;
182 }; 184 };
183 185
184 IIC0: i2c@ef600400 { 186 IIC0: i2c@ef600400 {
185 compatible = "ibm,iic-405ex", "ibm,iic"; 187 compatible = "ibm,iic-405ex", "ibm,iic";
186 reg = <ef600400 14>; 188 reg = <0xef600400 0x00000014>;
187 interrupt-parent = <&UIC0>; 189 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>; 190 interrupts = <0x2 0x4>;
189 }; 191 };
190 192
191 IIC1: i2c@ef600500 { 193 IIC1: i2c@ef600500 {
192 compatible = "ibm,iic-405ex", "ibm,iic"; 194 compatible = "ibm,iic-405ex", "ibm,iic";
193 reg = <ef600500 14>; 195 reg = <0xef600500 0x00000014>;
194 interrupt-parent = <&UIC0>; 196 interrupt-parent = <&UIC0>;
195 interrupts = <7 4>; 197 interrupts = <0x7 0x4>;
196 }; 198 };
197 199
198 200
199 RGMII0: emac-rgmii@ef600b00 { 201 RGMII0: emac-rgmii@ef600b00 {
200 compatible = "ibm,rgmii-405ex", "ibm,rgmii"; 202 compatible = "ibm,rgmii-405ex", "ibm,rgmii";
201 reg = <ef600b00 104>; 203 reg = <0xef600b00 0x00000104>;
202 has-mdio; 204 has-mdio;
203 }; 205 };
204 206
205 EMAC0: ethernet@ef600900 { 207 EMAC0: ethernet@ef600900 {
206 linux,network-index = <0>; 208 linux,network-index = <0x0>;
207 device_type = "network"; 209 device_type = "network";
208 compatible = "ibm,emac-405ex", "ibm,emac4"; 210 compatible = "ibm,emac-405ex", "ibm,emac4sync";
209 interrupt-parent = <&EMAC0>; 211 interrupt-parent = <&EMAC0>;
210 interrupts = <0 1>; 212 interrupts = <0x0 0x1>;
211 #interrupt-cells = <1>; 213 #interrupt-cells = <1>;
212 #address-cells = <0>; 214 #address-cells = <0>;
213 #size-cells = <0>; 215 #size-cells = <0>;
214 interrupt-map = </*Status*/ 0 &UIC0 18 4 216 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
215 /*Wake*/ 1 &UIC1 1d 4>; 217 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
216 reg = <ef600900 70>; 218 reg = <0xef600900 0x000000c4>;
217 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 219 local-mac-address = [000000000000]; /* Filled in by U-Boot */
218 mal-device = <&MAL0>; 220 mal-device = <&MAL0>;
219 mal-tx-channel = <0>; 221 mal-tx-channel = <0>;
220 mal-rx-channel = <0>; 222 mal-rx-channel = <0>;
221 cell-index = <0>; 223 cell-index = <0>;
222 max-frame-size = <2328>; 224 max-frame-size = <9000>;
223 rx-fifo-size = <1000>; 225 rx-fifo-size = <4096>;
224 tx-fifo-size = <800>; 226 tx-fifo-size = <2048>;
225 phy-mode = "rgmii"; 227 phy-mode = "rgmii";
226 phy-map = <0000003f>; /* Start at 6 */ 228 phy-map = <0x0000003f>; /* Start at 6 */
227 rgmii-device = <&RGMII0>; 229 rgmii-device = <&RGMII0>;
228 rgmii-channel = <0>; 230 rgmii-channel = <0>;
229 has-inverted-stacr-oc; 231 has-inverted-stacr-oc;
@@ -231,27 +233,27 @@
231 }; 233 };
232 234
233 EMAC1: ethernet@ef600a00 { 235 EMAC1: ethernet@ef600a00 {
234 linux,network-index = <1>; 236 linux,network-index = <0x1>;
235 device_type = "network"; 237 device_type = "network";
236 compatible = "ibm,emac-405ex", "ibm,emac4"; 238 compatible = "ibm,emac-405ex", "ibm,emac4sync";
237 interrupt-parent = <&EMAC1>; 239 interrupt-parent = <&EMAC1>;
238 interrupts = <0 1>; 240 interrupts = <0x0 0x1>;
239 #interrupt-cells = <1>; 241 #interrupt-cells = <1>;
240 #address-cells = <0>; 242 #address-cells = <0>;
241 #size-cells = <0>; 243 #size-cells = <0>;
242 interrupt-map = </*Status*/ 0 &UIC0 19 4 244 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
243 /*Wake*/ 1 &UIC1 1f 4>; 245 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
244 reg = <ef600a00 70>; 246 reg = <0xef600a00 0x000000c4>;
245 local-mac-address = [000000000000]; /* Filled in by U-Boot */ 247 local-mac-address = [000000000000]; /* Filled in by U-Boot */
246 mal-device = <&MAL0>; 248 mal-device = <&MAL0>;
247 mal-tx-channel = <1>; 249 mal-tx-channel = <1>;
248 mal-rx-channel = <1>; 250 mal-rx-channel = <1>;
249 cell-index = <1>; 251 cell-index = <1>;
250 max-frame-size = <2328>; 252 max-frame-size = <9000>;
251 rx-fifo-size = <1000>; 253 rx-fifo-size = <4096>;
252 tx-fifo-size = <800>; 254 tx-fifo-size = <2048>;
253 phy-mode = "rgmii"; 255 phy-mode = "rgmii";
254 phy-map = <00000000>; 256 phy-map = <0x00000000>;
255 rgmii-device = <&RGMII0>; 257 rgmii-device = <&RGMII0>;
256 rgmii-channel = <1>; 258 rgmii-channel = <1>;
257 has-inverted-stacr-oc; 259 has-inverted-stacr-oc;
@@ -266,23 +268,23 @@
266 #address-cells = <3>; 268 #address-cells = <3>;
267 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 269 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
268 primary; 270 primary;
269 port = <0>; /* port number */ 271 port = <0x0>; /* port number */
270 reg = <a0000000 20000000 /* Config space access */ 272 reg = <0xa0000000 0x20000000 /* Config space access */
271 ef000000 00001000>; /* Registers */ 273 0xef000000 0x00001000>; /* Registers */
272 dcr-reg = <040 020>; 274 dcr-reg = <0x040 0x020>;
273 sdr-base = <400>; 275 sdr-base = <0x400>;
274 276
275 /* Outbound ranges, one memory and one IO, 277 /* Outbound ranges, one memory and one IO,
276 * later cannot be changed 278 * later cannot be changed
277 */ 279 */
278 ranges = <02000000 0 80000000 90000000 0 08000000 280 ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000
279 01000000 0 00000000 e0000000 0 00010000>; 281 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>;
280 282
281 /* Inbound 2GB range starting at 0 */ 283 /* Inbound 2GB range starting at 0 */
282 dma-ranges = <42000000 0 0 0 0 80000000>; 284 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
283 285
284 /* This drives busses 0x00 to 0x3f */ 286 /* This drives busses 0x00 to 0x3f */
285 bus-range = <00 3f>; 287 bus-range = <0x0 0x3f>;
286 288
287 /* Legacy interrupts (note the weird polarity, the bridge seems 289 /* Legacy interrupts (note the weird polarity, the bridge seems
288 * to invert PCIe legacy interrupts). 290 * to invert PCIe legacy interrupts).
@@ -292,12 +294,12 @@
292 * below are basically de-swizzled numbers. 294 * below are basically de-swizzled numbers.
293 * The real slot is on idsel 0, so the swizzling is 1:1 295 * The real slot is on idsel 0, so the swizzling is 1:1
294 */ 296 */
295 interrupt-map-mask = <0000 0 0 7>; 297 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
296 interrupt-map = < 298 interrupt-map = <
297 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ 299 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */
298 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ 300 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */
299 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ 301 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */
300 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; 302 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>;
301 }; 303 };
302 304
303 PCIE1: pciex@0c0000000 { 305 PCIE1: pciex@0c0000000 {
@@ -307,23 +309,23 @@
307 #address-cells = <3>; 309 #address-cells = <3>;
308 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; 310 compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex";
309 primary; 311 primary;
310 port = <1>; /* port number */ 312 port = <0x1>; /* port number */
311 reg = <c0000000 20000000 /* Config space access */ 313 reg = <0xc0000000 0x20000000 /* Config space access */
312 ef001000 00001000>; /* Registers */ 314 0xef001000 0x00001000>; /* Registers */
313 dcr-reg = <060 020>; 315 dcr-reg = <0x060 0x020>;
314 sdr-base = <440>; 316 sdr-base = <0x440>;
315 317
316 /* Outbound ranges, one memory and one IO, 318 /* Outbound ranges, one memory and one IO,
317 * later cannot be changed 319 * later cannot be changed
318 */ 320 */
319 ranges = <02000000 0 80000000 98000000 0 08000000 321 ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000
320 01000000 0 00000000 e0010000 0 00010000>; 322 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>;
321 323
322 /* Inbound 2GB range starting at 0 */ 324 /* Inbound 2GB range starting at 0 */
323 dma-ranges = <42000000 0 0 0 0 80000000>; 325 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
324 326
325 /* This drives busses 0x40 to 0x7f */ 327 /* This drives busses 0x40 to 0x7f */
326 bus-range = <40 7f>; 328 bus-range = <0x40 0x7f>;
327 329
328 /* Legacy interrupts (note the weird polarity, the bridge seems 330 /* Legacy interrupts (note the weird polarity, the bridge seems
329 * to invert PCIe legacy interrupts). 331 * to invert PCIe legacy interrupts).
@@ -333,12 +335,12 @@
333 * below are basically de-swizzled numbers. 335 * below are basically de-swizzled numbers.
334 * The real slot is on idsel 0, so the swizzling is 1:1 336 * The real slot is on idsel 0, so the swizzling is 1:1
335 */ 337 */
336 interrupt-map-mask = <0000 0 0 7>; 338 interrupt-map-mask = <0x0 0x0 0x0 0x7>;
337 interrupt-map = < 339 interrupt-map = <
338 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ 340 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */
339 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ 341 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */
340 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ 342 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
341 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; 343 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
342 }; 344 };
343 }; 345 };
344}; 346};
diff --git a/arch/powerpc/boot/dts/mpc5121ads.dts b/arch/powerpc/boot/dts/mpc5121ads.dts
index 94ad7b2b241e..1f9036c317b4 100644
--- a/arch/powerpc/boot/dts/mpc5121ads.dts
+++ b/arch/powerpc/boot/dts/mpc5121ads.dts
@@ -1,7 +1,7 @@
1/* 1/*
2 * MPC5121E MDS Device Tree Source 2 * MPC5121E ADS Device Tree Source
3 * 3 *
4 * Copyright 2007 Freescale Semiconductor Inc. 4 * Copyright 2007,2008 Freescale Semiconductor Inc.
5 * 5 *
6 * This program is free software; you can redistribute it and/or modify it 6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 7 * under the terms of the GNU General Public License as published by the
@@ -17,6 +17,10 @@
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
20 aliases {
21 pci = &pci;
22 };
23
20 cpus { 24 cpus {
21 #address-cells = <1>; 25 #address-cells = <1>;
22 #size-cells = <0>; 26 #size-cells = <0>;
@@ -39,8 +43,41 @@
39 reg = <0x00000000 0x10000000>; // 256MB at 0 43 reg = <0x00000000 0x10000000>; // 256MB at 0
40 }; 44 };
41 45
46 mbx@20000000 {
47 compatible = "fsl,mpc5121-mbx";
48 reg = <0x20000000 0x4000>;
49 interrupts = <66 0x8>;
50 interrupt-parent = < &ipic >;
51 };
52
53 sram@30000000 {
54 compatible = "fsl,mpc5121-sram";
55 reg = <0x30000000 0x20000>; // 128K at 0x30000000
56 };
57
58 nfc@40000000 {
59 compatible = "fsl,mpc5121-nfc";
60 reg = <0x40000000 0x100000>; // 1M at 0x40000000
61 interrupts = <6 8>;
62 interrupt-parent = < &ipic >;
63 #address-cells = <1>;
64 #size-cells = <1>;
65 bank-width = <1>;
66 // ADS has two Hynix 512MB Nand flash chips in a single
67 // stacked package .
68 chips = <2>;
69 nand0@0 {
70 label = "nand0";
71 reg = <0x00000000 0x02000000>; // first 32 MB of chip 0
72 };
73 nand1@20000000 {
74 label = "nand1";
75 reg = <0x20000000 0x02000000>; // first 32 MB of chip 1
76 };
77 };
78
42 localbus@80000020 { 79 localbus@80000020 {
43 compatible = "fsl,mpc5121ads-localbus"; 80 compatible = "fsl,mpc5121-localbus";
44 #address-cells = <2>; 81 #address-cells = <2>;
45 #size-cells = <1>; 82 #size-cells = <1>;
46 reg = <0x80000020 0x40>; 83 reg = <0x80000020 0x40>;
@@ -51,14 +88,51 @@
51 flash@0,0 { 88 flash@0,0 {
52 compatible = "cfi-flash"; 89 compatible = "cfi-flash";
53 reg = <0 0x0 0x4000000>; 90 reg = <0 0x0 0x4000000>;
91 #address-cells = <1>;
92 #size-cells = <1>;
54 bank-width = <4>; 93 bank-width = <4>;
55 device-width = <1>; 94 device-width = <2>;
95 protected@0 {
96 label = "protected";
97 reg = <0x00000000 0x00040000>; // first sector is protected
98 read-only;
99 };
100 filesystem@40000 {
101 label = "filesystem";
102 reg = <0x00040000 0x03c00000>; // 60M for filesystem
103 };
104 kernel@3c40000 {
105 label = "kernel";
106 reg = <0x03c40000 0x00280000>; // 2.5M for kernel
107 };
108 device-tree@3ec0000 {
109 label = "device-tree";
110 reg = <0x03ec0000 0x00040000>; // one sector for device tree
111 };
112 u-boot@3f00000 {
113 label = "u-boot";
114 reg = <0x03f00000 0x00100000>; // 1M for u-boot
115 read-only;
116 };
56 }; 117 };
57 118
58 board-control@2,0 { 119 board-control@2,0 {
59 compatible = "fsl,mpc5121ads-cpld"; 120 compatible = "fsl,mpc5121ads-cpld";
60 reg = <0x2 0x0 0x8000>; 121 reg = <0x2 0x0 0x8000>;
61 }; 122 };
123
124 cpld_pic: pic@2,a {
125 compatible = "fsl,mpc5121ads-cpld-pic";
126 interrupt-controller;
127 #interrupt-cells = <2>;
128 reg = <0x2 0xa 0x5>;
129 interrupt-parent = < &ipic >;
130 // irq routing
131 // all irqs but touch screen are routed to irq0 (ipic 48)
132 // touch screen is statically routed to irq1 (ipic 17)
133 // so don't use it here
134 interrupts = <48 0x8>;
135 };
62 }; 136 };
63 137
64 soc@80000000 { 138 soc@80000000 {
@@ -85,38 +159,252 @@
85 reg = <0xc00 0x100>; 159 reg = <0xc00 0x100>;
86 }; 160 };
87 161
88 // 512x PSCs are not 52xx PSCs compatible 162 rtc@a00 { // Real time clock
163 compatible = "fsl,mpc5121-rtc";
164 reg = <0xa00 0x100>;
165 interrupts = <79 0x8 80 0x8>;
166 interrupt-parent = < &ipic >;
167 };
168
169 clock@f00 { // Clock control
170 compatible = "fsl,mpc5121-clock";
171 reg = <0xf00 0x100>;
172 };
173
174 pmc@1000{ //Power Management Controller
175 compatible = "fsl,mpc5121-pmc";
176 reg = <0x1000 0x100>;
177 interrupts = <83 0x2>;
178 interrupt-parent = < &ipic >;
179 };
180
181 gpio@1100 {
182 compatible = "fsl,mpc5121-gpio";
183 reg = <0x1100 0x100>;
184 interrupts = <78 0x8>;
185 interrupt-parent = < &ipic >;
186 };
187
188 mscan@1300 {
189 compatible = "fsl,mpc5121-mscan";
190 cell-index = <0>;
191 interrupts = <12 0x8>;
192 interrupt-parent = < &ipic >;
193 reg = <0x1300 0x80>;
194 };
195
196 mscan@1380 {
197 compatible = "fsl,mpc5121-mscan";
198 cell-index = <1>;
199 interrupts = <13 0x8>;
200 interrupt-parent = < &ipic >;
201 reg = <0x1380 0x80>;
202 };
203
204 i2c@1700 {
205 #address-cells = <1>;
206 #size-cells = <0>;
207 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
208 cell-index = <0>;
209 reg = <0x1700 0x20>;
210 interrupts = <9 0x8>;
211 interrupt-parent = < &ipic >;
212 fsl5200-clocking;
213 };
214
215 i2c@1720 {
216 #address-cells = <1>;
217 #size-cells = <0>;
218 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
219 cell-index = <1>;
220 reg = <0x1720 0x20>;
221 interrupts = <10 0x8>;
222 interrupt-parent = < &ipic >;
223 fsl5200-clocking;
224 };
225
226 i2c@1740 {
227 #address-cells = <1>;
228 #size-cells = <0>;
229 compatible = "fsl,mpc5121-i2c", "fsl-i2c";
230 cell-index = <2>;
231 reg = <0x1740 0x20>;
232 interrupts = <11 0x8>;
233 interrupt-parent = < &ipic >;
234 fsl5200-clocking;
235 };
236
237 i2ccontrol@1760 {
238 compatible = "fsl,mpc5121-i2c-ctrl";
239 reg = <0x1760 0x8>;
240 };
241
242 axe@2000 {
243 compatible = "fsl,mpc5121-axe";
244 reg = <0x2000 0x100>;
245 interrupts = <42 0x8>;
246 interrupt-parent = < &ipic >;
247 };
248
249 display@2100 {
250 compatible = "fsl,mpc5121-diu", "fsl-diu";
251 reg = <0x2100 0x100>;
252 interrupts = <64 0x8>;
253 interrupt-parent = < &ipic >;
254 };
255
256 mdio@2800 {
257 compatible = "fsl,mpc5121-fec-mdio";
258 reg = <0x2800 0x800>;
259 #address-cells = <1>;
260 #size-cells = <0>;
261 phy: ethernet-phy@0 {
262 reg = <1>;
263 device_type = "ethernet-phy";
264 };
265 };
266
267 ethernet@2800 {
268 device_type = "network";
269 compatible = "fsl,mpc5121-fec";
270 reg = <0x2800 0x800>;
271 local-mac-address = [ 00 00 00 00 00 00 ];
272 interrupts = <4 0x8>;
273 interrupt-parent = < &ipic >;
274 phy-handle = < &phy >;
275 fsl,align-tx-packets = <4>;
276 };
277
278 // 5121e has two dr usb modules
279 // mpc5121_ads only uses USB0
280
281 // USB1 using external ULPI PHY
282 //usb@3000 {
283 // compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
284 // reg = <0x3000 0x1000>;
285 // #address-cells = <1>;
286 // #size-cells = <0>;
287 // interrupt-parent = < &ipic >;
288 // interrupts = <43 0x8>;
289 // dr_mode = "otg";
290 // phy_type = "ulpi";
291 // port1;
292 //};
293
294 // USB0 using internal UTMI PHY
295 usb@4000 {
296 compatible = "fsl,mpc5121-usb2-dr", "fsl-usb2-dr";
297 reg = <0x4000 0x1000>;
298 #address-cells = <1>;
299 #size-cells = <0>;
300 interrupt-parent = < &ipic >;
301 interrupts = <44 0x8>;
302 dr_mode = "otg";
303 phy_type = "utmi_wide";
304 port0;
305 };
306
307 // IO control
308 ioctl@a000 {
309 compatible = "fsl,mpc5121-ioctl";
310 reg = <0xA000 0x1000>;
311 };
312
313 pata@10200 {
314 compatible = "fsl,mpc5121-pata";
315 reg = <0x10200 0x100>;
316 interrupts = <5 0x8>;
317 interrupt-parent = < &ipic >;
318 };
319
320 // 512x PSCs are not 52xx PSC compatible
89 // PSC3 serial port A aka ttyPSC0 321 // PSC3 serial port A aka ttyPSC0
90 serial@11300 { 322 serial@11300 {
91 device_type = "serial"; 323 device_type = "serial";
92 compatible = "fsl,mpc5121-psc-uart"; 324 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
93 // Logical port assignment needed until driver 325 // Logical port assignment needed until driver
94 // learns to use aliases 326 // learns to use aliases
95 port-number = <0>; 327 port-number = <0>;
96 cell-index = <3>; 328 cell-index = <3>;
97 reg = <0x11300 0x100>; 329 reg = <0x11300 0x100>;
98 interrupts = <0x28 0x8>; // actually the fifo irq 330 interrupts = <40 0x8>;
99 interrupt-parent = < &ipic >; 331 interrupt-parent = < &ipic >;
332 rx-fifo-size = <16>;
333 tx-fifo-size = <16>;
100 }; 334 };
101 335
102 // PSC4 serial port B aka ttyPSC1 336 // PSC4 serial port B aka ttyPSC1
103 serial@11400 { 337 serial@11400 {
104 device_type = "serial"; 338 device_type = "serial";
105 compatible = "fsl,mpc5121-psc-uart"; 339 compatible = "fsl,mpc5121-psc-uart", "fsl,mpc5121-psc";
106 // Logical port assignment needed until driver 340 // Logical port assignment needed until driver
107 // learns to use aliases 341 // learns to use aliases
108 port-number = <1>; 342 port-number = <1>;
109 cell-index = <4>; 343 cell-index = <4>;
110 reg = <0x11400 0x100>; 344 reg = <0x11400 0x100>;
111 interrupts = <0x28 0x8>; // actually the fifo irq 345 interrupts = <40 0x8>;
112 interrupt-parent = < &ipic >; 346 interrupt-parent = < &ipic >;
347 rx-fifo-size = <16>;
348 tx-fifo-size = <16>;
113 }; 349 };
114 350
115 pscsfifo@11f00 { 351 // PSC5 in ac97 mode
352 ac97@11500 {
353 compatible = "fsl,mpc5121-psc-ac97", "fsl,mpc5121-psc";
354 cell-index = <5>;
355 reg = <0x11500 0x100>;
356 interrupts = <40 0x8>;
357 interrupt-parent = < &ipic >;
358 fsl,mode = "ac97-slave";
359 rx-fifo-size = <384>;
360 tx-fifo-size = <384>;
361 };
362
363 pscfifo@11f00 {
116 compatible = "fsl,mpc5121-psc-fifo"; 364 compatible = "fsl,mpc5121-psc-fifo";
117 reg = <0x11f00 0x100>; 365 reg = <0x11f00 0x100>;
118 interrupts = <0x28 0x8>; 366 interrupts = <40 0x8>;
119 interrupt-parent = < &ipic >; 367 interrupt-parent = < &ipic >;
120 }; 368 };
369
370 dma@14000 {
371 compatible = "fsl,mpc5121-dma2";
372 reg = <0x14000 0x1800>;
373 interrupts = <65 0x8>;
374 interrupt-parent = < &ipic >;
375 };
376
377 };
378
379 pci: pci@80008500 {
380 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
381 interrupt-map = <
382 // IDSEL 0x15 - Slot 1 PCI
383 0xa800 0x0 0x0 0x1 &cpld_pic 0x0 0x8
384 0xa800 0x0 0x0 0x2 &cpld_pic 0x1 0x8
385 0xa800 0x0 0x0 0x3 &cpld_pic 0x2 0x8
386 0xa800 0x0 0x0 0x4 &cpld_pic 0x3 0x8
387
388 // IDSEL 0x16 - Slot 2 MiniPCI
389 0xb000 0x0 0x0 0x1 &cpld_pic 0x4 0x8
390 0xb000 0x0 0x0 0x2 &cpld_pic 0x5 0x8
391
392 // IDSEL 0x17 - Slot 3 MiniPCI
393 0xb800 0x0 0x0 0x1 &cpld_pic 0x6 0x8
394 0xb800 0x0 0x0 0x2 &cpld_pic 0x7 0x8
395 >;
396 interrupt-parent = < &ipic >;
397 interrupts = <1 0x8>;
398 bus-range = <0 0>;
399 ranges = <0x42000000 0x0 0xa0000000 0xa0000000 0x0 0x10000000
400 0x02000000 0x0 0xb0000000 0xb0000000 0x0 0x10000000
401 0x01000000 0x0 0x00000000 0x84000000 0x0 0x01000000>;
402 clock-frequency = <0>;
403 #interrupt-cells = <1>;
404 #size-cells = <2>;
405 #address-cells = <3>;
406 reg = <0x80008500 0x100>;
407 compatible = "fsl,mpc5121-pci";
408 device_type = "pci";
121 }; 409 };
122}; 410};
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts
index 4936349b87cd..705c23c14f32 100644
--- a/arch/powerpc/boot/dts/mpc7448hpc2.dts
+++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts
@@ -124,14 +124,12 @@
124 }; 124 };
125 125
126 mpic: pic@7400 { 126 mpic: pic@7400 {
127 clock-frequency = <0>;
128 interrupt-controller; 127 interrupt-controller;
129 #address-cells = <0>; 128 #address-cells = <0>;
130 #interrupt-cells = <2>; 129 #interrupt-cells = <2>;
131 reg = <0x7400 0x400>; 130 reg = <0x7400 0x400>;
132 compatible = "chrp,open-pic"; 131 compatible = "chrp,open-pic";
133 device_type = "open-pic"; 132 device_type = "open-pic";
134 big-endian;
135 }; 133 };
136 pci@1000 { 134 pci@1000 {
137 compatible = "tsi108-pci"; 135 compatible = "tsi108-pci";
diff --git a/arch/powerpc/boot/dts/mpc8272ads.dts b/arch/powerpc/boot/dts/mpc8272ads.dts
index 46e2da30c3dd..2a1929acaabd 100644
--- a/arch/powerpc/boot/dts/mpc8272ads.dts
+++ b/arch/powerpc/boot/dts/mpc8272ads.dts
@@ -217,6 +217,17 @@
217 linux,network-index = <1>; 217 linux,network-index = <1>;
218 fsl,cpm-command = <0x16200300>; 218 fsl,cpm-command = <0x16200300>;
219 }; 219 };
220
221 i2c@11860 {
222 compatible = "fsl,mpc8272-i2c",
223 "fsl,cpm2-i2c";
224 reg = <0x11860 0x20 0x8afc 0x2>;
225 interrupts = <1 8>;
226 interrupt-parent = <&PIC>;
227 fsl,cpm-command = <0x29600000>;
228 #address-cells = <1>;
229 #size-cells = <0>;
230 };
220 }; 231 };
221 232
222 PIC: interrupt-controller@10c00 { 233 PIC: interrupt-controller@10c00 {
@@ -226,22 +237,15 @@
226 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic"; 237 compatible = "fsl,mpc8272-pic", "fsl,cpm2-pic";
227 }; 238 };
228 239
229/* May need to remove if on a part without crypto engine */
230 crypto@30000 { 240 crypto@30000 {
231 device_type = "crypto"; 241 compatible = "fsl,sec1.0";
232 model = "SEC2"; 242 reg = <0x40000 0x13000>;
233 compatible = "fsl,mpc8272-talitos-sec2", 243 interrupts = <47 0x8>;
234 "fsl,talitos-sec2",
235 "fsl,talitos",
236 "talitos";
237 reg = <0x30000 0x10000>;
238 interrupts = <11 8>;
239 interrupt-parent = <&PIC>; 244 interrupt-parent = <&PIC>;
240 num-channels = <4>; 245 fsl,num-channels = <4>;
241 channel-fifo-len = <24>; 246 fsl,channel-fifo-len = <24>;
242 exec-units-mask = <0x7e>; 247 fsl,exec-units-mask = <0x7e>;
243/* desc mask is for rev1.x, we need runtime fixup for >=2.x */ 248 fsl,descriptor-types-mask = <0x1010415>;
244 descriptor-types-mask = <0x1010ebf>;
245 }; 249 };
246 }; 250 };
247 251
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index e1f0dca8ac39..3664fb584026 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -144,6 +144,41 @@
144 mode = "cpu"; 144 mode = "cpu";
145 }; 145 };
146 146
147 dma@82a8 {
148 #address-cells = <1>;
149 #size-cells = <1>;
150 compatible = "fsl,mpc8313-dma", "fsl,elo-dma";
151 reg = <0x82a8 4>;
152 ranges = <0 0x8100 0x1a8>;
153 interrupt-parent = <&ipic>;
154 interrupts = <71 8>;
155 cell-index = <0>;
156 dma-channel@0 {
157 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
158 reg = <0 0x80>;
159 interrupt-parent = <&ipic>;
160 interrupts = <71 8>;
161 };
162 dma-channel@80 {
163 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
164 reg = <0x80 0x80>;
165 interrupt-parent = <&ipic>;
166 interrupts = <71 8>;
167 };
168 dma-channel@100 {
169 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
170 reg = <0x100 0x80>;
171 interrupt-parent = <&ipic>;
172 interrupts = <71 8>;
173 };
174 dma-channel@180 {
175 compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel";
176 reg = <0x180 0x28>;
177 interrupt-parent = <&ipic>;
178 interrupts = <71 8>;
179 };
180 };
181
147 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ 182 /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */
148 usb@23000 { 183 usb@23000 {
149 compatible = "fsl-usb2-dr"; 184 compatible = "fsl-usb2-dr";
@@ -219,17 +254,14 @@
219 }; 254 };
220 255
221 crypto@30000 { 256 crypto@30000 {
222 device_type = "crypto"; 257 compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
223 model = "SEC2"; 258 reg = <0x30000 0x10000>;
224 compatible = "talitos";
225 reg = <0x30000 0x7000>;
226 interrupts = <11 0x8>; 259 interrupts = <11 0x8>;
227 interrupt-parent = <&ipic>; 260 interrupt-parent = <&ipic>;
228 /* Rev. 2.2 */ 261 fsl,num-channels = <1>;
229 num-channels = <1>; 262 fsl,channel-fifo-len = <24>;
230 channel-fifo-len = <24>; 263 fsl,exec-units-mask = <0x4c>;
231 exec-units-mask = <0x0000004c>; 264 fsl,descriptor-types-mask = <0x0122003f>;
232 descriptor-types-mask = <0x0122003f>;
233 }; 265 };
234 266
235 /* IPIC 267 /* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts
index d7a1ececa30f..f704513fb930 100644
--- a/arch/powerpc/boot/dts/mpc8315erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8315erdb.dts
@@ -132,6 +132,41 @@
132 mode = "cpu"; 132 mode = "cpu";
133 }; 133 };
134 134
135 dma@82a8 {
136 #address-cells = <1>;
137 #size-cells = <1>;
138 compatible = "fsl,mpc8315-dma", "fsl,elo-dma";
139 reg = <0x82a8 4>;
140 ranges = <0 0x8100 0x1a8>;
141 interrupt-parent = <&ipic>;
142 interrupts = <71 8>;
143 cell-index = <0>;
144 dma-channel@0 {
145 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
146 reg = <0 0x80>;
147 interrupt-parent = <&ipic>;
148 interrupts = <71 8>;
149 };
150 dma-channel@80 {
151 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
152 reg = <0x80 0x80>;
153 interrupt-parent = <&ipic>;
154 interrupts = <71 8>;
155 };
156 dma-channel@100 {
157 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
158 reg = <0x100 0x80>;
159 interrupt-parent = <&ipic>;
160 interrupts = <71 8>;
161 };
162 dma-channel@180 {
163 compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel";
164 reg = <0x180 0x28>;
165 interrupt-parent = <&ipic>;
166 interrupts = <71 8>;
167 };
168 };
169
135 usb@23000 { 170 usb@23000 {
136 compatible = "fsl-usb2-dr"; 171 compatible = "fsl-usb2-dr";
137 reg = <0x23000 0x1000>; 172 reg = <0x23000 0x1000>;
@@ -206,17 +241,16 @@
206 }; 241 };
207 242
208 crypto@30000 { 243 crypto@30000 {
209 model = "SEC3"; 244 compatible = "fsl,sec3.3", "fsl,sec3.1", "fsl,sec3.0",
210 device_type = "crypto"; 245 "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
211 compatible = "talitos"; 246 "fsl,sec2.0";
212 reg = <0x30000 0x10000>; 247 reg = <0x30000 0x10000>;
213 interrupts = <11 0x8>; 248 interrupts = <11 0x8>;
214 interrupt-parent = <&ipic>; 249 interrupt-parent = <&ipic>;
215 /* Rev. 3.0 geometry */ 250 fsl,num-channels = <4>;
216 num-channels = <4>; 251 fsl,channel-fifo-len = <24>;
217 channel-fifo-len = <24>; 252 fsl,exec-units-mask = <0x97c>;
218 exec-units-mask = <0x000001fe>; 253 fsl,descriptor-types-mask = <0x3ab0abf>;
219 descriptor-types-mask = <0x03ab0ebf>;
220 }; 254 };
221 255
222 sata@18000 { 256 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts
index 539e02fb3526..7345743d3d96 100644
--- a/arch/powerpc/boot/dts/mpc832x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc832x_mds.dts
@@ -114,18 +114,50 @@
114 interrupt-parent = <&ipic>; 114 interrupt-parent = <&ipic>;
115 }; 115 };
116 116
117 dma@82a8 {
118 #address-cells = <1>;
119 #size-cells = <1>;
120 compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
121 reg = <0x82a8 4>;
122 ranges = <0 0x8100 0x1a8>;
123 interrupt-parent = <&ipic>;
124 interrupts = <71 8>;
125 cell-index = <0>;
126 dma-channel@0 {
127 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
128 reg = <0 0x80>;
129 interrupt-parent = <&ipic>;
130 interrupts = <71 8>;
131 };
132 dma-channel@80 {
133 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
134 reg = <0x80 0x80>;
135 interrupt-parent = <&ipic>;
136 interrupts = <71 8>;
137 };
138 dma-channel@100 {
139 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
140 reg = <0x100 0x80>;
141 interrupt-parent = <&ipic>;
142 interrupts = <71 8>;
143 };
144 dma-channel@180 {
145 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
146 reg = <0x180 0x28>;
147 interrupt-parent = <&ipic>;
148 interrupts = <71 8>;
149 };
150 };
151
117 crypto@30000 { 152 crypto@30000 {
118 device_type = "crypto"; 153 compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
119 model = "SEC2"; 154 reg = <0x30000 0x10000>;
120 compatible = "talitos";
121 reg = <0x30000 0x7000>;
122 interrupts = <11 0x8>; 155 interrupts = <11 0x8>;
123 interrupt-parent = <&ipic>; 156 interrupt-parent = <&ipic>;
124 /* Rev. 2.2 */ 157 fsl,num-channels = <1>;
125 num-channels = <1>; 158 fsl,channel-fifo-len = <24>;
126 channel-fifo-len = <24>; 159 fsl,exec-units-mask = <0x4c>;
127 exec-units-mask = <0x0000004c>; 160 fsl,descriptor-types-mask = <0x0122003f>;
128 descriptor-types-mask = <0x0122003f>;
129 }; 161 };
130 162
131 ipic: pic@700 { 163 ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts
index 179c81c6a7ac..e74c045a0f8c 100644
--- a/arch/powerpc/boot/dts/mpc832x_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts
@@ -68,7 +68,7 @@
68 compatible = "fsl-i2c"; 68 compatible = "fsl-i2c";
69 reg = <0x3000 0x100>; 69 reg = <0x3000 0x100>;
70 interrupts = <14 0x8>; 70 interrupts = <14 0x8>;
71 interrupt-parent = <&pic>; 71 interrupt-parent = <&ipic>;
72 dfsrr; 72 dfsrr;
73 }; 73 };
74 74
@@ -79,7 +79,7 @@
79 reg = <0x4500 0x100>; 79 reg = <0x4500 0x100>;
80 clock-frequency = <0>; 80 clock-frequency = <0>;
81 interrupts = <9 0x8>; 81 interrupts = <9 0x8>;
82 interrupt-parent = <&pic>; 82 interrupt-parent = <&ipic>;
83 }; 83 };
84 84
85 serial1: serial@4600 { 85 serial1: serial@4600 {
@@ -89,24 +89,56 @@
89 reg = <0x4600 0x100>; 89 reg = <0x4600 0x100>;
90 clock-frequency = <0>; 90 clock-frequency = <0>;
91 interrupts = <10 0x8>; 91 interrupts = <10 0x8>;
92 interrupt-parent = <&pic>; 92 interrupt-parent = <&ipic>;
93 };
94
95 dma@82a8 {
96 #address-cells = <1>;
97 #size-cells = <1>;
98 compatible = "fsl,mpc8323-dma", "fsl,elo-dma";
99 reg = <0x82a8 4>;
100 ranges = <0 0x8100 0x1a8>;
101 interrupt-parent = <&ipic>;
102 interrupts = <71 8>;
103 cell-index = <0>;
104 dma-channel@0 {
105 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
106 reg = <0 0x80>;
107 interrupt-parent = <&ipic>;
108 interrupts = <71 8>;
109 };
110 dma-channel@80 {
111 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
112 reg = <0x80 0x80>;
113 interrupt-parent = <&ipic>;
114 interrupts = <71 8>;
115 };
116 dma-channel@100 {
117 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
118 reg = <0x100 0x80>;
119 interrupt-parent = <&ipic>;
120 interrupts = <71 8>;
121 };
122 dma-channel@180 {
123 compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel";
124 reg = <0x180 0x28>;
125 interrupt-parent = <&ipic>;
126 interrupts = <71 8>;
127 };
93 }; 128 };
94 129
95 crypto@30000 { 130 crypto@30000 {
96 device_type = "crypto"; 131 compatible = "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
97 model = "SEC2"; 132 reg = <0x30000 0x10000>;
98 compatible = "talitos";
99 reg = <0x30000 0x7000>;
100 interrupts = <11 0x8>; 133 interrupts = <11 0x8>;
101 interrupt-parent = <&pic>; 134 interrupt-parent = <&ipic>;
102 /* Rev. 2.2 */ 135 fsl,num-channels = <1>;
103 num-channels = <1>; 136 fsl,channel-fifo-len = <24>;
104 channel-fifo-len = <24>; 137 fsl,exec-units-mask = <0x4c>;
105 exec-units-mask = <0x0000004c>; 138 fsl,descriptor-types-mask = <0x0122003f>;
106 descriptor-types-mask = <0x0122003f>;
107 }; 139 };
108 140
109 pic:pic@700 { 141 ipic:pic@700 {
110 interrupt-controller; 142 interrupt-controller;
111 #address-cells = <0>; 143 #address-cells = <0>;
112 #interrupt-cells = <2>; 144 #interrupt-cells = <2>;
@@ -240,13 +272,13 @@
240 compatible = "fsl,ucc-mdio"; 272 compatible = "fsl,ucc-mdio";
241 273
242 phy00:ethernet-phy@00 { 274 phy00:ethernet-phy@00 {
243 interrupt-parent = <&pic>; 275 interrupt-parent = <&ipic>;
244 interrupts = <0>; 276 interrupts = <0>;
245 reg = <0x0>; 277 reg = <0x0>;
246 device_type = "ethernet-phy"; 278 device_type = "ethernet-phy";
247 }; 279 };
248 phy04:ethernet-phy@04 { 280 phy04:ethernet-phy@04 {
249 interrupt-parent = <&pic>; 281 interrupt-parent = <&ipic>;
250 interrupts = <0>; 282 interrupts = <0>;
251 reg = <0x4>; 283 reg = <0x4>;
252 device_type = "ethernet-phy"; 284 device_type = "ethernet-phy";
@@ -261,7 +293,7 @@
261 reg = <0x80 0x80>; 293 reg = <0x80 0x80>;
262 big-endian; 294 big-endian;
263 interrupts = <32 0x8 33 0x8>; //high:32 low:33 295 interrupts = <32 0x8 33 0x8>; //high:32 low:33
264 interrupt-parent = <&pic>; 296 interrupt-parent = <&ipic>;
265 }; 297 };
266 }; 298 };
267 299
@@ -270,21 +302,21 @@
270 interrupt-map-mask = <0xf800 0x0 0x0 0x7>; 302 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
271 interrupt-map = < 303 interrupt-map = <
272 /* IDSEL 0x10 AD16 (USB) */ 304 /* IDSEL 0x10 AD16 (USB) */
273 0x8000 0x0 0x0 0x1 &pic 17 0x8 305 0x8000 0x0 0x0 0x1 &ipic 17 0x8
274 306
275 /* IDSEL 0x11 AD17 (Mini1)*/ 307 /* IDSEL 0x11 AD17 (Mini1)*/
276 0x8800 0x0 0x0 0x1 &pic 18 0x8 308 0x8800 0x0 0x0 0x1 &ipic 18 0x8
277 0x8800 0x0 0x0 0x2 &pic 19 0x8 309 0x8800 0x0 0x0 0x2 &ipic 19 0x8
278 0x8800 0x0 0x0 0x3 &pic 20 0x8 310 0x8800 0x0 0x0 0x3 &ipic 20 0x8
279 0x8800 0x0 0x0 0x4 &pic 48 0x8 311 0x8800 0x0 0x0 0x4 &ipic 48 0x8
280 312
281 /* IDSEL 0x12 AD18 (PCI/Mini2) */ 313 /* IDSEL 0x12 AD18 (PCI/Mini2) */
282 0x9000 0x0 0x0 0x1 &pic 19 0x8 314 0x9000 0x0 0x0 0x1 &ipic 19 0x8
283 0x9000 0x0 0x0 0x2 &pic 20 0x8 315 0x9000 0x0 0x0 0x2 &ipic 20 0x8
284 0x9000 0x0 0x0 0x3 &pic 48 0x8 316 0x9000 0x0 0x0 0x3 &ipic 48 0x8
285 0x9000 0x0 0x0 0x4 &pic 17 0x8>; 317 0x9000 0x0 0x0 0x4 &ipic 17 0x8>;
286 318
287 interrupt-parent = <&pic>; 319 interrupt-parent = <&ipic>;
288 interrupts = <66 0x8>; 320 interrupts = <66 0x8>;
289 bus-range = <0x0 0x0>; 321 bus-range = <0x0 0x0>;
290 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 322 ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts
index 9426676b0b7d..8dfab5662585 100644
--- a/arch/powerpc/boot/dts/mpc8349emitx.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitx.dts
@@ -93,6 +93,41 @@
93 mode = "cpu"; 93 mode = "cpu";
94 }; 94 };
95 95
96 dma@82a8 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
100 reg = <0x82a8 4>;
101 ranges = <0 0x8100 0x1a8>;
102 interrupt-parent = <&ipic>;
103 interrupts = <71 8>;
104 cell-index = <0>;
105 dma-channel@0 {
106 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
107 reg = <0 0x80>;
108 interrupt-parent = <&ipic>;
109 interrupts = <71 8>;
110 };
111 dma-channel@80 {
112 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
113 reg = <0x80 0x80>;
114 interrupt-parent = <&ipic>;
115 interrupts = <71 8>;
116 };
117 dma-channel@100 {
118 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
119 reg = <0x100 0x80>;
120 interrupt-parent = <&ipic>;
121 interrupts = <71 8>;
122 };
123 dma-channel@180 {
124 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
125 reg = <0x180 0x28>;
126 interrupt-parent = <&ipic>;
127 interrupts = <71 8>;
128 };
129 };
130
96 usb@22000 { 131 usb@22000 {
97 compatible = "fsl-usb2-mph"; 132 compatible = "fsl-usb2-mph";
98 reg = <0x22000 0x1000>; 133 reg = <0x22000 0x1000>;
@@ -178,16 +213,14 @@
178 }; 213 };
179 214
180 crypto@30000 { 215 crypto@30000 {
181 device_type = "crypto"; 216 compatible = "fsl,sec2.0";
182 model = "SEC2";
183 compatible = "talitos";
184 reg = <0x30000 0x10000>; 217 reg = <0x30000 0x10000>;
185 interrupts = <11 0x8>; 218 interrupts = <11 0x8>;
186 interrupt-parent = <&ipic>; 219 interrupt-parent = <&ipic>;
187 num-channels = <4>; 220 fsl,num-channels = <4>;
188 channel-fifo-len = <24>; 221 fsl,channel-fifo-len = <24>;
189 exec-units-mask = <0x0000007e>; 222 fsl,exec-units-mask = <0x7e>;
190 descriptor-types-mask = <0x01010ebf>; 223 fsl,descriptor-types-mask = <0x01010ebf>;
191 }; 224 };
192 225
193 ipic: pic@700 { 226 ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
index f81d735e6e72..49ca3497eefb 100644
--- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts
+++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts
@@ -91,6 +91,41 @@
91 mode = "cpu"; 91 mode = "cpu";
92 }; 92 };
93 93
94 dma@82a8 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
98 reg = <0x82a8 4>;
99 ranges = <0 0x8100 0x1a8>;
100 interrupt-parent = <&ipic>;
101 interrupts = <71 8>;
102 cell-index = <0>;
103 dma-channel@0 {
104 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
105 reg = <0 0x80>;
106 interrupt-parent = <&ipic>;
107 interrupts = <71 8>;
108 };
109 dma-channel@80 {
110 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
111 reg = <0x80 0x80>;
112 interrupt-parent = <&ipic>;
113 interrupts = <71 8>;
114 };
115 dma-channel@100 {
116 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117 reg = <0x100 0x80>;
118 interrupt-parent = <&ipic>;
119 interrupts = <71 8>;
120 };
121 dma-channel@180 {
122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123 reg = <0x180 0x28>;
124 interrupt-parent = <&ipic>;
125 interrupts = <71 8>;
126 };
127 };
128
94 usb@23000 { 129 usb@23000 {
95 compatible = "fsl-usb2-dr"; 130 compatible = "fsl-usb2-dr";
96 reg = <0x23000 0x1000>; 131 reg = <0x23000 0x1000>;
@@ -151,16 +186,14 @@
151 }; 186 };
152 187
153 crypto@30000 { 188 crypto@30000 {
154 device_type = "crypto"; 189 compatible = "fsl,sec2.0";
155 model = "SEC2";
156 compatible = "talitos";
157 reg = <0x30000 0x10000>; 190 reg = <0x30000 0x10000>;
158 interrupts = <11 0x8>; 191 interrupts = <11 0x8>;
159 interrupt-parent = <&ipic>; 192 interrupt-parent = <&ipic>;
160 num-channels = <4>; 193 fsl,num-channels = <4>;
161 channel-fifo-len = <24>; 194 fsl,channel-fifo-len = <24>;
162 exec-units-mask = <0x0000007e>; 195 fsl,exec-units-mask = <0x7e>;
163 descriptor-types-mask = <0x01010ebf>; 196 fsl,descriptor-types-mask = <0x01010ebf>;
164 }; 197 };
165 198
166 ipic: pic@700 { 199 ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts
index 0199c5c548d8..ba586cb7afbb 100644
--- a/arch/powerpc/boot/dts/mpc834x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc834x_mds.dts
@@ -103,6 +103,41 @@
103 mode = "cpu"; 103 mode = "cpu";
104 }; 104 };
105 105
106 dma@82a8 {
107 #address-cells = <1>;
108 #size-cells = <1>;
109 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
110 reg = <0x82a8 4>;
111 ranges = <0 0x8100 0x1a8>;
112 interrupt-parent = <&ipic>;
113 interrupts = <71 8>;
114 cell-index = <0>;
115 dma-channel@0 {
116 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
117 reg = <0 0x80>;
118 interrupt-parent = <&ipic>;
119 interrupts = <71 8>;
120 };
121 dma-channel@80 {
122 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
123 reg = <0x80 0x80>;
124 interrupt-parent = <&ipic>;
125 interrupts = <71 8>;
126 };
127 dma-channel@100 {
128 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
129 reg = <0x100 0x80>;
130 interrupt-parent = <&ipic>;
131 interrupts = <71 8>;
132 };
133 dma-channel@180 {
134 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
135 reg = <0x180 0x28>;
136 interrupt-parent = <&ipic>;
137 interrupts = <71 8>;
138 };
139 };
140
106 /* phy type (ULPI or SERIAL) are only types supported for MPH */ 141 /* phy type (ULPI or SERIAL) are only types supported for MPH */
107 /* port = 0 or 1 */ 142 /* port = 0 or 1 */
108 usb@22000 { 143 usb@22000 {
@@ -193,20 +228,15 @@
193 interrupt-parent = <&ipic>; 228 interrupt-parent = <&ipic>;
194 }; 229 };
195 230
196 /* May need to remove if on a part without crypto engine */
197 crypto@30000 { 231 crypto@30000 {
198 device_type = "crypto"; 232 compatible = "fsl,sec2.0";
199 model = "SEC2";
200 compatible = "talitos";
201 reg = <0x30000 0x10000>; 233 reg = <0x30000 0x10000>;
202 interrupts = <11 0x8>; 234 interrupts = <11 0x8>;
203 interrupt-parent = <&ipic>; 235 interrupt-parent = <&ipic>;
204 num-channels = <4>; 236 fsl,num-channels = <4>;
205 channel-fifo-len = <24>; 237 fsl,channel-fifo-len = <24>;
206 exec-units-mask = <0x0000007e>; 238 fsl,exec-units-mask = <0x7e>;
207 /* desc mask is for rev2.0, 239 fsl,descriptor-types-mask = <0x01010ebf>;
208 * we need runtime fixup for >2.0 */
209 descriptor-types-mask = <0x01010ebf>;
210 }; 240 };
211 241
212 /* IPIC 242 /* IPIC
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts
index 8160ff24e87e..3701dae1ee02 100644
--- a/arch/powerpc/boot/dts/mpc836x_mds.dts
+++ b/arch/powerpc/boot/dts/mpc836x_mds.dts
@@ -118,18 +118,50 @@
118 interrupt-parent = <&ipic>; 118 interrupt-parent = <&ipic>;
119 }; 119 };
120 120
121 dma@82a8 {
122 #address-cells = <1>;
123 #size-cells = <1>;
124 compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
125 reg = <0x82a8 4>;
126 ranges = <0 0x8100 0x1a8>;
127 interrupt-parent = <&ipic>;
128 interrupts = <71 8>;
129 cell-index = <0>;
130 dma-channel@0 {
131 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
132 reg = <0 0x80>;
133 interrupt-parent = <&ipic>;
134 interrupts = <71 8>;
135 };
136 dma-channel@80 {
137 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
138 reg = <0x80 0x80>;
139 interrupt-parent = <&ipic>;
140 interrupts = <71 8>;
141 };
142 dma-channel@100 {
143 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
144 reg = <0x100 0x80>;
145 interrupt-parent = <&ipic>;
146 interrupts = <71 8>;
147 };
148 dma-channel@180 {
149 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
150 reg = <0x180 0x28>;
151 interrupt-parent = <&ipic>;
152 interrupts = <71 8>;
153 };
154 };
155
121 crypto@30000 { 156 crypto@30000 {
122 device_type = "crypto"; 157 compatible = "fsl,sec2.0";
123 model = "SEC2";
124 compatible = "talitos";
125 reg = <0x30000 0x10000>; 158 reg = <0x30000 0x10000>;
126 interrupts = <11 0x8>; 159 interrupts = <11 0x8>;
127 interrupt-parent = <&ipic>; 160 interrupt-parent = <&ipic>;
128 num-channels = <4>; 161 fsl,num-channels = <4>;
129 channel-fifo-len = <24>; 162 fsl,channel-fifo-len = <24>;
130 exec-units-mask = <0x0000007e>; 163 fsl,exec-units-mask = <0x7e>;
131 /* desc mask is for rev1.x, we need runtime fixup for >=2.x */ 164 fsl,descriptor-types-mask = <0x01010ebf>;
132 descriptor-types-mask = <0x01010ebf>;
133 }; 165 };
134 166
135 ipic: pic@700 { 167 ipic: pic@700 {
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts
new file mode 100644
index 000000000000..8acd1d6577f2
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts
@@ -0,0 +1,432 @@
1/*
2 * MPC8360E RDK Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2007-2008 MontaVista Software, Inc.
6 *
7 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15/dts-v1/;
16
17/ {
18 #address-cells = <1>;
19 #size-cells = <1>;
20 compatible = "fsl,mpc8360rdk";
21
22 aliases {
23 serial0 = &serial0;
24 serial1 = &serial1;
25 serial2 = &serial2;
26 serial3 = &serial3;
27 ethernet0 = &enet0;
28 ethernet1 = &enet1;
29 ethernet2 = &enet2;
30 ethernet3 = &enet3;
31 pci0 = &pci0;
32 };
33
34 cpus {
35 #address-cells = <1>;
36 #size-cells = <0>;
37
38 PowerPC,8360@0 {
39 device_type = "cpu";
40 reg = <0>;
41 d-cache-line-size = <32>;
42 i-cache-line-size = <32>;
43 d-cache-size = <32768>;
44 i-cache-size = <32768>;
45 /* filled by u-boot */
46 timebase-frequency = <0>;
47 bus-frequency = <0>;
48 clock-frequency = <0>;
49 };
50 };
51
52 memory {
53 device_type = "memory";
54 /* filled by u-boot */
55 reg = <0 0>;
56 };
57
58 soc@e0000000 {
59 #address-cells = <1>;
60 #size-cells = <1>;
61 device_type = "soc";
62 compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc",
63 "simple-bus";
64 ranges = <0 0xe0000000 0x200000>;
65 reg = <0xe0000000 0x200>;
66 /* filled by u-boot */
67 bus-frequency = <0>;
68
69 wdt@200 {
70 compatible = "mpc83xx_wdt";
71 reg = <0x200 0x100>;
72 };
73
74 i2c@3000 {
75 #address-cells = <1>;
76 #size-cells = <0>;
77 cell-index = <0>;
78 compatible = "fsl-i2c";
79 reg = <0x3000 0x100>;
80 interrupts = <14 8>;
81 interrupt-parent = <&ipic>;
82 dfsrr;
83 };
84
85 i2c@3100 {
86 #address-cells = <1>;
87 #size-cells = <0>;
88 cell-index = <1>;
89 compatible = "fsl-i2c";
90 reg = <0x3100 0x100>;
91 interrupts = <16 8>;
92 interrupt-parent = <&ipic>;
93 dfsrr;
94 };
95
96 serial0: serial@4500 {
97 device_type = "serial";
98 compatible = "ns16550";
99 reg = <0x4500 0x100>;
100 interrupts = <9 8>;
101 interrupt-parent = <&ipic>;
102 /* filled by u-boot */
103 clock-frequency = <0>;
104 };
105
106 serial1: serial@4600 {
107 device_type = "serial";
108 compatible = "ns16550";
109 reg = <0x4600 0x100>;
110 interrupts = <10 8>;
111 interrupt-parent = <&ipic>;
112 /* filled by u-boot */
113 clock-frequency = <0>;
114 };
115
116 dma@82a8 {
117 #address-cells = <1>;
118 #size-cells = <1>;
119 compatible = "fsl,mpc8360-dma", "fsl,elo-dma";
120 reg = <0x82a8 4>;
121 ranges = <0 0x8100 0x1a8>;
122 interrupt-parent = <&ipic>;
123 interrupts = <71 8>;
124 cell-index = <0>;
125 dma-channel@0 {
126 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
127 reg = <0 0x80>;
128 interrupt-parent = <&ipic>;
129 interrupts = <71 8>;
130 };
131 dma-channel@80 {
132 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
133 reg = <0x80 0x80>;
134 interrupt-parent = <&ipic>;
135 interrupts = <71 8>;
136 };
137 dma-channel@100 {
138 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
139 reg = <0x100 0x80>;
140 interrupt-parent = <&ipic>;
141 interrupts = <71 8>;
142 };
143 dma-channel@180 {
144 compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel";
145 reg = <0x180 0x28>;
146 interrupt-parent = <&ipic>;
147 interrupts = <71 8>;
148 };
149 };
150
151 crypto@30000 {
152 compatible = "fsl,sec2-crypto";
153 reg = <0x30000 0x10000>;
154 interrupts = <11 8>;
155 interrupt-parent = <&ipic>;
156 num-channels = <4>;
157 channel-fifo-len = <24>;
158 exec-units-mask = <0x7e>;
159 /*
160 * desc mask is for rev1.x, we need runtime fixup
161 * for >=2.x
162 */
163 descriptor-types-mask = <0x1010ebf>;
164 };
165
166 ipic: interrupt-controller@700 {
167 #address-cells = <0>;
168 #interrupt-cells = <2>;
169 compatible = "fsl,pq2pro-pic", "fsl,ipic";
170 interrupt-controller;
171 reg = <0x700 0x100>;
172 };
173
174 qe_pio_b: gpio-controller@1418 {
175 #gpio-cells = <2>;
176 compatible = "fsl,mpc8360-qe-pario-bank",
177 "fsl,mpc8323-qe-pario-bank";
178 reg = <0x1418 0x18>;
179 gpio-controller;
180 };
181
182 qe_pio_e: gpio-controller@1460 {
183 #gpio-cells = <2>;
184 compatible = "fsl,mpc8360-qe-pario-bank",
185 "fsl,mpc8323-qe-pario-bank";
186 reg = <0x1460 0x18>;
187 gpio-controller;
188 };
189
190 qe@100000 {
191 #address-cells = <1>;
192 #size-cells = <1>;
193 device_type = "qe";
194 compatible = "fsl,qe", "simple-bus";
195 ranges = <0 0x100000 0x100000>;
196 reg = <0x100000 0x480>;
197 /* filled by u-boot */
198 clock-frequency = <0>;
199 bus-frequency = <0>;
200 brg-frequency = <0>;
201
202 muram@10000 {
203 #address-cells = <1>;
204 #size-cells = <1>;
205 compatible = "fsl,qe-muram", "fsl,cpm-muram";
206 ranges = <0 0x10000 0xc000>;
207
208 data-only@0 {
209 compatible = "fsl,qe-muram-data",
210 "fsl,cpm-muram-data";
211 reg = <0 0xc000>;
212 };
213 };
214
215 timer@440 {
216 compatible = "fsl,mpc8360-qe-gtm",
217 "fsl,qe-gtm", "fsl,gtm";
218 reg = <0x440 0x40>;
219 interrupts = <12 13 14 15>;
220 interrupt-parent = <&qeic>;
221 /* filled by u-boot */
222 clock-frequency = <0>;
223 };
224
225 spi@4c0 {
226 cell-index = <0>;
227 compatible = "fsl,spi";
228 reg = <0x4c0 0x40>;
229 interrupts = <2>;
230 interrupt-parent = <&qeic>;
231 mode = "cpu-qe";
232 };
233
234 spi@500 {
235 cell-index = <1>;
236 compatible = "fsl,spi";
237 reg = <0x500 0x40>;
238 interrupts = <1>;
239 interrupt-parent = <&qeic>;
240 mode = "cpu-qe";
241 };
242
243 enet0: ucc@2000 {
244 device_type = "network";
245 compatible = "ucc_geth";
246 cell-index = <1>;
247 reg = <0x2000 0x200>;
248 interrupts = <32>;
249 interrupt-parent = <&qeic>;
250 rx-clock-name = "none";
251 tx-clock-name = "clk9";
252 phy-handle = <&phy2>;
253 phy-connection-type = "rgmii-rxid";
254 /* filled by u-boot */
255 local-mac-address = [ 00 00 00 00 00 00 ];
256 };
257
258 enet1: ucc@3000 {
259 device_type = "network";
260 compatible = "ucc_geth";
261 cell-index = <2>;
262 reg = <0x3000 0x200>;
263 interrupts = <33>;
264 interrupt-parent = <&qeic>;
265 rx-clock-name = "none";
266 tx-clock-name = "clk4";
267 phy-handle = <&phy4>;
268 phy-connection-type = "rgmii-rxid";
269 /* filled by u-boot */
270 local-mac-address = [ 00 00 00 00 00 00 ];
271 };
272
273 enet2: ucc@2600 {
274 device_type = "network";
275 compatible = "ucc_geth";
276 cell-index = <7>;
277 reg = <0x2600 0x200>;
278 interrupts = <42>;
279 interrupt-parent = <&qeic>;
280 rx-clock-name = "clk20";
281 tx-clock-name = "clk19";
282 phy-handle = <&phy1>;
283 phy-connection-type = "mii";
284 /* filled by u-boot */
285 local-mac-address = [ 00 00 00 00 00 00 ];
286 };
287
288 enet3: ucc@3200 {
289 device_type = "network";
290 compatible = "ucc_geth";
291 cell-index = <4>;
292 reg = <0x3200 0x200>;
293 interrupts = <35>;
294 interrupt-parent = <&qeic>;
295 rx-clock-name = "clk8";
296 tx-clock-name = "clk7";
297 phy-handle = <&phy3>;
298 phy-connection-type = "mii";
299 /* filled by u-boot */
300 local-mac-address = [ 00 00 00 00 00 00 ];
301 };
302
303 mdio@2120 {
304 #address-cells = <1>;
305 #size-cells = <0>;
306 compatible = "fsl,ucc-mdio";
307 reg = <0x2120 0x18>;
308
309 phy1: ethernet-phy@1 {
310 device_type = "ethernet-phy";
311 compatible = "national,DP83848VV";
312 reg = <1>;
313 };
314
315 phy2: ethernet-phy@2 {
316 device_type = "ethernet-phy";
317 compatible = "broadcom,BCM5481UA2KMLG";
318 reg = <2>;
319 };
320
321 phy3: ethernet-phy@3 {
322 device_type = "ethernet-phy";
323 compatible = "national,DP83848VV";
324 reg = <3>;
325 };
326
327 phy4: ethernet-phy@4 {
328 device_type = "ethernet-phy";
329 compatible = "broadcom,BCM5481UA2KMLG";
330 reg = <4>;
331 };
332 };
333
334 serial2: ucc@2400 {
335 device_type = "serial";
336 compatible = "ucc_uart";
337 reg = <0x2400 0x200>;
338 cell-index = <5>;
339 port-number = <0>;
340 rx-clock-name = "brg7";
341 tx-clock-name = "brg8";
342 interrupts = <40>;
343 interrupt-parent = <&qeic>;
344 soft-uart;
345 };
346
347 serial3: ucc@3400 {
348 device_type = "serial";
349 compatible = "ucc_uart";
350 reg = <0x3400 0x200>;
351 cell-index = <6>;
352 port-number = <1>;
353 rx-clock-name = "brg13";
354 tx-clock-name = "brg14";
355 interrupts = <41>;
356 interrupt-parent = <&qeic>;
357 soft-uart;
358 };
359
360 qeic: interrupt-controller@80 {
361 #address-cells = <0>;
362 #interrupt-cells = <1>;
363 compatible = "fsl,qe-ic";
364 interrupt-controller;
365 reg = <0x80 0x80>;
366 big-endian;
367 interrupts = <32 8 33 8>;
368 interrupt-parent = <&ipic>;
369 };
370 };
371 };
372
373 localbus@e0005000 {
374 #address-cells = <2>;
375 #size-cells = <1>;
376 compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
377 "simple-bus";
378 reg = <0xe0005000 0xd8>;
379 ranges = <0 0 0xff800000 0x0800000
380 1 0 0x60000000 0x0001000
381 2 0 0x70000000 0x4000000>;
382
383 flash@0,0 {
384 compatible = "intel,PC28F640P30T85", "cfi-flash";
385 reg = <0 0 0x800000>;
386 bank-width = <2>;
387 device-width = <1>;
388 };
389
390 display@2,0 {
391 device_type = "display";
392 compatible = "fujitsu,MB86277", "fujitsu,mint";
393 reg = <2 0 0x4000000>;
394 fujitsu,sh3;
395 little-endian;
396 /* filled by u-boot */
397 address = <0>;
398 depth = <0>;
399 width = <0>;
400 height = <0>;
401 linebytes = <0>;
402 /* linux,opened; - added by uboot */
403 };
404 };
405
406 pci0: pci@e0008500 {
407 #address-cells = <3>;
408 #size-cells = <2>;
409 #interrupt-cells = <1>;
410 device_type = "pci";
411 compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci";
412 reg = <0xe0008500 0x100>;
413 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000
414 0x42000000 0 0x80000000 0x80000000 0 0x10000000
415 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>;
416 interrupts = <66 8>;
417 interrupt-parent = <&ipic>;
418 interrupt-map-mask = <0xf800 0 0 7>;
419 interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */
420 0xa000 0 0 1 &ipic 18 8
421 0xa000 0 0 2 &ipic 19 8
422
423 /* PCI1 IDSEL 0x15 AD21 */
424 0xa800 0 0 1 &ipic 19 8
425 0xa800 0 0 2 &ipic 20 8
426 0xa800 0 0 3 &ipic 21 8
427 0xa800 0 0 4 &ipic 18 8>;
428 /* filled by u-boot */
429 bus-range = <0 0>;
430 clock-frequency = <0>;
431 };
432};
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts
index fea592574004..0a700cb5f611 100644
--- a/arch/powerpc/boot/dts/mpc8377_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8377_mds.dts
@@ -233,41 +233,6 @@
233 interrupt-parent = <&ipic>; 233 interrupt-parent = <&ipic>;
234 }; 234 };
235 235
236 crypto@30000 {
237 model = "SEC3";
238 compatible = "talitos";
239 reg = <0x30000 0x10000>;
240 interrupts = <11 0x8>;
241 interrupt-parent = <&ipic>;
242 /* Rev. 3.0 geometry */
243 num-channels = <4>;
244 channel-fifo-len = <24>;
245 exec-units-mask = <0x000001fe>;
246 descriptor-types-mask = <0x03ab0ebf>;
247 };
248
249 sdhc@2e000 {
250 model = "eSDHC";
251 compatible = "fsl,esdhc";
252 reg = <0x2e000 0x1000>;
253 interrupts = <42 0x8>;
254 interrupt-parent = <&ipic>;
255 };
256
257 sata@18000 {
258 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
259 reg = <0x18000 0x1000>;
260 interrupts = <44 0x8>;
261 interrupt-parent = <&ipic>;
262 };
263
264 sata@19000 {
265 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
266 reg = <0x19000 0x1000>;
267 interrupts = <45 0x8>;
268 interrupt-parent = <&ipic>;
269 };
270
271 dma@82a8 { 236 dma@82a8 {
272 #address-cells = <1>; 237 #address-cells = <1>;
273 #size-cells = <1>; 238 #size-cells = <1>;
@@ -303,6 +268,40 @@
303 }; 268 };
304 }; 269 };
305 270
271 crypto@30000 {
272 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
273 "fsl,sec2.1", "fsl,sec2.0";
274 reg = <0x30000 0x10000>;
275 interrupts = <11 0x8>;
276 interrupt-parent = <&ipic>;
277 fsl,num-channels = <4>;
278 fsl,channel-fifo-len = <24>;
279 fsl,exec-units-mask = <0x9fe>;
280 fsl,descriptor-types-mask = <0x3ab0ebf>;
281 };
282
283 sdhc@2e000 {
284 model = "eSDHC";
285 compatible = "fsl,esdhc";
286 reg = <0x2e000 0x1000>;
287 interrupts = <42 0x8>;
288 interrupt-parent = <&ipic>;
289 };
290
291 sata@18000 {
292 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
293 reg = <0x18000 0x1000>;
294 interrupts = <44 0x8>;
295 interrupt-parent = <&ipic>;
296 };
297
298 sata@19000 {
299 compatible = "fsl,mpc8379-sata", "fsl,pq-sata";
300 reg = <0x19000 0x1000>;
301 interrupts = <45 0x8>;
302 interrupt-parent = <&ipic>;
303 };
304
306 /* IPIC 305 /* IPIC
307 * interrupts cell = <intr #, sense> 306 * interrupts cell = <intr #, sense>
308 * sense values match linux IORESOURCE_IRQ_* defines: 307 * sense values match linux IORESOURCE_IRQ_* defines:
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts
index f3083c779b66..ed137aa83d5f 100644
--- a/arch/powerpc/boot/dts/mpc8377_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts
@@ -143,6 +143,41 @@
143 mode = "cpu"; 143 mode = "cpu";
144 }; 144 };
145 145
146 dma@82a8 {
147 #address-cells = <1>;
148 #size-cells = <1>;
149 compatible = "fsl,mpc8377-dma", "fsl,elo-dma";
150 reg = <0x82a8 4>;
151 ranges = <0 0x8100 0x1a8>;
152 interrupt-parent = <&ipic>;
153 interrupts = <71 8>;
154 cell-index = <0>;
155 dma-channel@0 {
156 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>;
158 interrupt-parent = <&ipic>;
159 interrupts = <71 8>;
160 };
161 dma-channel@80 {
162 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>;
164 interrupt-parent = <&ipic>;
165 interrupts = <71 8>;
166 };
167 dma-channel@100 {
168 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>;
170 interrupt-parent = <&ipic>;
171 interrupts = <71 8>;
172 };
173 dma-channel@180 {
174 compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>;
176 interrupt-parent = <&ipic>;
177 interrupts = <71 8>;
178 };
179 };
180
146 usb@23000 { 181 usb@23000 {
147 compatible = "fsl-usb2-dr"; 182 compatible = "fsl-usb2-dr";
148 reg = <0x23000 0x1000>; 183 reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
213 }; 248 };
214 249
215 crypto@30000 { 250 crypto@30000 {
216 model = "SEC3"; 251 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
217 device_type = "crypto"; 252 "fsl,sec2.1", "fsl,sec2.0";
218 compatible = "talitos";
219 reg = <0x30000 0x10000>; 253 reg = <0x30000 0x10000>;
220 interrupts = <11 0x8>; 254 interrupts = <11 0x8>;
221 interrupt-parent = <&ipic>; 255 interrupt-parent = <&ipic>;
222 /* Rev. 3.0 geometry */ 256 fsl,num-channels = <4>;
223 num-channels = <4>; 257 fsl,channel-fifo-len = <24>;
224 channel-fifo-len = <24>; 258 fsl,exec-units-mask = <0x9fe>;
225 exec-units-mask = <0x000001fe>; 259 fsl,descriptor-types-mask = <0x3ab0ebf>;
226 descriptor-types-mask = <0x03ab0ebf>;
227 }; 260 };
228 261
229 sata@18000 { 262 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts
index 1d6ea080ad73..29c8c76a58f7 100644
--- a/arch/powerpc/boot/dts/mpc8378_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8378_mds.dts
@@ -157,6 +157,41 @@
157 mode = "cpu"; 157 mode = "cpu";
158 }; 158 };
159 159
160 dma@82a8 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
164 reg = <0x82a8 4>;
165 ranges = <0 0x8100 0x1a8>;
166 interrupt-parent = <&ipic>;
167 interrupts = <71 8>;
168 cell-index = <0>;
169 dma-channel@0 {
170 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
171 reg = <0 0x80>;
172 interrupt-parent = <&ipic>;
173 interrupts = <71 8>;
174 };
175 dma-channel@80 {
176 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
177 reg = <0x80 0x80>;
178 interrupt-parent = <&ipic>;
179 interrupts = <71 8>;
180 };
181 dma-channel@100 {
182 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
183 reg = <0x100 0x80>;
184 interrupt-parent = <&ipic>;
185 interrupts = <71 8>;
186 };
187 dma-channel@180 {
188 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
189 reg = <0x180 0x28>;
190 interrupt-parent = <&ipic>;
191 interrupts = <71 8>;
192 };
193 };
194
160 usb@23000 { 195 usb@23000 {
161 compatible = "fsl-usb2-dr"; 196 compatible = "fsl-usb2-dr";
162 reg = <0x23000 0x1000>; 197 reg = <0x23000 0x1000>;
@@ -234,16 +269,15 @@
234 }; 269 };
235 270
236 crypto@30000 { 271 crypto@30000 {
237 model = "SEC3"; 272 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
238 compatible = "talitos"; 273 "fsl,sec2.1", "fsl,sec2.0";
239 reg = <0x30000 0x10000>; 274 reg = <0x30000 0x10000>;
240 interrupts = <11 0x8>; 275 interrupts = <11 0x8>;
241 interrupt-parent = <&ipic>; 276 interrupt-parent = <&ipic>;
242 /* Rev. 3.0 geometry */ 277 fsl,num-channels = <4>;
243 num-channels = <4>; 278 fsl,channel-fifo-len = <24>;
244 channel-fifo-len = <24>; 279 fsl,exec-units-mask = <0x9fe>;
245 exec-units-mask = <0x000001fe>; 280 fsl,descriptor-types-mask = <0x3ab0ebf>;
246 descriptor-types-mask = <0x03ab0ebf>;
247 }; 281 };
248 282
249 sdhc@2e000 { 283 sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts
index 0e872a60e091..34a7f2f935e1 100644
--- a/arch/powerpc/boot/dts/mpc8378_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts
@@ -143,6 +143,41 @@
143 mode = "cpu"; 143 mode = "cpu";
144 }; 144 };
145 145
146 dma@82a8 {
147 #address-cells = <1>;
148 #size-cells = <1>;
149 compatible = "fsl,mpc8378-dma", "fsl,elo-dma";
150 reg = <0x82a8 4>;
151 ranges = <0 0x8100 0x1a8>;
152 interrupt-parent = <&ipic>;
153 interrupts = <71 8>;
154 cell-index = <0>;
155 dma-channel@0 {
156 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>;
158 interrupt-parent = <&ipic>;
159 interrupts = <71 8>;
160 };
161 dma-channel@80 {
162 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>;
164 interrupt-parent = <&ipic>;
165 interrupts = <71 8>;
166 };
167 dma-channel@100 {
168 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>;
170 interrupt-parent = <&ipic>;
171 interrupts = <71 8>;
172 };
173 dma-channel@180 {
174 compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>;
176 interrupt-parent = <&ipic>;
177 interrupts = <71 8>;
178 };
179 };
180
146 usb@23000 { 181 usb@23000 {
147 compatible = "fsl-usb2-dr"; 182 compatible = "fsl-usb2-dr";
148 reg = <0x23000 0x1000>; 183 reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
213 }; 248 };
214 249
215 crypto@30000 { 250 crypto@30000 {
216 model = "SEC3"; 251 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
217 device_type = "crypto"; 252 "fsl,sec2.1", "fsl,sec2.0";
218 compatible = "talitos";
219 reg = <0x30000 0x10000>; 253 reg = <0x30000 0x10000>;
220 interrupts = <11 0x8>; 254 interrupts = <11 0x8>;
221 interrupt-parent = <&ipic>; 255 interrupt-parent = <&ipic>;
222 /* Rev. 3.0 geometry */ 256 fsl,num-channels = <4>;
223 num-channels = <4>; 257 fsl,channel-fifo-len = <24>;
224 channel-fifo-len = <24>; 258 fsl,exec-units-mask = <0x9fe>;
225 exec-units-mask = <0x000001fe>; 259 fsl,descriptor-types-mask = <0x3ab0ebf>;
226 descriptor-types-mask = <0x03ab0ebf>;
227 }; 260 };
228 261
229 /* IPIC 262 /* IPIC
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts
index 6f78a9fd9826..d641a8985ea3 100644
--- a/arch/powerpc/boot/dts/mpc8379_mds.dts
+++ b/arch/powerpc/boot/dts/mpc8379_mds.dts
@@ -157,6 +157,41 @@
157 mode = "cpu"; 157 mode = "cpu";
158 }; 158 };
159 159
160 dma@82a8 {
161 #address-cells = <1>;
162 #size-cells = <1>;
163 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
164 reg = <0x82a8 4>;
165 ranges = <0 0x8100 0x1a8>;
166 interrupt-parent = <&ipic>;
167 interrupts = <71 8>;
168 cell-index = <0>;
169 dma-channel@0 {
170 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
171 reg = <0 0x80>;
172 interrupt-parent = <&ipic>;
173 interrupts = <71 8>;
174 };
175 dma-channel@80 {
176 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
177 reg = <0x80 0x80>;
178 interrupt-parent = <&ipic>;
179 interrupts = <71 8>;
180 };
181 dma-channel@100 {
182 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
183 reg = <0x100 0x80>;
184 interrupt-parent = <&ipic>;
185 interrupts = <71 8>;
186 };
187 dma-channel@180 {
188 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
189 reg = <0x180 0x28>;
190 interrupt-parent = <&ipic>;
191 interrupts = <71 8>;
192 };
193 };
194
160 usb@23000 { 195 usb@23000 {
161 compatible = "fsl-usb2-dr"; 196 compatible = "fsl-usb2-dr";
162 reg = <0x23000 0x1000>; 197 reg = <0x23000 0x1000>;
@@ -234,16 +269,15 @@
234 }; 269 };
235 270
236 crypto@30000 { 271 crypto@30000 {
237 model = "SEC3"; 272 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
238 compatible = "talitos"; 273 "fsl,sec2.1", "fsl,sec2.0";
239 reg = <0x30000 0x10000>; 274 reg = <0x30000 0x10000>;
240 interrupts = <11 0x8>; 275 interrupts = <11 0x8>;
241 interrupt-parent = <&ipic>; 276 interrupt-parent = <&ipic>;
242 /* Rev. 3.0 geometry */ 277 fsl,num-channels = <4>;
243 num-channels = <4>; 278 fsl,channel-fifo-len = <24>;
244 channel-fifo-len = <24>; 279 fsl,exec-units-mask = <0x9fe>;
245 exec-units-mask = <0x000001fe>; 280 fsl,descriptor-types-mask = <0x3ab0ebf>;
246 descriptor-types-mask = <0x03ab0ebf>;
247 }; 281 };
248 282
249 sdhc@2e000 { 283 sdhc@2e000 {
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts
index 1eb8defaff6f..e4d7030d50e5 100644
--- a/arch/powerpc/boot/dts/mpc8379_rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts
@@ -143,6 +143,41 @@
143 mode = "cpu"; 143 mode = "cpu";
144 }; 144 };
145 145
146 dma@82a8 {
147 #address-cells = <1>;
148 #size-cells = <1>;
149 compatible = "fsl,mpc8379-dma", "fsl,elo-dma";
150 reg = <0x82a8 4>;
151 ranges = <0 0x8100 0x1a8>;
152 interrupt-parent = <&ipic>;
153 interrupts = <71 8>;
154 cell-index = <0>;
155 dma-channel@0 {
156 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
157 reg = <0 0x80>;
158 interrupt-parent = <&ipic>;
159 interrupts = <71 8>;
160 };
161 dma-channel@80 {
162 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
163 reg = <0x80 0x80>;
164 interrupt-parent = <&ipic>;
165 interrupts = <71 8>;
166 };
167 dma-channel@100 {
168 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
169 reg = <0x100 0x80>;
170 interrupt-parent = <&ipic>;
171 interrupts = <71 8>;
172 };
173 dma-channel@180 {
174 compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel";
175 reg = <0x180 0x28>;
176 interrupt-parent = <&ipic>;
177 interrupts = <71 8>;
178 };
179 };
180
146 usb@23000 { 181 usb@23000 {
147 compatible = "fsl-usb2-dr"; 182 compatible = "fsl-usb2-dr";
148 reg = <0x23000 0x1000>; 183 reg = <0x23000 0x1000>;
@@ -213,17 +248,15 @@
213 }; 248 };
214 249
215 crypto@30000 { 250 crypto@30000 {
216 model = "SEC3"; 251 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
217 device_type = "crypto"; 252 "fsl,sec2.1", "fsl,sec2.0";
218 compatible = "talitos";
219 reg = <0x30000 0x10000>; 253 reg = <0x30000 0x10000>;
220 interrupts = <11 0x8>; 254 interrupts = <11 0x8>;
221 interrupt-parent = <&ipic>; 255 interrupt-parent = <&ipic>;
222 /* Rev. 3.0 geometry */ 256 fsl,num-channels = <4>;
223 num-channels = <4>; 257 fsl,channel-fifo-len = <24>;
224 channel-fifo-len = <24>; 258 fsl,exec-units-mask = <0x9fe>;
225 exec-units-mask = <0x000001fe>; 259 fsl,descriptor-types-mask = <0x3ab0ebf>;
226 descriptor-types-mask = <0x03ab0ebf>;
227 }; 260 };
228 261
229 sata@18000 { 262 sata@18000 {
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
new file mode 100644
index 000000000000..02cfa24a1695
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -0,0 +1,432 @@
1/*
2 * MPC8536 DS Device Tree Source
3 *
4 * Copyright 2008 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12/dts-v1/;
13
14/ {
15 model = "fsl,mpc8536ds";
16 compatible = "fsl,mpc8536ds";
17 #address-cells = <1>;
18 #size-cells = <1>;
19
20 aliases {
21 ethernet0 = &enet0;
22 ethernet1 = &enet1;
23 serial0 = &serial0;
24 serial1 = &serial1;
25 pci0 = &pci0;
26 pci1 = &pci1;
27 pci2 = &pci2;
28 pci3 = &pci3;
29 };
30
31 cpus {
32 #cpus = <1>;
33 #address-cells = <1>;
34 #size-cells = <0>;
35
36 PowerPC,8536@0 {
37 device_type = "cpu";
38 reg = <0>;
39 next-level-cache = <&L2>;
40 };
41 };
42
43 memory {
44 device_type = "memory";
45 reg = <00000000 00000000>; // Filled by U-Boot
46 };
47
48 soc@ffe00000 {
49 #address-cells = <1>;
50 #size-cells = <1>;
51 device_type = "soc";
52 ranges = <0x0 0xffe00000 0x100000>;
53 reg = <0xffe00000 0x1000>;
54 bus-frequency = <0>; // Filled out by uboot.
55
56 memory-controller@2000 {
57 compatible = "fsl,mpc8536-memory-controller";
58 reg = <0x2000 0x1000>;
59 interrupt-parent = <&mpic>;
60 interrupts = <18 0x2>;
61 };
62
63 L2: l2-cache-controller@20000 {
64 compatible = "fsl,mpc8536-l2-cache-controller";
65 reg = <0x20000 0x1000>;
66 interrupt-parent = <&mpic>;
67 interrupts = <16 0x2>;
68 };
69
70 i2c@3000 {
71 #address-cells = <1>;
72 #size-cells = <0>;
73 cell-index = <0>;
74 compatible = "fsl-i2c";
75 reg = <0x3000 0x100>;
76 interrupts = <43 0x2>;
77 interrupt-parent = <&mpic>;
78 dfsrr;
79 };
80
81 i2c@3100 {
82 #address-cells = <1>;
83 #size-cells = <0>;
84 cell-index = <1>;
85 compatible = "fsl-i2c";
86 reg = <0x3100 0x100>;
87 interrupts = <43 0x2>;
88 interrupt-parent = <&mpic>;
89 dfsrr;
90 rtc@68 {
91 compatible = "dallas,ds3232";
92 reg = <0x68>;
93 };
94 };
95
96 dma@21300 {
97 #address-cells = <1>;
98 #size-cells = <1>;
99 compatible = "fsl,mpc8536-dma", "fsl,eloplus-dma";
100 reg = <0x21300 4>;
101 ranges = <0 0x21100 0x200>;
102 cell-index = <0>;
103 dma-channel@0 {
104 compatible = "fsl,mpc8536-dma-channel",
105 "fsl,eloplus-dma-channel";
106 reg = <0x0 0x80>;
107 cell-index = <0>;
108 interrupt-parent = <&mpic>;
109 interrupts = <14 0x2>;
110 };
111 dma-channel@80 {
112 compatible = "fsl,mpc8536-dma-channel",
113 "fsl,eloplus-dma-channel";
114 reg = <0x80 0x80>;
115 cell-index = <1>;
116 interrupt-parent = <&mpic>;
117 interrupts = <15 0x2>;
118 };
119 dma-channel@100 {
120 compatible = "fsl,mpc8536-dma-channel",
121 "fsl,eloplus-dma-channel";
122 reg = <0x100 0x80>;
123 cell-index = <2>;
124 interrupt-parent = <&mpic>;
125 interrupts = <16 0x2>;
126 };
127 dma-channel@180 {
128 compatible = "fsl,mpc8536-dma-channel",
129 "fsl,eloplus-dma-channel";
130 reg = <0x180 0x80>;
131 cell-index = <3>;
132 interrupt-parent = <&mpic>;
133 interrupts = <17 0x2>;
134 };
135 };
136
137 mdio@24520 {
138 #address-cells = <1>;
139 #size-cells = <0>;
140 compatible = "fsl,gianfar-mdio";
141 reg = <0x24520 0x20>;
142
143 phy0: ethernet-phy@0 {
144 interrupt-parent = <&mpic>;
145 interrupts = <10 0x1>;
146 reg = <0>;
147 device_type = "ethernet-phy";
148 };
149 phy1: ethernet-phy@1 {
150 interrupt-parent = <&mpic>;
151 interrupts = <10 0x1>;
152 reg = <1>;
153 device_type = "ethernet-phy";
154 };
155 };
156
157 usb@22000 {
158 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
159 reg = <0x22000 0x1000>;
160 #address-cells = <1>;
161 #size-cells = <0>;
162 interrupt-parent = <&mpic>;
163 interrupts = <28 0x2>;
164 phy_type = "ulpi";
165 };
166
167 usb@23000 {
168 compatible = "fsl,mpc8536-usb2-mph", "fsl-usb2-mph";
169 reg = <0x23000 0x1000>;
170 #address-cells = <1>;
171 #size-cells = <0>;
172 interrupt-parent = <&mpic>;
173 interrupts = <46 0x2>;
174 phy_type = "ulpi";
175 };
176
177 enet0: ethernet@24000 {
178 cell-index = <0>;
179 device_type = "network";
180 model = "TSEC";
181 compatible = "gianfar";
182 reg = <0x24000 0x1000>;
183 local-mac-address = [ 00 00 00 00 00 00 ];
184 interrupts = <29 2 30 2 34 2>;
185 interrupt-parent = <&mpic>;
186 phy-handle = <&phy1>;
187 phy-connection-type = "rgmii-id";
188 };
189
190 enet1: ethernet@26000 {
191 cell-index = <1>;
192 device_type = "network";
193 model = "TSEC";
194 compatible = "gianfar";
195 reg = <0x26000 0x1000>;
196 local-mac-address = [ 00 00 00 00 00 00 ];
197 interrupts = <31 2 32 2 33 2>;
198 interrupt-parent = <&mpic>;
199 phy-handle = <&phy0>;
200 phy-connection-type = "rgmii-id";
201 };
202
203 usb@2b000 {
204 compatible = "fsl,mpc8536-usb2-dr", "fsl-usb2-dr";
205 reg = <0x2b000 0x1000>;
206 #address-cells = <1>;
207 #size-cells = <0>;
208 interrupt-parent = <&mpic>;
209 interrupts = <60 0x2>;
210 dr_mode = "peripheral";
211 phy_type = "ulpi";
212 };
213
214 serial0: serial@4500 {
215 cell-index = <0>;
216 device_type = "serial";
217 compatible = "ns16550";
218 reg = <0x4500 0x100>;
219 clock-frequency = <0>;
220 interrupts = <42 0x2>;
221 interrupt-parent = <&mpic>;
222 };
223
224 serial1: serial@4600 {
225 cell-index = <1>;
226 device_type = "serial";
227 compatible = "ns16550";
228 reg = <0x4600 0x100>;
229 clock-frequency = <0>;
230 interrupts = <42 0x2>;
231 interrupt-parent = <&mpic>;
232 };
233
234 crypto@30000 {
235 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
236 "fsl,sec2.1", "fsl,sec2.0";
237 reg = <0x30000 0x10000>;
238 interrupts = <45 2 58 2>;
239 interrupt-parent = <&mpic>;
240 fsl,num-channels = <4>;
241 fsl,channel-fifo-len = <24>;
242 fsl,exec-units-mask = <0x9fe>;
243 fsl,descriptor-types-mask = <0x3ab0ebf>;
244 };
245
246 sata@18000 {
247 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
248 reg = <0x18000 0x1000>;
249 cell-index = <1>;
250 interrupts = <74 0x2>;
251 interrupt-parent = <&mpic>;
252 };
253
254 sata@19000 {
255 compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
256 reg = <0x19000 0x1000>;
257 cell-index = <2>;
258 interrupts = <41 0x2>;
259 interrupt-parent = <&mpic>;
260 };
261
262 global-utilities@e0000 { //global utilities block
263 compatible = "fsl,mpc8548-guts";
264 reg = <0xe0000 0x1000>;
265 fsl,has-rstcr;
266 };
267
268 mpic: pic@40000 {
269 clock-frequency = <0>;
270 interrupt-controller;
271 #address-cells = <0>;
272 #interrupt-cells = <2>;
273 reg = <0x40000 0x40000>;
274 compatible = "chrp,open-pic";
275 device_type = "open-pic";
276 big-endian;
277 };
278
279 msi@41600 {
280 compatible = "fsl,mpc8536-msi", "fsl,mpic-msi";
281 reg = <0x41600 0x80>;
282 msi-available-ranges = <0 0x100>;
283 interrupts = <
284 0xe0 0
285 0xe1 0
286 0xe2 0
287 0xe3 0
288 0xe4 0
289 0xe5 0
290 0xe6 0
291 0xe7 0>;
292 interrupt-parent = <&mpic>;
293 };
294 };
295
296 pci0: pci@ffe08000 {
297 cell-index = <0>;
298 compatible = "fsl,mpc8540-pci";
299 device_type = "pci";
300 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
301 interrupt-map = <
302
303 /* IDSEL 0x11 J17 Slot 1 */
304 0x8800 0 0 1 &mpic 1 1
305 0x8800 0 0 2 &mpic 2 1
306 0x8800 0 0 3 &mpic 3 1
307 0x8800 0 0 4 &mpic 4 1>;
308
309 interrupt-parent = <&mpic>;
310 interrupts = <24 0x2>;
311 bus-range = <0 0xff>;
312 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x10000000
313 0x01000000 0 0x00000000 0xffc00000 0 0x00010000>;
314 clock-frequency = <66666666>;
315 #interrupt-cells = <1>;
316 #size-cells = <2>;
317 #address-cells = <3>;
318 reg = <0xffe08000 0x1000>;
319 };
320
321 pci1: pcie@ffe09000 {
322 cell-index = <1>;
323 compatible = "fsl,mpc8548-pcie";
324 device_type = "pci";
325 #interrupt-cells = <1>;
326 #size-cells = <2>;
327 #address-cells = <3>;
328 reg = <0xffe09000 0x1000>;
329 bus-range = <0 0xff>;
330 ranges = <0x02000000 0 0x98000000 0x98000000 0 0x08000000
331 0x01000000 0 0x00000000 0xffc20000 0 0x00010000>;
332 clock-frequency = <33333333>;
333 interrupt-parent = <&mpic>;
334 interrupts = <25 0x2>;
335 interrupt-map-mask = <0xf800 0 0 7>;
336 interrupt-map = <
337 /* IDSEL 0x0 */
338 0000 0 0 1 &mpic 4 1
339 0000 0 0 2 &mpic 5 1
340 0000 0 0 3 &mpic 6 1
341 0000 0 0 4 &mpic 7 1
342 >;
343 pcie@0 {
344 reg = <0 0 0 0 0>;
345 #size-cells = <2>;
346 #address-cells = <3>;
347 device_type = "pci";
348 ranges = <0x02000000 0 0x98000000
349 0x02000000 0 0x98000000
350 0 0x08000000
351
352 0x01000000 0 0x00000000
353 0x01000000 0 0x00000000
354 0 0x00010000>;
355 };
356 };
357
358 pci2: pcie@ffe0a000 {
359 cell-index = <2>;
360 compatible = "fsl,mpc8548-pcie";
361 device_type = "pci";
362 #interrupt-cells = <1>;
363 #size-cells = <2>;
364 #address-cells = <3>;
365 reg = <0xffe0a000 0x1000>;
366 bus-range = <0 0xff>;
367 ranges = <0x02000000 0 0x90000000 0x90000000 0 0x08000000
368 0x01000000 0 0x00000000 0xffc10000 0 0x00010000>;
369 clock-frequency = <33333333>;
370 interrupt-parent = <&mpic>;
371 interrupts = <26 0x2>;
372 interrupt-map-mask = <0xf800 0 0 7>;
373 interrupt-map = <
374 /* IDSEL 0x0 */
375 0000 0 0 1 &mpic 0 1
376 0000 0 0 2 &mpic 1 1
377 0000 0 0 3 &mpic 2 1
378 0000 0 0 4 &mpic 3 1
379 >;
380 pcie@0 {
381 reg = <0 0 0 0 0>;
382 #size-cells = <2>;
383 #address-cells = <3>;
384 device_type = "pci";
385 ranges = <0x02000000 0 0x90000000
386 0x02000000 0 0x90000000
387 0 0x08000000
388
389 0x01000000 0 0x00000000
390 0x01000000 0 0x00000000
391 0 0x00010000>;
392 };
393 };
394
395 pci3: pcie@ffe0b000 {
396 cell-index = <3>;
397 compatible = "fsl,mpc8548-pcie";
398 device_type = "pci";
399 #interrupt-cells = <1>;
400 #size-cells = <2>;
401 #address-cells = <3>;
402 reg = <0xffe0b000 0x1000>;
403 bus-range = <0 0xff>;
404 ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x20000000
405 0x01000000 0 0x00000000 0xffc30000 0 0x00010000>;
406 clock-frequency = <33333333>;
407 interrupt-parent = <&mpic>;
408 interrupts = <27 0x2>;
409 interrupt-map-mask = <0xf800 0 0 7>;
410 interrupt-map = <
411 /* IDSEL 0x0 */
412 0000 0 0 1 &mpic 8 1
413 0000 0 0 2 &mpic 9 1
414 0000 0 0 3 &mpic 10 1
415 0000 0 0 4 &mpic 11 1
416 >;
417
418 pcie@0 {
419 reg = <0 0 0 0 0>;
420 #size-cells = <2>;
421 #address-cells = <3>;
422 device_type = "pci";
423 ranges = <0x02000000 0 0xa0000000
424 0x02000000 0 0xa0000000
425 0 0x20000000
426
427 0x01000000 0 0x00000000
428 0x01000000 0 0x00000000
429 0 0x00100000>;
430 };
431 };
432};
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts
index 18033ed0b535..f2273a872b11 100644
--- a/arch/powerpc/boot/dts/mpc8540ads.dts
+++ b/arch/powerpc/boot/dts/mpc8540ads.dts
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; // 33 MHz, from uboot 40 timebase-frequency = <0>; // 33 MHz, from uboot
41 bus-frequency = <0>; // 166 MHz 41 bus-frequency = <0>; // 166 MHz
42 clock-frequency = <0>; // 825 MHz, from uboot 42 clock-frequency = <0>; // 825 MHz, from uboot
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -63,7 +64,7 @@
63 interrupts = <18 2>; 64 interrupts = <18 2>;
64 }; 65 };
65 66
66 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,8540-l2-cache-controller";
68 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; // 32 bytes 70 cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
83 dfsrr; 84 dfsrr;
84 }; 85 };
85 86
87 dma@21300 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
91 reg = <0x21300 0x4>;
92 ranges = <0x0 0x21100 0x200>;
93 cell-index = <0>;
94 dma-channel@0 {
95 compatible = "fsl,mpc8540-dma-channel",
96 "fsl,eloplus-dma-channel";
97 reg = <0x0 0x80>;
98 cell-index = <0>;
99 interrupt-parent = <&mpic>;
100 interrupts = <20 2>;
101 };
102 dma-channel@80 {
103 compatible = "fsl,mpc8540-dma-channel",
104 "fsl,eloplus-dma-channel";
105 reg = <0x80 0x80>;
106 cell-index = <1>;
107 interrupt-parent = <&mpic>;
108 interrupts = <21 2>;
109 };
110 dma-channel@100 {
111 compatible = "fsl,mpc8540-dma-channel",
112 "fsl,eloplus-dma-channel";
113 reg = <0x100 0x80>;
114 cell-index = <2>;
115 interrupt-parent = <&mpic>;
116 interrupts = <22 2>;
117 };
118 dma-channel@180 {
119 compatible = "fsl,mpc8540-dma-channel",
120 "fsl,eloplus-dma-channel";
121 reg = <0x180 0x80>;
122 cell-index = <3>;
123 interrupt-parent = <&mpic>;
124 interrupts = <23 2>;
125 };
126 };
127
86 mdio@24520 { 128 mdio@24520 {
87 #address-cells = <1>; 129 #address-cells = <1>;
88 #size-cells = <0>; 130 #size-cells = <0>;
@@ -165,14 +207,12 @@
165 interrupt-parent = <&mpic>; 207 interrupt-parent = <&mpic>;
166 }; 208 };
167 mpic: pic@40000 { 209 mpic: pic@40000 {
168 clock-frequency = <0>;
169 interrupt-controller; 210 interrupt-controller;
170 #address-cells = <0>; 211 #address-cells = <0>;
171 #interrupt-cells = <2>; 212 #interrupt-cells = <2>;
172 reg = <0x40000 0x40000>; 213 reg = <0x40000 0x40000>;
173 compatible = "chrp,open-pic"; 214 compatible = "chrp,open-pic";
174 device_type = "open-pic"; 215 device_type = "open-pic";
175 big-endian;
176 }; 216 };
177 }; 217 };
178 218
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts
index 663c7c50ca45..c4469f19ff82 100644
--- a/arch/powerpc/boot/dts/mpc8541cds.dts
+++ b/arch/powerpc/boot/dts/mpc8541cds.dts
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; // 33 MHz, from uboot 40 timebase-frequency = <0>; // 33 MHz, from uboot
41 bus-frequency = <0>; // 166 MHz 41 bus-frequency = <0>; // 166 MHz
42 clock-frequency = <0>; // 825 MHz, from uboot 42 clock-frequency = <0>; // 825 MHz, from uboot
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -63,7 +64,7 @@
63 interrupts = <18 2>; 64 interrupts = <18 2>;
64 }; 65 };
65 66
66 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8541-l2-cache-controller"; 68 compatible = "fsl,8541-l2-cache-controller";
68 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; // 32 bytes 70 cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
83 dfsrr; 84 dfsrr;
84 }; 85 };
85 86
87 dma@21300 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
91 reg = <0x21300 0x4>;
92 ranges = <0x0 0x21100 0x200>;
93 cell-index = <0>;
94 dma-channel@0 {
95 compatible = "fsl,mpc8541-dma-channel",
96 "fsl,eloplus-dma-channel";
97 reg = <0x0 0x80>;
98 cell-index = <0>;
99 interrupt-parent = <&mpic>;
100 interrupts = <20 2>;
101 };
102 dma-channel@80 {
103 compatible = "fsl,mpc8541-dma-channel",
104 "fsl,eloplus-dma-channel";
105 reg = <0x80 0x80>;
106 cell-index = <1>;
107 interrupt-parent = <&mpic>;
108 interrupts = <21 2>;
109 };
110 dma-channel@100 {
111 compatible = "fsl,mpc8541-dma-channel",
112 "fsl,eloplus-dma-channel";
113 reg = <0x100 0x80>;
114 cell-index = <2>;
115 interrupt-parent = <&mpic>;
116 interrupts = <22 2>;
117 };
118 dma-channel@180 {
119 compatible = "fsl,mpc8541-dma-channel",
120 "fsl,eloplus-dma-channel";
121 reg = <0x180 0x80>;
122 cell-index = <3>;
123 interrupt-parent = <&mpic>;
124 interrupts = <23 2>;
125 };
126 };
127
86 mdio@24520 { 128 mdio@24520 {
87 #address-cells = <1>; 129 #address-cells = <1>;
88 #size-cells = <0>; 130 #size-cells = <0>;
@@ -147,15 +189,24 @@
147 interrupt-parent = <&mpic>; 189 interrupt-parent = <&mpic>;
148 }; 190 };
149 191
192 crypto@30000 {
193 compatible = "fsl,sec2.0";
194 reg = <0x30000 0x10000>;
195 interrupts = <45 2>;
196 interrupt-parent = <&mpic>;
197 fsl,num-channels = <4>;
198 fsl,channel-fifo-len = <24>;
199 fsl,exec-units-mask = <0x7e>;
200 fsl,descriptor-types-mask = <0x01010ebf>;
201 };
202
150 mpic: pic@40000 { 203 mpic: pic@40000 {
151 clock-frequency = <0>;
152 interrupt-controller; 204 interrupt-controller;
153 #address-cells = <0>; 205 #address-cells = <0>;
154 #interrupt-cells = <2>; 206 #interrupt-cells = <2>;
155 reg = <0x40000 0x40000>; 207 reg = <0x40000 0x40000>;
156 compatible = "chrp,open-pic"; 208 compatible = "chrp,open-pic";
157 device_type = "open-pic"; 209 device_type = "open-pic";
158 big-endian;
159 }; 210 };
160 211
161 cpm@919c0 { 212 cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts
index 6a0d8db96d97..7d3829d3495e 100644
--- a/arch/powerpc/boot/dts/mpc8544ds.dts
+++ b/arch/powerpc/boot/dts/mpc8544ds.dts
@@ -41,6 +41,7 @@
41 timebase-frequency = <0>; 41 timebase-frequency = <0>;
42 bus-frequency = <0>; 42 bus-frequency = <0>;
43 clock-frequency = <0>; 43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
44 }; 45 };
45 }; 46 };
46 47
@@ -65,7 +66,7 @@
65 interrupts = <18 2>; 66 interrupts = <18 2>;
66 }; 67 };
67 68
68 l2-cache-controller@20000 { 69 L2: l2-cache-controller@20000 {
69 compatible = "fsl,8544-l2-cache-controller"; 70 compatible = "fsl,8544-l2-cache-controller";
70 reg = <0x20000 0x1000>; 71 reg = <0x20000 0x1000>;
71 cache-line-size = <32>; // 32 bytes 72 cache-line-size = <32>; // 32 bytes
@@ -209,15 +210,40 @@
209 fsl,has-rstcr; 210 fsl,has-rstcr;
210 }; 211 };
211 212
213 crypto@30000 {
214 compatible = "fsl,sec2.1", "fsl,sec2.0";
215 reg = <0x30000 0x10000>;
216 interrupts = <45 2>;
217 interrupt-parent = <&mpic>;
218 fsl,num-channels = <4>;
219 fsl,channel-fifo-len = <24>;
220 fsl,exec-units-mask = <0xfe>;
221 fsl,descriptor-types-mask = <0x12b0ebf>;
222 };
223
212 mpic: pic@40000 { 224 mpic: pic@40000 {
213 clock-frequency = <0>;
214 interrupt-controller; 225 interrupt-controller;
215 #address-cells = <0>; 226 #address-cells = <0>;
216 #interrupt-cells = <2>; 227 #interrupt-cells = <2>;
217 reg = <0x40000 0x40000>; 228 reg = <0x40000 0x40000>;
218 compatible = "chrp,open-pic"; 229 compatible = "chrp,open-pic";
219 device_type = "open-pic"; 230 device_type = "open-pic";
220 big-endian; 231 };
232
233 msi@41600 {
234 compatible = "fsl,mpc8544-msi", "fsl,mpic-msi";
235 reg = <0x41600 0x80>;
236 msi-available-ranges = <0 0x100>;
237 interrupts = <
238 0xe0 0
239 0xe1 0
240 0xe2 0
241 0xe3 0
242 0xe4 0
243 0xe5 0
244 0xe6 0
245 0xe7 0>;
246 interrupt-parent = <&mpic>;
221 }; 247 };
222 }; 248 };
223 249
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts
index 4811b8107415..d84466bb7eca 100644
--- a/arch/powerpc/boot/dts/mpc8548cds.dts
+++ b/arch/powerpc/boot/dts/mpc8548cds.dts
@@ -45,6 +45,7 @@
45 timebase-frequency = <0>; // 33 MHz, from uboot 45 timebase-frequency = <0>; // 33 MHz, from uboot
46 bus-frequency = <0>; // 166 MHz 46 bus-frequency = <0>; // 166 MHz
47 clock-frequency = <0>; // 825 MHz, from uboot 47 clock-frequency = <0>; // 825 MHz, from uboot
48 next-level-cache = <&L2>;
48 }; 49 };
49 }; 50 };
50 51
@@ -68,7 +69,7 @@
68 interrupts = <18 2>; 69 interrupts = <18 2>;
69 }; 70 };
70 71
71 l2-cache-controller@20000 { 72 L2: l2-cache-controller@20000 {
72 compatible = "fsl,8548-l2-cache-controller"; 73 compatible = "fsl,8548-l2-cache-controller";
73 reg = <0x20000 0x1000>; 74 reg = <0x20000 0x1000>;
74 cache-line-size = <32>; // 32 bytes 75 cache-line-size = <32>; // 32 bytes
@@ -99,6 +100,47 @@
99 dfsrr; 100 dfsrr;
100 }; 101 };
101 102
103 dma@21300 {
104 #address-cells = <1>;
105 #size-cells = <1>;
106 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
107 reg = <0x21300 0x4>;
108 ranges = <0x0 0x21100 0x200>;
109 cell-index = <0>;
110 dma-channel@0 {
111 compatible = "fsl,mpc8548-dma-channel",
112 "fsl,eloplus-dma-channel";
113 reg = <0x0 0x80>;
114 cell-index = <0>;
115 interrupt-parent = <&mpic>;
116 interrupts = <20 2>;
117 };
118 dma-channel@80 {
119 compatible = "fsl,mpc8548-dma-channel",
120 "fsl,eloplus-dma-channel";
121 reg = <0x80 0x80>;
122 cell-index = <1>;
123 interrupt-parent = <&mpic>;
124 interrupts = <21 2>;
125 };
126 dma-channel@100 {
127 compatible = "fsl,mpc8548-dma-channel",
128 "fsl,eloplus-dma-channel";
129 reg = <0x100 0x80>;
130 cell-index = <2>;
131 interrupt-parent = <&mpic>;
132 interrupts = <22 2>;
133 };
134 dma-channel@180 {
135 compatible = "fsl,mpc8548-dma-channel",
136 "fsl,eloplus-dma-channel";
137 reg = <0x180 0x80>;
138 cell-index = <3>;
139 interrupt-parent = <&mpic>;
140 interrupts = <23 2>;
141 };
142 };
143
102 mdio@24520 { 144 mdio@24520 {
103 #address-cells = <1>; 145 #address-cells = <1>;
104 #size-cells = <0>; 146 #size-cells = <0>;
@@ -207,15 +249,24 @@
207 fsl,has-rstcr; 249 fsl,has-rstcr;
208 }; 250 };
209 251
252 crypto@30000 {
253 compatible = "fsl,sec2.1", "fsl,sec2.0";
254 reg = <0x30000 0x10000>;
255 interrupts = <45 2>;
256 interrupt-parent = <&mpic>;
257 fsl,num-channels = <4>;
258 fsl,channel-fifo-len = <24>;
259 fsl,exec-units-mask = <0xfe>;
260 fsl,descriptor-types-mask = <0x12b0ebf>;
261 };
262
210 mpic: pic@40000 { 263 mpic: pic@40000 {
211 clock-frequency = <0>;
212 interrupt-controller; 264 interrupt-controller;
213 #address-cells = <0>; 265 #address-cells = <0>;
214 #interrupt-cells = <2>; 266 #interrupt-cells = <2>;
215 reg = <0x40000 0x40000>; 267 reg = <0x40000 0x40000>;
216 compatible = "chrp,open-pic"; 268 compatible = "chrp,open-pic";
217 device_type = "open-pic"; 269 device_type = "open-pic";
218 big-endian;
219 }; 270 };
220 }; 271 };
221 272
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts
index b025c566c10d..e03a78006283 100644
--- a/arch/powerpc/boot/dts/mpc8555cds.dts
+++ b/arch/powerpc/boot/dts/mpc8555cds.dts
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; // 33 MHz, from uboot 40 timebase-frequency = <0>; // 33 MHz, from uboot
41 bus-frequency = <0>; // 166 MHz 41 bus-frequency = <0>; // 166 MHz
42 clock-frequency = <0>; // 825 MHz, from uboot 42 clock-frequency = <0>; // 825 MHz, from uboot
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -63,7 +64,7 @@
63 interrupts = <18 2>; 64 interrupts = <18 2>;
64 }; 65 };
65 66
66 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8555-l2-cache-controller"; 68 compatible = "fsl,8555-l2-cache-controller";
68 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; // 32 bytes 70 cache-line-size = <32>; // 32 bytes
@@ -83,6 +84,47 @@
83 dfsrr; 84 dfsrr;
84 }; 85 };
85 86
87 dma@21300 {
88 #address-cells = <1>;
89 #size-cells = <1>;
90 compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
91 reg = <0x21300 0x4>;
92 ranges = <0x0 0x21100 0x200>;
93 cell-index = <0>;
94 dma-channel@0 {
95 compatible = "fsl,mpc8555-dma-channel",
96 "fsl,eloplus-dma-channel";
97 reg = <0x0 0x80>;
98 cell-index = <0>;
99 interrupt-parent = <&mpic>;
100 interrupts = <20 2>;
101 };
102 dma-channel@80 {
103 compatible = "fsl,mpc8555-dma-channel",
104 "fsl,eloplus-dma-channel";
105 reg = <0x80 0x80>;
106 cell-index = <1>;
107 interrupt-parent = <&mpic>;
108 interrupts = <21 2>;
109 };
110 dma-channel@100 {
111 compatible = "fsl,mpc8555-dma-channel",
112 "fsl,eloplus-dma-channel";
113 reg = <0x100 0x80>;
114 cell-index = <2>;
115 interrupt-parent = <&mpic>;
116 interrupts = <22 2>;
117 };
118 dma-channel@180 {
119 compatible = "fsl,mpc8555-dma-channel",
120 "fsl,eloplus-dma-channel";
121 reg = <0x180 0x80>;
122 cell-index = <3>;
123 interrupt-parent = <&mpic>;
124 interrupts = <23 2>;
125 };
126 };
127
86 mdio@24520 { 128 mdio@24520 {
87 #address-cells = <1>; 129 #address-cells = <1>;
88 #size-cells = <0>; 130 #size-cells = <0>;
@@ -147,15 +189,24 @@
147 interrupt-parent = <&mpic>; 189 interrupt-parent = <&mpic>;
148 }; 190 };
149 191
192 crypto@30000 {
193 compatible = "fsl,sec2.0";
194 reg = <0x30000 0x10000>;
195 interrupts = <45 2>;
196 interrupt-parent = <&mpic>;
197 fsl,num-channels = <4>;
198 fsl,channel-fifo-len = <24>;
199 fsl,exec-units-mask = <0x7e>;
200 fsl,descriptor-types-mask = <0x01010ebf>;
201 };
202
150 mpic: pic@40000 { 203 mpic: pic@40000 {
151 clock-frequency = <0>;
152 interrupt-controller; 204 interrupt-controller;
153 #address-cells = <0>; 205 #address-cells = <0>;
154 #interrupt-cells = <2>; 206 #interrupt-cells = <2>;
155 reg = <0x40000 0x40000>; 207 reg = <0x40000 0x40000>;
156 compatible = "chrp,open-pic"; 208 compatible = "chrp,open-pic";
157 device_type = "open-pic"; 209 device_type = "open-pic";
158 big-endian;
159 }; 210 };
160 211
161 cpm@919c0 { 212 cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts
index 0cc16ab305d1..ba8159de040b 100644
--- a/arch/powerpc/boot/dts/mpc8560ads.dts
+++ b/arch/powerpc/boot/dts/mpc8560ads.dts
@@ -64,7 +64,7 @@
64 interrupts = <18 2>; 64 interrupts = <18 2>;
65 }; 65 };
66 66
67 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; // 32 bytes 70 cache-line-size = <32>; // 32 bytes
@@ -73,6 +73,47 @@
73 interrupts = <16 2>; 73 interrupts = <16 2>;
74 }; 74 };
75 75
76 dma@21300 {
77 #address-cells = <1>;
78 #size-cells = <1>;
79 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
80 reg = <0x21300 0x4>;
81 ranges = <0x0 0x21100 0x200>;
82 cell-index = <0>;
83 dma-channel@0 {
84 compatible = "fsl,mpc8560-dma-channel",
85 "fsl,eloplus-dma-channel";
86 reg = <0x0 0x80>;
87 cell-index = <0>;
88 interrupt-parent = <&mpic>;
89 interrupts = <20 2>;
90 };
91 dma-channel@80 {
92 compatible = "fsl,mpc8560-dma-channel",
93 "fsl,eloplus-dma-channel";
94 reg = <0x80 0x80>;
95 cell-index = <1>;
96 interrupt-parent = <&mpic>;
97 interrupts = <21 2>;
98 };
99 dma-channel@100 {
100 compatible = "fsl,mpc8560-dma-channel",
101 "fsl,eloplus-dma-channel";
102 reg = <0x100 0x80>;
103 cell-index = <2>;
104 interrupt-parent = <&mpic>;
105 interrupts = <22 2>;
106 };
107 dma-channel@180 {
108 compatible = "fsl,mpc8560-dma-channel",
109 "fsl,eloplus-dma-channel";
110 reg = <0x180 0x80>;
111 cell-index = <3>;
112 interrupt-parent = <&mpic>;
113 interrupts = <23 2>;
114 };
115 };
116
76 mdio@24520 { 117 mdio@24520 {
77 #address-cells = <1>; 118 #address-cells = <1>;
78 #size-cells = <0>; 119 #size-cells = <0>;
@@ -134,6 +175,7 @@
134 #address-cells = <0>; 175 #address-cells = <0>;
135 #interrupt-cells = <2>; 176 #interrupt-cells = <2>;
136 reg = <0x40000 0x40000>; 177 reg = <0x40000 0x40000>;
178 compatible = "chrp,open-pic";
137 device_type = "open-pic"; 179 device_type = "open-pic";
138 }; 180 };
139 181
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts
index a025a8ededc5..9c30a34821dc 100644
--- a/arch/powerpc/boot/dts/mpc8568mds.dts
+++ b/arch/powerpc/boot/dts/mpc8568mds.dts
@@ -42,6 +42,7 @@
42 timebase-frequency = <0>; 42 timebase-frequency = <0>;
43 bus-frequency = <0>; 43 bus-frequency = <0>;
44 clock-frequency = <0>; 44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
45 }; 46 };
46 }; 47 };
47 48
@@ -70,7 +71,7 @@
70 interrupts = <18 2>; 71 interrupts = <18 2>;
71 }; 72 };
72 73
73 l2-cache-controller@20000 { 74 L2: l2-cache-controller@20000 {
74 compatible = "fsl,8568-l2-cache-controller"; 75 compatible = "fsl,8568-l2-cache-controller";
75 reg = <0x20000 0x1000>; 76 reg = <0x20000 0x1000>;
76 cache-line-size = <32>; // 32 bytes 77 cache-line-size = <32>; // 32 bytes
@@ -106,6 +107,47 @@
106 dfsrr; 107 dfsrr;
107 }; 108 };
108 109
110 dma@21300 {
111 #address-cells = <1>;
112 #size-cells = <1>;
113 compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma";
114 reg = <0x21300 0x4>;
115 ranges = <0x0 0x21100 0x200>;
116 cell-index = <0>;
117 dma-channel@0 {
118 compatible = "fsl,mpc8568-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x0 0x80>;
121 cell-index = <0>;
122 interrupt-parent = <&mpic>;
123 interrupts = <20 2>;
124 };
125 dma-channel@80 {
126 compatible = "fsl,mpc8568-dma-channel",
127 "fsl,eloplus-dma-channel";
128 reg = <0x80 0x80>;
129 cell-index = <1>;
130 interrupt-parent = <&mpic>;
131 interrupts = <21 2>;
132 };
133 dma-channel@100 {
134 compatible = "fsl,mpc8568-dma-channel",
135 "fsl,eloplus-dma-channel";
136 reg = <0x100 0x80>;
137 cell-index = <2>;
138 interrupt-parent = <&mpic>;
139 interrupts = <22 2>;
140 };
141 dma-channel@180 {
142 compatible = "fsl,mpc8568-dma-channel",
143 "fsl,eloplus-dma-channel";
144 reg = <0x180 0x80>;
145 cell-index = <3>;
146 interrupt-parent = <&mpic>;
147 interrupts = <23 2>;
148 };
149 };
150
109 mdio@24520 { 151 mdio@24520 {
110 #address-cells = <1>; 152 #address-cells = <1>;
111 #size-cells = <0>; 153 #size-cells = <0>;
@@ -189,27 +231,23 @@
189 }; 231 };
190 232
191 crypto@30000 { 233 crypto@30000 {
192 device_type = "crypto"; 234 compatible = "fsl,sec2.1", "fsl,sec2.0";
193 model = "SEC2"; 235 reg = <0x30000 0x10000>;
194 compatible = "talitos";
195 reg = <0x30000 0xf000>;
196 interrupts = <45 2>; 236 interrupts = <45 2>;
197 interrupt-parent = <&mpic>; 237 interrupt-parent = <&mpic>;
198 num-channels = <4>; 238 fsl,num-channels = <4>;
199 channel-fifo-len = <24>; 239 fsl,channel-fifo-len = <24>;
200 exec-units-mask = <0xfe>; 240 fsl,exec-units-mask = <0xfe>;
201 descriptor-types-mask = <0x12b0ebf>; 241 fsl,descriptor-types-mask = <0x12b0ebf>;
202 }; 242 };
203 243
204 mpic: pic@40000 { 244 mpic: pic@40000 {
205 clock-frequency = <0>;
206 interrupt-controller; 245 interrupt-controller;
207 #address-cells = <0>; 246 #address-cells = <0>;
208 #interrupt-cells = <2>; 247 #interrupt-cells = <2>;
209 reg = <0x40000 0x40000>; 248 reg = <0x40000 0x40000>;
210 compatible = "chrp,open-pic"; 249 compatible = "chrp,open-pic";
211 device_type = "open-pic"; 250 device_type = "open-pic";
212 big-endian;
213 }; 251 };
214 252
215 par_io@e0100 { 253 par_io@e0100 {
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index 66f27ab613a2..08c61e3daecc 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -42,6 +42,7 @@
42 timebase-frequency = <0>; 42 timebase-frequency = <0>;
43 bus-frequency = <0>; 43 bus-frequency = <0>;
44 clock-frequency = <0>; 44 clock-frequency = <0>;
45 next-level-cache = <&L2>;
45 }; 46 };
46 47
47 PowerPC,8572@1 { 48 PowerPC,8572@1 {
@@ -54,6 +55,7 @@
54 timebase-frequency = <0>; 55 timebase-frequency = <0>;
55 bus-frequency = <0>; 56 bus-frequency = <0>;
56 clock-frequency = <0>; 57 clock-frequency = <0>;
58 next-level-cache = <&L2>;
57 }; 59 };
58 }; 60 };
59 61
@@ -84,7 +86,7 @@
84 interrupts = <18 2>; 86 interrupts = <18 2>;
85 }; 87 };
86 88
87 l2-cache-controller@20000 { 89 L2: l2-cache-controller@20000 {
88 compatible = "fsl,mpc8572-l2-cache-controller"; 90 compatible = "fsl,mpc8572-l2-cache-controller";
89 reg = <0x20000 0x1000>; 91 reg = <0x20000 0x1000>;
90 cache-line-size = <32>; // 32 bytes 92 cache-line-size = <32>; // 32 bytes
@@ -115,6 +117,88 @@
115 dfsrr; 117 dfsrr;
116 }; 118 };
117 119
120 dma@c300 {
121 #address-cells = <1>;
122 #size-cells = <1>;
123 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
124 reg = <0xc300 0x4>;
125 ranges = <0x0 0xc100 0x200>;
126 cell-index = <1>;
127 dma-channel@0 {
128 compatible = "fsl,mpc8572-dma-channel",
129 "fsl,eloplus-dma-channel";
130 reg = <0x0 0x80>;
131 cell-index = <0>;
132 interrupt-parent = <&mpic>;
133 interrupts = <76 2>;
134 };
135 dma-channel@80 {
136 compatible = "fsl,mpc8572-dma-channel",
137 "fsl,eloplus-dma-channel";
138 reg = <0x80 0x80>;
139 cell-index = <1>;
140 interrupt-parent = <&mpic>;
141 interrupts = <77 2>;
142 };
143 dma-channel@100 {
144 compatible = "fsl,mpc8572-dma-channel",
145 "fsl,eloplus-dma-channel";
146 reg = <0x100 0x80>;
147 cell-index = <2>;
148 interrupt-parent = <&mpic>;
149 interrupts = <78 2>;
150 };
151 dma-channel@180 {
152 compatible = "fsl,mpc8572-dma-channel",
153 "fsl,eloplus-dma-channel";
154 reg = <0x180 0x80>;
155 cell-index = <3>;
156 interrupt-parent = <&mpic>;
157 interrupts = <79 2>;
158 };
159 };
160
161 dma@21300 {
162 #address-cells = <1>;
163 #size-cells = <1>;
164 compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma";
165 reg = <0x21300 0x4>;
166 ranges = <0x0 0x21100 0x200>;
167 cell-index = <0>;
168 dma-channel@0 {
169 compatible = "fsl,mpc8572-dma-channel",
170 "fsl,eloplus-dma-channel";
171 reg = <0x0 0x80>;
172 cell-index = <0>;
173 interrupt-parent = <&mpic>;
174 interrupts = <20 2>;
175 };
176 dma-channel@80 {
177 compatible = "fsl,mpc8572-dma-channel",
178 "fsl,eloplus-dma-channel";
179 reg = <0x80 0x80>;
180 cell-index = <1>;
181 interrupt-parent = <&mpic>;
182 interrupts = <21 2>;
183 };
184 dma-channel@100 {
185 compatible = "fsl,mpc8572-dma-channel",
186 "fsl,eloplus-dma-channel";
187 reg = <0x100 0x80>;
188 cell-index = <2>;
189 interrupt-parent = <&mpic>;
190 interrupts = <22 2>;
191 };
192 dma-channel@180 {
193 compatible = "fsl,mpc8572-dma-channel",
194 "fsl,eloplus-dma-channel";
195 reg = <0x180 0x80>;
196 cell-index = <3>;
197 interrupt-parent = <&mpic>;
198 interrupts = <23 2>;
199 };
200 };
201
118 mdio@24520 { 202 mdio@24520 {
119 #address-cells = <1>; 203 #address-cells = <1>;
120 #size-cells = <0>; 204 #size-cells = <0>;
@@ -221,15 +305,41 @@
221 fsl,has-rstcr; 305 fsl,has-rstcr;
222 }; 306 };
223 307
308 msi@41600 {
309 compatible = "fsl,mpc8572-msi", "fsl,mpic-msi";
310 reg = <0x41600 0x80>;
311 msi-available-ranges = <0 0x100>;
312 interrupts = <
313 0xe0 0
314 0xe1 0
315 0xe2 0
316 0xe3 0
317 0xe4 0
318 0xe5 0
319 0xe6 0
320 0xe7 0>;
321 interrupt-parent = <&mpic>;
322 };
323
324 crypto@30000 {
325 compatible = "fsl,sec3.0", "fsl,sec2.4", "fsl,sec2.2",
326 "fsl,sec2.1", "fsl,sec2.0";
327 reg = <0x30000 0x10000>;
328 interrupts = <45 2 58 2>;
329 interrupt-parent = <&mpic>;
330 fsl,num-channels = <4>;
331 fsl,channel-fifo-len = <24>;
332 fsl,exec-units-mask = <0x9fe>;
333 fsl,descriptor-types-mask = <0x3ab0ebf>;
334 };
335
224 mpic: pic@40000 { 336 mpic: pic@40000 {
225 clock-frequency = <0>;
226 interrupt-controller; 337 interrupt-controller;
227 #address-cells = <0>; 338 #address-cells = <0>;
228 #interrupt-cells = <2>; 339 #interrupt-cells = <2>;
229 reg = <0x40000 0x40000>; 340 reg = <0x40000 0x40000>;
230 compatible = "chrp,open-pic"; 341 compatible = "chrp,open-pic";
231 device_type = "open-pic"; 342 device_type = "open-pic";
232 big-endian;
233 }; 343 };
234 }; 344 };
235 345
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index fa9b6bbeb5af..981941e5d7a5 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -172,14 +172,28 @@
172 }; 172 };
173 173
174 mpic: interrupt-controller@40000 { 174 mpic: interrupt-controller@40000 {
175 clock-frequency = <0>;
176 interrupt-controller; 175 interrupt-controller;
177 #address-cells = <0>; 176 #address-cells = <0>;
178 #interrupt-cells = <2>; 177 #interrupt-cells = <2>;
179 reg = <0x40000 0x40000>; 178 reg = <0x40000 0x40000>;
180 compatible = "chrp,open-pic"; 179 compatible = "chrp,open-pic";
181 device_type = "open-pic"; 180 device_type = "open-pic";
182 big-endian; 181 };
182
183 msi@41600 {
184 compatible = "fsl,mpc8610-msi", "fsl,mpic-msi";
185 reg = <0x41600 0x80>;
186 msi-available-ranges = <0 0x100>;
187 interrupts = <
188 0xe0 0
189 0xe1 0
190 0xe2 0
191 0xe3 0
192 0xe4 0
193 0xe5 0
194 0xe6 0
195 0xe7 0>;
196 interrupt-parent = <&mpic>;
183 }; 197 };
184 198
185 global-utilities@e0000 { 199 global-utilities@e0000 {
@@ -349,7 +363,7 @@
349 0xe000 0 0 4 &mpic 1 1 363 0xe000 0 0 4 &mpic 1 1
350 364
351 /* IDSEL 0x1f */ 365 /* IDSEL 0x1f */
352 0xf800 0 0 1 &mpic 3 0 366 0xf800 0 0 1 &mpic 3 2
353 0xf800 0 0 2 &mpic 0 1 367 0xf800 0 0 2 &mpic 0 1
354 >; 368 >;
355 369
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
index 1e4bfe9cadb9..ae08761ffff1 100644
--- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts
+++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts
@@ -134,6 +134,47 @@
134 dfsrr; 134 dfsrr;
135 }; 135 };
136 136
137 dma@21300 {
138 #address-cells = <1>;
139 #size-cells = <1>;
140 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
141 reg = <0x21300 0x4>;
142 ranges = <0x0 0x21100 0x200>;
143 cell-index = <0>;
144 dma-channel@0 {
145 compatible = "fsl,mpc8641-dma-channel",
146 "fsl,eloplus-dma-channel";
147 reg = <0x0 0x80>;
148 cell-index = <0>;
149 interrupt-parent = <&mpic>;
150 interrupts = <20 2>;
151 };
152 dma-channel@80 {
153 compatible = "fsl,mpc8641-dma-channel",
154 "fsl,eloplus-dma-channel";
155 reg = <0x80 0x80>;
156 cell-index = <1>;
157 interrupt-parent = <&mpic>;
158 interrupts = <21 2>;
159 };
160 dma-channel@100 {
161 compatible = "fsl,mpc8641-dma-channel",
162 "fsl,eloplus-dma-channel";
163 reg = <0x100 0x80>;
164 cell-index = <2>;
165 interrupt-parent = <&mpic>;
166 interrupts = <22 2>;
167 };
168 dma-channel@180 {
169 compatible = "fsl,mpc8641-dma-channel",
170 "fsl,eloplus-dma-channel";
171 reg = <0x180 0x80>;
172 cell-index = <3>;
173 interrupt-parent = <&mpic>;
174 interrupts = <23 2>;
175 };
176 };
177
137 mdio@24520 { 178 mdio@24520 {
138 #address-cells = <1>; 179 #address-cells = <1>;
139 #size-cells = <0>; 180 #size-cells = <0>;
@@ -239,14 +280,12 @@
239 }; 280 };
240 281
241 mpic: pic@40000 { 282 mpic: pic@40000 {
242 clock-frequency = <0>;
243 interrupt-controller; 283 interrupt-controller;
244 #address-cells = <0>; 284 #address-cells = <0>;
245 #interrupt-cells = <2>; 285 #interrupt-cells = <2>;
246 reg = <0x40000 0x40000>; 286 reg = <0x40000 0x40000>;
247 compatible = "chrp,open-pic"; 287 compatible = "chrp,open-pic";
248 device_type = "open-pic"; 288 device_type = "open-pic";
249 big-endian;
250 }; 289 };
251 290
252 global-utilities@e0000 { 291 global-utilities@e0000 {
diff --git a/arch/powerpc/boot/dts/mpc866ads.dts b/arch/powerpc/boot/dts/mpc866ads.dts
index 765e43c997da..bd700651f360 100644
--- a/arch/powerpc/boot/dts/mpc866ads.dts
+++ b/arch/powerpc/boot/dts/mpc866ads.dts
@@ -171,6 +171,17 @@
171 fsl,cpm-command = <0000>; 171 fsl,cpm-command = <0000>;
172 linux,network-index = <1>; 172 linux,network-index = <1>;
173 }; 173 };
174
175 i2c@860 {
176 compatible = "fsl,mpc866-i2c",
177 "fsl,cpm1-i2c";
178 reg = <0x860 0x20 0x3c80 0x30>;
179 interrupts = <16>;
180 interrupt-parent = <&CPM_PIC>;
181 fsl,cpm-command = <0x10>;
182 #address-cells = <1>;
183 #size-cells = <0>;
184 };
174 }; 185 };
175 }; 186 };
176 187
diff --git a/arch/powerpc/boot/dts/mpc885ads.dts b/arch/powerpc/boot/dts/mpc885ads.dts
index 9895043722b9..b123e9f7a5a8 100644
--- a/arch/powerpc/boot/dts/mpc885ads.dts
+++ b/arch/powerpc/boot/dts/mpc885ads.dts
@@ -215,6 +215,17 @@
215 fsl,cpm-command = <0x80>; 215 fsl,cpm-command = <0x80>;
216 linux,network-index = <2>; 216 linux,network-index = <2>;
217 }; 217 };
218
219 i2c@860 {
220 compatible = "fsl,mpc885-i2c",
221 "fsl,cpm1-i2c";
222 reg = <0x860 0x20 0x3c80 0x30>;
223 interrupts = <16>;
224 interrupt-parent = <&CPM_PIC>;
225 fsl,cpm-command = <0x10>;
226 #address-cells = <1>;
227 #size-cells = <0>;
228 };
218 }; 229 };
219 }; 230 };
220 231
diff --git a/arch/powerpc/boot/dts/ps3.dts b/arch/powerpc/boot/dts/ps3.dts
index 379ded282d5e..96ba5b512afe 100644
--- a/arch/powerpc/boot/dts/ps3.dts
+++ b/arch/powerpc/boot/dts/ps3.dts
@@ -18,6 +18,8 @@
18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA 18 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
19 */ 19 */
20 20
21/dts-v1/;
22
21/ { 23/ {
22 model = "SonyPS3"; 24 model = "SonyPS3";
23 compatible = "sony,ps3"; 25 compatible = "sony,ps3";
@@ -34,7 +36,7 @@
34 36
35 memory { 37 memory {
36 device_type = "memory"; 38 device_type = "memory";
37 reg = <0 0 0 0>; 39 reg = <0x00000000 0x00000000 0x00000000 0x00000000>;
38 }; 40 };
39 41
40 /* 42 /*
@@ -55,14 +57,14 @@
55 57
56 cpu@0 { 58 cpu@0 {
57 device_type = "cpu"; 59 device_type = "cpu";
58 reg = <0>; 60 reg = <0x00000000>;
59 ibm,ppc-interrupt-server#s = <0 1>; 61 ibm,ppc-interrupt-server#s = <0x0 0x1>;
60 clock-frequency = <0>; 62 clock-frequency = <0>;
61 timebase-frequency = <0>; 63 timebase-frequency = <0>;
62 i-cache-size = <8000>; 64 i-cache-size = <32768>;
63 d-cache-size = <8000>; 65 d-cache-size = <32768>;
64 i-cache-line-size = <80>; 66 i-cache-line-size = <128>;
65 d-cache-line-size = <80>; 67 d-cache-line-size = <128>;
66 }; 68 };
67 }; 69 };
68}; 70};
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts
index 6a8fa7089ea2..9684c80e4093 100644
--- a/arch/powerpc/boot/dts/rainier.dts
+++ b/arch/powerpc/boot/dts/rainier.dts
@@ -12,12 +12,14 @@
12 * 12 *
13 */ 13 */
14 14
15/dts-v1/;
16
15/ { 17/ {
16 #address-cells = <2>; 18 #address-cells = <2>;
17 #size-cells = <1>; 19 #size-cells = <1>;
18 model = "amcc,rainier"; 20 model = "amcc,rainier";
19 compatible = "amcc,rainier"; 21 compatible = "amcc,rainier";
20 dcr-parent = <&/cpus/cpu@0>; 22 dcr-parent = <&{/cpus/cpu@0}>;
21 23
22 aliases { 24 aliases {
23 ethernet0 = &EMAC0; 25 ethernet0 = &EMAC0;
@@ -35,13 +37,13 @@
35 cpu@0 { 37 cpu@0 {
36 device_type = "cpu"; 38 device_type = "cpu";
37 model = "PowerPC,440GRx"; 39 model = "PowerPC,440GRx";
38 reg = <0>; 40 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */ 41 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */ 42 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>; 43 i-cache-line-size = <32>;
42 d-cache-line-size = <20>; 44 d-cache-line-size = <32>;
43 i-cache-size = <8000>; 45 i-cache-size = <32768>;
44 d-cache-size = <8000>; 46 d-cache-size = <32768>;
45 dcr-controller; 47 dcr-controller;
46 dcr-access-method = "native"; 48 dcr-access-method = "native";
47 }; 49 };
@@ -49,14 +51,14 @@
49 51
50 memory { 52 memory {
51 device_type = "memory"; 53 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */ 54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
53 }; 55 };
54 56
55 UIC0: interrupt-controller0 { 57 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440grx","ibm,uic"; 58 compatible = "ibm,uic-440grx","ibm,uic";
57 interrupt-controller; 59 interrupt-controller;
58 cell-index = <0>; 60 cell-index = <0>;
59 dcr-reg = <0c0 009>; 61 dcr-reg = <0x0c0 0x009>;
60 #address-cells = <0>; 62 #address-cells = <0>;
61 #size-cells = <0>; 63 #size-cells = <0>;
62 #interrupt-cells = <2>; 64 #interrupt-cells = <2>;
@@ -66,11 +68,11 @@
66 compatible = "ibm,uic-440grx","ibm,uic"; 68 compatible = "ibm,uic-440grx","ibm,uic";
67 interrupt-controller; 69 interrupt-controller;
68 cell-index = <1>; 70 cell-index = <1>;
69 dcr-reg = <0d0 009>; 71 dcr-reg = <0x0d0 0x009>;
70 #address-cells = <0>; 72 #address-cells = <0>;
71 #size-cells = <0>; 73 #size-cells = <0>;
72 #interrupt-cells = <2>; 74 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */ 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>; 76 interrupt-parent = <&UIC0>;
75 }; 77 };
76 78
@@ -78,22 +80,22 @@
78 compatible = "ibm,uic-440grx","ibm,uic"; 80 compatible = "ibm,uic-440grx","ibm,uic";
79 interrupt-controller; 81 interrupt-controller;
80 cell-index = <2>; 82 cell-index = <2>;
81 dcr-reg = <0e0 009>; 83 dcr-reg = <0x0e0 0x009>;
82 #address-cells = <0>; 84 #address-cells = <0>;
83 #size-cells = <0>; 85 #size-cells = <0>;
84 #interrupt-cells = <2>; 86 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */ 87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
86 interrupt-parent = <&UIC0>; 88 interrupt-parent = <&UIC0>;
87 }; 89 };
88 90
89 SDR0: sdr { 91 SDR0: sdr {
90 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; 92 compatible = "ibm,sdr-440grx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>; 93 dcr-reg = <0x00e 0x002>;
92 }; 94 };
93 95
94 CPR0: cpr { 96 CPR0: cpr {
95 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; 97 compatible = "ibm,cpr-440grx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>; 98 dcr-reg = <0x00c 0x002>;
97 }; 99 };
98 100
99 plb { 101 plb {
@@ -105,80 +107,80 @@
105 107
106 SDRAM0: sdram { 108 SDRAM0: sdram {
107 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; 109 compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>; 110 dcr-reg = <0x010 0x002>;
109 }; 111 };
110 112
111 DMA0: dma { 113 DMA0: dma {
112 compatible = "ibm,dma-440grx", "ibm,dma-4xx"; 114 compatible = "ibm,dma-440grx", "ibm,dma-4xx";
113 dcr-reg = <100 027>; 115 dcr-reg = <0x100 0x027>;
114 }; 116 };
115 117
116 MAL0: mcmal { 118 MAL0: mcmal {
117 compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; 119 compatible = "ibm,mcmal-440grx", "ibm,mcmal2";
118 dcr-reg = <180 62>; 120 dcr-reg = <0x180 0x062>;
119 num-tx-chans = <2>; 121 num-tx-chans = <2>;
120 num-rx-chans = <2>; 122 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>; 123 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>; 124 interrupts = <0x0 0x1 0x2 0x3 0x4>;
123 #interrupt-cells = <1>; 125 #interrupt-cells = <1>;
124 #address-cells = <0>; 126 #address-cells = <0>;
125 #size-cells = <0>; 127 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
127 /*RXEOB*/ 1 &UIC0 b 4 129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
128 /*SERR*/ 2 &UIC1 0 4 130 /*SERR*/ 0x2 &UIC1 0x0 0x4
129 /*TXDE*/ 3 &UIC1 1 4 131 /*TXDE*/ 0x3 &UIC1 0x1 0x4
130 /*RXDE*/ 4 &UIC1 2 4>; 132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
131 interrupt-map-mask = <ffffffff>; 133 interrupt-map-mask = <0xffffffff>;
132 }; 134 };
133 135
134 POB0: opb { 136 POB0: opb {
135 compatible = "ibm,opb-440grx", "ibm,opb"; 137 compatible = "ibm,opb-440grx", "ibm,opb";
136 #address-cells = <1>; 138 #address-cells = <1>;
137 #size-cells = <1>; 139 #size-cells = <1>;
138 ranges = <00000000 1 00000000 80000000 140 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
139 80000000 1 80000000 80000000>; 141 0x80000000 0x00000001 0x80000000 0x80000000>;
140 interrupt-parent = <&UIC1>; 142 interrupt-parent = <&UIC1>;
141 interrupts = <7 4>; 143 interrupts = <0x7 0x4>;
142 clock-frequency = <0>; /* Filled in by zImage */ 144 clock-frequency = <0>; /* Filled in by zImage */
143 145
144 EBC0: ebc { 146 EBC0: ebc {
145 compatible = "ibm,ebc-440grx", "ibm,ebc"; 147 compatible = "ibm,ebc-440grx", "ibm,ebc";
146 dcr-reg = <012 2>; 148 dcr-reg = <0x012 0x002>;
147 #address-cells = <2>; 149 #address-cells = <2>;
148 #size-cells = <1>; 150 #size-cells = <1>;
149 clock-frequency = <0>; /* Filled in by zImage */ 151 clock-frequency = <0>; /* Filled in by zImage */
150 interrupts = <5 1>; 152 interrupts = <0x5 0x1>;
151 interrupt-parent = <&UIC1>; 153 interrupt-parent = <&UIC1>;
152 154
153 nor_flash@0,0 { 155 nor_flash@0,0 {
154 compatible = "amd,s29gl256n", "cfi-flash"; 156 compatible = "amd,s29gl256n", "cfi-flash";
155 bank-width = <2>; 157 bank-width = <2>;
156 reg = <0 000000 4000000>; 158 reg = <0x00000000 0x00000000 0x04000000>;
157 #address-cells = <1>; 159 #address-cells = <1>;
158 #size-cells = <1>; 160 #size-cells = <1>;
159 partition@0 { 161 partition@0 {
160 label = "Kernel"; 162 label = "Kernel";
161 reg = <0 180000>; 163 reg = <0x00000000 0x00180000>;
162 }; 164 };
163 partition@180000 { 165 partition@180000 {
164 label = "ramdisk"; 166 label = "ramdisk";
165 reg = <180000 200000>; 167 reg = <0x00180000 0x00200000>;
166 }; 168 };
167 partition@380000 { 169 partition@380000 {
168 label = "file system"; 170 label = "file system";
169 reg = <380000 3aa0000>; 171 reg = <0x00380000 0x03aa0000>;
170 }; 172 };
171 partition@3e20000 { 173 partition@3e20000 {
172 label = "kozio"; 174 label = "kozio";
173 reg = <3e20000 140000>; 175 reg = <0x03e20000 0x00140000>;
174 }; 176 };
175 partition@3f60000 { 177 partition@3f60000 {
176 label = "env"; 178 label = "env";
177 reg = <3f60000 40000>; 179 reg = <0x03f60000 0x00040000>;
178 }; 180 };
179 partition@3fa0000 { 181 partition@3fa0000 {
180 label = "u-boot"; 182 label = "u-boot";
181 reg = <3fa0000 60000>; 183 reg = <0x03fa0000 0x00060000>;
182 }; 184 };
183 }; 185 };
184 186
@@ -187,69 +189,69 @@
187 UART0: serial@ef600300 { 189 UART0: serial@ef600300 {
188 device_type = "serial"; 190 device_type = "serial";
189 compatible = "ns16550"; 191 compatible = "ns16550";
190 reg = <ef600300 8>; 192 reg = <0xef600300 0x00000008>;
191 virtual-reg = <ef600300>; 193 virtual-reg = <0xef600300>;
192 clock-frequency = <0>; /* Filled in by zImage */ 194 clock-frequency = <0>; /* Filled in by zImage */
193 current-speed = <1c200>; 195 current-speed = <115200>;
194 interrupt-parent = <&UIC0>; 196 interrupt-parent = <&UIC0>;
195 interrupts = <0 4>; 197 interrupts = <0x0 0x4>;
196 }; 198 };
197 199
198 UART1: serial@ef600400 { 200 UART1: serial@ef600400 {
199 device_type = "serial"; 201 device_type = "serial";
200 compatible = "ns16550"; 202 compatible = "ns16550";
201 reg = <ef600400 8>; 203 reg = <0xef600400 0x00000008>;
202 virtual-reg = <ef600400>; 204 virtual-reg = <0xef600400>;
203 clock-frequency = <0>; 205 clock-frequency = <0>;
204 current-speed = <0>; 206 current-speed = <0>;
205 interrupt-parent = <&UIC0>; 207 interrupt-parent = <&UIC0>;
206 interrupts = <1 4>; 208 interrupts = <0x1 0x4>;
207 }; 209 };
208 210
209 UART2: serial@ef600500 { 211 UART2: serial@ef600500 {
210 device_type = "serial"; 212 device_type = "serial";
211 compatible = "ns16550"; 213 compatible = "ns16550";
212 reg = <ef600500 8>; 214 reg = <0xef600500 0x00000008>;
213 virtual-reg = <ef600500>; 215 virtual-reg = <0xef600500>;
214 clock-frequency = <0>; 216 clock-frequency = <0>;
215 current-speed = <0>; 217 current-speed = <0>;
216 interrupt-parent = <&UIC1>; 218 interrupt-parent = <&UIC1>;
217 interrupts = <3 4>; 219 interrupts = <0x3 0x4>;
218 }; 220 };
219 221
220 UART3: serial@ef600600 { 222 UART3: serial@ef600600 {
221 device_type = "serial"; 223 device_type = "serial";
222 compatible = "ns16550"; 224 compatible = "ns16550";
223 reg = <ef600600 8>; 225 reg = <0xef600600 0x00000008>;
224 virtual-reg = <ef600600>; 226 virtual-reg = <0xef600600>;
225 clock-frequency = <0>; 227 clock-frequency = <0>;
226 current-speed = <0>; 228 current-speed = <0>;
227 interrupt-parent = <&UIC1>; 229 interrupt-parent = <&UIC1>;
228 interrupts = <4 4>; 230 interrupts = <0x4 0x4>;
229 }; 231 };
230 232
231 IIC0: i2c@ef600700 { 233 IIC0: i2c@ef600700 {
232 compatible = "ibm,iic-440grx", "ibm,iic"; 234 compatible = "ibm,iic-440grx", "ibm,iic";
233 reg = <ef600700 14>; 235 reg = <0xef600700 0x00000014>;
234 interrupt-parent = <&UIC0>; 236 interrupt-parent = <&UIC0>;
235 interrupts = <2 4>; 237 interrupts = <0x2 0x4>;
236 }; 238 };
237 239
238 IIC1: i2c@ef600800 { 240 IIC1: i2c@ef600800 {
239 compatible = "ibm,iic-440grx", "ibm,iic"; 241 compatible = "ibm,iic-440grx", "ibm,iic";
240 reg = <ef600800 14>; 242 reg = <0xef600800 0x00000014>;
241 interrupt-parent = <&UIC0>; 243 interrupt-parent = <&UIC0>;
242 interrupts = <7 4>; 244 interrupts = <0x7 0x4>;
243 }; 245 };
244 246
245 ZMII0: emac-zmii@ef600d00 { 247 ZMII0: emac-zmii@ef600d00 {
246 compatible = "ibm,zmii-440grx", "ibm,zmii"; 248 compatible = "ibm,zmii-440grx", "ibm,zmii";
247 reg = <ef600d00 c>; 249 reg = <0xef600d00 0x0000000c>;
248 }; 250 };
249 251
250 RGMII0: emac-rgmii@ef601000 { 252 RGMII0: emac-rgmii@ef601000 {
251 compatible = "ibm,rgmii-440grx", "ibm,rgmii"; 253 compatible = "ibm,rgmii-440grx", "ibm,rgmii";
252 reg = <ef601000 8>; 254 reg = <0xef601000 0x00000008>;
253 has-mdio; 255 has-mdio;
254 }; 256 };
255 257
@@ -257,23 +259,23 @@
257 device_type = "network"; 259 device_type = "network";
258 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; 260 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
259 interrupt-parent = <&EMAC0>; 261 interrupt-parent = <&EMAC0>;
260 interrupts = <0 1>; 262 interrupts = <0x0 0x1>;
261 #interrupt-cells = <1>; 263 #interrupt-cells = <1>;
262 #address-cells = <0>; 264 #address-cells = <0>;
263 #size-cells = <0>; 265 #size-cells = <0>;
264 interrupt-map = </*Status*/ 0 &UIC0 18 4 266 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
265 /*Wake*/ 1 &UIC1 1d 4>; 267 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
266 reg = <ef600e00 70>; 268 reg = <0xef600e00 0x00000074>;
267 local-mac-address = [000000000000]; 269 local-mac-address = [000000000000];
268 mal-device = <&MAL0>; 270 mal-device = <&MAL0>;
269 mal-tx-channel = <0>; 271 mal-tx-channel = <0>;
270 mal-rx-channel = <0>; 272 mal-rx-channel = <0>;
271 cell-index = <0>; 273 cell-index = <0>;
272 max-frame-size = <2328>; 274 max-frame-size = <9000>;
273 rx-fifo-size = <1000>; 275 rx-fifo-size = <4096>;
274 tx-fifo-size = <800>; 276 tx-fifo-size = <2048>;
275 phy-mode = "rgmii"; 277 phy-mode = "rgmii";
276 phy-map = <00000000>; 278 phy-map = <0x00000000>;
277 zmii-device = <&ZMII0>; 279 zmii-device = <&ZMII0>;
278 zmii-channel = <0>; 280 zmii-channel = <0>;
279 rgmii-device = <&RGMII0>; 281 rgmii-device = <&RGMII0>;
@@ -286,23 +288,23 @@
286 device_type = "network"; 288 device_type = "network";
287 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; 289 compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4";
288 interrupt-parent = <&EMAC1>; 290 interrupt-parent = <&EMAC1>;
289 interrupts = <0 1>; 291 interrupts = <0x0 0x1>;
290 #interrupt-cells = <1>; 292 #interrupt-cells = <1>;
291 #address-cells = <0>; 293 #address-cells = <0>;
292 #size-cells = <0>; 294 #size-cells = <0>;
293 interrupt-map = </*Status*/ 0 &UIC0 19 4 295 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
294 /*Wake*/ 1 &UIC1 1f 4>; 296 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
295 reg = <ef600f00 70>; 297 reg = <0xef600f00 0x00000074>;
296 local-mac-address = [000000000000]; 298 local-mac-address = [000000000000];
297 mal-device = <&MAL0>; 299 mal-device = <&MAL0>;
298 mal-tx-channel = <1>; 300 mal-tx-channel = <1>;
299 mal-rx-channel = <1>; 301 mal-rx-channel = <1>;
300 cell-index = <1>; 302 cell-index = <1>;
301 max-frame-size = <2328>; 303 max-frame-size = <9000>;
302 rx-fifo-size = <1000>; 304 rx-fifo-size = <4096>;
303 tx-fifo-size = <800>; 305 tx-fifo-size = <2048>;
304 phy-mode = "rgmii"; 306 phy-mode = "rgmii";
305 phy-map = <00000000>; 307 phy-map = <0x00000000>;
306 zmii-device = <&ZMII0>; 308 zmii-device = <&ZMII0>;
307 zmii-channel = <1>; 309 zmii-channel = <1>;
308 rgmii-device = <&RGMII0>; 310 rgmii-device = <&RGMII0>;
@@ -319,24 +321,25 @@
319 #address-cells = <3>; 321 #address-cells = <3>;
320 compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; 322 compatible = "ibm,plb440grx-pci", "ibm,plb-pci";
321 primary; 323 primary;
322 reg = <1 eec00000 8 /* Config space access */ 324 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
323 1 eed00000 4 /* IACK */ 325 0x00000001 0xeed00000 0x00000004 /* IACK */
324 1 eed00000 4 /* Special cycle */ 326 0x00000001 0xeed00000 0x00000004 /* Special cycle */
325 1 ef400000 40>; /* Internal registers */ 327 0x00000001 0xef400000 0x00000040>; /* Internal registers */
326 328
327 /* Outbound ranges, one memory and one IO, 329 /* Outbound ranges, one memory and one IO,
328 * later cannot be changed. Chip supports a second 330 * later cannot be changed. Chip supports a second
329 * IO range but we don't use it for now 331 * IO range but we don't use it for now
330 */ 332 */
331 ranges = <02000000 0 80000000 1 80000000 0 10000000 333 ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000
332 01000000 0 00000000 1 e8000000 0 00100000>; 334 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000
335 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>;
333 336
334 /* Inbound 2GB range starting at 0 */ 337 /* Inbound 2GB range starting at 0 */
335 dma-ranges = <42000000 0 0 0 0 0 80000000>; 338 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
336 339
337 /* All PCI interrupts are routed to IRQ 67 */ 340 /* All PCI interrupts are routed to IRQ 67 */
338 interrupt-map-mask = <0000 0 0 0>; 341 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
339 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; 342 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
340 }; 343 };
341 }; 344 };
342 345
diff --git a/arch/powerpc/boot/dts/sam440ep.dts b/arch/powerpc/boot/dts/sam440ep.dts
new file mode 100644
index 000000000000..f0663be10421
--- /dev/null
+++ b/arch/powerpc/boot/dts/sam440ep.dts
@@ -0,0 +1,293 @@
1/*
2 * Device Tree Source for ACube Sam440ep based off bamboo.dts code
3 * original copyrights below
4 *
5 * Copyright (c) 2006, 2007 IBM Corp.
6 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
7 *
8 * Modified from bamboo.dts for sam440ep:
9 * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
10 *
11 * This file is licensed under the terms of the GNU General Public
12 * License version 2. This program is licensed "as is" without
13 * any warranty of any kind, whether express or implied.
14 */
15
16/dts-v1/;
17
18/ {
19 #address-cells = <2>;
20 #size-cells = <1>;
21 model = "acube,sam440ep";
22 compatible = "acube,sam440ep";
23
24 aliases {
25 ethernet0 = &EMAC0;
26 ethernet1 = &EMAC1;
27 serial0 = &UART0;
28 serial1 = &UART1;
29 serial2 = &UART2;
30 serial3 = &UART3;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 cpu@0 {
38 device_type = "cpu";
39 model = "PowerPC,440EP";
40 reg = <0>;
41 clock-frequency = <0>; /* Filled in by zImage */
42 timebase-frequency = <0>; /* Filled in by zImage */
43 i-cache-line-size = <32>;
44 d-cache-line-size = <32>;
45 i-cache-size = <32768>;
46 d-cache-size = <32768>;
47 dcr-controller;
48 dcr-access-method = "native";
49 };
50 };
51
52 memory {
53 device_type = "memory";
54 reg = <0 0 0>; /* Filled in by zImage */
55 };
56
57 UIC0: interrupt-controller0 {
58 compatible = "ibm,uic-440ep","ibm,uic";
59 interrupt-controller;
60 cell-index = <0>;
61 dcr-reg = <0x0c0 9>;
62 #address-cells = <0>;
63 #size-cells = <0>;
64 #interrupt-cells = <2>;
65 };
66
67 UIC1: interrupt-controller1 {
68 compatible = "ibm,uic-440ep","ibm,uic";
69 interrupt-controller;
70 cell-index = <1>;
71 dcr-reg = <0x0d0 9>;
72 #address-cells = <0>;
73 #size-cells = <0>;
74 #interrupt-cells = <2>;
75 interrupts = <0x1e 4 0x1f 4>; /* cascade */
76 interrupt-parent = <&UIC0>;
77 };
78
79 SDR0: sdr {
80 compatible = "ibm,sdr-440ep";
81 dcr-reg = <0x00e 2>;
82 };
83
84 CPR0: cpr {
85 compatible = "ibm,cpr-440ep";
86 dcr-reg = <0x00c 2>;
87 };
88
89 plb {
90 compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4";
91 #address-cells = <2>;
92 #size-cells = <1>;
93 ranges;
94 clock-frequency = <0>; /* Filled in by zImage */
95
96 SDRAM0: sdram {
97 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
98 dcr-reg = <0x010 2>;
99 };
100
101 DMA0: dma {
102 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
103 dcr-reg = <0x100 0x027>;
104 };
105
106 MAL0: mcmal {
107 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
108 dcr-reg = <0x180 0x062>;
109 num-tx-chans = <4>;
110 num-rx-chans = <2>;
111 interrupt-parent = <&MAL0>;
112 interrupts = <0 1 2 3 4>;
113 #interrupt-cells = <1>;
114 #address-cells = <0>;
115 #size-cells = <0>;
116 interrupt-map = </*TXEOB*/ 0 &UIC0 10 4
117 /*RXEOB*/ 1 &UIC0 11 4
118 /*SERR*/ 2 &UIC1 0 4
119 /*TXDE*/ 3 &UIC1 1 4
120 /*RXDE*/ 4 &UIC1 2 4>;
121 };
122
123 POB0: opb {
124 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
125 #address-cells = <1>;
126 #size-cells = <1>;
127 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
128 * bits.
129 */
130 ranges = <0x00000000 0 0x00000000 0x80000000
131 0x80000000 0 0x80000000 0x80000000>;
132 interrupt-parent = <&UIC1>;
133 interrupts = <7 4>;
134 clock-frequency = <0>; /* Filled in by zImage */
135
136 EBC0: ebc {
137 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
138 dcr-reg = <0x012 2>;
139 #address-cells = <2>;
140 #size-cells = <1>;
141 clock-frequency = <0>; /* Filled in by zImage */
142 interrupts = <5 1>;
143 interrupt-parent = <&UIC1>;
144 };
145
146 UART0: serial@ef600300 {
147 device_type = "serial";
148 compatible = "ns16550";
149 reg = <0xef600300 8>;
150 virtual-reg = <0xef600300>;
151 clock-frequency = <0>; /* Filled in by zImage */
152 current-speed = <0x1c200>;
153 interrupt-parent = <&UIC0>;
154 interrupts = <0 4>;
155 };
156
157 UART1: serial@ef600400 {
158 device_type = "serial";
159 compatible = "ns16550";
160 reg = <0xef600400 8>;
161 virtual-reg = <0xef600400>;
162 clock-frequency = <0>;
163 current-speed = <0>;
164 interrupt-parent = <&UIC0>;
165 interrupts = <1 4>;
166 };
167
168 UART2: serial@ef600500 {
169 device_type = "serial";
170 compatible = "ns16550";
171 reg = <0xef600500 8>;
172 virtual-reg = <0xef600500>;
173 clock-frequency = <0>;
174 current-speed = <0>;
175 interrupt-parent = <&UIC0>;
176 interrupts = <3 4>;
177 };
178
179 UART3: serial@ef600600 {
180 device_type = "serial";
181 compatible = "ns16550";
182 reg = <0xef600600 8>;
183 virtual-reg = <0xef600600>;
184 clock-frequency = <0>;
185 current-speed = <0>;
186 interrupt-parent = <&UIC0>;
187 interrupts = <4 4>;
188 };
189
190 IIC0: i2c@ef600700 {
191 #address-cells = <1>;
192 #size-cells = <0>;
193 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
194 index = <0>;
195 reg = <0xef600700 0x14>;
196 interrupt-parent = <&UIC0>;
197 interrupts = <2 4>;
198 rtc@68 {
199 compatible = "stm,m41t80";
200 reg = <0x68>;
201 };
202 };
203
204 IIC1: i2c@ef600800 {
205 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
206 index = <5>;
207 reg = <0xef600800 0x14>;
208 interrupt-parent = <&UIC0>;
209 interrupts = <7 4>;
210 };
211
212 ZMII0: emac-zmii@ef600d00 {
213 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
214 reg = <0xef600d00 0xc>;
215 };
216
217 EMAC0: ethernet@ef600e00 {
218 linux,network-index = <0>;
219 device_type = "network";
220 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
221 interrupt-parent = <&UIC1>;
222 interrupts = <0x1c 4 0x1d 4>;
223 reg = <0xef600e00 0x70>;
224 local-mac-address = [000000000000];
225 mal-device = <&MAL0>;
226 mal-tx-channel = <0 1>;
227 mal-rx-channel = <0>;
228 cell-index = <0>;
229 max-frame-size = <0x5dc>;
230 rx-fifo-size = <0x1000>;
231 tx-fifo-size = <0x800>;
232 phy-mode = "rmii";
233 phy-map = <00000000>;
234 zmii-device = <&ZMII0>;
235 zmii-channel = <0>;
236 };
237
238 EMAC1: ethernet@ef600f00 {
239 linux,network-index = <1>;
240 device_type = "network";
241 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
242 interrupt-parent = <&UIC1>;
243 interrupts = <0x1e 4 0x1f 4>;
244 reg = <0xef600f00 0x70>;
245 local-mac-address = [000000000000];
246 mal-device = <&MAL0>;
247 mal-tx-channel = <2 3>;
248 mal-rx-channel = <1>;
249 cell-index = <1>;
250 max-frame-size = <0x5dc>;
251 rx-fifo-size = <0x1000>;
252 tx-fifo-size = <0x800>;
253 phy-mode = "rmii";
254 phy-map = <00000000>;
255 zmii-device = <&ZMII0>;
256 zmii-channel = <1>;
257 };
258 usb@ef601000 {
259 compatible = "ohci-be";
260 reg = <0xef601000 0x80>;
261 interrupts = <8 4 9 4>;
262 interrupt-parent = <&UIC1>;
263 };
264 };
265
266 PCI0: pci@ec000000 {
267 device_type = "pci";
268 #interrupt-cells = <1>;
269 #size-cells = <2>;
270 #address-cells = <3>;
271 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
272 primary;
273 reg = <0 0xeec00000 8 /* Config space access */
274 0 0xeed00000 4 /* IACK */
275 0 0xeed00000 4 /* Special cycle */
276 0 0xef400000 0x40>; /* Internal registers */
277
278 /* Outbound ranges, one memory and one IO,
279 * later cannot be changed. Chip supports a second
280 * IO range but we don't use it for now
281 */
282 ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000
283 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>;
284
285 /* Inbound 2GB range starting at 0 */
286 dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>;
287 };
288 };
289
290 chosen {
291 linux,stdout-path = "/plb/opb/serial@ef600300";
292 };
293};
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts
index 3839d4b7d6a7..45f789b56709 100644
--- a/arch/powerpc/boot/dts/sbc8349.dts
+++ b/arch/powerpc/boot/dts/sbc8349.dts
@@ -95,6 +95,41 @@
95 mode = "cpu"; 95 mode = "cpu";
96 }; 96 };
97 97
98 dma@82a8 {
99 #address-cells = <1>;
100 #size-cells = <1>;
101 compatible = "fsl,mpc8349-dma", "fsl,elo-dma";
102 reg = <0x82a8 4>;
103 ranges = <0 0x8100 0x1a8>;
104 interrupt-parent = <&ipic>;
105 interrupts = <71 8>;
106 cell-index = <0>;
107 dma-channel@0 {
108 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
109 reg = <0 0x80>;
110 interrupt-parent = <&ipic>;
111 interrupts = <71 8>;
112 };
113 dma-channel@80 {
114 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
115 reg = <0x80 0x80>;
116 interrupt-parent = <&ipic>;
117 interrupts = <71 8>;
118 };
119 dma-channel@100 {
120 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
121 reg = <0x100 0x80>;
122 interrupt-parent = <&ipic>;
123 interrupts = <71 8>;
124 };
125 dma-channel@180 {
126 compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel";
127 reg = <0x180 0x28>;
128 interrupt-parent = <&ipic>;
129 interrupts = <71 8>;
130 };
131 };
132
98 /* phy type (ULPI or SERIAL) are only types supported for MPH */ 133 /* phy type (ULPI or SERIAL) are only types supported for MPH */
99 /* port = 0 or 1 */ 134 /* port = 0 or 1 */
100 usb@22000 { 135 usb@22000 {
@@ -186,19 +221,15 @@
186 interrupt-parent = <&ipic>; 221 interrupt-parent = <&ipic>;
187 }; 222 };
188 223
189 /* May need to remove if on a part without crypto engine */
190 crypto@30000 { 224 crypto@30000 {
191 model = "SEC2"; 225 compatible = "fsl,sec2.0";
192 compatible = "talitos";
193 reg = <0x30000 0x10000>; 226 reg = <0x30000 0x10000>;
194 interrupts = <11 0x8>; 227 interrupts = <11 0x8>;
195 interrupt-parent = <&ipic>; 228 interrupt-parent = <&ipic>;
196 num-channels = <4>; 229 fsl,num-channels = <4>;
197 channel-fifo-len = <24>; 230 fsl,channel-fifo-len = <24>;
198 exec-units-mask = <0x0000007e>; 231 fsl,exec-units-mask = <0x7e>;
199 /* desc mask is for rev2.0, 232 fsl,descriptor-types-mask = <0x01010ebf>;
200 * we need runtime fixup for >2.0 */
201 descriptor-types-mask = <0x01010ebf>;
202 }; 233 };
203 234
204 /* IPIC 235 /* IPIC
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts
index 22d967178fe9..333552b4e90d 100644
--- a/arch/powerpc/boot/dts/sbc8548.dts
+++ b/arch/powerpc/boot/dts/sbc8548.dts
@@ -44,6 +44,7 @@
44 timebase-frequency = <0>; // From uboot 44 timebase-frequency = <0>; // From uboot
45 bus-frequency = <0>; 45 bus-frequency = <0>;
46 clock-frequency = <0>; 46 clock-frequency = <0>;
47 next-level-cache = <&L2>;
47 }; 48 };
48 }; 49 };
49 50
@@ -161,7 +162,7 @@
161 interrupts = <0x12 0x2>; 162 interrupts = <0x12 0x2>;
162 }; 163 };
163 164
164 l2-cache-controller@20000 { 165 L2: l2-cache-controller@20000 {
165 compatible = "fsl,8548-l2-cache-controller"; 166 compatible = "fsl,8548-l2-cache-controller";
166 reg = <0x20000 0x1000>; 167 reg = <0x20000 0x1000>;
167 cache-line-size = <0x20>; // 32 bytes 168 cache-line-size = <0x20>; // 32 bytes
@@ -192,6 +193,47 @@
192 dfsrr; 193 dfsrr;
193 }; 194 };
194 195
196 dma@21300 {
197 #address-cells = <1>;
198 #size-cells = <1>;
199 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
200 reg = <0x21300 0x4>;
201 ranges = <0x0 0x21100 0x200>;
202 cell-index = <0>;
203 dma-channel@0 {
204 compatible = "fsl,mpc8548-dma-channel",
205 "fsl,eloplus-dma-channel";
206 reg = <0x0 0x80>;
207 cell-index = <0>;
208 interrupt-parent = <&mpic>;
209 interrupts = <20 2>;
210 };
211 dma-channel@80 {
212 compatible = "fsl,mpc8548-dma-channel",
213 "fsl,eloplus-dma-channel";
214 reg = <0x80 0x80>;
215 cell-index = <1>;
216 interrupt-parent = <&mpic>;
217 interrupts = <21 2>;
218 };
219 dma-channel@100 {
220 compatible = "fsl,mpc8548-dma-channel",
221 "fsl,eloplus-dma-channel";
222 reg = <0x100 0x80>;
223 cell-index = <2>;
224 interrupt-parent = <&mpic>;
225 interrupts = <22 2>;
226 };
227 dma-channel@180 {
228 compatible = "fsl,mpc8548-dma-channel",
229 "fsl,eloplus-dma-channel";
230 reg = <0x180 0x80>;
231 cell-index = <3>;
232 interrupt-parent = <&mpic>;
233 interrupts = <23 2>;
234 };
235 };
236
195 mdio@24520 { 237 mdio@24520 {
196 #address-cells = <1>; 238 #address-cells = <1>;
197 #size-cells = <0>; 239 #size-cells = <0>;
@@ -262,15 +304,24 @@
262 fsl,has-rstcr; 304 fsl,has-rstcr;
263 }; 305 };
264 306
307 crypto@30000 {
308 compatible = "fsl,sec2.1", "fsl,sec2.0";
309 reg = <0x30000 0x10000>;
310 interrupts = <45 2>;
311 interrupt-parent = <&mpic>;
312 fsl,num-channels = <4>;
313 fsl,channel-fifo-len = <24>;
314 fsl,exec-units-mask = <0xfe>;
315 fsl,descriptor-types-mask = <0x12b0ebf>;
316 };
317
265 mpic: pic@40000 { 318 mpic: pic@40000 {
266 interrupt-controller; 319 interrupt-controller;
267 #address-cells = <0>; 320 #address-cells = <0>;
268 #size-cells = <0>;
269 #interrupt-cells = <2>; 321 #interrupt-cells = <2>;
270 reg = <0x40000 0x40000>; 322 reg = <0x40000 0x40000>;
271 compatible = "chrp,open-pic"; 323 compatible = "chrp,open-pic";
272 device_type = "open-pic"; 324 device_type = "open-pic";
273 big-endian;
274 }; 325 };
275 }; 326 };
276 327
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts
index 0476802fba60..db3632ef9888 100644
--- a/arch/powerpc/boot/dts/sbc8560.dts
+++ b/arch/powerpc/boot/dts/sbc8560.dts
@@ -43,6 +43,7 @@
43 timebase-frequency = <0>; // From uboot 43 timebase-frequency = <0>; // From uboot
44 bus-frequency = <0>; 44 bus-frequency = <0>;
45 clock-frequency = <0>; 45 clock-frequency = <0>;
46 next-level-cache = <&L2>;
46 }; 47 };
47 }; 48 };
48 49
@@ -66,7 +67,7 @@
66 interrupts = <0x12 0x2>; 67 interrupts = <0x12 0x2>;
67 }; 68 };
68 69
69 l2-cache-controller@20000 { 70 L2: l2-cache-controller@20000 {
70 compatible = "fsl,8560-l2-cache-controller"; 71 compatible = "fsl,8560-l2-cache-controller";
71 reg = <0x20000 0x1000>; 72 reg = <0x20000 0x1000>;
72 cache-line-size = <0x20>; // 32 bytes 73 cache-line-size = <0x20>; // 32 bytes
@@ -97,6 +98,47 @@
97 dfsrr; 98 dfsrr;
98 }; 99 };
99 100
101 dma@21300 {
102 #address-cells = <1>;
103 #size-cells = <1>;
104 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
105 reg = <0x21300 0x4>;
106 ranges = <0x0 0x21100 0x200>;
107 cell-index = <0>;
108 dma-channel@0 {
109 compatible = "fsl,mpc8560-dma-channel",
110 "fsl,eloplus-dma-channel";
111 reg = <0x0 0x80>;
112 cell-index = <0>;
113 interrupt-parent = <&mpic>;
114 interrupts = <20 2>;
115 };
116 dma-channel@80 {
117 compatible = "fsl,mpc8560-dma-channel",
118 "fsl,eloplus-dma-channel";
119 reg = <0x80 0x80>;
120 cell-index = <1>;
121 interrupt-parent = <&mpic>;
122 interrupts = <21 2>;
123 };
124 dma-channel@100 {
125 compatible = "fsl,mpc8560-dma-channel",
126 "fsl,eloplus-dma-channel";
127 reg = <0x100 0x80>;
128 cell-index = <2>;
129 interrupt-parent = <&mpic>;
130 interrupts = <22 2>;
131 };
132 dma-channel@180 {
133 compatible = "fsl,mpc8560-dma-channel",
134 "fsl,eloplus-dma-channel";
135 reg = <0x180 0x80>;
136 cell-index = <3>;
137 interrupt-parent = <&mpic>;
138 interrupts = <23 2>;
139 };
140 };
141
100 mdio@24520 { 142 mdio@24520 {
101 #address-cells = <1>; 143 #address-cells = <1>;
102 #size-cells = <0>; 144 #size-cells = <0>;
@@ -155,8 +197,8 @@
155 mpic: pic@40000 { 197 mpic: pic@40000 {
156 interrupt-controller; 198 interrupt-controller;
157 #address-cells = <0>; 199 #address-cells = <0>;
158 #size-cells = <0>;
159 #interrupt-cells = <2>; 200 #interrupt-cells = <2>;
201 compatible = "chrp,open-pic";
160 reg = <0x40000 0x40000>; 202 reg = <0x40000 0x40000>;
161 device_type = "open-pic"; 203 device_type = "open-pic";
162 }; 204 };
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts
index 3eebeec157b3..9652456158fb 100644
--- a/arch/powerpc/boot/dts/sbc8641d.dts
+++ b/arch/powerpc/boot/dts/sbc8641d.dts
@@ -151,6 +151,47 @@
151 dfsrr; 151 dfsrr;
152 }; 152 };
153 153
154 dma@21300 {
155 #address-cells = <1>;
156 #size-cells = <1>;
157 compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma";
158 reg = <0x21300 0x4>;
159 ranges = <0x0 0x21100 0x200>;
160 cell-index = <0>;
161 dma-channel@0 {
162 compatible = "fsl,mpc8641-dma-channel",
163 "fsl,eloplus-dma-channel";
164 reg = <0x0 0x80>;
165 cell-index = <0>;
166 interrupt-parent = <&mpic>;
167 interrupts = <20 2>;
168 };
169 dma-channel@80 {
170 compatible = "fsl,mpc8641-dma-channel",
171 "fsl,eloplus-dma-channel";
172 reg = <0x80 0x80>;
173 cell-index = <1>;
174 interrupt-parent = <&mpic>;
175 interrupts = <21 2>;
176 };
177 dma-channel@100 {
178 compatible = "fsl,mpc8641-dma-channel",
179 "fsl,eloplus-dma-channel";
180 reg = <0x100 0x80>;
181 cell-index = <2>;
182 interrupt-parent = <&mpic>;
183 interrupts = <22 2>;
184 };
185 dma-channel@180 {
186 compatible = "fsl,mpc8641-dma-channel",
187 "fsl,eloplus-dma-channel";
188 reg = <0x180 0x80>;
189 cell-index = <3>;
190 interrupt-parent = <&mpic>;
191 interrupts = <23 2>;
192 };
193 };
194
154 mdio@24520 { 195 mdio@24520 {
155 #address-cells = <1>; 196 #address-cells = <1>;
156 #size-cells = <0>; 197 #size-cells = <0>;
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts
index 72d67564bdfc..72d15f075d34 100644
--- a/arch/powerpc/boot/dts/sequoia.dts
+++ b/arch/powerpc/boot/dts/sequoia.dts
@@ -12,12 +12,14 @@
12 * 12 *
13 */ 13 */
14 14
15/dts-v1/;
16
15/ { 17/ {
16 #address-cells = <2>; 18 #address-cells = <2>;
17 #size-cells = <1>; 19 #size-cells = <1>;
18 model = "amcc,sequoia"; 20 model = "amcc,sequoia";
19 compatible = "amcc,sequoia"; 21 compatible = "amcc,sequoia";
20 dcr-parent = <&/cpus/cpu@0>; 22 dcr-parent = <&{/cpus/cpu@0}>;
21 23
22 aliases { 24 aliases {
23 ethernet0 = &EMAC0; 25 ethernet0 = &EMAC0;
@@ -35,13 +37,13 @@
35 cpu@0 { 37 cpu@0 {
36 device_type = "cpu"; 38 device_type = "cpu";
37 model = "PowerPC,440EPx"; 39 model = "PowerPC,440EPx";
38 reg = <0>; 40 reg = <0x00000000>;
39 clock-frequency = <0>; /* Filled in by zImage */ 41 clock-frequency = <0>; /* Filled in by zImage */
40 timebase-frequency = <0>; /* Filled in by zImage */ 42 timebase-frequency = <0>; /* Filled in by zImage */
41 i-cache-line-size = <20>; 43 i-cache-line-size = <32>;
42 d-cache-line-size = <20>; 44 d-cache-line-size = <32>;
43 i-cache-size = <8000>; 45 i-cache-size = <32768>;
44 d-cache-size = <8000>; 46 d-cache-size = <32768>;
45 dcr-controller; 47 dcr-controller;
46 dcr-access-method = "native"; 48 dcr-access-method = "native";
47 }; 49 };
@@ -49,14 +51,14 @@
49 51
50 memory { 52 memory {
51 device_type = "memory"; 53 device_type = "memory";
52 reg = <0 0 0>; /* Filled in by zImage */ 54 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
53 }; 55 };
54 56
55 UIC0: interrupt-controller0 { 57 UIC0: interrupt-controller0 {
56 compatible = "ibm,uic-440epx","ibm,uic"; 58 compatible = "ibm,uic-440epx","ibm,uic";
57 interrupt-controller; 59 interrupt-controller;
58 cell-index = <0>; 60 cell-index = <0>;
59 dcr-reg = <0c0 009>; 61 dcr-reg = <0x0c0 0x009>;
60 #address-cells = <0>; 62 #address-cells = <0>;
61 #size-cells = <0>; 63 #size-cells = <0>;
62 #interrupt-cells = <2>; 64 #interrupt-cells = <2>;
@@ -66,11 +68,11 @@
66 compatible = "ibm,uic-440epx","ibm,uic"; 68 compatible = "ibm,uic-440epx","ibm,uic";
67 interrupt-controller; 69 interrupt-controller;
68 cell-index = <1>; 70 cell-index = <1>;
69 dcr-reg = <0d0 009>; 71 dcr-reg = <0x0d0 0x009>;
70 #address-cells = <0>; 72 #address-cells = <0>;
71 #size-cells = <0>; 73 #size-cells = <0>;
72 #interrupt-cells = <2>; 74 #interrupt-cells = <2>;
73 interrupts = <1e 4 1f 4>; /* cascade */ 75 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
74 interrupt-parent = <&UIC0>; 76 interrupt-parent = <&UIC0>;
75 }; 77 };
76 78
@@ -78,22 +80,22 @@
78 compatible = "ibm,uic-440epx","ibm,uic"; 80 compatible = "ibm,uic-440epx","ibm,uic";
79 interrupt-controller; 81 interrupt-controller;
80 cell-index = <2>; 82 cell-index = <2>;
81 dcr-reg = <0e0 009>; 83 dcr-reg = <0x0e0 0x009>;
82 #address-cells = <0>; 84 #address-cells = <0>;
83 #size-cells = <0>; 85 #size-cells = <0>;
84 #interrupt-cells = <2>; 86 #interrupt-cells = <2>;
85 interrupts = <1c 4 1d 4>; /* cascade */ 87 interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */
86 interrupt-parent = <&UIC0>; 88 interrupt-parent = <&UIC0>;
87 }; 89 };
88 90
89 SDR0: sdr { 91 SDR0: sdr {
90 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; 92 compatible = "ibm,sdr-440epx", "ibm,sdr-440ep";
91 dcr-reg = <00e 002>; 93 dcr-reg = <0x00e 0x002>;
92 }; 94 };
93 95
94 CPR0: cpr { 96 CPR0: cpr {
95 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; 97 compatible = "ibm,cpr-440epx", "ibm,cpr-440ep";
96 dcr-reg = <00c 002>; 98 dcr-reg = <0x00c 0x002>;
97 }; 99 };
98 100
99 plb { 101 plb {
@@ -105,44 +107,44 @@
105 107
106 SDRAM0: sdram { 108 SDRAM0: sdram {
107 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; 109 compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali";
108 dcr-reg = <010 2>; 110 dcr-reg = <0x010 0x002>;
109 }; 111 };
110 112
111 DMA0: dma { 113 DMA0: dma {
112 compatible = "ibm,dma-440epx", "ibm,dma-4xx"; 114 compatible = "ibm,dma-440epx", "ibm,dma-4xx";
113 dcr-reg = <100 027>; 115 dcr-reg = <0x100 0x027>;
114 }; 116 };
115 117
116 MAL0: mcmal { 118 MAL0: mcmal {
117 compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; 119 compatible = "ibm,mcmal-440epx", "ibm,mcmal2";
118 dcr-reg = <180 62>; 120 dcr-reg = <0x180 0x062>;
119 num-tx-chans = <2>; 121 num-tx-chans = <2>;
120 num-rx-chans = <2>; 122 num-rx-chans = <2>;
121 interrupt-parent = <&MAL0>; 123 interrupt-parent = <&MAL0>;
122 interrupts = <0 1 2 3 4>; 124 interrupts = <0x0 0x1 0x2 0x3 0x4>;
123 #interrupt-cells = <1>; 125 #interrupt-cells = <1>;
124 #address-cells = <0>; 126 #address-cells = <0>;
125 #size-cells = <0>; 127 #size-cells = <0>;
126 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 128 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
127 /*RXEOB*/ 1 &UIC0 b 4 129 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
128 /*SERR*/ 2 &UIC1 0 4 130 /*SERR*/ 0x2 &UIC1 0x0 0x4
129 /*TXDE*/ 3 &UIC1 1 4 131 /*TXDE*/ 0x3 &UIC1 0x1 0x4
130 /*RXDE*/ 4 &UIC1 2 4>; 132 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
131 interrupt-map-mask = <ffffffff>; 133 interrupt-map-mask = <0xffffffff>;
132 }; 134 };
133 135
134 USB1: usb@e0000400 { 136 USB1: usb@e0000400 {
135 compatible = "ohci-be"; 137 compatible = "ohci-be";
136 reg = <0 e0000400 60>; 138 reg = <0x00000000 0xe0000400 0x00000060>;
137 interrupt-parent = <&UIC0>; 139 interrupt-parent = <&UIC0>;
138 interrupts = <15 8>; 140 interrupts = <0x15 0x8>;
139 }; 141 };
140 142
141 USB0: ehci@e0000300 { 143 USB0: ehci@e0000300 {
142 compatible = "ibm,usb-ehci-440epx", "usb-ehci"; 144 compatible = "ibm,usb-ehci-440epx", "usb-ehci";
143 interrupt-parent = <&UIC0>; 145 interrupt-parent = <&UIC0>;
144 interrupts = <1a 4>; 146 interrupts = <0x1a 0x4>;
145 reg = <0 e0000300 90 0 e0000390 70>; 147 reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>;
146 big-endian; 148 big-endian;
147 }; 149 };
148 150
@@ -150,50 +152,50 @@
150 compatible = "ibm,opb-440epx", "ibm,opb"; 152 compatible = "ibm,opb-440epx", "ibm,opb";
151 #address-cells = <1>; 153 #address-cells = <1>;
152 #size-cells = <1>; 154 #size-cells = <1>;
153 ranges = <00000000 1 00000000 80000000 155 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
154 80000000 1 80000000 80000000>; 156 0x80000000 0x00000001 0x80000000 0x80000000>;
155 interrupt-parent = <&UIC1>; 157 interrupt-parent = <&UIC1>;
156 interrupts = <7 4>; 158 interrupts = <0x7 0x4>;
157 clock-frequency = <0>; /* Filled in by zImage */ 159 clock-frequency = <0>; /* Filled in by zImage */
158 160
159 EBC0: ebc { 161 EBC0: ebc {
160 compatible = "ibm,ebc-440epx", "ibm,ebc"; 162 compatible = "ibm,ebc-440epx", "ibm,ebc";
161 dcr-reg = <012 2>; 163 dcr-reg = <0x012 0x002>;
162 #address-cells = <2>; 164 #address-cells = <2>;
163 #size-cells = <1>; 165 #size-cells = <1>;
164 clock-frequency = <0>; /* Filled in by zImage */ 166 clock-frequency = <0>; /* Filled in by zImage */
165 interrupts = <5 1>; 167 interrupts = <0x5 0x1>;
166 interrupt-parent = <&UIC1>; 168 interrupt-parent = <&UIC1>;
167 169
168 nor_flash@0,0 { 170 nor_flash@0,0 {
169 compatible = "amd,s29gl256n", "cfi-flash"; 171 compatible = "amd,s29gl256n", "cfi-flash";
170 bank-width = <2>; 172 bank-width = <2>;
171 reg = <0 000000 4000000>; 173 reg = <0x00000000 0x00000000 0x04000000>;
172 #address-cells = <1>; 174 #address-cells = <1>;
173 #size-cells = <1>; 175 #size-cells = <1>;
174 partition@0 { 176 partition@0 {
175 label = "Kernel"; 177 label = "Kernel";
176 reg = <0 180000>; 178 reg = <0x00000000 0x00180000>;
177 }; 179 };
178 partition@180000 { 180 partition@180000 {
179 label = "ramdisk"; 181 label = "ramdisk";
180 reg = <180000 200000>; 182 reg = <0x00180000 0x00200000>;
181 }; 183 };
182 partition@380000 { 184 partition@380000 {
183 label = "file system"; 185 label = "file system";
184 reg = <380000 3aa0000>; 186 reg = <0x00380000 0x03aa0000>;
185 }; 187 };
186 partition@3e20000 { 188 partition@3e20000 {
187 label = "kozio"; 189 label = "kozio";
188 reg = <3e20000 140000>; 190 reg = <0x03e20000 0x00140000>;
189 }; 191 };
190 partition@3f60000 { 192 partition@3f60000 {
191 label = "env"; 193 label = "env";
192 reg = <3f60000 40000>; 194 reg = <0x03f60000 0x00040000>;
193 }; 195 };
194 partition@3fa0000 { 196 partition@3fa0000 {
195 label = "u-boot"; 197 label = "u-boot";
196 reg = <3fa0000 60000>; 198 reg = <0x03fa0000 0x00060000>;
197 }; 199 };
198 }; 200 };
199 201
@@ -202,69 +204,69 @@
202 UART0: serial@ef600300 { 204 UART0: serial@ef600300 {
203 device_type = "serial"; 205 device_type = "serial";
204 compatible = "ns16550"; 206 compatible = "ns16550";
205 reg = <ef600300 8>; 207 reg = <0xef600300 0x00000008>;
206 virtual-reg = <ef600300>; 208 virtual-reg = <0xef600300>;
207 clock-frequency = <0>; /* Filled in by zImage */ 209 clock-frequency = <0>; /* Filled in by zImage */
208 current-speed = <1c200>; 210 current-speed = <115200>;
209 interrupt-parent = <&UIC0>; 211 interrupt-parent = <&UIC0>;
210 interrupts = <0 4>; 212 interrupts = <0x0 0x4>;
211 }; 213 };
212 214
213 UART1: serial@ef600400 { 215 UART1: serial@ef600400 {
214 device_type = "serial"; 216 device_type = "serial";
215 compatible = "ns16550"; 217 compatible = "ns16550";
216 reg = <ef600400 8>; 218 reg = <0xef600400 0x00000008>;
217 virtual-reg = <ef600400>; 219 virtual-reg = <0xef600400>;
218 clock-frequency = <0>; 220 clock-frequency = <0>;
219 current-speed = <0>; 221 current-speed = <0>;
220 interrupt-parent = <&UIC0>; 222 interrupt-parent = <&UIC0>;
221 interrupts = <1 4>; 223 interrupts = <0x1 0x4>;
222 }; 224 };
223 225
224 UART2: serial@ef600500 { 226 UART2: serial@ef600500 {
225 device_type = "serial"; 227 device_type = "serial";
226 compatible = "ns16550"; 228 compatible = "ns16550";
227 reg = <ef600500 8>; 229 reg = <0xef600500 0x00000008>;
228 virtual-reg = <ef600500>; 230 virtual-reg = <0xef600500>;
229 clock-frequency = <0>; 231 clock-frequency = <0>;
230 current-speed = <0>; 232 current-speed = <0>;
231 interrupt-parent = <&UIC1>; 233 interrupt-parent = <&UIC1>;
232 interrupts = <3 4>; 234 interrupts = <0x3 0x4>;
233 }; 235 };
234 236
235 UART3: serial@ef600600 { 237 UART3: serial@ef600600 {
236 device_type = "serial"; 238 device_type = "serial";
237 compatible = "ns16550"; 239 compatible = "ns16550";
238 reg = <ef600600 8>; 240 reg = <0xef600600 0x00000008>;
239 virtual-reg = <ef600600>; 241 virtual-reg = <0xef600600>;
240 clock-frequency = <0>; 242 clock-frequency = <0>;
241 current-speed = <0>; 243 current-speed = <0>;
242 interrupt-parent = <&UIC1>; 244 interrupt-parent = <&UIC1>;
243 interrupts = <4 4>; 245 interrupts = <0x4 0x4>;
244 }; 246 };
245 247
246 IIC0: i2c@ef600700 { 248 IIC0: i2c@ef600700 {
247 compatible = "ibm,iic-440epx", "ibm,iic"; 249 compatible = "ibm,iic-440epx", "ibm,iic";
248 reg = <ef600700 14>; 250 reg = <0xef600700 0x00000014>;
249 interrupt-parent = <&UIC0>; 251 interrupt-parent = <&UIC0>;
250 interrupts = <2 4>; 252 interrupts = <0x2 0x4>;
251 }; 253 };
252 254
253 IIC1: i2c@ef600800 { 255 IIC1: i2c@ef600800 {
254 compatible = "ibm,iic-440epx", "ibm,iic"; 256 compatible = "ibm,iic-440epx", "ibm,iic";
255 reg = <ef600800 14>; 257 reg = <0xef600800 0x00000014>;
256 interrupt-parent = <&UIC0>; 258 interrupt-parent = <&UIC0>;
257 interrupts = <7 4>; 259 interrupts = <0x7 0x4>;
258 }; 260 };
259 261
260 ZMII0: emac-zmii@ef600d00 { 262 ZMII0: emac-zmii@ef600d00 {
261 compatible = "ibm,zmii-440epx", "ibm,zmii"; 263 compatible = "ibm,zmii-440epx", "ibm,zmii";
262 reg = <ef600d00 c>; 264 reg = <0xef600d00 0x0000000c>;
263 }; 265 };
264 266
265 RGMII0: emac-rgmii@ef601000 { 267 RGMII0: emac-rgmii@ef601000 {
266 compatible = "ibm,rgmii-440epx", "ibm,rgmii"; 268 compatible = "ibm,rgmii-440epx", "ibm,rgmii";
267 reg = <ef601000 8>; 269 reg = <0xef601000 0x00000008>;
268 has-mdio; 270 has-mdio;
269 }; 271 };
270 272
@@ -272,23 +274,23 @@
272 device_type = "network"; 274 device_type = "network";
273 compatible = "ibm,emac-440epx", "ibm,emac4"; 275 compatible = "ibm,emac-440epx", "ibm,emac4";
274 interrupt-parent = <&EMAC0>; 276 interrupt-parent = <&EMAC0>;
275 interrupts = <0 1>; 277 interrupts = <0x0 0x1>;
276 #interrupt-cells = <1>; 278 #interrupt-cells = <1>;
277 #address-cells = <0>; 279 #address-cells = <0>;
278 #size-cells = <0>; 280 #size-cells = <0>;
279 interrupt-map = </*Status*/ 0 &UIC0 18 4 281 interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4
280 /*Wake*/ 1 &UIC1 1d 4>; 282 /*Wake*/ 0x1 &UIC1 0x1d 0x4>;
281 reg = <ef600e00 70>; 283 reg = <0xef600e00 0x00000074>;
282 local-mac-address = [000000000000]; 284 local-mac-address = [000000000000];
283 mal-device = <&MAL0>; 285 mal-device = <&MAL0>;
284 mal-tx-channel = <0>; 286 mal-tx-channel = <0>;
285 mal-rx-channel = <0>; 287 mal-rx-channel = <0>;
286 cell-index = <0>; 288 cell-index = <0>;
287 max-frame-size = <2328>; 289 max-frame-size = <9000>;
288 rx-fifo-size = <1000>; 290 rx-fifo-size = <4096>;
289 tx-fifo-size = <800>; 291 tx-fifo-size = <2048>;
290 phy-mode = "rgmii"; 292 phy-mode = "rgmii";
291 phy-map = <00000000>; 293 phy-map = <0x00000000>;
292 zmii-device = <&ZMII0>; 294 zmii-device = <&ZMII0>;
293 zmii-channel = <0>; 295 zmii-channel = <0>;
294 rgmii-device = <&RGMII0>; 296 rgmii-device = <&RGMII0>;
@@ -301,23 +303,23 @@
301 device_type = "network"; 303 device_type = "network";
302 compatible = "ibm,emac-440epx", "ibm,emac4"; 304 compatible = "ibm,emac-440epx", "ibm,emac4";
303 interrupt-parent = <&EMAC1>; 305 interrupt-parent = <&EMAC1>;
304 interrupts = <0 1>; 306 interrupts = <0x0 0x1>;
305 #interrupt-cells = <1>; 307 #interrupt-cells = <1>;
306 #address-cells = <0>; 308 #address-cells = <0>;
307 #size-cells = <0>; 309 #size-cells = <0>;
308 interrupt-map = </*Status*/ 0 &UIC0 19 4 310 interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4
309 /*Wake*/ 1 &UIC1 1f 4>; 311 /*Wake*/ 0x1 &UIC1 0x1f 0x4>;
310 reg = <ef600f00 70>; 312 reg = <0xef600f00 0x00000074>;
311 local-mac-address = [000000000000]; 313 local-mac-address = [000000000000];
312 mal-device = <&MAL0>; 314 mal-device = <&MAL0>;
313 mal-tx-channel = <1>; 315 mal-tx-channel = <1>;
314 mal-rx-channel = <1>; 316 mal-rx-channel = <1>;
315 cell-index = <1>; 317 cell-index = <1>;
316 max-frame-size = <2328>; 318 max-frame-size = <9000>;
317 rx-fifo-size = <1000>; 319 rx-fifo-size = <4096>;
318 tx-fifo-size = <800>; 320 tx-fifo-size = <2048>;
319 phy-mode = "rgmii"; 321 phy-mode = "rgmii";
320 phy-map = <00000000>; 322 phy-map = <0x00000000>;
321 zmii-device = <&ZMII0>; 323 zmii-device = <&ZMII0>;
322 zmii-channel = <1>; 324 zmii-channel = <1>;
323 rgmii-device = <&RGMII0>; 325 rgmii-device = <&RGMII0>;
@@ -334,10 +336,10 @@
334 #address-cells = <3>; 336 #address-cells = <3>;
335 compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; 337 compatible = "ibm,plb440epx-pci", "ibm,plb-pci";
336 primary; 338 primary;
337 reg = <1 eec00000 8 /* Config space access */ 339 reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */
338 1 eed00000 4 /* IACK */ 340 0x00000001 0xeed00000 0x00000004 /* IACK */
339 1 eed00000 4 /* Special cycle */ 341 0x00000001 0xeed00000 0x00000004 /* Special cycle */
340 1 ef400000 40>; /* Internal registers */ 342 0x00000001 0xef400000 0x00000040>; /* Internal registers */
341 343
342 /* Outbound ranges, one memory and one IO, 344 /* Outbound ranges, one memory and one IO,
343 * later cannot be changed. Chip supports a second 345 * later cannot be changed. Chip supports a second
@@ -347,16 +349,16 @@
347 * I/O 1 E800 0000 1 E800 FFFF 64KB 349 * I/O 1 E800 0000 1 E800 FFFF 64KB
348 * I/O 1 E880 0000 1 EBFF FFFF 56MB 350 * I/O 1 E880 0000 1 EBFF FFFF 56MB
349 */ 351 */
350 ranges = <02000000 0 80000000 1 80000000 0 40000000 352 ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000
351 01000000 0 00000000 1 e8000000 0 00010000 353 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000
352 01000000 0 00000000 1 e8800000 0 03800000>; 354 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>;
353 355
354 /* Inbound 2GB range starting at 0 */ 356 /* Inbound 2GB range starting at 0 */
355 dma-ranges = <42000000 0 0 0 0 0 80000000>; 357 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
356 358
357 /* All PCI interrupts are routed to IRQ 67 */ 359 /* All PCI interrupts are routed to IRQ 67 */
358 interrupt-map-mask = <0000 0 0 0>; 360 interrupt-map-mask = <0x0 0x0 0x0 0x0>;
359 interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; 361 interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >;
360 }; 362 };
361 }; 363 };
362 364
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts
index 5893816c0bce..eab680ce10da 100644
--- a/arch/powerpc/boot/dts/storcenter.dts
+++ b/arch/powerpc/boot/dts/storcenter.dts
@@ -95,6 +95,7 @@
95 95
96 mpic: interrupt-controller@40000 { 96 mpic: interrupt-controller@40000 {
97 #interrupt-cells = <2>; 97 #interrupt-cells = <2>;
98 #address-cells = <0>;
98 device_type = "open-pic"; 99 device_type = "open-pic";
99 compatible = "chrp,open-pic"; 100 compatible = "chrp,open-pic";
100 interrupt-controller; 101 interrupt-controller;
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts
index f81fd7fdb29e..fcd1db6ca0a8 100644
--- a/arch/powerpc/boot/dts/stx_gp3_8560.dts
+++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts
@@ -38,6 +38,7 @@
38 timebase-frequency = <0>; 38 timebase-frequency = <0>;
39 bus-frequency = <0>; 39 bus-frequency = <0>;
40 clock-frequency = <0>; 40 clock-frequency = <0>;
41 next-level-cache = <&L2>;
41 }; 42 };
42 }; 43 };
43 44
@@ -62,7 +63,7 @@
62 interrupts = <18 2>; 63 interrupts = <18 2>;
63 }; 64 };
64 65
65 l2-cache-controller@20000 { 66 L2: l2-cache-controller@20000 {
66 compatible = "fsl,8540-l2-cache-controller"; 67 compatible = "fsl,8540-l2-cache-controller";
67 reg = <0x20000 0x1000>; 68 reg = <0x20000 0x1000>;
68 cache-line-size = <32>; 69 cache-line-size = <32>;
@@ -82,6 +83,47 @@
82 dfsrr; 83 dfsrr;
83 }; 84 };
84 85
86 dma@21300 {
87 #address-cells = <1>;
88 #size-cells = <1>;
89 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
90 reg = <0x21300 0x4>;
91 ranges = <0x0 0x21100 0x200>;
92 cell-index = <0>;
93 dma-channel@0 {
94 compatible = "fsl,mpc8560-dma-channel",
95 "fsl,eloplus-dma-channel";
96 reg = <0x0 0x80>;
97 cell-index = <0>;
98 interrupt-parent = <&mpic>;
99 interrupts = <20 2>;
100 };
101 dma-channel@80 {
102 compatible = "fsl,mpc8560-dma-channel",
103 "fsl,eloplus-dma-channel";
104 reg = <0x80 0x80>;
105 cell-index = <1>;
106 interrupt-parent = <&mpic>;
107 interrupts = <21 2>;
108 };
109 dma-channel@100 {
110 compatible = "fsl,mpc8560-dma-channel",
111 "fsl,eloplus-dma-channel";
112 reg = <0x100 0x80>;
113 cell-index = <2>;
114 interrupt-parent = <&mpic>;
115 interrupts = <22 2>;
116 };
117 dma-channel@180 {
118 compatible = "fsl,mpc8560-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x180 0x80>;
121 cell-index = <3>;
122 interrupt-parent = <&mpic>;
123 interrupts = <23 2>;
124 };
125 };
126
85 mdio@24520 { 127 mdio@24520 {
86 #address-cells = <1>; 128 #address-cells = <1>;
87 #size-cells = <0>; 129 #size-cells = <0>;
@@ -131,6 +173,7 @@
131 #address-cells = <0>; 173 #address-cells = <0>;
132 #interrupt-cells = <2>; 174 #interrupt-cells = <2>;
133 reg = <0x40000 0x40000>; 175 reg = <0x40000 0x40000>;
176 compatible = "chrp,open-pic";
134 device_type = "open-pic"; 177 device_type = "open-pic";
135 }; 178 };
136 179
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts
index e808e1c5593a..058438f9629b 100644
--- a/arch/powerpc/boot/dts/taishan.dts
+++ b/arch/powerpc/boot/dts/taishan.dts
@@ -10,12 +10,14 @@
10 * any warranty of any kind, whether express or implied. 10 * any warranty of any kind, whether express or implied.
11 */ 11 */
12 12
13/dts-v1/;
14
13/ { 15/ {
14 #address-cells = <2>; 16 #address-cells = <2>;
15 #size-cells = <1>; 17 #size-cells = <1>;
16 model = "amcc,taishan"; 18 model = "amcc,taishan";
17 compatible = "amcc,taishan"; 19 compatible = "amcc,taishan";
18 dcr-parent = <&/cpus/cpu@0>; 20 dcr-parent = <&{/cpus/cpu@0}>;
19 21
20 aliases { 22 aliases {
21 ethernet0 = &EMAC2; 23 ethernet0 = &EMAC2;
@@ -31,13 +33,13 @@
31 cpu@0 { 33 cpu@0 {
32 device_type = "cpu"; 34 device_type = "cpu";
33 model = "PowerPC,440GX"; 35 model = "PowerPC,440GX";
34 reg = <0>; 36 reg = <0x00000000>;
35 clock-frequency = <2FAF0800>; // 800MHz 37 clock-frequency = <800000000>; // 800MHz
36 timebase-frequency = <0>; // Filled in by zImage 38 timebase-frequency = <0>; // Filled in by zImage
37 i-cache-line-size = <32>; 39 i-cache-line-size = <50>;
38 d-cache-line-size = <32>; 40 d-cache-line-size = <50>;
39 i-cache-size = <8000>; /* 32 kB */ 41 i-cache-size = <32768>; /* 32 kB */
40 d-cache-size = <8000>; /* 32 kB */ 42 d-cache-size = <32768>; /* 32 kB */
41 dcr-controller; 43 dcr-controller;
42 dcr-access-method = "native"; 44 dcr-access-method = "native";
43 }; 45 };
@@ -45,7 +47,7 @@
45 47
46 memory { 48 memory {
47 device_type = "memory"; 49 device_type = "memory";
48 reg = <0 0 0>; // Filled in by zImage 50 reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage
49 }; 51 };
50 52
51 53
@@ -53,7 +55,7 @@
53 compatible = "ibm,uic-440gx", "ibm,uic"; 55 compatible = "ibm,uic-440gx", "ibm,uic";
54 interrupt-controller; 56 interrupt-controller;
55 cell-index = <3>; 57 cell-index = <3>;
56 dcr-reg = <200 009>; 58 dcr-reg = <0x200 0x009>;
57 #address-cells = <0>; 59 #address-cells = <0>;
58 #size-cells = <0>; 60 #size-cells = <0>;
59 #interrupt-cells = <2>; 61 #interrupt-cells = <2>;
@@ -64,11 +66,11 @@
64 compatible = "ibm,uic-440gx", "ibm,uic"; 66 compatible = "ibm,uic-440gx", "ibm,uic";
65 interrupt-controller; 67 interrupt-controller;
66 cell-index = <0>; 68 cell-index = <0>;
67 dcr-reg = <0c0 009>; 69 dcr-reg = <0x0c0 0x009>;
68 #address-cells = <0>; 70 #address-cells = <0>;
69 #size-cells = <0>; 71 #size-cells = <0>;
70 #interrupt-cells = <2>; 72 #interrupt-cells = <2>;
71 interrupts = <01 4 00 4>; /* cascade - first non-critical */ 73 interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */
72 interrupt-parent = <&UICB0>; 74 interrupt-parent = <&UICB0>;
73 75
74 }; 76 };
@@ -77,11 +79,11 @@
77 compatible = "ibm,uic-440gx", "ibm,uic"; 79 compatible = "ibm,uic-440gx", "ibm,uic";
78 interrupt-controller; 80 interrupt-controller;
79 cell-index = <1>; 81 cell-index = <1>;
80 dcr-reg = <0d0 009>; 82 dcr-reg = <0x0d0 0x009>;
81 #address-cells = <0>; 83 #address-cells = <0>;
82 #size-cells = <0>; 84 #size-cells = <0>;
83 #interrupt-cells = <2>; 85 #interrupt-cells = <2>;
84 interrupts = <03 4 02 4>; /* cascade */ 86 interrupts = <0x3 0x4 0x2 0x4>; /* cascade */
85 interrupt-parent = <&UICB0>; 87 interrupt-parent = <&UICB0>;
86 }; 88 };
87 89
@@ -89,29 +91,29 @@
89 compatible = "ibm,uic-440gx", "ibm,uic"; 91 compatible = "ibm,uic-440gx", "ibm,uic";
90 interrupt-controller; 92 interrupt-controller;
91 cell-index = <2>; /* was 1 */ 93 cell-index = <2>; /* was 1 */
92 dcr-reg = <210 009>; 94 dcr-reg = <0x210 0x009>;
93 #address-cells = <0>; 95 #address-cells = <0>;
94 #size-cells = <0>; 96 #size-cells = <0>;
95 #interrupt-cells = <2>; 97 #interrupt-cells = <2>;
96 interrupts = <05 4 04 4>; /* cascade */ 98 interrupts = <0x5 0x4 0x4 0x4>; /* cascade */
97 interrupt-parent = <&UICB0>; 99 interrupt-parent = <&UICB0>;
98 }; 100 };
99 101
100 102
101 CPC0: cpc { 103 CPC0: cpc {
102 compatible = "ibm,cpc-440gp"; 104 compatible = "ibm,cpc-440gp";
103 dcr-reg = <0b0 003 0e0 010>; 105 dcr-reg = <0x0b0 0x003 0x0e0 0x010>;
104 // FIXME: anything else? 106 // FIXME: anything else?
105 }; 107 };
106 108
107 L2C0: l2c { 109 L2C0: l2c {
108 compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; 110 compatible = "ibm,l2-cache-440gx", "ibm,l2-cache";
109 dcr-reg = <20 8 /* Internal SRAM DCR's */ 111 dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */
110 30 8>; /* L2 cache DCR's */ 112 0x030 0x008>; /* L2 cache DCR's */
111 cache-line-size = <20>; /* 32 bytes */ 113 cache-line-size = <32>; /* 32 bytes */
112 cache-size = <40000>; /* L2, 256K */ 114 cache-size = <262144>; /* L2, 256K */
113 interrupt-parent = <&UIC2>; 115 interrupt-parent = <&UIC2>;
114 interrupts = <17 1>; 116 interrupts = <0x17 0x1>;
115 }; 117 };
116 118
117 plb { 119 plb {
@@ -119,41 +121,41 @@
119 #address-cells = <2>; 121 #address-cells = <2>;
120 #size-cells = <1>; 122 #size-cells = <1>;
121 ranges; 123 ranges;
122 clock-frequency = <9896800>; // 160MHz 124 clock-frequency = <160000000>; // 160MHz
123 125
124 SDRAM0: memory-controller { 126 SDRAM0: memory-controller {
125 compatible = "ibm,sdram-440gp"; 127 compatible = "ibm,sdram-440gp";
126 dcr-reg = <010 2>; 128 dcr-reg = <0x010 0x002>;
127 // FIXME: anything else? 129 // FIXME: anything else?
128 }; 130 };
129 131
130 SRAM0: sram { 132 SRAM0: sram {
131 compatible = "ibm,sram-440gp"; 133 compatible = "ibm,sram-440gp";
132 dcr-reg = <020 8 00a 1>; 134 dcr-reg = <0x020 0x008 0x00a 0x001>;
133 }; 135 };
134 136
135 DMA0: dma { 137 DMA0: dma {
136 // FIXME: ??? 138 // FIXME: ???
137 compatible = "ibm,dma-440gp"; 139 compatible = "ibm,dma-440gp";
138 dcr-reg = <100 027>; 140 dcr-reg = <0x100 0x027>;
139 }; 141 };
140 142
141 MAL0: mcmal { 143 MAL0: mcmal {
142 compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; 144 compatible = "ibm,mcmal-440gx", "ibm,mcmal2";
143 dcr-reg = <180 62>; 145 dcr-reg = <0x180 0x062>;
144 num-tx-chans = <4>; 146 num-tx-chans = <4>;
145 num-rx-chans = <4>; 147 num-rx-chans = <4>;
146 interrupt-parent = <&MAL0>; 148 interrupt-parent = <&MAL0>;
147 interrupts = <0 1 2 3 4>; 149 interrupts = <0x0 0x1 0x2 0x3 0x4>;
148 #interrupt-cells = <1>; 150 #interrupt-cells = <1>;
149 #address-cells = <0>; 151 #address-cells = <0>;
150 #size-cells = <0>; 152 #size-cells = <0>;
151 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 153 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
152 /*RXEOB*/ 1 &UIC0 b 4 154 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
153 /*SERR*/ 2 &UIC1 0 4 155 /*SERR*/ 0x2 &UIC1 0x0 0x4
154 /*TXDE*/ 3 &UIC1 1 4 156 /*TXDE*/ 0x3 &UIC1 0x1 0x4
155 /*RXDE*/ 4 &UIC1 2 4>; 157 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
156 interrupt-map-mask = <ffffffff>; 158 interrupt-map-mask = <0xffffffff>;
157 }; 159 };
158 160
159 POB0: opb { 161 POB0: opb {
@@ -162,29 +164,56 @@
162 #size-cells = <1>; 164 #size-cells = <1>;
163 /* Wish there was a nicer way of specifying a full 32-bit 165 /* Wish there was a nicer way of specifying a full 32-bit
164 range */ 166 range */
165 ranges = <00000000 1 00000000 80000000 167 ranges = <0x00000000 0x00000001 0x00000000 0x80000000
166 80000000 1 80000000 80000000>; 168 0x80000000 0x00000001 0x80000000 0x80000000>;
167 dcr-reg = <090 00b>; 169 dcr-reg = <0x090 0x00b>;
168 interrupt-parent = <&UIC1>; 170 interrupt-parent = <&UIC1>;
169 interrupts = <7 4>; 171 interrupts = <0x7 0x4>;
170 clock-frequency = <4C4B400>; // 80MHz 172 clock-frequency = <80000000>; // 80MHz
171 173
172 174
173 EBC0: ebc { 175 EBC0: ebc {
174 compatible = "ibm,ebc-440gx", "ibm,ebc"; 176 compatible = "ibm,ebc-440gx", "ibm,ebc";
175 dcr-reg = <012 2>; 177 dcr-reg = <0x012 0x002>;
176 #address-cells = <2>; 178 #address-cells = <2>;
177 #size-cells = <1>; 179 #size-cells = <1>;
178 clock-frequency = <4C4B400>; // 80MHz 180 clock-frequency = <80000000>; // 80MHz
179 181
180 /* ranges property is supplied by zImage 182 /* ranges property is supplied by zImage
181 * based on firmware's configuration of the 183 * based on firmware's configuration of the
182 * EBC bridge */ 184 * EBC bridge */
183 185
184 interrupts = <5 4>; 186 interrupts = <0x5 0x4>;
185 interrupt-parent = <&UIC1>; 187 interrupt-parent = <&UIC1>;
186 188
187 /* TODO: Add other EBC devices */ 189 nor_flash@0,0 {
190 compatible = "cfi-flash";
191 bank-width = <4>;
192 device-width = <2>;
193 reg = <0x0 0x0 0x4000000>;
194 #address-cells = <1>;
195 #size-cells = <1>;
196 partition@0 {
197 label = "kernel";
198 reg = <0x0 0x180000>;
199 };
200 partition@180000 {
201 label = "root";
202 reg = <0x180000 0x200000>;
203 };
204 partition@380000 {
205 label = "user";
206 reg = <0x380000 0x3bc0000>;
207 };
208 partition@3f40000 {
209 label = "env";
210 reg = <0x3f40000 0x80000>;
211 };
212 partition@3fc0000 {
213 label = "u-boot";
214 reg = <0x3fc0000 0x40000>;
215 };
216 };
188 }; 217 };
189 218
190 219
@@ -192,103 +221,103 @@
192 UART0: serial@40000200 { 221 UART0: serial@40000200 {
193 device_type = "serial"; 222 device_type = "serial";
194 compatible = "ns16550"; 223 compatible = "ns16550";
195 reg = <40000200 8>; 224 reg = <0x40000200 0x00000008>;
196 virtual-reg = <e0000200>; 225 virtual-reg = <0xe0000200>;
197 clock-frequency = <A8C000>; 226 clock-frequency = <11059200>;
198 current-speed = <1C200>; /* 115200 */ 227 current-speed = <115200>; /* 115200 */
199 interrupt-parent = <&UIC0>; 228 interrupt-parent = <&UIC0>;
200 interrupts = <0 4>; 229 interrupts = <0x0 0x4>;
201 }; 230 };
202 231
203 UART1: serial@40000300 { 232 UART1: serial@40000300 {
204 device_type = "serial"; 233 device_type = "serial";
205 compatible = "ns16550"; 234 compatible = "ns16550";
206 reg = <40000300 8>; 235 reg = <0x40000300 0x00000008>;
207 virtual-reg = <e0000300>; 236 virtual-reg = <0xe0000300>;
208 clock-frequency = <A8C000>; 237 clock-frequency = <11059200>;
209 current-speed = <1C200>; /* 115200 */ 238 current-speed = <115200>; /* 115200 */
210 interrupt-parent = <&UIC0>; 239 interrupt-parent = <&UIC0>;
211 interrupts = <1 4>; 240 interrupts = <0x1 0x4>;
212 }; 241 };
213 242
214 IIC0: i2c@40000400 { 243 IIC0: i2c@40000400 {
215 /* FIXME */ 244 /* FIXME */
216 compatible = "ibm,iic-440gp", "ibm,iic"; 245 compatible = "ibm,iic-440gp", "ibm,iic";
217 reg = <40000400 14>; 246 reg = <0x40000400 0x00000014>;
218 interrupt-parent = <&UIC0>; 247 interrupt-parent = <&UIC0>;
219 interrupts = <2 4>; 248 interrupts = <0x2 0x4>;
220 }; 249 };
221 IIC1: i2c@40000500 { 250 IIC1: i2c@40000500 {
222 /* FIXME */ 251 /* FIXME */
223 compatible = "ibm,iic-440gp", "ibm,iic"; 252 compatible = "ibm,iic-440gp", "ibm,iic";
224 reg = <40000500 14>; 253 reg = <0x40000500 0x00000014>;
225 interrupt-parent = <&UIC0>; 254 interrupt-parent = <&UIC0>;
226 interrupts = <3 4>; 255 interrupts = <0x3 0x4>;
227 }; 256 };
228 257
229 GPIO0: gpio@40000700 { 258 GPIO0: gpio@40000700 {
230 /* FIXME */ 259 /* FIXME */
231 compatible = "ibm,gpio-440gp"; 260 compatible = "ibm,gpio-440gp";
232 reg = <40000700 20>; 261 reg = <0x40000700 0x00000020>;
233 }; 262 };
234 263
235 ZMII0: emac-zmii@40000780 { 264 ZMII0: emac-zmii@40000780 {
236 compatible = "ibm,zmii-440gx", "ibm,zmii"; 265 compatible = "ibm,zmii-440gx", "ibm,zmii";
237 reg = <40000780 c>; 266 reg = <0x40000780 0x0000000c>;
238 }; 267 };
239 268
240 RGMII0: emac-rgmii@40000790 { 269 RGMII0: emac-rgmii@40000790 {
241 compatible = "ibm,rgmii"; 270 compatible = "ibm,rgmii";
242 reg = <40000790 8>; 271 reg = <0x40000790 0x00000008>;
243 }; 272 };
244 273
245 TAH0: emac-tah@40000b50 { 274 TAH0: emac-tah@40000b50 {
246 compatible = "ibm,tah-440gx", "ibm,tah"; 275 compatible = "ibm,tah-440gx", "ibm,tah";
247 reg = <40000b50 30>; 276 reg = <0x40000b50 0x00000030>;
248 }; 277 };
249 278
250 TAH1: emac-tah@40000d50 { 279 TAH1: emac-tah@40000d50 {
251 compatible = "ibm,tah-440gx", "ibm,tah"; 280 compatible = "ibm,tah-440gx", "ibm,tah";
252 reg = <40000d50 30>; 281 reg = <0x40000d50 0x00000030>;
253 }; 282 };
254 283
255 EMAC0: ethernet@40000800 { 284 EMAC0: ethernet@40000800 {
256 unused = <1>; 285 unused = <0x1>;
257 device_type = "network"; 286 device_type = "network";
258 compatible = "ibm,emac-440gx", "ibm,emac4"; 287 compatible = "ibm,emac-440gx", "ibm,emac4";
259 interrupt-parent = <&UIC1>; 288 interrupt-parent = <&UIC1>;
260 interrupts = <1c 4 1d 4>; 289 interrupts = <0x1c 0x4 0x1d 0x4>;
261 reg = <40000800 70>; 290 reg = <0x40000800 0x00000074>;
262 local-mac-address = [000000000000]; // Filled in by zImage 291 local-mac-address = [000000000000]; // Filled in by zImage
263 mal-device = <&MAL0>; 292 mal-device = <&MAL0>;
264 mal-tx-channel = <0>; 293 mal-tx-channel = <0>;
265 mal-rx-channel = <0>; 294 mal-rx-channel = <0>;
266 cell-index = <0>; 295 cell-index = <0>;
267 max-frame-size = <5dc>; 296 max-frame-size = <1500>;
268 rx-fifo-size = <1000>; 297 rx-fifo-size = <4096>;
269 tx-fifo-size = <800>; 298 tx-fifo-size = <2048>;
270 phy-mode = "rmii"; 299 phy-mode = "rmii";
271 phy-map = <00000001>; 300 phy-map = <0x00000001>;
272 zmii-device = <&ZMII0>; 301 zmii-device = <&ZMII0>;
273 zmii-channel = <0>; 302 zmii-channel = <0>;
274 }; 303 };
275 EMAC1: ethernet@40000900 { 304 EMAC1: ethernet@40000900 {
276 unused = <1>; 305 unused = <0x1>;
277 device_type = "network"; 306 device_type = "network";
278 compatible = "ibm,emac-440gx", "ibm,emac4"; 307 compatible = "ibm,emac-440gx", "ibm,emac4";
279 interrupt-parent = <&UIC1>; 308 interrupt-parent = <&UIC1>;
280 interrupts = <1e 4 1f 4>; 309 interrupts = <0x1e 0x4 0x1f 0x4>;
281 reg = <40000900 70>; 310 reg = <0x40000900 0x00000074>;
282 local-mac-address = [000000000000]; // Filled in by zImage 311 local-mac-address = [000000000000]; // Filled in by zImage
283 mal-device = <&MAL0>; 312 mal-device = <&MAL0>;
284 mal-tx-channel = <1>; 313 mal-tx-channel = <1>;
285 mal-rx-channel = <1>; 314 mal-rx-channel = <1>;
286 cell-index = <1>; 315 cell-index = <1>;
287 max-frame-size = <5dc>; 316 max-frame-size = <1500>;
288 rx-fifo-size = <1000>; 317 rx-fifo-size = <4096>;
289 tx-fifo-size = <800>; 318 tx-fifo-size = <2048>;
290 phy-mode = "rmii"; 319 phy-mode = "rmii";
291 phy-map = <00000001>; 320 phy-map = <0x00000001>;
292 zmii-device = <&ZMII0>; 321 zmii-device = <&ZMII0>;
293 zmii-channel = <1>; 322 zmii-channel = <1>;
294 }; 323 };
@@ -297,18 +326,18 @@
297 device_type = "network"; 326 device_type = "network";
298 compatible = "ibm,emac-440gx", "ibm,emac4"; 327 compatible = "ibm,emac-440gx", "ibm,emac4";
299 interrupt-parent = <&UIC2>; 328 interrupt-parent = <&UIC2>;
300 interrupts = <0 4 1 4>; 329 interrupts = <0x0 0x4 0x1 0x4>;
301 reg = <40000c00 70>; 330 reg = <0x40000c00 0x00000074>;
302 local-mac-address = [000000000000]; // Filled in by zImage 331 local-mac-address = [000000000000]; // Filled in by zImage
303 mal-device = <&MAL0>; 332 mal-device = <&MAL0>;
304 mal-tx-channel = <2>; 333 mal-tx-channel = <2>;
305 mal-rx-channel = <2>; 334 mal-rx-channel = <2>;
306 cell-index = <2>; 335 cell-index = <2>;
307 max-frame-size = <2328>; 336 max-frame-size = <9000>;
308 rx-fifo-size = <1000>; 337 rx-fifo-size = <4096>;
309 tx-fifo-size = <800>; 338 tx-fifo-size = <2048>;
310 phy-mode = "rgmii"; 339 phy-mode = "rgmii";
311 phy-map = <00000001>; 340 phy-map = <0x00000001>;
312 rgmii-device = <&RGMII0>; 341 rgmii-device = <&RGMII0>;
313 rgmii-channel = <0>; 342 rgmii-channel = <0>;
314 zmii-device = <&ZMII0>; 343 zmii-device = <&ZMII0>;
@@ -321,18 +350,18 @@
321 device_type = "network"; 350 device_type = "network";
322 compatible = "ibm,emac-440gx", "ibm,emac4"; 351 compatible = "ibm,emac-440gx", "ibm,emac4";
323 interrupt-parent = <&UIC2>; 352 interrupt-parent = <&UIC2>;
324 interrupts = <2 4 3 4>; 353 interrupts = <0x2 0x4 0x3 0x4>;
325 reg = <40000e00 70>; 354 reg = <0x40000e00 0x00000074>;
326 local-mac-address = [000000000000]; // Filled in by zImage 355 local-mac-address = [000000000000]; // Filled in by zImage
327 mal-device = <&MAL0>; 356 mal-device = <&MAL0>;
328 mal-tx-channel = <3>; 357 mal-tx-channel = <3>;
329 mal-rx-channel = <3>; 358 mal-rx-channel = <3>;
330 cell-index = <3>; 359 cell-index = <3>;
331 max-frame-size = <2328>; 360 max-frame-size = <9000>;
332 rx-fifo-size = <1000>; 361 rx-fifo-size = <4096>;
333 tx-fifo-size = <800>; 362 tx-fifo-size = <2048>;
334 phy-mode = "rgmii"; 363 phy-mode = "rgmii";
335 phy-map = <00000003>; 364 phy-map = <0x00000003>;
336 rgmii-device = <&RGMII0>; 365 rgmii-device = <&RGMII0>;
337 rgmii-channel = <1>; 366 rgmii-channel = <1>;
338 zmii-device = <&ZMII0>; 367 zmii-device = <&ZMII0>;
@@ -344,9 +373,9 @@
344 373
345 GPT0: gpt@40000a00 { 374 GPT0: gpt@40000a00 {
346 /* FIXME */ 375 /* FIXME */
347 reg = <40000a00 d4>; 376 reg = <0x40000a00 0x000000d4>;
348 interrupt-parent = <&UIC0>; 377 interrupt-parent = <&UIC0>;
349 interrupts = <12 4 13 4 14 4 15 4 16 4>; 378 interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>;
350 }; 379 };
351 380
352 }; 381 };
@@ -360,34 +389,34 @@
360 primary; 389 primary;
361 large-inbound-windows; 390 large-inbound-windows;
362 enable-msi-hole; 391 enable-msi-hole;
363 reg = <2 0ec00000 8 /* Config space access */ 392 reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */
364 0 0 0 /* no IACK cycles */ 393 0x00000000 0x00000000 0x00000000 /* no IACK cycles */
365 2 0ed00000 4 /* Special cycles */ 394 0x00000002 0x0ed00000 0x00000004 /* Special cycles */
366 2 0ec80000 100 /* Internal registers */ 395 0x00000002 0x0ec80000 0x00000100 /* Internal registers */
367 2 0ec80100 fc>; /* Internal messaging registers */ 396 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */
368 397
369 /* Outbound ranges, one memory and one IO, 398 /* Outbound ranges, one memory and one IO,
370 * later cannot be changed 399 * later cannot be changed
371 */ 400 */
372 ranges = <02000000 0 80000000 00000003 80000000 0 80000000 401 ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000
373 01000000 0 00000000 00000002 08000000 0 00010000>; 402 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>;
374 403
375 /* Inbound 2GB range starting at 0 */ 404 /* Inbound 2GB range starting at 0 */
376 dma-ranges = <42000000 0 0 0 0 0 80000000>; 405 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
377 406
378 interrupt-map-mask = <f800 0 0 7>; 407 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
379 interrupt-map = < 408 interrupt-map = <
380 /* IDSEL 1 */ 409 /* IDSEL 1 */
381 0800 0 0 1 &UIC0 17 8 410 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8
382 0800 0 0 2 &UIC0 18 8 411 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8
383 0800 0 0 3 &UIC0 19 8 412 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8
384 0800 0 0 4 &UIC0 1a 8 413 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8
385 414
386 /* IDSEL 2 */ 415 /* IDSEL 2 */
387 1000 0 0 1 &UIC0 18 8 416 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8
388 1000 0 0 2 &UIC0 19 8 417 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8
389 1000 0 0 3 &UIC0 1a 8 418 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8
390 1000 0 0 4 &UIC0 17 8 419 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8
391 >; 420 >;
392 }; 421 };
393 }; 422 };
diff --git a/arch/powerpc/boot/dts/tqm5200.dts b/arch/powerpc/boot/dts/tqm5200.dts
index 773a68e00058..3008bf8830c1 100644
--- a/arch/powerpc/boot/dts/tqm5200.dts
+++ b/arch/powerpc/boot/dts/tqm5200.dts
@@ -70,6 +70,20 @@
70 fsl,has-wdt; 70 fsl,has-wdt;
71 }; 71 };
72 72
73 can@900 {
74 compatible = "fsl,mpc5200-mscan";
75 interrupts = <2 17 0>;
76 interrupt-parent = <&mpc5200_pic>;
77 reg = <0x900 0x80>;
78 };
79
80 can@980 {
81 compatible = "fsl,mpc5200-mscan";
82 interrupts = <2 18 0>;
83 interrupt-parent = <&mpc5200_pic>;
84 reg = <0x980 0x80>;
85 };
86
73 gpio@b00 { 87 gpio@b00 {
74 compatible = "fsl,mpc5200-gpio"; 88 compatible = "fsl,mpc5200-gpio";
75 reg = <0xb00 0x40>; 89 reg = <0xb00 0x40>;
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts
index 1addb3ae719e..e1d260b9085e 100644
--- a/arch/powerpc/boot/dts/tqm8540.dts
+++ b/arch/powerpc/boot/dts/tqm8540.dts
@@ -12,8 +12,8 @@
12/dts-v1/; 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "tqm,8540"; 15 model = "tqc,tqm8540";
16 compatible = "tqm,8540", "tqm,85xx"; 16 compatible = "tqc,tqm8540";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
@@ -40,6 +40,7 @@
40 timebase-frequency = <0>; 40 timebase-frequency = <0>;
41 bus-frequency = <0>; 41 bus-frequency = <0>;
42 clock-frequency = <0>; 42 clock-frequency = <0>;
43 next-level-cache = <&L2>;
43 }; 44 };
44 }; 45 };
45 46
@@ -64,7 +65,7 @@
64 interrupts = <18 2>; 65 interrupts = <18 2>;
65 }; 66 };
66 67
67 l2-cache-controller@20000 { 68 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 69 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 70 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; 71 cache-line-size = <32>;
@@ -89,6 +90,47 @@
89 }; 90 };
90 }; 91 };
91 92
93 dma@21300 {
94 #address-cells = <1>;
95 #size-cells = <1>;
96 compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma";
97 reg = <0x21300 0x4>;
98 ranges = <0x0 0x21100 0x200>;
99 cell-index = <0>;
100 dma-channel@0 {
101 compatible = "fsl,mpc8540-dma-channel",
102 "fsl,eloplus-dma-channel";
103 reg = <0x0 0x80>;
104 cell-index = <0>;
105 interrupt-parent = <&mpic>;
106 interrupts = <20 2>;
107 };
108 dma-channel@80 {
109 compatible = "fsl,mpc8540-dma-channel",
110 "fsl,eloplus-dma-channel";
111 reg = <0x80 0x80>;
112 cell-index = <1>;
113 interrupt-parent = <&mpic>;
114 interrupts = <21 2>;
115 };
116 dma-channel@100 {
117 compatible = "fsl,mpc8540-dma-channel",
118 "fsl,eloplus-dma-channel";
119 reg = <0x100 0x80>;
120 cell-index = <2>;
121 interrupt-parent = <&mpic>;
122 interrupts = <22 2>;
123 };
124 dma-channel@180 {
125 compatible = "fsl,mpc8540-dma-channel",
126 "fsl,eloplus-dma-channel";
127 reg = <0x180 0x80>;
128 cell-index = <3>;
129 interrupt-parent = <&mpic>;
130 interrupts = <23 2>;
131 };
132 };
133
92 mdio@24520 { 134 mdio@24520 {
93 #address-cells = <1>; 135 #address-cells = <1>;
94 #size-cells = <0>; 136 #size-cells = <0>;
@@ -177,6 +219,7 @@
177 #interrupt-cells = <2>; 219 #interrupt-cells = <2>;
178 reg = <0x40000 0x40000>; 220 reg = <0x40000 0x40000>;
179 device_type = "open-pic"; 221 device_type = "open-pic";
222 compatible = "chrp,open-pic";
180 }; 223 };
181 }; 224 };
182 225
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts
index 9e01093f496e..d76441ec5dc7 100644
--- a/arch/powerpc/boot/dts/tqm8541.dts
+++ b/arch/powerpc/boot/dts/tqm8541.dts
@@ -12,8 +12,8 @@
12/dts-v1/; 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "tqm,8541"; 15 model = "tqc,tqm8541";
16 compatible = "tqm,8541", "tqm,85xx"; 16 compatible = "tqc,tqm8541";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
@@ -39,6 +39,7 @@
39 timebase-frequency = <0>; 39 timebase-frequency = <0>;
40 bus-frequency = <0>; 40 bus-frequency = <0>;
41 clock-frequency = <0>; 41 clock-frequency = <0>;
42 next-level-cache = <&L2>;
42 }; 43 };
43 }; 44 };
44 45
@@ -63,7 +64,7 @@
63 interrupts = <18 2>; 64 interrupts = <18 2>;
64 }; 65 };
65 66
66 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,8540-l2-cache-controller";
68 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; 70 cache-line-size = <32>;
@@ -88,6 +89,47 @@
88 }; 89 };
89 }; 90 };
90 91
92 dma@21300 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma";
96 reg = <0x21300 0x4>;
97 ranges = <0x0 0x21100 0x200>;
98 cell-index = <0>;
99 dma-channel@0 {
100 compatible = "fsl,mpc8541-dma-channel",
101 "fsl,eloplus-dma-channel";
102 reg = <0x0 0x80>;
103 cell-index = <0>;
104 interrupt-parent = <&mpic>;
105 interrupts = <20 2>;
106 };
107 dma-channel@80 {
108 compatible = "fsl,mpc8541-dma-channel",
109 "fsl,eloplus-dma-channel";
110 reg = <0x80 0x80>;
111 cell-index = <1>;
112 interrupt-parent = <&mpic>;
113 interrupts = <21 2>;
114 };
115 dma-channel@100 {
116 compatible = "fsl,mpc8541-dma-channel",
117 "fsl,eloplus-dma-channel";
118 reg = <0x100 0x80>;
119 cell-index = <2>;
120 interrupt-parent = <&mpic>;
121 interrupts = <22 2>;
122 };
123 dma-channel@180 {
124 compatible = "fsl,mpc8541-dma-channel",
125 "fsl,eloplus-dma-channel";
126 reg = <0x180 0x80>;
127 cell-index = <3>;
128 interrupt-parent = <&mpic>;
129 interrupts = <23 2>;
130 };
131 };
132
91 mdio@24520 { 133 mdio@24520 {
92 #address-cells = <1>; 134 #address-cells = <1>;
93 #size-cells = <0>; 135 #size-cells = <0>;
@@ -158,12 +200,24 @@
158 interrupt-parent = <&mpic>; 200 interrupt-parent = <&mpic>;
159 }; 201 };
160 202
203 crypto@30000 {
204 compatible = "fsl,sec2.0";
205 reg = <0x30000 0x10000>;
206 interrupts = <45 2>;
207 interrupt-parent = <&mpic>;
208 fsl,num-channels = <4>;
209 fsl,channel-fifo-len = <24>;
210 fsl,exec-units-mask = <0x7e>;
211 fsl,descriptor-types-mask = <0x01010ebf>;
212 };
213
161 mpic: pic@40000 { 214 mpic: pic@40000 {
162 interrupt-controller; 215 interrupt-controller;
163 #address-cells = <0>; 216 #address-cells = <0>;
164 #interrupt-cells = <2>; 217 #interrupt-cells = <2>;
165 reg = <0x40000 0x40000>; 218 reg = <0x40000 0x40000>;
166 device_type = "open-pic"; 219 device_type = "open-pic";
220 compatible = "chrp,open-pic";
167 }; 221 };
168 222
169 cpm@919c0 { 223 cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
new file mode 100644
index 000000000000..64d2d5bbcdf1
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts
@@ -0,0 +1,406 @@
1/*
2 * TQM8548 Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14
15/ {
16 model = "tqc,tqm8548";
17 compatible = "tqc,tqm8548";
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 aliases {
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 ethernet2 = &enet2;
25 ethernet3 = &enet3;
26
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 pci1 = &pci1;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 PowerPC,8548@0 {
38 device_type = "cpu";
39 reg = <0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
44 next-level-cache = <&L2>;
45 };
46 };
47
48 memory {
49 device_type = "memory";
50 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
51 };
52
53 soc8548@a0000000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 device_type = "soc";
57 ranges = <0x0 0xa0000000 0x100000>;
58 reg = <0xa0000000 0x1000>; // CCSRBAR
59 bus-frequency = <0>;
60
61 memory-controller@2000 {
62 compatible = "fsl,mpc8548-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>;
66 };
67
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,mpc8548-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>; // 32 bytes
72 cache-size = <0x80000>; // L2, 512K
73 interrupt-parent = <&mpic>;
74 interrupts = <16 2>;
75 };
76
77 i2c@3000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <0>;
81 compatible = "fsl-i2c";
82 reg = <0x3000 0x100>;
83 interrupts = <43 2>;
84 interrupt-parent = <&mpic>;
85 dfsrr;
86 };
87
88 i2c@3100 {
89 #address-cells = <1>;
90 #size-cells = <0>;
91 cell-index = <1>;
92 compatible = "fsl-i2c";
93 reg = <0x3100 0x100>;
94 interrupts = <43 2>;
95 interrupt-parent = <&mpic>;
96 dfsrr;
97 };
98
99 dma@21300 {
100 #address-cells = <1>;
101 #size-cells = <1>;
102 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
103 reg = <0x21300 0x4>;
104 ranges = <0x0 0x21100 0x200>;
105 cell-index = <0>;
106 dma-channel@0 {
107 compatible = "fsl,mpc8548-dma-channel",
108 "fsl,eloplus-dma-channel";
109 reg = <0x0 0x80>;
110 cell-index = <0>;
111 interrupt-parent = <&mpic>;
112 interrupts = <20 2>;
113 };
114 dma-channel@80 {
115 compatible = "fsl,mpc8548-dma-channel",
116 "fsl,eloplus-dma-channel";
117 reg = <0x80 0x80>;
118 cell-index = <1>;
119 interrupt-parent = <&mpic>;
120 interrupts = <21 2>;
121 };
122 dma-channel@100 {
123 compatible = "fsl,mpc8548-dma-channel",
124 "fsl,eloplus-dma-channel";
125 reg = <0x100 0x80>;
126 cell-index = <2>;
127 interrupt-parent = <&mpic>;
128 interrupts = <22 2>;
129 };
130 dma-channel@180 {
131 compatible = "fsl,mpc8548-dma-channel",
132 "fsl,eloplus-dma-channel";
133 reg = <0x180 0x80>;
134 cell-index = <3>;
135 interrupt-parent = <&mpic>;
136 interrupts = <23 2>;
137 };
138 };
139
140 mdio@24520 {
141 #address-cells = <1>;
142 #size-cells = <0>;
143 compatible = "fsl,gianfar-mdio";
144 reg = <0x24520 0x20>;
145
146 phy1: ethernet-phy@0 {
147 interrupt-parent = <&mpic>;
148 interrupts = <8 1>;
149 reg = <1>;
150 device_type = "ethernet-phy";
151 };
152 phy2: ethernet-phy@1 {
153 interrupt-parent = <&mpic>;
154 interrupts = <8 1>;
155 reg = <2>;
156 device_type = "ethernet-phy";
157 };
158 phy3: ethernet-phy@3 {
159 interrupt-parent = <&mpic>;
160 interrupts = <8 1>;
161 reg = <3>;
162 device_type = "ethernet-phy";
163 };
164 phy4: ethernet-phy@4 {
165 interrupt-parent = <&mpic>;
166 interrupts = <8 1>;
167 reg = <4>;
168 device_type = "ethernet-phy";
169 };
170 phy5: ethernet-phy@5 {
171 interrupt-parent = <&mpic>;
172 interrupts = <8 1>;
173 reg = <5>;
174 device_type = "ethernet-phy";
175 };
176 };
177
178 enet0: ethernet@24000 {
179 cell-index = <0>;
180 device_type = "network";
181 model = "eTSEC";
182 compatible = "gianfar";
183 reg = <0x24000 0x1000>;
184 local-mac-address = [ 00 00 00 00 00 00 ];
185 interrupts = <29 2 30 2 34 2>;
186 interrupt-parent = <&mpic>;
187 phy-handle = <&phy2>;
188 };
189
190 enet1: ethernet@25000 {
191 cell-index = <1>;
192 device_type = "network";
193 model = "eTSEC";
194 compatible = "gianfar";
195 reg = <0x25000 0x1000>;
196 local-mac-address = [ 00 00 00 00 00 00 ];
197 interrupts = <35 2 36 2 40 2>;
198 interrupt-parent = <&mpic>;
199 phy-handle = <&phy1>;
200 };
201
202 enet2: ethernet@26000 {
203 cell-index = <2>;
204 device_type = "network";
205 model = "eTSEC";
206 compatible = "gianfar";
207 reg = <0x26000 0x1000>;
208 local-mac-address = [ 00 00 00 00 00 00 ];
209 interrupts = <31 2 32 2 33 2>;
210 interrupt-parent = <&mpic>;
211 phy-handle = <&phy3>;
212 };
213
214 enet3: ethernet@27000 {
215 cell-index = <3>;
216 device_type = "network";
217 model = "eTSEC";
218 compatible = "gianfar";
219 reg = <0x27000 0x1000>;
220 local-mac-address = [ 00 00 00 00 00 00 ];
221 interrupts = <37 2 38 2 39 2>;
222 interrupt-parent = <&mpic>;
223 phy-handle = <&phy4>;
224 };
225
226 serial0: serial@4500 {
227 cell-index = <0>;
228 device_type = "serial";
229 compatible = "ns16550";
230 reg = <0x4500 0x100>; // reg base, size
231 clock-frequency = <0>; // should we fill in in uboot?
232 current-speed = <115200>;
233 interrupts = <42 2>;
234 interrupt-parent = <&mpic>;
235 };
236
237 serial1: serial@4600 {
238 cell-index = <1>;
239 device_type = "serial";
240 compatible = "ns16550";
241 reg = <0x4600 0x100>; // reg base, size
242 clock-frequency = <0>; // should we fill in in uboot?
243 current-speed = <115200>;
244 interrupts = <42 2>;
245 interrupt-parent = <&mpic>;
246 };
247
248 global-utilities@e0000 { // global utilities reg
249 compatible = "fsl,mpc8548-guts";
250 reg = <0xe0000 0x1000>;
251 fsl,has-rstcr;
252 };
253
254 mpic: pic@40000 {
255 interrupt-controller;
256 #address-cells = <0>;
257 #interrupt-cells = <2>;
258 reg = <0x40000 0x40000>;
259 compatible = "chrp,open-pic";
260 device_type = "open-pic";
261 };
262 };
263
264 localbus@a0005000 {
265 compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
266 "simple-bus";
267 #address-cells = <2>;
268 #size-cells = <1>;
269 reg = <0xa0005000 0x100>; // BRx, ORx, etc.
270
271 ranges = <
272 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
273 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
274 2 0x0 0xa3000000 0x00008000 // CAN (2 x i82527)
275 3 0x0 0xa3010000 0x00008000 // NAND FLASH
276
277 >;
278
279 flash@1,0 {
280 #address-cells = <1>;
281 #size-cells = <1>;
282 compatible = "cfi-flash";
283 reg = <1 0x0 0x8000000>;
284 bank-width = <4>;
285 device-width = <1>;
286
287 partition@0 {
288 label = "kernel";
289 reg = <0x00000000 0x00200000>;
290 };
291 partition@200000 {
292 label = "root";
293 reg = <0x00200000 0x00300000>;
294 };
295 partition@500000 {
296 label = "user";
297 reg = <0x00500000 0x07a00000>;
298 };
299 partition@7f00000 {
300 label = "env1";
301 reg = <0x07f00000 0x00040000>;
302 };
303 partition@7f40000 {
304 label = "env2";
305 reg = <0x07f40000 0x00040000>;
306 };
307 partition@7f80000 {
308 label = "u-boot";
309 reg = <0x07f80000 0x00080000>;
310 read-only;
311 };
312 };
313
314 /* Note: CAN support needs be enabled in U-Boot */
315 can0@2,0 {
316 compatible = "intel,82527"; // Bosch CC770
317 reg = <2 0x0 0x100>;
318 interrupts = <4 0>;
319 interrupt-parent = <&mpic>;
320 };
321
322 can1@2,100 {
323 compatible = "intel,82527"; // Bosch CC770
324 reg = <2 0x100 0x100>;
325 interrupts = <4 0>;
326 interrupt-parent = <&mpic>;
327 };
328
329 /* Note: NAND support needs to be enabled in U-Boot */
330 upm@3,0 {
331 #address-cells = <0>;
332 #size-cells = <0>;
333 compatible = "fsl,upm-nand";
334 reg = <3 0x0 0x800>;
335 fsl,upm-addr-offset = <0x10>;
336 fsl,upm-cmd-offset = <0x08>;
337 chip-delay = <25>; // in micro-seconds
338
339 nand@0 {
340 #address-cells = <1>;
341 #size-cells = <1>;
342
343 partition@0 {
344 label = "fs";
345 reg = <0x00000000 0x01000000>;
346 };
347 };
348 };
349 };
350
351 pci0: pci@a0008000 {
352 cell-index = <0>;
353 #interrupt-cells = <1>;
354 #size-cells = <2>;
355 #address-cells = <3>;
356 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
357 device_type = "pci";
358 reg = <0xa0008000 0x1000>;
359 clock-frequency = <33333333>;
360 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
361 interrupt-map = <
362 /* IDSEL 28 */
363 0xe000 0 0 1 &mpic 2 1
364 0xe000 0 0 2 &mpic 3 1>;
365
366 interrupt-parent = <&mpic>;
367 interrupts = <24 2>;
368 bus-range = <0 0>;
369 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
370 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>;
371 };
372
373 pci1: pcie@a000a000 {
374 cell-index = <2>;
375 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
376 interrupt-map = <
377 /* IDSEL 0x0 (PEX) */
378 0x00000 0 0 1 &mpic 0 1
379 0x00000 0 0 2 &mpic 1 1
380 0x00000 0 0 3 &mpic 2 1
381 0x00000 0 0 4 &mpic 3 1>;
382
383 interrupt-parent = <&mpic>;
384 interrupts = <26 2>;
385 bus-range = <0 0xff>;
386 ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000
387 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>;
388 clock-frequency = <33333333>;
389 #interrupt-cells = <1>;
390 #size-cells = <2>;
391 #address-cells = <3>;
392 reg = <0xa000a000 0x1000>;
393 compatible = "fsl,mpc8548-pcie";
394 device_type = "pci";
395 pcie@0 {
396 reg = <0 0 0 0 0>;
397 #size-cells = <2>;
398 #address-cells = <3>;
399 device_type = "pci";
400 ranges = <0x02000000 0 0xb0000000 0x02000000 0
401 0xb0000000 0 0x10000000
402 0x01000000 0 0x00000000 0x01000000 0
403 0x00000000 0 0x08000000>;
404 };
405 };
406};
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts
new file mode 100644
index 000000000000..2563112cabd3
--- /dev/null
+++ b/arch/powerpc/boot/dts/tqm8548.dts
@@ -0,0 +1,411 @@
1/*
2 * TQM8548 Device Tree Source
3 *
4 * Copyright 2006 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@denx.de>
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License as published by the
9 * Free Software Foundation; either version 2 of the License, or (at your
10 * option) any later version.
11 */
12
13/dts-v1/;
14
15/ {
16 model = "tqc,tqm8548";
17 compatible = "tqc,tqm8548";
18 #address-cells = <1>;
19 #size-cells = <1>;
20
21 aliases {
22 ethernet0 = &enet0;
23 ethernet1 = &enet1;
24 ethernet2 = &enet2;
25 ethernet3 = &enet3;
26
27 serial0 = &serial0;
28 serial1 = &serial1;
29 pci0 = &pci0;
30 pci1 = &pci1;
31 };
32
33 cpus {
34 #address-cells = <1>;
35 #size-cells = <0>;
36
37 PowerPC,8548@0 {
38 device_type = "cpu";
39 reg = <0>;
40 d-cache-line-size = <32>; // 32 bytes
41 i-cache-line-size = <32>; // 32 bytes
42 d-cache-size = <0x8000>; // L1, 32K
43 i-cache-size = <0x8000>; // L1, 32K
44 next-level-cache = <&L2>;
45 };
46 };
47
48 memory {
49 device_type = "memory";
50 reg = <0x00000000 0x00000000>; // Filled in by U-Boot
51 };
52
53 soc8548@e0000000 {
54 #address-cells = <1>;
55 #size-cells = <1>;
56 device_type = "soc";
57 ranges = <0x0 0xe0000000 0x100000>;
58 reg = <0xe0000000 0x1000>; // CCSRBAR
59 bus-frequency = <0>;
60
61 memory-controller@2000 {
62 compatible = "fsl,mpc8548-memory-controller";
63 reg = <0x2000 0x1000>;
64 interrupt-parent = <&mpic>;
65 interrupts = <18 2>;
66 };
67
68 L2: l2-cache-controller@20000 {
69 compatible = "fsl,mpc8548-l2-cache-controller";
70 reg = <0x20000 0x1000>;
71 cache-line-size = <32>; // 32 bytes
72 cache-size = <0x80000>; // L2, 512K
73 interrupt-parent = <&mpic>;
74 interrupts = <16 2>;
75 };
76
77 i2c@3000 {
78 #address-cells = <1>;
79 #size-cells = <0>;
80 cell-index = <0>;
81 compatible = "fsl-i2c";
82 reg = <0x3000 0x100>;
83 interrupts = <43 2>;
84 interrupt-parent = <&mpic>;
85 dfsrr;
86
87 rtc@68 {
88 compatible = "dallas,ds1337";
89 reg = <0x68>;
90 };
91 };
92
93 i2c@3100 {
94 #address-cells = <1>;
95 #size-cells = <0>;
96 cell-index = <1>;
97 compatible = "fsl-i2c";
98 reg = <0x3100 0x100>;
99 interrupts = <43 2>;
100 interrupt-parent = <&mpic>;
101 dfsrr;
102 };
103
104 dma@21300 {
105 #address-cells = <1>;
106 #size-cells = <1>;
107 compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma";
108 reg = <0x21300 0x4>;
109 ranges = <0x0 0x21100 0x200>;
110 cell-index = <0>;
111 dma-channel@0 {
112 compatible = "fsl,mpc8548-dma-channel",
113 "fsl,eloplus-dma-channel";
114 reg = <0x0 0x80>;
115 cell-index = <0>;
116 interrupt-parent = <&mpic>;
117 interrupts = <20 2>;
118 };
119 dma-channel@80 {
120 compatible = "fsl,mpc8548-dma-channel",
121 "fsl,eloplus-dma-channel";
122 reg = <0x80 0x80>;
123 cell-index = <1>;
124 interrupt-parent = <&mpic>;
125 interrupts = <21 2>;
126 };
127 dma-channel@100 {
128 compatible = "fsl,mpc8548-dma-channel",
129 "fsl,eloplus-dma-channel";
130 reg = <0x100 0x80>;
131 cell-index = <2>;
132 interrupt-parent = <&mpic>;
133 interrupts = <22 2>;
134 };
135 dma-channel@180 {
136 compatible = "fsl,mpc8548-dma-channel",
137 "fsl,eloplus-dma-channel";
138 reg = <0x180 0x80>;
139 cell-index = <3>;
140 interrupt-parent = <&mpic>;
141 interrupts = <23 2>;
142 };
143 };
144
145 mdio@24520 {
146 #address-cells = <1>;
147 #size-cells = <0>;
148 compatible = "fsl,gianfar-mdio";
149 reg = <0x24520 0x20>;
150
151 phy1: ethernet-phy@0 {
152 interrupt-parent = <&mpic>;
153 interrupts = <8 1>;
154 reg = <1>;
155 device_type = "ethernet-phy";
156 };
157 phy2: ethernet-phy@1 {
158 interrupt-parent = <&mpic>;
159 interrupts = <8 1>;
160 reg = <2>;
161 device_type = "ethernet-phy";
162 };
163 phy3: ethernet-phy@3 {
164 interrupt-parent = <&mpic>;
165 interrupts = <8 1>;
166 reg = <3>;
167 device_type = "ethernet-phy";
168 };
169 phy4: ethernet-phy@4 {
170 interrupt-parent = <&mpic>;
171 interrupts = <8 1>;
172 reg = <4>;
173 device_type = "ethernet-phy";
174 };
175 phy5: ethernet-phy@5 {
176 interrupt-parent = <&mpic>;
177 interrupts = <8 1>;
178 reg = <5>;
179 device_type = "ethernet-phy";
180 };
181 };
182
183 enet0: ethernet@24000 {
184 cell-index = <0>;
185 device_type = "network";
186 model = "eTSEC";
187 compatible = "gianfar";
188 reg = <0x24000 0x1000>;
189 local-mac-address = [ 00 00 00 00 00 00 ];
190 interrupts = <29 2 30 2 34 2>;
191 interrupt-parent = <&mpic>;
192 phy-handle = <&phy2>;
193 };
194
195 enet1: ethernet@25000 {
196 cell-index = <1>;
197 device_type = "network";
198 model = "eTSEC";
199 compatible = "gianfar";
200 reg = <0x25000 0x1000>;
201 local-mac-address = [ 00 00 00 00 00 00 ];
202 interrupts = <35 2 36 2 40 2>;
203 interrupt-parent = <&mpic>;
204 phy-handle = <&phy1>;
205 };
206
207 enet2: ethernet@26000 {
208 cell-index = <2>;
209 device_type = "network";
210 model = "eTSEC";
211 compatible = "gianfar";
212 reg = <0x26000 0x1000>;
213 local-mac-address = [ 00 00 00 00 00 00 ];
214 interrupts = <31 2 32 2 33 2>;
215 interrupt-parent = <&mpic>;
216 phy-handle = <&phy3>;
217 };
218
219 enet3: ethernet@27000 {
220 cell-index = <3>;
221 device_type = "network";
222 model = "eTSEC";
223 compatible = "gianfar";
224 reg = <0x27000 0x1000>;
225 local-mac-address = [ 00 00 00 00 00 00 ];
226 interrupts = <37 2 38 2 39 2>;
227 interrupt-parent = <&mpic>;
228 phy-handle = <&phy4>;
229 };
230
231 serial0: serial@4500 {
232 cell-index = <0>;
233 device_type = "serial";
234 compatible = "ns16550";
235 reg = <0x4500 0x100>; // reg base, size
236 clock-frequency = <0>; // should we fill in in uboot?
237 current-speed = <115200>;
238 interrupts = <42 2>;
239 interrupt-parent = <&mpic>;
240 };
241
242 serial1: serial@4600 {
243 cell-index = <1>;
244 device_type = "serial";
245 compatible = "ns16550";
246 reg = <0x4600 0x100>; // reg base, size
247 clock-frequency = <0>; // should we fill in in uboot?
248 current-speed = <115200>;
249 interrupts = <42 2>;
250 interrupt-parent = <&mpic>;
251 };
252
253 global-utilities@e0000 { // global utilities reg
254 compatible = "fsl,mpc8548-guts";
255 reg = <0xe0000 0x1000>;
256 fsl,has-rstcr;
257 };
258
259 mpic: pic@40000 {
260 interrupt-controller;
261 #address-cells = <0>;
262 #interrupt-cells = <2>;
263 reg = <0x40000 0x40000>;
264 compatible = "chrp,open-pic";
265 device_type = "open-pic";
266 };
267 };
268
269 localbus@e0005000 {
270 compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus",
271 "simple-bus";
272 #address-cells = <2>;
273 #size-cells = <1>;
274 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
275
276 ranges = <
277 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
278 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
279 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
280 3 0x0 0xe3010000 0x00008000 // NAND FLASH
281
282 >;
283
284 flash@1,0 {
285 #address-cells = <1>;
286 #size-cells = <1>;
287 compatible = "cfi-flash";
288 reg = <1 0x0 0x8000000>;
289 bank-width = <4>;
290 device-width = <1>;
291
292 partition@0 {
293 label = "kernel";
294 reg = <0x00000000 0x00200000>;
295 };
296 partition@200000 {
297 label = "root";
298 reg = <0x00200000 0x00300000>;
299 };
300 partition@500000 {
301 label = "user";
302 reg = <0x00500000 0x07a00000>;
303 };
304 partition@7f00000 {
305 label = "env1";
306 reg = <0x07f00000 0x00040000>;
307 };
308 partition@7f40000 {
309 label = "env2";
310 reg = <0x07f40000 0x00040000>;
311 };
312 partition@7f80000 {
313 label = "u-boot";
314 reg = <0x07f80000 0x00080000>;
315 read-only;
316 };
317 };
318
319 /* Note: CAN support needs be enabled in U-Boot */
320 can0@2,0 {
321 compatible = "intel,82527"; // Bosch CC770
322 reg = <2 0x0 0x100>;
323 interrupts = <4 0>;
324 interrupt-parent = <&mpic>;
325 };
326
327 can1@2,100 {
328 compatible = "intel,82527"; // Bosch CC770
329 reg = <2 0x100 0x100>;
330 interrupts = <4 0>;
331 interrupt-parent = <&mpic>;
332 };
333
334 /* Note: NAND support needs to be enabled in U-Boot */
335 upm@3,0 {
336 #address-cells = <0>;
337 #size-cells = <0>;
338 compatible = "fsl,upm-nand";
339 reg = <3 0x0 0x800>;
340 fsl,upm-addr-offset = <0x10>;
341 fsl,upm-cmd-offset = <0x08>;
342 chip-delay = <25>; // in micro-seconds
343
344 nand@0 {
345 #address-cells = <1>;
346 #size-cells = <1>;
347
348 partition@0 {
349 label = "fs";
350 reg = <0x00000000 0x01000000>;
351 };
352 };
353 };
354 };
355
356 pci0: pci@e0008000 {
357 cell-index = <0>;
358 #interrupt-cells = <1>;
359 #size-cells = <2>;
360 #address-cells = <3>;
361 compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci";
362 device_type = "pci";
363 reg = <0xe0008000 0x1000>;
364 clock-frequency = <33333333>;
365 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
366 interrupt-map = <
367 /* IDSEL 28 */
368 0xe000 0 0 1 &mpic 2 1
369 0xe000 0 0 2 &mpic 3 1>;
370
371 interrupt-parent = <&mpic>;
372 interrupts = <24 2>;
373 bus-range = <0 0>;
374 ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000
375 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>;
376 };
377
378 pci1: pcie@e000a000 {
379 cell-index = <2>;
380 interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
381 interrupt-map = <
382 /* IDSEL 0x0 (PEX) */
383 0x00000 0 0 1 &mpic 0 1
384 0x00000 0 0 2 &mpic 1 1
385 0x00000 0 0 3 &mpic 2 1
386 0x00000 0 0 4 &mpic 3 1>;
387
388 interrupt-parent = <&mpic>;
389 interrupts = <26 2>;
390 bus-range = <0 0xff>;
391 ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000
392 0x01000000 0 0x00000000 0xef000000 0 0x08000000>;
393 clock-frequency = <33333333>;
394 #interrupt-cells = <1>;
395 #size-cells = <2>;
396 #address-cells = <3>;
397 reg = <0xe000a000 0x1000>;
398 compatible = "fsl,mpc8548-pcie";
399 device_type = "pci";
400 pcie@0 {
401 reg = <0 0 0 0 0>;
402 #size-cells = <2>;
403 #address-cells = <3>;
404 device_type = "pci";
405 ranges = <0x02000000 0 0xc0000000 0x02000000 0
406 0xc0000000 0 0x20000000
407 0x01000000 0 0x00000000 0x01000000 0
408 0x00000000 0 0x08000000>;
409 };
410 };
411};
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts
index a20eb06c482f..6f7ea59c4846 100644
--- a/arch/powerpc/boot/dts/tqm8555.dts
+++ b/arch/powerpc/boot/dts/tqm8555.dts
@@ -12,8 +12,8 @@
12/dts-v1/; 12/dts-v1/;
13 13
14/ { 14/ {
15 model = "tqm,8555"; 15 model = "tqc,tqm8555";
16 compatible = "tqm,8555", "tqm,85xx"; 16 compatible = "tqc,tqm8555";
17 #address-cells = <1>; 17 #address-cells = <1>;
18 #size-cells = <1>; 18 #size-cells = <1>;
19 19
@@ -39,6 +39,7 @@
39 timebase-frequency = <0>; 39 timebase-frequency = <0>;
40 bus-frequency = <0>; 40 bus-frequency = <0>;
41 clock-frequency = <0>; 41 clock-frequency = <0>;
42 next-level-cache = <&L2>;
42 }; 43 };
43 }; 44 };
44 45
@@ -63,7 +64,7 @@
63 interrupts = <18 2>; 64 interrupts = <18 2>;
64 }; 65 };
65 66
66 l2-cache-controller@20000 { 67 L2: l2-cache-controller@20000 {
67 compatible = "fsl,8540-l2-cache-controller"; 68 compatible = "fsl,8540-l2-cache-controller";
68 reg = <0x20000 0x1000>; 69 reg = <0x20000 0x1000>;
69 cache-line-size = <32>; 70 cache-line-size = <32>;
@@ -88,6 +89,47 @@
88 }; 89 };
89 }; 90 };
90 91
92 dma@21300 {
93 #address-cells = <1>;
94 #size-cells = <1>;
95 compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma";
96 reg = <0x21300 0x4>;
97 ranges = <0x0 0x21100 0x200>;
98 cell-index = <0>;
99 dma-channel@0 {
100 compatible = "fsl,mpc8555-dma-channel",
101 "fsl,eloplus-dma-channel";
102 reg = <0x0 0x80>;
103 cell-index = <0>;
104 interrupt-parent = <&mpic>;
105 interrupts = <20 2>;
106 };
107 dma-channel@80 {
108 compatible = "fsl,mpc8555-dma-channel",
109 "fsl,eloplus-dma-channel";
110 reg = <0x80 0x80>;
111 cell-index = <1>;
112 interrupt-parent = <&mpic>;
113 interrupts = <21 2>;
114 };
115 dma-channel@100 {
116 compatible = "fsl,mpc8555-dma-channel",
117 "fsl,eloplus-dma-channel";
118 reg = <0x100 0x80>;
119 cell-index = <2>;
120 interrupt-parent = <&mpic>;
121 interrupts = <22 2>;
122 };
123 dma-channel@180 {
124 compatible = "fsl,mpc8555-dma-channel",
125 "fsl,eloplus-dma-channel";
126 reg = <0x180 0x80>;
127 cell-index = <3>;
128 interrupt-parent = <&mpic>;
129 interrupts = <23 2>;
130 };
131 };
132
91 mdio@24520 { 133 mdio@24520 {
92 #address-cells = <1>; 134 #address-cells = <1>;
93 #size-cells = <0>; 135 #size-cells = <0>;
@@ -158,12 +200,24 @@
158 interrupt-parent = <&mpic>; 200 interrupt-parent = <&mpic>;
159 }; 201 };
160 202
203 crypto@30000 {
204 compatible = "fsl,sec2.0";
205 reg = <0x30000 0x10000>;
206 interrupts = <45 2>;
207 interrupt-parent = <&mpic>;
208 fsl,num-channels = <4>;
209 fsl,channel-fifo-len = <24>;
210 fsl,exec-units-mask = <0x7e>;
211 fsl,descriptor-types-mask = <0x01010ebf>;
212 };
213
161 mpic: pic@40000 { 214 mpic: pic@40000 {
162 interrupt-controller; 215 interrupt-controller;
163 #address-cells = <0>; 216 #address-cells = <0>;
164 #interrupt-cells = <2>; 217 #interrupt-cells = <2>;
165 reg = <0x40000 0x40000>; 218 reg = <0x40000 0x40000>;
166 device_type = "open-pic"; 219 device_type = "open-pic";
220 compatible = "chrp,open-pic";
167 }; 221 };
168 222
169 cpm@919c0 { 223 cpm@919c0 {
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts
index b9ac6c943b89..3fe35208907b 100644
--- a/arch/powerpc/boot/dts/tqm8560.dts
+++ b/arch/powerpc/boot/dts/tqm8560.dts
@@ -2,6 +2,7 @@
2 * TQM 8560 Device Tree Source 2 * TQM 8560 Device Tree Source
3 * 3 *
4 * Copyright 2008 Freescale Semiconductor Inc. 4 * Copyright 2008 Freescale Semiconductor Inc.
5 * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com>
5 * 6 *
6 * This program is free software; you can redistribute it and/or modify it 7 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the 8 * under the terms of the GNU General Public License as published by the
@@ -12,8 +13,8 @@
12/dts-v1/; 13/dts-v1/;
13 14
14/ { 15/ {
15 model = "tqm,8560"; 16 model = "tqc,tqm8560";
16 compatible = "tqm,8560", "tqm,85xx"; 17 compatible = "tqc,tqm8560";
17 #address-cells = <1>; 18 #address-cells = <1>;
18 #size-cells = <1>; 19 #size-cells = <1>;
19 20
@@ -40,6 +41,7 @@
40 timebase-frequency = <0>; 41 timebase-frequency = <0>;
41 bus-frequency = <0>; 42 bus-frequency = <0>;
42 clock-frequency = <0>; 43 clock-frequency = <0>;
44 next-level-cache = <&L2>;
43 }; 45 };
44 }; 46 };
45 47
@@ -64,7 +66,7 @@
64 interrupts = <18 2>; 66 interrupts = <18 2>;
65 }; 67 };
66 68
67 l2-cache-controller@20000 { 69 L2: l2-cache-controller@20000 {
68 compatible = "fsl,8540-l2-cache-controller"; 70 compatible = "fsl,8540-l2-cache-controller";
69 reg = <0x20000 0x1000>; 71 reg = <0x20000 0x1000>;
70 cache-line-size = <32>; 72 cache-line-size = <32>;
@@ -89,6 +91,47 @@
89 }; 91 };
90 }; 92 };
91 93
94 dma@21300 {
95 #address-cells = <1>;
96 #size-cells = <1>;
97 compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma";
98 reg = <0x21300 0x4>;
99 ranges = <0x0 0x21100 0x200>;
100 cell-index = <0>;
101 dma-channel@0 {
102 compatible = "fsl,mpc8560-dma-channel",
103 "fsl,eloplus-dma-channel";
104 reg = <0x0 0x80>;
105 cell-index = <0>;
106 interrupt-parent = <&mpic>;
107 interrupts = <20 2>;
108 };
109 dma-channel@80 {
110 compatible = "fsl,mpc8560-dma-channel",
111 "fsl,eloplus-dma-channel";
112 reg = <0x80 0x80>;
113 cell-index = <1>;
114 interrupt-parent = <&mpic>;
115 interrupts = <21 2>;
116 };
117 dma-channel@100 {
118 compatible = "fsl,mpc8560-dma-channel",
119 "fsl,eloplus-dma-channel";
120 reg = <0x100 0x80>;
121 cell-index = <2>;
122 interrupt-parent = <&mpic>;
123 interrupts = <22 2>;
124 };
125 dma-channel@180 {
126 compatible = "fsl,mpc8560-dma-channel",
127 "fsl,eloplus-dma-channel";
128 reg = <0x180 0x80>;
129 cell-index = <3>;
130 interrupt-parent = <&mpic>;
131 interrupts = <23 2>;
132 };
133 };
134
92 mdio@24520 { 135 mdio@24520 {
93 #address-cells = <1>; 136 #address-cells = <1>;
94 #size-cells = <0>; 137 #size-cells = <0>;
@@ -145,6 +188,7 @@
145 #interrupt-cells = <2>; 188 #interrupt-cells = <2>;
146 reg = <0x40000 0x40000>; 189 reg = <0x40000 0x40000>;
147 device_type = "open-pic"; 190 device_type = "open-pic";
191 compatible = "chrp,open-pic";
148 }; 192 };
149 193
150 cpm@919c0 { 194 cpm@919c0 {
@@ -221,6 +265,70 @@
221 }; 265 };
222 }; 266 };
223 267
268 localbus@e0005000 {
269 compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus",
270 "simple-bus";
271 #address-cells = <2>;
272 #size-cells = <1>;
273 reg = <0xe0005000 0x100>; // BRx, ORx, etc.
274
275 ranges = <
276 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1
277 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0
278 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527)
279 >;
280
281 flash@1,0 {
282 #address-cells = <1>;
283 #size-cells = <1>;
284 compatible = "cfi-flash";
285 reg = <1 0x0 0x8000000>;
286 bank-width = <4>;
287 device-width = <1>;
288
289 partition@0 {
290 label = "kernel";
291 reg = <0x00000000 0x00200000>;
292 };
293 partition@200000 {
294 label = "root";
295 reg = <0x00200000 0x00300000>;
296 };
297 partition@500000 {
298 label = "user";
299 reg = <0x00500000 0x07a00000>;
300 };
301 partition@7f00000 {
302 label = "env1";
303 reg = <0x07f00000 0x00040000>;
304 };
305 partition@7f40000 {
306 label = "env2";
307 reg = <0x07f40000 0x00040000>;
308 };
309 partition@7f80000 {
310 label = "u-boot";
311 reg = <0x07f80000 0x00080000>;
312 read-only;
313 };
314 };
315
316 /* Note: CAN support needs be enabled in U-Boot */
317 can0@2,0 {
318 compatible = "intel,82527"; // Bosch CC770
319 reg = <2 0x0 0x100>;
320 interrupts = <4 0>;
321 interrupt-parent = <&mpic>;
322 };
323
324 can1@2,100 {
325 compatible = "intel,82527"; // Bosch CC770
326 reg = <2 0x100 0x100>;
327 interrupts = <4 0>;
328 interrupt-parent = <&mpic>;
329 };
330 };
331
224 pci0: pci@e0008000 { 332 pci0: pci@e0008000 {
225 cell-index = <0>; 333 cell-index = <0>;
226 #interrupt-cells = <1>; 334 #interrupt-cells = <1>;
diff --git a/arch/powerpc/boot/dts/virtex440-ml507.dts b/arch/powerpc/boot/dts/virtex440-ml507.dts
new file mode 100644
index 000000000000..dc8e78e2dceb
--- /dev/null
+++ b/arch/powerpc/boot/dts/virtex440-ml507.dts
@@ -0,0 +1,296 @@
1/*
2 * This file supports the Xilinx ML507 board with the 440 processor.
3 * A reference design for the FPGA is provided at http://git.xilinx.com.
4 *
5 * (C) Copyright 2008 Xilinx, Inc.
6 *
7 * This file is licensed under the terms of the GNU General Public License
8 * version 2. This program is licensed "as is" without any warranty of any
9 * kind, whether express or implied.
10 */
11
12/dts-v1/;
13
14/ {
15 #address-cells = <1>;
16 #size-cells = <1>;
17 compatible = "xlnx,virtex440";
18 dcr-parent = <&ppc440_0>;
19 model = "testing";
20 DDR2_SDRAM: memory@0 {
21 device_type = "memory";
22 reg = < 0 0x10000000 >;
23 } ;
24 chosen {
25 bootargs = "console=ttyS0 ip=on root=/dev/ram";
26 linux,stdout-path = "/plb@0/serial@83e00000";
27 } ;
28 cpus {
29 #address-cells = <1>;
30 #cpus = <1>;
31 #size-cells = <0>;
32 ppc440_0: cpu@0 {
33 clock-frequency = <400000000>;
34 compatible = "PowerPC,440", "ibm,ppc440";
35 d-cache-line-size = <0x20>;
36 d-cache-size = <0x8000>;
37 dcr-access-method = "native";
38 dcr-controller ;
39 device_type = "cpu";
40 i-cache-line-size = <0x20>;
41 i-cache-size = <0x8000>;
42 model = "PowerPC,440";
43 reg = <0>;
44 timebase-frequency = <400000000>;
45 xlnx,apu-control = <1>;
46 xlnx,apu-udi-0 = <0>;
47 xlnx,apu-udi-1 = <0>;
48 xlnx,apu-udi-10 = <0>;
49 xlnx,apu-udi-11 = <0>;
50 xlnx,apu-udi-12 = <0>;
51 xlnx,apu-udi-13 = <0>;
52 xlnx,apu-udi-14 = <0>;
53 xlnx,apu-udi-15 = <0>;
54 xlnx,apu-udi-2 = <0>;
55 xlnx,apu-udi-3 = <0>;
56 xlnx,apu-udi-4 = <0>;
57 xlnx,apu-udi-5 = <0>;
58 xlnx,apu-udi-6 = <0>;
59 xlnx,apu-udi-7 = <0>;
60 xlnx,apu-udi-8 = <0>;
61 xlnx,apu-udi-9 = <0>;
62 xlnx,dcr-autolock-enable = <1>;
63 xlnx,dcu-rd-ld-cache-plb-prio = <0>;
64 xlnx,dcu-rd-noncache-plb-prio = <0>;
65 xlnx,dcu-rd-touch-plb-prio = <0>;
66 xlnx,dcu-rd-urgent-plb-prio = <0>;
67 xlnx,dcu-wr-flush-plb-prio = <0>;
68 xlnx,dcu-wr-store-plb-prio = <0>;
69 xlnx,dcu-wr-urgent-plb-prio = <0>;
70 xlnx,dma0-control = <0>;
71 xlnx,dma0-plb-prio = <0>;
72 xlnx,dma0-rxchannelctrl = <0x1010000>;
73 xlnx,dma0-rxirqtimer = <0x3ff>;
74 xlnx,dma0-txchannelctrl = <0x1010000>;
75 xlnx,dma0-txirqtimer = <0x3ff>;
76 xlnx,dma1-control = <0>;
77 xlnx,dma1-plb-prio = <0>;
78 xlnx,dma1-rxchannelctrl = <0x1010000>;
79 xlnx,dma1-rxirqtimer = <0x3ff>;
80 xlnx,dma1-txchannelctrl = <0x1010000>;
81 xlnx,dma1-txirqtimer = <0x3ff>;
82 xlnx,dma2-control = <0>;
83 xlnx,dma2-plb-prio = <0>;
84 xlnx,dma2-rxchannelctrl = <0x1010000>;
85 xlnx,dma2-rxirqtimer = <0x3ff>;
86 xlnx,dma2-txchannelctrl = <0x1010000>;
87 xlnx,dma2-txirqtimer = <0x3ff>;
88 xlnx,dma3-control = <0>;
89 xlnx,dma3-plb-prio = <0>;
90 xlnx,dma3-rxchannelctrl = <0x1010000>;
91 xlnx,dma3-rxirqtimer = <0x3ff>;
92 xlnx,dma3-txchannelctrl = <0x1010000>;
93 xlnx,dma3-txirqtimer = <0x3ff>;
94 xlnx,endian-reset = <0>;
95 xlnx,generate-plb-timespecs = <1>;
96 xlnx,icu-rd-fetch-plb-prio = <0>;
97 xlnx,icu-rd-spec-plb-prio = <0>;
98 xlnx,icu-rd-touch-plb-prio = <0>;
99 xlnx,interconnect-imask = <0xffffffff>;
100 xlnx,mplb-allow-lock-xfer = <1>;
101 xlnx,mplb-arb-mode = <0>;
102 xlnx,mplb-awidth = <0x20>;
103 xlnx,mplb-counter = <0x500>;
104 xlnx,mplb-dwidth = <0x80>;
105 xlnx,mplb-max-burst = <8>;
106 xlnx,mplb-native-dwidth = <0x80>;
107 xlnx,mplb-p2p = <0>;
108 xlnx,mplb-prio-dcur = <2>;
109 xlnx,mplb-prio-dcuw = <3>;
110 xlnx,mplb-prio-icu = <4>;
111 xlnx,mplb-prio-splb0 = <1>;
112 xlnx,mplb-prio-splb1 = <0>;
113 xlnx,mplb-read-pipe-enable = <1>;
114 xlnx,mplb-sync-tattribute = <0>;
115 xlnx,mplb-wdog-enable = <1>;
116 xlnx,mplb-write-pipe-enable = <1>;
117 xlnx,mplb-write-post-enable = <1>;
118 xlnx,num-dma = <1>;
119 xlnx,pir = <0xf>;
120 xlnx,ppc440mc-addr-base = <0>;
121 xlnx,ppc440mc-addr-high = <0xfffffff>;
122 xlnx,ppc440mc-arb-mode = <0>;
123 xlnx,ppc440mc-bank-conflict-mask = <0xc00000>;
124 xlnx,ppc440mc-control = <0xf810008f>;
125 xlnx,ppc440mc-max-burst = <8>;
126 xlnx,ppc440mc-prio-dcur = <2>;
127 xlnx,ppc440mc-prio-dcuw = <3>;
128 xlnx,ppc440mc-prio-icu = <4>;
129 xlnx,ppc440mc-prio-splb0 = <1>;
130 xlnx,ppc440mc-prio-splb1 = <0>;
131 xlnx,ppc440mc-row-conflict-mask = <0x3ffe00>;
132 xlnx,ppcdm-asyncmode = <0>;
133 xlnx,ppcds-asyncmode = <0>;
134 xlnx,user-reset = <0>;
135 DMA0: sdma@80 {
136 compatible = "xlnx,ll-dma-1.00.a";
137 dcr-reg = < 0x80 0x11 >;
138 interrupt-parent = <&xps_intc_0>;
139 interrupts = < 9 2 0xa 2 >;
140 } ;
141 } ;
142 } ;
143 plb_v46_0: plb@0 {
144 #address-cells = <1>;
145 #size-cells = <1>;
146 compatible = "xlnx,plb-v46-1.02.a", "simple-bus";
147 ranges ;
148 DIP_Switches_8Bit: gpio@81460000 {
149 compatible = "xlnx,xps-gpio-1.00.a";
150 interrupt-parent = <&xps_intc_0>;
151 interrupts = < 6 2 >;
152 reg = < 0x81460000 0x10000 >;
153 xlnx,all-inputs = <1>;
154 xlnx,all-inputs-2 = <0>;
155 xlnx,dout-default = <0>;
156 xlnx,dout-default-2 = <0>;
157 xlnx,family = "virtex5";
158 xlnx,gpio-width = <8>;
159 xlnx,interrupt-present = <1>;
160 xlnx,is-bidir = <1>;
161 xlnx,is-bidir-2 = <1>;
162 xlnx,is-dual = <0>;
163 xlnx,tri-default = <0xffffffff>;
164 xlnx,tri-default-2 = <0xffffffff>;
165 } ;
166 Hard_Ethernet_MAC: xps-ll-temac@81c00000 {
167 #address-cells = <1>;
168 #size-cells = <1>;
169 compatible = "xlnx,compound";
170 ethernet@81c00000 {
171 compatible = "xlnx,xps-ll-temac-1.01.b";
172 device_type = "network";
173 interrupt-parent = <&xps_intc_0>;
174 interrupts = < 5 2 >;
175 llink-connected = <&DMA0>;
176 local-mac-address = [ 02 00 00 00 00 00 ];
177 reg = < 0x81c00000 0x40 >;
178 xlnx,bus2core-clk-ratio = <1>;
179 xlnx,phy-type = <1>;
180 xlnx,phyaddr = <1>;
181 xlnx,rxcsum = <1>;
182 xlnx,rxfifo = <0x1000>;
183 xlnx,temac-type = <0>;
184 xlnx,txcsum = <1>;
185 xlnx,txfifo = <0x1000>;
186 } ;
187 } ;
188 LEDs_8Bit: gpio@81400000 {
189 compatible = "xlnx,xps-gpio-1.00.a";
190 reg = < 0x81400000 0x10000 >;
191 xlnx,all-inputs = <0>;
192 xlnx,all-inputs-2 = <0>;
193 xlnx,dout-default = <0>;
194 xlnx,dout-default-2 = <0>;
195 xlnx,family = "virtex5";
196 xlnx,gpio-width = <8>;
197 xlnx,interrupt-present = <0>;
198 xlnx,is-bidir = <1>;
199 xlnx,is-bidir-2 = <1>;
200 xlnx,is-dual = <0>;
201 xlnx,tri-default = <0xffffffff>;
202 xlnx,tri-default-2 = <0xffffffff>;
203 } ;
204 LEDs_Positions: gpio@81420000 {
205 compatible = "xlnx,xps-gpio-1.00.a";
206 reg = < 0x81420000 0x10000 >;
207 xlnx,all-inputs = <0>;
208 xlnx,all-inputs-2 = <0>;
209 xlnx,dout-default = <0>;
210 xlnx,dout-default-2 = <0>;
211 xlnx,family = "virtex5";
212 xlnx,gpio-width = <5>;
213 xlnx,interrupt-present = <0>;
214 xlnx,is-bidir = <1>;
215 xlnx,is-bidir-2 = <1>;
216 xlnx,is-dual = <0>;
217 xlnx,tri-default = <0xffffffff>;
218 xlnx,tri-default-2 = <0xffffffff>;
219 } ;
220 Push_Buttons_5Bit: gpio@81440000 {
221 compatible = "xlnx,xps-gpio-1.00.a";
222 interrupt-parent = <&xps_intc_0>;
223 interrupts = < 7 2 >;
224 reg = < 0x81440000 0x10000 >;
225 xlnx,all-inputs = <1>;
226 xlnx,all-inputs-2 = <0>;
227 xlnx,dout-default = <0>;
228 xlnx,dout-default-2 = <0>;
229 xlnx,family = "virtex5";
230 xlnx,gpio-width = <5>;
231 xlnx,interrupt-present = <1>;
232 xlnx,is-bidir = <1>;
233 xlnx,is-bidir-2 = <1>;
234 xlnx,is-dual = <0>;
235 xlnx,tri-default = <0xffffffff>;
236 xlnx,tri-default-2 = <0xffffffff>;
237 } ;
238 RS232_Uart_1: serial@83e00000 {
239 clock-frequency = <100000000>;
240 compatible = "xlnx,xps-uart16550-2.00.a", "ns16550";
241 current-speed = <0x2580>;
242 device_type = "serial";
243 interrupt-parent = <&xps_intc_0>;
244 interrupts = < 8 2 >;
245 reg = < 0x83e00000 0x10000 >;
246 reg-offset = <3>;
247 reg-shift = <2>;
248 xlnx,family = "virtex5";
249 xlnx,has-external-rclk = <0>;
250 xlnx,has-external-xin = <0>;
251 xlnx,is-a-16550 = <1>;
252 } ;
253 SysACE_CompactFlash: sysace@83600000 {
254 compatible = "xlnx,xps-sysace-1.00.a";
255 interrupt-parent = <&xps_intc_0>;
256 interrupts = < 4 2 >;
257 reg = < 0x83600000 0x10000 >;
258 xlnx,family = "virtex5";
259 xlnx,mem-width = <0x10>;
260 } ;
261 xps_bram_if_cntlr_1: xps-bram-if-cntlr@ffff0000 {
262 compatible = "xlnx,xps-bram-if-cntlr-1.00.a";
263 reg = < 0xffff0000 0x10000 >;
264 xlnx,family = "virtex5";
265 } ;
266 xps_intc_0: interrupt-controller@81800000 {
267 #interrupt-cells = <2>;
268 compatible = "xlnx,xps-intc-1.00.a";
269 interrupt-controller ;
270 reg = < 0x81800000 0x10000 >;
271 xlnx,num-intr-inputs = <0xb>;
272 } ;
273 xps_timebase_wdt_1: xps-timebase-wdt@83a00000 {
274 compatible = "xlnx,xps-timebase-wdt-1.00.b";
275 interrupt-parent = <&xps_intc_0>;
276 interrupts = < 2 0 1 2 >;
277 reg = < 0x83a00000 0x10000 >;
278 xlnx,family = "virtex5";
279 xlnx,wdt-enable-once = <0>;
280 xlnx,wdt-interval = <0x1e>;
281 } ;
282 xps_timer_1: timer@83c00000 {
283 compatible = "xlnx,xps-timer-1.00.a";
284 interrupt-parent = <&xps_intc_0>;
285 interrupts = < 3 2 >;
286 reg = < 0x83c00000 0x10000 >;
287 xlnx,count-width = <0x20>;
288 xlnx,family = "virtex5";
289 xlnx,gen0-assert = <1>;
290 xlnx,gen1-assert = <1>;
291 xlnx,one-timer-only = <1>;
292 xlnx,trig0-assert = <1>;
293 xlnx,trig1-assert = <1>;
294 } ;
295 } ;
296} ;
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts
index a328607c8f84..4a9f726ada13 100644
--- a/arch/powerpc/boot/dts/walnut.dts
+++ b/arch/powerpc/boot/dts/walnut.dts
@@ -9,12 +9,14 @@
9 * any warranty of any kind, whether express or implied. 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 #address-cells = <1>; 15 #address-cells = <1>;
14 #size-cells = <1>; 16 #size-cells = <1>;
15 model = "ibm,walnut"; 17 model = "ibm,walnut";
16 compatible = "ibm,walnut"; 18 compatible = "ibm,walnut";
17 dcr-parent = <&/cpus/cpu@0>; 19 dcr-parent = <&{/cpus/cpu@0}>;
18 20
19 aliases { 21 aliases {
20 ethernet0 = &EMAC; 22 ethernet0 = &EMAC;
@@ -29,13 +31,13 @@
29 cpu@0 { 31 cpu@0 {
30 device_type = "cpu"; 32 device_type = "cpu";
31 model = "PowerPC,405GP"; 33 model = "PowerPC,405GP";
32 reg = <0>; 34 reg = <0x00000000>;
33 clock-frequency = <bebc200>; /* Filled in by zImage */ 35 clock-frequency = <200000000>; /* Filled in by zImage */
34 timebase-frequency = <0>; /* Filled in by zImage */ 36 timebase-frequency = <0>; /* Filled in by zImage */
35 i-cache-line-size = <20>; 37 i-cache-line-size = <32>;
36 d-cache-line-size = <20>; 38 d-cache-line-size = <32>;
37 i-cache-size = <4000>; 39 i-cache-size = <16384>;
38 d-cache-size = <4000>; 40 d-cache-size = <16384>;
39 dcr-controller; 41 dcr-controller;
40 dcr-access-method = "native"; 42 dcr-access-method = "native";
41 }; 43 };
@@ -43,14 +45,14 @@
43 45
44 memory { 46 memory {
45 device_type = "memory"; 47 device_type = "memory";
46 reg = <0 0>; /* Filled in by zImage */ 48 reg = <0x00000000 0x00000000>; /* Filled in by zImage */
47 }; 49 };
48 50
49 UIC0: interrupt-controller { 51 UIC0: interrupt-controller {
50 compatible = "ibm,uic"; 52 compatible = "ibm,uic";
51 interrupt-controller; 53 interrupt-controller;
52 cell-index = <0>; 54 cell-index = <0>;
53 dcr-reg = <0c0 9>; 55 dcr-reg = <0x0c0 0x009>;
54 #address-cells = <0>; 56 #address-cells = <0>;
55 #size-cells = <0>; 57 #size-cells = <0>;
56 #interrupt-cells = <2>; 58 #interrupt-cells = <2>;
@@ -65,63 +67,63 @@
65 67
66 SDRAM0: memory-controller { 68 SDRAM0: memory-controller {
67 compatible = "ibm,sdram-405gp"; 69 compatible = "ibm,sdram-405gp";
68 dcr-reg = <010 2>; 70 dcr-reg = <0x010 0x002>;
69 }; 71 };
70 72
71 MAL: mcmal { 73 MAL: mcmal {
72 compatible = "ibm,mcmal-405gp", "ibm,mcmal"; 74 compatible = "ibm,mcmal-405gp", "ibm,mcmal";
73 dcr-reg = <180 62>; 75 dcr-reg = <0x180 0x062>;
74 num-tx-chans = <1>; 76 num-tx-chans = <1>;
75 num-rx-chans = <1>; 77 num-rx-chans = <1>;
76 interrupt-parent = <&UIC0>; 78 interrupt-parent = <&UIC0>;
77 interrupts = < 79 interrupts = <
78 b 4 /* TXEOB */ 80 0xb 0x4 /* TXEOB */
79 c 4 /* RXEOB */ 81 0xc 0x4 /* RXEOB */
80 a 4 /* SERR */ 82 0xa 0x4 /* SERR */
81 d 4 /* TXDE */ 83 0xd 0x4 /* TXDE */
82 e 4 /* RXDE */>; 84 0xe 0x4 /* RXDE */>;
83 }; 85 };
84 86
85 POB0: opb { 87 POB0: opb {
86 compatible = "ibm,opb-405gp", "ibm,opb"; 88 compatible = "ibm,opb-405gp", "ibm,opb";
87 #address-cells = <1>; 89 #address-cells = <1>;
88 #size-cells = <1>; 90 #size-cells = <1>;
89 ranges = <ef600000 ef600000 a00000>; 91 ranges = <0xef600000 0xef600000 0x00a00000>;
90 dcr-reg = <0a0 5>; 92 dcr-reg = <0x0a0 0x005>;
91 clock-frequency = <0>; /* Filled in by zImage */ 93 clock-frequency = <0>; /* Filled in by zImage */
92 94
93 UART0: serial@ef600300 { 95 UART0: serial@ef600300 {
94 device_type = "serial"; 96 device_type = "serial";
95 compatible = "ns16550"; 97 compatible = "ns16550";
96 reg = <ef600300 8>; 98 reg = <0xef600300 0x00000008>;
97 virtual-reg = <ef600300>; 99 virtual-reg = <0xef600300>;
98 clock-frequency = <0>; /* Filled in by zImage */ 100 clock-frequency = <0>; /* Filled in by zImage */
99 current-speed = <2580>; 101 current-speed = <9600>;
100 interrupt-parent = <&UIC0>; 102 interrupt-parent = <&UIC0>;
101 interrupts = <0 4>; 103 interrupts = <0x0 0x4>;
102 }; 104 };
103 105
104 UART1: serial@ef600400 { 106 UART1: serial@ef600400 {
105 device_type = "serial"; 107 device_type = "serial";
106 compatible = "ns16550"; 108 compatible = "ns16550";
107 reg = <ef600400 8>; 109 reg = <0xef600400 0x00000008>;
108 virtual-reg = <ef600400>; 110 virtual-reg = <0xef600400>;
109 clock-frequency = <0>; /* Filled in by zImage */ 111 clock-frequency = <0>; /* Filled in by zImage */
110 current-speed = <2580>; 112 current-speed = <9600>;
111 interrupt-parent = <&UIC0>; 113 interrupt-parent = <&UIC0>;
112 interrupts = <1 4>; 114 interrupts = <0x1 0x4>;
113 }; 115 };
114 116
115 IIC: i2c@ef600500 { 117 IIC: i2c@ef600500 {
116 compatible = "ibm,iic-405gp", "ibm,iic"; 118 compatible = "ibm,iic-405gp", "ibm,iic";
117 reg = <ef600500 11>; 119 reg = <0xef600500 0x00000011>;
118 interrupt-parent = <&UIC0>; 120 interrupt-parent = <&UIC0>;
119 interrupts = <2 4>; 121 interrupts = <0x2 0x4>;
120 }; 122 };
121 123
122 GPIO: gpio@ef600700 { 124 GPIO: gpio@ef600700 {
123 compatible = "ibm,gpio-405gp"; 125 compatible = "ibm,gpio-405gp";
124 reg = <ef600700 20>; 126 reg = <0xef600700 0x00000020>;
125 }; 127 };
126 128
127 EMAC: ethernet@ef600800 { 129 EMAC: ethernet@ef600800 {
@@ -129,26 +131,26 @@
129 compatible = "ibm,emac-405gp", "ibm,emac"; 131 compatible = "ibm,emac-405gp", "ibm,emac";
130 interrupt-parent = <&UIC0>; 132 interrupt-parent = <&UIC0>;
131 interrupts = < 133 interrupts = <
132 f 4 /* Ethernet */ 134 0xf 0x4 /* Ethernet */
133 9 4 /* Ethernet Wake Up */>; 135 0x9 0x4 /* Ethernet Wake Up */>;
134 local-mac-address = [000000000000]; /* Filled in by zImage */ 136 local-mac-address = [000000000000]; /* Filled in by zImage */
135 reg = <ef600800 70>; 137 reg = <0xef600800 0x00000070>;
136 mal-device = <&MAL>; 138 mal-device = <&MAL>;
137 mal-tx-channel = <0>; 139 mal-tx-channel = <0>;
138 mal-rx-channel = <0>; 140 mal-rx-channel = <0>;
139 cell-index = <0>; 141 cell-index = <0>;
140 max-frame-size = <5dc>; 142 max-frame-size = <1500>;
141 rx-fifo-size = <1000>; 143 rx-fifo-size = <4096>;
142 tx-fifo-size = <800>; 144 tx-fifo-size = <2048>;
143 phy-mode = "rmii"; 145 phy-mode = "rmii";
144 phy-map = <00000001>; 146 phy-map = <0x00000001>;
145 }; 147 };
146 148
147 }; 149 };
148 150
149 EBC0: ebc { 151 EBC0: ebc {
150 compatible = "ibm,ebc-405gp", "ibm,ebc"; 152 compatible = "ibm,ebc-405gp", "ibm,ebc";
151 dcr-reg = <012 2>; 153 dcr-reg = <0x012 0x002>;
152 #address-cells = <2>; 154 #address-cells = <2>;
153 #size-cells = <1>; 155 #size-cells = <1>;
154 /* The ranges property is supplied by the bootwrapper 156 /* The ranges property is supplied by the bootwrapper
@@ -158,18 +160,18 @@
158 clock-frequency = <0>; /* Filled in by zImage */ 160 clock-frequency = <0>; /* Filled in by zImage */
159 161
160 sram@0,0 { 162 sram@0,0 {
161 reg = <0 0 80000>; 163 reg = <0x00000000 0x00000000 0x00080000>;
162 }; 164 };
163 165
164 flash@0,80000 { 166 flash@0,80000 {
165 compatible = "jedec-flash"; 167 compatible = "jedec-flash";
166 bank-width = <1>; 168 bank-width = <1>;
167 reg = <0 80000 80000>; 169 reg = <0x00000000 0x00080000 0x00080000>;
168 #address-cells = <1>; 170 #address-cells = <1>;
169 #size-cells = <1>; 171 #size-cells = <1>;
170 partition@0 { 172 partition@0 {
171 label = "OpenBIOS"; 173 label = "OpenBIOS";
172 reg = <0 80000>; 174 reg = <0x00000000 0x00080000>;
173 read-only; 175 read-only;
174 }; 176 };
175 }; 177 };
@@ -177,24 +179,24 @@
177 nvram@1,0 { 179 nvram@1,0 {
178 /* NVRAM and RTC */ 180 /* NVRAM and RTC */
179 compatible = "ds1743-nvram"; 181 compatible = "ds1743-nvram";
180 #bytes = <2000>; 182 #bytes = <0x2000>;
181 reg = <1 0 2000>; 183 reg = <0x00000001 0x00000000 0x00002000>;
182 }; 184 };
183 185
184 keyboard@2,0 { 186 keyboard@2,0 {
185 compatible = "intel,82C42PC"; 187 compatible = "intel,82C42PC";
186 reg = <2 0 2>; 188 reg = <0x00000002 0x00000000 0x00000002>;
187 }; 189 };
188 190
189 ir@3,0 { 191 ir@3,0 {
190 compatible = "ti,TIR2000PAG"; 192 compatible = "ti,TIR2000PAG";
191 reg = <3 0 10>; 193 reg = <0x00000003 0x00000000 0x00000010>;
192 }; 194 };
193 195
194 fpga@7,0 { 196 fpga@7,0 {
195 compatible = "Walnut-FPGA"; 197 compatible = "Walnut-FPGA";
196 reg = <7 0 10>; 198 reg = <0x00000007 0x00000000 0x00000010>;
197 virtual-reg = <f0300005>; 199 virtual-reg = <0xf0300005>;
198 }; 200 };
199 }; 201 };
200 202
@@ -205,35 +207,35 @@
205 #address-cells = <3>; 207 #address-cells = <3>;
206 compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; 208 compatible = "ibm,plb405gp-pci", "ibm,plb-pci";
207 primary; 209 primary;
208 reg = <eec00000 8 /* Config space access */ 210 reg = <0xeec00000 0x00000008 /* Config space access */
209 eed80000 4 /* IACK */ 211 0xeed80000 0x00000004 /* IACK */
210 eed80000 4 /* Special cycle */ 212 0xeed80000 0x00000004 /* Special cycle */
211 ef480000 40>; /* Internal registers */ 213 0xef480000 0x00000040>; /* Internal registers */
212 214
213 /* Outbound ranges, one memory and one IO, 215 /* Outbound ranges, one memory and one IO,
214 * later cannot be changed. Chip supports a second 216 * later cannot be changed. Chip supports a second
215 * IO range but we don't use it for now 217 * IO range but we don't use it for now
216 */ 218 */
217 ranges = <02000000 0 80000000 80000000 0 20000000 219 ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000
218 01000000 0 00000000 e8000000 0 00010000>; 220 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
219 221
220 /* Inbound 2GB range starting at 0 */ 222 /* Inbound 2GB range starting at 0 */
221 dma-ranges = <42000000 0 0 0 0 80000000>; 223 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>;
222 224
223 /* Walnut has all 4 IRQ pins tied together per slot */ 225 /* Walnut has all 4 IRQ pins tied together per slot */
224 interrupt-map-mask = <f800 0 0 0>; 226 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
225 interrupt-map = < 227 interrupt-map = <
226 /* IDSEL 1 */ 228 /* IDSEL 1 */
227 0800 0 0 0 &UIC0 1c 8 229 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
228 230
229 /* IDSEL 2 */ 231 /* IDSEL 2 */
230 1000 0 0 0 &UIC0 1d 8 232 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8
231 233
232 /* IDSEL 3 */ 234 /* IDSEL 3 */
233 1800 0 0 0 &UIC0 1e 8 235 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8
234 236
235 /* IDSEL 4 */ 237 /* IDSEL 4 */
236 2000 0 0 0 &UIC0 1f 8 238 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8
237 >; 239 >;
238 }; 240 };
239 }; 241 };
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts
index b04a52e22bf5..340018cf16b7 100644
--- a/arch/powerpc/boot/dts/warp.dts
+++ b/arch/powerpc/boot/dts/warp.dts
@@ -9,12 +9,14 @@
9 * any warranty of any kind, whether express or implied. 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 #address-cells = <2>; 15 #address-cells = <2>;
14 #size-cells = <1>; 16 #size-cells = <1>;
15 model = "pika,warp"; 17 model = "pika,warp";
16 compatible = "pika,warp"; 18 compatible = "pika,warp";
17 dcr-parent = <&/cpus/cpu@0>; 19 dcr-parent = <&{/cpus/cpu@0}>;
18 20
19 aliases { 21 aliases {
20 ethernet0 = &EMAC0; 22 ethernet0 = &EMAC0;
@@ -28,13 +30,13 @@
28 cpu@0 { 30 cpu@0 {
29 device_type = "cpu"; 31 device_type = "cpu";
30 model = "PowerPC,440EP"; 32 model = "PowerPC,440EP";
31 reg = <0>; 33 reg = <0x00000000>;
32 clock-frequency = <0>; /* Filled in by zImage */ 34 clock-frequency = <0>; /* Filled in by zImage */
33 timebase-frequency = <0>; /* Filled in by zImage */ 35 timebase-frequency = <0>; /* Filled in by zImage */
34 i-cache-line-size = <20>; 36 i-cache-line-size = <32>;
35 d-cache-line-size = <20>; 37 d-cache-line-size = <32>;
36 i-cache-size = <8000>; 38 i-cache-size = <32768>;
37 d-cache-size = <8000>; 39 d-cache-size = <32768>;
38 dcr-controller; 40 dcr-controller;
39 dcr-access-method = "native"; 41 dcr-access-method = "native";
40 }; 42 };
@@ -42,14 +44,14 @@
42 44
43 memory { 45 memory {
44 device_type = "memory"; 46 device_type = "memory";
45 reg = <0 0 0>; /* Filled in by zImage */ 47 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
46 }; 48 };
47 49
48 UIC0: interrupt-controller0 { 50 UIC0: interrupt-controller0 {
49 compatible = "ibm,uic-440ep","ibm,uic"; 51 compatible = "ibm,uic-440ep","ibm,uic";
50 interrupt-controller; 52 interrupt-controller;
51 cell-index = <0>; 53 cell-index = <0>;
52 dcr-reg = <0c0 009>; 54 dcr-reg = <0x0c0 0x009>;
53 #address-cells = <0>; 55 #address-cells = <0>;
54 #size-cells = <0>; 56 #size-cells = <0>;
55 #interrupt-cells = <2>; 57 #interrupt-cells = <2>;
@@ -59,22 +61,22 @@
59 compatible = "ibm,uic-440ep","ibm,uic"; 61 compatible = "ibm,uic-440ep","ibm,uic";
60 interrupt-controller; 62 interrupt-controller;
61 cell-index = <1>; 63 cell-index = <1>;
62 dcr-reg = <0d0 009>; 64 dcr-reg = <0x0d0 0x009>;
63 #address-cells = <0>; 65 #address-cells = <0>;
64 #size-cells = <0>; 66 #size-cells = <0>;
65 #interrupt-cells = <2>; 67 #interrupt-cells = <2>;
66 interrupts = <1e 4 1f 4>; /* cascade */ 68 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
67 interrupt-parent = <&UIC0>; 69 interrupt-parent = <&UIC0>;
68 }; 70 };
69 71
70 SDR0: sdr { 72 SDR0: sdr {
71 compatible = "ibm,sdr-440ep"; 73 compatible = "ibm,sdr-440ep";
72 dcr-reg = <00e 002>; 74 dcr-reg = <0x00e 0x002>;
73 }; 75 };
74 76
75 CPR0: cpr { 77 CPR0: cpr {
76 compatible = "ibm,cpr-440ep"; 78 compatible = "ibm,cpr-440ep";
77 dcr-reg = <00c 002>; 79 dcr-reg = <0x00c 0x002>;
78 }; 80 };
79 81
80 plb { 82 plb {
@@ -86,86 +88,79 @@
86 88
87 SDRAM0: sdram { 89 SDRAM0: sdram {
88 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 90 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
89 dcr-reg = <010 2>; 91 dcr-reg = <0x010 0x002>;
90 }; 92 };
91 93
92 DMA0: dma { 94 DMA0: dma {
93 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 95 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
94 dcr-reg = <100 027>; 96 dcr-reg = <0x100 0x027>;
95 }; 97 };
96 98
97 MAL0: mcmal { 99 MAL0: mcmal {
98 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 100 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
99 dcr-reg = <180 62>; 101 dcr-reg = <0x180 0x062>;
100 num-tx-chans = <4>; 102 num-tx-chans = <4>;
101 num-rx-chans = <2>; 103 num-rx-chans = <2>;
102 interrupt-parent = <&MAL0>; 104 interrupt-parent = <&MAL0>;
103 interrupts = <0 1 2 3 4>; 105 interrupts = <0x0 0x1 0x2 0x3 0x4>;
104 #interrupt-cells = <1>; 106 #interrupt-cells = <1>;
105 #address-cells = <0>; 107 #address-cells = <0>;
106 #size-cells = <0>; 108 #size-cells = <0>;
107 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 109 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
108 /*RXEOB*/ 1 &UIC0 b 4 110 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
109 /*SERR*/ 2 &UIC1 0 4 111 /*SERR*/ 0x2 &UIC1 0x0 0x4
110 /*TXDE*/ 3 &UIC1 1 4 112 /*TXDE*/ 0x3 &UIC1 0x1 0x4
111 /*RXDE*/ 4 &UIC1 2 4>; 113 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
112 }; 114 };
113 115
114 POB0: opb { 116 POB0: opb {
115 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; 117 compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb";
116 #address-cells = <1>; 118 #address-cells = <1>;
117 #size-cells = <1>; 119 #size-cells = <1>;
118 ranges = <00000000 0 00000000 80000000 120 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
119 80000000 0 80000000 80000000>; 121 0x80000000 0x00000000 0x80000000 0x80000000>;
120 interrupt-parent = <&UIC1>; 122 interrupt-parent = <&UIC1>;
121 interrupts = <7 4>; 123 interrupts = <0x7 0x4>;
122 clock-frequency = <0>; /* Filled in by zImage */ 124 clock-frequency = <0>; /* Filled in by zImage */
123 125
124 EBC0: ebc { 126 EBC0: ebc {
125 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 127 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
126 dcr-reg = <012 2>; 128 dcr-reg = <0x012 0x002>;
127 #address-cells = <2>; 129 #address-cells = <2>;
128 #size-cells = <1>; 130 #size-cells = <1>;
129 clock-frequency = <0>; /* Filled in by zImage */ 131 clock-frequency = <0>; /* Filled in by zImage */
130 interrupts = <5 1>; 132 interrupts = <0x5 0x1>;
131 interrupt-parent = <&UIC1>; 133 interrupt-parent = <&UIC1>;
132 134
133 fpga@2,0 { 135 fpga@2,0 {
134 compatible = "pika,fpga"; 136 compatible = "pika,fpga";
135 reg = <2 0 2200>; 137 reg = <0x00000002 0x00000000 0x00001000>;
136 interrupts = <18 8>; 138 interrupts = <0x18 0x8>;
137 interrupt-parent = <&UIC0>; 139 interrupt-parent = <&UIC0>;
138 }; 140 };
139 141
142 fpga@2,4000 {
143 compatible = "pika,fpga-sd";
144 reg = <0x00000002 0x00004000 0x00000A00>;
145 };
146
140 nor_flash@0,0 { 147 nor_flash@0,0 {
141 compatible = "amd,s29gl512n", "cfi-flash"; 148 compatible = "amd,s29gl032a", "cfi-flash";
142 bank-width = <2>; 149 bank-width = <2>;
143 reg = <0 0 4000000>; 150 reg = <0x00000000 0x00000000 0x00400000>;
144 #address-cells = <1>; 151 #address-cells = <1>;
145 #size-cells = <1>; 152 #size-cells = <1>;
146 partition@0 { 153 partition@300000 {
147 label = "kernel";
148 reg = <0 180000>;
149 };
150 partition@180000 {
151 label = "root";
152 reg = <180000 3480000>;
153 };
154 partition@3600000 {
155 label = "user";
156 reg = <3600000 900000>;
157 };
158 partition@3f00000 {
159 label = "fpga"; 154 label = "fpga";
160 reg = <3f00000 40000>; 155 reg = <0x0030000 0x00040000>;
161 }; 156 };
162 partition@3f40000 { 157 partition@340000 {
163 label = "env"; 158 label = "env";
164 reg = <3f40000 40000>; 159 reg = <0x0340000 0x00040000>;
165 }; 160 };
166 partition@3f80000 { 161 partition@380000 {
167 label = "u-boot"; 162 label = "u-boot";
168 reg = <3f80000 80000>; 163 reg = <0x0380000 0x00080000>;
169 }; 164 };
170 }; 165 };
171 }; 166 };
@@ -173,60 +168,80 @@
173 UART0: serial@ef600300 { 168 UART0: serial@ef600300 {
174 device_type = "serial"; 169 device_type = "serial";
175 compatible = "ns16550"; 170 compatible = "ns16550";
176 reg = <ef600300 8>; 171 reg = <0xef600300 0x00000008>;
177 virtual-reg = <ef600300>; 172 virtual-reg = <0xef600300>;
178 clock-frequency = <0>; /* Filled in by zImage */ 173 clock-frequency = <0>; /* Filled in by zImage */
179 current-speed = <1c200>; 174 current-speed = <115200>;
180 interrupt-parent = <&UIC0>; 175 interrupt-parent = <&UIC0>;
181 interrupts = <0 4>; 176 interrupts = <0x0 0x4>;
182 }; 177 };
183 178
184 IIC0: i2c@ef600700 { 179 IIC0: i2c@ef600700 {
185 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 180 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
186 reg = <ef600700 14>; 181 reg = <0xef600700 0x00000014>;
187 interrupt-parent = <&UIC0>; 182 interrupt-parent = <&UIC0>;
188 interrupts = <2 4>; 183 interrupts = <0x2 0x4>;
184 index = <0x0>;
185 #address-cells = <1>;
186 #size-cells = <0>;
187
188 ad7414@4a {
189 compatible = "adi,ad7414";
190 reg = <0x4a>;
191 interrupts = <0x19 0x8>;
192 interrupt-parent = <&UIC0>;
193 };
189 }; 194 };
190 195
191 GPIO0: gpio@ef600b00 { 196 GPIO0: gpio@ef600b00 {
192 compatible = "ibm,gpio-440ep"; 197 compatible = "ibm,gpio-440ep";
193 reg = <ef600b00 48>; 198 reg = <0xef600b00 0x00000048>;
199 #gpio-cells = <2>;
200 gpio-controller;
194 }; 201 };
195 202
196 GPIO1: gpio@ef600c00 { 203 GPIO1: gpio@ef600c00 {
197 compatible = "ibm,gpio-440ep"; 204 compatible = "ibm,gpio-440ep";
198 reg = <ef600c00 48>; 205 reg = <0xef600c00 0x00000048>;
206 #gpio-cells = <2>;
207 gpio-controller;
208
209 led@31 {
210 compatible = "linux,gpio-led";
211 linux,name = ":green:";
212 gpios = <&GPIO1 0x30 0>;
213 };
199 }; 214 };
200 215
201 ZMII0: emac-zmii@ef600d00 { 216 ZMII0: emac-zmii@ef600d00 {
202 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 217 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
203 reg = <ef600d00 c>; 218 reg = <0xef600d00 0x0000000c>;
204 }; 219 };
205 220
206 EMAC0: ethernet@ef600e00 { 221 EMAC0: ethernet@ef600e00 {
207 device_type = "network"; 222 device_type = "network";
208 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 223 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
209 interrupt-parent = <&UIC1>; 224 interrupt-parent = <&UIC1>;
210 interrupts = <1c 4 1d 4>; 225 interrupts = <0x1c 0x4 0x1d 0x4>;
211 reg = <ef600e00 70>; 226 reg = <0xef600e00 0x00000070>;
212 local-mac-address = [000000000000]; 227 local-mac-address = [000000000000];
213 mal-device = <&MAL0>; 228 mal-device = <&MAL0>;
214 mal-tx-channel = <0 1>; 229 mal-tx-channel = <0 1>;
215 mal-rx-channel = <0>; 230 mal-rx-channel = <0>;
216 cell-index = <0>; 231 cell-index = <0>;
217 max-frame-size = <5dc>; 232 max-frame-size = <1500>;
218 rx-fifo-size = <1000>; 233 rx-fifo-size = <4096>;
219 tx-fifo-size = <800>; 234 tx-fifo-size = <2048>;
220 phy-mode = "rmii"; 235 phy-mode = "rmii";
221 phy-map = <00000000>; 236 phy-map = <0x00000000>;
222 zmii-device = <&ZMII0>; 237 zmii-device = <&ZMII0>;
223 zmii-channel = <0>; 238 zmii-channel = <0>;
224 }; 239 };
225 240
226 usb@ef601000 { 241 usb@ef601000 {
227 compatible = "ohci-be"; 242 compatible = "ohci-be";
228 reg = <ef601000 80>; 243 reg = <0xef601000 0x00000080>;
229 interrupts = <8 1 9 1>; 244 interrupts = <0x8 0x1 0x9 0x1>;
230 interrupt-parent = < &UIC1 >; 245 interrupt-parent = < &UIC1 >;
231 }; 246 };
232 }; 247 };
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts
index 0d6d332814e0..e39422aa0d85 100644
--- a/arch/powerpc/boot/dts/yosemite.dts
+++ b/arch/powerpc/boot/dts/yosemite.dts
@@ -9,12 +9,14 @@
9 * any warranty of any kind, whether express or implied. 9 * any warranty of any kind, whether express or implied.
10 */ 10 */
11 11
12/dts-v1/;
13
12/ { 14/ {
13 #address-cells = <2>; 15 #address-cells = <2>;
14 #size-cells = <1>; 16 #size-cells = <1>;
15 model = "amcc,yosemite"; 17 model = "amcc,yosemite";
16 compatible = "amcc,yosemite","amcc,bamboo"; 18 compatible = "amcc,yosemite","amcc,bamboo";
17 dcr-parent = <&/cpus/cpu@0>; 19 dcr-parent = <&{/cpus/cpu@0}>;
18 20
19 aliases { 21 aliases {
20 ethernet0 = &EMAC0; 22 ethernet0 = &EMAC0;
@@ -32,13 +34,13 @@
32 cpu@0 { 34 cpu@0 {
33 device_type = "cpu"; 35 device_type = "cpu";
34 model = "PowerPC,440EP"; 36 model = "PowerPC,440EP";
35 reg = <0>; 37 reg = <0x00000000>;
36 clock-frequency = <0>; /* Filled in by zImage */ 38 clock-frequency = <0>; /* Filled in by zImage */
37 timebase-frequency = <0>; /* Filled in by zImage */ 39 timebase-frequency = <0>; /* Filled in by zImage */
38 i-cache-line-size = <20>; 40 i-cache-line-size = <32>;
39 d-cache-line-size = <20>; 41 d-cache-line-size = <32>;
40 i-cache-size = <8000>; 42 i-cache-size = <32768>;
41 d-cache-size = <8000>; 43 d-cache-size = <32768>;
42 dcr-controller; 44 dcr-controller;
43 dcr-access-method = "native"; 45 dcr-access-method = "native";
44 }; 46 };
@@ -46,14 +48,14 @@
46 48
47 memory { 49 memory {
48 device_type = "memory"; 50 device_type = "memory";
49 reg = <0 0 0>; /* Filled in by zImage */ 51 reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */
50 }; 52 };
51 53
52 UIC0: interrupt-controller0 { 54 UIC0: interrupt-controller0 {
53 compatible = "ibm,uic-440ep","ibm,uic"; 55 compatible = "ibm,uic-440ep","ibm,uic";
54 interrupt-controller; 56 interrupt-controller;
55 cell-index = <0>; 57 cell-index = <0>;
56 dcr-reg = <0c0 009>; 58 dcr-reg = <0x0c0 0x009>;
57 #address-cells = <0>; 59 #address-cells = <0>;
58 #size-cells = <0>; 60 #size-cells = <0>;
59 #interrupt-cells = <2>; 61 #interrupt-cells = <2>;
@@ -63,22 +65,22 @@
63 compatible = "ibm,uic-440ep","ibm,uic"; 65 compatible = "ibm,uic-440ep","ibm,uic";
64 interrupt-controller; 66 interrupt-controller;
65 cell-index = <1>; 67 cell-index = <1>;
66 dcr-reg = <0d0 009>; 68 dcr-reg = <0x0d0 0x009>;
67 #address-cells = <0>; 69 #address-cells = <0>;
68 #size-cells = <0>; 70 #size-cells = <0>;
69 #interrupt-cells = <2>; 71 #interrupt-cells = <2>;
70 interrupts = <1e 4 1f 4>; /* cascade */ 72 interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
71 interrupt-parent = <&UIC0>; 73 interrupt-parent = <&UIC0>;
72 }; 74 };
73 75
74 SDR0: sdr { 76 SDR0: sdr {
75 compatible = "ibm,sdr-440ep"; 77 compatible = "ibm,sdr-440ep";
76 dcr-reg = <00e 002>; 78 dcr-reg = <0x00e 0x002>;
77 }; 79 };
78 80
79 CPR0: cpr { 81 CPR0: cpr {
80 compatible = "ibm,cpr-440ep"; 82 compatible = "ibm,cpr-440ep";
81 dcr-reg = <00c 002>; 83 dcr-reg = <0x00c 0x002>;
82 }; 84 };
83 85
84 plb { 86 plb {
@@ -90,29 +92,29 @@
90 92
91 SDRAM0: sdram { 93 SDRAM0: sdram {
92 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; 94 compatible = "ibm,sdram-440ep", "ibm,sdram-405gp";
93 dcr-reg = <010 2>; 95 dcr-reg = <0x010 0x002>;
94 }; 96 };
95 97
96 DMA0: dma { 98 DMA0: dma {
97 compatible = "ibm,dma-440ep", "ibm,dma-440gp"; 99 compatible = "ibm,dma-440ep", "ibm,dma-440gp";
98 dcr-reg = <100 027>; 100 dcr-reg = <0x100 0x027>;
99 }; 101 };
100 102
101 MAL0: mcmal { 103 MAL0: mcmal {
102 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; 104 compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal";
103 dcr-reg = <180 62>; 105 dcr-reg = <0x180 0x062>;
104 num-tx-chans = <4>; 106 num-tx-chans = <4>;
105 num-rx-chans = <2>; 107 num-rx-chans = <2>;
106 interrupt-parent = <&MAL0>; 108 interrupt-parent = <&MAL0>;
107 interrupts = <0 1 2 3 4>; 109 interrupts = <0x0 0x1 0x2 0x3 0x4>;
108 #interrupt-cells = <1>; 110 #interrupt-cells = <1>;
109 #address-cells = <0>; 111 #address-cells = <0>;
110 #size-cells = <0>; 112 #size-cells = <0>;
111 interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 113 interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4
112 /*RXEOB*/ 1 &UIC0 b 4 114 /*RXEOB*/ 0x1 &UIC0 0xb 0x4
113 /*SERR*/ 2 &UIC1 0 4 115 /*SERR*/ 0x2 &UIC1 0x0 0x4
114 /*TXDE*/ 3 &UIC1 1 4 116 /*TXDE*/ 0x3 &UIC1 0x1 0x4
115 /*RXDE*/ 4 &UIC1 2 4>; 117 /*RXDE*/ 0x4 &UIC1 0x2 0x4>;
116 }; 118 };
117 119
118 POB0: opb { 120 POB0: opb {
@@ -122,110 +124,110 @@
122 /* Bamboo is oddball in the 44x world and doesn't use the ERPN 124 /* Bamboo is oddball in the 44x world and doesn't use the ERPN
123 * bits. 125 * bits.
124 */ 126 */
125 ranges = <00000000 0 00000000 80000000 127 ranges = <0x00000000 0x00000000 0x00000000 0x80000000
126 80000000 0 80000000 80000000>; 128 0x80000000 0x00000000 0x80000000 0x80000000>;
127 interrupt-parent = <&UIC1>; 129 interrupt-parent = <&UIC1>;
128 interrupts = <7 4>; 130 interrupts = <0x7 0x4>;
129 clock-frequency = <0>; /* Filled in by zImage */ 131 clock-frequency = <0>; /* Filled in by zImage */
130 132
131 EBC0: ebc { 133 EBC0: ebc {
132 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; 134 compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc";
133 dcr-reg = <012 2>; 135 dcr-reg = <0x012 0x002>;
134 #address-cells = <2>; 136 #address-cells = <2>;
135 #size-cells = <1>; 137 #size-cells = <1>;
136 clock-frequency = <0>; /* Filled in by zImage */ 138 clock-frequency = <0>; /* Filled in by zImage */
137 interrupts = <5 1>; 139 interrupts = <0x5 0x1>;
138 interrupt-parent = <&UIC1>; 140 interrupt-parent = <&UIC1>;
139 }; 141 };
140 142
141 UART0: serial@ef600300 { 143 UART0: serial@ef600300 {
142 device_type = "serial"; 144 device_type = "serial";
143 compatible = "ns16550"; 145 compatible = "ns16550";
144 reg = <ef600300 8>; 146 reg = <0xef600300 0x00000008>;
145 virtual-reg = <ef600300>; 147 virtual-reg = <0xef600300>;
146 clock-frequency = <0>; /* Filled in by zImage */ 148 clock-frequency = <0>; /* Filled in by zImage */
147 current-speed = <1c200>; 149 current-speed = <115200>;
148 interrupt-parent = <&UIC0>; 150 interrupt-parent = <&UIC0>;
149 interrupts = <0 4>; 151 interrupts = <0x0 0x4>;
150 }; 152 };
151 153
152 UART1: serial@ef600400 { 154 UART1: serial@ef600400 {
153 device_type = "serial"; 155 device_type = "serial";
154 compatible = "ns16550"; 156 compatible = "ns16550";
155 reg = <ef600400 8>; 157 reg = <0xef600400 0x00000008>;
156 virtual-reg = <ef600400>; 158 virtual-reg = <0xef600400>;
157 clock-frequency = <0>; 159 clock-frequency = <0>;
158 current-speed = <0>; 160 current-speed = <0>;
159 interrupt-parent = <&UIC0>; 161 interrupt-parent = <&UIC0>;
160 interrupts = <1 4>; 162 interrupts = <0x1 0x4>;
161 }; 163 };
162 164
163 UART2: serial@ef600500 { 165 UART2: serial@ef600500 {
164 device_type = "serial"; 166 device_type = "serial";
165 compatible = "ns16550"; 167 compatible = "ns16550";
166 reg = <ef600500 8>; 168 reg = <0xef600500 0x00000008>;
167 virtual-reg = <ef600500>; 169 virtual-reg = <0xef600500>;
168 clock-frequency = <0>; 170 clock-frequency = <0>;
169 current-speed = <0>; 171 current-speed = <0>;
170 interrupt-parent = <&UIC0>; 172 interrupt-parent = <&UIC0>;
171 interrupts = <3 4>; 173 interrupts = <0x3 0x4>;
172 status = "disabled"; 174 status = "disabled";
173 }; 175 };
174 176
175 UART3: serial@ef600600 { 177 UART3: serial@ef600600 {
176 device_type = "serial"; 178 device_type = "serial";
177 compatible = "ns16550"; 179 compatible = "ns16550";
178 reg = <ef600600 8>; 180 reg = <0xef600600 0x00000008>;
179 virtual-reg = <ef600600>; 181 virtual-reg = <0xef600600>;
180 clock-frequency = <0>; 182 clock-frequency = <0>;
181 current-speed = <0>; 183 current-speed = <0>;
182 interrupt-parent = <&UIC0>; 184 interrupt-parent = <&UIC0>;
183 interrupts = <4 4>; 185 interrupts = <0x4 0x4>;
184 status = "disabled"; 186 status = "disabled";
185 }; 187 };
186 188
187 IIC0: i2c@ef600700 { 189 IIC0: i2c@ef600700 {
188 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 190 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
189 reg = <ef600700 14>; 191 reg = <0xef600700 0x00000014>;
190 interrupt-parent = <&UIC0>; 192 interrupt-parent = <&UIC0>;
191 interrupts = <2 4>; 193 interrupts = <0x2 0x4>;
192 }; 194 };
193 195
194 IIC1: i2c@ef600800 { 196 IIC1: i2c@ef600800 {
195 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; 197 compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic";
196 reg = <ef600800 14>; 198 reg = <0xef600800 0x00000014>;
197 interrupt-parent = <&UIC0>; 199 interrupt-parent = <&UIC0>;
198 interrupts = <7 4>; 200 interrupts = <0x7 0x4>;
199 }; 201 };
200 202
201 spi@ef600900 { 203 spi@ef600900 {
202 compatible = "amcc,spi-440ep"; 204 compatible = "amcc,spi-440ep";
203 reg = <ef600900 6>; 205 reg = <0xef600900 0x00000006>;
204 interrupts = <8 4>; 206 interrupts = <0x8 0x4>;
205 interrupt-parent = <&UIC0>; 207 interrupt-parent = <&UIC0>;
206 }; 208 };
207 209
208 ZMII0: emac-zmii@ef600d00 { 210 ZMII0: emac-zmii@ef600d00 {
209 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; 211 compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii";
210 reg = <ef600d00 c>; 212 reg = <0xef600d00 0x0000000c>;
211 }; 213 };
212 214
213 EMAC0: ethernet@ef600e00 { 215 EMAC0: ethernet@ef600e00 {
214 device_type = "network"; 216 device_type = "network";
215 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 217 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
216 interrupt-parent = <&UIC1>; 218 interrupt-parent = <&UIC1>;
217 interrupts = <1c 4 1d 4>; 219 interrupts = <0x1c 0x4 0x1d 0x4>;
218 reg = <ef600e00 70>; 220 reg = <0xef600e00 0x00000070>;
219 local-mac-address = [000000000000]; 221 local-mac-address = [000000000000];
220 mal-device = <&MAL0>; 222 mal-device = <&MAL0>;
221 mal-tx-channel = <0 1>; 223 mal-tx-channel = <0 1>;
222 mal-rx-channel = <0>; 224 mal-rx-channel = <0>;
223 cell-index = <0>; 225 cell-index = <0>;
224 max-frame-size = <5dc>; 226 max-frame-size = <1500>;
225 rx-fifo-size = <1000>; 227 rx-fifo-size = <4096>;
226 tx-fifo-size = <800>; 228 tx-fifo-size = <2048>;
227 phy-mode = "rmii"; 229 phy-mode = "rmii";
228 phy-map = <00000000>; 230 phy-map = <0x00000000>;
229 zmii-device = <&ZMII0>; 231 zmii-device = <&ZMII0>;
230 zmii-channel = <0>; 232 zmii-channel = <0>;
231 }; 233 };
@@ -234,26 +236,26 @@
234 device_type = "network"; 236 device_type = "network";
235 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; 237 compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac";
236 interrupt-parent = <&UIC1>; 238 interrupt-parent = <&UIC1>;
237 interrupts = <1e 4 1f 4>; 239 interrupts = <0x1e 0x4 0x1f 0x4>;
238 reg = <ef600f00 70>; 240 reg = <0xef600f00 0x00000070>;
239 local-mac-address = [000000000000]; 241 local-mac-address = [000000000000];
240 mal-device = <&MAL0>; 242 mal-device = <&MAL0>;
241 mal-tx-channel = <2 3>; 243 mal-tx-channel = <2 3>;
242 mal-rx-channel = <1>; 244 mal-rx-channel = <1>;
243 cell-index = <1>; 245 cell-index = <1>;
244 max-frame-size = <5dc>; 246 max-frame-size = <1500>;
245 rx-fifo-size = <1000>; 247 rx-fifo-size = <4096>;
246 tx-fifo-size = <800>; 248 tx-fifo-size = <2048>;
247 phy-mode = "rmii"; 249 phy-mode = "rmii";
248 phy-map = <00000000>; 250 phy-map = <0x00000000>;
249 zmii-device = <&ZMII0>; 251 zmii-device = <&ZMII0>;
250 zmii-channel = <1>; 252 zmii-channel = <1>;
251 }; 253 };
252 254
253 usb@ef601000 { 255 usb@ef601000 {
254 compatible = "ohci-be"; 256 compatible = "ohci-be";
255 reg = <ef601000 80>; 257 reg = <0xef601000 0x00000080>;
256 interrupts = <8 4 9 4>; 258 interrupts = <0x8 0x4 0x9 0x4>;
257 interrupt-parent = < &UIC1 >; 259 interrupt-parent = < &UIC1 >;
258 }; 260 };
259 }; 261 };
@@ -265,35 +267,35 @@
265 #address-cells = <3>; 267 #address-cells = <3>;
266 compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; 268 compatible = "ibm,plb440ep-pci", "ibm,plb-pci";
267 primary; 269 primary;
268 reg = <0 eec00000 8 /* Config space access */ 270 reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */
269 0 eed00000 4 /* IACK */ 271 0x00000000 0xeed00000 0x00000004 /* IACK */
270 0 eed00000 4 /* Special cycle */ 272 0x00000000 0xeed00000 0x00000004 /* Special cycle */
271 0 ef400000 40>; /* Internal registers */ 273 0x00000000 0xef400000 0x00000040>; /* Internal registers */
272 274
273 /* Outbound ranges, one memory and one IO, 275 /* Outbound ranges, one memory and one IO,
274 * later cannot be changed. Chip supports a second 276 * later cannot be changed. Chip supports a second
275 * IO range but we don't use it for now 277 * IO range but we don't use it for now
276 */ 278 */
277 ranges = <02000000 0 a0000000 0 a0000000 0 20000000 279 ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000
278 01000000 0 00000000 0 e8000000 0 00010000>; 280 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>;
279 281
280 /* Inbound 2GB range starting at 0 */ 282 /* Inbound 2GB range starting at 0 */
281 dma-ranges = <42000000 0 0 0 0 0 80000000>; 283 dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>;
282 284
283 /* Bamboo has all 4 IRQ pins tied together per slot */ 285 /* Bamboo has all 4 IRQ pins tied together per slot */
284 interrupt-map-mask = <f800 0 0 0>; 286 interrupt-map-mask = <0xf800 0x0 0x0 0x0>;
285 interrupt-map = < 287 interrupt-map = <
286 /* IDSEL 1 */ 288 /* IDSEL 1 */
287 0800 0 0 0 &UIC0 1c 8 289 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8
288 290
289 /* IDSEL 2 */ 291 /* IDSEL 2 */
290 1000 0 0 0 &UIC0 1b 8 292 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8
291 293
292 /* IDSEL 3 */ 294 /* IDSEL 3 */
293 1800 0 0 0 &UIC0 1a 8 295 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8
294 296
295 /* IDSEL 4 */ 297 /* IDSEL 4 */
296 2000 0 0 0 &UIC0 19 8 298 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8
297 >; 299 >;
298 }; 300 };
299 }; 301 };
diff --git a/arch/powerpc/boot/oflib.c b/arch/powerpc/boot/oflib.c
index 95b8fd69a403..b0ec9cf3eaaf 100644
--- a/arch/powerpc/boot/oflib.c
+++ b/arch/powerpc/boot/oflib.c
@@ -168,8 +168,19 @@ void *of_claim(unsigned long virt, unsigned long size, unsigned long align)
168 168
169void *of_vmlinux_alloc(unsigned long size) 169void *of_vmlinux_alloc(unsigned long size)
170{ 170{
171 void *p = malloc(size); 171 unsigned long start = (unsigned long)_start, end = (unsigned long)_end;
172 172 void *addr;
173 void *p;
174
175 /* With some older POWER4 firmware we need to claim the area the kernel
176 * will reside in. Newer firmwares don't need this so we just ignore
177 * the return value.
178 */
179 addr = of_claim(start, end - start, 0);
180 printf("Trying to claim from 0x%lx to 0x%lx (0x%lx) got %p\r\n",
181 start, end, end - start, addr);
182
183 p = malloc(size);
173 if (!p) 184 if (!p)
174 fatal("Can't allocate memory for kernel image!\n\r"); 185 fatal("Can't allocate memory for kernel image!\n\r");
175 186
diff --git a/arch/powerpc/boot/redboot-83xx.c b/arch/powerpc/boot/redboot-83xx.c
new file mode 100644
index 000000000000..79aa9e151fa7
--- /dev/null
+++ b/arch/powerpc/boot/redboot-83xx.c
@@ -0,0 +1,60 @@
1/*
2 * RedBoot firmware support
3 *
4 * Author: Scott Wood <scottwood@freescale.com>
5 *
6 * Copyright (c) 2007 Freescale Semiconductor, Inc.
7 * Copyright (c) 2008 Codehermit
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14#include "ops.h"
15#include "stdio.h"
16#include "redboot.h"
17#include "fsl-soc.h"
18#include "io.h"
19
20static bd_t bd;
21BSS_STACK(4096);
22
23#define MHZ(x) ((x + 500000) / 1000000)
24
25static void platform_fixups(void)
26{
27 void *node;
28
29 dt_fixup_memory(bd.bi_memstart, bd.bi_memsize);
30 dt_fixup_mac_addresses(bd.bi_enetaddr);
31 dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq);
32
33 node = finddevice("/soc/cpm/brg");
34 if (node) {
35 printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n",
36 bd.bi_busfreq, MHZ(bd.bi_busfreq));
37 setprop(node, "clock-frequency", &bd.bi_busfreq, 4);
38 }
39
40}
41
42void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
43 unsigned long r6, unsigned long r7)
44{
45 memcpy(&bd, (char *)r3, sizeof(bd));
46
47 if (bd.bi_tag != 0x42444944)
48 return;
49
50 simple_alloc_init(_end,
51 bd.bi_memstart + bd.bi_memsize - (unsigned long)_end,
52 32, 64);
53
54 fdt_init(_dtb_start);
55 serial_console_init();
56 platform_ops.fixups = platform_fixups;
57
58 loader_info.cmdline = (char *)bd.bi_cmdline;
59 loader_info.cmdline_len = strlen((char *)bd.bi_cmdline);
60}
diff --git a/arch/powerpc/boot/simpleboot.c b/arch/powerpc/boot/simpleboot.c
index 86cd285bccc6..c58a0dada992 100644
--- a/arch/powerpc/boot/simpleboot.c
+++ b/arch/powerpc/boot/simpleboot.c
@@ -23,6 +23,8 @@
23 23
24BSS_STACK(4*1024); 24BSS_STACK(4*1024);
25 25
26extern int platform_specific_init(void) __attribute__((weak));
27
26void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, 28void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
27 unsigned long r6, unsigned long r7) 29 unsigned long r6, unsigned long r7)
28{ 30{
@@ -80,5 +82,9 @@ void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
80 82
81 /* prepare the device tree and find the console */ 83 /* prepare the device tree and find the console */
82 fdt_init(_dtb_start); 84 fdt_init(_dtb_start);
85
86 if (platform_specific_init)
87 platform_specific_init();
88
83 serial_console_init(); 89 serial_console_init();
84} 90}
diff --git a/arch/powerpc/boot/virtex.c b/arch/powerpc/boot/virtex.c
new file mode 100644
index 000000000000..f622805f8000
--- /dev/null
+++ b/arch/powerpc/boot/virtex.c
@@ -0,0 +1,100 @@
1/*
2 * The platform specific code for virtex devices since a boot loader is not
3 * always used.
4 *
5 * (C) Copyright 2008 Xilinx, Inc.
6 *
7 * This program is free software; you can redistribute it and/or modify it
8 * under the terms of the GNU General Public License version 2 as published
9 * by the Free Software Foundation.
10 */
11
12#include "ops.h"
13#include "io.h"
14#include "stdio.h"
15
16#define UART_DLL 0 /* Out: Divisor Latch Low */
17#define UART_DLM 1 /* Out: Divisor Latch High */
18#define UART_FCR 2 /* Out: FIFO Control Register */
19#define UART_FCR_CLEAR_RCVR 0x02 /* Clear the RCVR FIFO */
20#define UART_FCR_CLEAR_XMIT 0x04 /* Clear the XMIT FIFO */
21#define UART_LCR 3 /* Out: Line Control Register */
22#define UART_MCR 4 /* Out: Modem Control Register */
23#define UART_MCR_RTS 0x02 /* RTS complement */
24#define UART_MCR_DTR 0x01 /* DTR complement */
25#define UART_LCR_DLAB 0x80 /* Divisor latch access bit */
26#define UART_LCR_WLEN8 0x03 /* Wordlength: 8 bits */
27
28static int virtex_ns16550_console_init(void *devp)
29{
30 unsigned char *reg_base;
31 u32 reg_shift, reg_offset, clk, spd;
32 u16 divisor;
33 int n;
34
35 if (dt_get_virtual_reg(devp, (void **)&reg_base, 1) < 1)
36 return -1;
37
38 n = getprop(devp, "reg-offset", &reg_offset, sizeof(reg_offset));
39 if (n == sizeof(reg_offset))
40 reg_base += reg_offset;
41
42 n = getprop(devp, "reg-shift", &reg_shift, sizeof(reg_shift));
43 if (n != sizeof(reg_shift))
44 reg_shift = 0;
45
46 n = getprop(devp, "current-speed", (void *)&spd, sizeof(spd));
47 if (n != sizeof(spd))
48 spd = 9600;
49
50 /* should there be a default clock rate?*/
51 n = getprop(devp, "clock-frequency", (void *)&clk, sizeof(clk));
52 if (n != sizeof(clk))
53 return -1;
54
55 divisor = clk / (16 * spd);
56
57 /* Access baud rate */
58 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_DLAB);
59
60 /* Baud rate based on input clock */
61 out_8(reg_base + (UART_DLL << reg_shift), divisor & 0xFF);
62 out_8(reg_base + (UART_DLM << reg_shift), divisor >> 8);
63
64 /* 8 data, 1 stop, no parity */
65 out_8(reg_base + (UART_LCR << reg_shift), UART_LCR_WLEN8);
66
67 /* RTS/DTR */
68 out_8(reg_base + (UART_MCR << reg_shift), UART_MCR_RTS | UART_MCR_DTR);
69
70 /* Clear transmitter and receiver */
71 out_8(reg_base + (UART_FCR << reg_shift),
72 UART_FCR_CLEAR_XMIT | UART_FCR_CLEAR_RCVR);
73 return 0;
74}
75
76/* For virtex, the kernel may be loaded without using a bootloader and if so
77 some UARTs need more setup than is provided in the normal console init
78*/
79int platform_specific_init(void)
80{
81 void *devp;
82 char devtype[MAX_PROP_LEN];
83 char path[MAX_PATH_LEN];
84
85 devp = finddevice("/chosen");
86 if (devp == NULL)
87 return -1;
88
89 if (getprop(devp, "linux,stdout-path", path, MAX_PATH_LEN) > 0) {
90 devp = finddevice(path);
91 if (devp == NULL)
92 return -1;
93
94 if ((getprop(devp, "device_type", devtype, sizeof(devtype)) > 0)
95 && !strcmp(devtype, "serial")
96 && (dt_is_compatible(devp, "ns16550")))
97 virtex_ns16550_console_init(devp);
98 }
99 return 0;
100}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index d6c96d9ab291..644bf9d4ea00 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -138,14 +138,20 @@ objflags=-S
138tmp=$tmpdir/zImage.$$.o 138tmp=$tmpdir/zImage.$$.o
139ksection=.kernel:vmlinux.strip 139ksection=.kernel:vmlinux.strip
140isection=.kernel:initrd 140isection=.kernel:initrd
141link_address='0x400000'
141 142
142case "$platform" in 143case "$platform" in
143pmac|pseries|chrp) 144pseries)
145 platformo=$object/of.o
146 link_address='0x4000000'
147 ;;
148pmac|chrp)
144 platformo=$object/of.o 149 platformo=$object/of.o
145 ;; 150 ;;
146coff) 151coff)
147 platformo=$object/of.o 152 platformo=$object/of.o
148 lds=$object/zImage.coff.lds 153 lds=$object/zImage.coff.lds
154 link_address='0x500000'
149 ;; 155 ;;
150miboot|uboot) 156miboot|uboot)
151 # miboot and U-boot want just the bare bits, not an ELF binary 157 # miboot and U-boot want just the bare bits, not an ELF binary
@@ -171,13 +177,13 @@ cuboot*)
171 *-mpc824*) 177 *-mpc824*)
172 platformo=$object/cuboot-824x.o 178 platformo=$object/cuboot-824x.o
173 ;; 179 ;;
174 *-mpc83*) 180 *-mpc83*|*-asp834x*)
175 platformo=$object/cuboot-83xx.o 181 platformo=$object/cuboot-83xx.o
176 ;; 182 ;;
177 *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) 183 *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*)
178 platformo=$object/cuboot-85xx-cpm2.o 184 platformo=$object/cuboot-85xx-cpm2.o
179 ;; 185 ;;
180 *-mpc85*|*-tqm8540|*-sbc85*) 186 *-mpc85*|*-tqm85*|*-sbc85*)
181 platformo=$object/cuboot-85xx.o 187 platformo=$object/cuboot-85xx.o
182 ;; 188 ;;
183 esac 189 esac
@@ -190,6 +196,7 @@ ps3)
190 objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data" 196 objflags="-O binary --set-section-flags=.bss=contents,alloc,load,data"
191 ksection=.kernel:vmlinux.bin 197 ksection=.kernel:vmlinux.bin
192 isection=.kernel:initrd 198 isection=.kernel:initrd
199 link_address=''
193 ;; 200 ;;
194ep88xc|ep405|ep8248e) 201ep88xc|ep405|ep8248e)
195 platformo="$object/fixed-head.o $object/$platform.o" 202 platformo="$object/fixed-head.o $object/$platform.o"
@@ -200,7 +207,19 @@ adder875-redboot)
200 binary=y 207 binary=y
201 ;; 208 ;;
202simpleboot-virtex405-*) 209simpleboot-virtex405-*)
203 platformo="$object/virtex405-head.o $object/simpleboot.o" 210 platformo="$object/virtex405-head.o $object/simpleboot.o $object/virtex.o"
211 binary=y
212 ;;
213simpleboot-virtex440-*)
214 platformo="$object/simpleboot.o $object/virtex.o"
215 binary=y
216 ;;
217simpleboot-*)
218 platformo="$object/simpleboot.o"
219 binary=y
220 ;;
221asp834x-redboot)
222 platformo="$object/fixed-head.o $object/redboot-83xx.o"
204 binary=y 223 binary=y
205 ;; 224 ;;
206esac 225esac
@@ -268,7 +287,10 @@ if [ -n "$dtb" ]; then
268fi 287fi
269 288
270if [ "$platform" != "miboot" ]; then 289if [ "$platform" != "miboot" ]; then
271 ${CROSS}ld -m elf32ppc -T $lds -o "$ofile" \ 290 if [ -n "$link_address" ] ; then
291 text_start="-Ttext $link_address --defsym _start=$link_address"
292 fi
293 ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \
272 $platformo $tmp $object/wrapper.a 294 $platformo $tmp $object/wrapper.a
273 rm $tmp 295 rm $tmp
274fi 296fi
diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S
index fe87a90ce7f1..856dc78b14ef 100644
--- a/arch/powerpc/boot/zImage.coff.lds.S
+++ b/arch/powerpc/boot/zImage.coff.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start_opd)
3EXTERN(_zimage_start_opd) 3EXTERN(_zimage_start_opd)
4SECTIONS 4SECTIONS
5{ 5{
6 . = (5*1024*1024);
7 _start = .; 6 _start = .;
8 .text : 7 .text :
9 { 8 {
diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S
index f6e380fdb388..0962d62bdb50 100644
--- a/arch/powerpc/boot/zImage.lds.S
+++ b/arch/powerpc/boot/zImage.lds.S
@@ -3,7 +3,6 @@ ENTRY(_zimage_start)
3EXTERN(_zimage_start) 3EXTERN(_zimage_start)
4SECTIONS 4SECTIONS
5{ 5{
6 . = (4*1024*1024);
7 _start = .; 6 _start = .;
8 .text : 7 .text :
9 { 8 {
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig
new file mode 100644
index 000000000000..9ce5cbc2a4e7
--- /dev/null
+++ b/arch/powerpc/configs/44x/sam440ep_defconfig
@@ -0,0 +1,1192 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25
4# Mon May 5 13:43:02 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_4xx=y
19CONFIG_BOOKE=y
20CONFIG_PTE_64BIT=y
21CONFIG_PHYS_64BIT=y
22# CONFIG_PPC_MM_SLICES is not set
23CONFIG_NOT_COHERENT_CACHE=y
24CONFIG_PPC32=y
25CONFIG_WORD_SIZE=32
26CONFIG_PPC_MERGE=y
27CONFIG_MMU=y
28CONFIG_GENERIC_CMOS_UPDATE=y
29CONFIG_GENERIC_TIME=y
30CONFIG_GENERIC_TIME_VSYSCALL=y
31CONFIG_GENERIC_CLOCKEVENTS=y
32CONFIG_GENERIC_HARDIRQS=y
33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
34CONFIG_IRQ_PER_CPU=y
35CONFIG_STACKTRACE_SUPPORT=y
36CONFIG_LOCKDEP_SUPPORT=y
37CONFIG_RWSEM_XCHGADD_ALGORITHM=y
38CONFIG_ARCH_HAS_ILOG2_U32=y
39CONFIG_GENERIC_HWEIGHT=y
40CONFIG_GENERIC_CALIBRATE_DELAY=y
41CONFIG_GENERIC_FIND_NEXT_BIT=y
42# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
43CONFIG_PPC=y
44CONFIG_EARLY_PRINTK=y
45CONFIG_GENERIC_NVRAM=y
46CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
47CONFIG_ARCH_MAY_HAVE_PC_FDC=y
48CONFIG_PPC_OF=y
49CONFIG_OF=y
50CONFIG_PPC_UDBG_16550=y
51# CONFIG_GENERIC_TBSYNC is not set
52CONFIG_AUDIT_ARCH=y
53CONFIG_GENERIC_BUG=y
54# CONFIG_DEFAULT_UIMAGE is not set
55CONFIG_PPC_DCR_NATIVE=y
56# CONFIG_PPC_DCR_MMIO is not set
57CONFIG_PPC_DCR=y
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_BROKEN_ON_SMP=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72# CONFIG_BSD_PROCESS_ACCT is not set
73# CONFIG_TASKSTATS is not set
74# CONFIG_AUDIT is not set
75CONFIG_IKCONFIG=y
76# CONFIG_IKCONFIG_PROC is not set
77CONFIG_LOG_BUF_SHIFT=14
78# CONFIG_CGROUPS is not set
79CONFIG_GROUP_SCHED=y
80CONFIG_FAIR_GROUP_SCHED=y
81# CONFIG_RT_GROUP_SCHED is not set
82CONFIG_USER_SCHED=y
83# CONFIG_CGROUP_SCHED is not set
84CONFIG_SYSFS_DEPRECATED=y
85CONFIG_SYSFS_DEPRECATED_V2=y
86# CONFIG_RELAY is not set
87# CONFIG_NAMESPACES is not set
88CONFIG_BLK_DEV_INITRD=y
89CONFIG_INITRAMFS_SOURCE=""
90# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
91CONFIG_SYSCTL=y
92CONFIG_EMBEDDED=y
93CONFIG_SYSCTL_SYSCALL=y
94CONFIG_SYSCTL_SYSCALL_CHECK=y
95CONFIG_KALLSYMS=y
96# CONFIG_KALLSYMS_EXTRA_PASS is not set
97CONFIG_HOTPLUG=y
98CONFIG_PRINTK=y
99CONFIG_BUG=y
100CONFIG_ELF_CORE=y
101CONFIG_COMPAT_BRK=y
102CONFIG_BASE_FULL=y
103CONFIG_FUTEX=y
104CONFIG_ANON_INODES=y
105CONFIG_EPOLL=y
106CONFIG_SIGNALFD=y
107CONFIG_TIMERFD=y
108CONFIG_EVENTFD=y
109CONFIG_SHMEM=y
110CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_SLUB_DEBUG=y
112# CONFIG_SLAB is not set
113CONFIG_SLUB=y
114# CONFIG_SLOB is not set
115# CONFIG_PROFILING is not set
116# CONFIG_MARKERS is not set
117CONFIG_HAVE_OPROFILE=y
118# CONFIG_KPROBES is not set
119CONFIG_HAVE_KPROBES=y
120CONFIG_HAVE_KRETPROBES=y
121# CONFIG_HAVE_DMA_ATTRS is not set
122CONFIG_PROC_PAGE_MONITOR=y
123CONFIG_SLABINFO=y
124CONFIG_RT_MUTEXES=y
125# CONFIG_TINY_SHMEM is not set
126CONFIG_BASE_SMALL=0
127CONFIG_MODULES=y
128CONFIG_MODULE_UNLOAD=y
129# CONFIG_MODULE_FORCE_UNLOAD is not set
130# CONFIG_MODVERSIONS is not set
131# CONFIG_MODULE_SRCVERSION_ALL is not set
132CONFIG_KMOD=y
133CONFIG_BLOCK=y
134# CONFIG_LBD is not set
135# CONFIG_BLK_DEV_IO_TRACE is not set
136# CONFIG_LSF is not set
137# CONFIG_BLK_DEV_BSG is not set
138
139#
140# IO Schedulers
141#
142CONFIG_IOSCHED_NOOP=y
143CONFIG_IOSCHED_AS=y
144# CONFIG_IOSCHED_DEADLINE is not set
145# CONFIG_IOSCHED_CFQ is not set
146CONFIG_DEFAULT_AS=y
147# CONFIG_DEFAULT_DEADLINE is not set
148# CONFIG_DEFAULT_CFQ is not set
149# CONFIG_DEFAULT_NOOP is not set
150CONFIG_DEFAULT_IOSCHED="anticipatory"
151CONFIG_CLASSIC_RCU=y
152# CONFIG_PPC4xx_PCI_EXPRESS is not set
153
154#
155# Platform support
156#
157# CONFIG_PPC_MPC512x is not set
158# CONFIG_PPC_MPC5121 is not set
159# CONFIG_PPC_CELL is not set
160# CONFIG_PPC_CELL_NATIVE is not set
161# CONFIG_PQ2ADS is not set
162# CONFIG_BAMBOO is not set
163# CONFIG_EBONY is not set
164CONFIG_SAM440EP=y
165# CONFIG_SEQUOIA is not set
166# CONFIG_TAISHAN is not set
167# CONFIG_KATMAI is not set
168# CONFIG_RAINIER is not set
169# CONFIG_WARP is not set
170# CONFIG_CANYONLANDS is not set
171# CONFIG_YOSEMITE is not set
172CONFIG_440EP=y
173CONFIG_IBM440EP_ERR42=y
174# CONFIG_IPIC is not set
175# CONFIG_MPIC is not set
176# CONFIG_MPIC_WEIRD is not set
177# CONFIG_PPC_I8259 is not set
178# CONFIG_PPC_RTAS is not set
179# CONFIG_MMIO_NVRAM is not set
180# CONFIG_PPC_MPC106 is not set
181# CONFIG_PPC_970_NAP is not set
182# CONFIG_PPC_INDIRECT_IO is not set
183# CONFIG_GENERIC_IOMAP is not set
184# CONFIG_CPU_FREQ is not set
185# CONFIG_FSL_ULI1575 is not set
186
187#
188# Kernel options
189#
190# CONFIG_HIGHMEM is not set
191# CONFIG_TICK_ONESHOT is not set
192# CONFIG_NO_HZ is not set
193# CONFIG_HIGH_RES_TIMERS is not set
194CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
195# CONFIG_HZ_100 is not set
196CONFIG_HZ_250=y
197# CONFIG_HZ_300 is not set
198# CONFIG_HZ_1000 is not set
199CONFIG_HZ=250
200# CONFIG_SCHED_HRTICK is not set
201CONFIG_PREEMPT_NONE=y
202# CONFIG_PREEMPT_VOLUNTARY is not set
203# CONFIG_PREEMPT is not set
204CONFIG_BINFMT_ELF=y
205# CONFIG_BINFMT_MISC is not set
206# CONFIG_MATH_EMULATION is not set
207# CONFIG_IOMMU_HELPER is not set
208CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
209CONFIG_ARCH_HAS_WALK_MEMORY=y
210CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
211CONFIG_ARCH_FLATMEM_ENABLE=y
212CONFIG_ARCH_POPULATES_NODE_MAP=y
213CONFIG_SELECT_MEMORY_MODEL=y
214CONFIG_FLATMEM_MANUAL=y
215# CONFIG_DISCONTIGMEM_MANUAL is not set
216# CONFIG_SPARSEMEM_MANUAL is not set
217CONFIG_FLATMEM=y
218CONFIG_FLAT_NODE_MEM_MAP=y
219# CONFIG_SPARSEMEM_STATIC is not set
220# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
221CONFIG_PAGEFLAGS_EXTENDED=y
222CONFIG_SPLIT_PTLOCK_CPUS=4
223CONFIG_RESOURCES_64BIT=y
224CONFIG_ZONE_DMA_FLAG=1
225CONFIG_BOUNCE=y
226CONFIG_VIRT_TO_BUS=y
227CONFIG_FORCE_MAX_ZONEORDER=11
228CONFIG_PROC_DEVICETREE=y
229CONFIG_CMDLINE_BOOL=y
230CONFIG_CMDLINE=""
231CONFIG_SECCOMP=y
232CONFIG_ISA_DMA_API=y
233
234#
235# Bus options
236#
237CONFIG_ZONE_DMA=y
238CONFIG_PPC_INDIRECT_PCI=y
239CONFIG_4xx_SOC=y
240CONFIG_PCI=y
241CONFIG_PCI_DOMAINS=y
242CONFIG_PCI_SYSCALL=y
243# CONFIG_PCIEPORTBUS is not set
244CONFIG_ARCH_SUPPORTS_MSI=y
245# CONFIG_PCI_MSI is not set
246CONFIG_PCI_LEGACY=y
247# CONFIG_PCCARD is not set
248# CONFIG_HOTPLUG_PCI is not set
249# CONFIG_HAS_RAPIDIO is not set
250
251#
252# Advanced setup
253#
254# CONFIG_ADVANCED_OPTIONS is not set
255
256#
257# Default settings for advanced configuration options are used
258#
259CONFIG_LOWMEM_SIZE=0x30000000
260CONFIG_PAGE_OFFSET=0xc0000000
261CONFIG_KERNEL_START=0xc0000000
262CONFIG_PHYSICAL_START=0x00000000
263CONFIG_TASK_SIZE=0xc0000000
264CONFIG_CONSISTENT_START=0xff100000
265CONFIG_CONSISTENT_SIZE=0x00200000
266
267#
268# Networking
269#
270CONFIG_NET=y
271
272#
273# Networking options
274#
275CONFIG_PACKET=y
276# CONFIG_PACKET_MMAP is not set
277CONFIG_UNIX=y
278# CONFIG_NET_KEY is not set
279CONFIG_INET=y
280# CONFIG_IP_MULTICAST is not set
281# CONFIG_IP_ADVANCED_ROUTER is not set
282CONFIG_IP_FIB_HASH=y
283CONFIG_IP_PNP=y
284CONFIG_IP_PNP_DHCP=y
285CONFIG_IP_PNP_BOOTP=y
286# CONFIG_IP_PNP_RARP is not set
287# CONFIG_NET_IPIP is not set
288# CONFIG_NET_IPGRE is not set
289# CONFIG_ARPD is not set
290# CONFIG_SYN_COOKIES is not set
291# CONFIG_INET_AH is not set
292# CONFIG_INET_ESP is not set
293# CONFIG_INET_IPCOMP is not set
294# CONFIG_INET_XFRM_TUNNEL is not set
295# CONFIG_INET_TUNNEL is not set
296# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
297# CONFIG_INET_XFRM_MODE_TUNNEL is not set
298# CONFIG_INET_XFRM_MODE_BEET is not set
299# CONFIG_INET_LRO is not set
300CONFIG_INET_DIAG=y
301CONFIG_INET_TCP_DIAG=y
302# CONFIG_TCP_CONG_ADVANCED is not set
303CONFIG_TCP_CONG_CUBIC=y
304CONFIG_DEFAULT_TCP_CONG="cubic"
305# CONFIG_TCP_MD5SIG is not set
306# CONFIG_IPV6 is not set
307# CONFIG_NETWORK_SECMARK is not set
308# CONFIG_NETFILTER is not set
309# CONFIG_IP_DCCP is not set
310# CONFIG_IP_SCTP is not set
311# CONFIG_TIPC is not set
312# CONFIG_ATM is not set
313# CONFIG_BRIDGE is not set
314# CONFIG_VLAN_8021Q is not set
315# CONFIG_DECNET is not set
316# CONFIG_LLC2 is not set
317# CONFIG_IPX is not set
318# CONFIG_ATALK is not set
319# CONFIG_X25 is not set
320# CONFIG_LAPB is not set
321# CONFIG_ECONET is not set
322# CONFIG_WAN_ROUTER is not set
323# CONFIG_NET_SCHED is not set
324
325#
326# Network testing
327#
328# CONFIG_NET_PKTGEN is not set
329# CONFIG_HAMRADIO is not set
330# CONFIG_CAN is not set
331# CONFIG_IRDA is not set
332# CONFIG_BT is not set
333# CONFIG_AF_RXRPC is not set
334
335#
336# Wireless
337#
338# CONFIG_CFG80211 is not set
339# CONFIG_WIRELESS_EXT is not set
340# CONFIG_MAC80211 is not set
341# CONFIG_IEEE80211 is not set
342# CONFIG_RFKILL is not set
343# CONFIG_NET_9P is not set
344
345#
346# Device Drivers
347#
348
349#
350# Generic Driver Options
351#
352CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
353CONFIG_STANDALONE=y
354CONFIG_PREVENT_FIRMWARE_BUILD=y
355CONFIG_FW_LOADER=y
356# CONFIG_SYS_HYPERVISOR is not set
357CONFIG_CONNECTOR=y
358CONFIG_PROC_EVENTS=y
359# CONFIG_MTD is not set
360CONFIG_OF_DEVICE=y
361CONFIG_OF_I2C=y
362# CONFIG_PARPORT is not set
363CONFIG_BLK_DEV=y
364# CONFIG_BLK_DEV_FD is not set
365# CONFIG_BLK_CPQ_DA is not set
366# CONFIG_BLK_CPQ_CISS_DA is not set
367# CONFIG_BLK_DEV_DAC960 is not set
368# CONFIG_BLK_DEV_UMEM is not set
369# CONFIG_BLK_DEV_COW_COMMON is not set
370CONFIG_BLK_DEV_LOOP=y
371# CONFIG_BLK_DEV_CRYPTOLOOP is not set
372# CONFIG_BLK_DEV_NBD is not set
373# CONFIG_BLK_DEV_SX8 is not set
374# CONFIG_BLK_DEV_UB is not set
375CONFIG_BLK_DEV_RAM=y
376CONFIG_BLK_DEV_RAM_COUNT=16
377CONFIG_BLK_DEV_RAM_SIZE=35000
378# CONFIG_BLK_DEV_XIP is not set
379# CONFIG_CDROM_PKTCDVD is not set
380# CONFIG_ATA_OVER_ETH is not set
381# CONFIG_XILINX_SYSACE is not set
382# CONFIG_MISC_DEVICES is not set
383CONFIG_HAVE_IDE=y
384# CONFIG_IDE is not set
385
386#
387# SCSI device support
388#
389# CONFIG_RAID_ATTRS is not set
390CONFIG_SCSI=y
391CONFIG_SCSI_DMA=y
392# CONFIG_SCSI_TGT is not set
393# CONFIG_SCSI_NETLINK is not set
394CONFIG_SCSI_PROC_FS=y
395
396#
397# SCSI support type (disk, tape, CD-ROM)
398#
399CONFIG_BLK_DEV_SD=y
400# CONFIG_CHR_DEV_ST is not set
401# CONFIG_CHR_DEV_OSST is not set
402CONFIG_BLK_DEV_SR=y
403# CONFIG_BLK_DEV_SR_VENDOR is not set
404CONFIG_CHR_DEV_SG=y
405# CONFIG_CHR_DEV_SCH is not set
406
407#
408# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
409#
410# CONFIG_SCSI_MULTI_LUN is not set
411# CONFIG_SCSI_CONSTANTS is not set
412# CONFIG_SCSI_LOGGING is not set
413# CONFIG_SCSI_SCAN_ASYNC is not set
414CONFIG_SCSI_WAIT_SCAN=m
415
416#
417# SCSI Transports
418#
419# CONFIG_SCSI_SPI_ATTRS is not set
420# CONFIG_SCSI_FC_ATTRS is not set
421# CONFIG_SCSI_ISCSI_ATTRS is not set
422# CONFIG_SCSI_SAS_LIBSAS is not set
423# CONFIG_SCSI_SRP_ATTRS is not set
424# CONFIG_SCSI_LOWLEVEL is not set
425CONFIG_ATA=y
426# CONFIG_ATA_NONSTANDARD is not set
427# CONFIG_SATA_PMP is not set
428# CONFIG_SATA_AHCI is not set
429# CONFIG_SATA_SIL24 is not set
430CONFIG_ATA_SFF=y
431# CONFIG_SATA_SVW is not set
432# CONFIG_ATA_PIIX is not set
433# CONFIG_SATA_MV is not set
434# CONFIG_SATA_NV is not set
435# CONFIG_PDC_ADMA is not set
436# CONFIG_SATA_QSTOR is not set
437# CONFIG_SATA_PROMISE is not set
438# CONFIG_SATA_SX4 is not set
439CONFIG_SATA_SIL=y
440# CONFIG_SATA_SIS is not set
441# CONFIG_SATA_ULI is not set
442# CONFIG_SATA_VIA is not set
443# CONFIG_SATA_VITESSE is not set
444# CONFIG_SATA_INIC162X is not set
445# CONFIG_PATA_ALI is not set
446# CONFIG_PATA_AMD is not set
447# CONFIG_PATA_ARTOP is not set
448# CONFIG_PATA_ATIIXP is not set
449# CONFIG_PATA_CMD640_PCI is not set
450# CONFIG_PATA_CMD64X is not set
451# CONFIG_PATA_CS5520 is not set
452# CONFIG_PATA_CS5530 is not set
453# CONFIG_PATA_CYPRESS is not set
454# CONFIG_PATA_EFAR is not set
455# CONFIG_ATA_GENERIC is not set
456# CONFIG_PATA_HPT366 is not set
457# CONFIG_PATA_HPT37X is not set
458# CONFIG_PATA_HPT3X2N is not set
459# CONFIG_PATA_HPT3X3 is not set
460# CONFIG_PATA_IT821X is not set
461# CONFIG_PATA_IT8213 is not set
462# CONFIG_PATA_JMICRON is not set
463# CONFIG_PATA_TRIFLEX is not set
464# CONFIG_PATA_MARVELL is not set
465# CONFIG_PATA_MPIIX is not set
466# CONFIG_PATA_OLDPIIX is not set
467# CONFIG_PATA_NETCELL is not set
468# CONFIG_PATA_NINJA32 is not set
469# CONFIG_PATA_NS87410 is not set
470# CONFIG_PATA_NS87415 is not set
471# CONFIG_PATA_OPTI is not set
472# CONFIG_PATA_OPTIDMA is not set
473# CONFIG_PATA_PDC_OLD is not set
474# CONFIG_PATA_RADISYS is not set
475# CONFIG_PATA_RZ1000 is not set
476# CONFIG_PATA_SC1200 is not set
477# CONFIG_PATA_SERVERWORKS is not set
478# CONFIG_PATA_PDC2027X is not set
479# CONFIG_PATA_SIL680 is not set
480# CONFIG_PATA_SIS is not set
481# CONFIG_PATA_VIA is not set
482# CONFIG_PATA_WINBOND is not set
483# CONFIG_PATA_PLATFORM is not set
484# CONFIG_MD is not set
485# CONFIG_FUSION is not set
486
487#
488# IEEE 1394 (FireWire) support
489#
490# CONFIG_FIREWIRE is not set
491# CONFIG_IEEE1394 is not set
492# CONFIG_I2O is not set
493# CONFIG_MACINTOSH_DRIVERS is not set
494CONFIG_NETDEVICES=y
495# CONFIG_NETDEVICES_MULTIQUEUE is not set
496# CONFIG_DUMMY is not set
497# CONFIG_BONDING is not set
498# CONFIG_MACVLAN is not set
499# CONFIG_EQUALIZER is not set
500# CONFIG_TUN is not set
501# CONFIG_VETH is not set
502# CONFIG_ARCNET is not set
503# CONFIG_PHYLIB is not set
504CONFIG_NET_ETHERNET=y
505# CONFIG_MII is not set
506# CONFIG_HAPPYMEAL is not set
507# CONFIG_SUNGEM is not set
508# CONFIG_CASSINI is not set
509# CONFIG_NET_VENDOR_3COM is not set
510# CONFIG_NET_TULIP is not set
511# CONFIG_HP100 is not set
512CONFIG_IBM_NEW_EMAC=y
513CONFIG_IBM_NEW_EMAC_RXB=128
514CONFIG_IBM_NEW_EMAC_TXB=64
515CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32
516CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256
517CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0
518# CONFIG_IBM_NEW_EMAC_DEBUG is not set
519CONFIG_IBM_NEW_EMAC_ZMII=y
520# CONFIG_IBM_NEW_EMAC_RGMII is not set
521# CONFIG_IBM_NEW_EMAC_TAH is not set
522# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
523# CONFIG_NET_PCI is not set
524# CONFIG_B44 is not set
525# CONFIG_NETDEV_1000 is not set
526# CONFIG_NETDEV_10000 is not set
527# CONFIG_TR is not set
528
529#
530# Wireless LAN
531#
532# CONFIG_WLAN_PRE80211 is not set
533# CONFIG_WLAN_80211 is not set
534# CONFIG_IWLWIFI is not set
535# CONFIG_IWLWIFI_LEDS is not set
536
537#
538# USB Network Adapters
539#
540# CONFIG_USB_CATC is not set
541# CONFIG_USB_KAWETH is not set
542# CONFIG_USB_PEGASUS is not set
543# CONFIG_USB_RTL8150 is not set
544# CONFIG_USB_USBNET is not set
545# CONFIG_WAN is not set
546# CONFIG_FDDI is not set
547# CONFIG_HIPPI is not set
548# CONFIG_PPP is not set
549# CONFIG_SLIP is not set
550# CONFIG_NET_FC is not set
551# CONFIG_NETCONSOLE is not set
552# CONFIG_NETPOLL is not set
553# CONFIG_NET_POLL_CONTROLLER is not set
554# CONFIG_ISDN is not set
555# CONFIG_PHONE is not set
556
557#
558# Input device support
559#
560CONFIG_INPUT=y
561# CONFIG_INPUT_FF_MEMLESS is not set
562# CONFIG_INPUT_POLLDEV is not set
563
564#
565# Userland interfaces
566#
567CONFIG_INPUT_MOUSEDEV=y
568CONFIG_INPUT_MOUSEDEV_PSAUX=y
569CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
570CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
571# CONFIG_INPUT_JOYDEV is not set
572# CONFIG_INPUT_EVDEV is not set
573# CONFIG_INPUT_EVBUG is not set
574
575#
576# Input Device Drivers
577#
578CONFIG_INPUT_KEYBOARD=y
579CONFIG_KEYBOARD_ATKBD=y
580# CONFIG_KEYBOARD_SUNKBD is not set
581# CONFIG_KEYBOARD_LKKBD is not set
582# CONFIG_KEYBOARD_XTKBD is not set
583# CONFIG_KEYBOARD_NEWTON is not set
584# CONFIG_KEYBOARD_STOWAWAY is not set
585CONFIG_INPUT_MOUSE=y
586CONFIG_MOUSE_PS2=y
587CONFIG_MOUSE_PS2_ALPS=y
588CONFIG_MOUSE_PS2_LOGIPS2PP=y
589CONFIG_MOUSE_PS2_SYNAPTICS=y
590CONFIG_MOUSE_PS2_LIFEBOOK=y
591CONFIG_MOUSE_PS2_TRACKPOINT=y
592# CONFIG_MOUSE_PS2_TOUCHKIT is not set
593# CONFIG_MOUSE_SERIAL is not set
594# CONFIG_MOUSE_APPLETOUCH is not set
595# CONFIG_MOUSE_VSXXXAA is not set
596# CONFIG_INPUT_JOYSTICK is not set
597# CONFIG_INPUT_TABLET is not set
598# CONFIG_INPUT_TOUCHSCREEN is not set
599# CONFIG_INPUT_MISC is not set
600
601#
602# Hardware I/O ports
603#
604CONFIG_SERIO=y
605CONFIG_SERIO_I8042=y
606CONFIG_SERIO_SERPORT=y
607# CONFIG_SERIO_PCIPS2 is not set
608CONFIG_SERIO_LIBPS2=y
609# CONFIG_SERIO_RAW is not set
610# CONFIG_GAMEPORT is not set
611
612#
613# Character devices
614#
615CONFIG_VT=y
616CONFIG_VT_CONSOLE=y
617CONFIG_HW_CONSOLE=y
618# CONFIG_VT_HW_CONSOLE_BINDING is not set
619CONFIG_DEVKMEM=y
620# CONFIG_SERIAL_NONSTANDARD is not set
621# CONFIG_NOZOMI is not set
622
623#
624# Serial drivers
625#
626CONFIG_SERIAL_8250=y
627CONFIG_SERIAL_8250_CONSOLE=y
628# CONFIG_SERIAL_8250_PCI is not set
629CONFIG_SERIAL_8250_NR_UARTS=4
630CONFIG_SERIAL_8250_RUNTIME_UARTS=4
631CONFIG_SERIAL_8250_EXTENDED=y
632# CONFIG_SERIAL_8250_MANY_PORTS is not set
633CONFIG_SERIAL_8250_SHARE_IRQ=y
634# CONFIG_SERIAL_8250_DETECT_IRQ is not set
635# CONFIG_SERIAL_8250_RSA is not set
636
637#
638# Non-8250 serial port support
639#
640# CONFIG_SERIAL_UARTLITE is not set
641CONFIG_SERIAL_CORE=y
642CONFIG_SERIAL_CORE_CONSOLE=y
643# CONFIG_SERIAL_JSM is not set
644CONFIG_SERIAL_OF_PLATFORM=y
645CONFIG_UNIX98_PTYS=y
646CONFIG_LEGACY_PTYS=y
647CONFIG_LEGACY_PTY_COUNT=256
648# CONFIG_IPMI_HANDLER is not set
649# CONFIG_HW_RANDOM is not set
650# CONFIG_NVRAM is not set
651# CONFIG_R3964 is not set
652# CONFIG_APPLICOM is not set
653# CONFIG_RAW_DRIVER is not set
654# CONFIG_TCG_TPM is not set
655CONFIG_DEVPORT=y
656CONFIG_I2C=y
657CONFIG_I2C_BOARDINFO=y
658# CONFIG_I2C_CHARDEV is not set
659CONFIG_I2C_ALGOBIT=y
660
661#
662# I2C Hardware Bus support
663#
664# CONFIG_I2C_ALI1535 is not set
665# CONFIG_I2C_ALI1563 is not set
666# CONFIG_I2C_ALI15X3 is not set
667# CONFIG_I2C_AMD756 is not set
668# CONFIG_I2C_AMD8111 is not set
669# CONFIG_I2C_I801 is not set
670# CONFIG_I2C_I810 is not set
671# CONFIG_I2C_PIIX4 is not set
672CONFIG_I2C_IBM_IIC=y
673# CONFIG_I2C_MPC is not set
674# CONFIG_I2C_NFORCE2 is not set
675# CONFIG_I2C_OCORES is not set
676# CONFIG_I2C_PARPORT_LIGHT is not set
677# CONFIG_I2C_PROSAVAGE is not set
678# CONFIG_I2C_SAVAGE4 is not set
679# CONFIG_I2C_SIMTEC is not set
680# CONFIG_I2C_SIS5595 is not set
681# CONFIG_I2C_SIS630 is not set
682# CONFIG_I2C_SIS96X is not set
683# CONFIG_I2C_TAOS_EVM is not set
684# CONFIG_I2C_STUB is not set
685# CONFIG_I2C_TINY_USB is not set
686# CONFIG_I2C_VIA is not set
687# CONFIG_I2C_VIAPRO is not set
688# CONFIG_I2C_VOODOO3 is not set
689# CONFIG_I2C_PCA_PLATFORM is not set
690
691#
692# Miscellaneous I2C Chip support
693#
694# CONFIG_DS1682 is not set
695# CONFIG_SENSORS_EEPROM is not set
696# CONFIG_SENSORS_PCF8574 is not set
697# CONFIG_PCF8575 is not set
698# CONFIG_SENSORS_PCF8591 is not set
699# CONFIG_SENSORS_MAX6875 is not set
700# CONFIG_SENSORS_TSL2550 is not set
701# CONFIG_I2C_DEBUG_CORE is not set
702# CONFIG_I2C_DEBUG_ALGO is not set
703# CONFIG_I2C_DEBUG_BUS is not set
704# CONFIG_I2C_DEBUG_CHIP is not set
705# CONFIG_SPI is not set
706# CONFIG_W1 is not set
707# CONFIG_POWER_SUPPLY is not set
708# CONFIG_HWMON is not set
709# CONFIG_THERMAL is not set
710# CONFIG_WATCHDOG is not set
711
712#
713# Sonics Silicon Backplane
714#
715CONFIG_SSB_POSSIBLE=y
716# CONFIG_SSB is not set
717
718#
719# Multifunction device drivers
720#
721# CONFIG_MFD_SM501 is not set
722# CONFIG_HTC_PASIC3 is not set
723
724#
725# Multimedia devices
726#
727
728#
729# Multimedia core support
730#
731# CONFIG_VIDEO_DEV is not set
732# CONFIG_DVB_CORE is not set
733
734#
735# Multimedia drivers
736#
737# CONFIG_DAB is not set
738
739#
740# Graphics support
741#
742# CONFIG_AGP is not set
743# CONFIG_DRM is not set
744# CONFIG_VGASTATE is not set
745CONFIG_VIDEO_OUTPUT_CONTROL=y
746CONFIG_FB=y
747# CONFIG_FIRMWARE_EDID is not set
748CONFIG_FB_DDC=y
749CONFIG_FB_CFB_FILLRECT=y
750CONFIG_FB_CFB_COPYAREA=y
751CONFIG_FB_CFB_IMAGEBLIT=y
752# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
753# CONFIG_FB_SYS_FILLRECT is not set
754# CONFIG_FB_SYS_COPYAREA is not set
755# CONFIG_FB_SYS_IMAGEBLIT is not set
756# CONFIG_FB_FOREIGN_ENDIAN is not set
757# CONFIG_FB_SYS_FOPS is not set
758CONFIG_FB_DEFERRED_IO=y
759# CONFIG_FB_SVGALIB is not set
760CONFIG_FB_MACMODES=y
761CONFIG_FB_BACKLIGHT=y
762CONFIG_FB_MODE_HELPERS=y
763# CONFIG_FB_TILEBLITTING is not set
764
765#
766# Frame buffer hardware drivers
767#
768# CONFIG_FB_CIRRUS is not set
769# CONFIG_FB_PM2 is not set
770# CONFIG_FB_CYBER2000 is not set
771# CONFIG_FB_OF is not set
772# CONFIG_FB_CT65550 is not set
773# CONFIG_FB_ASILIANT is not set
774# CONFIG_FB_IMSTT is not set
775# CONFIG_FB_VGA16 is not set
776# CONFIG_FB_UVESA is not set
777# CONFIG_FB_S1D13XXX is not set
778# CONFIG_FB_NVIDIA is not set
779# CONFIG_FB_RIVA is not set
780# CONFIG_FB_MATROX is not set
781CONFIG_FB_RADEON=y
782CONFIG_FB_RADEON_I2C=y
783CONFIG_FB_RADEON_BACKLIGHT=y
784# CONFIG_FB_RADEON_DEBUG is not set
785# CONFIG_FB_ATY128 is not set
786# CONFIG_FB_ATY is not set
787# CONFIG_FB_S3 is not set
788# CONFIG_FB_SAVAGE is not set
789# CONFIG_FB_SIS is not set
790# CONFIG_FB_NEOMAGIC is not set
791# CONFIG_FB_KYRO is not set
792# CONFIG_FB_3DFX is not set
793# CONFIG_FB_VOODOO1 is not set
794# CONFIG_FB_VT8623 is not set
795# CONFIG_FB_TRIDENT is not set
796# CONFIG_FB_ARK is not set
797# CONFIG_FB_PM3 is not set
798# CONFIG_FB_IBM_GXT4500 is not set
799# CONFIG_FB_VIRTUAL is not set
800CONFIG_BACKLIGHT_LCD_SUPPORT=y
801CONFIG_LCD_CLASS_DEVICE=y
802CONFIG_BACKLIGHT_CLASS_DEVICE=y
803# CONFIG_BACKLIGHT_CORGI is not set
804
805#
806# Display device support
807#
808# CONFIG_DISPLAY_SUPPORT is not set
809
810#
811# Console display driver support
812#
813CONFIG_DUMMY_CONSOLE=y
814CONFIG_FRAMEBUFFER_CONSOLE=y
815CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y
816# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
817# CONFIG_FONTS is not set
818CONFIG_FONT_8x8=y
819CONFIG_FONT_8x16=y
820CONFIG_LOGO=y
821CONFIG_LOGO_LINUX_MONO=y
822CONFIG_LOGO_LINUX_VGA16=y
823CONFIG_LOGO_LINUX_CLUT224=y
824
825#
826# Sound
827#
828# CONFIG_SOUND is not set
829CONFIG_HID_SUPPORT=y
830CONFIG_HID=y
831# CONFIG_HID_DEBUG is not set
832# CONFIG_HIDRAW is not set
833
834#
835# USB Input Devices
836#
837CONFIG_USB_HID=y
838# CONFIG_USB_HIDINPUT_POWERBOOK is not set
839# CONFIG_HID_FF is not set
840# CONFIG_USB_HIDDEV is not set
841CONFIG_USB_SUPPORT=y
842CONFIG_USB_ARCH_HAS_HCD=y
843CONFIG_USB_ARCH_HAS_OHCI=y
844CONFIG_USB_ARCH_HAS_EHCI=y
845CONFIG_USB=y
846# CONFIG_USB_DEBUG is not set
847# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
848
849#
850# Miscellaneous USB options
851#
852CONFIG_USB_DEVICEFS=y
853# CONFIG_USB_DEVICE_CLASS is not set
854# CONFIG_USB_DYNAMIC_MINORS is not set
855# CONFIG_USB_OTG is not set
856# CONFIG_USB_OTG_WHITELIST is not set
857# CONFIG_USB_OTG_BLACKLIST_HUB is not set
858
859#
860# USB Host Controller Drivers
861#
862CONFIG_USB_EHCI_HCD=m
863# CONFIG_USB_EHCI_ROOT_HUB_TT is not set
864# CONFIG_USB_EHCI_TT_NEWSCHED is not set
865CONFIG_USB_EHCI_HCD_PPC_OF=y
866# CONFIG_USB_ISP116X_HCD is not set
867CONFIG_USB_OHCI_HCD=y
868CONFIG_USB_OHCI_HCD_PPC_OF=y
869CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
870CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
871CONFIG_USB_OHCI_HCD_PCI=y
872CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
873CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
874CONFIG_USB_OHCI_LITTLE_ENDIAN=y
875# CONFIG_USB_UHCI_HCD is not set
876# CONFIG_USB_SL811_HCD is not set
877# CONFIG_USB_R8A66597_HCD is not set
878
879#
880# USB Device Class drivers
881#
882# CONFIG_USB_ACM is not set
883# CONFIG_USB_PRINTER is not set
884
885#
886# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
887#
888
889#
890# may also be needed; see USB_STORAGE Help for more information
891#
892CONFIG_USB_STORAGE=m
893# CONFIG_USB_STORAGE_DEBUG is not set
894# CONFIG_USB_STORAGE_DATAFAB is not set
895# CONFIG_USB_STORAGE_FREECOM is not set
896# CONFIG_USB_STORAGE_ISD200 is not set
897# CONFIG_USB_STORAGE_DPCM is not set
898# CONFIG_USB_STORAGE_USBAT is not set
899# CONFIG_USB_STORAGE_SDDR09 is not set
900# CONFIG_USB_STORAGE_SDDR55 is not set
901# CONFIG_USB_STORAGE_JUMPSHOT is not set
902# CONFIG_USB_STORAGE_ALAUDA is not set
903# CONFIG_USB_STORAGE_KARMA is not set
904# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
905# CONFIG_USB_LIBUSUAL is not set
906
907#
908# USB Imaging devices
909#
910# CONFIG_USB_MDC800 is not set
911# CONFIG_USB_MICROTEK is not set
912# CONFIG_USB_MON is not set
913
914#
915# USB port drivers
916#
917# CONFIG_USB_SERIAL is not set
918
919#
920# USB Miscellaneous drivers
921#
922# CONFIG_USB_EMI62 is not set
923# CONFIG_USB_EMI26 is not set
924# CONFIG_USB_ADUTUX is not set
925# CONFIG_USB_AUERSWALD is not set
926# CONFIG_USB_RIO500 is not set
927# CONFIG_USB_LEGOTOWER is not set
928# CONFIG_USB_LCD is not set
929# CONFIG_USB_BERRY_CHARGE is not set
930# CONFIG_USB_LED is not set
931# CONFIG_USB_CYPRESS_CY7C63 is not set
932# CONFIG_USB_CYTHERM is not set
933# CONFIG_USB_PHIDGET is not set
934# CONFIG_USB_IDMOUSE is not set
935# CONFIG_USB_FTDI_ELAN is not set
936# CONFIG_USB_APPLEDISPLAY is not set
937# CONFIG_USB_SISUSBVGA is not set
938# CONFIG_USB_LD is not set
939# CONFIG_USB_TRANCEVIBRATOR is not set
940# CONFIG_USB_IOWARRIOR is not set
941# CONFIG_USB_TEST is not set
942# CONFIG_USB_GADGET is not set
943# CONFIG_MMC is not set
944# CONFIG_MEMSTICK is not set
945# CONFIG_NEW_LEDS is not set
946# CONFIG_ACCESSIBILITY is not set
947# CONFIG_INFINIBAND is not set
948# CONFIG_EDAC is not set
949CONFIG_RTC_LIB=y
950CONFIG_RTC_CLASS=y
951CONFIG_RTC_HCTOSYS=y
952CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
953# CONFIG_RTC_DEBUG is not set
954
955#
956# RTC interfaces
957#
958CONFIG_RTC_INTF_SYSFS=y
959CONFIG_RTC_INTF_PROC=y
960CONFIG_RTC_INTF_DEV=y
961# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
962# CONFIG_RTC_DRV_TEST is not set
963
964#
965# I2C RTC drivers
966#
967# CONFIG_RTC_DRV_DS1307 is not set
968# CONFIG_RTC_DRV_DS1374 is not set
969# CONFIG_RTC_DRV_DS1672 is not set
970# CONFIG_RTC_DRV_MAX6900 is not set
971# CONFIG_RTC_DRV_RS5C372 is not set
972# CONFIG_RTC_DRV_ISL1208 is not set
973# CONFIG_RTC_DRV_X1205 is not set
974# CONFIG_RTC_DRV_PCF8563 is not set
975# CONFIG_RTC_DRV_PCF8583 is not set
976CONFIG_RTC_DRV_M41T80=y
977CONFIG_RTC_DRV_M41T80_WDT=y
978# CONFIG_RTC_DRV_S35390A is not set
979
980#
981# SPI RTC drivers
982#
983
984#
985# Platform RTC drivers
986#
987# CONFIG_RTC_DRV_CMOS is not set
988# CONFIG_RTC_DRV_DS1511 is not set
989# CONFIG_RTC_DRV_DS1553 is not set
990# CONFIG_RTC_DRV_DS1742 is not set
991# CONFIG_RTC_DRV_STK17TA8 is not set
992# CONFIG_RTC_DRV_M48T86 is not set
993# CONFIG_RTC_DRV_M48T59 is not set
994# CONFIG_RTC_DRV_V3020 is not set
995
996#
997# on-CPU RTC drivers
998#
999# CONFIG_DMADEVICES is not set
1000# CONFIG_UIO is not set
1001
1002#
1003# File systems
1004#
1005CONFIG_EXT2_FS=y
1006CONFIG_EXT2_FS_XATTR=y
1007CONFIG_EXT2_FS_POSIX_ACL=y
1008# CONFIG_EXT2_FS_SECURITY is not set
1009# CONFIG_EXT2_FS_XIP is not set
1010CONFIG_EXT3_FS=y
1011CONFIG_EXT3_FS_XATTR=y
1012CONFIG_EXT3_FS_POSIX_ACL=y
1013# CONFIG_EXT3_FS_SECURITY is not set
1014# CONFIG_EXT4DEV_FS is not set
1015CONFIG_JBD=y
1016CONFIG_FS_MBCACHE=y
1017CONFIG_REISERFS_FS=y
1018# CONFIG_REISERFS_CHECK is not set
1019# CONFIG_REISERFS_PROC_INFO is not set
1020# CONFIG_REISERFS_FS_XATTR is not set
1021# CONFIG_JFS_FS is not set
1022CONFIG_FS_POSIX_ACL=y
1023# CONFIG_XFS_FS is not set
1024# CONFIG_OCFS2_FS is not set
1025CONFIG_DNOTIFY=y
1026CONFIG_INOTIFY=y
1027CONFIG_INOTIFY_USER=y
1028# CONFIG_QUOTA is not set
1029# CONFIG_AUTOFS_FS is not set
1030CONFIG_AUTOFS4_FS=y
1031# CONFIG_FUSE_FS is not set
1032
1033#
1034# CD-ROM/DVD Filesystems
1035#
1036CONFIG_ISO9660_FS=y
1037CONFIG_JOLIET=y
1038CONFIG_ZISOFS=y
1039CONFIG_UDF_FS=y
1040CONFIG_UDF_NLS=y
1041
1042#
1043# DOS/FAT/NT Filesystems
1044#
1045CONFIG_FAT_FS=m
1046CONFIG_MSDOS_FS=m
1047CONFIG_VFAT_FS=m
1048CONFIG_FAT_DEFAULT_CODEPAGE=437
1049CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1050# CONFIG_NTFS_FS is not set
1051
1052#
1053# Pseudo filesystems
1054#
1055CONFIG_PROC_FS=y
1056CONFIG_PROC_KCORE=y
1057CONFIG_PROC_SYSCTL=y
1058CONFIG_SYSFS=y
1059CONFIG_TMPFS=y
1060# CONFIG_TMPFS_POSIX_ACL is not set
1061# CONFIG_HUGETLB_PAGE is not set
1062# CONFIG_CONFIGFS_FS is not set
1063
1064#
1065# Miscellaneous filesystems
1066#
1067# CONFIG_ADFS_FS is not set
1068CONFIG_AFFS_FS=m
1069# CONFIG_HFS_FS is not set
1070# CONFIG_HFSPLUS_FS is not set
1071# CONFIG_BEFS_FS is not set
1072# CONFIG_BFS_FS is not set
1073# CONFIG_EFS_FS is not set
1074# CONFIG_CRAMFS is not set
1075# CONFIG_VXFS_FS is not set
1076# CONFIG_MINIX_FS is not set
1077# CONFIG_HPFS_FS is not set
1078# CONFIG_QNX4FS_FS is not set
1079# CONFIG_ROMFS_FS is not set
1080# CONFIG_SYSV_FS is not set
1081# CONFIG_UFS_FS is not set
1082# CONFIG_NETWORK_FILESYSTEMS is not set
1083
1084#
1085# Partition Types
1086#
1087CONFIG_PARTITION_ADVANCED=y
1088# CONFIG_ACORN_PARTITION is not set
1089# CONFIG_OSF_PARTITION is not set
1090CONFIG_AMIGA_PARTITION=y
1091# CONFIG_ATARI_PARTITION is not set
1092# CONFIG_MAC_PARTITION is not set
1093CONFIG_MSDOS_PARTITION=y
1094# CONFIG_BSD_DISKLABEL is not set
1095# CONFIG_MINIX_SUBPARTITION is not set
1096# CONFIG_SOLARIS_X86_PARTITION is not set
1097# CONFIG_UNIXWARE_DISKLABEL is not set
1098# CONFIG_LDM_PARTITION is not set
1099# CONFIG_SGI_PARTITION is not set
1100# CONFIG_ULTRIX_PARTITION is not set
1101# CONFIG_SUN_PARTITION is not set
1102# CONFIG_KARMA_PARTITION is not set
1103# CONFIG_EFI_PARTITION is not set
1104# CONFIG_SYSV68_PARTITION is not set
1105CONFIG_NLS=y
1106CONFIG_NLS_DEFAULT="iso8859-1"
1107CONFIG_NLS_CODEPAGE_437=y
1108# CONFIG_NLS_CODEPAGE_737 is not set
1109# CONFIG_NLS_CODEPAGE_775 is not set
1110# CONFIG_NLS_CODEPAGE_850 is not set
1111# CONFIG_NLS_CODEPAGE_852 is not set
1112# CONFIG_NLS_CODEPAGE_855 is not set
1113# CONFIG_NLS_CODEPAGE_857 is not set
1114# CONFIG_NLS_CODEPAGE_860 is not set
1115# CONFIG_NLS_CODEPAGE_861 is not set
1116# CONFIG_NLS_CODEPAGE_862 is not set
1117# CONFIG_NLS_CODEPAGE_863 is not set
1118# CONFIG_NLS_CODEPAGE_864 is not set
1119# CONFIG_NLS_CODEPAGE_865 is not set
1120# CONFIG_NLS_CODEPAGE_866 is not set
1121# CONFIG_NLS_CODEPAGE_869 is not set
1122# CONFIG_NLS_CODEPAGE_936 is not set
1123# CONFIG_NLS_CODEPAGE_950 is not set
1124# CONFIG_NLS_CODEPAGE_932 is not set
1125# CONFIG_NLS_CODEPAGE_949 is not set
1126# CONFIG_NLS_CODEPAGE_874 is not set
1127# CONFIG_NLS_ISO8859_8 is not set
1128# CONFIG_NLS_CODEPAGE_1250 is not set
1129# CONFIG_NLS_CODEPAGE_1251 is not set
1130# CONFIG_NLS_ASCII is not set
1131CONFIG_NLS_ISO8859_1=y
1132# CONFIG_NLS_ISO8859_2 is not set
1133# CONFIG_NLS_ISO8859_3 is not set
1134# CONFIG_NLS_ISO8859_4 is not set
1135# CONFIG_NLS_ISO8859_5 is not set
1136# CONFIG_NLS_ISO8859_6 is not set
1137# CONFIG_NLS_ISO8859_7 is not set
1138# CONFIG_NLS_ISO8859_9 is not set
1139# CONFIG_NLS_ISO8859_13 is not set
1140# CONFIG_NLS_ISO8859_14 is not set
1141# CONFIG_NLS_ISO8859_15 is not set
1142# CONFIG_NLS_KOI8_R is not set
1143# CONFIG_NLS_KOI8_U is not set
1144# CONFIG_NLS_UTF8 is not set
1145# CONFIG_DLM is not set
1146
1147#
1148# Library routines
1149#
1150CONFIG_BITREVERSE=y
1151# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1152# CONFIG_CRC_CCITT is not set
1153# CONFIG_CRC16 is not set
1154CONFIG_CRC_ITU_T=y
1155CONFIG_CRC32=y
1156# CONFIG_CRC7 is not set
1157# CONFIG_LIBCRC32C is not set
1158CONFIG_ZLIB_INFLATE=y
1159CONFIG_PLIST=y
1160CONFIG_HAS_IOMEM=y
1161CONFIG_HAS_IOPORT=y
1162CONFIG_HAS_DMA=y
1163CONFIG_HAVE_LMB=y
1164
1165#
1166# Kernel hacking
1167#
1168# CONFIG_PRINTK_TIME is not set
1169CONFIG_ENABLE_WARN_DEPRECATED=y
1170CONFIG_ENABLE_MUST_CHECK=y
1171CONFIG_FRAME_WARN=1024
1172CONFIG_MAGIC_SYSRQ=y
1173# CONFIG_UNUSED_SYMBOLS is not set
1174# CONFIG_DEBUG_FS is not set
1175# CONFIG_HEADERS_CHECK is not set
1176# CONFIG_DEBUG_KERNEL is not set
1177# CONFIG_SLUB_DEBUG_ON is not set
1178# CONFIG_SLUB_STATS is not set
1179# CONFIG_DEBUG_BUGVERBOSE is not set
1180# CONFIG_SAMPLES is not set
1181# CONFIG_IRQSTACKS is not set
1182# CONFIG_PPC_EARLY_DEBUG is not set
1183
1184#
1185# Security options
1186#
1187# CONFIG_KEYS is not set
1188# CONFIG_SECURITY is not set
1189# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1190# CONFIG_CRYPTO is not set
1191# CONFIG_PPC_CLOCK is not set
1192# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig
index 087aedce1338..e53c92655bd6 100644
--- a/arch/powerpc/configs/44x/taishan_defconfig
+++ b/arch/powerpc/configs/44x/taishan_defconfig
@@ -348,7 +348,83 @@ CONFIG_FW_LOADER=y
348# CONFIG_SYS_HYPERVISOR is not set 348# CONFIG_SYS_HYPERVISOR is not set
349CONFIG_CONNECTOR=y 349CONFIG_CONNECTOR=y
350CONFIG_PROC_EVENTS=y 350CONFIG_PROC_EVENTS=y
351# CONFIG_MTD is not set 351CONFIG_MTD=y
352# CONFIG_MTD_DEBUG is not set
353# CONFIG_MTD_CONCAT is not set
354CONFIG_MTD_PARTITIONS=y
355# CONFIG_MTD_REDBOOT_PARTS is not set
356CONFIG_MTD_CMDLINE_PARTS=y
357
358#
359# User Modules And Translation Layers
360#
361CONFIG_MTD_CHAR=y
362# CONFIG_MTD_BLKDEVS is not set
363# CONFIG_MTD_BLOCK is not set
364# CONFIG_MTD_BLOCK_RO is not set
365# CONFIG_FTL is not set
366# CONFIG_NFTL is not set
367# CONFIG_INFTL is not set
368# CONFIG_RFD_FTL is not set
369# CONFIG_SSFDC is not set
370# CONFIG_MTD_OOPS is not set
371
372#
373# RAM/ROM/Flash chip drivers
374#
375CONFIG_MTD_CFI=y
376# CONFIG_MTD_JEDECPROBE is not set
377CONFIG_MTD_GEN_PROBE=y
378# CONFIG_MTD_CFI_ADV_OPTIONS is not set
379CONFIG_MTD_MAP_BANK_WIDTH_1=y
380CONFIG_MTD_MAP_BANK_WIDTH_2=y
381CONFIG_MTD_MAP_BANK_WIDTH_4=y
382# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
383# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
384# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
385CONFIG_MTD_CFI_I1=y
386CONFIG_MTD_CFI_I2=y
387# CONFIG_MTD_CFI_I4 is not set
388# CONFIG_MTD_CFI_I8 is not set
389# CONFIG_MTD_CFI_INTELEXT is not set
390CONFIG_MTD_CFI_AMDSTD=y
391# CONFIG_MTD_CFI_STAA is not set
392CONFIG_MTD_CFI_UTIL=y
393# CONFIG_MTD_RAM is not set
394# CONFIG_MTD_ROM is not set
395# CONFIG_MTD_ABSENT is not set
396
397#
398# Mapping drivers for chip access
399#
400# CONFIG_MTD_COMPLEX_MAPPINGS is not set
401# CONFIG_MTD_PHYSMAP is not set
402CONFIG_MTD_PHYSMAP_OF=y
403# CONFIG_MTD_INTEL_VR_NOR is not set
404# CONFIG_MTD_PLATRAM is not set
405
406#
407# Self-contained MTD device drivers
408#
409# CONFIG_MTD_PMC551 is not set
410# CONFIG_MTD_SLRAM is not set
411# CONFIG_MTD_PHRAM is not set
412# CONFIG_MTD_MTDRAM is not set
413# CONFIG_MTD_BLOCK2MTD is not set
414
415#
416# Disk-On-Chip Device Drivers
417#
418# CONFIG_MTD_DOC2000 is not set
419# CONFIG_MTD_DOC2001 is not set
420# CONFIG_MTD_DOC2001PLUS is not set
421# CONFIG_MTD_NAND is not set
422# CONFIG_MTD_ONENAND is not set
423
424#
425# UBI - Unsorted block images
426#
427# CONFIG_MTD_UBI is not set
352CONFIG_OF_DEVICE=y 428CONFIG_OF_DEVICE=y
353# CONFIG_PARPORT is not set 429# CONFIG_PARPORT is not set
354CONFIG_BLK_DEV=y 430CONFIG_BLK_DEV=y
@@ -660,6 +736,7 @@ CONFIG_TMPFS=y
660# CONFIG_BEFS_FS is not set 736# CONFIG_BEFS_FS is not set
661# CONFIG_BFS_FS is not set 737# CONFIG_BFS_FS is not set
662# CONFIG_EFS_FS is not set 738# CONFIG_EFS_FS is not set
739# CONFIG_JFFS2_FS is not set
663CONFIG_CRAMFS=y 740CONFIG_CRAMFS=y
664# CONFIG_VXFS_FS is not set 741# CONFIG_VXFS_FS is not set
665# CONFIG_MINIX_FS is not set 742# CONFIG_MINIX_FS is not set
diff --git a/arch/powerpc/configs/44x/virtex5_defconfig b/arch/powerpc/configs/44x/virtex5_defconfig
new file mode 100644
index 000000000000..9c41f66b5a7d
--- /dev/null
+++ b/arch/powerpc/configs/44x/virtex5_defconfig
@@ -0,0 +1,1107 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc8
4# Wed Jul 2 15:36:41 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15CONFIG_44x=y
16# CONFIG_E200 is not set
17CONFIG_4xx=y
18CONFIG_BOOKE=y
19CONFIG_PTE_64BIT=y
20CONFIG_PHYS_64BIT=y
21# CONFIG_PPC_MM_SLICES is not set
22CONFIG_NOT_COHERENT_CACHE=y
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
33CONFIG_IRQ_PER_CPU=y
34CONFIG_STACKTRACE_SUPPORT=y
35CONFIG_LOCKDEP_SUPPORT=y
36CONFIG_RWSEM_XCHGADD_ALGORITHM=y
37CONFIG_ARCH_HAS_ILOG2_U32=y
38CONFIG_GENERIC_HWEIGHT=y
39CONFIG_GENERIC_CALIBRATE_DELAY=y
40CONFIG_GENERIC_FIND_NEXT_BIT=y
41# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
42CONFIG_PPC=y
43CONFIG_EARLY_PRINTK=y
44CONFIG_GENERIC_NVRAM=y
45CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
46CONFIG_ARCH_MAY_HAVE_PC_FDC=y
47CONFIG_PPC_OF=y
48CONFIG_OF=y
49CONFIG_PPC_UDBG_16550=y
50# CONFIG_GENERIC_TBSYNC is not set
51CONFIG_AUDIT_ARCH=y
52CONFIG_GENERIC_BUG=y
53# CONFIG_DEFAULT_UIMAGE is not set
54CONFIG_PPC_DCR_NATIVE=y
55# CONFIG_PPC_DCR_MMIO is not set
56CONFIG_PPC_DCR=y
57CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
58
59#
60# General setup
61#
62CONFIG_EXPERIMENTAL=y
63CONFIG_BROKEN_ON_SMP=y
64CONFIG_LOCK_KERNEL=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67# CONFIG_LOCALVERSION_AUTO is not set
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72# CONFIG_BSD_PROCESS_ACCT is not set
73# CONFIG_TASKSTATS is not set
74# CONFIG_AUDIT is not set
75CONFIG_IKCONFIG=y
76CONFIG_IKCONFIG_PROC=y
77CONFIG_LOG_BUF_SHIFT=14
78# CONFIG_CGROUPS is not set
79# CONFIG_GROUP_SCHED is not set
80CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y
82# CONFIG_RELAY is not set
83CONFIG_NAMESPACES=y
84# CONFIG_UTS_NS is not set
85# CONFIG_IPC_NS is not set
86# CONFIG_USER_NS is not set
87# CONFIG_PID_NS is not set
88CONFIG_BLK_DEV_INITRD=y
89CONFIG_INITRAMFS_SOURCE=""
90# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
91CONFIG_SYSCTL=y
92# CONFIG_EMBEDDED is not set
93CONFIG_SYSCTL_SYSCALL=y
94CONFIG_SYSCTL_SYSCALL_CHECK=y
95CONFIG_KALLSYMS=y
96# CONFIG_KALLSYMS_EXTRA_PASS is not set
97CONFIG_HOTPLUG=y
98CONFIG_PRINTK=y
99CONFIG_BUG=y
100CONFIG_ELF_CORE=y
101CONFIG_COMPAT_BRK=y
102CONFIG_BASE_FULL=y
103CONFIG_FUTEX=y
104CONFIG_ANON_INODES=y
105CONFIG_EPOLL=y
106CONFIG_SIGNALFD=y
107CONFIG_TIMERFD=y
108CONFIG_EVENTFD=y
109CONFIG_SHMEM=y
110CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_SLAB=y
112# CONFIG_SLUB is not set
113# CONFIG_SLOB is not set
114# CONFIG_PROFILING is not set
115# CONFIG_MARKERS is not set
116CONFIG_HAVE_OPROFILE=y
117# CONFIG_KPROBES is not set
118CONFIG_HAVE_KPROBES=y
119CONFIG_HAVE_KRETPROBES=y
120# CONFIG_HAVE_DMA_ATTRS is not set
121CONFIG_PROC_PAGE_MONITOR=y
122CONFIG_SLABINFO=y
123CONFIG_RT_MUTEXES=y
124# CONFIG_TINY_SHMEM is not set
125CONFIG_BASE_SMALL=0
126CONFIG_MODULES=y
127# CONFIG_MODULE_FORCE_LOAD is not set
128CONFIG_MODULE_UNLOAD=y
129CONFIG_MODULE_FORCE_UNLOAD=y
130CONFIG_MODVERSIONS=y
131# CONFIG_MODULE_SRCVERSION_ALL is not set
132CONFIG_KMOD=y
133CONFIG_BLOCK=y
134# CONFIG_LBD is not set
135# CONFIG_BLK_DEV_IO_TRACE is not set
136# CONFIG_LSF is not set
137# CONFIG_BLK_DEV_BSG is not set
138
139#
140# IO Schedulers
141#
142CONFIG_IOSCHED_NOOP=y
143CONFIG_IOSCHED_AS=y
144CONFIG_IOSCHED_DEADLINE=y
145CONFIG_IOSCHED_CFQ=y
146# CONFIG_DEFAULT_AS is not set
147# CONFIG_DEFAULT_DEADLINE is not set
148CONFIG_DEFAULT_CFQ=y
149# CONFIG_DEFAULT_NOOP is not set
150CONFIG_DEFAULT_IOSCHED="cfq"
151CONFIG_CLASSIC_RCU=y
152# CONFIG_PPC4xx_PCI_EXPRESS is not set
153
154#
155# Platform support
156#
157# CONFIG_PPC_MPC512x is not set
158# CONFIG_PPC_MPC5121 is not set
159# CONFIG_PPC_CELL is not set
160# CONFIG_PPC_CELL_NATIVE is not set
161# CONFIG_PQ2ADS is not set
162# CONFIG_BAMBOO is not set
163# CONFIG_EBONY is not set
164# CONFIG_SEQUOIA is not set
165# CONFIG_TAISHAN is not set
166# CONFIG_KATMAI is not set
167# CONFIG_RAINIER is not set
168# CONFIG_WARP is not set
169# CONFIG_CANYONLANDS is not set
170# CONFIG_YOSEMITE is not set
171CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y
172CONFIG_XILINX_VIRTEX=y
173CONFIG_XILINX_VIRTEX_5_FXT=y
174# CONFIG_IPIC is not set
175# CONFIG_MPIC is not set
176# CONFIG_MPIC_WEIRD is not set
177# CONFIG_PPC_I8259 is not set
178# CONFIG_PPC_RTAS is not set
179# CONFIG_MMIO_NVRAM is not set
180# CONFIG_PPC_MPC106 is not set
181# CONFIG_PPC_970_NAP is not set
182# CONFIG_PPC_INDIRECT_IO is not set
183# CONFIG_GENERIC_IOMAP is not set
184# CONFIG_CPU_FREQ is not set
185# CONFIG_FSL_ULI1575 is not set
186
187#
188# Kernel options
189#
190# CONFIG_HIGHMEM is not set
191# CONFIG_TICK_ONESHOT is not set
192# CONFIG_NO_HZ is not set
193# CONFIG_HIGH_RES_TIMERS is not set
194CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
195# CONFIG_HZ_100 is not set
196CONFIG_HZ_250=y
197# CONFIG_HZ_300 is not set
198# CONFIG_HZ_1000 is not set
199CONFIG_HZ=250
200# CONFIG_SCHED_HRTICK is not set
201# CONFIG_PREEMPT_NONE is not set
202# CONFIG_PREEMPT_VOLUNTARY is not set
203CONFIG_PREEMPT=y
204# CONFIG_PREEMPT_RCU is not set
205CONFIG_BINFMT_ELF=y
206# CONFIG_BINFMT_MISC is not set
207CONFIG_MATH_EMULATION=y
208# CONFIG_IOMMU_HELPER is not set
209CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
210CONFIG_ARCH_HAS_WALK_MEMORY=y
211CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
212CONFIG_ARCH_FLATMEM_ENABLE=y
213CONFIG_ARCH_POPULATES_NODE_MAP=y
214CONFIG_SELECT_MEMORY_MODEL=y
215CONFIG_FLATMEM_MANUAL=y
216# CONFIG_DISCONTIGMEM_MANUAL is not set
217# CONFIG_SPARSEMEM_MANUAL is not set
218CONFIG_FLATMEM=y
219CONFIG_FLAT_NODE_MEM_MAP=y
220# CONFIG_SPARSEMEM_STATIC is not set
221# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
222CONFIG_PAGEFLAGS_EXTENDED=y
223CONFIG_SPLIT_PTLOCK_CPUS=4
224CONFIG_RESOURCES_64BIT=y
225CONFIG_ZONE_DMA_FLAG=1
226CONFIG_BOUNCE=y
227CONFIG_VIRT_TO_BUS=y
228CONFIG_FORCE_MAX_ZONEORDER=11
229CONFIG_PROC_DEVICETREE=y
230CONFIG_CMDLINE_BOOL=y
231CONFIG_CMDLINE=""
232CONFIG_EXTRA_TARGETS=""
233CONFIG_SECCOMP=y
234CONFIG_ISA_DMA_API=y
235
236#
237# Bus options
238#
239CONFIG_ZONE_DMA=y
240CONFIG_PPC_INDIRECT_PCI=y
241CONFIG_4xx_SOC=y
242CONFIG_PCI=y
243CONFIG_PCI_DOMAINS=y
244CONFIG_PCI_SYSCALL=y
245# CONFIG_PCIEPORTBUS is not set
246CONFIG_ARCH_SUPPORTS_MSI=y
247# CONFIG_PCI_MSI is not set
248CONFIG_PCI_LEGACY=y
249# CONFIG_PCCARD is not set
250# CONFIG_HOTPLUG_PCI is not set
251# CONFIG_HAS_RAPIDIO is not set
252
253#
254# Advanced setup
255#
256# CONFIG_ADVANCED_OPTIONS is not set
257
258#
259# Default settings for advanced configuration options are used
260#
261CONFIG_LOWMEM_SIZE=0x30000000
262CONFIG_PAGE_OFFSET=0xc0000000
263CONFIG_KERNEL_START=0xc0000000
264CONFIG_PHYSICAL_START=0x00000000
265CONFIG_TASK_SIZE=0xc0000000
266CONFIG_CONSISTENT_START=0xff100000
267CONFIG_CONSISTENT_SIZE=0x00200000
268
269#
270# Networking
271#
272CONFIG_NET=y
273
274#
275# Networking options
276#
277CONFIG_PACKET=y
278# CONFIG_PACKET_MMAP is not set
279CONFIG_UNIX=y
280CONFIG_XFRM=y
281# CONFIG_XFRM_USER is not set
282# CONFIG_XFRM_SUB_POLICY is not set
283# CONFIG_XFRM_MIGRATE is not set
284# CONFIG_XFRM_STATISTICS is not set
285# CONFIG_NET_KEY is not set
286CONFIG_INET=y
287CONFIG_IP_MULTICAST=y
288# CONFIG_IP_ADVANCED_ROUTER is not set
289CONFIG_IP_FIB_HASH=y
290CONFIG_IP_PNP=y
291CONFIG_IP_PNP_DHCP=y
292CONFIG_IP_PNP_BOOTP=y
293# CONFIG_IP_PNP_RARP is not set
294# CONFIG_NET_IPIP is not set
295# CONFIG_NET_IPGRE is not set
296# CONFIG_IP_MROUTE is not set
297# CONFIG_ARPD is not set
298# CONFIG_SYN_COOKIES is not set
299# CONFIG_INET_AH is not set
300# CONFIG_INET_ESP is not set
301# CONFIG_INET_IPCOMP is not set
302# CONFIG_INET_XFRM_TUNNEL is not set
303CONFIG_INET_TUNNEL=m
304CONFIG_INET_XFRM_MODE_TRANSPORT=y
305CONFIG_INET_XFRM_MODE_TUNNEL=y
306CONFIG_INET_XFRM_MODE_BEET=y
307# CONFIG_INET_LRO is not set
308CONFIG_INET_DIAG=y
309CONFIG_INET_TCP_DIAG=y
310# CONFIG_TCP_CONG_ADVANCED is not set
311CONFIG_TCP_CONG_CUBIC=y
312CONFIG_DEFAULT_TCP_CONG="cubic"
313# CONFIG_TCP_MD5SIG is not set
314# CONFIG_IP_VS is not set
315CONFIG_IPV6=m
316# CONFIG_IPV6_PRIVACY is not set
317# CONFIG_IPV6_ROUTER_PREF is not set
318# CONFIG_IPV6_OPTIMISTIC_DAD is not set
319# CONFIG_INET6_AH is not set
320# CONFIG_INET6_ESP is not set
321# CONFIG_INET6_IPCOMP is not set
322# CONFIG_IPV6_MIP6 is not set
323# CONFIG_INET6_XFRM_TUNNEL is not set
324# CONFIG_INET6_TUNNEL is not set
325CONFIG_INET6_XFRM_MODE_TRANSPORT=m
326CONFIG_INET6_XFRM_MODE_TUNNEL=m
327CONFIG_INET6_XFRM_MODE_BEET=m
328# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
329CONFIG_IPV6_SIT=m
330CONFIG_IPV6_NDISC_NODETYPE=y
331# CONFIG_IPV6_TUNNEL is not set
332# CONFIG_IPV6_MULTIPLE_TABLES is not set
333# CONFIG_IPV6_MROUTE is not set
334# CONFIG_NETWORK_SECMARK is not set
335CONFIG_NETFILTER=y
336# CONFIG_NETFILTER_DEBUG is not set
337CONFIG_NETFILTER_ADVANCED=y
338
339#
340# Core Netfilter Configuration
341#
342# CONFIG_NETFILTER_NETLINK_QUEUE is not set
343# CONFIG_NETFILTER_NETLINK_LOG is not set
344# CONFIG_NF_CONNTRACK is not set
345CONFIG_NETFILTER_XTABLES=m
346# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
347# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
348# CONFIG_NETFILTER_XT_TARGET_MARK is not set
349# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
350# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
351# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
352# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
353# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
354# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
355# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
356# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
357# CONFIG_NETFILTER_XT_MATCH_ESP is not set
358# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
359# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
360# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
361# CONFIG_NETFILTER_XT_MATCH_MAC is not set
362# CONFIG_NETFILTER_XT_MATCH_MARK is not set
363# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
364# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
365# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
366# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
367# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
368# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
369# CONFIG_NETFILTER_XT_MATCH_REALM is not set
370# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
371# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
372# CONFIG_NETFILTER_XT_MATCH_STRING is not set
373# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
374# CONFIG_NETFILTER_XT_MATCH_TIME is not set
375# CONFIG_NETFILTER_XT_MATCH_U32 is not set
376# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
377
378#
379# IP: Netfilter Configuration
380#
381# CONFIG_IP_NF_QUEUE is not set
382CONFIG_IP_NF_IPTABLES=m
383# CONFIG_IP_NF_MATCH_RECENT is not set
384# CONFIG_IP_NF_MATCH_ECN is not set
385# CONFIG_IP_NF_MATCH_AH is not set
386# CONFIG_IP_NF_MATCH_TTL is not set
387# CONFIG_IP_NF_MATCH_ADDRTYPE is not set
388CONFIG_IP_NF_FILTER=m
389# CONFIG_IP_NF_TARGET_REJECT is not set
390# CONFIG_IP_NF_TARGET_LOG is not set
391# CONFIG_IP_NF_TARGET_ULOG is not set
392CONFIG_IP_NF_MANGLE=m
393# CONFIG_IP_NF_TARGET_ECN is not set
394# CONFIG_IP_NF_TARGET_TTL is not set
395# CONFIG_IP_NF_RAW is not set
396# CONFIG_IP_NF_ARPTABLES is not set
397
398#
399# IPv6: Netfilter Configuration
400#
401# CONFIG_IP6_NF_QUEUE is not set
402# CONFIG_IP6_NF_IPTABLES is not set
403# CONFIG_IP_DCCP is not set
404# CONFIG_IP_SCTP is not set
405# CONFIG_TIPC is not set
406# CONFIG_ATM is not set
407# CONFIG_BRIDGE is not set
408# CONFIG_VLAN_8021Q is not set
409# CONFIG_DECNET is not set
410# CONFIG_LLC2 is not set
411# CONFIG_IPX is not set
412# CONFIG_ATALK is not set
413# CONFIG_X25 is not set
414# CONFIG_LAPB is not set
415# CONFIG_ECONET is not set
416# CONFIG_WAN_ROUTER is not set
417# CONFIG_NET_SCHED is not set
418
419#
420# Network testing
421#
422# CONFIG_NET_PKTGEN is not set
423# CONFIG_HAMRADIO is not set
424# CONFIG_CAN is not set
425# CONFIG_IRDA is not set
426# CONFIG_BT is not set
427# CONFIG_AF_RXRPC is not set
428
429#
430# Wireless
431#
432# CONFIG_CFG80211 is not set
433# CONFIG_WIRELESS_EXT is not set
434# CONFIG_MAC80211 is not set
435# CONFIG_IEEE80211 is not set
436# CONFIG_RFKILL is not set
437# CONFIG_NET_9P is not set
438
439#
440# Device Drivers
441#
442
443#
444# Generic Driver Options
445#
446CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
447CONFIG_STANDALONE=y
448CONFIG_PREVENT_FIRMWARE_BUILD=y
449# CONFIG_FW_LOADER is not set
450# CONFIG_SYS_HYPERVISOR is not set
451# CONFIG_CONNECTOR is not set
452# CONFIG_MTD is not set
453CONFIG_OF_DEVICE=y
454CONFIG_OF_I2C=y
455# CONFIG_PARPORT is not set
456CONFIG_BLK_DEV=y
457# CONFIG_BLK_DEV_FD is not set
458# CONFIG_BLK_CPQ_DA is not set
459# CONFIG_BLK_CPQ_CISS_DA is not set
460# CONFIG_BLK_DEV_DAC960 is not set
461# CONFIG_BLK_DEV_UMEM is not set
462# CONFIG_BLK_DEV_COW_COMMON is not set
463CONFIG_BLK_DEV_LOOP=y
464# CONFIG_BLK_DEV_CRYPTOLOOP is not set
465# CONFIG_BLK_DEV_NBD is not set
466# CONFIG_BLK_DEV_SX8 is not set
467CONFIG_BLK_DEV_RAM=y
468CONFIG_BLK_DEV_RAM_COUNT=16
469CONFIG_BLK_DEV_RAM_SIZE=8192
470# CONFIG_BLK_DEV_XIP is not set
471# CONFIG_CDROM_PKTCDVD is not set
472# CONFIG_ATA_OVER_ETH is not set
473# CONFIG_XILINX_SYSACE is not set
474CONFIG_MISC_DEVICES=y
475# CONFIG_PHANTOM is not set
476# CONFIG_EEPROM_93CX6 is not set
477# CONFIG_SGI_IOC4 is not set
478# CONFIG_TIFM_CORE is not set
479# CONFIG_ENCLOSURE_SERVICES is not set
480CONFIG_HAVE_IDE=y
481# CONFIG_IDE is not set
482
483#
484# SCSI device support
485#
486# CONFIG_RAID_ATTRS is not set
487# CONFIG_SCSI is not set
488# CONFIG_SCSI_DMA is not set
489# CONFIG_SCSI_NETLINK is not set
490# CONFIG_ATA is not set
491# CONFIG_MD is not set
492# CONFIG_FUSION is not set
493
494#
495# IEEE 1394 (FireWire) support
496#
497
498#
499# Enable only one of the two stacks, unless you know what you are doing
500#
501# CONFIG_FIREWIRE is not set
502# CONFIG_IEEE1394 is not set
503# CONFIG_I2O is not set
504# CONFIG_MACINTOSH_DRIVERS is not set
505CONFIG_NETDEVICES=y
506# CONFIG_NETDEVICES_MULTIQUEUE is not set
507# CONFIG_DUMMY is not set
508# CONFIG_BONDING is not set
509# CONFIG_MACVLAN is not set
510# CONFIG_EQUALIZER is not set
511# CONFIG_TUN is not set
512# CONFIG_VETH is not set
513# CONFIG_ARCNET is not set
514# CONFIG_PHYLIB is not set
515CONFIG_NET_ETHERNET=y
516CONFIG_MII=y
517# CONFIG_HAPPYMEAL is not set
518# CONFIG_SUNGEM is not set
519# CONFIG_CASSINI is not set
520# CONFIG_NET_VENDOR_3COM is not set
521# CONFIG_NET_TULIP is not set
522# CONFIG_HP100 is not set
523# CONFIG_IBM_NEW_EMAC is not set
524# CONFIG_IBM_NEW_EMAC_ZMII is not set
525# CONFIG_IBM_NEW_EMAC_RGMII is not set
526# CONFIG_IBM_NEW_EMAC_TAH is not set
527# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
528# CONFIG_NET_PCI is not set
529# CONFIG_B44 is not set
530CONFIG_NETDEV_1000=y
531# CONFIG_ACENIC is not set
532# CONFIG_DL2K is not set
533# CONFIG_E1000 is not set
534# CONFIG_E1000E is not set
535# CONFIG_E1000E_ENABLED is not set
536# CONFIG_IP1000 is not set
537# CONFIG_IGB is not set
538# CONFIG_NS83820 is not set
539# CONFIG_HAMACHI is not set
540# CONFIG_YELLOWFIN is not set
541# CONFIG_R8169 is not set
542# CONFIG_SIS190 is not set
543# CONFIG_SKGE is not set
544# CONFIG_SKY2 is not set
545# CONFIG_VIA_VELOCITY is not set
546# CONFIG_TIGON3 is not set
547# CONFIG_BNX2 is not set
548# CONFIG_QLA3XXX is not set
549# CONFIG_ATL1 is not set
550# CONFIG_NETDEV_10000 is not set
551# CONFIG_TR is not set
552
553#
554# Wireless LAN
555#
556# CONFIG_WLAN_PRE80211 is not set
557# CONFIG_WLAN_80211 is not set
558# CONFIG_IWLWIFI_LEDS is not set
559# CONFIG_WAN is not set
560# CONFIG_FDDI is not set
561# CONFIG_HIPPI is not set
562# CONFIG_PPP is not set
563# CONFIG_SLIP is not set
564# CONFIG_NETCONSOLE is not set
565# CONFIG_NETPOLL is not set
566# CONFIG_NET_POLL_CONTROLLER is not set
567# CONFIG_ISDN is not set
568# CONFIG_PHONE is not set
569
570#
571# Input device support
572#
573CONFIG_INPUT=y
574# CONFIG_INPUT_FF_MEMLESS is not set
575# CONFIG_INPUT_POLLDEV is not set
576
577#
578# Userland interfaces
579#
580CONFIG_INPUT_MOUSEDEV=y
581CONFIG_INPUT_MOUSEDEV_PSAUX=y
582CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
583CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
584# CONFIG_INPUT_JOYDEV is not set
585# CONFIG_INPUT_EVDEV is not set
586# CONFIG_INPUT_EVBUG is not set
587
588#
589# Input Device Drivers
590#
591CONFIG_INPUT_KEYBOARD=y
592CONFIG_KEYBOARD_ATKBD=y
593# CONFIG_KEYBOARD_SUNKBD is not set
594# CONFIG_KEYBOARD_LKKBD is not set
595# CONFIG_KEYBOARD_XTKBD is not set
596# CONFIG_KEYBOARD_NEWTON is not set
597# CONFIG_KEYBOARD_STOWAWAY is not set
598CONFIG_INPUT_MOUSE=y
599CONFIG_MOUSE_PS2=y
600CONFIG_MOUSE_PS2_ALPS=y
601CONFIG_MOUSE_PS2_LOGIPS2PP=y
602CONFIG_MOUSE_PS2_SYNAPTICS=y
603CONFIG_MOUSE_PS2_LIFEBOOK=y
604CONFIG_MOUSE_PS2_TRACKPOINT=y
605# CONFIG_MOUSE_PS2_TOUCHKIT is not set
606# CONFIG_MOUSE_SERIAL is not set
607# CONFIG_MOUSE_VSXXXAA is not set
608# CONFIG_INPUT_JOYSTICK is not set
609# CONFIG_INPUT_TABLET is not set
610# CONFIG_INPUT_TOUCHSCREEN is not set
611# CONFIG_INPUT_MISC is not set
612
613#
614# Hardware I/O ports
615#
616CONFIG_SERIO=y
617# CONFIG_SERIO_I8042 is not set
618CONFIG_SERIO_SERPORT=y
619# CONFIG_SERIO_PCIPS2 is not set
620CONFIG_SERIO_LIBPS2=y
621# CONFIG_SERIO_RAW is not set
622# CONFIG_GAMEPORT is not set
623
624#
625# Character devices
626#
627CONFIG_VT=y
628CONFIG_VT_CONSOLE=y
629CONFIG_HW_CONSOLE=y
630# CONFIG_VT_HW_CONSOLE_BINDING is not set
631CONFIG_DEVKMEM=y
632# CONFIG_SERIAL_NONSTANDARD is not set
633# CONFIG_NOZOMI is not set
634
635#
636# Serial drivers
637#
638CONFIG_SERIAL_8250=y
639CONFIG_SERIAL_8250_CONSOLE=y
640CONFIG_SERIAL_8250_PCI=y
641CONFIG_SERIAL_8250_NR_UARTS=4
642CONFIG_SERIAL_8250_RUNTIME_UARTS=4
643# CONFIG_SERIAL_8250_EXTENDED is not set
644
645#
646# Non-8250 serial port support
647#
648# CONFIG_SERIAL_UARTLITE is not set
649CONFIG_SERIAL_CORE=y
650CONFIG_SERIAL_CORE_CONSOLE=y
651# CONFIG_SERIAL_JSM is not set
652CONFIG_SERIAL_OF_PLATFORM=y
653CONFIG_UNIX98_PTYS=y
654CONFIG_LEGACY_PTYS=y
655CONFIG_LEGACY_PTY_COUNT=256
656# CONFIG_IPMI_HANDLER is not set
657CONFIG_HW_RANDOM=m
658# CONFIG_NVRAM is not set
659# CONFIG_GEN_RTC is not set
660CONFIG_XILINX_HWICAP=y
661# CONFIG_R3964 is not set
662# CONFIG_APPLICOM is not set
663# CONFIG_RAW_DRIVER is not set
664# CONFIG_TCG_TPM is not set
665CONFIG_DEVPORT=y
666CONFIG_I2C=y
667CONFIG_I2C_BOARDINFO=y
668CONFIG_I2C_CHARDEV=y
669
670#
671# I2C Hardware Bus support
672#
673# CONFIG_I2C_ALI1535 is not set
674# CONFIG_I2C_ALI1563 is not set
675# CONFIG_I2C_ALI15X3 is not set
676# CONFIG_I2C_AMD756 is not set
677# CONFIG_I2C_AMD8111 is not set
678# CONFIG_I2C_I801 is not set
679# CONFIG_I2C_I810 is not set
680# CONFIG_I2C_PIIX4 is not set
681# CONFIG_I2C_IBM_IIC is not set
682# CONFIG_I2C_MPC is not set
683# CONFIG_I2C_NFORCE2 is not set
684# CONFIG_I2C_OCORES is not set
685# CONFIG_I2C_PARPORT_LIGHT is not set
686# CONFIG_I2C_PROSAVAGE is not set
687# CONFIG_I2C_SAVAGE4 is not set
688# CONFIG_I2C_SIMTEC is not set
689# CONFIG_I2C_SIS5595 is not set
690# CONFIG_I2C_SIS630 is not set
691# CONFIG_I2C_SIS96X is not set
692# CONFIG_I2C_TAOS_EVM is not set
693# CONFIG_I2C_STUB is not set
694# CONFIG_I2C_VIA is not set
695# CONFIG_I2C_VIAPRO is not set
696# CONFIG_I2C_VOODOO3 is not set
697# CONFIG_I2C_PCA_PLATFORM is not set
698
699#
700# Miscellaneous I2C Chip support
701#
702# CONFIG_DS1682 is not set
703# CONFIG_SENSORS_EEPROM is not set
704# CONFIG_SENSORS_PCF8574 is not set
705# CONFIG_PCF8575 is not set
706# CONFIG_SENSORS_PCF8591 is not set
707# CONFIG_SENSORS_MAX6875 is not set
708# CONFIG_SENSORS_TSL2550 is not set
709CONFIG_I2C_DEBUG_CORE=y
710CONFIG_I2C_DEBUG_ALGO=y
711# CONFIG_I2C_DEBUG_BUS is not set
712# CONFIG_I2C_DEBUG_CHIP is not set
713# CONFIG_SPI is not set
714# CONFIG_W1 is not set
715# CONFIG_POWER_SUPPLY is not set
716# CONFIG_HWMON is not set
717# CONFIG_THERMAL is not set
718# CONFIG_WATCHDOG is not set
719
720#
721# Sonics Silicon Backplane
722#
723CONFIG_SSB_POSSIBLE=y
724# CONFIG_SSB is not set
725
726#
727# Multifunction device drivers
728#
729# CONFIG_MFD_SM501 is not set
730# CONFIG_HTC_PASIC3 is not set
731
732#
733# Multimedia devices
734#
735
736#
737# Multimedia core support
738#
739# CONFIG_VIDEO_DEV is not set
740# CONFIG_DVB_CORE is not set
741# CONFIG_VIDEO_MEDIA is not set
742
743#
744# Multimedia drivers
745#
746# CONFIG_DAB is not set
747
748#
749# Graphics support
750#
751# CONFIG_AGP is not set
752# CONFIG_DRM is not set
753# CONFIG_VGASTATE is not set
754# CONFIG_VIDEO_OUTPUT_CONTROL is not set
755CONFIG_FB=y
756# CONFIG_FIRMWARE_EDID is not set
757# CONFIG_FB_DDC is not set
758CONFIG_FB_CFB_FILLRECT=y
759CONFIG_FB_CFB_COPYAREA=y
760CONFIG_FB_CFB_IMAGEBLIT=y
761# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
762# CONFIG_FB_SYS_FILLRECT is not set
763# CONFIG_FB_SYS_COPYAREA is not set
764# CONFIG_FB_SYS_IMAGEBLIT is not set
765# CONFIG_FB_FOREIGN_ENDIAN is not set
766# CONFIG_FB_SYS_FOPS is not set
767# CONFIG_FB_SVGALIB is not set
768# CONFIG_FB_MACMODES is not set
769# CONFIG_FB_BACKLIGHT is not set
770# CONFIG_FB_MODE_HELPERS is not set
771# CONFIG_FB_TILEBLITTING is not set
772
773#
774# Frame buffer hardware drivers
775#
776# CONFIG_FB_CIRRUS is not set
777# CONFIG_FB_PM2 is not set
778# CONFIG_FB_CYBER2000 is not set
779# CONFIG_FB_OF is not set
780# CONFIG_FB_CT65550 is not set
781# CONFIG_FB_ASILIANT is not set
782# CONFIG_FB_IMSTT is not set
783# CONFIG_FB_VGA16 is not set
784# CONFIG_FB_S1D13XXX is not set
785# CONFIG_FB_NVIDIA is not set
786# CONFIG_FB_RIVA is not set
787# CONFIG_FB_MATROX is not set
788# CONFIG_FB_RADEON is not set
789# CONFIG_FB_ATY128 is not set
790# CONFIG_FB_ATY is not set
791# CONFIG_FB_S3 is not set
792# CONFIG_FB_SAVAGE is not set
793# CONFIG_FB_SIS is not set
794# CONFIG_FB_NEOMAGIC is not set
795# CONFIG_FB_KYRO is not set
796# CONFIG_FB_3DFX is not set
797# CONFIG_FB_VOODOO1 is not set
798# CONFIG_FB_VT8623 is not set
799# CONFIG_FB_TRIDENT is not set
800# CONFIG_FB_ARK is not set
801# CONFIG_FB_PM3 is not set
802# CONFIG_FB_IBM_GXT4500 is not set
803CONFIG_FB_XILINX=y
804# CONFIG_FB_VIRTUAL is not set
805# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
806
807#
808# Display device support
809#
810# CONFIG_DISPLAY_SUPPORT is not set
811
812#
813# Console display driver support
814#
815CONFIG_DUMMY_CONSOLE=y
816CONFIG_FRAMEBUFFER_CONSOLE=y
817# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
818# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
819CONFIG_FONTS=y
820CONFIG_FONT_8x8=y
821CONFIG_FONT_8x16=y
822# CONFIG_FONT_6x11 is not set
823# CONFIG_FONT_7x14 is not set
824# CONFIG_FONT_PEARL_8x8 is not set
825# CONFIG_FONT_ACORN_8x8 is not set
826# CONFIG_FONT_MINI_4x6 is not set
827# CONFIG_FONT_SUN8x16 is not set
828# CONFIG_FONT_SUN12x22 is not set
829# CONFIG_FONT_10x18 is not set
830CONFIG_LOGO=y
831CONFIG_LOGO_LINUX_MONO=y
832CONFIG_LOGO_LINUX_VGA16=y
833CONFIG_LOGO_LINUX_CLUT224=y
834
835#
836# Sound
837#
838# CONFIG_SOUND is not set
839# CONFIG_HID_SUPPORT is not set
840# CONFIG_USB_SUPPORT is not set
841# CONFIG_MMC is not set
842# CONFIG_MEMSTICK is not set
843# CONFIG_NEW_LEDS is not set
844# CONFIG_ACCESSIBILITY is not set
845# CONFIG_INFINIBAND is not set
846# CONFIG_EDAC is not set
847# CONFIG_RTC_CLASS is not set
848# CONFIG_DMADEVICES is not set
849# CONFIG_UIO is not set
850
851#
852# File systems
853#
854CONFIG_EXT2_FS=y
855# CONFIG_EXT2_FS_XATTR is not set
856# CONFIG_EXT2_FS_XIP is not set
857# CONFIG_EXT3_FS is not set
858# CONFIG_EXT4DEV_FS is not set
859# CONFIG_REISERFS_FS is not set
860# CONFIG_JFS_FS is not set
861# CONFIG_FS_POSIX_ACL is not set
862# CONFIG_XFS_FS is not set
863# CONFIG_OCFS2_FS is not set
864CONFIG_DNOTIFY=y
865CONFIG_INOTIFY=y
866CONFIG_INOTIFY_USER=y
867# CONFIG_QUOTA is not set
868CONFIG_AUTOFS_FS=y
869CONFIG_AUTOFS4_FS=y
870CONFIG_FUSE_FS=m
871
872#
873# CD-ROM/DVD Filesystems
874#
875# CONFIG_ISO9660_FS is not set
876# CONFIG_UDF_FS is not set
877
878#
879# DOS/FAT/NT Filesystems
880#
881CONFIG_FAT_FS=y
882CONFIG_MSDOS_FS=y
883CONFIG_VFAT_FS=y
884CONFIG_FAT_DEFAULT_CODEPAGE=437
885CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
886# CONFIG_NTFS_FS is not set
887
888#
889# Pseudo filesystems
890#
891CONFIG_PROC_FS=y
892# CONFIG_PROC_KCORE is not set
893CONFIG_PROC_SYSCTL=y
894CONFIG_SYSFS=y
895CONFIG_TMPFS=y
896# CONFIG_TMPFS_POSIX_ACL is not set
897# CONFIG_HUGETLB_PAGE is not set
898# CONFIG_CONFIGFS_FS is not set
899
900#
901# Miscellaneous filesystems
902#
903# CONFIG_ADFS_FS is not set
904# CONFIG_AFFS_FS is not set
905# CONFIG_HFS_FS is not set
906# CONFIG_HFSPLUS_FS is not set
907# CONFIG_BEFS_FS is not set
908# CONFIG_BFS_FS is not set
909# CONFIG_EFS_FS is not set
910CONFIG_CRAMFS=y
911# CONFIG_VXFS_FS is not set
912# CONFIG_MINIX_FS is not set
913# CONFIG_HPFS_FS is not set
914# CONFIG_QNX4FS_FS is not set
915CONFIG_ROMFS_FS=y
916# CONFIG_SYSV_FS is not set
917# CONFIG_UFS_FS is not set
918CONFIG_NETWORK_FILESYSTEMS=y
919CONFIG_NFS_FS=y
920CONFIG_NFS_V3=y
921# CONFIG_NFS_V3_ACL is not set
922# CONFIG_NFS_V4 is not set
923CONFIG_NFSD=y
924CONFIG_NFSD_V3=y
925# CONFIG_NFSD_V3_ACL is not set
926# CONFIG_NFSD_V4 is not set
927CONFIG_ROOT_NFS=y
928CONFIG_LOCKD=y
929CONFIG_LOCKD_V4=y
930CONFIG_EXPORTFS=y
931CONFIG_NFS_COMMON=y
932CONFIG_SUNRPC=y
933# CONFIG_SUNRPC_BIND34 is not set
934# CONFIG_RPCSEC_GSS_KRB5 is not set
935# CONFIG_RPCSEC_GSS_SPKM3 is not set
936CONFIG_SMB_FS=y
937# CONFIG_SMB_NLS_DEFAULT is not set
938# CONFIG_CIFS is not set
939# CONFIG_NCP_FS is not set
940# CONFIG_CODA_FS is not set
941# CONFIG_AFS_FS is not set
942
943#
944# Partition Types
945#
946# CONFIG_PARTITION_ADVANCED is not set
947CONFIG_MSDOS_PARTITION=y
948CONFIG_NLS=y
949CONFIG_NLS_DEFAULT="iso8859-1"
950CONFIG_NLS_CODEPAGE_437=y
951# CONFIG_NLS_CODEPAGE_737 is not set
952# CONFIG_NLS_CODEPAGE_775 is not set
953# CONFIG_NLS_CODEPAGE_850 is not set
954# CONFIG_NLS_CODEPAGE_852 is not set
955# CONFIG_NLS_CODEPAGE_855 is not set
956# CONFIG_NLS_CODEPAGE_857 is not set
957# CONFIG_NLS_CODEPAGE_860 is not set
958# CONFIG_NLS_CODEPAGE_861 is not set
959# CONFIG_NLS_CODEPAGE_862 is not set
960# CONFIG_NLS_CODEPAGE_863 is not set
961# CONFIG_NLS_CODEPAGE_864 is not set
962# CONFIG_NLS_CODEPAGE_865 is not set
963# CONFIG_NLS_CODEPAGE_866 is not set
964# CONFIG_NLS_CODEPAGE_869 is not set
965# CONFIG_NLS_CODEPAGE_936 is not set
966# CONFIG_NLS_CODEPAGE_950 is not set
967# CONFIG_NLS_CODEPAGE_932 is not set
968# CONFIG_NLS_CODEPAGE_949 is not set
969# CONFIG_NLS_CODEPAGE_874 is not set
970# CONFIG_NLS_ISO8859_8 is not set
971# CONFIG_NLS_CODEPAGE_1250 is not set
972# CONFIG_NLS_CODEPAGE_1251 is not set
973CONFIG_NLS_ASCII=m
974CONFIG_NLS_ISO8859_1=m
975# CONFIG_NLS_ISO8859_2 is not set
976# CONFIG_NLS_ISO8859_3 is not set
977# CONFIG_NLS_ISO8859_4 is not set
978# CONFIG_NLS_ISO8859_5 is not set
979# CONFIG_NLS_ISO8859_6 is not set
980# CONFIG_NLS_ISO8859_7 is not set
981# CONFIG_NLS_ISO8859_9 is not set
982# CONFIG_NLS_ISO8859_13 is not set
983# CONFIG_NLS_ISO8859_14 is not set
984# CONFIG_NLS_ISO8859_15 is not set
985# CONFIG_NLS_KOI8_R is not set
986# CONFIG_NLS_KOI8_U is not set
987CONFIG_NLS_UTF8=m
988# CONFIG_DLM is not set
989
990#
991# Library routines
992#
993CONFIG_BITREVERSE=y
994# CONFIG_GENERIC_FIND_FIRST_BIT is not set
995CONFIG_CRC_CCITT=y
996# CONFIG_CRC16 is not set
997# CONFIG_CRC_ITU_T is not set
998CONFIG_CRC32=y
999# CONFIG_CRC7 is not set
1000# CONFIG_LIBCRC32C is not set
1001CONFIG_ZLIB_INFLATE=y
1002CONFIG_PLIST=y
1003CONFIG_HAS_IOMEM=y
1004CONFIG_HAS_IOPORT=y
1005CONFIG_HAS_DMA=y
1006CONFIG_HAVE_LMB=y
1007
1008#
1009# Kernel hacking
1010#
1011# CONFIG_PRINTK_TIME is not set
1012CONFIG_ENABLE_WARN_DEPRECATED=y
1013CONFIG_ENABLE_MUST_CHECK=y
1014CONFIG_FRAME_WARN=1024
1015# CONFIG_MAGIC_SYSRQ is not set
1016# CONFIG_UNUSED_SYMBOLS is not set
1017# CONFIG_DEBUG_FS is not set
1018# CONFIG_HEADERS_CHECK is not set
1019# CONFIG_DEBUG_KERNEL is not set
1020CONFIG_DEBUG_BUGVERBOSE=y
1021# CONFIG_SAMPLES is not set
1022# CONFIG_IRQSTACKS is not set
1023# CONFIG_PPC_EARLY_DEBUG is not set
1024
1025#
1026# Security options
1027#
1028# CONFIG_KEYS is not set
1029# CONFIG_SECURITY is not set
1030# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1031CONFIG_CRYPTO=y
1032
1033#
1034# Crypto core or helper
1035#
1036# CONFIG_CRYPTO_MANAGER is not set
1037# CONFIG_CRYPTO_GF128MUL is not set
1038# CONFIG_CRYPTO_NULL is not set
1039# CONFIG_CRYPTO_CRYPTD is not set
1040# CONFIG_CRYPTO_AUTHENC is not set
1041# CONFIG_CRYPTO_TEST is not set
1042
1043#
1044# Authenticated Encryption with Associated Data
1045#
1046# CONFIG_CRYPTO_CCM is not set
1047# CONFIG_CRYPTO_GCM is not set
1048# CONFIG_CRYPTO_SEQIV is not set
1049
1050#
1051# Block modes
1052#
1053# CONFIG_CRYPTO_CBC is not set
1054# CONFIG_CRYPTO_CTR is not set
1055# CONFIG_CRYPTO_CTS is not set
1056# CONFIG_CRYPTO_ECB is not set
1057# CONFIG_CRYPTO_LRW is not set
1058# CONFIG_CRYPTO_PCBC is not set
1059# CONFIG_CRYPTO_XTS is not set
1060
1061#
1062# Hash modes
1063#
1064# CONFIG_CRYPTO_HMAC is not set
1065# CONFIG_CRYPTO_XCBC is not set
1066
1067#
1068# Digest
1069#
1070# CONFIG_CRYPTO_CRC32C is not set
1071# CONFIG_CRYPTO_MD4 is not set
1072# CONFIG_CRYPTO_MD5 is not set
1073# CONFIG_CRYPTO_MICHAEL_MIC is not set
1074# CONFIG_CRYPTO_SHA1 is not set
1075# CONFIG_CRYPTO_SHA256 is not set
1076# CONFIG_CRYPTO_SHA512 is not set
1077# CONFIG_CRYPTO_TGR192 is not set
1078# CONFIG_CRYPTO_WP512 is not set
1079
1080#
1081# Ciphers
1082#
1083# CONFIG_CRYPTO_AES is not set
1084# CONFIG_CRYPTO_ANUBIS is not set
1085# CONFIG_CRYPTO_ARC4 is not set
1086# CONFIG_CRYPTO_BLOWFISH is not set
1087# CONFIG_CRYPTO_CAMELLIA is not set
1088# CONFIG_CRYPTO_CAST5 is not set
1089# CONFIG_CRYPTO_CAST6 is not set
1090# CONFIG_CRYPTO_DES is not set
1091# CONFIG_CRYPTO_FCRYPT is not set
1092# CONFIG_CRYPTO_KHAZAD is not set
1093# CONFIG_CRYPTO_SALSA20 is not set
1094# CONFIG_CRYPTO_SEED is not set
1095# CONFIG_CRYPTO_SERPENT is not set
1096# CONFIG_CRYPTO_TEA is not set
1097# CONFIG_CRYPTO_TWOFISH is not set
1098
1099#
1100# Compression
1101#
1102# CONFIG_CRYPTO_DEFLATE is not set
1103# CONFIG_CRYPTO_LZO is not set
1104CONFIG_CRYPTO_HW=y
1105# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1106# CONFIG_PPC_CLOCK is not set
1107# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
new file mode 100644
index 000000000000..d2c435f0da42
--- /dev/null
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -0,0 +1,1128 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc2
4# Mon May 19 21:12:32 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_FSL_EMB_PERFMON is not set
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22# CONFIG_SMP is not set
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
33CONFIG_IRQ_PER_CPU=y
34CONFIG_STACKTRACE_SUPPORT=y
35CONFIG_LOCKDEP_SUPPORT=y
36CONFIG_RWSEM_XCHGADD_ALGORITHM=y
37CONFIG_ARCH_HAS_ILOG2_U32=y
38CONFIG_GENERIC_HWEIGHT=y
39CONFIG_GENERIC_CALIBRATE_DELAY=y
40CONFIG_GENERIC_FIND_NEXT_BIT=y
41CONFIG_GENERIC_GPIO=y
42# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
43CONFIG_PPC=y
44CONFIG_EARLY_PRINTK=y
45CONFIG_GENERIC_NVRAM=y
46CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
47CONFIG_ARCH_MAY_HAVE_PC_FDC=y
48CONFIG_PPC_OF=y
49CONFIG_OF=y
50CONFIG_PPC_UDBG_16550=y
51# CONFIG_GENERIC_TBSYNC is not set
52CONFIG_AUDIT_ARCH=y
53CONFIG_GENERIC_BUG=y
54CONFIG_DEFAULT_UIMAGE=y
55# CONFIG_PPC_DCR_NATIVE is not set
56# CONFIG_PPC_DCR_MMIO is not set
57CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
58
59#
60# General setup
61#
62CONFIG_EXPERIMENTAL=y
63CONFIG_BROKEN_ON_SMP=y
64CONFIG_INIT_ENV_ARG_LIMIT=32
65CONFIG_LOCALVERSION=""
66CONFIG_LOCALVERSION_AUTO=y
67CONFIG_SWAP=y
68CONFIG_SYSVIPC=y
69CONFIG_SYSVIPC_SYSCTL=y
70# CONFIG_POSIX_MQUEUE is not set
71# CONFIG_BSD_PROCESS_ACCT is not set
72# CONFIG_TASKSTATS is not set
73# CONFIG_AUDIT is not set
74# CONFIG_IKCONFIG is not set
75CONFIG_LOG_BUF_SHIFT=14
76# CONFIG_CGROUPS is not set
77CONFIG_GROUP_SCHED=y
78CONFIG_FAIR_GROUP_SCHED=y
79# CONFIG_RT_GROUP_SCHED is not set
80CONFIG_USER_SCHED=y
81# CONFIG_CGROUP_SCHED is not set
82CONFIG_SYSFS_DEPRECATED=y
83CONFIG_SYSFS_DEPRECATED_V2=y
84# CONFIG_RELAY is not set
85# CONFIG_NAMESPACES is not set
86CONFIG_BLK_DEV_INITRD=y
87CONFIG_INITRAMFS_SOURCE=""
88# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
89CONFIG_SYSCTL=y
90CONFIG_EMBEDDED=y
91CONFIG_SYSCTL_SYSCALL=y
92CONFIG_SYSCTL_SYSCALL_CHECK=y
93# CONFIG_KALLSYMS is not set
94CONFIG_HOTPLUG=y
95CONFIG_PRINTK=y
96CONFIG_BUG=y
97CONFIG_ELF_CORE=y
98CONFIG_COMPAT_BRK=y
99CONFIG_BASE_FULL=y
100CONFIG_FUTEX=y
101CONFIG_ANON_INODES=y
102# CONFIG_EPOLL is not set
103CONFIG_SIGNALFD=y
104CONFIG_TIMERFD=y
105CONFIG_EVENTFD=y
106CONFIG_SHMEM=y
107CONFIG_VM_EVENT_COUNTERS=y
108CONFIG_SLUB_DEBUG=y
109# CONFIG_SLAB is not set
110CONFIG_SLUB=y
111# CONFIG_SLOB is not set
112# CONFIG_PROFILING is not set
113# CONFIG_MARKERS is not set
114CONFIG_HAVE_OPROFILE=y
115CONFIG_HAVE_KPROBES=y
116CONFIG_HAVE_KRETPROBES=y
117# CONFIG_HAVE_DMA_ATTRS is not set
118CONFIG_PROC_PAGE_MONITOR=y
119CONFIG_SLABINFO=y
120CONFIG_RT_MUTEXES=y
121# CONFIG_TINY_SHMEM is not set
122CONFIG_BASE_SMALL=0
123CONFIG_MODULES=y
124# CONFIG_MODULE_FORCE_LOAD is not set
125CONFIG_MODULE_UNLOAD=y
126# CONFIG_MODULE_FORCE_UNLOAD is not set
127# CONFIG_MODVERSIONS is not set
128# CONFIG_MODULE_SRCVERSION_ALL is not set
129# CONFIG_KMOD is not set
130CONFIG_BLOCK=y
131# CONFIG_LBD is not set
132# CONFIG_BLK_DEV_IO_TRACE is not set
133# CONFIG_LSF is not set
134# CONFIG_BLK_DEV_BSG is not set
135
136#
137# IO Schedulers
138#
139CONFIG_IOSCHED_NOOP=y
140CONFIG_IOSCHED_AS=y
141CONFIG_IOSCHED_DEADLINE=y
142CONFIG_IOSCHED_CFQ=y
143CONFIG_DEFAULT_AS=y
144# CONFIG_DEFAULT_DEADLINE is not set
145# CONFIG_DEFAULT_CFQ is not set
146# CONFIG_DEFAULT_NOOP is not set
147CONFIG_DEFAULT_IOSCHED="anticipatory"
148CONFIG_CLASSIC_RCU=y
149
150#
151# Platform support
152#
153# CONFIG_PPC_MULTIPLATFORM is not set
154# CONFIG_PPC_82xx is not set
155CONFIG_PPC_83xx=y
156# CONFIG_PPC_86xx is not set
157# CONFIG_PPC_MPC512x is not set
158# CONFIG_PPC_MPC5121 is not set
159# CONFIG_PPC_CELL is not set
160# CONFIG_PPC_CELL_NATIVE is not set
161# CONFIG_PQ2ADS is not set
162CONFIG_MPC83xx=y
163# CONFIG_MPC831x_RDB is not set
164# CONFIG_MPC832x_MDS is not set
165# CONFIG_MPC832x_RDB is not set
166# CONFIG_MPC834x_MDS is not set
167# CONFIG_MPC834x_ITX is not set
168# CONFIG_MPC836x_MDS is not set
169CONFIG_MPC836x_RDK=y
170# CONFIG_MPC837x_MDS is not set
171# CONFIG_MPC837x_RDB is not set
172# CONFIG_SBC834x is not set
173CONFIG_IPIC=y
174# CONFIG_MPIC is not set
175# CONFIG_MPIC_WEIRD is not set
176# CONFIG_PPC_I8259 is not set
177# CONFIG_PPC_RTAS is not set
178# CONFIG_MMIO_NVRAM is not set
179# CONFIG_PPC_MPC106 is not set
180# CONFIG_PPC_970_NAP is not set
181# CONFIG_PPC_INDIRECT_IO is not set
182# CONFIG_GENERIC_IOMAP is not set
183# CONFIG_CPU_FREQ is not set
184CONFIG_QUICC_ENGINE=y
185# CONFIG_FSL_ULI1575 is not set
186
187#
188# Kernel options
189#
190# CONFIG_HIGHMEM is not set
191# CONFIG_TICK_ONESHOT is not set
192# CONFIG_NO_HZ is not set
193# CONFIG_HIGH_RES_TIMERS is not set
194CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
195# CONFIG_HZ_100 is not set
196CONFIG_HZ_250=y
197# CONFIG_HZ_300 is not set
198# CONFIG_HZ_1000 is not set
199CONFIG_HZ=250
200# CONFIG_SCHED_HRTICK is not set
201CONFIG_PREEMPT_NONE=y
202# CONFIG_PREEMPT_VOLUNTARY is not set
203# CONFIG_PREEMPT is not set
204CONFIG_BINFMT_ELF=y
205# CONFIG_BINFMT_MISC is not set
206# CONFIG_IOMMU_HELPER is not set
207CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
208CONFIG_ARCH_HAS_WALK_MEMORY=y
209CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
210CONFIG_ARCH_FLATMEM_ENABLE=y
211CONFIG_ARCH_POPULATES_NODE_MAP=y
212CONFIG_SELECT_MEMORY_MODEL=y
213CONFIG_FLATMEM_MANUAL=y
214# CONFIG_DISCONTIGMEM_MANUAL is not set
215# CONFIG_SPARSEMEM_MANUAL is not set
216CONFIG_FLATMEM=y
217CONFIG_FLAT_NODE_MEM_MAP=y
218# CONFIG_SPARSEMEM_STATIC is not set
219# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
220CONFIG_PAGEFLAGS_EXTENDED=y
221CONFIG_SPLIT_PTLOCK_CPUS=4
222# CONFIG_RESOURCES_64BIT is not set
223CONFIG_ZONE_DMA_FLAG=1
224CONFIG_BOUNCE=y
225CONFIG_VIRT_TO_BUS=y
226CONFIG_FORCE_MAX_ZONEORDER=11
227CONFIG_PROC_DEVICETREE=y
228# CONFIG_CMDLINE_BOOL is not set
229# CONFIG_PM is not set
230CONFIG_SECCOMP=y
231CONFIG_ISA_DMA_API=y
232
233#
234# Bus options
235#
236CONFIG_ZONE_DMA=y
237CONFIG_GENERIC_ISA_DMA=y
238CONFIG_PPC_INDIRECT_PCI=y
239CONFIG_FSL_SOC=y
240CONFIG_FSL_LBC=y
241CONFIG_FSL_GTM=y
242CONFIG_PCI=y
243CONFIG_PCI_DOMAINS=y
244CONFIG_PCI_SYSCALL=y
245# CONFIG_PCIEPORTBUS is not set
246CONFIG_ARCH_SUPPORTS_MSI=y
247# CONFIG_PCI_MSI is not set
248CONFIG_PCI_LEGACY=y
249# CONFIG_PCCARD is not set
250# CONFIG_HOTPLUG_PCI is not set
251# CONFIG_HAS_RAPIDIO is not set
252
253#
254# Advanced setup
255#
256# CONFIG_ADVANCED_OPTIONS is not set
257
258#
259# Default settings for advanced configuration options are used
260#
261CONFIG_LOWMEM_SIZE=0x30000000
262CONFIG_PAGE_OFFSET=0xc0000000
263CONFIG_KERNEL_START=0xc0000000
264CONFIG_PHYSICAL_START=0x00000000
265CONFIG_TASK_SIZE=0xc0000000
266
267#
268# Networking
269#
270CONFIG_NET=y
271
272#
273# Networking options
274#
275CONFIG_PACKET=y
276# CONFIG_PACKET_MMAP is not set
277CONFIG_UNIX=y
278CONFIG_XFRM=y
279# CONFIG_XFRM_USER is not set
280# CONFIG_XFRM_SUB_POLICY is not set
281# CONFIG_XFRM_MIGRATE is not set
282# CONFIG_XFRM_STATISTICS is not set
283# CONFIG_NET_KEY is not set
284CONFIG_INET=y
285CONFIG_IP_MULTICAST=y
286# CONFIG_IP_ADVANCED_ROUTER is not set
287CONFIG_IP_FIB_HASH=y
288CONFIG_IP_PNP=y
289CONFIG_IP_PNP_DHCP=y
290CONFIG_IP_PNP_BOOTP=y
291# CONFIG_IP_PNP_RARP is not set
292# CONFIG_NET_IPIP is not set
293# CONFIG_NET_IPGRE is not set
294# CONFIG_IP_MROUTE is not set
295# CONFIG_ARPD is not set
296CONFIG_SYN_COOKIES=y
297# CONFIG_INET_AH is not set
298# CONFIG_INET_ESP is not set
299# CONFIG_INET_IPCOMP is not set
300# CONFIG_INET_XFRM_TUNNEL is not set
301# CONFIG_INET_TUNNEL is not set
302CONFIG_INET_XFRM_MODE_TRANSPORT=y
303CONFIG_INET_XFRM_MODE_TUNNEL=y
304CONFIG_INET_XFRM_MODE_BEET=y
305# CONFIG_INET_LRO is not set
306CONFIG_INET_DIAG=y
307CONFIG_INET_TCP_DIAG=y
308# CONFIG_TCP_CONG_ADVANCED is not set
309CONFIG_TCP_CONG_CUBIC=y
310CONFIG_DEFAULT_TCP_CONG="cubic"
311# CONFIG_TCP_MD5SIG is not set
312# CONFIG_IPV6 is not set
313# CONFIG_NETWORK_SECMARK is not set
314# CONFIG_NETFILTER is not set
315# CONFIG_IP_DCCP is not set
316# CONFIG_IP_SCTP is not set
317# CONFIG_TIPC is not set
318# CONFIG_ATM is not set
319# CONFIG_BRIDGE is not set
320# CONFIG_VLAN_8021Q is not set
321# CONFIG_DECNET is not set
322# CONFIG_LLC2 is not set
323# CONFIG_IPX is not set
324# CONFIG_ATALK is not set
325# CONFIG_X25 is not set
326# CONFIG_LAPB is not set
327# CONFIG_ECONET is not set
328# CONFIG_WAN_ROUTER is not set
329# CONFIG_NET_SCHED is not set
330
331#
332# Network testing
333#
334# CONFIG_NET_PKTGEN is not set
335# CONFIG_HAMRADIO is not set
336# CONFIG_CAN is not set
337# CONFIG_IRDA is not set
338# CONFIG_BT is not set
339# CONFIG_AF_RXRPC is not set
340
341#
342# Wireless
343#
344# CONFIG_CFG80211 is not set
345# CONFIG_WIRELESS_EXT is not set
346# CONFIG_MAC80211 is not set
347# CONFIG_IEEE80211 is not set
348# CONFIG_RFKILL is not set
349# CONFIG_NET_9P is not set
350
351#
352# Device Drivers
353#
354
355#
356# Generic Driver Options
357#
358CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
359CONFIG_STANDALONE=y
360CONFIG_PREVENT_FIRMWARE_BUILD=y
361CONFIG_FW_LOADER=y
362# CONFIG_SYS_HYPERVISOR is not set
363# CONFIG_CONNECTOR is not set
364CONFIG_MTD=y
365# CONFIG_MTD_DEBUG is not set
366# CONFIG_MTD_CONCAT is not set
367CONFIG_MTD_PARTITIONS=y
368# CONFIG_MTD_REDBOOT_PARTS is not set
369CONFIG_MTD_CMDLINE_PARTS=y
370# CONFIG_MTD_OF_PARTS is not set
371# CONFIG_MTD_AR7_PARTS is not set
372
373#
374# User Modules And Translation Layers
375#
376CONFIG_MTD_CHAR=y
377CONFIG_MTD_BLKDEVS=y
378CONFIG_MTD_BLOCK=y
379# CONFIG_FTL is not set
380# CONFIG_NFTL is not set
381# CONFIG_INFTL is not set
382# CONFIG_RFD_FTL is not set
383# CONFIG_SSFDC is not set
384# CONFIG_MTD_OOPS is not set
385
386#
387# RAM/ROM/Flash chip drivers
388#
389CONFIG_MTD_CFI=y
390# CONFIG_MTD_JEDECPROBE is not set
391CONFIG_MTD_GEN_PROBE=y
392CONFIG_MTD_CFI_ADV_OPTIONS=y
393CONFIG_MTD_CFI_NOSWAP=y
394# CONFIG_MTD_CFI_BE_BYTE_SWAP is not set
395# CONFIG_MTD_CFI_LE_BYTE_SWAP is not set
396# CONFIG_MTD_CFI_GEOMETRY is not set
397CONFIG_MTD_MAP_BANK_WIDTH_1=y
398CONFIG_MTD_MAP_BANK_WIDTH_2=y
399CONFIG_MTD_MAP_BANK_WIDTH_4=y
400# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
401# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
402# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
403CONFIG_MTD_CFI_I1=y
404CONFIG_MTD_CFI_I2=y
405# CONFIG_MTD_CFI_I4 is not set
406# CONFIG_MTD_CFI_I8 is not set
407# CONFIG_MTD_OTP is not set
408CONFIG_MTD_CFI_INTELEXT=y
409# CONFIG_MTD_CFI_AMDSTD is not set
410# CONFIG_MTD_CFI_STAA is not set
411CONFIG_MTD_CFI_UTIL=y
412# CONFIG_MTD_RAM is not set
413# CONFIG_MTD_ROM is not set
414# CONFIG_MTD_ABSENT is not set
415
416#
417# Mapping drivers for chip access
418#
419# CONFIG_MTD_COMPLEX_MAPPINGS is not set
420# CONFIG_MTD_PHYSMAP is not set
421CONFIG_MTD_PHYSMAP_OF=y
422# CONFIG_MTD_INTEL_VR_NOR is not set
423# CONFIG_MTD_PLATRAM is not set
424
425#
426# Self-contained MTD device drivers
427#
428# CONFIG_MTD_PMC551 is not set
429# CONFIG_MTD_DATAFLASH is not set
430# CONFIG_MTD_M25P80 is not set
431# CONFIG_MTD_SLRAM is not set
432# CONFIG_MTD_PHRAM is not set
433# CONFIG_MTD_MTDRAM is not set
434# CONFIG_MTD_BLOCK2MTD is not set
435
436#
437# Disk-On-Chip Device Drivers
438#
439# CONFIG_MTD_DOC2000 is not set
440# CONFIG_MTD_DOC2001 is not set
441# CONFIG_MTD_DOC2001PLUS is not set
442# CONFIG_MTD_NAND is not set
443# CONFIG_MTD_ONENAND is not set
444
445#
446# UBI - Unsorted block images
447#
448# CONFIG_MTD_UBI is not set
449CONFIG_OF_DEVICE=y
450CONFIG_OF_GPIO=y
451CONFIG_OF_I2C=y
452# CONFIG_PARPORT is not set
453CONFIG_BLK_DEV=y
454# CONFIG_BLK_DEV_FD is not set
455# CONFIG_BLK_CPQ_DA is not set
456# CONFIG_BLK_CPQ_CISS_DA is not set
457# CONFIG_BLK_DEV_DAC960 is not set
458# CONFIG_BLK_DEV_UMEM is not set
459# CONFIG_BLK_DEV_COW_COMMON is not set
460CONFIG_BLK_DEV_LOOP=y
461# CONFIG_BLK_DEV_CRYPTOLOOP is not set
462# CONFIG_BLK_DEV_NBD is not set
463# CONFIG_BLK_DEV_SX8 is not set
464CONFIG_BLK_DEV_RAM=y
465CONFIG_BLK_DEV_RAM_COUNT=16
466CONFIG_BLK_DEV_RAM_SIZE=32768
467# CONFIG_BLK_DEV_XIP is not set
468# CONFIG_CDROM_PKTCDVD is not set
469# CONFIG_ATA_OVER_ETH is not set
470CONFIG_MISC_DEVICES=y
471# CONFIG_PHANTOM is not set
472# CONFIG_EEPROM_93CX6 is not set
473# CONFIG_SGI_IOC4 is not set
474# CONFIG_TIFM_CORE is not set
475# CONFIG_ENCLOSURE_SERVICES is not set
476CONFIG_HAVE_IDE=y
477# CONFIG_IDE is not set
478
479#
480# SCSI device support
481#
482# CONFIG_RAID_ATTRS is not set
483# CONFIG_SCSI is not set
484# CONFIG_SCSI_DMA is not set
485# CONFIG_SCSI_NETLINK is not set
486# CONFIG_ATA is not set
487# CONFIG_MD is not set
488# CONFIG_FUSION is not set
489
490#
491# IEEE 1394 (FireWire) support
492#
493# CONFIG_FIREWIRE is not set
494# CONFIG_IEEE1394 is not set
495# CONFIG_I2O is not set
496# CONFIG_MACINTOSH_DRIVERS is not set
497CONFIG_NETDEVICES=y
498# CONFIG_NETDEVICES_MULTIQUEUE is not set
499# CONFIG_DUMMY is not set
500# CONFIG_BONDING is not set
501# CONFIG_MACVLAN is not set
502# CONFIG_EQUALIZER is not set
503# CONFIG_TUN is not set
504# CONFIG_VETH is not set
505# CONFIG_ARCNET is not set
506CONFIG_PHYLIB=y
507
508#
509# MII PHY device drivers
510#
511# CONFIG_MARVELL_PHY is not set
512# CONFIG_DAVICOM_PHY is not set
513# CONFIG_QSEMI_PHY is not set
514# CONFIG_LXT_PHY is not set
515# CONFIG_CICADA_PHY is not set
516# CONFIG_VITESSE_PHY is not set
517# CONFIG_SMSC_PHY is not set
518CONFIG_BROADCOM_PHY=y
519# CONFIG_ICPLUS_PHY is not set
520# CONFIG_REALTEK_PHY is not set
521# CONFIG_FIXED_PHY is not set
522# CONFIG_MDIO_BITBANG is not set
523# CONFIG_NET_ETHERNET is not set
524CONFIG_NETDEV_1000=y
525# CONFIG_ACENIC is not set
526# CONFIG_DL2K is not set
527# CONFIG_E1000 is not set
528# CONFIG_E1000E is not set
529# CONFIG_E1000E_ENABLED is not set
530# CONFIG_IP1000 is not set
531# CONFIG_IGB is not set
532# CONFIG_NS83820 is not set
533# CONFIG_HAMACHI is not set
534# CONFIG_YELLOWFIN is not set
535# CONFIG_R8169 is not set
536# CONFIG_SIS190 is not set
537# CONFIG_SKGE is not set
538# CONFIG_SKY2 is not set
539# CONFIG_VIA_VELOCITY is not set
540# CONFIG_TIGON3 is not set
541# CONFIG_BNX2 is not set
542# CONFIG_GIANFAR is not set
543CONFIG_UCC_GETH=y
544CONFIG_UGETH_NAPI=y
545# CONFIG_UGETH_MAGIC_PACKET is not set
546# CONFIG_UGETH_FILTERING is not set
547# CONFIG_UGETH_TX_ON_DEMAND is not set
548# CONFIG_QLA3XXX is not set
549# CONFIG_ATL1 is not set
550# CONFIG_NETDEV_10000 is not set
551# CONFIG_TR is not set
552
553#
554# Wireless LAN
555#
556# CONFIG_WLAN_PRE80211 is not set
557# CONFIG_WLAN_80211 is not set
558# CONFIG_IWLWIFI_LEDS is not set
559# CONFIG_WAN is not set
560# CONFIG_FDDI is not set
561# CONFIG_HIPPI is not set
562# CONFIG_PPP is not set
563# CONFIG_SLIP is not set
564# CONFIG_NETCONSOLE is not set
565# CONFIG_NETPOLL is not set
566# CONFIG_NET_POLL_CONTROLLER is not set
567# CONFIG_ISDN is not set
568# CONFIG_PHONE is not set
569
570#
571# Input device support
572#
573CONFIG_INPUT=y
574# CONFIG_INPUT_FF_MEMLESS is not set
575# CONFIG_INPUT_POLLDEV is not set
576
577#
578# Userland interfaces
579#
580# CONFIG_INPUT_MOUSEDEV is not set
581# CONFIG_INPUT_JOYDEV is not set
582# CONFIG_INPUT_EVDEV is not set
583# CONFIG_INPUT_EVBUG is not set
584
585#
586# Input Device Drivers
587#
588# CONFIG_INPUT_KEYBOARD is not set
589# CONFIG_INPUT_MOUSE is not set
590# CONFIG_INPUT_JOYSTICK is not set
591# CONFIG_INPUT_TABLET is not set
592# CONFIG_INPUT_TOUCHSCREEN is not set
593# CONFIG_INPUT_MISC is not set
594
595#
596# Hardware I/O ports
597#
598# CONFIG_SERIO is not set
599# CONFIG_GAMEPORT is not set
600
601#
602# Character devices
603#
604CONFIG_VT=y
605CONFIG_VT_CONSOLE=y
606CONFIG_HW_CONSOLE=y
607# CONFIG_VT_HW_CONSOLE_BINDING is not set
608# CONFIG_DEVKMEM is not set
609# CONFIG_SERIAL_NONSTANDARD is not set
610# CONFIG_NOZOMI is not set
611
612#
613# Serial drivers
614#
615CONFIG_SERIAL_8250=y
616CONFIG_SERIAL_8250_CONSOLE=y
617CONFIG_SERIAL_8250_PCI=y
618CONFIG_SERIAL_8250_NR_UARTS=4
619CONFIG_SERIAL_8250_RUNTIME_UARTS=4
620# CONFIG_SERIAL_8250_EXTENDED is not set
621
622#
623# Non-8250 serial port support
624#
625# CONFIG_SERIAL_UARTLITE is not set
626CONFIG_SERIAL_CORE=y
627CONFIG_SERIAL_CORE_CONSOLE=y
628# CONFIG_SERIAL_JSM is not set
629# CONFIG_SERIAL_OF_PLATFORM is not set
630CONFIG_SERIAL_QE=y
631CONFIG_UNIX98_PTYS=y
632CONFIG_LEGACY_PTYS=y
633CONFIG_LEGACY_PTY_COUNT=256
634# CONFIG_IPMI_HANDLER is not set
635CONFIG_HW_RANDOM=y
636# CONFIG_NVRAM is not set
637# CONFIG_GEN_RTC is not set
638# CONFIG_R3964 is not set
639# CONFIG_APPLICOM is not set
640# CONFIG_RAW_DRIVER is not set
641# CONFIG_TCG_TPM is not set
642CONFIG_DEVPORT=y
643CONFIG_I2C=y
644CONFIG_I2C_BOARDINFO=y
645CONFIG_I2C_CHARDEV=y
646
647#
648# I2C Hardware Bus support
649#
650# CONFIG_I2C_ALI1535 is not set
651# CONFIG_I2C_ALI1563 is not set
652# CONFIG_I2C_ALI15X3 is not set
653# CONFIG_I2C_AMD756 is not set
654# CONFIG_I2C_AMD8111 is not set
655# CONFIG_I2C_GPIO is not set
656# CONFIG_I2C_I801 is not set
657# CONFIG_I2C_I810 is not set
658# CONFIG_I2C_PIIX4 is not set
659CONFIG_I2C_MPC=y
660# CONFIG_I2C_NFORCE2 is not set
661# CONFIG_I2C_OCORES is not set
662# CONFIG_I2C_PARPORT_LIGHT is not set
663# CONFIG_I2C_PROSAVAGE is not set
664# CONFIG_I2C_SAVAGE4 is not set
665# CONFIG_I2C_SIMTEC is not set
666# CONFIG_I2C_SIS5595 is not set
667# CONFIG_I2C_SIS630 is not set
668# CONFIG_I2C_SIS96X is not set
669# CONFIG_I2C_TAOS_EVM is not set
670# CONFIG_I2C_STUB is not set
671# CONFIG_I2C_VIA is not set
672# CONFIG_I2C_VIAPRO is not set
673# CONFIG_I2C_VOODOO3 is not set
674# CONFIG_I2C_PCA_PLATFORM is not set
675
676#
677# Miscellaneous I2C Chip support
678#
679# CONFIG_DS1682 is not set
680# CONFIG_SENSORS_EEPROM is not set
681# CONFIG_SENSORS_PCF8574 is not set
682# CONFIG_PCF8575 is not set
683# CONFIG_SENSORS_PCF8591 is not set
684# CONFIG_TPS65010 is not set
685# CONFIG_SENSORS_MAX6875 is not set
686# CONFIG_SENSORS_TSL2550 is not set
687# CONFIG_I2C_DEBUG_CORE is not set
688# CONFIG_I2C_DEBUG_ALGO is not set
689# CONFIG_I2C_DEBUG_BUS is not set
690# CONFIG_I2C_DEBUG_CHIP is not set
691CONFIG_SPI=y
692CONFIG_SPI_MASTER=y
693
694#
695# SPI Master Controller Drivers
696#
697CONFIG_SPI_BITBANG=y
698CONFIG_SPI_MPC83xx=y
699
700#
701# SPI Protocol Masters
702#
703# CONFIG_SPI_AT25 is not set
704CONFIG_SPI_SPIDEV=y
705# CONFIG_SPI_TLE62X0 is not set
706CONFIG_HAVE_GPIO_LIB=y
707
708#
709# GPIO Support
710#
711
712#
713# I2C GPIO expanders:
714#
715# CONFIG_GPIO_PCA953X is not set
716# CONFIG_GPIO_PCF857X is not set
717
718#
719# SPI GPIO expanders:
720#
721# CONFIG_GPIO_MCP23S08 is not set
722# CONFIG_W1 is not set
723# CONFIG_POWER_SUPPLY is not set
724# CONFIG_HWMON is not set
725# CONFIG_THERMAL is not set
726CONFIG_WATCHDOG=y
727# CONFIG_WATCHDOG_NOWAYOUT is not set
728
729#
730# Watchdog Device Drivers
731#
732# CONFIG_SOFT_WATCHDOG is not set
733CONFIG_83xx_WDT=y
734
735#
736# PCI-based Watchdog Cards
737#
738# CONFIG_PCIPCWATCHDOG is not set
739# CONFIG_WDTPCI is not set
740
741#
742# Sonics Silicon Backplane
743#
744CONFIG_SSB_POSSIBLE=y
745# CONFIG_SSB is not set
746
747#
748# Multifunction device drivers
749#
750# CONFIG_MFD_SM501 is not set
751# CONFIG_HTC_EGPIO is not set
752# CONFIG_HTC_PASIC3 is not set
753
754#
755# Multimedia devices
756#
757
758#
759# Multimedia core support
760#
761# CONFIG_VIDEO_DEV is not set
762# CONFIG_DVB_CORE is not set
763# CONFIG_VIDEO_MEDIA is not set
764
765#
766# Multimedia drivers
767#
768CONFIG_DAB=y
769
770#
771# Graphics support
772#
773# CONFIG_AGP is not set
774# CONFIG_DRM is not set
775# CONFIG_VGASTATE is not set
776# CONFIG_VIDEO_OUTPUT_CONTROL is not set
777CONFIG_FB=y
778# CONFIG_FIRMWARE_EDID is not set
779# CONFIG_FB_DDC is not set
780CONFIG_FB_CFB_FILLRECT=y
781CONFIG_FB_CFB_COPYAREA=y
782CONFIG_FB_CFB_IMAGEBLIT=y
783# CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set
784# CONFIG_FB_SYS_FILLRECT is not set
785# CONFIG_FB_SYS_COPYAREA is not set
786# CONFIG_FB_SYS_IMAGEBLIT is not set
787# CONFIG_FB_FOREIGN_ENDIAN is not set
788# CONFIG_FB_SYS_FOPS is not set
789# CONFIG_FB_SVGALIB is not set
790CONFIG_FB_MACMODES=y
791# CONFIG_FB_BACKLIGHT is not set
792# CONFIG_FB_MODE_HELPERS is not set
793# CONFIG_FB_TILEBLITTING is not set
794
795#
796# Frame buffer hardware drivers
797#
798# CONFIG_FB_CIRRUS is not set
799# CONFIG_FB_PM2 is not set
800# CONFIG_FB_CYBER2000 is not set
801CONFIG_FB_OF=y
802# CONFIG_FB_CT65550 is not set
803# CONFIG_FB_ASILIANT is not set
804# CONFIG_FB_IMSTT is not set
805# CONFIG_FB_VGA16 is not set
806# CONFIG_FB_S1D13XXX is not set
807# CONFIG_FB_NVIDIA is not set
808# CONFIG_FB_RIVA is not set
809# CONFIG_FB_MATROX is not set
810# CONFIG_FB_RADEON is not set
811# CONFIG_FB_ATY128 is not set
812# CONFIG_FB_ATY is not set
813# CONFIG_FB_S3 is not set
814# CONFIG_FB_SAVAGE is not set
815# CONFIG_FB_SIS is not set
816# CONFIG_FB_NEOMAGIC is not set
817# CONFIG_FB_KYRO is not set
818# CONFIG_FB_3DFX is not set
819# CONFIG_FB_VOODOO1 is not set
820# CONFIG_FB_VT8623 is not set
821# CONFIG_FB_TRIDENT is not set
822# CONFIG_FB_ARK is not set
823# CONFIG_FB_PM3 is not set
824# CONFIG_FB_FSL_DIU is not set
825# CONFIG_FB_IBM_GXT4500 is not set
826# CONFIG_FB_VIRTUAL is not set
827# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
828
829#
830# Display device support
831#
832# CONFIG_DISPLAY_SUPPORT is not set
833
834#
835# Console display driver support
836#
837# CONFIG_VGA_CONSOLE is not set
838CONFIG_DUMMY_CONSOLE=y
839CONFIG_FRAMEBUFFER_CONSOLE=y
840# CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set
841# CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set
842# CONFIG_FONTS is not set
843CONFIG_FONT_8x8=y
844CONFIG_FONT_8x16=y
845CONFIG_LOGO=y
846# CONFIG_LOGO_LINUX_MONO is not set
847CONFIG_LOGO_LINUX_VGA16=y
848CONFIG_LOGO_LINUX_CLUT224=y
849
850#
851# Sound
852#
853# CONFIG_SOUND is not set
854CONFIG_HID_SUPPORT=y
855CONFIG_HID=y
856# CONFIG_HID_DEBUG is not set
857# CONFIG_HIDRAW is not set
858# CONFIG_USB_SUPPORT is not set
859# CONFIG_MMC is not set
860# CONFIG_MEMSTICK is not set
861# CONFIG_NEW_LEDS is not set
862# CONFIG_ACCESSIBILITY is not set
863# CONFIG_INFINIBAND is not set
864# CONFIG_EDAC is not set
865# CONFIG_RTC_CLASS is not set
866# CONFIG_DMADEVICES is not set
867# CONFIG_UIO is not set
868
869#
870# File systems
871#
872CONFIG_EXT2_FS=y
873# CONFIG_EXT2_FS_XATTR is not set
874# CONFIG_EXT2_FS_XIP is not set
875CONFIG_EXT3_FS=y
876CONFIG_EXT3_FS_XATTR=y
877# CONFIG_EXT3_FS_POSIX_ACL is not set
878# CONFIG_EXT3_FS_SECURITY is not set
879# CONFIG_EXT4DEV_FS is not set
880CONFIG_JBD=y
881CONFIG_FS_MBCACHE=y
882# CONFIG_REISERFS_FS is not set
883# CONFIG_JFS_FS is not set
884# CONFIG_FS_POSIX_ACL is not set
885# CONFIG_XFS_FS is not set
886# CONFIG_OCFS2_FS is not set
887CONFIG_DNOTIFY=y
888CONFIG_INOTIFY=y
889CONFIG_INOTIFY_USER=y
890# CONFIG_QUOTA is not set
891# CONFIG_AUTOFS_FS is not set
892# CONFIG_AUTOFS4_FS is not set
893# CONFIG_FUSE_FS is not set
894
895#
896# CD-ROM/DVD Filesystems
897#
898# CONFIG_ISO9660_FS is not set
899# CONFIG_UDF_FS is not set
900
901#
902# DOS/FAT/NT Filesystems
903#
904# CONFIG_MSDOS_FS is not set
905# CONFIG_VFAT_FS is not set
906# CONFIG_NTFS_FS is not set
907
908#
909# Pseudo filesystems
910#
911CONFIG_PROC_FS=y
912CONFIG_PROC_KCORE=y
913CONFIG_PROC_SYSCTL=y
914CONFIG_SYSFS=y
915CONFIG_TMPFS=y
916# CONFIG_TMPFS_POSIX_ACL is not set
917# CONFIG_HUGETLB_PAGE is not set
918# CONFIG_CONFIGFS_FS is not set
919
920#
921# Miscellaneous filesystems
922#
923# CONFIG_ADFS_FS is not set
924# CONFIG_AFFS_FS is not set
925# CONFIG_HFS_FS is not set
926# CONFIG_HFSPLUS_FS is not set
927# CONFIG_BEFS_FS is not set
928# CONFIG_BFS_FS is not set
929# CONFIG_EFS_FS is not set
930CONFIG_JFFS2_FS=y
931CONFIG_JFFS2_FS_DEBUG=0
932CONFIG_JFFS2_FS_WRITEBUFFER=y
933# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
934# CONFIG_JFFS2_SUMMARY is not set
935# CONFIG_JFFS2_FS_XATTR is not set
936# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
937CONFIG_JFFS2_ZLIB=y
938# CONFIG_JFFS2_LZO is not set
939CONFIG_JFFS2_RTIME=y
940# CONFIG_JFFS2_RUBIN is not set
941# CONFIG_CRAMFS is not set
942# CONFIG_VXFS_FS is not set
943# CONFIG_MINIX_FS is not set
944# CONFIG_HPFS_FS is not set
945# CONFIG_QNX4FS_FS is not set
946# CONFIG_ROMFS_FS is not set
947# CONFIG_SYSV_FS is not set
948# CONFIG_UFS_FS is not set
949CONFIG_NETWORK_FILESYSTEMS=y
950CONFIG_NFS_FS=y
951CONFIG_NFS_V3=y
952# CONFIG_NFS_V3_ACL is not set
953CONFIG_NFS_V4=y
954# CONFIG_NFSD is not set
955CONFIG_ROOT_NFS=y
956CONFIG_LOCKD=y
957CONFIG_LOCKD_V4=y
958CONFIG_NFS_COMMON=y
959CONFIG_SUNRPC=y
960CONFIG_SUNRPC_GSS=y
961# CONFIG_SUNRPC_BIND34 is not set
962CONFIG_RPCSEC_GSS_KRB5=y
963# CONFIG_RPCSEC_GSS_SPKM3 is not set
964# CONFIG_SMB_FS is not set
965# CONFIG_CIFS is not set
966# CONFIG_NCP_FS is not set
967# CONFIG_CODA_FS is not set
968# CONFIG_AFS_FS is not set
969
970#
971# Partition Types
972#
973CONFIG_PARTITION_ADVANCED=y
974# CONFIG_ACORN_PARTITION is not set
975# CONFIG_OSF_PARTITION is not set
976# CONFIG_AMIGA_PARTITION is not set
977# CONFIG_ATARI_PARTITION is not set
978# CONFIG_MAC_PARTITION is not set
979# CONFIG_MSDOS_PARTITION is not set
980# CONFIG_LDM_PARTITION is not set
981# CONFIG_SGI_PARTITION is not set
982# CONFIG_ULTRIX_PARTITION is not set
983# CONFIG_SUN_PARTITION is not set
984# CONFIG_KARMA_PARTITION is not set
985# CONFIG_EFI_PARTITION is not set
986# CONFIG_SYSV68_PARTITION is not set
987# CONFIG_NLS is not set
988# CONFIG_DLM is not set
989CONFIG_UCC_SLOW=y
990CONFIG_UCC_FAST=y
991CONFIG_UCC=y
992CONFIG_QE_GPIO=y
993
994#
995# Library routines
996#
997CONFIG_BITREVERSE=y
998# CONFIG_GENERIC_FIND_FIRST_BIT is not set
999# CONFIG_CRC_CCITT is not set
1000# CONFIG_CRC16 is not set
1001# CONFIG_CRC_ITU_T is not set
1002CONFIG_CRC32=y
1003# CONFIG_CRC7 is not set
1004# CONFIG_LIBCRC32C is not set
1005CONFIG_ZLIB_INFLATE=y
1006CONFIG_ZLIB_DEFLATE=y
1007CONFIG_PLIST=y
1008CONFIG_HAS_IOMEM=y
1009CONFIG_HAS_IOPORT=y
1010CONFIG_HAS_DMA=y
1011CONFIG_HAVE_LMB=y
1012
1013#
1014# Kernel hacking
1015#
1016# CONFIG_PRINTK_TIME is not set
1017CONFIG_ENABLE_WARN_DEPRECATED=y
1018CONFIG_ENABLE_MUST_CHECK=y
1019CONFIG_FRAME_WARN=1024
1020# CONFIG_MAGIC_SYSRQ is not set
1021# CONFIG_UNUSED_SYMBOLS is not set
1022# CONFIG_DEBUG_FS is not set
1023# CONFIG_HEADERS_CHECK is not set
1024# CONFIG_DEBUG_KERNEL is not set
1025# CONFIG_SLUB_DEBUG_ON is not set
1026# CONFIG_SLUB_STATS is not set
1027# CONFIG_DEBUG_BUGVERBOSE is not set
1028# CONFIG_SAMPLES is not set
1029# CONFIG_IRQSTACKS is not set
1030CONFIG_PPC_EARLY_DEBUG=y
1031# CONFIG_PPC_EARLY_DEBUG_LPAR is not set
1032# CONFIG_PPC_EARLY_DEBUG_G5 is not set
1033# CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set
1034# CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set
1035# CONFIG_PPC_EARLY_DEBUG_MAPLE is not set
1036# CONFIG_PPC_EARLY_DEBUG_ISERIES is not set
1037# CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set
1038# CONFIG_PPC_EARLY_DEBUG_BEAT is not set
1039# CONFIG_PPC_EARLY_DEBUG_44x is not set
1040# CONFIG_PPC_EARLY_DEBUG_40x is not set
1041# CONFIG_PPC_EARLY_DEBUG_CPM is not set
1042
1043#
1044# Security options
1045#
1046# CONFIG_KEYS is not set
1047# CONFIG_SECURITY is not set
1048# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1049CONFIG_CRYPTO=y
1050
1051#
1052# Crypto core or helper
1053#
1054CONFIG_CRYPTO_ALGAPI=y
1055CONFIG_CRYPTO_BLKCIPHER=y
1056CONFIG_CRYPTO_MANAGER=y
1057# CONFIG_CRYPTO_GF128MUL is not set
1058# CONFIG_CRYPTO_NULL is not set
1059# CONFIG_CRYPTO_CRYPTD is not set
1060# CONFIG_CRYPTO_AUTHENC is not set
1061# CONFIG_CRYPTO_TEST is not set
1062
1063#
1064# Authenticated Encryption with Associated Data
1065#
1066# CONFIG_CRYPTO_CCM is not set
1067# CONFIG_CRYPTO_GCM is not set
1068# CONFIG_CRYPTO_SEQIV is not set
1069
1070#
1071# Block modes
1072#
1073CONFIG_CRYPTO_CBC=y
1074# CONFIG_CRYPTO_CTR is not set
1075# CONFIG_CRYPTO_CTS is not set
1076# CONFIG_CRYPTO_ECB is not set
1077# CONFIG_CRYPTO_LRW is not set
1078# CONFIG_CRYPTO_PCBC is not set
1079# CONFIG_CRYPTO_XTS is not set
1080
1081#
1082# Hash modes
1083#
1084# CONFIG_CRYPTO_HMAC is not set
1085# CONFIG_CRYPTO_XCBC is not set
1086
1087#
1088# Digest
1089#
1090# CONFIG_CRYPTO_CRC32C is not set
1091# CONFIG_CRYPTO_MD4 is not set
1092CONFIG_CRYPTO_MD5=y
1093# CONFIG_CRYPTO_MICHAEL_MIC is not set
1094# CONFIG_CRYPTO_SHA1 is not set
1095# CONFIG_CRYPTO_SHA256 is not set
1096# CONFIG_CRYPTO_SHA512 is not set
1097# CONFIG_CRYPTO_TGR192 is not set
1098# CONFIG_CRYPTO_WP512 is not set
1099
1100#
1101# Ciphers
1102#
1103# CONFIG_CRYPTO_AES is not set
1104# CONFIG_CRYPTO_ANUBIS is not set
1105# CONFIG_CRYPTO_ARC4 is not set
1106# CONFIG_CRYPTO_BLOWFISH is not set
1107# CONFIG_CRYPTO_CAMELLIA is not set
1108# CONFIG_CRYPTO_CAST5 is not set
1109# CONFIG_CRYPTO_CAST6 is not set
1110CONFIG_CRYPTO_DES=y
1111# CONFIG_CRYPTO_FCRYPT is not set
1112# CONFIG_CRYPTO_KHAZAD is not set
1113# CONFIG_CRYPTO_SALSA20 is not set
1114# CONFIG_CRYPTO_SEED is not set
1115# CONFIG_CRYPTO_SERPENT is not set
1116# CONFIG_CRYPTO_TEA is not set
1117# CONFIG_CRYPTO_TWOFISH is not set
1118
1119#
1120# Compression
1121#
1122# CONFIG_CRYPTO_DEFLATE is not set
1123# CONFIG_CRYPTO_LZO is not set
1124CONFIG_CRYPTO_HW=y
1125# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1126# CONFIG_PPC_CLOCK is not set
1127CONFIG_PPC_LIB_RHEAP=y
1128# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
new file mode 100644
index 000000000000..b3b770be3cc9
--- /dev/null
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -0,0 +1,1225 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc5
4# Thu Jun 26 14:40:02 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12CONFIG_PPC_85xx=y
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_E500=y
18# CONFIG_PPC_E500MC is not set
19CONFIG_BOOKE=y
20CONFIG_FSL_BOOKE=y
21CONFIG_FSL_EMB_PERFMON=y
22# CONFIG_PHYS_64BIT is not set
23CONFIG_SPE=y
24# CONFIG_PPC_MM_SLICES is not set
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27CONFIG_PPC_MERGE=y
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_LOCKDEP_SUPPORT=y
38CONFIG_RWSEM_XCHGADD_ALGORITHM=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51CONFIG_PPC_UDBG_16550=y
52# CONFIG_GENERIC_TBSYNC is not set
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55CONFIG_DEFAULT_UIMAGE=y
56# CONFIG_PPC_DCR_NATIVE is not set
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_BROKEN_ON_SMP=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71# CONFIG_POSIX_MQUEUE is not set
72# CONFIG_BSD_PROCESS_ACCT is not set
73# CONFIG_TASKSTATS is not set
74# CONFIG_AUDIT is not set
75# CONFIG_IKCONFIG is not set
76CONFIG_LOG_BUF_SHIFT=14
77# CONFIG_CGROUPS is not set
78CONFIG_GROUP_SCHED=y
79# CONFIG_FAIR_GROUP_SCHED is not set
80# CONFIG_RT_GROUP_SCHED is not set
81CONFIG_USER_SCHED=y
82# CONFIG_CGROUP_SCHED is not set
83CONFIG_SYSFS_DEPRECATED=y
84CONFIG_SYSFS_DEPRECATED_V2=y
85# CONFIG_RELAY is not set
86# CONFIG_NAMESPACES is not set
87CONFIG_BLK_DEV_INITRD=y
88CONFIG_INITRAMFS_SOURCE=""
89# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
90CONFIG_SYSCTL=y
91CONFIG_EMBEDDED=y
92CONFIG_SYSCTL_SYSCALL=y
93CONFIG_SYSCTL_SYSCALL_CHECK=y
94CONFIG_KALLSYMS=y
95# CONFIG_KALLSYMS_ALL is not set
96# CONFIG_KALLSYMS_EXTRA_PASS is not set
97CONFIG_HOTPLUG=y
98CONFIG_PRINTK=y
99CONFIG_BUG=y
100CONFIG_ELF_CORE=y
101CONFIG_COMPAT_BRK=y
102CONFIG_BASE_FULL=y
103CONFIG_FUTEX=y
104CONFIG_ANON_INODES=y
105CONFIG_EPOLL=y
106CONFIG_SIGNALFD=y
107CONFIG_TIMERFD=y
108CONFIG_EVENTFD=y
109CONFIG_SHMEM=y
110CONFIG_VM_EVENT_COUNTERS=y
111CONFIG_SLUB_DEBUG=y
112# CONFIG_SLAB is not set
113CONFIG_SLUB=y
114# CONFIG_SLOB is not set
115# CONFIG_PROFILING is not set
116# CONFIG_MARKERS is not set
117CONFIG_HAVE_OPROFILE=y
118# CONFIG_KPROBES is not set
119CONFIG_HAVE_KPROBES=y
120CONFIG_HAVE_KRETPROBES=y
121# CONFIG_HAVE_DMA_ATTRS is not set
122CONFIG_PROC_PAGE_MONITOR=y
123CONFIG_SLABINFO=y
124CONFIG_RT_MUTEXES=y
125# CONFIG_TINY_SHMEM is not set
126CONFIG_BASE_SMALL=0
127CONFIG_MODULES=y
128# CONFIG_MODULE_FORCE_LOAD is not set
129CONFIG_MODULE_UNLOAD=y
130# CONFIG_MODULE_FORCE_UNLOAD is not set
131# CONFIG_MODVERSIONS is not set
132# CONFIG_MODULE_SRCVERSION_ALL is not set
133# CONFIG_KMOD is not set
134CONFIG_BLOCK=y
135# CONFIG_LBD is not set
136# CONFIG_BLK_DEV_IO_TRACE is not set
137# CONFIG_LSF is not set
138# CONFIG_BLK_DEV_BSG is not set
139
140#
141# IO Schedulers
142#
143CONFIG_IOSCHED_NOOP=y
144CONFIG_IOSCHED_AS=y
145CONFIG_IOSCHED_DEADLINE=y
146CONFIG_IOSCHED_CFQ=y
147CONFIG_DEFAULT_AS=y
148# CONFIG_DEFAULT_DEADLINE is not set
149# CONFIG_DEFAULT_CFQ is not set
150# CONFIG_DEFAULT_NOOP is not set
151CONFIG_DEFAULT_IOSCHED="anticipatory"
152CONFIG_CLASSIC_RCU=y
153
154#
155# Platform support
156#
157# CONFIG_PPC_MPC512x is not set
158# CONFIG_PPC_MPC5121 is not set
159# CONFIG_PPC_CELL is not set
160# CONFIG_PPC_CELL_NATIVE is not set
161# CONFIG_PQ2ADS is not set
162CONFIG_MPC85xx=y
163# CONFIG_MPC8540_ADS is not set
164# CONFIG_MPC8560_ADS is not set
165# CONFIG_MPC85xx_CDS is not set
166# CONFIG_MPC85xx_MDS is not set
167# CONFIG_MPC85xx_DS is not set
168# CONFIG_KSI8560 is not set
169# CONFIG_STX_GP3 is not set
170# CONFIG_TQM8540 is not set
171# CONFIG_TQM8541 is not set
172CONFIG_TQM8548=y
173# CONFIG_TQM8555 is not set
174# CONFIG_TQM8560 is not set
175# CONFIG_SBC8548 is not set
176# CONFIG_SBC8560 is not set
177CONFIG_TQM85xx=y
178# CONFIG_IPIC is not set
179CONFIG_MPIC=y
180# CONFIG_MPIC_WEIRD is not set
181# CONFIG_PPC_I8259 is not set
182# CONFIG_PPC_RTAS is not set
183# CONFIG_MMIO_NVRAM is not set
184# CONFIG_PPC_MPC106 is not set
185# CONFIG_PPC_970_NAP is not set
186# CONFIG_PPC_INDIRECT_IO is not set
187# CONFIG_GENERIC_IOMAP is not set
188# CONFIG_CPU_FREQ is not set
189# CONFIG_CPM2 is not set
190CONFIG_PPC_CPM_NEW_BINDING=y
191# CONFIG_FSL_ULI1575 is not set
192
193#
194# Kernel options
195#
196# CONFIG_HIGHMEM is not set
197CONFIG_TICK_ONESHOT=y
198CONFIG_NO_HZ=y
199CONFIG_HIGH_RES_TIMERS=y
200CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
201# CONFIG_HZ_100 is not set
202CONFIG_HZ_250=y
203# CONFIG_HZ_300 is not set
204# CONFIG_HZ_1000 is not set
205CONFIG_HZ=250
206# CONFIG_SCHED_HRTICK is not set
207CONFIG_PREEMPT_NONE=y
208# CONFIG_PREEMPT_VOLUNTARY is not set
209# CONFIG_PREEMPT is not set
210CONFIG_BINFMT_ELF=y
211CONFIG_BINFMT_MISC=y
212CONFIG_MATH_EMULATION=y
213# CONFIG_IOMMU_HELPER is not set
214CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
215CONFIG_ARCH_HAS_WALK_MEMORY=y
216CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
217CONFIG_ARCH_FLATMEM_ENABLE=y
218CONFIG_ARCH_POPULATES_NODE_MAP=y
219CONFIG_SELECT_MEMORY_MODEL=y
220CONFIG_FLATMEM_MANUAL=y
221# CONFIG_DISCONTIGMEM_MANUAL is not set
222# CONFIG_SPARSEMEM_MANUAL is not set
223CONFIG_FLATMEM=y
224CONFIG_FLAT_NODE_MEM_MAP=y
225# CONFIG_SPARSEMEM_STATIC is not set
226# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
227CONFIG_PAGEFLAGS_EXTENDED=y
228CONFIG_SPLIT_PTLOCK_CPUS=4
229# CONFIG_RESOURCES_64BIT is not set
230CONFIG_ZONE_DMA_FLAG=1
231CONFIG_BOUNCE=y
232CONFIG_VIRT_TO_BUS=y
233CONFIG_FORCE_MAX_ZONEORDER=11
234CONFIG_PROC_DEVICETREE=y
235# CONFIG_CMDLINE_BOOL is not set
236# CONFIG_PM is not set
237# CONFIG_SECCOMP is not set
238CONFIG_ISA_DMA_API=y
239
240#
241# Bus options
242#
243CONFIG_ZONE_DMA=y
244CONFIG_PPC_INDIRECT_PCI=y
245CONFIG_FSL_SOC=y
246CONFIG_FSL_PCI=y
247CONFIG_FSL_LBC=y
248CONFIG_PCI=y
249CONFIG_PCI_DOMAINS=y
250CONFIG_PCI_SYSCALL=y
251CONFIG_PCIEPORTBUS=y
252CONFIG_PCIEAER=y
253# CONFIG_PCIEASPM is not set
254CONFIG_ARCH_SUPPORTS_MSI=y
255# CONFIG_PCI_MSI is not set
256CONFIG_PCI_LEGACY=y
257# CONFIG_PCI_DEBUG is not set
258# CONFIG_PCCARD is not set
259# CONFIG_HOTPLUG_PCI is not set
260# CONFIG_HAS_RAPIDIO is not set
261
262#
263# Advanced setup
264#
265# CONFIG_ADVANCED_OPTIONS is not set
266
267#
268# Default settings for advanced configuration options are used
269#
270CONFIG_LOWMEM_SIZE=0x30000000
271CONFIG_PAGE_OFFSET=0xc0000000
272CONFIG_KERNEL_START=0xc0000000
273CONFIG_PHYSICAL_START=0x00000000
274CONFIG_PHYSICAL_ALIGN=0x10000000
275CONFIG_TASK_SIZE=0xc0000000
276
277#
278# Networking
279#
280CONFIG_NET=y
281
282#
283# Networking options
284#
285CONFIG_PACKET=y
286# CONFIG_PACKET_MMAP is not set
287CONFIG_UNIX=y
288CONFIG_XFRM=y
289CONFIG_XFRM_USER=y
290# CONFIG_XFRM_SUB_POLICY is not set
291# CONFIG_XFRM_MIGRATE is not set
292# CONFIG_XFRM_STATISTICS is not set
293# CONFIG_NET_KEY is not set
294CONFIG_INET=y
295CONFIG_IP_MULTICAST=y
296# CONFIG_IP_ADVANCED_ROUTER is not set
297CONFIG_IP_FIB_HASH=y
298CONFIG_IP_PNP=y
299CONFIG_IP_PNP_DHCP=y
300CONFIG_IP_PNP_BOOTP=y
301# CONFIG_IP_PNP_RARP is not set
302# CONFIG_NET_IPIP is not set
303# CONFIG_NET_IPGRE is not set
304# CONFIG_IP_MROUTE is not set
305# CONFIG_ARPD is not set
306CONFIG_SYN_COOKIES=y
307# CONFIG_INET_AH is not set
308# CONFIG_INET_ESP is not set
309# CONFIG_INET_IPCOMP is not set
310# CONFIG_INET_XFRM_TUNNEL is not set
311# CONFIG_INET_TUNNEL is not set
312CONFIG_INET_XFRM_MODE_TRANSPORT=y
313CONFIG_INET_XFRM_MODE_TUNNEL=y
314CONFIG_INET_XFRM_MODE_BEET=y
315# CONFIG_INET_LRO is not set
316CONFIG_INET_DIAG=y
317CONFIG_INET_TCP_DIAG=y
318# CONFIG_TCP_CONG_ADVANCED is not set
319CONFIG_TCP_CONG_CUBIC=y
320CONFIG_DEFAULT_TCP_CONG="cubic"
321# CONFIG_TCP_MD5SIG is not set
322# CONFIG_IPV6 is not set
323# CONFIG_NETWORK_SECMARK is not set
324# CONFIG_NETFILTER is not set
325# CONFIG_IP_DCCP is not set
326# CONFIG_IP_SCTP is not set
327# CONFIG_TIPC is not set
328# CONFIG_ATM is not set
329# CONFIG_BRIDGE is not set
330# CONFIG_VLAN_8021Q is not set
331# CONFIG_DECNET is not set
332# CONFIG_LLC2 is not set
333# CONFIG_IPX is not set
334# CONFIG_ATALK is not set
335# CONFIG_X25 is not set
336# CONFIG_LAPB is not set
337# CONFIG_ECONET is not set
338# CONFIG_WAN_ROUTER is not set
339# CONFIG_NET_SCHED is not set
340
341#
342# Network testing
343#
344# CONFIG_NET_PKTGEN is not set
345# CONFIG_HAMRADIO is not set
346# CONFIG_CAN is not set
347# CONFIG_IRDA is not set
348# CONFIG_BT is not set
349# CONFIG_AF_RXRPC is not set
350
351#
352# Wireless
353#
354# CONFIG_CFG80211 is not set
355# CONFIG_WIRELESS_EXT is not set
356# CONFIG_MAC80211 is not set
357# CONFIG_IEEE80211 is not set
358# CONFIG_RFKILL is not set
359# CONFIG_NET_9P is not set
360
361#
362# Device Drivers
363#
364
365#
366# Generic Driver Options
367#
368CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
369CONFIG_STANDALONE=y
370CONFIG_PREVENT_FIRMWARE_BUILD=y
371# CONFIG_FW_LOADER is not set
372# CONFIG_DEBUG_DRIVER is not set
373# CONFIG_DEBUG_DEVRES is not set
374# CONFIG_SYS_HYPERVISOR is not set
375# CONFIG_CONNECTOR is not set
376CONFIG_MTD=y
377# CONFIG_MTD_DEBUG is not set
378# CONFIG_MTD_CONCAT is not set
379CONFIG_MTD_PARTITIONS=y
380# CONFIG_MTD_REDBOOT_PARTS is not set
381# CONFIG_MTD_CMDLINE_PARTS is not set
382CONFIG_MTD_OF_PARTS=y
383# CONFIG_MTD_AR7_PARTS is not set
384
385#
386# User Modules And Translation Layers
387#
388CONFIG_MTD_CHAR=y
389CONFIG_MTD_BLKDEVS=y
390# CONFIG_MTD_BLOCK is not set
391# CONFIG_MTD_BLOCK_RO is not set
392# CONFIG_FTL is not set
393# CONFIG_NFTL is not set
394# CONFIG_INFTL is not set
395# CONFIG_RFD_FTL is not set
396# CONFIG_SSFDC is not set
397# CONFIG_MTD_OOPS is not set
398
399#
400# RAM/ROM/Flash chip drivers
401#
402CONFIG_MTD_CFI=y
403# CONFIG_MTD_JEDECPROBE is not set
404CONFIG_MTD_GEN_PROBE=y
405# CONFIG_MTD_CFI_ADV_OPTIONS is not set
406CONFIG_MTD_MAP_BANK_WIDTH_1=y
407CONFIG_MTD_MAP_BANK_WIDTH_2=y
408CONFIG_MTD_MAP_BANK_WIDTH_4=y
409# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
410# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
411# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
412CONFIG_MTD_CFI_I1=y
413CONFIG_MTD_CFI_I2=y
414# CONFIG_MTD_CFI_I4 is not set
415# CONFIG_MTD_CFI_I8 is not set
416# CONFIG_MTD_CFI_INTELEXT is not set
417CONFIG_MTD_CFI_AMDSTD=y
418# CONFIG_MTD_CFI_STAA is not set
419CONFIG_MTD_CFI_UTIL=y
420# CONFIG_MTD_RAM is not set
421# CONFIG_MTD_ROM is not set
422# CONFIG_MTD_ABSENT is not set
423
424#
425# Mapping drivers for chip access
426#
427# CONFIG_MTD_COMPLEX_MAPPINGS is not set
428# CONFIG_MTD_PHYSMAP is not set
429CONFIG_MTD_PHYSMAP_OF=y
430# CONFIG_MTD_INTEL_VR_NOR is not set
431# CONFIG_MTD_PLATRAM is not set
432
433#
434# Self-contained MTD device drivers
435#
436# CONFIG_MTD_PMC551 is not set
437# CONFIG_MTD_SLRAM is not set
438# CONFIG_MTD_PHRAM is not set
439# CONFIG_MTD_MTDRAM is not set
440# CONFIG_MTD_BLOCK2MTD is not set
441
442#
443# Disk-On-Chip Device Drivers
444#
445# CONFIG_MTD_DOC2000 is not set
446# CONFIG_MTD_DOC2001 is not set
447# CONFIG_MTD_DOC2001PLUS is not set
448CONFIG_MTD_NAND=y
449# CONFIG_MTD_NAND_VERIFY_WRITE is not set
450CONFIG_MTD_NAND_ECC_SMC=y
451# CONFIG_MTD_NAND_MUSEUM_IDS is not set
452CONFIG_MTD_NAND_IDS=y
453# CONFIG_MTD_NAND_DISKONCHIP is not set
454# CONFIG_MTD_NAND_CAFE is not set
455# CONFIG_MTD_NAND_NANDSIM is not set
456# CONFIG_MTD_NAND_PLATFORM is not set
457# CONFIG_MTD_NAND_FSL_ELBC is not set
458CONFIG_MTD_NAND_FSL_UPM=y
459# CONFIG_MTD_ONENAND is not set
460
461#
462# UBI - Unsorted block images
463#
464CONFIG_MTD_UBI=m
465CONFIG_MTD_UBI_WL_THRESHOLD=4096
466CONFIG_MTD_UBI_BEB_RESERVE=1
467# CONFIG_MTD_UBI_GLUEBI is not set
468
469#
470# UBI debugging options
471#
472# CONFIG_MTD_UBI_DEBUG is not set
473CONFIG_OF_DEVICE=y
474CONFIG_OF_I2C=y
475# CONFIG_PARPORT is not set
476CONFIG_BLK_DEV=y
477# CONFIG_BLK_DEV_FD is not set
478# CONFIG_BLK_CPQ_DA is not set
479# CONFIG_BLK_CPQ_CISS_DA is not set
480# CONFIG_BLK_DEV_DAC960 is not set
481# CONFIG_BLK_DEV_UMEM is not set
482# CONFIG_BLK_DEV_COW_COMMON is not set
483CONFIG_BLK_DEV_LOOP=y
484# CONFIG_BLK_DEV_CRYPTOLOOP is not set
485# CONFIG_BLK_DEV_NBD is not set
486# CONFIG_BLK_DEV_SX8 is not set
487CONFIG_BLK_DEV_RAM=y
488CONFIG_BLK_DEV_RAM_COUNT=16
489CONFIG_BLK_DEV_RAM_SIZE=32768
490# CONFIG_BLK_DEV_XIP is not set
491# CONFIG_CDROM_PKTCDVD is not set
492# CONFIG_ATA_OVER_ETH is not set
493CONFIG_MISC_DEVICES=y
494# CONFIG_PHANTOM is not set
495# CONFIG_EEPROM_93CX6 is not set
496# CONFIG_SGI_IOC4 is not set
497# CONFIG_TIFM_CORE is not set
498# CONFIG_ENCLOSURE_SERVICES is not set
499CONFIG_HAVE_IDE=y
500CONFIG_IDE=y
501CONFIG_IDE_MAX_HWIFS=4
502CONFIG_BLK_DEV_IDE=y
503
504#
505# Please see Documentation/ide/ide.txt for help/info on IDE drives
506#
507# CONFIG_BLK_DEV_IDE_SATA is not set
508# CONFIG_BLK_DEV_IDEDISK is not set
509# CONFIG_IDEDISK_MULTI_MODE is not set
510# CONFIG_BLK_DEV_IDECD is not set
511# CONFIG_BLK_DEV_IDETAPE is not set
512# CONFIG_BLK_DEV_IDEFLOPPY is not set
513# CONFIG_IDE_TASK_IOCTL is not set
514CONFIG_IDE_PROC_FS=y
515
516#
517# IDE chipset support/bugfixes
518#
519CONFIG_IDE_GENERIC=y
520# CONFIG_BLK_DEV_PLATFORM is not set
521CONFIG_BLK_DEV_IDEDMA_SFF=y
522
523#
524# PCI IDE chipsets support
525#
526CONFIG_BLK_DEV_IDEPCI=y
527CONFIG_IDEPCI_PCIBUS_ORDER=y
528# CONFIG_BLK_DEV_OFFBOARD is not set
529CONFIG_BLK_DEV_GENERIC=y
530# CONFIG_BLK_DEV_OPTI621 is not set
531CONFIG_BLK_DEV_IDEDMA_PCI=y
532# CONFIG_BLK_DEV_AEC62XX is not set
533# CONFIG_BLK_DEV_ALI15X3 is not set
534# CONFIG_BLK_DEV_AMD74XX is not set
535# CONFIG_BLK_DEV_CMD64X is not set
536# CONFIG_BLK_DEV_TRIFLEX is not set
537# CONFIG_BLK_DEV_CY82C693 is not set
538# CONFIG_BLK_DEV_CS5520 is not set
539# CONFIG_BLK_DEV_CS5530 is not set
540# CONFIG_BLK_DEV_HPT34X is not set
541# CONFIG_BLK_DEV_HPT366 is not set
542# CONFIG_BLK_DEV_JMICRON is not set
543# CONFIG_BLK_DEV_SC1200 is not set
544# CONFIG_BLK_DEV_PIIX is not set
545# CONFIG_BLK_DEV_IT8213 is not set
546# CONFIG_BLK_DEV_IT821X is not set
547# CONFIG_BLK_DEV_NS87415 is not set
548# CONFIG_BLK_DEV_PDC202XX_OLD is not set
549# CONFIG_BLK_DEV_PDC202XX_NEW is not set
550# CONFIG_BLK_DEV_SVWKS is not set
551# CONFIG_BLK_DEV_SIIMAGE is not set
552# CONFIG_BLK_DEV_SL82C105 is not set
553# CONFIG_BLK_DEV_SLC90E66 is not set
554# CONFIG_BLK_DEV_TRM290 is not set
555CONFIG_BLK_DEV_VIA82CXXX=y
556# CONFIG_BLK_DEV_TC86C001 is not set
557CONFIG_BLK_DEV_IDEDMA=y
558# CONFIG_BLK_DEV_HD_ONLY is not set
559# CONFIG_BLK_DEV_HD is not set
560
561#
562# SCSI device support
563#
564# CONFIG_RAID_ATTRS is not set
565# CONFIG_SCSI is not set
566# CONFIG_SCSI_DMA is not set
567# CONFIG_SCSI_NETLINK is not set
568# CONFIG_ATA is not set
569# CONFIG_MD is not set
570# CONFIG_FUSION is not set
571
572#
573# IEEE 1394 (FireWire) support
574#
575# CONFIG_FIREWIRE is not set
576# CONFIG_IEEE1394 is not set
577# CONFIG_I2O is not set
578# CONFIG_MACINTOSH_DRIVERS is not set
579CONFIG_NETDEVICES=y
580# CONFIG_NETDEVICES_MULTIQUEUE is not set
581# CONFIG_DUMMY is not set
582# CONFIG_BONDING is not set
583# CONFIG_MACVLAN is not set
584# CONFIG_EQUALIZER is not set
585# CONFIG_TUN is not set
586# CONFIG_VETH is not set
587# CONFIG_ARCNET is not set
588CONFIG_PHYLIB=y
589
590#
591# MII PHY device drivers
592#
593# CONFIG_MARVELL_PHY is not set
594# CONFIG_DAVICOM_PHY is not set
595# CONFIG_QSEMI_PHY is not set
596# CONFIG_LXT_PHY is not set
597# CONFIG_CICADA_PHY is not set
598# CONFIG_VITESSE_PHY is not set
599# CONFIG_SMSC_PHY is not set
600# CONFIG_BROADCOM_PHY is not set
601# CONFIG_ICPLUS_PHY is not set
602# CONFIG_REALTEK_PHY is not set
603# CONFIG_FIXED_PHY is not set
604# CONFIG_MDIO_BITBANG is not set
605CONFIG_NET_ETHERNET=y
606CONFIG_MII=y
607# CONFIG_HAPPYMEAL is not set
608# CONFIG_SUNGEM is not set
609# CONFIG_CASSINI is not set
610# CONFIG_NET_VENDOR_3COM is not set
611# CONFIG_NET_TULIP is not set
612# CONFIG_HP100 is not set
613# CONFIG_IBM_NEW_EMAC_ZMII is not set
614# CONFIG_IBM_NEW_EMAC_RGMII is not set
615# CONFIG_IBM_NEW_EMAC_TAH is not set
616# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
617# CONFIG_NET_PCI is not set
618# CONFIG_B44 is not set
619CONFIG_NETDEV_1000=y
620# CONFIG_ACENIC is not set
621# CONFIG_DL2K is not set
622CONFIG_E1000=y
623CONFIG_E1000_NAPI=y
624# CONFIG_E1000_DISABLE_PACKET_SPLIT is not set
625# CONFIG_E1000E is not set
626# CONFIG_E1000E_ENABLED is not set
627# CONFIG_IP1000 is not set
628# CONFIG_IGB is not set
629# CONFIG_NS83820 is not set
630# CONFIG_HAMACHI is not set
631# CONFIG_YELLOWFIN is not set
632# CONFIG_R8169 is not set
633# CONFIG_SIS190 is not set
634# CONFIG_SKGE is not set
635# CONFIG_SKY2 is not set
636# CONFIG_VIA_VELOCITY is not set
637# CONFIG_TIGON3 is not set
638# CONFIG_BNX2 is not set
639CONFIG_GIANFAR=y
640CONFIG_GFAR_NAPI=y
641# CONFIG_QLA3XXX is not set
642# CONFIG_ATL1 is not set
643CONFIG_NETDEV_10000=y
644# CONFIG_CHELSIO_T1 is not set
645# CONFIG_CHELSIO_T3 is not set
646# CONFIG_IXGBE is not set
647# CONFIG_IXGB is not set
648# CONFIG_S2IO is not set
649# CONFIG_MYRI10GE is not set
650# CONFIG_NETXEN_NIC is not set
651# CONFIG_NIU is not set
652# CONFIG_MLX4_CORE is not set
653# CONFIG_TEHUTI is not set
654# CONFIG_BNX2X is not set
655# CONFIG_SFC is not set
656# CONFIG_TR is not set
657
658#
659# Wireless LAN
660#
661# CONFIG_WLAN_PRE80211 is not set
662# CONFIG_WLAN_80211 is not set
663# CONFIG_IWLWIFI_LEDS is not set
664# CONFIG_WAN is not set
665# CONFIG_FDDI is not set
666# CONFIG_HIPPI is not set
667# CONFIG_PPP is not set
668# CONFIG_SLIP is not set
669# CONFIG_NETCONSOLE is not set
670# CONFIG_NETPOLL is not set
671# CONFIG_NET_POLL_CONTROLLER is not set
672# CONFIG_ISDN is not set
673# CONFIG_PHONE is not set
674
675#
676# Input device support
677#
678CONFIG_INPUT=y
679# CONFIG_INPUT_FF_MEMLESS is not set
680# CONFIG_INPUT_POLLDEV is not set
681
682#
683# Userland interfaces
684#
685# CONFIG_INPUT_MOUSEDEV is not set
686# CONFIG_INPUT_JOYDEV is not set
687# CONFIG_INPUT_EVDEV is not set
688# CONFIG_INPUT_EVBUG is not set
689
690#
691# Input Device Drivers
692#
693# CONFIG_INPUT_KEYBOARD is not set
694# CONFIG_INPUT_MOUSE is not set
695# CONFIG_INPUT_JOYSTICK is not set
696# CONFIG_INPUT_TABLET is not set
697# CONFIG_INPUT_TOUCHSCREEN is not set
698# CONFIG_INPUT_MISC is not set
699
700#
701# Hardware I/O ports
702#
703# CONFIG_SERIO is not set
704# CONFIG_GAMEPORT is not set
705
706#
707# Character devices
708#
709# CONFIG_VT is not set
710CONFIG_DEVKMEM=y
711# CONFIG_SERIAL_NONSTANDARD is not set
712# CONFIG_NOZOMI is not set
713
714#
715# Serial drivers
716#
717CONFIG_SERIAL_8250=y
718CONFIG_SERIAL_8250_CONSOLE=y
719CONFIG_SERIAL_8250_PCI=y
720CONFIG_SERIAL_8250_NR_UARTS=4
721CONFIG_SERIAL_8250_RUNTIME_UARTS=4
722# CONFIG_SERIAL_8250_EXTENDED is not set
723CONFIG_SERIAL_8250_SHARE_IRQ=y
724
725#
726# Non-8250 serial port support
727#
728# CONFIG_SERIAL_UARTLITE is not set
729CONFIG_SERIAL_CORE=y
730CONFIG_SERIAL_CORE_CONSOLE=y
731# CONFIG_SERIAL_JSM is not set
732# CONFIG_SERIAL_OF_PLATFORM is not set
733CONFIG_UNIX98_PTYS=y
734CONFIG_LEGACY_PTYS=y
735CONFIG_LEGACY_PTY_COUNT=256
736# CONFIG_IPMI_HANDLER is not set
737# CONFIG_HW_RANDOM is not set
738# CONFIG_NVRAM is not set
739# CONFIG_R3964 is not set
740# CONFIG_APPLICOM is not set
741# CONFIG_RAW_DRIVER is not set
742# CONFIG_TCG_TPM is not set
743CONFIG_DEVPORT=y
744CONFIG_I2C=y
745CONFIG_I2C_BOARDINFO=y
746CONFIG_I2C_CHARDEV=y
747
748#
749# I2C Hardware Bus support
750#
751# CONFIG_I2C_ALI1535 is not set
752# CONFIG_I2C_ALI1563 is not set
753# CONFIG_I2C_ALI15X3 is not set
754# CONFIG_I2C_AMD756 is not set
755# CONFIG_I2C_AMD8111 is not set
756# CONFIG_I2C_I801 is not set
757# CONFIG_I2C_I810 is not set
758# CONFIG_I2C_PIIX4 is not set
759CONFIG_I2C_MPC=y
760# CONFIG_I2C_NFORCE2 is not set
761# CONFIG_I2C_OCORES is not set
762# CONFIG_I2C_PARPORT_LIGHT is not set
763# CONFIG_I2C_PROSAVAGE is not set
764# CONFIG_I2C_SAVAGE4 is not set
765# CONFIG_I2C_SIMTEC is not set
766# CONFIG_I2C_SIS5595 is not set
767# CONFIG_I2C_SIS630 is not set
768# CONFIG_I2C_SIS96X is not set
769# CONFIG_I2C_TAOS_EVM is not set
770# CONFIG_I2C_STUB is not set
771# CONFIG_I2C_VIA is not set
772# CONFIG_I2C_VIAPRO is not set
773# CONFIG_I2C_VOODOO3 is not set
774# CONFIG_I2C_PCA_PLATFORM is not set
775
776#
777# Miscellaneous I2C Chip support
778#
779# CONFIG_DS1682 is not set
780# CONFIG_SENSORS_EEPROM is not set
781# CONFIG_SENSORS_PCF8574 is not set
782# CONFIG_PCF8575 is not set
783# CONFIG_SENSORS_PCF8591 is not set
784# CONFIG_SENSORS_MAX6875 is not set
785# CONFIG_SENSORS_TSL2550 is not set
786# CONFIG_I2C_DEBUG_CORE is not set
787# CONFIG_I2C_DEBUG_ALGO is not set
788# CONFIG_I2C_DEBUG_BUS is not set
789# CONFIG_I2C_DEBUG_CHIP is not set
790# CONFIG_SPI is not set
791# CONFIG_W1 is not set
792# CONFIG_POWER_SUPPLY is not set
793CONFIG_HWMON=y
794# CONFIG_HWMON_VID is not set
795# CONFIG_SENSORS_AD7418 is not set
796# CONFIG_SENSORS_ADM1021 is not set
797# CONFIG_SENSORS_ADM1025 is not set
798# CONFIG_SENSORS_ADM1026 is not set
799# CONFIG_SENSORS_ADM1029 is not set
800# CONFIG_SENSORS_ADM1031 is not set
801# CONFIG_SENSORS_ADM9240 is not set
802# CONFIG_SENSORS_ADT7470 is not set
803# CONFIG_SENSORS_ADT7473 is not set
804# CONFIG_SENSORS_ATXP1 is not set
805# CONFIG_SENSORS_DS1621 is not set
806# CONFIG_SENSORS_I5K_AMB is not set
807# CONFIG_SENSORS_F71805F is not set
808# CONFIG_SENSORS_F71882FG is not set
809# CONFIG_SENSORS_F75375S is not set
810# CONFIG_SENSORS_GL518SM is not set
811# CONFIG_SENSORS_GL520SM is not set
812# CONFIG_SENSORS_IT87 is not set
813# CONFIG_SENSORS_LM63 is not set
814CONFIG_SENSORS_LM75=y
815# CONFIG_SENSORS_LM77 is not set
816# CONFIG_SENSORS_LM78 is not set
817# CONFIG_SENSORS_LM80 is not set
818# CONFIG_SENSORS_LM83 is not set
819# CONFIG_SENSORS_LM85 is not set
820# CONFIG_SENSORS_LM87 is not set
821# CONFIG_SENSORS_LM90 is not set
822# CONFIG_SENSORS_LM92 is not set
823# CONFIG_SENSORS_LM93 is not set
824# CONFIG_SENSORS_MAX1619 is not set
825# CONFIG_SENSORS_MAX6650 is not set
826# CONFIG_SENSORS_PC87360 is not set
827# CONFIG_SENSORS_PC87427 is not set
828# CONFIG_SENSORS_SIS5595 is not set
829# CONFIG_SENSORS_DME1737 is not set
830# CONFIG_SENSORS_SMSC47M1 is not set
831# CONFIG_SENSORS_SMSC47M192 is not set
832# CONFIG_SENSORS_SMSC47B397 is not set
833# CONFIG_SENSORS_ADS7828 is not set
834# CONFIG_SENSORS_THMC50 is not set
835# CONFIG_SENSORS_VIA686A is not set
836# CONFIG_SENSORS_VT1211 is not set
837# CONFIG_SENSORS_VT8231 is not set
838# CONFIG_SENSORS_W83781D is not set
839# CONFIG_SENSORS_W83791D is not set
840# CONFIG_SENSORS_W83792D is not set
841# CONFIG_SENSORS_W83793 is not set
842# CONFIG_SENSORS_W83L785TS is not set
843# CONFIG_SENSORS_W83L786NG is not set
844# CONFIG_SENSORS_W83627HF is not set
845# CONFIG_SENSORS_W83627EHF is not set
846# CONFIG_HWMON_DEBUG_CHIP is not set
847# CONFIG_THERMAL is not set
848# CONFIG_WATCHDOG is not set
849
850#
851# Sonics Silicon Backplane
852#
853CONFIG_SSB_POSSIBLE=y
854# CONFIG_SSB is not set
855
856#
857# Multifunction device drivers
858#
859# CONFIG_MFD_SM501 is not set
860# CONFIG_HTC_PASIC3 is not set
861
862#
863# Multimedia devices
864#
865
866#
867# Multimedia core support
868#
869# CONFIG_VIDEO_DEV is not set
870# CONFIG_DVB_CORE is not set
871# CONFIG_VIDEO_MEDIA is not set
872
873#
874# Multimedia drivers
875#
876CONFIG_DAB=y
877
878#
879# Graphics support
880#
881# CONFIG_AGP is not set
882# CONFIG_DRM is not set
883# CONFIG_VGASTATE is not set
884CONFIG_VIDEO_OUTPUT_CONTROL=y
885# CONFIG_FB is not set
886# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
887
888#
889# Display device support
890#
891# CONFIG_DISPLAY_SUPPORT is not set
892
893#
894# Sound
895#
896# CONFIG_SOUND is not set
897CONFIG_HID_SUPPORT=y
898CONFIG_HID=y
899# CONFIG_HID_DEBUG is not set
900# CONFIG_HIDRAW is not set
901CONFIG_USB_SUPPORT=y
902CONFIG_USB_ARCH_HAS_HCD=y
903CONFIG_USB_ARCH_HAS_OHCI=y
904CONFIG_USB_ARCH_HAS_EHCI=y
905# CONFIG_USB is not set
906# CONFIG_USB_OTG_WHITELIST is not set
907# CONFIG_USB_OTG_BLACKLIST_HUB is not set
908
909#
910# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
911#
912# CONFIG_USB_GADGET is not set
913# CONFIG_MMC is not set
914# CONFIG_MEMSTICK is not set
915# CONFIG_NEW_LEDS is not set
916# CONFIG_ACCESSIBILITY is not set
917# CONFIG_INFINIBAND is not set
918# CONFIG_EDAC is not set
919CONFIG_RTC_LIB=y
920CONFIG_RTC_CLASS=y
921CONFIG_RTC_HCTOSYS=y
922CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
923# CONFIG_RTC_DEBUG is not set
924
925#
926# RTC interfaces
927#
928CONFIG_RTC_INTF_SYSFS=y
929CONFIG_RTC_INTF_PROC=y
930CONFIG_RTC_INTF_DEV=y
931# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
932# CONFIG_RTC_DRV_TEST is not set
933
934#
935# I2C RTC drivers
936#
937CONFIG_RTC_DRV_DS1307=y
938# CONFIG_RTC_DRV_DS1374 is not set
939# CONFIG_RTC_DRV_DS1672 is not set
940# CONFIG_RTC_DRV_MAX6900 is not set
941# CONFIG_RTC_DRV_RS5C372 is not set
942# CONFIG_RTC_DRV_ISL1208 is not set
943# CONFIG_RTC_DRV_X1205 is not set
944# CONFIG_RTC_DRV_PCF8563 is not set
945# CONFIG_RTC_DRV_PCF8583 is not set
946# CONFIG_RTC_DRV_M41T80 is not set
947# CONFIG_RTC_DRV_S35390A is not set
948
949#
950# SPI RTC drivers
951#
952
953#
954# Platform RTC drivers
955#
956# CONFIG_RTC_DRV_CMOS is not set
957# CONFIG_RTC_DRV_DS1511 is not set
958# CONFIG_RTC_DRV_DS1553 is not set
959# CONFIG_RTC_DRV_DS1742 is not set
960# CONFIG_RTC_DRV_STK17TA8 is not set
961# CONFIG_RTC_DRV_M48T86 is not set
962# CONFIG_RTC_DRV_M48T59 is not set
963# CONFIG_RTC_DRV_V3020 is not set
964
965#
966# on-CPU RTC drivers
967#
968# CONFIG_RTC_DRV_PPC is not set
969# CONFIG_DMADEVICES is not set
970# CONFIG_UIO is not set
971
972#
973# File systems
974#
975CONFIG_EXT2_FS=y
976# CONFIG_EXT2_FS_XATTR is not set
977# CONFIG_EXT2_FS_XIP is not set
978CONFIG_EXT3_FS=y
979CONFIG_EXT3_FS_XATTR=y
980# CONFIG_EXT3_FS_POSIX_ACL is not set
981# CONFIG_EXT3_FS_SECURITY is not set
982# CONFIG_EXT4DEV_FS is not set
983CONFIG_JBD=y
984CONFIG_FS_MBCACHE=y
985# CONFIG_REISERFS_FS is not set
986# CONFIG_JFS_FS is not set
987# CONFIG_FS_POSIX_ACL is not set
988# CONFIG_XFS_FS is not set
989# CONFIG_OCFS2_FS is not set
990CONFIG_DNOTIFY=y
991CONFIG_INOTIFY=y
992CONFIG_INOTIFY_USER=y
993# CONFIG_QUOTA is not set
994# CONFIG_AUTOFS_FS is not set
995# CONFIG_AUTOFS4_FS is not set
996# CONFIG_FUSE_FS is not set
997
998#
999# CD-ROM/DVD Filesystems
1000#
1001# CONFIG_ISO9660_FS is not set
1002# CONFIG_UDF_FS is not set
1003
1004#
1005# DOS/FAT/NT Filesystems
1006#
1007# CONFIG_MSDOS_FS is not set
1008# CONFIG_VFAT_FS is not set
1009# CONFIG_NTFS_FS is not set
1010
1011#
1012# Pseudo filesystems
1013#
1014CONFIG_PROC_FS=y
1015CONFIG_PROC_KCORE=y
1016CONFIG_PROC_SYSCTL=y
1017CONFIG_SYSFS=y
1018CONFIG_TMPFS=y
1019# CONFIG_TMPFS_POSIX_ACL is not set
1020# CONFIG_HUGETLB_PAGE is not set
1021# CONFIG_CONFIGFS_FS is not set
1022
1023#
1024# Miscellaneous filesystems
1025#
1026# CONFIG_ADFS_FS is not set
1027# CONFIG_AFFS_FS is not set
1028# CONFIG_HFS_FS is not set
1029# CONFIG_HFSPLUS_FS is not set
1030# CONFIG_BEFS_FS is not set
1031# CONFIG_BFS_FS is not set
1032# CONFIG_EFS_FS is not set
1033# CONFIG_JFFS2_FS is not set
1034# CONFIG_CRAMFS is not set
1035# CONFIG_VXFS_FS is not set
1036# CONFIG_MINIX_FS is not set
1037# CONFIG_HPFS_FS is not set
1038# CONFIG_QNX4FS_FS is not set
1039# CONFIG_ROMFS_FS is not set
1040# CONFIG_SYSV_FS is not set
1041# CONFIG_UFS_FS is not set
1042CONFIG_NETWORK_FILESYSTEMS=y
1043CONFIG_NFS_FS=y
1044# CONFIG_NFS_V3 is not set
1045# CONFIG_NFS_V4 is not set
1046# CONFIG_NFSD is not set
1047CONFIG_ROOT_NFS=y
1048CONFIG_LOCKD=y
1049CONFIG_NFS_COMMON=y
1050CONFIG_SUNRPC=y
1051# CONFIG_SUNRPC_BIND34 is not set
1052# CONFIG_RPCSEC_GSS_KRB5 is not set
1053# CONFIG_RPCSEC_GSS_SPKM3 is not set
1054# CONFIG_SMB_FS is not set
1055# CONFIG_CIFS is not set
1056# CONFIG_NCP_FS is not set
1057# CONFIG_CODA_FS is not set
1058# CONFIG_AFS_FS is not set
1059
1060#
1061# Partition Types
1062#
1063CONFIG_PARTITION_ADVANCED=y
1064# CONFIG_ACORN_PARTITION is not set
1065# CONFIG_OSF_PARTITION is not set
1066# CONFIG_AMIGA_PARTITION is not set
1067# CONFIG_ATARI_PARTITION is not set
1068# CONFIG_MAC_PARTITION is not set
1069# CONFIG_MSDOS_PARTITION is not set
1070# CONFIG_LDM_PARTITION is not set
1071# CONFIG_SGI_PARTITION is not set
1072# CONFIG_ULTRIX_PARTITION is not set
1073# CONFIG_SUN_PARTITION is not set
1074# CONFIG_KARMA_PARTITION is not set
1075# CONFIG_EFI_PARTITION is not set
1076# CONFIG_SYSV68_PARTITION is not set
1077# CONFIG_NLS is not set
1078# CONFIG_DLM is not set
1079
1080#
1081# Library routines
1082#
1083CONFIG_BITREVERSE=y
1084# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1085# CONFIG_CRC_CCITT is not set
1086# CONFIG_CRC16 is not set
1087# CONFIG_CRC_ITU_T is not set
1088CONFIG_CRC32=y
1089# CONFIG_CRC7 is not set
1090# CONFIG_LIBCRC32C is not set
1091CONFIG_PLIST=y
1092CONFIG_HAS_IOMEM=y
1093CONFIG_HAS_IOPORT=y
1094CONFIG_HAS_DMA=y
1095CONFIG_HAVE_LMB=y
1096
1097#
1098# Kernel hacking
1099#
1100# CONFIG_PRINTK_TIME is not set
1101CONFIG_ENABLE_WARN_DEPRECATED=y
1102CONFIG_ENABLE_MUST_CHECK=y
1103CONFIG_FRAME_WARN=1024
1104# CONFIG_MAGIC_SYSRQ is not set
1105# CONFIG_UNUSED_SYMBOLS is not set
1106# CONFIG_DEBUG_FS is not set
1107# CONFIG_HEADERS_CHECK is not set
1108CONFIG_DEBUG_KERNEL=y
1109# CONFIG_DEBUG_SHIRQ is not set
1110CONFIG_DETECT_SOFTLOCKUP=y
1111CONFIG_SCHED_DEBUG=y
1112# CONFIG_SCHEDSTATS is not set
1113# CONFIG_TIMER_STATS is not set
1114# CONFIG_DEBUG_OBJECTS is not set
1115# CONFIG_SLUB_DEBUG_ON is not set
1116# CONFIG_SLUB_STATS is not set
1117# CONFIG_DEBUG_RT_MUTEXES is not set
1118# CONFIG_RT_MUTEX_TESTER is not set
1119# CONFIG_DEBUG_SPINLOCK is not set
1120CONFIG_DEBUG_MUTEXES=y
1121# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1122# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1123# CONFIG_DEBUG_KOBJECT is not set
1124# CONFIG_DEBUG_BUGVERBOSE is not set
1125# CONFIG_DEBUG_INFO is not set
1126# CONFIG_DEBUG_VM is not set
1127# CONFIG_DEBUG_WRITECOUNT is not set
1128# CONFIG_DEBUG_LIST is not set
1129# CONFIG_DEBUG_SG is not set
1130# CONFIG_BOOT_PRINTK_DELAY is not set
1131# CONFIG_RCU_TORTURE_TEST is not set
1132# CONFIG_BACKTRACE_SELF_TEST is not set
1133# CONFIG_FAULT_INJECTION is not set
1134# CONFIG_SAMPLES is not set
1135# CONFIG_DEBUG_STACKOVERFLOW is not set
1136# CONFIG_DEBUG_STACK_USAGE is not set
1137# CONFIG_DEBUG_PAGEALLOC is not set
1138# CONFIG_DEBUGGER is not set
1139# CONFIG_IRQSTACKS is not set
1140# CONFIG_BDI_SWITCH is not set
1141# CONFIG_PPC_EARLY_DEBUG is not set
1142
1143#
1144# Security options
1145#
1146# CONFIG_KEYS is not set
1147# CONFIG_SECURITY is not set
1148# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1149CONFIG_CRYPTO=y
1150
1151#
1152# Crypto core or helper
1153#
1154# CONFIG_CRYPTO_MANAGER is not set
1155# CONFIG_CRYPTO_GF128MUL is not set
1156# CONFIG_CRYPTO_NULL is not set
1157# CONFIG_CRYPTO_CRYPTD is not set
1158# CONFIG_CRYPTO_AUTHENC is not set
1159# CONFIG_CRYPTO_TEST is not set
1160
1161#
1162# Authenticated Encryption with Associated Data
1163#
1164# CONFIG_CRYPTO_CCM is not set
1165# CONFIG_CRYPTO_GCM is not set
1166# CONFIG_CRYPTO_SEQIV is not set
1167
1168#
1169# Block modes
1170#
1171# CONFIG_CRYPTO_CBC is not set
1172# CONFIG_CRYPTO_CTR is not set
1173# CONFIG_CRYPTO_CTS is not set
1174# CONFIG_CRYPTO_ECB is not set
1175# CONFIG_CRYPTO_LRW is not set
1176# CONFIG_CRYPTO_PCBC is not set
1177# CONFIG_CRYPTO_XTS is not set
1178
1179#
1180# Hash modes
1181#
1182# CONFIG_CRYPTO_HMAC is not set
1183# CONFIG_CRYPTO_XCBC is not set
1184
1185#
1186# Digest
1187#
1188# CONFIG_CRYPTO_CRC32C is not set
1189# CONFIG_CRYPTO_MD4 is not set
1190# CONFIG_CRYPTO_MD5 is not set
1191# CONFIG_CRYPTO_MICHAEL_MIC is not set
1192# CONFIG_CRYPTO_SHA1 is not set
1193# CONFIG_CRYPTO_SHA256 is not set
1194# CONFIG_CRYPTO_SHA512 is not set
1195# CONFIG_CRYPTO_TGR192 is not set
1196# CONFIG_CRYPTO_WP512 is not set
1197
1198#
1199# Ciphers
1200#
1201# CONFIG_CRYPTO_AES is not set
1202# CONFIG_CRYPTO_ANUBIS is not set
1203# CONFIG_CRYPTO_ARC4 is not set
1204# CONFIG_CRYPTO_BLOWFISH is not set
1205# CONFIG_CRYPTO_CAMELLIA is not set
1206# CONFIG_CRYPTO_CAST5 is not set
1207# CONFIG_CRYPTO_CAST6 is not set
1208# CONFIG_CRYPTO_DES is not set
1209# CONFIG_CRYPTO_FCRYPT is not set
1210# CONFIG_CRYPTO_KHAZAD is not set
1211# CONFIG_CRYPTO_SALSA20 is not set
1212# CONFIG_CRYPTO_SEED is not set
1213# CONFIG_CRYPTO_SERPENT is not set
1214# CONFIG_CRYPTO_TEA is not set
1215# CONFIG_CRYPTO_TWOFISH is not set
1216
1217#
1218# Compression
1219#
1220# CONFIG_CRYPTO_DEFLATE is not set
1221# CONFIG_CRYPTO_LZO is not set
1222CONFIG_CRYPTO_HW=y
1223# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1224# CONFIG_PPC_CLOCK is not set
1225# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/asp8347_defconfig b/arch/powerpc/configs/asp8347_defconfig
new file mode 100644
index 000000000000..60bb4d106c87
--- /dev/null
+++ b/arch/powerpc/configs/asp8347_defconfig
@@ -0,0 +1,1214 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25-rc6
4# Tue May 6 02:21:00 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18CONFIG_FSL_EMB_PERFMON=y
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22# CONFIG_SMP is not set
23CONFIG_PPC32=y
24CONFIG_WORD_SIZE=32
25CONFIG_PPC_MERGE=y
26CONFIG_MMU=y
27CONFIG_GENERIC_CMOS_UPDATE=y
28CONFIG_GENERIC_TIME=y
29CONFIG_GENERIC_TIME_VSYSCALL=y
30CONFIG_GENERIC_CLOCKEVENTS=y
31CONFIG_GENERIC_HARDIRQS=y
32# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
33CONFIG_IRQ_PER_CPU=y
34CONFIG_RWSEM_XCHGADD_ALGORITHM=y
35CONFIG_ARCH_HAS_ILOG2_U32=y
36CONFIG_GENERIC_HWEIGHT=y
37CONFIG_GENERIC_CALIBRATE_DELAY=y
38CONFIG_GENERIC_FIND_NEXT_BIT=y
39# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
40CONFIG_PPC=y
41CONFIG_EARLY_PRINTK=y
42CONFIG_GENERIC_NVRAM=y
43CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
44CONFIG_ARCH_MAY_HAVE_PC_FDC=y
45CONFIG_PPC_OF=y
46CONFIG_OF=y
47CONFIG_PPC_UDBG_16550=y
48# CONFIG_GENERIC_TBSYNC is not set
49CONFIG_AUDIT_ARCH=y
50CONFIG_GENERIC_BUG=y
51# CONFIG_DEFAULT_UIMAGE is not set
52CONFIG_REDBOOT=y
53# CONFIG_PPC_DCR_NATIVE is not set
54# CONFIG_PPC_DCR_MMIO is not set
55CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
56
57#
58# General setup
59#
60CONFIG_EXPERIMENTAL=y
61CONFIG_BROKEN_ON_SMP=y
62CONFIG_INIT_ENV_ARG_LIMIT=32
63CONFIG_LOCALVERSION=""
64CONFIG_LOCALVERSION_AUTO=y
65CONFIG_SWAP=y
66CONFIG_SYSVIPC=y
67CONFIG_SYSVIPC_SYSCTL=y
68# CONFIG_POSIX_MQUEUE is not set
69# CONFIG_BSD_PROCESS_ACCT is not set
70# CONFIG_TASKSTATS is not set
71# CONFIG_AUDIT is not set
72# CONFIG_IKCONFIG is not set
73CONFIG_LOG_BUF_SHIFT=14
74# CONFIG_CGROUPS is not set
75CONFIG_GROUP_SCHED=y
76# CONFIG_FAIR_GROUP_SCHED is not set
77# CONFIG_RT_GROUP_SCHED is not set
78CONFIG_USER_SCHED=y
79# CONFIG_CGROUP_SCHED is not set
80CONFIG_SYSFS_DEPRECATED=y
81CONFIG_SYSFS_DEPRECATED_V2=y
82# CONFIG_RELAY is not set
83# CONFIG_NAMESPACES is not set
84CONFIG_BLK_DEV_INITRD=y
85CONFIG_INITRAMFS_SOURCE=""
86# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
87CONFIG_SYSCTL=y
88CONFIG_EMBEDDED=y
89CONFIG_SYSCTL_SYSCALL=y
90# CONFIG_KALLSYMS is not set
91CONFIG_HOTPLUG=y
92CONFIG_PRINTK=y
93CONFIG_BUG=y
94CONFIG_ELF_CORE=y
95CONFIG_COMPAT_BRK=y
96CONFIG_BASE_FULL=y
97CONFIG_FUTEX=y
98CONFIG_ANON_INODES=y
99# CONFIG_EPOLL is not set
100CONFIG_SIGNALFD=y
101CONFIG_TIMERFD=y
102CONFIG_EVENTFD=y
103CONFIG_SHMEM=y
104CONFIG_VM_EVENT_COUNTERS=y
105CONFIG_SLUB_DEBUG=y
106# CONFIG_SLAB is not set
107CONFIG_SLUB=y
108# CONFIG_SLOB is not set
109# CONFIG_PROFILING is not set
110# CONFIG_MARKERS is not set
111CONFIG_HAVE_OPROFILE=y
112CONFIG_HAVE_KPROBES=y
113CONFIG_HAVE_KRETPROBES=y
114CONFIG_PROC_PAGE_MONITOR=y
115CONFIG_SLABINFO=y
116CONFIG_RT_MUTEXES=y
117# CONFIG_TINY_SHMEM is not set
118CONFIG_BASE_SMALL=0
119CONFIG_MODULES=y
120CONFIG_MODULE_UNLOAD=y
121# CONFIG_MODULE_FORCE_UNLOAD is not set
122# CONFIG_MODVERSIONS is not set
123# CONFIG_MODULE_SRCVERSION_ALL is not set
124# CONFIG_KMOD is not set
125CONFIG_BLOCK=y
126# CONFIG_LBD is not set
127# CONFIG_BLK_DEV_IO_TRACE is not set
128# CONFIG_LSF is not set
129# CONFIG_BLK_DEV_BSG is not set
130
131#
132# IO Schedulers
133#
134CONFIG_IOSCHED_NOOP=y
135CONFIG_IOSCHED_AS=y
136CONFIG_IOSCHED_DEADLINE=y
137CONFIG_IOSCHED_CFQ=y
138CONFIG_DEFAULT_AS=y
139# CONFIG_DEFAULT_DEADLINE is not set
140# CONFIG_DEFAULT_CFQ is not set
141# CONFIG_DEFAULT_NOOP is not set
142CONFIG_DEFAULT_IOSCHED="anticipatory"
143CONFIG_CLASSIC_RCU=y
144
145#
146# Platform support
147#
148# CONFIG_PPC_MULTIPLATFORM is not set
149# CONFIG_PPC_82xx is not set
150CONFIG_PPC_83xx=y
151# CONFIG_PPC_86xx is not set
152# CONFIG_PPC_MPC512x is not set
153# CONFIG_PPC_MPC5121 is not set
154# CONFIG_PPC_CELL is not set
155# CONFIG_PPC_CELL_NATIVE is not set
156# CONFIG_PQ2ADS is not set
157CONFIG_MPC83xx=y
158# CONFIG_MPC831x_RDB is not set
159# CONFIG_MPC832x_MDS is not set
160# CONFIG_MPC832x_RDB is not set
161# CONFIG_MPC834x_MDS is not set
162# CONFIG_MPC834x_ITX is not set
163# CONFIG_MPC836x_MDS is not set
164# CONFIG_MPC837x_MDS is not set
165# CONFIG_MPC837x_RDB is not set
166# CONFIG_SBC834x is not set
167CONFIG_ASP834x=y
168CONFIG_PPC_MPC834x=y
169CONFIG_IPIC=y
170# CONFIG_MPIC is not set
171# CONFIG_MPIC_WEIRD is not set
172# CONFIG_PPC_I8259 is not set
173# CONFIG_PPC_RTAS is not set
174# CONFIG_MMIO_NVRAM is not set
175# CONFIG_PPC_MPC106 is not set
176# CONFIG_PPC_970_NAP is not set
177# CONFIG_PPC_INDIRECT_IO is not set
178# CONFIG_GENERIC_IOMAP is not set
179# CONFIG_CPU_FREQ is not set
180# CONFIG_FSL_ULI1575 is not set
181
182#
183# Kernel options
184#
185# CONFIG_HIGHMEM is not set
186CONFIG_TICK_ONESHOT=y
187CONFIG_NO_HZ=y
188CONFIG_HIGH_RES_TIMERS=y
189CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
190# CONFIG_HZ_100 is not set
191CONFIG_HZ_250=y
192# CONFIG_HZ_300 is not set
193# CONFIG_HZ_1000 is not set
194CONFIG_HZ=250
195# CONFIG_SCHED_HRTICK is not set
196CONFIG_PREEMPT_NONE=y
197# CONFIG_PREEMPT_VOLUNTARY is not set
198# CONFIG_PREEMPT is not set
199CONFIG_BINFMT_ELF=y
200# CONFIG_BINFMT_MISC is not set
201# CONFIG_IOMMU_HELPER is not set
202CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
203CONFIG_ARCH_HAS_WALK_MEMORY=y
204CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
205CONFIG_ARCH_FLATMEM_ENABLE=y
206CONFIG_ARCH_POPULATES_NODE_MAP=y
207CONFIG_SELECT_MEMORY_MODEL=y
208CONFIG_FLATMEM_MANUAL=y
209# CONFIG_DISCONTIGMEM_MANUAL is not set
210# CONFIG_SPARSEMEM_MANUAL is not set
211CONFIG_FLATMEM=y
212CONFIG_FLAT_NODE_MEM_MAP=y
213# CONFIG_SPARSEMEM_STATIC is not set
214# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
215CONFIG_SPLIT_PTLOCK_CPUS=4
216# CONFIG_RESOURCES_64BIT is not set
217CONFIG_ZONE_DMA_FLAG=1
218CONFIG_BOUNCE=y
219CONFIG_VIRT_TO_BUS=y
220CONFIG_PROC_DEVICETREE=y
221# CONFIG_CMDLINE_BOOL is not set
222# CONFIG_PM is not set
223CONFIG_SECCOMP=y
224CONFIG_ISA_DMA_API=y
225
226#
227# Bus options
228#
229CONFIG_ZONE_DMA=y
230CONFIG_GENERIC_ISA_DMA=y
231CONFIG_PPC_INDIRECT_PCI=y
232CONFIG_FSL_SOC=y
233CONFIG_PCI=y
234CONFIG_PCI_DOMAINS=y
235CONFIG_PCI_SYSCALL=y
236# CONFIG_PCIEPORTBUS is not set
237CONFIG_ARCH_SUPPORTS_MSI=y
238# CONFIG_PCI_MSI is not set
239CONFIG_PCI_LEGACY=y
240# CONFIG_PCCARD is not set
241# CONFIG_HOTPLUG_PCI is not set
242
243#
244# Advanced setup
245#
246# CONFIG_ADVANCED_OPTIONS is not set
247
248#
249# Default settings for advanced configuration options are used
250#
251CONFIG_HIGHMEM_START=0xfe000000
252CONFIG_LOWMEM_SIZE=0x30000000
253CONFIG_KERNEL_START=0xc0000000
254CONFIG_TASK_SIZE=0xc0000000
255CONFIG_BOOT_LOAD=0x00800000
256
257#
258# Networking
259#
260CONFIG_NET=y
261
262#
263# Networking options
264#
265CONFIG_PACKET=y
266# CONFIG_PACKET_MMAP is not set
267CONFIG_UNIX=y
268CONFIG_XFRM=y
269CONFIG_XFRM_USER=m
270# CONFIG_XFRM_SUB_POLICY is not set
271# CONFIG_XFRM_MIGRATE is not set
272# CONFIG_XFRM_STATISTICS is not set
273# CONFIG_NET_KEY is not set
274CONFIG_INET=y
275CONFIG_IP_MULTICAST=y
276# CONFIG_IP_ADVANCED_ROUTER is not set
277CONFIG_IP_FIB_HASH=y
278CONFIG_IP_PNP=y
279CONFIG_IP_PNP_DHCP=y
280CONFIG_IP_PNP_BOOTP=y
281# CONFIG_IP_PNP_RARP is not set
282# CONFIG_NET_IPIP is not set
283# CONFIG_NET_IPGRE is not set
284# CONFIG_IP_MROUTE is not set
285# CONFIG_ARPD is not set
286CONFIG_SYN_COOKIES=y
287# CONFIG_INET_AH is not set
288# CONFIG_INET_ESP is not set
289# CONFIG_INET_IPCOMP is not set
290# CONFIG_INET_XFRM_TUNNEL is not set
291# CONFIG_INET_TUNNEL is not set
292CONFIG_INET_XFRM_MODE_TRANSPORT=y
293CONFIG_INET_XFRM_MODE_TUNNEL=y
294CONFIG_INET_XFRM_MODE_BEET=y
295# CONFIG_INET_LRO is not set
296CONFIG_INET_DIAG=y
297CONFIG_INET_TCP_DIAG=y
298# CONFIG_TCP_CONG_ADVANCED is not set
299CONFIG_TCP_CONG_CUBIC=y
300CONFIG_DEFAULT_TCP_CONG="cubic"
301# CONFIG_TCP_MD5SIG is not set
302# CONFIG_IPV6 is not set
303# CONFIG_INET6_XFRM_TUNNEL is not set
304# CONFIG_INET6_TUNNEL is not set
305# CONFIG_NETWORK_SECMARK is not set
306# CONFIG_NETFILTER is not set
307# CONFIG_IP_DCCP is not set
308# CONFIG_IP_SCTP is not set
309# CONFIG_TIPC is not set
310# CONFIG_ATM is not set
311# CONFIG_BRIDGE is not set
312# CONFIG_VLAN_8021Q is not set
313# CONFIG_DECNET is not set
314# CONFIG_LLC2 is not set
315# CONFIG_IPX is not set
316# CONFIG_ATALK is not set
317# CONFIG_X25 is not set
318# CONFIG_LAPB is not set
319# CONFIG_ECONET is not set
320# CONFIG_WAN_ROUTER is not set
321# CONFIG_NET_SCHED is not set
322
323#
324# Network testing
325#
326# CONFIG_NET_PKTGEN is not set
327# CONFIG_HAMRADIO is not set
328# CONFIG_CAN is not set
329# CONFIG_IRDA is not set
330# CONFIG_BT is not set
331# CONFIG_AF_RXRPC is not set
332
333#
334# Wireless
335#
336# CONFIG_CFG80211 is not set
337# CONFIG_WIRELESS_EXT is not set
338# CONFIG_MAC80211 is not set
339# CONFIG_IEEE80211 is not set
340# CONFIG_RFKILL is not set
341# CONFIG_NET_9P is not set
342
343#
344# Device Drivers
345#
346
347#
348# Generic Driver Options
349#
350CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
351CONFIG_STANDALONE=y
352CONFIG_PREVENT_FIRMWARE_BUILD=y
353# CONFIG_FW_LOADER is not set
354# CONFIG_SYS_HYPERVISOR is not set
355# CONFIG_CONNECTOR is not set
356CONFIG_MTD=y
357# CONFIG_MTD_DEBUG is not set
358# CONFIG_MTD_CONCAT is not set
359CONFIG_MTD_PARTITIONS=y
360CONFIG_MTD_REDBOOT_PARTS=y
361CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1
362CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y
363# CONFIG_MTD_REDBOOT_PARTS_READONLY is not set
364# CONFIG_MTD_CMDLINE_PARTS is not set
365CONFIG_MTD_OF_PARTS=y
366
367#
368# User Modules And Translation Layers
369#
370CONFIG_MTD_CHAR=y
371CONFIG_MTD_BLKDEVS=y
372CONFIG_MTD_BLOCK=y
373# CONFIG_FTL is not set
374# CONFIG_NFTL is not set
375# CONFIG_INFTL is not set
376# CONFIG_RFD_FTL is not set
377# CONFIG_SSFDC is not set
378# CONFIG_MTD_OOPS is not set
379
380#
381# RAM/ROM/Flash chip drivers
382#
383CONFIG_MTD_CFI=y
384# CONFIG_MTD_JEDECPROBE is not set
385CONFIG_MTD_GEN_PROBE=y
386# CONFIG_MTD_CFI_ADV_OPTIONS is not set
387CONFIG_MTD_MAP_BANK_WIDTH_1=y
388CONFIG_MTD_MAP_BANK_WIDTH_2=y
389CONFIG_MTD_MAP_BANK_WIDTH_4=y
390# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
391# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
392# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
393CONFIG_MTD_CFI_I1=y
394CONFIG_MTD_CFI_I2=y
395# CONFIG_MTD_CFI_I4 is not set
396# CONFIG_MTD_CFI_I8 is not set
397CONFIG_MTD_CFI_INTELEXT=y
398CONFIG_MTD_CFI_AMDSTD=y
399# CONFIG_MTD_CFI_STAA is not set
400CONFIG_MTD_CFI_UTIL=y
401# CONFIG_MTD_RAM is not set
402# CONFIG_MTD_ROM is not set
403# CONFIG_MTD_ABSENT is not set
404
405#
406# Mapping drivers for chip access
407#
408# CONFIG_MTD_COMPLEX_MAPPINGS is not set
409# CONFIG_MTD_PHYSMAP is not set
410CONFIG_MTD_PHYSMAP_OF=y
411# CONFIG_MTD_INTEL_VR_NOR is not set
412# CONFIG_MTD_PLATRAM is not set
413
414#
415# Self-contained MTD device drivers
416#
417# CONFIG_MTD_PMC551 is not set
418# CONFIG_MTD_SLRAM is not set
419# CONFIG_MTD_PHRAM is not set
420# CONFIG_MTD_MTDRAM is not set
421# CONFIG_MTD_BLOCK2MTD is not set
422
423#
424# Disk-On-Chip Device Drivers
425#
426# CONFIG_MTD_DOC2000 is not set
427# CONFIG_MTD_DOC2001 is not set
428# CONFIG_MTD_DOC2001PLUS is not set
429# CONFIG_MTD_NAND is not set
430# CONFIG_MTD_ONENAND is not set
431
432#
433# UBI - Unsorted block images
434#
435# CONFIG_MTD_UBI is not set
436CONFIG_OF_DEVICE=y
437# CONFIG_PARPORT is not set
438CONFIG_BLK_DEV=y
439# CONFIG_BLK_DEV_FD is not set
440# CONFIG_BLK_CPQ_DA is not set
441# CONFIG_BLK_CPQ_CISS_DA is not set
442# CONFIG_BLK_DEV_DAC960 is not set
443# CONFIG_BLK_DEV_UMEM is not set
444# CONFIG_BLK_DEV_COW_COMMON is not set
445CONFIG_BLK_DEV_LOOP=y
446# CONFIG_BLK_DEV_CRYPTOLOOP is not set
447# CONFIG_BLK_DEV_NBD is not set
448# CONFIG_BLK_DEV_SX8 is not set
449# CONFIG_BLK_DEV_UB is not set
450CONFIG_BLK_DEV_RAM=y
451CONFIG_BLK_DEV_RAM_COUNT=16
452CONFIG_BLK_DEV_RAM_SIZE=32768
453# CONFIG_BLK_DEV_XIP is not set
454# CONFIG_CDROM_PKTCDVD is not set
455# CONFIG_ATA_OVER_ETH is not set
456CONFIG_MISC_DEVICES=y
457# CONFIG_PHANTOM is not set
458# CONFIG_EEPROM_93CX6 is not set
459# CONFIG_SGI_IOC4 is not set
460# CONFIG_TIFM_CORE is not set
461# CONFIG_ENCLOSURE_SERVICES is not set
462CONFIG_HAVE_IDE=y
463# CONFIG_IDE is not set
464
465#
466# SCSI device support
467#
468# CONFIG_RAID_ATTRS is not set
469# CONFIG_SCSI is not set
470# CONFIG_SCSI_DMA is not set
471# CONFIG_SCSI_NETLINK is not set
472# CONFIG_ATA is not set
473# CONFIG_MD is not set
474# CONFIG_FUSION is not set
475
476#
477# IEEE 1394 (FireWire) support
478#
479# CONFIG_FIREWIRE is not set
480# CONFIG_IEEE1394 is not set
481# CONFIG_I2O is not set
482# CONFIG_MACINTOSH_DRIVERS is not set
483CONFIG_NETDEVICES=y
484# CONFIG_NETDEVICES_MULTIQUEUE is not set
485# CONFIG_DUMMY is not set
486# CONFIG_BONDING is not set
487# CONFIG_MACVLAN is not set
488# CONFIG_EQUALIZER is not set
489# CONFIG_TUN is not set
490# CONFIG_VETH is not set
491# CONFIG_ARCNET is not set
492CONFIG_PHYLIB=y
493
494#
495# MII PHY device drivers
496#
497# CONFIG_MARVELL_PHY is not set
498# CONFIG_DAVICOM_PHY is not set
499# CONFIG_QSEMI_PHY is not set
500# CONFIG_LXT_PHY is not set
501# CONFIG_CICADA_PHY is not set
502# CONFIG_VITESSE_PHY is not set
503# CONFIG_SMSC_PHY is not set
504# CONFIG_BROADCOM_PHY is not set
505# CONFIG_ICPLUS_PHY is not set
506# CONFIG_REALTEK_PHY is not set
507# CONFIG_FIXED_PHY is not set
508# CONFIG_MDIO_BITBANG is not set
509CONFIG_NET_ETHERNET=y
510CONFIG_MII=y
511# CONFIG_HAPPYMEAL is not set
512# CONFIG_SUNGEM is not set
513# CONFIG_CASSINI is not set
514# CONFIG_NET_VENDOR_3COM is not set
515# CONFIG_NET_TULIP is not set
516# CONFIG_HP100 is not set
517# CONFIG_IBM_NEW_EMAC_ZMII is not set
518# CONFIG_IBM_NEW_EMAC_RGMII is not set
519# CONFIG_IBM_NEW_EMAC_TAH is not set
520# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
521# CONFIG_NET_PCI is not set
522# CONFIG_B44 is not set
523CONFIG_NETDEV_1000=y
524# CONFIG_ACENIC is not set
525# CONFIG_DL2K is not set
526# CONFIG_E1000 is not set
527# CONFIG_E1000E is not set
528# CONFIG_E1000E_ENABLED is not set
529# CONFIG_IP1000 is not set
530# CONFIG_IGB is not set
531# CONFIG_NS83820 is not set
532# CONFIG_HAMACHI is not set
533# CONFIG_YELLOWFIN is not set
534# CONFIG_R8169 is not set
535# CONFIG_SIS190 is not set
536# CONFIG_SKGE is not set
537# CONFIG_SKY2 is not set
538# CONFIG_SK98LIN is not set
539# CONFIG_VIA_VELOCITY is not set
540# CONFIG_TIGON3 is not set
541# CONFIG_BNX2 is not set
542CONFIG_GIANFAR=y
543# CONFIG_GFAR_NAPI is not set
544# CONFIG_QLA3XXX is not set
545# CONFIG_ATL1 is not set
546# CONFIG_NETDEV_10000 is not set
547# CONFIG_TR is not set
548
549#
550# Wireless LAN
551#
552# CONFIG_WLAN_PRE80211 is not set
553# CONFIG_WLAN_80211 is not set
554
555#
556# USB Network Adapters
557#
558# CONFIG_USB_CATC is not set
559# CONFIG_USB_KAWETH is not set
560# CONFIG_USB_PEGASUS is not set
561# CONFIG_USB_RTL8150 is not set
562# CONFIG_USB_USBNET is not set
563# CONFIG_WAN is not set
564# CONFIG_FDDI is not set
565# CONFIG_HIPPI is not set
566# CONFIG_PPP is not set
567# CONFIG_SLIP is not set
568# CONFIG_NETCONSOLE is not set
569# CONFIG_NETPOLL is not set
570# CONFIG_NET_POLL_CONTROLLER is not set
571# CONFIG_ISDN is not set
572# CONFIG_PHONE is not set
573
574#
575# Input device support
576#
577CONFIG_INPUT=y
578# CONFIG_INPUT_FF_MEMLESS is not set
579# CONFIG_INPUT_POLLDEV is not set
580
581#
582# Userland interfaces
583#
584# CONFIG_INPUT_MOUSEDEV is not set
585# CONFIG_INPUT_JOYDEV is not set
586# CONFIG_INPUT_EVDEV is not set
587# CONFIG_INPUT_EVBUG is not set
588
589#
590# Input Device Drivers
591#
592# CONFIG_INPUT_KEYBOARD is not set
593# CONFIG_INPUT_MOUSE is not set
594# CONFIG_INPUT_JOYSTICK is not set
595# CONFIG_INPUT_TABLET is not set
596# CONFIG_INPUT_TOUCHSCREEN is not set
597# CONFIG_INPUT_MISC is not set
598
599#
600# Hardware I/O ports
601#
602# CONFIG_SERIO is not set
603# CONFIG_GAMEPORT is not set
604
605#
606# Character devices
607#
608# CONFIG_VT is not set
609# CONFIG_SERIAL_NONSTANDARD is not set
610# CONFIG_NOZOMI is not set
611
612#
613# Serial drivers
614#
615CONFIG_SERIAL_8250=y
616CONFIG_SERIAL_8250_CONSOLE=y
617CONFIG_SERIAL_8250_PCI=y
618CONFIG_SERIAL_8250_NR_UARTS=4
619CONFIG_SERIAL_8250_RUNTIME_UARTS=4
620# CONFIG_SERIAL_8250_EXTENDED is not set
621
622#
623# Non-8250 serial port support
624#
625# CONFIG_SERIAL_UARTLITE is not set
626CONFIG_SERIAL_CORE=y
627CONFIG_SERIAL_CORE_CONSOLE=y
628# CONFIG_SERIAL_JSM is not set
629# CONFIG_SERIAL_OF_PLATFORM is not set
630CONFIG_UNIX98_PTYS=y
631CONFIG_LEGACY_PTYS=y
632CONFIG_LEGACY_PTY_COUNT=256
633# CONFIG_IPMI_HANDLER is not set
634# CONFIG_HW_RANDOM is not set
635# CONFIG_NVRAM is not set
636CONFIG_GEN_RTC=y
637# CONFIG_GEN_RTC_X is not set
638# CONFIG_R3964 is not set
639# CONFIG_APPLICOM is not set
640# CONFIG_RAW_DRIVER is not set
641# CONFIG_TCG_TPM is not set
642CONFIG_DEVPORT=y
643CONFIG_I2C=y
644CONFIG_I2C_BOARDINFO=y
645CONFIG_I2C_CHARDEV=y
646
647#
648# I2C Algorithms
649#
650# CONFIG_I2C_ALGOBIT is not set
651# CONFIG_I2C_ALGOPCF is not set
652# CONFIG_I2C_ALGOPCA is not set
653
654#
655# I2C Hardware Bus support
656#
657# CONFIG_I2C_ALI1535 is not set
658# CONFIG_I2C_ALI1563 is not set
659# CONFIG_I2C_ALI15X3 is not set
660# CONFIG_I2C_AMD756 is not set
661# CONFIG_I2C_AMD8111 is not set
662# CONFIG_I2C_I801 is not set
663# CONFIG_I2C_I810 is not set
664# CONFIG_I2C_PIIX4 is not set
665CONFIG_I2C_MPC=y
666# CONFIG_I2C_NFORCE2 is not set
667# CONFIG_I2C_OCORES is not set
668# CONFIG_I2C_PARPORT_LIGHT is not set
669# CONFIG_I2C_PROSAVAGE is not set
670# CONFIG_I2C_SAVAGE4 is not set
671# CONFIG_I2C_SIMTEC is not set
672# CONFIG_I2C_SIS5595 is not set
673# CONFIG_I2C_SIS630 is not set
674# CONFIG_I2C_SIS96X is not set
675# CONFIG_I2C_TAOS_EVM is not set
676# CONFIG_I2C_STUB is not set
677# CONFIG_I2C_TINY_USB is not set
678# CONFIG_I2C_VIA is not set
679# CONFIG_I2C_VIAPRO is not set
680# CONFIG_I2C_VOODOO3 is not set
681
682#
683# Miscellaneous I2C Chip support
684#
685# CONFIG_DS1682 is not set
686# CONFIG_SENSORS_EEPROM is not set
687# CONFIG_SENSORS_PCF8574 is not set
688# CONFIG_PCF8575 is not set
689# CONFIG_SENSORS_PCF8591 is not set
690# CONFIG_TPS65010 is not set
691# CONFIG_SENSORS_MAX6875 is not set
692# CONFIG_SENSORS_TSL2550 is not set
693# CONFIG_I2C_DEBUG_CORE is not set
694# CONFIG_I2C_DEBUG_ALGO is not set
695# CONFIG_I2C_DEBUG_BUS is not set
696# CONFIG_I2C_DEBUG_CHIP is not set
697
698#
699# SPI support
700#
701# CONFIG_SPI is not set
702# CONFIG_SPI_MASTER is not set
703# CONFIG_W1 is not set
704# CONFIG_POWER_SUPPLY is not set
705CONFIG_HWMON=y
706# CONFIG_HWMON_VID is not set
707# CONFIG_SENSORS_AD7418 is not set
708# CONFIG_SENSORS_ADM1021 is not set
709# CONFIG_SENSORS_ADM1025 is not set
710# CONFIG_SENSORS_ADM1026 is not set
711# CONFIG_SENSORS_ADM1029 is not set
712# CONFIG_SENSORS_ADM1031 is not set
713# CONFIG_SENSORS_ADM9240 is not set
714# CONFIG_SENSORS_ADT7470 is not set
715# CONFIG_SENSORS_ADT7473 is not set
716# CONFIG_SENSORS_ATXP1 is not set
717# CONFIG_SENSORS_DS1621 is not set
718# CONFIG_SENSORS_I5K_AMB is not set
719# CONFIG_SENSORS_F71805F is not set
720# CONFIG_SENSORS_F71882FG is not set
721# CONFIG_SENSORS_F75375S is not set
722# CONFIG_SENSORS_GL518SM is not set
723# CONFIG_SENSORS_GL520SM is not set
724# CONFIG_SENSORS_IT87 is not set
725# CONFIG_SENSORS_LM63 is not set
726# CONFIG_SENSORS_LM75 is not set
727# CONFIG_SENSORS_LM77 is not set
728# CONFIG_SENSORS_LM78 is not set
729# CONFIG_SENSORS_LM80 is not set
730# CONFIG_SENSORS_LM83 is not set
731# CONFIG_SENSORS_LM85 is not set
732# CONFIG_SENSORS_LM87 is not set
733# CONFIG_SENSORS_LM90 is not set
734# CONFIG_SENSORS_LM92 is not set
735# CONFIG_SENSORS_LM93 is not set
736# CONFIG_SENSORS_MAX1619 is not set
737# CONFIG_SENSORS_MAX6650 is not set
738# CONFIG_SENSORS_PC87360 is not set
739# CONFIG_SENSORS_PC87427 is not set
740# CONFIG_SENSORS_SIS5595 is not set
741# CONFIG_SENSORS_DME1737 is not set
742# CONFIG_SENSORS_SMSC47M1 is not set
743# CONFIG_SENSORS_SMSC47M192 is not set
744# CONFIG_SENSORS_SMSC47B397 is not set
745# CONFIG_SENSORS_ADS7828 is not set
746# CONFIG_SENSORS_THMC50 is not set
747# CONFIG_SENSORS_VIA686A is not set
748# CONFIG_SENSORS_VT1211 is not set
749# CONFIG_SENSORS_VT8231 is not set
750# CONFIG_SENSORS_W83781D is not set
751# CONFIG_SENSORS_W83791D is not set
752# CONFIG_SENSORS_W83792D is not set
753# CONFIG_SENSORS_W83793 is not set
754# CONFIG_SENSORS_W83L785TS is not set
755# CONFIG_SENSORS_W83L786NG is not set
756# CONFIG_SENSORS_W83627HF is not set
757# CONFIG_SENSORS_W83627EHF is not set
758# CONFIG_HWMON_DEBUG_CHIP is not set
759CONFIG_THERMAL=y
760CONFIG_WATCHDOG=y
761# CONFIG_WATCHDOG_NOWAYOUT is not set
762
763#
764# Watchdog Device Drivers
765#
766# CONFIG_SOFT_WATCHDOG is not set
767CONFIG_83xx_WDT=y
768
769#
770# PCI-based Watchdog Cards
771#
772# CONFIG_PCIPCWATCHDOG is not set
773# CONFIG_WDTPCI is not set
774
775#
776# USB-based Watchdog Cards
777#
778# CONFIG_USBPCWATCHDOG is not set
779
780#
781# Sonics Silicon Backplane
782#
783CONFIG_SSB_POSSIBLE=y
784# CONFIG_SSB is not set
785
786#
787# Multifunction device drivers
788#
789# CONFIG_MFD_SM501 is not set
790
791#
792# Multimedia devices
793#
794# CONFIG_VIDEO_DEV is not set
795# CONFIG_DVB_CORE is not set
796CONFIG_DAB=y
797# CONFIG_USB_DABUSB is not set
798
799#
800# Graphics support
801#
802# CONFIG_AGP is not set
803# CONFIG_DRM is not set
804# CONFIG_VGASTATE is not set
805CONFIG_VIDEO_OUTPUT_CONTROL=m
806# CONFIG_FB is not set
807# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
808
809#
810# Display device support
811#
812# CONFIG_DISPLAY_SUPPORT is not set
813
814#
815# Sound
816#
817# CONFIG_SOUND is not set
818# CONFIG_HID_SUPPORT is not set
819CONFIG_USB_SUPPORT=y
820CONFIG_USB_ARCH_HAS_HCD=y
821CONFIG_USB_ARCH_HAS_OHCI=y
822CONFIG_USB_ARCH_HAS_EHCI=y
823CONFIG_USB=y
824# CONFIG_USB_DEBUG is not set
825# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
826
827#
828# Miscellaneous USB options
829#
830# CONFIG_USB_DEVICEFS is not set
831CONFIG_USB_DEVICE_CLASS=y
832# CONFIG_USB_DYNAMIC_MINORS is not set
833# CONFIG_USB_OTG is not set
834
835#
836# USB Host Controller Drivers
837#
838CONFIG_USB_EHCI_HCD=y
839CONFIG_USB_EHCI_ROOT_HUB_TT=y
840# CONFIG_USB_EHCI_TT_NEWSCHED is not set
841CONFIG_USB_EHCI_FSL=y
842CONFIG_USB_EHCI_HCD_PPC_OF=y
843# CONFIG_USB_ISP116X_HCD is not set
844# CONFIG_USB_OHCI_HCD is not set
845# CONFIG_USB_UHCI_HCD is not set
846# CONFIG_USB_SL811_HCD is not set
847# CONFIG_USB_R8A66597_HCD is not set
848
849#
850# USB Device Class drivers
851#
852# CONFIG_USB_ACM is not set
853# CONFIG_USB_PRINTER is not set
854
855#
856# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
857#
858
859#
860# may also be needed; see USB_STORAGE Help for more information
861#
862# CONFIG_USB_LIBUSUAL is not set
863
864#
865# USB Imaging devices
866#
867# CONFIG_USB_MDC800 is not set
868CONFIG_USB_MON=y
869
870#
871# USB port drivers
872#
873# CONFIG_USB_SERIAL is not set
874
875#
876# USB Miscellaneous drivers
877#
878# CONFIG_USB_EMI62 is not set
879# CONFIG_USB_EMI26 is not set
880# CONFIG_USB_ADUTUX is not set
881# CONFIG_USB_AUERSWALD is not set
882# CONFIG_USB_RIO500 is not set
883# CONFIG_USB_LEGOTOWER is not set
884# CONFIG_USB_LCD is not set
885# CONFIG_USB_BERRY_CHARGE is not set
886# CONFIG_USB_LED is not set
887# CONFIG_USB_CYPRESS_CY7C63 is not set
888# CONFIG_USB_CYTHERM is not set
889# CONFIG_USB_PHIDGET is not set
890# CONFIG_USB_IDMOUSE is not set
891# CONFIG_USB_FTDI_ELAN is not set
892# CONFIG_USB_APPLEDISPLAY is not set
893# CONFIG_USB_SISUSBVGA is not set
894# CONFIG_USB_LD is not set
895# CONFIG_USB_TRANCEVIBRATOR is not set
896# CONFIG_USB_IOWARRIOR is not set
897# CONFIG_USB_GADGET is not set
898# CONFIG_MMC is not set
899# CONFIG_MEMSTICK is not set
900# CONFIG_NEW_LEDS is not set
901# CONFIG_INFINIBAND is not set
902# CONFIG_EDAC is not set
903CONFIG_RTC_LIB=y
904CONFIG_RTC_CLASS=y
905
906#
907# Conflicting RTC option has been selected, check GEN_RTC and RTC
908#
909CONFIG_RTC_HCTOSYS=y
910CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
911# CONFIG_RTC_DEBUG is not set
912
913#
914# RTC interfaces
915#
916CONFIG_RTC_INTF_SYSFS=y
917CONFIG_RTC_INTF_PROC=y
918CONFIG_RTC_INTF_DEV=y
919# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
920# CONFIG_RTC_DRV_TEST is not set
921
922#
923# I2C RTC drivers
924#
925# CONFIG_RTC_DRV_DS1307 is not set
926CONFIG_RTC_DRV_DS1374=y
927# CONFIG_RTC_DRV_DS1672 is not set
928# CONFIG_RTC_DRV_MAX6900 is not set
929# CONFIG_RTC_DRV_RS5C372 is not set
930# CONFIG_RTC_DRV_ISL1208 is not set
931# CONFIG_RTC_DRV_X1205 is not set
932# CONFIG_RTC_DRV_PCF8563 is not set
933# CONFIG_RTC_DRV_PCF8583 is not set
934# CONFIG_RTC_DRV_M41T80 is not set
935# CONFIG_RTC_DRV_S35390A is not set
936
937#
938# SPI RTC drivers
939#
940
941#
942# Platform RTC drivers
943#
944# CONFIG_RTC_DRV_CMOS is not set
945# CONFIG_RTC_DRV_DS1511 is not set
946# CONFIG_RTC_DRV_DS1553 is not set
947# CONFIG_RTC_DRV_DS1742 is not set
948# CONFIG_RTC_DRV_STK17TA8 is not set
949# CONFIG_RTC_DRV_M48T86 is not set
950# CONFIG_RTC_DRV_M48T59 is not set
951# CONFIG_RTC_DRV_V3020 is not set
952
953#
954# on-CPU RTC drivers
955#
956# CONFIG_DMADEVICES is not set
957
958#
959# Userspace I/O
960#
961# CONFIG_UIO is not set
962
963#
964# File systems
965#
966CONFIG_EXT2_FS=y
967# CONFIG_EXT2_FS_XATTR is not set
968# CONFIG_EXT2_FS_XIP is not set
969CONFIG_EXT3_FS=y
970CONFIG_EXT3_FS_XATTR=y
971# CONFIG_EXT3_FS_POSIX_ACL is not set
972# CONFIG_EXT3_FS_SECURITY is not set
973# CONFIG_EXT4DEV_FS is not set
974CONFIG_JBD=y
975CONFIG_FS_MBCACHE=y
976# CONFIG_REISERFS_FS is not set
977# CONFIG_JFS_FS is not set
978# CONFIG_FS_POSIX_ACL is not set
979# CONFIG_XFS_FS is not set
980# CONFIG_GFS2_FS is not set
981# CONFIG_OCFS2_FS is not set
982CONFIG_DNOTIFY=y
983CONFIG_INOTIFY=y
984CONFIG_INOTIFY_USER=y
985# CONFIG_QUOTA is not set
986# CONFIG_AUTOFS_FS is not set
987# CONFIG_AUTOFS4_FS is not set
988# CONFIG_FUSE_FS is not set
989
990#
991# CD-ROM/DVD Filesystems
992#
993# CONFIG_ISO9660_FS is not set
994# CONFIG_UDF_FS is not set
995
996#
997# DOS/FAT/NT Filesystems
998#
999# CONFIG_MSDOS_FS is not set
1000# CONFIG_VFAT_FS is not set
1001# CONFIG_NTFS_FS is not set
1002
1003#
1004# Pseudo filesystems
1005#
1006CONFIG_PROC_FS=y
1007CONFIG_PROC_KCORE=y
1008CONFIG_PROC_SYSCTL=y
1009CONFIG_SYSFS=y
1010CONFIG_TMPFS=y
1011# CONFIG_TMPFS_POSIX_ACL is not set
1012# CONFIG_HUGETLB_PAGE is not set
1013# CONFIG_CONFIGFS_FS is not set
1014
1015#
1016# Miscellaneous filesystems
1017#
1018# CONFIG_ADFS_FS is not set
1019# CONFIG_AFFS_FS is not set
1020# CONFIG_HFS_FS is not set
1021# CONFIG_HFSPLUS_FS is not set
1022# CONFIG_BEFS_FS is not set
1023# CONFIG_BFS_FS is not set
1024# CONFIG_EFS_FS is not set
1025CONFIG_JFFS2_FS=y
1026CONFIG_JFFS2_FS_DEBUG=0
1027CONFIG_JFFS2_FS_WRITEBUFFER=y
1028# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1029# CONFIG_JFFS2_SUMMARY is not set
1030# CONFIG_JFFS2_FS_XATTR is not set
1031# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1032CONFIG_JFFS2_ZLIB=y
1033# CONFIG_JFFS2_LZO is not set
1034CONFIG_JFFS2_RTIME=y
1035# CONFIG_JFFS2_RUBIN is not set
1036# CONFIG_CRAMFS is not set
1037# CONFIG_VXFS_FS is not set
1038# CONFIG_MINIX_FS is not set
1039# CONFIG_HPFS_FS is not set
1040# CONFIG_QNX4FS_FS is not set
1041# CONFIG_ROMFS_FS is not set
1042# CONFIG_SYSV_FS is not set
1043# CONFIG_UFS_FS is not set
1044CONFIG_NETWORK_FILESYSTEMS=y
1045CONFIG_NFS_FS=y
1046CONFIG_NFS_V3=y
1047# CONFIG_NFS_V3_ACL is not set
1048CONFIG_NFS_V4=y
1049# CONFIG_NFS_DIRECTIO is not set
1050# CONFIG_NFSD is not set
1051CONFIG_ROOT_NFS=y
1052CONFIG_LOCKD=y
1053CONFIG_LOCKD_V4=y
1054CONFIG_NFS_COMMON=y
1055CONFIG_SUNRPC=y
1056CONFIG_SUNRPC_GSS=y
1057# CONFIG_SUNRPC_BIND34 is not set
1058CONFIG_RPCSEC_GSS_KRB5=y
1059# CONFIG_RPCSEC_GSS_SPKM3 is not set
1060# CONFIG_SMB_FS is not set
1061# CONFIG_CIFS is not set
1062# CONFIG_NCP_FS is not set
1063# CONFIG_CODA_FS is not set
1064# CONFIG_AFS_FS is not set
1065
1066#
1067# Partition Types
1068#
1069CONFIG_PARTITION_ADVANCED=y
1070# CONFIG_ACORN_PARTITION is not set
1071# CONFIG_OSF_PARTITION is not set
1072# CONFIG_AMIGA_PARTITION is not set
1073# CONFIG_ATARI_PARTITION is not set
1074# CONFIG_MAC_PARTITION is not set
1075# CONFIG_MSDOS_PARTITION is not set
1076# CONFIG_LDM_PARTITION is not set
1077# CONFIG_SGI_PARTITION is not set
1078# CONFIG_ULTRIX_PARTITION is not set
1079# CONFIG_SUN_PARTITION is not set
1080# CONFIG_KARMA_PARTITION is not set
1081# CONFIG_EFI_PARTITION is not set
1082# CONFIG_SYSV68_PARTITION is not set
1083CONFIG_NLS=y
1084CONFIG_NLS_DEFAULT="iso8859-1"
1085# CONFIG_NLS_CODEPAGE_437 is not set
1086# CONFIG_NLS_CODEPAGE_737 is not set
1087# CONFIG_NLS_CODEPAGE_775 is not set
1088# CONFIG_NLS_CODEPAGE_850 is not set
1089# CONFIG_NLS_CODEPAGE_852 is not set
1090# CONFIG_NLS_CODEPAGE_855 is not set
1091# CONFIG_NLS_CODEPAGE_857 is not set
1092# CONFIG_NLS_CODEPAGE_860 is not set
1093# CONFIG_NLS_CODEPAGE_861 is not set
1094# CONFIG_NLS_CODEPAGE_862 is not set
1095# CONFIG_NLS_CODEPAGE_863 is not set
1096# CONFIG_NLS_CODEPAGE_864 is not set
1097# CONFIG_NLS_CODEPAGE_865 is not set
1098# CONFIG_NLS_CODEPAGE_866 is not set
1099# CONFIG_NLS_CODEPAGE_869 is not set
1100# CONFIG_NLS_CODEPAGE_936 is not set
1101# CONFIG_NLS_CODEPAGE_950 is not set
1102# CONFIG_NLS_CODEPAGE_932 is not set
1103# CONFIG_NLS_CODEPAGE_949 is not set
1104# CONFIG_NLS_CODEPAGE_874 is not set
1105# CONFIG_NLS_ISO8859_8 is not set
1106# CONFIG_NLS_CODEPAGE_1250 is not set
1107# CONFIG_NLS_CODEPAGE_1251 is not set
1108# CONFIG_NLS_ASCII is not set
1109# CONFIG_NLS_ISO8859_1 is not set
1110# CONFIG_NLS_ISO8859_2 is not set
1111# CONFIG_NLS_ISO8859_3 is not set
1112# CONFIG_NLS_ISO8859_4 is not set
1113# CONFIG_NLS_ISO8859_5 is not set
1114# CONFIG_NLS_ISO8859_6 is not set
1115# CONFIG_NLS_ISO8859_7 is not set
1116# CONFIG_NLS_ISO8859_9 is not set
1117# CONFIG_NLS_ISO8859_13 is not set
1118# CONFIG_NLS_ISO8859_14 is not set
1119# CONFIG_NLS_ISO8859_15 is not set
1120# CONFIG_NLS_KOI8_R is not set
1121# CONFIG_NLS_KOI8_U is not set
1122# CONFIG_NLS_UTF8 is not set
1123# CONFIG_DLM is not set
1124
1125#
1126# Library routines
1127#
1128CONFIG_BITREVERSE=y
1129# CONFIG_CRC_CCITT is not set
1130# CONFIG_CRC16 is not set
1131# CONFIG_CRC_ITU_T is not set
1132CONFIG_CRC32=y
1133# CONFIG_CRC7 is not set
1134# CONFIG_LIBCRC32C is not set
1135CONFIG_ZLIB_INFLATE=y
1136CONFIG_ZLIB_DEFLATE=y
1137CONFIG_PLIST=y
1138CONFIG_HAS_IOMEM=y
1139CONFIG_HAS_IOPORT=y
1140CONFIG_HAS_DMA=y
1141CONFIG_HAVE_LMB=y
1142
1143#
1144# Kernel hacking
1145#
1146# CONFIG_PRINTK_TIME is not set
1147CONFIG_ENABLE_WARN_DEPRECATED=y
1148CONFIG_ENABLE_MUST_CHECK=y
1149# CONFIG_MAGIC_SYSRQ is not set
1150# CONFIG_UNUSED_SYMBOLS is not set
1151# CONFIG_DEBUG_FS is not set
1152# CONFIG_HEADERS_CHECK is not set
1153# CONFIG_DEBUG_KERNEL is not set
1154# CONFIG_SLUB_DEBUG_ON is not set
1155# CONFIG_SLUB_STATS is not set
1156# CONFIG_DEBUG_BUGVERBOSE is not set
1157# CONFIG_SAMPLES is not set
1158# CONFIG_PPC_EARLY_DEBUG is not set
1159
1160#
1161# Security options
1162#
1163# CONFIG_KEYS is not set
1164# CONFIG_SECURITY is not set
1165# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1166CONFIG_CRYPTO=y
1167CONFIG_CRYPTO_ALGAPI=y
1168CONFIG_CRYPTO_BLKCIPHER=y
1169# CONFIG_CRYPTO_SEQIV is not set
1170CONFIG_CRYPTO_MANAGER=y
1171# CONFIG_CRYPTO_HMAC is not set
1172# CONFIG_CRYPTO_XCBC is not set
1173# CONFIG_CRYPTO_NULL is not set
1174# CONFIG_CRYPTO_MD4 is not set
1175CONFIG_CRYPTO_MD5=y
1176# CONFIG_CRYPTO_SHA1 is not set
1177# CONFIG_CRYPTO_SHA256 is not set
1178# CONFIG_CRYPTO_SHA512 is not set
1179# CONFIG_CRYPTO_WP512 is not set
1180# CONFIG_CRYPTO_TGR192 is not set
1181# CONFIG_CRYPTO_GF128MUL is not set
1182CONFIG_CRYPTO_ECB=m
1183CONFIG_CRYPTO_CBC=y
1184CONFIG_CRYPTO_PCBC=m
1185# CONFIG_CRYPTO_LRW is not set
1186# CONFIG_CRYPTO_XTS is not set
1187# CONFIG_CRYPTO_CTR is not set
1188# CONFIG_CRYPTO_GCM is not set
1189# CONFIG_CRYPTO_CCM is not set
1190# CONFIG_CRYPTO_CRYPTD is not set
1191CONFIG_CRYPTO_DES=y
1192# CONFIG_CRYPTO_FCRYPT is not set
1193# CONFIG_CRYPTO_BLOWFISH is not set
1194# CONFIG_CRYPTO_TWOFISH is not set
1195# CONFIG_CRYPTO_SERPENT is not set
1196# CONFIG_CRYPTO_AES is not set
1197# CONFIG_CRYPTO_CAST5 is not set
1198# CONFIG_CRYPTO_CAST6 is not set
1199# CONFIG_CRYPTO_TEA is not set
1200# CONFIG_CRYPTO_ARC4 is not set
1201# CONFIG_CRYPTO_KHAZAD is not set
1202# CONFIG_CRYPTO_ANUBIS is not set
1203# CONFIG_CRYPTO_SEED is not set
1204# CONFIG_CRYPTO_SALSA20 is not set
1205# CONFIG_CRYPTO_DEFLATE is not set
1206# CONFIG_CRYPTO_MICHAEL_MIC is not set
1207# CONFIG_CRYPTO_CRC32C is not set
1208# CONFIG_CRYPTO_CAMELLIA is not set
1209# CONFIG_CRYPTO_TEST is not set
1210# CONFIG_CRYPTO_AUTHENC is not set
1211# CONFIG_CRYPTO_LZO is not set
1212CONFIG_CRYPTO_HW=y
1213# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1214# CONFIG_PPC_CLOCK is not set
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig
new file mode 100644
index 000000000000..dc599c7e97d5
--- /dev/null
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -0,0 +1,1872 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc2
4# Thu May 15 11:00:14 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11CONFIG_6xx=y
12# CONFIG_PPC_85xx is not set
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_PPC_FPU=y
18# CONFIG_ALTIVEC is not set
19CONFIG_PPC_STD_MMU=y
20CONFIG_PPC_STD_MMU_32=y
21# CONFIG_PPC_MM_SLICES is not set
22# CONFIG_SMP is not set
23CONFIG_NOT_COHERENT_CACHE=y
24CONFIG_CHECK_CACHE_COHERENCY=y
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27CONFIG_PPC_MERGE=y
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_LOCKDEP_SUPPORT=y
38CONFIG_RWSEM_XCHGADD_ALGORITHM=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51# CONFIG_PPC_UDBG_16550 is not set
52# CONFIG_GENERIC_TBSYNC is not set
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55# CONFIG_DEFAULT_UIMAGE is not set
56# CONFIG_PPC_DCR_NATIVE is not set
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_BROKEN_ON_SMP=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72CONFIG_BSD_PROCESS_ACCT=y
73# CONFIG_BSD_PROCESS_ACCT_V3 is not set
74# CONFIG_TASKSTATS is not set
75CONFIG_AUDIT=y
76CONFIG_AUDITSYSCALL=y
77CONFIG_AUDIT_TREE=y
78# CONFIG_IKCONFIG is not set
79CONFIG_LOG_BUF_SHIFT=17
80# CONFIG_CGROUPS is not set
81CONFIG_GROUP_SCHED=y
82CONFIG_FAIR_GROUP_SCHED=y
83# CONFIG_RT_GROUP_SCHED is not set
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_SYSFS_DEPRECATED=y
87CONFIG_SYSFS_DEPRECATED_V2=y
88# CONFIG_RELAY is not set
89CONFIG_NAMESPACES=y
90# CONFIG_UTS_NS is not set
91# CONFIG_IPC_NS is not set
92# CONFIG_USER_NS is not set
93# CONFIG_PID_NS is not set
94CONFIG_BLK_DEV_INITRD=y
95CONFIG_INITRAMFS_SOURCE=""
96CONFIG_CC_OPTIMIZE_FOR_SIZE=y
97CONFIG_SYSCTL=y
98# CONFIG_EMBEDDED is not set
99CONFIG_SYSCTL_SYSCALL=y
100CONFIG_SYSCTL_SYSCALL_CHECK=y
101CONFIG_KALLSYMS=y
102# CONFIG_KALLSYMS_ALL is not set
103CONFIG_KALLSYMS_EXTRA_PASS=y
104CONFIG_HOTPLUG=y
105CONFIG_PRINTK=y
106CONFIG_BUG=y
107CONFIG_ELF_CORE=y
108CONFIG_COMPAT_BRK=y
109CONFIG_BASE_FULL=y
110CONFIG_FUTEX=y
111CONFIG_ANON_INODES=y
112CONFIG_EPOLL=y
113CONFIG_SIGNALFD=y
114CONFIG_TIMERFD=y
115CONFIG_EVENTFD=y
116CONFIG_SHMEM=y
117CONFIG_VM_EVENT_COUNTERS=y
118CONFIG_SLUB_DEBUG=y
119# CONFIG_SLAB is not set
120CONFIG_SLUB=y
121# CONFIG_SLOB is not set
122CONFIG_PROFILING=y
123# CONFIG_MARKERS is not set
124CONFIG_OPROFILE=m
125CONFIG_HAVE_OPROFILE=y
126CONFIG_KPROBES=y
127CONFIG_KRETPROBES=y
128CONFIG_HAVE_KPROBES=y
129CONFIG_HAVE_KRETPROBES=y
130# CONFIG_HAVE_DMA_ATTRS is not set
131CONFIG_PROC_PAGE_MONITOR=y
132CONFIG_SLABINFO=y
133CONFIG_RT_MUTEXES=y
134# CONFIG_TINY_SHMEM is not set
135CONFIG_BASE_SMALL=0
136CONFIG_MODULES=y
137# CONFIG_MODULE_FORCE_LOAD is not set
138CONFIG_MODULE_UNLOAD=y
139# CONFIG_MODULE_FORCE_UNLOAD is not set
140CONFIG_MODVERSIONS=y
141# CONFIG_MODULE_SRCVERSION_ALL is not set
142CONFIG_KMOD=y
143CONFIG_BLOCK=y
144CONFIG_LBD=y
145# CONFIG_BLK_DEV_IO_TRACE is not set
146# CONFIG_LSF is not set
147# CONFIG_BLK_DEV_BSG is not set
148
149#
150# IO Schedulers
151#
152CONFIG_IOSCHED_NOOP=y
153CONFIG_IOSCHED_AS=y
154CONFIG_IOSCHED_DEADLINE=y
155CONFIG_IOSCHED_CFQ=y
156# CONFIG_DEFAULT_AS is not set
157# CONFIG_DEFAULT_DEADLINE is not set
158CONFIG_DEFAULT_CFQ=y
159# CONFIG_DEFAULT_NOOP is not set
160CONFIG_DEFAULT_IOSCHED="cfq"
161CONFIG_CLASSIC_RCU=y
162
163#
164# Platform support
165#
166CONFIG_PPC_MULTIPLATFORM=y
167# CONFIG_PPC_82xx is not set
168# CONFIG_PPC_83xx is not set
169# CONFIG_PPC_86xx is not set
170CONFIG_CLASSIC32=y
171# CONFIG_PPC_CHRP is not set
172# CONFIG_PPC_MPC512x is not set
173# CONFIG_PPC_MPC5121 is not set
174# CONFIG_MPC5121_ADS is not set
175# CONFIG_PPC_MPC52xx is not set
176# CONFIG_PPC_PMAC is not set
177# CONFIG_PPC_CELL is not set
178# CONFIG_PPC_CELL_NATIVE is not set
179# CONFIG_PQ2ADS is not set
180CONFIG_EMBEDDED6xx=y
181# CONFIG_LINKSTATION is not set
182# CONFIG_STORCENTER is not set
183# CONFIG_MPC7448HPC2 is not set
184# CONFIG_PPC_HOLLY is not set
185# CONFIG_PPC_PRPMC2800 is not set
186CONFIG_PPC_C2K=y
187CONFIG_MV64X60=y
188# CONFIG_IPIC is not set
189# CONFIG_MPIC is not set
190# CONFIG_MPIC_WEIRD is not set
191# CONFIG_PPC_I8259 is not set
192# CONFIG_PPC_RTAS is not set
193# CONFIG_MMIO_NVRAM is not set
194# CONFIG_PPC_MPC106 is not set
195# CONFIG_PPC_970_NAP is not set
196# CONFIG_PPC_INDIRECT_IO is not set
197# CONFIG_GENERIC_IOMAP is not set
198CONFIG_CPU_FREQ=y
199CONFIG_CPU_FREQ_TABLE=y
200# CONFIG_CPU_FREQ_DEBUG is not set
201CONFIG_CPU_FREQ_STAT=y
202# CONFIG_CPU_FREQ_STAT_DETAILS is not set
203# CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set
204# CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set
205CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y
206# CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set
207# CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set
208CONFIG_CPU_FREQ_GOV_PERFORMANCE=y
209CONFIG_CPU_FREQ_GOV_POWERSAVE=m
210CONFIG_CPU_FREQ_GOV_USERSPACE=y
211CONFIG_CPU_FREQ_GOV_ONDEMAND=m
212# CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set
213
214#
215# CPU Frequency drivers
216#
217# CONFIG_TAU is not set
218# CONFIG_FSL_ULI1575 is not set
219
220#
221# Kernel options
222#
223CONFIG_HIGHMEM=y
224# CONFIG_TICK_ONESHOT is not set
225# CONFIG_NO_HZ is not set
226# CONFIG_HIGH_RES_TIMERS is not set
227CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
228# CONFIG_HZ_100 is not set
229CONFIG_HZ_250=y
230# CONFIG_HZ_300 is not set
231# CONFIG_HZ_1000 is not set
232CONFIG_HZ=250
233# CONFIG_SCHED_HRTICK is not set
234# CONFIG_PREEMPT_NONE is not set
235CONFIG_PREEMPT_VOLUNTARY=y
236# CONFIG_PREEMPT is not set
237CONFIG_BINFMT_ELF=y
238CONFIG_BINFMT_MISC=y
239# CONFIG_IOMMU_HELPER is not set
240CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
241CONFIG_ARCH_HAS_WALK_MEMORY=y
242CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
243# CONFIG_KEXEC is not set
244CONFIG_ARCH_FLATMEM_ENABLE=y
245CONFIG_ARCH_POPULATES_NODE_MAP=y
246CONFIG_SELECT_MEMORY_MODEL=y
247CONFIG_FLATMEM_MANUAL=y
248# CONFIG_DISCONTIGMEM_MANUAL is not set
249# CONFIG_SPARSEMEM_MANUAL is not set
250CONFIG_FLATMEM=y
251CONFIG_FLAT_NODE_MEM_MAP=y
252# CONFIG_SPARSEMEM_STATIC is not set
253# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
254CONFIG_PAGEFLAGS_EXTENDED=y
255CONFIG_SPLIT_PTLOCK_CPUS=4
256# CONFIG_RESOURCES_64BIT is not set
257CONFIG_ZONE_DMA_FLAG=1
258CONFIG_BOUNCE=y
259CONFIG_VIRT_TO_BUS=y
260CONFIG_FORCE_MAX_ZONEORDER=11
261# CONFIG_PROC_DEVICETREE is not set
262# CONFIG_CMDLINE_BOOL is not set
263CONFIG_PM=y
264# CONFIG_PM_DEBUG is not set
265CONFIG_SECCOMP=y
266CONFIG_ISA_DMA_API=y
267
268#
269# Bus options
270#
271CONFIG_ZONE_DMA=y
272CONFIG_GENERIC_ISA_DMA=y
273CONFIG_PPC_INDIRECT_PCI=y
274CONFIG_PCI=y
275CONFIG_PCI_DOMAINS=y
276CONFIG_PCI_SYSCALL=y
277# CONFIG_PCIEPORTBUS is not set
278CONFIG_ARCH_SUPPORTS_MSI=y
279CONFIG_PCI_MSI=y
280CONFIG_PCI_LEGACY=y
281# CONFIG_PCI_DEBUG is not set
282# CONFIG_PCCARD is not set
283CONFIG_HOTPLUG_PCI=y
284# CONFIG_HOTPLUG_PCI_FAKE is not set
285# CONFIG_HOTPLUG_PCI_CPCI is not set
286CONFIG_HOTPLUG_PCI_SHPC=m
287# CONFIG_HAS_RAPIDIO is not set
288
289#
290# Advanced setup
291#
292# CONFIG_ADVANCED_OPTIONS is not set
293
294#
295# Default settings for advanced configuration options are used
296#
297CONFIG_LOWMEM_SIZE=0x30000000
298CONFIG_PAGE_OFFSET=0xc0000000
299CONFIG_KERNEL_START=0xc0000000
300CONFIG_PHYSICAL_START=0x00000000
301CONFIG_TASK_SIZE=0xc0000000
302CONFIG_CONSISTENT_START=0xff100000
303CONFIG_CONSISTENT_SIZE=0x00200000
304
305#
306# Networking
307#
308CONFIG_NET=y
309
310#
311# Networking options
312#
313CONFIG_PACKET=y
314CONFIG_PACKET_MMAP=y
315CONFIG_UNIX=y
316CONFIG_XFRM=y
317CONFIG_XFRM_USER=y
318# CONFIG_XFRM_SUB_POLICY is not set
319# CONFIG_XFRM_MIGRATE is not set
320# CONFIG_XFRM_STATISTICS is not set
321CONFIG_NET_KEY=m
322# CONFIG_NET_KEY_MIGRATE is not set
323CONFIG_INET=y
324CONFIG_IP_MULTICAST=y
325CONFIG_IP_ADVANCED_ROUTER=y
326CONFIG_ASK_IP_FIB_HASH=y
327# CONFIG_IP_FIB_TRIE is not set
328CONFIG_IP_FIB_HASH=y
329CONFIG_IP_MULTIPLE_TABLES=y
330CONFIG_IP_ROUTE_MULTIPATH=y
331CONFIG_IP_ROUTE_VERBOSE=y
332CONFIG_IP_PNP=y
333CONFIG_IP_PNP_DHCP=y
334# CONFIG_IP_PNP_BOOTP is not set
335# CONFIG_IP_PNP_RARP is not set
336CONFIG_NET_IPIP=m
337CONFIG_NET_IPGRE=m
338CONFIG_NET_IPGRE_BROADCAST=y
339CONFIG_IP_MROUTE=y
340CONFIG_IP_PIMSM_V1=y
341CONFIG_IP_PIMSM_V2=y
342# CONFIG_ARPD is not set
343CONFIG_SYN_COOKIES=y
344CONFIG_INET_AH=m
345CONFIG_INET_ESP=m
346CONFIG_INET_IPCOMP=m
347CONFIG_INET_XFRM_TUNNEL=m
348CONFIG_INET_TUNNEL=m
349CONFIG_INET_XFRM_MODE_TRANSPORT=y
350CONFIG_INET_XFRM_MODE_TUNNEL=y
351CONFIG_INET_XFRM_MODE_BEET=y
352# CONFIG_INET_LRO is not set
353CONFIG_INET_DIAG=y
354CONFIG_INET_TCP_DIAG=y
355# CONFIG_TCP_CONG_ADVANCED is not set
356CONFIG_TCP_CONG_CUBIC=y
357CONFIG_DEFAULT_TCP_CONG="cubic"
358# CONFIG_TCP_MD5SIG is not set
359CONFIG_IP_VS=m
360# CONFIG_IP_VS_DEBUG is not set
361CONFIG_IP_VS_TAB_BITS=12
362
363#
364# IPVS transport protocol load balancing support
365#
366CONFIG_IP_VS_PROTO_TCP=y
367CONFIG_IP_VS_PROTO_UDP=y
368CONFIG_IP_VS_PROTO_ESP=y
369CONFIG_IP_VS_PROTO_AH=y
370
371#
372# IPVS scheduler
373#
374CONFIG_IP_VS_RR=m
375CONFIG_IP_VS_WRR=m
376CONFIG_IP_VS_LC=m
377CONFIG_IP_VS_WLC=m
378CONFIG_IP_VS_LBLC=m
379CONFIG_IP_VS_LBLCR=m
380CONFIG_IP_VS_DH=m
381CONFIG_IP_VS_SH=m
382CONFIG_IP_VS_SED=m
383CONFIG_IP_VS_NQ=m
384
385#
386# IPVS application helper
387#
388CONFIG_IP_VS_FTP=m
389CONFIG_IPV6=m
390CONFIG_IPV6_PRIVACY=y
391# CONFIG_IPV6_ROUTER_PREF is not set
392# CONFIG_IPV6_OPTIMISTIC_DAD is not set
393CONFIG_INET6_AH=m
394CONFIG_INET6_ESP=m
395CONFIG_INET6_IPCOMP=m
396# CONFIG_IPV6_MIP6 is not set
397CONFIG_INET6_XFRM_TUNNEL=m
398CONFIG_INET6_TUNNEL=m
399CONFIG_INET6_XFRM_MODE_TRANSPORT=m
400CONFIG_INET6_XFRM_MODE_TUNNEL=m
401CONFIG_INET6_XFRM_MODE_BEET=m
402# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
403CONFIG_IPV6_SIT=m
404CONFIG_IPV6_NDISC_NODETYPE=y
405CONFIG_IPV6_TUNNEL=m
406# CONFIG_IPV6_MULTIPLE_TABLES is not set
407# CONFIG_IPV6_MROUTE is not set
408# CONFIG_NETLABEL is not set
409CONFIG_NETWORK_SECMARK=y
410CONFIG_NETFILTER=y
411# CONFIG_NETFILTER_DEBUG is not set
412CONFIG_NETFILTER_ADVANCED=y
413CONFIG_BRIDGE_NETFILTER=y
414
415#
416# Core Netfilter Configuration
417#
418# CONFIG_NETFILTER_NETLINK_QUEUE is not set
419# CONFIG_NETFILTER_NETLINK_LOG is not set
420# CONFIG_NF_CONNTRACK is not set
421CONFIG_NETFILTER_XTABLES=m
422# CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set
423# CONFIG_NETFILTER_XT_TARGET_DSCP is not set
424# CONFIG_NETFILTER_XT_TARGET_MARK is not set
425# CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set
426# CONFIG_NETFILTER_XT_TARGET_NFLOG is not set
427# CONFIG_NETFILTER_XT_TARGET_RATEEST is not set
428# CONFIG_NETFILTER_XT_TARGET_TRACE is not set
429# CONFIG_NETFILTER_XT_TARGET_SECMARK is not set
430# CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set
431# CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set
432# CONFIG_NETFILTER_XT_MATCH_COMMENT is not set
433# CONFIG_NETFILTER_XT_MATCH_DCCP is not set
434# CONFIG_NETFILTER_XT_MATCH_DSCP is not set
435# CONFIG_NETFILTER_XT_MATCH_ESP is not set
436# CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set
437# CONFIG_NETFILTER_XT_MATCH_LENGTH is not set
438# CONFIG_NETFILTER_XT_MATCH_LIMIT is not set
439# CONFIG_NETFILTER_XT_MATCH_MAC is not set
440# CONFIG_NETFILTER_XT_MATCH_MARK is not set
441# CONFIG_NETFILTER_XT_MATCH_OWNER is not set
442# CONFIG_NETFILTER_XT_MATCH_POLICY is not set
443# CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set
444# CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set
445# CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set
446# CONFIG_NETFILTER_XT_MATCH_QUOTA is not set
447# CONFIG_NETFILTER_XT_MATCH_RATEEST is not set
448# CONFIG_NETFILTER_XT_MATCH_REALM is not set
449# CONFIG_NETFILTER_XT_MATCH_SCTP is not set
450# CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set
451# CONFIG_NETFILTER_XT_MATCH_STRING is not set
452# CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set
453# CONFIG_NETFILTER_XT_MATCH_TIME is not set
454# CONFIG_NETFILTER_XT_MATCH_U32 is not set
455# CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set
456
457#
458# IP: Netfilter Configuration
459#
460CONFIG_IP_NF_QUEUE=m
461CONFIG_IP_NF_IPTABLES=m
462CONFIG_IP_NF_MATCH_RECENT=m
463CONFIG_IP_NF_MATCH_ECN=m
464# CONFIG_IP_NF_MATCH_AH is not set
465CONFIG_IP_NF_MATCH_TTL=m
466CONFIG_IP_NF_MATCH_ADDRTYPE=m
467CONFIG_IP_NF_FILTER=m
468CONFIG_IP_NF_TARGET_REJECT=m
469CONFIG_IP_NF_TARGET_LOG=m
470CONFIG_IP_NF_TARGET_ULOG=m
471CONFIG_IP_NF_MANGLE=m
472CONFIG_IP_NF_TARGET_ECN=m
473# CONFIG_IP_NF_TARGET_TTL is not set
474CONFIG_IP_NF_RAW=m
475CONFIG_IP_NF_ARPTABLES=m
476CONFIG_IP_NF_ARPFILTER=m
477CONFIG_IP_NF_ARP_MANGLE=m
478
479#
480# IPv6: Netfilter Configuration
481#
482# CONFIG_IP6_NF_QUEUE is not set
483CONFIG_IP6_NF_IPTABLES=m
484CONFIG_IP6_NF_MATCH_RT=m
485CONFIG_IP6_NF_MATCH_OPTS=m
486CONFIG_IP6_NF_MATCH_FRAG=m
487CONFIG_IP6_NF_MATCH_HL=m
488CONFIG_IP6_NF_MATCH_IPV6HEADER=m
489# CONFIG_IP6_NF_MATCH_AH is not set
490# CONFIG_IP6_NF_MATCH_MH is not set
491CONFIG_IP6_NF_MATCH_EUI64=m
492CONFIG_IP6_NF_FILTER=m
493CONFIG_IP6_NF_TARGET_LOG=m
494# CONFIG_IP6_NF_TARGET_REJECT is not set
495CONFIG_IP6_NF_MANGLE=m
496# CONFIG_IP6_NF_TARGET_HL is not set
497CONFIG_IP6_NF_RAW=m
498
499#
500# Bridge: Netfilter Configuration
501#
502CONFIG_BRIDGE_NF_EBTABLES=m
503CONFIG_BRIDGE_EBT_BROUTE=m
504CONFIG_BRIDGE_EBT_T_FILTER=m
505CONFIG_BRIDGE_EBT_T_NAT=m
506CONFIG_BRIDGE_EBT_802_3=m
507CONFIG_BRIDGE_EBT_AMONG=m
508CONFIG_BRIDGE_EBT_ARP=m
509CONFIG_BRIDGE_EBT_IP=m
510CONFIG_BRIDGE_EBT_LIMIT=m
511CONFIG_BRIDGE_EBT_MARK=m
512CONFIG_BRIDGE_EBT_PKTTYPE=m
513CONFIG_BRIDGE_EBT_STP=m
514CONFIG_BRIDGE_EBT_VLAN=m
515CONFIG_BRIDGE_EBT_ARPREPLY=m
516CONFIG_BRIDGE_EBT_DNAT=m
517CONFIG_BRIDGE_EBT_MARK_T=m
518CONFIG_BRIDGE_EBT_REDIRECT=m
519CONFIG_BRIDGE_EBT_SNAT=m
520CONFIG_BRIDGE_EBT_LOG=m
521# CONFIG_BRIDGE_EBT_ULOG is not set
522# CONFIG_BRIDGE_EBT_NFLOG is not set
523# CONFIG_IP_DCCP is not set
524CONFIG_IP_SCTP=m
525# CONFIG_SCTP_DBG_MSG is not set
526# CONFIG_SCTP_DBG_OBJCNT is not set
527# CONFIG_SCTP_HMAC_NONE is not set
528# CONFIG_SCTP_HMAC_SHA1 is not set
529CONFIG_SCTP_HMAC_MD5=y
530# CONFIG_TIPC is not set
531CONFIG_ATM=m
532CONFIG_ATM_CLIP=m
533# CONFIG_ATM_CLIP_NO_ICMP is not set
534CONFIG_ATM_LANE=m
535# CONFIG_ATM_MPOA is not set
536CONFIG_ATM_BR2684=m
537# CONFIG_ATM_BR2684_IPFILTER is not set
538CONFIG_BRIDGE=m
539CONFIG_VLAN_8021Q=m
540# CONFIG_DECNET is not set
541CONFIG_LLC=m
542# CONFIG_LLC2 is not set
543# CONFIG_IPX is not set
544# CONFIG_ATALK is not set
545# CONFIG_X25 is not set
546# CONFIG_LAPB is not set
547# CONFIG_ECONET is not set
548# CONFIG_WAN_ROUTER is not set
549CONFIG_NET_SCHED=y
550
551#
552# Queueing/Scheduling
553#
554CONFIG_NET_SCH_CBQ=m
555CONFIG_NET_SCH_HTB=m
556CONFIG_NET_SCH_HFSC=m
557CONFIG_NET_SCH_ATM=m
558CONFIG_NET_SCH_PRIO=m
559# CONFIG_NET_SCH_RR is not set
560CONFIG_NET_SCH_RED=m
561CONFIG_NET_SCH_SFQ=m
562CONFIG_NET_SCH_TEQL=m
563CONFIG_NET_SCH_TBF=m
564CONFIG_NET_SCH_GRED=m
565CONFIG_NET_SCH_DSMARK=m
566CONFIG_NET_SCH_NETEM=m
567
568#
569# Classification
570#
571CONFIG_NET_CLS=y
572# CONFIG_NET_CLS_BASIC is not set
573CONFIG_NET_CLS_TCINDEX=m
574CONFIG_NET_CLS_ROUTE4=m
575CONFIG_NET_CLS_ROUTE=y
576CONFIG_NET_CLS_FW=m
577CONFIG_NET_CLS_U32=m
578CONFIG_CLS_U32_PERF=y
579# CONFIG_CLS_U32_MARK is not set
580CONFIG_NET_CLS_RSVP=m
581CONFIG_NET_CLS_RSVP6=m
582# CONFIG_NET_CLS_FLOW is not set
583# CONFIG_NET_EMATCH is not set
584# CONFIG_NET_CLS_ACT is not set
585CONFIG_NET_CLS_IND=y
586CONFIG_NET_SCH_FIFO=y
587
588#
589# Network testing
590#
591# CONFIG_NET_PKTGEN is not set
592# CONFIG_NET_TCPPROBE is not set
593# CONFIG_HAMRADIO is not set
594# CONFIG_CAN is not set
595# CONFIG_IRDA is not set
596CONFIG_BT=m
597CONFIG_BT_L2CAP=m
598CONFIG_BT_SCO=m
599CONFIG_BT_RFCOMM=m
600CONFIG_BT_RFCOMM_TTY=y
601CONFIG_BT_BNEP=m
602CONFIG_BT_BNEP_MC_FILTER=y
603CONFIG_BT_BNEP_PROTO_FILTER=y
604CONFIG_BT_CMTP=m
605CONFIG_BT_HIDP=m
606
607#
608# Bluetooth device drivers
609#
610CONFIG_BT_HCIUSB=m
611CONFIG_BT_HCIUSB_SCO=y
612CONFIG_BT_HCIUART=m
613CONFIG_BT_HCIUART_H4=y
614CONFIG_BT_HCIUART_BCSP=y
615# CONFIG_BT_HCIUART_LL is not set
616CONFIG_BT_HCIBCM203X=m
617# CONFIG_BT_HCIBPA10X is not set
618CONFIG_BT_HCIBFUSB=m
619CONFIG_BT_HCIVHCI=m
620# CONFIG_AF_RXRPC is not set
621CONFIG_FIB_RULES=y
622
623#
624# Wireless
625#
626# CONFIG_CFG80211 is not set
627CONFIG_WIRELESS_EXT=y
628# CONFIG_MAC80211 is not set
629CONFIG_IEEE80211=m
630# CONFIG_IEEE80211_DEBUG is not set
631CONFIG_IEEE80211_CRYPT_WEP=m
632CONFIG_IEEE80211_CRYPT_CCMP=m
633CONFIG_IEEE80211_CRYPT_TKIP=m
634# CONFIG_RFKILL is not set
635# CONFIG_NET_9P is not set
636
637#
638# Device Drivers
639#
640
641#
642# Generic Driver Options
643#
644CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
645CONFIG_STANDALONE=y
646CONFIG_PREVENT_FIRMWARE_BUILD=y
647CONFIG_FW_LOADER=y
648# CONFIG_DEBUG_DRIVER is not set
649# CONFIG_DEBUG_DEVRES is not set
650# CONFIG_SYS_HYPERVISOR is not set
651# CONFIG_CONNECTOR is not set
652CONFIG_MTD=y
653# CONFIG_MTD_DEBUG is not set
654CONFIG_MTD_CONCAT=m
655CONFIG_MTD_PARTITIONS=y
656# CONFIG_MTD_REDBOOT_PARTS is not set
657# CONFIG_MTD_CMDLINE_PARTS is not set
658CONFIG_MTD_OF_PARTS=y
659# CONFIG_MTD_AR7_PARTS is not set
660
661#
662# User Modules And Translation Layers
663#
664CONFIG_MTD_CHAR=m
665CONFIG_MTD_BLKDEVS=y
666CONFIG_MTD_BLOCK=y
667# CONFIG_FTL is not set
668# CONFIG_NFTL is not set
669# CONFIG_INFTL is not set
670# CONFIG_RFD_FTL is not set
671# CONFIG_SSFDC is not set
672# CONFIG_MTD_OOPS is not set
673
674#
675# RAM/ROM/Flash chip drivers
676#
677CONFIG_MTD_CFI=y
678# CONFIG_MTD_JEDECPROBE is not set
679CONFIG_MTD_GEN_PROBE=y
680# CONFIG_MTD_CFI_ADV_OPTIONS is not set
681CONFIG_MTD_MAP_BANK_WIDTH_1=y
682CONFIG_MTD_MAP_BANK_WIDTH_2=y
683CONFIG_MTD_MAP_BANK_WIDTH_4=y
684# CONFIG_MTD_MAP_BANK_WIDTH_8 is not set
685# CONFIG_MTD_MAP_BANK_WIDTH_16 is not set
686# CONFIG_MTD_MAP_BANK_WIDTH_32 is not set
687CONFIG_MTD_CFI_I1=y
688CONFIG_MTD_CFI_I2=y
689CONFIG_MTD_CFI_I4=y
690# CONFIG_MTD_CFI_I8 is not set
691# CONFIG_MTD_CFI_INTELEXT is not set
692CONFIG_MTD_CFI_AMDSTD=y
693# CONFIG_MTD_CFI_STAA is not set
694CONFIG_MTD_CFI_UTIL=y
695# CONFIG_MTD_RAM is not set
696# CONFIG_MTD_ROM is not set
697# CONFIG_MTD_ABSENT is not set
698
699#
700# Mapping drivers for chip access
701#
702CONFIG_MTD_COMPLEX_MAPPINGS=y
703# CONFIG_MTD_PHYSMAP is not set
704CONFIG_MTD_PHYSMAP_OF=y
705# CONFIG_MTD_PCI is not set
706# CONFIG_MTD_INTEL_VR_NOR is not set
707# CONFIG_MTD_PLATRAM is not set
708
709#
710# Self-contained MTD device drivers
711#
712# CONFIG_MTD_PMC551 is not set
713# CONFIG_MTD_SLRAM is not set
714# CONFIG_MTD_PHRAM is not set
715# CONFIG_MTD_MTDRAM is not set
716# CONFIG_MTD_BLOCK2MTD is not set
717
718#
719# Disk-On-Chip Device Drivers
720#
721# CONFIG_MTD_DOC2000 is not set
722# CONFIG_MTD_DOC2001 is not set
723# CONFIG_MTD_DOC2001PLUS is not set
724# CONFIG_MTD_NAND is not set
725# CONFIG_MTD_ONENAND is not set
726
727#
728# UBI - Unsorted block images
729#
730# CONFIG_MTD_UBI is not set
731CONFIG_OF_DEVICE=y
732CONFIG_OF_I2C=m
733# CONFIG_PARPORT is not set
734CONFIG_BLK_DEV=y
735# CONFIG_BLK_DEV_FD is not set
736# CONFIG_BLK_CPQ_DA is not set
737# CONFIG_BLK_CPQ_CISS_DA is not set
738# CONFIG_BLK_DEV_DAC960 is not set
739# CONFIG_BLK_DEV_UMEM is not set
740# CONFIG_BLK_DEV_COW_COMMON is not set
741CONFIG_BLK_DEV_LOOP=m
742CONFIG_BLK_DEV_CRYPTOLOOP=m
743CONFIG_BLK_DEV_NBD=m
744# CONFIG_BLK_DEV_SX8 is not set
745# CONFIG_BLK_DEV_UB is not set
746CONFIG_BLK_DEV_RAM=y
747CONFIG_BLK_DEV_RAM_COUNT=16
748CONFIG_BLK_DEV_RAM_SIZE=16384
749# CONFIG_BLK_DEV_XIP is not set
750# CONFIG_CDROM_PKTCDVD is not set
751# CONFIG_ATA_OVER_ETH is not set
752# CONFIG_MISC_DEVICES is not set
753CONFIG_HAVE_IDE=y
754# CONFIG_IDE is not set
755
756#
757# SCSI device support
758#
759# CONFIG_RAID_ATTRS is not set
760CONFIG_SCSI=m
761CONFIG_SCSI_DMA=y
762# CONFIG_SCSI_TGT is not set
763CONFIG_SCSI_NETLINK=y
764CONFIG_SCSI_PROC_FS=y
765
766#
767# SCSI support type (disk, tape, CD-ROM)
768#
769CONFIG_BLK_DEV_SD=m
770CONFIG_CHR_DEV_ST=m
771CONFIG_CHR_DEV_OSST=m
772CONFIG_BLK_DEV_SR=m
773CONFIG_BLK_DEV_SR_VENDOR=y
774CONFIG_CHR_DEV_SG=m
775# CONFIG_CHR_DEV_SCH is not set
776
777#
778# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
779#
780# CONFIG_SCSI_MULTI_LUN is not set
781CONFIG_SCSI_CONSTANTS=y
782CONFIG_SCSI_LOGGING=y
783# CONFIG_SCSI_SCAN_ASYNC is not set
784CONFIG_SCSI_WAIT_SCAN=m
785
786#
787# SCSI Transports
788#
789CONFIG_SCSI_SPI_ATTRS=m
790CONFIG_SCSI_FC_ATTRS=m
791CONFIG_SCSI_ISCSI_ATTRS=m
792# CONFIG_SCSI_SAS_LIBSAS is not set
793CONFIG_SCSI_SRP_ATTRS=m
794CONFIG_SCSI_LOWLEVEL=y
795# CONFIG_ISCSI_TCP is not set
796CONFIG_BLK_DEV_3W_XXXX_RAID=m
797CONFIG_SCSI_3W_9XXX=m
798CONFIG_SCSI_ACARD=m
799CONFIG_SCSI_AACRAID=m
800CONFIG_SCSI_AIC7XXX=m
801CONFIG_AIC7XXX_CMDS_PER_DEVICE=4
802CONFIG_AIC7XXX_RESET_DELAY_MS=15000
803# CONFIG_AIC7XXX_DEBUG_ENABLE is not set
804CONFIG_AIC7XXX_DEBUG_MASK=0
805# CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set
806CONFIG_SCSI_AIC7XXX_OLD=m
807CONFIG_SCSI_AIC79XX=m
808CONFIG_AIC79XX_CMDS_PER_DEVICE=4
809CONFIG_AIC79XX_RESET_DELAY_MS=15000
810# CONFIG_AIC79XX_DEBUG_ENABLE is not set
811CONFIG_AIC79XX_DEBUG_MASK=0
812# CONFIG_AIC79XX_REG_PRETTY_PRINT is not set
813# CONFIG_SCSI_AIC94XX is not set
814# CONFIG_SCSI_DPT_I2O is not set
815# CONFIG_SCSI_ADVANSYS is not set
816CONFIG_SCSI_ARCMSR=m
817CONFIG_MEGARAID_NEWGEN=y
818CONFIG_MEGARAID_MM=m
819CONFIG_MEGARAID_MAILBOX=m
820# CONFIG_MEGARAID_LEGACY is not set
821CONFIG_MEGARAID_SAS=m
822# CONFIG_SCSI_HPTIOP is not set
823# CONFIG_SCSI_BUSLOGIC is not set
824# CONFIG_SCSI_DMX3191D is not set
825# CONFIG_SCSI_EATA is not set
826CONFIG_SCSI_FUTURE_DOMAIN=m
827CONFIG_SCSI_GDTH=m
828CONFIG_SCSI_IPS=m
829CONFIG_SCSI_INITIO=m
830# CONFIG_SCSI_INIA100 is not set
831# CONFIG_SCSI_MVSAS is not set
832# CONFIG_SCSI_STEX is not set
833CONFIG_SCSI_SYM53C8XX_2=m
834CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1
835CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16
836CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64
837CONFIG_SCSI_SYM53C8XX_MMIO=y
838CONFIG_SCSI_QLOGIC_1280=m
839# CONFIG_SCSI_QLA_FC is not set
840# CONFIG_SCSI_QLA_ISCSI is not set
841CONFIG_SCSI_LPFC=m
842# CONFIG_SCSI_DC395x is not set
843# CONFIG_SCSI_DC390T is not set
844# CONFIG_SCSI_NSP32 is not set
845# CONFIG_SCSI_DEBUG is not set
846# CONFIG_SCSI_SRP is not set
847# CONFIG_ATA is not set
848# CONFIG_MD is not set
849# CONFIG_FUSION is not set
850
851#
852# IEEE 1394 (FireWire) support
853#
854# CONFIG_FIREWIRE is not set
855# CONFIG_IEEE1394 is not set
856# CONFIG_I2O is not set
857# CONFIG_MACINTOSH_DRIVERS is not set
858CONFIG_NETDEVICES=y
859# CONFIG_NETDEVICES_MULTIQUEUE is not set
860CONFIG_DUMMY=m
861CONFIG_BONDING=m
862# CONFIG_MACVLAN is not set
863# CONFIG_EQUALIZER is not set
864CONFIG_TUN=m
865# CONFIG_VETH is not set
866# CONFIG_ARCNET is not set
867CONFIG_PHYLIB=y
868
869#
870# MII PHY device drivers
871#
872# CONFIG_MARVELL_PHY is not set
873# CONFIG_DAVICOM_PHY is not set
874# CONFIG_QSEMI_PHY is not set
875# CONFIG_LXT_PHY is not set
876# CONFIG_CICADA_PHY is not set
877CONFIG_VITESSE_PHY=y
878# CONFIG_SMSC_PHY is not set
879# CONFIG_BROADCOM_PHY is not set
880# CONFIG_ICPLUS_PHY is not set
881# CONFIG_REALTEK_PHY is not set
882# CONFIG_FIXED_PHY is not set
883# CONFIG_MDIO_BITBANG is not set
884CONFIG_NET_ETHERNET=y
885CONFIG_MII=y
886# CONFIG_HAPPYMEAL is not set
887# CONFIG_SUNGEM is not set
888# CONFIG_CASSINI is not set
889# CONFIG_NET_VENDOR_3COM is not set
890# CONFIG_NET_TULIP is not set
891# CONFIG_HP100 is not set
892# CONFIG_IBM_NEW_EMAC_ZMII is not set
893# CONFIG_IBM_NEW_EMAC_RGMII is not set
894# CONFIG_IBM_NEW_EMAC_TAH is not set
895# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
896# CONFIG_NET_PCI is not set
897# CONFIG_B44 is not set
898CONFIG_NETDEV_1000=y
899# CONFIG_ACENIC is not set
900# CONFIG_DL2K is not set
901# CONFIG_E1000 is not set
902# CONFIG_E1000E is not set
903# CONFIG_E1000E_ENABLED is not set
904# CONFIG_IP1000 is not set
905# CONFIG_IGB is not set
906# CONFIG_NS83820 is not set
907# CONFIG_HAMACHI is not set
908# CONFIG_YELLOWFIN is not set
909# CONFIG_R8169 is not set
910# CONFIG_SIS190 is not set
911# CONFIG_SKGE is not set
912# CONFIG_SKY2 is not set
913# CONFIG_VIA_VELOCITY is not set
914# CONFIG_TIGON3 is not set
915# CONFIG_BNX2 is not set
916CONFIG_MV643XX_ETH=y
917# CONFIG_QLA3XXX is not set
918# CONFIG_ATL1 is not set
919# CONFIG_NETDEV_10000 is not set
920# CONFIG_TR is not set
921
922#
923# Wireless LAN
924#
925# CONFIG_WLAN_PRE80211 is not set
926# CONFIG_WLAN_80211 is not set
927# CONFIG_IWLWIFI_LEDS is not set
928
929#
930# USB Network Adapters
931#
932# CONFIG_USB_CATC is not set
933# CONFIG_USB_KAWETH is not set
934# CONFIG_USB_PEGASUS is not set
935# CONFIG_USB_RTL8150 is not set
936# CONFIG_USB_USBNET is not set
937# CONFIG_WAN is not set
938# CONFIG_ATM_DRIVERS is not set
939# CONFIG_FDDI is not set
940# CONFIG_HIPPI is not set
941# CONFIG_PPP is not set
942# CONFIG_SLIP is not set
943CONFIG_SLHC=m
944# CONFIG_NET_FC is not set
945CONFIG_NETCONSOLE=m
946# CONFIG_NETCONSOLE_DYNAMIC is not set
947CONFIG_NETPOLL=y
948CONFIG_NETPOLL_TRAP=y
949CONFIG_NET_POLL_CONTROLLER=y
950CONFIG_ISDN=m
951CONFIG_ISDN_I4L=m
952CONFIG_ISDN_PPP=y
953CONFIG_ISDN_PPP_VJ=y
954CONFIG_ISDN_MPP=y
955CONFIG_IPPP_FILTER=y
956# CONFIG_ISDN_PPP_BSDCOMP is not set
957CONFIG_ISDN_AUDIO=y
958CONFIG_ISDN_TTY_FAX=y
959
960#
961# ISDN feature submodules
962#
963CONFIG_ISDN_DRV_LOOP=m
964# CONFIG_ISDN_DIVERSION is not set
965
966#
967# ISDN4Linux hardware drivers
968#
969
970#
971# Passive cards
972#
973CONFIG_ISDN_DRV_HISAX=m
974
975#
976# D-channel protocol features
977#
978CONFIG_HISAX_EURO=y
979CONFIG_DE_AOC=y
980CONFIG_HISAX_NO_SENDCOMPLETE=y
981CONFIG_HISAX_NO_LLC=y
982CONFIG_HISAX_NO_KEYPAD=y
983CONFIG_HISAX_1TR6=y
984CONFIG_HISAX_NI1=y
985CONFIG_HISAX_MAX_CARDS=8
986
987#
988# HiSax supported cards
989#
990CONFIG_HISAX_16_3=y
991CONFIG_HISAX_S0BOX=y
992CONFIG_HISAX_FRITZPCI=y
993CONFIG_HISAX_AVM_A1_PCMCIA=y
994CONFIG_HISAX_ELSA=y
995CONFIG_HISAX_DIEHLDIVA=y
996CONFIG_HISAX_SEDLBAUER=y
997CONFIG_HISAX_NICCY=y
998CONFIG_HISAX_BKM_A4T=y
999CONFIG_HISAX_SCT_QUADRO=y
1000CONFIG_HISAX_GAZEL=y
1001CONFIG_HISAX_W6692=y
1002CONFIG_HISAX_HFC_SX=y
1003# CONFIG_HISAX_DEBUG is not set
1004
1005#
1006# HiSax PCMCIA card service modules
1007#
1008
1009#
1010# HiSax sub driver modules
1011#
1012CONFIG_HISAX_ST5481=m
1013CONFIG_HISAX_HFCUSB=m
1014# CONFIG_HISAX_HFC4S8S is not set
1015CONFIG_HISAX_FRITZ_PCIPNP=m
1016CONFIG_HISAX_HDLC=y
1017
1018#
1019# Active cards
1020#
1021CONFIG_HYSDN=m
1022CONFIG_HYSDN_CAPI=y
1023# CONFIG_ISDN_DRV_GIGASET is not set
1024CONFIG_ISDN_CAPI=m
1025CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y
1026CONFIG_CAPI_TRACE=y
1027CONFIG_ISDN_CAPI_MIDDLEWARE=y
1028CONFIG_ISDN_CAPI_CAPI20=m
1029CONFIG_ISDN_CAPI_CAPIFS_BOOL=y
1030CONFIG_ISDN_CAPI_CAPIFS=m
1031CONFIG_ISDN_CAPI_CAPIDRV=m
1032
1033#
1034# CAPI hardware drivers
1035#
1036CONFIG_CAPI_AVM=y
1037CONFIG_ISDN_DRV_AVMB1_B1PCI=m
1038CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y
1039CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m
1040CONFIG_ISDN_DRV_AVMB1_T1PCI=m
1041CONFIG_ISDN_DRV_AVMB1_C4=m
1042CONFIG_CAPI_EICON=y
1043CONFIG_ISDN_DIVAS=m
1044CONFIG_ISDN_DIVAS_BRIPCI=y
1045CONFIG_ISDN_DIVAS_PRIPCI=y
1046CONFIG_ISDN_DIVAS_DIVACAPI=m
1047CONFIG_ISDN_DIVAS_USERIDI=m
1048CONFIG_ISDN_DIVAS_MAINT=m
1049# CONFIG_PHONE is not set
1050
1051#
1052# Input device support
1053#
1054CONFIG_INPUT=y
1055# CONFIG_INPUT_FF_MEMLESS is not set
1056# CONFIG_INPUT_POLLDEV is not set
1057
1058#
1059# Userland interfaces
1060#
1061CONFIG_INPUT_MOUSEDEV=y
1062# CONFIG_INPUT_MOUSEDEV_PSAUX is not set
1063CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024
1064CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768
1065# CONFIG_INPUT_JOYDEV is not set
1066CONFIG_INPUT_EVDEV=y
1067# CONFIG_INPUT_EVBUG is not set
1068
1069#
1070# Input Device Drivers
1071#
1072# CONFIG_INPUT_KEYBOARD is not set
1073# CONFIG_INPUT_MOUSE is not set
1074# CONFIG_INPUT_JOYSTICK is not set
1075# CONFIG_INPUT_TABLET is not set
1076# CONFIG_INPUT_TOUCHSCREEN is not set
1077CONFIG_INPUT_MISC=y
1078# CONFIG_INPUT_ATI_REMOTE is not set
1079# CONFIG_INPUT_ATI_REMOTE2 is not set
1080# CONFIG_INPUT_KEYSPAN_REMOTE is not set
1081# CONFIG_INPUT_POWERMATE is not set
1082# CONFIG_INPUT_YEALINK is not set
1083CONFIG_INPUT_UINPUT=m
1084
1085#
1086# Hardware I/O ports
1087#
1088# CONFIG_SERIO is not set
1089# CONFIG_GAMEPORT is not set
1090
1091#
1092# Character devices
1093#
1094CONFIG_VT=y
1095CONFIG_VT_CONSOLE=y
1096CONFIG_HW_CONSOLE=y
1097# CONFIG_VT_HW_CONSOLE_BINDING is not set
1098CONFIG_DEVKMEM=y
1099CONFIG_SERIAL_NONSTANDARD=y
1100# CONFIG_COMPUTONE is not set
1101# CONFIG_ROCKETPORT is not set
1102# CONFIG_CYCLADES is not set
1103# CONFIG_DIGIEPCA is not set
1104# CONFIG_MOXA_INTELLIO is not set
1105# CONFIG_MOXA_SMARTIO is not set
1106# CONFIG_ISI is not set
1107# CONFIG_SYNCLINK is not set
1108# CONFIG_SYNCLINKMP is not set
1109# CONFIG_SYNCLINK_GT is not set
1110# CONFIG_N_HDLC is not set
1111# CONFIG_RISCOM8 is not set
1112# CONFIG_SPECIALIX is not set
1113# CONFIG_SX is not set
1114# CONFIG_RIO is not set
1115# CONFIG_STALDRV is not set
1116# CONFIG_NOZOMI is not set
1117
1118#
1119# Serial drivers
1120#
1121# CONFIG_SERIAL_8250 is not set
1122
1123#
1124# Non-8250 serial port support
1125#
1126CONFIG_SERIAL_MPSC=y
1127CONFIG_SERIAL_MPSC_CONSOLE=y
1128# CONFIG_SERIAL_UARTLITE is not set
1129CONFIG_SERIAL_CORE=y
1130CONFIG_SERIAL_CORE_CONSOLE=y
1131# CONFIG_SERIAL_JSM is not set
1132CONFIG_UNIX98_PTYS=y
1133# CONFIG_LEGACY_PTYS is not set
1134# CONFIG_IPMI_HANDLER is not set
1135CONFIG_HW_RANDOM=m
1136CONFIG_NVRAM=m
1137CONFIG_GEN_RTC=m
1138# CONFIG_GEN_RTC_X is not set
1139# CONFIG_R3964 is not set
1140# CONFIG_APPLICOM is not set
1141CONFIG_RAW_DRIVER=y
1142CONFIG_MAX_RAW_DEVS=8192
1143# CONFIG_TCG_TPM is not set
1144CONFIG_DEVPORT=y
1145CONFIG_I2C=m
1146CONFIG_I2C_BOARDINFO=y
1147CONFIG_I2C_CHARDEV=m
1148
1149#
1150# I2C Hardware Bus support
1151#
1152# CONFIG_I2C_ALI1535 is not set
1153# CONFIG_I2C_ALI1563 is not set
1154# CONFIG_I2C_ALI15X3 is not set
1155# CONFIG_I2C_AMD756 is not set
1156# CONFIG_I2C_AMD8111 is not set
1157# CONFIG_I2C_I801 is not set
1158# CONFIG_I2C_I810 is not set
1159# CONFIG_I2C_PIIX4 is not set
1160# CONFIG_I2C_MPC is not set
1161# CONFIG_I2C_NFORCE2 is not set
1162# CONFIG_I2C_OCORES is not set
1163# CONFIG_I2C_PARPORT_LIGHT is not set
1164# CONFIG_I2C_PROSAVAGE is not set
1165# CONFIG_I2C_SAVAGE4 is not set
1166# CONFIG_I2C_SIMTEC is not set
1167# CONFIG_I2C_SIS5595 is not set
1168# CONFIG_I2C_SIS630 is not set
1169# CONFIG_I2C_SIS96X is not set
1170# CONFIG_I2C_TAOS_EVM is not set
1171# CONFIG_I2C_STUB is not set
1172# CONFIG_I2C_TINY_USB is not set
1173# CONFIG_I2C_VIA is not set
1174# CONFIG_I2C_VIAPRO is not set
1175# CONFIG_I2C_VOODOO3 is not set
1176# CONFIG_I2C_PCA_PLATFORM is not set
1177CONFIG_I2C_MV64XXX=m
1178
1179#
1180# Miscellaneous I2C Chip support
1181#
1182# CONFIG_DS1682 is not set
1183CONFIG_SENSORS_EEPROM=m
1184CONFIG_SENSORS_PCF8574=m
1185# CONFIG_PCF8575 is not set
1186CONFIG_SENSORS_PCF8591=m
1187# CONFIG_SENSORS_MAX6875 is not set
1188# CONFIG_SENSORS_TSL2550 is not set
1189# CONFIG_I2C_DEBUG_CORE is not set
1190# CONFIG_I2C_DEBUG_ALGO is not set
1191# CONFIG_I2C_DEBUG_BUS is not set
1192# CONFIG_I2C_DEBUG_CHIP is not set
1193# CONFIG_SPI is not set
1194# CONFIG_W1 is not set
1195# CONFIG_POWER_SUPPLY is not set
1196CONFIG_HWMON=m
1197CONFIG_HWMON_VID=m
1198# CONFIG_SENSORS_AD7418 is not set
1199CONFIG_SENSORS_ADM1021=m
1200CONFIG_SENSORS_ADM1025=m
1201CONFIG_SENSORS_ADM1026=m
1202# CONFIG_SENSORS_ADM1029 is not set
1203CONFIG_SENSORS_ADM1031=m
1204# CONFIG_SENSORS_ADM9240 is not set
1205# CONFIG_SENSORS_ADT7470 is not set
1206# CONFIG_SENSORS_ADT7473 is not set
1207# CONFIG_SENSORS_ATXP1 is not set
1208CONFIG_SENSORS_DS1621=m
1209# CONFIG_SENSORS_I5K_AMB is not set
1210# CONFIG_SENSORS_F71805F is not set
1211# CONFIG_SENSORS_F71882FG is not set
1212# CONFIG_SENSORS_F75375S is not set
1213CONFIG_SENSORS_GL518SM=m
1214# CONFIG_SENSORS_GL520SM is not set
1215CONFIG_SENSORS_IT87=m
1216# CONFIG_SENSORS_LM63 is not set
1217CONFIG_SENSORS_LM75=m
1218CONFIG_SENSORS_LM77=m
1219CONFIG_SENSORS_LM78=m
1220CONFIG_SENSORS_LM80=m
1221CONFIG_SENSORS_LM83=m
1222CONFIG_SENSORS_LM85=m
1223CONFIG_SENSORS_LM87=m
1224CONFIG_SENSORS_LM90=m
1225# CONFIG_SENSORS_LM92 is not set
1226# CONFIG_SENSORS_LM93 is not set
1227CONFIG_SENSORS_MAX1619=m
1228# CONFIG_SENSORS_MAX6650 is not set
1229# CONFIG_SENSORS_PC87360 is not set
1230# CONFIG_SENSORS_PC87427 is not set
1231# CONFIG_SENSORS_SIS5595 is not set
1232# CONFIG_SENSORS_DME1737 is not set
1233CONFIG_SENSORS_SMSC47M1=m
1234# CONFIG_SENSORS_SMSC47M192 is not set
1235CONFIG_SENSORS_SMSC47B397=m
1236# CONFIG_SENSORS_ADS7828 is not set
1237# CONFIG_SENSORS_THMC50 is not set
1238CONFIG_SENSORS_VIA686A=m
1239# CONFIG_SENSORS_VT1211 is not set
1240# CONFIG_SENSORS_VT8231 is not set
1241CONFIG_SENSORS_W83781D=m
1242# CONFIG_SENSORS_W83791D is not set
1243# CONFIG_SENSORS_W83792D is not set
1244# CONFIG_SENSORS_W83793 is not set
1245CONFIG_SENSORS_W83L785TS=m
1246# CONFIG_SENSORS_W83L786NG is not set
1247CONFIG_SENSORS_W83627HF=m
1248# CONFIG_SENSORS_W83627EHF is not set
1249# CONFIG_HWMON_DEBUG_CHIP is not set
1250# CONFIG_THERMAL is not set
1251CONFIG_WATCHDOG=y
1252# CONFIG_WATCHDOG_NOWAYOUT is not set
1253
1254#
1255# Watchdog Device Drivers
1256#
1257CONFIG_SOFT_WATCHDOG=m
1258# CONFIG_MV64X60_WDT is not set
1259
1260#
1261# PCI-based Watchdog Cards
1262#
1263CONFIG_PCIPCWATCHDOG=m
1264CONFIG_WDTPCI=m
1265CONFIG_WDT_501_PCI=y
1266
1267#
1268# USB-based Watchdog Cards
1269#
1270CONFIG_USBPCWATCHDOG=m
1271
1272#
1273# Sonics Silicon Backplane
1274#
1275CONFIG_SSB_POSSIBLE=y
1276# CONFIG_SSB is not set
1277
1278#
1279# Multifunction device drivers
1280#
1281# CONFIG_MFD_SM501 is not set
1282# CONFIG_HTC_PASIC3 is not set
1283
1284#
1285# Multimedia devices
1286#
1287
1288#
1289# Multimedia core support
1290#
1291# CONFIG_VIDEO_DEV is not set
1292# CONFIG_DVB_CORE is not set
1293
1294#
1295# Multimedia drivers
1296#
1297# CONFIG_DAB is not set
1298
1299#
1300# Graphics support
1301#
1302# CONFIG_AGP is not set
1303# CONFIG_DRM is not set
1304# CONFIG_VGASTATE is not set
1305# CONFIG_VIDEO_OUTPUT_CONTROL is not set
1306# CONFIG_FB is not set
1307# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
1308
1309#
1310# Display device support
1311#
1312# CONFIG_DISPLAY_SUPPORT is not set
1313
1314#
1315# Console display driver support
1316#
1317# CONFIG_VGA_CONSOLE is not set
1318CONFIG_DUMMY_CONSOLE=y
1319
1320#
1321# Sound
1322#
1323# CONFIG_SOUND is not set
1324# CONFIG_HID_SUPPORT is not set
1325CONFIG_HID=m
1326CONFIG_USB_SUPPORT=y
1327CONFIG_USB_ARCH_HAS_HCD=y
1328CONFIG_USB_ARCH_HAS_OHCI=y
1329CONFIG_USB_ARCH_HAS_EHCI=y
1330CONFIG_USB=m
1331# CONFIG_USB_DEBUG is not set
1332# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1333
1334#
1335# Miscellaneous USB options
1336#
1337CONFIG_USB_DEVICEFS=y
1338# CONFIG_USB_DEVICE_CLASS is not set
1339# CONFIG_USB_DYNAMIC_MINORS is not set
1340CONFIG_USB_SUSPEND=y
1341# CONFIG_USB_OTG is not set
1342
1343#
1344# USB Host Controller Drivers
1345#
1346# CONFIG_USB_C67X00_HCD is not set
1347CONFIG_USB_EHCI_HCD=m
1348CONFIG_USB_EHCI_ROOT_HUB_TT=y
1349# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1350CONFIG_USB_EHCI_HCD_PPC_OF=y
1351# CONFIG_USB_ISP116X_HCD is not set
1352# CONFIG_USB_ISP1760_HCD is not set
1353CONFIG_USB_OHCI_HCD=m
1354CONFIG_USB_OHCI_HCD_PPC_OF=y
1355CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
1356# CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set
1357CONFIG_USB_OHCI_HCD_PCI=y
1358CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
1359CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
1360CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1361CONFIG_USB_UHCI_HCD=m
1362# CONFIG_USB_SL811_HCD is not set
1363# CONFIG_USB_R8A66597_HCD is not set
1364
1365#
1366# USB Device Class drivers
1367#
1368CONFIG_USB_ACM=m
1369CONFIG_USB_PRINTER=m
1370
1371#
1372# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1373#
1374
1375#
1376# may also be needed; see USB_STORAGE Help for more information
1377#
1378CONFIG_USB_STORAGE=m
1379# CONFIG_USB_STORAGE_DEBUG is not set
1380CONFIG_USB_STORAGE_DATAFAB=y
1381CONFIG_USB_STORAGE_FREECOM=y
1382CONFIG_USB_STORAGE_ISD200=y
1383CONFIG_USB_STORAGE_DPCM=y
1384# CONFIG_USB_STORAGE_USBAT is not set
1385CONFIG_USB_STORAGE_SDDR09=y
1386CONFIG_USB_STORAGE_SDDR55=y
1387CONFIG_USB_STORAGE_JUMPSHOT=y
1388# CONFIG_USB_STORAGE_ALAUDA is not set
1389# CONFIG_USB_STORAGE_ONETOUCH is not set
1390# CONFIG_USB_STORAGE_KARMA is not set
1391# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1392# CONFIG_USB_LIBUSUAL is not set
1393
1394#
1395# USB Imaging devices
1396#
1397CONFIG_USB_MDC800=m
1398CONFIG_USB_MICROTEK=m
1399CONFIG_USB_MON=y
1400
1401#
1402# USB port drivers
1403#
1404CONFIG_USB_SERIAL=m
1405CONFIG_USB_EZUSB=y
1406CONFIG_USB_SERIAL_GENERIC=y
1407# CONFIG_USB_SERIAL_AIRCABLE is not set
1408# CONFIG_USB_SERIAL_AIRPRIME is not set
1409# CONFIG_USB_SERIAL_ARK3116 is not set
1410CONFIG_USB_SERIAL_BELKIN=m
1411# CONFIG_USB_SERIAL_CH341 is not set
1412CONFIG_USB_SERIAL_WHITEHEAT=m
1413CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m
1414# CONFIG_USB_SERIAL_CP2101 is not set
1415# CONFIG_USB_SERIAL_CYPRESS_M8 is not set
1416CONFIG_USB_SERIAL_EMPEG=m
1417CONFIG_USB_SERIAL_FTDI_SIO=m
1418# CONFIG_USB_SERIAL_FUNSOFT is not set
1419CONFIG_USB_SERIAL_VISOR=m
1420CONFIG_USB_SERIAL_IPAQ=m
1421CONFIG_USB_SERIAL_IR=m
1422CONFIG_USB_SERIAL_EDGEPORT=m
1423CONFIG_USB_SERIAL_EDGEPORT_TI=m
1424# CONFIG_USB_SERIAL_GARMIN is not set
1425# CONFIG_USB_SERIAL_IPW is not set
1426# CONFIG_USB_SERIAL_IUU is not set
1427CONFIG_USB_SERIAL_KEYSPAN_PDA=m
1428CONFIG_USB_SERIAL_KEYSPAN=m
1429CONFIG_USB_SERIAL_KEYSPAN_MPR=y
1430CONFIG_USB_SERIAL_KEYSPAN_USA28=y
1431CONFIG_USB_SERIAL_KEYSPAN_USA28X=y
1432CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y
1433CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y
1434CONFIG_USB_SERIAL_KEYSPAN_USA19=y
1435CONFIG_USB_SERIAL_KEYSPAN_USA18X=y
1436CONFIG_USB_SERIAL_KEYSPAN_USA19W=y
1437CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y
1438CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y
1439CONFIG_USB_SERIAL_KEYSPAN_USA49W=y
1440CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y
1441CONFIG_USB_SERIAL_KLSI=m
1442CONFIG_USB_SERIAL_KOBIL_SCT=m
1443CONFIG_USB_SERIAL_MCT_U232=m
1444# CONFIG_USB_SERIAL_MOS7720 is not set
1445# CONFIG_USB_SERIAL_MOS7840 is not set
1446# CONFIG_USB_SERIAL_NAVMAN is not set
1447CONFIG_USB_SERIAL_PL2303=m
1448# CONFIG_USB_SERIAL_OTI6858 is not set
1449# CONFIG_USB_SERIAL_SPCP8X5 is not set
1450# CONFIG_USB_SERIAL_HP4X is not set
1451CONFIG_USB_SERIAL_SAFE=m
1452CONFIG_USB_SERIAL_SAFE_PADDED=y
1453# CONFIG_USB_SERIAL_SIERRAWIRELESS is not set
1454# CONFIG_USB_SERIAL_TI is not set
1455CONFIG_USB_SERIAL_CYBERJACK=m
1456CONFIG_USB_SERIAL_XIRCOM=m
1457# CONFIG_USB_SERIAL_OPTION is not set
1458CONFIG_USB_SERIAL_OMNINET=m
1459# CONFIG_USB_SERIAL_DEBUG is not set
1460
1461#
1462# USB Miscellaneous drivers
1463#
1464CONFIG_USB_EMI62=m
1465# CONFIG_USB_EMI26 is not set
1466# CONFIG_USB_ADUTUX is not set
1467CONFIG_USB_AUERSWALD=m
1468CONFIG_USB_RIO500=m
1469CONFIG_USB_LEGOTOWER=m
1470CONFIG_USB_LCD=m
1471# CONFIG_USB_BERRY_CHARGE is not set
1472CONFIG_USB_LED=m
1473# CONFIG_USB_CYPRESS_CY7C63 is not set
1474# CONFIG_USB_CYTHERM is not set
1475# CONFIG_USB_PHIDGET is not set
1476# CONFIG_USB_IDMOUSE is not set
1477# CONFIG_USB_FTDI_ELAN is not set
1478# CONFIG_USB_APPLEDISPLAY is not set
1479# CONFIG_USB_SISUSBVGA is not set
1480# CONFIG_USB_LD is not set
1481# CONFIG_USB_TRANCEVIBRATOR is not set
1482# CONFIG_USB_IOWARRIOR is not set
1483CONFIG_USB_TEST=m
1484CONFIG_USB_ATM=m
1485CONFIG_USB_SPEEDTOUCH=m
1486# CONFIG_USB_CXACRU is not set
1487# CONFIG_USB_UEAGLEATM is not set
1488# CONFIG_USB_XUSBATM is not set
1489# CONFIG_USB_GADGET is not set
1490# CONFIG_MMC is not set
1491# CONFIG_MEMSTICK is not set
1492# CONFIG_NEW_LEDS is not set
1493# CONFIG_ACCESSIBILITY is not set
1494CONFIG_INFINIBAND=m
1495CONFIG_INFINIBAND_USER_MAD=m
1496CONFIG_INFINIBAND_USER_ACCESS=m
1497CONFIG_INFINIBAND_USER_MEM=y
1498CONFIG_INFINIBAND_ADDR_TRANS=y
1499CONFIG_INFINIBAND_MTHCA=m
1500CONFIG_INFINIBAND_MTHCA_DEBUG=y
1501CONFIG_INFINIBAND_AMSO1100=m
1502# CONFIG_INFINIBAND_AMSO1100_DEBUG is not set
1503# CONFIG_MLX4_INFINIBAND is not set
1504# CONFIG_INFINIBAND_NES is not set
1505CONFIG_INFINIBAND_IPOIB=m
1506CONFIG_INFINIBAND_IPOIB_CM=y
1507CONFIG_INFINIBAND_IPOIB_DEBUG=y
1508# CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set
1509CONFIG_INFINIBAND_SRP=m
1510# CONFIG_INFINIBAND_ISER is not set
1511# CONFIG_EDAC is not set
1512# CONFIG_RTC_CLASS is not set
1513CONFIG_DMADEVICES=y
1514
1515#
1516# DMA Devices
1517#
1518# CONFIG_FSL_DMA is not set
1519# CONFIG_UIO is not set
1520
1521#
1522# File systems
1523#
1524# CONFIG_EXT2_FS is not set
1525CONFIG_EXT3_FS=m
1526CONFIG_EXT3_FS_XATTR=y
1527CONFIG_EXT3_FS_POSIX_ACL=y
1528CONFIG_EXT3_FS_SECURITY=y
1529# CONFIG_EXT4DEV_FS is not set
1530CONFIG_JBD=m
1531CONFIG_FS_MBCACHE=m
1532# CONFIG_REISERFS_FS is not set
1533# CONFIG_JFS_FS is not set
1534CONFIG_FS_POSIX_ACL=y
1535# CONFIG_XFS_FS is not set
1536# CONFIG_OCFS2_FS is not set
1537CONFIG_DNOTIFY=y
1538CONFIG_INOTIFY=y
1539CONFIG_INOTIFY_USER=y
1540CONFIG_QUOTA=y
1541# CONFIG_QUOTA_NETLINK_INTERFACE is not set
1542CONFIG_PRINT_QUOTA_WARNING=y
1543# CONFIG_QFMT_V1 is not set
1544CONFIG_QFMT_V2=y
1545CONFIG_QUOTACTL=y
1546# CONFIG_AUTOFS_FS is not set
1547CONFIG_AUTOFS4_FS=m
1548# CONFIG_FUSE_FS is not set
1549
1550#
1551# CD-ROM/DVD Filesystems
1552#
1553# CONFIG_ISO9660_FS is not set
1554CONFIG_UDF_FS=m
1555CONFIG_UDF_NLS=y
1556
1557#
1558# DOS/FAT/NT Filesystems
1559#
1560CONFIG_FAT_FS=m
1561CONFIG_MSDOS_FS=m
1562CONFIG_VFAT_FS=m
1563CONFIG_FAT_DEFAULT_CODEPAGE=437
1564CONFIG_FAT_DEFAULT_IOCHARSET="ascii"
1565# CONFIG_NTFS_FS is not set
1566
1567#
1568# Pseudo filesystems
1569#
1570CONFIG_PROC_FS=y
1571CONFIG_PROC_KCORE=y
1572CONFIG_PROC_SYSCTL=y
1573CONFIG_SYSFS=y
1574CONFIG_TMPFS=y
1575# CONFIG_TMPFS_POSIX_ACL is not set
1576# CONFIG_HUGETLB_PAGE is not set
1577# CONFIG_CONFIGFS_FS is not set
1578
1579#
1580# Miscellaneous filesystems
1581#
1582# CONFIG_ADFS_FS is not set
1583# CONFIG_AFFS_FS is not set
1584# CONFIG_ECRYPT_FS is not set
1585CONFIG_HFS_FS=m
1586CONFIG_HFSPLUS_FS=m
1587# CONFIG_BEFS_FS is not set
1588# CONFIG_BFS_FS is not set
1589# CONFIG_EFS_FS is not set
1590CONFIG_JFFS2_FS=y
1591CONFIG_JFFS2_FS_DEBUG=0
1592CONFIG_JFFS2_FS_WRITEBUFFER=y
1593# CONFIG_JFFS2_FS_WBUF_VERIFY is not set
1594# CONFIG_JFFS2_SUMMARY is not set
1595# CONFIG_JFFS2_FS_XATTR is not set
1596# CONFIG_JFFS2_COMPRESSION_OPTIONS is not set
1597CONFIG_JFFS2_ZLIB=y
1598# CONFIG_JFFS2_LZO is not set
1599CONFIG_JFFS2_RTIME=y
1600# CONFIG_JFFS2_RUBIN is not set
1601CONFIG_CRAMFS=m
1602CONFIG_VXFS_FS=m
1603# CONFIG_MINIX_FS is not set
1604# CONFIG_HPFS_FS is not set
1605# CONFIG_QNX4FS_FS is not set
1606# CONFIG_ROMFS_FS is not set
1607# CONFIG_SYSV_FS is not set
1608# CONFIG_UFS_FS is not set
1609CONFIG_NETWORK_FILESYSTEMS=y
1610CONFIG_NFS_FS=y
1611CONFIG_NFS_V3=y
1612CONFIG_NFS_V3_ACL=y
1613CONFIG_NFS_V4=y
1614# CONFIG_NFSD is not set
1615CONFIG_ROOT_NFS=y
1616CONFIG_LOCKD=y
1617CONFIG_LOCKD_V4=y
1618CONFIG_NFS_ACL_SUPPORT=y
1619CONFIG_NFS_COMMON=y
1620CONFIG_SUNRPC=y
1621CONFIG_SUNRPC_GSS=y
1622CONFIG_SUNRPC_XPRT_RDMA=m
1623# CONFIG_SUNRPC_BIND34 is not set
1624CONFIG_RPCSEC_GSS_KRB5=y
1625CONFIG_RPCSEC_GSS_SPKM3=m
1626# CONFIG_SMB_FS is not set
1627CONFIG_CIFS=m
1628# CONFIG_CIFS_STATS is not set
1629# CONFIG_CIFS_WEAK_PW_HASH is not set
1630CONFIG_CIFS_XATTR=y
1631CONFIG_CIFS_POSIX=y
1632# CONFIG_CIFS_DEBUG2 is not set
1633# CONFIG_CIFS_EXPERIMENTAL is not set
1634# CONFIG_NCP_FS is not set
1635# CONFIG_CODA_FS is not set
1636# CONFIG_AFS_FS is not set
1637
1638#
1639# Partition Types
1640#
1641CONFIG_PARTITION_ADVANCED=y
1642# CONFIG_ACORN_PARTITION is not set
1643CONFIG_OSF_PARTITION=y
1644# CONFIG_AMIGA_PARTITION is not set
1645# CONFIG_ATARI_PARTITION is not set
1646CONFIG_MAC_PARTITION=y
1647CONFIG_MSDOS_PARTITION=y
1648CONFIG_BSD_DISKLABEL=y
1649CONFIG_MINIX_SUBPARTITION=y
1650CONFIG_SOLARIS_X86_PARTITION=y
1651CONFIG_UNIXWARE_DISKLABEL=y
1652# CONFIG_LDM_PARTITION is not set
1653CONFIG_SGI_PARTITION=y
1654# CONFIG_ULTRIX_PARTITION is not set
1655CONFIG_SUN_PARTITION=y
1656# CONFIG_KARMA_PARTITION is not set
1657CONFIG_EFI_PARTITION=y
1658# CONFIG_SYSV68_PARTITION is not set
1659CONFIG_NLS=y
1660CONFIG_NLS_DEFAULT="utf8"
1661CONFIG_NLS_CODEPAGE_437=y
1662CONFIG_NLS_CODEPAGE_737=m
1663CONFIG_NLS_CODEPAGE_775=m
1664CONFIG_NLS_CODEPAGE_850=m
1665CONFIG_NLS_CODEPAGE_852=m
1666CONFIG_NLS_CODEPAGE_855=m
1667CONFIG_NLS_CODEPAGE_857=m
1668CONFIG_NLS_CODEPAGE_860=m
1669CONFIG_NLS_CODEPAGE_861=m
1670CONFIG_NLS_CODEPAGE_862=m
1671CONFIG_NLS_CODEPAGE_863=m
1672CONFIG_NLS_CODEPAGE_864=m
1673CONFIG_NLS_CODEPAGE_865=m
1674CONFIG_NLS_CODEPAGE_866=m
1675CONFIG_NLS_CODEPAGE_869=m
1676CONFIG_NLS_CODEPAGE_936=m
1677CONFIG_NLS_CODEPAGE_950=m
1678CONFIG_NLS_CODEPAGE_932=m
1679CONFIG_NLS_CODEPAGE_949=m
1680CONFIG_NLS_CODEPAGE_874=m
1681CONFIG_NLS_ISO8859_8=m
1682CONFIG_NLS_CODEPAGE_1250=m
1683CONFIG_NLS_CODEPAGE_1251=m
1684CONFIG_NLS_ASCII=y
1685CONFIG_NLS_ISO8859_1=m
1686CONFIG_NLS_ISO8859_2=m
1687CONFIG_NLS_ISO8859_3=m
1688CONFIG_NLS_ISO8859_4=m
1689CONFIG_NLS_ISO8859_5=m
1690CONFIG_NLS_ISO8859_6=m
1691CONFIG_NLS_ISO8859_7=m
1692CONFIG_NLS_ISO8859_9=m
1693CONFIG_NLS_ISO8859_13=m
1694CONFIG_NLS_ISO8859_14=m
1695CONFIG_NLS_ISO8859_15=m
1696CONFIG_NLS_KOI8_R=m
1697CONFIG_NLS_KOI8_U=m
1698CONFIG_NLS_UTF8=m
1699# CONFIG_DLM is not set
1700
1701#
1702# Library routines
1703#
1704CONFIG_BITREVERSE=y
1705# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1706CONFIG_CRC_CCITT=m
1707# CONFIG_CRC16 is not set
1708CONFIG_CRC_ITU_T=m
1709CONFIG_CRC32=y
1710# CONFIG_CRC7 is not set
1711CONFIG_LIBCRC32C=m
1712CONFIG_ZLIB_INFLATE=y
1713CONFIG_ZLIB_DEFLATE=y
1714CONFIG_PLIST=y
1715CONFIG_HAS_IOMEM=y
1716CONFIG_HAS_IOPORT=y
1717CONFIG_HAS_DMA=y
1718CONFIG_CHECK_SIGNATURE=y
1719CONFIG_HAVE_LMB=y
1720
1721#
1722# Kernel hacking
1723#
1724# CONFIG_PRINTK_TIME is not set
1725CONFIG_ENABLE_WARN_DEPRECATED=y
1726CONFIG_ENABLE_MUST_CHECK=y
1727CONFIG_FRAME_WARN=1024
1728CONFIG_MAGIC_SYSRQ=y
1729# CONFIG_UNUSED_SYMBOLS is not set
1730# CONFIG_DEBUG_FS is not set
1731# CONFIG_HEADERS_CHECK is not set
1732CONFIG_DEBUG_KERNEL=y
1733# CONFIG_DEBUG_SHIRQ is not set
1734CONFIG_DETECT_SOFTLOCKUP=y
1735CONFIG_SCHED_DEBUG=y
1736# CONFIG_SCHEDSTATS is not set
1737# CONFIG_TIMER_STATS is not set
1738# CONFIG_DEBUG_OBJECTS is not set
1739# CONFIG_SLUB_DEBUG_ON is not set
1740# CONFIG_SLUB_STATS is not set
1741# CONFIG_DEBUG_RT_MUTEXES is not set
1742# CONFIG_RT_MUTEX_TESTER is not set
1743CONFIG_DEBUG_SPINLOCK=y
1744# CONFIG_DEBUG_MUTEXES is not set
1745CONFIG_DEBUG_SPINLOCK_SLEEP=y
1746# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1747# CONFIG_DEBUG_KOBJECT is not set
1748CONFIG_DEBUG_HIGHMEM=y
1749CONFIG_DEBUG_BUGVERBOSE=y
1750CONFIG_DEBUG_INFO=y
1751# CONFIG_DEBUG_VM is not set
1752# CONFIG_DEBUG_WRITECOUNT is not set
1753# CONFIG_DEBUG_LIST is not set
1754# CONFIG_DEBUG_SG is not set
1755# CONFIG_BOOT_PRINTK_DELAY is not set
1756# CONFIG_RCU_TORTURE_TEST is not set
1757# CONFIG_KPROBES_SANITY_TEST is not set
1758# CONFIG_BACKTRACE_SELF_TEST is not set
1759# CONFIG_LKDTM is not set
1760# CONFIG_FAULT_INJECTION is not set
1761# CONFIG_SAMPLES is not set
1762CONFIG_DEBUG_STACKOVERFLOW=y
1763CONFIG_DEBUG_STACK_USAGE=y
1764# CONFIG_DEBUG_PAGEALLOC is not set
1765# CONFIG_DEBUGGER is not set
1766# CONFIG_IRQSTACKS is not set
1767# CONFIG_BDI_SWITCH is not set
1768CONFIG_BOOTX_TEXT=y
1769# CONFIG_PPC_EARLY_DEBUG is not set
1770
1771#
1772# Security options
1773#
1774CONFIG_KEYS=y
1775CONFIG_KEYS_DEBUG_PROC_KEYS=y
1776CONFIG_SECURITY=y
1777CONFIG_SECURITY_NETWORK=y
1778# CONFIG_SECURITY_NETWORK_XFRM is not set
1779CONFIG_SECURITY_CAPABILITIES=y
1780# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1781CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0
1782CONFIG_SECURITY_SELINUX=y
1783CONFIG_SECURITY_SELINUX_BOOTPARAM=y
1784CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1
1785CONFIG_SECURITY_SELINUX_DISABLE=y
1786CONFIG_SECURITY_SELINUX_DEVELOP=y
1787CONFIG_SECURITY_SELINUX_AVC_STATS=y
1788CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1
1789# CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set
1790# CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set
1791CONFIG_CRYPTO=y
1792
1793#
1794# Crypto core or helper
1795#
1796CONFIG_CRYPTO_ALGAPI=y
1797CONFIG_CRYPTO_AEAD=m
1798CONFIG_CRYPTO_BLKCIPHER=y
1799CONFIG_CRYPTO_HASH=y
1800CONFIG_CRYPTO_MANAGER=y
1801# CONFIG_CRYPTO_GF128MUL is not set
1802CONFIG_CRYPTO_NULL=m
1803# CONFIG_CRYPTO_CRYPTD is not set
1804CONFIG_CRYPTO_AUTHENC=m
1805# CONFIG_CRYPTO_TEST is not set
1806
1807#
1808# Authenticated Encryption with Associated Data
1809#
1810# CONFIG_CRYPTO_CCM is not set
1811# CONFIG_CRYPTO_GCM is not set
1812# CONFIG_CRYPTO_SEQIV is not set
1813
1814#
1815# Block modes
1816#
1817CONFIG_CRYPTO_CBC=y
1818# CONFIG_CRYPTO_CTR is not set
1819# CONFIG_CRYPTO_CTS is not set
1820CONFIG_CRYPTO_ECB=m
1821# CONFIG_CRYPTO_LRW is not set
1822# CONFIG_CRYPTO_PCBC is not set
1823# CONFIG_CRYPTO_XTS is not set
1824
1825#
1826# Hash modes
1827#
1828CONFIG_CRYPTO_HMAC=y
1829# CONFIG_CRYPTO_XCBC is not set
1830
1831#
1832# Digest
1833#
1834CONFIG_CRYPTO_CRC32C=m
1835CONFIG_CRYPTO_MD4=m
1836CONFIG_CRYPTO_MD5=y
1837CONFIG_CRYPTO_MICHAEL_MIC=m
1838CONFIG_CRYPTO_SHA1=y
1839CONFIG_CRYPTO_SHA256=m
1840CONFIG_CRYPTO_SHA512=m
1841# CONFIG_CRYPTO_TGR192 is not set
1842CONFIG_CRYPTO_WP512=m
1843
1844#
1845# Ciphers
1846#
1847CONFIG_CRYPTO_AES=m
1848# CONFIG_CRYPTO_ANUBIS is not set
1849CONFIG_CRYPTO_ARC4=m
1850CONFIG_CRYPTO_BLOWFISH=m
1851# CONFIG_CRYPTO_CAMELLIA is not set
1852CONFIG_CRYPTO_CAST5=m
1853CONFIG_CRYPTO_CAST6=m
1854CONFIG_CRYPTO_DES=y
1855# CONFIG_CRYPTO_FCRYPT is not set
1856CONFIG_CRYPTO_KHAZAD=m
1857# CONFIG_CRYPTO_SALSA20 is not set
1858# CONFIG_CRYPTO_SEED is not set
1859CONFIG_CRYPTO_SERPENT=m
1860CONFIG_CRYPTO_TEA=m
1861CONFIG_CRYPTO_TWOFISH=m
1862CONFIG_CRYPTO_TWOFISH_COMMON=m
1863
1864#
1865# Compression
1866#
1867CONFIG_CRYPTO_DEFLATE=m
1868# CONFIG_CRYPTO_LZO is not set
1869CONFIG_CRYPTO_HW=y
1870# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1871# CONFIG_PPC_CLOCK is not set
1872# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/mpc8536_ds_defconfig b/arch/powerpc/configs/mpc8536_ds_defconfig
new file mode 100644
index 000000000000..f1e2931de5da
--- /dev/null
+++ b/arch/powerpc/configs/mpc8536_ds_defconfig
@@ -0,0 +1,1637 @@
1#
2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.26-rc8
4# Wed Jul 2 01:34:26 2008
5#
6# CONFIG_PPC64 is not set
7
8#
9# Processor support
10#
11# CONFIG_6xx is not set
12CONFIG_PPC_85xx=y
13# CONFIG_PPC_8xx is not set
14# CONFIG_40x is not set
15# CONFIG_44x is not set
16# CONFIG_E200 is not set
17CONFIG_E500=y
18# CONFIG_PPC_E500MC is not set
19CONFIG_BOOKE=y
20CONFIG_FSL_BOOKE=y
21CONFIG_FSL_EMB_PERFMON=y
22# CONFIG_PHYS_64BIT is not set
23CONFIG_SPE=y
24# CONFIG_PPC_MM_SLICES is not set
25CONFIG_PPC32=y
26CONFIG_WORD_SIZE=32
27CONFIG_PPC_MERGE=y
28CONFIG_MMU=y
29CONFIG_GENERIC_CMOS_UPDATE=y
30CONFIG_GENERIC_TIME=y
31CONFIG_GENERIC_TIME_VSYSCALL=y
32CONFIG_GENERIC_CLOCKEVENTS=y
33CONFIG_GENERIC_HARDIRQS=y
34# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
35CONFIG_IRQ_PER_CPU=y
36CONFIG_STACKTRACE_SUPPORT=y
37CONFIG_LOCKDEP_SUPPORT=y
38CONFIG_RWSEM_XCHGADD_ALGORITHM=y
39CONFIG_ARCH_HAS_ILOG2_U32=y
40CONFIG_GENERIC_HWEIGHT=y
41CONFIG_GENERIC_CALIBRATE_DELAY=y
42CONFIG_GENERIC_FIND_NEXT_BIT=y
43# CONFIG_ARCH_NO_VIRT_TO_BUS is not set
44CONFIG_PPC=y
45CONFIG_EARLY_PRINTK=y
46CONFIG_GENERIC_NVRAM=y
47CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y
48CONFIG_ARCH_MAY_HAVE_PC_FDC=y
49CONFIG_PPC_OF=y
50CONFIG_OF=y
51CONFIG_PPC_UDBG_16550=y
52# CONFIG_GENERIC_TBSYNC is not set
53CONFIG_AUDIT_ARCH=y
54CONFIG_GENERIC_BUG=y
55CONFIG_DEFAULT_UIMAGE=y
56# CONFIG_PPC_DCR_NATIVE is not set
57# CONFIG_PPC_DCR_MMIO is not set
58CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config"
59
60#
61# General setup
62#
63CONFIG_EXPERIMENTAL=y
64CONFIG_BROKEN_ON_SMP=y
65CONFIG_INIT_ENV_ARG_LIMIT=32
66CONFIG_LOCALVERSION=""
67CONFIG_LOCALVERSION_AUTO=y
68CONFIG_SWAP=y
69CONFIG_SYSVIPC=y
70CONFIG_SYSVIPC_SYSCTL=y
71CONFIG_POSIX_MQUEUE=y
72CONFIG_BSD_PROCESS_ACCT=y
73# CONFIG_BSD_PROCESS_ACCT_V3 is not set
74# CONFIG_TASKSTATS is not set
75CONFIG_AUDIT=y
76# CONFIG_AUDITSYSCALL is not set
77CONFIG_IKCONFIG=y
78CONFIG_IKCONFIG_PROC=y
79CONFIG_LOG_BUF_SHIFT=14
80# CONFIG_CGROUPS is not set
81CONFIG_GROUP_SCHED=y
82# CONFIG_FAIR_GROUP_SCHED is not set
83# CONFIG_RT_GROUP_SCHED is not set
84CONFIG_USER_SCHED=y
85# CONFIG_CGROUP_SCHED is not set
86CONFIG_SYSFS_DEPRECATED=y
87CONFIG_SYSFS_DEPRECATED_V2=y
88# CONFIG_RELAY is not set
89# CONFIG_NAMESPACES is not set
90CONFIG_BLK_DEV_INITRD=y
91CONFIG_INITRAMFS_SOURCE=""
92# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
93CONFIG_SYSCTL=y
94CONFIG_EMBEDDED=y
95CONFIG_SYSCTL_SYSCALL=y
96CONFIG_SYSCTL_SYSCALL_CHECK=y
97CONFIG_KALLSYMS=y
98CONFIG_KALLSYMS_ALL=y
99CONFIG_KALLSYMS_EXTRA_PASS=y
100CONFIG_HOTPLUG=y
101CONFIG_PRINTK=y
102CONFIG_BUG=y
103CONFIG_ELF_CORE=y
104CONFIG_COMPAT_BRK=y
105CONFIG_BASE_FULL=y
106CONFIG_FUTEX=y
107CONFIG_ANON_INODES=y
108CONFIG_EPOLL=y
109CONFIG_SIGNALFD=y
110CONFIG_TIMERFD=y
111CONFIG_EVENTFD=y
112CONFIG_SHMEM=y
113CONFIG_VM_EVENT_COUNTERS=y
114CONFIG_SLUB_DEBUG=y
115# CONFIG_SLAB is not set
116CONFIG_SLUB=y
117# CONFIG_SLOB is not set
118# CONFIG_PROFILING is not set
119# CONFIG_MARKERS is not set
120CONFIG_HAVE_OPROFILE=y
121# CONFIG_KPROBES is not set
122CONFIG_HAVE_KPROBES=y
123CONFIG_HAVE_KRETPROBES=y
124# CONFIG_HAVE_DMA_ATTRS is not set
125CONFIG_PROC_PAGE_MONITOR=y
126CONFIG_SLABINFO=y
127CONFIG_RT_MUTEXES=y
128# CONFIG_TINY_SHMEM is not set
129CONFIG_BASE_SMALL=0
130CONFIG_MODULES=y
131# CONFIG_MODULE_FORCE_LOAD is not set
132CONFIG_MODULE_UNLOAD=y
133CONFIG_MODULE_FORCE_UNLOAD=y
134CONFIG_MODVERSIONS=y
135# CONFIG_MODULE_SRCVERSION_ALL is not set
136CONFIG_KMOD=y
137CONFIG_BLOCK=y
138CONFIG_LBD=y
139# CONFIG_BLK_DEV_IO_TRACE is not set
140# CONFIG_LSF is not set
141# CONFIG_BLK_DEV_BSG is not set
142
143#
144# IO Schedulers
145#
146CONFIG_IOSCHED_NOOP=y
147CONFIG_IOSCHED_AS=y
148CONFIG_IOSCHED_DEADLINE=y
149CONFIG_IOSCHED_CFQ=y
150# CONFIG_DEFAULT_AS is not set
151# CONFIG_DEFAULT_DEADLINE is not set
152CONFIG_DEFAULT_CFQ=y
153# CONFIG_DEFAULT_NOOP is not set
154CONFIG_DEFAULT_IOSCHED="cfq"
155CONFIG_CLASSIC_RCU=y
156
157#
158# Platform support
159#
160# CONFIG_PPC_MPC512x is not set
161# CONFIG_PPC_MPC5121 is not set
162# CONFIG_PPC_CELL is not set
163# CONFIG_PPC_CELL_NATIVE is not set
164# CONFIG_PQ2ADS is not set
165CONFIG_MPC85xx=y
166# CONFIG_MPC8540_ADS is not set
167# CONFIG_MPC8560_ADS is not set
168# CONFIG_MPC85xx_CDS is not set
169# CONFIG_MPC85xx_MDS is not set
170CONFIG_MPC8536_DS=y
171# CONFIG_MPC85xx_DS is not set
172# CONFIG_KSI8560 is not set
173# CONFIG_STX_GP3 is not set
174# CONFIG_TQM8540 is not set
175# CONFIG_TQM8541 is not set
176# CONFIG_TQM8548 is not set
177# CONFIG_TQM8555 is not set
178# CONFIG_TQM8560 is not set
179# CONFIG_SBC8548 is not set
180# CONFIG_SBC8560 is not set
181# CONFIG_IPIC is not set
182CONFIG_MPIC=y
183# CONFIG_MPIC_WEIRD is not set
184# CONFIG_PPC_I8259 is not set
185# CONFIG_PPC_RTAS is not set
186# CONFIG_MMIO_NVRAM is not set
187# CONFIG_PPC_MPC106 is not set
188# CONFIG_PPC_970_NAP is not set
189# CONFIG_PPC_INDIRECT_IO is not set
190# CONFIG_GENERIC_IOMAP is not set
191# CONFIG_CPU_FREQ is not set
192# CONFIG_CPM2 is not set
193# CONFIG_FSL_ULI1575 is not set
194
195#
196# Kernel options
197#
198CONFIG_HIGHMEM=y
199CONFIG_TICK_ONESHOT=y
200CONFIG_NO_HZ=y
201CONFIG_HIGH_RES_TIMERS=y
202CONFIG_GENERIC_CLOCKEVENTS_BUILD=y
203# CONFIG_HZ_100 is not set
204CONFIG_HZ_250=y
205# CONFIG_HZ_300 is not set
206# CONFIG_HZ_1000 is not set
207CONFIG_HZ=250
208# CONFIG_SCHED_HRTICK is not set
209CONFIG_PREEMPT_NONE=y
210# CONFIG_PREEMPT_VOLUNTARY is not set
211# CONFIG_PREEMPT is not set
212CONFIG_BINFMT_ELF=y
213CONFIG_BINFMT_MISC=m
214CONFIG_MATH_EMULATION=y
215# CONFIG_IOMMU_HELPER is not set
216CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y
217CONFIG_ARCH_HAS_WALK_MEMORY=y
218CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y
219CONFIG_ARCH_FLATMEM_ENABLE=y
220CONFIG_ARCH_POPULATES_NODE_MAP=y
221CONFIG_SELECT_MEMORY_MODEL=y
222CONFIG_FLATMEM_MANUAL=y
223# CONFIG_DISCONTIGMEM_MANUAL is not set
224# CONFIG_SPARSEMEM_MANUAL is not set
225CONFIG_FLATMEM=y
226CONFIG_FLAT_NODE_MEM_MAP=y
227# CONFIG_SPARSEMEM_STATIC is not set
228# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
229CONFIG_PAGEFLAGS_EXTENDED=y
230CONFIG_SPLIT_PTLOCK_CPUS=4
231# CONFIG_RESOURCES_64BIT is not set
232CONFIG_ZONE_DMA_FLAG=1
233CONFIG_BOUNCE=y
234CONFIG_VIRT_TO_BUS=y
235CONFIG_FORCE_MAX_ZONEORDER=11
236CONFIG_PROC_DEVICETREE=y
237# CONFIG_CMDLINE_BOOL is not set
238# CONFIG_PM is not set
239CONFIG_SECCOMP=y
240CONFIG_ISA_DMA_API=y
241
242#
243# Bus options
244#
245CONFIG_ZONE_DMA=y
246CONFIG_PPC_INDIRECT_PCI=y
247CONFIG_FSL_SOC=y
248CONFIG_FSL_PCI=y
249CONFIG_PCI=y
250CONFIG_PCI_DOMAINS=y
251CONFIG_PCI_SYSCALL=y
252# CONFIG_PCIEPORTBUS is not set
253CONFIG_ARCH_SUPPORTS_MSI=y
254# CONFIG_PCI_MSI is not set
255CONFIG_PCI_LEGACY=y
256# CONFIG_PCI_DEBUG is not set
257# CONFIG_PCCARD is not set
258# CONFIG_HOTPLUG_PCI is not set
259# CONFIG_HAS_RAPIDIO is not set
260
261#
262# Advanced setup
263#
264# CONFIG_ADVANCED_OPTIONS is not set
265
266#
267# Default settings for advanced configuration options are used
268#
269CONFIG_LOWMEM_SIZE=0x30000000
270CONFIG_PAGE_OFFSET=0xc0000000
271CONFIG_KERNEL_START=0xc0000000
272CONFIG_PHYSICAL_START=0x00000000
273CONFIG_PHYSICAL_ALIGN=0x10000000
274CONFIG_TASK_SIZE=0xc0000000
275
276#
277# Networking
278#
279CONFIG_NET=y
280
281#
282# Networking options
283#
284CONFIG_PACKET=y
285# CONFIG_PACKET_MMAP is not set
286CONFIG_UNIX=y
287CONFIG_XFRM=y
288CONFIG_XFRM_USER=y
289# CONFIG_XFRM_SUB_POLICY is not set
290# CONFIG_XFRM_MIGRATE is not set
291# CONFIG_XFRM_STATISTICS is not set
292CONFIG_NET_KEY=m
293# CONFIG_NET_KEY_MIGRATE is not set
294CONFIG_INET=y
295CONFIG_IP_MULTICAST=y
296CONFIG_IP_ADVANCED_ROUTER=y
297CONFIG_ASK_IP_FIB_HASH=y
298# CONFIG_IP_FIB_TRIE is not set
299CONFIG_IP_FIB_HASH=y
300CONFIG_IP_MULTIPLE_TABLES=y
301CONFIG_IP_ROUTE_MULTIPATH=y
302CONFIG_IP_ROUTE_VERBOSE=y
303CONFIG_IP_PNP=y
304CONFIG_IP_PNP_DHCP=y
305CONFIG_IP_PNP_BOOTP=y
306CONFIG_IP_PNP_RARP=y
307CONFIG_NET_IPIP=y
308CONFIG_NET_IPGRE=y
309CONFIG_NET_IPGRE_BROADCAST=y
310CONFIG_IP_MROUTE=y
311CONFIG_IP_PIMSM_V1=y
312CONFIG_IP_PIMSM_V2=y
313CONFIG_ARPD=y
314# CONFIG_SYN_COOKIES is not set
315# CONFIG_INET_AH is not set
316# CONFIG_INET_ESP is not set
317# CONFIG_INET_IPCOMP is not set
318# CONFIG_INET_XFRM_TUNNEL is not set
319CONFIG_INET_TUNNEL=y
320# CONFIG_INET_XFRM_MODE_TRANSPORT is not set
321# CONFIG_INET_XFRM_MODE_TUNNEL is not set
322# CONFIG_INET_XFRM_MODE_BEET is not set
323# CONFIG_INET_LRO is not set
324CONFIG_INET_DIAG=y
325CONFIG_INET_TCP_DIAG=y
326# CONFIG_TCP_CONG_ADVANCED is not set
327CONFIG_TCP_CONG_CUBIC=y
328CONFIG_DEFAULT_TCP_CONG="cubic"
329# CONFIG_TCP_MD5SIG is not set
330CONFIG_IPV6=y
331# CONFIG_IPV6_PRIVACY is not set
332# CONFIG_IPV6_ROUTER_PREF is not set
333# CONFIG_IPV6_OPTIMISTIC_DAD is not set
334# CONFIG_INET6_AH is not set
335# CONFIG_INET6_ESP is not set
336# CONFIG_INET6_IPCOMP is not set
337# CONFIG_IPV6_MIP6 is not set
338# CONFIG_INET6_XFRM_TUNNEL is not set
339# CONFIG_INET6_TUNNEL is not set
340CONFIG_INET6_XFRM_MODE_TRANSPORT=y
341CONFIG_INET6_XFRM_MODE_TUNNEL=y
342CONFIG_INET6_XFRM_MODE_BEET=y
343# CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set
344CONFIG_IPV6_SIT=y
345CONFIG_IPV6_NDISC_NODETYPE=y
346# CONFIG_IPV6_TUNNEL is not set
347# CONFIG_IPV6_MULTIPLE_TABLES is not set
348# CONFIG_IPV6_MROUTE is not set
349# CONFIG_NETWORK_SECMARK is not set
350# CONFIG_NETFILTER is not set
351# CONFIG_IP_DCCP is not set
352CONFIG_IP_SCTP=m
353# CONFIG_SCTP_DBG_MSG is not set
354# CONFIG_SCTP_DBG_OBJCNT is not set
355# CONFIG_SCTP_HMAC_NONE is not set
356# CONFIG_SCTP_HMAC_SHA1 is not set
357CONFIG_SCTP_HMAC_MD5=y
358# CONFIG_TIPC is not set
359# CONFIG_ATM is not set
360# CONFIG_BRIDGE is not set
361# CONFIG_VLAN_8021Q is not set
362# CONFIG_DECNET is not set
363# CONFIG_LLC2 is not set
364# CONFIG_IPX is not set
365# CONFIG_ATALK is not set
366# CONFIG_X25 is not set
367# CONFIG_LAPB is not set
368# CONFIG_ECONET is not set
369# CONFIG_WAN_ROUTER is not set
370# CONFIG_NET_SCHED is not set
371
372#
373# Network testing
374#
375# CONFIG_NET_PKTGEN is not set
376# CONFIG_HAMRADIO is not set
377# CONFIG_CAN is not set
378# CONFIG_IRDA is not set
379# CONFIG_BT is not set
380# CONFIG_AF_RXRPC is not set
381CONFIG_FIB_RULES=y
382
383#
384# Wireless
385#
386# CONFIG_CFG80211 is not set
387# CONFIG_WIRELESS_EXT is not set
388# CONFIG_MAC80211 is not set
389# CONFIG_IEEE80211 is not set
390# CONFIG_RFKILL is not set
391# CONFIG_NET_9P is not set
392
393#
394# Device Drivers
395#
396
397#
398# Generic Driver Options
399#
400CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
401CONFIG_STANDALONE=y
402CONFIG_PREVENT_FIRMWARE_BUILD=y
403CONFIG_FW_LOADER=y
404# CONFIG_DEBUG_DRIVER is not set
405# CONFIG_DEBUG_DEVRES is not set
406# CONFIG_SYS_HYPERVISOR is not set
407# CONFIG_CONNECTOR is not set
408# CONFIG_MTD is not set
409CONFIG_OF_DEVICE=y
410CONFIG_OF_I2C=y
411# CONFIG_PARPORT is not set
412CONFIG_BLK_DEV=y
413# CONFIG_BLK_DEV_FD is not set
414# CONFIG_BLK_CPQ_DA is not set
415# CONFIG_BLK_CPQ_CISS_DA is not set
416# CONFIG_BLK_DEV_DAC960 is not set
417# CONFIG_BLK_DEV_UMEM is not set
418# CONFIG_BLK_DEV_COW_COMMON is not set
419CONFIG_BLK_DEV_LOOP=y
420# CONFIG_BLK_DEV_CRYPTOLOOP is not set
421CONFIG_BLK_DEV_NBD=y
422# CONFIG_BLK_DEV_SX8 is not set
423# CONFIG_BLK_DEV_UB is not set
424CONFIG_BLK_DEV_RAM=y
425CONFIG_BLK_DEV_RAM_COUNT=16
426CONFIG_BLK_DEV_RAM_SIZE=524288
427# CONFIG_BLK_DEV_XIP is not set
428# CONFIG_CDROM_PKTCDVD is not set
429# CONFIG_ATA_OVER_ETH is not set
430CONFIG_MISC_DEVICES=y
431# CONFIG_PHANTOM is not set
432# CONFIG_EEPROM_93CX6 is not set
433# CONFIG_SGI_IOC4 is not set
434# CONFIG_TIFM_CORE is not set
435# CONFIG_ENCLOSURE_SERVICES is not set
436CONFIG_HAVE_IDE=y
437# CONFIG_IDE is not set
438
439#
440# SCSI device support
441#
442# CONFIG_RAID_ATTRS is not set
443CONFIG_SCSI=y
444CONFIG_SCSI_DMA=y
445# CONFIG_SCSI_TGT is not set
446# CONFIG_SCSI_NETLINK is not set
447CONFIG_SCSI_PROC_FS=y
448
449#
450# SCSI support type (disk, tape, CD-ROM)
451#
452CONFIG_BLK_DEV_SD=y
453CONFIG_CHR_DEV_ST=y
454# CONFIG_CHR_DEV_OSST is not set
455CONFIG_BLK_DEV_SR=y
456# CONFIG_BLK_DEV_SR_VENDOR is not set
457CONFIG_CHR_DEV_SG=y
458# CONFIG_CHR_DEV_SCH is not set
459
460#
461# Some SCSI devices (e.g. CD jukebox) support multiple LUNs
462#
463CONFIG_SCSI_MULTI_LUN=y
464# CONFIG_SCSI_CONSTANTS is not set
465CONFIG_SCSI_LOGGING=y
466# CONFIG_SCSI_SCAN_ASYNC is not set
467CONFIG_SCSI_WAIT_SCAN=m
468
469#
470# SCSI Transports
471#
472# CONFIG_SCSI_SPI_ATTRS is not set
473# CONFIG_SCSI_FC_ATTRS is not set
474# CONFIG_SCSI_ISCSI_ATTRS is not set
475# CONFIG_SCSI_SAS_LIBSAS is not set
476# CONFIG_SCSI_SRP_ATTRS is not set
477CONFIG_SCSI_LOWLEVEL=y
478# CONFIG_ISCSI_TCP is not set
479# CONFIG_BLK_DEV_3W_XXXX_RAID is not set
480# CONFIG_SCSI_3W_9XXX is not set
481# CONFIG_SCSI_ACARD is not set
482# CONFIG_SCSI_AACRAID is not set
483# CONFIG_SCSI_AIC7XXX is not set
484# CONFIG_SCSI_AIC7XXX_OLD is not set
485# CONFIG_SCSI_AIC79XX is not set
486# CONFIG_SCSI_AIC94XX is not set
487# CONFIG_SCSI_DPT_I2O is not set
488# CONFIG_SCSI_ADVANSYS is not set
489# CONFIG_SCSI_ARCMSR is not set
490# CONFIG_MEGARAID_NEWGEN is not set
491# CONFIG_MEGARAID_LEGACY is not set
492# CONFIG_MEGARAID_SAS is not set
493# CONFIG_SCSI_HPTIOP is not set
494# CONFIG_SCSI_BUSLOGIC is not set
495# CONFIG_SCSI_DMX3191D is not set
496# CONFIG_SCSI_EATA is not set
497# CONFIG_SCSI_FUTURE_DOMAIN is not set
498# CONFIG_SCSI_GDTH is not set
499# CONFIG_SCSI_IPS is not set
500# CONFIG_SCSI_INITIO is not set
501# CONFIG_SCSI_INIA100 is not set
502# CONFIG_SCSI_MVSAS is not set
503# CONFIG_SCSI_STEX is not set
504# CONFIG_SCSI_SYM53C8XX_2 is not set
505# CONFIG_SCSI_IPR is not set
506# CONFIG_SCSI_QLOGIC_1280 is not set
507# CONFIG_SCSI_QLA_FC is not set
508# CONFIG_SCSI_QLA_ISCSI is not set
509# CONFIG_SCSI_LPFC is not set
510# CONFIG_SCSI_DC395x is not set
511# CONFIG_SCSI_DC390T is not set
512# CONFIG_SCSI_NSP32 is not set
513# CONFIG_SCSI_DEBUG is not set
514# CONFIG_SCSI_SRP is not set
515CONFIG_ATA=y
516# CONFIG_ATA_NONSTANDARD is not set
517CONFIG_SATA_PMP=y
518# CONFIG_SATA_AHCI is not set
519CONFIG_SATA_SIL24=y
520CONFIG_SATA_FSL=y
521CONFIG_ATA_SFF=y
522# CONFIG_SATA_SVW is not set
523# CONFIG_ATA_PIIX is not set
524# CONFIG_SATA_MV is not set
525# CONFIG_SATA_NV is not set
526# CONFIG_PDC_ADMA is not set
527# CONFIG_SATA_QSTOR is not set
528# CONFIG_SATA_PROMISE is not set
529# CONFIG_SATA_SX4 is not set
530CONFIG_SATA_SIL=y
531# CONFIG_SATA_SIS is not set
532# CONFIG_SATA_ULI is not set
533# CONFIG_SATA_VIA is not set
534# CONFIG_SATA_VITESSE is not set
535# CONFIG_SATA_INIC162X is not set
536# CONFIG_PATA_ALI is not set
537# CONFIG_PATA_AMD is not set
538# CONFIG_PATA_ARTOP is not set
539# CONFIG_PATA_ATIIXP is not set
540# CONFIG_PATA_CMD640_PCI is not set
541# CONFIG_PATA_CMD64X is not set
542# CONFIG_PATA_CS5520 is not set
543# CONFIG_PATA_CS5530 is not set
544# CONFIG_PATA_CYPRESS is not set
545# CONFIG_PATA_EFAR is not set
546# CONFIG_ATA_GENERIC is not set
547# CONFIG_PATA_HPT366 is not set
548# CONFIG_PATA_HPT37X is not set
549# CONFIG_PATA_HPT3X2N is not set
550# CONFIG_PATA_HPT3X3 is not set
551# CONFIG_PATA_IT821X is not set
552# CONFIG_PATA_IT8213 is not set
553# CONFIG_PATA_JMICRON is not set
554# CONFIG_PATA_TRIFLEX is not set
555# CONFIG_PATA_MARVELL is not set
556# CONFIG_PATA_MPIIX is not set
557# CONFIG_PATA_OLDPIIX is not set
558# CONFIG_PATA_NETCELL is not set
559# CONFIG_PATA_NINJA32 is not set
560# CONFIG_PATA_NS87410 is not set
561# CONFIG_PATA_NS87415 is not set
562# CONFIG_PATA_OPTI is not set
563# CONFIG_PATA_OPTIDMA is not set
564# CONFIG_PATA_PDC_OLD is not set
565# CONFIG_PATA_RADISYS is not set
566# CONFIG_PATA_RZ1000 is not set
567# CONFIG_PATA_SC1200 is not set
568# CONFIG_PATA_SERVERWORKS is not set
569# CONFIG_PATA_PDC2027X is not set
570# CONFIG_PATA_SIL680 is not set
571# CONFIG_PATA_SIS is not set
572# CONFIG_PATA_VIA is not set
573# CONFIG_PATA_WINBOND is not set
574# CONFIG_PATA_PLATFORM is not set
575# CONFIG_PATA_SCH is not set
576# CONFIG_MD is not set
577# CONFIG_FUSION is not set
578
579#
580# IEEE 1394 (FireWire) support
581#
582
583#
584# Enable only one of the two stacks, unless you know what you are doing
585#
586# CONFIG_FIREWIRE is not set
587# CONFIG_IEEE1394 is not set
588# CONFIG_I2O is not set
589# CONFIG_MACINTOSH_DRIVERS is not set
590CONFIG_NETDEVICES=y
591# CONFIG_NETDEVICES_MULTIQUEUE is not set
592CONFIG_DUMMY=y
593# CONFIG_BONDING is not set
594# CONFIG_MACVLAN is not set
595# CONFIG_EQUALIZER is not set
596# CONFIG_TUN is not set
597# CONFIG_VETH is not set
598# CONFIG_ARCNET is not set
599CONFIG_PHYLIB=y
600
601#
602# MII PHY device drivers
603#
604# CONFIG_MARVELL_PHY is not set
605# CONFIG_DAVICOM_PHY is not set
606# CONFIG_QSEMI_PHY is not set
607# CONFIG_LXT_PHY is not set
608# CONFIG_CICADA_PHY is not set
609CONFIG_VITESSE_PHY=y
610# CONFIG_SMSC_PHY is not set
611# CONFIG_BROADCOM_PHY is not set
612# CONFIG_ICPLUS_PHY is not set
613# CONFIG_REALTEK_PHY is not set
614# CONFIG_FIXED_PHY is not set
615# CONFIG_MDIO_BITBANG is not set
616CONFIG_NET_ETHERNET=y
617CONFIG_MII=y
618# CONFIG_HAPPYMEAL is not set
619# CONFIG_SUNGEM is not set
620# CONFIG_CASSINI is not set
621# CONFIG_NET_VENDOR_3COM is not set
622# CONFIG_NET_TULIP is not set
623# CONFIG_HP100 is not set
624# CONFIG_IBM_NEW_EMAC_ZMII is not set
625# CONFIG_IBM_NEW_EMAC_RGMII is not set
626# CONFIG_IBM_NEW_EMAC_TAH is not set
627# CONFIG_IBM_NEW_EMAC_EMAC4 is not set
628# CONFIG_NET_PCI is not set
629# CONFIG_B44 is not set
630CONFIG_NETDEV_1000=y
631# CONFIG_ACENIC is not set
632# CONFIG_DL2K is not set
633# CONFIG_E1000 is not set
634# CONFIG_E1000E is not set
635# CONFIG_E1000E_ENABLED is not set
636# CONFIG_IP1000 is not set
637# CONFIG_IGB is not set
638# CONFIG_NS83820 is not set
639# CONFIG_HAMACHI is not set
640# CONFIG_YELLOWFIN is not set
641# CONFIG_R8169 is not set
642# CONFIG_SIS190 is not set
643CONFIG_SKGE=y
644# CONFIG_SKGE_DEBUG is not set
645CONFIG_SKY2=y
646# CONFIG_SKY2_DEBUG is not set
647# CONFIG_VIA_VELOCITY is not set
648# CONFIG_TIGON3 is not set
649# CONFIG_BNX2 is not set
650CONFIG_GIANFAR=y
651CONFIG_GFAR_NAPI=y
652# CONFIG_QLA3XXX is not set
653# CONFIG_ATL1 is not set
654CONFIG_NETDEV_10000=y
655# CONFIG_CHELSIO_T1 is not set
656# CONFIG_CHELSIO_T3 is not set
657# CONFIG_IXGBE is not set
658# CONFIG_IXGB is not set
659# CONFIG_S2IO is not set
660# CONFIG_MYRI10GE is not set
661# CONFIG_NETXEN_NIC is not set
662# CONFIG_NIU is not set
663# CONFIG_MLX4_CORE is not set
664# CONFIG_TEHUTI is not set
665# CONFIG_BNX2X is not set
666# CONFIG_SFC is not set
667# CONFIG_TR is not set
668
669#
670# Wireless LAN
671#
672# CONFIG_WLAN_PRE80211 is not set
673# CONFIG_WLAN_80211 is not set
674# CONFIG_IWLWIFI_LEDS is not set
675
676#
677# USB Network Adapters
678#
679# CONFIG_USB_CATC is not set
680# CONFIG_USB_KAWETH is not set
681# CONFIG_USB_PEGASUS is not set
682# CONFIG_USB_RTL8150 is not set
683# CONFIG_USB_USBNET is not set
684# CONFIG_WAN is not set
685# CONFIG_FDDI is not set
686# CONFIG_HIPPI is not set
687# CONFIG_PPP is not set
688# CONFIG_SLIP is not set
689# CONFIG_NET_FC is not set
690# CONFIG_NETCONSOLE is not set
691# CONFIG_NETPOLL is not set
692# CONFIG_NET_POLL_CONTROLLER is not set
693# CONFIG_ISDN is not set
694# CONFIG_PHONE is not set
695
696#
697# Input device support
698#
699CONFIG_INPUT=y
700# CONFIG_INPUT_FF_MEMLESS is not set
701# CONFIG_INPUT_POLLDEV is not set
702
703#
704# Userland interfaces
705#
706# CONFIG_INPUT_MOUSEDEV is not set
707# CONFIG_INPUT_JOYDEV is not set
708# CONFIG_INPUT_EVDEV is not set
709# CONFIG_INPUT_EVBUG is not set
710
711#
712# Input Device Drivers
713#
714# CONFIG_INPUT_KEYBOARD is not set
715# CONFIG_INPUT_MOUSE is not set
716# CONFIG_INPUT_JOYSTICK is not set
717# CONFIG_INPUT_TABLET is not set
718# CONFIG_INPUT_TOUCHSCREEN is not set
719# CONFIG_INPUT_MISC is not set
720
721#
722# Hardware I/O ports
723#
724CONFIG_SERIO=y
725CONFIG_SERIO_I8042=y
726CONFIG_SERIO_SERPORT=y
727# CONFIG_SERIO_PCIPS2 is not set
728CONFIG_SERIO_LIBPS2=y
729# CONFIG_SERIO_RAW is not set
730# CONFIG_GAMEPORT is not set
731
732#
733# Character devices
734#
735CONFIG_VT=y
736CONFIG_VT_CONSOLE=y
737CONFIG_HW_CONSOLE=y
738# CONFIG_VT_HW_CONSOLE_BINDING is not set
739CONFIG_DEVKMEM=y
740# CONFIG_SERIAL_NONSTANDARD is not set
741# CONFIG_NOZOMI is not set
742
743#
744# Serial drivers
745#
746CONFIG_SERIAL_8250=y
747CONFIG_SERIAL_8250_CONSOLE=y
748CONFIG_SERIAL_8250_PCI=y
749CONFIG_SERIAL_8250_NR_UARTS=2
750CONFIG_SERIAL_8250_RUNTIME_UARTS=2
751CONFIG_SERIAL_8250_EXTENDED=y
752CONFIG_SERIAL_8250_MANY_PORTS=y
753CONFIG_SERIAL_8250_SHARE_IRQ=y
754CONFIG_SERIAL_8250_DETECT_IRQ=y
755CONFIG_SERIAL_8250_RSA=y
756
757#
758# Non-8250 serial port support
759#
760# CONFIG_SERIAL_UARTLITE is not set
761CONFIG_SERIAL_CORE=y
762CONFIG_SERIAL_CORE_CONSOLE=y
763# CONFIG_SERIAL_JSM is not set
764# CONFIG_SERIAL_OF_PLATFORM is not set
765CONFIG_UNIX98_PTYS=y
766CONFIG_LEGACY_PTYS=y
767CONFIG_LEGACY_PTY_COUNT=256
768# CONFIG_IPMI_HANDLER is not set
769# CONFIG_HW_RANDOM is not set
770# CONFIG_NVRAM is not set
771# CONFIG_R3964 is not set
772# CONFIG_APPLICOM is not set
773# CONFIG_RAW_DRIVER is not set
774# CONFIG_TCG_TPM is not set
775CONFIG_DEVPORT=y
776CONFIG_I2C=y
777CONFIG_I2C_BOARDINFO=y
778# CONFIG_I2C_CHARDEV is not set
779
780#
781# I2C Hardware Bus support
782#
783# CONFIG_I2C_ALI1535 is not set
784# CONFIG_I2C_ALI1563 is not set
785# CONFIG_I2C_ALI15X3 is not set
786# CONFIG_I2C_AMD756 is not set
787# CONFIG_I2C_AMD8111 is not set
788# CONFIG_I2C_I801 is not set
789# CONFIG_I2C_I810 is not set
790# CONFIG_I2C_PIIX4 is not set
791CONFIG_I2C_MPC=y
792# CONFIG_I2C_NFORCE2 is not set
793# CONFIG_I2C_OCORES is not set
794# CONFIG_I2C_PARPORT_LIGHT is not set
795# CONFIG_I2C_PROSAVAGE is not set
796# CONFIG_I2C_SAVAGE4 is not set
797# CONFIG_I2C_SIMTEC is not set
798# CONFIG_I2C_SIS5595 is not set
799# CONFIG_I2C_SIS630 is not set
800# CONFIG_I2C_SIS96X is not set
801# CONFIG_I2C_TAOS_EVM is not set
802# CONFIG_I2C_STUB is not set
803# CONFIG_I2C_TINY_USB is not set
804# CONFIG_I2C_VIA is not set
805# CONFIG_I2C_VIAPRO is not set
806# CONFIG_I2C_VOODOO3 is not set
807# CONFIG_I2C_PCA_PLATFORM is not set
808
809#
810# Miscellaneous I2C Chip support
811#
812# CONFIG_DS1682 is not set
813CONFIG_SENSORS_EEPROM=y
814# CONFIG_SENSORS_PCF8574 is not set
815# CONFIG_PCF8575 is not set
816# CONFIG_SENSORS_PCF8591 is not set
817# CONFIG_SENSORS_MAX6875 is not set
818# CONFIG_SENSORS_TSL2550 is not set
819# CONFIG_I2C_DEBUG_CORE is not set
820# CONFIG_I2C_DEBUG_ALGO is not set
821# CONFIG_I2C_DEBUG_BUS is not set
822# CONFIG_I2C_DEBUG_CHIP is not set
823# CONFIG_SPI is not set
824# CONFIG_W1 is not set
825# CONFIG_POWER_SUPPLY is not set
826# CONFIG_HWMON is not set
827CONFIG_THERMAL=y
828# CONFIG_WATCHDOG is not set
829
830#
831# Sonics Silicon Backplane
832#
833CONFIG_SSB_POSSIBLE=y
834# CONFIG_SSB is not set
835
836#
837# Multifunction device drivers
838#
839# CONFIG_MFD_SM501 is not set
840# CONFIG_HTC_PASIC3 is not set
841
842#
843# Multimedia devices
844#
845
846#
847# Multimedia core support
848#
849# CONFIG_VIDEO_DEV is not set
850CONFIG_DVB_CORE=m
851CONFIG_VIDEO_MEDIA=m
852
853#
854# Multimedia drivers
855#
856# CONFIG_MEDIA_ATTACH is not set
857CONFIG_MEDIA_TUNER=m
858# CONFIG_MEDIA_TUNER_CUSTOMIZE is not set
859CONFIG_MEDIA_TUNER_SIMPLE=m
860CONFIG_MEDIA_TUNER_TDA8290=m
861CONFIG_MEDIA_TUNER_TDA9887=m
862CONFIG_MEDIA_TUNER_TEA5761=m
863CONFIG_MEDIA_TUNER_TEA5767=m
864CONFIG_MEDIA_TUNER_MT20XX=m
865CONFIG_MEDIA_TUNER_XC2028=m
866CONFIG_MEDIA_TUNER_XC5000=m
867CONFIG_DVB_CAPTURE_DRIVERS=y
868
869#
870# Supported SAA7146 based PCI Adapters
871#
872# CONFIG_TTPCI_EEPROM is not set
873# CONFIG_DVB_BUDGET_CORE is not set
874
875#
876# Supported USB Adapters
877#
878# CONFIG_DVB_USB is not set
879# CONFIG_DVB_TTUSB_BUDGET is not set
880# CONFIG_DVB_TTUSB_DEC is not set
881# CONFIG_DVB_CINERGYT2 is not set
882
883#
884# Supported FlexCopII (B2C2) Adapters
885#
886# CONFIG_DVB_B2C2_FLEXCOP is not set
887
888#
889# Supported BT878 Adapters
890#
891
892#
893# Supported Pluto2 Adapters
894#
895# CONFIG_DVB_PLUTO2 is not set
896
897#
898# Supported DVB Frontends
899#
900
901#
902# Customise DVB Frontends
903#
904# CONFIG_DVB_FE_CUSTOMISE is not set
905
906#
907# DVB-S (satellite) frontends
908#
909# CONFIG_DVB_CX24110 is not set
910# CONFIG_DVB_CX24123 is not set
911# CONFIG_DVB_MT312 is not set
912# CONFIG_DVB_S5H1420 is not set
913# CONFIG_DVB_STV0299 is not set
914# CONFIG_DVB_TDA8083 is not set
915# CONFIG_DVB_TDA10086 is not set
916# CONFIG_DVB_VES1X93 is not set
917# CONFIG_DVB_TUNER_ITD1000 is not set
918# CONFIG_DVB_TDA826X is not set
919# CONFIG_DVB_TUA6100 is not set
920
921#
922# DVB-T (terrestrial) frontends
923#
924# CONFIG_DVB_SP8870 is not set
925# CONFIG_DVB_SP887X is not set
926# CONFIG_DVB_CX22700 is not set
927# CONFIG_DVB_CX22702 is not set
928# CONFIG_DVB_L64781 is not set
929# CONFIG_DVB_TDA1004X is not set
930# CONFIG_DVB_NXT6000 is not set
931# CONFIG_DVB_MT352 is not set
932# CONFIG_DVB_ZL10353 is not set
933# CONFIG_DVB_DIB3000MB is not set
934# CONFIG_DVB_DIB3000MC is not set
935# CONFIG_DVB_DIB7000M is not set
936# CONFIG_DVB_DIB7000P is not set
937# CONFIG_DVB_TDA10048 is not set
938
939#
940# DVB-C (cable) frontends
941#
942# CONFIG_DVB_VES1820 is not set
943# CONFIG_DVB_TDA10021 is not set
944# CONFIG_DVB_TDA10023 is not set
945# CONFIG_DVB_STV0297 is not set
946
947#
948# ATSC (North American/Korean Terrestrial/Cable DTV) frontends
949#
950# CONFIG_DVB_NXT200X is not set
951# CONFIG_DVB_OR51211 is not set
952# CONFIG_DVB_OR51132 is not set
953# CONFIG_DVB_BCM3510 is not set
954# CONFIG_DVB_LGDT330X is not set
955# CONFIG_DVB_S5H1409 is not set
956# CONFIG_DVB_AU8522 is not set
957# CONFIG_DVB_S5H1411 is not set
958
959#
960# Digital terrestrial only tuners/PLL
961#
962# CONFIG_DVB_PLL is not set
963# CONFIG_DVB_TUNER_DIB0070 is not set
964
965#
966# SEC control devices for DVB-S
967#
968# CONFIG_DVB_LNBP21 is not set
969# CONFIG_DVB_ISL6405 is not set
970# CONFIG_DVB_ISL6421 is not set
971CONFIG_DAB=y
972# CONFIG_USB_DABUSB is not set
973
974#
975# Graphics support
976#
977# CONFIG_AGP is not set
978# CONFIG_DRM is not set
979# CONFIG_VGASTATE is not set
980CONFIG_VIDEO_OUTPUT_CONTROL=y
981# CONFIG_FB is not set
982# CONFIG_BACKLIGHT_LCD_SUPPORT is not set
983
984#
985# Display device support
986#
987# CONFIG_DISPLAY_SUPPORT is not set
988
989#
990# Console display driver support
991#
992CONFIG_VGA_CONSOLE=y
993# CONFIG_VGACON_SOFT_SCROLLBACK is not set
994CONFIG_DUMMY_CONSOLE=y
995
996#
997# Sound
998#
999CONFIG_SOUND=y
1000
1001#
1002# Advanced Linux Sound Architecture
1003#
1004CONFIG_SND=y
1005CONFIG_SND_TIMER=y
1006CONFIG_SND_PCM=y
1007# CONFIG_SND_SEQUENCER is not set
1008# CONFIG_SND_MIXER_OSS is not set
1009# CONFIG_SND_PCM_OSS is not set
1010# CONFIG_SND_DYNAMIC_MINORS is not set
1011CONFIG_SND_SUPPORT_OLD_API=y
1012CONFIG_SND_VERBOSE_PROCFS=y
1013# CONFIG_SND_VERBOSE_PRINTK is not set
1014# CONFIG_SND_DEBUG is not set
1015
1016#
1017# Generic devices
1018#
1019CONFIG_SND_AC97_CODEC=y
1020# CONFIG_SND_DUMMY is not set
1021# CONFIG_SND_MTPAV is not set
1022# CONFIG_SND_SERIAL_U16550 is not set
1023# CONFIG_SND_MPU401 is not set
1024
1025#
1026# PCI devices
1027#
1028# CONFIG_SND_AD1889 is not set
1029# CONFIG_SND_ALS300 is not set
1030# CONFIG_SND_ALS4000 is not set
1031# CONFIG_SND_ALI5451 is not set
1032# CONFIG_SND_ATIIXP is not set
1033# CONFIG_SND_ATIIXP_MODEM is not set
1034# CONFIG_SND_AU8810 is not set
1035# CONFIG_SND_AU8820 is not set
1036# CONFIG_SND_AU8830 is not set
1037# CONFIG_SND_AW2 is not set
1038# CONFIG_SND_AZT3328 is not set
1039# CONFIG_SND_BT87X is not set
1040# CONFIG_SND_CA0106 is not set
1041# CONFIG_SND_CMIPCI is not set
1042# CONFIG_SND_OXYGEN is not set
1043# CONFIG_SND_CS4281 is not set
1044# CONFIG_SND_CS46XX is not set
1045# CONFIG_SND_CS5530 is not set
1046# CONFIG_SND_DARLA20 is not set
1047# CONFIG_SND_GINA20 is not set
1048# CONFIG_SND_LAYLA20 is not set
1049# CONFIG_SND_DARLA24 is not set
1050# CONFIG_SND_GINA24 is not set
1051# CONFIG_SND_LAYLA24 is not set
1052# CONFIG_SND_MONA is not set
1053# CONFIG_SND_MIA is not set
1054# CONFIG_SND_ECHO3G is not set
1055# CONFIG_SND_INDIGO is not set
1056# CONFIG_SND_INDIGOIO is not set
1057# CONFIG_SND_INDIGODJ is not set
1058# CONFIG_SND_EMU10K1 is not set
1059# CONFIG_SND_EMU10K1X is not set
1060# CONFIG_SND_ENS1370 is not set
1061# CONFIG_SND_ENS1371 is not set
1062# CONFIG_SND_ES1938 is not set
1063# CONFIG_SND_ES1968 is not set
1064# CONFIG_SND_FM801 is not set
1065# CONFIG_SND_HDA_INTEL is not set
1066# CONFIG_SND_HDSP is not set
1067# CONFIG_SND_HDSPM is not set
1068# CONFIG_SND_HIFIER is not set
1069# CONFIG_SND_ICE1712 is not set
1070# CONFIG_SND_ICE1724 is not set
1071CONFIG_SND_INTEL8X0=y
1072# CONFIG_SND_INTEL8X0M is not set
1073# CONFIG_SND_KORG1212 is not set
1074# CONFIG_SND_MAESTRO3 is not set
1075# CONFIG_SND_MIXART is not set
1076# CONFIG_SND_NM256 is not set
1077# CONFIG_SND_PCXHR is not set
1078# CONFIG_SND_RIPTIDE is not set
1079# CONFIG_SND_RME32 is not set
1080# CONFIG_SND_RME96 is not set
1081# CONFIG_SND_RME9652 is not set
1082# CONFIG_SND_SONICVIBES is not set
1083# CONFIG_SND_TRIDENT is not set
1084# CONFIG_SND_VIA82XX is not set
1085# CONFIG_SND_VIA82XX_MODEM is not set
1086# CONFIG_SND_VIRTUOSO is not set
1087# CONFIG_SND_VX222 is not set
1088# CONFIG_SND_YMFPCI is not set
1089# CONFIG_SND_AC97_POWER_SAVE is not set
1090
1091#
1092# ALSA PowerMac devices
1093#
1094
1095#
1096# ALSA PowerPC devices
1097#
1098
1099#
1100# USB devices
1101#
1102# CONFIG_SND_USB_AUDIO is not set
1103# CONFIG_SND_USB_USX2Y is not set
1104# CONFIG_SND_USB_CAIAQ is not set
1105
1106#
1107# System on Chip audio support
1108#
1109# CONFIG_SND_SOC is not set
1110
1111#
1112# ALSA SoC audio for Freescale SOCs
1113#
1114
1115#
1116# SoC Audio for the Texas Instruments OMAP
1117#
1118
1119#
1120# Open Sound System
1121#
1122# CONFIG_SOUND_PRIME is not set
1123CONFIG_AC97_BUS=y
1124CONFIG_HID_SUPPORT=y
1125CONFIG_HID=y
1126# CONFIG_HID_DEBUG is not set
1127# CONFIG_HIDRAW is not set
1128
1129#
1130# USB Input Devices
1131#
1132CONFIG_USB_HID=y
1133# CONFIG_USB_HIDINPUT_POWERBOOK is not set
1134# CONFIG_HID_FF is not set
1135# CONFIG_USB_HIDDEV is not set
1136CONFIG_USB_SUPPORT=y
1137CONFIG_USB_ARCH_HAS_HCD=y
1138CONFIG_USB_ARCH_HAS_OHCI=y
1139CONFIG_USB_ARCH_HAS_EHCI=y
1140CONFIG_USB=y
1141# CONFIG_USB_DEBUG is not set
1142# CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set
1143
1144#
1145# Miscellaneous USB options
1146#
1147CONFIG_USB_DEVICEFS=y
1148CONFIG_USB_DEVICE_CLASS=y
1149# CONFIG_USB_DYNAMIC_MINORS is not set
1150# CONFIG_USB_OTG is not set
1151# CONFIG_USB_OTG_WHITELIST is not set
1152# CONFIG_USB_OTG_BLACKLIST_HUB is not set
1153
1154#
1155# USB Host Controller Drivers
1156#
1157# CONFIG_USB_C67X00_HCD is not set
1158CONFIG_USB_EHCI_HCD=y
1159CONFIG_USB_EHCI_ROOT_HUB_TT=y
1160# CONFIG_USB_EHCI_TT_NEWSCHED is not set
1161CONFIG_USB_EHCI_FSL=y
1162CONFIG_USB_EHCI_HCD_PPC_OF=y
1163# CONFIG_USB_ISP116X_HCD is not set
1164# CONFIG_USB_ISP1760_HCD is not set
1165CONFIG_USB_OHCI_HCD=y
1166CONFIG_USB_OHCI_HCD_PPC_OF=y
1167CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
1168CONFIG_USB_OHCI_HCD_PPC_OF_LE=y
1169CONFIG_USB_OHCI_HCD_PCI=y
1170CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y
1171CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y
1172CONFIG_USB_OHCI_LITTLE_ENDIAN=y
1173# CONFIG_USB_UHCI_HCD is not set
1174# CONFIG_USB_SL811_HCD is not set
1175# CONFIG_USB_R8A66597_HCD is not set
1176
1177#
1178# USB Device Class drivers
1179#
1180# CONFIG_USB_ACM is not set
1181# CONFIG_USB_PRINTER is not set
1182# CONFIG_USB_WDM is not set
1183
1184#
1185# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
1186#
1187
1188#
1189# may also be needed; see USB_STORAGE Help for more information
1190#
1191CONFIG_USB_STORAGE=y
1192# CONFIG_USB_STORAGE_DEBUG is not set
1193# CONFIG_USB_STORAGE_DATAFAB is not set
1194# CONFIG_USB_STORAGE_FREECOM is not set
1195# CONFIG_USB_STORAGE_ISD200 is not set
1196# CONFIG_USB_STORAGE_DPCM is not set
1197# CONFIG_USB_STORAGE_USBAT is not set
1198# CONFIG_USB_STORAGE_SDDR09 is not set
1199# CONFIG_USB_STORAGE_SDDR55 is not set
1200# CONFIG_USB_STORAGE_JUMPSHOT is not set
1201# CONFIG_USB_STORAGE_ALAUDA is not set
1202# CONFIG_USB_STORAGE_ONETOUCH is not set
1203# CONFIG_USB_STORAGE_KARMA is not set
1204# CONFIG_USB_STORAGE_CYPRESS_ATACB is not set
1205# CONFIG_USB_LIBUSUAL is not set
1206
1207#
1208# USB Imaging devices
1209#
1210# CONFIG_USB_MDC800 is not set
1211# CONFIG_USB_MICROTEK is not set
1212CONFIG_USB_MON=y
1213
1214#
1215# USB port drivers
1216#
1217# CONFIG_USB_SERIAL is not set
1218
1219#
1220# USB Miscellaneous drivers
1221#
1222# CONFIG_USB_EMI62 is not set
1223# CONFIG_USB_EMI26 is not set
1224# CONFIG_USB_ADUTUX is not set
1225# CONFIG_USB_AUERSWALD is not set
1226# CONFIG_USB_RIO500 is not set
1227# CONFIG_USB_LEGOTOWER is not set
1228# CONFIG_USB_LCD is not set
1229# CONFIG_USB_BERRY_CHARGE is not set
1230# CONFIG_USB_LED is not set
1231# CONFIG_USB_CYPRESS_CY7C63 is not set
1232# CONFIG_USB_CYTHERM is not set
1233# CONFIG_USB_PHIDGET is not set
1234# CONFIG_USB_IDMOUSE is not set
1235# CONFIG_USB_FTDI_ELAN is not set
1236# CONFIG_USB_APPLEDISPLAY is not set
1237# CONFIG_USB_SISUSBVGA is not set
1238# CONFIG_USB_LD is not set
1239# CONFIG_USB_TRANCEVIBRATOR is not set
1240# CONFIG_USB_IOWARRIOR is not set
1241# CONFIG_USB_TEST is not set
1242# CONFIG_USB_ISIGHTFW is not set
1243# CONFIG_USB_GADGET is not set
1244# CONFIG_MMC is not set
1245# CONFIG_MEMSTICK is not set
1246# CONFIG_NEW_LEDS is not set
1247# CONFIG_ACCESSIBILITY is not set
1248# CONFIG_INFINIBAND is not set
1249# CONFIG_EDAC is not set
1250CONFIG_RTC_LIB=y
1251CONFIG_RTC_CLASS=y
1252CONFIG_RTC_HCTOSYS=y
1253CONFIG_RTC_HCTOSYS_DEVICE="rtc0"
1254# CONFIG_RTC_DEBUG is not set
1255
1256#
1257# RTC interfaces
1258#
1259CONFIG_RTC_INTF_SYSFS=y
1260CONFIG_RTC_INTF_PROC=y
1261CONFIG_RTC_INTF_DEV=y
1262# CONFIG_RTC_INTF_DEV_UIE_EMUL is not set
1263# CONFIG_RTC_DRV_TEST is not set
1264
1265#
1266# I2C RTC drivers
1267#
1268# CONFIG_RTC_DRV_DS1307 is not set
1269# CONFIG_RTC_DRV_DS1374 is not set
1270# CONFIG_RTC_DRV_DS1672 is not set
1271# CONFIG_RTC_DRV_MAX6900 is not set
1272# CONFIG_RTC_DRV_RS5C372 is not set
1273# CONFIG_RTC_DRV_ISL1208 is not set
1274# CONFIG_RTC_DRV_X1205 is not set
1275# CONFIG_RTC_DRV_PCF8563 is not set
1276# CONFIG_RTC_DRV_PCF8583 is not set
1277# CONFIG_RTC_DRV_M41T80 is not set
1278# CONFIG_RTC_DRV_S35390A is not set
1279# CONFIG_RTC_DRV_FM3130 is not set
1280
1281#
1282# SPI RTC drivers
1283#
1284
1285#
1286# Platform RTC drivers
1287#
1288CONFIG_RTC_DRV_CMOS=y
1289# CONFIG_RTC_DRV_DS1511 is not set
1290# CONFIG_RTC_DRV_DS1553 is not set
1291# CONFIG_RTC_DRV_DS1742 is not set
1292# CONFIG_RTC_DRV_STK17TA8 is not set
1293# CONFIG_RTC_DRV_M48T86 is not set
1294# CONFIG_RTC_DRV_M48T59 is not set
1295# CONFIG_RTC_DRV_V3020 is not set
1296
1297#
1298# on-CPU RTC drivers
1299#
1300# CONFIG_RTC_DRV_PPC is not set
1301CONFIG_DMADEVICES=y
1302
1303#
1304# DMA Devices
1305#
1306CONFIG_FSL_DMA=y
1307CONFIG_DMA_ENGINE=y
1308
1309#
1310# DMA Clients
1311#
1312# CONFIG_NET_DMA is not set
1313# CONFIG_UIO is not set
1314
1315#
1316# File systems
1317#
1318CONFIG_EXT2_FS=y
1319# CONFIG_EXT2_FS_XATTR is not set
1320# CONFIG_EXT2_FS_XIP is not set
1321CONFIG_EXT3_FS=y
1322CONFIG_EXT3_FS_XATTR=y
1323# CONFIG_EXT3_FS_POSIX_ACL is not set
1324# CONFIG_EXT3_FS_SECURITY is not set
1325# CONFIG_EXT4DEV_FS is not set
1326CONFIG_JBD=y
1327# CONFIG_JBD_DEBUG is not set
1328CONFIG_FS_MBCACHE=y
1329# CONFIG_REISERFS_FS is not set
1330# CONFIG_JFS_FS is not set
1331# CONFIG_FS_POSIX_ACL is not set
1332# CONFIG_XFS_FS is not set
1333# CONFIG_OCFS2_FS is not set
1334CONFIG_DNOTIFY=y
1335CONFIG_INOTIFY=y
1336CONFIG_INOTIFY_USER=y
1337# CONFIG_QUOTA is not set
1338# CONFIG_AUTOFS_FS is not set
1339# CONFIG_AUTOFS4_FS is not set
1340# CONFIG_FUSE_FS is not set
1341
1342#
1343# CD-ROM/DVD Filesystems
1344#
1345CONFIG_ISO9660_FS=m
1346CONFIG_JOLIET=y
1347CONFIG_ZISOFS=y
1348CONFIG_UDF_FS=m
1349CONFIG_UDF_NLS=y
1350
1351#
1352# DOS/FAT/NT Filesystems
1353#
1354CONFIG_FAT_FS=y
1355CONFIG_MSDOS_FS=m
1356CONFIG_VFAT_FS=y
1357CONFIG_FAT_DEFAULT_CODEPAGE=437
1358CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1"
1359CONFIG_NTFS_FS=y
1360# CONFIG_NTFS_DEBUG is not set
1361# CONFIG_NTFS_RW is not set
1362
1363#
1364# Pseudo filesystems
1365#
1366CONFIG_PROC_FS=y
1367CONFIG_PROC_KCORE=y
1368CONFIG_PROC_SYSCTL=y
1369CONFIG_SYSFS=y
1370CONFIG_TMPFS=y
1371# CONFIG_TMPFS_POSIX_ACL is not set
1372# CONFIG_HUGETLB_PAGE is not set
1373# CONFIG_CONFIGFS_FS is not set
1374
1375#
1376# Miscellaneous filesystems
1377#
1378CONFIG_ADFS_FS=m
1379# CONFIG_ADFS_FS_RW is not set
1380CONFIG_AFFS_FS=m
1381CONFIG_HFS_FS=m
1382CONFIG_HFSPLUS_FS=m
1383CONFIG_BEFS_FS=m
1384# CONFIG_BEFS_DEBUG is not set
1385CONFIG_BFS_FS=m
1386CONFIG_EFS_FS=m
1387CONFIG_CRAMFS=y
1388CONFIG_VXFS_FS=m
1389# CONFIG_MINIX_FS is not set
1390CONFIG_HPFS_FS=m
1391CONFIG_QNX4FS_FS=m
1392# CONFIG_ROMFS_FS is not set
1393CONFIG_SYSV_FS=m
1394CONFIG_UFS_FS=m
1395# CONFIG_UFS_FS_WRITE is not set
1396# CONFIG_UFS_DEBUG is not set
1397CONFIG_NETWORK_FILESYSTEMS=y
1398CONFIG_NFS_FS=y
1399CONFIG_NFS_V3=y
1400# CONFIG_NFS_V3_ACL is not set
1401CONFIG_NFS_V4=y
1402CONFIG_NFSD=y
1403# CONFIG_NFSD_V3 is not set
1404# CONFIG_NFSD_V4 is not set
1405CONFIG_ROOT_NFS=y
1406CONFIG_LOCKD=y
1407CONFIG_LOCKD_V4=y
1408CONFIG_EXPORTFS=y
1409CONFIG_NFS_COMMON=y
1410CONFIG_SUNRPC=y
1411CONFIG_SUNRPC_GSS=y
1412# CONFIG_SUNRPC_BIND34 is not set
1413CONFIG_RPCSEC_GSS_KRB5=y
1414# CONFIG_RPCSEC_GSS_SPKM3 is not set
1415# CONFIG_SMB_FS is not set
1416# CONFIG_CIFS is not set
1417# CONFIG_NCP_FS is not set
1418# CONFIG_CODA_FS is not set
1419# CONFIG_AFS_FS is not set
1420
1421#
1422# Partition Types
1423#
1424CONFIG_PARTITION_ADVANCED=y
1425# CONFIG_ACORN_PARTITION is not set
1426# CONFIG_OSF_PARTITION is not set
1427# CONFIG_AMIGA_PARTITION is not set
1428# CONFIG_ATARI_PARTITION is not set
1429CONFIG_MAC_PARTITION=y
1430CONFIG_MSDOS_PARTITION=y
1431# CONFIG_BSD_DISKLABEL is not set
1432# CONFIG_MINIX_SUBPARTITION is not set
1433# CONFIG_SOLARIS_X86_PARTITION is not set
1434# CONFIG_UNIXWARE_DISKLABEL is not set
1435# CONFIG_LDM_PARTITION is not set
1436# CONFIG_SGI_PARTITION is not set
1437# CONFIG_ULTRIX_PARTITION is not set
1438# CONFIG_SUN_PARTITION is not set
1439# CONFIG_KARMA_PARTITION is not set
1440# CONFIG_EFI_PARTITION is not set
1441# CONFIG_SYSV68_PARTITION is not set
1442CONFIG_NLS=y
1443CONFIG_NLS_DEFAULT="iso8859-1"
1444# CONFIG_NLS_CODEPAGE_437 is not set
1445# CONFIG_NLS_CODEPAGE_737 is not set
1446# CONFIG_NLS_CODEPAGE_775 is not set
1447# CONFIG_NLS_CODEPAGE_850 is not set
1448# CONFIG_NLS_CODEPAGE_852 is not set
1449# CONFIG_NLS_CODEPAGE_855 is not set
1450# CONFIG_NLS_CODEPAGE_857 is not set
1451# CONFIG_NLS_CODEPAGE_860 is not set
1452# CONFIG_NLS_CODEPAGE_861 is not set
1453# CONFIG_NLS_CODEPAGE_862 is not set
1454# CONFIG_NLS_CODEPAGE_863 is not set
1455# CONFIG_NLS_CODEPAGE_864 is not set
1456# CONFIG_NLS_CODEPAGE_865 is not set
1457# CONFIG_NLS_CODEPAGE_866 is not set
1458# CONFIG_NLS_CODEPAGE_869 is not set
1459# CONFIG_NLS_CODEPAGE_936 is not set
1460# CONFIG_NLS_CODEPAGE_950 is not set
1461# CONFIG_NLS_CODEPAGE_932 is not set
1462# CONFIG_NLS_CODEPAGE_949 is not set
1463# CONFIG_NLS_CODEPAGE_874 is not set
1464# CONFIG_NLS_ISO8859_8 is not set
1465# CONFIG_NLS_CODEPAGE_1250 is not set
1466# CONFIG_NLS_CODEPAGE_1251 is not set
1467# CONFIG_NLS_ASCII is not set
1468# CONFIG_NLS_ISO8859_1 is not set
1469# CONFIG_NLS_ISO8859_2 is not set
1470# CONFIG_NLS_ISO8859_3 is not set
1471# CONFIG_NLS_ISO8859_4 is not set
1472# CONFIG_NLS_ISO8859_5 is not set
1473# CONFIG_NLS_ISO8859_6 is not set
1474# CONFIG_NLS_ISO8859_7 is not set
1475# CONFIG_NLS_ISO8859_9 is not set
1476# CONFIG_NLS_ISO8859_13 is not set
1477# CONFIG_NLS_ISO8859_14 is not set
1478# CONFIG_NLS_ISO8859_15 is not set
1479# CONFIG_NLS_KOI8_R is not set
1480# CONFIG_NLS_KOI8_U is not set
1481CONFIG_NLS_UTF8=m
1482# CONFIG_DLM is not set
1483
1484#
1485# Library routines
1486#
1487CONFIG_BITREVERSE=y
1488# CONFIG_GENERIC_FIND_FIRST_BIT is not set
1489# CONFIG_CRC_CCITT is not set
1490# CONFIG_CRC16 is not set
1491CONFIG_CRC_ITU_T=m
1492CONFIG_CRC32=y
1493# CONFIG_CRC7 is not set
1494CONFIG_LIBCRC32C=m
1495CONFIG_ZLIB_INFLATE=y
1496CONFIG_PLIST=y
1497CONFIG_HAS_IOMEM=y
1498CONFIG_HAS_IOPORT=y
1499CONFIG_HAS_DMA=y
1500CONFIG_HAVE_LMB=y
1501
1502#
1503# Kernel hacking
1504#
1505# CONFIG_PRINTK_TIME is not set
1506CONFIG_ENABLE_WARN_DEPRECATED=y
1507CONFIG_ENABLE_MUST_CHECK=y
1508CONFIG_FRAME_WARN=1024
1509# CONFIG_MAGIC_SYSRQ is not set
1510# CONFIG_UNUSED_SYMBOLS is not set
1511CONFIG_DEBUG_FS=y
1512# CONFIG_HEADERS_CHECK is not set
1513CONFIG_DEBUG_KERNEL=y
1514# CONFIG_DEBUG_SHIRQ is not set
1515CONFIG_DETECT_SOFTLOCKUP=y
1516CONFIG_SCHED_DEBUG=y
1517# CONFIG_SCHEDSTATS is not set
1518# CONFIG_TIMER_STATS is not set
1519# CONFIG_DEBUG_OBJECTS is not set
1520# CONFIG_SLUB_DEBUG_ON is not set
1521# CONFIG_SLUB_STATS is not set
1522# CONFIG_DEBUG_RT_MUTEXES is not set
1523# CONFIG_RT_MUTEX_TESTER is not set
1524# CONFIG_DEBUG_SPINLOCK is not set
1525# CONFIG_DEBUG_MUTEXES is not set
1526# CONFIG_DEBUG_SPINLOCK_SLEEP is not set
1527# CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set
1528# CONFIG_DEBUG_KOBJECT is not set
1529# CONFIG_DEBUG_HIGHMEM is not set
1530# CONFIG_DEBUG_BUGVERBOSE is not set
1531CONFIG_DEBUG_INFO=y
1532# CONFIG_DEBUG_VM is not set
1533# CONFIG_DEBUG_WRITECOUNT is not set
1534# CONFIG_DEBUG_LIST is not set
1535# CONFIG_DEBUG_SG is not set
1536# CONFIG_BOOT_PRINTK_DELAY is not set
1537# CONFIG_RCU_TORTURE_TEST is not set
1538# CONFIG_BACKTRACE_SELF_TEST is not set
1539# CONFIG_FAULT_INJECTION is not set
1540# CONFIG_SAMPLES is not set
1541# CONFIG_DEBUG_STACKOVERFLOW is not set
1542# CONFIG_DEBUG_STACK_USAGE is not set
1543# CONFIG_DEBUG_PAGEALLOC is not set
1544# CONFIG_DEBUGGER is not set
1545# CONFIG_CODE_PATCHING_SELFTEST is not set
1546# CONFIG_FTR_FIXUP_SELFTEST is not set
1547# CONFIG_IRQSTACKS is not set
1548# CONFIG_VIRQ_DEBUG is not set
1549# CONFIG_BDI_SWITCH is not set
1550# CONFIG_PPC_EARLY_DEBUG is not set
1551
1552#
1553# Security options
1554#
1555# CONFIG_KEYS is not set
1556# CONFIG_SECURITY is not set
1557# CONFIG_SECURITY_FILE_CAPABILITIES is not set
1558CONFIG_CRYPTO=y
1559
1560#
1561# Crypto core or helper
1562#
1563CONFIG_CRYPTO_ALGAPI=y
1564CONFIG_CRYPTO_BLKCIPHER=y
1565CONFIG_CRYPTO_HASH=y
1566CONFIG_CRYPTO_MANAGER=y
1567# CONFIG_CRYPTO_GF128MUL is not set
1568# CONFIG_CRYPTO_NULL is not set
1569# CONFIG_CRYPTO_CRYPTD is not set
1570# CONFIG_CRYPTO_AUTHENC is not set
1571# CONFIG_CRYPTO_TEST is not set
1572
1573#
1574# Authenticated Encryption with Associated Data
1575#
1576# CONFIG_CRYPTO_CCM is not set
1577# CONFIG_CRYPTO_GCM is not set
1578# CONFIG_CRYPTO_SEQIV is not set
1579
1580#
1581# Block modes
1582#
1583CONFIG_CRYPTO_CBC=y
1584# CONFIG_CRYPTO_CTR is not set
1585# CONFIG_CRYPTO_CTS is not set
1586# CONFIG_CRYPTO_ECB is not set
1587# CONFIG_CRYPTO_LRW is not set
1588CONFIG_CRYPTO_PCBC=m
1589# CONFIG_CRYPTO_XTS is not set
1590
1591#
1592# Hash modes
1593#
1594CONFIG_CRYPTO_HMAC=y
1595# CONFIG_CRYPTO_XCBC is not set
1596
1597#
1598# Digest
1599#
1600# CONFIG_CRYPTO_CRC32C is not set
1601# CONFIG_CRYPTO_MD4 is not set
1602CONFIG_CRYPTO_MD5=y
1603# CONFIG_CRYPTO_MICHAEL_MIC is not set
1604CONFIG_CRYPTO_SHA1=m
1605# CONFIG_CRYPTO_SHA256 is not set
1606# CONFIG_CRYPTO_SHA512 is not set
1607# CONFIG_CRYPTO_TGR192 is not set
1608# CONFIG_CRYPTO_WP512 is not set
1609
1610#
1611# Ciphers
1612#
1613# CONFIG_CRYPTO_AES is not set
1614# CONFIG_CRYPTO_ANUBIS is not set
1615# CONFIG_CRYPTO_ARC4 is not set
1616# CONFIG_CRYPTO_BLOWFISH is not set
1617# CONFIG_CRYPTO_CAMELLIA is not set
1618# CONFIG_CRYPTO_CAST5 is not set
1619# CONFIG_CRYPTO_CAST6 is not set
1620CONFIG_CRYPTO_DES=y
1621# CONFIG_CRYPTO_FCRYPT is not set
1622# CONFIG_CRYPTO_KHAZAD is not set
1623# CONFIG_CRYPTO_SALSA20 is not set
1624# CONFIG_CRYPTO_SEED is not set
1625# CONFIG_CRYPTO_SERPENT is not set
1626# CONFIG_CRYPTO_TEA is not set
1627# CONFIG_CRYPTO_TWOFISH is not set
1628
1629#
1630# Compression
1631#
1632# CONFIG_CRYPTO_DEFLATE is not set
1633# CONFIG_CRYPTO_LZO is not set
1634CONFIG_CRYPTO_HW=y
1635# CONFIG_CRYPTO_DEV_HIFN_795X is not set
1636# CONFIG_PPC_CLOCK is not set
1637# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index 12f9b5a80220..f9d279bb700b 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -1,7 +1,7 @@
1# 1#
2# Automatically generated make config: don't edit 2# Automatically generated make config: don't edit
3# Linux kernel version: 2.6.25-rc6 3# Linux kernel version: 2.6.26-rc8
4# Sat Apr 5 09:35:48 2008 4# Wed Jul 9 13:50:48 2008
5# 5#
6# CONFIG_PPC64 is not set 6# CONFIG_PPC64 is not set
7 7
@@ -32,6 +32,8 @@ CONFIG_GENERIC_CLOCKEVENTS=y
32CONFIG_GENERIC_HARDIRQS=y 32CONFIG_GENERIC_HARDIRQS=y
33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set 33# CONFIG_HAVE_SETUP_PER_CPU_AREA is not set
34CONFIG_IRQ_PER_CPU=y 34CONFIG_IRQ_PER_CPU=y
35CONFIG_STACKTRACE_SUPPORT=y
36CONFIG_LOCKDEP_SUPPORT=y
35CONFIG_RWSEM_XCHGADD_ALGORITHM=y 37CONFIG_RWSEM_XCHGADD_ALGORITHM=y
36CONFIG_ARCH_HAS_ILOG2_U32=y 38CONFIG_ARCH_HAS_ILOG2_U32=y
37CONFIG_GENERIC_HWEIGHT=y 39CONFIG_GENERIC_HWEIGHT=y
@@ -88,6 +90,7 @@ CONFIG_INITRAMFS_SOURCE=""
88CONFIG_SYSCTL=y 90CONFIG_SYSCTL=y
89CONFIG_EMBEDDED=y 91CONFIG_EMBEDDED=y
90CONFIG_SYSCTL_SYSCALL=y 92CONFIG_SYSCTL_SYSCALL=y
93CONFIG_SYSCTL_SYSCALL_CHECK=y
91CONFIG_KALLSYMS=y 94CONFIG_KALLSYMS=y
92CONFIG_KALLSYMS_ALL=y 95CONFIG_KALLSYMS_ALL=y
93CONFIG_KALLSYMS_EXTRA_PASS=y 96CONFIG_KALLSYMS_EXTRA_PASS=y
@@ -115,12 +118,14 @@ CONFIG_HAVE_OPROFILE=y
115# CONFIG_KPROBES is not set 118# CONFIG_KPROBES is not set
116CONFIG_HAVE_KPROBES=y 119CONFIG_HAVE_KPROBES=y
117CONFIG_HAVE_KRETPROBES=y 120CONFIG_HAVE_KRETPROBES=y
121# CONFIG_HAVE_DMA_ATTRS is not set
118CONFIG_PROC_PAGE_MONITOR=y 122CONFIG_PROC_PAGE_MONITOR=y
119CONFIG_SLABINFO=y 123CONFIG_SLABINFO=y
120CONFIG_RT_MUTEXES=y 124CONFIG_RT_MUTEXES=y
121# CONFIG_TINY_SHMEM is not set 125# CONFIG_TINY_SHMEM is not set
122CONFIG_BASE_SMALL=0 126CONFIG_BASE_SMALL=0
123CONFIG_MODULES=y 127CONFIG_MODULES=y
128# CONFIG_MODULE_FORCE_LOAD is not set
124CONFIG_MODULE_UNLOAD=y 129CONFIG_MODULE_UNLOAD=y
125# CONFIG_MODULE_FORCE_UNLOAD is not set 130# CONFIG_MODULE_FORCE_UNLOAD is not set
126# CONFIG_MODVERSIONS is not set 131# CONFIG_MODVERSIONS is not set
@@ -157,6 +162,7 @@ CONFIG_PPC4xx_PCI_EXPRESS=y
157# CONFIG_PQ2ADS is not set 162# CONFIG_PQ2ADS is not set
158CONFIG_BAMBOO=y 163CONFIG_BAMBOO=y
159CONFIG_EBONY=y 164CONFIG_EBONY=y
165CONFIG_SAM440EP=y
160CONFIG_SEQUOIA=y 166CONFIG_SEQUOIA=y
161CONFIG_TAISHAN=y 167CONFIG_TAISHAN=y
162CONFIG_KATMAI=y 168CONFIG_KATMAI=y
@@ -164,6 +170,7 @@ CONFIG_RAINIER=y
164CONFIG_WARP=y 170CONFIG_WARP=y
165CONFIG_CANYONLANDS=y 171CONFIG_CANYONLANDS=y
166CONFIG_YOSEMITE=y 172CONFIG_YOSEMITE=y
173CONFIG_XILINX_VIRTEX440_GENERIC_BOARD=y
167CONFIG_440EP=y 174CONFIG_440EP=y
168CONFIG_440EPX=y 175CONFIG_440EPX=y
169CONFIG_440GRX=y 176CONFIG_440GRX=y
@@ -172,6 +179,8 @@ CONFIG_440GX=y
172CONFIG_440SPe=y 179CONFIG_440SPe=y
173CONFIG_460EX=y 180CONFIG_460EX=y
174CONFIG_IBM440EP_ERR42=y 181CONFIG_IBM440EP_ERR42=y
182CONFIG_XILINX_VIRTEX=y
183CONFIG_XILINX_VIRTEX_5_FXT=y
175# CONFIG_IPIC is not set 184# CONFIG_IPIC is not set
176# CONFIG_MPIC is not set 185# CONFIG_MPIC is not set
177# CONFIG_MPIC_WEIRD is not set 186# CONFIG_MPIC_WEIRD is not set
@@ -220,13 +229,16 @@ CONFIG_FLATMEM=y
220CONFIG_FLAT_NODE_MEM_MAP=y 229CONFIG_FLAT_NODE_MEM_MAP=y
221# CONFIG_SPARSEMEM_STATIC is not set 230# CONFIG_SPARSEMEM_STATIC is not set
222# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set 231# CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set
232CONFIG_PAGEFLAGS_EXTENDED=y
223CONFIG_SPLIT_PTLOCK_CPUS=4 233CONFIG_SPLIT_PTLOCK_CPUS=4
224CONFIG_RESOURCES_64BIT=y 234CONFIG_RESOURCES_64BIT=y
225CONFIG_ZONE_DMA_FLAG=1 235CONFIG_ZONE_DMA_FLAG=1
226CONFIG_BOUNCE=y 236CONFIG_BOUNCE=y
227CONFIG_VIRT_TO_BUS=y 237CONFIG_VIRT_TO_BUS=y
238CONFIG_FORCE_MAX_ZONEORDER=11
228CONFIG_PROC_DEVICETREE=y 239CONFIG_PROC_DEVICETREE=y
229# CONFIG_CMDLINE_BOOL is not set 240# CONFIG_CMDLINE_BOOL is not set
241CONFIG_EXTRA_TARGETS=""
230CONFIG_SECCOMP=y 242CONFIG_SECCOMP=y
231CONFIG_ISA_DMA_API=y 243CONFIG_ISA_DMA_API=y
232 244
@@ -246,6 +258,7 @@ CONFIG_PCI_LEGACY=y
246# CONFIG_PCI_DEBUG is not set 258# CONFIG_PCI_DEBUG is not set
247# CONFIG_PCCARD is not set 259# CONFIG_PCCARD is not set
248# CONFIG_HOTPLUG_PCI is not set 260# CONFIG_HOTPLUG_PCI is not set
261# CONFIG_HAS_RAPIDIO is not set
249 262
250# 263#
251# Advanced setup 264# Advanced setup
@@ -255,13 +268,13 @@ CONFIG_PCI_LEGACY=y
255# 268#
256# Default settings for advanced configuration options are used 269# Default settings for advanced configuration options are used
257# 270#
258CONFIG_HIGHMEM_START=0xfe000000
259CONFIG_LOWMEM_SIZE=0x30000000 271CONFIG_LOWMEM_SIZE=0x30000000
272CONFIG_PAGE_OFFSET=0xc0000000
260CONFIG_KERNEL_START=0xc0000000 273CONFIG_KERNEL_START=0xc0000000
274CONFIG_PHYSICAL_START=0x00000000
261CONFIG_TASK_SIZE=0xc0000000 275CONFIG_TASK_SIZE=0xc0000000
262CONFIG_CONSISTENT_START=0xff100000 276CONFIG_CONSISTENT_START=0xff100000
263CONFIG_CONSISTENT_SIZE=0x00200000 277CONFIG_CONSISTENT_SIZE=0x00200000
264CONFIG_BOOT_LOAD=0x01000000
265 278
266# 279#
267# Networking 280# Networking
@@ -303,8 +316,6 @@ CONFIG_TCP_CONG_CUBIC=y
303CONFIG_DEFAULT_TCP_CONG="cubic" 316CONFIG_DEFAULT_TCP_CONG="cubic"
304# CONFIG_TCP_MD5SIG is not set 317# CONFIG_TCP_MD5SIG is not set
305# CONFIG_IPV6 is not set 318# CONFIG_IPV6 is not set
306# CONFIG_INET6_XFRM_TUNNEL is not set
307# CONFIG_INET6_TUNNEL is not set
308# CONFIG_NETWORK_SECMARK is not set 319# CONFIG_NETWORK_SECMARK is not set
309# CONFIG_NETFILTER is not set 320# CONFIG_NETFILTER is not set
310# CONFIG_IP_DCCP is not set 321# CONFIG_IP_DCCP is not set
@@ -366,6 +377,7 @@ CONFIG_MTD_PARTITIONS=y
366# CONFIG_MTD_REDBOOT_PARTS is not set 377# CONFIG_MTD_REDBOOT_PARTS is not set
367# CONFIG_MTD_CMDLINE_PARTS is not set 378# CONFIG_MTD_CMDLINE_PARTS is not set
368CONFIG_MTD_OF_PARTS=y 379CONFIG_MTD_OF_PARTS=y
380# CONFIG_MTD_AR7_PARTS is not set
369 381
370# 382#
371# User Modules And Translation Layers 383# User Modules And Translation Layers
@@ -478,6 +490,10 @@ CONFIG_HAVE_IDE=y
478# 490#
479# IEEE 1394 (FireWire) support 491# IEEE 1394 (FireWire) support
480# 492#
493
494#
495# Enable only one of the two stacks, unless you know what you are doing
496#
481# CONFIG_FIREWIRE is not set 497# CONFIG_FIREWIRE is not set
482# CONFIG_IEEE1394 is not set 498# CONFIG_IEEE1394 is not set
483# CONFIG_I2O is not set 499# CONFIG_I2O is not set
@@ -528,7 +544,6 @@ CONFIG_NETDEV_1000=y
528# CONFIG_SIS190 is not set 544# CONFIG_SIS190 is not set
529# CONFIG_SKGE is not set 545# CONFIG_SKGE is not set
530# CONFIG_SKY2 is not set 546# CONFIG_SKY2 is not set
531# CONFIG_SK98LIN is not set
532# CONFIG_VIA_VELOCITY is not set 547# CONFIG_VIA_VELOCITY is not set
533# CONFIG_TIGON3 is not set 548# CONFIG_TIGON3 is not set
534# CONFIG_BNX2 is not set 549# CONFIG_BNX2 is not set
@@ -546,6 +561,7 @@ CONFIG_NETDEV_10000=y
546# CONFIG_MLX4_CORE is not set 561# CONFIG_MLX4_CORE is not set
547# CONFIG_TEHUTI is not set 562# CONFIG_TEHUTI is not set
548# CONFIG_BNX2X is not set 563# CONFIG_BNX2X is not set
564# CONFIG_SFC is not set
549# CONFIG_TR is not set 565# CONFIG_TR is not set
550 566
551# 567#
@@ -553,6 +569,7 @@ CONFIG_NETDEV_10000=y
553# 569#
554# CONFIG_WLAN_PRE80211 is not set 570# CONFIG_WLAN_PRE80211 is not set
555# CONFIG_WLAN_80211 is not set 571# CONFIG_WLAN_80211 is not set
572# CONFIG_IWLWIFI_LEDS is not set
556# CONFIG_WAN is not set 573# CONFIG_WAN is not set
557# CONFIG_FDDI is not set 574# CONFIG_FDDI is not set
558# CONFIG_HIPPI is not set 575# CONFIG_HIPPI is not set
@@ -579,6 +596,7 @@ CONFIG_NETDEV_10000=y
579# Character devices 596# Character devices
580# 597#
581# CONFIG_VT is not set 598# CONFIG_VT is not set
599CONFIG_DEVKMEM=y
582# CONFIG_SERIAL_NONSTANDARD is not set 600# CONFIG_SERIAL_NONSTANDARD is not set
583# CONFIG_NOZOMI is not set 601# CONFIG_NOZOMI is not set
584 602
@@ -611,22 +629,19 @@ CONFIG_LEGACY_PTY_COUNT=256
611# CONFIG_HW_RANDOM is not set 629# CONFIG_HW_RANDOM is not set
612# CONFIG_NVRAM is not set 630# CONFIG_NVRAM is not set
613# CONFIG_GEN_RTC is not set 631# CONFIG_GEN_RTC is not set
632CONFIG_XILINX_HWICAP=m
614# CONFIG_R3964 is not set 633# CONFIG_R3964 is not set
615# CONFIG_APPLICOM is not set 634# CONFIG_APPLICOM is not set
616# CONFIG_RAW_DRIVER is not set 635# CONFIG_RAW_DRIVER is not set
617# CONFIG_TCG_TPM is not set 636# CONFIG_TCG_TPM is not set
618CONFIG_DEVPORT=y 637CONFIG_DEVPORT=y
619# CONFIG_I2C is not set 638# CONFIG_I2C is not set
620
621#
622# SPI support
623#
624# CONFIG_SPI is not set 639# CONFIG_SPI is not set
625# CONFIG_SPI_MASTER is not set
626# CONFIG_W1 is not set 640# CONFIG_W1 is not set
627# CONFIG_POWER_SUPPLY is not set 641# CONFIG_POWER_SUPPLY is not set
628# CONFIG_HWMON is not set 642# CONFIG_HWMON is not set
629# CONFIG_THERMAL is not set 643# CONFIG_THERMAL is not set
644# CONFIG_THERMAL_HWMON is not set
630# CONFIG_WATCHDOG is not set 645# CONFIG_WATCHDOG is not set
631 646
632# 647#
@@ -639,12 +654,22 @@ CONFIG_SSB_POSSIBLE=y
639# Multifunction device drivers 654# Multifunction device drivers
640# 655#
641# CONFIG_MFD_SM501 is not set 656# CONFIG_MFD_SM501 is not set
657# CONFIG_HTC_PASIC3 is not set
642 658
643# 659#
644# Multimedia devices 660# Multimedia devices
645# 661#
662
663#
664# Multimedia core support
665#
646# CONFIG_VIDEO_DEV is not set 666# CONFIG_VIDEO_DEV is not set
647# CONFIG_DVB_CORE is not set 667# CONFIG_DVB_CORE is not set
668# CONFIG_VIDEO_MEDIA is not set
669
670#
671# Multimedia drivers
672#
648# CONFIG_DAB is not set 673# CONFIG_DAB is not set
649 674
650# 675#
@@ -671,6 +696,8 @@ CONFIG_USB_ARCH_HAS_HCD=y
671CONFIG_USB_ARCH_HAS_OHCI=y 696CONFIG_USB_ARCH_HAS_OHCI=y
672CONFIG_USB_ARCH_HAS_EHCI=y 697CONFIG_USB_ARCH_HAS_EHCI=y
673# CONFIG_USB is not set 698# CONFIG_USB is not set
699# CONFIG_USB_OTG_WHITELIST is not set
700# CONFIG_USB_OTG_BLACKLIST_HUB is not set
674 701
675# 702#
676# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' 703# NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support'
@@ -679,14 +706,11 @@ CONFIG_USB_ARCH_HAS_EHCI=y
679# CONFIG_MMC is not set 706# CONFIG_MMC is not set
680# CONFIG_MEMSTICK is not set 707# CONFIG_MEMSTICK is not set
681# CONFIG_NEW_LEDS is not set 708# CONFIG_NEW_LEDS is not set
709# CONFIG_ACCESSIBILITY is not set
682# CONFIG_INFINIBAND is not set 710# CONFIG_INFINIBAND is not set
683# CONFIG_EDAC is not set 711# CONFIG_EDAC is not set
684# CONFIG_RTC_CLASS is not set 712# CONFIG_RTC_CLASS is not set
685# CONFIG_DMADEVICES is not set 713# CONFIG_DMADEVICES is not set
686
687#
688# Userspace I/O
689#
690# CONFIG_UIO is not set 714# CONFIG_UIO is not set
691 715
692# 716#
@@ -701,7 +725,6 @@ CONFIG_EXT2_FS=y
701# CONFIG_JFS_FS is not set 725# CONFIG_JFS_FS is not set
702# CONFIG_FS_POSIX_ACL is not set 726# CONFIG_FS_POSIX_ACL is not set
703# CONFIG_XFS_FS is not set 727# CONFIG_XFS_FS is not set
704# CONFIG_GFS2_FS is not set
705# CONFIG_OCFS2_FS is not set 728# CONFIG_OCFS2_FS is not set
706CONFIG_DNOTIFY=y 729CONFIG_DNOTIFY=y
707CONFIG_INOTIFY=y 730CONFIG_INOTIFY=y
@@ -770,7 +793,6 @@ CONFIG_NFS_FS=y
770CONFIG_NFS_V3=y 793CONFIG_NFS_V3=y
771# CONFIG_NFS_V3_ACL is not set 794# CONFIG_NFS_V3_ACL is not set
772# CONFIG_NFS_V4 is not set 795# CONFIG_NFS_V4 is not set
773# CONFIG_NFS_DIRECTIO is not set
774# CONFIG_NFSD is not set 796# CONFIG_NFSD is not set
775CONFIG_ROOT_NFS=y 797CONFIG_ROOT_NFS=y
776CONFIG_LOCKD=y 798CONFIG_LOCKD=y
@@ -798,6 +820,7 @@ CONFIG_MSDOS_PARTITION=y
798# Library routines 820# Library routines
799# 821#
800CONFIG_BITREVERSE=y 822CONFIG_BITREVERSE=y
823# CONFIG_GENERIC_FIND_FIRST_BIT is not set
801# CONFIG_CRC_CCITT is not set 824# CONFIG_CRC_CCITT is not set
802# CONFIG_CRC16 is not set 825# CONFIG_CRC16 is not set
803# CONFIG_CRC_ITU_T is not set 826# CONFIG_CRC_ITU_T is not set
@@ -818,6 +841,7 @@ CONFIG_HAVE_LMB=y
818# CONFIG_PRINTK_TIME is not set 841# CONFIG_PRINTK_TIME is not set
819CONFIG_ENABLE_WARN_DEPRECATED=y 842CONFIG_ENABLE_WARN_DEPRECATED=y
820CONFIG_ENABLE_MUST_CHECK=y 843CONFIG_ENABLE_MUST_CHECK=y
844CONFIG_FRAME_WARN=1024
821CONFIG_MAGIC_SYSRQ=y 845CONFIG_MAGIC_SYSRQ=y
822# CONFIG_UNUSED_SYMBOLS is not set 846# CONFIG_UNUSED_SYMBOLS is not set
823# CONFIG_DEBUG_FS is not set 847# CONFIG_DEBUG_FS is not set
@@ -828,6 +852,7 @@ CONFIG_DETECT_SOFTLOCKUP=y
828CONFIG_SCHED_DEBUG=y 852CONFIG_SCHED_DEBUG=y
829# CONFIG_SCHEDSTATS is not set 853# CONFIG_SCHEDSTATS is not set
830# CONFIG_TIMER_STATS is not set 854# CONFIG_TIMER_STATS is not set
855# CONFIG_DEBUG_OBJECTS is not set
831# CONFIG_SLUB_DEBUG_ON is not set 856# CONFIG_SLUB_DEBUG_ON is not set
832# CONFIG_SLUB_STATS is not set 857# CONFIG_SLUB_STATS is not set
833# CONFIG_DEBUG_RT_MUTEXES is not set 858# CONFIG_DEBUG_RT_MUTEXES is not set
@@ -840,6 +865,7 @@ CONFIG_SCHED_DEBUG=y
840CONFIG_DEBUG_BUGVERBOSE=y 865CONFIG_DEBUG_BUGVERBOSE=y
841# CONFIG_DEBUG_INFO is not set 866# CONFIG_DEBUG_INFO is not set
842# CONFIG_DEBUG_VM is not set 867# CONFIG_DEBUG_VM is not set
868# CONFIG_DEBUG_WRITECOUNT is not set
843# CONFIG_DEBUG_LIST is not set 869# CONFIG_DEBUG_LIST is not set
844# CONFIG_DEBUG_SG is not set 870# CONFIG_DEBUG_SG is not set
845# CONFIG_BOOT_PRINTK_DELAY is not set 871# CONFIG_BOOT_PRINTK_DELAY is not set
@@ -851,6 +877,9 @@ CONFIG_DEBUG_BUGVERBOSE=y
851# CONFIG_DEBUG_STACK_USAGE is not set 877# CONFIG_DEBUG_STACK_USAGE is not set
852# CONFIG_DEBUG_PAGEALLOC is not set 878# CONFIG_DEBUG_PAGEALLOC is not set
853# CONFIG_DEBUGGER is not set 879# CONFIG_DEBUGGER is not set
880# CONFIG_CODE_PATCHING_SELFTEST is not set
881# CONFIG_FTR_FIXUP_SELFTEST is not set
882# CONFIG_IRQSTACKS is not set
854# CONFIG_BDI_SWITCH is not set 883# CONFIG_BDI_SWITCH is not set
855# CONFIG_PPC_EARLY_DEBUG is not set 884# CONFIG_PPC_EARLY_DEBUG is not set
856 885
@@ -861,50 +890,80 @@ CONFIG_DEBUG_BUGVERBOSE=y
861# CONFIG_SECURITY is not set 890# CONFIG_SECURITY is not set
862# CONFIG_SECURITY_FILE_CAPABILITIES is not set 891# CONFIG_SECURITY_FILE_CAPABILITIES is not set
863CONFIG_CRYPTO=y 892CONFIG_CRYPTO=y
893
894#
895# Crypto core or helper
896#
864CONFIG_CRYPTO_ALGAPI=y 897CONFIG_CRYPTO_ALGAPI=y
865CONFIG_CRYPTO_BLKCIPHER=y 898CONFIG_CRYPTO_BLKCIPHER=y
866# CONFIG_CRYPTO_SEQIV is not set
867CONFIG_CRYPTO_MANAGER=y 899CONFIG_CRYPTO_MANAGER=y
900# CONFIG_CRYPTO_GF128MUL is not set
901# CONFIG_CRYPTO_NULL is not set
902# CONFIG_CRYPTO_CRYPTD is not set
903# CONFIG_CRYPTO_AUTHENC is not set
904# CONFIG_CRYPTO_TEST is not set
905
906#
907# Authenticated Encryption with Associated Data
908#
909# CONFIG_CRYPTO_CCM is not set
910# CONFIG_CRYPTO_GCM is not set
911# CONFIG_CRYPTO_SEQIV is not set
912
913#
914# Block modes
915#
916CONFIG_CRYPTO_CBC=y
917# CONFIG_CRYPTO_CTR is not set
918# CONFIG_CRYPTO_CTS is not set
919CONFIG_CRYPTO_ECB=y
920# CONFIG_CRYPTO_LRW is not set
921CONFIG_CRYPTO_PCBC=y
922# CONFIG_CRYPTO_XTS is not set
923
924#
925# Hash modes
926#
868# CONFIG_CRYPTO_HMAC is not set 927# CONFIG_CRYPTO_HMAC is not set
869# CONFIG_CRYPTO_XCBC is not set 928# CONFIG_CRYPTO_XCBC is not set
870# CONFIG_CRYPTO_NULL is not set 929
930#
931# Digest
932#
933# CONFIG_CRYPTO_CRC32C is not set
871# CONFIG_CRYPTO_MD4 is not set 934# CONFIG_CRYPTO_MD4 is not set
872CONFIG_CRYPTO_MD5=y 935CONFIG_CRYPTO_MD5=y
936# CONFIG_CRYPTO_MICHAEL_MIC is not set
873# CONFIG_CRYPTO_SHA1 is not set 937# CONFIG_CRYPTO_SHA1 is not set
874# CONFIG_CRYPTO_SHA256 is not set 938# CONFIG_CRYPTO_SHA256 is not set
875# CONFIG_CRYPTO_SHA512 is not set 939# CONFIG_CRYPTO_SHA512 is not set
876# CONFIG_CRYPTO_WP512 is not set
877# CONFIG_CRYPTO_TGR192 is not set 940# CONFIG_CRYPTO_TGR192 is not set
878# CONFIG_CRYPTO_GF128MUL is not set 941# CONFIG_CRYPTO_WP512 is not set
879CONFIG_CRYPTO_ECB=y 942
880CONFIG_CRYPTO_CBC=y 943#
881CONFIG_CRYPTO_PCBC=y 944# Ciphers
882# CONFIG_CRYPTO_LRW is not set 945#
883# CONFIG_CRYPTO_XTS is not set
884# CONFIG_CRYPTO_CTR is not set
885# CONFIG_CRYPTO_GCM is not set
886# CONFIG_CRYPTO_CCM is not set
887# CONFIG_CRYPTO_CRYPTD is not set
888CONFIG_CRYPTO_DES=y
889# CONFIG_CRYPTO_FCRYPT is not set
890# CONFIG_CRYPTO_BLOWFISH is not set
891# CONFIG_CRYPTO_TWOFISH is not set
892# CONFIG_CRYPTO_SERPENT is not set
893# CONFIG_CRYPTO_AES is not set 946# CONFIG_CRYPTO_AES is not set
947# CONFIG_CRYPTO_ANUBIS is not set
948# CONFIG_CRYPTO_ARC4 is not set
949# CONFIG_CRYPTO_BLOWFISH is not set
950# CONFIG_CRYPTO_CAMELLIA is not set
894# CONFIG_CRYPTO_CAST5 is not set 951# CONFIG_CRYPTO_CAST5 is not set
895# CONFIG_CRYPTO_CAST6 is not set 952# CONFIG_CRYPTO_CAST6 is not set
896# CONFIG_CRYPTO_TEA is not set 953CONFIG_CRYPTO_DES=y
897# CONFIG_CRYPTO_ARC4 is not set 954# CONFIG_CRYPTO_FCRYPT is not set
898# CONFIG_CRYPTO_KHAZAD is not set 955# CONFIG_CRYPTO_KHAZAD is not set
899# CONFIG_CRYPTO_ANUBIS is not set
900# CONFIG_CRYPTO_SEED is not set
901# CONFIG_CRYPTO_SALSA20 is not set 956# CONFIG_CRYPTO_SALSA20 is not set
957# CONFIG_CRYPTO_SEED is not set
958# CONFIG_CRYPTO_SERPENT is not set
959# CONFIG_CRYPTO_TEA is not set
960# CONFIG_CRYPTO_TWOFISH is not set
961
962#
963# Compression
964#
902# CONFIG_CRYPTO_DEFLATE is not set 965# CONFIG_CRYPTO_DEFLATE is not set
903# CONFIG_CRYPTO_MICHAEL_MIC is not set
904# CONFIG_CRYPTO_CRC32C is not set
905# CONFIG_CRYPTO_CAMELLIA is not set
906# CONFIG_CRYPTO_TEST is not set
907# CONFIG_CRYPTO_AUTHENC is not set
908# CONFIG_CRYPTO_LZO is not set 966# CONFIG_CRYPTO_LZO is not set
909# CONFIG_CRYPTO_HW is not set 967# CONFIG_CRYPTO_HW is not set
910# CONFIG_PPC_CLOCK is not set 968# CONFIG_PPC_CLOCK is not set
969# CONFIG_VIRTUALIZATION is not set
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index adaa05fb0478..fe6ffa683d78 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -946,6 +946,7 @@ CONFIG_HVC_DRIVER=y
946CONFIG_HVC_CONSOLE=y 946CONFIG_HVC_CONSOLE=y
947CONFIG_HVC_RTAS=y 947CONFIG_HVC_RTAS=y
948CONFIG_HVCS=m 948CONFIG_HVCS=m
949CONFIG_IBM_BSR=m
949# CONFIG_IPMI_HANDLER is not set 950# CONFIG_IPMI_HANDLER is not set
950# CONFIG_HW_RANDOM is not set 951# CONFIG_HW_RANDOM is not set
951CONFIG_GEN_RTC=y 952CONFIG_GEN_RTC=y
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index f3f5e2641432..bf0b1fd0ec34 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -50,12 +50,13 @@ obj-$(CONFIG_IBMVIO) += vio.o
50obj-$(CONFIG_IBMEBUS) += ibmebus.o 50obj-$(CONFIG_IBMEBUS) += ibmebus.o
51obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o 51obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o
52obj-$(CONFIG_CRASH_DUMP) += crash_dump.o 52obj-$(CONFIG_CRASH_DUMP) += crash_dump.o
53obj-$(CONFIG_E500) += idle_e500.o
53obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o 54obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
54obj-$(CONFIG_TAU) += tau_6xx.o 55obj-$(CONFIG_TAU) += tau_6xx.o
55obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ 56obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \
56 swsusp_$(CONFIG_WORD_SIZE).o 57 swsusp_$(CONFIG_WORD_SIZE).o
57obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o 58obj64-$(CONFIG_HIBERNATION) += swsusp_asm64.o
58obj-$(CONFIG_MODULES) += module_$(CONFIG_WORD_SIZE).o 59obj-$(CONFIG_MODULES) += module.o module_$(CONFIG_WORD_SIZE).o
59obj-$(CONFIG_44x) += cpu_setup_44x.o 60obj-$(CONFIG_44x) += cpu_setup_44x.o
60 61
61ifeq ($(CONFIG_PPC_MERGE),y) 62ifeq ($(CONFIG_PPC_MERGE),y)
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index e06f75daeba3..367129789cc0 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -48,6 +48,7 @@ struct aligninfo {
48#define HARD 0x80 /* string, stwcx. */ 48#define HARD 0x80 /* string, stwcx. */
49#define E4 0x40 /* SPE endianness is word */ 49#define E4 0x40 /* SPE endianness is word */
50#define E8 0x80 /* SPE endianness is double word */ 50#define E8 0x80 /* SPE endianness is double word */
51#define SPLT 0x80 /* VSX SPLAT load */
51 52
52/* DSISR bits reported for a DCBZ instruction: */ 53/* DSISR bits reported for a DCBZ instruction: */
53#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */ 54#define DCBZ 0x5f /* 8xx/82xx dcbz faults when cache not enabled */
@@ -363,10 +364,10 @@ static int emulate_multiple(struct pt_regs *regs, unsigned char __user *addr,
363 * Only POWER6 has these instructions, and it does true little-endian, 364 * Only POWER6 has these instructions, and it does true little-endian,
364 * so we don't need the address swizzling. 365 * so we don't need the address swizzling.
365 */ 366 */
366static int emulate_fp_pair(struct pt_regs *regs, unsigned char __user *addr, 367static int emulate_fp_pair(unsigned char __user *addr, unsigned int reg,
367 unsigned int reg, unsigned int flags) 368 unsigned int flags)
368{ 369{
369 char *ptr = (char *) &current->thread.fpr[reg]; 370 char *ptr = (char *) &current->thread.TS_FPR(reg);
370 int i, ret; 371 int i, ret;
371 372
372 if (!(flags & F)) 373 if (!(flags & F))
@@ -637,6 +638,36 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg,
637} 638}
638#endif /* CONFIG_SPE */ 639#endif /* CONFIG_SPE */
639 640
641#ifdef CONFIG_VSX
642/*
643 * Emulate VSX instructions...
644 */
645static int emulate_vsx(unsigned char __user *addr, unsigned int reg,
646 unsigned int areg, struct pt_regs *regs,
647 unsigned int flags, unsigned int length)
648{
649 char *ptr = (char *) &current->thread.TS_FPR(reg);
650 int ret;
651
652 flush_vsx_to_thread(current);
653
654 if (flags & ST)
655 ret = __copy_to_user(addr, ptr, length);
656 else {
657 if (flags & SPLT){
658 ret = __copy_from_user(ptr, addr, length);
659 ptr += length;
660 }
661 ret |= __copy_from_user(ptr, addr, length);
662 }
663 if (flags & U)
664 regs->gpr[areg] = regs->dar;
665 if (ret)
666 return -EFAULT;
667 return 1;
668}
669#endif
670
640/* 671/*
641 * Called on alignment exception. Attempts to fixup 672 * Called on alignment exception. Attempts to fixup
642 * 673 *
@@ -647,7 +678,7 @@ static int emulate_spe(struct pt_regs *regs, unsigned int reg,
647 678
648int fix_alignment(struct pt_regs *regs) 679int fix_alignment(struct pt_regs *regs)
649{ 680{
650 unsigned int instr, nb, flags; 681 unsigned int instr, nb, flags, instruction = 0;
651 unsigned int reg, areg; 682 unsigned int reg, areg;
652 unsigned int dsisr; 683 unsigned int dsisr;
653 unsigned char __user *addr; 684 unsigned char __user *addr;
@@ -689,6 +720,7 @@ int fix_alignment(struct pt_regs *regs)
689 if (cpu_has_feature(CPU_FTR_REAL_LE) && (regs->msr & MSR_LE)) 720 if (cpu_has_feature(CPU_FTR_REAL_LE) && (regs->msr & MSR_LE))
690 instr = cpu_to_le32(instr); 721 instr = cpu_to_le32(instr);
691 dsisr = make_dsisr(instr); 722 dsisr = make_dsisr(instr);
723 instruction = instr;
692 } 724 }
693 725
694 /* extract the operation and registers from the dsisr */ 726 /* extract the operation and registers from the dsisr */
@@ -728,6 +760,30 @@ int fix_alignment(struct pt_regs *regs)
728 /* DAR has the operand effective address */ 760 /* DAR has the operand effective address */
729 addr = (unsigned char __user *)regs->dar; 761 addr = (unsigned char __user *)regs->dar;
730 762
763#ifdef CONFIG_VSX
764 if ((instruction & 0xfc00003e) == 0x7c000018) {
765 /* Additional register addressing bit (64 VSX vs 32 FPR/GPR */
766 reg |= (instruction & 0x1) << 5;
767 /* Simple inline decoder instead of a table */
768 if (instruction & 0x200)
769 nb = 16;
770 else if (instruction & 0x080)
771 nb = 8;
772 else
773 nb = 4;
774 flags = 0;
775 if (instruction & 0x100)
776 flags |= ST;
777 if (instruction & 0x040)
778 flags |= U;
779 /* splat load needs a special decoder */
780 if ((instruction & 0x400) == 0){
781 flags |= SPLT;
782 nb = 8;
783 }
784 return emulate_vsx(addr, reg, areg, regs, flags, nb);
785 }
786#endif
731 /* A size of 0 indicates an instruction we don't support, with 787 /* A size of 0 indicates an instruction we don't support, with
732 * the exception of DCBZ which is handled as a special case here 788 * the exception of DCBZ which is handled as a special case here
733 */ 789 */
@@ -759,7 +815,7 @@ int fix_alignment(struct pt_regs *regs)
759 815
760 /* Special case for 16-byte FP loads and stores */ 816 /* Special case for 16-byte FP loads and stores */
761 if (nb == 16) 817 if (nb == 16)
762 return emulate_fp_pair(regs, addr, reg, flags); 818 return emulate_fp_pair(addr, reg, flags);
763 819
764 /* If we are loading, get the data from user space, else 820 /* If we are loading, get the data from user space, else
765 * get it from register values 821 * get it from register values
@@ -784,7 +840,7 @@ int fix_alignment(struct pt_regs *regs)
784 return -EFAULT; 840 return -EFAULT;
785 } 841 }
786 } else if (flags & F) { 842 } else if (flags & F) {
787 data.dd = current->thread.fpr[reg]; 843 data.dd = current->thread.TS_FPR(reg);
788 if (flags & S) { 844 if (flags & S) {
789 /* Single-precision FP store requires conversion... */ 845 /* Single-precision FP store requires conversion... */
790#ifdef CONFIG_PPC_FPU 846#ifdef CONFIG_PPC_FPU
@@ -862,7 +918,7 @@ int fix_alignment(struct pt_regs *regs)
862 if (unlikely(ret)) 918 if (unlikely(ret))
863 return -EFAULT; 919 return -EFAULT;
864 } else if (flags & F) 920 } else if (flags & F)
865 current->thread.fpr[reg] = data.dd; 921 current->thread.TS_FPR(reg) = data.dd;
866 else 922 else
867 regs->gpr[reg] = data.ll; 923 regs->gpr[reg] = data.ll;
868 924
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index ec9228d687b0..92768d3006f7 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -52,6 +52,10 @@
52#include <asm/iseries/alpaca.h> 52#include <asm/iseries/alpaca.h>
53#endif 53#endif
54 54
55#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
56#include "head_booke.h"
57#endif
58
55int main(void) 59int main(void)
56{ 60{
57 DEFINE(THREAD, offsetof(struct task_struct, thread)); 61 DEFINE(THREAD, offsetof(struct task_struct, thread));
@@ -74,6 +78,10 @@ int main(void)
74 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr)); 78 DEFINE(THREAD_VSCR, offsetof(struct thread_struct, vscr));
75 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr)); 79 DEFINE(THREAD_USED_VR, offsetof(struct thread_struct, used_vr));
76#endif /* CONFIG_ALTIVEC */ 80#endif /* CONFIG_ALTIVEC */
81#ifdef CONFIG_VSX
82 DEFINE(THREAD_VSR0, offsetof(struct thread_struct, fpr));
83 DEFINE(THREAD_USED_VSR, offsetof(struct thread_struct, used_vsr));
84#endif /* CONFIG_VSX */
77#ifdef CONFIG_PPC64 85#ifdef CONFIG_PPC64
78 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid)); 86 DEFINE(KSP_VSID, offsetof(struct thread_struct, ksp_vsid));
79#else /* CONFIG_PPC64 */ 87#else /* CONFIG_PPC64 */
@@ -242,6 +250,25 @@ int main(void)
242 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); 250 DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8);
243#endif /* CONFIG_PPC64 */ 251#endif /* CONFIG_PPC64 */
244 252
253#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
254 DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE);
255 DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
256 /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */
257 DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0));
258 DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1));
259 DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2));
260 DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3));
261 DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6));
262 DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7));
263 DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0));
264 DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1));
265 DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0));
266 DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1));
267 DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0));
268 DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1));
269 DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit));
270#endif
271
245 DEFINE(CLONE_VM, CLONE_VM); 272 DEFINE(CLONE_VM, CLONE_VM);
246 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); 273 DEFINE(CLONE_UNTRACED, CLONE_UNTRACED);
247 274
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index e3623e3e3451..5465e8de0e61 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -33,6 +33,7 @@ _GLOBAL(__setup_cpu_440grx)
33 mtlr r4 33 mtlr r4
34 blr 34 blr
35_GLOBAL(__setup_cpu_460ex) 35_GLOBAL(__setup_cpu_460ex)
36_GLOBAL(__setup_cpu_460gt)
36 b __init_fpu_44x 37 b __init_fpu_44x
37_GLOBAL(__setup_cpu_440gx) 38_GLOBAL(__setup_cpu_440gx)
38_GLOBAL(__setup_cpu_440spe) 39_GLOBAL(__setup_cpu_440spe)
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index e44d5530f0a6..f7f3c215d06f 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -37,6 +37,7 @@ extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec);
37extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); 37extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec);
38extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); 38extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec);
39extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); 39extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
40extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); 41extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
41extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); 42extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
42extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); 43extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -52,6 +53,8 @@ extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
52extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec); 53extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
53extern void __restore_cpu_pa6t(void); 54extern void __restore_cpu_pa6t(void);
54extern void __restore_cpu_ppc970(void); 55extern void __restore_cpu_ppc970(void);
56extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
57extern void __restore_cpu_power7(void);
55#endif /* CONFIG_PPC64 */ 58#endif /* CONFIG_PPC64 */
56 59
57/* This table only contains "desktop" CPUs, it need to be filled with embedded 60/* This table only contains "desktop" CPUs, it need to be filled with embedded
@@ -67,7 +70,12 @@ extern void __restore_cpu_ppc970(void);
67 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP) 70 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP)
68#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\ 71#define COMMON_USER_POWER6 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_05 |\
69 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \ 72 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
70 PPC_FEATURE_TRUE_LE) 73 PPC_FEATURE_TRUE_LE | \
74 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
75#define COMMON_USER_POWER7 (COMMON_USER_PPC64 | PPC_FEATURE_ARCH_2_06 |\
76 PPC_FEATURE_SMT | PPC_FEATURE_ICACHE_SNOOP | \
77 PPC_FEATURE_TRUE_LE | \
78 PPC_FEATURE_PSERIES_PERFMON_COMPAT)
71#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\ 79#define COMMON_USER_PA6T (COMMON_USER_PPC64 | PPC_FEATURE_PA6T |\
72 PPC_FEATURE_TRUE_LE | \ 80 PPC_FEATURE_TRUE_LE | \
73 PPC_FEATURE_HAS_ALTIVEC_COMP) 81 PPC_FEATURE_HAS_ALTIVEC_COMP)
@@ -380,6 +388,37 @@ static struct cpu_spec __initdata cpu_specs[] = {
380 .machine_check = machine_check_generic, 388 .machine_check = machine_check_generic,
381 .platform = "power6", 389 .platform = "power6",
382 }, 390 },
391 { /* 2.06-compliant processor, i.e. Power7 "architected" mode */
392 .pvr_mask = 0xffffffff,
393 .pvr_value = 0x0f000003,
394 .cpu_name = "POWER7 (architected)",
395 .cpu_features = CPU_FTRS_POWER7,
396 .cpu_user_features = COMMON_USER_POWER7,
397 .icache_bsize = 128,
398 .dcache_bsize = 128,
399 .machine_check = machine_check_generic,
400 .platform = "power7",
401 },
402 { /* Power7 */
403 .pvr_mask = 0xffff0000,
404 .pvr_value = 0x003f0000,
405 .cpu_name = "POWER7 (raw)",
406 .cpu_features = CPU_FTRS_POWER7,
407 .cpu_user_features = COMMON_USER_POWER7,
408 .icache_bsize = 128,
409 .dcache_bsize = 128,
410 .num_pmcs = 6,
411 .pmc_type = PPC_PMC_IBM,
412 .cpu_setup = __setup_cpu_power7,
413 .cpu_restore = __restore_cpu_power7,
414 .oprofile_cpu_type = "ppc64/power7",
415 .oprofile_type = PPC_OPROFILE_POWER4,
416 .oprofile_mmcra_sihv = POWER6_MMCRA_SIHV,
417 .oprofile_mmcra_sipr = POWER6_MMCRA_SIPR,
418 .oprofile_mmcra_clear = POWER6_MMCRA_THRM |
419 POWER6_MMCRA_OTHER,
420 .platform = "power7",
421 },
383 { /* Cell Broadband Engine */ 422 { /* Cell Broadband Engine */
384 .pvr_mask = 0xffff0000, 423 .pvr_mask = 0xffff0000,
385 .pvr_value = 0x00700000, 424 .pvr_value = 0x00700000,
@@ -1410,6 +1449,16 @@ static struct cpu_spec __initdata cpu_specs[] = {
1410 .machine_check = machine_check_440A, 1449 .machine_check = machine_check_440A,
1411 .platform = "ppc440", 1450 .platform = "ppc440",
1412 }, 1451 },
1452 { /* 440 in Xilinx Virtex-5 FXT */
1453 .pvr_mask = 0xfffffff0,
1454 .pvr_value = 0x7ff21910,
1455 .cpu_name = "440 in Virtex-5 FXT",
1456 .cpu_features = CPU_FTRS_44X,
1457 .cpu_user_features = COMMON_USER_BOOKE,
1458 .icache_bsize = 32,
1459 .dcache_bsize = 32,
1460 .platform = "ppc440",
1461 },
1413 { /* 460EX */ 1462 { /* 460EX */
1414 .pvr_mask = 0xffff0002, 1463 .pvr_mask = 0xffff0002,
1415 .pvr_value = 0x13020002, 1464 .pvr_value = 0x13020002,
@@ -1427,9 +1476,10 @@ static struct cpu_spec __initdata cpu_specs[] = {
1427 .pvr_value = 0x13020000, 1476 .pvr_value = 0x13020000,
1428 .cpu_name = "460GT", 1477 .cpu_name = "460GT",
1429 .cpu_features = CPU_FTRS_44X, 1478 .cpu_features = CPU_FTRS_44X,
1430 .cpu_user_features = COMMON_USER_BOOKE, 1479 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1431 .icache_bsize = 32, 1480 .icache_bsize = 32,
1432 .dcache_bsize = 32, 1481 .dcache_bsize = 32,
1482 .cpu_setup = __setup_cpu_460gt,
1433 .machine_check = machine_check_440A, 1483 .machine_check = machine_check_440A,
1434 .platform = "ppc440", 1484 .platform = "ppc440",
1435 }, 1485 },
@@ -1491,7 +1541,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
1491 .pvr_mask = 0xffff0000, 1541 .pvr_mask = 0xffff0000,
1492 .pvr_value = 0x80200000, 1542 .pvr_value = 0x80200000,
1493 .cpu_name = "e500", 1543 .cpu_name = "e500",
1494 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1495 .cpu_features = CPU_FTRS_E500, 1544 .cpu_features = CPU_FTRS_E500,
1496 .cpu_user_features = COMMON_USER_BOOKE | 1545 .cpu_user_features = COMMON_USER_BOOKE |
1497 PPC_FEATURE_HAS_SPE_COMP | 1546 PPC_FEATURE_HAS_SPE_COMP |
@@ -1508,7 +1557,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
1508 .pvr_mask = 0xffff0000, 1557 .pvr_mask = 0xffff0000,
1509 .pvr_value = 0x80210000, 1558 .pvr_value = 0x80210000,
1510 .cpu_name = "e500v2", 1559 .cpu_name = "e500v2",
1511 /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */
1512 .cpu_features = CPU_FTRS_E500_2, 1560 .cpu_features = CPU_FTRS_E500_2,
1513 .cpu_user_features = COMMON_USER_BOOKE | 1561 .cpu_user_features = COMMON_USER_BOOKE |
1514 PPC_FEATURE_HAS_SPE_COMP | 1562 PPC_FEATURE_HAS_SPE_COMP |
@@ -1522,6 +1570,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
1522 .machine_check = machine_check_e500, 1570 .machine_check = machine_check_e500,
1523 .platform = "ppc8548", 1571 .platform = "ppc8548",
1524 }, 1572 },
1573 { /* e500mc */
1574 .pvr_mask = 0xffff0000,
1575 .pvr_value = 0x80230000,
1576 .cpu_name = "e500mc",
1577 .cpu_features = CPU_FTRS_E500MC,
1578 .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
1579 .icache_bsize = 64,
1580 .dcache_bsize = 64,
1581 .num_pmcs = 4,
1582 .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */
1583 .oprofile_type = PPC_OPROFILE_FSL_EMB,
1584 .machine_check = machine_check_e500,
1585 .platform = "ppce500mc",
1586 },
1525 { /* default match */ 1587 { /* default match */
1526 .pvr_mask = 0x00000000, 1588 .pvr_mask = 0x00000000,
1527 .pvr_value = 0x00000000, 1589 .pvr_value = 0x00000000,
@@ -1587,38 +1649,3 @@ struct cpu_spec * __init identify_cpu(unsigned long offset, unsigned int pvr)
1587 BUG(); 1649 BUG();
1588 return NULL; 1650 return NULL;
1589} 1651}
1590
1591void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
1592{
1593 struct fixup_entry {
1594 unsigned long mask;
1595 unsigned long value;
1596 long start_off;
1597 long end_off;
1598 } *fcur, *fend;
1599
1600 fcur = fixup_start;
1601 fend = fixup_end;
1602
1603 for (; fcur < fend; fcur++) {
1604 unsigned int *pstart, *pend, *p;
1605
1606 if ((value & fcur->mask) == fcur->value)
1607 continue;
1608
1609 /* These PTRRELOCs will disappear once the new scheme for
1610 * modules and vdso is implemented
1611 */
1612 pstart = ((unsigned int *)fcur) + (fcur->start_off / 4);
1613 pend = ((unsigned int *)fcur) + (fcur->end_off / 4);
1614
1615 for (p = pstart; p < pend; p++) {
1616 *p = 0x60000000u;
1617 asm volatile ("dcbst 0, %0" : : "r" (p));
1618 }
1619 asm volatile ("sync" : : : "memory");
1620 for (p = pstart; p < pend; p++)
1621 asm volatile ("icbi 0,%0" : : "r" (p));
1622 asm volatile ("sync; isync" : : : "memory");
1623 }
1624}
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index eae401de3f76..0a8439aafdd1 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -48,7 +48,7 @@ int crashing_cpu = -1;
48static cpumask_t cpus_in_crash = CPU_MASK_NONE; 48static cpumask_t cpus_in_crash = CPU_MASK_NONE;
49cpumask_t cpus_in_sr = CPU_MASK_NONE; 49cpumask_t cpus_in_sr = CPU_MASK_NONE;
50 50
51#define CRASH_HANDLER_MAX 1 51#define CRASH_HANDLER_MAX 2
52/* NULL terminated list of shutdown handles */ 52/* NULL terminated list of shutdown handles */
53static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1]; 53static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
54static DEFINE_SPINLOCK(crash_handlers_lock); 54static DEFINE_SPINLOCK(crash_handlers_lock);
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 9ee3c5278db0..e0debcca0bfa 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -14,6 +14,7 @@
14#include <linux/crash_dump.h> 14#include <linux/crash_dump.h>
15#include <linux/bootmem.h> 15#include <linux/bootmem.h>
16#include <linux/lmb.h> 16#include <linux/lmb.h>
17#include <asm/code-patching.h>
17#include <asm/kdump.h> 18#include <asm/kdump.h>
18#include <asm/prom.h> 19#include <asm/prom.h>
19#include <asm/firmware.h> 20#include <asm/firmware.h>
@@ -33,6 +34,8 @@ void __init reserve_kdump_trampoline(void)
33 34
34static void __init create_trampoline(unsigned long addr) 35static void __init create_trampoline(unsigned long addr)
35{ 36{
37 unsigned int *p = (unsigned int *)addr;
38
36 /* The maximum range of a single instruction branch, is the current 39 /* The maximum range of a single instruction branch, is the current
37 * instruction's address + (32 MB - 4) bytes. For the trampoline we 40 * instruction's address + (32 MB - 4) bytes. For the trampoline we
38 * need to branch to current address + 32 MB. So we insert a nop at 41 * need to branch to current address + 32 MB. So we insert a nop at
@@ -41,8 +44,8 @@ static void __init create_trampoline(unsigned long addr)
41 * branch to "addr" we jump to ("addr" + 32 MB). Although it requires 44 * branch to "addr" we jump to ("addr" + 32 MB). Although it requires
42 * two instructions it doesn't require any registers. 45 * two instructions it doesn't require any registers.
43 */ 46 */
44 create_instruction(addr, 0x60000000); /* nop */ 47 patch_instruction(p, PPC_NOP_INSTR);
45 create_branch(addr + 4, addr + PHYSICAL_START, 0); 48 patch_branch(++p, addr + PHYSICAL_START, 0);
46} 49}
47 50
48void __init setup_kdump_trampoline(void) 51void __init setup_kdump_trampoline(void)
diff --git a/arch/powerpc/kernel/dma_64.c b/arch/powerpc/kernel/dma_64.c
index 3a317cb0636a..ae5708e3a312 100644
--- a/arch/powerpc/kernel/dma_64.c
+++ b/arch/powerpc/kernel/dma_64.c
@@ -15,15 +15,6 @@
15 * Generic iommu implementation 15 * Generic iommu implementation
16 */ 16 */
17 17
18static inline unsigned long device_to_mask(struct device *dev)
19{
20 if (dev->dma_mask && *dev->dma_mask)
21 return *dev->dma_mask;
22 /* Assume devices without mask can take 32 bit addresses */
23 return 0xfffffffful;
24}
25
26
27/* Allocates a contiguous real buffer and creates mappings over it. 18/* Allocates a contiguous real buffer and creates mappings over it.
28 * Returns the virtual address of the buffer and sets dma_handle 19 * Returns the virtual address of the buffer and sets dma_handle
29 * to the dma address (mapping) of the first page. 20 * to the dma address (mapping) of the first page.
@@ -50,32 +41,38 @@ static void dma_iommu_free_coherent(struct device *dev, size_t size,
50 */ 41 */
51static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr, 42static dma_addr_t dma_iommu_map_single(struct device *dev, void *vaddr,
52 size_t size, 43 size_t size,
53 enum dma_data_direction direction) 44 enum dma_data_direction direction,
45 struct dma_attrs *attrs)
54{ 46{
55 return iommu_map_single(dev, dev->archdata.dma_data, vaddr, size, 47 return iommu_map_single(dev, dev->archdata.dma_data, vaddr, size,
56 device_to_mask(dev), direction); 48 device_to_mask(dev), direction, attrs);
57} 49}
58 50
59 51
60static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle, 52static void dma_iommu_unmap_single(struct device *dev, dma_addr_t dma_handle,
61 size_t size, 53 size_t size,
62 enum dma_data_direction direction) 54 enum dma_data_direction direction,
55 struct dma_attrs *attrs)
63{ 56{
64 iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction); 57 iommu_unmap_single(dev->archdata.dma_data, dma_handle, size, direction,
58 attrs);
65} 59}
66 60
67 61
68static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist, 62static int dma_iommu_map_sg(struct device *dev, struct scatterlist *sglist,
69 int nelems, enum dma_data_direction direction) 63 int nelems, enum dma_data_direction direction,
64 struct dma_attrs *attrs)
70{ 65{
71 return iommu_map_sg(dev, sglist, nelems, 66 return iommu_map_sg(dev, dev->archdata.dma_data, sglist, nelems,
72 device_to_mask(dev), direction); 67 device_to_mask(dev), direction, attrs);
73} 68}
74 69
75static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist, 70static void dma_iommu_unmap_sg(struct device *dev, struct scatterlist *sglist,
76 int nelems, enum dma_data_direction direction) 71 int nelems, enum dma_data_direction direction,
72 struct dma_attrs *attrs)
77{ 73{
78 iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction); 74 iommu_unmap_sg(dev->archdata.dma_data, sglist, nelems, direction,
75 attrs);
79} 76}
80 77
81/* We support DMA to/from any memory page via the iommu */ 78/* We support DMA to/from any memory page via the iommu */
@@ -148,19 +145,22 @@ static void dma_direct_free_coherent(struct device *dev, size_t size,
148 145
149static dma_addr_t dma_direct_map_single(struct device *dev, void *ptr, 146static dma_addr_t dma_direct_map_single(struct device *dev, void *ptr,
150 size_t size, 147 size_t size,
151 enum dma_data_direction direction) 148 enum dma_data_direction direction,
149 struct dma_attrs *attrs)
152{ 150{
153 return virt_to_abs(ptr) + get_dma_direct_offset(dev); 151 return virt_to_abs(ptr) + get_dma_direct_offset(dev);
154} 152}
155 153
156static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr, 154static void dma_direct_unmap_single(struct device *dev, dma_addr_t dma_addr,
157 size_t size, 155 size_t size,
158 enum dma_data_direction direction) 156 enum dma_data_direction direction,
157 struct dma_attrs *attrs)
159{ 158{
160} 159}
161 160
162static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl, 161static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
163 int nents, enum dma_data_direction direction) 162 int nents, enum dma_data_direction direction,
163 struct dma_attrs *attrs)
164{ 164{
165 struct scatterlist *sg; 165 struct scatterlist *sg;
166 int i; 166 int i;
@@ -174,7 +174,8 @@ static int dma_direct_map_sg(struct device *dev, struct scatterlist *sgl,
174} 174}
175 175
176static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg, 176static void dma_direct_unmap_sg(struct device *dev, struct scatterlist *sg,
177 int nents, enum dma_data_direction direction) 177 int nents, enum dma_data_direction direction,
178 struct dma_attrs *attrs)
178{ 179{
179} 180}
180 181
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index 7231a708af0d..da52269aec1e 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -45,29 +45,54 @@
45#endif 45#endif
46 46
47#ifdef CONFIG_BOOKE 47#ifdef CONFIG_BOOKE
48#include "head_booke.h"
49#define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \
50 mtspr exc_level##_SPRG,r8; \
51 BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \
52 lwz r0,GPR10-INT_FRAME_SIZE(r8); \
53 stw r0,GPR10(r11); \
54 lwz r0,GPR11-INT_FRAME_SIZE(r8); \
55 stw r0,GPR11(r11); \
56 mfspr r8,exc_level##_SPRG
57
58 .globl mcheck_transfer_to_handler 48 .globl mcheck_transfer_to_handler
59mcheck_transfer_to_handler: 49mcheck_transfer_to_handler:
60 TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) 50 mfspr r0,SPRN_DSRR0
61 b transfer_to_handler_full 51 stw r0,_DSRR0(r11)
52 mfspr r0,SPRN_DSRR1
53 stw r0,_DSRR1(r11)
54 /* fall through */
62 55
63 .globl debug_transfer_to_handler 56 .globl debug_transfer_to_handler
64debug_transfer_to_handler: 57debug_transfer_to_handler:
65 TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) 58 mfspr r0,SPRN_CSRR0
66 b transfer_to_handler_full 59 stw r0,_CSRR0(r11)
60 mfspr r0,SPRN_CSRR1
61 stw r0,_CSRR1(r11)
62 /* fall through */
67 63
68 .globl crit_transfer_to_handler 64 .globl crit_transfer_to_handler
69crit_transfer_to_handler: 65crit_transfer_to_handler:
70 TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) 66#ifdef CONFIG_FSL_BOOKE
67 mfspr r0,SPRN_MAS0
68 stw r0,MAS0(r11)
69 mfspr r0,SPRN_MAS1
70 stw r0,MAS1(r11)
71 mfspr r0,SPRN_MAS2
72 stw r0,MAS2(r11)
73 mfspr r0,SPRN_MAS3
74 stw r0,MAS3(r11)
75 mfspr r0,SPRN_MAS6
76 stw r0,MAS6(r11)
77#ifdef CONFIG_PHYS_64BIT
78 mfspr r0,SPRN_MAS7
79 stw r0,MAS7(r11)
80#endif /* CONFIG_PHYS_64BIT */
81#endif /* CONFIG_FSL_BOOKE */
82#ifdef CONFIG_44x
83 mfspr r0,SPRN_MMUCR
84 stw r0,MMUCR(r11)
85#endif
86 mfspr r0,SPRN_SRR0
87 stw r0,_SRR0(r11)
88 mfspr r0,SPRN_SRR1
89 stw r0,_SRR1(r11)
90
91 mfspr r8,SPRN_SPRG3
92 lwz r0,KSP_LIMIT(r8)
93 stw r0,SAVED_KSP_LIMIT(r11)
94 rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
95 stw r0,KSP_LIMIT(r8)
71 /* fall through */ 96 /* fall through */
72#endif 97#endif
73 98
@@ -78,6 +103,16 @@ crit_transfer_to_handler:
78 stw r0,GPR10(r11) 103 stw r0,GPR10(r11)
79 lwz r0,crit_r11@l(0) 104 lwz r0,crit_r11@l(0)
80 stw r0,GPR11(r11) 105 stw r0,GPR11(r11)
106 mfspr r0,SPRN_SRR0
107 stw r0,crit_srr0@l(0)
108 mfspr r0,SPRN_SRR1
109 stw r0,crit_srr1@l(0)
110
111 mfspr r8,SPRN_SPRG3
112 lwz r0,KSP_LIMIT(r8)
113 stw r0,saved_ksp_limit@l(0)
114 rlwimi r0,r1,0,0,(31-THREAD_SHIFT)
115 stw r0,KSP_LIMIT(r8)
81 /* fall through */ 116 /* fall through */
82#endif 117#endif
83 118
@@ -142,13 +177,14 @@ transfer_to_handler:
142 cmplw r1,r9 /* if r1 <= ksp_limit */ 177 cmplw r1,r9 /* if r1 <= ksp_limit */
143 ble- stack_ovf /* then the kernel stack overflowed */ 178 ble- stack_ovf /* then the kernel stack overflowed */
1445: 1795:
145#ifdef CONFIG_6xx 180#if defined(CONFIG_6xx) || defined(CONFIG_E500)
146 rlwinm r9,r1,0,0,31-THREAD_SHIFT 181 rlwinm r9,r1,0,0,31-THREAD_SHIFT
147 tophys(r9,r9) /* check local flags */ 182 tophys(r9,r9) /* check local flags */
148 lwz r12,TI_LOCAL_FLAGS(r9) 183 lwz r12,TI_LOCAL_FLAGS(r9)
149 mtcrf 0x01,r12 184 mtcrf 0x01,r12
150 bt- 31-TLF_NAPPING,4f 185 bt- 31-TLF_NAPPING,4f
151#endif /* CONFIG_6xx */ 186 bt- 31-TLF_SLEEPING,7f
187#endif /* CONFIG_6xx || CONFIG_E500 */
152 .globl transfer_to_handler_cont 188 .globl transfer_to_handler_cont
153transfer_to_handler_cont: 189transfer_to_handler_cont:
1543: 1903:
@@ -161,10 +197,17 @@ transfer_to_handler_cont:
161 SYNC 197 SYNC
162 RFI /* jump to handler, enable MMU */ 198 RFI /* jump to handler, enable MMU */
163 199
164#ifdef CONFIG_6xx 200#if defined (CONFIG_6xx) || defined(CONFIG_E500)
1654: rlwinm r12,r12,0,~_TLF_NAPPING 2014: rlwinm r12,r12,0,~_TLF_NAPPING
166 stw r12,TI_LOCAL_FLAGS(r9) 202 stw r12,TI_LOCAL_FLAGS(r9)
167 b power_save_6xx_restore 203 b power_save_ppc32_restore
204
2057: rlwinm r12,r12,0,~_TLF_SLEEPING
206 stw r12,TI_LOCAL_FLAGS(r9)
207 lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */
208 rlwinm r9,r9,0,~MSR_EE
209 lwz r12,_LINK(r11) /* and return to address in LR */
210 b fast_exception_return
168#endif 211#endif
169 212
170/* 213/*
@@ -669,7 +712,7 @@ user_exc_return: /* r10 contains MSR_KERNEL here */
669 /* Check current_thread_info()->flags */ 712 /* Check current_thread_info()->flags */
670 rlwinm r9,r1,0,0,(31-THREAD_SHIFT) 713 rlwinm r9,r1,0,0,(31-THREAD_SHIFT)
671 lwz r9,TI_FLAGS(r9) 714 lwz r9,TI_FLAGS(r9)
672 andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) 715 andi. r0,r9,_TIF_USER_WORK_MASK
673 bne do_work 716 bne do_work
674 717
675restore_user: 718restore_user:
@@ -860,17 +903,90 @@ exc_exit_restart_end:
860 exc_lvl_rfi; \ 903 exc_lvl_rfi; \
861 b .; /* prevent prefetch past exc_lvl_rfi */ 904 b .; /* prevent prefetch past exc_lvl_rfi */
862 905
906#define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \
907 lwz r9,_##exc_lvl_srr0(r1); \
908 lwz r10,_##exc_lvl_srr1(r1); \
909 mtspr SPRN_##exc_lvl_srr0,r9; \
910 mtspr SPRN_##exc_lvl_srr1,r10;
911
912#if defined(CONFIG_FSL_BOOKE)
913#ifdef CONFIG_PHYS_64BIT
914#define RESTORE_MAS7 \
915 lwz r11,MAS7(r1); \
916 mtspr SPRN_MAS7,r11;
917#else
918#define RESTORE_MAS7
919#endif /* CONFIG_PHYS_64BIT */
920#define RESTORE_MMU_REGS \
921 lwz r9,MAS0(r1); \
922 lwz r10,MAS1(r1); \
923 lwz r11,MAS2(r1); \
924 mtspr SPRN_MAS0,r9; \
925 lwz r9,MAS3(r1); \
926 mtspr SPRN_MAS1,r10; \
927 lwz r10,MAS6(r1); \
928 mtspr SPRN_MAS2,r11; \
929 mtspr SPRN_MAS3,r9; \
930 mtspr SPRN_MAS6,r10; \
931 RESTORE_MAS7;
932#elif defined(CONFIG_44x)
933#define RESTORE_MMU_REGS \
934 lwz r9,MMUCR(r1); \
935 mtspr SPRN_MMUCR,r9;
936#else
937#define RESTORE_MMU_REGS
938#endif
939
940#ifdef CONFIG_40x
863 .globl ret_from_crit_exc 941 .globl ret_from_crit_exc
864ret_from_crit_exc: 942ret_from_crit_exc:
943 mfspr r9,SPRN_SPRG3
944 lis r10,saved_ksp_limit@ha;
945 lwz r10,saved_ksp_limit@l(r10);
946 tovirt(r9,r9);
947 stw r10,KSP_LIMIT(r9)
948 lis r9,crit_srr0@ha;
949 lwz r9,crit_srr0@l(r9);
950 lis r10,crit_srr1@ha;
951 lwz r10,crit_srr1@l(r10);
952 mtspr SPRN_SRR0,r9;
953 mtspr SPRN_SRR1,r10;
865 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) 954 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
955#endif /* CONFIG_40x */
866 956
867#ifdef CONFIG_BOOKE 957#ifdef CONFIG_BOOKE
958 .globl ret_from_crit_exc
959ret_from_crit_exc:
960 mfspr r9,SPRN_SPRG3
961 lwz r10,SAVED_KSP_LIMIT(r1)
962 stw r10,KSP_LIMIT(r9)
963 RESTORE_xSRR(SRR0,SRR1);
964 RESTORE_MMU_REGS;
965 RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI)
966
868 .globl ret_from_debug_exc 967 .globl ret_from_debug_exc
869ret_from_debug_exc: 968ret_from_debug_exc:
969 mfspr r9,SPRN_SPRG3
970 lwz r10,SAVED_KSP_LIMIT(r1)
971 stw r10,KSP_LIMIT(r9)
972 lwz r9,THREAD_INFO-THREAD(r9)
973 rlwinm r10,r1,0,0,(31-THREAD_SHIFT)
974 lwz r10,TI_PREEMPT(r10)
975 stw r10,TI_PREEMPT(r9)
976 RESTORE_xSRR(SRR0,SRR1);
977 RESTORE_xSRR(CSRR0,CSRR1);
978 RESTORE_MMU_REGS;
870 RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) 979 RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI)
871 980
872 .globl ret_from_mcheck_exc 981 .globl ret_from_mcheck_exc
873ret_from_mcheck_exc: 982ret_from_mcheck_exc:
983 mfspr r9,SPRN_SPRG3
984 lwz r10,SAVED_KSP_LIMIT(r1)
985 stw r10,KSP_LIMIT(r9)
986 RESTORE_xSRR(SRR0,SRR1);
987 RESTORE_xSRR(CSRR0,CSRR1);
988 RESTORE_xSRR(DSRR0,DSRR1);
989 RESTORE_MMU_REGS;
874 RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) 990 RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI)
875#endif /* CONFIG_BOOKE */ 991#endif /* CONFIG_BOOKE */
876 992
@@ -926,7 +1042,7 @@ recheck:
926 lwz r9,TI_FLAGS(r9) 1042 lwz r9,TI_FLAGS(r9)
927 andi. r0,r9,_TIF_NEED_RESCHED 1043 andi. r0,r9,_TIF_NEED_RESCHED
928 bne- do_resched 1044 bne- do_resched
929 andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK 1045 andi. r0,r9,_TIF_USER_WORK_MASK
930 beq restore_user 1046 beq restore_user
931do_user_signal: /* r10 contains MSR_KERNEL here */ 1047do_user_signal: /* r10 contains MSR_KERNEL here */
932 ori r10,r10,MSR_EE 1048 ori r10,r10,MSR_EE
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 2f511a969d2c..d7369243ae44 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -354,6 +354,11 @@ _GLOBAL(_switch)
354 mflr r20 /* Return to switch caller */ 354 mflr r20 /* Return to switch caller */
355 mfmsr r22 355 mfmsr r22
356 li r0, MSR_FP 356 li r0, MSR_FP
357#ifdef CONFIG_VSX
358BEGIN_FTR_SECTION
359 oris r0,r0,MSR_VSX@h /* Disable VSX */
360END_FTR_SECTION_IFSET(CPU_FTR_VSX)
361#endif /* CONFIG_VSX */
357#ifdef CONFIG_ALTIVEC 362#ifdef CONFIG_ALTIVEC
358BEGIN_FTR_SECTION 363BEGIN_FTR_SECTION
359 oris r0,r0,MSR_VEC@h /* Disable altivec */ 364 oris r0,r0,MSR_VEC@h /* Disable altivec */
@@ -384,16 +389,16 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
384 389
385 ld r8,KSP(r4) /* new stack pointer */ 390 ld r8,KSP(r4) /* new stack pointer */
386BEGIN_FTR_SECTION 391BEGIN_FTR_SECTION
387 b 2f 392 BEGIN_FTR_SECTION_NESTED(95)
388END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
389BEGIN_FTR_SECTION
390 clrrdi r6,r8,28 /* get its ESID */ 393 clrrdi r6,r8,28 /* get its ESID */
391 clrrdi r9,r1,28 /* get current sp ESID */ 394 clrrdi r9,r1,28 /* get current sp ESID */
392END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT) 395 FTR_SECTION_ELSE_NESTED(95)
393BEGIN_FTR_SECTION
394 clrrdi r6,r8,40 /* get its 1T ESID */ 396 clrrdi r6,r8,40 /* get its 1T ESID */
395 clrrdi r9,r1,40 /* get current sp 1T ESID */ 397 clrrdi r9,r1,40 /* get current sp 1T ESID */
396END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT) 398 ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95)
399FTR_SECTION_ELSE
400 b 2f
401ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB)
397 clrldi. r0,r6,2 /* is new ESID c00000000? */ 402 clrldi. r0,r6,2 /* is new ESID c00000000? */
398 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */ 403 cmpd cr1,r6,r9 /* or is new ESID the same as current ESID? */
399 cror eq,4*cr1+eq,eq 404 cror eq,4*cr1+eq,eq
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index 821e152e093c..a088c064ae40 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -24,6 +24,29 @@
24#include <asm/ppc_asm.h> 24#include <asm/ppc_asm.h>
25#include <asm/asm-offsets.h> 25#include <asm/asm-offsets.h>
26 26
27#ifdef CONFIG_VSX
28#define REST_32FPVSRS(n,c,base) \
29BEGIN_FTR_SECTION \
30 b 2f; \
31END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
32 REST_32FPRS(n,base); \
33 b 3f; \
342: REST_32VSRS(n,c,base); \
353:
36
37#define SAVE_32FPVSRS(n,c,base) \
38BEGIN_FTR_SECTION \
39 b 2f; \
40END_FTR_SECTION_IFSET(CPU_FTR_VSX); \
41 SAVE_32FPRS(n,base); \
42 b 3f; \
432: SAVE_32VSRS(n,c,base); \
443:
45#else
46#define REST_32FPVSRS(n,b,base) REST_32FPRS(n, base)
47#define SAVE_32FPVSRS(n,b,base) SAVE_32FPRS(n, base)
48#endif
49
27/* 50/*
28 * This task wants to use the FPU now. 51 * This task wants to use the FPU now.
29 * On UP, disable FP for the task which had the FPU previously, 52 * On UP, disable FP for the task which had the FPU previously,
@@ -34,6 +57,11 @@
34_GLOBAL(load_up_fpu) 57_GLOBAL(load_up_fpu)
35 mfmsr r5 58 mfmsr r5
36 ori r5,r5,MSR_FP 59 ori r5,r5,MSR_FP
60#ifdef CONFIG_VSX
61BEGIN_FTR_SECTION
62 oris r5,r5,MSR_VSX@h
63END_FTR_SECTION_IFSET(CPU_FTR_VSX)
64#endif
37 SYNC 65 SYNC
38 MTMSRD(r5) /* enable use of fpu now */ 66 MTMSRD(r5) /* enable use of fpu now */
39 isync 67 isync
@@ -50,7 +78,7 @@ _GLOBAL(load_up_fpu)
50 beq 1f 78 beq 1f
51 toreal(r4) 79 toreal(r4)
52 addi r4,r4,THREAD /* want last_task_used_math->thread */ 80 addi r4,r4,THREAD /* want last_task_used_math->thread */
53 SAVE_32FPRS(0, r4) 81 SAVE_32FPVSRS(0, r5, r4)
54 mffs fr0 82 mffs fr0
55 stfd fr0,THREAD_FPSCR(r4) 83 stfd fr0,THREAD_FPSCR(r4)
56 PPC_LL r5,PT_REGS(r4) 84 PPC_LL r5,PT_REGS(r4)
@@ -77,7 +105,7 @@ _GLOBAL(load_up_fpu)
77#endif 105#endif
78 lfd fr0,THREAD_FPSCR(r5) 106 lfd fr0,THREAD_FPSCR(r5)
79 MTFSF_L(fr0) 107 MTFSF_L(fr0)
80 REST_32FPRS(0, r5) 108 REST_32FPVSRS(0, r4, r5)
81#ifndef CONFIG_SMP 109#ifndef CONFIG_SMP
82 subi r4,r5,THREAD 110 subi r4,r5,THREAD
83 fromreal(r4) 111 fromreal(r4)
@@ -85,7 +113,7 @@ _GLOBAL(load_up_fpu)
85#endif /* CONFIG_SMP */ 113#endif /* CONFIG_SMP */
86 /* restore registers and return */ 114 /* restore registers and return */
87 /* we haven't used ctr or xer or lr */ 115 /* we haven't used ctr or xer or lr */
88 b fast_exception_return 116 blr
89 117
90/* 118/*
91 * giveup_fpu(tsk) 119 * giveup_fpu(tsk)
@@ -96,6 +124,11 @@ _GLOBAL(load_up_fpu)
96_GLOBAL(giveup_fpu) 124_GLOBAL(giveup_fpu)
97 mfmsr r5 125 mfmsr r5
98 ori r5,r5,MSR_FP 126 ori r5,r5,MSR_FP
127#ifdef CONFIG_VSX
128BEGIN_FTR_SECTION
129 oris r5,r5,MSR_VSX@h
130END_FTR_SECTION_IFSET(CPU_FTR_VSX)
131#endif
99 SYNC_601 132 SYNC_601
100 ISYNC_601 133 ISYNC_601
101 MTMSRD(r5) /* enable use of fpu now */ 134 MTMSRD(r5) /* enable use of fpu now */
@@ -106,7 +139,7 @@ _GLOBAL(giveup_fpu)
106 addi r3,r3,THREAD /* want THREAD of task */ 139 addi r3,r3,THREAD /* want THREAD of task */
107 PPC_LL r5,PT_REGS(r3) 140 PPC_LL r5,PT_REGS(r3)
108 PPC_LCMPI 0,r5,0 141 PPC_LCMPI 0,r5,0
109 SAVE_32FPRS(0, r3) 142 SAVE_32FPVSRS(0, r4 ,r3)
110 mffs fr0 143 mffs fr0
111 stfd fr0,THREAD_FPSCR(r3) 144 stfd fr0,THREAD_FPSCR(r3)
112 beq 1f 145 beq 1f
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 785af9b56591..99ee2f0f0f2b 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -421,8 +421,10 @@ BEGIN_FTR_SECTION
421 b ProgramCheck 421 b ProgramCheck
422END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE) 422END_FTR_SECTION_IFSET(CPU_FTR_FPU_UNAVAILABLE)
423 EXCEPTION_PROLOG 423 EXCEPTION_PROLOG
424 bne load_up_fpu /* if from user, just load it up */ 424 beq 1f
425 addi r3,r1,STACK_FRAME_OVERHEAD 425 bl load_up_fpu /* if from user, just load it up */
426 b fast_exception_return
4271: addi r3,r1,STACK_FRAME_OVERHEAD
426 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) 428 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
427 429
428/* Decrementer */ 430/* Decrementer */
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index 8552e67e3a8b..56d8e5d90c5b 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -93,6 +93,12 @@ _ENTRY(crit_r10)
93 .space 4 93 .space 4
94_ENTRY(crit_r11) 94_ENTRY(crit_r11)
95 .space 4 95 .space 4
96_ENTRY(crit_srr0)
97 .space 4
98_ENTRY(crit_srr1)
99 .space 4
100_ENTRY(saved_ksp_limit)
101 .space 4
96 102
97/* 103/*
98 * Exception vector entry code. This code runs with address translation 104 * Exception vector entry code. This code runs with address translation
@@ -148,14 +154,14 @@ _ENTRY(crit_r11)
148 mfcr r10; /* save CR in r10 for now */\ 154 mfcr r10; /* save CR in r10 for now */\
149 mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ 155 mfspr r11,SPRN_SRR3; /* check whether user or kernel */\
150 andi. r11,r11,MSR_PR; \ 156 andi. r11,r11,MSR_PR; \
151 lis r11,critical_stack_top@h; \ 157 lis r11,critirq_ctx@ha; \
152 ori r11,r11,critical_stack_top@l; \ 158 tophys(r11,r11); \
159 lwz r11,critirq_ctx@l(r11); \
153 beq 1f; \ 160 beq 1f; \
154 /* COMING FROM USER MODE */ \ 161 /* COMING FROM USER MODE */ \
155 mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ 162 mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
156 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ 163 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
157 addi r11,r11,THREAD_SIZE; \ 1641: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\
1581: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\
159 tophys(r11,r11); \ 165 tophys(r11,r11); \
160 stw r10,_CCR(r11); /* save various registers */\ 166 stw r10,_CCR(r11); /* save various registers */\
161 stw r12,GPR12(r11); \ 167 stw r12,GPR12(r11); \
@@ -996,16 +1002,6 @@ empty_zero_page:
996swapper_pg_dir: 1002swapper_pg_dir:
997 .space PGD_TABLE_SIZE 1003 .space PGD_TABLE_SIZE
998 1004
999
1000/* Stack for handling critical exceptions from kernel mode */
1001 .section .bss
1002 .align 12
1003exception_stack_bottom:
1004 .space 4096
1005critical_stack_top:
1006 .globl exception_stack_top
1007exception_stack_top:
1008
1009/* Room for two PTE pointers, usually the kernel and current user pointers 1005/* Room for two PTE pointers, usually the kernel and current user pointers
1010 * to their respective root page table. 1006 * to their respective root page table.
1011 */ 1007 */
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 22b5d2c459a3..f3a1ea9d7fe4 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -293,119 +293,9 @@ interrupt_base:
293 MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception) 293 MCHECK_EXCEPTION(0x0210, MachineCheckA, machine_check_exception)
294 294
295 /* Data Storage Interrupt */ 295 /* Data Storage Interrupt */
296 START_EXCEPTION(DataStorage) 296 DATA_STORAGE_EXCEPTION
297 mtspr SPRN_SPRG0, r10 /* Save some working registers */
298 mtspr SPRN_SPRG1, r11
299 mtspr SPRN_SPRG4W, r12
300 mtspr SPRN_SPRG5W, r13
301 mfcr r11
302 mtspr SPRN_SPRG7W, r11
303
304 /*
305 * Check if it was a store fault, if not then bail
306 * because a user tried to access a kernel or
307 * read-protected page. Otherwise, get the
308 * offending address and handle it.
309 */
310 mfspr r10, SPRN_ESR
311 andis. r10, r10, ESR_ST@h
312 beq 2f
313
314 mfspr r10, SPRN_DEAR /* Get faulting address */
315
316 /* If we are faulting a kernel address, we have to use the
317 * kernel page tables.
318 */
319 lis r11, PAGE_OFFSET@h
320 cmplw r10, r11
321 blt+ 3f
322 lis r11, swapper_pg_dir@h
323 ori r11, r11, swapper_pg_dir@l
324
325 mfspr r12,SPRN_MMUCR
326 rlwinm r12,r12,0,0,23 /* Clear TID */
327
328 b 4f
329
330 /* Get the PGD for the current thread */
3313:
332 mfspr r11,SPRN_SPRG3
333 lwz r11,PGDIR(r11)
334
335 /* Load PID into MMUCR TID */
336 mfspr r12,SPRN_MMUCR /* Get MMUCR */
337 mfspr r13,SPRN_PID /* Get PID */
338 rlwimi r12,r13,0,24,31 /* Set TID */
339
3404:
341 mtspr SPRN_MMUCR,r12
342
343 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
344 lwzx r11, r12, r11 /* Get pgd/pmd entry */
345 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
346 beq 2f /* Bail if no table */
347
348 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
349 lwz r11, 4(r12) /* Get pte entry */
350
351 andi. r13, r11, _PAGE_RW /* Is it writeable? */
352 beq 2f /* Bail if not */
353
354 /* Update 'changed'.
355 */
356 ori r11, r11, _PAGE_DIRTY|_PAGE_ACCESSED|_PAGE_HWWRITE
357 stw r11, 4(r12) /* Update Linux page table */
358
359 li r13, PPC44x_TLB_SR@l /* Set SR */
360 rlwimi r13, r11, 29, 29, 29 /* SX = _PAGE_HWEXEC */
361 rlwimi r13, r11, 0, 30, 30 /* SW = _PAGE_RW */
362 rlwimi r13, r11, 29, 28, 28 /* UR = _PAGE_USER */
363 rlwimi r12, r11, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */
364 rlwimi r12, r11, 29, 30, 30 /* (_PAGE_USER>>3)->r12 */
365 and r12, r12, r11 /* HWEXEC/RW & USER */
366 rlwimi r13, r12, 0, 26, 26 /* UX = HWEXEC & USER */
367 rlwimi r13, r12, 3, 27, 27 /* UW = RW & USER */
368
369 rlwimi r11,r13,0,26,31 /* Insert static perms */
370
371 /*
372 * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
373 * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
374 * include/asm-powerpc/pgtable-ppc32.h for details).
375 */
376 rlwinm r11,r11,0,20,10
377
378 /* find the TLB index that caused the fault. It has to be here. */
379 tlbsx r10, 0, r10
380
381 tlbwe r11, r10, PPC44x_TLB_ATTRIB /* Write ATTRIB */
382
383 /* Done...restore registers and get out of here.
384 */
385 mfspr r11, SPRN_SPRG7R
386 mtcr r11
387 mfspr r13, SPRN_SPRG5R
388 mfspr r12, SPRN_SPRG4R
389 297
390 mfspr r11, SPRN_SPRG1 298 /* Instruction Storage Interrupt */
391 mfspr r10, SPRN_SPRG0
392 rfi /* Force context change */
393
3942:
395 /*
396 * The bailout. Restore registers to pre-exception conditions
397 * and call the heavyweights to help us out.
398 */
399 mfspr r11, SPRN_SPRG7R
400 mtcr r11
401 mfspr r13, SPRN_SPRG5R
402 mfspr r12, SPRN_SPRG4R
403
404 mfspr r11, SPRN_SPRG1
405 mfspr r10, SPRN_SPRG0
406 b data_access
407
408 /* Instruction Storage Interrupt */
409 INSTRUCTION_STORAGE_EXCEPTION 299 INSTRUCTION_STORAGE_EXCEPTION
410 300
411 /* External Input Interrupt */ 301 /* External Input Interrupt */
@@ -423,7 +313,6 @@ interrupt_base:
423#else 313#else
424 EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE) 314 EXCEPTION(0x2010, FloatingPointUnavailable, unknown_exception, EXC_XFER_EE)
425#endif 315#endif
426
427 /* System Call Interrupt */ 316 /* System Call Interrupt */
428 START_EXCEPTION(SystemCall) 317 START_EXCEPTION(SystemCall)
429 NORMAL_EXCEPTION_PROLOG 318 NORMAL_EXCEPTION_PROLOG
@@ -484,18 +373,57 @@ interrupt_base:
4844: 3734:
485 mtspr SPRN_MMUCR,r12 374 mtspr SPRN_MMUCR,r12
486 375
376 /* Mask of required permission bits. Note that while we
377 * do copy ESR:ST to _PAGE_RW position as trying to write
378 * to an RO page is pretty common, we don't do it with
379 * _PAGE_DIRTY. We could do it, but it's a fairly rare
380 * event so I'd rather take the overhead when it happens
381 * rather than adding an instruction here. We should measure
382 * whether the whole thing is worth it in the first place
383 * as we could avoid loading SPRN_ESR completely in the first
384 * place...
385 *
386 * TODO: Is it worth doing that mfspr & rlwimi in the first
387 * place or can we save a couple of instructions here ?
388 */
389 mfspr r12,SPRN_ESR
390 li r13,_PAGE_PRESENT|_PAGE_ACCESSED
391 rlwimi r13,r12,10,30,30
392
393 /* Load the PTE */
487 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ 394 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
488 lwzx r11, r12, r11 /* Get pgd/pmd entry */ 395 lwzx r11, r12, r11 /* Get pgd/pmd entry */
489 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ 396 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
490 beq 2f /* Bail if no table */ 397 beq 2f /* Bail if no table */
491 398
492 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ 399 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
493 lwz r11, 4(r12) /* Get pte entry */ 400 lwz r11, 0(r12) /* Get high word of pte entry */
494 andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ 401 lwz r12, 4(r12) /* Get low word of pte entry */
495 beq 2f /* Bail if not present */
496 402
497 ori r11, r11, _PAGE_ACCESSED 403 lis r10,tlb_44x_index@ha
498 stw r11, 4(r12) 404
405 andc. r13,r13,r12 /* Check permission */
406
407 /* Load the next available TLB index */
408 lwz r13,tlb_44x_index@l(r10)
409
410 bne 2f /* Bail if permission mismach */
411
412 /* Increment, rollover, and store TLB index */
413 addi r13,r13,1
414
415 /* Compare with watermark (instruction gets patched) */
416 .globl tlb_44x_patch_hwater_D
417tlb_44x_patch_hwater_D:
418 cmpwi 0,r13,1 /* reserve entries */
419 ble 5f
420 li r13,0
4215:
422 /* Store the next available TLB index */
423 stw r13,tlb_44x_index@l(r10)
424
425 /* Re-load the faulting address */
426 mfspr r10,SPRN_DEAR
499 427
500 /* Jump to common tlb load */ 428 /* Jump to common tlb load */
501 b finish_tlb_load 429 b finish_tlb_load
@@ -510,7 +438,7 @@ interrupt_base:
510 mfspr r12, SPRN_SPRG4R 438 mfspr r12, SPRN_SPRG4R
511 mfspr r11, SPRN_SPRG1 439 mfspr r11, SPRN_SPRG1
512 mfspr r10, SPRN_SPRG0 440 mfspr r10, SPRN_SPRG0
513 b data_access 441 b DataStorage
514 442
515 /* Instruction TLB Error Interrupt */ 443 /* Instruction TLB Error Interrupt */
516 /* 444 /*
@@ -554,18 +482,42 @@ interrupt_base:
5544: 4824:
555 mtspr SPRN_MMUCR,r12 483 mtspr SPRN_MMUCR,r12
556 484
485 /* Make up the required permissions */
486 li r13,_PAGE_PRESENT | _PAGE_ACCESSED | _PAGE_HWEXEC
487
557 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */ 488 rlwinm r12, r10, 13, 19, 29 /* Compute pgdir/pmd offset */
558 lwzx r11, r12, r11 /* Get pgd/pmd entry */ 489 lwzx r11, r12, r11 /* Get pgd/pmd entry */
559 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */ 490 rlwinm. r12, r11, 0, 0, 20 /* Extract pt base address */
560 beq 2f /* Bail if no table */ 491 beq 2f /* Bail if no table */
561 492
562 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */ 493 rlwimi r12, r10, 23, 20, 28 /* Compute pte address */
563 lwz r11, 4(r12) /* Get pte entry */ 494 lwz r11, 0(r12) /* Get high word of pte entry */
564 andi. r13, r11, _PAGE_PRESENT /* Is the page present? */ 495 lwz r12, 4(r12) /* Get low word of pte entry */
565 beq 2f /* Bail if not present */
566 496
567 ori r11, r11, _PAGE_ACCESSED 497 lis r10,tlb_44x_index@ha
568 stw r11, 4(r12) 498
499 andc. r13,r13,r12 /* Check permission */
500
501 /* Load the next available TLB index */
502 lwz r13,tlb_44x_index@l(r10)
503
504 bne 2f /* Bail if permission mismach */
505
506 /* Increment, rollover, and store TLB index */
507 addi r13,r13,1
508
509 /* Compare with watermark (instruction gets patched) */
510 .globl tlb_44x_patch_hwater_I
511tlb_44x_patch_hwater_I:
512 cmpwi 0,r13,1 /* reserve entries */
513 ble 5f
514 li r13,0
5155:
516 /* Store the next available TLB index */
517 stw r13,tlb_44x_index@l(r10)
518
519 /* Re-load the faulting address */
520 mfspr r10,SPRN_SRR0
569 521
570 /* Jump to common TLB load point */ 522 /* Jump to common TLB load point */
571 b finish_tlb_load 523 b finish_tlb_load
@@ -587,86 +539,40 @@ interrupt_base:
587 539
588/* 540/*
589 * Local functions 541 * Local functions
590 */ 542 */
591 /*
592 * Data TLB exceptions will bail out to this point
593 * if they can't resolve the lightweight TLB fault.
594 */
595data_access:
596 NORMAL_EXCEPTION_PROLOG
597 mfspr r5,SPRN_ESR /* Grab the ESR, save it, pass arg3 */
598 stw r5,_ESR(r11)
599 mfspr r4,SPRN_DEAR /* Grab the DEAR, save it, pass arg2 */
600 EXC_XFER_EE_LITE(0x0300, handle_page_fault)
601 543
602/* 544/*
603 545
604 * Both the instruction and data TLB miss get to this 546 * Both the instruction and data TLB miss get to this
605 * point to load the TLB. 547 * point to load the TLB.
606 * r10 - EA of fault 548 * r10 - EA of fault
607 * r11 - available to use 549 * r11 - PTE high word value
608 * r12 - Pointer to the 64-bit PTE 550 * r12 - PTE low word value
609 * r13 - available to use 551 * r13 - TLB index
610 * MMUCR - loaded with proper value when we get here 552 * MMUCR - loaded with proper value when we get here
611 * Upon exit, we reload everything and RFI. 553 * Upon exit, we reload everything and RFI.
612 */ 554 */
613finish_tlb_load: 555finish_tlb_load:
614 /* 556 /* Combine RPN & ERPN an write WS 0 */
615 * We set execute, because we don't have the granularity to 557 rlwimi r11,r12,0,0,19
616 * properly set this at the page level (Linux problem). 558 tlbwe r11,r13,PPC44x_TLB_XLAT
617 * If shared is set, we cause a zero PID->TID load.
618 * Many of these bits are software only. Bits we don't set
619 * here we (properly should) assume have the appropriate value.
620 */
621
622 /* Load the next available TLB index */
623 lis r13, tlb_44x_index@ha
624 lwz r13, tlb_44x_index@l(r13)
625 /* Load the TLB high watermark */
626 lis r11, tlb_44x_hwater@ha
627 lwz r11, tlb_44x_hwater@l(r11)
628
629 /* Increment, rollover, and store TLB index */
630 addi r13, r13, 1
631 cmpw 0, r13, r11 /* reserve entries */
632 ble 7f
633 li r13, 0
6347:
635 /* Store the next available TLB index */
636 lis r11, tlb_44x_index@ha
637 stw r13, tlb_44x_index@l(r11)
638
639 lwz r11, 0(r12) /* Get MS word of PTE */
640 lwz r12, 4(r12) /* Get LS word of PTE */
641 rlwimi r11, r12, 0, 0 , 19 /* Insert RPN */
642 tlbwe r11, r13, PPC44x_TLB_XLAT /* Write XLAT */
643 559
644 /* 560 /*
645 * Create PAGEID. This is the faulting address, 561 * Create WS1. This is the faulting address (EPN),
646 * page size, and valid flag. 562 * page size, and valid flag.
647 */ 563 */
648 li r11, PPC44x_TLB_VALID | PPC44x_TLB_4K 564 li r11,PPC44x_TLB_VALID | PPC44x_TLB_4K
649 rlwimi r10, r11, 0, 20, 31 /* Insert valid and page size */ 565 rlwimi r10,r11,0,20,31 /* Insert valid and page size*/
650 tlbwe r10, r13, PPC44x_TLB_PAGEID /* Write PAGEID */ 566 tlbwe r10,r13,PPC44x_TLB_PAGEID /* Write PAGEID */
651 567
652 li r10, PPC44x_TLB_SR@l /* Set SR */ 568 /* And WS 2 */
653 rlwimi r10, r12, 0, 30, 30 /* Set SW = _PAGE_RW */ 569 li r10,0xf85 /* Mask to apply from PTE */
654 rlwimi r10, r12, 29, 29, 29 /* SX = _PAGE_HWEXEC */ 570 rlwimi r10,r12,29,30,30 /* DIRTY -> SW position */
655 rlwimi r10, r12, 29, 28, 28 /* UR = _PAGE_USER */ 571 and r11,r12,r10 /* Mask PTE bits to keep */
656 rlwimi r11, r12, 31, 26, 26 /* (_PAGE_USER>>1)->r12 */ 572 andi. r10,r12,_PAGE_USER /* User page ? */
657 and r11, r12, r11 /* HWEXEC & USER */ 573 beq 1f /* nope, leave U bits empty */
658 rlwimi r10, r11, 0, 26, 26 /* UX = HWEXEC & USER */ 574 rlwimi r11,r11,3,26,28 /* yes, copy S bits to U */
659 5751: tlbwe r11,r13,PPC44x_TLB_ATTRIB /* Write ATTRIB */
660 rlwimi r12, r10, 0, 26, 31 /* Insert static perms */
661
662 /*
663 * Clear U0-U3 and WL1 IL1I IL1D IL2I IL2D bits which are added
664 * on newer 440 cores like the 440x6 used on AMCC 460EX/460GT (see
665 * include/asm-powerpc/pgtable-ppc32.h for details).
666 */
667 rlwinm r12, r12, 0, 20, 10
668
669 tlbwe r12, r13, PPC44x_TLB_ATTRIB /* Write ATTRIB */
670 576
671 /* Done...restore registers and get out of here. 577 /* Done...restore registers and get out of here.
672 */ 578 */
@@ -742,15 +648,6 @@ empty_zero_page:
742swapper_pg_dir: 648swapper_pg_dir:
743 .space PGD_TABLE_SIZE 649 .space PGD_TABLE_SIZE
744 650
745/* Reserved 4k for the critical exception stack & 4k for the machine
746 * check stack per CPU for kernel mode exceptions */
747 .section .bss
748 .align 12
749exception_stack_bottom:
750 .space BOOKE_EXCEPTION_STACK_SIZE
751 .globl exception_stack_top
752exception_stack_top:
753
754/* 651/*
755 * Room for two PTE pointers, usually the kernel and current user pointers 652 * Room for two PTE pointers, usually the kernel and current user pointers
756 * to their respective root page table. 653 * to their respective root page table.
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index 25e84c0e1166..cc8fb474d520 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -275,7 +275,11 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
275 . = 0xf00 275 . = 0xf00
276 b performance_monitor_pSeries 276 b performance_monitor_pSeries
277 277
278 STD_EXCEPTION_PSERIES(0xf20, altivec_unavailable) 278 . = 0xf20
279 b altivec_unavailable_pSeries
280
281 . = 0xf40
282 b vsx_unavailable_pSeries
279 283
280#ifdef CONFIG_CBE_RAS 284#ifdef CONFIG_CBE_RAS
281 HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error) 285 HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error)
@@ -295,6 +299,8 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
295 299
296 /* moved from 0xf00 */ 300 /* moved from 0xf00 */
297 STD_EXCEPTION_PSERIES(., performance_monitor) 301 STD_EXCEPTION_PSERIES(., performance_monitor)
302 STD_EXCEPTION_PSERIES(., altivec_unavailable)
303 STD_EXCEPTION_PSERIES(., vsx_unavailable)
298 304
299/* 305/*
300 * An interrupt came in while soft-disabled; clear EE in SRR1, 306 * An interrupt came in while soft-disabled; clear EE in SRR1,
@@ -739,7 +745,8 @@ fp_unavailable_common:
739 ENABLE_INTS 745 ENABLE_INTS
740 bl .kernel_fp_unavailable_exception 746 bl .kernel_fp_unavailable_exception
741 BUG_OPCODE 747 BUG_OPCODE
7421: b .load_up_fpu 7481: bl .load_up_fpu
749 b fast_exception_return
743 750
744 .align 7 751 .align 7
745 .globl altivec_unavailable_common 752 .globl altivec_unavailable_common
@@ -747,7 +754,10 @@ altivec_unavailable_common:
747 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN) 754 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
748#ifdef CONFIG_ALTIVEC 755#ifdef CONFIG_ALTIVEC
749BEGIN_FTR_SECTION 756BEGIN_FTR_SECTION
750 bne .load_up_altivec /* if from user, just load it up */ 757 beq 1f
758 bl .load_up_altivec
759 b fast_exception_return
7601:
751END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) 761END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
752#endif 762#endif
753 bl .save_nvgprs 763 bl .save_nvgprs
@@ -827,9 +837,70 @@ _STATIC(load_up_altivec)
827 std r4,0(r3) 837 std r4,0(r3)
828#endif /* CONFIG_SMP */ 838#endif /* CONFIG_SMP */
829 /* restore registers and return */ 839 /* restore registers and return */
830 b fast_exception_return 840 blr
831#endif /* CONFIG_ALTIVEC */ 841#endif /* CONFIG_ALTIVEC */
832 842
843 .align 7
844 .globl vsx_unavailable_common
845vsx_unavailable_common:
846 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
847#ifdef CONFIG_VSX
848BEGIN_FTR_SECTION
849 bne .load_up_vsx
8501:
851END_FTR_SECTION_IFSET(CPU_FTR_VSX)
852#endif
853 bl .save_nvgprs
854 addi r3,r1,STACK_FRAME_OVERHEAD
855 ENABLE_INTS
856 bl .vsx_unavailable_exception
857 b .ret_from_except
858
859#ifdef CONFIG_VSX
860/*
861 * load_up_vsx(unused, unused, tsk)
862 * Disable VSX for the task which had it previously,
863 * and save its vector registers in its thread_struct.
864 * Reuse the fp and vsx saves, but first check to see if they have
865 * been saved already.
866 * On entry: r13 == 'current' && last_task_used_vsx != 'current'
867 */
868_STATIC(load_up_vsx)
869/* Load FP and VSX registers if they haven't been done yet */
870 andi. r5,r12,MSR_FP
871 beql+ load_up_fpu /* skip if already loaded */
872 andis. r5,r12,MSR_VEC@h
873 beql+ load_up_altivec /* skip if already loaded */
874
875#ifndef CONFIG_SMP
876 ld r3,last_task_used_vsx@got(r2)
877 ld r4,0(r3)
878 cmpdi 0,r4,0
879 beq 1f
880 /* Disable VSX for last_task_used_vsx */
881 addi r4,r4,THREAD
882 ld r5,PT_REGS(r4)
883 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
884 lis r6,MSR_VSX@h
885 andc r6,r4,r6
886 std r6,_MSR-STACK_FRAME_OVERHEAD(r5)
8871:
888#endif /* CONFIG_SMP */
889 ld r4,PACACURRENT(r13)
890 addi r4,r4,THREAD /* Get THREAD */
891 li r6,1
892 stw r6,THREAD_USED_VSR(r4) /* ... also set thread used vsr */
893 /* enable use of VSX after return */
894 oris r12,r12,MSR_VSX@h
895 std r12,_MSR(r1)
896#ifndef CONFIG_SMP
897 /* Update last_task_used_math to 'current' */
898 ld r4,PACACURRENT(r13)
899 std r4,0(r3)
900#endif /* CONFIG_SMP */
901 b fast_exception_return
902#endif /* CONFIG_VSX */
903
833/* 904/*
834 * Hash table stuff 905 * Hash table stuff
835 */ 906 */
@@ -1127,7 +1198,6 @@ _GLOBAL(generic_secondary_smp_init)
11273: HMT_LOW 11983: HMT_LOW
1128 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */ 1199 lbz r23,PACAPROCSTART(r13) /* Test if this processor should */
1129 /* start. */ 1200 /* start. */
1130 sync
1131 1201
1132#ifndef CONFIG_SMP 1202#ifndef CONFIG_SMP
1133 b 3b /* Never go on non-SMP */ 1203 b 3b /* Never go on non-SMP */
@@ -1135,6 +1205,8 @@ _GLOBAL(generic_secondary_smp_init)
1135 cmpwi 0,r23,0 1205 cmpwi 0,r23,0
1136 beq 3b /* Loop until told to go */ 1206 beq 3b /* Loop until told to go */
1137 1207
1208 sync /* order paca.run and cur_cpu_spec */
1209
1138 /* See if we need to call a cpu state restore handler */ 1210 /* See if we need to call a cpu state restore handler */
1139 LOAD_REG_IMMEDIATE(r23, cur_cpu_spec) 1211 LOAD_REG_IMMEDIATE(r23, cur_cpu_spec)
1140 ld r23,0(r23) 1212 ld r23,0(r23)
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h
index aefafc6330c9..fce2df988504 100644
--- a/arch/powerpc/kernel/head_booke.h
+++ b/arch/powerpc/kernel/head_booke.h
@@ -43,9 +43,7 @@
43 SAVE_2GPRS(7, r11) 43 SAVE_2GPRS(7, r11)
44 44
45/* To handle the additional exception priority levels on 40x and Book-E 45/* To handle the additional exception priority levels on 40x and Book-E
46 * processors we allocate a 4k stack per additional priority level. The various 46 * processors we allocate a stack per additional priority level.
47 * head_xxx.S files allocate space (exception_stack_top) for each priority's
48 * stack times the number of CPUs
49 * 47 *
50 * On 40x critical is the only additional level 48 * On 40x critical is the only additional level
51 * On 44x/e500 we have critical and machine check 49 * On 44x/e500 we have critical and machine check
@@ -61,36 +59,37 @@
61 * going to critical or their own debug level we aren't currently 59 * going to critical or their own debug level we aren't currently
62 * providing configurations that micro-optimize space usage. 60 * providing configurations that micro-optimize space usage.
63 */ 61 */
64#ifdef CONFIG_44x
65#define NUM_EXCEPTION_LVLS 2
66#else
67#define NUM_EXCEPTION_LVLS 3
68#endif
69#define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS)
70 62
71/* CRIT_SPRG only used in critical exception handling */ 63/* CRIT_SPRG only used in critical exception handling */
72#define CRIT_SPRG SPRN_SPRG2 64#define CRIT_SPRG SPRN_SPRG2
73/* MCHECK_SPRG only used in machine check exception handling */ 65/* MCHECK_SPRG only used in machine check exception handling */
74#define MCHECK_SPRG SPRN_SPRG6W 66#define MCHECK_SPRG SPRN_SPRG6W
75 67
76#define MCHECK_STACK_TOP (exception_stack_top - 4096) 68#define MCHECK_STACK_BASE mcheckirq_ctx
77#define CRIT_STACK_TOP (exception_stack_top) 69#define CRIT_STACK_BASE critirq_ctx
78 70
79/* only on e200 for now */ 71/* only on e500mc/e200 */
80#define DEBUG_STACK_TOP (exception_stack_top - 8192) 72#define DEBUG_STACK_BASE dbgirq_ctx
73#ifdef CONFIG_PPC_E500MC
74#define DEBUG_SPRG SPRN_SPRG9
75#else
81#define DEBUG_SPRG SPRN_SPRG6W 76#define DEBUG_SPRG SPRN_SPRG6W
77#endif
78
79#define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE)
82 80
83#ifdef CONFIG_SMP 81#ifdef CONFIG_SMP
84#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ 82#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
85 mfspr r8,SPRN_PIR; \ 83 mfspr r8,SPRN_PIR; \
86 mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \ 84 slwi r8,r8,2; \
87 neg r8,r8; \ 85 addis r8,r8,level##_STACK_BASE@ha; \
88 addis r8,r8,level##_STACK_TOP@ha; \ 86 lwz r8,level##_STACK_BASE@l(r8); \
89 addi r8,r8,level##_STACK_TOP@l 87 addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
90#else 88#else
91#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ 89#define BOOKE_LOAD_EXC_LEVEL_STACK(level) \
92 lis r8,level##_STACK_TOP@h; \ 90 lis r8,level##_STACK_BASE@ha; \
93 ori r8,r8,level##_STACK_TOP@l 91 lwz r8,level##_STACK_BASE@l(r8); \
92 addi r8,r8,EXC_LVL_FRAME_OVERHEAD;
94#endif 93#endif
95 94
96/* 95/*
@@ -104,22 +103,36 @@
104#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ 103#define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \
105 mtspr exc_level##_SPRG,r8; \ 104 mtspr exc_level##_SPRG,r8; \
106 BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ 105 BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \
107 stw r10,GPR10-INT_FRAME_SIZE(r8); \ 106 stw r9,GPR9(r8); /* save various registers */\
108 stw r11,GPR11-INT_FRAME_SIZE(r8); \ 107 mfcr r9; /* save CR in r9 for now */\
109 mfcr r10; /* save CR in r10 for now */\ 108 stw r10,GPR10(r8); \
110 mfspr r11,exc_level_srr1; /* check whether user or kernel */\ 109 stw r11,GPR11(r8); \
111 andi. r11,r11,MSR_PR; \ 110 stw r9,_CCR(r8); /* save CR on stack */\
112 mr r11,r8; \ 111 mfspr r10,exc_level_srr1; /* check whether user or kernel */\
113 mfspr r8,exc_level##_SPRG; \ 112 andi. r10,r10,MSR_PR; \
114 beq 1f; \
115 /* COMING FROM USER MODE */ \
116 mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ 113 mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\
117 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ 114 lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\
118 addi r11,r11,THREAD_SIZE; \ 115 addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\
1191: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ 116 beq 1f; \
120 stw r10,_CCR(r11); /* save various registers */\ 117 /* COMING FROM USER MODE */ \
121 stw r12,GPR12(r11); \ 118 stw r9,_CCR(r11); /* save CR */\
119 lwz r10,GPR10(r8); /* copy regs from exception stack */\
120 lwz r9,GPR9(r8); \
121 stw r10,GPR10(r11); \
122 lwz r10,GPR11(r8); \
122 stw r9,GPR9(r11); \ 123 stw r9,GPR9(r11); \
124 stw r10,GPR11(r11); \
125 b 2f; \
126 /* COMING FROM PRIV MODE */ \
1271: lwz r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r11); \
128 lwz r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r11); \
129 stw r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r8); \
130 stw r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r8); \
131 lwz r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r11); \
132 stw r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r8); \
133 mr r11,r8; \
1342: mfspr r8,exc_level##_SPRG; \
135 stw r12,GPR12(r11); /* save various registers */\
123 mflr r10; \ 136 mflr r10; \
124 stw r10,_LINK(r11); \ 137 stw r10,_LINK(r11); \
125 mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ 138 mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\
@@ -231,7 +244,7 @@ label:
231 * the code where the exception occurred (since exception entry \ 244 * the code where the exception occurred (since exception entry \
232 * doesn't turn off DE automatically). We simulate the effect \ 245 * doesn't turn off DE automatically). We simulate the effect \
233 * of turning off DE on entry to an exception handler by turning \ 246 * of turning off DE on entry to an exception handler by turning \
234 * off DE in the CSRR1 value and clearing the debug status. \ 247 * off DE in the DSRR1 value and clearing the debug status. \
235 */ \ 248 */ \
236 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ 249 mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \
237 andis. r10,r10,DBSR_IC@h; \ 250 andis. r10,r10,DBSR_IC@h; \
@@ -262,17 +275,17 @@ label:
262 lwz r12,GPR12(r11); \ 275 lwz r12,GPR12(r11); \
263 mtspr DEBUG_SPRG,r8; \ 276 mtspr DEBUG_SPRG,r8; \
264 BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ 277 BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \
265 lwz r10,GPR10-INT_FRAME_SIZE(r8); \ 278 lwz r10,GPR10(r8); \
266 lwz r11,GPR11-INT_FRAME_SIZE(r8); \ 279 lwz r11,GPR11(r8); \
267 mfspr r8,DEBUG_SPRG; \ 280 mfspr r8,DEBUG_SPRG; \
268 \ 281 \
269 RFDI; \ 282 RFDI; \
270 b .; \ 283 b .; \
271 \ 284 \
272 /* continue normal handling for a critical exception... */ \ 285 /* continue normal handling for a debug exception... */ \
2732: mfspr r4,SPRN_DBSR; \ 2862: mfspr r4,SPRN_DBSR; \
274 addi r3,r1,STACK_FRAME_OVERHEAD; \ 287 addi r3,r1,STACK_FRAME_OVERHEAD; \
275 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) 288 EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc)
276 289
277#define DEBUG_CRIT_EXCEPTION \ 290#define DEBUG_CRIT_EXCEPTION \
278 START_EXCEPTION(DebugCrit); \ 291 START_EXCEPTION(DebugCrit); \
@@ -315,8 +328,8 @@ label:
315 lwz r12,GPR12(r11); \ 328 lwz r12,GPR12(r11); \
316 mtspr CRIT_SPRG,r8; \ 329 mtspr CRIT_SPRG,r8; \
317 BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ 330 BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \
318 lwz r10,GPR10-INT_FRAME_SIZE(r8); \ 331 lwz r10,GPR10(r8); \
319 lwz r11,GPR11-INT_FRAME_SIZE(r8); \ 332 lwz r11,GPR11(r8); \
320 mfspr r8,CRIT_SPRG; \ 333 mfspr r8,CRIT_SPRG; \
321 \ 334 \
322 rfci; \ 335 rfci; \
@@ -327,6 +340,14 @@ label:
327 addi r3,r1,STACK_FRAME_OVERHEAD; \ 340 addi r3,r1,STACK_FRAME_OVERHEAD; \
328 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc) 341 EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, crit_transfer_to_handler, ret_from_crit_exc)
329 342
343#define DATA_STORAGE_EXCEPTION \
344 START_EXCEPTION(DataStorage) \
345 NORMAL_EXCEPTION_PROLOG; \
346 mfspr r5,SPRN_ESR; /* Grab the ESR and save it */ \
347 stw r5,_ESR(r11); \
348 mfspr r4,SPRN_DEAR; /* Grab the DEAR */ \
349 EXC_XFER_EE_LITE(0x0300, handle_page_fault)
350
330#define INSTRUCTION_STORAGE_EXCEPTION \ 351#define INSTRUCTION_STORAGE_EXCEPTION \
331 START_EXCEPTION(InstructionStorage) \ 352 START_EXCEPTION(InstructionStorage) \
332 NORMAL_EXCEPTION_PROLOG; \ 353 NORMAL_EXCEPTION_PROLOG; \
@@ -363,8 +384,31 @@ label:
363#define FP_UNAVAILABLE_EXCEPTION \ 384#define FP_UNAVAILABLE_EXCEPTION \
364 START_EXCEPTION(FloatingPointUnavailable) \ 385 START_EXCEPTION(FloatingPointUnavailable) \
365 NORMAL_EXCEPTION_PROLOG; \ 386 NORMAL_EXCEPTION_PROLOG; \
366 bne load_up_fpu; /* if from user, just load it up */ \ 387 beq 1f; \
367 addi r3,r1,STACK_FRAME_OVERHEAD; \ 388 bl load_up_fpu; /* if from user, just load it up */ \
389 b fast_exception_return; \
3901: addi r3,r1,STACK_FRAME_OVERHEAD; \
368 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) 391 EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception)
369 392
393#ifndef __ASSEMBLY__
394struct exception_regs {
395 unsigned long mas0;
396 unsigned long mas1;
397 unsigned long mas2;
398 unsigned long mas3;
399 unsigned long mas6;
400 unsigned long mas7;
401 unsigned long srr0;
402 unsigned long srr1;
403 unsigned long csrr0;
404 unsigned long csrr1;
405 unsigned long dsrr0;
406 unsigned long dsrr1;
407 unsigned long saved_ksp_limit;
408};
409
410/* ensure this structure is always sized to a multiple of the stack alignment */
411#define STACK_EXC_LVL_FRAME_SIZE _ALIGN_UP(sizeof (struct exception_regs), 16)
412
413#endif /* __ASSEMBLY__ */
370#endif /* __HEAD_BOOKE_H__ */ 414#endif /* __HEAD_BOOKE_H__ */
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index e581524d85bc..c4268500e856 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -39,6 +39,7 @@
39#include <asm/thread_info.h> 39#include <asm/thread_info.h>
40#include <asm/ppc_asm.h> 40#include <asm/ppc_asm.h>
41#include <asm/asm-offsets.h> 41#include <asm/asm-offsets.h>
42#include <asm/cache.h>
42#include "head_booke.h" 43#include "head_booke.h"
43 44
44/* As with the other PowerPC ports, it is expected that when code 45/* As with the other PowerPC ports, it is expected that when code
@@ -304,7 +305,7 @@ skpinv: addi r6,r6,1 /* Increment */
304 SET_IVOR(13, DataTLBError); 305 SET_IVOR(13, DataTLBError);
305 SET_IVOR(14, InstructionTLBError); 306 SET_IVOR(14, InstructionTLBError);
306 SET_IVOR(15, DebugDebug); 307 SET_IVOR(15, DebugDebug);
307#if defined(CONFIG_E500) 308#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
308 SET_IVOR(15, DebugCrit); 309 SET_IVOR(15, DebugCrit);
309#endif 310#endif
310 SET_IVOR(32, SPEUnavailable); 311 SET_IVOR(32, SPEUnavailable);
@@ -313,6 +314,9 @@ skpinv: addi r6,r6,1 /* Increment */
313#ifndef CONFIG_E200 314#ifndef CONFIG_E200
314 SET_IVOR(35, PerformanceMonitor); 315 SET_IVOR(35, PerformanceMonitor);
315#endif 316#endif
317#ifdef CONFIG_PPC_E500MC
318 SET_IVOR(36, Doorbell);
319#endif
316 320
317 /* Establish the interrupt vector base */ 321 /* Establish the interrupt vector base */
318 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ 322 lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */
@@ -750,10 +754,13 @@ interrupt_base:
750 /* Performance Monitor */ 754 /* Performance Monitor */
751 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) 755 EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD)
752 756
757#ifdef CONFIG_PPC_E500MC
758 EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE)
759#endif
753 760
754 /* Debug Interrupt */ 761 /* Debug Interrupt */
755 DEBUG_DEBUG_EXCEPTION 762 DEBUG_DEBUG_EXCEPTION
756#if defined(CONFIG_E500) 763#if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC)
757 DEBUG_CRIT_EXCEPTION 764 DEBUG_CRIT_EXCEPTION
758#endif 765#endif
759 766
@@ -1065,6 +1072,52 @@ _GLOBAL(set_context)
1065 isync /* Force context change */ 1072 isync /* Force context change */
1066 blr 1073 blr
1067 1074
1075_GLOBAL(flush_dcache_L1)
1076 mfspr r3,SPRN_L1CFG0
1077
1078 rlwinm r5,r3,9,3 /* Extract cache block size */
1079 twlgti r5,1 /* Only 32 and 64 byte cache blocks
1080 * are currently defined.
1081 */
1082 li r4,32
1083 subfic r6,r5,2 /* r6 = log2(1KiB / cache block size) -
1084 * log2(number of ways)
1085 */
1086 slw r5,r4,r5 /* r5 = cache block size */
1087
1088 rlwinm r7,r3,0,0xff /* Extract number of KiB in the cache */
1089 mulli r7,r7,13 /* An 8-way cache will require 13
1090 * loads per set.
1091 */
1092 slw r7,r7,r6
1093
1094 /* save off HID0 and set DCFA */
1095 mfspr r8,SPRN_HID0
1096 ori r9,r8,HID0_DCFA@l
1097 mtspr SPRN_HID0,r9
1098 isync
1099
1100 lis r4,KERNELBASE@h
1101 mtctr r7
1102
11031: lwz r3,0(r4) /* Load... */
1104 add r4,r4,r5
1105 bdnz 1b
1106
1107 msync
1108 lis r4,KERNELBASE@h
1109 mtctr r7
1110
11111: dcbf 0,r4 /* ...and flush. */
1112 add r4,r4,r5
1113 bdnz 1b
1114
1115 /* restore HID0 */
1116 mtspr SPRN_HID0,r8
1117 isync
1118
1119 blr
1120
1068/* 1121/*
1069 * We put a few things here that have to be page-aligned. This stuff 1122 * We put a few things here that have to be page-aligned. This stuff
1070 * goes at the beginning of the data segment, which is page-aligned. 1123 * goes at the beginning of the data segment, which is page-aligned.
@@ -1080,15 +1133,6 @@ empty_zero_page:
1080swapper_pg_dir: 1133swapper_pg_dir:
1081 .space PGD_TABLE_SIZE 1134 .space PGD_TABLE_SIZE
1082 1135
1083/* Reserved 4k for the critical exception stack & 4k for the machine
1084 * check stack per CPU for kernel mode exceptions */
1085 .section .bss
1086 .align 12
1087exception_stack_bottom:
1088 .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS
1089 .globl exception_stack_top
1090exception_stack_top:
1091
1092/* 1136/*
1093 * Room for two PTE pointers, usually the kernel and current user pointers 1137 * Room for two PTE pointers, usually the kernel and current user pointers
1094 * to their respective root page table. 1138 * to their respective root page table.
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 9971159c8040..9d42eb57aea3 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -53,7 +53,7 @@ static struct device ibmebus_bus_device = { /* fake "parent" device */
53struct bus_type ibmebus_bus_type; 53struct bus_type ibmebus_bus_type;
54 54
55/* These devices will automatically be added to the bus during init */ 55/* These devices will automatically be added to the bus during init */
56static struct of_device_id __initdata builtin_matches[] = { 56static struct of_device_id __initdata ibmebus_matches[] = {
57 { .compatible = "IBM,lhca" }, 57 { .compatible = "IBM,lhca" },
58 { .compatible = "IBM,lhea" }, 58 { .compatible = "IBM,lhea" },
59 {}, 59 {},
@@ -82,7 +82,8 @@ static void ibmebus_free_coherent(struct device *dev,
82static dma_addr_t ibmebus_map_single(struct device *dev, 82static dma_addr_t ibmebus_map_single(struct device *dev,
83 void *ptr, 83 void *ptr,
84 size_t size, 84 size_t size,
85 enum dma_data_direction direction) 85 enum dma_data_direction direction,
86 struct dma_attrs *attrs)
86{ 87{
87 return (dma_addr_t)(ptr); 88 return (dma_addr_t)(ptr);
88} 89}
@@ -90,14 +91,16 @@ static dma_addr_t ibmebus_map_single(struct device *dev,
90static void ibmebus_unmap_single(struct device *dev, 91static void ibmebus_unmap_single(struct device *dev,
91 dma_addr_t dma_addr, 92 dma_addr_t dma_addr,
92 size_t size, 93 size_t size,
93 enum dma_data_direction direction) 94 enum dma_data_direction direction,
95 struct dma_attrs *attrs)
94{ 96{
95 return; 97 return;
96} 98}
97 99
98static int ibmebus_map_sg(struct device *dev, 100static int ibmebus_map_sg(struct device *dev,
99 struct scatterlist *sgl, 101 struct scatterlist *sgl,
100 int nents, enum dma_data_direction direction) 102 int nents, enum dma_data_direction direction,
103 struct dma_attrs *attrs)
101{ 104{
102 struct scatterlist *sg; 105 struct scatterlist *sg;
103 int i; 106 int i;
@@ -112,7 +115,8 @@ static int ibmebus_map_sg(struct device *dev,
112 115
113static void ibmebus_unmap_sg(struct device *dev, 116static void ibmebus_unmap_sg(struct device *dev,
114 struct scatterlist *sg, 117 struct scatterlist *sg,
115 int nents, enum dma_data_direction direction) 118 int nents, enum dma_data_direction direction,
119 struct dma_attrs *attrs)
116{ 120{
117 return; 121 return;
118} 122}
@@ -350,7 +354,7 @@ static int __init ibmebus_bus_init(void)
350 return err; 354 return err;
351 } 355 }
352 356
353 err = ibmebus_create_devices(builtin_matches); 357 err = ibmebus_create_devices(ibmebus_matches);
354 if (err) { 358 if (err) {
355 device_unregister(&ibmebus_bus_device); 359 device_unregister(&ibmebus_bus_device);
356 bus_unregister(&ibmebus_bus_type); 360 bus_unregister(&ibmebus_bus_type);
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S
index 01bcd52bbf8e..019b02d8844f 100644
--- a/arch/powerpc/kernel/idle_6xx.S
+++ b/arch/powerpc/kernel/idle_6xx.S
@@ -153,7 +153,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
153 * address of current. R11 points to the exception frame (physical 153 * address of current. R11 points to the exception frame (physical
154 * address). We have to preserve r10. 154 * address). We have to preserve r10.
155 */ 155 */
156_GLOBAL(power_save_6xx_restore) 156_GLOBAL(power_save_ppc32_restore)
157 lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */ 157 lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */
158 stw r9,_NIP(r11) /* make it do a blr */ 158 stw r9,_NIP(r11) /* make it do a blr */
159 159
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S
new file mode 100644
index 000000000000..06304034b393
--- /dev/null
+++ b/arch/powerpc/kernel/idle_e500.S
@@ -0,0 +1,93 @@
1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 * Dave Liu <daveliu@freescale.com>
4 * copy from idle_6xx.S and modify for e500 based processor,
5 * implement the power_save function in idle.
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; either version
10 * 2 of the License, or (at your option) any later version.
11 */
12
13#include <linux/threads.h>
14#include <asm/reg.h>
15#include <asm/page.h>
16#include <asm/cputable.h>
17#include <asm/thread_info.h>
18#include <asm/ppc_asm.h>
19#include <asm/asm-offsets.h>
20
21 .text
22
23_GLOBAL(e500_idle)
24 rlwinm r3,r1,0,0,31-THREAD_SHIFT /* current thread_info */
25 lwz r4,TI_LOCAL_FLAGS(r3) /* set napping bit */
26 ori r4,r4,_TLF_NAPPING /* so when we take an exception */
27 stw r4,TI_LOCAL_FLAGS(r3) /* it will return to our caller */
28
29 /* Check if we can nap or doze, put HID0 mask in r3 */
30 lis r3,0
31BEGIN_FTR_SECTION
32 lis r3,HID0_DOZE@h
33END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE)
34
35BEGIN_FTR_SECTION
36 /* Now check if user enabled NAP mode */
37 lis r4,powersave_nap@ha
38 lwz r4,powersave_nap@l(r4)
39 cmpwi 0,r4,0
40 beq 1f
41 stwu r1,-16(r1)
42 mflr r0
43 stw r0,20(r1)
44 bl flush_dcache_L1
45 lwz r0,20(r1)
46 addi r1,r1,16
47 mtlr r0
48 lis r3,HID0_NAP@h
49END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
50BEGIN_FTR_SECTION
51 msync
52 li r7,L2CSR0_L2FL@l
53 mtspr SPRN_L2CSR0,r7
542:
55 mfspr r7,SPRN_L2CSR0
56 andi. r4,r7,L2CSR0_L2FL@l
57 bne 2b
58END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP)
591:
60 /* Go to NAP or DOZE now */
61 mfspr r4,SPRN_HID0
62 rlwinm r4,r4,0,~(HID0_DOZE|HID0_NAP|HID0_SLEEP)
63 or r4,r4,r3
64 isync
65 mtspr SPRN_HID0,r4
66 isync
67
68 mfmsr r7
69 oris r7,r7,MSR_WE@h
70 ori r7,r7,MSR_EE
71 msync
72 mtmsr r7
73 isync
742: b 2b
75
76/*
77 * Return from NAP/DOZE mode, restore some CPU specific registers,
78 * r2 containing physical address of current.
79 * r11 points to the exception frame (physical address).
80 * We have to preserve r10.
81 */
82_GLOBAL(power_save_ppc32_restore)
83 lwz r9,_LINK(r11) /* interrupted in e500_idle */
84 stw r9,_NIP(r11) /* make it do a blr */
85
86#ifdef CONFIG_SMP
87 mfspr r12,SPRN_SPRG3
88 lwz r11,TI_CPU(r12) /* get cpu number * 4 */
89 slwi r11,r11,2
90#else
91 li r11,0
92#endif
93 b transfer_to_handler_cont
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index 0c663669bc32..8c68ee9e5d1c 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -267,11 +267,11 @@ static void iommu_free(struct iommu_table *tbl, dma_addr_t dma_addr,
267 spin_unlock_irqrestore(&(tbl->it_lock), flags); 267 spin_unlock_irqrestore(&(tbl->it_lock), flags);
268} 268}
269 269
270int iommu_map_sg(struct device *dev, struct scatterlist *sglist, 270int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
271 int nelems, unsigned long mask, 271 struct scatterlist *sglist, int nelems,
272 enum dma_data_direction direction) 272 unsigned long mask, enum dma_data_direction direction,
273 struct dma_attrs *attrs)
273{ 274{
274 struct iommu_table *tbl = dev->archdata.dma_data;
275 dma_addr_t dma_next = 0, dma_addr; 275 dma_addr_t dma_next = 0, dma_addr;
276 unsigned long flags; 276 unsigned long flags;
277 struct scatterlist *s, *outs, *segstart; 277 struct scatterlist *s, *outs, *segstart;
@@ -412,7 +412,8 @@ int iommu_map_sg(struct device *dev, struct scatterlist *sglist,
412 412
413 413
414void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist, 414void iommu_unmap_sg(struct iommu_table *tbl, struct scatterlist *sglist,
415 int nelems, enum dma_data_direction direction) 415 int nelems, enum dma_data_direction direction,
416 struct dma_attrs *attrs)
416{ 417{
417 struct scatterlist *sg; 418 struct scatterlist *sg;
418 unsigned long flags; 419 unsigned long flags;
@@ -554,7 +555,7 @@ void iommu_free_table(struct iommu_table *tbl, const char *node_name)
554 */ 555 */
555dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl, 556dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
556 void *vaddr, size_t size, unsigned long mask, 557 void *vaddr, size_t size, unsigned long mask,
557 enum dma_data_direction direction) 558 enum dma_data_direction direction, struct dma_attrs *attrs)
558{ 559{
559 dma_addr_t dma_handle = DMA_ERROR_CODE; 560 dma_addr_t dma_handle = DMA_ERROR_CODE;
560 unsigned long uaddr; 561 unsigned long uaddr;
@@ -587,7 +588,8 @@ dma_addr_t iommu_map_single(struct device *dev, struct iommu_table *tbl,
587} 588}
588 589
589void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle, 590void iommu_unmap_single(struct iommu_table *tbl, dma_addr_t dma_handle,
590 size_t size, enum dma_data_direction direction) 591 size_t size, enum dma_data_direction direction,
592 struct dma_attrs *attrs)
591{ 593{
592 unsigned int npages; 594 unsigned int npages;
593 595
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index dcc946e67099..6ac8612da3c3 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -356,9 +356,42 @@ void __init init_IRQ(void)
356{ 356{
357 if (ppc_md.init_IRQ) 357 if (ppc_md.init_IRQ)
358 ppc_md.init_IRQ(); 358 ppc_md.init_IRQ();
359
360 exc_lvl_ctx_init();
361
359 irq_ctx_init(); 362 irq_ctx_init();
360} 363}
361 364
365#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
366struct thread_info *critirq_ctx[NR_CPUS] __read_mostly;
367struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly;
368struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
369
370void exc_lvl_ctx_init(void)
371{
372 struct thread_info *tp;
373 int i;
374
375 for_each_possible_cpu(i) {
376 memset((void *)critirq_ctx[i], 0, THREAD_SIZE);
377 tp = critirq_ctx[i];
378 tp->cpu = i;
379 tp->preempt_count = 0;
380
381#ifdef CONFIG_BOOKE
382 memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE);
383 tp = dbgirq_ctx[i];
384 tp->cpu = i;
385 tp->preempt_count = 0;
386
387 memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE);
388 tp = mcheckirq_ctx[i];
389 tp->cpu = i;
390 tp->preempt_count = HARDIRQ_OFFSET;
391#endif
392 }
393}
394#endif
362 395
363#ifdef CONFIG_IRQSTACKS 396#ifdef CONFIG_IRQSTACKS
364struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; 397struct thread_info *softirq_ctx[NR_CPUS] __read_mostly;
@@ -465,7 +498,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
465 host->revmap_type = revmap_type; 498 host->revmap_type = revmap_type;
466 host->inval_irq = inval_irq; 499 host->inval_irq = inval_irq;
467 host->ops = ops; 500 host->ops = ops;
468 host->of_node = of_node; 501 host->of_node = of_node_get(of_node);
469 502
470 if (host->ops->match == NULL) 503 if (host->ops->match == NULL)
471 host->ops->match = default_irq_host_match; 504 host->ops->match = default_irq_host_match;
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c
index c176c513566b..4ba2af125450 100644
--- a/arch/powerpc/kernel/kprobes.c
+++ b/arch/powerpc/kernel/kprobes.c
@@ -34,6 +34,13 @@
34#include <asm/cacheflush.h> 34#include <asm/cacheflush.h>
35#include <asm/sstep.h> 35#include <asm/sstep.h>
36#include <asm/uaccess.h> 36#include <asm/uaccess.h>
37#include <asm/system.h>
38
39#ifdef CONFIG_BOOKE
40#define MSR_SINGLESTEP (MSR_DE)
41#else
42#define MSR_SINGLESTEP (MSR_SE)
43#endif
37 44
38DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; 45DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL;
39DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); 46DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk);
@@ -53,7 +60,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p)
53 ret = -EINVAL; 60 ret = -EINVAL;
54 } 61 }
55 62
56 /* insn must be on a special executable page on ppc64 */ 63 /* insn must be on a special executable page on ppc64. This is
64 * not explicitly required on ppc32 (right now), but it doesn't hurt */
57 if (!ret) { 65 if (!ret) {
58 p->ainsn.insn = get_insn_slot(); 66 p->ainsn.insn = get_insn_slot();
59 if (!p->ainsn.insn) 67 if (!p->ainsn.insn)
@@ -95,7 +103,16 @@ void __kprobes arch_remove_kprobe(struct kprobe *p)
95 103
96static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) 104static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs)
97{ 105{
98 regs->msr |= MSR_SE; 106 /* We turn off async exceptions to ensure that the single step will
107 * be for the instruction we have the kprobe on, if we dont its
108 * possible we'd get the single step reported for an exception handler
109 * like Decrementer or External Interrupt */
110 regs->msr &= ~MSR_EE;
111 regs->msr |= MSR_SINGLESTEP;
112#ifdef CONFIG_BOOKE
113 regs->msr &= ~MSR_CE;
114 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM);
115#endif
99 116
100 /* 117 /*
101 * On powerpc we should single step on the original 118 * On powerpc we should single step on the original
@@ -158,7 +175,8 @@ static int __kprobes kprobe_handler(struct pt_regs *regs)
158 kprobe_opcode_t insn = *p->ainsn.insn; 175 kprobe_opcode_t insn = *p->ainsn.insn;
159 if (kcb->kprobe_status == KPROBE_HIT_SS && 176 if (kcb->kprobe_status == KPROBE_HIT_SS &&
160 is_trap(insn)) { 177 is_trap(insn)) {
161 regs->msr &= ~MSR_SE; 178 /* Turn off 'trace' bits */
179 regs->msr &= ~MSR_SINGLESTEP;
162 regs->msr |= kcb->kprobe_saved_msr; 180 regs->msr |= kcb->kprobe_saved_msr;
163 goto no_kprobe; 181 goto no_kprobe;
164 } 182 }
@@ -376,6 +394,10 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs)
376 if (!cur) 394 if (!cur)
377 return 0; 395 return 0;
378 396
397 /* make sure we got here for instruction we have a kprobe on */
398 if (((unsigned long)cur->ainsn.insn + 4) != regs->nip)
399 return 0;
400
379 if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) { 401 if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) {
380 kcb->kprobe_status = KPROBE_HIT_SSDONE; 402 kcb->kprobe_status = KPROBE_HIT_SSDONE;
381 cur->post_handler(cur, regs, 0); 403 cur->post_handler(cur, regs, 0);
@@ -395,10 +417,10 @@ out:
395 417
396 /* 418 /*
397 * if somebody else is singlestepping across a probe point, msr 419 * if somebody else is singlestepping across a probe point, msr
398 * will have SE set, in which case, continue the remaining processing 420 * will have DE/SE set, in which case, continue the remaining processing
399 * of do_debug, as if this is not a probe hit. 421 * of do_debug, as if this is not a probe hit.
400 */ 422 */
401 if (regs->msr & MSR_SE) 423 if (regs->msr & MSR_SINGLESTEP)
402 return 0; 424 return 0;
403 425
404 return 1; 426 return 1;
@@ -421,7 +443,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr)
421 * normal page fault. 443 * normal page fault.
422 */ 444 */
423 regs->nip = (unsigned long)cur->addr; 445 regs->nip = (unsigned long)cur->addr;
424 regs->msr &= ~MSR_SE; 446 regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */
425 regs->msr |= kcb->kprobe_saved_msr; 447 regs->msr |= kcb->kprobe_saved_msr;
426 if (kcb->kprobe_status == KPROBE_REENTER) 448 if (kcb->kprobe_status == KPROBE_REENTER)
427 restore_previous_kprobe(kcb); 449 restore_previous_kprobe(kcb);
@@ -498,7 +520,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self,
498#ifdef CONFIG_PPC64 520#ifdef CONFIG_PPC64
499unsigned long arch_deref_entry_point(void *entry) 521unsigned long arch_deref_entry_point(void *entry)
500{ 522{
501 return (unsigned long)(((func_descr_t *)entry)->entry); 523 return ((func_descr_t *)entry)->entry;
502} 524}
503#endif 525#endif
504 526
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 1e656b43ad7f..827a5726a035 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -573,7 +573,7 @@ static int lparcfg_open(struct inode *inode, struct file *file)
573 return single_open(file, lparcfg_data, NULL); 573 return single_open(file, lparcfg_data, NULL);
574} 574}
575 575
576const struct file_operations lparcfg_fops = { 576static const struct file_operations lparcfg_fops = {
577 .owner = THIS_MODULE, 577 .owner = THIS_MODULE,
578 .read = seq_read, 578 .read = seq_read,
579 .write = lparcfg_write, 579 .write = lparcfg_write,
@@ -581,7 +581,7 @@ const struct file_operations lparcfg_fops = {
581 .release = single_release, 581 .release = single_release,
582}; 582};
583 583
584int __init lparcfg_init(void) 584static int __init lparcfg_init(void)
585{ 585{
586 struct proc_dir_entry *ent; 586 struct proc_dir_entry *ent;
587 mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; 587 mode_t mode = S_IRUSR | S_IRGRP | S_IROTH;
@@ -601,7 +601,7 @@ int __init lparcfg_init(void)
601 return 0; 601 return 0;
602} 602}
603 603
604void __exit lparcfg_cleanup(void) 604static void __exit lparcfg_cleanup(void)
605{ 605{
606 if (proc_ppc64_lparcfg) 606 if (proc_ppc64_lparcfg)
607 remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); 607 remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent);
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c
index b732b5f8e356..a168514d8609 100644
--- a/arch/powerpc/kernel/machine_kexec_64.c
+++ b/arch/powerpc/kernel/machine_kexec_64.c
@@ -158,7 +158,7 @@ void kexec_copy_flush(struct kimage *image)
158 * on calling the interrupts, but we would like to call it off irq level 158 * on calling the interrupts, but we would like to call it off irq level
159 * so that the interrupt controller is clean. 159 * so that the interrupt controller is clean.
160 */ 160 */
161void kexec_smp_down(void *arg) 161static void kexec_smp_down(void *arg)
162{ 162{
163 if (ppc_md.kexec_cpu_down) 163 if (ppc_md.kexec_cpu_down)
164 ppc_md.kexec_cpu_down(0, 1); 164 ppc_md.kexec_cpu_down(0, 1);
@@ -249,7 +249,7 @@ static void kexec_prepare_cpus(void)
249 * We could use a smaller stack if we don't care about anything using 249 * We could use a smaller stack if we don't care about anything using
250 * current, but that audit has not been performed. 250 * current, but that audit has not been performed.
251 */ 251 */
252union thread_union kexec_stack 252static union thread_union kexec_stack
253 __attribute__((__section__(".data.init_task"))) = { }; 253 __attribute__((__section__(".data.init_task"))) = { };
254 254
255/* Our assembly helper, in kexec_stub.S */ 255/* Our assembly helper, in kexec_stub.S */
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 7b9160220698..85cb6f340846 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -116,3 +116,8 @@ _GLOBAL(longjmp)
116 mtlr r0 116 mtlr r0
117 mr r3,r4 117 mr r3,r4
118 blr 118 blr
119
120_GLOBAL(__setup_cpu_power7)
121_GLOBAL(__restore_cpu_power7)
122 /* place holder */
123 blr
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index 89aaaa6f3561..6321ae36f729 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE)
489 * 489 *
490 * flush_icache_range(unsigned long start, unsigned long stop) 490 * flush_icache_range(unsigned long start, unsigned long stop)
491 */ 491 */
492_GLOBAL(__flush_icache_range) 492_KPROBE(__flush_icache_range)
493BEGIN_FTR_SECTION 493BEGIN_FTR_SECTION
494 blr /* for 601, do nothing */ 494 blr /* for 601, do nothing */
495END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) 495END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE)
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index 942951e76586..4dd70cf7bb4e 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -506,6 +506,39 @@ _GLOBAL(giveup_altivec)
506 506
507#endif /* CONFIG_ALTIVEC */ 507#endif /* CONFIG_ALTIVEC */
508 508
509#ifdef CONFIG_VSX
510/*
511 * __giveup_vsx(tsk)
512 * Disable VSX for the task given as the argument.
513 * Does NOT save vsx registers.
514 * Enables the VSX for use in the kernel on return.
515 */
516_GLOBAL(__giveup_vsx)
517 mfmsr r5
518 oris r5,r5,MSR_VSX@h
519 mtmsrd r5 /* enable use of VSX now */
520 isync
521
522 cmpdi 0,r3,0
523 beqlr- /* if no previous owner, done */
524 addi r3,r3,THREAD /* want THREAD of task */
525 ld r5,PT_REGS(r3)
526 cmpdi 0,r5,0
527 beq 1f
528 ld r4,_MSR-STACK_FRAME_OVERHEAD(r5)
529 lis r3,MSR_VSX@h
530 andc r4,r4,r3 /* disable VSX for previous task */
531 std r4,_MSR-STACK_FRAME_OVERHEAD(r5)
5321:
533#ifndef CONFIG_SMP
534 li r5,0
535 ld r4,last_task_used_vsx@got(r2)
536 std r5,0(r4)
537#endif /* CONFIG_SMP */
538 blr
539
540#endif /* CONFIG_VSX */
541
509/* kexec_wait(phys_cpu) 542/* kexec_wait(phys_cpu)
510 * 543 *
511 * wait for the flag to change, indicating this kernel is going away but 544 * wait for the flag to change, indicating this kernel is going away but
diff --git a/arch/powerpc/kernel/module.c b/arch/powerpc/kernel/module.c
new file mode 100644
index 000000000000..af07003573c4
--- /dev/null
+++ b/arch/powerpc/kernel/module.c
@@ -0,0 +1,116 @@
1/* Kernel module help for powerpc.
2 Copyright (C) 2001, 2003 Rusty Russell IBM Corporation.
3 Copyright (C) 2008 Freescale Semiconductor, Inc.
4
5 This program is free software; you can redistribute it and/or modify
6 it under the terms of the GNU General Public License as published by
7 the Free Software Foundation; either version 2 of the License, or
8 (at your option) any later version.
9
10 This program is distributed in the hope that it will be useful,
11 but WITHOUT ANY WARRANTY; without even the implied warranty of
12 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 GNU General Public License for more details.
14
15 You should have received a copy of the GNU General Public License
16 along with this program; if not, write to the Free Software
17 Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
18*/
19#include <linux/module.h>
20#include <linux/elf.h>
21#include <linux/moduleloader.h>
22#include <linux/err.h>
23#include <linux/vmalloc.h>
24#include <linux/bug.h>
25#include <asm/module.h>
26#include <asm/uaccess.h>
27#include <asm/firmware.h>
28#include <linux/sort.h>
29
30#include "setup.h"
31
32LIST_HEAD(module_bug_list);
33
34void *module_alloc(unsigned long size)
35{
36 if (size == 0)
37 return NULL;
38
39 return vmalloc_exec(size);
40}
41
42/* Free memory returned from module_alloc */
43void module_free(struct module *mod, void *module_region)
44{
45 vfree(module_region);
46 /* FIXME: If module_region == mod->init_region, trim exception
47 table entries. */
48}
49
50static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
51 const Elf_Shdr *sechdrs,
52 const char *name)
53{
54 char *secstrings;
55 unsigned int i;
56
57 secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
58 for (i = 1; i < hdr->e_shnum; i++)
59 if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
60 return &sechdrs[i];
61 return NULL;
62}
63
64int module_finalize(const Elf_Ehdr *hdr,
65 const Elf_Shdr *sechdrs, struct module *me)
66{
67 const Elf_Shdr *sect;
68 int err;
69
70 err = module_bug_finalize(hdr, sechdrs, me);
71 if (err)
72 return err;
73
74 /* Apply feature fixups */
75 sect = find_section(hdr, sechdrs, "__ftr_fixup");
76 if (sect != NULL)
77 do_feature_fixups(cur_cpu_spec->cpu_features,
78 (void *)sect->sh_addr,
79 (void *)sect->sh_addr + sect->sh_size);
80
81#ifdef CONFIG_PPC64
82 sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
83 if (sect != NULL)
84 do_feature_fixups(powerpc_firmware_features,
85 (void *)sect->sh_addr,
86 (void *)sect->sh_addr + sect->sh_size);
87#endif
88
89 sect = find_section(hdr, sechdrs, "__lwsync_fixup");
90 if (sect != NULL)
91 do_lwsync_fixups(cur_cpu_spec->cpu_features,
92 (void *)sect->sh_addr,
93 (void *)sect->sh_addr + sect->sh_size);
94
95 return 0;
96}
97
98void module_arch_cleanup(struct module *mod)
99{
100 module_bug_cleanup(mod);
101}
102
103struct bug_entry *module_find_bug(unsigned long bugaddr)
104{
105 struct mod_arch_specific *mod;
106 unsigned int i;
107 struct bug_entry *bug;
108
109 list_for_each_entry(mod, &module_bug_list, bug_list) {
110 bug = mod->bug_table;
111 for (i = 0; i < mod->num_bugs; ++i, ++bug)
112 if (bugaddr == bug->bug_addr)
113 return bug;
114 }
115 return NULL;
116}
diff --git a/arch/powerpc/kernel/module_32.c b/arch/powerpc/kernel/module_32.c
index eab313858315..2df91a03462a 100644
--- a/arch/powerpc/kernel/module_32.c
+++ b/arch/powerpc/kernel/module_32.c
@@ -34,23 +34,6 @@
34#define DEBUGP(fmt , ...) 34#define DEBUGP(fmt , ...)
35#endif 35#endif
36 36
37LIST_HEAD(module_bug_list);
38
39void *module_alloc(unsigned long size)
40{
41 if (size == 0)
42 return NULL;
43 return vmalloc(size);
44}
45
46/* Free memory returned from module_alloc */
47void module_free(struct module *mod, void *module_region)
48{
49 vfree(module_region);
50 /* FIXME: If module_region == mod->init_region, trim exception
51 table entries. */
52}
53
54/* Count how many different relocations (different symbol, different 37/* Count how many different relocations (different symbol, different
55 addend) */ 38 addend) */
56static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num) 39static unsigned int count_relocs(const Elf32_Rela *rela, unsigned int num)
@@ -325,58 +308,3 @@ int apply_relocate_add(Elf32_Shdr *sechdrs,
325 } 308 }
326 return 0; 309 return 0;
327} 310}
328
329static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
330 const Elf_Shdr *sechdrs,
331 const char *name)
332{
333 char *secstrings;
334 unsigned int i;
335
336 secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
337 for (i = 1; i < hdr->e_shnum; i++)
338 if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
339 return &sechdrs[i];
340 return NULL;
341}
342
343int module_finalize(const Elf_Ehdr *hdr,
344 const Elf_Shdr *sechdrs,
345 struct module *me)
346{
347 const Elf_Shdr *sect;
348 int err;
349
350 err = module_bug_finalize(hdr, sechdrs, me);
351 if (err) /* never true, currently */
352 return err;
353
354 /* Apply feature fixups */
355 sect = find_section(hdr, sechdrs, "__ftr_fixup");
356 if (sect != NULL)
357 do_feature_fixups(cur_cpu_spec->cpu_features,
358 (void *)sect->sh_addr,
359 (void *)sect->sh_addr + sect->sh_size);
360
361 return 0;
362}
363
364void module_arch_cleanup(struct module *mod)
365{
366 module_bug_cleanup(mod);
367}
368
369struct bug_entry *module_find_bug(unsigned long bugaddr)
370{
371 struct mod_arch_specific *mod;
372 unsigned int i;
373 struct bug_entry *bug;
374
375 list_for_each_entry(mod, &module_bug_list, bug_list) {
376 bug = mod->bug_table;
377 for (i = 0; i < mod->num_bugs; ++i, ++bug)
378 if (bugaddr == bug->bug_addr)
379 return bug;
380 }
381 return NULL;
382}
diff --git a/arch/powerpc/kernel/module_64.c b/arch/powerpc/kernel/module_64.c
index 3a82b02b784b..ee6a2982d567 100644
--- a/arch/powerpc/kernel/module_64.c
+++ b/arch/powerpc/kernel/module_64.c
@@ -24,6 +24,7 @@
24#include <asm/module.h> 24#include <asm/module.h>
25#include <asm/uaccess.h> 25#include <asm/uaccess.h>
26#include <asm/firmware.h> 26#include <asm/firmware.h>
27#include <asm/code-patching.h>
27#include <linux/sort.h> 28#include <linux/sort.h>
28 29
29#include "setup.h" 30#include "setup.h"
@@ -101,22 +102,6 @@ static unsigned int count_relocs(const Elf64_Rela *rela, unsigned int num)
101 return _count_relocs; 102 return _count_relocs;
102} 103}
103 104
104void *module_alloc(unsigned long size)
105{
106 if (size == 0)
107 return NULL;
108
109 return vmalloc_exec(size);
110}
111
112/* Free memory returned from module_alloc */
113void module_free(struct module *mod, void *module_region)
114{
115 vfree(module_region);
116 /* FIXME: If module_region == mod->init_region, trim exception
117 table entries. */
118}
119
120static int relacmp(const void *_x, const void *_y) 105static int relacmp(const void *_x, const void *_y)
121{ 106{
122 const Elf64_Rela *x, *y; 107 const Elf64_Rela *x, *y;
@@ -346,7 +331,7 @@ static unsigned long stub_for_addr(Elf64_Shdr *sechdrs,
346 restore r2. */ 331 restore r2. */
347static int restore_r2(u32 *instruction, struct module *me) 332static int restore_r2(u32 *instruction, struct module *me)
348{ 333{
349 if (*instruction != 0x60000000) { 334 if (*instruction != PPC_NOP_INSTR) {
350 printk("%s: Expect noop after relocate, got %08x\n", 335 printk("%s: Expect noop after relocate, got %08x\n",
351 me->name, *instruction); 336 me->name, *instruction);
352 return 0; 337 return 0;
@@ -466,65 +451,3 @@ int apply_relocate_add(Elf64_Shdr *sechdrs,
466 451
467 return 0; 452 return 0;
468} 453}
469
470LIST_HEAD(module_bug_list);
471
472static const Elf_Shdr *find_section(const Elf_Ehdr *hdr,
473 const Elf_Shdr *sechdrs,
474 const char *name)
475{
476 char *secstrings;
477 unsigned int i;
478
479 secstrings = (char *)hdr + sechdrs[hdr->e_shstrndx].sh_offset;
480 for (i = 1; i < hdr->e_shnum; i++)
481 if (strcmp(secstrings+sechdrs[i].sh_name, name) == 0)
482 return &sechdrs[i];
483 return NULL;
484}
485
486int module_finalize(const Elf_Ehdr *hdr,
487 const Elf_Shdr *sechdrs, struct module *me)
488{
489 const Elf_Shdr *sect;
490 int err;
491
492 err = module_bug_finalize(hdr, sechdrs, me);
493 if (err)
494 return err;
495
496 /* Apply feature fixups */
497 sect = find_section(hdr, sechdrs, "__ftr_fixup");
498 if (sect != NULL)
499 do_feature_fixups(cur_cpu_spec->cpu_features,
500 (void *)sect->sh_addr,
501 (void *)sect->sh_addr + sect->sh_size);
502
503 sect = find_section(hdr, sechdrs, "__fw_ftr_fixup");
504 if (sect != NULL)
505 do_feature_fixups(powerpc_firmware_features,
506 (void *)sect->sh_addr,
507 (void *)sect->sh_addr + sect->sh_size);
508
509 return 0;
510}
511
512void module_arch_cleanup(struct module *mod)
513{
514 module_bug_cleanup(mod);
515}
516
517struct bug_entry *module_find_bug(unsigned long bugaddr)
518{
519 struct mod_arch_specific *mod;
520 unsigned int i;
521 struct bug_entry *bug;
522
523 list_for_each_entry(mod, &module_bug_list, bug_list) {
524 bug = mod->bug_table;
525 for (i = 0; i < mod->num_bugs; ++i, ++bug)
526 if (bugaddr == bug->bug_addr)
527 return bug;
528 }
529 return NULL;
530}
diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c
index c62d1012c013..3bb7d3dd28be 100644
--- a/arch/powerpc/kernel/msi.c
+++ b/arch/powerpc/kernel/msi.c
@@ -34,5 +34,5 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
34 34
35void arch_teardown_msi_irqs(struct pci_dev *dev) 35void arch_teardown_msi_irqs(struct pci_dev *dev)
36{ 36{
37 return ppc_md.teardown_msi_irqs(dev); 37 ppc_md.teardown_msi_irqs(dev);
38} 38}
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c
index 5748ddb47d9f..e9be908f199b 100644
--- a/arch/powerpc/kernel/of_device.c
+++ b/arch/powerpc/kernel/of_device.c
@@ -89,54 +89,6 @@ struct of_device *of_device_alloc(struct device_node *np,
89} 89}
90EXPORT_SYMBOL(of_device_alloc); 90EXPORT_SYMBOL(of_device_alloc);
91 91
92ssize_t of_device_get_modalias(struct of_device *ofdev,
93 char *str, ssize_t len)
94{
95 const char *compat;
96 int cplen, i;
97 ssize_t tsize, csize, repend;
98
99 /* Name & Type */
100 csize = snprintf(str, len, "of:N%sT%s",
101 ofdev->node->name, ofdev->node->type);
102
103 /* Get compatible property if any */
104 compat = of_get_property(ofdev->node, "compatible", &cplen);
105 if (!compat)
106 return csize;
107
108 /* Find true end (we tolerate multiple \0 at the end */
109 for (i=(cplen-1); i>=0 && !compat[i]; i--)
110 cplen--;
111 if (!cplen)
112 return csize;
113 cplen++;
114
115 /* Check space (need cplen+1 chars including final \0) */
116 tsize = csize + cplen;
117 repend = tsize;
118
119 if (csize>=len) /* @ the limit, all is already filled */
120 return tsize;
121
122 if (tsize>=len) { /* limit compat list */
123 cplen = len-csize-1;
124 repend = len;
125 }
126
127 /* Copy and do char replacement */
128 memcpy(&str[csize+1], compat, cplen);
129 for (i=csize; i<repend; i++) {
130 char c = str[i];
131 if (c=='\0')
132 str[i] = 'C';
133 else if (c==' ')
134 str[i] = '_';
135 }
136
137 return tsize;
138}
139
140int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) 92int of_device_uevent(struct device *dev, struct kobj_uevent_env *env)
141{ 93{
142 struct of_device *ofdev; 94 struct of_device *ofdev;
diff --git a/arch/powerpc/kernel/ppc32.h b/arch/powerpc/kernel/ppc32.h
index 90e562771791..dc16aefe1dd0 100644
--- a/arch/powerpc/kernel/ppc32.h
+++ b/arch/powerpc/kernel/ppc32.h
@@ -120,6 +120,7 @@ struct mcontext32 {
120 elf_fpregset_t mc_fregs; 120 elf_fpregset_t mc_fregs;
121 unsigned int mc_pad[2]; 121 unsigned int mc_pad[2];
122 elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16))); 122 elf_vrregset_t32 mc_vregs __attribute__((__aligned__(16)));
123 elf_vsrreghalf_t32 mc_vsregs __attribute__((__aligned__(16)));
123}; 124};
124 125
125struct ucontext32 { 126struct ucontext32 {
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index a8d02506468a..e1ea4fe5cfbd 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -107,6 +107,9 @@ EXPORT_SYMBOL(giveup_fpu);
107#ifdef CONFIG_ALTIVEC 107#ifdef CONFIG_ALTIVEC
108EXPORT_SYMBOL(giveup_altivec); 108EXPORT_SYMBOL(giveup_altivec);
109#endif /* CONFIG_ALTIVEC */ 109#endif /* CONFIG_ALTIVEC */
110#ifdef CONFIG_VSX
111EXPORT_SYMBOL(giveup_vsx);
112#endif /* CONFIG_VSX */
110#ifdef CONFIG_SPE 113#ifdef CONFIG_SPE
111EXPORT_SYMBOL(giveup_spe); 114EXPORT_SYMBOL(giveup_spe);
112#endif /* CONFIG_SPE */ 115#endif /* CONFIG_SPE */
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index 7de41c3948ec..219f3634115e 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -53,6 +53,7 @@ extern unsigned long _get_SP(void);
53#ifndef CONFIG_SMP 53#ifndef CONFIG_SMP
54struct task_struct *last_task_used_math = NULL; 54struct task_struct *last_task_used_math = NULL;
55struct task_struct *last_task_used_altivec = NULL; 55struct task_struct *last_task_used_altivec = NULL;
56struct task_struct *last_task_used_vsx = NULL;
56struct task_struct *last_task_used_spe = NULL; 57struct task_struct *last_task_used_spe = NULL;
57#endif 58#endif
58 59
@@ -104,17 +105,6 @@ void enable_kernel_fp(void)
104} 105}
105EXPORT_SYMBOL(enable_kernel_fp); 106EXPORT_SYMBOL(enable_kernel_fp);
106 107
107int dump_task_fpu(struct task_struct *tsk, elf_fpregset_t *fpregs)
108{
109 if (!tsk->thread.regs)
110 return 0;
111 flush_fp_to_thread(current);
112
113 memcpy(fpregs, &tsk->thread.fpr[0], sizeof(*fpregs));
114
115 return 1;
116}
117
118#ifdef CONFIG_ALTIVEC 108#ifdef CONFIG_ALTIVEC
119void enable_kernel_altivec(void) 109void enable_kernel_altivec(void)
120{ 110{
@@ -148,36 +138,48 @@ void flush_altivec_to_thread(struct task_struct *tsk)
148 preempt_enable(); 138 preempt_enable();
149 } 139 }
150} 140}
141#endif /* CONFIG_ALTIVEC */
151 142
152int dump_task_altivec(struct task_struct *tsk, elf_vrregset_t *vrregs) 143#ifdef CONFIG_VSX
144#if 0
145/* not currently used, but some crazy RAID module might want to later */
146void enable_kernel_vsx(void)
153{ 147{
154 /* ELF_NVRREG includes the VSCR and VRSAVE which we need to save 148 WARN_ON(preemptible());
155 * separately, see below */
156 const int nregs = ELF_NVRREG - 2;
157 elf_vrreg_t *reg;
158 u32 *dest;
159
160 if (tsk == current)
161 flush_altivec_to_thread(tsk);
162
163 reg = (elf_vrreg_t *)vrregs;
164
165 /* copy the 32 vr registers */
166 memcpy(reg, &tsk->thread.vr[0], nregs * sizeof(*reg));
167 reg += nregs;
168 149
169 /* copy the vscr */ 150#ifdef CONFIG_SMP
170 memcpy(reg, &tsk->thread.vscr, sizeof(*reg)); 151 if (current->thread.regs && (current->thread.regs->msr & MSR_VSX))
171 reg++; 152 giveup_vsx(current);
153 else
154 giveup_vsx(NULL); /* just enable vsx for kernel - force */
155#else
156 giveup_vsx(last_task_used_vsx);
157#endif /* CONFIG_SMP */
158}
159EXPORT_SYMBOL(enable_kernel_vsx);
160#endif
172 161
173 /* vrsave is stored in the high 32bit slot of the final 128bits */ 162void giveup_vsx(struct task_struct *tsk)
174 memset(reg, 0, sizeof(*reg)); 163{
175 dest = (u32 *)reg; 164 giveup_fpu(tsk);
176 *dest = tsk->thread.vrsave; 165 giveup_altivec(tsk);
166 __giveup_vsx(tsk);
167}
177 168
178 return 1; 169void flush_vsx_to_thread(struct task_struct *tsk)
170{
171 if (tsk->thread.regs) {
172 preempt_disable();
173 if (tsk->thread.regs->msr & MSR_VSX) {
174#ifdef CONFIG_SMP
175 BUG_ON(tsk != current);
176#endif
177 giveup_vsx(tsk);
178 }
179 preempt_enable();
180 }
179} 181}
180#endif /* CONFIG_ALTIVEC */ 182#endif /* CONFIG_VSX */
181 183
182#ifdef CONFIG_SPE 184#ifdef CONFIG_SPE
183 185
@@ -209,14 +211,6 @@ void flush_spe_to_thread(struct task_struct *tsk)
209 preempt_enable(); 211 preempt_enable();
210 } 212 }
211} 213}
212
213int dump_spe(struct pt_regs *regs, elf_vrregset_t *evrregs)
214{
215 flush_spe_to_thread(current);
216 /* We copy u32 evr[32] + u64 acc + u32 spefscr -> 35 */
217 memcpy(evrregs, &current->thread.evr[0], sizeof(u32) * 35);
218 return 1;
219}
220#endif /* CONFIG_SPE */ 214#endif /* CONFIG_SPE */
221 215
222#ifndef CONFIG_SMP 216#ifndef CONFIG_SMP
@@ -233,6 +227,10 @@ void discard_lazy_cpu_state(void)
233 if (last_task_used_altivec == current) 227 if (last_task_used_altivec == current)
234 last_task_used_altivec = NULL; 228 last_task_used_altivec = NULL;
235#endif /* CONFIG_ALTIVEC */ 229#endif /* CONFIG_ALTIVEC */
230#ifdef CONFIG_VSX
231 if (last_task_used_vsx == current)
232 last_task_used_vsx = NULL;
233#endif /* CONFIG_VSX */
236#ifdef CONFIG_SPE 234#ifdef CONFIG_SPE
237 if (last_task_used_spe == current) 235 if (last_task_used_spe == current)
238 last_task_used_spe = NULL; 236 last_task_used_spe = NULL;
@@ -297,6 +295,11 @@ struct task_struct *__switch_to(struct task_struct *prev,
297 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC)) 295 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VEC))
298 giveup_altivec(prev); 296 giveup_altivec(prev);
299#endif /* CONFIG_ALTIVEC */ 297#endif /* CONFIG_ALTIVEC */
298#ifdef CONFIG_VSX
299 if (prev->thread.regs && (prev->thread.regs->msr & MSR_VSX))
300 /* VMX and FPU registers are already save here */
301 __giveup_vsx(prev);
302#endif /* CONFIG_VSX */
300#ifdef CONFIG_SPE 303#ifdef CONFIG_SPE
301 /* 304 /*
302 * If the previous thread used spe in the last quantum 305 * If the previous thread used spe in the last quantum
@@ -317,6 +320,10 @@ struct task_struct *__switch_to(struct task_struct *prev,
317 if (new->thread.regs && last_task_used_altivec == new) 320 if (new->thread.regs && last_task_used_altivec == new)
318 new->thread.regs->msr |= MSR_VEC; 321 new->thread.regs->msr |= MSR_VEC;
319#endif /* CONFIG_ALTIVEC */ 322#endif /* CONFIG_ALTIVEC */
323#ifdef CONFIG_VSX
324 if (new->thread.regs && last_task_used_vsx == new)
325 new->thread.regs->msr |= MSR_VSX;
326#endif /* CONFIG_VSX */
320#ifdef CONFIG_SPE 327#ifdef CONFIG_SPE
321 /* Avoid the trap. On smp this this never happens since 328 /* Avoid the trap. On smp this this never happens since
322 * we don't set last_task_used_spe 329 * we don't set last_task_used_spe
@@ -417,6 +424,8 @@ static struct regbit {
417 {MSR_EE, "EE"}, 424 {MSR_EE, "EE"},
418 {MSR_PR, "PR"}, 425 {MSR_PR, "PR"},
419 {MSR_FP, "FP"}, 426 {MSR_FP, "FP"},
427 {MSR_VEC, "VEC"},
428 {MSR_VSX, "VSX"},
420 {MSR_ME, "ME"}, 429 {MSR_ME, "ME"},
421 {MSR_IR, "IR"}, 430 {MSR_IR, "IR"},
422 {MSR_DR, "DR"}, 431 {MSR_DR, "DR"},
@@ -484,10 +493,8 @@ void show_regs(struct pt_regs * regs)
484 * Lookup NIP late so we have the best change of getting the 493 * Lookup NIP late so we have the best change of getting the
485 * above info out without failing 494 * above info out without failing
486 */ 495 */
487 printk("NIP ["REG"] ", regs->nip); 496 printk("NIP ["REG"] %pS\n", regs->nip, (void *)regs->nip);
488 print_symbol("%s\n", regs->nip); 497 printk("LR ["REG"] %pS\n", regs->link, (void *)regs->link);
489 printk("LR ["REG"] ", regs->link);
490 print_symbol("%s\n", regs->link);
491#endif 498#endif
492 show_stack(current, (unsigned long *) regs->gpr[1]); 499 show_stack(current, (unsigned long *) regs->gpr[1]);
493 if (!user_mode(regs)) 500 if (!user_mode(regs))
@@ -534,6 +541,7 @@ void prepare_to_copy(struct task_struct *tsk)
534{ 541{
535 flush_fp_to_thread(current); 542 flush_fp_to_thread(current);
536 flush_altivec_to_thread(current); 543 flush_altivec_to_thread(current);
544 flush_vsx_to_thread(current);
537 flush_spe_to_thread(current); 545 flush_spe_to_thread(current);
538} 546}
539 547
@@ -689,6 +697,9 @@ void start_thread(struct pt_regs *regs, unsigned long start, unsigned long sp)
689#endif 697#endif
690 698
691 discard_lazy_cpu_state(); 699 discard_lazy_cpu_state();
700#ifdef CONFIG_VSX
701 current->thread.used_vsr = 0;
702#endif
692 memset(current->thread.fpr, 0, sizeof(current->thread.fpr)); 703 memset(current->thread.fpr, 0, sizeof(current->thread.fpr));
693 current->thread.fpscr.val = 0; 704 current->thread.fpscr.val = 0;
694#ifdef CONFIG_ALTIVEC 705#ifdef CONFIG_ALTIVEC
@@ -971,8 +982,7 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
971 newsp = stack[0]; 982 newsp = stack[0];
972 ip = stack[STACK_FRAME_LR_SAVE]; 983 ip = stack[STACK_FRAME_LR_SAVE];
973 if (!firstframe || ip != lr) { 984 if (!firstframe || ip != lr) {
974 printk("["REG"] ["REG"] ", sp, ip); 985 printk("["REG"] ["REG"] %pS", sp, ip, (void *)ip);
975 print_symbol("%s", ip);
976 if (firstframe) 986 if (firstframe)
977 printk(" (unreliable)"); 987 printk(" (unreliable)");
978 printk("\n"); 988 printk("\n");
@@ -987,10 +997,9 @@ void show_stack(struct task_struct *tsk, unsigned long *stack)
987 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) { 997 && stack[STACK_FRAME_MARKER] == STACK_FRAME_REGS_MARKER) {
988 struct pt_regs *regs = (struct pt_regs *) 998 struct pt_regs *regs = (struct pt_regs *)
989 (sp + STACK_FRAME_OVERHEAD); 999 (sp + STACK_FRAME_OVERHEAD);
990 printk("--- Exception: %lx", regs->trap);
991 print_symbol(" at %s\n", regs->nip);
992 lr = regs->link; 1000 lr = regs->link;
993 print_symbol(" LR = %s\n", lr); 1001 printk("--- Exception: %lx at %pS\n LR = %pS\n",
1002 regs->trap, (void *)regs->nip, (void *)lr);
994 firstframe = 1; 1003 firstframe = 1;
995 } 1004 }
996 1005
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index 2aefe2a4129a..87d83c56b31e 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -609,6 +609,10 @@ static struct feature_property {
609 {"altivec", 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC}, 609 {"altivec", 0, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
610 {"ibm,vmx", 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC}, 610 {"ibm,vmx", 1, CPU_FTR_ALTIVEC, PPC_FEATURE_HAS_ALTIVEC},
611#endif /* CONFIG_ALTIVEC */ 611#endif /* CONFIG_ALTIVEC */
612#ifdef CONFIG_VSX
613 /* Yes, this _really_ is ibm,vmx == 2 to enable VSX */
614 {"ibm,vmx", 2, CPU_FTR_VSX, PPC_FEATURE_HAS_VSX},
615#endif /* CONFIG_VSX */
612#ifdef CONFIG_PPC64 616#ifdef CONFIG_PPC64
613 {"ibm,dfp", 1, 0, PPC_FEATURE_HAS_DFP}, 617 {"ibm,dfp", 1, 0, PPC_FEATURE_HAS_DFP},
614 {"ibm,purr", 1, CPU_FTR_PURR, 0}, 618 {"ibm,purr", 1, CPU_FTR_PURR, 0},
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 6d6df1e60325..1ea8c8d3ce89 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -620,6 +620,7 @@ static void __init early_cmdline_parse(void)
620#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */ 620#define OV1_PPC_2_03 0x10 /* set if we support PowerPC 2.03 */
621#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */ 621#define OV1_PPC_2_04 0x08 /* set if we support PowerPC 2.04 */
622#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */ 622#define OV1_PPC_2_05 0x04 /* set if we support PowerPC 2.05 */
623#define OV1_PPC_2_06 0x02 /* set if we support PowerPC 2.06 */
623 624
624/* Option vector 2: Open Firmware options supported */ 625/* Option vector 2: Open Firmware options supported */
625#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */ 626#define OV2_REAL_MODE 0x20 /* set if we want OF in real mode */
@@ -650,6 +651,8 @@ static void __init early_cmdline_parse(void)
650static unsigned char ibm_architecture_vec[] = { 651static unsigned char ibm_architecture_vec[] = {
651 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */ 652 W(0xfffe0000), W(0x003a0000), /* POWER5/POWER5+ */
652 W(0xffff0000), W(0x003e0000), /* POWER6 */ 653 W(0xffff0000), W(0x003e0000), /* POWER6 */
654 W(0xffff0000), W(0x003f0000), /* POWER7 */
655 W(0xffffffff), W(0x0f000003), /* all 2.06-compliant */
653 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */ 656 W(0xffffffff), W(0x0f000002), /* all 2.05-compliant */
654 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */ 657 W(0xfffffffe), W(0x0f000001), /* all 2.04-compliant and earlier */
655 5 - 1, /* 5 option vectors */ 658 5 - 1, /* 5 option vectors */
@@ -658,7 +661,7 @@ static unsigned char ibm_architecture_vec[] = {
658 3 - 2, /* length */ 661 3 - 2, /* length */
659 0, /* don't ignore, don't halt */ 662 0, /* don't ignore, don't halt */
660 OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 | 663 OV1_PPC_2_00 | OV1_PPC_2_01 | OV1_PPC_2_02 | OV1_PPC_2_03 |
661 OV1_PPC_2_04 | OV1_PPC_2_05, 664 OV1_PPC_2_04 | OV1_PPC_2_05 | OV1_PPC_2_06,
662 665
663 /* option vector 2: Open Firmware options supported */ 666 /* option vector 2: Open Firmware options supported */
664 34 - 2, /* length */ 667 34 - 2, /* length */
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 2a9fe97e4521..8feb93e7890c 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -215,29 +215,56 @@ static int fpr_get(struct task_struct *target, const struct user_regset *regset,
215 unsigned int pos, unsigned int count, 215 unsigned int pos, unsigned int count,
216 void *kbuf, void __user *ubuf) 216 void *kbuf, void __user *ubuf)
217{ 217{
218#ifdef CONFIG_VSX
219 double buf[33];
220 int i;
221#endif
218 flush_fp_to_thread(target); 222 flush_fp_to_thread(target);
219 223
224#ifdef CONFIG_VSX
225 /* copy to local buffer then write that out */
226 for (i = 0; i < 32 ; i++)
227 buf[i] = target->thread.TS_FPR(i);
228 memcpy(&buf[32], &target->thread.fpscr, sizeof(double));
229 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
230
231#else
220 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != 232 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
221 offsetof(struct thread_struct, fpr[32])); 233 offsetof(struct thread_struct, TS_FPR(32)));
222 234
223 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, 235 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
224 &target->thread.fpr, 0, -1); 236 &target->thread.fpr, 0, -1);
237#endif
225} 238}
226 239
227static int fpr_set(struct task_struct *target, const struct user_regset *regset, 240static int fpr_set(struct task_struct *target, const struct user_regset *regset,
228 unsigned int pos, unsigned int count, 241 unsigned int pos, unsigned int count,
229 const void *kbuf, const void __user *ubuf) 242 const void *kbuf, const void __user *ubuf)
230{ 243{
244#ifdef CONFIG_VSX
245 double buf[33];
246 int i;
247#endif
231 flush_fp_to_thread(target); 248 flush_fp_to_thread(target);
232 249
250#ifdef CONFIG_VSX
251 /* copy to local buffer then write that out */
252 i = user_regset_copyin(&pos, &count, &kbuf, &ubuf, buf, 0, -1);
253 if (i)
254 return i;
255 for (i = 0; i < 32 ; i++)
256 target->thread.TS_FPR(i) = buf[i];
257 memcpy(&target->thread.fpscr, &buf[32], sizeof(double));
258 return 0;
259#else
233 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) != 260 BUILD_BUG_ON(offsetof(struct thread_struct, fpscr) !=
234 offsetof(struct thread_struct, fpr[32])); 261 offsetof(struct thread_struct, TS_FPR(32)));
235 262
236 return user_regset_copyin(&pos, &count, &kbuf, &ubuf, 263 return user_regset_copyin(&pos, &count, &kbuf, &ubuf,
237 &target->thread.fpr, 0, -1); 264 &target->thread.fpr, 0, -1);
265#endif
238} 266}
239 267
240
241#ifdef CONFIG_ALTIVEC 268#ifdef CONFIG_ALTIVEC
242/* 269/*
243 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go. 270 * Get/set all the altivec registers vr0..vr31, vscr, vrsave, in one go.
@@ -323,6 +350,56 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
323} 350}
324#endif /* CONFIG_ALTIVEC */ 351#endif /* CONFIG_ALTIVEC */
325 352
353#ifdef CONFIG_VSX
354/*
355 * Currently to set and and get all the vsx state, you need to call
356 * the fp and VMX calls aswell. This only get/sets the lower 32
357 * 128bit VSX registers.
358 */
359
360static int vsr_active(struct task_struct *target,
361 const struct user_regset *regset)
362{
363 flush_vsx_to_thread(target);
364 return target->thread.used_vsr ? regset->n : 0;
365}
366
367static int vsr_get(struct task_struct *target, const struct user_regset *regset,
368 unsigned int pos, unsigned int count,
369 void *kbuf, void __user *ubuf)
370{
371 double buf[32];
372 int ret, i;
373
374 flush_vsx_to_thread(target);
375
376 for (i = 0; i < 32 ; i++)
377 buf[i] = current->thread.fpr[i][TS_VSRLOWOFFSET];
378 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
379 buf, 0, 32 * sizeof(double));
380
381 return ret;
382}
383
384static int vsr_set(struct task_struct *target, const struct user_regset *regset,
385 unsigned int pos, unsigned int count,
386 const void *kbuf, const void __user *ubuf)
387{
388 double buf[32];
389 int ret,i;
390
391 flush_vsx_to_thread(target);
392
393 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf,
394 buf, 0, 32 * sizeof(double));
395 for (i = 0; i < 32 ; i++)
396 current->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
397
398
399 return ret;
400}
401#endif /* CONFIG_VSX */
402
326#ifdef CONFIG_SPE 403#ifdef CONFIG_SPE
327 404
328/* 405/*
@@ -399,6 +476,9 @@ enum powerpc_regset {
399#ifdef CONFIG_ALTIVEC 476#ifdef CONFIG_ALTIVEC
400 REGSET_VMX, 477 REGSET_VMX,
401#endif 478#endif
479#ifdef CONFIG_VSX
480 REGSET_VSX,
481#endif
402#ifdef CONFIG_SPE 482#ifdef CONFIG_SPE
403 REGSET_SPE, 483 REGSET_SPE,
404#endif 484#endif
@@ -422,6 +502,13 @@ static const struct user_regset native_regsets[] = {
422 .active = vr_active, .get = vr_get, .set = vr_set 502 .active = vr_active, .get = vr_get, .set = vr_set
423 }, 503 },
424#endif 504#endif
505#ifdef CONFIG_VSX
506 [REGSET_VSX] = {
507 .core_note_type = NT_PPC_VSX, .n = 32,
508 .size = sizeof(double), .align = sizeof(double),
509 .active = vsr_active, .get = vsr_get, .set = vsr_set
510 },
511#endif
425#ifdef CONFIG_SPE 512#ifdef CONFIG_SPE
426 [REGSET_SPE] = { 513 [REGSET_SPE] = {
427 .n = 35, 514 .n = 35,
@@ -728,7 +815,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
728 tmp = ptrace_get_reg(child, (int) index); 815 tmp = ptrace_get_reg(child, (int) index);
729 } else { 816 } else {
730 flush_fp_to_thread(child); 817 flush_fp_to_thread(child);
731 tmp = ((unsigned long *)child->thread.fpr)[index - PT_FPR0]; 818 tmp = ((unsigned long *)child->thread.fpr)
819 [TS_FPRWIDTH * (index - PT_FPR0)];
732 } 820 }
733 ret = put_user(tmp,(unsigned long __user *) data); 821 ret = put_user(tmp,(unsigned long __user *) data);
734 break; 822 break;
@@ -755,7 +843,8 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
755 ret = ptrace_put_reg(child, index, data); 843 ret = ptrace_put_reg(child, index, data);
756 } else { 844 } else {
757 flush_fp_to_thread(child); 845 flush_fp_to_thread(child);
758 ((unsigned long *)child->thread.fpr)[index - PT_FPR0] = data; 846 ((unsigned long *)child->thread.fpr)
847 [TS_FPRWIDTH * (index - PT_FPR0)] = data;
759 ret = 0; 848 ret = 0;
760 } 849 }
761 break; 850 break;
@@ -820,6 +909,21 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
820 sizeof(u32)), 909 sizeof(u32)),
821 (const void __user *) data); 910 (const void __user *) data);
822#endif 911#endif
912#ifdef CONFIG_VSX
913 case PTRACE_GETVSRREGS:
914 return copy_regset_to_user(child, &user_ppc_native_view,
915 REGSET_VSX,
916 0, (32 * sizeof(vector128) +
917 sizeof(u32)),
918 (void __user *) data);
919
920 case PTRACE_SETVSRREGS:
921 return copy_regset_from_user(child, &user_ppc_native_view,
922 REGSET_VSX,
923 0, (32 * sizeof(vector128) +
924 sizeof(u32)),
925 (const void __user *) data);
926#endif
823#ifdef CONFIG_SPE 927#ifdef CONFIG_SPE
824 case PTRACE_GETEVRREGS: 928 case PTRACE_GETEVRREGS:
825 /* Get the child spe register state. */ 929 /* Get the child spe register state. */
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 4c1de6af4c09..67bf1a1e7e14 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -64,6 +64,11 @@ static long compat_ptrace_old(struct task_struct *child, long request,
64 return -EPERM; 64 return -EPERM;
65} 65}
66 66
67/* Macros to workout the correct index for the FPR in the thread struct */
68#define FPRNUMBER(i) (((i) - PT_FPR0) >> 1)
69#define FPRHALF(i) (((i) - PT_FPR0) & 1)
70#define FPRINDEX(i) TS_FPRWIDTH * FPRNUMBER(i) + FPRHALF(i)
71
67long compat_arch_ptrace(struct task_struct *child, compat_long_t request, 72long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
68 compat_ulong_t caddr, compat_ulong_t cdata) 73 compat_ulong_t caddr, compat_ulong_t cdata)
69{ 74{
@@ -122,7 +127,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
122 * to be an array of unsigned int (32 bits) - the 127 * to be an array of unsigned int (32 bits) - the
123 * index passed in is based on this assumption. 128 * index passed in is based on this assumption.
124 */ 129 */
125 tmp = ((unsigned int *)child->thread.fpr)[index - PT_FPR0]; 130 tmp = ((unsigned int *)child->thread.fpr)
131 [FPRINDEX(index)];
126 } 132 }
127 ret = put_user((unsigned int)tmp, (u32 __user *)data); 133 ret = put_user((unsigned int)tmp, (u32 __user *)data);
128 break; 134 break;
@@ -162,7 +168,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
162 CHECK_FULL_REGS(child->thread.regs); 168 CHECK_FULL_REGS(child->thread.regs);
163 if (numReg >= PT_FPR0) { 169 if (numReg >= PT_FPR0) {
164 flush_fp_to_thread(child); 170 flush_fp_to_thread(child);
165 tmp = ((unsigned long int *)child->thread.fpr)[numReg - PT_FPR0]; 171 tmp = ((unsigned long int *)child->thread.fpr)
172 [FPRINDEX(numReg)];
166 } else { /* register within PT_REGS struct */ 173 } else { /* register within PT_REGS struct */
167 tmp = ptrace_get_reg(child, numReg); 174 tmp = ptrace_get_reg(child, numReg);
168 } 175 }
@@ -217,7 +224,8 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
217 * to be an array of unsigned int (32 bits) - the 224 * to be an array of unsigned int (32 bits) - the
218 * index passed in is based on this assumption. 225 * index passed in is based on this assumption.
219 */ 226 */
220 ((unsigned int *)child->thread.fpr)[index - PT_FPR0] = data; 227 ((unsigned int *)child->thread.fpr)
228 [FPRINDEX(index)] = data;
221 ret = 0; 229 ret = 0;
222 } 230 }
223 break; 231 break;
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c
index f9c6abc84a94..1be9fe38bcb5 100644
--- a/arch/powerpc/kernel/rtas-proc.c
+++ b/arch/powerpc/kernel/rtas-proc.c
@@ -160,7 +160,7 @@ static int sensors_open(struct inode *inode, struct file *file)
160 return single_open(file, ppc_rtas_sensors_show, NULL); 160 return single_open(file, ppc_rtas_sensors_show, NULL);
161} 161}
162 162
163const struct file_operations ppc_rtas_sensors_operations = { 163static const struct file_operations ppc_rtas_sensors_operations = {
164 .open = sensors_open, 164 .open = sensors_open,
165 .read = seq_read, 165 .read = seq_read,
166 .llseek = seq_lseek, 166 .llseek = seq_lseek,
@@ -172,7 +172,7 @@ static int poweron_open(struct inode *inode, struct file *file)
172 return single_open(file, ppc_rtas_poweron_show, NULL); 172 return single_open(file, ppc_rtas_poweron_show, NULL);
173} 173}
174 174
175const struct file_operations ppc_rtas_poweron_operations = { 175static const struct file_operations ppc_rtas_poweron_operations = {
176 .open = poweron_open, 176 .open = poweron_open,
177 .read = seq_read, 177 .read = seq_read,
178 .llseek = seq_lseek, 178 .llseek = seq_lseek,
@@ -185,7 +185,7 @@ static int progress_open(struct inode *inode, struct file *file)
185 return single_open(file, ppc_rtas_progress_show, NULL); 185 return single_open(file, ppc_rtas_progress_show, NULL);
186} 186}
187 187
188const struct file_operations ppc_rtas_progress_operations = { 188static const struct file_operations ppc_rtas_progress_operations = {
189 .open = progress_open, 189 .open = progress_open,
190 .read = seq_read, 190 .read = seq_read,
191 .llseek = seq_lseek, 191 .llseek = seq_lseek,
@@ -198,7 +198,7 @@ static int clock_open(struct inode *inode, struct file *file)
198 return single_open(file, ppc_rtas_clock_show, NULL); 198 return single_open(file, ppc_rtas_clock_show, NULL);
199} 199}
200 200
201const struct file_operations ppc_rtas_clock_operations = { 201static const struct file_operations ppc_rtas_clock_operations = {
202 .open = clock_open, 202 .open = clock_open,
203 .read = seq_read, 203 .read = seq_read,
204 .llseek = seq_lseek, 204 .llseek = seq_lseek,
@@ -211,7 +211,7 @@ static int tone_freq_open(struct inode *inode, struct file *file)
211 return single_open(file, ppc_rtas_tone_freq_show, NULL); 211 return single_open(file, ppc_rtas_tone_freq_show, NULL);
212} 212}
213 213
214const struct file_operations ppc_rtas_tone_freq_operations = { 214static const struct file_operations ppc_rtas_tone_freq_operations = {
215 .open = tone_freq_open, 215 .open = tone_freq_open,
216 .read = seq_read, 216 .read = seq_read,
217 .llseek = seq_lseek, 217 .llseek = seq_lseek,
@@ -224,7 +224,7 @@ static int tone_volume_open(struct inode *inode, struct file *file)
224 return single_open(file, ppc_rtas_tone_volume_show, NULL); 224 return single_open(file, ppc_rtas_tone_volume_show, NULL);
225} 225}
226 226
227const struct file_operations ppc_rtas_tone_volume_operations = { 227static const struct file_operations ppc_rtas_tone_volume_operations = {
228 .open = tone_volume_open, 228 .open = tone_volume_open,
229 .read = seq_read, 229 .read = seq_read,
230 .llseek = seq_lseek, 230 .llseek = seq_lseek,
@@ -237,7 +237,7 @@ static int rmo_buf_open(struct inode *inode, struct file *file)
237 return single_open(file, ppc_rtas_rmo_buf_show, NULL); 237 return single_open(file, ppc_rtas_rmo_buf_show, NULL);
238} 238}
239 239
240const struct file_operations ppc_rtas_rmo_buf_ops = { 240static const struct file_operations ppc_rtas_rmo_buf_ops = {
241 .open = rmo_buf_open, 241 .open = rmo_buf_open,
242 .read = seq_read, 242 .read = seq_read,
243 .llseek = seq_lseek, 243 .llseek = seq_lseek,
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 647f3e8677dc..c680f1bbd387 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -340,8 +340,8 @@ int rtas_get_error_log_max(void)
340EXPORT_SYMBOL(rtas_get_error_log_max); 340EXPORT_SYMBOL(rtas_get_error_log_max);
341 341
342 342
343char rtas_err_buf[RTAS_ERROR_LOG_MAX]; 343static char rtas_err_buf[RTAS_ERROR_LOG_MAX];
344int rtas_last_error_token; 344static int rtas_last_error_token;
345 345
346/** Return a copy of the detailed error text associated with the 346/** Return a copy of the detailed error text associated with the
347 * most recent failed call to rtas. Because the error text 347 * most recent failed call to rtas. Because the error text
@@ -484,7 +484,7 @@ unsigned int rtas_busy_delay(int status)
484} 484}
485EXPORT_SYMBOL(rtas_busy_delay); 485EXPORT_SYMBOL(rtas_busy_delay);
486 486
487int rtas_error_rc(int rtas_rc) 487static int rtas_error_rc(int rtas_rc)
488{ 488{
489 int rc; 489 int rc;
490 490
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 0a5e22b22729..09ded5c424a9 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -731,7 +731,7 @@ static const struct file_operations validate_flash_operations = {
731 .release = validate_flash_release, 731 .release = validate_flash_release,
732}; 732};
733 733
734int __init rtas_flash_init(void) 734static int __init rtas_flash_init(void)
735{ 735{
736 int rc; 736 int rc;
737 737
@@ -817,7 +817,7 @@ cleanup:
817 return rc; 817 return rc;
818} 818}
819 819
820void __exit rtas_flash_cleanup(void) 820static void __exit rtas_flash_cleanup(void)
821{ 821{
822 rtas_flash_term_hook = NULL; 822 rtas_flash_term_hook = NULL;
823 823
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c
index 3ab88a9dc70d..589a2797eac2 100644
--- a/arch/powerpc/kernel/rtas_pci.c
+++ b/arch/powerpc/kernel/rtas_pci.c
@@ -155,12 +155,12 @@ static int rtas_pci_write_config(struct pci_bus *bus,
155 return PCIBIOS_DEVICE_NOT_FOUND; 155 return PCIBIOS_DEVICE_NOT_FOUND;
156} 156}
157 157
158struct pci_ops rtas_pci_ops = { 158static struct pci_ops rtas_pci_ops = {
159 .read = rtas_pci_read_config, 159 .read = rtas_pci_read_config,
160 .write = rtas_pci_write_config, 160 .write = rtas_pci_write_config,
161}; 161};
162 162
163int is_python(struct device_node *dev) 163static int is_python(struct device_node *dev)
164{ 164{
165 const char *model = of_get_property(dev, "model", NULL); 165 const char *model = of_get_property(dev, "model", NULL);
166 166
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index db540eab09f4..61a3f4132087 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -500,6 +500,7 @@ void __init smp_setup_cpu_sibling_map(void)
500} 500}
501#endif /* CONFIG_SMP */ 501#endif /* CONFIG_SMP */
502 502
503#ifdef CONFIG_PCSPKR_PLATFORM
503static __init int add_pcspkr(void) 504static __init int add_pcspkr(void)
504{ 505{
505 struct device_node *np; 506 struct device_node *np;
@@ -522,6 +523,7 @@ static __init int add_pcspkr(void)
522 return ret; 523 return ret;
523} 524}
524device_initcall(add_pcspkr); 525device_initcall(add_pcspkr);
526#endif /* CONFIG_PCSPKR_PLATFORM */
525 527
526void probe_machine(void) 528void probe_machine(void)
527{ 529{
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 19e8fcb9cea8..4efebe88e64a 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -101,6 +101,10 @@ notrace unsigned long __init early_init(unsigned long dt_ptr)
101 PTRRELOC(&__start___ftr_fixup), 101 PTRRELOC(&__start___ftr_fixup),
102 PTRRELOC(&__stop___ftr_fixup)); 102 PTRRELOC(&__stop___ftr_fixup));
103 103
104 do_lwsync_fixups(spec->cpu_features,
105 PTRRELOC(&__start___lwsync_fixup),
106 PTRRELOC(&__stop___lwsync_fixup));
107
104 return KERNELBASE + offset; 108 return KERNELBASE + offset;
105} 109}
106 110
@@ -127,6 +131,11 @@ notrace void __init machine_init(unsigned long dt_ptr, unsigned long phys)
127 ppc_md.power_save = ppc6xx_idle; 131 ppc_md.power_save = ppc6xx_idle;
128#endif 132#endif
129 133
134#ifdef CONFIG_E500
135 if (cpu_has_feature(CPU_FTR_CAN_DOZE) ||
136 cpu_has_feature(CPU_FTR_CAN_NAP))
137 ppc_md.power_save = e500_idle;
138#endif
130 if (ppc_md.progress) 139 if (ppc_md.progress)
131 ppc_md.progress("id mach(): done", 0x200); 140 ppc_md.progress("id mach(): done", 0x200);
132} 141}
@@ -248,6 +257,28 @@ static void __init irqstack_early_init(void)
248#define irqstack_early_init() 257#define irqstack_early_init()
249#endif 258#endif
250 259
260#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
261static void __init exc_lvl_early_init(void)
262{
263 unsigned int i;
264
265 /* interrupt stacks must be in lowmem, we get that for free on ppc32
266 * as the lmb is limited to lowmem by LMB_REAL_LIMIT */
267 for_each_possible_cpu(i) {
268 critirq_ctx[i] = (struct thread_info *)
269 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
270#ifdef CONFIG_BOOKE
271 dbgirq_ctx[i] = (struct thread_info *)
272 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
273 mcheckirq_ctx[i] = (struct thread_info *)
274 __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE));
275#endif
276 }
277}
278#else
279#define exc_lvl_early_init()
280#endif
281
251/* Warning, IO base is not yet inited */ 282/* Warning, IO base is not yet inited */
252void __init setup_arch(char **cmdline_p) 283void __init setup_arch(char **cmdline_p)
253{ 284{
@@ -305,6 +336,8 @@ void __init setup_arch(char **cmdline_p)
305 init_mm.end_data = (unsigned long) _edata; 336 init_mm.end_data = (unsigned long) _edata;
306 init_mm.brk = klimit; 337 init_mm.brk = klimit;
307 338
339 exc_lvl_early_init();
340
308 irqstack_early_init(); 341 irqstack_early_init();
309 342
310 /* set up the bootmem stuff with available memory */ 343 /* set up the bootmem stuff with available memory */
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index 098fd96a394a..04d8de9f0fc6 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -363,6 +363,8 @@ void __init setup_system(void)
363 &__start___ftr_fixup, &__stop___ftr_fixup); 363 &__start___ftr_fixup, &__stop___ftr_fixup);
364 do_feature_fixups(powerpc_firmware_features, 364 do_feature_fixups(powerpc_firmware_features,
365 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup); 365 &__start___fw_ftr_fixup, &__stop___fw_ftr_fixup);
366 do_lwsync_fixups(cur_cpu_spec->cpu_features,
367 &__start___lwsync_fixup, &__stop___lwsync_fixup);
366 368
367 /* 369 /*
368 * Unflatten the device-tree passed by prom_init or kexec 370 * Unflatten the device-tree passed by prom_init or kexec
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c
index a65a44fbe523..ad55488939c3 100644
--- a/arch/powerpc/kernel/signal.c
+++ b/arch/powerpc/kernel/signal.c
@@ -120,7 +120,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
120 int ret; 120 int ret;
121 int is32 = is_32bit_task(); 121 int is32 = is_32bit_task();
122 122
123 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 123 if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK)
124 oldset = &current->saved_sigmask; 124 oldset = &current->saved_sigmask;
125 else if (!oldset) 125 else if (!oldset)
126 oldset = &current->blocked; 126 oldset = &current->blocked;
@@ -131,9 +131,10 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
131 check_syscall_restart(regs, &ka, signr > 0); 131 check_syscall_restart(regs, &ka, signr > 0);
132 132
133 if (signr <= 0) { 133 if (signr <= 0) {
134 struct thread_info *ti = current_thread_info();
134 /* No signal to deliver -- put the saved sigmask back */ 135 /* No signal to deliver -- put the saved sigmask back */
135 if (test_thread_flag(TIF_RESTORE_SIGMASK)) { 136 if (ti->local_flags & _TLF_RESTORE_SIGMASK) {
136 clear_thread_flag(TIF_RESTORE_SIGMASK); 137 ti->local_flags &= ~_TLF_RESTORE_SIGMASK;
137 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL); 138 sigprocmask(SIG_SETMASK, &current->saved_sigmask, NULL);
138 } 139 }
139 return 0; /* no signals delivered */ 140 return 0; /* no signals delivered */
@@ -169,10 +170,9 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs)
169 170
170 /* 171 /*
171 * A signal was successfully delivered; the saved sigmask is in 172 * A signal was successfully delivered; the saved sigmask is in
172 * its frame, and we can clear the TIF_RESTORE_SIGMASK flag. 173 * its frame, and we can clear the TLF_RESTORE_SIGMASK flag.
173 */ 174 */
174 if (test_thread_flag(TIF_RESTORE_SIGMASK)) 175 current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK;
175 clear_thread_flag(TIF_RESTORE_SIGMASK);
176 } 176 }
177 177
178 return ret; 178 return ret;
diff --git a/arch/powerpc/kernel/signal.h b/arch/powerpc/kernel/signal.h
index 77efb3d5465a..28f4b9f5fe5e 100644
--- a/arch/powerpc/kernel/signal.h
+++ b/arch/powerpc/kernel/signal.h
@@ -24,6 +24,16 @@ extern int handle_rt_signal32(unsigned long sig, struct k_sigaction *ka,
24 siginfo_t *info, sigset_t *oldset, 24 siginfo_t *info, sigset_t *oldset,
25 struct pt_regs *regs); 25 struct pt_regs *regs);
26 26
27extern unsigned long copy_fpr_to_user(void __user *to,
28 struct task_struct *task);
29extern unsigned long copy_fpr_from_user(struct task_struct *task,
30 void __user *from);
31#ifdef CONFIG_VSX
32extern unsigned long copy_vsx_to_user(void __user *to,
33 struct task_struct *task);
34extern unsigned long copy_vsx_from_user(struct task_struct *task,
35 void __user *from);
36#endif
27 37
28#ifdef CONFIG_PPC64 38#ifdef CONFIG_PPC64
29 39
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index ad6943468ee9..3e80aa32b8b0 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -68,6 +68,13 @@
68#define ucontext ucontext32 68#define ucontext ucontext32
69 69
70/* 70/*
71 * Userspace code may pass a ucontext which doesn't include VSX added
72 * at the end. We need to check for this case.
73 */
74#define UCONTEXTSIZEWITHOUTVSX \
75 (sizeof(struct ucontext) - sizeof(elf_vsrreghalf_t32))
76
77/*
71 * Returning 0 means we return to userspace via 78 * Returning 0 means we return to userspace via
72 * ret_from_except and thus restore all user 79 * ret_from_except and thus restore all user
73 * registers from *regs. This is what we need 80 * registers from *regs. This is what we need
@@ -243,7 +250,7 @@ long sys_sigsuspend(old_sigset_t mask)
243 250
244 current->state = TASK_INTERRUPTIBLE; 251 current->state = TASK_INTERRUPTIBLE;
245 schedule(); 252 schedule();
246 set_thread_flag(TIF_RESTORE_SIGMASK); 253 set_restore_sigmask();
247 return -ERESTARTNOHAND; 254 return -ERESTARTNOHAND;
248} 255}
249 256
@@ -328,6 +335,75 @@ struct rt_sigframe {
328 int abigap[56]; 335 int abigap[56];
329}; 336};
330 337
338#ifdef CONFIG_VSX
339unsigned long copy_fpr_to_user(void __user *to,
340 struct task_struct *task)
341{
342 double buf[ELF_NFPREG];
343 int i;
344
345 /* save FPR copy to local buffer then write to the thread_struct */
346 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
347 buf[i] = task->thread.TS_FPR(i);
348 memcpy(&buf[i], &task->thread.fpscr, sizeof(double));
349 return __copy_to_user(to, buf, ELF_NFPREG * sizeof(double));
350}
351
352unsigned long copy_fpr_from_user(struct task_struct *task,
353 void __user *from)
354{
355 double buf[ELF_NFPREG];
356 int i;
357
358 if (__copy_from_user(buf, from, ELF_NFPREG * sizeof(double)))
359 return 1;
360 for (i = 0; i < (ELF_NFPREG - 1) ; i++)
361 task->thread.TS_FPR(i) = buf[i];
362 memcpy(&task->thread.fpscr, &buf[i], sizeof(double));
363
364 return 0;
365}
366
367unsigned long copy_vsx_to_user(void __user *to,
368 struct task_struct *task)
369{
370 double buf[ELF_NVSRHALFREG];
371 int i;
372
373 /* save FPR copy to local buffer then write to the thread_struct */
374 for (i = 0; i < ELF_NVSRHALFREG; i++)
375 buf[i] = task->thread.fpr[i][TS_VSRLOWOFFSET];
376 return __copy_to_user(to, buf, ELF_NVSRHALFREG * sizeof(double));
377}
378
379unsigned long copy_vsx_from_user(struct task_struct *task,
380 void __user *from)
381{
382 double buf[ELF_NVSRHALFREG];
383 int i;
384
385 if (__copy_from_user(buf, from, ELF_NVSRHALFREG * sizeof(double)))
386 return 1;
387 for (i = 0; i < ELF_NVSRHALFREG ; i++)
388 task->thread.fpr[i][TS_VSRLOWOFFSET] = buf[i];
389 return 0;
390}
391#else
392inline unsigned long copy_fpr_to_user(void __user *to,
393 struct task_struct *task)
394{
395 return __copy_to_user(to, task->thread.fpr,
396 ELF_NFPREG * sizeof(double));
397}
398
399inline unsigned long copy_fpr_from_user(struct task_struct *task,
400 void __user *from)
401{
402 return __copy_from_user(task->thread.fpr, from,
403 ELF_NFPREG * sizeof(double));
404}
405#endif
406
331/* 407/*
332 * Save the current user registers on the user stack. 408 * Save the current user registers on the user stack.
333 * We only save the altivec/spe registers if the process has used 409 * We only save the altivec/spe registers if the process has used
@@ -336,13 +412,13 @@ struct rt_sigframe {
336static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame, 412static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
337 int sigret) 413 int sigret)
338{ 414{
415 unsigned long msr = regs->msr;
416
339 /* Make sure floating point registers are stored in regs */ 417 /* Make sure floating point registers are stored in regs */
340 flush_fp_to_thread(current); 418 flush_fp_to_thread(current);
341 419
342 /* save general and floating-point registers */ 420 /* save general registers */
343 if (save_general_regs(regs, frame) || 421 if (save_general_regs(regs, frame))
344 __copy_to_user(&frame->mc_fregs, current->thread.fpr,
345 ELF_NFPREG * sizeof(double)))
346 return 1; 422 return 1;
347 423
348#ifdef CONFIG_ALTIVEC 424#ifdef CONFIG_ALTIVEC
@@ -354,8 +430,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
354 return 1; 430 return 1;
355 /* set MSR_VEC in the saved MSR value to indicate that 431 /* set MSR_VEC in the saved MSR value to indicate that
356 frame->mc_vregs contains valid data */ 432 frame->mc_vregs contains valid data */
357 if (__put_user(regs->msr | MSR_VEC, &frame->mc_gregs[PT_MSR])) 433 msr |= MSR_VEC;
358 return 1;
359 } 434 }
360 /* else assert((regs->msr & MSR_VEC) == 0) */ 435 /* else assert((regs->msr & MSR_VEC) == 0) */
361 436
@@ -367,7 +442,22 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
367 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32])) 442 if (__put_user(current->thread.vrsave, (u32 __user *)&frame->mc_vregs[32]))
368 return 1; 443 return 1;
369#endif /* CONFIG_ALTIVEC */ 444#endif /* CONFIG_ALTIVEC */
370 445 if (copy_fpr_to_user(&frame->mc_fregs, current))
446 return 1;
447#ifdef CONFIG_VSX
448 /*
449 * Copy VSR 0-31 upper half from thread_struct to local
450 * buffer, then write that to userspace. Also set MSR_VSX in
451 * the saved MSR value to indicate that frame->mc_vregs
452 * contains valid data
453 */
454 if (current->thread.used_vsr) {
455 __giveup_vsx(current);
456 if (copy_vsx_to_user(&frame->mc_vsregs, current))
457 return 1;
458 msr |= MSR_VSX;
459 }
460#endif /* CONFIG_VSX */
371#ifdef CONFIG_SPE 461#ifdef CONFIG_SPE
372 /* save spe registers */ 462 /* save spe registers */
373 if (current->thread.used_spe) { 463 if (current->thread.used_spe) {
@@ -377,8 +467,7 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
377 return 1; 467 return 1;
378 /* set MSR_SPE in the saved MSR value to indicate that 468 /* set MSR_SPE in the saved MSR value to indicate that
379 frame->mc_vregs contains valid data */ 469 frame->mc_vregs contains valid data */
380 if (__put_user(regs->msr | MSR_SPE, &frame->mc_gregs[PT_MSR])) 470 msr |= MSR_SPE;
381 return 1;
382 } 471 }
383 /* else assert((regs->msr & MSR_SPE) == 0) */ 472 /* else assert((regs->msr & MSR_SPE) == 0) */
384 473
@@ -387,6 +476,8 @@ static int save_user_regs(struct pt_regs *regs, struct mcontext __user *frame,
387 return 1; 476 return 1;
388#endif /* CONFIG_SPE */ 477#endif /* CONFIG_SPE */
389 478
479 if (__put_user(msr, &frame->mc_gregs[PT_MSR]))
480 return 1;
390 if (sigret) { 481 if (sigret) {
391 /* Set up the sigreturn trampoline: li r0,sigret; sc */ 482 /* Set up the sigreturn trampoline: li r0,sigret; sc */
392 if (__put_user(0x38000000UL + sigret, &frame->tramp[0]) 483 if (__put_user(0x38000000UL + sigret, &frame->tramp[0])
@@ -409,6 +500,9 @@ static long restore_user_regs(struct pt_regs *regs,
409 long err; 500 long err;
410 unsigned int save_r2 = 0; 501 unsigned int save_r2 = 0;
411 unsigned long msr; 502 unsigned long msr;
503#ifdef CONFIG_VSX
504 int i;
505#endif
412 506
413 /* 507 /*
414 * restore general registers but not including MSR or SOFTE. Also 508 * restore general registers but not including MSR or SOFTE. Also
@@ -436,16 +530,11 @@ static long restore_user_regs(struct pt_regs *regs,
436 */ 530 */
437 discard_lazy_cpu_state(); 531 discard_lazy_cpu_state();
438 532
439 /* force the process to reload the FP registers from
440 current->thread when it next does FP instructions */
441 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
442 if (__copy_from_user(current->thread.fpr, &sr->mc_fregs,
443 sizeof(sr->mc_fregs)))
444 return 1;
445
446#ifdef CONFIG_ALTIVEC 533#ifdef CONFIG_ALTIVEC
447 /* force the process to reload the altivec registers from 534 /*
448 current->thread when it next does altivec instructions */ 535 * Force the process to reload the altivec registers from
536 * current->thread when it next does altivec instructions
537 */
449 regs->msr &= ~MSR_VEC; 538 regs->msr &= ~MSR_VEC;
450 if (msr & MSR_VEC) { 539 if (msr & MSR_VEC) {
451 /* restore altivec registers from the stack */ 540 /* restore altivec registers from the stack */
@@ -459,6 +548,31 @@ static long restore_user_regs(struct pt_regs *regs,
459 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32])) 548 if (__get_user(current->thread.vrsave, (u32 __user *)&sr->mc_vregs[32]))
460 return 1; 549 return 1;
461#endif /* CONFIG_ALTIVEC */ 550#endif /* CONFIG_ALTIVEC */
551 if (copy_fpr_from_user(current, &sr->mc_fregs))
552 return 1;
553
554#ifdef CONFIG_VSX
555 /*
556 * Force the process to reload the VSX registers from
557 * current->thread when it next does VSX instruction.
558 */
559 regs->msr &= ~MSR_VSX;
560 if (msr & MSR_VSX) {
561 /*
562 * Restore altivec registers from the stack to a local
563 * buffer, then write this out to the thread_struct
564 */
565 if (copy_vsx_from_user(current, &sr->mc_vsregs))
566 return 1;
567 } else if (current->thread.used_vsr)
568 for (i = 0; i < 32 ; i++)
569 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
570#endif /* CONFIG_VSX */
571 /*
572 * force the process to reload the FP registers from
573 * current->thread when it next does FP instructions
574 */
575 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1);
462 576
463#ifdef CONFIG_SPE 577#ifdef CONFIG_SPE
464 /* force the process to reload the spe registers from 578 /* force the process to reload the spe registers from
@@ -823,12 +937,42 @@ long sys_swapcontext(struct ucontext __user *old_ctx,
823{ 937{
824 unsigned char tmp; 938 unsigned char tmp;
825 939
940#ifdef CONFIG_PPC64
941 unsigned long new_msr = 0;
942
943 if (new_ctx &&
944 __get_user(new_msr, &new_ctx->uc_mcontext.mc_gregs[PT_MSR]))
945 return -EFAULT;
946 /*
947 * Check that the context is not smaller than the original
948 * size (with VMX but without VSX)
949 */
950 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
951 return -EINVAL;
952 /*
953 * If the new context state sets the MSR VSX bits but
954 * it doesn't provide VSX state.
955 */
956 if ((ctx_size < sizeof(struct ucontext)) &&
957 (new_msr & MSR_VSX))
958 return -EINVAL;
959#ifdef CONFIG_VSX
960 /*
961 * If userspace doesn't provide enough room for VSX data,
962 * but current thread has used VSX, we don't have anywhere
963 * to store the full context back into.
964 */
965 if ((ctx_size < sizeof(struct ucontext)) &&
966 (current->thread.used_vsr && old_ctx))
967 return -EINVAL;
968#endif
969#else
826 /* Context size is for future use. Right now, we only make sure 970 /* Context size is for future use. Right now, we only make sure
827 * we are passed something we understand 971 * we are passed something we understand
828 */ 972 */
829 if (ctx_size < sizeof(struct ucontext)) 973 if (ctx_size < sizeof(struct ucontext))
830 return -EINVAL; 974 return -EINVAL;
831 975#endif
832 if (old_ctx != NULL) { 976 if (old_ctx != NULL) {
833 struct mcontext __user *mctx; 977 struct mcontext __user *mctx;
834 978
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index da7c058e3731..65ad925c3a8f 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -112,11 +112,29 @@ static long setup_sigcontext(struct sigcontext __user *sc, struct pt_regs *regs,
112#else /* CONFIG_ALTIVEC */ 112#else /* CONFIG_ALTIVEC */
113 err |= __put_user(0, &sc->v_regs); 113 err |= __put_user(0, &sc->v_regs);
114#endif /* CONFIG_ALTIVEC */ 114#endif /* CONFIG_ALTIVEC */
115 flush_fp_to_thread(current);
116 /* copy fpr regs and fpscr */
117 err |= copy_fpr_to_user(&sc->fp_regs, current);
118#ifdef CONFIG_VSX
119 /*
120 * Copy VSX low doubleword to local buffer for formatting,
121 * then out to userspace. Update v_regs to point after the
122 * VMX data.
123 */
124 if (current->thread.used_vsr) {
125 __giveup_vsx(current);
126 v_regs += ELF_NVRREG;
127 err |= copy_vsx_to_user(v_regs, current);
128 /* set MSR_VSX in the MSR value in the frame to
129 * indicate that sc->vs_reg) contains valid data.
130 */
131 msr |= MSR_VSX;
132 }
133#endif /* CONFIG_VSX */
115 err |= __put_user(&sc->gp_regs, &sc->regs); 134 err |= __put_user(&sc->gp_regs, &sc->regs);
116 WARN_ON(!FULL_REGS(regs)); 135 WARN_ON(!FULL_REGS(regs));
117 err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE); 136 err |= __copy_to_user(&sc->gp_regs, regs, GP_REGS_SIZE);
118 err |= __put_user(msr, &sc->gp_regs[PT_MSR]); 137 err |= __put_user(msr, &sc->gp_regs[PT_MSR]);
119 err |= __copy_to_user(&sc->fp_regs, &current->thread.fpr, FP_REGS_SIZE);
120 err |= __put_user(signr, &sc->signal); 138 err |= __put_user(signr, &sc->signal);
121 err |= __put_user(handler, &sc->handler); 139 err |= __put_user(handler, &sc->handler);
122 if (set != NULL) 140 if (set != NULL)
@@ -137,29 +155,32 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
137#endif 155#endif
138 unsigned long err = 0; 156 unsigned long err = 0;
139 unsigned long save_r13 = 0; 157 unsigned long save_r13 = 0;
140 elf_greg_t *gregs = (elf_greg_t *)regs;
141 unsigned long msr; 158 unsigned long msr;
159#ifdef CONFIG_VSX
142 int i; 160 int i;
161#endif
143 162
144 /* If this is not a signal return, we preserve the TLS in r13 */ 163 /* If this is not a signal return, we preserve the TLS in r13 */
145 if (!sig) 164 if (!sig)
146 save_r13 = regs->gpr[13]; 165 save_r13 = regs->gpr[13];
147 166
148 /* copy everything before MSR */ 167 /* copy the GPRs */
149 err |= __copy_from_user(regs, &sc->gp_regs, 168 err |= __copy_from_user(regs->gpr, sc->gp_regs, sizeof(regs->gpr));
150 PT_MSR*sizeof(unsigned long)); 169 err |= __get_user(regs->nip, &sc->gp_regs[PT_NIP]);
151
152 /* get MSR separately, transfer the LE bit if doing signal return */ 170 /* get MSR separately, transfer the LE bit if doing signal return */
153 err |= __get_user(msr, &sc->gp_regs[PT_MSR]); 171 err |= __get_user(msr, &sc->gp_regs[PT_MSR]);
154 if (sig) 172 if (sig)
155 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE); 173 regs->msr = (regs->msr & ~MSR_LE) | (msr & MSR_LE);
156 174 err |= __get_user(regs->orig_gpr3, &sc->gp_regs[PT_ORIG_R3]);
175 err |= __get_user(regs->ctr, &sc->gp_regs[PT_CTR]);
176 err |= __get_user(regs->link, &sc->gp_regs[PT_LNK]);
177 err |= __get_user(regs->xer, &sc->gp_regs[PT_XER]);
178 err |= __get_user(regs->ccr, &sc->gp_regs[PT_CCR]);
157 /* skip SOFTE */ 179 /* skip SOFTE */
158 for (i = PT_MSR+1; i <= PT_RESULT; i++) { 180 err |= __get_user(regs->trap, &sc->gp_regs[PT_TRAP]);
159 if (i == PT_SOFTE) 181 err |= __get_user(regs->dar, &sc->gp_regs[PT_DAR]);
160 continue; 182 err |= __get_user(regs->dsisr, &sc->gp_regs[PT_DSISR]);
161 err |= __get_user(gregs[i], &sc->gp_regs[i]); 183 err |= __get_user(regs->result, &sc->gp_regs[PT_RESULT]);
162 }
163 184
164 if (!sig) 185 if (!sig)
165 regs->gpr[13] = save_r13; 186 regs->gpr[13] = save_r13;
@@ -180,9 +201,7 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
180 * This has to be done before copying stuff into current->thread.fpr/vr 201 * This has to be done before copying stuff into current->thread.fpr/vr
181 * for the reasons explained in the previous comment. 202 * for the reasons explained in the previous comment.
182 */ 203 */
183 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC); 204 regs->msr &= ~(MSR_FP | MSR_FE0 | MSR_FE1 | MSR_VEC | MSR_VSX);
184
185 err |= __copy_from_user(&current->thread.fpr, &sc->fp_regs, FP_REGS_SIZE);
186 205
187#ifdef CONFIG_ALTIVEC 206#ifdef CONFIG_ALTIVEC
188 err |= __get_user(v_regs, &sc->v_regs); 207 err |= __get_user(v_regs, &sc->v_regs);
@@ -202,7 +221,23 @@ static long restore_sigcontext(struct pt_regs *regs, sigset_t *set, int sig,
202 else 221 else
203 current->thread.vrsave = 0; 222 current->thread.vrsave = 0;
204#endif /* CONFIG_ALTIVEC */ 223#endif /* CONFIG_ALTIVEC */
224 /* restore floating point */
225 err |= copy_fpr_from_user(current, &sc->fp_regs);
226#ifdef CONFIG_VSX
227 /*
228 * Get additional VSX data. Update v_regs to point after the
229 * VMX data. Copy VSX low doubleword from userspace to local
230 * buffer for formatting, then into the taskstruct.
231 */
232 v_regs += ELF_NVRREG;
233 if ((msr & MSR_VSX) != 0)
234 err |= copy_vsx_from_user(current, v_regs);
235 else
236 for (i = 0; i < 32 ; i++)
237 current->thread.fpr[i][TS_VSRLOWOFFSET] = 0;
205 238
239#else
240#endif
206 return err; 241 return err;
207} 242}
208 243
@@ -233,6 +268,13 @@ static long setup_trampoline(unsigned int syscall, unsigned int __user *tramp)
233} 268}
234 269
235/* 270/*
271 * Userspace code may pass a ucontext which doesn't include VSX added
272 * at the end. We need to check for this case.
273 */
274#define UCONTEXTSIZEWITHOUTVSX \
275 (sizeof(struct ucontext) - 32*sizeof(long))
276
277/*
236 * Handle {get,set,swap}_context operations 278 * Handle {get,set,swap}_context operations
237 */ 279 */
238int sys_swapcontext(struct ucontext __user *old_ctx, 280int sys_swapcontext(struct ucontext __user *old_ctx,
@@ -241,13 +283,34 @@ int sys_swapcontext(struct ucontext __user *old_ctx,
241{ 283{
242 unsigned char tmp; 284 unsigned char tmp;
243 sigset_t set; 285 sigset_t set;
286 unsigned long new_msr = 0;
244 287
245 /* Context size is for future use. Right now, we only make sure 288 if (new_ctx &&
246 * we are passed something we understand 289 __get_user(new_msr, &new_ctx->uc_mcontext.gp_regs[PT_MSR]))
290 return -EFAULT;
291 /*
292 * Check that the context is not smaller than the original
293 * size (with VMX but without VSX)
247 */ 294 */
248 if (ctx_size < sizeof(struct ucontext)) 295 if (ctx_size < UCONTEXTSIZEWITHOUTVSX)
249 return -EINVAL; 296 return -EINVAL;
250 297 /*
298 * If the new context state sets the MSR VSX bits but
299 * it doesn't provide VSX state.
300 */
301 if ((ctx_size < sizeof(struct ucontext)) &&
302 (new_msr & MSR_VSX))
303 return -EINVAL;
304#ifdef CONFIG_VSX
305 /*
306 * If userspace doesn't provide enough room for VSX data,
307 * but current thread has used VSX, we don't have anywhere
308 * to store the full context back into.
309 */
310 if ((ctx_size < sizeof(struct ucontext)) &&
311 (current->thread.used_vsr && old_ctx))
312 return -EINVAL;
313#endif
251 if (old_ctx != NULL) { 314 if (old_ctx != NULL) {
252 if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx)) 315 if (!access_ok(VERIFY_WRITE, old_ctx, sizeof(*old_ctx))
253 || setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0) 316 || setup_sigcontext(&old_ctx->uc_mcontext, regs, 0, NULL, 0)
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 5191b46a611e..f5ae9fa222ea 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -171,12 +171,8 @@ void smp_send_stop(void)
171 smp_call_function(stop_this_cpu, NULL, 0); 171 smp_call_function(stop_this_cpu, NULL, 0);
172} 172}
173 173
174extern struct gettimeofday_struct do_gtod;
175
176struct thread_info *current_set[NR_CPUS]; 174struct thread_info *current_set[NR_CPUS];
177 175
178DECLARE_PER_CPU(unsigned int, pvr);
179
180static void __devinit smp_store_cpu_info(int id) 176static void __devinit smp_store_cpu_info(int id)
181{ 177{
182 per_cpu(pvr, id) = mfspr(SPRN_PVR); 178 per_cpu(pvr, id) = mfspr(SPRN_PVR);
diff --git a/arch/powerpc/kernel/softemu8xx.c b/arch/powerpc/kernel/softemu8xx.c
index 67d6f6890edc..c906c4bf6835 100644
--- a/arch/powerpc/kernel/softemu8xx.c
+++ b/arch/powerpc/kernel/softemu8xx.c
@@ -124,7 +124,7 @@ int Soft_emulate_8xx(struct pt_regs *regs)
124 disp = instword & 0xffff; 124 disp = instword & 0xffff;
125 125
126 ea = (u32 *)(regs->gpr[idxreg] + disp); 126 ea = (u32 *)(regs->gpr[idxreg] + disp);
127 ip = (u32 *)&current->thread.fpr[flreg]; 127 ip = (u32 *)&current->thread.TS_FPR(flreg);
128 128
129 switch ( inst ) 129 switch ( inst )
130 { 130 {
@@ -168,7 +168,7 @@ int Soft_emulate_8xx(struct pt_regs *regs)
168 break; 168 break;
169 case FMR: 169 case FMR:
170 /* assume this is a fp move -- Cort */ 170 /* assume this is a fp move -- Cort */
171 memcpy(ip, &current->thread.fpr[(instword>>11)&0x1f], 171 memcpy(ip, &current->thread.TS_FPR((instword>>11)&0x1f),
172 sizeof(double)); 172 sizeof(double));
173 break; 173 break;
174 default: 174 default:
diff --git a/arch/powerpc/kernel/stacktrace.c b/arch/powerpc/kernel/stacktrace.c
index 3cf0d94ba340..071bee3ec749 100644
--- a/arch/powerpc/kernel/stacktrace.c
+++ b/arch/powerpc/kernel/stacktrace.c
@@ -10,34 +10,35 @@
10 * 2 of the License, or (at your option) any later version. 10 * 2 of the License, or (at your option) any later version.
11 */ 11 */
12 12
13#include <linux/module.h>
13#include <linux/sched.h> 14#include <linux/sched.h>
14#include <linux/stacktrace.h> 15#include <linux/stacktrace.h>
15#include <linux/module.h> 16#include <linux/module.h>
16#include <asm/ptrace.h> 17#include <asm/ptrace.h>
18#include <asm/processor.h>
17 19
18/* 20/*
19 * Save stack-backtrace addresses into a stack_trace buffer. 21 * Save stack-backtrace addresses into a stack_trace buffer.
20 */ 22 */
21void save_stack_trace(struct stack_trace *trace) 23static void save_context_stack(struct stack_trace *trace, unsigned long sp,
24 struct task_struct *tsk, int savesched)
22{ 25{
23 unsigned long sp;
24
25 asm("mr %0,1" : "=r" (sp));
26
27 for (;;) { 26 for (;;) {
28 unsigned long *stack = (unsigned long *) sp; 27 unsigned long *stack = (unsigned long *) sp;
29 unsigned long newsp, ip; 28 unsigned long newsp, ip;
30 29
31 if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD)) 30 if (!validate_sp(sp, tsk, STACK_FRAME_OVERHEAD))
32 return; 31 return;
33 32
34 newsp = stack[0]; 33 newsp = stack[0];
35 ip = stack[STACK_FRAME_LR_SAVE]; 34 ip = stack[STACK_FRAME_LR_SAVE];
36 35
37 if (!trace->skip) 36 if (savesched || !in_sched_functions(ip)) {
38 trace->entries[trace->nr_entries++] = ip; 37 if (!trace->skip)
39 else 38 trace->entries[trace->nr_entries++] = ip;
40 trace->skip--; 39 else
40 trace->skip--;
41 }
41 42
42 if (trace->nr_entries >= trace->max_entries) 43 if (trace->nr_entries >= trace->max_entries)
43 return; 44 return;
@@ -45,4 +46,19 @@ void save_stack_trace(struct stack_trace *trace)
45 sp = newsp; 46 sp = newsp;
46 } 47 }
47} 48}
49
50void save_stack_trace(struct stack_trace *trace)
51{
52 unsigned long sp;
53
54 asm("mr %0,1" : "=r" (sp));
55
56 save_context_stack(trace, sp, current, 1);
57}
48EXPORT_SYMBOL_GPL(save_stack_trace); 58EXPORT_SYMBOL_GPL(save_stack_trace);
59
60void save_stack_trace_tsk(struct task_struct *tsk, struct stack_trace *trace)
61{
62 save_context_stack(trace, tsk->thread.regs->gpr[1], tsk, 0);
63}
64EXPORT_SYMBOL_GPL(save_stack_trace_tsk);
diff --git a/arch/powerpc/kernel/syscalls.c b/arch/powerpc/kernel/syscalls.c
index 4fe69ca24481..c04832c4a02e 100644
--- a/arch/powerpc/kernel/syscalls.c
+++ b/arch/powerpc/kernel/syscalls.c
@@ -143,6 +143,9 @@ static inline unsigned long do_mmap2(unsigned long addr, size_t len,
143 struct file * file = NULL; 143 struct file * file = NULL;
144 unsigned long ret = -EINVAL; 144 unsigned long ret = -EINVAL;
145 145
146 if (!arch_validate_prot(prot))
147 goto out;
148
146 if (shift) { 149 if (shift) {
147 if (off & ((1 << shift) - 1)) 150 if (off & ((1 << shift) - 1))
148 goto out; 151 goto out;
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index f1a38a6c1e2d..e2ee66b5831d 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -129,7 +129,7 @@ static unsigned long __initdata iSeries_recal_titan;
129static signed long __initdata iSeries_recal_tb; 129static signed long __initdata iSeries_recal_tb;
130 130
131/* Forward declaration is only needed for iSereis compiles */ 131/* Forward declaration is only needed for iSereis compiles */
132void __init clocksource_init(void); 132static void __init clocksource_init(void);
133#endif 133#endif
134 134
135#define XSEC_PER_SEC (1024*1024) 135#define XSEC_PER_SEC (1024*1024)
@@ -150,8 +150,8 @@ u64 tb_to_xs;
150unsigned tb_to_us; 150unsigned tb_to_us;
151 151
152#define TICKLEN_SCALE NTP_SCALE_SHIFT 152#define TICKLEN_SCALE NTP_SCALE_SHIFT
153u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ 153static u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */
154u64 ticklen_to_xs; /* 0.64 fraction */ 154static u64 ticklen_to_xs; /* 0.64 fraction */
155 155
156/* If last_tick_len corresponds to about 1/HZ seconds, then 156/* If last_tick_len corresponds to about 1/HZ seconds, then
157 last_tick_len << TICKLEN_SHIFT will be about 2^63. */ 157 last_tick_len << TICKLEN_SHIFT will be about 2^63. */
@@ -164,7 +164,7 @@ static u64 tb_to_ns_scale __read_mostly;
164static unsigned tb_to_ns_shift __read_mostly; 164static unsigned tb_to_ns_shift __read_mostly;
165static unsigned long boot_tb __read_mostly; 165static unsigned long boot_tb __read_mostly;
166 166
167struct gettimeofday_struct do_gtod; 167static struct gettimeofday_struct do_gtod;
168 168
169extern struct timezone sys_tz; 169extern struct timezone sys_tz;
170static long timezone_offset; 170static long timezone_offset;
@@ -742,10 +742,6 @@ void __init generic_calibrate_decr(void)
742 } 742 }
743 743
744#if defined(CONFIG_BOOKE) || defined(CONFIG_40x) 744#if defined(CONFIG_BOOKE) || defined(CONFIG_40x)
745 /* Set the time base to zero */
746 mtspr(SPRN_TBWL, 0);
747 mtspr(SPRN_TBWU, 0);
748
749 /* Clear any pending timer interrupts */ 745 /* Clear any pending timer interrupts */
750 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS); 746 mtspr(SPRN_TSR, TSR_ENW | TSR_WIS | TSR_DIS | TSR_FIS);
751 747
@@ -832,7 +828,7 @@ void update_vsyscall_tz(void)
832 ++vdso_data->tb_update_count; 828 ++vdso_data->tb_update_count;
833} 829}
834 830
835void __init clocksource_init(void) 831static void __init clocksource_init(void)
836{ 832{
837 struct clocksource *clock; 833 struct clocksource *clock;
838 834
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index 4b5b7ff4f78b..878fbddb6ae1 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -967,6 +967,20 @@ void altivec_unavailable_exception(struct pt_regs *regs)
967 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT); 967 die("Unrecoverable VMX/Altivec Unavailable Exception", regs, SIGABRT);
968} 968}
969 969
970void vsx_unavailable_exception(struct pt_regs *regs)
971{
972 if (user_mode(regs)) {
973 /* A user program has executed an vsx instruction,
974 but this kernel doesn't support vsx. */
975 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
976 return;
977 }
978
979 printk(KERN_EMERG "Unrecoverable VSX Unavailable Exception "
980 "%lx at %lx\n", regs->trap, regs->nip);
981 die("Unrecoverable VSX Unavailable Exception", regs, SIGABRT);
982}
983
970void performance_monitor_exception(struct pt_regs *regs) 984void performance_monitor_exception(struct pt_regs *regs)
971{ 985{
972 perf_irq(regs); 986 perf_irq(regs);
@@ -1030,21 +1044,29 @@ void SoftwareEmulation(struct pt_regs *regs)
1030 1044
1031#if defined(CONFIG_40x) || defined(CONFIG_BOOKE) 1045#if defined(CONFIG_40x) || defined(CONFIG_BOOKE)
1032 1046
1033void DebugException(struct pt_regs *regs, unsigned long debug_status) 1047void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status)
1034{ 1048{
1035 if (debug_status & DBSR_IC) { /* instruction completion */ 1049 if (debug_status & DBSR_IC) { /* instruction completion */
1036 regs->msr &= ~MSR_DE; 1050 regs->msr &= ~MSR_DE;
1051
1052 /* Disable instruction completion */
1053 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1054 /* Clear the instruction completion event */
1055 mtspr(SPRN_DBSR, DBSR_IC);
1056
1057 if (notify_die(DIE_SSTEP, "single_step", regs, 5,
1058 5, SIGTRAP) == NOTIFY_STOP) {
1059 return;
1060 }
1061
1062 if (debugger_sstep(regs))
1063 return;
1064
1037 if (user_mode(regs)) { 1065 if (user_mode(regs)) {
1038 current->thread.dbcr0 &= ~DBCR0_IC; 1066 current->thread.dbcr0 &= ~DBCR0_IC;
1039 } else {
1040 /* Disable instruction completion */
1041 mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC);
1042 /* Clear the instruction completion event */
1043 mtspr(SPRN_DBSR, DBSR_IC);
1044 if (debugger_sstep(regs))
1045 return;
1046 } 1067 }
1047 _exception(SIGTRAP, regs, TRAP_TRACE, 0); 1068
1069 _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip);
1048 } 1070 }
1049} 1071}
1050#endif /* CONFIG_4xx || CONFIG_BOOKE */ 1072#endif /* CONFIG_4xx || CONFIG_BOOKE */
@@ -1091,6 +1113,21 @@ void altivec_assist_exception(struct pt_regs *regs)
1091} 1113}
1092#endif /* CONFIG_ALTIVEC */ 1114#endif /* CONFIG_ALTIVEC */
1093 1115
1116#ifdef CONFIG_VSX
1117void vsx_assist_exception(struct pt_regs *regs)
1118{
1119 if (!user_mode(regs)) {
1120 printk(KERN_EMERG "VSX assist exception in kernel mode"
1121 " at %lx\n", regs->nip);
1122 die("Kernel VSX assist exception", regs, SIGILL);
1123 }
1124
1125 flush_vsx_to_thread(current);
1126 printk(KERN_INFO "VSX assist not supported at %lx\n", regs->nip);
1127 _exception(SIGILL, regs, ILL_ILLOPC, regs->nip);
1128}
1129#endif /* CONFIG_VSX */
1130
1094#ifdef CONFIG_FSL_BOOKE 1131#ifdef CONFIG_FSL_BOOKE
1095void CacheLockingException(struct pt_regs *regs, unsigned long address, 1132void CacheLockingException(struct pt_regs *regs, unsigned long address,
1096 unsigned long error_code) 1133 unsigned long error_code)
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index ce245a850db2..f177c60ea766 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -571,6 +571,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
571 if (start64) 571 if (start64)
572 do_feature_fixups(powerpc_firmware_features, 572 do_feature_fixups(powerpc_firmware_features,
573 start64, start64 + size64); 573 start64, start64 + size64);
574
575 start64 = find_section64(v64->hdr, "__lwsync_fixup", &size64);
576 if (start64)
577 do_lwsync_fixups(cur_cpu_spec->cpu_features,
578 start64, start64 + size64);
574#endif /* CONFIG_PPC64 */ 579#endif /* CONFIG_PPC64 */
575 580
576 start32 = find_section32(v32->hdr, "__ftr_fixup", &size32); 581 start32 = find_section32(v32->hdr, "__ftr_fixup", &size32);
@@ -585,6 +590,11 @@ static __init int vdso_fixup_features(struct lib32_elfinfo *v32,
585 start32, start32 + size32); 590 start32, start32 + size32);
586#endif /* CONFIG_PPC64 */ 591#endif /* CONFIG_PPC64 */
587 592
593 start32 = find_section32(v32->hdr, "__lwsync_fixup", &size32);
594 if (start32)
595 do_lwsync_fixups(cur_cpu_spec->cpu_features,
596 start32, start32 + size32);
597
588 return 0; 598 return 0;
589} 599}
590 600
diff --git a/arch/powerpc/kernel/vdso32/vdso32.lds.S b/arch/powerpc/kernel/vdso32/vdso32.lds.S
index 9352ab5200e5..be3b6a41dc09 100644
--- a/arch/powerpc/kernel/vdso32/vdso32.lds.S
+++ b/arch/powerpc/kernel/vdso32/vdso32.lds.S
@@ -24,7 +24,7 @@ SECTIONS
24 24
25 . = ALIGN(16); 25 . = ALIGN(16);
26 .text : { 26 .text : {
27 *(.text .stub .text.* .gnu.linkonce.t.*) 27 *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*)
28 } 28 }
29 PROVIDE(__etext = .); 29 PROVIDE(__etext = .);
30 PROVIDE(_etext = .); 30 PROVIDE(_etext = .);
@@ -33,6 +33,9 @@ SECTIONS
33 . = ALIGN(8); 33 . = ALIGN(8);
34 __ftr_fixup : { *(__ftr_fixup) } 34 __ftr_fixup : { *(__ftr_fixup) }
35 35
36 . = ALIGN(8);
37 __lwsync_fixup : { *(__lwsync_fixup) }
38
36#ifdef CONFIG_PPC64 39#ifdef CONFIG_PPC64
37 . = ALIGN(8); 40 . = ALIGN(8);
38 __fw_ftr_fixup : { *(__fw_ftr_fixup) } 41 __fw_ftr_fixup : { *(__fw_ftr_fixup) }
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S
index 932b3fdb34b9..d0b2526dd38d 100644
--- a/arch/powerpc/kernel/vdso64/vdso64.lds.S
+++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S
@@ -24,7 +24,7 @@ SECTIONS
24 24
25 . = ALIGN(16); 25 . = ALIGN(16);
26 .text : { 26 .text : {
27 *(.text .stub .text.* .gnu.linkonce.t.*) 27 *(.text .stub .text.* .gnu.linkonce.t.* __ftr_alt_*)
28 *(.sfpr .glink) 28 *(.sfpr .glink)
29 } :text 29 } :text
30 PROVIDE(__etext = .); 30 PROVIDE(__etext = .);
@@ -35,6 +35,9 @@ SECTIONS
35 __ftr_fixup : { *(__ftr_fixup) } 35 __ftr_fixup : { *(__ftr_fixup) }
36 36
37 . = ALIGN(8); 37 . = ALIGN(8);
38 __lwsync_fixup : { *(__lwsync_fixup) }
39
40 . = ALIGN(8);
38 __fw_ftr_fixup : { *(__fw_ftr_fixup) } 41 __fw_ftr_fixup : { *(__fw_ftr_fixup) }
39 42
40 /* 43 /*
@@ -43,15 +46,15 @@ SECTIONS
43 .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } 46 .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) }
44 .rodata1 : { *(.rodata1) } 47 .rodata1 : { *(.rodata1) }
45 48
49 .dynamic : { *(.dynamic) } :text :dynamic
50
46 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr 51 .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr
47 .eh_frame : { KEEP (*(.eh_frame)) } :text 52 .eh_frame : { KEEP (*(.eh_frame)) } :text
48 .gcc_except_table : { *(.gcc_except_table) } 53 .gcc_except_table : { *(.gcc_except_table) }
54 .rela.dyn ALIGN(8) : { *(.rela.dyn) }
49 55
50 .opd ALIGN(8) : { KEEP (*(.opd)) } 56 .opd ALIGN(8) : { KEEP (*(.opd)) }
51 .got ALIGN(8) : { *(.got .toc) } 57 .got ALIGN(8) : { *(.got .toc) }
52 .rela.dyn ALIGN(8) : { *(.rela.dyn) }
53
54 .dynamic : { *(.dynamic) } :text :dynamic
55 58
56 _end = .; 59 _end = .;
57 PROVIDE(end = .); 60 PROVIDE(end = .);
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 53d57d17a894..87a72c66ce27 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -35,7 +35,7 @@ SECTIONS
35 ALIGN_FUNCTION(); 35 ALIGN_FUNCTION();
36 *(.text.head) 36 *(.text.head)
37 _text = .; 37 _text = .;
38 *(.text .fixup .text.init.refok .exit.text.refok) 38 *(.text .fixup .text.init.refok .exit.text.refok __ftr_alt_*)
39 SCHED_TEXT 39 SCHED_TEXT
40 LOCK_TEXT 40 LOCK_TEXT
41 KPROBES_TEXT 41 KPROBES_TEXT
@@ -125,6 +125,12 @@ SECTIONS
125 *(__ftr_fixup) 125 *(__ftr_fixup)
126 __stop___ftr_fixup = .; 126 __stop___ftr_fixup = .;
127 } 127 }
128 . = ALIGN(8);
129 __lwsync_fixup : AT(ADDR(__lwsync_fixup) - LOAD_OFFSET) {
130 __start___lwsync_fixup = .;
131 *(__lwsync_fixup)
132 __stop___lwsync_fixup = .;
133 }
128#ifdef CONFIG_PPC64 134#ifdef CONFIG_PPC64
129 . = ALIGN(8); 135 . = ALIGN(8);
130 __fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) { 136 __fw_ftr_fixup : AT(ADDR(__fw_ftr_fixup) - LOAD_OFFSET) {
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index e522b06cc42f..2a88e8b9a3c6 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -24,3 +24,7 @@ obj-$(CONFIG_SMP) += locks.o
24endif 24endif
25 25
26obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o 26obj-$(CONFIG_PPC_LIB_RHEAP) += rheap.o
27
28obj-y += code-patching.o
29obj-y += feature-fixups.o
30obj-$(CONFIG_FTR_FIXUP_SELFTEST) += feature-fixups-test.o
diff --git a/arch/powerpc/lib/code-patching.c b/arch/powerpc/lib/code-patching.c
new file mode 100644
index 000000000000..0559fe086eb4
--- /dev/null
+++ b/arch/powerpc/lib/code-patching.c
@@ -0,0 +1,448 @@
1/*
2 * Copyright 2008 Michael Ellerman, IBM Corporation.
3 *
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
8 */
9
10#include <linux/kernel.h>
11#include <linux/vmalloc.h>
12#include <linux/init.h>
13#include <asm/page.h>
14#include <asm/code-patching.h>
15
16
17void patch_instruction(unsigned int *addr, unsigned int instr)
18{
19 *addr = instr;
20 asm ("dcbst 0, %0; sync; icbi 0,%0; sync; isync" : : "r" (addr));
21}
22
23void patch_branch(unsigned int *addr, unsigned long target, int flags)
24{
25 patch_instruction(addr, create_branch(addr, target, flags));
26}
27
28unsigned int create_branch(const unsigned int *addr,
29 unsigned long target, int flags)
30{
31 unsigned int instruction;
32 long offset;
33
34 offset = target;
35 if (! (flags & BRANCH_ABSOLUTE))
36 offset = offset - (unsigned long)addr;
37
38 /* Check we can represent the target in the instruction format */
39 if (offset < -0x2000000 || offset > 0x1fffffc || offset & 0x3)
40 return 0;
41
42 /* Mask out the flags and target, so they don't step on each other. */
43 instruction = 0x48000000 | (flags & 0x3) | (offset & 0x03FFFFFC);
44
45 return instruction;
46}
47
48unsigned int create_cond_branch(const unsigned int *addr,
49 unsigned long target, int flags)
50{
51 unsigned int instruction;
52 long offset;
53
54 offset = target;
55 if (! (flags & BRANCH_ABSOLUTE))
56 offset = offset - (unsigned long)addr;
57
58 /* Check we can represent the target in the instruction format */
59 if (offset < -0x8000 || offset > 0x7FFF || offset & 0x3)
60 return 0;
61
62 /* Mask out the flags and target, so they don't step on each other. */
63 instruction = 0x40000000 | (flags & 0x3FF0003) | (offset & 0xFFFC);
64
65 return instruction;
66}
67
68static unsigned int branch_opcode(unsigned int instr)
69{
70 return (instr >> 26) & 0x3F;
71}
72
73static int instr_is_branch_iform(unsigned int instr)
74{
75 return branch_opcode(instr) == 18;
76}
77
78static int instr_is_branch_bform(unsigned int instr)
79{
80 return branch_opcode(instr) == 16;
81}
82
83int instr_is_relative_branch(unsigned int instr)
84{
85 if (instr & BRANCH_ABSOLUTE)
86 return 0;
87
88 return instr_is_branch_iform(instr) || instr_is_branch_bform(instr);
89}
90
91static unsigned long branch_iform_target(const unsigned int *instr)
92{
93 signed long imm;
94
95 imm = *instr & 0x3FFFFFC;
96
97 /* If the top bit of the immediate value is set this is negative */
98 if (imm & 0x2000000)
99 imm -= 0x4000000;
100
101 if ((*instr & BRANCH_ABSOLUTE) == 0)
102 imm += (unsigned long)instr;
103
104 return (unsigned long)imm;
105}
106
107static unsigned long branch_bform_target(const unsigned int *instr)
108{
109 signed long imm;
110
111 imm = *instr & 0xFFFC;
112
113 /* If the top bit of the immediate value is set this is negative */
114 if (imm & 0x8000)
115 imm -= 0x10000;
116
117 if ((*instr & BRANCH_ABSOLUTE) == 0)
118 imm += (unsigned long)instr;
119
120 return (unsigned long)imm;
121}
122
123unsigned long branch_target(const unsigned int *instr)
124{
125 if (instr_is_branch_iform(*instr))
126 return branch_iform_target(instr);
127 else if (instr_is_branch_bform(*instr))
128 return branch_bform_target(instr);
129
130 return 0;
131}
132
133int instr_is_branch_to_addr(const unsigned int *instr, unsigned long addr)
134{
135 if (instr_is_branch_iform(*instr) || instr_is_branch_bform(*instr))
136 return branch_target(instr) == addr;
137
138 return 0;
139}
140
141unsigned int translate_branch(const unsigned int *dest, const unsigned int *src)
142{
143 unsigned long target;
144
145 target = branch_target(src);
146
147 if (instr_is_branch_iform(*src))
148 return create_branch(dest, target, *src);
149 else if (instr_is_branch_bform(*src))
150 return create_cond_branch(dest, target, *src);
151
152 return 0;
153}
154
155
156#ifdef CONFIG_CODE_PATCHING_SELFTEST
157
158static void __init test_trampoline(void)
159{
160 asm ("nop;\n");
161}
162
163#define check(x) \
164 if (!(x)) printk("code-patching: test failed at line %d\n", __LINE__);
165
166static void __init test_branch_iform(void)
167{
168 unsigned int instr;
169 unsigned long addr;
170
171 addr = (unsigned long)&instr;
172
173 /* The simplest case, branch to self, no flags */
174 check(instr_is_branch_iform(0x48000000));
175 /* All bits of target set, and flags */
176 check(instr_is_branch_iform(0x4bffffff));
177 /* High bit of opcode set, which is wrong */
178 check(!instr_is_branch_iform(0xcbffffff));
179 /* Middle bits of opcode set, which is wrong */
180 check(!instr_is_branch_iform(0x7bffffff));
181
182 /* Simplest case, branch to self with link */
183 check(instr_is_branch_iform(0x48000001));
184 /* All bits of targets set */
185 check(instr_is_branch_iform(0x4bfffffd));
186 /* Some bits of targets set */
187 check(instr_is_branch_iform(0x4bff00fd));
188 /* Must be a valid branch to start with */
189 check(!instr_is_branch_iform(0x7bfffffd));
190
191 /* Absolute branch to 0x100 */
192 instr = 0x48000103;
193 check(instr_is_branch_to_addr(&instr, 0x100));
194 /* Absolute branch to 0x420fc */
195 instr = 0x480420ff;
196 check(instr_is_branch_to_addr(&instr, 0x420fc));
197 /* Maximum positive relative branch, + 20MB - 4B */
198 instr = 0x49fffffc;
199 check(instr_is_branch_to_addr(&instr, addr + 0x1FFFFFC));
200 /* Smallest negative relative branch, - 4B */
201 instr = 0x4bfffffc;
202 check(instr_is_branch_to_addr(&instr, addr - 4));
203 /* Largest negative relative branch, - 32 MB */
204 instr = 0x4a000000;
205 check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
206
207 /* Branch to self, with link */
208 instr = create_branch(&instr, addr, BRANCH_SET_LINK);
209 check(instr_is_branch_to_addr(&instr, addr));
210
211 /* Branch to self - 0x100, with link */
212 instr = create_branch(&instr, addr - 0x100, BRANCH_SET_LINK);
213 check(instr_is_branch_to_addr(&instr, addr - 0x100));
214
215 /* Branch to self + 0x100, no link */
216 instr = create_branch(&instr, addr + 0x100, 0);
217 check(instr_is_branch_to_addr(&instr, addr + 0x100));
218
219 /* Maximum relative negative offset, - 32 MB */
220 instr = create_branch(&instr, addr - 0x2000000, BRANCH_SET_LINK);
221 check(instr_is_branch_to_addr(&instr, addr - 0x2000000));
222
223 /* Out of range relative negative offset, - 32 MB + 4*/
224 instr = create_branch(&instr, addr - 0x2000004, BRANCH_SET_LINK);
225 check(instr == 0);
226
227 /* Out of range relative positive offset, + 32 MB */
228 instr = create_branch(&instr, addr + 0x2000000, BRANCH_SET_LINK);
229 check(instr == 0);
230
231 /* Unaligned target */
232 instr = create_branch(&instr, addr + 3, BRANCH_SET_LINK);
233 check(instr == 0);
234
235 /* Check flags are masked correctly */
236 instr = create_branch(&instr, addr, 0xFFFFFFFC);
237 check(instr_is_branch_to_addr(&instr, addr));
238 check(instr == 0x48000000);
239}
240
241static void __init test_create_function_call(void)
242{
243 unsigned int *iptr;
244 unsigned long dest;
245
246 /* Check we can create a function call */
247 iptr = (unsigned int *)ppc_function_entry(test_trampoline);
248 dest = ppc_function_entry(test_create_function_call);
249 patch_instruction(iptr, create_branch(iptr, dest, BRANCH_SET_LINK));
250 check(instr_is_branch_to_addr(iptr, dest));
251}
252
253static void __init test_branch_bform(void)
254{
255 unsigned long addr;
256 unsigned int *iptr, instr, flags;
257
258 iptr = &instr;
259 addr = (unsigned long)iptr;
260
261 /* The simplest case, branch to self, no flags */
262 check(instr_is_branch_bform(0x40000000));
263 /* All bits of target set, and flags */
264 check(instr_is_branch_bform(0x43ffffff));
265 /* High bit of opcode set, which is wrong */
266 check(!instr_is_branch_bform(0xc3ffffff));
267 /* Middle bits of opcode set, which is wrong */
268 check(!instr_is_branch_bform(0x7bffffff));
269
270 /* Absolute conditional branch to 0x100 */
271 instr = 0x43ff0103;
272 check(instr_is_branch_to_addr(&instr, 0x100));
273 /* Absolute conditional branch to 0x20fc */
274 instr = 0x43ff20ff;
275 check(instr_is_branch_to_addr(&instr, 0x20fc));
276 /* Maximum positive relative conditional branch, + 32 KB - 4B */
277 instr = 0x43ff7ffc;
278 check(instr_is_branch_to_addr(&instr, addr + 0x7FFC));
279 /* Smallest negative relative conditional branch, - 4B */
280 instr = 0x43fffffc;
281 check(instr_is_branch_to_addr(&instr, addr - 4));
282 /* Largest negative relative conditional branch, - 32 KB */
283 instr = 0x43ff8000;
284 check(instr_is_branch_to_addr(&instr, addr - 0x8000));
285
286 /* All condition code bits set & link */
287 flags = 0x3ff000 | BRANCH_SET_LINK;
288
289 /* Branch to self */
290 instr = create_cond_branch(iptr, addr, flags);
291 check(instr_is_branch_to_addr(&instr, addr));
292
293 /* Branch to self - 0x100 */
294 instr = create_cond_branch(iptr, addr - 0x100, flags);
295 check(instr_is_branch_to_addr(&instr, addr - 0x100));
296
297 /* Branch to self + 0x100 */
298 instr = create_cond_branch(iptr, addr + 0x100, flags);
299 check(instr_is_branch_to_addr(&instr, addr + 0x100));
300
301 /* Maximum relative negative offset, - 32 KB */
302 instr = create_cond_branch(iptr, addr - 0x8000, flags);
303 check(instr_is_branch_to_addr(&instr, addr - 0x8000));
304
305 /* Out of range relative negative offset, - 32 KB + 4*/
306 instr = create_cond_branch(iptr, addr - 0x8004, flags);
307 check(instr == 0);
308
309 /* Out of range relative positive offset, + 32 KB */
310 instr = create_cond_branch(iptr, addr + 0x8000, flags);
311 check(instr == 0);
312
313 /* Unaligned target */
314 instr = create_cond_branch(iptr, addr + 3, flags);
315 check(instr == 0);
316
317 /* Check flags are masked correctly */
318 instr = create_cond_branch(iptr, addr, 0xFFFFFFFC);
319 check(instr_is_branch_to_addr(&instr, addr));
320 check(instr == 0x43FF0000);
321}
322
323static void __init test_translate_branch(void)
324{
325 unsigned long addr;
326 unsigned int *p, *q;
327 void *buf;
328
329 buf = vmalloc(PAGE_ALIGN(0x2000000 + 1));
330 check(buf);
331 if (!buf)
332 return;
333
334 /* Simple case, branch to self moved a little */
335 p = buf;
336 addr = (unsigned long)p;
337 patch_branch(p, addr, 0);
338 check(instr_is_branch_to_addr(p, addr));
339 q = p + 1;
340 patch_instruction(q, translate_branch(q, p));
341 check(instr_is_branch_to_addr(q, addr));
342
343 /* Maximum negative case, move b . to addr + 32 MB */
344 p = buf;
345 addr = (unsigned long)p;
346 patch_branch(p, addr, 0);
347 q = buf + 0x2000000;
348 patch_instruction(q, translate_branch(q, p));
349 check(instr_is_branch_to_addr(p, addr));
350 check(instr_is_branch_to_addr(q, addr));
351 check(*q == 0x4a000000);
352
353 /* Maximum positive case, move x to x - 32 MB + 4 */
354 p = buf + 0x2000000;
355 addr = (unsigned long)p;
356 patch_branch(p, addr, 0);
357 q = buf + 4;
358 patch_instruction(q, translate_branch(q, p));
359 check(instr_is_branch_to_addr(p, addr));
360 check(instr_is_branch_to_addr(q, addr));
361 check(*q == 0x49fffffc);
362
363 /* Jump to x + 16 MB moved to x + 20 MB */
364 p = buf;
365 addr = 0x1000000 + (unsigned long)buf;
366 patch_branch(p, addr, BRANCH_SET_LINK);
367 q = buf + 0x1400000;
368 patch_instruction(q, translate_branch(q, p));
369 check(instr_is_branch_to_addr(p, addr));
370 check(instr_is_branch_to_addr(q, addr));
371
372 /* Jump to x + 16 MB moved to x - 16 MB + 4 */
373 p = buf + 0x1000000;
374 addr = 0x2000000 + (unsigned long)buf;
375 patch_branch(p, addr, 0);
376 q = buf + 4;
377 patch_instruction(q, translate_branch(q, p));
378 check(instr_is_branch_to_addr(p, addr));
379 check(instr_is_branch_to_addr(q, addr));
380
381
382 /* Conditional branch tests */
383
384 /* Simple case, branch to self moved a little */
385 p = buf;
386 addr = (unsigned long)p;
387 patch_instruction(p, create_cond_branch(p, addr, 0));
388 check(instr_is_branch_to_addr(p, addr));
389 q = p + 1;
390 patch_instruction(q, translate_branch(q, p));
391 check(instr_is_branch_to_addr(q, addr));
392
393 /* Maximum negative case, move b . to addr + 32 KB */
394 p = buf;
395 addr = (unsigned long)p;
396 patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
397 q = buf + 0x8000;
398 patch_instruction(q, translate_branch(q, p));
399 check(instr_is_branch_to_addr(p, addr));
400 check(instr_is_branch_to_addr(q, addr));
401 check(*q == 0x43ff8000);
402
403 /* Maximum positive case, move x to x - 32 KB + 4 */
404 p = buf + 0x8000;
405 addr = (unsigned long)p;
406 patch_instruction(p, create_cond_branch(p, addr, 0xFFFFFFFC));
407 q = buf + 4;
408 patch_instruction(q, translate_branch(q, p));
409 check(instr_is_branch_to_addr(p, addr));
410 check(instr_is_branch_to_addr(q, addr));
411 check(*q == 0x43ff7ffc);
412
413 /* Jump to x + 12 KB moved to x + 20 KB */
414 p = buf;
415 addr = 0x3000 + (unsigned long)buf;
416 patch_instruction(p, create_cond_branch(p, addr, BRANCH_SET_LINK));
417 q = buf + 0x5000;
418 patch_instruction(q, translate_branch(q, p));
419 check(instr_is_branch_to_addr(p, addr));
420 check(instr_is_branch_to_addr(q, addr));
421
422 /* Jump to x + 8 KB moved to x - 8 KB + 4 */
423 p = buf + 0x2000;
424 addr = 0x4000 + (unsigned long)buf;
425 patch_instruction(p, create_cond_branch(p, addr, 0));
426 q = buf + 4;
427 patch_instruction(q, translate_branch(q, p));
428 check(instr_is_branch_to_addr(p, addr));
429 check(instr_is_branch_to_addr(q, addr));
430
431 /* Free the buffer we were using */
432 vfree(buf);
433}
434
435static int __init test_code_patching(void)
436{
437 printk(KERN_DEBUG "Running code patching self-tests ...\n");
438
439 test_branch_iform();
440 test_branch_bform();
441 test_create_function_call();
442 test_translate_branch();
443
444 return 0;
445}
446late_initcall(test_code_patching);
447
448#endif /* CONFIG_CODE_PATCHING_SELFTEST */
diff --git a/arch/powerpc/lib/dma-noncoherent.c b/arch/powerpc/lib/dma-noncoherent.c
index 6656d47841d0..5d83907f6591 100644
--- a/arch/powerpc/lib/dma-noncoherent.c
+++ b/arch/powerpc/lib/dma-noncoherent.c
@@ -348,8 +348,15 @@ void __dma_sync(void *vaddr, size_t size, int direction)
348 switch (direction) { 348 switch (direction) {
349 case DMA_NONE: 349 case DMA_NONE:
350 BUG(); 350 BUG();
351 case DMA_FROM_DEVICE: /* invalidate only */ 351 case DMA_FROM_DEVICE:
352 invalidate_dcache_range(start, end); 352 /*
353 * invalidate only when cache-line aligned otherwise there is
354 * the potential for discarding uncommitted data from the cache
355 */
356 if ((start & (L1_CACHE_BYTES - 1)) || (size & (L1_CACHE_BYTES - 1)))
357 flush_dcache_range(start, end);
358 else
359 invalidate_dcache_range(start, end);
353 break; 360 break;
354 case DMA_TO_DEVICE: /* writeback only */ 361 case DMA_TO_DEVICE: /* writeback only */
355 clean_dcache_range(start, end); 362 clean_dcache_range(start, end);
diff --git a/arch/powerpc/lib/feature-fixups-test.S b/arch/powerpc/lib/feature-fixups-test.S
new file mode 100644
index 000000000000..cb737484c5aa
--- /dev/null
+++ b/arch/powerpc/lib/feature-fixups-test.S
@@ -0,0 +1,742 @@
1/*
2 * Copyright 2008 Michael Ellerman, IBM Corporation.
3 *
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version
8 * 2 of the License, or (at your option) any later version.
9 */
10
11#include <asm/feature-fixups.h>
12#include <asm/ppc_asm.h>
13#include <asm/synch.h>
14
15 .text
16
17#define globl(x) \
18 .globl x; \
19x:
20
21globl(ftr_fixup_test1)
22 or 1,1,1
23 or 2,2,2 /* fixup will nop out this instruction */
24 or 3,3,3
25
26globl(end_ftr_fixup_test1)
27
28globl(ftr_fixup_test1_orig)
29 or 1,1,1
30 or 2,2,2
31 or 3,3,3
32
33globl(ftr_fixup_test1_expected)
34 or 1,1,1
35 nop
36 or 3,3,3
37
38globl(ftr_fixup_test2)
39 or 1,1,1
40 or 2,2,2 /* fixup will replace this with ftr_fixup_test2_alt */
41 or 3,3,3
42
43globl(end_ftr_fixup_test2)
44
45globl(ftr_fixup_test2_orig)
46 or 1,1,1
47 or 2,2,2
48 or 3,3,3
49
50globl(ftr_fixup_test2_alt)
51 or 31,31,31
52
53globl(ftr_fixup_test2_expected)
54 or 1,1,1
55 or 31,31,31
56 or 3,3,3
57
58globl(ftr_fixup_test3)
59 or 1,1,1
60 or 2,2,2 /* fixup will fail to replace this */
61 or 3,3,3
62
63globl(end_ftr_fixup_test3)
64
65globl(ftr_fixup_test3_orig)
66 or 1,1,1
67 or 2,2,2
68 or 3,3,3
69
70globl(ftr_fixup_test3_alt)
71 or 31,31,31
72 or 31,31,31
73
74globl(ftr_fixup_test4)
75 or 1,1,1
76 or 2,2,2
77 or 2,2,2
78 or 2,2,2
79 or 2,2,2
80 or 3,3,3
81
82globl(end_ftr_fixup_test4)
83
84globl(ftr_fixup_test4_expected)
85 or 1,1,1
86 or 31,31,31
87 or 31,31,31
88 nop
89 nop
90 or 3,3,3
91
92globl(ftr_fixup_test4_orig)
93 or 1,1,1
94 or 2,2,2
95 or 2,2,2
96 or 2,2,2
97 or 2,2,2
98 or 3,3,3
99
100globl(ftr_fixup_test4_alt)
101 or 31,31,31
102 or 31,31,31
103
104
105globl(ftr_fixup_test5)
106 or 1,1,1
107BEGIN_FTR_SECTION
108 or 2,2,2
109 or 2,2,2
110 or 2,2,2
111 or 2,2,2
112 or 2,2,2
113 or 2,2,2
114 or 2,2,2
115FTR_SECTION_ELSE
1162: b 3f
1173: or 5,5,5
118 beq 3b
119 b 1f
120 or 6,6,6
121 b 2b
1221: bdnz 3b
123ALT_FTR_SECTION_END(0, 1)
124 or 1,1,1
125
126globl(end_ftr_fixup_test5)
127
128globl(ftr_fixup_test5_expected)
129 or 1,1,1
1302: b 3f
1313: or 5,5,5
132 beq 3b
133 b 1f
134 or 6,6,6
135 b 2b
1361: bdnz 3b
137 or 1,1,1
138
139globl(ftr_fixup_test6)
1401: or 1,1,1
141BEGIN_FTR_SECTION
142 or 5,5,5
1432: PPC_LCMPI r3,0
144 beq 4f
145 blt 2b
146 b 1b
147 b 4f
148FTR_SECTION_ELSE
1492: or 2,2,2
150 PPC_LCMPI r3,1
151 beq 3f
152 blt 2b
153 b 3f
154 b 1b
155ALT_FTR_SECTION_END(0, 1)
1563: or 1,1,1
157 or 2,2,2
1584: or 3,3,3
159
160globl(end_ftr_fixup_test6)
161
162globl(ftr_fixup_test6_expected)
1631: or 1,1,1
1642: or 2,2,2
165 PPC_LCMPI r3,1
166 beq 3f
167 blt 2b
168 b 3f
169 b 1b
1702: or 1,1,1
171 or 2,2,2
1723: or 3,3,3
173
174
175#define MAKE_MACRO_TEST(TYPE) \
176globl(ftr_fixup_test_ ##TYPE##_macros) \
177 or 1,1,1; \
178 /* Basic test, this section should all be nop'ed */ \
179BEGIN_##TYPE##_SECTION \
180 or 2,2,2; \
181 or 2,2,2; \
182 or 2,2,2; \
183END_##TYPE##_SECTION(0, 1) \
184 or 1,1,1; \
185 or 1,1,1; \
186 /* Basic test, this section should NOT be nop'ed */ \
187BEGIN_##TYPE##_SECTION \
188 or 2,2,2; \
189 or 2,2,2; \
190 or 2,2,2; \
191END_##TYPE##_SECTION(0, 0) \
192 or 1,1,1; \
193 or 1,1,1; \
194 /* Nesting test, inner section should be nop'ed */ \
195BEGIN_##TYPE##_SECTION \
196 or 2,2,2; \
197 or 2,2,2; \
198BEGIN_##TYPE##_SECTION_NESTED(80) \
199 or 3,3,3; \
200 or 3,3,3; \
201END_##TYPE##_SECTION_NESTED(0, 1, 80) \
202 or 2,2,2; \
203 or 2,2,2; \
204END_##TYPE##_SECTION(0, 0) \
205 or 1,1,1; \
206 or 1,1,1; \
207 /* Nesting test, whole section should be nop'ed */ \
208BEGIN_##TYPE##_SECTION \
209 or 2,2,2; \
210 or 2,2,2; \
211BEGIN_##TYPE##_SECTION_NESTED(80) \
212 or 3,3,3; \
213 or 3,3,3; \
214END_##TYPE##_SECTION_NESTED(0, 0, 80) \
215 or 2,2,2; \
216 or 2,2,2; \
217END_##TYPE##_SECTION(0, 1) \
218 or 1,1,1; \
219 or 1,1,1; \
220 /* Nesting test, none should be nop'ed */ \
221BEGIN_##TYPE##_SECTION \
222 or 2,2,2; \
223 or 2,2,2; \
224BEGIN_##TYPE##_SECTION_NESTED(80) \
225 or 3,3,3; \
226 or 3,3,3; \
227END_##TYPE##_SECTION_NESTED(0, 0, 80) \
228 or 2,2,2; \
229 or 2,2,2; \
230END_##TYPE##_SECTION(0, 0) \
231 or 1,1,1; \
232 or 1,1,1; \
233 /* Basic alt section test, default case should be taken */ \
234BEGIN_##TYPE##_SECTION \
235 or 3,3,3; \
236 or 3,3,3; \
237 or 3,3,3; \
238##TYPE##_SECTION_ELSE \
239 or 5,5,5; \
240 or 5,5,5; \
241ALT_##TYPE##_SECTION_END(0, 0) \
242 or 1,1,1; \
243 or 1,1,1; \
244 /* Basic alt section test, else case should be taken */ \
245BEGIN_##TYPE##_SECTION \
246 or 3,3,3; \
247 or 3,3,3; \
248 or 3,3,3; \
249##TYPE##_SECTION_ELSE \
250 or 31,31,31; \
251 or 31,31,31; \
252 or 31,31,31; \
253ALT_##TYPE##_SECTION_END(0, 1) \
254 or 1,1,1; \
255 or 1,1,1; \
256 /* Alt with smaller else case, should be padded with nops */ \
257BEGIN_##TYPE##_SECTION \
258 or 3,3,3; \
259 or 3,3,3; \
260 or 3,3,3; \
261##TYPE##_SECTION_ELSE \
262 or 31,31,31; \
263ALT_##TYPE##_SECTION_END(0, 1) \
264 or 1,1,1; \
265 or 1,1,1; \
266 /* Alt section with nested section in default case */ \
267 /* Default case should be taken, with nop'ed inner section */ \
268BEGIN_##TYPE##_SECTION \
269 or 3,3,3; \
270BEGIN_##TYPE##_SECTION_NESTED(95) \
271 or 3,3,3; \
272 or 3,3,3; \
273END_##TYPE##_SECTION_NESTED(0, 1, 95) \
274 or 3,3,3; \
275##TYPE##_SECTION_ELSE \
276 or 2,2,2; \
277 or 2,2,2; \
278ALT_##TYPE##_SECTION_END(0, 0) \
279 or 1,1,1; \
280 or 1,1,1; \
281 /* Alt section with nested section in else, default taken */ \
282BEGIN_##TYPE##_SECTION \
283 or 3,3,3; \
284 or 3,3,3; \
285 or 3,3,3; \
286##TYPE##_SECTION_ELSE \
287 or 5,5,5; \
288BEGIN_##TYPE##_SECTION_NESTED(95) \
289 or 3,3,3; \
290END_##TYPE##_SECTION_NESTED(0, 1, 95) \
291 or 5,5,5; \
292ALT_##TYPE##_SECTION_END(0, 0) \
293 or 1,1,1; \
294 or 1,1,1; \
295 /* Alt section with nested section in else, else taken & nop */ \
296BEGIN_##TYPE##_SECTION \
297 or 3,3,3; \
298 or 3,3,3; \
299 or 3,3,3; \
300##TYPE##_SECTION_ELSE \
301 or 5,5,5; \
302BEGIN_##TYPE##_SECTION_NESTED(95) \
303 or 3,3,3; \
304END_##TYPE##_SECTION_NESTED(0, 1, 95) \
305 or 5,5,5; \
306ALT_##TYPE##_SECTION_END(0, 1) \
307 or 1,1,1; \
308 or 1,1,1; \
309 /* Feature section with nested alt section, default taken */ \
310BEGIN_##TYPE##_SECTION \
311 or 2,2,2; \
312BEGIN_##TYPE##_SECTION_NESTED(95) \
313 or 1,1,1; \
314##TYPE##_SECTION_ELSE_NESTED(95) \
315 or 5,5,5; \
316ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
317 or 2,2,2; \
318END_##TYPE##_SECTION(0, 0) \
319 or 1,1,1; \
320 or 1,1,1; \
321 /* Feature section with nested alt section, else taken */ \
322BEGIN_##TYPE##_SECTION \
323 or 2,2,2; \
324BEGIN_##TYPE##_SECTION_NESTED(95) \
325 or 1,1,1; \
326##TYPE##_SECTION_ELSE_NESTED(95) \
327 or 5,5,5; \
328ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
329 or 2,2,2; \
330END_##TYPE##_SECTION(0, 0) \
331 or 1,1,1; \
332 or 1,1,1; \
333 /* Feature section with nested alt section, all nop'ed */ \
334BEGIN_##TYPE##_SECTION \
335 or 2,2,2; \
336BEGIN_##TYPE##_SECTION_NESTED(95) \
337 or 1,1,1; \
338##TYPE##_SECTION_ELSE_NESTED(95) \
339 or 5,5,5; \
340ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
341 or 2,2,2; \
342END_##TYPE##_SECTION(0, 1) \
343 or 1,1,1; \
344 or 1,1,1; \
345 /* Nested alt sections, default with inner default taken */ \
346BEGIN_##TYPE##_SECTION \
347 or 2,2,2; \
348BEGIN_##TYPE##_SECTION_NESTED(95) \
349 or 1,1,1; \
350##TYPE##_SECTION_ELSE_NESTED(95) \
351 or 5,5,5; \
352ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) \
353 or 2,2,2; \
354##TYPE##_SECTION_ELSE \
355 or 31,31,31; \
356BEGIN_##TYPE##_SECTION_NESTED(94) \
357 or 5,5,5; \
358##TYPE##_SECTION_ELSE_NESTED(94) \
359 or 1,1,1; \
360ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
361 or 31,31,31; \
362ALT_##TYPE##_SECTION_END(0, 0) \
363 or 1,1,1; \
364 or 1,1,1; \
365 /* Nested alt sections, default with inner else taken */ \
366BEGIN_##TYPE##_SECTION \
367 or 2,2,2; \
368BEGIN_##TYPE##_SECTION_NESTED(95) \
369 or 1,1,1; \
370##TYPE##_SECTION_ELSE_NESTED(95) \
371 or 5,5,5; \
372ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
373 or 2,2,2; \
374##TYPE##_SECTION_ELSE \
375 or 31,31,31; \
376BEGIN_##TYPE##_SECTION_NESTED(94) \
377 or 5,5,5; \
378##TYPE##_SECTION_ELSE_NESTED(94) \
379 or 1,1,1; \
380ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
381 or 31,31,31; \
382ALT_##TYPE##_SECTION_END(0, 0) \
383 or 1,1,1; \
384 or 1,1,1; \
385 /* Nested alt sections, else with inner default taken */ \
386BEGIN_##TYPE##_SECTION \
387 or 2,2,2; \
388BEGIN_##TYPE##_SECTION_NESTED(95) \
389 or 1,1,1; \
390##TYPE##_SECTION_ELSE_NESTED(95) \
391 or 5,5,5; \
392ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
393 or 2,2,2; \
394##TYPE##_SECTION_ELSE \
395 or 31,31,31; \
396BEGIN_##TYPE##_SECTION_NESTED(94) \
397 or 5,5,5; \
398##TYPE##_SECTION_ELSE_NESTED(94) \
399 or 1,1,1; \
400ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) \
401 or 31,31,31; \
402ALT_##TYPE##_SECTION_END(0, 1) \
403 or 1,1,1; \
404 or 1,1,1; \
405 /* Nested alt sections, else with inner else taken */ \
406BEGIN_##TYPE##_SECTION \
407 or 2,2,2; \
408BEGIN_##TYPE##_SECTION_NESTED(95) \
409 or 1,1,1; \
410##TYPE##_SECTION_ELSE_NESTED(95) \
411 or 5,5,5; \
412ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) \
413 or 2,2,2; \
414##TYPE##_SECTION_ELSE \
415 or 31,31,31; \
416BEGIN_##TYPE##_SECTION_NESTED(94) \
417 or 5,5,5; \
418##TYPE##_SECTION_ELSE_NESTED(94) \
419 or 1,1,1; \
420ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \
421 or 31,31,31; \
422ALT_##TYPE##_SECTION_END(0, 1) \
423 or 1,1,1; \
424 or 1,1,1; \
425 /* Nested alt sections, else can have large else case */ \
426BEGIN_##TYPE##_SECTION \
427 or 2,2,2; \
428 or 2,2,2; \
429 or 2,2,2; \
430 or 2,2,2; \
431##TYPE##_SECTION_ELSE \
432BEGIN_##TYPE##_SECTION_NESTED(94) \
433 or 5,5,5; \
434 or 5,5,5; \
435 or 5,5,5; \
436 or 5,5,5; \
437##TYPE##_SECTION_ELSE_NESTED(94) \
438 or 1,1,1; \
439 or 1,1,1; \
440 or 1,1,1; \
441 or 1,1,1; \
442ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) \
443ALT_##TYPE##_SECTION_END(0, 1) \
444 or 1,1,1; \
445 or 1,1,1;
446
447#define MAKE_MACRO_TEST_EXPECTED(TYPE) \
448globl(ftr_fixup_test_ ##TYPE##_macros_expected) \
449 or 1,1,1; \
450 /* Basic test, this section should all be nop'ed */ \
451/* BEGIN_##TYPE##_SECTION */ \
452 nop; \
453 nop; \
454 nop; \
455/* END_##TYPE##_SECTION(0, 1) */ \
456 or 1,1,1; \
457 or 1,1,1; \
458 /* Basic test, this section should NOT be nop'ed */ \
459/* BEGIN_##TYPE##_SECTION */ \
460 or 2,2,2; \
461 or 2,2,2; \
462 or 2,2,2; \
463/* END_##TYPE##_SECTION(0, 0) */ \
464 or 1,1,1; \
465 or 1,1,1; \
466 /* Nesting test, inner section should be nop'ed */ \
467/* BEGIN_##TYPE##_SECTION */ \
468 or 2,2,2; \
469 or 2,2,2; \
470/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
471 nop; \
472 nop; \
473/* END_##TYPE##_SECTION_NESTED(0, 1, 80) */ \
474 or 2,2,2; \
475 or 2,2,2; \
476/* END_##TYPE##_SECTION(0, 0) */ \
477 or 1,1,1; \
478 or 1,1,1; \
479 /* Nesting test, whole section should be nop'ed */ \
480 /* NB. inner section is not nop'ed, but then entire outer is */ \
481/* BEGIN_##TYPE##_SECTION */ \
482 nop; \
483 nop; \
484/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
485 nop; \
486 nop; \
487/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \
488 nop; \
489 nop; \
490/* END_##TYPE##_SECTION(0, 1) */ \
491 or 1,1,1; \
492 or 1,1,1; \
493 /* Nesting test, none should be nop'ed */ \
494/* BEGIN_##TYPE##_SECTION */ \
495 or 2,2,2; \
496 or 2,2,2; \
497/* BEGIN_##TYPE##_SECTION_NESTED(80) */ \
498 or 3,3,3; \
499 or 3,3,3; \
500/* END_##TYPE##_SECTION_NESTED(0, 0, 80) */ \
501 or 2,2,2; \
502 or 2,2,2; \
503/* END_##TYPE##_SECTION(0, 0) */ \
504 or 1,1,1; \
505 or 1,1,1; \
506 /* Basic alt section test, default case should be taken */ \
507/* BEGIN_##TYPE##_SECTION */ \
508 or 3,3,3; \
509 or 3,3,3; \
510 or 3,3,3; \
511/* ##TYPE##_SECTION_ELSE */ \
512 /* or 5,5,5; */ \
513 /* or 5,5,5; */ \
514/* ALT_##TYPE##_SECTION_END(0, 0) */ \
515 or 1,1,1; \
516 or 1,1,1; \
517 /* Basic alt section test, else case should be taken */ \
518/* BEGIN_##TYPE##_SECTION */ \
519 /* or 3,3,3; */ \
520 /* or 3,3,3; */ \
521 /* or 3,3,3; */ \
522/* ##TYPE##_SECTION_ELSE */ \
523 or 31,31,31; \
524 or 31,31,31; \
525 or 31,31,31; \
526/* ALT_##TYPE##_SECTION_END(0, 1) */ \
527 or 1,1,1; \
528 or 1,1,1; \
529 /* Alt with smaller else case, should be padded with nops */ \
530/* BEGIN_##TYPE##_SECTION */ \
531 /* or 3,3,3; */ \
532 /* or 3,3,3; */ \
533 /* or 3,3,3; */ \
534/* ##TYPE##_SECTION_ELSE */ \
535 or 31,31,31; \
536 nop; \
537 nop; \
538/* ALT_##TYPE##_SECTION_END(0, 1) */ \
539 or 1,1,1; \
540 or 1,1,1; \
541 /* Alt section with nested section in default case */ \
542 /* Default case should be taken, with nop'ed inner section */ \
543/* BEGIN_##TYPE##_SECTION */ \
544 or 3,3,3; \
545/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
546 nop; \
547 nop; \
548/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
549 or 3,3,3; \
550/* ##TYPE##_SECTION_ELSE */ \
551 /* or 2,2,2; */ \
552 /* or 2,2,2; */ \
553/* ALT_##TYPE##_SECTION_END(0, 0) */ \
554 or 1,1,1; \
555 or 1,1,1; \
556 /* Alt section with nested section in else, default taken */ \
557/* BEGIN_##TYPE##_SECTION */ \
558 or 3,3,3; \
559 or 3,3,3; \
560 or 3,3,3; \
561/* ##TYPE##_SECTION_ELSE */ \
562 /* or 5,5,5; */ \
563/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
564 /* or 3,3,3; */ \
565/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
566 /* or 5,5,5; */ \
567/* ALT_##TYPE##_SECTION_END(0, 0) */ \
568 or 1,1,1; \
569 or 1,1,1; \
570 /* Alt section with nested section in else, else taken & nop */ \
571/* BEGIN_##TYPE##_SECTION */ \
572 /* or 3,3,3; */ \
573 /* or 3,3,3; */ \
574 /* or 3,3,3; */ \
575/* ##TYPE##_SECTION_ELSE */ \
576 or 5,5,5; \
577/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
578 nop; \
579/* END_##TYPE##_SECTION_NESTED(0, 1, 95) */ \
580 or 5,5,5; \
581/* ALT_##TYPE##_SECTION_END(0, 1) */ \
582 or 1,1,1; \
583 or 1,1,1; \
584 /* Feature section with nested alt section, default taken */ \
585/* BEGIN_##TYPE##_SECTION */ \
586 or 2,2,2; \
587/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
588 or 1,1,1; \
589/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
590 /* or 5,5,5; */ \
591/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
592 or 2,2,2; \
593/* END_##TYPE##_SECTION(0, 0) */ \
594 or 1,1,1; \
595 or 1,1,1; \
596 /* Feature section with nested alt section, else taken */ \
597/* BEGIN_##TYPE##_SECTION */ \
598 or 2,2,2; \
599/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
600 /* or 1,1,1; */ \
601/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
602 or 5,5,5; \
603/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
604 or 2,2,2; \
605/* END_##TYPE##_SECTION(0, 0) */ \
606 or 1,1,1; \
607 or 1,1,1; \
608 /* Feature section with nested alt section, all nop'ed */ \
609/* BEGIN_##TYPE##_SECTION */ \
610 nop; \
611/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
612 nop; \
613/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
614 /* or 5,5,5; */ \
615/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
616 nop; \
617/* END_##TYPE##_SECTION(0, 1) */ \
618 or 1,1,1; \
619 or 1,1,1; \
620 /* Nested alt sections, default with inner default taken */ \
621/* BEGIN_##TYPE##_SECTION */ \
622 or 2,2,2; \
623/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
624 or 1,1,1; \
625/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
626 /* or 5,5,5; */ \
627/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 95) */ \
628 or 2,2,2; \
629/* ##TYPE##_SECTION_ELSE */ \
630 /* or 31,31,31; */ \
631/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
632 /* or 5,5,5; */ \
633/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
634 /* or 1,1,1; */ \
635/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
636 /* or 31,31,31; */ \
637/* ALT_##TYPE##_SECTION_END(0, 0) */ \
638 or 1,1,1; \
639 or 1,1,1; \
640 /* Nested alt sections, default with inner else taken */ \
641/* BEGIN_##TYPE##_SECTION */ \
642 or 2,2,2; \
643/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
644 /* or 1,1,1; */ \
645/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
646 or 5,5,5; \
647/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
648 or 2,2,2; \
649/* ##TYPE##_SECTION_ELSE */ \
650 /* or 31,31,31; */ \
651/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
652 /* or 5,5,5; */ \
653/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
654 /* or 1,1,1; */ \
655/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
656 /* or 31,31,31; */ \
657/* ALT_##TYPE##_SECTION_END(0, 0) */ \
658 or 1,1,1; \
659 or 1,1,1; \
660 /* Nested alt sections, else with inner default taken */ \
661/* BEGIN_##TYPE##_SECTION */ \
662 /* or 2,2,2; */ \
663/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
664 /* or 1,1,1; */ \
665/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
666 /* or 5,5,5; */ \
667/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
668 /* or 2,2,2; */ \
669/* ##TYPE##_SECTION_ELSE */ \
670 or 31,31,31; \
671/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
672 or 5,5,5; \
673/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
674 /* or 1,1,1; */ \
675/* ALT_##TYPE##_SECTION_END_NESTED(0, 0, 94) */ \
676 or 31,31,31; \
677/* ALT_##TYPE##_SECTION_END(0, 1) */ \
678 or 1,1,1; \
679 or 1,1,1; \
680 /* Nested alt sections, else with inner else taken */ \
681/* BEGIN_##TYPE##_SECTION */ \
682 /* or 2,2,2; */ \
683/* BEGIN_##TYPE##_SECTION_NESTED(95) */ \
684 /* or 1,1,1; */ \
685/* ##TYPE##_SECTION_ELSE_NESTED(95) */ \
686 /* or 5,5,5; */ \
687/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 95) */ \
688 /* or 2,2,2; */ \
689/* ##TYPE##_SECTION_ELSE */ \
690 or 31,31,31; \
691/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
692 /* or 5,5,5; */ \
693/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
694 or 1,1,1; \
695/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \
696 or 31,31,31; \
697/* ALT_##TYPE##_SECTION_END(0, 1) */ \
698 or 1,1,1; \
699 or 1,1,1; \
700 /* Nested alt sections, else can have large else case */ \
701/* BEGIN_##TYPE##_SECTION */ \
702 /* or 2,2,2; */ \
703 /* or 2,2,2; */ \
704 /* or 2,2,2; */ \
705 /* or 2,2,2; */ \
706/* ##TYPE##_SECTION_ELSE */ \
707/* BEGIN_##TYPE##_SECTION_NESTED(94) */ \
708 /* or 5,5,5; */ \
709 /* or 5,5,5; */ \
710 /* or 5,5,5; */ \
711 /* or 5,5,5; */ \
712/* ##TYPE##_SECTION_ELSE_NESTED(94) */ \
713 or 1,1,1; \
714 or 1,1,1; \
715 or 1,1,1; \
716 or 1,1,1; \
717/* ALT_##TYPE##_SECTION_END_NESTED(0, 1, 94) */ \
718/* ALT_##TYPE##_SECTION_END(0, 1) */ \
719 or 1,1,1; \
720 or 1,1,1;
721
722MAKE_MACRO_TEST(FTR);
723MAKE_MACRO_TEST_EXPECTED(FTR);
724
725#ifdef CONFIG_PPC64
726MAKE_MACRO_TEST(FW_FTR);
727MAKE_MACRO_TEST_EXPECTED(FW_FTR);
728#endif
729
730globl(lwsync_fixup_test)
7311: or 1,1,1
732 LWSYNC
733globl(end_lwsync_fixup_test)
734
735globl(lwsync_fixup_test_expected_LWSYNC)
7361: or 1,1,1
737 lwsync
738
739globl(lwsync_fixup_test_expected_SYNC)
7401: or 1,1,1
741 sync
742
diff --git a/arch/powerpc/lib/feature-fixups.c b/arch/powerpc/lib/feature-fixups.c
new file mode 100644
index 000000000000..4e43702b9813
--- /dev/null
+++ b/arch/powerpc/lib/feature-fixups.c
@@ -0,0 +1,351 @@
1/*
2 * Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
3 *
4 * Modifications for ppc64:
5 * Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
6 *
7 * Copyright 2008 Michael Ellerman, IBM Corporation.
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; either version
12 * 2 of the License, or (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/string.h>
17#include <linux/init.h>
18#include <asm/cputable.h>
19#include <asm/code-patching.h>
20
21
22struct fixup_entry {
23 unsigned long mask;
24 unsigned long value;
25 long start_off;
26 long end_off;
27 long alt_start_off;
28 long alt_end_off;
29};
30
31static unsigned int *calc_addr(struct fixup_entry *fcur, long offset)
32{
33 /*
34 * We store the offset to the code as a negative offset from
35 * the start of the alt_entry, to support the VDSO. This
36 * routine converts that back into an actual address.
37 */
38 return (unsigned int *)((unsigned long)fcur + offset);
39}
40
41static int patch_alt_instruction(unsigned int *src, unsigned int *dest,
42 unsigned int *alt_start, unsigned int *alt_end)
43{
44 unsigned int instr;
45
46 instr = *src;
47
48 if (instr_is_relative_branch(*src)) {
49 unsigned int *target = (unsigned int *)branch_target(src);
50
51 /* Branch within the section doesn't need translating */
52 if (target < alt_start || target >= alt_end) {
53 instr = translate_branch(dest, src);
54 if (!instr)
55 return 1;
56 }
57 }
58
59 patch_instruction(dest, instr);
60
61 return 0;
62}
63
64static int patch_feature_section(unsigned long value, struct fixup_entry *fcur)
65{
66 unsigned int *start, *end, *alt_start, *alt_end, *src, *dest;
67
68 start = calc_addr(fcur, fcur->start_off);
69 end = calc_addr(fcur, fcur->end_off);
70 alt_start = calc_addr(fcur, fcur->alt_start_off);
71 alt_end = calc_addr(fcur, fcur->alt_end_off);
72
73 if ((alt_end - alt_start) > (end - start))
74 return 1;
75
76 if ((value & fcur->mask) == fcur->value)
77 return 0;
78
79 src = alt_start;
80 dest = start;
81
82 for (; src < alt_end; src++, dest++) {
83 if (patch_alt_instruction(src, dest, alt_start, alt_end))
84 return 1;
85 }
86
87 for (; dest < end; dest++)
88 patch_instruction(dest, PPC_NOP_INSTR);
89
90 return 0;
91}
92
93void do_feature_fixups(unsigned long value, void *fixup_start, void *fixup_end)
94{
95 struct fixup_entry *fcur, *fend;
96
97 fcur = fixup_start;
98 fend = fixup_end;
99
100 for (; fcur < fend; fcur++) {
101 if (patch_feature_section(value, fcur)) {
102 __WARN();
103 printk("Unable to patch feature section at %p - %p" \
104 " with %p - %p\n",
105 calc_addr(fcur, fcur->start_off),
106 calc_addr(fcur, fcur->end_off),
107 calc_addr(fcur, fcur->alt_start_off),
108 calc_addr(fcur, fcur->alt_end_off));
109 }
110 }
111}
112
113void do_lwsync_fixups(unsigned long value, void *fixup_start, void *fixup_end)
114{
115 unsigned int *start, *end, *dest;
116
117 if (!(value & CPU_FTR_LWSYNC))
118 return ;
119
120 start = fixup_start;
121 end = fixup_end;
122
123 for (; start < end; start++) {
124 dest = (void *)start + *start;
125 patch_instruction(dest, PPC_LWSYNC_INSTR);
126 }
127}
128
129#ifdef CONFIG_FTR_FIXUP_SELFTEST
130
131#define check(x) \
132 if (!(x)) printk("feature-fixups: test failed at line %d\n", __LINE__);
133
134/* This must be after the text it fixes up, vmlinux.lds.S enforces that atm */
135static struct fixup_entry fixup;
136
137static long calc_offset(struct fixup_entry *entry, unsigned int *p)
138{
139 return (unsigned long)p - (unsigned long)entry;
140}
141
142void test_basic_patching(void)
143{
144 extern unsigned int ftr_fixup_test1;
145 extern unsigned int end_ftr_fixup_test1;
146 extern unsigned int ftr_fixup_test1_orig;
147 extern unsigned int ftr_fixup_test1_expected;
148 int size = &end_ftr_fixup_test1 - &ftr_fixup_test1;
149
150 fixup.value = fixup.mask = 8;
151 fixup.start_off = calc_offset(&fixup, &ftr_fixup_test1 + 1);
152 fixup.end_off = calc_offset(&fixup, &ftr_fixup_test1 + 2);
153 fixup.alt_start_off = fixup.alt_end_off = 0;
154
155 /* Sanity check */
156 check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
157
158 /* Check we don't patch if the value matches */
159 patch_feature_section(8, &fixup);
160 check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
161
162 /* Check we do patch if the value doesn't match */
163 patch_feature_section(0, &fixup);
164 check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0);
165
166 /* Check we do patch if the mask doesn't match */
167 memcpy(&ftr_fixup_test1, &ftr_fixup_test1_orig, size);
168 check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_orig, size) == 0);
169 patch_feature_section(~8, &fixup);
170 check(memcmp(&ftr_fixup_test1, &ftr_fixup_test1_expected, size) == 0);
171}
172
173static void test_alternative_patching(void)
174{
175 extern unsigned int ftr_fixup_test2;
176 extern unsigned int end_ftr_fixup_test2;
177 extern unsigned int ftr_fixup_test2_orig;
178 extern unsigned int ftr_fixup_test2_alt;
179 extern unsigned int ftr_fixup_test2_expected;
180 int size = &end_ftr_fixup_test2 - &ftr_fixup_test2;
181
182 fixup.value = fixup.mask = 0xF;
183 fixup.start_off = calc_offset(&fixup, &ftr_fixup_test2 + 1);
184 fixup.end_off = calc_offset(&fixup, &ftr_fixup_test2 + 2);
185 fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test2_alt);
186 fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test2_alt + 1);
187
188 /* Sanity check */
189 check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
190
191 /* Check we don't patch if the value matches */
192 patch_feature_section(0xF, &fixup);
193 check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
194
195 /* Check we do patch if the value doesn't match */
196 patch_feature_section(0, &fixup);
197 check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0);
198
199 /* Check we do patch if the mask doesn't match */
200 memcpy(&ftr_fixup_test2, &ftr_fixup_test2_orig, size);
201 check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_orig, size) == 0);
202 patch_feature_section(~0xF, &fixup);
203 check(memcmp(&ftr_fixup_test2, &ftr_fixup_test2_expected, size) == 0);
204}
205
206static void test_alternative_case_too_big(void)
207{
208 extern unsigned int ftr_fixup_test3;
209 extern unsigned int end_ftr_fixup_test3;
210 extern unsigned int ftr_fixup_test3_orig;
211 extern unsigned int ftr_fixup_test3_alt;
212 int size = &end_ftr_fixup_test3 - &ftr_fixup_test3;
213
214 fixup.value = fixup.mask = 0xC;
215 fixup.start_off = calc_offset(&fixup, &ftr_fixup_test3 + 1);
216 fixup.end_off = calc_offset(&fixup, &ftr_fixup_test3 + 2);
217 fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test3_alt);
218 fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test3_alt + 2);
219
220 /* Sanity check */
221 check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
222
223 /* Expect nothing to be patched, and the error returned to us */
224 check(patch_feature_section(0xF, &fixup) == 1);
225 check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
226 check(patch_feature_section(0, &fixup) == 1);
227 check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
228 check(patch_feature_section(~0xF, &fixup) == 1);
229 check(memcmp(&ftr_fixup_test3, &ftr_fixup_test3_orig, size) == 0);
230}
231
232static void test_alternative_case_too_small(void)
233{
234 extern unsigned int ftr_fixup_test4;
235 extern unsigned int end_ftr_fixup_test4;
236 extern unsigned int ftr_fixup_test4_orig;
237 extern unsigned int ftr_fixup_test4_alt;
238 extern unsigned int ftr_fixup_test4_expected;
239 int size = &end_ftr_fixup_test4 - &ftr_fixup_test4;
240 unsigned long flag;
241
242 /* Check a high-bit flag */
243 flag = 1UL << ((sizeof(unsigned long) - 1) * 8);
244 fixup.value = fixup.mask = flag;
245 fixup.start_off = calc_offset(&fixup, &ftr_fixup_test4 + 1);
246 fixup.end_off = calc_offset(&fixup, &ftr_fixup_test4 + 5);
247 fixup.alt_start_off = calc_offset(&fixup, &ftr_fixup_test4_alt);
248 fixup.alt_end_off = calc_offset(&fixup, &ftr_fixup_test4_alt + 2);
249
250 /* Sanity check */
251 check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
252
253 /* Check we don't patch if the value matches */
254 patch_feature_section(flag, &fixup);
255 check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
256
257 /* Check we do patch if the value doesn't match */
258 patch_feature_section(0, &fixup);
259 check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0);
260
261 /* Check we do patch if the mask doesn't match */
262 memcpy(&ftr_fixup_test4, &ftr_fixup_test4_orig, size);
263 check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_orig, size) == 0);
264 patch_feature_section(~flag, &fixup);
265 check(memcmp(&ftr_fixup_test4, &ftr_fixup_test4_expected, size) == 0);
266}
267
268static void test_alternative_case_with_branch(void)
269{
270 extern unsigned int ftr_fixup_test5;
271 extern unsigned int end_ftr_fixup_test5;
272 extern unsigned int ftr_fixup_test5_expected;
273 int size = &end_ftr_fixup_test5 - &ftr_fixup_test5;
274
275 check(memcmp(&ftr_fixup_test5, &ftr_fixup_test5_expected, size) == 0);
276}
277
278static void test_alternative_case_with_external_branch(void)
279{
280 extern unsigned int ftr_fixup_test6;
281 extern unsigned int end_ftr_fixup_test6;
282 extern unsigned int ftr_fixup_test6_expected;
283 int size = &end_ftr_fixup_test6 - &ftr_fixup_test6;
284
285 check(memcmp(&ftr_fixup_test6, &ftr_fixup_test6_expected, size) == 0);
286}
287
288static void test_cpu_macros(void)
289{
290 extern void ftr_fixup_test_FTR_macros;
291 extern void ftr_fixup_test_FTR_macros_expected;
292 unsigned long size = &ftr_fixup_test_FTR_macros_expected -
293 &ftr_fixup_test_FTR_macros;
294
295 /* The fixups have already been done for us during boot */
296 check(memcmp(&ftr_fixup_test_FTR_macros,
297 &ftr_fixup_test_FTR_macros_expected, size) == 0);
298}
299
300static void test_fw_macros(void)
301{
302#ifdef CONFIG_PPC64
303 extern void ftr_fixup_test_FW_FTR_macros;
304 extern void ftr_fixup_test_FW_FTR_macros_expected;
305 unsigned long size = &ftr_fixup_test_FW_FTR_macros_expected -
306 &ftr_fixup_test_FW_FTR_macros;
307
308 /* The fixups have already been done for us during boot */
309 check(memcmp(&ftr_fixup_test_FW_FTR_macros,
310 &ftr_fixup_test_FW_FTR_macros_expected, size) == 0);
311#endif
312}
313
314static void test_lwsync_macros(void)
315{
316 extern void lwsync_fixup_test;
317 extern void end_lwsync_fixup_test;
318 extern void lwsync_fixup_test_expected_LWSYNC;
319 extern void lwsync_fixup_test_expected_SYNC;
320 unsigned long size = &end_lwsync_fixup_test -
321 &lwsync_fixup_test;
322
323 /* The fixups have already been done for us during boot */
324 if (cur_cpu_spec->cpu_features & CPU_FTR_LWSYNC) {
325 check(memcmp(&lwsync_fixup_test,
326 &lwsync_fixup_test_expected_LWSYNC, size) == 0);
327 } else {
328 check(memcmp(&lwsync_fixup_test,
329 &lwsync_fixup_test_expected_SYNC, size) == 0);
330 }
331}
332
333static int __init test_feature_fixups(void)
334{
335 printk(KERN_DEBUG "Running feature fixup self-tests ...\n");
336
337 test_basic_patching();
338 test_alternative_patching();
339 test_alternative_case_too_big();
340 test_alternative_case_too_small();
341 test_alternative_case_with_branch();
342 test_alternative_case_with_external_branch();
343 test_cpu_macros();
344 test_fw_macros();
345 test_lwsync_macros();
346
347 return 0;
348}
349late_initcall(test_feature_fixups);
350
351#endif /* CONFIG_FTR_FIXUP_SELFTEST */
diff --git a/arch/powerpc/math-emu/math.c b/arch/powerpc/math-emu/math.c
index 381306bb1590..29e545e0272e 100644
--- a/arch/powerpc/math-emu/math.c
+++ b/arch/powerpc/math-emu/math.c
@@ -230,14 +230,14 @@ do_mathemu(struct pt_regs *regs)
230 case LFD: 230 case LFD:
231 idx = (insn >> 16) & 0x1f; 231 idx = (insn >> 16) & 0x1f;
232 sdisp = (insn & 0xffff); 232 sdisp = (insn & 0xffff);
233 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 233 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
234 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 234 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
235 lfd(op0, op1, op2, op3); 235 lfd(op0, op1, op2, op3);
236 break; 236 break;
237 case LFDU: 237 case LFDU:
238 idx = (insn >> 16) & 0x1f; 238 idx = (insn >> 16) & 0x1f;
239 sdisp = (insn & 0xffff); 239 sdisp = (insn & 0xffff);
240 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 240 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
241 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 241 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
242 lfd(op0, op1, op2, op3); 242 lfd(op0, op1, op2, op3);
243 regs->gpr[idx] = (unsigned long)op1; 243 regs->gpr[idx] = (unsigned long)op1;
@@ -245,21 +245,21 @@ do_mathemu(struct pt_regs *regs)
245 case STFD: 245 case STFD:
246 idx = (insn >> 16) & 0x1f; 246 idx = (insn >> 16) & 0x1f;
247 sdisp = (insn & 0xffff); 247 sdisp = (insn & 0xffff);
248 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 248 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
249 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 249 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
250 stfd(op0, op1, op2, op3); 250 stfd(op0, op1, op2, op3);
251 break; 251 break;
252 case STFDU: 252 case STFDU:
253 idx = (insn >> 16) & 0x1f; 253 idx = (insn >> 16) & 0x1f;
254 sdisp = (insn & 0xffff); 254 sdisp = (insn & 0xffff);
255 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 255 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
256 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 256 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
257 stfd(op0, op1, op2, op3); 257 stfd(op0, op1, op2, op3);
258 regs->gpr[idx] = (unsigned long)op1; 258 regs->gpr[idx] = (unsigned long)op1;
259 break; 259 break;
260 case OP63: 260 case OP63:
261 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 261 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
262 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 262 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
263 fmr(op0, op1, op2, op3); 263 fmr(op0, op1, op2, op3);
264 break; 264 break;
265 default: 265 default:
@@ -356,28 +356,28 @@ do_mathemu(struct pt_regs *regs)
356 356
357 switch (type) { 357 switch (type) {
358 case AB: 358 case AB:
359 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 359 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
360 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 360 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
361 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 361 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
362 break; 362 break;
363 363
364 case AC: 364 case AC:
365 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 365 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
366 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 366 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
367 op2 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f]; 367 op2 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
368 break; 368 break;
369 369
370 case ABC: 370 case ABC:
371 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 371 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
372 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 372 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
373 op2 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 373 op2 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
374 op3 = (void *)&current->thread.fpr[(insn >> 6) & 0x1f]; 374 op3 = (void *)&current->thread.TS_FPR((insn >> 6) & 0x1f);
375 break; 375 break;
376 376
377 case D: 377 case D:
378 idx = (insn >> 16) & 0x1f; 378 idx = (insn >> 16) & 0x1f;
379 sdisp = (insn & 0xffff); 379 sdisp = (insn & 0xffff);
380 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 380 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
381 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp); 381 op1 = (void *)((idx ? regs->gpr[idx] : 0) + sdisp);
382 break; 382 break;
383 383
@@ -387,27 +387,27 @@ do_mathemu(struct pt_regs *regs)
387 goto illegal; 387 goto illegal;
388 388
389 sdisp = (insn & 0xffff); 389 sdisp = (insn & 0xffff);
390 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 390 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
391 op1 = (void *)(regs->gpr[idx] + sdisp); 391 op1 = (void *)(regs->gpr[idx] + sdisp);
392 break; 392 break;
393 393
394 case X: 394 case X:
395 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 395 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
396 break; 396 break;
397 397
398 case XA: 398 case XA:
399 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 399 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
400 op1 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 400 op1 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
401 break; 401 break;
402 402
403 case XB: 403 case XB:
404 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 404 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
405 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 405 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
406 break; 406 break;
407 407
408 case XE: 408 case XE:
409 idx = (insn >> 16) & 0x1f; 409 idx = (insn >> 16) & 0x1f;
410 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 410 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
411 if (!idx) { 411 if (!idx) {
412 if (((insn >> 1) & 0x3ff) == STFIWX) 412 if (((insn >> 1) & 0x3ff) == STFIWX)
413 op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]); 413 op1 = (void *)(regs->gpr[(insn >> 11) & 0x1f]);
@@ -421,7 +421,7 @@ do_mathemu(struct pt_regs *regs)
421 421
422 case XEU: 422 case XEU:
423 idx = (insn >> 16) & 0x1f; 423 idx = (insn >> 16) & 0x1f;
424 op0 = (void *)&current->thread.fpr[(insn >> 21) & 0x1f]; 424 op0 = (void *)&current->thread.TS_FPR((insn >> 21) & 0x1f);
425 op1 = (void *)((idx ? regs->gpr[idx] : 0) 425 op1 = (void *)((idx ? regs->gpr[idx] : 0)
426 + regs->gpr[(insn >> 11) & 0x1f]); 426 + regs->gpr[(insn >> 11) & 0x1f]);
427 break; 427 break;
@@ -429,8 +429,8 @@ do_mathemu(struct pt_regs *regs)
429 case XCR: 429 case XCR:
430 op0 = (void *)&regs->ccr; 430 op0 = (void *)&regs->ccr;
431 op1 = (void *)((insn >> 23) & 0x7); 431 op1 = (void *)((insn >> 23) & 0x7);
432 op2 = (void *)&current->thread.fpr[(insn >> 16) & 0x1f]; 432 op2 = (void *)&current->thread.TS_FPR((insn >> 16) & 0x1f);
433 op3 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 433 op3 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
434 break; 434 break;
435 435
436 case XCRL: 436 case XCRL:
@@ -450,7 +450,7 @@ do_mathemu(struct pt_regs *regs)
450 450
451 case XFLB: 451 case XFLB:
452 op0 = (void *)((insn >> 17) & 0xff); 452 op0 = (void *)((insn >> 17) & 0xff);
453 op1 = (void *)&current->thread.fpr[(insn >> 11) & 0x1f]; 453 op1 = (void *)&current->thread.TS_FPR((insn >> 11) & 0x1f);
454 break; 454 break;
455 455
456 default: 456 default:
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index 953fb919eb06..98052ac96580 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -27,6 +27,7 @@
27#include <asm/mmu.h> 27#include <asm/mmu.h>
28#include <asm/system.h> 28#include <asm/system.h>
29#include <asm/page.h> 29#include <asm/page.h>
30#include <asm/cacheflush.h>
30 31
31#include "mmu_decl.h" 32#include "mmu_decl.h"
32 33
@@ -37,11 +38,35 @@ unsigned int tlb_44x_index; /* = 0 */
37unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS; 38unsigned int tlb_44x_hwater = PPC44x_TLB_SIZE - 1 - PPC44x_EARLY_TLBS;
38int icache_44x_need_flush; 39int icache_44x_need_flush;
39 40
41static void __init ppc44x_update_tlb_hwater(void)
42{
43 extern unsigned int tlb_44x_patch_hwater_D[];
44 extern unsigned int tlb_44x_patch_hwater_I[];
45
46 /* The TLB miss handlers hard codes the watermark in a cmpli
47 * instruction to improve performances rather than loading it
48 * from the global variable. Thus, we patch the instructions
49 * in the 2 TLB miss handlers when updating the value
50 */
51 tlb_44x_patch_hwater_D[0] = (tlb_44x_patch_hwater_D[0] & 0xffff0000) |
52 tlb_44x_hwater;
53 flush_icache_range((unsigned long)&tlb_44x_patch_hwater_D[0],
54 (unsigned long)&tlb_44x_patch_hwater_D[1]);
55 tlb_44x_patch_hwater_I[0] = (tlb_44x_patch_hwater_I[0] & 0xffff0000) |
56 tlb_44x_hwater;
57 flush_icache_range((unsigned long)&tlb_44x_patch_hwater_I[0],
58 (unsigned long)&tlb_44x_patch_hwater_I[1]);
59}
60
40/* 61/*
41 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem 62 * "Pins" a 256MB TLB entry in AS0 for kernel lowmem
42 */ 63 */
43static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys) 64static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
44{ 65{
66 unsigned int entry = tlb_44x_hwater--;
67
68 ppc44x_update_tlb_hwater();
69
45 __asm__ __volatile__( 70 __asm__ __volatile__(
46 "tlbwe %2,%3,%4\n" 71 "tlbwe %2,%3,%4\n"
47 "tlbwe %1,%3,%5\n" 72 "tlbwe %1,%3,%5\n"
@@ -50,7 +75,7 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
50 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G), 75 : "r" (PPC44x_TLB_SW | PPC44x_TLB_SR | PPC44x_TLB_SX | PPC44x_TLB_G),
51 "r" (phys), 76 "r" (phys),
52 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M), 77 "r" (virt | PPC44x_TLB_VALID | PPC44x_TLB_256M),
53 "r" (tlb_44x_hwater--), /* slot for this TLB entry */ 78 "r" (entry),
54 "i" (PPC44x_TLB_PAGEID), 79 "i" (PPC44x_TLB_PAGEID),
55 "i" (PPC44x_TLB_XLAT), 80 "i" (PPC44x_TLB_XLAT),
56 "i" (PPC44x_TLB_ATTRIB)); 81 "i" (PPC44x_TLB_ATTRIB));
@@ -58,6 +83,8 @@ static void __init ppc44x_pin_tlb(unsigned int virt, unsigned int phys)
58 83
59void __init MMU_init_hw(void) 84void __init MMU_init_hw(void)
60{ 85{
86 ppc44x_update_tlb_hwater();
87
61 flush_instruction_cache(); 88 flush_instruction_cache();
62} 89}
63 90
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 7b2510799266..1707d00331fc 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -306,7 +306,8 @@ good_area:
306 flush_dcache_icache_page(page); 306 flush_dcache_icache_page(page);
307 set_bit(PG_arch_1, &page->flags); 307 set_bit(PG_arch_1, &page->flags);
308 } 308 }
309 pte_update(ptep, 0, _PAGE_HWEXEC); 309 pte_update(ptep, 0, _PAGE_HWEXEC |
310 _PAGE_ACCESSED);
310 _tlbie(address, mm->context.id); 311 _tlbie(address, mm->context.id);
311 pte_unmap_unlock(ptep, ptl); 312 pte_unmap_unlock(ptep, ptl);
312 up_read(&mm->mmap_sem); 313 up_read(&mm->mmap_sem);
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 70f4c833fa32..a719f53921a5 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -388,7 +388,7 @@ _GLOBAL(__hash_page_4K)
388 */ 388 */
389 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */ 389 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
390 or r30,r30,r31 390 or r30,r30,r31
391 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE 391 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
392 oris r30,r30,_PAGE_COMBO@h 392 oris r30,r30,_PAGE_COMBO@h
393 /* Write the linux PTE atomically (setting busy) */ 393 /* Write the linux PTE atomically (setting busy) */
394 stdcx. r30,0,r6 394 stdcx. r30,0,r6
@@ -468,7 +468,7 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
468 * go to out-of-line code to try to modify the HPTE. We look for 468 * go to out-of-line code to try to modify the HPTE. We look for
469 * the bit at (1 >> (index + 32)) 469 * the bit at (1 >> (index + 32))
470 */ 470 */
471 andi. r0,r31,_PAGE_HASHPTE 471 rldicl. r0,r31,64-12,48
472 li r26,0 /* Default hidx */ 472 li r26,0 /* Default hidx */
473 beq htab_insert_pte 473 beq htab_insert_pte
474 474
@@ -726,11 +726,11 @@ BEGIN_FTR_SECTION
726 bne- ht64_bail_ok 726 bne- ht64_bail_ok
727END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE) 727END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
728 /* Prepare new PTE value (turn access RW into DIRTY, then 728 /* Prepare new PTE value (turn access RW into DIRTY, then
729 * add BUSY,HASHPTE and ACCESSED) 729 * add BUSY and ACCESSED)
730 */ 730 */
731 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */ 731 rlwinm r30,r4,32-9+7,31-7,31-7 /* _PAGE_RW -> _PAGE_DIRTY */
732 or r30,r30,r31 732 or r30,r30,r31
733 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED | _PAGE_HASHPTE 733 ori r30,r30,_PAGE_BUSY | _PAGE_ACCESSED
734 /* Write the linux PTE atomically (setting busy) */ 734 /* Write the linux PTE atomically (setting busy) */
735 stdcx. r30,0,r6 735 stdcx. r30,0,r6
736 bne- 1b 736 bne- 1b
@@ -798,18 +798,21 @@ END_FTR_SECTION(CPU_FTR_NOEXECUTE|CPU_FTR_COHERENT_ICACHE, CPU_FTR_NOEXECUTE)
798 /* Check if we may already be in the hashtable, in this case, we 798 /* Check if we may already be in the hashtable, in this case, we
799 * go to out-of-line code to try to modify the HPTE 799 * go to out-of-line code to try to modify the HPTE
800 */ 800 */
801 andi. r0,r31,_PAGE_HASHPTE 801 rldicl. r0,r31,64-12,48
802 bne ht64_modify_pte 802 bne ht64_modify_pte
803 803
804ht64_insert_pte: 804ht64_insert_pte:
805 /* Clear hpte bits in new pte (we also clear BUSY btw) and 805 /* Clear hpte bits in new pte (we also clear BUSY btw) and
806 * add _PAGE_HASHPTE 806 * add _PAGE_HPTE_SUB0
807 */ 807 */
808 lis r0,_PAGE_HPTEFLAGS@h 808 lis r0,_PAGE_HPTEFLAGS@h
809 ori r0,r0,_PAGE_HPTEFLAGS@l 809 ori r0,r0,_PAGE_HPTEFLAGS@l
810 andc r30,r30,r0 810 andc r30,r30,r0
811#ifdef CONFIG_PPC_64K_PAGES
812 oris r30,r30,_PAGE_HPTE_SUB0@h
813#else
811 ori r30,r30,_PAGE_HASHPTE 814 ori r30,r30,_PAGE_HASHPTE
812 815#endif
813 /* Phyical address in r5 */ 816 /* Phyical address in r5 */
814 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT 817 rldicl r5,r31,64-PTE_RPN_SHIFT,PTE_RPN_SHIFT
815 sldi r5,r5,PAGE_SHIFT 818 sldi r5,r5,PAGE_SHIFT
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 0f2d239d94c4..8d3b58ebd38e 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -120,7 +120,7 @@ static DEFINE_SPINLOCK(linear_map_hash_lock);
120 120
121/* Pre-POWER4 CPUs (4k pages only) 121/* Pre-POWER4 CPUs (4k pages only)
122 */ 122 */
123struct mmu_psize_def mmu_psize_defaults_old[] = { 123static struct mmu_psize_def mmu_psize_defaults_old[] = {
124 [MMU_PAGE_4K] = { 124 [MMU_PAGE_4K] = {
125 .shift = 12, 125 .shift = 12,
126 .sllp = 0, 126 .sllp = 0,
@@ -134,7 +134,7 @@ struct mmu_psize_def mmu_psize_defaults_old[] = {
134 * 134 *
135 * Support for 16Mb large pages 135 * Support for 16Mb large pages
136 */ 136 */
137struct mmu_psize_def mmu_psize_defaults_gp[] = { 137static struct mmu_psize_def mmu_psize_defaults_gp[] = {
138 [MMU_PAGE_4K] = { 138 [MMU_PAGE_4K] = {
139 .shift = 12, 139 .shift = 12,
140 .sllp = 0, 140 .sllp = 0,
@@ -533,8 +533,6 @@ void __init htab_initialize(void)
533 unsigned long base = 0, size = 0, limit; 533 unsigned long base = 0, size = 0, limit;
534 int i; 534 int i;
535 535
536 extern unsigned long tce_alloc_start, tce_alloc_end;
537
538 DBG(" -> htab_initialize()\n"); 536 DBG(" -> htab_initialize()\n");
539 537
540 /* Initialize segment sizes */ 538 /* Initialize segment sizes */
@@ -697,6 +695,28 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)
697 return pp; 695 return pp;
698} 696}
699 697
698#ifdef CONFIG_PPC_MM_SLICES
699unsigned int get_paca_psize(unsigned long addr)
700{
701 unsigned long index, slices;
702
703 if (addr < SLICE_LOW_TOP) {
704 slices = get_paca()->context.low_slices_psize;
705 index = GET_LOW_SLICE_INDEX(addr);
706 } else {
707 slices = get_paca()->context.high_slices_psize;
708 index = GET_HIGH_SLICE_INDEX(addr);
709 }
710 return (slices >> (index * 4)) & 0xF;
711}
712
713#else
714unsigned int get_paca_psize(unsigned long addr)
715{
716 return get_paca()->context.user_psize;
717}
718#endif
719
700/* 720/*
701 * Demote a segment to using 4k pages. 721 * Demote a segment to using 4k pages.
702 * For now this makes the whole process use 4k pages. 722 * For now this makes the whole process use 4k pages.
@@ -704,13 +724,13 @@ unsigned int hash_page_do_lazy_icache(unsigned int pp, pte_t pte, int trap)
704#ifdef CONFIG_PPC_64K_PAGES 724#ifdef CONFIG_PPC_64K_PAGES
705void demote_segment_4k(struct mm_struct *mm, unsigned long addr) 725void demote_segment_4k(struct mm_struct *mm, unsigned long addr)
706{ 726{
707 if (mm->context.user_psize == MMU_PAGE_4K) 727 if (get_slice_psize(mm, addr) == MMU_PAGE_4K)
708 return; 728 return;
709 slice_set_user_psize(mm, MMU_PAGE_4K); 729 slice_set_range_psize(mm, addr, 1, MMU_PAGE_4K);
710#ifdef CONFIG_SPU_BASE 730#ifdef CONFIG_SPU_BASE
711 spu_flush_all_slbs(mm); 731 spu_flush_all_slbs(mm);
712#endif 732#endif
713 if (get_paca()->context.user_psize != MMU_PAGE_4K) { 733 if (get_paca_psize(addr) != MMU_PAGE_4K) {
714 get_paca()->context = mm->context; 734 get_paca()->context = mm->context;
715 slb_flush_and_rebolt(); 735 slb_flush_and_rebolt();
716 } 736 }
@@ -794,11 +814,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
794 DBG_LOW(" user region with no mm !\n"); 814 DBG_LOW(" user region with no mm !\n");
795 return 1; 815 return 1;
796 } 816 }
797#ifdef CONFIG_PPC_MM_SLICES
798 psize = get_slice_psize(mm, ea); 817 psize = get_slice_psize(mm, ea);
799#else
800 psize = mm->context.user_psize;
801#endif
802 ssize = user_segment_size(ea); 818 ssize = user_segment_size(ea);
803 vsid = get_vsid(mm->context.id, ea, ssize); 819 vsid = get_vsid(mm->context.id, ea, ssize);
804 break; 820 break;
@@ -870,7 +886,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
870 /* Do actual hashing */ 886 /* Do actual hashing */
871#ifdef CONFIG_PPC_64K_PAGES 887#ifdef CONFIG_PPC_64K_PAGES
872 /* If _PAGE_4K_PFN is set, make sure this is a 4k segment */ 888 /* If _PAGE_4K_PFN is set, make sure this is a 4k segment */
873 if (pte_val(*ptep) & _PAGE_4K_PFN) { 889 if ((pte_val(*ptep) & _PAGE_4K_PFN) && psize == MMU_PAGE_64K) {
874 demote_segment_4k(mm, ea); 890 demote_segment_4k(mm, ea);
875 psize = MMU_PAGE_4K; 891 psize = MMU_PAGE_4K;
876 } 892 }
@@ -899,7 +915,7 @@ int hash_page(unsigned long ea, unsigned long access, unsigned long trap)
899 } 915 }
900 } 916 }
901 if (user_region) { 917 if (user_region) {
902 if (psize != get_paca()->context.user_psize) { 918 if (psize != get_paca_psize(ea)) {
903 get_paca()->context = mm->context; 919 get_paca()->context = mm->context;
904 slb_flush_and_rebolt(); 920 slb_flush_and_rebolt();
905 } 921 }
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index a02266dad215..0d12fba31bc5 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -458,8 +458,7 @@ int hash_huge_page(struct mm_struct *mm, unsigned long access,
458 old_pte = pte_val(*ptep); 458 old_pte = pte_val(*ptep);
459 if (old_pte & _PAGE_BUSY) 459 if (old_pte & _PAGE_BUSY)
460 goto out; 460 goto out;
461 new_pte = old_pte | _PAGE_BUSY | 461 new_pte = old_pte | _PAGE_BUSY | _PAGE_ACCESSED;
462 _PAGE_ACCESSED | _PAGE_HASHPTE;
463 } while(old_pte != __cmpxchg_u64((unsigned long *)ptep, 462 } while(old_pte != __cmpxchg_u64((unsigned long *)ptep,
464 old_pte, new_pte)); 463 old_pte, new_pte));
465 464
@@ -499,12 +498,14 @@ repeat:
499 HPTES_PER_GROUP) & ~0x7UL; 498 HPTES_PER_GROUP) & ~0x7UL;
500 499
501 /* clear HPTE slot informations in new PTE */ 500 /* clear HPTE slot informations in new PTE */
501#ifdef CONFIG_PPC_64K_PAGES
502 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HPTE_SUB0;
503#else
502 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE; 504 new_pte = (new_pte & ~_PAGE_HPTEFLAGS) | _PAGE_HASHPTE;
503 505#endif
504 /* Add in WIMG bits */ 506 /* Add in WIMG bits */
505 /* XXX We should store these in the pte */ 507 rflags |= (new_pte & (_PAGE_WRITETHRU | _PAGE_NO_CACHE |
506 /* --BenH: I think they are ... */ 508 _PAGE_COHERENT | _PAGE_GUARDED));
507 rflags |= _PAGE_COHERENT;
508 509
509 /* Insert into the hash table, primary slot */ 510 /* Insert into the hash table, primary slot */
510 slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0, 511 slot = ppc_md.hpte_insert(hpte_group, va, pa, rflags, 0,
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 1952b4d3fa7f..388ceda632f3 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -43,6 +43,7 @@
43#include <asm/btext.h> 43#include <asm/btext.h>
44#include <asm/tlb.h> 44#include <asm/tlb.h>
45#include <asm/sections.h> 45#include <asm/sections.h>
46#include <asm/system.h>
46 47
47#include "mmu_decl.h" 48#include "mmu_decl.h"
48 49
@@ -56,8 +57,8 @@
56 57
57DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 58DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
58 59
59unsigned long total_memory; 60phys_addr_t total_memory;
60unsigned long total_lowmem; 61phys_addr_t total_lowmem;
61 62
62phys_addr_t memstart_addr = (phys_addr_t)~0ull; 63phys_addr_t memstart_addr = (phys_addr_t)~0ull;
63EXPORT_SYMBOL(memstart_addr); 64EXPORT_SYMBOL(memstart_addr);
@@ -76,8 +77,6 @@ void MMU_init(void);
76/* XXX should be in current.h -- paulus */ 77/* XXX should be in current.h -- paulus */
77extern struct task_struct *current_set[NR_CPUS]; 78extern struct task_struct *current_set[NR_CPUS];
78 79
79extern int init_bootmem_done;
80
81/* 80/*
82 * this tells the system to map all of ram with the segregs 81 * this tells the system to map all of ram with the segregs
83 * (i.e. page tables) instead of the bats. 82 * (i.e. page tables) instead of the bats.
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index 6aa65375abf5..6ef63caca682 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -185,7 +185,7 @@ void pgtable_cache_init(void)
185 * do this by hand as the proffered address may not be correctly aligned. 185 * do this by hand as the proffered address may not be correctly aligned.
186 * Subtraction of non-aligned pointers produces undefined results. 186 * Subtraction of non-aligned pointers produces undefined results.
187 */ 187 */
188unsigned long __meminit vmemmap_section_start(unsigned long page) 188static unsigned long __meminit vmemmap_section_start(unsigned long page)
189{ 189{
190 unsigned long offset = page - ((unsigned long)(vmemmap)); 190 unsigned long offset = page - ((unsigned long)(vmemmap));
191 191
@@ -198,7 +198,7 @@ unsigned long __meminit vmemmap_section_start(unsigned long page)
198 * which overlaps this vmemmap page is initialised then this page is 198 * which overlaps this vmemmap page is initialised then this page is
199 * initialised already. 199 * initialised already.
200 */ 200 */
201int __meminit vmemmap_populated(unsigned long start, int page_size) 201static int __meminit vmemmap_populated(unsigned long start, int page_size)
202{ 202{
203 unsigned long end = start + page_size; 203 unsigned long end = start + page_size;
204 204
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 51f82d83bf14..1ca2235f0965 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -44,6 +44,7 @@
44#include <asm/btext.h> 44#include <asm/btext.h>
45#include <asm/tlb.h> 45#include <asm/tlb.h>
46#include <asm/sections.h> 46#include <asm/sections.h>
47#include <asm/sparsemem.h>
47#include <asm/vdso.h> 48#include <asm/vdso.h>
48#include <asm/fixmap.h> 49#include <asm/fixmap.h>
49 50
@@ -329,7 +330,7 @@ static int __init mark_nonram_nosave(void)
329void __init paging_init(void) 330void __init paging_init(void)
330{ 331{
331 unsigned long total_ram = lmb_phys_mem_size(); 332 unsigned long total_ram = lmb_phys_mem_size();
332 unsigned long top_of_ram = lmb_end_of_DRAM(); 333 phys_addr_t top_of_ram = lmb_end_of_DRAM();
333 unsigned long max_zone_pfns[MAX_NR_ZONES]; 334 unsigned long max_zone_pfns[MAX_NR_ZONES];
334 335
335#ifdef CONFIG_PPC32 336#ifdef CONFIG_PPC32
@@ -348,10 +349,10 @@ void __init paging_init(void)
348 kmap_prot = PAGE_KERNEL; 349 kmap_prot = PAGE_KERNEL;
349#endif /* CONFIG_HIGHMEM */ 350#endif /* CONFIG_HIGHMEM */
350 351
351 printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n", 352 printk(KERN_DEBUG "Top of RAM: 0x%llx, Total RAM: 0x%lx\n",
352 top_of_ram, total_ram); 353 (u64)top_of_ram, total_ram);
353 printk(KERN_DEBUG "Memory hole size: %ldMB\n", 354 printk(KERN_DEBUG "Memory hole size: %ldMB\n",
354 (top_of_ram - total_ram) >> 20); 355 (long int)((top_of_ram - total_ram) >> 20));
355 memset(max_zone_pfns, 0, sizeof(max_zone_pfns)); 356 memset(max_zone_pfns, 0, sizeof(max_zone_pfns));
356#ifdef CONFIG_HIGHMEM 357#ifdef CONFIG_HIGHMEM
357 max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT; 358 max_zone_pfns[ZONE_DMA] = lowmem_end_addr >> PAGE_SHIFT;
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 04802252a64f..fab3cfad4099 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -29,7 +29,7 @@ extern void hash_preload(struct mm_struct *mm, unsigned long ea,
29#ifdef CONFIG_PPC32 29#ifdef CONFIG_PPC32
30extern void mapin_ram(void); 30extern void mapin_ram(void);
31extern int map_page(unsigned long va, phys_addr_t pa, int flags); 31extern int map_page(unsigned long va, phys_addr_t pa, int flags);
32extern void setbat(int index, unsigned long virt, unsigned long phys, 32extern void setbat(int index, unsigned long virt, phys_addr_t phys,
33 unsigned int size, int flags); 33 unsigned int size, int flags);
34extern void settlbcam(int index, unsigned long virt, phys_addr_t phys, 34extern void settlbcam(int index, unsigned long virt, phys_addr_t phys,
35 unsigned int size, int flags, unsigned int pid); 35 unsigned int size, int flags, unsigned int pid);
@@ -49,8 +49,8 @@ extern unsigned int num_tlbcam_entries;
49extern unsigned long ioremap_bot; 49extern unsigned long ioremap_bot;
50extern unsigned long __max_low_memory; 50extern unsigned long __max_low_memory;
51extern phys_addr_t __initial_memory_limit_addr; 51extern phys_addr_t __initial_memory_limit_addr;
52extern unsigned long total_memory; 52extern phys_addr_t total_memory;
53extern unsigned long total_lowmem; 53extern phys_addr_t total_lowmem;
54extern phys_addr_t memstart_addr; 54extern phys_addr_t memstart_addr;
55extern phys_addr_t lowmem_end_addr; 55extern phys_addr_t lowmem_end_addr;
56 56
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index dc704da363eb..cf4bffba6f7c 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -268,6 +268,144 @@ static unsigned long __devinit read_n_cells(int n, const unsigned int **buf)
268 return result; 268 return result;
269} 269}
270 270
271struct of_drconf_cell {
272 u64 base_addr;
273 u32 drc_index;
274 u32 reserved;
275 u32 aa_index;
276 u32 flags;
277};
278
279#define DRCONF_MEM_ASSIGNED 0x00000008
280#define DRCONF_MEM_AI_INVALID 0x00000040
281#define DRCONF_MEM_RESERVED 0x00000080
282
283/*
284 * Read the next lmb list entry from the ibm,dynamic-memory property
285 * and return the information in the provided of_drconf_cell structure.
286 */
287static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp)
288{
289 const u32 *cp;
290
291 drmem->base_addr = read_n_cells(n_mem_addr_cells, cellp);
292
293 cp = *cellp;
294 drmem->drc_index = cp[0];
295 drmem->reserved = cp[1];
296 drmem->aa_index = cp[2];
297 drmem->flags = cp[3];
298
299 *cellp = cp + 4;
300}
301
302/*
303 * Retreive and validate the ibm,dynamic-memory property of the device tree.
304 *
305 * The layout of the ibm,dynamic-memory property is a number N of lmb
306 * list entries followed by N lmb list entries. Each lmb list entry
307 * contains information as layed out in the of_drconf_cell struct above.
308 */
309static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
310{
311 const u32 *prop;
312 u32 len, entries;
313
314 prop = of_get_property(memory, "ibm,dynamic-memory", &len);
315 if (!prop || len < sizeof(unsigned int))
316 return 0;
317
318 entries = *prop++;
319
320 /* Now that we know the number of entries, revalidate the size
321 * of the property read in to ensure we have everything
322 */
323 if (len < (entries * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int))
324 return 0;
325
326 *dm = prop;
327 return entries;
328}
329
330/*
331 * Retreive and validate the ibm,lmb-size property for drconf memory
332 * from the device tree.
333 */
334static u64 of_get_lmb_size(struct device_node *memory)
335{
336 const u32 *prop;
337 u32 len;
338
339 prop = of_get_property(memory, "ibm,lmb-size", &len);
340 if (!prop || len < sizeof(unsigned int))
341 return 0;
342
343 return read_n_cells(n_mem_size_cells, &prop);
344}
345
346struct assoc_arrays {
347 u32 n_arrays;
348 u32 array_sz;
349 const u32 *arrays;
350};
351
352/*
353 * Retreive and validate the list of associativity arrays for drconf
354 * memory from the ibm,associativity-lookup-arrays property of the
355 * device tree..
356 *
357 * The layout of the ibm,associativity-lookup-arrays property is a number N
358 * indicating the number of associativity arrays, followed by a number M
359 * indicating the size of each associativity array, followed by a list
360 * of N associativity arrays.
361 */
362static int of_get_assoc_arrays(struct device_node *memory,
363 struct assoc_arrays *aa)
364{
365 const u32 *prop;
366 u32 len;
367
368 prop = of_get_property(memory, "ibm,associativity-lookup-arrays", &len);
369 if (!prop || len < 2 * sizeof(unsigned int))
370 return -1;
371
372 aa->n_arrays = *prop++;
373 aa->array_sz = *prop++;
374
375 /* Now that we know the number of arrrays and size of each array,
376 * revalidate the size of the property read in.
377 */
378 if (len < (aa->n_arrays * aa->array_sz + 2) * sizeof(unsigned int))
379 return -1;
380
381 aa->arrays = prop;
382 return 0;
383}
384
385/*
386 * This is like of_node_to_nid_single() for memory represented in the
387 * ibm,dynamic-reconfiguration-memory node.
388 */
389static int of_drconf_to_nid_single(struct of_drconf_cell *drmem,
390 struct assoc_arrays *aa)
391{
392 int default_nid = 0;
393 int nid = default_nid;
394 int index;
395
396 if (min_common_depth > 0 && min_common_depth <= aa->array_sz &&
397 !(drmem->flags & DRCONF_MEM_AI_INVALID) &&
398 drmem->aa_index < aa->n_arrays) {
399 index = drmem->aa_index * aa->array_sz + min_common_depth - 1;
400 nid = aa->arrays[index];
401
402 if (nid == 0xffff || nid >= MAX_NUMNODES)
403 nid = default_nid;
404 }
405
406 return nid;
407}
408
271/* 409/*
272 * Figure out to which domain a cpu belongs and stick it there. 410 * Figure out to which domain a cpu belongs and stick it there.
273 * Return the id of the domain used. 411 * Return the id of the domain used.
@@ -355,57 +493,50 @@ static unsigned long __init numa_enforce_memory_limit(unsigned long start,
355 */ 493 */
356static void __init parse_drconf_memory(struct device_node *memory) 494static void __init parse_drconf_memory(struct device_node *memory)
357{ 495{
358 const unsigned int *lm, *dm, *aa; 496 const u32 *dm;
359 unsigned int ls, ld, la; 497 unsigned int n, rc;
360 unsigned int n, aam, aalen; 498 unsigned long lmb_size, size;
361 unsigned long lmb_size, size, start; 499 int nid;
362 int nid, default_nid = 0; 500 struct assoc_arrays aa;
363 unsigned int ai, flags; 501
364 502 n = of_get_drconf_memory(memory, &dm);
365 lm = of_get_property(memory, "ibm,lmb-size", &ls); 503 if (!n)
366 dm = of_get_property(memory, "ibm,dynamic-memory", &ld); 504 return;
367 aa = of_get_property(memory, "ibm,associativity-lookup-arrays", &la); 505
368 if (!lm || !dm || !aa || 506 lmb_size = of_get_lmb_size(memory);
369 ls < sizeof(unsigned int) || ld < sizeof(unsigned int) || 507 if (!lmb_size)
370 la < 2 * sizeof(unsigned int))
371 return; 508 return;
372 509
373 lmb_size = read_n_cells(n_mem_size_cells, &lm); 510 rc = of_get_assoc_arrays(memory, &aa);
374 n = *dm++; /* number of LMBs */ 511 if (rc)
375 aam = *aa++; /* number of associativity lists */
376 aalen = *aa++; /* length of each associativity list */
377 if (ld < (n * (n_mem_addr_cells + 4) + 1) * sizeof(unsigned int) ||
378 la < (aam * aalen + 2) * sizeof(unsigned int))
379 return; 512 return;
380 513
381 for (; n != 0; --n) { 514 for (; n != 0; --n) {
382 start = read_n_cells(n_mem_addr_cells, &dm); 515 struct of_drconf_cell drmem;
383 ai = dm[2]; 516
384 flags = dm[3]; 517 read_drconf_cell(&drmem, &dm);
385 dm += 4; 518
386 /* 0x80 == reserved, 0x8 = assigned to us */ 519 /* skip this block if the reserved bit is set in flags (0x80)
387 if ((flags & 0x80) || !(flags & 0x8)) 520 or if the block is not assigned to this partition (0x8) */
521 if ((drmem.flags & DRCONF_MEM_RESERVED)
522 || !(drmem.flags & DRCONF_MEM_ASSIGNED))
388 continue; 523 continue;
389 nid = default_nid;
390 /* flags & 0x40 means associativity index is invalid */
391 if (min_common_depth > 0 && min_common_depth <= aalen &&
392 (flags & 0x40) == 0 && ai < aam) {
393 /* this is like of_node_to_nid_single */
394 nid = aa[ai * aalen + min_common_depth - 1];
395 if (nid == 0xffff || nid >= MAX_NUMNODES)
396 nid = default_nid;
397 }
398 524
399 fake_numa_create_new_node(((start + lmb_size) >> PAGE_SHIFT), 525 nid = of_drconf_to_nid_single(&drmem, &aa);
400 &nid); 526
527 fake_numa_create_new_node(
528 ((drmem.base_addr + lmb_size) >> PAGE_SHIFT),
529 &nid);
530
401 node_set_online(nid); 531 node_set_online(nid);
402 532
403 size = numa_enforce_memory_limit(start, lmb_size); 533 size = numa_enforce_memory_limit(drmem.base_addr, lmb_size);
404 if (!size) 534 if (!size)
405 continue; 535 continue;
406 536
407 add_active_range(nid, start >> PAGE_SHIFT, 537 add_active_range(nid, drmem.base_addr >> PAGE_SHIFT,
408 (start >> PAGE_SHIFT) + (size >> PAGE_SHIFT)); 538 (drmem.base_addr >> PAGE_SHIFT)
539 + (size >> PAGE_SHIFT));
409 } 540 }
410} 541}
411 542
@@ -770,6 +901,79 @@ early_param("numa", early_numa);
770 901
771#ifdef CONFIG_MEMORY_HOTPLUG 902#ifdef CONFIG_MEMORY_HOTPLUG
772/* 903/*
904 * Validate the node associated with the memory section we are
905 * trying to add.
906 */
907int valid_hot_add_scn(int *nid, unsigned long start, u32 lmb_size,
908 unsigned long scn_addr)
909{
910 nodemask_t nodes;
911
912 if (*nid < 0 || !node_online(*nid))
913 *nid = any_online_node(NODE_MASK_ALL);
914
915 if ((scn_addr >= start) && (scn_addr < (start + lmb_size))) {
916 nodes_setall(nodes);
917 while (NODE_DATA(*nid)->node_spanned_pages == 0) {
918 node_clear(*nid, nodes);
919 *nid = any_online_node(nodes);
920 }
921
922 return 1;
923 }
924
925 return 0;
926}
927
928/*
929 * Find the node associated with a hot added memory section represented
930 * by the ibm,dynamic-reconfiguration-memory node.
931 */
932static int hot_add_drconf_scn_to_nid(struct device_node *memory,
933 unsigned long scn_addr)
934{
935 const u32 *dm;
936 unsigned int n, rc;
937 unsigned long lmb_size;
938 int default_nid = any_online_node(NODE_MASK_ALL);
939 int nid;
940 struct assoc_arrays aa;
941
942 n = of_get_drconf_memory(memory, &dm);
943 if (!n)
944 return default_nid;;
945
946 lmb_size = of_get_lmb_size(memory);
947 if (!lmb_size)
948 return default_nid;
949
950 rc = of_get_assoc_arrays(memory, &aa);
951 if (rc)
952 return default_nid;
953
954 for (; n != 0; --n) {
955 struct of_drconf_cell drmem;
956
957 read_drconf_cell(&drmem, &dm);
958
959 /* skip this block if it is reserved or not assigned to
960 * this partition */
961 if ((drmem.flags & DRCONF_MEM_RESERVED)
962 || !(drmem.flags & DRCONF_MEM_ASSIGNED))
963 continue;
964
965 nid = of_drconf_to_nid_single(&drmem, &aa);
966
967 if (valid_hot_add_scn(&nid, drmem.base_addr, lmb_size,
968 scn_addr))
969 return nid;
970 }
971
972 BUG(); /* section address should be found above */
973 return 0;
974}
975
976/*
773 * Find the node associated with a hot added memory section. Section 977 * Find the node associated with a hot added memory section. Section
774 * corresponds to a SPARSEMEM section, not an LMB. It is assumed that 978 * corresponds to a SPARSEMEM section, not an LMB. It is assumed that
775 * sections are fully contained within a single LMB. 979 * sections are fully contained within a single LMB.
@@ -777,12 +981,17 @@ early_param("numa", early_numa);
777int hot_add_scn_to_nid(unsigned long scn_addr) 981int hot_add_scn_to_nid(unsigned long scn_addr)
778{ 982{
779 struct device_node *memory = NULL; 983 struct device_node *memory = NULL;
780 nodemask_t nodes;
781 int default_nid = any_online_node(NODE_MASK_ALL);
782 int nid; 984 int nid;
783 985
784 if (!numa_enabled || (min_common_depth < 0)) 986 if (!numa_enabled || (min_common_depth < 0))
785 return default_nid; 987 return any_online_node(NODE_MASK_ALL);
988
989 memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
990 if (memory) {
991 nid = hot_add_drconf_scn_to_nid(memory, scn_addr);
992 of_node_put(memory);
993 return nid;
994 }
786 995
787 while ((memory = of_find_node_by_type(memory, "memory")) != NULL) { 996 while ((memory = of_find_node_by_type(memory, "memory")) != NULL) {
788 unsigned long start, size; 997 unsigned long start, size;
@@ -801,13 +1010,9 @@ ha_new_range:
801 size = read_n_cells(n_mem_size_cells, &memcell_buf); 1010 size = read_n_cells(n_mem_size_cells, &memcell_buf);
802 nid = of_node_to_nid_single(memory); 1011 nid = of_node_to_nid_single(memory);
803 1012
804 /* Domains not present at boot default to 0 */ 1013 if (valid_hot_add_scn(&nid, start, size, scn_addr)) {
805 if (nid < 0 || !node_online(nid))
806 nid = default_nid;
807
808 if ((scn_addr >= start) && (scn_addr < (start + size))) {
809 of_node_put(memory); 1014 of_node_put(memory);
810 goto got_nid; 1015 return nid;
811 } 1016 }
812 1017
813 if (--ranges) /* process all ranges in cell */ 1018 if (--ranges) /* process all ranges in cell */
@@ -815,14 +1020,5 @@ ha_new_range:
815 } 1020 }
816 BUG(); /* section address should be found above */ 1021 BUG(); /* section address should be found above */
817 return 0; 1022 return 0;
818
819 /* Temporary code to ensure that returned node is not empty */
820got_nid:
821 nodes_setall(nodes);
822 while (NODE_DATA(nid)->node_spanned_pages == 0) {
823 node_clear(nid, nodes);
824 nid = any_online_node(nodes);
825 }
826 return nid;
827} 1023}
828#endif /* CONFIG_MEMORY_HOTPLUG */ 1024#endif /* CONFIG_MEMORY_HOTPLUG */
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index e0ff59f21135..c7584072dfcc 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -53,9 +53,9 @@ extern void hash_page_sync(void);
53#endif 53#endif
54 54
55#ifdef HAVE_BATS 55#ifdef HAVE_BATS
56extern unsigned long v_mapped_by_bats(unsigned long va); 56extern phys_addr_t v_mapped_by_bats(unsigned long va);
57extern unsigned long p_mapped_by_bats(unsigned long pa); 57extern unsigned long p_mapped_by_bats(phys_addr_t pa);
58void setbat(int index, unsigned long virt, unsigned long phys, 58void setbat(int index, unsigned long virt, phys_addr_t phys,
59 unsigned int size, int flags); 59 unsigned int size, int flags);
60 60
61#else /* !HAVE_BATS */ 61#else /* !HAVE_BATS */
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index cef9f156874b..c53145f61942 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -38,21 +38,18 @@ struct hash_pte *Hash, *Hash_end;
38unsigned long Hash_size, Hash_mask; 38unsigned long Hash_size, Hash_mask;
39unsigned long _SDR1; 39unsigned long _SDR1;
40 40
41union ubat { /* BAT register values to be loaded */ 41struct ppc_bat BATS[8][2]; /* 8 pairs of IBAT, DBAT */
42 struct ppc_bat bat;
43 u32 word[2];
44} BATS[8][2]; /* 8 pairs of IBAT, DBAT */
45 42
46struct batrange { /* stores address ranges mapped by BATs */ 43struct batrange { /* stores address ranges mapped by BATs */
47 unsigned long start; 44 unsigned long start;
48 unsigned long limit; 45 unsigned long limit;
49 unsigned long phys; 46 phys_addr_t phys;
50} bat_addrs[8]; 47} bat_addrs[8];
51 48
52/* 49/*
53 * Return PA for this VA if it is mapped by a BAT, or 0 50 * Return PA for this VA if it is mapped by a BAT, or 0
54 */ 51 */
55unsigned long v_mapped_by_bats(unsigned long va) 52phys_addr_t v_mapped_by_bats(unsigned long va)
56{ 53{
57 int b; 54 int b;
58 for (b = 0; b < 4; ++b) 55 for (b = 0; b < 4; ++b)
@@ -64,7 +61,7 @@ unsigned long v_mapped_by_bats(unsigned long va)
64/* 61/*
65 * Return VA for a given PA or 0 if not mapped 62 * Return VA for a given PA or 0 if not mapped
66 */ 63 */
67unsigned long p_mapped_by_bats(unsigned long pa) 64unsigned long p_mapped_by_bats(phys_addr_t pa)
68{ 65{
69 int b; 66 int b;
70 for (b = 0; b < 4; ++b) 67 for (b = 0; b < 4; ++b)
@@ -119,12 +116,12 @@ unsigned long __init mmu_mapin_ram(void)
119 * The parameters are not checked; in particular size must be a power 116 * The parameters are not checked; in particular size must be a power
120 * of 2 between 128k and 256M. 117 * of 2 between 128k and 256M.
121 */ 118 */
122void __init setbat(int index, unsigned long virt, unsigned long phys, 119void __init setbat(int index, unsigned long virt, phys_addr_t phys,
123 unsigned int size, int flags) 120 unsigned int size, int flags)
124{ 121{
125 unsigned int bl; 122 unsigned int bl;
126 int wimgxpp; 123 int wimgxpp;
127 union ubat *bat = BATS[index]; 124 struct ppc_bat *bat = BATS[index];
128 125
129 if (((flags & _PAGE_NO_CACHE) == 0) && 126 if (((flags & _PAGE_NO_CACHE) == 0) &&
130 cpu_has_feature(CPU_FTR_NEED_COHERENT)) 127 cpu_has_feature(CPU_FTR_NEED_COHERENT))
@@ -137,15 +134,15 @@ void __init setbat(int index, unsigned long virt, unsigned long phys,
137 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE 134 wimgxpp = flags & (_PAGE_WRITETHRU | _PAGE_NO_CACHE
138 | _PAGE_COHERENT | _PAGE_GUARDED); 135 | _PAGE_COHERENT | _PAGE_GUARDED);
139 wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX; 136 wimgxpp |= (flags & _PAGE_RW)? BPP_RW: BPP_RX;
140 bat[1].word[0] = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */ 137 bat[1].batu = virt | (bl << 2) | 2; /* Vs=1, Vp=0 */
141 bat[1].word[1] = phys | wimgxpp; 138 bat[1].batl = BAT_PHYS_ADDR(phys) | wimgxpp;
142#ifndef CONFIG_KGDB /* want user access for breakpoints */ 139#ifndef CONFIG_KGDB /* want user access for breakpoints */
143 if (flags & _PAGE_USER) 140 if (flags & _PAGE_USER)
144#endif 141#endif
145 bat[1].bat.batu.vp = 1; 142 bat[1].batu |= 1; /* Vp = 1 */
146 if (flags & _PAGE_GUARDED) { 143 if (flags & _PAGE_GUARDED) {
147 /* G bit must be zero in IBATs */ 144 /* G bit must be zero in IBATs */
148 bat[0].word[0] = bat[0].word[1] = 0; 145 bat[0].batu = bat[0].batl = 0;
149 } else { 146 } else {
150 /* make IBAT same as DBAT */ 147 /* make IBAT same as DBAT */
151 bat[0] = bat[1]; 148 bat[0] = bat[1];
@@ -158,8 +155,8 @@ void __init setbat(int index, unsigned long virt, unsigned long phys,
158 | _PAGE_COHERENT); 155 | _PAGE_COHERENT);
159 wimgxpp |= (flags & _PAGE_RW)? 156 wimgxpp |= (flags & _PAGE_RW)?
160 ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX; 157 ((flags & _PAGE_USER)? PP_RWRW: PP_RWXX): PP_RXRX;
161 bat->word[0] = virt | wimgxpp | 4; /* Ks=0, Ku=1 */ 158 bat->batu = virt | wimgxpp | 4; /* Ks=0, Ku=1 */
162 bat->word[1] = phys | bl | 0x40; /* V=1 */ 159 bat->batl = phys | bl | 0x40; /* V=1 */
163 } 160 }
164 161
165 bat_addrs[index].start = virt; 162 bat_addrs[index].start = virt;
diff --git a/arch/powerpc/mm/slice.c b/arch/powerpc/mm/slice.c
index 2bd12d965db1..db44e02e045b 100644
--- a/arch/powerpc/mm/slice.c
+++ b/arch/powerpc/mm/slice.c
@@ -215,10 +215,7 @@ static void slice_convert(struct mm_struct *mm, struct slice_mask mask, int psiz
215 mm->context.high_slices_psize); 215 mm->context.high_slices_psize);
216 216
217 spin_unlock_irqrestore(&slice_convert_lock, flags); 217 spin_unlock_irqrestore(&slice_convert_lock, flags);
218 mb();
219 218
220 /* XXX this is sub-optimal but will do for now */
221 on_each_cpu(slice_flush_segments, mm, 1);
222#ifdef CONFIG_SPU_BASE 219#ifdef CONFIG_SPU_BASE
223 spu_flush_all_slbs(mm); 220 spu_flush_all_slbs(mm);
224#endif 221#endif
@@ -384,17 +381,34 @@ static unsigned long slice_find_area(struct mm_struct *mm, unsigned long len,
384 return slice_find_area_bottomup(mm, len, mask, psize, use_cache); 381 return slice_find_area_bottomup(mm, len, mask, psize, use_cache);
385} 382}
386 383
384#define or_mask(dst, src) do { \
385 (dst).low_slices |= (src).low_slices; \
386 (dst).high_slices |= (src).high_slices; \
387} while (0)
388
389#define andnot_mask(dst, src) do { \
390 (dst).low_slices &= ~(src).low_slices; \
391 (dst).high_slices &= ~(src).high_slices; \
392} while (0)
393
394#ifdef CONFIG_PPC_64K_PAGES
395#define MMU_PAGE_BASE MMU_PAGE_64K
396#else
397#define MMU_PAGE_BASE MMU_PAGE_4K
398#endif
399
387unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len, 400unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
388 unsigned long flags, unsigned int psize, 401 unsigned long flags, unsigned int psize,
389 int topdown, int use_cache) 402 int topdown, int use_cache)
390{ 403{
391 struct slice_mask mask; 404 struct slice_mask mask = {0, 0};
392 struct slice_mask good_mask; 405 struct slice_mask good_mask;
393 struct slice_mask potential_mask = {0,0} /* silence stupid warning */; 406 struct slice_mask potential_mask = {0,0} /* silence stupid warning */;
394 int pmask_set = 0; 407 struct slice_mask compat_mask = {0, 0};
395 int fixed = (flags & MAP_FIXED); 408 int fixed = (flags & MAP_FIXED);
396 int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT); 409 int pshift = max_t(int, mmu_psize_defs[psize].shift, PAGE_SHIFT);
397 struct mm_struct *mm = current->mm; 410 struct mm_struct *mm = current->mm;
411 unsigned long newaddr;
398 412
399 /* Sanity checks */ 413 /* Sanity checks */
400 BUG_ON(mm->task_size == 0); 414 BUG_ON(mm->task_size == 0);
@@ -416,21 +430,48 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
416 if (!fixed && addr) { 430 if (!fixed && addr) {
417 addr = _ALIGN_UP(addr, 1ul << pshift); 431 addr = _ALIGN_UP(addr, 1ul << pshift);
418 slice_dbg(" aligned addr=%lx\n", addr); 432 slice_dbg(" aligned addr=%lx\n", addr);
433 /* Ignore hint if it's too large or overlaps a VMA */
434 if (addr > mm->task_size - len ||
435 !slice_area_is_free(mm, addr, len))
436 addr = 0;
419 } 437 }
420 438
421 /* First makeup a "good" mask of slices that have the right size 439 /* First make up a "good" mask of slices that have the right size
422 * already 440 * already
423 */ 441 */
424 good_mask = slice_mask_for_size(mm, psize); 442 good_mask = slice_mask_for_size(mm, psize);
425 slice_print_mask(" good_mask", good_mask); 443 slice_print_mask(" good_mask", good_mask);
426 444
427 /* First check hint if it's valid or if we have MAP_FIXED */ 445 /*
428 if ((addr != 0 || fixed) && (mm->task_size - len) >= addr) { 446 * Here "good" means slices that are already the right page size,
447 * "compat" means slices that have a compatible page size (i.e.
448 * 4k in a 64k pagesize kernel), and "free" means slices without
449 * any VMAs.
450 *
451 * If MAP_FIXED:
452 * check if fits in good | compat => OK
453 * check if fits in good | compat | free => convert free
454 * else bad
455 * If have hint:
456 * check if hint fits in good => OK
457 * check if hint fits in good | free => convert free
458 * Otherwise:
459 * search in good, found => OK
460 * search in good | free, found => convert free
461 * search in good | compat | free, found => convert free.
462 */
429 463
430 /* Don't bother with hint if it overlaps a VMA */ 464#ifdef CONFIG_PPC_64K_PAGES
431 if (!fixed && !slice_area_is_free(mm, addr, len)) 465 /* If we support combo pages, we can allow 64k pages in 4k slices */
432 goto search; 466 if (psize == MMU_PAGE_64K) {
467 compat_mask = slice_mask_for_size(mm, MMU_PAGE_4K);
468 if (fixed)
469 or_mask(good_mask, compat_mask);
470 }
471#endif
433 472
473 /* First check hint if it's valid or if we have MAP_FIXED */
474 if (addr != 0 || fixed) {
434 /* Build a mask for the requested range */ 475 /* Build a mask for the requested range */
435 mask = slice_range_to_mask(addr, len); 476 mask = slice_range_to_mask(addr, len);
436 slice_print_mask(" mask", mask); 477 slice_print_mask(" mask", mask);
@@ -442,54 +483,66 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
442 slice_dbg(" fits good !\n"); 483 slice_dbg(" fits good !\n");
443 return addr; 484 return addr;
444 } 485 }
445 486 } else {
446 /* We don't fit in the good mask, check what other slices are 487 /* Now let's see if we can find something in the existing
447 * empty and thus can be converted 488 * slices for that size
448 */ 489 */
449 potential_mask = slice_mask_for_free(mm); 490 newaddr = slice_find_area(mm, len, good_mask, psize, topdown,
450 potential_mask.low_slices |= good_mask.low_slices; 491 use_cache);
451 potential_mask.high_slices |= good_mask.high_slices; 492 if (newaddr != -ENOMEM) {
452 pmask_set = 1; 493 /* Found within the good mask, we don't have to setup,
453 slice_print_mask(" potential", potential_mask); 494 * we thus return directly
454 if (slice_check_fit(mask, potential_mask)) { 495 */
455 slice_dbg(" fits potential !\n"); 496 slice_dbg(" found area at 0x%lx\n", newaddr);
456 goto convert; 497 return newaddr;
457 } 498 }
458 } 499 }
459 500
460 /* If we have MAP_FIXED and failed the above step, then error out */ 501 /* We don't fit in the good mask, check what other slices are
502 * empty and thus can be converted
503 */
504 potential_mask = slice_mask_for_free(mm);
505 or_mask(potential_mask, good_mask);
506 slice_print_mask(" potential", potential_mask);
507
508 if ((addr != 0 || fixed) && slice_check_fit(mask, potential_mask)) {
509 slice_dbg(" fits potential !\n");
510 goto convert;
511 }
512
513 /* If we have MAP_FIXED and failed the above steps, then error out */
461 if (fixed) 514 if (fixed)
462 return -EBUSY; 515 return -EBUSY;
463 516
464 search:
465 slice_dbg(" search...\n"); 517 slice_dbg(" search...\n");
466 518
467 /* Now let's see if we can find something in the existing slices 519 /* If we had a hint that didn't work out, see if we can fit
468 * for that size 520 * anywhere in the good area.
469 */ 521 */
470 addr = slice_find_area(mm, len, good_mask, psize, topdown, use_cache); 522 if (addr) {
471 if (addr != -ENOMEM) { 523 addr = slice_find_area(mm, len, good_mask, psize, topdown,
472 /* Found within the good mask, we don't have to setup, 524 use_cache);
473 * we thus return directly 525 if (addr != -ENOMEM) {
474 */ 526 slice_dbg(" found area at 0x%lx\n", addr);
475 slice_dbg(" found area at 0x%lx\n", addr); 527 return addr;
476 return addr; 528 }
477 }
478
479 /* Won't fit, check what can be converted */
480 if (!pmask_set) {
481 potential_mask = slice_mask_for_free(mm);
482 potential_mask.low_slices |= good_mask.low_slices;
483 potential_mask.high_slices |= good_mask.high_slices;
484 pmask_set = 1;
485 slice_print_mask(" potential", potential_mask);
486 } 529 }
487 530
488 /* Now let's see if we can find something in the existing slices 531 /* Now let's see if we can find something in the existing slices
489 * for that size 532 * for that size plus free slices
490 */ 533 */
491 addr = slice_find_area(mm, len, potential_mask, psize, topdown, 534 addr = slice_find_area(mm, len, potential_mask, psize, topdown,
492 use_cache); 535 use_cache);
536
537#ifdef CONFIG_PPC_64K_PAGES
538 if (addr == -ENOMEM && psize == MMU_PAGE_64K) {
539 /* retry the search with 4k-page slices included */
540 or_mask(potential_mask, compat_mask);
541 addr = slice_find_area(mm, len, potential_mask, psize,
542 topdown, use_cache);
543 }
544#endif
545
493 if (addr == -ENOMEM) 546 if (addr == -ENOMEM)
494 return -ENOMEM; 547 return -ENOMEM;
495 548
@@ -498,7 +551,13 @@ unsigned long slice_get_unmapped_area(unsigned long addr, unsigned long len,
498 slice_print_mask(" mask", mask); 551 slice_print_mask(" mask", mask);
499 552
500 convert: 553 convert:
501 slice_convert(mm, mask, psize); 554 andnot_mask(mask, good_mask);
555 andnot_mask(mask, compat_mask);
556 if (mask.low_slices || mask.high_slices) {
557 slice_convert(mm, mask, psize);
558 if (psize > MMU_PAGE_BASE)
559 on_each_cpu(slice_flush_segments, mm, 1);
560 }
502 return addr; 561 return addr;
503 562
504} 563}
@@ -598,6 +657,36 @@ void slice_set_user_psize(struct mm_struct *mm, unsigned int psize)
598 spin_unlock_irqrestore(&slice_convert_lock, flags); 657 spin_unlock_irqrestore(&slice_convert_lock, flags);
599} 658}
600 659
660void slice_set_psize(struct mm_struct *mm, unsigned long address,
661 unsigned int psize)
662{
663 unsigned long i, flags;
664 u64 *p;
665
666 spin_lock_irqsave(&slice_convert_lock, flags);
667 if (address < SLICE_LOW_TOP) {
668 i = GET_LOW_SLICE_INDEX(address);
669 p = &mm->context.low_slices_psize;
670 } else {
671 i = GET_HIGH_SLICE_INDEX(address);
672 p = &mm->context.high_slices_psize;
673 }
674 *p = (*p & ~(0xful << (i * 4))) | ((unsigned long) psize << (i * 4));
675 spin_unlock_irqrestore(&slice_convert_lock, flags);
676
677#ifdef CONFIG_SPU_BASE
678 spu_flush_all_slbs(mm);
679#endif
680}
681
682void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
683 unsigned long len, unsigned int psize)
684{
685 struct slice_mask mask = slice_range_to_mask(start, len);
686
687 slice_convert(mm, mask, psize);
688}
689
601/* 690/*
602 * is_hugepage_only_range() is used by generic code to verify wether 691 * is_hugepage_only_range() is used by generic code to verify wether
603 * a normal mmap mapping (non hugetlbfs) is valid on a given area. 692 * a normal mmap mapping (non hugetlbfs) is valid on a given area.
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index efbbd13d93e5..60e6032a8088 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -30,8 +30,8 @@ struct stab_entry {
30}; 30};
31 31
32#define NR_STAB_CACHE_ENTRIES 8 32#define NR_STAB_CACHE_ENTRIES 8
33DEFINE_PER_CPU(long, stab_cache_ptr); 33static DEFINE_PER_CPU(long, stab_cache_ptr);
34DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); 34static DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]);
35 35
36/* 36/*
37 * Create a segment table entry for the given esid/vsid pair. 37 * Create a segment table entry for the given esid/vsid pair.
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c
index 69ad829a7fa3..a01b5c608ff9 100644
--- a/arch/powerpc/mm/tlb_64.c
+++ b/arch/powerpc/mm/tlb_64.c
@@ -37,8 +37,8 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
37 * include/asm-powerpc/tlb.h file -- tgall 37 * include/asm-powerpc/tlb.h file -- tgall
38 */ 38 */
39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); 39DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
40DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); 40static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
41unsigned long pte_freelist_forced_free; 41static unsigned long pte_freelist_forced_free;
42 42
43struct pte_freelist_batch 43struct pte_freelist_batch
44{ 44{
@@ -47,9 +47,6 @@ struct pte_freelist_batch
47 pgtable_free_t tables[0]; 47 pgtable_free_t tables[0];
48}; 48};
49 49
50DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
51unsigned long pte_freelist_forced_free;
52
53#define PTE_FREELIST_SIZE \ 50#define PTE_FREELIST_SIZE \
54 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ 51 ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
55 / sizeof(pgtable_free_t)) 52 / sizeof(pgtable_free_t))
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 6abe91357eee..249ba01c6674 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -17,6 +17,15 @@ config EBONY
17 help 17 help
18 This option enables support for the IBM PPC440GP evaluation board. 18 This option enables support for the IBM PPC440GP evaluation board.
19 19
20config SAM440EP
21 bool "Sam440ep"
22 depends on 44x
23 default n
24 select 440EP
25 select PCI
26 help
27 This option enables support for the ACube Sam440ep board.
28
20config SEQUOIA 29config SEQUOIA
21 bool "Sequoia" 30 bool "Sequoia"
22 depends on 44x 31 depends on 44x
@@ -102,6 +111,22 @@ config YOSEMITE
102# help 111# help
103# This option enables support for the IBM PPC440GX evaluation board. 112# This option enables support for the IBM PPC440GX evaluation board.
104 113
114config XILINX_VIRTEX440_GENERIC_BOARD
115 bool "Generic Xilinx Virtex 440 board"
116 depends on 44x
117 default n
118 select XILINX_VIRTEX_5_FXT
119 help
120 This option enables generic support for Xilinx Virtex based boards
121 that use a 440 based processor in the Virtex 5 FXT FPGA architecture.
122
123 The generic virtex board support matches any device tree which
124 specifies 'xlnx,virtex440' in its compatible field. This includes
125 the Xilinx ML5xx reference designs using the powerpc core.
126
127 Most Virtex 5 designs should use this unless it needs to do some
128 special configuration at board probe time.
129
105# 44x specific CPU modules, selected based on the board above. 130# 44x specific CPU modules, selected based on the board above.
106config 440EP 131config 440EP
107 bool 132 bool
@@ -152,3 +177,13 @@ config 460EX
152# 44x errata/workaround config symbols, selected by the CPU models above 177# 44x errata/workaround config symbols, selected by the CPU models above
153config IBM440EP_ERR42 178config IBM440EP_ERR42
154 bool 179 bool
180
181# Xilinx specific config options.
182config XILINX_VIRTEX
183 bool
184
185# Xilinx Virtex 5 FXT FPGA architecture, selected by a Xilinx board above
186config XILINX_VIRTEX_5_FXT
187 bool
188 select XILINX_VIRTEX
189
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 774165f9acdd..8d0b1a192d62 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -3,9 +3,11 @@ obj-$(CONFIG_EBONY) += ebony.o
3obj-$(CONFIG_TAISHAN) += taishan.o 3obj-$(CONFIG_TAISHAN) += taishan.o
4obj-$(CONFIG_BAMBOO) += bamboo.o 4obj-$(CONFIG_BAMBOO) += bamboo.o
5obj-$(CONFIG_YOSEMITE) += bamboo.o 5obj-$(CONFIG_YOSEMITE) += bamboo.o
6obj-$(CONFIG_SAM440EP) += sam440ep.o
6obj-$(CONFIG_SEQUOIA) += sequoia.o 7obj-$(CONFIG_SEQUOIA) += sequoia.o
7obj-$(CONFIG_KATMAI) += katmai.o 8obj-$(CONFIG_KATMAI) += katmai.o
8obj-$(CONFIG_RAINIER) += rainier.o 9obj-$(CONFIG_RAINIER) += rainier.o
9obj-$(CONFIG_WARP) += warp.o 10obj-$(CONFIG_WARP) += warp.o
10obj-$(CONFIG_WARP) += warp-nand.o 11obj-$(CONFIG_WARP) += warp-nand.o
11obj-$(CONFIG_CANYONLANDS) += canyonlands.o 12obj-$(CONFIG_CANYONLANDS) += canyonlands.o
13obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c
new file mode 100644
index 000000000000..47f10e647735
--- /dev/null
+++ b/arch/powerpc/platforms/44x/sam440ep.c
@@ -0,0 +1,79 @@
1/*
2 * Sam440ep board specific routines based off bamboo.c code
3 * original copyrights below
4 *
5 * Wade Farnsworth <wfarnsworth@mvista.com>
6 * Copyright 2004 MontaVista Software Inc.
7 *
8 * Rewritten and ported to the merged powerpc tree:
9 * Josh Boyer <jwboyer@linux.vnet.ibm.com>
10 * Copyright 2007 IBM Corporation
11 *
12 * Modified from bamboo.c for sam440ep:
13 * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com>
14 *
15 * This program is free software; you can redistribute it and/or modify it
16 * under the terms of the GNU General Public License as published by the
17 * Free Software Foundation; either version 2 of the License, or (at your
18 * option) any later version.
19 */
20#include <linux/init.h>
21#include <linux/of_platform.h>
22
23#include <asm/machdep.h>
24#include <asm/prom.h>
25#include <asm/udbg.h>
26#include <asm/time.h>
27#include <asm/uic.h>
28#include <asm/pci-bridge.h>
29#include <asm/ppc4xx.h>
30#include <linux/i2c.h>
31
32static __initdata struct of_device_id sam440ep_of_bus[] = {
33 { .compatible = "ibm,plb4", },
34 { .compatible = "ibm,opb", },
35 { .compatible = "ibm,ebc", },
36 {},
37};
38
39static int __init sam440ep_device_probe(void)
40{
41 of_platform_bus_probe(NULL, sam440ep_of_bus, NULL);
42
43 return 0;
44}
45machine_device_initcall(sam440ep, sam440ep_device_probe);
46
47static int __init sam440ep_probe(void)
48{
49 unsigned long root = of_get_flat_dt_root();
50
51 if (!of_flat_dt_is_compatible(root, "acube,sam440ep"))
52 return 0;
53
54 ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC;
55
56 return 1;
57}
58
59define_machine(sam440ep) {
60 .name = "Sam440ep",
61 .probe = sam440ep_probe,
62 .progress = udbg_progress,
63 .init_IRQ = uic_init_tree,
64 .get_irq = uic_get_irq,
65 .restart = ppc4xx_reset_system,
66 .calibrate_decr = generic_calibrate_decr,
67};
68
69static struct i2c_board_info sam440ep_rtc_info = {
70 .type = "m41st85",
71 .addr = 0x68,
72 .irq = -1,
73};
74
75static int sam440ep_setup_rtc(void)
76{
77 return i2c_register_board_info(0, &sam440ep_rtc_info, 1);
78}
79machine_device_initcall(sam440ep, sam440ep_setup_rtc);
diff --git a/arch/powerpc/platforms/44x/virtex.c b/arch/powerpc/platforms/44x/virtex.c
new file mode 100644
index 000000000000..68637faf70ae
--- /dev/null
+++ b/arch/powerpc/platforms/44x/virtex.c
@@ -0,0 +1,60 @@
1/*
2 * Xilinx Virtex 5FXT based board support, derived from
3 * the Xilinx Virtex (IIpro & 4FX) based board support
4 *
5 * Copyright 2007 Secret Lab Technologies Ltd.
6 * Copyright 2008 Xilinx, Inc.
7 *
8 * This file is licensed under the terms of the GNU General Public License
9 * version 2. This program is licensed "as is" without any warranty of any
10 * kind, whether express or implied.
11 */
12
13#include <linux/init.h>
14#include <linux/of_platform.h>
15#include <asm/machdep.h>
16#include <asm/prom.h>
17#include <asm/time.h>
18#include <asm/xilinx_intc.h>
19#include <asm/reg.h>
20#include <asm/ppc4xx.h>
21#include "44x.h"
22
23static struct of_device_id xilinx_of_bus_ids[] __initdata = {
24 { .compatible = "simple-bus", },
25 { .compatible = "xlnx,plb-v46-1.00.a", },
26 { .compatible = "xlnx,plb-v46-1.02.a", },
27 { .compatible = "xlnx,plb-v34-1.01.a", },
28 { .compatible = "xlnx,plb-v34-1.02.a", },
29 { .compatible = "xlnx,opb-v20-1.10.c", },
30 { .compatible = "xlnx,dcr-v29-1.00.a", },
31 { .compatible = "xlnx,compound", },
32 {}
33};
34
35static int __init virtex_device_probe(void)
36{
37 of_platform_bus_probe(NULL, xilinx_of_bus_ids, NULL);
38
39 return 0;
40}
41machine_device_initcall(virtex, virtex_device_probe);
42
43static int __init virtex_probe(void)
44{
45 unsigned long root = of_get_flat_dt_root();
46
47 if (!of_flat_dt_is_compatible(root, "xlnx,virtex440"))
48 return 0;
49
50 return 1;
51}
52
53define_machine(virtex) {
54 .name = "Xilinx Virtex440",
55 .probe = virtex_probe,
56 .init_IRQ = xilinx_intc_init_tree,
57 .get_irq = xilinx_intc_get_irq,
58 .calibrate_decr = generic_calibrate_decr,
59 .restart = ppc4xx_reset_system,
60};
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c
index 9150318cfc56..e55746b824b4 100644
--- a/arch/powerpc/platforms/44x/warp-nand.c
+++ b/arch/powerpc/platforms/44x/warp-nand.c
@@ -11,8 +11,10 @@
11#include <linux/mtd/partitions.h> 11#include <linux/mtd/partitions.h>
12#include <linux/mtd/nand.h> 12#include <linux/mtd/nand.h>
13#include <linux/mtd/ndfc.h> 13#include <linux/mtd/ndfc.h>
14#include <linux/of.h>
14#include <asm/machdep.h> 15#include <asm/machdep.h>
15 16
17
16#ifdef CONFIG_MTD_NAND_NDFC 18#ifdef CONFIG_MTD_NAND_NDFC
17 19
18#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ 20#define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */
@@ -35,13 +37,23 @@ static struct mtd_partition nand_parts[] = {
35 { 37 {
36 .name = "root", 38 .name = "root",
37 .offset = 0x0200000, 39 .offset = 0x0200000,
38 .size = 0x3400000 40 .size = 0x3E00000
41 },
42 {
43 .name = "persistent",
44 .offset = 0x4000000,
45 .size = 0x4000000
39 }, 46 },
40 { 47 {
41 .name = "user", 48 .name = "persistent1",
42 .offset = 0x3600000, 49 .offset = 0x8000000,
43 .size = 0x0A00000 50 .size = 0x4000000
44 }, 51 },
52 {
53 .name = "persistent2",
54 .offset = 0xC000000,
55 .size = 0x4000000
56 }
45}; 57};
46 58
47struct ndfc_controller_settings warp_ndfc_settings = { 59struct ndfc_controller_settings warp_ndfc_settings = {
@@ -67,27 +79,22 @@ static struct platform_device warp_ndfc_device = {
67 .resource = &warp_ndfc, 79 .resource = &warp_ndfc,
68}; 80};
69 81
70static struct nand_ecclayout nand_oob_16 = { 82/* Do NOT set the ecclayout: let it default so it is correct for both
71 .eccbytes = 3, 83 * 64M and 256M flash chips.
72 .eccpos = { 0, 1, 2, 3, 6, 7 }, 84 */
73 .oobfree = { {.offset = 8, .length = 16} }
74};
75
76static struct platform_nand_chip warp_nand_chip0 = { 85static struct platform_nand_chip warp_nand_chip0 = {
77 .nr_chips = 1, 86 .nr_chips = 1,
78 .chip_offset = CS_NAND_0, 87 .chip_offset = CS_NAND_0,
79 .nr_partitions = ARRAY_SIZE(nand_parts), 88 .nr_partitions = ARRAY_SIZE(nand_parts),
80 .partitions = nand_parts, 89 .partitions = nand_parts,
81 .chip_delay = 50, 90 .chip_delay = 20,
82 .ecclayout = &nand_oob_16,
83 .priv = &warp_chip0_settings, 91 .priv = &warp_chip0_settings,
84}; 92};
85 93
86static struct platform_device warp_nand_device = { 94static struct platform_device warp_nand_device = {
87 .name = "ndfc-chip", 95 .name = "ndfc-chip",
88 .id = 0, 96 .id = 0,
89 .num_resources = 1, 97 .num_resources = 0,
90 .resource = &warp_ndfc,
91 .dev = { 98 .dev = {
92 .platform_data = &warp_nand_chip0, 99 .platform_data = &warp_nand_chip0,
93 .parent = &warp_ndfc_device.dev, 100 .parent = &warp_ndfc_device.dev,
@@ -96,6 +103,28 @@ static struct platform_device warp_nand_device = {
96 103
97static int warp_setup_nand_flash(void) 104static int warp_setup_nand_flash(void)
98{ 105{
106 struct device_node *np;
107
108 /* Try to detect a rev A based on NOR size. */
109 np = of_find_compatible_node(NULL, NULL, "cfi-flash");
110 if (np) {
111 struct property *pp;
112
113 pp = of_find_property(np, "reg", NULL);
114 if (pp && (pp->length == 12)) {
115 u32 *v = pp->value;
116 if (v[2] == 0x4000000) {
117 /* Rev A = 64M NAND */
118 warp_nand_chip0.nr_partitions = 3;
119
120 nand_parts[1].size = 0x3000000;
121 nand_parts[2].offset = 0x3200000;
122 nand_parts[2].size = 0x0e00000;
123 }
124 }
125 of_node_put(np);
126 }
127
99 platform_device_register(&warp_ndfc_device); 128 platform_device_register(&warp_ndfc_device);
100 platform_device_register(&warp_nand_device); 129 platform_device_register(&warp_nand_device);
101 130
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c
index 39cf6150a72b..9565995cba7f 100644
--- a/arch/powerpc/platforms/44x/warp.c
+++ b/arch/powerpc/platforms/44x/warp.c
@@ -12,6 +12,9 @@
12#include <linux/init.h> 12#include <linux/init.h>
13#include <linux/of_platform.h> 13#include <linux/of_platform.h>
14#include <linux/kthread.h> 14#include <linux/kthread.h>
15#include <linux/i2c.h>
16#include <linux/interrupt.h>
17#include <linux/delay.h>
15 18
16#include <asm/machdep.h> 19#include <asm/machdep.h>
17#include <asm/prom.h> 20#include <asm/prom.h>
@@ -27,6 +30,18 @@ static __initdata struct of_device_id warp_of_bus[] = {
27 {}, 30 {},
28}; 31};
29 32
33static __initdata struct i2c_board_info warp_i2c_info[] = {
34 { I2C_BOARD_INFO("ad7414", 0x4a) }
35};
36
37static int __init warp_arch_init(void)
38{
39 /* This should go away once support is moved to the dts. */
40 i2c_register_board_info(0, warp_i2c_info, ARRAY_SIZE(warp_i2c_info));
41 return 0;
42}
43machine_arch_initcall(warp, warp_arch_init);
44
30static int __init warp_device_probe(void) 45static int __init warp_device_probe(void)
31{ 46{
32 of_platform_bus_probe(NULL, warp_of_bus, NULL); 47 of_platform_bus_probe(NULL, warp_of_bus, NULL);
@@ -52,61 +67,232 @@ define_machine(warp) {
52}; 67};
53 68
54 69
55#define LED_GREEN (0x80000000 >> 0) 70/* I am not sure this is the best place for this... */
56#define LED_RED (0x80000000 >> 1) 71static int __init warp_post_info(void)
72{
73 struct device_node *np;
74 void __iomem *fpga;
75 u32 post1, post2;
76
77 /* Sighhhh... POST information is in the sd area. */
78 np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd");
79 if (np == NULL)
80 return -ENOENT;
81
82 fpga = of_iomap(np, 0);
83 of_node_put(np);
84 if (fpga == NULL)
85 return -ENOENT;
86
87 post1 = in_be32(fpga + 0x40);
88 post2 = in_be32(fpga + 0x44);
89
90 iounmap(fpga);
91
92 if (post1 || post2)
93 printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2);
94 else
95 printk(KERN_INFO "Warp POST OK\n");
96
97 return 0;
98}
99machine_late_initcall(warp, warp_post_info);
100
101
102#ifdef CONFIG_SENSORS_AD7414
103
104static LIST_HEAD(dtm_shutdown_list);
105static void __iomem *dtm_fpga;
106static void __iomem *gpio_base;
107
108
109struct dtm_shutdown {
110 struct list_head list;
111 void (*func)(void *arg);
112 void *arg;
113};
57 114
58 115
59/* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */ 116int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)
60void warp_set_power_leds(int green, int red)
61{ 117{
62 static void __iomem *gpio_base = NULL; 118 struct dtm_shutdown *shutdown;
63 unsigned leds; 119
64 120 shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL);
65 if (gpio_base == NULL) { 121 if (shutdown == NULL)
66 struct device_node *np; 122 return -ENOMEM;
67 123
68 /* Power LEDS are on the second GPIO controller */ 124 shutdown->func = func;
69 np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP"); 125 shutdown->arg = arg;
70 if (np) 126
71 np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP"); 127 list_add(&shutdown->list, &dtm_shutdown_list);
72 if (np == NULL) { 128
73 printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); 129 return 0;
74 return; 130}
131
132int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)
133{
134 struct dtm_shutdown *shutdown;
135
136 list_for_each_entry(shutdown, &dtm_shutdown_list, list)
137 if (shutdown->func == func && shutdown->arg == arg) {
138 list_del(&shutdown->list);
139 kfree(shutdown);
140 return 0;
141 }
142
143 return -EINVAL;
144}
145
146static irqreturn_t temp_isr(int irq, void *context)
147{
148 struct dtm_shutdown *shutdown;
149
150 local_irq_disable();
151
152 /* Run through the shutdown list. */
153 list_for_each_entry(shutdown, &dtm_shutdown_list, list)
154 shutdown->func(shutdown->arg);
155
156 printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n");
157
158 while (1) {
159 if (dtm_fpga) {
160 unsigned reset = in_be32(dtm_fpga + 0x14);
161 out_be32(dtm_fpga + 0x14, reset);
75 } 162 }
76 163
77 gpio_base = of_iomap(np, 0); 164 if (gpio_base) {
78 of_node_put(np); 165 unsigned leds = in_be32(gpio_base);
79 if (gpio_base == NULL) { 166
80 printk(KERN_ERR __FILE__ ": Unable to map gpio"); 167 /* green off, red toggle */
81 return; 168 leds &= ~0x80000000;
169 leds ^= 0x40000000;
170
171 out_be32(gpio_base, leds);
82 } 172 }
173
174 mdelay(500);
175 }
176}
177
178static int pika_setup_leds(void)
179{
180 struct device_node *np;
181 const u32 *gpios;
182 int len;
183
184 np = of_find_compatible_node(NULL, NULL, "linux,gpio-led");
185 if (!np) {
186 printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n");
187 return -ENOENT;
83 } 188 }
84 189
85 leds = in_be32(gpio_base); 190 gpios = of_get_property(np, "gpios", &len);
191 of_node_put(np);
192 if (!gpios || len < 4) {
193 printk(KERN_ERR __FILE__
194 ": Unable to get gpios property (%d)\n", len);
195 return -ENOENT;
196 }
86 197
87 switch (green) { 198 np = of_find_node_by_phandle(gpios[0]);
88 case 0: leds &= ~LED_GREEN; break; 199 if (!np) {
89 case 1: leds |= LED_GREEN; break; 200 printk(KERN_ERR __FILE__ ": Unable to find gpio\n");
201 return -ENOENT;
90 } 202 }
91 switch (red) { 203
92 case 0: leds &= ~LED_RED; break; 204 gpio_base = of_iomap(np, 0);
93 case 1: leds |= LED_RED; break; 205 of_node_put(np);
206 if (!gpio_base) {
207 printk(KERN_ERR __FILE__ ": Unable to map gpio");
208 return -ENOMEM;
94 } 209 }
95 210
96 out_be32(gpio_base, leds); 211 return 0;
97} 212}
98EXPORT_SYMBOL(warp_set_power_leds);
99 213
214static void pika_setup_critical_temp(struct i2c_client *client)
215{
216 struct device_node *np;
217 int irq, rc;
218
219 /* Do this before enabling critical temp interrupt since we
220 * may immediately interrupt.
221 */
222 pika_setup_leds();
223
224 /* These registers are in 1 degree increments. */
225 i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */
226 i2c_smbus_write_byte_data(client, 3, 55); /* Tlow */
227
228 np = of_find_compatible_node(NULL, NULL, "adi,ad7414");
229 if (np == NULL) {
230 printk(KERN_ERR __FILE__ ": Unable to find ad7414\n");
231 return;
232 }
233
234 irq = irq_of_parse_and_map(np, 0);
235 of_node_put(np);
236 if (irq == NO_IRQ) {
237 printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n");
238 return;
239 }
240
241 rc = request_irq(irq, temp_isr, 0, "ad7414", NULL);
242 if (rc) {
243 printk(KERN_ERR __FILE__
244 ": Unable to request ad7414 irq %d = %d\n", irq, rc);
245 return;
246 }
247}
248
249static inline void pika_dtm_check_fan(void __iomem *fpga)
250{
251 static int fan_state;
252 u32 fan = in_be32(fpga + 0x34) & (1 << 14);
253
254 if (fan_state != fan) {
255 fan_state = fan;
256 if (fan)
257 printk(KERN_WARNING "Fan rotation error detected."
258 " Please check hardware.\n");
259 }
260}
100 261
101#ifdef CONFIG_SENSORS_AD7414
102static int pika_dtm_thread(void __iomem *fpga) 262static int pika_dtm_thread(void __iomem *fpga)
103{ 263{
104 extern int ad7414_get_temp(int index); 264 struct i2c_adapter *adap;
265 struct i2c_client *client;
266
267 /* We loop in case either driver was compiled as a module and
268 * has not been insmoded yet.
269 */
270 while (!(adap = i2c_get_adapter(0))) {
271 set_current_state(TASK_INTERRUPTIBLE);
272 schedule_timeout(HZ);
273 }
274
275 while (1) {
276 list_for_each_entry(client, &adap->clients, list)
277 if (client->addr == 0x4a)
278 goto found_it;
279
280 set_current_state(TASK_INTERRUPTIBLE);
281 schedule_timeout(HZ);
282 }
283
284found_it:
285 i2c_put_adapter(adap);
286
287 pika_setup_critical_temp(client);
288
289 printk(KERN_INFO "PIKA DTM thread running.\n");
105 290
106 while (!kthread_should_stop()) { 291 while (!kthread_should_stop()) {
107 int temp = ad7414_get_temp(0); 292 u16 temp = swab16(i2c_smbus_read_word_data(client, 0));
293 out_be32(fpga + 0x20, temp);
108 294
109 out_be32(fpga, temp); 295 pika_dtm_check_fan(fpga);
110 296
111 set_current_state(TASK_INTERRUPTIBLE); 297 set_current_state(TASK_INTERRUPTIBLE);
112 schedule_timeout(HZ); 298 schedule_timeout(HZ);
@@ -115,37 +301,44 @@ static int pika_dtm_thread(void __iomem *fpga)
115 return 0; 301 return 0;
116} 302}
117 303
304
118static int __init pika_dtm_start(void) 305static int __init pika_dtm_start(void)
119{ 306{
120 struct task_struct *dtm_thread; 307 struct task_struct *dtm_thread;
121 struct device_node *np; 308 struct device_node *np;
122 struct resource res;
123 void __iomem *fpga;
124 309
125 np = of_find_compatible_node(NULL, NULL, "pika,fpga"); 310 np = of_find_compatible_node(NULL, NULL, "pika,fpga");
126 if (np == NULL) 311 if (np == NULL)
127 return -ENOENT; 312 return -ENOENT;
128 313
129 /* We do not call of_iomap here since it would map in the entire 314 dtm_fpga = of_iomap(np, 0);
130 * fpga space, which is over 8k.
131 */
132 if (of_address_to_resource(np, 0, &res)) {
133 of_node_put(np);
134 return -ENOENT;
135 }
136 of_node_put(np); 315 of_node_put(np);
137 316 if (dtm_fpga == NULL)
138 fpga = ioremap(res.start, 0x24);
139 if (fpga == NULL)
140 return -ENOENT; 317 return -ENOENT;
141 318
142 dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm"); 319 dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm");
143 if (IS_ERR(dtm_thread)) { 320 if (IS_ERR(dtm_thread)) {
144 iounmap(fpga); 321 iounmap(dtm_fpga);
145 return PTR_ERR(dtm_thread); 322 return PTR_ERR(dtm_thread);
146 } 323 }
147 324
148 return 0; 325 return 0;
149} 326}
150device_initcall(pika_dtm_start); 327machine_late_initcall(warp, pika_dtm_start);
328
329#else /* !CONFIG_SENSORS_AD7414 */
330
331int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg)
332{
333 return 0;
334}
335
336int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg)
337{
338 return 0;
339}
340
151#endif 341#endif
342
343EXPORT_SYMBOL(pika_dtm_register_shutdown);
344EXPORT_SYMBOL(pika_dtm_unregister_shutdown);
diff --git a/arch/powerpc/platforms/512x/Kconfig b/arch/powerpc/platforms/512x/Kconfig
index 4c0da0c079e9..c62f893ede19 100644
--- a/arch/powerpc/platforms/512x/Kconfig
+++ b/arch/powerpc/platforms/512x/Kconfig
@@ -2,18 +2,29 @@ config PPC_MPC512x
2 bool 2 bool
3 select FSL_SOC 3 select FSL_SOC
4 select IPIC 4 select IPIC
5 default n 5 select PPC_CLOCK
6 6
7config PPC_MPC5121 7config PPC_MPC5121
8 bool 8 bool
9 select PPC_MPC512x 9 select PPC_MPC512x
10 default n
11 10
12config MPC5121_ADS 11config MPC5121_ADS
13 bool "Freescale MPC5121E ADS" 12 bool "Freescale MPC5121E ADS"
14 depends on PPC_MULTIPLATFORM && PPC32 13 depends on PPC_MULTIPLATFORM && PPC32
15 select DEFAULT_UIMAGE 14 select DEFAULT_UIMAGE
16 select PPC_MPC5121 15 select PPC_MPC5121
16 select MPC5121_ADS_CPLD
17 help 17 help
18 This option enables support for the MPC5121E ADS board. 18 This option enables support for the MPC5121E ADS board.
19 default n 19
20config MPC5121_GENERIC
21 bool "Generic support for simple MPC5121 based boards"
22 depends on PPC_MULTIPLATFORM && PPC32
23 select DEFAULT_UIMAGE
24 select PPC_MPC5121
25 help
26 This option enables support for simple MPC5121 based boards
27 which do not need custom platform specific setup.
28
29 Compatible boards include: Protonic LVT base boards (ZANMCU
30 and VICVT2).
diff --git a/arch/powerpc/platforms/512x/Makefile b/arch/powerpc/platforms/512x/Makefile
index 232c89f2039a..90be2f5717e6 100644
--- a/arch/powerpc/platforms/512x/Makefile
+++ b/arch/powerpc/platforms/512x/Makefile
@@ -1,4 +1,6 @@
1# 1#
2# Makefile for the Freescale PowerPC 512x linux kernel. 2# Makefile for the Freescale PowerPC 512x linux kernel.
3# 3#
4obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o 4obj-y += clock.o mpc512x_shared.o
5obj-$(CONFIG_MPC5121_ADS) += mpc5121_ads.o mpc5121_ads_cpld.o
6obj-$(CONFIG_MPC5121_GENERIC) += mpc5121_generic.o
diff --git a/arch/powerpc/platforms/512x/clock.c b/arch/powerpc/platforms/512x/clock.c
new file mode 100644
index 000000000000..f416014ee727
--- /dev/null
+++ b/arch/powerpc/platforms/512x/clock.c
@@ -0,0 +1,729 @@
1/*
2 * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: John Rigby <jrigby@freescale.com>
5 *
6 * Implements the clk api defined in include/linux/clk.h
7 *
8 * Original based on linux/arch/arm/mach-integrator/clock.c
9 *
10 * Copyright (C) 2004 ARM Limited.
11 * Written by Deep Blue Solutions Limited.
12 *
13 * This program is free software; you can redistribute it and/or modify
14 * it under the terms of the GNU General Public License version 2 as
15 * published by the Free Software Foundation.
16 */
17#include <linux/kernel.h>
18#include <linux/list.h>
19#include <linux/errno.h>
20#include <linux/err.h>
21#include <linux/string.h>
22#include <linux/clk.h>
23#include <linux/mutex.h>
24#include <linux/io.h>
25
26#include <linux/of_platform.h>
27#include <asm/mpc512x.h>
28#include <asm/clk_interface.h>
29
30#undef CLK_DEBUG
31
32static int clocks_initialized;
33
34#define CLK_HAS_RATE 0x1 /* has rate in MHz */
35#define CLK_HAS_CTRL 0x2 /* has control reg and bit */
36
37struct clk {
38 struct list_head node;
39 char name[32];
40 int flags;
41 struct device *dev;
42 unsigned long rate;
43 struct module *owner;
44 void (*calc) (struct clk *);
45 struct clk *parent;
46 int reg, bit; /* CLK_HAS_CTRL */
47 int div_shift; /* only used by generic_div_clk_calc */
48};
49
50static LIST_HEAD(clocks);
51static DEFINE_MUTEX(clocks_mutex);
52
53static struct clk *mpc5121_clk_get(struct device *dev, const char *id)
54{
55 struct clk *p, *clk = ERR_PTR(-ENOENT);
56 int dev_match = 0;
57 int id_match = 0;
58
59 if (dev == NULL && id == NULL)
60 return NULL;
61
62 mutex_lock(&clocks_mutex);
63 list_for_each_entry(p, &clocks, node) {
64 if (dev && dev == p->dev)
65 dev_match++;
66 if (strcmp(id, p->name) == 0)
67 id_match++;
68 if ((dev_match || id_match) && try_module_get(p->owner)) {
69 clk = p;
70 break;
71 }
72 }
73 mutex_unlock(&clocks_mutex);
74
75 return clk;
76}
77
78#ifdef CLK_DEBUG
79static void dump_clocks(void)
80{
81 struct clk *p;
82
83 mutex_lock(&clocks_mutex);
84 printk(KERN_INFO "CLOCKS:\n");
85 list_for_each_entry(p, &clocks, node) {
86 printk(KERN_INFO " %s %ld", p->name, p->rate);
87 if (p->parent)
88 printk(KERN_INFO " %s %ld", p->parent->name,
89 p->parent->rate);
90 if (p->flags & CLK_HAS_CTRL)
91 printk(KERN_INFO " reg/bit %d/%d", p->reg, p->bit);
92 printk("\n");
93 }
94 mutex_unlock(&clocks_mutex);
95}
96#define DEBUG_CLK_DUMP() dump_clocks()
97#else
98#define DEBUG_CLK_DUMP()
99#endif
100
101
102static void mpc5121_clk_put(struct clk *clk)
103{
104 module_put(clk->owner);
105}
106
107#define NRPSC 12
108
109struct mpc512x_clockctl {
110 u32 spmr; /* System PLL Mode Reg */
111 u32 sccr[2]; /* System Clk Ctrl Reg 1 & 2 */
112 u32 scfr1; /* System Clk Freq Reg 1 */
113 u32 scfr2; /* System Clk Freq Reg 2 */
114 u32 reserved;
115 u32 bcr; /* Bread Crumb Reg */
116 u32 pccr[NRPSC]; /* PSC Clk Ctrl Reg 0-11 */
117 u32 spccr; /* SPDIF Clk Ctrl Reg */
118 u32 cccr; /* CFM Clk Ctrl Reg */
119 u32 dccr; /* DIU Clk Cnfg Reg */
120};
121
122struct mpc512x_clockctl __iomem *clockctl;
123
124static int mpc5121_clk_enable(struct clk *clk)
125{
126 unsigned int mask;
127
128 if (clk->flags & CLK_HAS_CTRL) {
129 mask = in_be32(&clockctl->sccr[clk->reg]);
130 mask |= 1 << clk->bit;
131 out_be32(&clockctl->sccr[clk->reg], mask);
132 }
133 return 0;
134}
135
136static void mpc5121_clk_disable(struct clk *clk)
137{
138 unsigned int mask;
139
140 if (clk->flags & CLK_HAS_CTRL) {
141 mask = in_be32(&clockctl->sccr[clk->reg]);
142 mask &= ~(1 << clk->bit);
143 out_be32(&clockctl->sccr[clk->reg], mask);
144 }
145}
146
147static unsigned long mpc5121_clk_get_rate(struct clk *clk)
148{
149 if (clk->flags & CLK_HAS_RATE)
150 return clk->rate;
151 else
152 return 0;
153}
154
155static long mpc5121_clk_round_rate(struct clk *clk, unsigned long rate)
156{
157 return rate;
158}
159
160static int mpc5121_clk_set_rate(struct clk *clk, unsigned long rate)
161{
162 return 0;
163}
164
165static int clk_register(struct clk *clk)
166{
167 mutex_lock(&clocks_mutex);
168 list_add(&clk->node, &clocks);
169 mutex_unlock(&clocks_mutex);
170 return 0;
171}
172
173static unsigned long spmf_mult(void)
174{
175 /*
176 * Convert spmf to multiplier
177 */
178 static int spmf_to_mult[] = {
179 68, 1, 12, 16,
180 20, 24, 28, 32,
181 36, 40, 44, 48,
182 52, 56, 60, 64
183 };
184 int spmf = (clockctl->spmr >> 24) & 0xf;
185 return spmf_to_mult[spmf];
186}
187
188static unsigned long sysdiv_div_x_2(void)
189{
190 /*
191 * Convert sysdiv to divisor x 2
192 * Some divisors have fractional parts so
193 * multiply by 2 then divide by this value
194 */
195 static int sysdiv_to_div_x_2[] = {
196 4, 5, 6, 7,
197 8, 9, 10, 14,
198 12, 16, 18, 22,
199 20, 24, 26, 30,
200 28, 32, 34, 38,
201 36, 40, 42, 46,
202 44, 48, 50, 54,
203 52, 56, 58, 62,
204 60, 64, 66,
205 };
206 int sysdiv = (clockctl->scfr2 >> 26) & 0x3f;
207 return sysdiv_to_div_x_2[sysdiv];
208}
209
210static unsigned long ref_to_sys(unsigned long rate)
211{
212 rate *= spmf_mult();
213 rate *= 2;
214 rate /= sysdiv_div_x_2();
215
216 return rate;
217}
218
219static unsigned long sys_to_ref(unsigned long rate)
220{
221 rate *= sysdiv_div_x_2();
222 rate /= 2;
223 rate /= spmf_mult();
224
225 return rate;
226}
227
228static long ips_to_ref(unsigned long rate)
229{
230 int ips_div = (clockctl->scfr1 >> 23) & 0x7;
231
232 rate *= ips_div; /* csb_clk = ips_clk * ips_div */
233 rate *= 2; /* sys_clk = csb_clk * 2 */
234 return sys_to_ref(rate);
235}
236
237static unsigned long devtree_getfreq(char *clockname)
238{
239 struct device_node *np;
240 const unsigned int *prop;
241 unsigned int val = 0;
242
243 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-immr");
244 if (np) {
245 prop = of_get_property(np, clockname, NULL);
246 if (prop)
247 val = *prop;
248 of_node_put(np);
249 }
250 return val;
251}
252
253static void ref_clk_calc(struct clk *clk)
254{
255 unsigned long rate;
256
257 rate = devtree_getfreq("bus-frequency");
258 if (rate == 0) {
259 printk(KERN_ERR "No bus-frequency in dev tree\n");
260 clk->rate = 0;
261 return;
262 }
263 clk->rate = ips_to_ref(rate);
264}
265
266static struct clk ref_clk = {
267 .name = "ref_clk",
268 .calc = ref_clk_calc,
269};
270
271
272static void sys_clk_calc(struct clk *clk)
273{
274 clk->rate = ref_to_sys(ref_clk.rate);
275}
276
277static struct clk sys_clk = {
278 .name = "sys_clk",
279 .calc = sys_clk_calc,
280};
281
282static void diu_clk_calc(struct clk *clk)
283{
284 int diudiv_x_2 = clockctl->scfr1 & 0xff;
285 unsigned long rate;
286
287 rate = sys_clk.rate;
288
289 rate *= 2;
290 rate /= diudiv_x_2;
291
292 clk->rate = rate;
293}
294
295static void half_clk_calc(struct clk *clk)
296{
297 clk->rate = clk->parent->rate / 2;
298}
299
300static void generic_div_clk_calc(struct clk *clk)
301{
302 int div = (clockctl->scfr1 >> clk->div_shift) & 0x7;
303
304 clk->rate = clk->parent->rate / div;
305}
306
307static void unity_clk_calc(struct clk *clk)
308{
309 clk->rate = clk->parent->rate;
310}
311
312static struct clk csb_clk = {
313 .name = "csb_clk",
314 .calc = half_clk_calc,
315 .parent = &sys_clk,
316};
317
318static void e300_clk_calc(struct clk *clk)
319{
320 int spmf = (clockctl->spmr >> 16) & 0xf;
321 int ratex2 = clk->parent->rate * spmf;
322
323 clk->rate = ratex2 / 2;
324}
325
326static struct clk e300_clk = {
327 .name = "e300_clk",
328 .calc = e300_clk_calc,
329 .parent = &csb_clk,
330};
331
332static struct clk ips_clk = {
333 .name = "ips_clk",
334 .calc = generic_div_clk_calc,
335 .parent = &csb_clk,
336 .div_shift = 23,
337};
338
339/*
340 * Clocks controlled by SCCR1 (.reg = 0)
341 */
342static struct clk lpc_clk = {
343 .name = "lpc_clk",
344 .flags = CLK_HAS_CTRL,
345 .reg = 0,
346 .bit = 30,
347 .calc = generic_div_clk_calc,
348 .parent = &ips_clk,
349 .div_shift = 11,
350};
351
352static struct clk nfc_clk = {
353 .name = "nfc_clk",
354 .flags = CLK_HAS_CTRL,
355 .reg = 0,
356 .bit = 29,
357 .calc = generic_div_clk_calc,
358 .parent = &ips_clk,
359 .div_shift = 8,
360};
361
362static struct clk pata_clk = {
363 .name = "pata_clk",
364 .flags = CLK_HAS_CTRL,
365 .reg = 0,
366 .bit = 28,
367 .calc = unity_clk_calc,
368 .parent = &ips_clk,
369};
370
371/*
372 * PSC clocks (bits 27 - 16)
373 * are setup elsewhere
374 */
375
376static struct clk sata_clk = {
377 .name = "sata_clk",
378 .flags = CLK_HAS_CTRL,
379 .reg = 0,
380 .bit = 14,
381 .calc = unity_clk_calc,
382 .parent = &ips_clk,
383};
384
385static struct clk fec_clk = {
386 .name = "fec_clk",
387 .flags = CLK_HAS_CTRL,
388 .reg = 0,
389 .bit = 13,
390 .calc = unity_clk_calc,
391 .parent = &ips_clk,
392};
393
394static struct clk pci_clk = {
395 .name = "pci_clk",
396 .flags = CLK_HAS_CTRL,
397 .reg = 0,
398 .bit = 11,
399 .calc = generic_div_clk_calc,
400 .parent = &csb_clk,
401 .div_shift = 20,
402};
403
404/*
405 * Clocks controlled by SCCR2 (.reg = 1)
406 */
407static struct clk diu_clk = {
408 .name = "diu_clk",
409 .flags = CLK_HAS_CTRL,
410 .reg = 1,
411 .bit = 31,
412 .calc = diu_clk_calc,
413};
414
415static struct clk axe_clk = {
416 .name = "axe_clk",
417 .flags = CLK_HAS_CTRL,
418 .reg = 1,
419 .bit = 30,
420 .calc = unity_clk_calc,
421 .parent = &csb_clk,
422};
423
424static struct clk usb1_clk = {
425 .name = "usb1_clk",
426 .flags = CLK_HAS_CTRL,
427 .reg = 1,
428 .bit = 28,
429 .calc = unity_clk_calc,
430 .parent = &csb_clk,
431};
432
433static struct clk usb2_clk = {
434 .name = "usb2_clk",
435 .flags = CLK_HAS_CTRL,
436 .reg = 1,
437 .bit = 27,
438 .calc = unity_clk_calc,
439 .parent = &csb_clk,
440};
441
442static struct clk i2c_clk = {
443 .name = "i2c_clk",
444 .flags = CLK_HAS_CTRL,
445 .reg = 1,
446 .bit = 26,
447 .calc = unity_clk_calc,
448 .parent = &ips_clk,
449};
450
451static struct clk mscan_clk = {
452 .name = "mscan_clk",
453 .flags = CLK_HAS_CTRL,
454 .reg = 1,
455 .bit = 25,
456 .calc = unity_clk_calc,
457 .parent = &ips_clk,
458};
459
460static struct clk sdhc_clk = {
461 .name = "sdhc_clk",
462 .flags = CLK_HAS_CTRL,
463 .reg = 1,
464 .bit = 24,
465 .calc = unity_clk_calc,
466 .parent = &ips_clk,
467};
468
469static struct clk mbx_bus_clk = {
470 .name = "mbx_bus_clk",
471 .flags = CLK_HAS_CTRL,
472 .reg = 1,
473 .bit = 22,
474 .calc = half_clk_calc,
475 .parent = &csb_clk,
476};
477
478static struct clk mbx_clk = {
479 .name = "mbx_clk",
480 .flags = CLK_HAS_CTRL,
481 .reg = 1,
482 .bit = 21,
483 .calc = unity_clk_calc,
484 .parent = &csb_clk,
485};
486
487static struct clk mbx_3d_clk = {
488 .name = "mbx_3d_clk",
489 .flags = CLK_HAS_CTRL,
490 .reg = 1,
491 .bit = 20,
492 .calc = generic_div_clk_calc,
493 .parent = &mbx_bus_clk,
494 .div_shift = 14,
495};
496
497static void psc_mclk_in_calc(struct clk *clk)
498{
499 clk->rate = devtree_getfreq("psc_mclk_in");
500 if (!clk->rate)
501 clk->rate = 25000000;
502}
503
504static struct clk psc_mclk_in = {
505 .name = "psc_mclk_in",
506 .calc = psc_mclk_in_calc,
507};
508
509static struct clk spdif_txclk = {
510 .name = "spdif_txclk",
511 .flags = CLK_HAS_CTRL,
512 .reg = 1,
513 .bit = 23,
514};
515
516static struct clk spdif_rxclk = {
517 .name = "spdif_rxclk",
518 .flags = CLK_HAS_CTRL,
519 .reg = 1,
520 .bit = 23,
521};
522
523static void ac97_clk_calc(struct clk *clk)
524{
525 /* ac97 bit clock is always 24.567 MHz */
526 clk->rate = 24567000;
527}
528
529static struct clk ac97_clk = {
530 .name = "ac97_clk_in",
531 .calc = ac97_clk_calc,
532};
533
534struct clk *rate_clks[] = {
535 &ref_clk,
536 &sys_clk,
537 &diu_clk,
538 &csb_clk,
539 &e300_clk,
540 &ips_clk,
541 &fec_clk,
542 &sata_clk,
543 &pata_clk,
544 &nfc_clk,
545 &lpc_clk,
546 &mbx_bus_clk,
547 &mbx_clk,
548 &mbx_3d_clk,
549 &axe_clk,
550 &usb1_clk,
551 &usb2_clk,
552 &i2c_clk,
553 &mscan_clk,
554 &sdhc_clk,
555 &pci_clk,
556 &psc_mclk_in,
557 &spdif_txclk,
558 &spdif_rxclk,
559 &ac97_clk,
560 NULL
561};
562
563static void rate_clk_init(struct clk *clk)
564{
565 if (clk->calc) {
566 clk->calc(clk);
567 clk->flags |= CLK_HAS_RATE;
568 clk_register(clk);
569 } else {
570 printk(KERN_WARNING
571 "Could not initialize clk %s without a calc routine\n",
572 clk->name);
573 }
574}
575
576static void rate_clks_init(void)
577{
578 struct clk **cpp, *clk;
579
580 cpp = rate_clks;
581 while ((clk = *cpp++))
582 rate_clk_init(clk);
583}
584
585/*
586 * There are two clk enable registers with 32 enable bits each
587 * psc clocks and device clocks are all stored in dev_clks
588 */
589struct clk dev_clks[2][32];
590
591/*
592 * Given a psc number return the dev_clk
593 * associated with it
594 */
595static struct clk *psc_dev_clk(int pscnum)
596{
597 int reg, bit;
598 struct clk *clk;
599
600 reg = 0;
601 bit = 27 - pscnum;
602
603 clk = &dev_clks[reg][bit];
604 clk->reg = 0;
605 clk->bit = bit;
606 return clk;
607}
608
609/*
610 * PSC clock rate calculation
611 */
612static void psc_calc_rate(struct clk *clk, int pscnum, struct device_node *np)
613{
614 unsigned long mclk_src = sys_clk.rate;
615 unsigned long mclk_div;
616
617 /*
618 * Can only change value of mclk divider
619 * when the divider is disabled.
620 *
621 * Zero is not a valid divider so minimum
622 * divider is 1
623 *
624 * disable/set divider/enable
625 */
626 out_be32(&clockctl->pccr[pscnum], 0);
627 out_be32(&clockctl->pccr[pscnum], 0x00020000);
628 out_be32(&clockctl->pccr[pscnum], 0x00030000);
629
630 if (clockctl->pccr[pscnum] & 0x80) {
631 clk->rate = spdif_rxclk.rate;
632 return;
633 }
634
635 switch ((clockctl->pccr[pscnum] >> 14) & 0x3) {
636 case 0:
637 mclk_src = sys_clk.rate;
638 break;
639 case 1:
640 mclk_src = ref_clk.rate;
641 break;
642 case 2:
643 mclk_src = psc_mclk_in.rate;
644 break;
645 case 3:
646 mclk_src = spdif_txclk.rate;
647 break;
648 }
649
650 mclk_div = ((clockctl->pccr[pscnum] >> 17) & 0x7fff) + 1;
651 clk->rate = mclk_src / mclk_div;
652}
653
654/*
655 * Find all psc nodes in device tree and assign a clock
656 * with name "psc%d_mclk" and dev pointing at the device
657 * returned from of_find_device_by_node
658 */
659static void psc_clks_init(void)
660{
661 struct device_node *np;
662 const u32 *cell_index;
663 struct of_device *ofdev;
664
665 for_each_compatible_node(np, NULL, "fsl,mpc5121-psc") {
666 cell_index = of_get_property(np, "cell-index", NULL);
667 if (cell_index) {
668 int pscnum = *cell_index;
669 struct clk *clk = psc_dev_clk(pscnum);
670
671 clk->flags = CLK_HAS_RATE | CLK_HAS_CTRL;
672 ofdev = of_find_device_by_node(np);
673 clk->dev = &ofdev->dev;
674 /*
675 * AC97 is special rate clock does
676 * not go through normal path
677 */
678 if (strcmp("ac97", np->name) == 0)
679 clk->rate = ac97_clk.rate;
680 else
681 psc_calc_rate(clk, pscnum, np);
682 sprintf(clk->name, "psc%d_mclk", pscnum);
683 clk_register(clk);
684 clk_enable(clk);
685 }
686 }
687}
688
689static struct clk_interface mpc5121_clk_functions = {
690 .clk_get = mpc5121_clk_get,
691 .clk_enable = mpc5121_clk_enable,
692 .clk_disable = mpc5121_clk_disable,
693 .clk_get_rate = mpc5121_clk_get_rate,
694 .clk_put = mpc5121_clk_put,
695 .clk_round_rate = mpc5121_clk_round_rate,
696 .clk_set_rate = mpc5121_clk_set_rate,
697 .clk_set_parent = NULL,
698 .clk_get_parent = NULL,
699};
700
701static int
702mpc5121_clk_init(void)
703{
704 struct device_node *np;
705
706 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-clock");
707 if (np) {
708 clockctl = of_iomap(np, 0);
709 of_node_put(np);
710 }
711
712 if (!clockctl) {
713 printk(KERN_ERR "Could not map clock control registers\n");
714 return 0;
715 }
716
717 rate_clks_init();
718 psc_clks_init();
719
720 /* leave clockctl mapped forever */
721 /*iounmap(clockctl); */
722 DEBUG_CLK_DUMP();
723 clocks_initialized++;
724 clk_functions = mpc5121_clk_functions;
725 return 0;
726}
727
728
729arch_initcall(mpc5121_clk_init);
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.c b/arch/powerpc/platforms/512x/mpc5121_ads.c
index 50bd3a319022..5ebf6939a697 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.c
@@ -1,5 +1,5 @@
1/* 1/*
2 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved. 2 * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc. All rights reserved.
3 * 3 *
4 * Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007 4 * Author: John Rigby, <jrigby@freescale.com>, Thur Mar 29 2007
5 * 5 *
@@ -15,7 +15,6 @@
15 15
16#include <linux/kernel.h> 16#include <linux/kernel.h>
17#include <linux/io.h> 17#include <linux/io.h>
18#include <linux/irq.h>
19#include <linux/of_platform.h> 18#include <linux/of_platform.h>
20 19
21#include <asm/machdep.h> 20#include <asm/machdep.h>
@@ -23,65 +22,22 @@
23#include <asm/prom.h> 22#include <asm/prom.h>
24#include <asm/time.h> 23#include <asm/time.h>
25 24
26/** 25#include "mpc512x.h"
27 * mpc512x_find_ips_freq - Find the IPS bus frequency for a device 26#include "mpc5121_ads.h"
28 * @node: device node
29 *
30 * Returns IPS bus frequency, or 0 if the bus frequency cannot be found.
31 */
32unsigned long
33mpc512x_find_ips_freq(struct device_node *node)
34{
35 struct device_node *np;
36 const unsigned int *p_ips_freq = NULL;
37
38 of_node_get(node);
39 while (node) {
40 p_ips_freq = of_get_property(node, "bus-frequency", NULL);
41 if (p_ips_freq)
42 break;
43
44 np = of_get_parent(node);
45 of_node_put(node);
46 node = np;
47 }
48 if (node)
49 of_node_put(node);
50
51 return p_ips_freq ? *p_ips_freq : 0;
52}
53EXPORT_SYMBOL(mpc512x_find_ips_freq);
54
55static struct of_device_id __initdata of_bus_ids[] = {
56 { .name = "soc", },
57 { .name = "localbus", },
58 {},
59};
60 27
61static void __init mpc5121_ads_declare_of_platform_devices(void) 28static void __init mpc5121_ads_setup_arch(void)
62{ 29{
63 /* Find every child of the SOC node and add it to of_platform */ 30 printk(KERN_INFO "MPC5121 ADS board from Freescale Semiconductor\n");
64 if (of_platform_bus_probe(NULL, of_bus_ids, NULL)) 31 /*
65 printk(KERN_ERR __FILE__ ": " 32 * cpld regs are needed early
66 "Error while probing of_platform bus\n"); 33 */
34 mpc5121_ads_cpld_map();
67} 35}
68 36
69static void __init mpc5121_ads_init_IRQ(void) 37static void __init mpc5121_ads_init_IRQ(void)
70{ 38{
71 struct device_node *np; 39 mpc512x_init_IRQ();
72 40 mpc5121_ads_cpld_pic_init();
73 np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
74 if (!np)
75 return;
76
77 ipic_init(np, 0);
78 of_node_put(np);
79
80 /*
81 * Initialize the default interrupt mapping priorities,
82 * in case the boot rom changed something on us.
83 */
84 ipic_set_default_priority();
85} 41}
86 42
87/* 43/*
@@ -97,7 +53,8 @@ static int __init mpc5121_ads_probe(void)
97define_machine(mpc5121_ads) { 53define_machine(mpc5121_ads) {
98 .name = "MPC5121 ADS", 54 .name = "MPC5121 ADS",
99 .probe = mpc5121_ads_probe, 55 .probe = mpc5121_ads_probe,
100 .init = mpc5121_ads_declare_of_platform_devices, 56 .setup_arch = mpc5121_ads_setup_arch,
57 .init = mpc512x_declare_of_platform_devices,
101 .init_IRQ = mpc5121_ads_init_IRQ, 58 .init_IRQ = mpc5121_ads_init_IRQ,
102 .get_irq = ipic_get_irq, 59 .get_irq = ipic_get_irq,
103 .calibrate_decr = generic_calibrate_decr, 60 .calibrate_decr = generic_calibrate_decr,
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads.h b/arch/powerpc/platforms/512x/mpc5121_ads.h
new file mode 100644
index 000000000000..662076cfee2f
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads.h
@@ -0,0 +1,16 @@
1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * Prototypes for ADS5121 specific code
10 */
11
12#ifndef __MPC512ADS_H__
13#define __MPC512ADS_H__
14extern void __init mpc5121_ads_cpld_map(void);
15extern void __init mpc5121_ads_cpld_pic_init(void);
16#endif /* __MPC512ADS_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
new file mode 100644
index 000000000000..a6ce80566625
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -0,0 +1,204 @@
1/*
2 * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: John Rigby, <jrigby@freescale.com>
5 *
6 * Description:
7 * MPC5121ADS CPLD irq handling
8 *
9 * This is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#undef DEBUG
16
17#include <linux/kernel.h>
18#include <linux/interrupt.h>
19#include <linux/irq.h>
20#include <linux/io.h>
21#include <asm/prom.h>
22
23static struct device_node *cpld_pic_node;
24static struct irq_host *cpld_pic_host;
25
26/*
27 * Bits to ignore in the misc_status register
28 * 0x10 touch screen pendown is hard routed to irq1
29 * 0x02 pci status is read from pci status register
30 */
31#define MISC_IGNORE 0x12
32
33/*
34 * Nothing to ignore in pci status register
35 */
36#define PCI_IGNORE 0x00
37
38struct cpld_pic {
39 u8 pci_mask;
40 u8 pci_status;
41 u8 route;
42 u8 misc_mask;
43 u8 misc_status;
44 u8 misc_control;
45};
46
47static struct cpld_pic __iomem *cpld_regs;
48
49static void __iomem *
50irq_to_pic_mask(unsigned int irq)
51{
52 return irq <= 7 ? &cpld_regs->pci_mask : &cpld_regs->misc_mask;
53}
54
55static unsigned int
56irq_to_pic_bit(unsigned int irq)
57{
58 return 1 << (irq & 0x7);
59}
60
61static void
62cpld_mask_irq(unsigned int irq)
63{
64 unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
65 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
66
67 out_8(pic_mask,
68 in_8(pic_mask) | irq_to_pic_bit(cpld_irq));
69}
70
71static void
72cpld_unmask_irq(unsigned int irq)
73{
74 unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
75 void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
76
77 out_8(pic_mask,
78 in_8(pic_mask) & ~irq_to_pic_bit(cpld_irq));
79}
80
81static struct irq_chip cpld_pic = {
82 .typename = " CPLD PIC ",
83 .mask = cpld_mask_irq,
84 .ack = cpld_mask_irq,
85 .unmask = cpld_unmask_irq,
86};
87
88static int
89cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
90 u8 __iomem *maskp)
91{
92 int cpld_irq;
93 u8 status = in_8(statusp);
94 u8 mask = in_8(maskp);
95
96 /* ignore don't cares and masked irqs */
97 status |= (ignore | mask);
98
99 if (status == 0xff)
100 return NO_IRQ_IGNORE;
101
102 cpld_irq = ffz(status) + offset;
103
104 return irq_linear_revmap(cpld_pic_host, cpld_irq);
105}
106
107static void
108cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
109{
110 irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
111 &cpld_regs->pci_mask);
112 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
113 generic_handle_irq(irq);
114 return;
115 }
116
117 irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
118 &cpld_regs->misc_mask);
119 if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
120 generic_handle_irq(irq);
121 return;
122 }
123}
124
125static int
126cpld_pic_host_match(struct irq_host *h, struct device_node *node)
127{
128 return cpld_pic_node == node;
129}
130
131static int
132cpld_pic_host_map(struct irq_host *h, unsigned int virq,
133 irq_hw_number_t hw)
134{
135 get_irq_desc(virq)->status |= IRQ_LEVEL;
136 set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq);
137 return 0;
138}
139
140static struct
141irq_host_ops cpld_pic_host_ops = {
142 .match = cpld_pic_host_match,
143 .map = cpld_pic_host_map,
144};
145
146void __init
147mpc5121_ads_cpld_map(void)
148{
149 struct device_node *np = NULL;
150
151 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
152 if (!np) {
153 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
154 return;
155 }
156
157 cpld_regs = of_iomap(np, 0);
158 of_node_put(np);
159}
160
161void __init
162mpc5121_ads_cpld_pic_init(void)
163{
164 unsigned int cascade_irq;
165 struct device_node *np = NULL;
166
167 pr_debug("cpld_ic_init\n");
168
169 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121ads-cpld-pic");
170 if (!np) {
171 printk(KERN_ERR "CPLD PIC init: can not find cpld-pic node\n");
172 return;
173 }
174
175 if (!cpld_regs)
176 goto end;
177
178 cascade_irq = irq_of_parse_and_map(np, 0);
179 if (cascade_irq == NO_IRQ)
180 goto end;
181
182 /*
183 * statically route touch screen pendown through 1
184 * and ignore it here
185 * route all others through our cascade irq
186 */
187 out_8(&cpld_regs->route, 0xfd);
188 out_8(&cpld_regs->pci_mask, 0xff);
189 /* unmask pci ints in misc mask */
190 out_8(&cpld_regs->misc_mask, ~(MISC_IGNORE));
191
192 cpld_pic_node = of_node_get(np);
193
194 cpld_pic_host =
195 irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, 16, &cpld_pic_host_ops, 16);
196 if (!cpld_pic_host) {
197 printk(KERN_ERR "CPLD PIC: failed to allocate irq host!\n");
198 goto end;
199 }
200
201 set_irq_chained_handler(cascade_irq, cpld_pic_cascade);
202end:
203 of_node_put(np);
204}
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
new file mode 100644
index 000000000000..2479de9e2d12
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -0,0 +1,58 @@
1/*
2 * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: John Rigby, <jrigby@freescale.com>
5 *
6 * Description:
7 * MPC5121 SoC setup
8 *
9 * This is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 *
14 */
15
16#include <linux/kernel.h>
17#include <linux/of_platform.h>
18
19#include <asm/machdep.h>
20#include <asm/ipic.h>
21#include <asm/prom.h>
22#include <asm/time.h>
23
24#include "mpc512x.h"
25
26/*
27 * list of supported boards
28 */
29static char *board[] __initdata = {
30 "prt,prtlvt",
31 NULL
32};
33
34/*
35 * Called very early, MMU is off, device-tree isn't unflattened
36 */
37static int __init mpc5121_generic_probe(void)
38{
39 unsigned long node = of_get_flat_dt_root();
40 int i = 0;
41
42 while (board[i]) {
43 if (of_flat_dt_is_compatible(node, board[i]))
44 break;
45 i++;
46 }
47
48 return board[i] != NULL;
49}
50
51define_machine(mpc5121_generic) {
52 .name = "MPC5121 generic",
53 .probe = mpc5121_generic_probe,
54 .init = mpc512x_declare_of_platform_devices,
55 .init_IRQ = mpc512x_init_IRQ,
56 .get_irq = ipic_get_irq,
57 .calibrate_decr = generic_calibrate_decr,
58};
diff --git a/arch/powerpc/platforms/512x/mpc512x.h b/arch/powerpc/platforms/512x/mpc512x.h
new file mode 100644
index 000000000000..9c03693cb009
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x.h
@@ -0,0 +1,17 @@
1/*
2 * Copyright (C) 2007 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 *
9 * Prototypes for MPC512x shared code
10 */
11
12#ifndef __MPC512X_H__
13#define __MPC512X_H__
14extern unsigned long mpc512x_find_ips_freq(struct device_node *node);
15extern void __init mpc512x_init_IRQ(void);
16void __init mpc512x_declare_of_platform_devices(void);
17#endif /* __MPC512X_H__ */
diff --git a/arch/powerpc/platforms/512x/mpc512x_shared.c b/arch/powerpc/platforms/512x/mpc512x_shared.c
new file mode 100644
index 000000000000..d8cd579f3191
--- /dev/null
+++ b/arch/powerpc/platforms/512x/mpc512x_shared.c
@@ -0,0 +1,83 @@
1/*
2 * Copyright (C) 2007,2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: John Rigby <jrigby@freescale.com>
5 *
6 * Description:
7 * MPC512x Shared code
8 *
9 * This is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/io.h>
17#include <linux/irq.h>
18#include <linux/of_platform.h>
19
20#include <asm/machdep.h>
21#include <asm/ipic.h>
22#include <asm/prom.h>
23#include <asm/time.h>
24
25#include "mpc512x.h"
26
27unsigned long
28mpc512x_find_ips_freq(struct device_node *node)
29{
30 struct device_node *np;
31 const unsigned int *p_ips_freq = NULL;
32
33 of_node_get(node);
34 while (node) {
35 p_ips_freq = of_get_property(node, "bus-frequency", NULL);
36 if (p_ips_freq)
37 break;
38
39 np = of_get_parent(node);
40 of_node_put(node);
41 node = np;
42 }
43 if (node)
44 of_node_put(node);
45
46 return p_ips_freq ? *p_ips_freq : 0;
47}
48EXPORT_SYMBOL(mpc512x_find_ips_freq);
49
50void __init mpc512x_init_IRQ(void)
51{
52 struct device_node *np;
53
54 np = of_find_compatible_node(NULL, NULL, "fsl,mpc5121-ipic");
55 if (!np)
56 return;
57
58 ipic_init(np, 0);
59 of_node_put(np);
60
61 /*
62 * Initialize the default interrupt mapping priorities,
63 * in case the boot rom changed something on us.
64 */
65 ipic_set_default_priority();
66}
67
68/*
69 * Nodes to do bus probe on, soc and localbus
70 */
71static struct of_device_id __initdata of_bus_ids[] = {
72 { .compatible = "fsl,mpc5121-immr", },
73 { .compatible = "fsl,mpc5121-localbus", },
74 {},
75};
76
77void __init mpc512x_declare_of_platform_devices(void)
78{
79 if (of_platform_bus_probe(NULL, of_bus_ids, NULL))
80 printk(KERN_ERR __FILE__ ": "
81 "Error while probing of_platform bus\n");
82}
83
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pci.c b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
index e3428ddd9040..5a382bb15f62 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pci.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pci.c
@@ -63,6 +63,7 @@
63 63
64#define MPC52xx_PCI_TCR_P 0x01000000 64#define MPC52xx_PCI_TCR_P 0x01000000
65#define MPC52xx_PCI_TCR_LD 0x00010000 65#define MPC52xx_PCI_TCR_LD 0x00010000
66#define MPC52xx_PCI_TCR_WCT8 0x00000008
66 67
67#define MPC52xx_PCI_TBATR_DISABLE 0x0 68#define MPC52xx_PCI_TBATR_DISABLE 0x0
68#define MPC52xx_PCI_TBATR_ENABLE 0x1 69#define MPC52xx_PCI_TBATR_ENABLE 0x1
@@ -313,7 +314,7 @@ mpc52xx_pci_setup(struct pci_controller *hose,
313 out_be32(&pci_regs->tbatr1, 314 out_be32(&pci_regs->tbatr1,
314 MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM ); 315 MPC52xx_PCI_TBATR_ENABLE | MPC52xx_PCI_TARGET_MEM );
315 316
316 out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD); 317 out_be32(&pci_regs->tcr, MPC52xx_PCI_TCR_LD | MPC52xx_PCI_TCR_WCT8);
317 318
318 tmp = in_be32(&pci_regs->gscr); 319 tmp = in_be32(&pci_regs->gscr);
319#if 0 320#if 0
diff --git a/arch/powerpc/platforms/82xx/Kconfig b/arch/powerpc/platforms/82xx/Kconfig
index 917ac8891555..1c8034bfa796 100644
--- a/arch/powerpc/platforms/82xx/Kconfig
+++ b/arch/powerpc/platforms/82xx/Kconfig
@@ -1,7 +1,8 @@
1choice 1menuconfig PPC_82xx
2 prompt "82xx Board Type" 2 bool "82xx-based boards (PQ II)"
3 depends on PPC_82xx 3 depends on 6xx && PPC_MULTIPLATFORM
4 default MPC8272_ADS 4
5if PPC_82xx
5 6
6config MPC8272_ADS 7config MPC8272_ADS
7 bool "Freescale MPC8272 ADS" 8 bool "Freescale MPC8272 ADS"
@@ -36,7 +37,7 @@ config EP8248E
36 This board is also resold by Freescale as the QUICCStart 37 This board is also resold by Freescale as the QUICCStart
37 MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE. 38 MPC8248 Evaluation System and/or the CWH-PPC-8248N-VE.
38 39
39endchoice 40endif
40 41
41config PQ2ADS 42config PQ2ADS
42 bool 43 bool
diff --git a/arch/powerpc/platforms/82xx/mpc8272_ads.c b/arch/powerpc/platforms/82xx/mpc8272_ads.c
index 7d3018751988..8054c685d323 100644
--- a/arch/powerpc/platforms/82xx/mpc8272_ads.c
+++ b/arch/powerpc/platforms/82xx/mpc8272_ads.c
@@ -96,6 +96,10 @@ static struct cpm_pin mpc8272_ads_pins[] = {
96 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 96 {1, 31, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
97 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 97 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
98 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 98 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
99
100 /* I2C */
101 {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
102 {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
99}; 103};
100 104
101static void __init init_ioports(void) 105static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index a8013816125c..9876d7e072f4 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -109,7 +109,7 @@ static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
109{ 109{
110 get_irq_desc(virq)->status |= IRQ_LEVEL; 110 get_irq_desc(virq)->status |= IRQ_LEVEL;
111 set_irq_chip_data(virq, h->host_data); 111 set_irq_chip_data(virq, h->host_data);
112 set_irq_chip(virq, &pq2ads_pci_ic); 112 set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
113 return 0; 113 return 0;
114} 114}
115 115
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 13587e2e8680..27d9bf86de01 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -1,10 +1,12 @@
1menuconfig MPC83xx 1menuconfig PPC_83xx
2 bool "83xx Board Type" 2 bool "83xx-based boards"
3 depends on PPC_83xx 3 depends on 6xx && PPC_MULTIPLATFORM
4 select PPC_UDBG_16550 4 select PPC_UDBG_16550
5 select PPC_INDIRECT_PCI 5 select PPC_INDIRECT_PCI
6 select FSL_SOC
7 select IPIC
6 8
7if MPC83xx 9if PPC_83xx
8 10
9config MPC831x_RDB 11config MPC831x_RDB
10 bool "Freescale MPC831x RDB" 12 bool "Freescale MPC831x RDB"
@@ -58,6 +60,17 @@ config MPC836x_MDS
58 help 60 help
59 This option enables support for the MPC836x MDS Processor Board. 61 This option enables support for the MPC836x MDS Processor Board.
60 62
63config MPC836x_RDK
64 bool "Freescale/Logic MPC836x RDK"
65 select DEFAULT_UIMAGE
66 select QUICC_ENGINE
67 select QE_GPIO
68 select FSL_GTM
69 select FSL_LBC
70 help
71 This option enables support for the MPC836x RDK Processor Board,
72 also known as ZOOM PowerQUICC Kit.
73
61config MPC837x_MDS 74config MPC837x_MDS
62 bool "Freescale MPC837x MDS" 75 bool "Freescale MPC837x MDS"
63 select DEFAULT_UIMAGE 76 select DEFAULT_UIMAGE
@@ -79,6 +92,15 @@ config SBC834x
79 help 92 help
80 This option enables support for the Wind River SBC834x board. 93 This option enables support for the Wind River SBC834x board.
81 94
95config ASP834x
96 bool "Analogue & Micro ASP 834x"
97 select PPC_MPC834x
98 select REDBOOT
99 help
100 This enables support for the Analogue & Micro ASP 83xx
101 board.
102
103
82endif 104endif
83 105
84# used for usb 106# used for usb
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 7e6dd3e259d8..f331fd7dd836 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -8,7 +8,9 @@ obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o
8obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o 8obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o
9obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o 9obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o
10obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o 10obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o
11obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o
11obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o 12obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o
12obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o 13obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o
13obj-$(CONFIG_SBC834x) += sbc834x.o 14obj-$(CONFIG_SBC834x) += sbc834x.o
14obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o 15obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o
16obj-$(CONFIG_ASP834x) += asp834x.o
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c
new file mode 100644
index 000000000000..bb30d67ad0a2
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/asp834x.c
@@ -0,0 +1,90 @@
1/*
2 * arch/powerpc/platforms/83xx/asp834x.c
3 *
4 * Analogue & Micro ASP8347 board specific routines
5 * clone of mpc834x_itx
6 *
7 * Copyright 2008 Codehermit
8 *
9 * Maintainer: Bryan O'Donoghue <bodonoghue@codhermit.ie>
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License as published by the
13 * Free Software Foundation; either version 2 of the License, or (at your
14 * option) any later version.
15 */
16
17#include <linux/pci.h>
18#include <linux/of_platform.h>
19
20#include <asm/time.h>
21#include <asm/ipic.h>
22#include <asm/udbg.h>
23
24#include "mpc83xx.h"
25
26/* ************************************************************************
27 *
28 * Setup the architecture
29 *
30 */
31static void __init asp834x_setup_arch(void)
32{
33 if (ppc_md.progress)
34 ppc_md.progress("asp834x_setup_arch()", 0);
35
36 mpc834x_usb_cfg();
37}
38
39static void __init asp834x_init_IRQ(void)
40{
41 struct device_node *np;
42
43 np = of_find_node_by_type(NULL, "ipic");
44 if (!np)
45 return;
46
47 ipic_init(np, 0);
48
49 of_node_put(np);
50
51 /* Initialize the default interrupt mapping priorities,
52 * in case the boot rom changed something on us.
53 */
54 ipic_set_default_priority();
55}
56
57static struct __initdata of_device_id asp8347_ids[] = {
58 { .type = "soc", },
59 { .compatible = "soc", },
60 { .compatible = "simple-bus", },
61 {},
62};
63
64static int __init asp8347_declare_of_platform_devices(void)
65{
66 of_platform_bus_probe(NULL, asp8347_ids, NULL);
67 return 0;
68}
69machine_device_initcall(asp834x, asp8347_declare_of_platform_devices);
70
71/*
72 * Called very early, MMU is off, device-tree isn't unflattened
73 */
74static int __init asp834x_probe(void)
75{
76 unsigned long root = of_get_flat_dt_root();
77 return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e");
78}
79
80define_machine(asp834x) {
81 .name = "ASP8347E",
82 .probe = asp834x_probe,
83 .setup_arch = asp834x_setup_arch,
84 .init_IRQ = asp834x_init_IRQ,
85 .get_irq = ipic_get_irq,
86 .restart = mpc83xx_restart,
87 .time_init = mpc83xx_time_init,
88 .calibrate_decr = generic_calibrate_decr,
89 .progress = udbg_progress,
90};
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
new file mode 100644
index 000000000000..c10dec4bf178
--- /dev/null
+++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c
@@ -0,0 +1,102 @@
1/*
2 * MPC8360E-RDK board file.
3 *
4 * Copyright (c) 2006 Freescale Semicondutor, Inc.
5 * Copyright (c) 2007-2008 MontaVista Software, Inc.
6 *
7 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License as published by the
11 * Free Software Foundation; either version 2 of the License, or (at your
12 * option) any later version.
13 */
14
15#include <linux/kernel.h>
16#include <linux/pci.h>
17#include <linux/of_platform.h>
18#include <linux/io.h>
19#include <asm/prom.h>
20#include <asm/time.h>
21#include <asm/ipic.h>
22#include <asm/udbg.h>
23#include <asm/qe.h>
24#include <asm/qe_ic.h>
25#include <sysdev/fsl_soc.h>
26
27#include "mpc83xx.h"
28
29static struct of_device_id __initdata mpc836x_rdk_ids[] = {
30 { .compatible = "simple-bus", },
31 {},
32};
33
34static int __init mpc836x_rdk_declare_of_platform_devices(void)
35{
36 return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL);
37}
38machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices);
39
40static void __init mpc836x_rdk_setup_arch(void)
41{
42#ifdef CONFIG_PCI
43 struct device_node *np;
44#endif
45
46 if (ppc_md.progress)
47 ppc_md.progress("mpc836x_rdk_setup_arch()", 0);
48
49#ifdef CONFIG_PCI
50 for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
51 mpc83xx_add_bridge(np);
52#endif
53
54 qe_reset();
55}
56
57static void __init mpc836x_rdk_init_IRQ(void)
58{
59 struct device_node *np;
60
61 np = of_find_compatible_node(NULL, NULL, "fsl,ipic");
62 if (!np)
63 return;
64
65 ipic_init(np, 0);
66
67 /*
68 * Initialize the default interrupt mapping priorities,
69 * in case the boot rom changed something on us.
70 */
71 ipic_set_default_priority();
72 of_node_put(np);
73
74 np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic");
75 if (!np)
76 return;
77
78 qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic);
79 of_node_put(np);
80}
81
82/*
83 * Called very early, MMU is off, device-tree isn't unflattened.
84 */
85static int __init mpc836x_rdk_probe(void)
86{
87 unsigned long root = of_get_flat_dt_root();
88
89 return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk");
90}
91
92define_machine(mpc836x_rdk) {
93 .name = "MPC836x RDK",
94 .probe = mpc836x_rdk_probe,
95 .setup_arch = mpc836x_rdk_setup_arch,
96 .init_IRQ = mpc836x_rdk_init_IRQ,
97 .get_irq = ipic_get_irq,
98 .restart = mpc83xx_restart,
99 .time_init = mpc83xx_time_init,
100 .calibrate_decr = generic_calibrate_decr,
101 .progress = udbg_progress,
102};
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index ecbe580c3f32..cebea5cadbc1 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -38,6 +38,12 @@ config MPC85xx_MDS
38 help 38 help
39 This option enables support for the MPC85xx MDS board 39 This option enables support for the MPC85xx MDS board
40 40
41config MPC8536_DS
42 bool "Freescale MPC8536 DS"
43 select DEFAULT_UIMAGE
44 help
45 This option enables support for the MPC8536 DS board
46
41config MPC85xx_DS 47config MPC85xx_DS
42 bool "Freescale MPC85xx DS" 48 bool "Freescale MPC85xx DS"
43 select PPC_I8259 49 select PPC_I8259
@@ -75,6 +81,14 @@ config TQM8541
75 select TQM85xx 81 select TQM85xx
76 select CPM2 82 select CPM2
77 83
84config TQM8548
85 bool "TQ Components TQM8548"
86 help
87 This option enables support for the TQ Components TQM8548 board.
88 select DEFAULT_UIMAGE
89 select PPC_CPM_NEW_BINDING
90 select TQM85xx
91
78config TQM8555 92config TQM8555
79 bool "TQ Components TQM8555" 93 bool "TQ Components TQM8555"
80 help 94 help
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index 6cea185f62b2..cb3054e1001d 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -4,6 +4,7 @@
4obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o 4obj-$(CONFIG_MPC8540_ADS) += mpc85xx_ads.o
5obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o 5obj-$(CONFIG_MPC8560_ADS) += mpc85xx_ads.o
6obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o 6obj-$(CONFIG_MPC85xx_CDS) += mpc85xx_cds.o
7obj-$(CONFIG_MPC8536_DS) += mpc8536_ds.o
7obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o 8obj-$(CONFIG_MPC85xx_DS) += mpc85xx_ds.o
8obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o 9obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
9obj-$(CONFIG_STX_GP3) += stx_gp3.o 10obj-$(CONFIG_STX_GP3) += stx_gp3.o
diff --git a/arch/powerpc/platforms/85xx/mpc8536_ds.c b/arch/powerpc/platforms/85xx/mpc8536_ds.c
new file mode 100644
index 000000000000..6b846aa1ced9
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/mpc8536_ds.c
@@ -0,0 +1,125 @@
1/*
2 * MPC8536 DS Board Setup
3 *
4 * Copyright 2008 Freescale Semiconductor, Inc.
5 *
6 * This program is free software; you can redistribute it and/or modify it
7 * under the terms of the GNU General Public License as published by the
8 * Free Software Foundation; either version 2 of the License, or (at your
9 * option) any later version.
10 */
11
12#include <linux/stddef.h>
13#include <linux/kernel.h>
14#include <linux/pci.h>
15#include <linux/kdev_t.h>
16#include <linux/delay.h>
17#include <linux/seq_file.h>
18#include <linux/interrupt.h>
19#include <linux/of_platform.h>
20
21#include <asm/system.h>
22#include <asm/time.h>
23#include <asm/machdep.h>
24#include <asm/pci-bridge.h>
25#include <mm/mmu_decl.h>
26#include <asm/prom.h>
27#include <asm/udbg.h>
28#include <asm/mpic.h>
29
30#include <sysdev/fsl_soc.h>
31#include <sysdev/fsl_pci.h>
32
33void __init mpc8536_ds_pic_init(void)
34{
35 struct mpic *mpic;
36 struct resource r;
37 struct device_node *np;
38
39 np = of_find_node_by_type(NULL, "open-pic");
40 if (np == NULL) {
41 printk(KERN_ERR "Could not find open-pic node\n");
42 return;
43 }
44
45 if (of_address_to_resource(np, 0, &r)) {
46 printk(KERN_ERR "Failed to map mpic register space\n");
47 of_node_put(np);
48 return;
49 }
50
51 mpic = mpic_alloc(np, r.start,
52 MPIC_PRIMARY | MPIC_WANTS_RESET |
53 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
54 0, 256, " OpenPIC ");
55 BUG_ON(mpic == NULL);
56 of_node_put(np);
57
58 mpic_init(mpic);
59}
60
61/*
62 * Setup the architecture
63 */
64static void __init mpc8536_ds_setup_arch(void)
65{
66#ifdef CONFIG_PCI
67 struct device_node *np;
68#endif
69
70 if (ppc_md.progress)
71 ppc_md.progress("mpc8536_ds_setup_arch()", 0);
72
73#ifdef CONFIG_PCI
74 for_each_node_by_type(np, "pci") {
75 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
76 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
77 struct resource rsrc;
78 of_address_to_resource(np, 0, &rsrc);
79 if ((rsrc.start & 0xfffff) == 0x8000)
80 fsl_add_bridge(np, 1);
81 else
82 fsl_add_bridge(np, 0);
83 }
84 }
85
86#endif
87
88 printk("MPC8536 DS board from Freescale Semiconductor\n");
89}
90
91static struct of_device_id __initdata mpc8536_ds_ids[] = {
92 { .type = "soc", },
93 { .compatible = "soc", },
94 {},
95};
96
97static int __init mpc8536_ds_publish_devices(void)
98{
99 return of_platform_bus_probe(NULL, mpc8536_ds_ids, NULL);
100}
101machine_device_initcall(mpc8536_ds, mpc8536_ds_publish_devices);
102
103/*
104 * Called very early, device-tree isn't unflattened
105 */
106static int __init mpc8536_ds_probe(void)
107{
108 unsigned long root = of_get_flat_dt_root();
109
110 return of_flat_dt_is_compatible(root, "fsl,mpc8536ds");
111}
112
113define_machine(mpc8536_ds) {
114 .name = "MPC8536 DS",
115 .probe = mpc8536_ds_probe,
116 .setup_arch = mpc8536_ds_setup_arch,
117 .init_IRQ = mpc8536_ds_pic_init,
118#ifdef CONFIG_PCI
119 .pcibios_fixup_bus = fsl_pcibios_fixup_bus,
120#endif
121 .get_irq = mpic_get_irq,
122 .restart = fsl_rstcr_restart,
123 .calibrate_decr = generic_calibrate_decr,
124 .progress = udbg_progress,
125};
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 3582c841844b..ba498d6f2d02 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -119,6 +119,8 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
119 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 119 {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
120 120
121 /* SCC2 */ 121 /* SCC2 */
122 {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
123 {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
122 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 124 {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
123 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 125 {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
124 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 126 {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -145,7 +147,6 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
145 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 147 {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
146 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 148 {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
147 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 149 {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
148 {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
149 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 150 {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
150 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 151 {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
151 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 152 {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -156,8 +157,9 @@ static const struct cpm_pin mpc8560_ads_pins[] = {
156 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, 157 {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
157 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 158 {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
158 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, 159 {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
159 {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ 160 {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */
160 {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ 161 {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */
162 {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
161}; 163};
162 164
163static void __init init_ioports(void) 165static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 8b1de7884be6..50d7ea8f922b 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -26,6 +26,7 @@
26#include <linux/module.h> 26#include <linux/module.h>
27#include <linux/interrupt.h> 27#include <linux/interrupt.h>
28#include <linux/fsl_devices.h> 28#include <linux/fsl_devices.h>
29#include <linux/of_platform.h>
29 30
30#include <asm/system.h> 31#include <asm/system.h>
31#include <asm/pgtable.h> 32#include <asm/pgtable.h>
@@ -335,6 +336,19 @@ static int __init mpc85xx_cds_probe(void)
335 return of_flat_dt_is_compatible(root, "MPC85xxCDS"); 336 return of_flat_dt_is_compatible(root, "MPC85xxCDS");
336} 337}
337 338
339static struct of_device_id __initdata of_bus_ids[] = {
340 { .type = "soc", },
341 { .compatible = "soc", },
342 { .compatible = "simple-bus", },
343 {},
344};
345
346static int __init declare_of_platform_devices(void)
347{
348 return of_platform_bus_probe(NULL, of_bus_ids, NULL);
349}
350machine_device_initcall(mpc85xx_cds, declare_of_platform_devices);
351
338define_machine(mpc85xx_cds) { 352define_machine(mpc85xx_cds) {
339 .name = "MPC85xx CDS", 353 .name = "MPC85xx CDS",
340 .probe = mpc85xx_cds_probe, 354 .probe = mpc85xx_cds_probe,
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index dfd8b4ad9b28..25f41cd2d33a 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -58,14 +58,13 @@ void __init mpc85xx_ds_pic_init(void)
58{ 58{
59 struct mpic *mpic; 59 struct mpic *mpic;
60 struct resource r; 60 struct resource r;
61 struct device_node *np = NULL; 61 struct device_node *np;
62#ifdef CONFIG_PPC_I8259 62#ifdef CONFIG_PPC_I8259
63 struct device_node *cascade_node = NULL; 63 struct device_node *cascade_node = NULL;
64 int cascade_irq; 64 int cascade_irq;
65#endif 65#endif
66 66
67 np = of_find_node_by_type(np, "open-pic"); 67 np = of_find_node_by_type(NULL, "open-pic");
68
69 if (np == NULL) { 68 if (np == NULL) {
70 printk(KERN_ERR "Could not find open-pic node\n"); 69 printk(KERN_ERR "Could not find open-pic node\n");
71 return; 70 return;
@@ -78,9 +77,11 @@ void __init mpc85xx_ds_pic_init(void)
78 } 77 }
79 78
80 mpic = mpic_alloc(np, r.start, 79 mpic = mpic_alloc(np, r.start,
81 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, 80 MPIC_PRIMARY | MPIC_WANTS_RESET |
81 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
82 0, 256, " OpenPIC "); 82 0, 256, " OpenPIC ");
83 BUG_ON(mpic == NULL); 83 BUG_ON(mpic == NULL);
84 of_node_put(np);
84 85
85 mpic_init(mpic); 86 mpic_init(mpic);
86 87
@@ -184,7 +185,7 @@ static int __init mpc8544_ds_probe(void)
184 } 185 }
185} 186}
186 187
187static struct of_device_id mpc85xxds_ids[] = { 188static struct of_device_id __initdata mpc85xxds_ids[] = {
188 { .type = "soc", }, 189 { .type = "soc", },
189 { .compatible = "soc", }, 190 { .compatible = "soc", },
190 {}, 191 {},
@@ -195,6 +196,7 @@ static int __init mpc85xxds_publish_devices(void)
195 return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); 196 return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL);
196} 197}
197machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); 198machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices);
199machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices);
198 200
199/* 201/*
200 * Called very early, device-tree isn't unflattened 202 * Called very early, device-tree isn't unflattened
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 77681acf1bae..d850880d6964 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -120,8 +120,18 @@ static void __init tqm85xx_setup_arch(void)
120#endif 120#endif
121 121
122#ifdef CONFIG_PCI 122#ifdef CONFIG_PCI
123 for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") 123 for_each_node_by_type(np, "pci") {
124 fsl_add_bridge(np, 1); 124 if (of_device_is_compatible(np, "fsl,mpc8540-pci") ||
125 of_device_is_compatible(np, "fsl,mpc8548-pcie")) {
126 struct resource rsrc;
127 if (!of_address_to_resource(np, 0, &rsrc)) {
128 if ((rsrc.start & 0xfffff) == 0x8000)
129 fsl_add_bridge(np, 1);
130 else
131 fsl_add_bridge(np, 0);
132 }
133 }
134 }
125#endif 135#endif
126} 136}
127 137
@@ -165,10 +175,11 @@ static int __init tqm85xx_probe(void)
165{ 175{
166 unsigned long root = of_get_flat_dt_root(); 176 unsigned long root = of_get_flat_dt_root();
167 177
168 if ((of_flat_dt_is_compatible(root, "tqm,8540")) || 178 if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) ||
169 (of_flat_dt_is_compatible(root, "tqm,8541")) || 179 (of_flat_dt_is_compatible(root, "tqc,tqm8541")) ||
170 (of_flat_dt_is_compatible(root, "tqm,8555")) || 180 (of_flat_dt_is_compatible(root, "tqc,tqm8548")) ||
171 (of_flat_dt_is_compatible(root, "tqm,8560"))) 181 (of_flat_dt_is_compatible(root, "tqc,tqm8555")) ||
182 (of_flat_dt_is_compatible(root, "tqc,tqm8560")))
172 return 1; 183 return 1;
173 184
174 return 0; 185 return 0;
diff --git a/arch/powerpc/platforms/86xx/Kconfig b/arch/powerpc/platforms/86xx/Kconfig
index 053f49a1dcae..80a81e02bb55 100644
--- a/arch/powerpc/platforms/86xx/Kconfig
+++ b/arch/powerpc/platforms/86xx/Kconfig
@@ -1,7 +1,13 @@
1choice 1config PPC_86xx
2 prompt "86xx Board Type" 2menuconfig PPC_86xx
3 depends on PPC_86xx 3 bool "86xx-based boards"
4 default MPC8641_HPCN 4 depends on 6xx && PPC_MULTIPLATFORM
5 select FSL_SOC
6 select ALTIVEC
7 help
8 The Freescale E600 SoCs have 74xx cores.
9
10if PPC_86xx
5 11
6config MPC8641_HPCN 12config MPC8641_HPCN
7 bool "Freescale MPC8641 HPCN" 13 bool "Freescale MPC8641 HPCN"
@@ -24,7 +30,7 @@ config MPC8610_HPCD
24 help 30 help
25 This option enables support for the MPC8610 HPCD board. 31 This option enables support for the MPC8610 HPCD board.
26 32
27endchoice 33endif
28 34
29config MPC8641 35config MPC8641
30 bool 36 bool
diff --git a/arch/powerpc/platforms/86xx/Makefile b/arch/powerpc/platforms/86xx/Makefile
index 1b9b4a9b2525..8fee37dec795 100644
--- a/arch/powerpc/platforms/86xx/Makefile
+++ b/arch/powerpc/platforms/86xx/Makefile
@@ -2,6 +2,7 @@
2# Makefile for the PowerPC 86xx linux kernel. 2# Makefile for the PowerPC 86xx linux kernel.
3# 3#
4 4
5obj-y := pic.o
5obj-$(CONFIG_SMP) += mpc86xx_smp.o 6obj-$(CONFIG_SMP) += mpc86xx_smp.o
6obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o 7obj-$(CONFIG_MPC8641_HPCN) += mpc86xx_hpcn.o
7obj-$(CONFIG_SBC8641D) += sbc8641d.o 8obj-$(CONFIG_SBC8641D) += sbc8641d.o
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index dea13208bf64..30725302884a 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -39,6 +39,8 @@
39#include <sysdev/fsl_pci.h> 39#include <sysdev/fsl_pci.h>
40#include <sysdev/fsl_soc.h> 40#include <sysdev/fsl_soc.h>
41 41
42#include "mpc86xx.h"
43
42static unsigned char *pixis_bdcfg0, *pixis_arch; 44static unsigned char *pixis_bdcfg0, *pixis_arch;
43 45
44static struct of_device_id __initdata mpc8610_ids[] = { 46static struct of_device_id __initdata mpc8610_ids[] = {
@@ -56,27 +58,6 @@ static int __init mpc8610_declare_of_platform_devices(void)
56} 58}
57machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices); 59machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
58 60
59static void __init mpc86xx_hpcd_init_irq(void)
60{
61 struct mpic *mpic1;
62 struct device_node *np;
63 struct resource res;
64
65 /* Determine PIC address. */
66 np = of_find_node_by_type(NULL, "open-pic");
67 if (np == NULL)
68 return;
69 of_address_to_resource(np, 0, &res);
70
71 /* Alloc mpic structure and per isu has 16 INT entries. */
72 mpic1 = mpic_alloc(np, res.start,
73 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
74 0, 256, " MPIC ");
75 BUG_ON(mpic1 == NULL);
76
77 mpic_init(mpic1);
78}
79
80#ifdef CONFIG_PCI 61#ifdef CONFIG_PCI
81static void __devinit quirk_uli1575(struct pci_dev *dev) 62static void __devinit quirk_uli1575(struct pci_dev *dev)
82{ 63{
@@ -404,7 +385,7 @@ define_machine(mpc86xx_hpcd) {
404 .name = "MPC86xx HPCD", 385 .name = "MPC86xx HPCD",
405 .probe = mpc86xx_hpcd_probe, 386 .probe = mpc86xx_hpcd_probe,
406 .setup_arch = mpc86xx_hpcd_setup_arch, 387 .setup_arch = mpc86xx_hpcd_setup_arch,
407 .init_IRQ = mpc86xx_hpcd_init_irq, 388 .init_IRQ = mpc86xx_init_irq,
408 .get_irq = mpic_get_irq, 389 .get_irq = mpic_get_irq,
409 .restart = fsl_rstcr_restart, 390 .restart = fsl_rstcr_restart,
410 .time_init = mpc86xx_time_init, 391 .time_init = mpc86xx_time_init,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx.h b/arch/powerpc/platforms/86xx/mpc86xx.h
index 525ffa1904f9..08efb57559d1 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx.h
+++ b/arch/powerpc/platforms/86xx/mpc86xx.h
@@ -15,6 +15,7 @@
15 * mpc86xx_* files. Mostly for use by mpc86xx_setup(). 15 * mpc86xx_* files. Mostly for use by mpc86xx_setup().
16 */ 16 */
17 17
18extern void __init mpc86xx_smp_init(void); 18extern void mpc86xx_smp_init(void);
19extern void mpc86xx_init_irq(void);
19 20
20#endif /* __MPC86XX_H__ */ 21#endif /* __MPC86XX_H__ */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
index f13704aabbea..7916599c9126 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_hpcn.c
@@ -28,7 +28,6 @@
28#include <asm/prom.h> 28#include <asm/prom.h>
29#include <mm/mmu_decl.h> 29#include <mm/mmu_decl.h>
30#include <asm/udbg.h> 30#include <asm/udbg.h>
31#include <asm/i8259.h>
32 31
33#include <asm/mpic.h> 32#include <asm/mpic.h>
34 33
@@ -46,67 +45,6 @@
46#endif 45#endif
47 46
48#ifdef CONFIG_PCI 47#ifdef CONFIG_PCI
49static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
50{
51 unsigned int cascade_irq = i8259_irq();
52 if (cascade_irq != NO_IRQ)
53 generic_handle_irq(cascade_irq);
54 desc->chip->eoi(irq);
55}
56#endif /* CONFIG_PCI */
57
58static void __init
59mpc86xx_hpcn_init_irq(void)
60{
61 struct mpic *mpic1;
62 struct device_node *np;
63 struct resource res;
64#ifdef CONFIG_PCI
65 struct device_node *cascade_node = NULL;
66 int cascade_irq;
67#endif
68
69 /* Determine PIC address. */
70 np = of_find_node_by_type(NULL, "open-pic");
71 if (np == NULL)
72 return;
73 of_address_to_resource(np, 0, &res);
74
75 /* Alloc mpic structure and per isu has 16 INT entries. */
76 mpic1 = mpic_alloc(np, res.start,
77 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
78 0, 256, " MPIC ");
79 BUG_ON(mpic1 == NULL);
80
81 mpic_init(mpic1);
82
83#ifdef CONFIG_PCI
84 /* Initialize i8259 controller */
85 for_each_node_by_type(np, "interrupt-controller")
86 if (of_device_is_compatible(np, "chrp,iic")) {
87 cascade_node = np;
88 break;
89 }
90 if (cascade_node == NULL) {
91 printk(KERN_DEBUG "mpc86xxhpcn: no ISA interrupt controller\n");
92 return;
93 }
94
95 cascade_irq = irq_of_parse_and_map(cascade_node, 0);
96 if (cascade_irq == NO_IRQ) {
97 printk(KERN_ERR "mpc86xxhpcn: failed to map cascade interrupt");
98 return;
99 }
100 DBG("mpc86xxhpcn: cascade mapped to irq %d\n", cascade_irq);
101
102 i8259_init(cascade_node, 0);
103 of_node_put(cascade_node);
104
105 set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
106#endif
107}
108
109#ifdef CONFIG_PCI
110extern int uses_fsl_uli_m1575; 48extern int uses_fsl_uli_m1575;
111extern int uli_exclude_device(struct pci_controller *hose, 49extern int uli_exclude_device(struct pci_controller *hose,
112 u_char bus, u_char devfn); 50 u_char bus, u_char devfn);
@@ -237,7 +175,7 @@ define_machine(mpc86xx_hpcn) {
237 .name = "MPC86xx HPCN", 175 .name = "MPC86xx HPCN",
238 .probe = mpc86xx_hpcn_probe, 176 .probe = mpc86xx_hpcn_probe,
239 .setup_arch = mpc86xx_hpcn_setup_arch, 177 .setup_arch = mpc86xx_hpcn_setup_arch,
240 .init_IRQ = mpc86xx_hpcn_init_irq, 178 .init_IRQ = mpc86xx_init_irq,
241 .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo, 179 .show_cpuinfo = mpc86xx_hpcn_show_cpuinfo,
242 .get_irq = mpic_get_irq, 180 .get_irq = mpic_get_irq,
243 .restart = fsl_rstcr_restart, 181 .restart = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index ba55b0ff0f74..835f2dc24dc9 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -15,6 +15,7 @@
15#include <linux/init.h> 15#include <linux/init.h>
16#include <linux/delay.h> 16#include <linux/delay.h>
17 17
18#include <asm/code-patching.h>
18#include <asm/page.h> 19#include <asm/page.h>
19#include <asm/pgtable.h> 20#include <asm/pgtable.h>
20#include <asm/pci-bridge.h> 21#include <asm/pci-bridge.h>
@@ -56,8 +57,7 @@ smp_86xx_kick_cpu(int nr)
56 unsigned int save_vector; 57 unsigned int save_vector;
57 unsigned long target, flags; 58 unsigned long target, flags;
58 int n = 0; 59 int n = 0;
59 volatile unsigned int *vector 60 unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
60 = (volatile unsigned int *)(KERNELBASE + 0x100);
61 61
62 if (nr < 0 || nr >= NR_CPUS) 62 if (nr < 0 || nr >= NR_CPUS)
63 return; 63 return;
@@ -71,7 +71,7 @@ smp_86xx_kick_cpu(int nr)
71 71
72 /* Setup fake reset vector to call __secondary_start_mpc86xx. */ 72 /* Setup fake reset vector to call __secondary_start_mpc86xx. */
73 target = (unsigned long) __secondary_start_mpc86xx; 73 target = (unsigned long) __secondary_start_mpc86xx;
74 create_branch((unsigned long)vector, target, BRANCH_SET_LINK); 74 patch_branch(vector, target, BRANCH_SET_LINK);
75 75
76 /* Kick that CPU */ 76 /* Kick that CPU */
77 smp_86xx_release_core(nr); 77 smp_86xx_release_core(nr);
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
new file mode 100644
index 000000000000..8881c5de500d
--- /dev/null
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -0,0 +1,78 @@
1/*
2 * Copyright 2008 Freescale Semiconductor, Inc.
3 *
4 * This program is free software; you can redistribute it and/or modify it
5 * under the terms of the GNU General Public License as published by the
6 * Free Software Foundation; either version 2 of the License, or (at your
7 * option) any later version.
8 */
9
10#include <linux/stddef.h>
11#include <linux/kernel.h>
12#include <linux/interrupt.h>
13#include <linux/of_platform.h>
14
15#include <asm/system.h>
16#include <asm/mpic.h>
17#include <asm/i8259.h>
18
19#ifdef CONFIG_PPC_I8259
20static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
21{
22 unsigned int cascade_irq = i8259_irq();
23 if (cascade_irq != NO_IRQ)
24 generic_handle_irq(cascade_irq);
25 desc->chip->eoi(irq);
26}
27#endif /* CONFIG_PPC_I8259 */
28
29void __init mpc86xx_init_irq(void)
30{
31 struct mpic *mpic;
32 struct device_node *np;
33 struct resource res;
34#ifdef CONFIG_PPC_I8259
35 struct device_node *cascade_node = NULL;
36 int cascade_irq;
37#endif
38
39 /* Determine PIC address. */
40 np = of_find_node_by_type(NULL, "open-pic");
41 if (np == NULL)
42 return;
43 of_address_to_resource(np, 0, &res);
44
45 mpic = mpic_alloc(np, res.start,
46 MPIC_PRIMARY | MPIC_WANTS_RESET |
47 MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS,
48 0, 256, " MPIC ");
49 of_node_put(np);
50 BUG_ON(mpic == NULL);
51
52 mpic_init(mpic);
53
54#ifdef CONFIG_PPC_I8259
55 /* Initialize i8259 controller */
56 for_each_node_by_type(np, "interrupt-controller")
57 if (of_device_is_compatible(np, "chrp,iic")) {
58 cascade_node = np;
59 break;
60 }
61
62 if (cascade_node == NULL) {
63 printk(KERN_DEBUG "Could not find i8259 PIC\n");
64 return;
65 }
66
67 cascade_irq = irq_of_parse_and_map(cascade_node, 0);
68 if (cascade_irq == NO_IRQ) {
69 printk(KERN_ERR "Failed to map cascade interrupt\n");
70 return;
71 }
72
73 i8259_init(cascade_node, 0);
74 of_node_put(cascade_node);
75
76 set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
77#endif
78}
diff --git a/arch/powerpc/platforms/86xx/sbc8641d.c b/arch/powerpc/platforms/86xx/sbc8641d.c
index 510a06ef0b55..00e6fad3b3ca 100644
--- a/arch/powerpc/platforms/86xx/sbc8641d.c
+++ b/arch/powerpc/platforms/86xx/sbc8641d.c
@@ -38,29 +38,6 @@
38#include "mpc86xx.h" 38#include "mpc86xx.h"
39 39
40static void __init 40static void __init
41sbc8641_init_irq(void)
42{
43 struct mpic *mpic1;
44 struct device_node *np;
45 struct resource res;
46
47 /* Determine PIC address. */
48 np = of_find_node_by_type(NULL, "open-pic");
49 if (np == NULL)
50 return;
51 of_address_to_resource(np, 0, &res);
52
53 /* Alloc mpic structure and per isu has 16 INT entries. */
54 mpic1 = mpic_alloc(np, res.start,
55 MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN,
56 0, 256, " MPIC ");
57 of_node_put(np);
58 BUG_ON(mpic1 == NULL);
59
60 mpic_init(mpic1);
61}
62
63static void __init
64sbc8641_setup_arch(void) 41sbc8641_setup_arch(void)
65{ 42{
66#ifdef CONFIG_PCI 43#ifdef CONFIG_PCI
@@ -151,7 +128,7 @@ define_machine(sbc8641) {
151 .name = "SBC8641D", 128 .name = "SBC8641D",
152 .probe = sbc8641_probe, 129 .probe = sbc8641_probe,
153 .setup_arch = sbc8641_setup_arch, 130 .setup_arch = sbc8641_setup_arch,
154 .init_IRQ = sbc8641_init_irq, 131 .init_IRQ = mpc86xx_init_irq,
155 .show_cpuinfo = sbc8641_show_cpuinfo, 132 .show_cpuinfo = sbc8641_show_cpuinfo,
156 .get_irq = mpic_get_irq, 133 .get_irq = mpic_get_irq,
157 .restart = fsl_rstcr_restart, 134 .restart = fsl_rstcr_restart,
diff --git a/arch/powerpc/platforms/8xx/mpc86xads_setup.c b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
index c028a5b71bbb..caaec29796b7 100644
--- a/arch/powerpc/platforms/8xx/mpc86xads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc86xads_setup.c
@@ -65,6 +65,10 @@ static struct cpm_pin mpc866ads_pins[] = {
65 {CPM_PORTD, 13, CPM_PIN_OUTPUT}, 65 {CPM_PORTD, 13, CPM_PIN_OUTPUT},
66 {CPM_PORTD, 14, CPM_PIN_OUTPUT}, 66 {CPM_PORTD, 14, CPM_PIN_OUTPUT},
67 {CPM_PORTD, 15, CPM_PIN_OUTPUT}, 67 {CPM_PORTD, 15, CPM_PIN_OUTPUT},
68
69 /* I2C */
70 {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
71 {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
68}; 72};
69 73
70static void __init init_ioports(void) 74static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/8xx/mpc885ads_setup.c b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
index 6e7ded0233f6..45ed6cdc1310 100644
--- a/arch/powerpc/platforms/8xx/mpc885ads_setup.c
+++ b/arch/powerpc/platforms/8xx/mpc885ads_setup.c
@@ -158,6 +158,9 @@ static struct cpm_pin mpc885ads_pins[] = {
158 {CPM_PORTE, 28, CPM_PIN_OUTPUT}, 158 {CPM_PORTE, 28, CPM_PIN_OUTPUT},
159 {CPM_PORTE, 29, CPM_PIN_OUTPUT}, 159 {CPM_PORTE, 29, CPM_PIN_OUTPUT},
160#endif 160#endif
161 /* I2C */
162 {CPM_PORTB, 26, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
163 {CPM_PORTB, 27, CPM_PIN_INPUT | CPM_PIN_OPENDRAIN},
161}; 164};
162 165
163static void __init init_ioports(void) 166static void __init init_ioports(void)
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 87454c526973..690c1f46e698 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -1,36 +1,9 @@
1menu "Platform support" 1menu "Platform support"
2 2
3choice
4 prompt "Machine type"
5 depends on PPC64 || 6xx
6 default PPC_MULTIPLATFORM
7
8config PPC_MULTIPLATFORM 3config PPC_MULTIPLATFORM
9 bool "Generic desktop/server/laptop" 4 bool
10 help 5 depends on PPC64 || 6xx
11 Select this option if configuring for an IBM pSeries or 6 default y
12 RS/6000 machine, an Apple machine, or a PReP, CHRP,
13 Maple or Cell-based machine.
14
15config PPC_82xx
16 bool "Freescale 82xx"
17 depends on 6xx
18
19config PPC_83xx
20 bool "Freescale 83xx"
21 depends on 6xx
22 select FSL_SOC
23 select MPC83xx
24 select IPIC
25
26config PPC_86xx
27 bool "Freescale 86xx"
28 depends on 6xx
29 select FSL_SOC
30 select ALTIVEC
31 help
32 The Freescale E600 SoCs have 74xx cores.
33endchoice
34 7
35config CLASSIC32 8config CLASSIC32
36 def_bool y 9 def_bool y
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index f7efaa925a13..5bc4b611ff88 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -95,6 +95,11 @@ config E500
95 select FSL_EMB_PERFMON 95 select FSL_EMB_PERFMON
96 bool 96 bool
97 97
98config PPC_E500MC
99 bool "e500mc Support"
100 select PPC_FPU
101 depends on E500
102
98config PPC_FPU 103config PPC_FPU
99 bool 104 bool
100 default y if PPC64 105 default y if PPC64
@@ -155,9 +160,25 @@ config ALTIVEC
155 160
156 If in doubt, say Y here. 161 If in doubt, say Y here.
157 162
163config VSX
164 bool "VSX Support"
165 depends on POWER4 && ALTIVEC && PPC_FPU
166 ---help---
167
168 This option enables kernel support for the Vector Scaler extensions
169 to the PowerPC processor. The kernel currently supports saving and
170 restoring VSX registers, and turning on the 'VSX enable' bit so user
171 processes can execute VSX instructions.
172
173 This option is only useful if you have a processor that supports
174 VSX (P7 and above), but does not have any affect on a non-VSX
175 CPUs (it does, however add code to the kernel).
176
177 If in doubt, say Y here.
178
158config SPE 179config SPE
159 bool "SPE Support" 180 bool "SPE Support"
160 depends on E200 || E500 181 depends on E200 || (E500 && !PPC_E500MC)
161 default y 182 default y
162 ---help--- 183 ---help---
163 This option enables kernel support for the Signal Processing 184 This option enables kernel support for the Signal Processing
@@ -182,7 +203,7 @@ config PPC_STD_MMU_32
182 203
183config PPC_MM_SLICES 204config PPC_MM_SLICES
184 bool 205 bool
185 default y if HUGETLB_PAGE 206 default y if HUGETLB_PAGE || PPC_64K_PAGES
186 default n 207 default n
187 208
188config VIRT_CPU_ACCOUNTING 209config VIRT_CPU_ACCOUNTING
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index c39f5c225f2e..896548ba1ca1 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -14,6 +14,7 @@
14#include <linux/pci.h> 14#include <linux/pci.h>
15#include <linux/msi.h> 15#include <linux/msi.h>
16#include <linux/of_platform.h> 16#include <linux/of_platform.h>
17#include <linux/debugfs.h>
17 18
18#include <asm/dcr.h> 19#include <asm/dcr.h>
19#include <asm/machdep.h> 20#include <asm/machdep.h>
@@ -69,8 +70,19 @@ struct axon_msic {
69 dma_addr_t fifo_phys; 70 dma_addr_t fifo_phys;
70 dcr_host_t dcr_host; 71 dcr_host_t dcr_host;
71 u32 read_offset; 72 u32 read_offset;
73#ifdef DEBUG
74 u32 __iomem *trigger;
75#endif
72}; 76};
73 77
78#ifdef DEBUG
79void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic);
80#else
81static inline void axon_msi_debug_setup(struct device_node *dn,
82 struct axon_msic *msic) { }
83#endif
84
85
74static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) 86static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
75{ 87{
76 pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); 88 pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n);
@@ -346,7 +358,14 @@ static int axon_msi_probe(struct of_device *device,
346 goto out_free_msic; 358 goto out_free_msic;
347 } 359 }
348 360
349 msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP, 361 virq = irq_of_parse_and_map(dn, 0);
362 if (virq == NO_IRQ) {
363 printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n",
364 dn->full_name);
365 goto out_free_fifo;
366 }
367
368 msic->irq_host = irq_alloc_host(dn, IRQ_HOST_MAP_NOMAP,
350 NR_IRQS, &msic_host_ops, 0); 369 NR_IRQS, &msic_host_ops, 0);
351 if (!msic->irq_host) { 370 if (!msic->irq_host) {
352 printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n", 371 printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n",
@@ -356,13 +375,6 @@ static int axon_msi_probe(struct of_device *device,
356 375
357 msic->irq_host->host_data = msic; 376 msic->irq_host->host_data = msic;
358 377
359 virq = irq_of_parse_and_map(dn, 0);
360 if (virq == NO_IRQ) {
361 printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n",
362 dn->full_name);
363 goto out_free_host;
364 }
365
366 set_irq_data(virq, msic); 378 set_irq_data(virq, msic);
367 set_irq_chained_handler(virq, axon_msi_cascade); 379 set_irq_chained_handler(virq, axon_msi_cascade);
368 pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq); 380 pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq);
@@ -381,12 +393,12 @@ static int axon_msi_probe(struct of_device *device,
381 ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; 393 ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs;
382 ppc_md.msi_check_device = axon_msi_check_device; 394 ppc_md.msi_check_device = axon_msi_check_device;
383 395
396 axon_msi_debug_setup(dn, msic);
397
384 printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); 398 printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name);
385 399
386 return 0; 400 return 0;
387 401
388out_free_host:
389 kfree(msic->irq_host);
390out_free_fifo: 402out_free_fifo:
391 dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt, 403 dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt,
392 msic->fifo_phys); 404 msic->fifo_phys);
@@ -418,3 +430,47 @@ static int __init axon_msi_init(void)
418 return of_register_platform_driver(&axon_msi_driver); 430 return of_register_platform_driver(&axon_msi_driver);
419} 431}
420subsys_initcall(axon_msi_init); 432subsys_initcall(axon_msi_init);
433
434
435#ifdef DEBUG
436static int msic_set(void *data, u64 val)
437{
438 struct axon_msic *msic = data;
439 out_le32(msic->trigger, val);
440 return 0;
441}
442
443static int msic_get(void *data, u64 *val)
444{
445 *val = 0;
446 return 0;
447}
448
449DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n");
450
451void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic)
452{
453 char name[8];
454 u64 addr;
455
456 addr = of_translate_address(dn, of_get_property(dn, "reg", NULL));
457 if (addr == OF_BAD_ADDR) {
458 pr_debug("axon_msi: couldn't translate reg property\n");
459 return;
460 }
461
462 msic->trigger = ioremap(addr, 0x4);
463 if (!msic->trigger) {
464 pr_debug("axon_msi: ioremap failed\n");
465 return;
466 }
467
468 snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn));
469
470 if (!debugfs_create_file(name, 0600, powerpc_debugfs_root,
471 msic, &fops_msic)) {
472 pr_debug("axon_msi: debugfs_create_file failed!\n");
473 return;
474 }
475}
476#endif /* DEBUG */
diff --git a/arch/powerpc/platforms/cell/beat_htab.c b/arch/powerpc/platforms/cell/beat_htab.c
index 81467ff055c8..2e67bd840e01 100644
--- a/arch/powerpc/platforms/cell/beat_htab.c
+++ b/arch/powerpc/platforms/cell/beat_htab.c
@@ -112,7 +112,7 @@ static long beat_lpar_hpte_insert(unsigned long hpte_group,
112 if (!(vflags & HPTE_V_BOLTED)) 112 if (!(vflags & HPTE_V_BOLTED))
113 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r); 113 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
114 114
115 if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) 115 if (rflags & _PAGE_NO_CACHE)
116 hpte_r &= ~_PAGE_COHERENT; 116 hpte_r &= ~_PAGE_COHERENT;
117 117
118 spin_lock(&beat_htab_lock); 118 spin_lock(&beat_htab_lock);
@@ -334,7 +334,7 @@ static long beat_lpar_hpte_insert_v3(unsigned long hpte_group,
334 if (!(vflags & HPTE_V_BOLTED)) 334 if (!(vflags & HPTE_V_BOLTED))
335 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r); 335 DBG_LOW(" hpte_v=%016lx, hpte_r=%016lx\n", hpte_v, hpte_r);
336 336
337 if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) 337 if (rflags & _PAGE_NO_CACHE)
338 hpte_r &= ~_PAGE_COHERENT; 338 hpte_r &= ~_PAGE_COHERENT;
339 339
340 /* insert into not-volted entry */ 340 /* insert into not-volted entry */
diff --git a/arch/powerpc/platforms/cell/iommu.c b/arch/powerpc/platforms/cell/iommu.c
index 45646b2b4af4..eeacb3a52ca1 100644
--- a/arch/powerpc/platforms/cell/iommu.c
+++ b/arch/powerpc/platforms/cell/iommu.c
@@ -540,7 +540,7 @@ static unsigned long cell_dma_direct_offset;
540static unsigned long dma_iommu_fixed_base; 540static unsigned long dma_iommu_fixed_base;
541struct dma_mapping_ops dma_iommu_fixed_ops; 541struct dma_mapping_ops dma_iommu_fixed_ops;
542 542
543static void cell_dma_dev_setup_iommu(struct device *dev) 543static struct iommu_table *cell_get_iommu_table(struct device *dev)
544{ 544{
545 struct iommu_window *window; 545 struct iommu_window *window;
546 struct cbe_iommu *iommu; 546 struct cbe_iommu *iommu;
@@ -555,11 +555,11 @@ static void cell_dma_dev_setup_iommu(struct device *dev)
555 printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n", 555 printk(KERN_ERR "iommu: missing iommu for %s (node %d)\n",
556 archdata->of_node ? archdata->of_node->full_name : "?", 556 archdata->of_node ? archdata->of_node->full_name : "?",
557 archdata->numa_node); 557 archdata->numa_node);
558 return; 558 return NULL;
559 } 559 }
560 window = list_entry(iommu->windows.next, struct iommu_window, list); 560 window = list_entry(iommu->windows.next, struct iommu_window, list);
561 561
562 archdata->dma_data = &window->table; 562 return &window->table;
563} 563}
564 564
565static void cell_dma_dev_setup_fixed(struct device *dev); 565static void cell_dma_dev_setup_fixed(struct device *dev);
@@ -572,7 +572,7 @@ static void cell_dma_dev_setup(struct device *dev)
572 if (get_dma_ops(dev) == &dma_iommu_fixed_ops) 572 if (get_dma_ops(dev) == &dma_iommu_fixed_ops)
573 cell_dma_dev_setup_fixed(dev); 573 cell_dma_dev_setup_fixed(dev);
574 else if (get_pci_dma_ops() == &dma_iommu_ops) 574 else if (get_pci_dma_ops() == &dma_iommu_ops)
575 cell_dma_dev_setup_iommu(dev); 575 archdata->dma_data = cell_get_iommu_table(dev);
576 else if (get_pci_dma_ops() == &dma_direct_ops) 576 else if (get_pci_dma_ops() == &dma_direct_ops)
577 archdata->dma_data = (void *)cell_dma_direct_offset; 577 archdata->dma_data = (void *)cell_dma_direct_offset;
578 else 578 else
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c
index 655704ad03cf..505f9b9bdf0c 100644
--- a/arch/powerpc/platforms/cell/ras.c
+++ b/arch/powerpc/platforms/cell/ras.c
@@ -17,6 +17,7 @@
17#include <asm/reg.h> 17#include <asm/reg.h>
18#include <asm/io.h> 18#include <asm/io.h>
19#include <asm/prom.h> 19#include <asm/prom.h>
20#include <asm/kexec.h>
20#include <asm/machdep.h> 21#include <asm/machdep.h>
21#include <asm/rtas.h> 22#include <asm/rtas.h>
22#include <asm/cell-regs.h> 23#include <asm/cell-regs.h>
@@ -226,6 +227,11 @@ static int cbe_ptcal_notify_reboot(struct notifier_block *nb,
226 return cbe_ptcal_disable(); 227 return cbe_ptcal_disable();
227} 228}
228 229
230static void cbe_ptcal_crash_shutdown(void)
231{
232 cbe_ptcal_disable();
233}
234
229static struct notifier_block cbe_ptcal_reboot_notifier = { 235static struct notifier_block cbe_ptcal_reboot_notifier = {
230 .notifier_call = cbe_ptcal_notify_reboot 236 .notifier_call = cbe_ptcal_notify_reboot
231}; 237};
@@ -241,12 +247,20 @@ int __init cbe_ptcal_init(void)
241 return -ENODEV; 247 return -ENODEV;
242 248
243 ret = register_reboot_notifier(&cbe_ptcal_reboot_notifier); 249 ret = register_reboot_notifier(&cbe_ptcal_reboot_notifier);
244 if (ret) { 250 if (ret)
245 printk(KERN_ERR "Can't disable PTCAL, so not enabling\n"); 251 goto out1;
246 return ret; 252
247 } 253 ret = crash_shutdown_register(&cbe_ptcal_crash_shutdown);
254 if (ret)
255 goto out2;
248 256
249 return cbe_ptcal_enable(); 257 return cbe_ptcal_enable();
258
259out2:
260 unregister_reboot_notifier(&cbe_ptcal_reboot_notifier);
261out1:
262 printk(KERN_ERR "Can't disable PTCAL, so not enabling\n");
263 return ret;
250} 264}
251 265
252arch_initcall(cbe_ptcal_init); 266arch_initcall(cbe_ptcal_init);
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 3f4b4aef756d..4e5655624ae8 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -300,7 +300,7 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
300 panic("spider_pic: can't map registers !"); 300 panic("spider_pic: can't map registers !");
301 301
302 /* Allocate a host */ 302 /* Allocate a host */
303 pic->host = irq_alloc_host(of_node_get(of_node), IRQ_HOST_MAP_LINEAR, 303 pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR,
304 SPIDER_SRC_COUNT, &spider_host_ops, 304 SPIDER_SRC_COUNT, &spider_host_ops,
305 SPIDER_IRQ_INVALID); 305 SPIDER_IRQ_INVALID);
306 if (pic->host == NULL) 306 if (pic->host == NULL)
diff --git a/arch/powerpc/platforms/cell/spufs/context.c b/arch/powerpc/platforms/cell/spufs/context.c
index 177735f79317..6653ddbed048 100644
--- a/arch/powerpc/platforms/cell/spufs/context.c
+++ b/arch/powerpc/platforms/cell/spufs/context.c
@@ -130,17 +130,17 @@ void spu_unmap_mappings(struct spu_context *ctx)
130 if (ctx->local_store) 130 if (ctx->local_store)
131 unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1); 131 unmap_mapping_range(ctx->local_store, 0, LS_SIZE, 1);
132 if (ctx->mfc) 132 if (ctx->mfc)
133 unmap_mapping_range(ctx->mfc, 0, 0x1000, 1); 133 unmap_mapping_range(ctx->mfc, 0, SPUFS_MFC_MAP_SIZE, 1);
134 if (ctx->cntl) 134 if (ctx->cntl)
135 unmap_mapping_range(ctx->cntl, 0, 0x1000, 1); 135 unmap_mapping_range(ctx->cntl, 0, SPUFS_CNTL_MAP_SIZE, 1);
136 if (ctx->signal1) 136 if (ctx->signal1)
137 unmap_mapping_range(ctx->signal1, 0, PAGE_SIZE, 1); 137 unmap_mapping_range(ctx->signal1, 0, SPUFS_SIGNAL_MAP_SIZE, 1);
138 if (ctx->signal2) 138 if (ctx->signal2)
139 unmap_mapping_range(ctx->signal2, 0, PAGE_SIZE, 1); 139 unmap_mapping_range(ctx->signal2, 0, SPUFS_SIGNAL_MAP_SIZE, 1);
140 if (ctx->mss) 140 if (ctx->mss)
141 unmap_mapping_range(ctx->mss, 0, 0x1000, 1); 141 unmap_mapping_range(ctx->mss, 0, SPUFS_MSS_MAP_SIZE, 1);
142 if (ctx->psmap) 142 if (ctx->psmap)
143 unmap_mapping_range(ctx->psmap, 0, 0x20000, 1); 143 unmap_mapping_range(ctx->psmap, 0, SPUFS_PS_MAP_SIZE, 1);
144 mutex_unlock(&ctx->mapping_lock); 144 mutex_unlock(&ctx->mapping_lock);
145} 145}
146 146
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index c81341ff75b5..99c73066b82f 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -238,11 +238,13 @@ spufs_mem_write(struct file *file, const char __user *buffer,
238 return size; 238 return size;
239} 239}
240 240
241static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma, 241static int
242 unsigned long address) 242spufs_mem_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
243{ 243{
244 struct spu_context *ctx = vma->vm_file->private_data; 244 struct spu_context *ctx = vma->vm_file->private_data;
245 unsigned long pfn, offset, addr0 = address; 245 unsigned long address = (unsigned long)vmf->virtual_address;
246 unsigned long pfn, offset;
247
246#ifdef CONFIG_SPU_FS_64K_LS 248#ifdef CONFIG_SPU_FS_64K_LS
247 struct spu_state *csa = &ctx->csa; 249 struct spu_state *csa = &ctx->csa;
248 int psize; 250 int psize;
@@ -260,15 +262,15 @@ static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
260 } 262 }
261#endif /* CONFIG_SPU_FS_64K_LS */ 263#endif /* CONFIG_SPU_FS_64K_LS */
262 264
263 offset = (address - vma->vm_start) + (vma->vm_pgoff << PAGE_SHIFT); 265 offset = vmf->pgoff << PAGE_SHIFT;
264 if (offset >= LS_SIZE) 266 if (offset >= LS_SIZE)
265 return NOPFN_SIGBUS; 267 return VM_FAULT_SIGBUS;
266 268
267 pr_debug("spufs_mem_mmap_nopfn address=0x%lx -> 0x%lx, offset=0x%lx\n", 269 pr_debug("spufs_mem_mmap_fault address=0x%lx, offset=0x%lx\n",
268 addr0, address, offset); 270 address, offset);
269 271
270 if (spu_acquire(ctx)) 272 if (spu_acquire(ctx))
271 return NOPFN_REFAULT; 273 return VM_FAULT_NOPAGE;
272 274
273 if (ctx->state == SPU_STATE_SAVED) { 275 if (ctx->state == SPU_STATE_SAVED) {
274 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot) 276 vma->vm_page_prot = __pgprot(pgprot_val(vma->vm_page_prot)
@@ -283,12 +285,12 @@ static unsigned long spufs_mem_mmap_nopfn(struct vm_area_struct *vma,
283 285
284 spu_release(ctx); 286 spu_release(ctx);
285 287
286 return NOPFN_REFAULT; 288 return VM_FAULT_NOPAGE;
287} 289}
288 290
289 291
290static struct vm_operations_struct spufs_mem_mmap_vmops = { 292static struct vm_operations_struct spufs_mem_mmap_vmops = {
291 .nopfn = spufs_mem_mmap_nopfn, 293 .fault = spufs_mem_mmap_fault,
292}; 294};
293 295
294static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma) 296static int spufs_mem_mmap(struct file *file, struct vm_area_struct *vma)
@@ -351,20 +353,19 @@ static const struct file_operations spufs_mem_fops = {
351#endif 353#endif
352}; 354};
353 355
354static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma, 356static int spufs_ps_fault(struct vm_area_struct *vma,
355 unsigned long address, 357 struct vm_fault *vmf,
356 unsigned long ps_offs, 358 unsigned long ps_offs,
357 unsigned long ps_size) 359 unsigned long ps_size)
358{ 360{
359 struct spu_context *ctx = vma->vm_file->private_data; 361 struct spu_context *ctx = vma->vm_file->private_data;
360 unsigned long area, offset = address - vma->vm_start; 362 unsigned long area, offset = vmf->pgoff << PAGE_SHIFT;
361 int ret = 0; 363 int ret = 0;
362 364
363 spu_context_nospu_trace(spufs_ps_nopfn__enter, ctx); 365 spu_context_nospu_trace(spufs_ps_fault__enter, ctx);
364 366
365 offset += vma->vm_pgoff << PAGE_SHIFT;
366 if (offset >= ps_size) 367 if (offset >= ps_size)
367 return NOPFN_SIGBUS; 368 return VM_FAULT_SIGBUS;
368 369
369 /* 370 /*
370 * Because we release the mmap_sem, the context may be destroyed while 371 * Because we release the mmap_sem, the context may be destroyed while
@@ -378,7 +379,7 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
378 * pages to hand out to the user, but we don't want to wait 379 * pages to hand out to the user, but we don't want to wait
379 * with the mmap_sem held. 380 * with the mmap_sem held.
380 * It is possible to drop the mmap_sem here, but then we need 381 * It is possible to drop the mmap_sem here, but then we need
381 * to return NOPFN_REFAULT because the mappings may have 382 * to return VM_FAULT_NOPAGE because the mappings may have
382 * hanged. 383 * hanged.
383 */ 384 */
384 if (spu_acquire(ctx)) 385 if (spu_acquire(ctx))
@@ -386,14 +387,15 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
386 387
387 if (ctx->state == SPU_STATE_SAVED) { 388 if (ctx->state == SPU_STATE_SAVED) {
388 up_read(&current->mm->mmap_sem); 389 up_read(&current->mm->mmap_sem);
389 spu_context_nospu_trace(spufs_ps_nopfn__sleep, ctx); 390 spu_context_nospu_trace(spufs_ps_fault__sleep, ctx);
390 ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE); 391 ret = spufs_wait(ctx->run_wq, ctx->state == SPU_STATE_RUNNABLE);
391 spu_context_trace(spufs_ps_nopfn__wake, ctx, ctx->spu); 392 spu_context_trace(spufs_ps_fault__wake, ctx, ctx->spu);
392 down_read(&current->mm->mmap_sem); 393 down_read(&current->mm->mmap_sem);
393 } else { 394 } else {
394 area = ctx->spu->problem_phys + ps_offs; 395 area = ctx->spu->problem_phys + ps_offs;
395 vm_insert_pfn(vma, address, (area + offset) >> PAGE_SHIFT); 396 vm_insert_pfn(vma, (unsigned long)vmf->virtual_address,
396 spu_context_trace(spufs_ps_nopfn__insert, ctx, ctx->spu); 397 (area + offset) >> PAGE_SHIFT);
398 spu_context_trace(spufs_ps_fault__insert, ctx, ctx->spu);
397 } 399 }
398 400
399 if (!ret) 401 if (!ret)
@@ -401,18 +403,18 @@ static unsigned long spufs_ps_nopfn(struct vm_area_struct *vma,
401 403
402refault: 404refault:
403 put_spu_context(ctx); 405 put_spu_context(ctx);
404 return NOPFN_REFAULT; 406 return VM_FAULT_NOPAGE;
405} 407}
406 408
407#if SPUFS_MMAP_4K 409#if SPUFS_MMAP_4K
408static unsigned long spufs_cntl_mmap_nopfn(struct vm_area_struct *vma, 410static int spufs_cntl_mmap_fault(struct vm_area_struct *vma,
409 unsigned long address) 411 struct vm_fault *vmf)
410{ 412{
411 return spufs_ps_nopfn(vma, address, 0x4000, 0x1000); 413 return spufs_ps_fault(vma, vmf, 0x4000, SPUFS_CNTL_MAP_SIZE);
412} 414}
413 415
414static struct vm_operations_struct spufs_cntl_mmap_vmops = { 416static struct vm_operations_struct spufs_cntl_mmap_vmops = {
415 .nopfn = spufs_cntl_mmap_nopfn, 417 .fault = spufs_cntl_mmap_fault,
416}; 418};
417 419
418/* 420/*
@@ -1097,23 +1099,23 @@ static ssize_t spufs_signal1_write(struct file *file, const char __user *buf,
1097 return 4; 1099 return 4;
1098} 1100}
1099 1101
1100static unsigned long spufs_signal1_mmap_nopfn(struct vm_area_struct *vma, 1102static int
1101 unsigned long address) 1103spufs_signal1_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1102{ 1104{
1103#if PAGE_SIZE == 0x1000 1105#if SPUFS_SIGNAL_MAP_SIZE == 0x1000
1104 return spufs_ps_nopfn(vma, address, 0x14000, 0x1000); 1106 return spufs_ps_fault(vma, vmf, 0x14000, SPUFS_SIGNAL_MAP_SIZE);
1105#elif PAGE_SIZE == 0x10000 1107#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000
1106 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole 1108 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole
1107 * signal 1 and 2 area 1109 * signal 1 and 2 area
1108 */ 1110 */
1109 return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); 1111 return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE);
1110#else 1112#else
1111#error unsupported page size 1113#error unsupported page size
1112#endif 1114#endif
1113} 1115}
1114 1116
1115static struct vm_operations_struct spufs_signal1_mmap_vmops = { 1117static struct vm_operations_struct spufs_signal1_mmap_vmops = {
1116 .nopfn = spufs_signal1_mmap_nopfn, 1118 .fault = spufs_signal1_mmap_fault,
1117}; 1119};
1118 1120
1119static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma) 1121static int spufs_signal1_mmap(struct file *file, struct vm_area_struct *vma)
@@ -1234,23 +1236,23 @@ static ssize_t spufs_signal2_write(struct file *file, const char __user *buf,
1234} 1236}
1235 1237
1236#if SPUFS_MMAP_4K 1238#if SPUFS_MMAP_4K
1237static unsigned long spufs_signal2_mmap_nopfn(struct vm_area_struct *vma, 1239static int
1238 unsigned long address) 1240spufs_signal2_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1239{ 1241{
1240#if PAGE_SIZE == 0x1000 1242#if SPUFS_SIGNAL_MAP_SIZE == 0x1000
1241 return spufs_ps_nopfn(vma, address, 0x1c000, 0x1000); 1243 return spufs_ps_fault(vma, vmf, 0x1c000, SPUFS_SIGNAL_MAP_SIZE);
1242#elif PAGE_SIZE == 0x10000 1244#elif SPUFS_SIGNAL_MAP_SIZE == 0x10000
1243 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole 1245 /* For 64k pages, both signal1 and signal2 can be used to mmap the whole
1244 * signal 1 and 2 area 1246 * signal 1 and 2 area
1245 */ 1247 */
1246 return spufs_ps_nopfn(vma, address, 0x10000, 0x10000); 1248 return spufs_ps_fault(vma, vmf, 0x10000, SPUFS_SIGNAL_MAP_SIZE);
1247#else 1249#else
1248#error unsupported page size 1250#error unsupported page size
1249#endif 1251#endif
1250} 1252}
1251 1253
1252static struct vm_operations_struct spufs_signal2_mmap_vmops = { 1254static struct vm_operations_struct spufs_signal2_mmap_vmops = {
1253 .nopfn = spufs_signal2_mmap_nopfn, 1255 .fault = spufs_signal2_mmap_fault,
1254}; 1256};
1255 1257
1256static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma) 1258static int spufs_signal2_mmap(struct file *file, struct vm_area_struct *vma)
@@ -1362,14 +1364,14 @@ DEFINE_SPUFS_ATTRIBUTE(spufs_signal2_type, spufs_signal2_type_get,
1362 spufs_signal2_type_set, "%llu\n", SPU_ATTR_ACQUIRE); 1364 spufs_signal2_type_set, "%llu\n", SPU_ATTR_ACQUIRE);
1363 1365
1364#if SPUFS_MMAP_4K 1366#if SPUFS_MMAP_4K
1365static unsigned long spufs_mss_mmap_nopfn(struct vm_area_struct *vma, 1367static int
1366 unsigned long address) 1368spufs_mss_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1367{ 1369{
1368 return spufs_ps_nopfn(vma, address, 0x0000, 0x1000); 1370 return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_MSS_MAP_SIZE);
1369} 1371}
1370 1372
1371static struct vm_operations_struct spufs_mss_mmap_vmops = { 1373static struct vm_operations_struct spufs_mss_mmap_vmops = {
1372 .nopfn = spufs_mss_mmap_nopfn, 1374 .fault = spufs_mss_mmap_fault,
1373}; 1375};
1374 1376
1375/* 1377/*
@@ -1424,14 +1426,14 @@ static const struct file_operations spufs_mss_fops = {
1424 .mmap = spufs_mss_mmap, 1426 .mmap = spufs_mss_mmap,
1425}; 1427};
1426 1428
1427static unsigned long spufs_psmap_mmap_nopfn(struct vm_area_struct *vma, 1429static int
1428 unsigned long address) 1430spufs_psmap_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1429{ 1431{
1430 return spufs_ps_nopfn(vma, address, 0x0000, 0x20000); 1432 return spufs_ps_fault(vma, vmf, 0x0000, SPUFS_PS_MAP_SIZE);
1431} 1433}
1432 1434
1433static struct vm_operations_struct spufs_psmap_mmap_vmops = { 1435static struct vm_operations_struct spufs_psmap_mmap_vmops = {
1434 .nopfn = spufs_psmap_mmap_nopfn, 1436 .fault = spufs_psmap_mmap_fault,
1435}; 1437};
1436 1438
1437/* 1439/*
@@ -1484,14 +1486,14 @@ static const struct file_operations spufs_psmap_fops = {
1484 1486
1485 1487
1486#if SPUFS_MMAP_4K 1488#if SPUFS_MMAP_4K
1487static unsigned long spufs_mfc_mmap_nopfn(struct vm_area_struct *vma, 1489static int
1488 unsigned long address) 1490spufs_mfc_mmap_fault(struct vm_area_struct *vma, struct vm_fault *vmf)
1489{ 1491{
1490 return spufs_ps_nopfn(vma, address, 0x3000, 0x1000); 1492 return spufs_ps_fault(vma, vmf, 0x3000, SPUFS_MFC_MAP_SIZE);
1491} 1493}
1492 1494
1493static struct vm_operations_struct spufs_mfc_mmap_vmops = { 1495static struct vm_operations_struct spufs_mfc_mmap_vmops = {
1494 .nopfn = spufs_mfc_mmap_nopfn, 1496 .fault = spufs_mfc_mmap_fault,
1495}; 1497};
1496 1498
1497/* 1499/*
@@ -2553,22 +2555,74 @@ void spu_switch_log_notify(struct spu *spu, struct spu_context *ctx,
2553 wake_up(&ctx->switch_log->wait); 2555 wake_up(&ctx->switch_log->wait);
2554} 2556}
2555 2557
2556struct tree_descr spufs_dir_contents[] = { 2558static int spufs_show_ctx(struct seq_file *s, void *private)
2559{
2560 struct spu_context *ctx = s->private;
2561 u64 mfc_control_RW;
2562
2563 mutex_lock(&ctx->state_mutex);
2564 if (ctx->spu) {
2565 struct spu *spu = ctx->spu;
2566 struct spu_priv2 __iomem *priv2 = spu->priv2;
2567
2568 spin_lock_irq(&spu->register_lock);
2569 mfc_control_RW = in_be64(&priv2->mfc_control_RW);
2570 spin_unlock_irq(&spu->register_lock);
2571 } else {
2572 struct spu_state *csa = &ctx->csa;
2573
2574 mfc_control_RW = csa->priv2.mfc_control_RW;
2575 }
2576
2577 seq_printf(s, "%c flgs(%lx) sflgs(%lx) pri(%d) ts(%d) spu(%02d)"
2578 " %c %lx %lx %lx %lx %x %x\n",
2579 ctx->state == SPU_STATE_SAVED ? 'S' : 'R',
2580 ctx->flags,
2581 ctx->sched_flags,
2582 ctx->prio,
2583 ctx->time_slice,
2584 ctx->spu ? ctx->spu->number : -1,
2585 !list_empty(&ctx->rq) ? 'q' : ' ',
2586 ctx->csa.class_0_pending,
2587 ctx->csa.class_0_dar,
2588 ctx->csa.class_1_dsisr,
2589 mfc_control_RW,
2590 ctx->ops->runcntl_read(ctx),
2591 ctx->ops->status_read(ctx));
2592
2593 mutex_unlock(&ctx->state_mutex);
2594
2595 return 0;
2596}
2597
2598static int spufs_ctx_open(struct inode *inode, struct file *file)
2599{
2600 return single_open(file, spufs_show_ctx, SPUFS_I(inode)->i_ctx);
2601}
2602
2603static const struct file_operations spufs_ctx_fops = {
2604 .open = spufs_ctx_open,
2605 .read = seq_read,
2606 .llseek = seq_lseek,
2607 .release = single_release,
2608};
2609
2610struct spufs_tree_descr spufs_dir_contents[] = {
2557 { "capabilities", &spufs_caps_fops, 0444, }, 2611 { "capabilities", &spufs_caps_fops, 0444, },
2558 { "mem", &spufs_mem_fops, 0666, }, 2612 { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
2559 { "regs", &spufs_regs_fops, 0666, }, 2613 { "regs", &spufs_regs_fops, 0666, sizeof(struct spu_reg128[128]), },
2560 { "mbox", &spufs_mbox_fops, 0444, }, 2614 { "mbox", &spufs_mbox_fops, 0444, },
2561 { "ibox", &spufs_ibox_fops, 0444, }, 2615 { "ibox", &spufs_ibox_fops, 0444, },
2562 { "wbox", &spufs_wbox_fops, 0222, }, 2616 { "wbox", &spufs_wbox_fops, 0222, },
2563 { "mbox_stat", &spufs_mbox_stat_fops, 0444, }, 2617 { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), },
2564 { "ibox_stat", &spufs_ibox_stat_fops, 0444, }, 2618 { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), },
2565 { "wbox_stat", &spufs_wbox_stat_fops, 0444, }, 2619 { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), },
2566 { "signal1", &spufs_signal1_fops, 0666, }, 2620 { "signal1", &spufs_signal1_fops, 0666, },
2567 { "signal2", &spufs_signal2_fops, 0666, }, 2621 { "signal2", &spufs_signal2_fops, 0666, },
2568 { "signal1_type", &spufs_signal1_type, 0666, }, 2622 { "signal1_type", &spufs_signal1_type, 0666, },
2569 { "signal2_type", &spufs_signal2_type, 0666, }, 2623 { "signal2_type", &spufs_signal2_type, 0666, },
2570 { "cntl", &spufs_cntl_fops, 0666, }, 2624 { "cntl", &spufs_cntl_fops, 0666, },
2571 { "fpcr", &spufs_fpcr_fops, 0666, }, 2625 { "fpcr", &spufs_fpcr_fops, 0666, sizeof(struct spu_reg128), },
2572 { "lslr", &spufs_lslr_ops, 0444, }, 2626 { "lslr", &spufs_lslr_ops, 0444, },
2573 { "mfc", &spufs_mfc_fops, 0666, }, 2627 { "mfc", &spufs_mfc_fops, 0666, },
2574 { "mss", &spufs_mss_fops, 0666, }, 2628 { "mss", &spufs_mss_fops, 0666, },
@@ -2578,29 +2632,31 @@ struct tree_descr spufs_dir_contents[] = {
2578 { "decr_status", &spufs_decr_status_ops, 0666, }, 2632 { "decr_status", &spufs_decr_status_ops, 0666, },
2579 { "event_mask", &spufs_event_mask_ops, 0666, }, 2633 { "event_mask", &spufs_event_mask_ops, 0666, },
2580 { "event_status", &spufs_event_status_ops, 0444, }, 2634 { "event_status", &spufs_event_status_ops, 0444, },
2581 { "psmap", &spufs_psmap_fops, 0666, }, 2635 { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, },
2582 { "phys-id", &spufs_id_ops, 0666, }, 2636 { "phys-id", &spufs_id_ops, 0666, },
2583 { "object-id", &spufs_object_id_ops, 0666, }, 2637 { "object-id", &spufs_object_id_ops, 0666, },
2584 { "mbox_info", &spufs_mbox_info_fops, 0444, }, 2638 { "mbox_info", &spufs_mbox_info_fops, 0444, sizeof(u32), },
2585 { "ibox_info", &spufs_ibox_info_fops, 0444, }, 2639 { "ibox_info", &spufs_ibox_info_fops, 0444, sizeof(u32), },
2586 { "wbox_info", &spufs_wbox_info_fops, 0444, }, 2640 { "wbox_info", &spufs_wbox_info_fops, 0444, sizeof(u32), },
2587 { "dma_info", &spufs_dma_info_fops, 0444, }, 2641 { "dma_info", &spufs_dma_info_fops, 0444,
2588 { "proxydma_info", &spufs_proxydma_info_fops, 0444, }, 2642 sizeof(struct spu_dma_info), },
2643 { "proxydma_info", &spufs_proxydma_info_fops, 0444,
2644 sizeof(struct spu_proxydma_info)},
2589 { "tid", &spufs_tid_fops, 0444, }, 2645 { "tid", &spufs_tid_fops, 0444, },
2590 { "stat", &spufs_stat_fops, 0444, }, 2646 { "stat", &spufs_stat_fops, 0444, },
2591 { "switch_log", &spufs_switch_log_fops, 0444 }, 2647 { "switch_log", &spufs_switch_log_fops, 0444 },
2592 {}, 2648 {},
2593}; 2649};
2594 2650
2595struct tree_descr spufs_dir_nosched_contents[] = { 2651struct spufs_tree_descr spufs_dir_nosched_contents[] = {
2596 { "capabilities", &spufs_caps_fops, 0444, }, 2652 { "capabilities", &spufs_caps_fops, 0444, },
2597 { "mem", &spufs_mem_fops, 0666, }, 2653 { "mem", &spufs_mem_fops, 0666, LS_SIZE, },
2598 { "mbox", &spufs_mbox_fops, 0444, }, 2654 { "mbox", &spufs_mbox_fops, 0444, },
2599 { "ibox", &spufs_ibox_fops, 0444, }, 2655 { "ibox", &spufs_ibox_fops, 0444, },
2600 { "wbox", &spufs_wbox_fops, 0222, }, 2656 { "wbox", &spufs_wbox_fops, 0222, },
2601 { "mbox_stat", &spufs_mbox_stat_fops, 0444, }, 2657 { "mbox_stat", &spufs_mbox_stat_fops, 0444, sizeof(u32), },
2602 { "ibox_stat", &spufs_ibox_stat_fops, 0444, }, 2658 { "ibox_stat", &spufs_ibox_stat_fops, 0444, sizeof(u32), },
2603 { "wbox_stat", &spufs_wbox_stat_fops, 0444, }, 2659 { "wbox_stat", &spufs_wbox_stat_fops, 0444, sizeof(u32), },
2604 { "signal1", &spufs_signal1_nosched_fops, 0222, }, 2660 { "signal1", &spufs_signal1_nosched_fops, 0222, },
2605 { "signal2", &spufs_signal2_nosched_fops, 0222, }, 2661 { "signal2", &spufs_signal2_nosched_fops, 0222, },
2606 { "signal1_type", &spufs_signal1_type, 0666, }, 2662 { "signal1_type", &spufs_signal1_type, 0666, },
@@ -2609,7 +2665,7 @@ struct tree_descr spufs_dir_nosched_contents[] = {
2609 { "mfc", &spufs_mfc_fops, 0666, }, 2665 { "mfc", &spufs_mfc_fops, 0666, },
2610 { "cntl", &spufs_cntl_fops, 0666, }, 2666 { "cntl", &spufs_cntl_fops, 0666, },
2611 { "npc", &spufs_npc_ops, 0666, }, 2667 { "npc", &spufs_npc_ops, 0666, },
2612 { "psmap", &spufs_psmap_fops, 0666, }, 2668 { "psmap", &spufs_psmap_fops, 0666, SPUFS_PS_MAP_SIZE, },
2613 { "phys-id", &spufs_id_ops, 0666, }, 2669 { "phys-id", &spufs_id_ops, 0666, },
2614 { "object-id", &spufs_object_id_ops, 0666, }, 2670 { "object-id", &spufs_object_id_ops, 0666, },
2615 { "tid", &spufs_tid_fops, 0444, }, 2671 { "tid", &spufs_tid_fops, 0444, },
@@ -2617,6 +2673,11 @@ struct tree_descr spufs_dir_nosched_contents[] = {
2617 {}, 2673 {},
2618}; 2674};
2619 2675
2676struct spufs_tree_descr spufs_dir_debug_contents[] = {
2677 { ".ctx", &spufs_ctx_fops, 0444, },
2678 {},
2679};
2680
2620struct spufs_coredump_reader spufs_coredump_read[] = { 2681struct spufs_coredump_reader spufs_coredump_read[] = {
2621 { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])}, 2682 { "regs", __spufs_regs_read, NULL, sizeof(struct spu_reg128[128])},
2622 { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) }, 2683 { "fpcr", __spufs_fpcr_read, NULL, sizeof(struct spu_reg128) },
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index f407b2471855..7123472801d9 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -42,10 +42,19 @@
42 42
43#include "spufs.h" 43#include "spufs.h"
44 44
45struct spufs_sb_info {
46 int debug;
47};
48
45static struct kmem_cache *spufs_inode_cache; 49static struct kmem_cache *spufs_inode_cache;
46char *isolated_loader; 50char *isolated_loader;
47static int isolated_loader_size; 51static int isolated_loader_size;
48 52
53static struct spufs_sb_info *spufs_get_sb_info(struct super_block *sb)
54{
55 return sb->s_fs_info;
56}
57
49static struct inode * 58static struct inode *
50spufs_alloc_inode(struct super_block *sb) 59spufs_alloc_inode(struct super_block *sb)
51{ 60{
@@ -109,7 +118,7 @@ spufs_setattr(struct dentry *dentry, struct iattr *attr)
109static int 118static int
110spufs_new_file(struct super_block *sb, struct dentry *dentry, 119spufs_new_file(struct super_block *sb, struct dentry *dentry,
111 const struct file_operations *fops, int mode, 120 const struct file_operations *fops, int mode,
112 struct spu_context *ctx) 121 size_t size, struct spu_context *ctx)
113{ 122{
114 static struct inode_operations spufs_file_iops = { 123 static struct inode_operations spufs_file_iops = {
115 .setattr = spufs_setattr, 124 .setattr = spufs_setattr,
@@ -125,6 +134,7 @@ spufs_new_file(struct super_block *sb, struct dentry *dentry,
125 ret = 0; 134 ret = 0;
126 inode->i_op = &spufs_file_iops; 135 inode->i_op = &spufs_file_iops;
127 inode->i_fop = fops; 136 inode->i_fop = fops;
137 inode->i_size = size;
128 inode->i_private = SPUFS_I(inode)->i_ctx = get_spu_context(ctx); 138 inode->i_private = SPUFS_I(inode)->i_ctx = get_spu_context(ctx);
129 d_add(dentry, inode); 139 d_add(dentry, inode);
130out: 140out:
@@ -177,7 +187,7 @@ static int spufs_rmdir(struct inode *parent, struct dentry *dir)
177 return simple_rmdir(parent, dir); 187 return simple_rmdir(parent, dir);
178} 188}
179 189
180static int spufs_fill_dir(struct dentry *dir, struct tree_descr *files, 190static int spufs_fill_dir(struct dentry *dir, struct spufs_tree_descr *files,
181 int mode, struct spu_context *ctx) 191 int mode, struct spu_context *ctx)
182{ 192{
183 struct dentry *dentry, *tmp; 193 struct dentry *dentry, *tmp;
@@ -189,7 +199,7 @@ static int spufs_fill_dir(struct dentry *dir, struct tree_descr *files,
189 if (!dentry) 199 if (!dentry)
190 goto out; 200 goto out;
191 ret = spufs_new_file(dir->d_sb, dentry, files->ops, 201 ret = spufs_new_file(dir->d_sb, dentry, files->ops,
192 files->mode & mode, ctx); 202 files->mode & mode, files->size, ctx);
193 if (ret) 203 if (ret)
194 goto out; 204 goto out;
195 files++; 205 files++;
@@ -279,6 +289,13 @@ spufs_mkdir(struct inode *dir, struct dentry *dentry, unsigned int flags,
279 if (ret) 289 if (ret)
280 goto out_free_ctx; 290 goto out_free_ctx;
281 291
292 if (spufs_get_sb_info(dir->i_sb)->debug)
293 ret = spufs_fill_dir(dentry, spufs_dir_debug_contents,
294 mode, ctx);
295
296 if (ret)
297 goto out_free_ctx;
298
282 d_instantiate(dentry, inode); 299 d_instantiate(dentry, inode);
283 dget(dentry); 300 dget(dentry);
284 dir->i_nlink++; 301 dir->i_nlink++;
@@ -639,18 +656,19 @@ out:
639 656
640/* File system initialization */ 657/* File system initialization */
641enum { 658enum {
642 Opt_uid, Opt_gid, Opt_mode, Opt_err, 659 Opt_uid, Opt_gid, Opt_mode, Opt_debug, Opt_err,
643}; 660};
644 661
645static match_table_t spufs_tokens = { 662static match_table_t spufs_tokens = {
646 { Opt_uid, "uid=%d" }, 663 { Opt_uid, "uid=%d" },
647 { Opt_gid, "gid=%d" }, 664 { Opt_gid, "gid=%d" },
648 { Opt_mode, "mode=%o" }, 665 { Opt_mode, "mode=%o" },
649 { Opt_err, NULL }, 666 { Opt_debug, "debug" },
667 { Opt_err, NULL },
650}; 668};
651 669
652static int 670static int
653spufs_parse_options(char *options, struct inode *root) 671spufs_parse_options(struct super_block *sb, char *options, struct inode *root)
654{ 672{
655 char *p; 673 char *p;
656 substring_t args[MAX_OPT_ARGS]; 674 substring_t args[MAX_OPT_ARGS];
@@ -678,6 +696,9 @@ spufs_parse_options(char *options, struct inode *root)
678 return 0; 696 return 0;
679 root->i_mode = option | S_IFDIR; 697 root->i_mode = option | S_IFDIR;
680 break; 698 break;
699 case Opt_debug:
700 spufs_get_sb_info(sb)->debug = 1;
701 break;
681 default: 702 default:
682 return 0; 703 return 0;
683 } 704 }
@@ -736,7 +757,7 @@ spufs_create_root(struct super_block *sb, void *data)
736 SPUFS_I(inode)->i_ctx = NULL; 757 SPUFS_I(inode)->i_ctx = NULL;
737 758
738 ret = -EINVAL; 759 ret = -EINVAL;
739 if (!spufs_parse_options(data, inode)) 760 if (!spufs_parse_options(sb, data, inode))
740 goto out_iput; 761 goto out_iput;
741 762
742 ret = -ENOMEM; 763 ret = -ENOMEM;
@@ -754,6 +775,7 @@ out:
754static int 775static int
755spufs_fill_super(struct super_block *sb, void *data, int silent) 776spufs_fill_super(struct super_block *sb, void *data, int silent)
756{ 777{
778 struct spufs_sb_info *info;
757 static struct super_operations s_ops = { 779 static struct super_operations s_ops = {
758 .alloc_inode = spufs_alloc_inode, 780 .alloc_inode = spufs_alloc_inode,
759 .destroy_inode = spufs_destroy_inode, 781 .destroy_inode = spufs_destroy_inode,
@@ -765,11 +787,16 @@ spufs_fill_super(struct super_block *sb, void *data, int silent)
765 787
766 save_mount_options(sb, data); 788 save_mount_options(sb, data);
767 789
790 info = kzalloc(sizeof(*info), GFP_KERNEL);
791 if (!info)
792 return -ENOMEM;
793
768 sb->s_maxbytes = MAX_LFS_FILESIZE; 794 sb->s_maxbytes = MAX_LFS_FILESIZE;
769 sb->s_blocksize = PAGE_CACHE_SIZE; 795 sb->s_blocksize = PAGE_CACHE_SIZE;
770 sb->s_blocksize_bits = PAGE_CACHE_SHIFT; 796 sb->s_blocksize_bits = PAGE_CACHE_SHIFT;
771 sb->s_magic = SPUFS_MAGIC; 797 sb->s_magic = SPUFS_MAGIC;
772 sb->s_op = &s_ops; 798 sb->s_op = &s_ops;
799 sb->s_fs_info = info;
773 800
774 return spufs_create_root(sb, data); 801 return spufs_create_root(sb, data);
775} 802}
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index e929e70a84e3..34654743363d 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -899,7 +899,8 @@ static noinline void spusched_tick(struct spu_context *ctx)
899 spu_add_to_rq(ctx); 899 spu_add_to_rq(ctx);
900 } else { 900 } else {
901 spu_context_nospu_trace(spusched_tick__newslice, ctx); 901 spu_context_nospu_trace(spusched_tick__newslice, ctx);
902 ctx->time_slice++; 902 if (!ctx->time_slice)
903 ctx->time_slice++;
903 } 904 }
904out: 905out:
905 spu_release(ctx); 906 spu_release(ctx);
@@ -993,6 +994,7 @@ void spuctx_switch_state(struct spu_context *ctx,
993 struct timespec ts; 994 struct timespec ts;
994 struct spu *spu; 995 struct spu *spu;
995 enum spu_utilization_state old_state; 996 enum spu_utilization_state old_state;
997 int node;
996 998
997 ktime_get_ts(&ts); 999 ktime_get_ts(&ts);
998 curtime = timespec_to_ns(&ts); 1000 curtime = timespec_to_ns(&ts);
@@ -1014,6 +1016,11 @@ void spuctx_switch_state(struct spu_context *ctx,
1014 spu->stats.times[old_state] += delta; 1016 spu->stats.times[old_state] += delta;
1015 spu->stats.util_state = new_state; 1017 spu->stats.util_state = new_state;
1016 spu->stats.tstamp = curtime; 1018 spu->stats.tstamp = curtime;
1019 node = spu->node;
1020 if (old_state == SPU_UTIL_USER)
1021 atomic_dec(&cbe_spu_info[node].busy_spus);
1022 if (new_state == SPU_UTIL_USER);
1023 atomic_inc(&cbe_spu_info[node].busy_spus);
1017 } 1024 }
1018} 1025}
1019 1026
diff --git a/arch/powerpc/platforms/cell/spufs/spufs.h b/arch/powerpc/platforms/cell/spufs/spufs.h
index 454c277c1457..8ae8ef9dfc22 100644
--- a/arch/powerpc/platforms/cell/spufs/spufs.h
+++ b/arch/powerpc/platforms/cell/spufs/spufs.h
@@ -32,6 +32,13 @@
32#include <asm/spu_csa.h> 32#include <asm/spu_csa.h>
33#include <asm/spu_info.h> 33#include <asm/spu_info.h>
34 34
35#define SPUFS_PS_MAP_SIZE 0x20000
36#define SPUFS_MFC_MAP_SIZE 0x1000
37#define SPUFS_CNTL_MAP_SIZE 0x1000
38#define SPUFS_CNTL_MAP_SIZE 0x1000
39#define SPUFS_SIGNAL_MAP_SIZE PAGE_SIZE
40#define SPUFS_MSS_MAP_SIZE 0x1000
41
35/* The magic number for our file system */ 42/* The magic number for our file system */
36enum { 43enum {
37 SPUFS_MAGIC = 0x23c9b64e, 44 SPUFS_MAGIC = 0x23c9b64e,
@@ -228,8 +235,16 @@ struct spufs_inode_info {
228#define SPUFS_I(inode) \ 235#define SPUFS_I(inode) \
229 container_of(inode, struct spufs_inode_info, vfs_inode) 236 container_of(inode, struct spufs_inode_info, vfs_inode)
230 237
231extern struct tree_descr spufs_dir_contents[]; 238struct spufs_tree_descr {
232extern struct tree_descr spufs_dir_nosched_contents[]; 239 const char *name;
240 const struct file_operations *ops;
241 int mode;
242 size_t size;
243};
244
245extern struct spufs_tree_descr spufs_dir_contents[];
246extern struct spufs_tree_descr spufs_dir_nosched_contents[];
247extern struct spufs_tree_descr spufs_dir_debug_contents[];
233 248
234/* system call implementation */ 249/* system call implementation */
235extern struct spufs_calls spufs_calls; 250extern struct spufs_calls spufs_calls;
diff --git a/arch/powerpc/platforms/cell/spufs/sputrace.c b/arch/powerpc/platforms/cell/spufs/sputrace.c
index 53202422ba72..8c0e95766a62 100644
--- a/arch/powerpc/platforms/cell/spufs/sputrace.c
+++ b/arch/powerpc/platforms/cell/spufs/sputrace.c
@@ -182,10 +182,10 @@ struct spu_probe spu_probes[] = {
182 { "spu_yield__enter", "ctx %p", spu_context_nospu_event }, 182 { "spu_yield__enter", "ctx %p", spu_context_nospu_event },
183 { "spu_deactivate__enter", "ctx %p", spu_context_nospu_event }, 183 { "spu_deactivate__enter", "ctx %p", spu_context_nospu_event },
184 { "__spu_deactivate__unload", "ctx %p spu %p", spu_context_event }, 184 { "__spu_deactivate__unload", "ctx %p spu %p", spu_context_event },
185 { "spufs_ps_nopfn__enter", "ctx %p", spu_context_nospu_event }, 185 { "spufs_ps_fault__enter", "ctx %p", spu_context_nospu_event },
186 { "spufs_ps_nopfn__sleep", "ctx %p", spu_context_nospu_event }, 186 { "spufs_ps_fault__sleep", "ctx %p", spu_context_nospu_event },
187 { "spufs_ps_nopfn__wake", "ctx %p spu %p", spu_context_event }, 187 { "spufs_ps_fault__wake", "ctx %p spu %p", spu_context_event },
188 { "spufs_ps_nopfn__insert", "ctx %p spu %p", spu_context_event }, 188 { "spufs_ps_fault__insert", "ctx %p spu %p", spu_context_event },
189 { "spu_acquire_saved__enter", "ctx %p", spu_context_nospu_event }, 189 { "spu_acquire_saved__enter", "ctx %p", spu_context_nospu_event },
190 { "destroy_spu_context__enter", "ctx %p", spu_context_nospu_event }, 190 { "destroy_spu_context__enter", "ctx %p", spu_context_nospu_event },
191 { "spufs_stop_callback__enter", "ctx %p spu %p", spu_context_event }, 191 { "spufs_stop_callback__enter", "ctx %p spu %p", spu_context_event },
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 116babbaaf81..1ba7ce5aafae 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -63,13 +63,6 @@ static struct mpic *chrp_mpic;
63DEFINE_PER_CPU(struct timer_list, heartbeat_timer); 63DEFINE_PER_CPU(struct timer_list, heartbeat_timer);
64unsigned long event_scan_interval; 64unsigned long event_scan_interval;
65 65
66/*
67 * XXX this should be in xmon.h, but putting it there means xmon.h
68 * has to include <linux/interrupt.h> (to get irqreturn_t), which
69 * causes all sorts of problems. -- paulus
70 */
71extern irqreturn_t xmon_irq(int, void *);
72
73extern unsigned long loops_per_jiffy; 66extern unsigned long loops_per_jiffy;
74 67
75/* To be replaced by RTAS when available */ 68/* To be replaced by RTAS when available */
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig
index 429088967813..4f9f8184d164 100644
--- a/arch/powerpc/platforms/embedded6xx/Kconfig
+++ b/arch/powerpc/platforms/embedded6xx/Kconfig
@@ -59,6 +59,16 @@ config PPC_PRPMC2800
59 help 59 help
60 This option enables support for the Motorola PrPMC2800 board 60 This option enables support for the Motorola PrPMC2800 board
61 61
62config PPC_C2K
63 bool "SBS/GEFanuc C2K board"
64 depends on EMBEDDED6xx
65 select MV64X60
66 select NOT_COHERENT_CACHE
67 select MTD_CFI_I4
68 help
69 This option enables support for the GE Fanuc C2K board (formerly
70 an SBS board).
71
62config TSI108_BRIDGE 72config TSI108_BRIDGE
63 bool 73 bool
64 select PCI 74 select PCI
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile
index 06524d3ffd2e..0773c08bd444 100644
--- a/arch/powerpc/platforms/embedded6xx/Makefile
+++ b/arch/powerpc/platforms/embedded6xx/Makefile
@@ -6,3 +6,4 @@ obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o
6obj-$(CONFIG_STORCENTER) += storcenter.o 6obj-$(CONFIG_STORCENTER) += storcenter.o
7obj-$(CONFIG_PPC_HOLLY) += holly.o 7obj-$(CONFIG_PPC_HOLLY) += holly.o
8obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o 8obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o
9obj-$(CONFIG_PPC_C2K) += c2k.o
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c
new file mode 100644
index 000000000000..d0b25b8c39d1
--- /dev/null
+++ b/arch/powerpc/platforms/embedded6xx/c2k.c
@@ -0,0 +1,158 @@
1/*
2 * Board setup routines for the GEFanuc C2K board
3 *
4 * Author: Remi Machet <rmachet@slac.stanford.edu>
5 *
6 * Originated from prpmc2800.c
7 *
8 * 2008 (c) Stanford University
9 * 2007 (c) MontaVista, Software, Inc.
10 *
11 * This program is free software; you can redistribute it and/or modify it
12 * under the terms of the GNU General Public License version 2 as published
13 * by the Free Software Foundation.
14 */
15
16#include <linux/stddef.h>
17#include <linux/kernel.h>
18#include <linux/delay.h>
19#include <linux/interrupt.h>
20#include <linux/seq_file.h>
21#include <linux/time.h>
22#include <linux/of.h>
23#include <linux/kexec.h>
24
25#include <asm/machdep.h>
26#include <asm/prom.h>
27#include <asm/system.h>
28#include <asm/time.h>
29
30#include <mm/mmu_decl.h>
31
32#include <sysdev/mv64x60.h>
33
34#define MV64x60_MPP_CNTL_0 0x0000
35#define MV64x60_MPP_CNTL_2 0x0008
36
37#define MV64x60_GPP_IO_CNTL 0x0000
38#define MV64x60_GPP_LEVEL_CNTL 0x0010
39#define MV64x60_GPP_VALUE_SET 0x0018
40
41static void __iomem *mv64x60_mpp_reg_base;
42static void __iomem *mv64x60_gpp_reg_base;
43
44static void __init c2k_setup_arch(void)
45{
46 struct device_node *np;
47 phys_addr_t paddr;
48 const unsigned int *reg;
49
50 /*
51 * ioremap mpp and gpp registers in case they are later
52 * needed by c2k_reset_board().
53 */
54 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp");
55 reg = of_get_property(np, "reg", NULL);
56 paddr = of_translate_address(np, reg);
57 of_node_put(np);
58 mv64x60_mpp_reg_base = ioremap(paddr, reg[1]);
59
60 np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp");
61 reg = of_get_property(np, "reg", NULL);
62 paddr = of_translate_address(np, reg);
63 of_node_put(np);
64 mv64x60_gpp_reg_base = ioremap(paddr, reg[1]);
65
66#ifdef CONFIG_PCI
67 mv64x60_pci_init();
68#endif
69}
70
71static void c2k_reset_board(void)
72{
73 u32 temp;
74
75 local_irq_disable();
76
77 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0);
78 temp &= 0xFFFF0FFF;
79 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp);
80
81 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
82 temp |= 0x00000004;
83 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
84
85 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
86 temp |= 0x00000004;
87 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
88
89 temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2);
90 temp &= 0xFFFF0FFF;
91 out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp);
92
93 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL);
94 temp |= 0x00080000;
95 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp);
96
97 temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL);
98 temp |= 0x00080000;
99 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp);
100
101 out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004);
102}
103
104static void c2k_restart(char *cmd)
105{
106 c2k_reset_board();
107 msleep(100);
108 panic("restart failed\n");
109}
110
111#ifdef CONFIG_NOT_COHERENT_CACHE
112#define COHERENCY_SETTING "off"
113#else
114#define COHERENCY_SETTING "on"
115#endif
116
117void c2k_show_cpuinfo(struct seq_file *m)
118{
119 uint memsize = total_memory;
120
121 seq_printf(m, "Vendor\t\t: GEFanuc\n");
122 seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024));
123 seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING);
124}
125
126/*
127 * Called very early, device-tree isn't unflattened
128 */
129static int __init c2k_probe(void)
130{
131 unsigned long root = of_get_flat_dt_root();
132
133 if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K"))
134 return 0;
135
136 printk(KERN_INFO "Detected a GEFanuc C2K board\n");
137
138 _set_L2CR(0);
139 _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I);
140 return 1;
141}
142
143define_machine(c2k) {
144 .name = "C2K",
145 .probe = c2k_probe,
146 .setup_arch = c2k_setup_arch,
147 .init_early = mv64x60_init_early,
148 .show_cpuinfo = c2k_show_cpuinfo,
149 .init_IRQ = mv64x60_init_irq,
150 .get_irq = mv64x60_get_irq,
151 .restart = c2k_restart,
152 .calibrate_decr = generic_calibrate_decr,
153#ifdef CONFIG_KEXEC
154 .machine_kexec = default_machine_kexec,
155 .machine_kexec_prepare = default_machine_kexec_prepare,
156 .machine_crash_shutdown = default_machine_crash_shutdown,
157#endif
158};
diff --git a/arch/powerpc/platforms/iseries/iommu.c b/arch/powerpc/platforms/iseries/iommu.c
index 11fa3c772ed5..ab5d8687c3cf 100644
--- a/arch/powerpc/platforms/iseries/iommu.c
+++ b/arch/powerpc/platforms/iseries/iommu.c
@@ -214,13 +214,13 @@ dma_addr_t iseries_hv_map(void *vaddr, size_t size,
214 enum dma_data_direction direction) 214 enum dma_data_direction direction)
215{ 215{
216 return iommu_map_single(NULL, &vio_iommu_table, vaddr, size, 216 return iommu_map_single(NULL, &vio_iommu_table, vaddr, size,
217 DMA_32BIT_MASK, direction); 217 DMA_32BIT_MASK, direction, NULL);
218} 218}
219 219
220void iseries_hv_unmap(dma_addr_t dma_handle, size_t size, 220void iseries_hv_unmap(dma_addr_t dma_handle, size_t size,
221 enum dma_data_direction direction) 221 enum dma_data_direction direction)
222{ 222{
223 iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction); 223 iommu_unmap_single(&vio_iommu_table, dma_handle, size, direction, NULL);
224} 224}
225 225
226void __init iommu_vio_init(void) 226void __init iommu_vio_init(void)
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c
index 9f7579b38c72..53bca132fb48 100644
--- a/arch/powerpc/platforms/maple/time.c
+++ b/arch/powerpc/platforms/maple/time.c
@@ -41,8 +41,6 @@
41#define DBG(x...) 41#define DBG(x...)
42#endif 42#endif
43 43
44extern void GregorianDay(struct rtc_time * tm);
45
46static int maple_rtc_addr; 44static int maple_rtc_addr;
47 45
48static int maple_clock_read(int addr) 46static int maple_clock_read(int addr)
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 829b8b02527b..6d149ae8ffa7 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -34,16 +34,10 @@
34#include <asm/time.h> 34#include <asm/time.h>
35#include <asm/pmac_feature.h> 35#include <asm/pmac_feature.h>
36#include <asm/mpic.h> 36#include <asm/mpic.h>
37#include <asm/xmon.h>
37 38
38#include "pmac.h" 39#include "pmac.h"
39 40
40/*
41 * XXX this should be in xmon.h, but putting it there means xmon.h
42 * has to include <linux/interrupt.h> (to get irqreturn_t), which
43 * causes all sorts of problems. -- paulus
44 */
45extern irqreturn_t xmon_irq(int, void *);
46
47#ifdef CONFIG_PPC32 41#ifdef CONFIG_PPC32
48struct pmac_irq_hw { 42struct pmac_irq_hw {
49 unsigned int event; 43 unsigned int event;
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index cb2d894541c6..4ae3d00e0bdd 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -36,6 +36,7 @@
36 36
37#include <asm/ptrace.h> 37#include <asm/ptrace.h>
38#include <asm/atomic.h> 38#include <asm/atomic.h>
39#include <asm/code-patching.h>
39#include <asm/irq.h> 40#include <asm/irq.h>
40#include <asm/page.h> 41#include <asm/page.h>
41#include <asm/pgtable.h> 42#include <asm/pgtable.h>
@@ -786,8 +787,7 @@ static void __devinit smp_core99_kick_cpu(int nr)
786{ 787{
787 unsigned int save_vector; 788 unsigned int save_vector;
788 unsigned long target, flags; 789 unsigned long target, flags;
789 volatile unsigned int *vector 790 unsigned int *vector = (unsigned int *)(KERNELBASE+0x100);
790 = ((volatile unsigned int *)(KERNELBASE+0x100));
791 791
792 if (nr < 0 || nr > 3) 792 if (nr < 0 || nr > 3)
793 return; 793 return;
@@ -804,7 +804,7 @@ static void __devinit smp_core99_kick_cpu(int nr)
804 * b __secondary_start_pmac_0 + nr*8 - KERNELBASE 804 * b __secondary_start_pmac_0 + nr*8 - KERNELBASE
805 */ 805 */
806 target = (unsigned long) __secondary_start_pmac_0 + nr * 8; 806 target = (unsigned long) __secondary_start_pmac_0 + nr * 8;
807 create_branch((unsigned long)vector, target, BRANCH_SET_LINK); 807 patch_branch(vector, target, BRANCH_SET_LINK);
808 808
809 /* Put some life in our friend */ 809 /* Put some life in our friend */
810 pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0); 810 pmac_call_feature(PMAC_FTR_RESET_CPU, NULL, nr, 0);
diff --git a/arch/powerpc/platforms/ps3/system-bus.c b/arch/powerpc/platforms/ps3/system-bus.c
index 43c493fca2d0..d66c3628a112 100644
--- a/arch/powerpc/platforms/ps3/system-bus.c
+++ b/arch/powerpc/platforms/ps3/system-bus.c
@@ -349,9 +349,14 @@ static int ps3_system_bus_match(struct device *_dev,
349 349
350 result = dev->match_id == drv->match_id; 350 result = dev->match_id == drv->match_id;
351 351
352 pr_info("%s:%d: dev=%u(%s), drv=%u(%s): %s\n", __func__, __LINE__, 352 if (result)
353 dev->match_id, dev->core.bus_id, drv->match_id, drv->core.name, 353 pr_info("%s:%d: dev=%u(%s), drv=%u(%s): match\n", __func__,
354 (result ? "match" : "miss")); 354 __LINE__, dev->match_id, dev->core.bus_id,
355 drv->match_id, drv->core.name);
356 else
357 pr_debug("%s:%d: dev=%u(%s), drv=%u(%s): miss\n", __func__,
358 __LINE__, dev->match_id, dev->core.bus_id,
359 drv->match_id, drv->core.name);
355 return result; 360 return result;
356} 361}
357 362
@@ -362,7 +367,7 @@ static int ps3_system_bus_probe(struct device *_dev)
362 struct ps3_system_bus_driver *drv; 367 struct ps3_system_bus_driver *drv;
363 368
364 BUG_ON(!dev); 369 BUG_ON(!dev);
365 pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); 370 pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
366 371
367 drv = ps3_system_bus_dev_to_system_bus_drv(dev); 372 drv = ps3_system_bus_dev_to_system_bus_drv(dev);
368 BUG_ON(!drv); 373 BUG_ON(!drv);
@@ -370,10 +375,10 @@ static int ps3_system_bus_probe(struct device *_dev)
370 if (drv->probe) 375 if (drv->probe)
371 result = drv->probe(dev); 376 result = drv->probe(dev);
372 else 377 else
373 pr_info("%s:%d: %s no probe method\n", __func__, __LINE__, 378 pr_debug("%s:%d: %s no probe method\n", __func__, __LINE__,
374 dev->core.bus_id); 379 dev->core.bus_id);
375 380
376 pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); 381 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
377 return result; 382 return result;
378} 383}
379 384
@@ -384,7 +389,7 @@ static int ps3_system_bus_remove(struct device *_dev)
384 struct ps3_system_bus_driver *drv; 389 struct ps3_system_bus_driver *drv;
385 390
386 BUG_ON(!dev); 391 BUG_ON(!dev);
387 pr_info(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id); 392 pr_debug(" -> %s:%d: %s\n", __func__, __LINE__, _dev->bus_id);
388 393
389 drv = ps3_system_bus_dev_to_system_bus_drv(dev); 394 drv = ps3_system_bus_dev_to_system_bus_drv(dev);
390 BUG_ON(!drv); 395 BUG_ON(!drv);
@@ -395,7 +400,7 @@ static int ps3_system_bus_remove(struct device *_dev)
395 dev_dbg(&dev->core, "%s:%d %s: no remove method\n", 400 dev_dbg(&dev->core, "%s:%d %s: no remove method\n",
396 __func__, __LINE__, drv->core.name); 401 __func__, __LINE__, drv->core.name);
397 402
398 pr_info(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id); 403 pr_debug(" <- %s:%d: %s\n", __func__, __LINE__, dev->core.bus_id);
399 return result; 404 return result;
400} 405}
401 406
@@ -550,7 +555,7 @@ static void ps3_free_coherent(struct device *_dev, size_t size, void *vaddr,
550 */ 555 */
551 556
552static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size, 557static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size,
553 enum dma_data_direction direction) 558 enum dma_data_direction direction, struct dma_attrs *attrs)
554{ 559{
555 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 560 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
556 int result; 561 int result;
@@ -570,7 +575,8 @@ static dma_addr_t ps3_sb_map_single(struct device *_dev, void *ptr, size_t size,
570 575
571static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr, 576static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr,
572 size_t size, 577 size_t size,
573 enum dma_data_direction direction) 578 enum dma_data_direction direction,
579 struct dma_attrs *attrs)
574{ 580{
575 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 581 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
576 int result; 582 int result;
@@ -603,7 +609,7 @@ static dma_addr_t ps3_ioc0_map_single(struct device *_dev, void *ptr,
603} 609}
604 610
605static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr, 611static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr,
606 size_t size, enum dma_data_direction direction) 612 size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
607{ 613{
608 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev); 614 struct ps3_system_bus_device *dev = ps3_dev_to_system_bus_dev(_dev);
609 int result; 615 int result;
@@ -617,7 +623,7 @@ static void ps3_unmap_single(struct device *_dev, dma_addr_t dma_addr,
617} 623}
618 624
619static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl, 625static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl,
620 int nents, enum dma_data_direction direction) 626 int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
621{ 627{
622#if defined(CONFIG_PS3_DYNAMIC_DMA) 628#if defined(CONFIG_PS3_DYNAMIC_DMA)
623 BUG_ON("do"); 629 BUG_ON("do");
@@ -646,14 +652,15 @@ static int ps3_sb_map_sg(struct device *_dev, struct scatterlist *sgl,
646 652
647static int ps3_ioc0_map_sg(struct device *_dev, struct scatterlist *sg, 653static int ps3_ioc0_map_sg(struct device *_dev, struct scatterlist *sg,
648 int nents, 654 int nents,
649 enum dma_data_direction direction) 655 enum dma_data_direction direction,
656 struct dma_attrs *attrs)
650{ 657{
651 BUG(); 658 BUG();
652 return 0; 659 return 0;
653} 660}
654 661
655static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg, 662static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg,
656 int nents, enum dma_data_direction direction) 663 int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
657{ 664{
658#if defined(CONFIG_PS3_DYNAMIC_DMA) 665#if defined(CONFIG_PS3_DYNAMIC_DMA)
659 BUG_ON("do"); 666 BUG_ON("do");
@@ -661,7 +668,8 @@ static void ps3_sb_unmap_sg(struct device *_dev, struct scatterlist *sg,
661} 668}
662 669
663static void ps3_ioc0_unmap_sg(struct device *_dev, struct scatterlist *sg, 670static void ps3_ioc0_unmap_sg(struct device *_dev, struct scatterlist *sg,
664 int nents, enum dma_data_direction direction) 671 int nents, enum dma_data_direction direction,
672 struct dma_attrs *attrs)
665{ 673{
666 BUG(); 674 BUG();
667} 675}
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 6f544ba4b37f..c027f0a70a04 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -812,6 +812,7 @@ int rtas_set_slot_reset(struct pci_dn *pdn)
812static inline void __restore_bars (struct pci_dn *pdn) 812static inline void __restore_bars (struct pci_dn *pdn)
813{ 813{
814 int i; 814 int i;
815 u32 cmd;
815 816
816 if (NULL==pdn->phb) return; 817 if (NULL==pdn->phb) return;
817 for (i=4; i<10; i++) { 818 for (i=4; i<10; i++) {
@@ -832,6 +833,19 @@ static inline void __restore_bars (struct pci_dn *pdn)
832 833
833 /* max latency, min grant, interrupt pin and line */ 834 /* max latency, min grant, interrupt pin and line */
834 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]); 835 rtas_write_config(pdn, 15*4, 4, pdn->config_space[15]);
836
837 /* Restore PERR & SERR bits, some devices require it,
838 don't touch the other command bits */
839 rtas_read_config(pdn, PCI_COMMAND, 4, &cmd);
840 if (pdn->config_space[1] & PCI_COMMAND_PARITY)
841 cmd |= PCI_COMMAND_PARITY;
842 else
843 cmd &= ~PCI_COMMAND_PARITY;
844 if (pdn->config_space[1] & PCI_COMMAND_SERR)
845 cmd |= PCI_COMMAND_SERR;
846 else
847 cmd &= ~PCI_COMMAND_SERR;
848 rtas_write_config(pdn, PCI_COMMAND, 4, cmd);
835} 849}
836 850
837/** 851/**
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c
index 9d3a40f45974..5a707da3f5c2 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -26,6 +26,7 @@
26#include <asm/prom.h> 26#include <asm/prom.h>
27#include <asm/udbg.h> 27#include <asm/udbg.h>
28 28
29#include "pseries.h"
29 30
30typedef struct { 31typedef struct {
31 unsigned long val; 32 unsigned long val;
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index 3c5727dd5aa5..a1a368dd2d99 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -15,34 +15,13 @@
15#include <asm/machdep.h> 15#include <asm/machdep.h>
16#include <asm/pSeries_reconfig.h> 16#include <asm/pSeries_reconfig.h>
17 17
18static int pseries_remove_memory(struct device_node *np) 18static int pseries_remove_lmb(unsigned long base, unsigned int lmb_size)
19{ 19{
20 const char *type; 20 unsigned long start, start_pfn;
21 const unsigned int *my_index;
22 const unsigned int *regs;
23 u64 start_pfn, start;
24 struct zone *zone; 21 struct zone *zone;
25 int ret = -EINVAL; 22 int ret;
26
27 /*
28 * Check to see if we are actually removing memory
29 */
30 type = of_get_property(np, "device_type", NULL);
31 if (type == NULL || strcmp(type, "memory") != 0)
32 return 0;
33 23
34 /* 24 start_pfn = base >> PFN_SECTION_SHIFT;
35 * Find the memory index and size of the removing section
36 */
37 my_index = of_get_property(np, "ibm,my-drc-index", NULL);
38 if (!my_index)
39 return ret;
40
41 regs = of_get_property(np, "reg", NULL);
42 if (!regs)
43 return ret;
44
45 start_pfn = section_nr_to_pfn(*my_index & 0xffff);
46 zone = page_zone(pfn_to_page(start_pfn)); 25 zone = page_zone(pfn_to_page(start_pfn));
47 26
48 /* 27 /*
@@ -54,56 +33,111 @@ static int pseries_remove_memory(struct device_node *np)
54 * to sysfs "state" file and we can't remove sysfs entries 33 * to sysfs "state" file and we can't remove sysfs entries
55 * while writing to it. So we have to defer it to here. 34 * while writing to it. So we have to defer it to here.
56 */ 35 */
57 ret = __remove_pages(zone, start_pfn, regs[3] >> PAGE_SHIFT); 36 ret = __remove_pages(zone, start_pfn, lmb_size >> PAGE_SHIFT);
58 if (ret) 37 if (ret)
59 return ret; 38 return ret;
60 39
61 /* 40 /*
62 * Update memory regions for memory remove 41 * Update memory regions for memory remove
63 */ 42 */
64 lmb_remove(start_pfn << PAGE_SHIFT, regs[3]); 43 lmb_remove(base, lmb_size);
65 44
66 /* 45 /*
67 * Remove htab bolted mappings for this section of memory 46 * Remove htab bolted mappings for this section of memory
68 */ 47 */
69 start = (unsigned long)__va(start_pfn << PAGE_SHIFT); 48 start = (unsigned long)__va(base);
70 ret = remove_section_mapping(start, start + regs[3]); 49 ret = remove_section_mapping(start, start + lmb_size);
71 return ret; 50 return ret;
72} 51}
73 52
74static int pseries_add_memory(struct device_node *np) 53static int pseries_remove_memory(struct device_node *np)
75{ 54{
76 const char *type; 55 const char *type;
77 const unsigned int *my_index;
78 const unsigned int *regs; 56 const unsigned int *regs;
79 u64 start_pfn; 57 unsigned long base;
58 unsigned int lmb_size;
80 int ret = -EINVAL; 59 int ret = -EINVAL;
81 60
82 /* 61 /*
83 * Check to see if we are actually adding memory 62 * Check to see if we are actually removing memory
84 */ 63 */
85 type = of_get_property(np, "device_type", NULL); 64 type = of_get_property(np, "device_type", NULL);
86 if (type == NULL || strcmp(type, "memory") != 0) 65 if (type == NULL || strcmp(type, "memory") != 0)
87 return 0; 66 return 0;
88 67
89 /* 68 /*
90 * Find the memory index and size of the added section 69 * Find the bae address and size of the lmb
91 */ 70 */
92 my_index = of_get_property(np, "ibm,my-drc-index", NULL); 71 regs = of_get_property(np, "reg", NULL);
93 if (!my_index) 72 if (!regs)
94 return ret; 73 return ret;
95 74
75 base = *(unsigned long *)regs;
76 lmb_size = regs[3];
77
78 ret = pseries_remove_lmb(base, lmb_size);
79 return ret;
80}
81
82static int pseries_add_memory(struct device_node *np)
83{
84 const char *type;
85 const unsigned int *regs;
86 unsigned long base;
87 unsigned int lmb_size;
88 int ret = -EINVAL;
89
90 /*
91 * Check to see if we are actually adding memory
92 */
93 type = of_get_property(np, "device_type", NULL);
94 if (type == NULL || strcmp(type, "memory") != 0)
95 return 0;
96
97 /*
98 * Find the base and size of the lmb
99 */
96 regs = of_get_property(np, "reg", NULL); 100 regs = of_get_property(np, "reg", NULL);
97 if (!regs) 101 if (!regs)
98 return ret; 102 return ret;
99 103
100 start_pfn = section_nr_to_pfn(*my_index & 0xffff); 104 base = *(unsigned long *)regs;
105 lmb_size = regs[3];
101 106
102 /* 107 /*
103 * Update memory region to represent the memory add 108 * Update memory region to represent the memory add
104 */ 109 */
105 lmb_add(start_pfn << PAGE_SHIFT, regs[3]); 110 ret = lmb_add(base, lmb_size);
106 return 0; 111 return (ret < 0) ? -EINVAL : 0;
112}
113
114static int pseries_drconf_memory(unsigned long *base, unsigned int action)
115{
116 struct device_node *np;
117 const unsigned long *lmb_size;
118 int rc;
119
120 np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
121 if (!np)
122 return -EINVAL;
123
124 lmb_size = of_get_property(np, "ibm,lmb-size", NULL);
125 if (!lmb_size) {
126 of_node_put(np);
127 return -EINVAL;
128 }
129
130 if (action == PSERIES_DRCONF_MEM_ADD) {
131 rc = lmb_add(*base, *lmb_size);
132 rc = (rc < 0) ? -EINVAL : 0;
133 } else if (action == PSERIES_DRCONF_MEM_REMOVE) {
134 rc = pseries_remove_lmb(*base, *lmb_size);
135 } else {
136 rc = -EINVAL;
137 }
138
139 of_node_put(np);
140 return rc;
107} 141}
108 142
109static int pseries_memory_notifier(struct notifier_block *nb, 143static int pseries_memory_notifier(struct notifier_block *nb,
@@ -120,6 +154,11 @@ static int pseries_memory_notifier(struct notifier_block *nb,
120 if (pseries_remove_memory(node)) 154 if (pseries_remove_memory(node))
121 err = NOTIFY_BAD; 155 err = NOTIFY_BAD;
122 break; 156 break;
157 case PSERIES_DRCONF_MEM_ADD:
158 case PSERIES_DRCONF_MEM_REMOVE:
159 if (pseries_drconf_memory(node, action))
160 err = NOTIFY_BAD;
161 break;
123 default: 162 default:
124 err = NOTIFY_DONE; 163 err = NOTIFY_DONE;
125 break; 164 break;
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index 176f1f39d2d5..9a12908510fb 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -135,9 +135,10 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
135 u64 rpn; 135 u64 rpn;
136 long l, limit; 136 long l, limit;
137 137
138 if (npages == 1) 138 if (npages == 1) {
139 return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, 139 tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, direction);
140 direction); 140 return;
141 }
141 142
142 tcep = __get_cpu_var(tce_page); 143 tcep = __get_cpu_var(tce_page);
143 144
@@ -147,9 +148,11 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
147 if (!tcep) { 148 if (!tcep) {
148 tcep = (u64 *)__get_free_page(GFP_ATOMIC); 149 tcep = (u64 *)__get_free_page(GFP_ATOMIC);
149 /* If allocation fails, fall back to the loop implementation */ 150 /* If allocation fails, fall back to the loop implementation */
150 if (!tcep) 151 if (!tcep) {
151 return tce_build_pSeriesLP(tbl, tcenum, npages, 152 tce_build_pSeriesLP(tbl, tcenum, npages, uaddr,
152 uaddr, direction); 153 direction);
154 return;
155 }
153 __get_cpu_var(tce_page) = tcep; 156 __get_cpu_var(tce_page) = tcep;
154 } 157 }
155 158
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index e9dd5fe081c9..53cbd53d8740 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -70,4 +70,4 @@ static int __init pseries_kexec_setup(void)
70 70
71 return 0; 71 return 0;
72} 72}
73__initcall(pseries_kexec_setup); 73machine_device_initcall(pseries, pseries_kexec_setup);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index 2cbaedb17f3e..52a80e5840e8 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -52,7 +52,7 @@ EXPORT_SYMBOL(plpar_hcall_norets);
52extern void pSeries_find_serial_port(void); 52extern void pSeries_find_serial_port(void);
53 53
54 54
55int vtermno; /* virtual terminal# for udbg */ 55static int vtermno; /* virtual terminal# for udbg */
56 56
57#define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) 57#define __ALIGNED__ __attribute__((__aligned__(sizeof(long))))
58static void udbg_hvsi_putc(char c) 58static void udbg_hvsi_putc(char c)
@@ -305,7 +305,7 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
305 flags = 0; 305 flags = 0;
306 306
307 /* Make pHyp happy */ 307 /* Make pHyp happy */
308 if (rflags & (_PAGE_GUARDED|_PAGE_NO_CACHE)) 308 if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU))
309 hpte_r &= ~_PAGE_COHERENT; 309 hpte_r &= ~_PAGE_COHERENT;
310 310
311 lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot); 311 lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index 2b548afd1003..d20b96e22c2e 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -55,7 +55,7 @@
55static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; 55static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
56static DEFINE_SPINLOCK(ras_log_buf_lock); 56static DEFINE_SPINLOCK(ras_log_buf_lock);
57 57
58char mce_data_buf[RTAS_ERROR_LOG_MAX]; 58static char mce_data_buf[RTAS_ERROR_LOG_MAX];
59 59
60static int ras_get_sensor_state_token; 60static int ras_get_sensor_state_token;
61static int ras_check_exception_token; 61static int ras_check_exception_token;
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 75769aae41d5..7637bd38c795 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -365,7 +365,7 @@ static char *parse_node(char *buf, size_t bufsize, struct device_node **npp)
365 *buf = '\0'; 365 *buf = '\0';
366 buf++; 366 buf++;
367 367
368 handle = simple_strtoul(handle_str, NULL, 10); 368 handle = simple_strtoul(handle_str, NULL, 0);
369 369
370 *npp = of_find_node_by_phandle(handle); 370 *npp = of_find_node_by_phandle(handle);
371 return buf; 371 return buf;
@@ -422,8 +422,8 @@ static int do_update_property(char *buf, size_t bufsize)
422{ 422{
423 struct device_node *np; 423 struct device_node *np;
424 unsigned char *value; 424 unsigned char *value;
425 char *name, *end; 425 char *name, *end, *next_prop;
426 int length; 426 int rc, length;
427 struct property *newprop, *oldprop; 427 struct property *newprop, *oldprop;
428 buf = parse_node(buf, bufsize, &np); 428 buf = parse_node(buf, bufsize, &np);
429 end = buf + bufsize; 429 end = buf + bufsize;
@@ -431,7 +431,8 @@ static int do_update_property(char *buf, size_t bufsize)
431 if (!np) 431 if (!np)
432 return -ENODEV; 432 return -ENODEV;
433 433
434 if (parse_next_property(buf, end, &name, &length, &value) == NULL) 434 next_prop = parse_next_property(buf, end, &name, &length, &value);
435 if (!next_prop)
435 return -EINVAL; 436 return -EINVAL;
436 437
437 newprop = new_property(name, length, value, NULL); 438 newprop = new_property(name, length, value, NULL);
@@ -442,7 +443,34 @@ static int do_update_property(char *buf, size_t bufsize)
442 if (!oldprop) 443 if (!oldprop)
443 return -ENODEV; 444 return -ENODEV;
444 445
445 return prom_update_property(np, newprop, oldprop); 446 rc = prom_update_property(np, newprop, oldprop);
447 if (rc)
448 return rc;
449
450 /* For memory under the ibm,dynamic-reconfiguration-memory node
451 * of the device tree, adding and removing memory is just an update
452 * to the ibm,dynamic-memory property instead of adding/removing a
453 * memory node in the device tree. For these cases we still need to
454 * involve the notifier chain.
455 */
456 if (!strcmp(name, "ibm,dynamic-memory")) {
457 int action;
458
459 next_prop = parse_next_property(next_prop, end, &name,
460 &length, &value);
461 if (!next_prop)
462 return -EINVAL;
463
464 if (!strcmp(name, "add"))
465 action = PSERIES_DRCONF_MEM_ADD;
466 else
467 action = PSERIES_DRCONF_MEM_REMOVE;
468
469 blocking_notifier_call_chain(&pSeries_reconfig_chain,
470 action, value);
471 }
472
473 return 0;
446} 474}
447 475
448/** 476/**
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c
index 7d3e2b0bd4d2..c9ffd8c225f1 100644
--- a/arch/powerpc/platforms/pseries/rtasd.c
+++ b/arch/powerpc/platforms/pseries/rtasd.c
@@ -32,7 +32,7 @@
32 32
33static DEFINE_SPINLOCK(rtasd_log_lock); 33static DEFINE_SPINLOCK(rtasd_log_lock);
34 34
35DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); 35static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait);
36 36
37static char *rtas_log_buf; 37static char *rtas_log_buf;
38static unsigned long rtas_log_start; 38static unsigned long rtas_log_start;
@@ -329,7 +329,7 @@ static unsigned int rtas_log_poll(struct file *file, poll_table * wait)
329 return 0; 329 return 0;
330} 330}
331 331
332const struct file_operations proc_rtas_log_operations = { 332static const struct file_operations proc_rtas_log_operations = {
333 .read = rtas_log_read, 333 .read = rtas_log_read,
334 .poll = rtas_log_poll, 334 .poll = rtas_log_poll,
335 .open = rtas_log_open, 335 .open = rtas_log_open,
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index f5d29f5b13c1..90beb444e1dd 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -109,7 +109,7 @@ static void __init fwnmi_init(void)
109 fwnmi_active = 1; 109 fwnmi_active = 1;
110} 110}
111 111
112void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) 112static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
113{ 113{
114 unsigned int cascade_irq = i8259_irq(); 114 unsigned int cascade_irq = i8259_irq();
115 if (cascade_irq != NO_IRQ) 115 if (cascade_irq != NO_IRQ)
@@ -482,7 +482,7 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus)
482 * possible with power button press. If ibm,power-off-ups token is used 482 * possible with power button press. If ibm,power-off-ups token is used
483 * it will allow auto poweron after power is restored. 483 * it will allow auto poweron after power is restored.
484 */ 484 */
485void pSeries_power_off(void) 485static void pSeries_power_off(void)
486{ 486{
487 int rc; 487 int rc;
488 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); 488 int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups");
diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S
new file mode 100644
index 000000000000..21cda085d926
--- /dev/null
+++ b/arch/powerpc/sysdev/6xx-suspend.S
@@ -0,0 +1,52 @@
1/*
2 * Enter and leave sleep state on chips with 6xx-style HID0
3 * power management bits, which don't leave sleep state via reset.
4 *
5 * Author: Scott Wood <scottwood@freescale.com>
6 *
7 * Copyright (c) 2006-2007 Freescale Semiconductor, Inc.
8 *
9 * This program is free software; you can redistribute it and/or modify it
10 * under the terms of the GNU General Public License version 2 as published
11 * by the Free Software Foundation.
12 */
13
14#include <asm/ppc_asm.h>
15#include <asm/reg.h>
16#include <asm/thread_info.h>
17#include <asm/asm-offsets.h>
18
19_GLOBAL(mpc6xx_enter_standby)
20 mflr r4
21
22 mfspr r5, SPRN_HID0
23 rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP)
24 oris r5, r5, HID0_SLEEP@h
25 mtspr SPRN_HID0, r5
26 isync
27
28 lis r5, ret_from_standby@h
29 ori r5, r5, ret_from_standby@l
30 mtlr r5
31
32 rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT
33 lwz r6, TI_LOCAL_FLAGS(r5)
34 ori r6, r6, _TLF_SLEEPING
35 stw r6, TI_LOCAL_FLAGS(r5)
36
37 mfmsr r5
38 ori r5, r5, MSR_EE
39 oris r5, r5, MSR_POW@h
40 sync
41 mtmsr r5
42 isync
43
441: b 1b
45
46ret_from_standby:
47 mfspr r5, SPRN_HID0
48 rlwinm r5, r5, 0, ~HID0_SLEEP
49 mtspr SPRN_HID0, r5
50
51 mtlr r4
52 blr
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 6d386d0071a0..16a0ed28eb00 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -4,6 +4,7 @@ endif
4 4
5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o 5mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) 6obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y)
7fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o
7 8
8obj-$(CONFIG_PPC_MPC106) += grackle.o 9obj-$(CONFIG_PPC_MPC106) += grackle.o
9obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o 10obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o
@@ -11,8 +12,9 @@ obj-$(CONFIG_PPC_PMI) += pmi.o
11obj-$(CONFIG_U3_DART) += dart_iommu.o 12obj-$(CONFIG_U3_DART) += dart_iommu.o
12obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o 13obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o
13obj-$(CONFIG_FSL_SOC) += fsl_soc.o 14obj-$(CONFIG_FSL_SOC) += fsl_soc.o
14obj-$(CONFIG_FSL_PCI) += fsl_pci.o 15obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y)
15obj-$(CONFIG_FSL_LBC) += fsl_lbc.o 16obj-$(CONFIG_FSL_LBC) += fsl_lbc.o
17obj-$(CONFIG_FSL_GTM) += fsl_gtm.o
16obj-$(CONFIG_RAPIDIO) += fsl_rio.o 18obj-$(CONFIG_RAPIDIO) += fsl_rio.o
17obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o 19obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o
18obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ 20obj-$(CONFIG_QUICC_ENGINE) += qe_lib/
@@ -40,7 +42,12 @@ endif
40ifeq ($(ARCH),powerpc) 42ifeq ($(ARCH),powerpc)
41obj-$(CONFIG_CPM) += cpm_common.o 43obj-$(CONFIG_CPM) += cpm_common.o
42obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o 44obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o
45obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o
43obj-$(CONFIG_PPC_DCR) += dcr.o 46obj-$(CONFIG_PPC_DCR) += dcr.o
44obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o 47obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o
45obj-$(CONFIG_UCODE_PATCH) += micropatch.o 48obj-$(CONFIG_UCODE_PATCH) += micropatch.o
46endif 49endif
50
51ifeq ($(CONFIG_SUSPEND),y)
52obj-$(CONFIG_6xx) += 6xx-suspend.o
53endif
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 64ec7d629363..446c9ea85b30 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -443,7 +443,7 @@ mpc52xx_bcom_probe(struct of_device *op, const struct of_device_id *match)
443 443
444 /* Done ! */ 444 /* Done ! */
445 printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n", 445 printk(KERN_INFO "DMA: MPC52xx BestComm engine @%08lx ok !\n",
446 bcom_eng->regs_base); 446 (long)bcom_eng->regs_base);
447 447
448 return 0; 448 return 0;
449 449
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.c b/arch/powerpc/sysdev/bestcomm/gen_bd.c
index 8d33eafbb3f4..a3a134c35b0a 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.c
+++ b/arch/powerpc/sysdev/bestcomm/gen_bd.c
@@ -20,6 +20,7 @@
20#include <asm/io.h> 20#include <asm/io.h>
21 21
22#include <asm/mpc52xx.h> 22#include <asm/mpc52xx.h>
23#include <asm/mpc52xx_psc.h>
23 24
24#include "bestcomm.h" 25#include "bestcomm.h"
25#include "bestcomm_priv.h" 26#include "bestcomm_priv.h"
@@ -253,6 +254,100 @@ bcom_gen_bd_tx_release(struct bcom_task *tsk)
253} 254}
254EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release); 255EXPORT_SYMBOL_GPL(bcom_gen_bd_tx_release);
255 256
257/* ---------------------------------------------------------------------
258 * PSC support code
259 */
260
261/**
262 * bcom_psc_parameters - Bestcomm initialization value table for PSC devices
263 *
264 * This structure is only used internally. It is a lookup table for PSC
265 * specific parameters to bestcomm tasks.
266 */
267static struct bcom_psc_params {
268 int rx_initiator;
269 int rx_ipr;
270 int tx_initiator;
271 int tx_ipr;
272} bcom_psc_params[] = {
273 [0] = {
274 .rx_initiator = BCOM_INITIATOR_PSC1_RX,
275 .rx_ipr = BCOM_IPR_PSC1_RX,
276 .tx_initiator = BCOM_INITIATOR_PSC1_TX,
277 .tx_ipr = BCOM_IPR_PSC1_TX,
278 },
279 [1] = {
280 .rx_initiator = BCOM_INITIATOR_PSC2_RX,
281 .rx_ipr = BCOM_IPR_PSC2_RX,
282 .tx_initiator = BCOM_INITIATOR_PSC2_TX,
283 .tx_ipr = BCOM_IPR_PSC2_TX,
284 },
285 [2] = {
286 .rx_initiator = BCOM_INITIATOR_PSC3_RX,
287 .rx_ipr = BCOM_IPR_PSC3_RX,
288 .tx_initiator = BCOM_INITIATOR_PSC3_TX,
289 .tx_ipr = BCOM_IPR_PSC3_TX,
290 },
291 [3] = {
292 .rx_initiator = BCOM_INITIATOR_PSC4_RX,
293 .rx_ipr = BCOM_IPR_PSC4_RX,
294 .tx_initiator = BCOM_INITIATOR_PSC4_TX,
295 .tx_ipr = BCOM_IPR_PSC4_TX,
296 },
297 [4] = {
298 .rx_initiator = BCOM_INITIATOR_PSC5_RX,
299 .rx_ipr = BCOM_IPR_PSC5_RX,
300 .tx_initiator = BCOM_INITIATOR_PSC5_TX,
301 .tx_ipr = BCOM_IPR_PSC5_TX,
302 },
303 [5] = {
304 .rx_initiator = BCOM_INITIATOR_PSC6_RX,
305 .rx_ipr = BCOM_IPR_PSC6_RX,
306 .tx_initiator = BCOM_INITIATOR_PSC6_TX,
307 .tx_ipr = BCOM_IPR_PSC6_TX,
308 },
309};
310
311/**
312 * bcom_psc_gen_bd_rx_init - Allocate a receive bcom_task for a PSC port
313 * @psc_num: Number of the PSC to allocate a task for
314 * @queue_len: number of buffer descriptors to allocate for the task
315 * @fifo: physical address of FIFO register
316 * @maxbufsize: Maximum receive data size in bytes.
317 *
318 * Allocate a bestcomm task structure for receiving data from a PSC.
319 */
320struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
321 phys_addr_t fifo, int maxbufsize)
322{
323 if (psc_num >= MPC52xx_PSC_MAXNUM)
324 return NULL;
325
326 return bcom_gen_bd_rx_init(queue_len, fifo,
327 bcom_psc_params[psc_num].rx_initiator,
328 bcom_psc_params[psc_num].rx_ipr,
329 maxbufsize);
330}
331EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_rx_init);
332
333/**
334 * bcom_psc_gen_bd_tx_init - Allocate a transmit bcom_task for a PSC port
335 * @psc_num: Number of the PSC to allocate a task for
336 * @queue_len: number of buffer descriptors to allocate for the task
337 * @fifo: physical address of FIFO register
338 *
339 * Allocate a bestcomm task structure for transmitting data to a PSC.
340 */
341struct bcom_task *
342bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len, phys_addr_t fifo)
343{
344 struct psc;
345 return bcom_gen_bd_tx_init(queue_len, fifo,
346 bcom_psc_params[psc_num].tx_initiator,
347 bcom_psc_params[psc_num].tx_ipr);
348}
349EXPORT_SYMBOL_GPL(bcom_psc_gen_bd_tx_init);
350
256 351
257MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver"); 352MODULE_DESCRIPTION("BestComm General Buffer Descriptor tasks driver");
258MODULE_AUTHOR("Jeff Gibbons <jeff.gibbons@appspec.com>"); 353MODULE_AUTHOR("Jeff Gibbons <jeff.gibbons@appspec.com>");
diff --git a/arch/powerpc/sysdev/bestcomm/gen_bd.h b/arch/powerpc/sysdev/bestcomm/gen_bd.h
index 5b6fa803c6aa..de47260e69da 100644
--- a/arch/powerpc/sysdev/bestcomm/gen_bd.h
+++ b/arch/powerpc/sysdev/bestcomm/gen_bd.h
@@ -44,5 +44,10 @@ extern void
44bcom_gen_bd_tx_release(struct bcom_task *tsk); 44bcom_gen_bd_tx_release(struct bcom_task *tsk);
45 45
46 46
47/* PSC support utility wrappers */
48struct bcom_task * bcom_psc_gen_bd_rx_init(unsigned psc_num, int queue_len,
49 phys_addr_t fifo, int maxbufsize);
50struct bcom_task * bcom_psc_gen_bd_tx_init(unsigned psc_num, int queue_len,
51 phys_addr_t fifo);
47#endif /* __BESTCOMM_GEN_BD_H__ */ 52#endif /* __BESTCOMM_GEN_BD_H__ */
48 53
diff --git a/arch/powerpc/sysdev/bestcomm/sram.c b/arch/powerpc/sysdev/bestcomm/sram.c
index 99784383a843..5d74ef7a651f 100644
--- a/arch/powerpc/sysdev/bestcomm/sram.c
+++ b/arch/powerpc/sysdev/bestcomm/sram.c
@@ -86,7 +86,7 @@ int bcom_sram_init(struct device_node *sram_node, char *owner)
86 if (!bcom_sram->base_virt) { 86 if (!bcom_sram->base_virt) {
87 printk(KERN_ERR "%s: bcom_sram_init: " 87 printk(KERN_ERR "%s: bcom_sram_init: "
88 "Map error SRAM zone 0x%08lx (0x%0x)!\n", 88 "Map error SRAM zone 0x%08lx (0x%0x)!\n",
89 owner, bcom_sram->base_phys, bcom_sram->size ); 89 owner, (long)bcom_sram->base_phys, bcom_sram->size );
90 rv = -ENOMEM; 90 rv = -ENOMEM;
91 goto error_release; 91 goto error_release;
92 } 92 }
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 58292a086c16..661df42830b9 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -159,7 +159,7 @@ unsigned int cpm_pic_init(void)
159 159
160 out_be32(&cpic_reg->cpic_cimr, 0); 160 out_be32(&cpic_reg->cpic_cimr, 0);
161 161
162 cpm_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR, 162 cpm_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR,
163 64, &cpm_pic_host_ops, 64); 163 64, &cpm_pic_host_ops, 64);
164 if (cpm_pic_host == NULL) { 164 if (cpm_pic_host == NULL) {
165 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); 165 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index 5fe65b2f8f3a..b16ca3ed65d2 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -266,7 +266,7 @@ void cpm2_pic_init(struct device_node *node)
266 out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); 266 out_be32(&cpm2_intctl->ic_scprrl, 0x05309770);
267 267
268 /* create a legacy host */ 268 /* create a legacy host */
269 cpm2_pic_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, 269 cpm2_pic_host = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
270 64, &cpm2_pic_host_ops, 64); 270 64, &cpm2_pic_host_ops, 64);
271 if (cpm2_pic_host == NULL) { 271 if (cpm2_pic_host == NULL) {
272 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); 272 printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n");
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c
index cb7df2dce44f..e4b7296acb2c 100644
--- a/arch/powerpc/sysdev/cpm_common.c
+++ b/arch/powerpc/sysdev/cpm_common.c
@@ -37,7 +37,7 @@ static void udbg_putc_cpm(char c)
37 u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]); 37 u8 __iomem *txbuf = (u8 __iomem __force *)in_be32(&cpm_udbg_txdesc[1]);
38 38
39 if (c == '\n') 39 if (c == '\n')
40 udbg_putc('\r'); 40 udbg_putc_cpm('\r');
41 41
42 while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000) 42 while (in_be32(&cpm_udbg_txdesc[0]) & 0x80000000)
43 ; 43 ;
@@ -53,7 +53,6 @@ void __init udbg_init_cpm(void)
53 setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO); 53 setbat(1, 0xf0000000, 0xf0000000, 1024*1024, _PAGE_IO);
54#endif 54#endif
55 udbg_putc = udbg_putc_cpm; 55 udbg_putc = udbg_putc_cpm;
56 udbg_putc('X');
57 } 56 }
58} 57}
59#endif 58#endif
@@ -85,9 +84,13 @@ int __init cpm_muram_init(void)
85 84
86 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); 85 np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data");
87 if (!np) { 86 if (!np) {
88 printk(KERN_ERR "Cannot find CPM muram data node"); 87 /* try legacy bindings */
89 ret = -ENODEV; 88 np = of_find_node_by_name(NULL, "data-only");
90 goto out; 89 if (!np) {
90 printk(KERN_ERR "Cannot find CPM muram data node");
91 ret = -ENODEV;
92 goto out;
93 }
91 } 94 }
92 95
93 muram_pbase = of_translate_address(np, zero); 96 muram_pbase = of_translate_address(np, zero);
@@ -189,6 +192,12 @@ void __iomem *cpm_muram_addr(unsigned long offset)
189} 192}
190EXPORT_SYMBOL(cpm_muram_addr); 193EXPORT_SYMBOL(cpm_muram_addr);
191 194
195unsigned long cpm_muram_offset(void __iomem *addr)
196{
197 return addr - (void __iomem *)muram_vbase;
198}
199EXPORT_SYMBOL(cpm_muram_offset);
200
192/** 201/**
193 * cpm_muram_dma - turn a muram virtual address into a DMA address 202 * cpm_muram_dma - turn a muram virtual address into a DMA address
194 * @offset: virtual address from cpm_muram_addr() to convert 203 * @offset: virtual address from cpm_muram_addr() to convert
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c
index 437e48d3ae33..a8ba9983dd5a 100644
--- a/arch/powerpc/sysdev/dcr.c
+++ b/arch/powerpc/sysdev/dcr.c
@@ -23,6 +23,107 @@
23#include <asm/prom.h> 23#include <asm/prom.h>
24#include <asm/dcr.h> 24#include <asm/dcr.h>
25 25
26#ifdef CONFIG_PPC_DCR_MMIO
27static struct device_node *find_dcr_parent(struct device_node *node)
28{
29 struct device_node *par, *tmp;
30 const u32 *p;
31
32 for (par = of_node_get(node); par;) {
33 if (of_get_property(par, "dcr-controller", NULL))
34 break;
35 p = of_get_property(par, "dcr-parent", NULL);
36 tmp = par;
37 if (p == NULL)
38 par = of_get_parent(par);
39 else
40 par = of_find_node_by_phandle(*p);
41 of_node_put(tmp);
42 }
43 return par;
44}
45#endif
46
47#if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO)
48
49bool dcr_map_ok_generic(dcr_host_t host)
50{
51 if (host.type == DCR_HOST_NATIVE)
52 return dcr_map_ok_native(host.host.native);
53 else if (host.type == DCR_HOST_MMIO)
54 return dcr_map_ok_mmio(host.host.mmio);
55 else
56 return 0;
57}
58EXPORT_SYMBOL_GPL(dcr_map_ok_generic);
59
60dcr_host_t dcr_map_generic(struct device_node *dev,
61 unsigned int dcr_n,
62 unsigned int dcr_c)
63{
64 dcr_host_t host;
65 struct device_node *dp;
66 const char *prop;
67
68 host.type = DCR_HOST_INVALID;
69
70 dp = find_dcr_parent(dev);
71 if (dp == NULL)
72 return host;
73
74 prop = of_get_property(dp, "dcr-access-method", NULL);
75
76 pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop);
77
78 if (!strcmp(prop, "native")) {
79 host.type = DCR_HOST_NATIVE;
80 host.host.native = dcr_map_native(dev, dcr_n, dcr_c);
81 } else if (!strcmp(prop, "mmio")) {
82 host.type = DCR_HOST_MMIO;
83 host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c);
84 }
85
86 of_node_put(dp);
87 return host;
88}
89EXPORT_SYMBOL_GPL(dcr_map_generic);
90
91void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c)
92{
93 if (host.type == DCR_HOST_NATIVE)
94 dcr_unmap_native(host.host.native, dcr_c);
95 else if (host.type == DCR_HOST_MMIO)
96 dcr_unmap_mmio(host.host.mmio, dcr_c);
97 else /* host.type == DCR_HOST_INVALID */
98 WARN_ON(true);
99}
100EXPORT_SYMBOL_GPL(dcr_unmap_generic);
101
102u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n)
103{
104 if (host.type == DCR_HOST_NATIVE)
105 return dcr_read_native(host.host.native, dcr_n);
106 else if (host.type == DCR_HOST_MMIO)
107 return dcr_read_mmio(host.host.mmio, dcr_n);
108 else /* host.type == DCR_HOST_INVALID */
109 WARN_ON(true);
110 return 0;
111}
112EXPORT_SYMBOL_GPL(dcr_read_generic);
113
114void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value)
115{
116 if (host.type == DCR_HOST_NATIVE)
117 dcr_write_native(host.host.native, dcr_n, value);
118 else if (host.type == DCR_HOST_MMIO)
119 dcr_write_mmio(host.host.mmio, dcr_n, value);
120 else /* host.type == DCR_HOST_INVALID */
121 WARN_ON(true);
122}
123EXPORT_SYMBOL_GPL(dcr_write_generic);
124
125#endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */
126
26unsigned int dcr_resource_start(struct device_node *np, unsigned int index) 127unsigned int dcr_resource_start(struct device_node *np, unsigned int index)
27{ 128{
28 unsigned int ds; 129 unsigned int ds;
@@ -47,26 +148,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index)
47} 148}
48EXPORT_SYMBOL_GPL(dcr_resource_len); 149EXPORT_SYMBOL_GPL(dcr_resource_len);
49 150
50#ifndef CONFIG_PPC_DCR_NATIVE 151#ifdef CONFIG_PPC_DCR_MMIO
51
52static struct device_node * find_dcr_parent(struct device_node * node)
53{
54 struct device_node *par, *tmp;
55 const u32 *p;
56
57 for (par = of_node_get(node); par;) {
58 if (of_get_property(par, "dcr-controller", NULL))
59 break;
60 p = of_get_property(par, "dcr-parent", NULL);
61 tmp = par;
62 if (p == NULL)
63 par = of_get_parent(par);
64 else
65 par = of_find_node_by_phandle(*p);
66 of_node_put(tmp);
67 }
68 return par;
69}
70 152
71u64 of_translate_dcr_address(struct device_node *dev, 153u64 of_translate_dcr_address(struct device_node *dev,
72 unsigned int dcr_n, 154 unsigned int dcr_n,
@@ -75,7 +157,7 @@ u64 of_translate_dcr_address(struct device_node *dev,
75 struct device_node *dp; 157 struct device_node *dp;
76 const u32 *p; 158 const u32 *p;
77 unsigned int stride; 159 unsigned int stride;
78 u64 ret; 160 u64 ret = OF_BAD_ADDR;
79 161
80 dp = find_dcr_parent(dev); 162 dp = find_dcr_parent(dev);
81 if (dp == NULL) 163 if (dp == NULL)
@@ -90,7 +172,7 @@ u64 of_translate_dcr_address(struct device_node *dev,
90 if (p == NULL) 172 if (p == NULL)
91 p = of_get_property(dp, "dcr-mmio-space", NULL); 173 p = of_get_property(dp, "dcr-mmio-space", NULL);
92 if (p == NULL) 174 if (p == NULL)
93 return OF_BAD_ADDR; 175 goto done;
94 176
95 /* Maybe could do some better range checking here */ 177 /* Maybe could do some better range checking here */
96 ret = of_translate_address(dp, p); 178 ret = of_translate_address(dp, p);
@@ -98,21 +180,25 @@ u64 of_translate_dcr_address(struct device_node *dev,
98 ret += (u64)(stride) * (u64)dcr_n; 180 ret += (u64)(stride) * (u64)dcr_n;
99 if (out_stride) 181 if (out_stride)
100 *out_stride = stride; 182 *out_stride = stride;
183
184 done:
185 of_node_put(dp);
101 return ret; 186 return ret;
102} 187}
103 188
104dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, 189dcr_host_mmio_t dcr_map_mmio(struct device_node *dev,
105 unsigned int dcr_c) 190 unsigned int dcr_n,
191 unsigned int dcr_c)
106{ 192{
107 dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; 193 dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n };
108 u64 addr; 194 u64 addr;
109 195
110 pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", 196 pr_debug("dcr_map(%s, 0x%x, 0x%x)\n",
111 dev->full_name, dcr_n, dcr_c); 197 dev->full_name, dcr_n, dcr_c);
112 198
113 addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); 199 addr = of_translate_dcr_address(dev, dcr_n, &ret.stride);
114 pr_debug("translates to addr: 0x%lx, stride: 0x%x\n", 200 pr_debug("translates to addr: 0x%llx, stride: 0x%x\n",
115 addr, ret.stride); 201 (unsigned long long) addr, ret.stride);
116 if (addr == OF_BAD_ADDR) 202 if (addr == OF_BAD_ADDR)
117 return ret; 203 return ret;
118 pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); 204 pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride);
@@ -124,11 +210,11 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n,
124 ret.token -= dcr_n * ret.stride; 210 ret.token -= dcr_n * ret.stride;
125 return ret; 211 return ret;
126} 212}
127EXPORT_SYMBOL_GPL(dcr_map); 213EXPORT_SYMBOL_GPL(dcr_map_mmio);
128 214
129void dcr_unmap(dcr_host_t host, unsigned int dcr_c) 215void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c)
130{ 216{
131 dcr_host_t h = host; 217 dcr_host_mmio_t h = host;
132 218
133 if (h.token == NULL) 219 if (h.token == NULL)
134 return; 220 return;
@@ -136,7 +222,11 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c)
136 iounmap(h.token); 222 iounmap(h.token);
137 h.token = NULL; 223 h.token = NULL;
138} 224}
139EXPORT_SYMBOL_GPL(dcr_unmap); 225EXPORT_SYMBOL_GPL(dcr_unmap_mmio);
140#else /* defined(CONFIG_PPC_DCR_NATIVE) */ 226
227#endif /* defined(CONFIG_PPC_DCR_MMIO) */
228
229#ifdef CONFIG_PPC_DCR_NATIVE
141DEFINE_SPINLOCK(dcr_ind_lock); 230DEFINE_SPINLOCK(dcr_ind_lock);
142#endif /* !defined(CONFIG_PPC_DCR_NATIVE) */ 231#endif /* defined(CONFIG_PPC_DCR_NATIVE) */
232
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c
new file mode 100644
index 000000000000..714ec02fed2e
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_gtm.c
@@ -0,0 +1,434 @@
1/*
2 * Freescale General-purpose Timers Module
3 *
4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
5 * Shlomi Gridish <gridish@freescale.com>
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 * Copyright (c) MontaVista Software, Inc. 2008.
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/list.h>
19#include <linux/io.h>
20#include <linux/of.h>
21#include <linux/spinlock.h>
22#include <linux/bitops.h>
23#include <asm/fsl_gtm.h>
24
25#define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1)
26#define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0)
27
28#define GTMDR_ICLK_MASK (3 << 1)
29#define GTMDR_ICLK_ICAS (0 << 1)
30#define GTMDR_ICLK_ICLK (1 << 1)
31#define GTMDR_ICLK_SLGO (2 << 1)
32#define GTMDR_FRR (1 << 3)
33#define GTMDR_ORI (1 << 4)
34#define GTMDR_SPS(x) ((x) << 8)
35
36struct gtm_timers_regs {
37 u8 gtcfr1; /* Timer 1, Timer 2 global config register */
38 u8 res0[0x3];
39 u8 gtcfr2; /* Timer 3, timer 4 global config register */
40 u8 res1[0xB];
41 __be16 gtmdr1; /* Timer 1 mode register */
42 __be16 gtmdr2; /* Timer 2 mode register */
43 __be16 gtrfr1; /* Timer 1 reference register */
44 __be16 gtrfr2; /* Timer 2 reference register */
45 __be16 gtcpr1; /* Timer 1 capture register */
46 __be16 gtcpr2; /* Timer 2 capture register */
47 __be16 gtcnr1; /* Timer 1 counter */
48 __be16 gtcnr2; /* Timer 2 counter */
49 __be16 gtmdr3; /* Timer 3 mode register */
50 __be16 gtmdr4; /* Timer 4 mode register */
51 __be16 gtrfr3; /* Timer 3 reference register */
52 __be16 gtrfr4; /* Timer 4 reference register */
53 __be16 gtcpr3; /* Timer 3 capture register */
54 __be16 gtcpr4; /* Timer 4 capture register */
55 __be16 gtcnr3; /* Timer 3 counter */
56 __be16 gtcnr4; /* Timer 4 counter */
57 __be16 gtevr1; /* Timer 1 event register */
58 __be16 gtevr2; /* Timer 2 event register */
59 __be16 gtevr3; /* Timer 3 event register */
60 __be16 gtevr4; /* Timer 4 event register */
61 __be16 gtpsr1; /* Timer 1 prescale register */
62 __be16 gtpsr2; /* Timer 2 prescale register */
63 __be16 gtpsr3; /* Timer 3 prescale register */
64 __be16 gtpsr4; /* Timer 4 prescale register */
65 u8 res2[0x40];
66} __attribute__ ((packed));
67
68struct gtm {
69 unsigned int clock;
70 struct gtm_timers_regs __iomem *regs;
71 struct gtm_timer timers[4];
72 spinlock_t lock;
73 struct list_head list_node;
74};
75
76static LIST_HEAD(gtms);
77
78/**
79 * gtm_get_timer - request GTM timer to use it with the rest of GTM API
80 * Context: non-IRQ
81 *
82 * This function reserves GTM timer for later use. It returns gtm_timer
83 * structure to use with the rest of GTM API, you should use timer->irq
84 * to manage timer interrupt.
85 */
86struct gtm_timer *gtm_get_timer16(void)
87{
88 struct gtm *gtm = NULL;
89 int i;
90
91 list_for_each_entry(gtm, &gtms, list_node) {
92 spin_lock_irq(&gtm->lock);
93
94 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
95 if (!gtm->timers[i].requested) {
96 gtm->timers[i].requested = true;
97 spin_unlock_irq(&gtm->lock);
98 return &gtm->timers[i];
99 }
100 }
101
102 spin_unlock_irq(&gtm->lock);
103 }
104
105 if (gtm)
106 return ERR_PTR(-EBUSY);
107 return ERR_PTR(-ENODEV);
108}
109EXPORT_SYMBOL(gtm_get_timer16);
110
111/**
112 * gtm_get_specific_timer - request specific GTM timer
113 * @gtm: specific GTM, pass here GTM's device_node->data
114 * @timer: specific timer number, Timer1 is 0.
115 * Context: non-IRQ
116 *
117 * This function reserves GTM timer for later use. It returns gtm_timer
118 * structure to use with the rest of GTM API, you should use timer->irq
119 * to manage timer interrupt.
120 */
121struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm,
122 unsigned int timer)
123{
124 struct gtm_timer *ret = ERR_PTR(-EBUSY);
125
126 if (timer > 3)
127 return ERR_PTR(-EINVAL);
128
129 spin_lock_irq(&gtm->lock);
130
131 if (gtm->timers[timer].requested)
132 goto out;
133
134 ret = &gtm->timers[timer];
135 ret->requested = true;
136
137out:
138 spin_unlock_irq(&gtm->lock);
139 return ret;
140}
141EXPORT_SYMBOL(gtm_get_specific_timer16);
142
143/**
144 * gtm_put_timer16 - release 16 bits GTM timer
145 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
146 * Context: any
147 *
148 * This function releases GTM timer so others may request it.
149 */
150void gtm_put_timer16(struct gtm_timer *tmr)
151{
152 gtm_stop_timer16(tmr);
153
154 spin_lock_irq(&tmr->gtm->lock);
155 tmr->requested = false;
156 spin_unlock_irq(&tmr->gtm->lock);
157}
158EXPORT_SYMBOL(gtm_put_timer16);
159
160/*
161 * This is back-end for the exported functions, it's used to reset single
162 * timer in reference mode.
163 */
164static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency,
165 int reference_value, bool free_run)
166{
167 struct gtm *gtm = tmr->gtm;
168 int num = tmr - &gtm->timers[0];
169 unsigned int prescaler;
170 u8 iclk = GTMDR_ICLK_ICLK;
171 u8 psr;
172 u8 sps;
173 unsigned long flags;
174 int max_prescaler = 256 * 256 * 16;
175
176 /* CPM2 doesn't have primary prescaler */
177 if (!tmr->gtpsr)
178 max_prescaler /= 256;
179
180 prescaler = gtm->clock / frequency;
181 /*
182 * We have two 8 bit prescalers -- primary and secondary (psr, sps),
183 * plus "slow go" mode (clk / 16). So, total prescale value is
184 * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr.
185 */
186 if (prescaler > max_prescaler)
187 return -EINVAL;
188
189 if (prescaler > max_prescaler / 16) {
190 iclk = GTMDR_ICLK_SLGO;
191 prescaler /= 16;
192 }
193
194 if (prescaler <= 256) {
195 psr = 0;
196 sps = prescaler - 1;
197 } else {
198 psr = 256 - 1;
199 sps = prescaler / 256 - 1;
200 }
201
202 spin_lock_irqsave(&gtm->lock, flags);
203
204 /*
205 * Properly reset timers: stop, reset, set up prescalers, reference
206 * value and clear event register.
207 */
208 clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)),
209 GTCFR_STP(num) | GTCFR_RST(num));
210
211 setbits8(tmr->gtcfr, GTCFR_STP(num));
212
213 if (tmr->gtpsr)
214 out_be16(tmr->gtpsr, psr);
215 clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) |
216 GTMDR_ORI | (free_run ? GTMDR_FRR : 0));
217 out_be16(tmr->gtcnr, 0);
218 out_be16(tmr->gtrfr, reference_value);
219 out_be16(tmr->gtevr, 0xFFFF);
220
221 /* Let it be. */
222 clrbits8(tmr->gtcfr, GTCFR_STP(num));
223
224 spin_unlock_irqrestore(&gtm->lock, flags);
225
226 return 0;
227}
228
229/**
230 * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision
231 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
232 * @usec: timer interval in microseconds
233 * @reload: if set, the timer will reset upon expiry rather than
234 * continue running free.
235 * Context: any
236 *
237 * This function (re)sets the GTM timer so that it counts up to the requested
238 * interval value, and fires the interrupt when the value is reached. This
239 * function will reduce the precision of the timer as needed in order for the
240 * requested timeout to fit in a 16-bit register.
241 */
242int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload)
243{
244 /* quite obvious, frequency which is enough for µSec precision */
245 int freq = 1000000;
246 unsigned int bit;
247
248 bit = fls_long(usec);
249 if (bit > 15) {
250 freq >>= bit - 15;
251 usec >>= bit - 15;
252 }
253
254 if (!freq)
255 return -EINVAL;
256
257 return gtm_set_ref_timer16(tmr, freq, usec, reload);
258}
259EXPORT_SYMBOL(gtm_set_timer16);
260
261/**
262 * gtm_set_exact_utimer16 - (re)set 16 bits timer
263 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
264 * @usec: timer interval in microseconds
265 * @reload: if set, the timer will reset upon expiry rather than
266 * continue running free.
267 * Context: any
268 *
269 * This function (re)sets GTM timer so that it counts up to the requested
270 * interval value, and fires the interrupt when the value is reached. If reload
271 * flag was set, timer will also reset itself upon reference value, otherwise
272 * it continues to increment.
273 *
274 * The _exact_ bit in the function name states that this function will not
275 * crop precision of the "usec" argument, thus usec is limited to 16 bits
276 * (single timer width).
277 */
278int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload)
279{
280 /* quite obvious, frequency which is enough for µSec precision */
281 const int freq = 1000000;
282
283 /*
284 * We can lower the frequency (and probably power consumption) by
285 * dividing both frequency and usec by 2 until there is no remainder.
286 * But we won't bother with this unless savings are measured, so just
287 * run the timer as is.
288 */
289
290 return gtm_set_ref_timer16(tmr, freq, usec, reload);
291}
292EXPORT_SYMBOL(gtm_set_exact_timer16);
293
294/**
295 * gtm_stop_timer16 - stop single timer
296 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
297 * Context: any
298 *
299 * This function simply stops the GTM timer.
300 */
301void gtm_stop_timer16(struct gtm_timer *tmr)
302{
303 struct gtm *gtm = tmr->gtm;
304 int num = tmr - &gtm->timers[0];
305 unsigned long flags;
306
307 spin_lock_irqsave(&gtm->lock, flags);
308
309 setbits8(tmr->gtcfr, GTCFR_STP(num));
310 out_be16(tmr->gtevr, 0xFFFF);
311
312 spin_unlock_irqrestore(&gtm->lock, flags);
313}
314EXPORT_SYMBOL(gtm_stop_timer16);
315
316/**
317 * gtm_ack_timer16 - acknowledge timer event (free-run timers only)
318 * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer
319 * @events: events mask to ack
320 * Context: any
321 *
322 * Thus function used to acknowledge timer interrupt event, use it inside the
323 * interrupt handler.
324 */
325void gtm_ack_timer16(struct gtm_timer *tmr, u16 events)
326{
327 out_be16(tmr->gtevr, events);
328}
329EXPORT_SYMBOL(gtm_ack_timer16);
330
331static void __init gtm_set_shortcuts(struct device_node *np,
332 struct gtm_timer *timers,
333 struct gtm_timers_regs __iomem *regs)
334{
335 /*
336 * Yeah, I don't like this either, but timers' registers a bit messed,
337 * so we have to provide shortcuts to write timer independent code.
338 * Alternative option is to create gt*() accessors, but that will be
339 * even uglier and cryptic.
340 */
341 timers[0].gtcfr = &regs->gtcfr1;
342 timers[0].gtmdr = &regs->gtmdr1;
343 timers[0].gtcnr = &regs->gtcnr1;
344 timers[0].gtrfr = &regs->gtrfr1;
345 timers[0].gtevr = &regs->gtevr1;
346
347 timers[1].gtcfr = &regs->gtcfr1;
348 timers[1].gtmdr = &regs->gtmdr2;
349 timers[1].gtcnr = &regs->gtcnr2;
350 timers[1].gtrfr = &regs->gtrfr2;
351 timers[1].gtevr = &regs->gtevr2;
352
353 timers[2].gtcfr = &regs->gtcfr2;
354 timers[2].gtmdr = &regs->gtmdr3;
355 timers[2].gtcnr = &regs->gtcnr3;
356 timers[2].gtrfr = &regs->gtrfr3;
357 timers[2].gtevr = &regs->gtevr3;
358
359 timers[3].gtcfr = &regs->gtcfr2;
360 timers[3].gtmdr = &regs->gtmdr4;
361 timers[3].gtcnr = &regs->gtcnr4;
362 timers[3].gtrfr = &regs->gtrfr4;
363 timers[3].gtevr = &regs->gtevr4;
364
365 /* CPM2 doesn't have primary prescaler */
366 if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) {
367 timers[0].gtpsr = &regs->gtpsr1;
368 timers[1].gtpsr = &regs->gtpsr2;
369 timers[2].gtpsr = &regs->gtpsr3;
370 timers[3].gtpsr = &regs->gtpsr4;
371 }
372}
373
374static int __init fsl_gtm_init(void)
375{
376 struct device_node *np;
377
378 for_each_compatible_node(np, NULL, "fsl,gtm") {
379 int i;
380 struct gtm *gtm;
381 const u32 *clock;
382 int size;
383
384 gtm = kzalloc(sizeof(*gtm), GFP_KERNEL);
385 if (!gtm) {
386 pr_err("%s: unable to allocate memory\n",
387 np->full_name);
388 continue;
389 }
390
391 spin_lock_init(&gtm->lock);
392
393 clock = of_get_property(np, "clock-frequency", &size);
394 if (!clock || size != sizeof(*clock)) {
395 pr_err("%s: no clock-frequency\n", np->full_name);
396 goto err;
397 }
398 gtm->clock = *clock;
399
400 for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) {
401 int ret;
402 struct resource irq;
403
404 ret = of_irq_to_resource(np, i, &irq);
405 if (ret == NO_IRQ) {
406 pr_err("%s: not enough interrupts specified\n",
407 np->full_name);
408 goto err;
409 }
410 gtm->timers[i].irq = irq.start;
411 gtm->timers[i].gtm = gtm;
412 }
413
414 gtm->regs = of_iomap(np, 0);
415 if (!gtm->regs) {
416 pr_err("%s: unable to iomap registers\n",
417 np->full_name);
418 goto err;
419 }
420
421 gtm_set_shortcuts(np, gtm->timers, gtm->regs);
422 list_add(&gtm->list_node, &gtms);
423
424 /* We don't want to lose the node and its ->data */
425 np->data = gtm;
426 of_node_get(np);
427
428 continue;
429err:
430 kfree(gtm);
431 }
432 return 0;
433}
434arch_initcall(fsl_gtm_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
new file mode 100644
index 000000000000..2c5187cc8a24
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -0,0 +1,429 @@
1/*
2 * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Tony Li <tony.li@freescale.com>
5 * Jason Jin <Jason.jin@freescale.com>
6 *
7 * The hwirq alloc and free code reuse from sysdev/mpic_msi.c
8 *
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License
11 * as published by the Free Software Foundation; version 2 of the
12 * License.
13 *
14 */
15#include <linux/irq.h>
16#include <linux/bootmem.h>
17#include <linux/bitmap.h>
18#include <linux/msi.h>
19#include <linux/pci.h>
20#include <linux/of_platform.h>
21#include <sysdev/fsl_soc.h>
22#include <asm/prom.h>
23#include <asm/hw_irq.h>
24#include <asm/ppc-pci.h>
25#include "fsl_msi.h"
26
27struct fsl_msi_feature {
28 u32 fsl_pic_ip;
29 u32 msiir_offset;
30};
31
32static struct fsl_msi *fsl_msi;
33
34static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
35{
36 return in_be32(base + (reg >> 2));
37}
38
39/*
40 * We do not need this actually. The MSIR register has been read once
41 * in the cascade interrupt. So, this MSI interrupt has been acked
42*/
43static void fsl_msi_end_irq(unsigned int virq)
44{
45}
46
47static struct irq_chip fsl_msi_chip = {
48 .mask = mask_msi_irq,
49 .unmask = unmask_msi_irq,
50 .ack = fsl_msi_end_irq,
51 .typename = " FSL-MSI ",
52};
53
54static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
55 irq_hw_number_t hw)
56{
57 struct irq_chip *chip = &fsl_msi_chip;
58
59 get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
60
61 set_irq_chip_and_handler(virq, chip, handle_edge_irq);
62
63 return 0;
64}
65
66static struct irq_host_ops fsl_msi_host_ops = {
67 .map = fsl_msi_host_map,
68};
69
70static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num)
71{
72 unsigned long flags;
73 int order = get_count_order(num);
74 int offset;
75
76 spin_lock_irqsave(&msi->bitmap_lock, flags);
77
78 offset = bitmap_find_free_region(msi->fsl_msi_bitmap,
79 NR_MSI_IRQS, order);
80
81 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
82
83 pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n",
84 __func__, num, order, offset);
85
86 return offset;
87}
88
89static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num)
90{
91 unsigned long flags;
92 int order = get_count_order(num);
93
94 pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n",
95 __func__, num, order, offset);
96
97 spin_lock_irqsave(&msi->bitmap_lock, flags);
98 bitmap_release_region(msi->fsl_msi_bitmap, offset, order);
99 spin_unlock_irqrestore(&msi->bitmap_lock, flags);
100}
101
102static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi)
103{
104 int i;
105 int len;
106 const u32 *p;
107
108 bitmap_allocate_region(msi->fsl_msi_bitmap, 0,
109 get_count_order(NR_MSI_IRQS));
110
111 p = of_get_property(msi->of_node, "msi-available-ranges", &len);
112
113 if (!p) {
114 /* No msi-available-ranges property,
115 * All the 256 MSI interrupts can be used
116 */
117 fsl_msi_free_hwirqs(msi, 0, 0x100);
118 return 0;
119 }
120
121 if ((len % (2 * sizeof(u32))) != 0) {
122 printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges "
123 "property on %s\n", msi->of_node->full_name);
124 return -EINVAL;
125 }
126
127 /* Format is: (<u32 start> <u32 count>)+ */
128 len /= 2 * sizeof(u32);
129 for (i = 0; i < len; i++, p += 2)
130 fsl_msi_free_hwirqs(msi, *p, *(p + 1));
131
132 return 0;
133}
134
135static int fsl_msi_init_allocator(struct fsl_msi *msi_data)
136{
137 int rc;
138 int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32);
139
140 msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL);
141
142 if (msi_data->fsl_msi_bitmap == NULL) {
143 pr_debug("%s: ENOMEM allocating allocator bitmap!\n",
144 __func__);
145 return -ENOMEM;
146 }
147
148 rc = fsl_msi_free_dt_hwirqs(msi_data);
149 if (rc)
150 goto out_free;
151
152 return 0;
153out_free:
154 kfree(msi_data->fsl_msi_bitmap);
155
156 msi_data->fsl_msi_bitmap = NULL;
157 return rc;
158
159}
160
161static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type)
162{
163 if (type == PCI_CAP_ID_MSIX)
164 pr_debug("fslmsi: MSI-X untested, trying anyway.\n");
165
166 return 0;
167}
168
169static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
170{
171 struct msi_desc *entry;
172 struct fsl_msi *msi_data = fsl_msi;
173
174 list_for_each_entry(entry, &pdev->msi_list, list) {
175 if (entry->irq == NO_IRQ)
176 continue;
177 set_irq_msi(entry->irq, NULL);
178 fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1);
179 irq_dispose_mapping(entry->irq);
180 }
181
182 return;
183}
184
185static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
186 struct msi_msg *msg)
187{
188 struct fsl_msi *msi_data = fsl_msi;
189
190 msg->address_lo = msi_data->msi_addr_lo;
191 msg->address_hi = msi_data->msi_addr_hi;
192 msg->data = hwirq;
193
194 pr_debug("%s: allocated srs: %d, ibs: %d\n",
195 __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG);
196}
197
198static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
199{
200 irq_hw_number_t hwirq;
201 int rc;
202 unsigned int virq;
203 struct msi_desc *entry;
204 struct msi_msg msg;
205 struct fsl_msi *msi_data = fsl_msi;
206
207 list_for_each_entry(entry, &pdev->msi_list, list) {
208 hwirq = fsl_msi_alloc_hwirqs(msi_data, 1);
209 if (hwirq < 0) {
210 rc = hwirq;
211 pr_debug("%s: fail allocating msi interrupt\n",
212 __func__);
213 goto out_free;
214 }
215
216 virq = irq_create_mapping(msi_data->irqhost, hwirq);
217
218 if (virq == NO_IRQ) {
219 pr_debug("%s: fail mapping hwirq 0x%lx\n",
220 __func__, hwirq);
221 fsl_msi_free_hwirqs(msi_data, hwirq, 1);
222 rc = -ENOSPC;
223 goto out_free;
224 }
225 set_irq_msi(virq, entry);
226
227 fsl_compose_msi_msg(pdev, hwirq, &msg);
228 write_msi_msg(virq, &msg);
229 }
230 return 0;
231
232out_free:
233 return rc;
234}
235
236static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
237{
238 unsigned int cascade_irq;
239 struct fsl_msi *msi_data = fsl_msi;
240 int msir_index = -1;
241 u32 msir_value = 0;
242 u32 intr_index;
243 u32 have_shift = 0;
244
245 spin_lock(&desc->lock);
246 if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
247 if (desc->chip->mask_ack)
248 desc->chip->mask_ack(irq);
249 else {
250 desc->chip->mask(irq);
251 desc->chip->ack(irq);
252 }
253 }
254
255 if (unlikely(desc->status & IRQ_INPROGRESS))
256 goto unlock;
257
258 msir_index = (int)desc->handler_data;
259
260 if (msir_index >= NR_MSI_REG)
261 cascade_irq = NO_IRQ;
262
263 desc->status |= IRQ_INPROGRESS;
264 switch (fsl_msi->feature & FSL_PIC_IP_MASK) {
265 case FSL_PIC_IP_MPIC:
266 msir_value = fsl_msi_read(msi_data->msi_regs,
267 msir_index * 0x10);
268 break;
269 case FSL_PIC_IP_IPIC:
270 msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4);
271 break;
272 }
273
274 while (msir_value) {
275 intr_index = ffs(msir_value) - 1;
276
277 cascade_irq = irq_linear_revmap(msi_data->irqhost,
278 msir_index * IRQS_PER_MSI_REG +
279 intr_index + have_shift);
280 if (cascade_irq != NO_IRQ)
281 generic_handle_irq(cascade_irq);
282 have_shift += intr_index + 1;
283 msir_value = msir_value >> (intr_index + 1);
284 }
285 desc->status &= ~IRQ_INPROGRESS;
286
287 switch (msi_data->feature & FSL_PIC_IP_MASK) {
288 case FSL_PIC_IP_MPIC:
289 desc->chip->eoi(irq);
290 break;
291 case FSL_PIC_IP_IPIC:
292 if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
293 desc->chip->unmask(irq);
294 break;
295 }
296unlock:
297 spin_unlock(&desc->lock);
298}
299
300static int __devinit fsl_of_msi_probe(struct of_device *dev,
301 const struct of_device_id *match)
302{
303 struct fsl_msi *msi;
304 struct resource res;
305 int err, i, count;
306 int rc;
307 int virt_msir;
308 const u32 *p;
309 struct fsl_msi_feature *features = match->data;
310
311 printk(KERN_DEBUG "Setting up Freescale MSI support\n");
312
313 msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL);
314 if (!msi) {
315 dev_err(&dev->dev, "No memory for MSI structure\n");
316 err = -ENOMEM;
317 goto error_out;
318 }
319
320 msi->of_node = of_node_get(dev->node);
321
322 msi->irqhost = irq_alloc_host(of_node_get(dev->node),
323 IRQ_HOST_MAP_LINEAR,
324 NR_MSI_IRQS, &fsl_msi_host_ops, 0);
325 if (msi->irqhost == NULL) {
326 dev_err(&dev->dev, "No memory for MSI irqhost\n");
327 of_node_put(dev->node);
328 err = -ENOMEM;
329 goto error_out;
330 }
331
332 /* Get the MSI reg base */
333 err = of_address_to_resource(dev->node, 0, &res);
334 if (err) {
335 dev_err(&dev->dev, "%s resource error!\n",
336 dev->node->full_name);
337 goto error_out;
338 }
339
340 msi->msi_regs = ioremap(res.start, res.end - res.start + 1);
341 if (!msi->msi_regs) {
342 dev_err(&dev->dev, "ioremap problem failed\n");
343 goto error_out;
344 }
345
346 msi->feature = features->fsl_pic_ip;
347
348 msi->irqhost->host_data = msi;
349
350 msi->msi_addr_hi = 0x0;
351 msi->msi_addr_lo = res.start + features->msiir_offset;
352
353 rc = fsl_msi_init_allocator(msi);
354 if (rc) {
355 dev_err(&dev->dev, "Error allocating MSI bitmap\n");
356 goto error_out;
357 }
358
359 p = of_get_property(dev->node, "interrupts", &count);
360 if (!p) {
361 dev_err(&dev->dev, "no interrupts property found on %s\n",
362 dev->node->full_name);
363 err = -ENODEV;
364 goto error_out;
365 }
366 if (count % 8 != 0) {
367 dev_err(&dev->dev, "Malformed interrupts property on %s\n",
368 dev->node->full_name);
369 err = -EINVAL;
370 goto error_out;
371 }
372
373 count /= sizeof(u32);
374 for (i = 0; i < count / 2; i++) {
375 if (i > NR_MSI_REG)
376 break;
377 virt_msir = irq_of_parse_and_map(dev->node, i);
378 if (virt_msir != NO_IRQ) {
379 set_irq_data(virt_msir, (void *)i);
380 set_irq_chained_handler(virt_msir, fsl_msi_cascade);
381 }
382 }
383
384 fsl_msi = msi;
385
386 WARN_ON(ppc_md.setup_msi_irqs);
387 ppc_md.setup_msi_irqs = fsl_setup_msi_irqs;
388 ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs;
389 ppc_md.msi_check_device = fsl_msi_check_device;
390 return 0;
391error_out:
392 kfree(msi);
393 return err;
394}
395
396static const struct fsl_msi_feature mpic_msi_feature = {
397 .fsl_pic_ip = FSL_PIC_IP_MPIC,
398 .msiir_offset = 0x140,
399};
400
401static const struct fsl_msi_feature ipic_msi_feature = {
402 .fsl_pic_ip = FSL_PIC_IP_IPIC,
403 .msiir_offset = 0x38,
404};
405
406static const struct of_device_id fsl_of_msi_ids[] = {
407 {
408 .compatible = "fsl,mpic-msi",
409 .data = (void *)&mpic_msi_feature,
410 },
411 {
412 .compatible = "fsl,ipic-msi",
413 .data = (void *)&ipic_msi_feature,
414 },
415 {}
416};
417
418static struct of_platform_driver fsl_of_msi_driver = {
419 .name = "fsl-msi",
420 .match_table = fsl_of_msi_ids,
421 .probe = fsl_of_msi_probe,
422};
423
424static __init int fsl_of_msi_init(void)
425{
426 return of_register_platform_driver(&fsl_of_msi_driver);
427}
428
429subsys_initcall(fsl_of_msi_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h
new file mode 100644
index 000000000000..a653468521fa
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_msi.h
@@ -0,0 +1,42 @@
1/*
2 * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved.
3 *
4 * Author: Tony Li <tony.li@freescale.com>
5 * Jason Jin <Jason.jin@freescale.com>
6 *
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * as published by the Free Software Foundation; version 2 of the
10 * License.
11 *
12 */
13#ifndef _POWERPC_SYSDEV_FSL_MSI_H
14#define _POWERPC_SYSDEV_FSL_MSI_H
15
16#define NR_MSI_REG 8
17#define IRQS_PER_MSI_REG 32
18#define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG)
19
20#define FSL_PIC_IP_MASK 0x0000000F
21#define FSL_PIC_IP_MPIC 0x00000001
22#define FSL_PIC_IP_IPIC 0x00000002
23
24struct fsl_msi {
25 /* Device node of the MSI interrupt*/
26 struct device_node *of_node;
27
28 struct irq_host *irqhost;
29
30 unsigned long cascade_irq;
31
32 u32 msi_addr_lo;
33 u32 msi_addr_hi;
34 void __iomem *msi_regs;
35 u32 feature;
36
37 unsigned long *fsl_msi_bitmap;
38 spinlock_t bitmap_lock;
39};
40
41#endif /* _POWERPC_SYSDEV_FSL_MSI_H */
42
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index bf13c2174a4e..87b0aa13ab48 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -106,6 +106,16 @@ void __init setup_pci_cmd(struct pci_controller *hose)
106 } 106 }
107} 107}
108 108
109static void __init setup_pci_pcsrbar(struct pci_controller *hose)
110{
111#ifdef CONFIG_PCI_MSI
112 phys_addr_t immr_base;
113
114 immr_base = get_immrbase();
115 early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base);
116#endif
117}
118
109static int fsl_pcie_bus_fixup; 119static int fsl_pcie_bus_fixup;
110 120
111static void __init quirk_fsl_pcie_header(struct pci_dev *dev) 121static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
@@ -211,6 +221,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
211 /* Setup PEX window registers */ 221 /* Setup PEX window registers */
212 setup_pci_atmu(hose, &rsrc); 222 setup_pci_atmu(hose, &rsrc);
213 223
224 /* Setup PEXCSRBAR */
225 setup_pci_pcsrbar(hose);
214 return 0; 226 return 0;
215} 227}
216 228
@@ -231,6 +243,8 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544E, quirk_fsl_pcie_header);
231DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header); 243DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8544, quirk_fsl_pcie_header);
232DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header); 244DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572E, quirk_fsl_pcie_header);
233DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header); 245DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8572, quirk_fsl_pcie_header);
246DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536E, quirk_fsl_pcie_header);
247DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8536, quirk_fsl_pcie_header);
234DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header); 248DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641, quirk_fsl_pcie_header);
235DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header); 249DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8641D, quirk_fsl_pcie_header);
236DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header); 250DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_MPC8610, quirk_fsl_pcie_header);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index 019657c110b6..ebcec7362f95 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -414,128 +414,6 @@ err:
414 414
415arch_initcall(gfar_of_init); 415arch_initcall(gfar_of_init);
416 416
417#ifdef CONFIG_I2C_BOARDINFO
418#include <linux/i2c.h>
419struct i2c_driver_device {
420 char *of_device;
421 char *i2c_type;
422};
423
424static struct i2c_driver_device i2c_devices[] __initdata = {
425 {"ricoh,rs5c372a", "rs5c372a"},
426 {"ricoh,rs5c372b", "rs5c372b"},
427 {"ricoh,rv5c386", "rv5c386"},
428 {"ricoh,rv5c387a", "rv5c387a"},
429 {"dallas,ds1307", "ds1307"},
430 {"dallas,ds1337", "ds1337"},
431 {"dallas,ds1338", "ds1338"},
432 {"dallas,ds1339", "ds1339"},
433 {"dallas,ds1340", "ds1340"},
434 {"stm,m41t00", "m41t00"},
435 {"dallas,ds1374", "ds1374"},
436};
437
438static int __init of_find_i2c_driver(struct device_node *node,
439 struct i2c_board_info *info)
440{
441 int i;
442
443 for (i = 0; i < ARRAY_SIZE(i2c_devices); i++) {
444 if (!of_device_is_compatible(node, i2c_devices[i].of_device))
445 continue;
446 if (strlcpy(info->type, i2c_devices[i].i2c_type,
447 I2C_NAME_SIZE) >= I2C_NAME_SIZE)
448 return -ENOMEM;
449 return 0;
450 }
451 return -ENODEV;
452}
453
454static void __init of_register_i2c_devices(struct device_node *adap_node,
455 int bus_num)
456{
457 struct device_node *node = NULL;
458
459 while ((node = of_get_next_child(adap_node, node))) {
460 struct i2c_board_info info = {};
461 const u32 *addr;
462 int len;
463
464 addr = of_get_property(node, "reg", &len);
465 if (!addr || len < sizeof(int) || *addr > (1 << 10) - 1) {
466 printk(KERN_WARNING "fsl_soc.c: invalid i2c device entry\n");
467 continue;
468 }
469
470 info.irq = irq_of_parse_and_map(node, 0);
471 if (info.irq == NO_IRQ)
472 info.irq = -1;
473
474 if (of_find_i2c_driver(node, &info) < 0)
475 continue;
476
477 info.addr = *addr;
478
479 i2c_register_board_info(bus_num, &info, 1);
480 }
481}
482
483static int __init fsl_i2c_of_init(void)
484{
485 struct device_node *np;
486 unsigned int i = 0;
487 struct platform_device *i2c_dev;
488 int ret;
489
490 for_each_compatible_node(np, NULL, "fsl-i2c") {
491 struct resource r[2];
492 struct fsl_i2c_platform_data i2c_data;
493 const unsigned char *flags = NULL;
494
495 memset(&r, 0, sizeof(r));
496 memset(&i2c_data, 0, sizeof(i2c_data));
497
498 ret = of_address_to_resource(np, 0, &r[0]);
499 if (ret)
500 goto err;
501
502 of_irq_to_resource(np, 0, &r[1]);
503
504 i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2);
505 if (IS_ERR(i2c_dev)) {
506 ret = PTR_ERR(i2c_dev);
507 goto err;
508 }
509
510 i2c_data.device_flags = 0;
511 flags = of_get_property(np, "dfsrr", NULL);
512 if (flags)
513 i2c_data.device_flags |= FSL_I2C_DEV_SEPARATE_DFSRR;
514
515 flags = of_get_property(np, "fsl5200-clocking", NULL);
516 if (flags)
517 i2c_data.device_flags |= FSL_I2C_DEV_CLOCK_5200;
518
519 ret =
520 platform_device_add_data(i2c_dev, &i2c_data,
521 sizeof(struct
522 fsl_i2c_platform_data));
523 if (ret)
524 goto unreg;
525
526 of_register_i2c_devices(np, i++);
527 }
528
529 return 0;
530
531unreg:
532 platform_device_unregister(i2c_dev);
533err:
534 return ret;
535}
536
537arch_initcall(fsl_i2c_of_init);
538#endif
539 417
540#ifdef CONFIG_PPC_83xx 418#ifdef CONFIG_PPC_83xx
541static int __init mpc83xx_wdt_init(void) 419static int __init mpc83xx_wdt_init(void)
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index 216c0f5680d2..a96584ab33dd 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -276,7 +276,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr)
276 spin_unlock_irqrestore(&i8259_lock, flags); 276 spin_unlock_irqrestore(&i8259_lock, flags);
277 277
278 /* create a legacy host */ 278 /* create a legacy host */
279 i8259_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, 279 i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
280 0, &i8259_host_ops, 0); 280 0, &i8259_host_ops, 0);
281 if (i8259_host == NULL) { 281 if (i8259_host == NULL) {
282 printk(KERN_ERR "i8259: failed to allocate irq host !\n"); 282 printk(KERN_ERR "i8259: failed to allocate irq host !\n");
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index cfbd2aae93e8..7fd49c97501a 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -123,6 +123,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
123 (bus->number == hose->first_busno)) 123 (bus->number == hose->first_busno))
124 val &= 0xffffff00; 124 val &= 0xffffff00;
125 125
126 /* Workaround for PCI_28 Errata in 440EPx/GRx */
127 if ((hose->indirect_type & PPC_INDIRECT_TYPE_BROKEN_MRM) &&
128 offset == PCI_CACHE_LINE_SIZE) {
129 val = 0;
130 }
131
126 /* 132 /*
127 * Note: the caller has already checked that offset is 133 * Note: the caller has already checked that offset is
128 * suitably aligned and that len is 1, 2 or 4. 134 * suitably aligned and that len is 1, 2 or 4.
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index 0f2dfb0aaa6a..caba1c0be5a7 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -725,25 +725,21 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
725 struct resource res; 725 struct resource res;
726 u32 temp = 0, ret; 726 u32 temp = 0, ret;
727 727
728 ret = of_address_to_resource(node, 0, &res);
729 if (ret)
730 return NULL;
731
728 ipic = alloc_bootmem(sizeof(struct ipic)); 732 ipic = alloc_bootmem(sizeof(struct ipic));
729 if (ipic == NULL) 733 if (ipic == NULL)
730 return NULL; 734 return NULL;
731 735
732 memset(ipic, 0, sizeof(struct ipic)); 736 memset(ipic, 0, sizeof(struct ipic));
733 737
734 ipic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, 738 ipic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
735 NR_IPIC_INTS, 739 NR_IPIC_INTS,
736 &ipic_host_ops, 0); 740 &ipic_host_ops, 0);
737 if (ipic->irqhost == NULL) { 741 if (ipic->irqhost == NULL)
738 of_node_put(node);
739 return NULL;
740 }
741
742 ret = of_address_to_resource(node, 0, &res);
743 if (ret) {
744 of_node_put(node);
745 return NULL; 742 return NULL;
746 }
747 743
748 ipic->regs = ioremap(res.start, res.end - res.start + 1); 744 ipic->regs = ioremap(res.start, res.end - res.start + 1);
749 745
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 6c90c95b454e..8e3478c995ef 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -1016,13 +1016,11 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1016 memset(mpic, 0, sizeof(struct mpic)); 1016 memset(mpic, 0, sizeof(struct mpic));
1017 mpic->name = name; 1017 mpic->name = name;
1018 1018
1019 mpic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, 1019 mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
1020 isu_size, &mpic_host_ops, 1020 isu_size, &mpic_host_ops,
1021 flags & MPIC_LARGE_VECTORS ? 2048 : 256); 1021 flags & MPIC_LARGE_VECTORS ? 2048 : 256);
1022 if (mpic->irqhost == NULL) { 1022 if (mpic->irqhost == NULL)
1023 of_node_put(node);
1024 return NULL; 1023 return NULL;
1025 }
1026 1024
1027 mpic->irqhost->host_data = mpic; 1025 mpic->irqhost->host_data = mpic;
1028 mpic->hc_irq = mpic_irq_chip; 1026 mpic->hc_irq = mpic_irq_chip;
@@ -1143,10 +1141,14 @@ struct mpic * __init mpic_alloc(struct device_node *node,
1143 greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); 1141 greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0));
1144 mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) 1142 mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK)
1145 >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; 1143 >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1;
1146 if (isu_size == 0) 1144 if (isu_size == 0) {
1147 mpic->num_sources = 1145 if (flags & MPIC_BROKEN_FRR_NIRQS)
1148 ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) 1146 mpic->num_sources = mpic->irq_count;
1149 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; 1147 else
1148 mpic->num_sources =
1149 ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK)
1150 >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1;
1151 }
1150 1152
1151 /* Map the per-CPU registers */ 1153 /* Map the per-CPU registers */
1152 for (i = 0; i < mpic->num_cpus; i++) { 1154 for (i = 0; i < mpic->num_cpus; i++) {
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c
index d272a52ecd24..de3e5e8bc324 100644
--- a/arch/powerpc/sysdev/mpic_msi.c
+++ b/arch/powerpc/sysdev/mpic_msi.c
@@ -16,6 +16,7 @@
16#include <asm/hw_irq.h> 16#include <asm/hw_irq.h>
17#include <asm/ppc-pci.h> 17#include <asm/ppc-pci.h>
18 18
19#include <sysdev/mpic.h>
19 20
20static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) 21static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq)
21{ 22{
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 33cbfb22ce3e..68aff6076675 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -95,6 +95,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
95 unsigned int virq; 95 unsigned int virq;
96 struct msi_desc *entry; 96 struct msi_desc *entry;
97 struct msi_msg msg; 97 struct msi_msg msg;
98 int ret;
98 99
99 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", 100 pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n",
100 pdev, nvec, type); 101 pdev, nvec, type);
@@ -108,8 +109,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
108 * few MSIs for someone, but restrictions will apply to how the 109 * few MSIs for someone, but restrictions will apply to how the
109 * sources can be changed independently. 110 * sources can be changed independently.
110 */ 111 */
111 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); 112 ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK);
112 if (hwirq < 0) { 113 hwirq = ret;
114 if (ret < 0) {
113 pr_debug("pasemi_msi: failed allocating hwirq\n"); 115 pr_debug("pasemi_msi: failed allocating hwirq\n");
114 return hwirq; 116 return hwirq;
115 } 117 }
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index 1d5a40899b74..6e2f8686fdfc 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -115,17 +115,19 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
115 struct msi_desc *entry; 115 struct msi_desc *entry;
116 struct msi_msg msg; 116 struct msi_msg msg;
117 u64 addr; 117 u64 addr;
118 int ret;
118 119
119 addr = find_ht_magic_addr(pdev); 120 addr = find_ht_magic_addr(pdev);
120 msg.address_lo = addr & 0xFFFFFFFF; 121 msg.address_lo = addr & 0xFFFFFFFF;
121 msg.address_hi = addr >> 32; 122 msg.address_hi = addr >> 32;
122 123
123 list_for_each_entry(entry, &pdev->msi_list, list) { 124 list_for_each_entry(entry, &pdev->msi_list, list) {
124 hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1); 125 ret = mpic_msi_alloc_hwirqs(msi_mpic, 1);
125 if (hwirq < 0) { 126 if (ret < 0) {
126 pr_debug("u3msi: failed allocating hwirq\n"); 127 pr_debug("u3msi: failed allocating hwirq\n");
127 return hwirq; 128 return ret;
128 } 129 }
130 hwirq = ret;
129 131
130 virq = irq_create_mapping(msi_mpic->irqhost, hwirq); 132 virq = irq_create_mapping(msi_mpic->irqhost, hwirq);
131 if (virq == NO_IRQ) { 133 if (virq == NO_IRQ) {
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index a132e0de8ca5..32e0ad0ebea8 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -15,6 +15,7 @@
15#include <linux/console.h> 15#include <linux/console.h>
16#include <linux/mv643xx.h> 16#include <linux/mv643xx.h>
17#include <linux/platform_device.h> 17#include <linux/platform_device.h>
18#include <linux/of_platform.h>
18 19
19#include <asm/prom.h> 20#include <asm/prom.h>
20 21
@@ -25,6 +26,11 @@
25 * PowerPC of_platform_bus_type. They support platform_bus_type instead. 26 * PowerPC of_platform_bus_type. They support platform_bus_type instead.
26 */ 27 */
27 28
29static struct of_device_id __initdata of_mv64x60_devices[] = {
30 { .compatible = "marvell,mv64306-devctrl", },
31 {}
32};
33
28/* 34/*
29 * Create MPSC platform devices 35 * Create MPSC platform devices
30 */ 36 */
@@ -484,6 +490,10 @@ static int __init mv64x60_device_setup(void)
484 of_node_put(np); 490 of_node_put(np);
485 } 491 }
486 492
493 /* Now add every node that is on the device bus */
494 for_each_compatible_node(np, NULL, "marvell,mv64360")
495 of_platform_bus_probe(np, of_mv64x60_devices, NULL);
496
487 return 0; 497 return 0;
488} 498}
489arch_initcall(mv64x60_device_setup); 499arch_initcall(mv64x60_device_setup);
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c
index b4a54c52e880..fb368dfde5d4 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.c
+++ b/arch/powerpc/sysdev/ppc4xx_pci.c
@@ -75,6 +75,11 @@ static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev)
75 !of_device_is_compatible(hose->dn, "ibm,plb-pci")) 75 !of_device_is_compatible(hose->dn, "ibm,plb-pci"))
76 return; 76 return;
77 77
78 if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") ||
79 of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) {
80 hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM;
81 }
82
78 /* Hide the PCI host BARs from the kernel as their content doesn't 83 /* Hide the PCI host BARs from the kernel as their content doesn't
79 * fit well in the resource management 84 * fit well in the resource management
80 */ 85 */
@@ -1634,6 +1639,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np)
1634 } 1639 }
1635 port = &ppc4xx_pciex_ports[portno]; 1640 port = &ppc4xx_pciex_ports[portno];
1636 port->index = portno; 1641 port->index = portno;
1642
1643 /*
1644 * Check if device is enabled
1645 */
1646 if (!of_device_is_available(np)) {
1647 printk(KERN_INFO "PCIE%d: Port disabled via device-tree\n", port->index);
1648 return;
1649 }
1650
1637 port->node = of_node_get(np); 1651 port->node = of_node_get(np);
1638 pval = of_get_property(np, "sdr-base", NULL); 1652 pval = of_get_property(np, "sdr-base", NULL);
1639 if (pval == NULL) { 1653 if (pval == NULL) {
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig
index adc66212a419..4bb18f57901e 100644
--- a/arch/powerpc/sysdev/qe_lib/Kconfig
+++ b/arch/powerpc/sysdev/qe_lib/Kconfig
@@ -20,3 +20,16 @@ config UCC
20 bool 20 bool
21 default y if UCC_FAST || UCC_SLOW 21 default y if UCC_FAST || UCC_SLOW
22 22
23config QE_USB
24 bool
25 help
26 QE USB Host Controller support
27
28config QE_GPIO
29 bool "QE GPIO support"
30 depends on QUICC_ENGINE
31 select GENERIC_GPIO
32 select HAVE_GPIO_LIB
33 help
34 Say Y here if you're going to use hardware that connects to the
35 QE GPIOs.
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile
index 874fe1a5b1cf..f1855c185291 100644
--- a/arch/powerpc/sysdev/qe_lib/Makefile
+++ b/arch/powerpc/sysdev/qe_lib/Makefile
@@ -6,3 +6,5 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o
6obj-$(CONFIG_UCC) += ucc.o 6obj-$(CONFIG_UCC) += ucc.o
7obj-$(CONFIG_UCC_SLOW) += ucc_slow.o 7obj-$(CONFIG_UCC_SLOW) += ucc_slow.o
8obj-$(CONFIG_UCC_FAST) += ucc_fast.o 8obj-$(CONFIG_UCC_FAST) += ucc_fast.o
9obj-$(CONFIG_QE_USB) += usb.o
10obj-$(CONFIG_QE_GPIO) += gpio.o
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c
new file mode 100644
index 000000000000..8e5a0bc36d0b
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/gpio.c
@@ -0,0 +1,149 @@
1/*
2 * QUICC Engine GPIOs
3 *
4 * Copyright (c) MontaVista Software, Inc. 2008.
5 *
6 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it
9 * under the terms of the GNU General Public License as published by the
10 * Free Software Foundation; either version 2 of the License, or (at your
11 * option) any later version.
12 */
13
14#include <linux/kernel.h>
15#include <linux/init.h>
16#include <linux/spinlock.h>
17#include <linux/io.h>
18#include <linux/of.h>
19#include <linux/of_gpio.h>
20#include <linux/gpio.h>
21#include <asm/qe.h>
22
23struct qe_gpio_chip {
24 struct of_mm_gpio_chip mm_gc;
25 spinlock_t lock;
26
27 /* shadowed data register to clear/set bits safely */
28 u32 cpdata;
29};
30
31static inline struct qe_gpio_chip *
32to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc)
33{
34 return container_of(mm_gc, struct qe_gpio_chip, mm_gc);
35}
36
37static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc)
38{
39 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
40 struct qe_pio_regs __iomem *regs = mm_gc->regs;
41
42 qe_gc->cpdata = in_be32(&regs->cpdata);
43}
44
45static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio)
46{
47 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
48 struct qe_pio_regs __iomem *regs = mm_gc->regs;
49 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
50
51 return in_be32(&regs->cpdata) & pin_mask;
52}
53
54static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val)
55{
56 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
57 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
58 struct qe_pio_regs __iomem *regs = mm_gc->regs;
59 unsigned long flags;
60 u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio);
61
62 spin_lock_irqsave(&qe_gc->lock, flags);
63
64 if (val)
65 qe_gc->cpdata |= pin_mask;
66 else
67 qe_gc->cpdata &= ~pin_mask;
68
69 out_be32(&regs->cpdata, qe_gc->cpdata);
70
71 spin_unlock_irqrestore(&qe_gc->lock, flags);
72}
73
74static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio)
75{
76 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
77 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
78 unsigned long flags;
79
80 spin_lock_irqsave(&qe_gc->lock, flags);
81
82 __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_IN, 0, 0, 0);
83
84 spin_unlock_irqrestore(&qe_gc->lock, flags);
85
86 return 0;
87}
88
89static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
90{
91 struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc);
92 struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc);
93 unsigned long flags;
94
95 spin_lock_irqsave(&qe_gc->lock, flags);
96
97 __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_OUT, 0, 0, 0);
98
99 spin_unlock_irqrestore(&qe_gc->lock, flags);
100
101 qe_gpio_set(gc, gpio, val);
102
103 return 0;
104}
105
106static int __init qe_add_gpiochips(void)
107{
108 struct device_node *np;
109
110 for_each_compatible_node(np, NULL, "fsl,mpc8323-qe-pario-bank") {
111 int ret;
112 struct qe_gpio_chip *qe_gc;
113 struct of_mm_gpio_chip *mm_gc;
114 struct of_gpio_chip *of_gc;
115 struct gpio_chip *gc;
116
117 qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL);
118 if (!qe_gc) {
119 ret = -ENOMEM;
120 goto err;
121 }
122
123 spin_lock_init(&qe_gc->lock);
124
125 mm_gc = &qe_gc->mm_gc;
126 of_gc = &mm_gc->of_gc;
127 gc = &of_gc->gc;
128
129 mm_gc->save_regs = qe_gpio_save_regs;
130 of_gc->gpio_cells = 2;
131 gc->ngpio = QE_PIO_PINS;
132 gc->direction_input = qe_gpio_dir_in;
133 gc->direction_output = qe_gpio_dir_out;
134 gc->get = qe_gpio_get;
135 gc->set = qe_gpio_set;
136
137 ret = of_mm_gpiochip_add(np, mm_gc);
138 if (ret)
139 goto err;
140 continue;
141err:
142 pr_err("%s: registration failed with status %d\n",
143 np->full_name, ret);
144 kfree(qe_gc);
145 /* try others anyway */
146 }
147 return 0;
148}
149arch_initcall(qe_add_gpiochips);
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index cff550eec7e8..9e82d7e725a5 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -35,7 +35,6 @@
35#include <asm/rheap.h> 35#include <asm/rheap.h>
36 36
37static void qe_snums_init(void); 37static void qe_snums_init(void);
38static void qe_muram_init(void);
39static int qe_sdma_init(void); 38static int qe_sdma_init(void);
40 39
41static DEFINE_SPINLOCK(qe_lock); 40static DEFINE_SPINLOCK(qe_lock);
@@ -88,7 +87,7 @@ phys_addr_t get_qe_base(void)
88 87
89EXPORT_SYMBOL(get_qe_base); 88EXPORT_SYMBOL(get_qe_base);
90 89
91void qe_reset(void) 90void __init qe_reset(void)
92{ 91{
93 if (qe_immr == NULL) 92 if (qe_immr == NULL)
94 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); 93 qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE);
@@ -325,97 +324,6 @@ static int qe_sdma_init(void)
325 return 0; 324 return 0;
326} 325}
327 326
328/*
329 * muram_alloc / muram_free bits.
330 */
331static DEFINE_SPINLOCK(qe_muram_lock);
332
333/* 16 blocks should be enough to satisfy all requests
334 * until the memory subsystem goes up... */
335static rh_block_t qe_boot_muram_rh_block[16];
336static rh_info_t qe_muram_info;
337
338static void qe_muram_init(void)
339{
340 struct device_node *np;
341 const u32 *address;
342 u64 size;
343 unsigned int flags;
344
345 /* initialize the info header */
346 rh_init(&qe_muram_info, 1,
347 sizeof(qe_boot_muram_rh_block) /
348 sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block);
349
350 /* Attach the usable muram area */
351 /* XXX: This is a subset of the available muram. It
352 * varies with the processor and the microcode patches activated.
353 */
354 np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data");
355 if (!np) {
356 np = of_find_node_by_name(NULL, "data-only");
357 if (!np) {
358 WARN_ON(1);
359 return;
360 }
361 }
362
363 address = of_get_address(np, 0, &size, &flags);
364 WARN_ON(!address);
365
366 of_node_put(np);
367 if (address)
368 rh_attach_region(&qe_muram_info, *address, (int)size);
369}
370
371/* This function returns an index into the MURAM area.
372 */
373unsigned long qe_muram_alloc(int size, int align)
374{
375 unsigned long start;
376 unsigned long flags;
377
378 spin_lock_irqsave(&qe_muram_lock, flags);
379 start = rh_alloc_align(&qe_muram_info, size, align, "QE");
380 spin_unlock_irqrestore(&qe_muram_lock, flags);
381
382 return start;
383}
384EXPORT_SYMBOL(qe_muram_alloc);
385
386int qe_muram_free(unsigned long offset)
387{
388 int ret;
389 unsigned long flags;
390
391 spin_lock_irqsave(&qe_muram_lock, flags);
392 ret = rh_free(&qe_muram_info, offset);
393 spin_unlock_irqrestore(&qe_muram_lock, flags);
394
395 return ret;
396}
397EXPORT_SYMBOL(qe_muram_free);
398
399/* not sure if this is ever needed */
400unsigned long qe_muram_alloc_fixed(unsigned long offset, int size)
401{
402 unsigned long start;
403 unsigned long flags;
404
405 spin_lock_irqsave(&qe_muram_lock, flags);
406 start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc");
407 spin_unlock_irqrestore(&qe_muram_lock, flags);
408
409 return start;
410}
411EXPORT_SYMBOL(qe_muram_alloc_fixed);
412
413void qe_muram_dump(void)
414{
415 rh_dump(&qe_muram_info);
416}
417EXPORT_SYMBOL(qe_muram_dump);
418
419/* The maximum number of RISCs we support */ 327/* The maximum number of RISCs we support */
420#define MAX_QE_RISC 2 328#define MAX_QE_RISC 2
421 329
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index f59444d3be75..63cdf9887f36 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -329,21 +329,19 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
329 struct resource res; 329 struct resource res;
330 u32 temp = 0, ret, high_active = 0; 330 u32 temp = 0, ret, high_active = 0;
331 331
332 ret = of_address_to_resource(node, 0, &res);
333 if (ret)
334 return;
335
332 qe_ic = alloc_bootmem(sizeof(struct qe_ic)); 336 qe_ic = alloc_bootmem(sizeof(struct qe_ic));
333 if (qe_ic == NULL) 337 if (qe_ic == NULL)
334 return; 338 return;
335 339
336 memset(qe_ic, 0, sizeof(struct qe_ic)); 340 memset(qe_ic, 0, sizeof(struct qe_ic));
337 341
338 qe_ic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, 342 qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
339 NR_QE_IC_INTS, &qe_ic_host_ops, 0); 343 NR_QE_IC_INTS, &qe_ic_host_ops, 0);
340 if (qe_ic->irqhost == NULL) { 344 if (qe_ic->irqhost == NULL)
341 of_node_put(node);
342 return;
343 }
344
345 ret = of_address_to_resource(node, 0, &res);
346 if (ret)
347 return; 345 return;
348 346
349 qe_ic->regs = ioremap(res.start, res.end - res.start + 1); 347 qe_ic->regs = ioremap(res.start, res.end - res.start + 1);
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c
index 93916a48afec..7c87460179ef 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_io.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_io.c
@@ -28,21 +28,7 @@
28 28
29#undef DEBUG 29#undef DEBUG
30 30
31#define NUM_OF_PINS 32 31static struct qe_pio_regs __iomem *par_io;
32
33struct port_regs {
34 __be32 cpodr; /* Open drain register */
35 __be32 cpdata; /* Data register */
36 __be32 cpdir1; /* Direction register */
37 __be32 cpdir2; /* Direction register */
38 __be32 cppar1; /* Pin assignment register */
39 __be32 cppar2; /* Pin assignment register */
40#ifdef CONFIG_PPC_85xx
41 u8 pad[8];
42#endif
43};
44
45static struct port_regs __iomem *par_io;
46static int num_par_io_ports = 0; 32static int num_par_io_ports = 0;
47 33
48int par_io_init(struct device_node *np) 34int par_io_init(struct device_node *np)
@@ -64,69 +50,79 @@ int par_io_init(struct device_node *np)
64 return 0; 50 return 0;
65} 51}
66 52
67int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, 53void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir,
68 int assignment, int has_irq) 54 int open_drain, int assignment, int has_irq)
69{ 55{
70 u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val; 56 u32 pin_mask1bit;
71 57 u32 pin_mask2bits;
72 if (!par_io) 58 u32 new_mask2bits;
73 return -1; 59 u32 tmp_val;
74 60
75 /* calculate pin location for single and 2 bits information */ 61 /* calculate pin location for single and 2 bits information */
76 pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1))); 62 pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1)));
77 63
78 /* Set open drain, if required */ 64 /* Set open drain, if required */
79 tmp_val = in_be32(&par_io[port].cpodr); 65 tmp_val = in_be32(&par_io->cpodr);
80 if (open_drain) 66 if (open_drain)
81 out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val); 67 out_be32(&par_io->cpodr, pin_mask1bit | tmp_val);
82 else 68 else
83 out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val); 69 out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val);
84 70
85 /* define direction */ 71 /* define direction */
86 tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? 72 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
87 in_be32(&par_io[port].cpdir2) : 73 in_be32(&par_io->cpdir2) :
88 in_be32(&par_io[port].cpdir1); 74 in_be32(&par_io->cpdir1);
89 75
90 /* get all bits mask for 2 bit per port */ 76 /* get all bits mask for 2 bit per port */
91 pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS - 77 pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS -
92 (pin % (NUM_OF_PINS / 2) + 1) * 2)); 78 (pin % (QE_PIO_PINS / 2) + 1) * 2));
93 79
94 /* Get the final mask we need for the right definition */ 80 /* Get the final mask we need for the right definition */
95 new_mask2bits = (u32) (dir << (NUM_OF_PINS - 81 new_mask2bits = (u32) (dir << (QE_PIO_PINS -
96 (pin % (NUM_OF_PINS / 2) + 1) * 2)); 82 (pin % (QE_PIO_PINS / 2) + 1) * 2));
97 83
98 /* clear and set 2 bits mask */ 84 /* clear and set 2 bits mask */
99 if (pin > (NUM_OF_PINS / 2) - 1) { 85 if (pin > (QE_PIO_PINS / 2) - 1) {
100 out_be32(&par_io[port].cpdir2, 86 out_be32(&par_io->cpdir2,
101 ~pin_mask2bits & tmp_val); 87 ~pin_mask2bits & tmp_val);
102 tmp_val &= ~pin_mask2bits; 88 tmp_val &= ~pin_mask2bits;
103 out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val); 89 out_be32(&par_io->cpdir2, new_mask2bits | tmp_val);
104 } else { 90 } else {
105 out_be32(&par_io[port].cpdir1, 91 out_be32(&par_io->cpdir1,
106 ~pin_mask2bits & tmp_val); 92 ~pin_mask2bits & tmp_val);
107 tmp_val &= ~pin_mask2bits; 93 tmp_val &= ~pin_mask2bits;
108 out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val); 94 out_be32(&par_io->cpdir1, new_mask2bits | tmp_val);
109 } 95 }
110 /* define pin assignment */ 96 /* define pin assignment */
111 tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? 97 tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ?
112 in_be32(&par_io[port].cppar2) : 98 in_be32(&par_io->cppar2) :
113 in_be32(&par_io[port].cppar1); 99 in_be32(&par_io->cppar1);
114 100
115 new_mask2bits = (u32) (assignment << (NUM_OF_PINS - 101 new_mask2bits = (u32) (assignment << (QE_PIO_PINS -
116 (pin % (NUM_OF_PINS / 2) + 1) * 2)); 102 (pin % (QE_PIO_PINS / 2) + 1) * 2));
117 /* clear and set 2 bits mask */ 103 /* clear and set 2 bits mask */
118 if (pin > (NUM_OF_PINS / 2) - 1) { 104 if (pin > (QE_PIO_PINS / 2) - 1) {
119 out_be32(&par_io[port].cppar2, 105 out_be32(&par_io->cppar2,
120 ~pin_mask2bits & tmp_val); 106 ~pin_mask2bits & tmp_val);
121 tmp_val &= ~pin_mask2bits; 107 tmp_val &= ~pin_mask2bits;
122 out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val); 108 out_be32(&par_io->cppar2, new_mask2bits | tmp_val);
123 } else { 109 } else {
124 out_be32(&par_io[port].cppar1, 110 out_be32(&par_io->cppar1,
125 ~pin_mask2bits & tmp_val); 111 ~pin_mask2bits & tmp_val);
126 tmp_val &= ~pin_mask2bits; 112 tmp_val &= ~pin_mask2bits;
127 out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val); 113 out_be32(&par_io->cppar1, new_mask2bits | tmp_val);
128 } 114 }
115}
116EXPORT_SYMBOL(__par_io_config_pin);
117
118int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain,
119 int assignment, int has_irq)
120{
121 if (!par_io || port >= num_par_io_ports)
122 return -EINVAL;
129 123
124 __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment,
125 has_irq);
130 return 0; 126 return 0;
131} 127}
132EXPORT_SYMBOL(par_io_config_pin); 128EXPORT_SYMBOL(par_io_config_pin);
@@ -137,10 +133,10 @@ int par_io_data_set(u8 port, u8 pin, u8 val)
137 133
138 if (port >= num_par_io_ports) 134 if (port >= num_par_io_ports)
139 return -EINVAL; 135 return -EINVAL;
140 if (pin >= NUM_OF_PINS) 136 if (pin >= QE_PIO_PINS)
141 return -EINVAL; 137 return -EINVAL;
142 /* calculate pin location */ 138 /* calculate pin location */
143 pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin)); 139 pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin));
144 140
145 tmp_val = in_be32(&par_io[port].cpdata); 141 tmp_val = in_be32(&par_io[port].cpdata);
146 142
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c
index 0e348d9af8a6..d3c7f5af9bc8 100644
--- a/arch/powerpc/sysdev/qe_lib/ucc.c
+++ b/arch/powerpc/sysdev/qe_lib/ucc.c
@@ -26,7 +26,8 @@
26#include <asm/qe.h> 26#include <asm/qe.h>
27#include <asm/ucc.h> 27#include <asm/ucc.h>
28 28
29static DEFINE_SPINLOCK(ucc_lock); 29DEFINE_SPINLOCK(cmxgcr_lock);
30EXPORT_SYMBOL(cmxgcr_lock);
30 31
31int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) 32int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
32{ 33{
@@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num)
35 if (ucc_num > UCC_MAX_NUM - 1) 36 if (ucc_num > UCC_MAX_NUM - 1)
36 return -EINVAL; 37 return -EINVAL;
37 38
38 spin_lock_irqsave(&ucc_lock, flags); 39 spin_lock_irqsave(&cmxgcr_lock, flags);
39 clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, 40 clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG,
40 ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT); 41 ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT);
41 spin_unlock_irqrestore(&ucc_lock, flags); 42 spin_unlock_irqrestore(&cmxgcr_lock, flags);
42 43
43 return 0; 44 return 0;
44} 45}
diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c
new file mode 100644
index 000000000000..8105462078eb
--- /dev/null
+++ b/arch/powerpc/sysdev/qe_lib/usb.c
@@ -0,0 +1,55 @@
1/*
2 * QE USB routines
3 *
4 * Copyright (c) Freescale Semicondutor, Inc. 2006.
5 * Shlomi Gridish <gridish@freescale.com>
6 * Jerry Huang <Chang-Ming.Huang@freescale.com>
7 * Copyright (c) MontaVista Software, Inc. 2008.
8 * Anton Vorontsov <avorontsov@ru.mvista.com>
9 *
10 * This program is free software; you can redistribute it and/or modify it
11 * under the terms of the GNU General Public License as published by the
12 * Free Software Foundation; either version 2 of the License, or (at your
13 * option) any later version.
14 */
15
16#include <linux/kernel.h>
17#include <linux/errno.h>
18#include <linux/io.h>
19#include <asm/immap_qe.h>
20#include <asm/qe.h>
21
22int qe_usb_clock_set(enum qe_clock clk, int rate)
23{
24 struct qe_mux __iomem *mux = &qe_immr->qmx;
25 unsigned long flags;
26 u32 val;
27
28 switch (clk) {
29 case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break;
30 case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break;
31 case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break;
32 case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break;
33 case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break;
34 case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break;
35 case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break;
36 case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break;
37 case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break;
38 case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break;
39 default:
40 pr_err("%s: requested unknown clock %d\n", __func__, clk);
41 return -EINVAL;
42 }
43
44 if (qe_clock_is_brg(clk))
45 qe_setbrg(clk, rate, 1);
46
47 spin_lock_irqsave(&cmxgcr_lock, flags);
48
49 clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val);
50
51 spin_unlock_irqrestore(&cmxgcr_lock, flags);
52
53 return 0;
54}
55EXPORT_SYMBOL(qe_usb_clock_set);
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index ac1a72dc21e5..24e1f5a197ae 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -426,11 +426,10 @@ void __init tsi108_pci_int_init(struct device_node *node)
426{ 426{
427 DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); 427 DBG("Tsi108_pci_int_init: initializing PCI interrupts\n");
428 428
429 pci_irq_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, 429 pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY,
430 0, &pci_irq_host_ops, 0); 430 0, &pci_irq_host_ops, 0);
431 if (pci_irq_host == NULL) { 431 if (pci_irq_host == NULL) {
432 printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n"); 432 printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n");
433 of_node_put(node);
434 return; 433 return;
435 } 434 }
436 435
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 625b275c3795..d35405c59434 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -280,12 +280,10 @@ static struct uic * __init uic_init_one(struct device_node *node)
280 } 280 }
281 uic->dcrbase = *dcrreg; 281 uic->dcrbase = *dcrreg;
282 282
283 uic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, 283 uic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR,
284 NR_UIC_INTS, &uic_host_ops, -1); 284 NR_UIC_INTS, &uic_host_ops, -1);
285 if (! uic->irqhost) { 285 if (! uic->irqhost)
286 of_node_put(node);
287 return NULL; /* FIXME: panic? */ 286 return NULL; /* FIXME: panic? */
288 }
289 287
290 uic->irqhost->host_data = uic; 288 uic->irqhost->host_data = uic;
291 289
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index bfcf70ee8959..34c3d0688fe0 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -54,7 +54,7 @@
54#define skipbl xmon_skipbl 54#define skipbl xmon_skipbl
55 55
56#ifdef CONFIG_SMP 56#ifdef CONFIG_SMP
57cpumask_t cpus_in_xmon = CPU_MASK_NONE; 57static cpumask_t cpus_in_xmon = CPU_MASK_NONE;
58static unsigned long xmon_taken = 1; 58static unsigned long xmon_taken = 1;
59static int xmon_owner; 59static int xmon_owner;
60static int xmon_gate; 60static int xmon_gate;
@@ -154,7 +154,7 @@ static int do_spu_cmd(void);
154static void dump_tlb_44x(void); 154static void dump_tlb_44x(void);
155#endif 155#endif
156 156
157int xmon_no_auto_backtrace; 157static int xmon_no_auto_backtrace;
158 158
159extern void xmon_enter(void); 159extern void xmon_enter(void);
160extern void xmon_leave(void); 160extern void xmon_leave(void);
@@ -327,6 +327,11 @@ static void release_output_lock(void)
327{ 327{
328 xmon_speaker = 0; 328 xmon_speaker = 0;
329} 329}
330
331int cpus_are_in_xmon(void)
332{
333 return !cpus_empty(cpus_in_xmon);
334}
330#endif 335#endif
331 336
332static int xmon_core(struct pt_regs *regs, int fromipi) 337static int xmon_core(struct pt_regs *regs, int fromipi)
@@ -593,7 +598,7 @@ static int xmon_iabr_match(struct pt_regs *regs)
593{ 598{
594 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) 599 if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
595 return 0; 600 return 0;
596 if (iabr == 0) 601 if (iabr == NULL)
597 return 0; 602 return 0;
598 xmon_core(regs, 0); 603 xmon_core(regs, 0);
599 return 1; 604 return 1;
@@ -1142,7 +1147,7 @@ bpt_cmds(void)
1142 } else { 1147 } else {
1143 /* assume a breakpoint address */ 1148 /* assume a breakpoint address */
1144 bp = at_breakpoint(a); 1149 bp = at_breakpoint(a);
1145 if (bp == 0) { 1150 if (bp == NULL) {
1146 printf("No breakpoint at %x\n", a); 1151 printf("No breakpoint at %x\n", a);
1147 break; 1152 break;
1148 } 1153 }
@@ -1370,7 +1375,7 @@ static void print_bug_trap(struct pt_regs *regs)
1370#endif 1375#endif
1371} 1376}
1372 1377
1373void excprint(struct pt_regs *fp) 1378static void excprint(struct pt_regs *fp)
1374{ 1379{
1375 unsigned long trap; 1380 unsigned long trap;
1376 1381
@@ -1408,7 +1413,7 @@ void excprint(struct pt_regs *fp)
1408 print_bug_trap(fp); 1413 print_bug_trap(fp);
1409} 1414}
1410 1415
1411void prregs(struct pt_regs *fp) 1416static void prregs(struct pt_regs *fp)
1412{ 1417{
1413 int n, trap; 1418 int n, trap;
1414 unsigned long base; 1419 unsigned long base;
@@ -1463,7 +1468,7 @@ void prregs(struct pt_regs *fp)
1463 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); 1468 printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr);
1464} 1469}
1465 1470
1466void cacheflush(void) 1471static void cacheflush(void)
1467{ 1472{
1468 int cmd; 1473 int cmd;
1469 unsigned long nflush; 1474 unsigned long nflush;
@@ -1495,7 +1500,7 @@ void cacheflush(void)
1495 catch_memory_errors = 0; 1500 catch_memory_errors = 0;
1496} 1501}
1497 1502
1498unsigned long 1503static unsigned long
1499read_spr(int n) 1504read_spr(int n)
1500{ 1505{
1501 unsigned int instrs[2]; 1506 unsigned int instrs[2];
@@ -1533,7 +1538,7 @@ read_spr(int n)
1533 return ret; 1538 return ret;
1534} 1539}
1535 1540
1536void 1541static void
1537write_spr(int n, unsigned long val) 1542write_spr(int n, unsigned long val)
1538{ 1543{
1539 unsigned int instrs[2]; 1544 unsigned int instrs[2];
@@ -1571,7 +1576,7 @@ static unsigned long regno;
1571extern char exc_prolog; 1576extern char exc_prolog;
1572extern char dec_exc; 1577extern char dec_exc;
1573 1578
1574void super_regs(void) 1579static void super_regs(void)
1575{ 1580{
1576 int cmd; 1581 int cmd;
1577 unsigned long val; 1582 unsigned long val;
@@ -1629,7 +1634,7 @@ void super_regs(void)
1629/* 1634/*
1630 * Stuff for reading and writing memory safely 1635 * Stuff for reading and writing memory safely
1631 */ 1636 */
1632int 1637static int
1633mread(unsigned long adrs, void *buf, int size) 1638mread(unsigned long adrs, void *buf, int size)
1634{ 1639{
1635 volatile int n; 1640 volatile int n;
@@ -1666,7 +1671,7 @@ mread(unsigned long adrs, void *buf, int size)
1666 return n; 1671 return n;
1667} 1672}
1668 1673
1669int 1674static int
1670mwrite(unsigned long adrs, void *buf, int size) 1675mwrite(unsigned long adrs, void *buf, int size)
1671{ 1676{
1672 volatile int n; 1677 volatile int n;
@@ -1731,7 +1736,7 @@ static int handle_fault(struct pt_regs *regs)
1731 1736
1732#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) 1737#define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t))
1733 1738
1734void 1739static void
1735byterev(unsigned char *val, int size) 1740byterev(unsigned char *val, int size)
1736{ 1741{
1737 int t; 1742 int t;
@@ -1793,7 +1798,7 @@ static char *memex_subcmd_help_string =
1793 " x exit this mode\n" 1798 " x exit this mode\n"
1794 ""; 1799 "";
1795 1800
1796void 1801static void
1797memex(void) 1802memex(void)
1798{ 1803{
1799 int cmd, inc, i, nslash; 1804 int cmd, inc, i, nslash;
@@ -1944,7 +1949,7 @@ memex(void)
1944 } 1949 }
1945} 1950}
1946 1951
1947int 1952static int
1948bsesc(void) 1953bsesc(void)
1949{ 1954{
1950 int c; 1955 int c;
@@ -1984,7 +1989,7 @@ static void xmon_rawdump (unsigned long adrs, long ndump)
1984#define isxdigit(c) (('0' <= (c) && (c) <= '9') \ 1989#define isxdigit(c) (('0' <= (c) && (c) <= '9') \
1985 || ('a' <= (c) && (c) <= 'f') \ 1990 || ('a' <= (c) && (c) <= 'f') \
1986 || ('A' <= (c) && (c) <= 'F')) 1991 || ('A' <= (c) && (c) <= 'F'))
1987void 1992static void
1988dump(void) 1993dump(void)
1989{ 1994{
1990 int c; 1995 int c;
@@ -2022,7 +2027,7 @@ dump(void)
2022 } 2027 }
2023} 2028}
2024 2029
2025void 2030static void
2026prdump(unsigned long adrs, long ndump) 2031prdump(unsigned long adrs, long ndump)
2027{ 2032{
2028 long n, m, c, r, nr; 2033 long n, m, c, r, nr;
@@ -2066,7 +2071,7 @@ prdump(unsigned long adrs, long ndump)
2066 2071
2067typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); 2072typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr);
2068 2073
2069int 2074static int
2070generic_inst_dump(unsigned long adr, long count, int praddr, 2075generic_inst_dump(unsigned long adr, long count, int praddr,
2071 instruction_dump_func dump_func) 2076 instruction_dump_func dump_func)
2072{ 2077{
@@ -2104,7 +2109,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr,
2104 return adr - first_adr; 2109 return adr - first_adr;
2105} 2110}
2106 2111
2107int 2112static int
2108ppc_inst_dump(unsigned long adr, long count, int praddr) 2113ppc_inst_dump(unsigned long adr, long count, int praddr)
2109{ 2114{
2110 return generic_inst_dump(adr, count, praddr, print_insn_powerpc); 2115 return generic_inst_dump(adr, count, praddr, print_insn_powerpc);
@@ -2126,7 +2131,7 @@ static unsigned long mval; /* byte value to set memory to */
2126static unsigned long mcount; /* # bytes to affect */ 2131static unsigned long mcount; /* # bytes to affect */
2127static unsigned long mdiffs; /* max # differences to print */ 2132static unsigned long mdiffs; /* max # differences to print */
2128 2133
2129void 2134static void
2130memops(int cmd) 2135memops(int cmd)
2131{ 2136{
2132 scanhex((void *)&mdest); 2137 scanhex((void *)&mdest);
@@ -2152,7 +2157,7 @@ memops(int cmd)
2152 } 2157 }
2153} 2158}
2154 2159
2155void 2160static void
2156memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) 2161memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2157{ 2162{
2158 unsigned n, prt; 2163 unsigned n, prt;
@@ -2170,7 +2175,7 @@ memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr)
2170static unsigned mend; 2175static unsigned mend;
2171static unsigned mask; 2176static unsigned mask;
2172 2177
2173void 2178static void
2174memlocate(void) 2179memlocate(void)
2175{ 2180{
2176 unsigned a, n; 2181 unsigned a, n;
@@ -2203,7 +2208,7 @@ memlocate(void)
2203static unsigned long mskip = 0x1000; 2208static unsigned long mskip = 0x1000;
2204static unsigned long mlim = 0xffffffff; 2209static unsigned long mlim = 0xffffffff;
2205 2210
2206void 2211static void
2207memzcan(void) 2212memzcan(void)
2208{ 2213{
2209 unsigned char v; 2214 unsigned char v;
@@ -2230,7 +2235,7 @@ memzcan(void)
2230 printf("%.8x\n", a - mskip); 2235 printf("%.8x\n", a - mskip);
2231} 2236}
2232 2237
2233void proccall(void) 2238static void proccall(void)
2234{ 2239{
2235 unsigned long args[8]; 2240 unsigned long args[8];
2236 unsigned long ret; 2241 unsigned long ret;
@@ -2388,7 +2393,7 @@ scanhex(unsigned long *vp)
2388 return 1; 2393 return 1;
2389} 2394}
2390 2395
2391void 2396static void
2392scannl(void) 2397scannl(void)
2393{ 2398{
2394 int c; 2399 int c;
@@ -2399,7 +2404,7 @@ scannl(void)
2399 c = inchar(); 2404 c = inchar();
2400} 2405}
2401 2406
2402int hexdigit(int c) 2407static int hexdigit(int c)
2403{ 2408{
2404 if( '0' <= c && c <= '9' ) 2409 if( '0' <= c && c <= '9' )
2405 return c - '0'; 2410 return c - '0';
@@ -2430,13 +2435,13 @@ getstring(char *s, int size)
2430static char line[256]; 2435static char line[256];
2431static char *lineptr; 2436static char *lineptr;
2432 2437
2433void 2438static void
2434flush_input(void) 2439flush_input(void)
2435{ 2440{
2436 lineptr = NULL; 2441 lineptr = NULL;
2437} 2442}
2438 2443
2439int 2444static int
2440inchar(void) 2445inchar(void)
2441{ 2446{
2442 if (lineptr == NULL || *lineptr == 0) { 2447 if (lineptr == NULL || *lineptr == 0) {
@@ -2449,7 +2454,7 @@ inchar(void)
2449 return *lineptr++; 2454 return *lineptr++;
2450} 2455}
2451 2456
2452void 2457static void
2453take_input(char *str) 2458take_input(char *str)
2454{ 2459{
2455 lineptr = str; 2460 lineptr = str;
@@ -2618,7 +2623,8 @@ static void dump_tlb_44x(void)
2618 } 2623 }
2619} 2624}
2620#endif /* CONFIG_44x */ 2625#endif /* CONFIG_44x */
2621void xmon_init(int enable) 2626
2627static void xmon_init(int enable)
2622{ 2628{
2623#ifdef CONFIG_PPC_ISERIES 2629#ifdef CONFIG_PPC_ISERIES
2624 if (firmware_has_feature(FW_FEATURE_ISERIES)) 2630 if (firmware_has_feature(FW_FEATURE_ISERIES))