diff options
Diffstat (limited to 'arch/powerpc')
167 files changed, 14914 insertions, 2019 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig index 3934e2659407..2cde4e333fd5 100644 --- a/arch/powerpc/Kconfig +++ b/arch/powerpc/Kconfig | |||
@@ -538,6 +538,12 @@ config FSL_LBC | |||
538 | help | 538 | help |
539 | Freescale Localbus support | 539 | Freescale Localbus support |
540 | 540 | ||
541 | config FSL_GTM | ||
542 | bool | ||
543 | depends on PPC_83xx || QUICC_ENGINE || CPM2 | ||
544 | help | ||
545 | Freescale General-purpose Timers support | ||
546 | |||
541 | # Yes MCA RS/6000s exist but Linux-PPC does not currently support any | 547 | # Yes MCA RS/6000s exist but Linux-PPC does not currently support any |
542 | config MCA | 548 | config MCA |
543 | bool | 549 | bool |
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile index 1cee2f9fdf06..4721baf92892 100644 --- a/arch/powerpc/boot/Makefile +++ b/arch/powerpc/boot/Makefile | |||
@@ -63,10 +63,10 @@ src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c | |||
63 | ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ | 63 | ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \ |
64 | cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ | 64 | cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \ |
65 | cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ | 65 | cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \ |
66 | fixed-head.S ep88xc.c ep405.c \ | 66 | fixed-head.S ep88xc.c ep405.c cuboot-c2k.c \ |
67 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ | 67 | cuboot-katmai.c cuboot-rainier.c redboot-8xx.c ep8248e.c \ |
68 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ | 68 | cuboot-warp.c cuboot-85xx-cpm2.c cuboot-yosemite.c simpleboot.c \ |
69 | virtex405-head.S | 69 | virtex405-head.S redboot-83xx.c cuboot-sam440ep.c |
70 | src-boot := $(src-wlib) $(src-plat) empty.c | 70 | src-boot := $(src-wlib) $(src-plat) empty.c |
71 | 71 | ||
72 | src-boot := $(addprefix $(obj)/, $(src-boot)) | 72 | src-boot := $(addprefix $(obj)/, $(src-boot)) |
@@ -213,6 +213,7 @@ image-$(CONFIG_WALNUT) += treeImage.walnut | |||
213 | # Board ports in arch/powerpc/platform/44x/Kconfig | 213 | # Board ports in arch/powerpc/platform/44x/Kconfig |
214 | image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony | 214 | image-$(CONFIG_EBONY) += treeImage.ebony cuImage.ebony |
215 | image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo | 215 | image-$(CONFIG_BAMBOO) += treeImage.bamboo cuImage.bamboo |
216 | image-$(CONFIG_SAM440EP) += cuImage.sam440ep | ||
216 | image-$(CONFIG_SEQUOIA) += cuImage.sequoia | 217 | image-$(CONFIG_SEQUOIA) += cuImage.sequoia |
217 | image-$(CONFIG_RAINIER) += cuImage.rainier | 218 | image-$(CONFIG_RAINIER) += cuImage.rainier |
218 | image-$(CONFIG_TAISHAN) += cuImage.taishan | 219 | image-$(CONFIG_TAISHAN) += cuImage.taishan |
@@ -242,6 +243,7 @@ image-$(CONFIG_MPC834x_ITX) += cuImage.mpc8349emitx \ | |||
242 | cuImage.mpc8349emitxgp | 243 | cuImage.mpc8349emitxgp |
243 | image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds | 244 | image-$(CONFIG_MPC834x_MDS) += cuImage.mpc834x_mds |
244 | image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds | 245 | image-$(CONFIG_MPC836x_MDS) += cuImage.mpc836x_mds |
246 | image-$(CONFIG_ASP834x) += dtbImage.asp834x-redboot | ||
245 | 247 | ||
246 | # Board ports in arch/powerpc/platform/85xx/Kconfig | 248 | # Board ports in arch/powerpc/platform/85xx/Kconfig |
247 | image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads | 249 | image-$(CONFIG_MPC8540_ADS) += cuImage.mpc8540ads |
@@ -254,6 +256,7 @@ image-$(CONFIG_MPC85xx_DS) += cuImage.mpc8544ds \ | |||
254 | cuImage.mpc8572ds | 256 | cuImage.mpc8572ds |
255 | image-$(CONFIG_TQM8540) += cuImage.tqm8540 | 257 | image-$(CONFIG_TQM8540) += cuImage.tqm8540 |
256 | image-$(CONFIG_TQM8541) += cuImage.tqm8541 | 258 | image-$(CONFIG_TQM8541) += cuImage.tqm8541 |
259 | image-$(CONFIG_TQM8548) += cuImage.tqm8548 | ||
257 | image-$(CONFIG_TQM8555) += cuImage.tqm8555 | 260 | image-$(CONFIG_TQM8555) += cuImage.tqm8555 |
258 | image-$(CONFIG_TQM8560) += cuImage.tqm8560 | 261 | image-$(CONFIG_TQM8560) += cuImage.tqm8560 |
259 | image-$(CONFIG_SBC8548) += cuImage.sbc8548 | 262 | image-$(CONFIG_SBC8548) += cuImage.sbc8548 |
@@ -263,6 +266,7 @@ image-$(CONFIG_KSI8560) += cuImage.ksi8560 | |||
263 | # Board ports in arch/powerpc/platform/embedded6xx/Kconfig | 266 | # Board ports in arch/powerpc/platform/embedded6xx/Kconfig |
264 | image-$(CONFIG_STORCENTER) += cuImage.storcenter | 267 | image-$(CONFIG_STORCENTER) += cuImage.storcenter |
265 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 | 268 | image-$(CONFIG_MPC7448HPC2) += cuImage.mpc7448hpc2 |
269 | image-$(CONFIG_PPC_C2K) += cuImage.c2k | ||
266 | 270 | ||
267 | # For 32-bit powermacs, build the COFF and miboot images | 271 | # For 32-bit powermacs, build the COFF and miboot images |
268 | # as well as the ELF images. | 272 | # as well as the ELF images. |
diff --git a/arch/powerpc/boot/cuboot-c2k.c b/arch/powerpc/boot/cuboot-c2k.c new file mode 100644 index 000000000000..e43594950ba3 --- /dev/null +++ b/arch/powerpc/boot/cuboot-c2k.c | |||
@@ -0,0 +1,190 @@ | |||
1 | /* | ||
2 | * GEFanuc C2K platform code. | ||
3 | * | ||
4 | * Author: Remi Machet <rmachet@slac.stanford.edu> | ||
5 | * | ||
6 | * Originated from prpmc2800.c | ||
7 | * | ||
8 | * 2008 (c) Stanford University | ||
9 | * 2007 (c) MontaVista, Software, Inc. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License version 2 as published | ||
13 | * by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include "types.h" | ||
17 | #include "stdio.h" | ||
18 | #include "io.h" | ||
19 | #include "ops.h" | ||
20 | #include "elf.h" | ||
21 | #include "gunzip_util.h" | ||
22 | #include "mv64x60.h" | ||
23 | #include "cuboot.h" | ||
24 | #include "ppcboot.h" | ||
25 | |||
26 | static u8 *bridge_base; | ||
27 | |||
28 | static void c2k_bridge_setup(u32 mem_size) | ||
29 | { | ||
30 | u32 i, v[30], enables, acc_bits; | ||
31 | u32 pci_base_hi, pci_base_lo, size, buf[2]; | ||
32 | unsigned long cpu_base; | ||
33 | int rc; | ||
34 | void *devp, *mv64x60_devp; | ||
35 | u8 *bridge_pbase, is_coherent; | ||
36 | struct mv64x60_cpu2pci_win *tbl; | ||
37 | int bus; | ||
38 | |||
39 | bridge_pbase = mv64x60_get_bridge_pbase(); | ||
40 | is_coherent = mv64x60_is_coherent(); | ||
41 | |||
42 | if (is_coherent) | ||
43 | acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_WB | ||
44 | | MV64x60_PCI_ACC_CNTL_SWAP_NONE | ||
45 | | MV64x60_PCI_ACC_CNTL_MBURST_32_BYTES | ||
46 | | MV64x60_PCI_ACC_CNTL_RDSIZE_32_BYTES; | ||
47 | else | ||
48 | acc_bits = MV64x60_PCI_ACC_CNTL_SNOOP_NONE | ||
49 | | MV64x60_PCI_ACC_CNTL_SWAP_NONE | ||
50 | | MV64x60_PCI_ACC_CNTL_MBURST_128_BYTES | ||
51 | | MV64x60_PCI_ACC_CNTL_RDSIZE_256_BYTES; | ||
52 | |||
53 | mv64x60_config_ctlr_windows(bridge_base, bridge_pbase, is_coherent); | ||
54 | mv64x60_devp = find_node_by_compatible(NULL, "marvell,mv64360"); | ||
55 | if (mv64x60_devp == NULL) | ||
56 | fatal("Error: Missing marvell,mv64360 device tree node\n\r"); | ||
57 | |||
58 | enables = in_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE)); | ||
59 | enables |= 0x007ffe00; /* Disable all cpu->pci windows */ | ||
60 | out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), enables); | ||
61 | |||
62 | /* Get the cpu -> pci i/o & mem mappings from the device tree */ | ||
63 | devp = NULL; | ||
64 | for (bus = 0; ; bus++) { | ||
65 | char name[] = "pci "; | ||
66 | |||
67 | name[strlen(name)-1] = bus+'0'; | ||
68 | |||
69 | devp = find_node_by_alias(name); | ||
70 | if (devp == NULL) | ||
71 | break; | ||
72 | |||
73 | if (bus >= 2) | ||
74 | fatal("Error: Only 2 PCI controllers are supported at" \ | ||
75 | " this time.\n"); | ||
76 | |||
77 | mv64x60_config_pci_windows(bridge_base, bridge_pbase, bus, 0, | ||
78 | mem_size, acc_bits); | ||
79 | |||
80 | rc = getprop(devp, "ranges", v, sizeof(v)); | ||
81 | if (rc == 0) | ||
82 | fatal("Error: Can't find marvell,mv64360-pci ranges" | ||
83 | " property\n\r"); | ||
84 | |||
85 | /* Get the cpu -> pci i/o & mem mappings from the device tree */ | ||
86 | |||
87 | for (i = 0; i < rc; i += 6) { | ||
88 | switch (v[i] & 0xff000000) { | ||
89 | case 0x01000000: /* PCI I/O Space */ | ||
90 | tbl = mv64x60_cpu2pci_io; | ||
91 | break; | ||
92 | case 0x02000000: /* PCI MEM Space */ | ||
93 | tbl = mv64x60_cpu2pci_mem; | ||
94 | break; | ||
95 | default: | ||
96 | continue; | ||
97 | } | ||
98 | |||
99 | pci_base_hi = v[i+1]; | ||
100 | pci_base_lo = v[i+2]; | ||
101 | cpu_base = v[i+3]; | ||
102 | size = v[i+5]; | ||
103 | |||
104 | buf[0] = cpu_base; | ||
105 | buf[1] = size; | ||
106 | |||
107 | if (!dt_xlate_addr(devp, buf, sizeof(buf), &cpu_base)) | ||
108 | fatal("Error: Can't translate PCI address " \ | ||
109 | "0x%x\n\r", (u32)cpu_base); | ||
110 | |||
111 | mv64x60_config_cpu2pci_window(bridge_base, bus, | ||
112 | pci_base_hi, pci_base_lo, cpu_base, size, tbl); | ||
113 | } | ||
114 | |||
115 | enables &= ~(3<<(9+bus*5)); /* Enable cpu->pci<bus> i/o, | ||
116 | cpu->pci<bus> mem0 */ | ||
117 | out_le32((u32 *)(bridge_base + MV64x60_CPU_BAR_ENABLE), | ||
118 | enables); | ||
119 | }; | ||
120 | } | ||
121 | |||
122 | static void c2k_fixups(void) | ||
123 | { | ||
124 | u32 mem_size; | ||
125 | |||
126 | mem_size = mv64x60_get_mem_size(bridge_base); | ||
127 | c2k_bridge_setup(mem_size); /* Do necessary bridge setup */ | ||
128 | } | ||
129 | |||
130 | #define MV64x60_MPP_CNTL_0 0xf000 | ||
131 | #define MV64x60_MPP_CNTL_2 0xf008 | ||
132 | #define MV64x60_GPP_IO_CNTL 0xf100 | ||
133 | #define MV64x60_GPP_LEVEL_CNTL 0xf110 | ||
134 | #define MV64x60_GPP_VALUE_SET 0xf118 | ||
135 | |||
136 | static void c2k_reset(void) | ||
137 | { | ||
138 | u32 temp; | ||
139 | |||
140 | udelay(5000000); | ||
141 | |||
142 | if (bridge_base != 0) { | ||
143 | temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0)); | ||
144 | temp &= 0xFFFF0FFF; | ||
145 | out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_0), temp); | ||
146 | |||
147 | temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); | ||
148 | temp |= 0x00000004; | ||
149 | out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); | ||
150 | |||
151 | temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); | ||
152 | temp |= 0x00000004; | ||
153 | out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); | ||
154 | |||
155 | temp = in_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2)); | ||
156 | temp &= 0xFFFF0FFF; | ||
157 | out_le32((u32 *)(bridge_base + MV64x60_MPP_CNTL_2), temp); | ||
158 | |||
159 | temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL)); | ||
160 | temp |= 0x00080000; | ||
161 | out_le32((u32 *)(bridge_base + MV64x60_GPP_LEVEL_CNTL), temp); | ||
162 | |||
163 | temp = in_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL)); | ||
164 | temp |= 0x00080000; | ||
165 | out_le32((u32 *)(bridge_base + MV64x60_GPP_IO_CNTL), temp); | ||
166 | |||
167 | out_le32((u32 *)(bridge_base + MV64x60_GPP_VALUE_SET), | ||
168 | 0x00080004); | ||
169 | } | ||
170 | |||
171 | for (;;); | ||
172 | } | ||
173 | |||
174 | static bd_t bd; | ||
175 | |||
176 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
177 | unsigned long r6, unsigned long r7) | ||
178 | { | ||
179 | CUBOOT_INIT(); | ||
180 | |||
181 | fdt_init(_dtb_start); | ||
182 | |||
183 | bridge_base = mv64x60_get_bridge_base(); | ||
184 | |||
185 | platform_ops.fixups = c2k_fixups; | ||
186 | platform_ops.exit = c2k_reset; | ||
187 | |||
188 | if (serial_console_init() < 0) | ||
189 | exit(); | ||
190 | } | ||
diff --git a/arch/powerpc/boot/cuboot-sam440ep.c b/arch/powerpc/boot/cuboot-sam440ep.c new file mode 100644 index 000000000000..ec10a47460dd --- /dev/null +++ b/arch/powerpc/boot/cuboot-sam440ep.c | |||
@@ -0,0 +1,49 @@ | |||
1 | /* | ||
2 | * Old U-boot compatibility for Sam440ep based off bamboo.c code | ||
3 | * original copyrights below | ||
4 | * | ||
5 | * Author: Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
6 | * | ||
7 | * Copyright 2007 IBM Corporation | ||
8 | * | ||
9 | * Based on cuboot-ebony.c | ||
10 | * | ||
11 | * Modified from cuboot-bamboo.c for sam440ep: | ||
12 | * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> | ||
13 | * | ||
14 | * This program is free software; you can redistribute it and/or modify it | ||
15 | * under the terms of the GNU General Public License version 2 as published | ||
16 | * by the Free Software Foundation. | ||
17 | */ | ||
18 | |||
19 | #include "ops.h" | ||
20 | #include "stdio.h" | ||
21 | #include "44x.h" | ||
22 | #include "4xx.h" | ||
23 | #include "cuboot.h" | ||
24 | |||
25 | #define TARGET_4xx | ||
26 | #define TARGET_44x | ||
27 | #include "ppcboot.h" | ||
28 | |||
29 | static bd_t bd; | ||
30 | |||
31 | static void sam440ep_fixups(void) | ||
32 | { | ||
33 | unsigned long sysclk = 66666666; | ||
34 | |||
35 | ibm440ep_fixup_clocks(sysclk, 11059200, 25000000); | ||
36 | ibm4xx_sdram_fixup_memsize(); | ||
37 | ibm4xx_quiesce_eth((u32 *)0xef600e00, (u32 *)0xef600f00); | ||
38 | dt_fixup_mac_addresses(&bd.bi_enetaddr, &bd.bi_enet1addr); | ||
39 | } | ||
40 | |||
41 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
42 | unsigned long r6, unsigned long r7) | ||
43 | { | ||
44 | CUBOOT_INIT(); | ||
45 | platform_ops.fixups = sam440ep_fixups; | ||
46 | platform_ops.exit = ibm44x_dbcr_reset; | ||
47 | fdt_init(_dtb_start); | ||
48 | serial_console_init(); | ||
49 | } | ||
diff --git a/arch/powerpc/boot/cuboot-warp.c b/arch/powerpc/boot/cuboot-warp.c index eb108a877492..21780210057d 100644 --- a/arch/powerpc/boot/cuboot-warp.c +++ b/arch/powerpc/boot/cuboot-warp.c | |||
@@ -10,6 +10,7 @@ | |||
10 | #include "ops.h" | 10 | #include "ops.h" |
11 | #include "4xx.h" | 11 | #include "4xx.h" |
12 | #include "cuboot.h" | 12 | #include "cuboot.h" |
13 | #include "stdio.h" | ||
13 | 14 | ||
14 | #define TARGET_4xx | 15 | #define TARGET_4xx |
15 | #define TARGET_44x | 16 | #define TARGET_44x |
@@ -17,14 +18,54 @@ | |||
17 | 18 | ||
18 | static bd_t bd; | 19 | static bd_t bd; |
19 | 20 | ||
20 | static void warp_fixups(void) | 21 | static void warp_fixup_one_nor(u32 from, u32 to) |
21 | { | 22 | { |
22 | unsigned long sysclk = 66000000; | 23 | void *devp; |
24 | char name[50]; | ||
25 | u32 v[2]; | ||
26 | |||
27 | sprintf(name, "/plb/opb/ebc/nor_flash@0,0/partition@%x", from); | ||
28 | |||
29 | devp = finddevice(name); | ||
30 | if (!devp) | ||
31 | return; | ||
32 | |||
33 | if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { | ||
34 | v[0] = to; | ||
35 | setprop(devp, "reg", v, sizeof(v)); | ||
36 | |||
37 | printf("NOR 64M fixup %x -> %x\r\n", from, to); | ||
38 | } | ||
39 | } | ||
40 | |||
23 | 41 | ||
24 | ibm440ep_fixup_clocks(sysclk, 11059200, 50000000); | 42 | static void warp_fixups(void) |
43 | { | ||
44 | ibm440ep_fixup_clocks(66000000, 11059200, 50000000); | ||
25 | ibm4xx_sdram_fixup_memsize(); | 45 | ibm4xx_sdram_fixup_memsize(); |
26 | ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); | 46 | ibm4xx_fixup_ebc_ranges("/plb/opb/ebc"); |
27 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); | 47 | dt_fixup_mac_address_by_alias("ethernet0", bd.bi_enetaddr); |
48 | |||
49 | /* Fixup for 64M flash on Rev A boards. */ | ||
50 | if (bd.bi_flashsize == 0x4000000) { | ||
51 | void *devp; | ||
52 | u32 v[3]; | ||
53 | |||
54 | devp = finddevice("/plb/opb/ebc/nor_flash@0,0"); | ||
55 | if (!devp) | ||
56 | return; | ||
57 | |||
58 | /* Fixup the size */ | ||
59 | if (getprop(devp, "reg", v, sizeof(v)) == sizeof(v)) { | ||
60 | v[2] = bd.bi_flashsize; | ||
61 | setprop(devp, "reg", v, sizeof(v)); | ||
62 | } | ||
63 | |||
64 | /* Fixup parition offsets */ | ||
65 | warp_fixup_one_nor(0x300000, 0x3f00000); | ||
66 | warp_fixup_one_nor(0x340000, 0x3f40000); | ||
67 | warp_fixup_one_nor(0x380000, 0x3f80000); | ||
68 | } | ||
28 | } | 69 | } |
29 | 70 | ||
30 | 71 | ||
diff --git a/arch/powerpc/boot/dts/asp834x-redboot.dts b/arch/powerpc/boot/dts/asp834x-redboot.dts new file mode 100644 index 000000000000..8b1bb0e41905 --- /dev/null +++ b/arch/powerpc/boot/dts/asp834x-redboot.dts | |||
@@ -0,0 +1,282 @@ | |||
1 | /* | ||
2 | * Analogue & Micro ASP8347 Device Tree Source | ||
3 | * | ||
4 | * Copyright 2008 Codehermit | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify it | ||
7 | * under the terms of the GNU General Public License as published by the | ||
8 | * Free Software Foundation; either version 2 of the License, or (at your | ||
9 | * option) any later version. | ||
10 | */ | ||
11 | |||
12 | /dts-v1/; | ||
13 | |||
14 | / { | ||
15 | model = "Analogue & Micro ASP8347E"; | ||
16 | compatible = "analogue-and-micro,asp8347e"; | ||
17 | #address-cells = <1>; | ||
18 | #size-cells = <1>; | ||
19 | |||
20 | aliases { | ||
21 | ethernet0 = &enet0; | ||
22 | ethernet1 = &enet1; | ||
23 | serial0 = &serial0; | ||
24 | serial1 = &serial1; | ||
25 | }; | ||
26 | |||
27 | cpus { | ||
28 | #address-cells = <1>; | ||
29 | #size-cells = <0>; | ||
30 | |||
31 | PowerPC,8347@0 { | ||
32 | device_type = "cpu"; | ||
33 | reg = <0x0>; | ||
34 | d-cache-line-size = <32>; | ||
35 | i-cache-line-size = <32>; | ||
36 | d-cache-size = <32768>; | ||
37 | i-cache-size = <32768>; | ||
38 | timebase-frequency = <0>; // from bootloader | ||
39 | bus-frequency = <0>; // from bootloader | ||
40 | clock-frequency = <0>; // from bootloader | ||
41 | }; | ||
42 | }; | ||
43 | |||
44 | memory { | ||
45 | device_type = "memory"; | ||
46 | reg = <0x00000000 0x8000000>; // 128MB at 0 | ||
47 | }; | ||
48 | |||
49 | localbus@ff005000 { | ||
50 | #address-cells = <2>; | ||
51 | #size-cells = <1>; | ||
52 | compatible = "fsl,mpc8347e-localbus", | ||
53 | "fsl,pq2pro-localbus", | ||
54 | "simple-bus"; | ||
55 | reg = <0xff005000 0x1000>; | ||
56 | interrupts = <77 0x8>; | ||
57 | interrupt-parent = <&ipic>; | ||
58 | |||
59 | ranges = < | ||
60 | 0 0 0xf0000000 0x02000000 | ||
61 | >; | ||
62 | |||
63 | flash@0,0 { | ||
64 | compatible = "cfi-flash"; | ||
65 | reg = <0 0 0x02000000>; | ||
66 | bank-width = <2>; | ||
67 | device-width = <2>; | ||
68 | }; | ||
69 | }; | ||
70 | |||
71 | soc8349@ff000000 { | ||
72 | #address-cells = <1>; | ||
73 | #size-cells = <1>; | ||
74 | device_type = "soc"; | ||
75 | ranges = <0x0 0xff000000 0x00100000>; | ||
76 | reg = <0xff000000 0x00000200>; | ||
77 | bus-frequency = <0>; | ||
78 | |||
79 | wdt@200 { | ||
80 | device_type = "watchdog"; | ||
81 | compatible = "mpc83xx_wdt"; | ||
82 | reg = <0x200 0x100>; | ||
83 | }; | ||
84 | |||
85 | i2c@3000 { | ||
86 | #address-cells = <1>; | ||
87 | #size-cells = <0>; | ||
88 | cell-index = <0>; | ||
89 | compatible = "fsl-i2c"; | ||
90 | reg = <0x3000 0x100>; | ||
91 | interrupts = <14 0x8>; | ||
92 | interrupt-parent = <&ipic>; | ||
93 | dfsrr; | ||
94 | |||
95 | rtc@68 { | ||
96 | compatible = "dallas,ds1374"; | ||
97 | reg = <0x68>; | ||
98 | }; | ||
99 | }; | ||
100 | |||
101 | i2c@3100 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <0>; | ||
104 | cell-index = <1>; | ||
105 | compatible = "fsl-i2c"; | ||
106 | reg = <0x3100 0x100>; | ||
107 | interrupts = <15 0x8>; | ||
108 | interrupt-parent = <&ipic>; | ||
109 | dfsrr; | ||
110 | }; | ||
111 | |||
112 | spi@7000 { | ||
113 | cell-index = <0>; | ||
114 | compatible = "fsl,spi"; | ||
115 | reg = <0x7000 0x1000>; | ||
116 | interrupts = <16 0x8>; | ||
117 | interrupt-parent = <&ipic>; | ||
118 | mode = "cpu"; | ||
119 | }; | ||
120 | |||
121 | dma@82a8 { | ||
122 | #address-cells = <1>; | ||
123 | #size-cells = <1>; | ||
124 | compatible = "fsl,mpc8347-dma", "fsl,elo-dma"; | ||
125 | reg = <0x82a8 4>; | ||
126 | ranges = <0 0x8100 0x1a8>; | ||
127 | interrupt-parent = <&ipic>; | ||
128 | interrupts = <71 8>; | ||
129 | cell-index = <0>; | ||
130 | dma-channel@0 { | ||
131 | compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | ||
132 | reg = <0 0x80>; | ||
133 | interrupt-parent = <&ipic>; | ||
134 | interrupts = <71 8>; | ||
135 | }; | ||
136 | dma-channel@80 { | ||
137 | compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | ||
138 | reg = <0x80 0x80>; | ||
139 | interrupt-parent = <&ipic>; | ||
140 | interrupts = <71 8>; | ||
141 | }; | ||
142 | dma-channel@100 { | ||
143 | compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | ||
144 | reg = <0x100 0x80>; | ||
145 | interrupt-parent = <&ipic>; | ||
146 | interrupts = <71 8>; | ||
147 | }; | ||
148 | dma-channel@180 { | ||
149 | compatible = "fsl,mpc8347-dma-channel", "fsl,elo-dma-channel"; | ||
150 | reg = <0x180 0x28>; | ||
151 | interrupt-parent = <&ipic>; | ||
152 | interrupts = <71 8>; | ||
153 | }; | ||
154 | }; | ||
155 | |||
156 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ | ||
157 | /* port = 0 or 1 */ | ||
158 | usb@22000 { | ||
159 | compatible = "fsl-usb2-mph"; | ||
160 | reg = <0x22000 0x1000>; | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <0>; | ||
163 | interrupt-parent = <&ipic>; | ||
164 | interrupts = <39 0x8>; | ||
165 | phy_type = "ulpi"; | ||
166 | port1; | ||
167 | }; | ||
168 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | ||
169 | usb@23000 { | ||
170 | compatible = "fsl-usb2-dr"; | ||
171 | reg = <0x23000 0x1000>; | ||
172 | #address-cells = <1>; | ||
173 | #size-cells = <0>; | ||
174 | interrupt-parent = <&ipic>; | ||
175 | interrupts = <38 0x8>; | ||
176 | dr_mode = "otg"; | ||
177 | phy_type = "ulpi"; | ||
178 | }; | ||
179 | |||
180 | mdio@24520 { | ||
181 | #address-cells = <1>; | ||
182 | #size-cells = <0>; | ||
183 | compatible = "fsl,gianfar-mdio"; | ||
184 | reg = <0x24520 0x20>; | ||
185 | |||
186 | phy0: ethernet-phy@0 { | ||
187 | interrupt-parent = <&ipic>; | ||
188 | interrupts = <17 0x8>; | ||
189 | reg = <0x1>; | ||
190 | device_type = "ethernet-phy"; | ||
191 | }; | ||
192 | phy1: ethernet-phy@1 { | ||
193 | interrupt-parent = <&ipic>; | ||
194 | interrupts = <18 0x8>; | ||
195 | reg = <0x2>; | ||
196 | device_type = "ethernet-phy"; | ||
197 | }; | ||
198 | }; | ||
199 | |||
200 | enet0: ethernet@24000 { | ||
201 | cell-index = <0>; | ||
202 | device_type = "network"; | ||
203 | model = "TSEC"; | ||
204 | compatible = "gianfar"; | ||
205 | reg = <0x24000 0x1000>; | ||
206 | local-mac-address = [ 00 08 e5 11 32 33 ]; | ||
207 | interrupts = <32 0x8 33 0x8 34 0x8>; | ||
208 | interrupt-parent = <&ipic>; | ||
209 | phy-handle = <&phy0>; | ||
210 | linux,network-index = <0>; | ||
211 | }; | ||
212 | |||
213 | enet1: ethernet@25000 { | ||
214 | cell-index = <1>; | ||
215 | device_type = "network"; | ||
216 | model = "TSEC"; | ||
217 | compatible = "gianfar"; | ||
218 | reg = <0x25000 0x1000>; | ||
219 | local-mac-address = [ 00 08 e5 11 32 34 ]; | ||
220 | interrupts = <35 0x8 36 0x8 37 0x8>; | ||
221 | interrupt-parent = <&ipic>; | ||
222 | phy-handle = <&phy1>; | ||
223 | linux,network-index = <1>; | ||
224 | }; | ||
225 | |||
226 | serial0: serial@4500 { | ||
227 | cell-index = <0>; | ||
228 | device_type = "serial"; | ||
229 | compatible = "ns16550"; | ||
230 | reg = <0x4500 0x100>; | ||
231 | clock-frequency = <400000000>; | ||
232 | interrupts = <9 0x8>; | ||
233 | interrupt-parent = <&ipic>; | ||
234 | }; | ||
235 | |||
236 | serial1: serial@4600 { | ||
237 | cell-index = <1>; | ||
238 | device_type = "serial"; | ||
239 | compatible = "ns16550"; | ||
240 | reg = <0x4600 0x100>; | ||
241 | clock-frequency = <400000000>; | ||
242 | interrupts = <10 0x8>; | ||
243 | interrupt-parent = <&ipic>; | ||
244 | }; | ||
245 | |||
246 | /* May need to remove if on a part without crypto engine */ | ||
247 | crypto@30000 { | ||
248 | device_type = "crypto"; | ||
249 | model = "SEC2"; | ||
250 | compatible = "talitos"; | ||
251 | reg = <0x30000 0x10000>; | ||
252 | interrupts = <11 0x8>; | ||
253 | interrupt-parent = <&ipic>; | ||
254 | num-channels = <4>; | ||
255 | channel-fifo-len = <24>; | ||
256 | exec-units-mask = <0x0000007e>; | ||
257 | /* desc mask is for rev2.0, | ||
258 | * we need runtime fixup for >2.0 */ | ||
259 | descriptor-types-mask = <0x01010ebf>; | ||
260 | }; | ||
261 | |||
262 | /* IPIC | ||
263 | * interrupts cell = <intr #, sense> | ||
264 | * sense values match linux IORESOURCE_IRQ_* defines: | ||
265 | * sense == 8: Level, low assertion | ||
266 | * sense == 2: Edge, high-to-low change | ||
267 | */ | ||
268 | ipic: pic@700 { | ||
269 | interrupt-controller; | ||
270 | #address-cells = <0>; | ||
271 | #interrupt-cells = <2>; | ||
272 | reg = <0x700 0x100>; | ||
273 | device_type = "ipic"; | ||
274 | }; | ||
275 | }; | ||
276 | |||
277 | chosen { | ||
278 | bootargs = "console=ttyS0,38400 root=/dev/mtdblock3 rootfstype=jffs2"; | ||
279 | linux,stdout-path = &serial0; | ||
280 | }; | ||
281 | |||
282 | }; | ||
diff --git a/arch/powerpc/boot/dts/bamboo.dts b/arch/powerpc/boot/dts/bamboo.dts index ba2521bdaab1..6ce0cc2c0208 100644 --- a/arch/powerpc/boot/dts/bamboo.dts +++ b/arch/powerpc/boot/dts/bamboo.dts | |||
@@ -11,12 +11,14 @@ | |||
11 | * any warranty of any kind, whether express or implied. | 11 | * any warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | /dts-v1/; | ||
15 | |||
14 | / { | 16 | / { |
15 | #address-cells = <2>; | 17 | #address-cells = <2>; |
16 | #size-cells = <1>; | 18 | #size-cells = <1>; |
17 | model = "amcc,bamboo"; | 19 | model = "amcc,bamboo"; |
18 | compatible = "amcc,bamboo"; | 20 | compatible = "amcc,bamboo"; |
19 | dcr-parent = <&/cpus/cpu@0>; | 21 | dcr-parent = <&{/cpus/cpu@0}>; |
20 | 22 | ||
21 | aliases { | 23 | aliases { |
22 | ethernet0 = &EMAC0; | 24 | ethernet0 = &EMAC0; |
@@ -34,13 +36,13 @@ | |||
34 | cpu@0 { | 36 | cpu@0 { |
35 | device_type = "cpu"; | 37 | device_type = "cpu"; |
36 | model = "PowerPC,440EP"; | 38 | model = "PowerPC,440EP"; |
37 | reg = <0>; | 39 | reg = <0x00000000>; |
38 | clock-frequency = <0>; /* Filled in by zImage */ | 40 | clock-frequency = <0>; /* Filled in by zImage */ |
39 | timebase-frequency = <0>; /* Filled in by zImage */ | 41 | timebase-frequency = <0>; /* Filled in by zImage */ |
40 | i-cache-line-size = <20>; | 42 | i-cache-line-size = <32>; |
41 | d-cache-line-size = <20>; | 43 | d-cache-line-size = <32>; |
42 | i-cache-size = <8000>; | 44 | i-cache-size = <32768>; |
43 | d-cache-size = <8000>; | 45 | d-cache-size = <32768>; |
44 | dcr-controller; | 46 | dcr-controller; |
45 | dcr-access-method = "native"; | 47 | dcr-access-method = "native"; |
46 | }; | 48 | }; |
@@ -48,14 +50,14 @@ | |||
48 | 50 | ||
49 | memory { | 51 | memory { |
50 | device_type = "memory"; | 52 | device_type = "memory"; |
51 | reg = <0 0 0>; /* Filled in by zImage */ | 53 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
52 | }; | 54 | }; |
53 | 55 | ||
54 | UIC0: interrupt-controller0 { | 56 | UIC0: interrupt-controller0 { |
55 | compatible = "ibm,uic-440ep","ibm,uic"; | 57 | compatible = "ibm,uic-440ep","ibm,uic"; |
56 | interrupt-controller; | 58 | interrupt-controller; |
57 | cell-index = <0>; | 59 | cell-index = <0>; |
58 | dcr-reg = <0c0 009>; | 60 | dcr-reg = <0x0c0 0x009>; |
59 | #address-cells = <0>; | 61 | #address-cells = <0>; |
60 | #size-cells = <0>; | 62 | #size-cells = <0>; |
61 | #interrupt-cells = <2>; | 63 | #interrupt-cells = <2>; |
@@ -65,22 +67,22 @@ | |||
65 | compatible = "ibm,uic-440ep","ibm,uic"; | 67 | compatible = "ibm,uic-440ep","ibm,uic"; |
66 | interrupt-controller; | 68 | interrupt-controller; |
67 | cell-index = <1>; | 69 | cell-index = <1>; |
68 | dcr-reg = <0d0 009>; | 70 | dcr-reg = <0x0d0 0x009>; |
69 | #address-cells = <0>; | 71 | #address-cells = <0>; |
70 | #size-cells = <0>; | 72 | #size-cells = <0>; |
71 | #interrupt-cells = <2>; | 73 | #interrupt-cells = <2>; |
72 | interrupts = <1e 4 1f 4>; /* cascade */ | 74 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
73 | interrupt-parent = <&UIC0>; | 75 | interrupt-parent = <&UIC0>; |
74 | }; | 76 | }; |
75 | 77 | ||
76 | SDR0: sdr { | 78 | SDR0: sdr { |
77 | compatible = "ibm,sdr-440ep"; | 79 | compatible = "ibm,sdr-440ep"; |
78 | dcr-reg = <00e 002>; | 80 | dcr-reg = <0x00e 0x002>; |
79 | }; | 81 | }; |
80 | 82 | ||
81 | CPR0: cpr { | 83 | CPR0: cpr { |
82 | compatible = "ibm,cpr-440ep"; | 84 | compatible = "ibm,cpr-440ep"; |
83 | dcr-reg = <00c 002>; | 85 | dcr-reg = <0x00c 0x002>; |
84 | }; | 86 | }; |
85 | 87 | ||
86 | plb { | 88 | plb { |
@@ -92,29 +94,29 @@ | |||
92 | 94 | ||
93 | SDRAM0: sdram { | 95 | SDRAM0: sdram { |
94 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 96 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
95 | dcr-reg = <010 2>; | 97 | dcr-reg = <0x010 0x002>; |
96 | }; | 98 | }; |
97 | 99 | ||
98 | DMA0: dma { | 100 | DMA0: dma { |
99 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 101 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
100 | dcr-reg = <100 027>; | 102 | dcr-reg = <0x100 0x027>; |
101 | }; | 103 | }; |
102 | 104 | ||
103 | MAL0: mcmal { | 105 | MAL0: mcmal { |
104 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 106 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
105 | dcr-reg = <180 62>; | 107 | dcr-reg = <0x180 0x062>; |
106 | num-tx-chans = <4>; | 108 | num-tx-chans = <4>; |
107 | num-rx-chans = <2>; | 109 | num-rx-chans = <2>; |
108 | interrupt-parent = <&MAL0>; | 110 | interrupt-parent = <&MAL0>; |
109 | interrupts = <0 1 2 3 4>; | 111 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
110 | #interrupt-cells = <1>; | 112 | #interrupt-cells = <1>; |
111 | #address-cells = <0>; | 113 | #address-cells = <0>; |
112 | #size-cells = <0>; | 114 | #size-cells = <0>; |
113 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 115 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
114 | /*RXEOB*/ 1 &UIC0 b 4 | 116 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
115 | /*SERR*/ 2 &UIC1 0 4 | 117 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
116 | /*TXDE*/ 3 &UIC1 1 4 | 118 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
117 | /*RXDE*/ 4 &UIC1 2 4>; | 119 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
118 | }; | 120 | }; |
119 | 121 | ||
120 | POB0: opb { | 122 | POB0: opb { |
@@ -124,101 +126,101 @@ | |||
124 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 126 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
125 | * bits. | 127 | * bits. |
126 | */ | 128 | */ |
127 | ranges = <00000000 0 00000000 80000000 | 129 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
128 | 80000000 0 80000000 80000000>; | 130 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
129 | interrupt-parent = <&UIC1>; | 131 | interrupt-parent = <&UIC1>; |
130 | interrupts = <7 4>; | 132 | interrupts = <0x7 0x4>; |
131 | clock-frequency = <0>; /* Filled in by zImage */ | 133 | clock-frequency = <0>; /* Filled in by zImage */ |
132 | 134 | ||
133 | EBC0: ebc { | 135 | EBC0: ebc { |
134 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 136 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
135 | dcr-reg = <012 2>; | 137 | dcr-reg = <0x012 0x002>; |
136 | #address-cells = <2>; | 138 | #address-cells = <2>; |
137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
138 | clock-frequency = <0>; /* Filled in by zImage */ | 140 | clock-frequency = <0>; /* Filled in by zImage */ |
139 | interrupts = <5 1>; | 141 | interrupts = <0x5 0x1>; |
140 | interrupt-parent = <&UIC1>; | 142 | interrupt-parent = <&UIC1>; |
141 | }; | 143 | }; |
142 | 144 | ||
143 | UART0: serial@ef600300 { | 145 | UART0: serial@ef600300 { |
144 | device_type = "serial"; | 146 | device_type = "serial"; |
145 | compatible = "ns16550"; | 147 | compatible = "ns16550"; |
146 | reg = <ef600300 8>; | 148 | reg = <0xef600300 0x00000008>; |
147 | virtual-reg = <ef600300>; | 149 | virtual-reg = <0xef600300>; |
148 | clock-frequency = <0>; /* Filled in by zImage */ | 150 | clock-frequency = <0>; /* Filled in by zImage */ |
149 | current-speed = <1c200>; | 151 | current-speed = <115200>; |
150 | interrupt-parent = <&UIC0>; | 152 | interrupt-parent = <&UIC0>; |
151 | interrupts = <0 4>; | 153 | interrupts = <0x0 0x4>; |
152 | }; | 154 | }; |
153 | 155 | ||
154 | UART1: serial@ef600400 { | 156 | UART1: serial@ef600400 { |
155 | device_type = "serial"; | 157 | device_type = "serial"; |
156 | compatible = "ns16550"; | 158 | compatible = "ns16550"; |
157 | reg = <ef600400 8>; | 159 | reg = <0xef600400 0x00000008>; |
158 | virtual-reg = <ef600400>; | 160 | virtual-reg = <0xef600400>; |
159 | clock-frequency = <0>; | 161 | clock-frequency = <0>; |
160 | current-speed = <0>; | 162 | current-speed = <0>; |
161 | interrupt-parent = <&UIC0>; | 163 | interrupt-parent = <&UIC0>; |
162 | interrupts = <1 4>; | 164 | interrupts = <0x1 0x4>; |
163 | }; | 165 | }; |
164 | 166 | ||
165 | UART2: serial@ef600500 { | 167 | UART2: serial@ef600500 { |
166 | device_type = "serial"; | 168 | device_type = "serial"; |
167 | compatible = "ns16550"; | 169 | compatible = "ns16550"; |
168 | reg = <ef600500 8>; | 170 | reg = <0xef600500 0x00000008>; |
169 | virtual-reg = <ef600500>; | 171 | virtual-reg = <0xef600500>; |
170 | clock-frequency = <0>; | 172 | clock-frequency = <0>; |
171 | current-speed = <0>; | 173 | current-speed = <0>; |
172 | interrupt-parent = <&UIC0>; | 174 | interrupt-parent = <&UIC0>; |
173 | interrupts = <3 4>; | 175 | interrupts = <0x3 0x4>; |
174 | }; | 176 | }; |
175 | 177 | ||
176 | UART3: serial@ef600600 { | 178 | UART3: serial@ef600600 { |
177 | device_type = "serial"; | 179 | device_type = "serial"; |
178 | compatible = "ns16550"; | 180 | compatible = "ns16550"; |
179 | reg = <ef600600 8>; | 181 | reg = <0xef600600 0x00000008>; |
180 | virtual-reg = <ef600600>; | 182 | virtual-reg = <0xef600600>; |
181 | clock-frequency = <0>; | 183 | clock-frequency = <0>; |
182 | current-speed = <0>; | 184 | current-speed = <0>; |
183 | interrupt-parent = <&UIC0>; | 185 | interrupt-parent = <&UIC0>; |
184 | interrupts = <4 4>; | 186 | interrupts = <0x4 0x4>; |
185 | }; | 187 | }; |
186 | 188 | ||
187 | IIC0: i2c@ef600700 { | 189 | IIC0: i2c@ef600700 { |
188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 190 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
189 | reg = <ef600700 14>; | 191 | reg = <0xef600700 0x00000014>; |
190 | interrupt-parent = <&UIC0>; | 192 | interrupt-parent = <&UIC0>; |
191 | interrupts = <2 4>; | 193 | interrupts = <0x2 0x4>; |
192 | }; | 194 | }; |
193 | 195 | ||
194 | IIC1: i2c@ef600800 { | 196 | IIC1: i2c@ef600800 { |
195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 197 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
196 | reg = <ef600800 14>; | 198 | reg = <0xef600800 0x00000014>; |
197 | interrupt-parent = <&UIC0>; | 199 | interrupt-parent = <&UIC0>; |
198 | interrupts = <7 4>; | 200 | interrupts = <0x7 0x4>; |
199 | }; | 201 | }; |
200 | 202 | ||
201 | ZMII0: emac-zmii@ef600d00 { | 203 | ZMII0: emac-zmii@ef600d00 { |
202 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 204 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
203 | reg = <ef600d00 c>; | 205 | reg = <0xef600d00 0x0000000c>; |
204 | }; | 206 | }; |
205 | 207 | ||
206 | EMAC0: ethernet@ef600e00 { | 208 | EMAC0: ethernet@ef600e00 { |
207 | device_type = "network"; | 209 | device_type = "network"; |
208 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 210 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
209 | interrupt-parent = <&UIC1>; | 211 | interrupt-parent = <&UIC1>; |
210 | interrupts = <1c 4 1d 4>; | 212 | interrupts = <0x1c 0x4 0x1d 0x4>; |
211 | reg = <ef600e00 70>; | 213 | reg = <0xef600e00 0x00000070>; |
212 | local-mac-address = [000000000000]; | 214 | local-mac-address = [000000000000]; |
213 | mal-device = <&MAL0>; | 215 | mal-device = <&MAL0>; |
214 | mal-tx-channel = <0 1>; | 216 | mal-tx-channel = <0 1>; |
215 | mal-rx-channel = <0>; | 217 | mal-rx-channel = <0>; |
216 | cell-index = <0>; | 218 | cell-index = <0>; |
217 | max-frame-size = <5dc>; | 219 | max-frame-size = <1500>; |
218 | rx-fifo-size = <1000>; | 220 | rx-fifo-size = <4096>; |
219 | tx-fifo-size = <800>; | 221 | tx-fifo-size = <2048>; |
220 | phy-mode = "rmii"; | 222 | phy-mode = "rmii"; |
221 | phy-map = <00000000>; | 223 | phy-map = <0x00000000>; |
222 | zmii-device = <&ZMII0>; | 224 | zmii-device = <&ZMII0>; |
223 | zmii-channel = <0>; | 225 | zmii-channel = <0>; |
224 | }; | 226 | }; |
@@ -227,26 +229,26 @@ | |||
227 | device_type = "network"; | 229 | device_type = "network"; |
228 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 230 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
229 | interrupt-parent = <&UIC1>; | 231 | interrupt-parent = <&UIC1>; |
230 | interrupts = <1e 4 1f 4>; | 232 | interrupts = <0x1e 0x4 0x1f 0x4>; |
231 | reg = <ef600f00 70>; | 233 | reg = <0xef600f00 0x00000070>; |
232 | local-mac-address = [000000000000]; | 234 | local-mac-address = [000000000000]; |
233 | mal-device = <&MAL0>; | 235 | mal-device = <&MAL0>; |
234 | mal-tx-channel = <2 3>; | 236 | mal-tx-channel = <2 3>; |
235 | mal-rx-channel = <1>; | 237 | mal-rx-channel = <1>; |
236 | cell-index = <1>; | 238 | cell-index = <1>; |
237 | max-frame-size = <5dc>; | 239 | max-frame-size = <1500>; |
238 | rx-fifo-size = <1000>; | 240 | rx-fifo-size = <4096>; |
239 | tx-fifo-size = <800>; | 241 | tx-fifo-size = <2048>; |
240 | phy-mode = "rmii"; | 242 | phy-mode = "rmii"; |
241 | phy-map = <00000000>; | 243 | phy-map = <0x00000000>; |
242 | zmii-device = <&ZMII0>; | 244 | zmii-device = <&ZMII0>; |
243 | zmii-channel = <1>; | 245 | zmii-channel = <1>; |
244 | }; | 246 | }; |
245 | 247 | ||
246 | usb@ef601000 { | 248 | usb@ef601000 { |
247 | compatible = "ohci-be"; | 249 | compatible = "ohci-be"; |
248 | reg = <ef601000 80>; | 250 | reg = <0xef601000 0x00000080>; |
249 | interrupts = <8 1 9 1>; | 251 | interrupts = <0x8 0x1 0x9 0x1>; |
250 | interrupt-parent = < &UIC1 >; | 252 | interrupt-parent = < &UIC1 >; |
251 | }; | 253 | }; |
252 | }; | 254 | }; |
@@ -258,35 +260,35 @@ | |||
258 | #address-cells = <3>; | 260 | #address-cells = <3>; |
259 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 261 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
260 | primary; | 262 | primary; |
261 | reg = <0 eec00000 8 /* Config space access */ | 263 | reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ |
262 | 0 eed00000 4 /* IACK */ | 264 | 0x00000000 0xeed00000 0x00000004 /* IACK */ |
263 | 0 eed00000 4 /* Special cycle */ | 265 | 0x00000000 0xeed00000 0x00000004 /* Special cycle */ |
264 | 0 ef400000 40>; /* Internal registers */ | 266 | 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
265 | 267 | ||
266 | /* Outbound ranges, one memory and one IO, | 268 | /* Outbound ranges, one memory and one IO, |
267 | * later cannot be changed. Chip supports a second | 269 | * later cannot be changed. Chip supports a second |
268 | * IO range but we don't use it for now | 270 | * IO range but we don't use it for now |
269 | */ | 271 | */ |
270 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | 272 | ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 |
271 | 01000000 0 00000000 0 e8000000 0 00010000>; | 273 | 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
272 | 274 | ||
273 | /* Inbound 2GB range starting at 0 */ | 275 | /* Inbound 2GB range starting at 0 */ |
274 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 276 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
275 | 277 | ||
276 | /* Bamboo has all 4 IRQ pins tied together per slot */ | 278 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
277 | interrupt-map-mask = <f800 0 0 0>; | 279 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
278 | interrupt-map = < | 280 | interrupt-map = < |
279 | /* IDSEL 1 */ | 281 | /* IDSEL 1 */ |
280 | 0800 0 0 0 &UIC0 1c 8 | 282 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
281 | 283 | ||
282 | /* IDSEL 2 */ | 284 | /* IDSEL 2 */ |
283 | 1000 0 0 0 &UIC0 1b 8 | 285 | 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
284 | 286 | ||
285 | /* IDSEL 3 */ | 287 | /* IDSEL 3 */ |
286 | 1800 0 0 0 &UIC0 1a 8 | 288 | 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
287 | 289 | ||
288 | /* IDSEL 4 */ | 290 | /* IDSEL 4 */ |
289 | 2000 0 0 0 &UIC0 19 8 | 291 | 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
290 | >; | 292 | >; |
291 | }; | 293 | }; |
292 | }; | 294 | }; |
diff --git a/arch/powerpc/boot/dts/c2k.dts b/arch/powerpc/boot/dts/c2k.dts new file mode 100644 index 000000000000..f5d625fa3e52 --- /dev/null +++ b/arch/powerpc/boot/dts/c2k.dts | |||
@@ -0,0 +1,371 @@ | |||
1 | /* Device Tree Source for GEFanuc C2K | ||
2 | * | ||
3 | * Author: Remi Machet <rmachet@slac.stanford.edu> | ||
4 | * | ||
5 | * Originated from prpmc2800.dts | ||
6 | * | ||
7 | * 2008 (c) Stanford University | ||
8 | * 2007 (c) MontaVista, Software, Inc. | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License version 2 as published | ||
12 | * by the Free Software Foundation. | ||
13 | */ | ||
14 | |||
15 | /dts-v1/; | ||
16 | |||
17 | / { | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | model = "C2K"; | ||
21 | compatible = "GEFanuc,C2K"; | ||
22 | coherency-off; | ||
23 | |||
24 | aliases { | ||
25 | pci0 = &PCI0; | ||
26 | pci1 = &PCI1; | ||
27 | }; | ||
28 | |||
29 | cpus { | ||
30 | #address-cells = <1>; | ||
31 | #size-cells = <0>; | ||
32 | |||
33 | cpu@0 { | ||
34 | device_type = "cpu"; | ||
35 | compatible = "PowerPC,7447"; | ||
36 | reg = <0>; | ||
37 | clock-frequency = <996000000>; /* 996 MHz */ | ||
38 | bus-frequency = <166666667>; /* 166.6666 MHz */ | ||
39 | timebase-frequency = <41666667>; /* 166.6666/4 MHz */ | ||
40 | i-cache-line-size = <32>; | ||
41 | d-cache-line-size = <32>; | ||
42 | i-cache-size = <32768>; | ||
43 | d-cache-size = <32768>; | ||
44 | }; | ||
45 | }; | ||
46 | |||
47 | memory { | ||
48 | device_type = "memory"; | ||
49 | reg = <0x00000000 0x40000000>; /* 1GB */ | ||
50 | }; | ||
51 | |||
52 | system-controller@d8000000 { /* Marvell Discovery */ | ||
53 | #address-cells = <1>; | ||
54 | #size-cells = <1>; | ||
55 | model = "mv64460"; | ||
56 | compatible = "marvell,mv64360"; | ||
57 | clock-frequency = <166666667>; /* 166.66... MHz */ | ||
58 | reg = <0xd8000000 0x00010000>; | ||
59 | virtual-reg = <0xd8000000>; | ||
60 | ranges = <0xd4000000 0xd4000000 0x01000000 /* PCI 0 I/O Space */ | ||
61 | 0x80000000 0x80000000 0x08000000 /* PCI 0 MEM Space */ | ||
62 | 0xd0000000 0xd0000000 0x01000000 /* PCI 1 I/O Space */ | ||
63 | 0xa0000000 0xa0000000 0x08000000 /* PCI 1 MEM Space */ | ||
64 | 0xd8100000 0xd8100000 0x00010000 /* FPGA */ | ||
65 | 0xd8110000 0xd8110000 0x00010000 /* FPGA USARTs */ | ||
66 | 0xf8000000 0xf8000000 0x08000000 /* User FLASH */ | ||
67 | 0x00000000 0xd8000000 0x00010000 /* Bridge's regs */ | ||
68 | 0xd8140000 0xd8140000 0x00040000>; /* Integrated SRAM */ | ||
69 | |||
70 | mdio@2000 { | ||
71 | #address-cells = <1>; | ||
72 | #size-cells = <0>; | ||
73 | compatible = "marvell,mv64360-mdio"; | ||
74 | reg = <0x2000 4>; | ||
75 | PHY0: ethernet-phy@0 { | ||
76 | device_type = "ethernet-phy"; | ||
77 | interrupts = <76>; /* GPP 12 */ | ||
78 | interrupt-parent = <&PIC>; | ||
79 | reg = <0>; | ||
80 | }; | ||
81 | PHY1: ethernet-phy@1 { | ||
82 | device_type = "ethernet-phy"; | ||
83 | interrupts = <76>; /* GPP 12 */ | ||
84 | interrupt-parent = <&PIC>; | ||
85 | reg = <1>; | ||
86 | }; | ||
87 | PHY2: ethernet-phy@2 { | ||
88 | device_type = "ethernet-phy"; | ||
89 | interrupts = <76>; /* GPP 12 */ | ||
90 | interrupt-parent = <&PIC>; | ||
91 | reg = <2>; | ||
92 | }; | ||
93 | }; | ||
94 | |||
95 | ethernet-group@2000 { | ||
96 | #address-cells = <1>; | ||
97 | #size-cells = <0>; | ||
98 | compatible = "marvell,mv64360-eth-group"; | ||
99 | reg = <0x2000 0x2000>; | ||
100 | ethernet@0 { | ||
101 | device_type = "network"; | ||
102 | compatible = "marvell,mv64360-eth"; | ||
103 | reg = <0>; | ||
104 | interrupts = <32>; | ||
105 | interrupt-parent = <&PIC>; | ||
106 | phy = <&PHY0>; | ||
107 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
108 | }; | ||
109 | ethernet@1 { | ||
110 | device_type = "network"; | ||
111 | compatible = "marvell,mv64360-eth"; | ||
112 | reg = <1>; | ||
113 | interrupts = <33>; | ||
114 | interrupt-parent = <&PIC>; | ||
115 | phy = <&PHY1>; | ||
116 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
117 | }; | ||
118 | ethernet@2 { | ||
119 | device_type = "network"; | ||
120 | compatible = "marvell,mv64360-eth"; | ||
121 | reg = <2>; | ||
122 | interrupts = <34>; | ||
123 | interrupt-parent = <&PIC>; | ||
124 | phy = <&PHY2>; | ||
125 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
126 | }; | ||
127 | }; | ||
128 | |||
129 | SDMA0: sdma@4000 { | ||
130 | compatible = "marvell,mv64360-sdma"; | ||
131 | reg = <0x4000 0xc18>; | ||
132 | virtual-reg = <0xd8004000>; | ||
133 | interrupt-base = <0>; | ||
134 | interrupts = <36>; | ||
135 | interrupt-parent = <&PIC>; | ||
136 | }; | ||
137 | |||
138 | SDMA1: sdma@6000 { | ||
139 | compatible = "marvell,mv64360-sdma"; | ||
140 | reg = <0x6000 0xc18>; | ||
141 | virtual-reg = <0xd8006000>; | ||
142 | interrupt-base = <0>; | ||
143 | interrupts = <38>; | ||
144 | interrupt-parent = <&PIC>; | ||
145 | }; | ||
146 | |||
147 | BRG0: brg@b200 { | ||
148 | compatible = "marvell,mv64360-brg"; | ||
149 | reg = <0xb200 0x8>; | ||
150 | clock-src = <8>; | ||
151 | clock-frequency = <133333333>; | ||
152 | current-speed = <115200>; | ||
153 | }; | ||
154 | |||
155 | BRG1: brg@b208 { | ||
156 | compatible = "marvell,mv64360-brg"; | ||
157 | reg = <0xb208 0x8>; | ||
158 | clock-src = <8>; | ||
159 | clock-frequency = <133333333>; | ||
160 | current-speed = <115200>; | ||
161 | }; | ||
162 | |||
163 | CUNIT: cunit@f200 { | ||
164 | reg = <0xf200 0x200>; | ||
165 | }; | ||
166 | |||
167 | MPSCROUTING: mpscrouting@b400 { | ||
168 | reg = <0xb400 0xc>; | ||
169 | }; | ||
170 | |||
171 | MPSCINTR: mpscintr@b800 { | ||
172 | reg = <0xb800 0x100>; | ||
173 | virtual-reg = <0xd800b800>; | ||
174 | }; | ||
175 | |||
176 | MPSC0: mpsc@8000 { | ||
177 | device_type = "serial"; | ||
178 | compatible = "marvell,mv64360-mpsc"; | ||
179 | reg = <0x8000 0x38>; | ||
180 | virtual-reg = <0xd8008000>; | ||
181 | sdma = <&SDMA0>; | ||
182 | brg = <&BRG0>; | ||
183 | cunit = <&CUNIT>; | ||
184 | mpscrouting = <&MPSCROUTING>; | ||
185 | mpscintr = <&MPSCINTR>; | ||
186 | cell-index = <0>; | ||
187 | interrupts = <40>; | ||
188 | interrupt-parent = <&PIC>; | ||
189 | }; | ||
190 | |||
191 | MPSC1: mpsc@9000 { | ||
192 | device_type = "serial"; | ||
193 | compatible = "marvell,mv64360-mpsc"; | ||
194 | reg = <0x9000 0x38>; | ||
195 | virtual-reg = <0xd8009000>; | ||
196 | sdma = <&SDMA1>; | ||
197 | brg = <&BRG1>; | ||
198 | cunit = <&CUNIT>; | ||
199 | mpscrouting = <&MPSCROUTING>; | ||
200 | mpscintr = <&MPSCINTR>; | ||
201 | cell-index = <1>; | ||
202 | interrupts = <42>; | ||
203 | interrupt-parent = <&PIC>; | ||
204 | }; | ||
205 | |||
206 | wdt@b410 { /* watchdog timer */ | ||
207 | compatible = "marvell,mv64360-wdt"; | ||
208 | reg = <0xb410 0x8>; | ||
209 | }; | ||
210 | |||
211 | i2c@c000 { | ||
212 | compatible = "marvell,mv64360-i2c"; | ||
213 | reg = <0xc000 0x20>; | ||
214 | virtual-reg = <0xd800c000>; | ||
215 | interrupts = <37>; | ||
216 | interrupt-parent = <&PIC>; | ||
217 | }; | ||
218 | |||
219 | PIC: pic { | ||
220 | #interrupt-cells = <1>; | ||
221 | #address-cells = <0>; | ||
222 | compatible = "marvell,mv64360-pic"; | ||
223 | reg = <0x0000 0x88>; | ||
224 | interrupt-controller; | ||
225 | }; | ||
226 | |||
227 | mpp@f000 { | ||
228 | compatible = "marvell,mv64360-mpp"; | ||
229 | reg = <0xf000 0x10>; | ||
230 | }; | ||
231 | |||
232 | gpp@f100 { | ||
233 | compatible = "marvell,mv64360-gpp"; | ||
234 | reg = <0xf100 0x20>; | ||
235 | }; | ||
236 | |||
237 | PCI0: pci@80000000 { | ||
238 | #address-cells = <3>; | ||
239 | #size-cells = <2>; | ||
240 | #interrupt-cells = <1>; | ||
241 | device_type = "pci"; | ||
242 | compatible = "marvell,mv64360-pci"; | ||
243 | reg = <0x0cf8 0x8>; | ||
244 | ranges = <0x01000000 0x0 0x00000000 0xd4000000 0x0 0x01000000 | ||
245 | 0x02000000 0x0 0x80000000 0x80000000 0x0 0x08000000>; | ||
246 | bus-range = <0 255>; | ||
247 | clock-frequency = <66000000>; | ||
248 | interrupt-pci-iack = <0x0c34>; | ||
249 | interrupt-parent = <&PIC>; | ||
250 | interrupt-map-mask = <0x0000 0x0 0x0 0x7>; | ||
251 | interrupt-map = < | ||
252 | /* Only one interrupt line for PMC0 slot (INTA) */ | ||
253 | 0x0000 0 0 1 &PIC 88 | ||
254 | >; | ||
255 | }; | ||
256 | |||
257 | |||
258 | PCI1: pci@a0000000 { | ||
259 | #address-cells = <3>; | ||
260 | #size-cells = <2>; | ||
261 | #interrupt-cells = <1>; | ||
262 | device_type = "pci"; | ||
263 | compatible = "marvell,mv64360-pci"; | ||
264 | reg = <0x0c78 0x8>; | ||
265 | ranges = <0x01000000 0x0 0x00000000 0xd0000000 0x0 0x01000000 | ||
266 | 0x02000000 0x0 0x80000000 0xa0000000 0x0 0x08000000>; | ||
267 | bus-range = <0 255>; | ||
268 | clock-frequency = <66000000>; | ||
269 | interrupt-pci-iack = <0x0cb4>; | ||
270 | interrupt-parent = <&PIC>; | ||
271 | interrupt-map-mask = <0xf800 0x00 0x00 0x7>; | ||
272 | interrupt-map = < | ||
273 | /* IDSEL 0x01: PMC1 ? */ | ||
274 | 0x0800 0 0 1 &PIC 88 | ||
275 | /* IDSEL 0x02: cPCI bridge */ | ||
276 | 0x1000 0 0 1 &PIC 88 | ||
277 | /* IDSEL 0x03: USB controller */ | ||
278 | 0x1800 0 0 1 &PIC 91 | ||
279 | /* IDSEL 0x04: SATA controller */ | ||
280 | 0x2000 0 0 1 &PIC 95 | ||
281 | >; | ||
282 | }; | ||
283 | |||
284 | cpu-error@0070 { | ||
285 | compatible = "marvell,mv64360-cpu-error"; | ||
286 | reg = <0x0070 0x10 0x0128 0x28>; | ||
287 | interrupts = <3>; | ||
288 | interrupt-parent = <&PIC>; | ||
289 | }; | ||
290 | |||
291 | sram-ctrl@0380 { | ||
292 | compatible = "marvell,mv64360-sram-ctrl"; | ||
293 | reg = <0x0380 0x80>; | ||
294 | interrupts = <13>; | ||
295 | interrupt-parent = <&PIC>; | ||
296 | }; | ||
297 | |||
298 | pci-error@1d40 { | ||
299 | compatible = "marvell,mv64360-pci-error"; | ||
300 | reg = <0x1d40 0x40 0x0c28 0x4>; | ||
301 | interrupts = <12>; | ||
302 | interrupt-parent = <&PIC>; | ||
303 | }; | ||
304 | |||
305 | pci-error@1dc0 { | ||
306 | compatible = "marvell,mv64360-pci-error"; | ||
307 | reg = <0x1dc0 0x40 0x0ca8 0x4>; | ||
308 | interrupts = <16>; | ||
309 | interrupt-parent = <&PIC>; | ||
310 | }; | ||
311 | |||
312 | mem-ctrl@1400 { | ||
313 | compatible = "marvell,mv64360-mem-ctrl"; | ||
314 | reg = <0x1400 0x60>; | ||
315 | interrupts = <17>; | ||
316 | interrupt-parent = <&PIC>; | ||
317 | }; | ||
318 | /* Devices attached to the device controller */ | ||
319 | devicebus@045c { | ||
320 | #address-cells = <2>; | ||
321 | #size-cells = <1>; | ||
322 | compatible = "marvell,mv64306-devctrl"; | ||
323 | reg = <0x45C 0x88>; | ||
324 | interrupts = <1>; | ||
325 | interrupt-parent = <&PIC>; | ||
326 | ranges = <0 0 0xd8100000 0x10000 | ||
327 | 2 0 0xd8110000 0x10000 | ||
328 | 4 0 0xf8000000 0x8000000>; | ||
329 | fpga@0,0 { | ||
330 | compatible = "sbs,fpga-c2k"; | ||
331 | reg = <0 0 0x10000>; | ||
332 | }; | ||
333 | fpga_usart@2,0 { | ||
334 | compatible = "sbs,fpga_usart-c2k"; | ||
335 | reg = <2 0 0x10000>; | ||
336 | }; | ||
337 | nor_flash@4,0 { | ||
338 | compatible = "cfi-flash"; | ||
339 | reg = <4 0 0x8000000>; /* 128MB */ | ||
340 | bank-width = <4>; | ||
341 | device-width = <1>; | ||
342 | #address-cells = <1>; | ||
343 | #size-cells = <1>; | ||
344 | partition@0 { | ||
345 | label = "boot"; | ||
346 | reg = <0x00000000 0x00080000>; | ||
347 | }; | ||
348 | partition@40000 { | ||
349 | label = "kernel"; | ||
350 | reg = <0x00080000 0x00400000>; | ||
351 | }; | ||
352 | partition@440000 { | ||
353 | label = "initrd"; | ||
354 | reg = <0x00480000 0x00B80000>; | ||
355 | }; | ||
356 | partition@1000000 { | ||
357 | label = "rootfs"; | ||
358 | reg = <0x01000000 0x06800000>; | ||
359 | }; | ||
360 | partition@7800000 { | ||
361 | label = "recovery"; | ||
362 | reg = <0x07800000 0x00800000>; | ||
363 | read-only; | ||
364 | }; | ||
365 | }; | ||
366 | }; | ||
367 | }; | ||
368 | chosen { | ||
369 | linux,stdout-path = &MPSC0; | ||
370 | }; | ||
371 | }; | ||
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts index 39634124929b..f9fe03252150 100644 --- a/arch/powerpc/boot/dts/canyonlands.dts +++ b/arch/powerpc/boot/dts/canyonlands.dts | |||
@@ -8,12 +8,14 @@ | |||
8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
12 | |||
11 | / { | 13 | / { |
12 | #address-cells = <2>; | 14 | #address-cells = <2>; |
13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
14 | model = "amcc,canyonlands"; | 16 | model = "amcc,canyonlands"; |
15 | compatible = "amcc,canyonlands"; | 17 | compatible = "amcc,canyonlands"; |
16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
17 | 19 | ||
18 | aliases { | 20 | aliases { |
19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
@@ -29,13 +31,13 @@ | |||
29 | cpu@0 { | 31 | cpu@0 { |
30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
31 | model = "PowerPC,460EX"; | 33 | model = "PowerPC,460EX"; |
32 | reg = <0>; | 34 | reg = <0x00000000>; |
33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
37 | i-cache-size = <8000>; | 39 | i-cache-size = <32768>; |
38 | d-cache-size = <8000>; | 40 | d-cache-size = <32768>; |
39 | dcr-controller; | 41 | dcr-controller; |
40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
41 | }; | 43 | }; |
@@ -43,14 +45,14 @@ | |||
43 | 45 | ||
44 | memory { | 46 | memory { |
45 | device_type = "memory"; | 47 | device_type = "memory"; |
46 | reg = <0 0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ |
47 | }; | 49 | }; |
48 | 50 | ||
49 | UIC0: interrupt-controller0 { | 51 | UIC0: interrupt-controller0 { |
50 | compatible = "ibm,uic-460ex","ibm,uic"; | 52 | compatible = "ibm,uic-460ex","ibm,uic"; |
51 | interrupt-controller; | 53 | interrupt-controller; |
52 | cell-index = <0>; | 54 | cell-index = <0>; |
53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
@@ -60,11 +62,11 @@ | |||
60 | compatible = "ibm,uic-460ex","ibm,uic"; | 62 | compatible = "ibm,uic-460ex","ibm,uic"; |
61 | interrupt-controller; | 63 | interrupt-controller; |
62 | cell-index = <1>; | 64 | cell-index = <1>; |
63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
69 | }; | 71 | }; |
70 | 72 | ||
@@ -72,11 +74,11 @@ | |||
72 | compatible = "ibm,uic-460ex","ibm,uic"; | 74 | compatible = "ibm,uic-460ex","ibm,uic"; |
73 | interrupt-controller; | 75 | interrupt-controller; |
74 | cell-index = <2>; | 76 | cell-index = <2>; |
75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
79 | interrupts = <a 4 b 4>; /* cascade */ | 81 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
81 | }; | 83 | }; |
82 | 84 | ||
@@ -84,22 +86,22 @@ | |||
84 | compatible = "ibm,uic-460ex","ibm,uic"; | 86 | compatible = "ibm,uic-460ex","ibm,uic"; |
85 | interrupt-controller; | 87 | interrupt-controller; |
86 | cell-index = <3>; | 88 | cell-index = <3>; |
87 | dcr-reg = <0f0 009>; | 89 | dcr-reg = <0x0f0 0x009>; |
88 | #address-cells = <0>; | 90 | #address-cells = <0>; |
89 | #size-cells = <0>; | 91 | #size-cells = <0>; |
90 | #interrupt-cells = <2>; | 92 | #interrupt-cells = <2>; |
91 | interrupts = <10 4 11 4>; /* cascade */ | 93 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
92 | interrupt-parent = <&UIC0>; | 94 | interrupt-parent = <&UIC0>; |
93 | }; | 95 | }; |
94 | 96 | ||
95 | SDR0: sdr { | 97 | SDR0: sdr { |
96 | compatible = "ibm,sdr-460ex"; | 98 | compatible = "ibm,sdr-460ex"; |
97 | dcr-reg = <00e 002>; | 99 | dcr-reg = <0x00e 0x002>; |
98 | }; | 100 | }; |
99 | 101 | ||
100 | CPR0: cpr { | 102 | CPR0: cpr { |
101 | compatible = "ibm,cpr-460ex"; | 103 | compatible = "ibm,cpr-460ex"; |
102 | dcr-reg = <00c 002>; | 104 | dcr-reg = <0x00c 0x002>; |
103 | }; | 105 | }; |
104 | 106 | ||
105 | plb { | 107 | plb { |
@@ -111,74 +113,74 @@ | |||
111 | 113 | ||
112 | SDRAM0: sdram { | 114 | SDRAM0: sdram { |
113 | compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; | 115 | compatible = "ibm,sdram-460ex", "ibm,sdram-405gp"; |
114 | dcr-reg = <010 2>; | 116 | dcr-reg = <0x010 0x002>; |
115 | }; | 117 | }; |
116 | 118 | ||
117 | MAL0: mcmal { | 119 | MAL0: mcmal { |
118 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; | 120 | compatible = "ibm,mcmal-460ex", "ibm,mcmal2"; |
119 | dcr-reg = <180 62>; | 121 | dcr-reg = <0x180 0x062>; |
120 | num-tx-chans = <2>; | 122 | num-tx-chans = <2>; |
121 | num-rx-chans = <10>; | 123 | num-rx-chans = <16>; |
122 | #address-cells = <0>; | 124 | #address-cells = <0>; |
123 | #size-cells = <0>; | 125 | #size-cells = <0>; |
124 | interrupt-parent = <&UIC2>; | 126 | interrupt-parent = <&UIC2>; |
125 | interrupts = < /*TXEOB*/ 6 4 | 127 | interrupts = < /*TXEOB*/ 0x6 0x4 |
126 | /*RXEOB*/ 7 4 | 128 | /*RXEOB*/ 0x7 0x4 |
127 | /*SERR*/ 3 4 | 129 | /*SERR*/ 0x3 0x4 |
128 | /*TXDE*/ 4 4 | 130 | /*TXDE*/ 0x4 0x4 |
129 | /*RXDE*/ 5 4>; | 131 | /*RXDE*/ 0x5 0x4>; |
130 | }; | 132 | }; |
131 | 133 | ||
132 | POB0: opb { | 134 | POB0: opb { |
133 | compatible = "ibm,opb-460ex", "ibm,opb"; | 135 | compatible = "ibm,opb-460ex", "ibm,opb"; |
134 | #address-cells = <1>; | 136 | #address-cells = <1>; |
135 | #size-cells = <1>; | 137 | #size-cells = <1>; |
136 | ranges = <b0000000 4 b0000000 50000000>; | 138 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; |
137 | clock-frequency = <0>; /* Filled in by U-Boot */ | 139 | clock-frequency = <0>; /* Filled in by U-Boot */ |
138 | 140 | ||
139 | EBC0: ebc { | 141 | EBC0: ebc { |
140 | compatible = "ibm,ebc-460ex", "ibm,ebc"; | 142 | compatible = "ibm,ebc-460ex", "ibm,ebc"; |
141 | dcr-reg = <012 2>; | 143 | dcr-reg = <0x012 0x002>; |
142 | #address-cells = <2>; | 144 | #address-cells = <2>; |
143 | #size-cells = <1>; | 145 | #size-cells = <1>; |
144 | clock-frequency = <0>; /* Filled in by U-Boot */ | 146 | clock-frequency = <0>; /* Filled in by U-Boot */ |
145 | /* ranges property is supplied by U-Boot */ | 147 | /* ranges property is supplied by U-Boot */ |
146 | interrupts = <6 4>; | 148 | interrupts = <0x6 0x4>; |
147 | interrupt-parent = <&UIC1>; | 149 | interrupt-parent = <&UIC1>; |
148 | 150 | ||
149 | nor_flash@0,0 { | 151 | nor_flash@0,0 { |
150 | compatible = "amd,s29gl512n", "cfi-flash"; | 152 | compatible = "amd,s29gl512n", "cfi-flash"; |
151 | bank-width = <2>; | 153 | bank-width = <2>; |
152 | reg = <0 000000 4000000>; | 154 | reg = <0x00000000 0x00000000 0x04000000>; |
153 | #address-cells = <1>; | 155 | #address-cells = <1>; |
154 | #size-cells = <1>; | 156 | #size-cells = <1>; |
155 | partition@0 { | 157 | partition@0 { |
156 | label = "kernel"; | 158 | label = "kernel"; |
157 | reg = <0 1e0000>; | 159 | reg = <0x00000000 0x001e0000>; |
158 | }; | 160 | }; |
159 | partition@1e0000 { | 161 | partition@1e0000 { |
160 | label = "dtb"; | 162 | label = "dtb"; |
161 | reg = <1e0000 20000>; | 163 | reg = <0x001e0000 0x00020000>; |
162 | }; | 164 | }; |
163 | partition@200000 { | 165 | partition@200000 { |
164 | label = "ramdisk"; | 166 | label = "ramdisk"; |
165 | reg = <200000 1400000>; | 167 | reg = <0x00200000 0x01400000>; |
166 | }; | 168 | }; |
167 | partition@1600000 { | 169 | partition@1600000 { |
168 | label = "jffs2"; | 170 | label = "jffs2"; |
169 | reg = <1600000 400000>; | 171 | reg = <0x01600000 0x00400000>; |
170 | }; | 172 | }; |
171 | partition@1a00000 { | 173 | partition@1a00000 { |
172 | label = "user"; | 174 | label = "user"; |
173 | reg = <1a00000 2560000>; | 175 | reg = <0x01a00000 0x02560000>; |
174 | }; | 176 | }; |
175 | partition@3f60000 { | 177 | partition@3f60000 { |
176 | label = "env"; | 178 | label = "env"; |
177 | reg = <3f60000 40000>; | 179 | reg = <0x03f60000 0x00040000>; |
178 | }; | 180 | }; |
179 | partition@3fa0000 { | 181 | partition@3fa0000 { |
180 | label = "u-boot"; | 182 | label = "u-boot"; |
181 | reg = <3fa0000 60000>; | 183 | reg = <0x03fa0000 0x00060000>; |
182 | }; | 184 | }; |
183 | }; | 185 | }; |
184 | }; | 186 | }; |
@@ -186,103 +188,103 @@ | |||
186 | UART0: serial@ef600300 { | 188 | UART0: serial@ef600300 { |
187 | device_type = "serial"; | 189 | device_type = "serial"; |
188 | compatible = "ns16550"; | 190 | compatible = "ns16550"; |
189 | reg = <ef600300 8>; | 191 | reg = <0xef600300 0x00000008>; |
190 | virtual-reg = <ef600300>; | 192 | virtual-reg = <0xef600300>; |
191 | clock-frequency = <0>; /* Filled in by U-Boot */ | 193 | clock-frequency = <0>; /* Filled in by U-Boot */ |
192 | current-speed = <0>; /* Filled in by U-Boot */ | 194 | current-speed = <0>; /* Filled in by U-Boot */ |
193 | interrupt-parent = <&UIC1>; | 195 | interrupt-parent = <&UIC1>; |
194 | interrupts = <1 4>; | 196 | interrupts = <0x1 0x4>; |
195 | }; | 197 | }; |
196 | 198 | ||
197 | UART1: serial@ef600400 { | 199 | UART1: serial@ef600400 { |
198 | device_type = "serial"; | 200 | device_type = "serial"; |
199 | compatible = "ns16550"; | 201 | compatible = "ns16550"; |
200 | reg = <ef600400 8>; | 202 | reg = <0xef600400 0x00000008>; |
201 | virtual-reg = <ef600400>; | 203 | virtual-reg = <0xef600400>; |
202 | clock-frequency = <0>; /* Filled in by U-Boot */ | 204 | clock-frequency = <0>; /* Filled in by U-Boot */ |
203 | current-speed = <0>; /* Filled in by U-Boot */ | 205 | current-speed = <0>; /* Filled in by U-Boot */ |
204 | interrupt-parent = <&UIC0>; | 206 | interrupt-parent = <&UIC0>; |
205 | interrupts = <1 4>; | 207 | interrupts = <0x1 0x4>; |
206 | }; | 208 | }; |
207 | 209 | ||
208 | UART2: serial@ef600500 { | 210 | UART2: serial@ef600500 { |
209 | device_type = "serial"; | 211 | device_type = "serial"; |
210 | compatible = "ns16550"; | 212 | compatible = "ns16550"; |
211 | reg = <ef600500 8>; | 213 | reg = <0xef600500 0x00000008>; |
212 | virtual-reg = <ef600500>; | 214 | virtual-reg = <0xef600500>; |
213 | clock-frequency = <0>; /* Filled in by U-Boot */ | 215 | clock-frequency = <0>; /* Filled in by U-Boot */ |
214 | current-speed = <0>; /* Filled in by U-Boot */ | 216 | current-speed = <0>; /* Filled in by U-Boot */ |
215 | interrupt-parent = <&UIC1>; | 217 | interrupt-parent = <&UIC1>; |
216 | interrupts = <1d 4>; | 218 | interrupts = <0x1d 0x4>; |
217 | }; | 219 | }; |
218 | 220 | ||
219 | UART3: serial@ef600600 { | 221 | UART3: serial@ef600600 { |
220 | device_type = "serial"; | 222 | device_type = "serial"; |
221 | compatible = "ns16550"; | 223 | compatible = "ns16550"; |
222 | reg = <ef600600 8>; | 224 | reg = <0xef600600 0x00000008>; |
223 | virtual-reg = <ef600600>; | 225 | virtual-reg = <0xef600600>; |
224 | clock-frequency = <0>; /* Filled in by U-Boot */ | 226 | clock-frequency = <0>; /* Filled in by U-Boot */ |
225 | current-speed = <0>; /* Filled in by U-Boot */ | 227 | current-speed = <0>; /* Filled in by U-Boot */ |
226 | interrupt-parent = <&UIC1>; | 228 | interrupt-parent = <&UIC1>; |
227 | interrupts = <1e 4>; | 229 | interrupts = <0x1e 0x4>; |
228 | }; | 230 | }; |
229 | 231 | ||
230 | IIC0: i2c@ef600700 { | 232 | IIC0: i2c@ef600700 { |
231 | compatible = "ibm,iic-460ex", "ibm,iic"; | 233 | compatible = "ibm,iic-460ex", "ibm,iic"; |
232 | reg = <ef600700 14>; | 234 | reg = <0xef600700 0x00000014>; |
233 | interrupt-parent = <&UIC0>; | 235 | interrupt-parent = <&UIC0>; |
234 | interrupts = <2 4>; | 236 | interrupts = <0x2 0x4>; |
235 | }; | 237 | }; |
236 | 238 | ||
237 | IIC1: i2c@ef600800 { | 239 | IIC1: i2c@ef600800 { |
238 | compatible = "ibm,iic-460ex", "ibm,iic"; | 240 | compatible = "ibm,iic-460ex", "ibm,iic"; |
239 | reg = <ef600800 14>; | 241 | reg = <0xef600800 0x00000014>; |
240 | interrupt-parent = <&UIC0>; | 242 | interrupt-parent = <&UIC0>; |
241 | interrupts = <3 4>; | 243 | interrupts = <0x3 0x4>; |
242 | }; | 244 | }; |
243 | 245 | ||
244 | ZMII0: emac-zmii@ef600d00 { | 246 | ZMII0: emac-zmii@ef600d00 { |
245 | compatible = "ibm,zmii-460ex", "ibm,zmii"; | 247 | compatible = "ibm,zmii-460ex", "ibm,zmii"; |
246 | reg = <ef600d00 c>; | 248 | reg = <0xef600d00 0x0000000c>; |
247 | }; | 249 | }; |
248 | 250 | ||
249 | RGMII0: emac-rgmii@ef601500 { | 251 | RGMII0: emac-rgmii@ef601500 { |
250 | compatible = "ibm,rgmii-460ex", "ibm,rgmii"; | 252 | compatible = "ibm,rgmii-460ex", "ibm,rgmii"; |
251 | reg = <ef601500 8>; | 253 | reg = <0xef601500 0x00000008>; |
252 | has-mdio; | 254 | has-mdio; |
253 | }; | 255 | }; |
254 | 256 | ||
255 | TAH0: emac-tah@ef601350 { | 257 | TAH0: emac-tah@ef601350 { |
256 | compatible = "ibm,tah-460ex", "ibm,tah"; | 258 | compatible = "ibm,tah-460ex", "ibm,tah"; |
257 | reg = <ef601350 30>; | 259 | reg = <0xef601350 0x00000030>; |
258 | }; | 260 | }; |
259 | 261 | ||
260 | TAH1: emac-tah@ef601450 { | 262 | TAH1: emac-tah@ef601450 { |
261 | compatible = "ibm,tah-460ex", "ibm,tah"; | 263 | compatible = "ibm,tah-460ex", "ibm,tah"; |
262 | reg = <ef601450 30>; | 264 | reg = <0xef601450 0x00000030>; |
263 | }; | 265 | }; |
264 | 266 | ||
265 | EMAC0: ethernet@ef600e00 { | 267 | EMAC0: ethernet@ef600e00 { |
266 | device_type = "network"; | 268 | device_type = "network"; |
267 | compatible = "ibm,emac-460ex", "ibm,emac4"; | 269 | compatible = "ibm,emac-460ex", "ibm,emac4"; |
268 | interrupt-parent = <&EMAC0>; | 270 | interrupt-parent = <&EMAC0>; |
269 | interrupts = <0 1>; | 271 | interrupts = <0x0 0x1>; |
270 | #interrupt-cells = <1>; | 272 | #interrupt-cells = <1>; |
271 | #address-cells = <0>; | 273 | #address-cells = <0>; |
272 | #size-cells = <0>; | 274 | #size-cells = <0>; |
273 | interrupt-map = </*Status*/ 0 &UIC2 10 4 | 275 | interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 |
274 | /*Wake*/ 1 &UIC2 14 4>; | 276 | /*Wake*/ 0x1 &UIC2 0x14 0x4>; |
275 | reg = <ef600e00 70>; | 277 | reg = <0xef600e00 0x00000070>; |
276 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 278 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
277 | mal-device = <&MAL0>; | 279 | mal-device = <&MAL0>; |
278 | mal-tx-channel = <0>; | 280 | mal-tx-channel = <0>; |
279 | mal-rx-channel = <0>; | 281 | mal-rx-channel = <0>; |
280 | cell-index = <0>; | 282 | cell-index = <0>; |
281 | max-frame-size = <2328>; | 283 | max-frame-size = <9000>; |
282 | rx-fifo-size = <1000>; | 284 | rx-fifo-size = <4096>; |
283 | tx-fifo-size = <800>; | 285 | tx-fifo-size = <2048>; |
284 | phy-mode = "rgmii"; | 286 | phy-mode = "rgmii"; |
285 | phy-map = <00000000>; | 287 | phy-map = <0x00000000>; |
286 | rgmii-device = <&RGMII0>; | 288 | rgmii-device = <&RGMII0>; |
287 | rgmii-channel = <0>; | 289 | rgmii-channel = <0>; |
288 | tah-device = <&TAH0>; | 290 | tah-device = <&TAH0>; |
@@ -295,23 +297,23 @@ | |||
295 | device_type = "network"; | 297 | device_type = "network"; |
296 | compatible = "ibm,emac-460ex", "ibm,emac4"; | 298 | compatible = "ibm,emac-460ex", "ibm,emac4"; |
297 | interrupt-parent = <&EMAC1>; | 299 | interrupt-parent = <&EMAC1>; |
298 | interrupts = <0 1>; | 300 | interrupts = <0x0 0x1>; |
299 | #interrupt-cells = <1>; | 301 | #interrupt-cells = <1>; |
300 | #address-cells = <0>; | 302 | #address-cells = <0>; |
301 | #size-cells = <0>; | 303 | #size-cells = <0>; |
302 | interrupt-map = </*Status*/ 0 &UIC2 11 4 | 304 | interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 |
303 | /*Wake*/ 1 &UIC2 15 4>; | 305 | /*Wake*/ 0x1 &UIC2 0x15 0x4>; |
304 | reg = <ef600f00 70>; | 306 | reg = <0xef600f00 0x00000070>; |
305 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 307 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
306 | mal-device = <&MAL0>; | 308 | mal-device = <&MAL0>; |
307 | mal-tx-channel = <1>; | 309 | mal-tx-channel = <1>; |
308 | mal-rx-channel = <8>; | 310 | mal-rx-channel = <8>; |
309 | cell-index = <1>; | 311 | cell-index = <1>; |
310 | max-frame-size = <2328>; | 312 | max-frame-size = <9000>; |
311 | rx-fifo-size = <1000>; | 313 | rx-fifo-size = <4096>; |
312 | tx-fifo-size = <800>; | 314 | tx-fifo-size = <2048>; |
313 | phy-mode = "rgmii"; | 315 | phy-mode = "rgmii"; |
314 | phy-map = <00000000>; | 316 | phy-map = <0x00000000>; |
315 | rgmii-device = <&RGMII0>; | 317 | rgmii-device = <&RGMII0>; |
316 | rgmii-channel = <1>; | 318 | rgmii-channel = <1>; |
317 | tah-device = <&TAH1>; | 319 | tah-device = <&TAH1>; |
@@ -331,27 +333,27 @@ | |||
331 | primary; | 333 | primary; |
332 | large-inbound-windows; | 334 | large-inbound-windows; |
333 | enable-msi-hole; | 335 | enable-msi-hole; |
334 | reg = <c 0ec00000 8 /* Config space access */ | 336 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
335 | 0 0 0 /* no IACK cycles */ | 337 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
336 | c 0ed00000 4 /* Special cycles */ | 338 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
337 | c 0ec80000 100 /* Internal registers */ | 339 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
338 | c 0ec80100 fc>; /* Internal messaging registers */ | 340 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
339 | 341 | ||
340 | /* Outbound ranges, one memory and one IO, | 342 | /* Outbound ranges, one memory and one IO, |
341 | * later cannot be changed | 343 | * later cannot be changed |
342 | */ | 344 | */ |
343 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 345 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
344 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 346 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
345 | 347 | ||
346 | /* Inbound 2GB range starting at 0 */ | 348 | /* Inbound 2GB range starting at 0 */ |
347 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 349 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
348 | 350 | ||
349 | /* This drives busses 0 to 0x3f */ | 351 | /* This drives busses 0 to 0x3f */ |
350 | bus-range = <0 3f>; | 352 | bus-range = <0x0 0x3f>; |
351 | 353 | ||
352 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ | 354 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ |
353 | interrupt-map-mask = <0000 0 0 0>; | 355 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
354 | interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; | 356 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; |
355 | }; | 357 | }; |
356 | 358 | ||
357 | PCIE0: pciex@d00000000 { | 359 | PCIE0: pciex@d00000000 { |
@@ -361,23 +363,23 @@ | |||
361 | #address-cells = <3>; | 363 | #address-cells = <3>; |
362 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 364 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
363 | primary; | 365 | primary; |
364 | port = <0>; /* port number */ | 366 | port = <0x0>; /* port number */ |
365 | reg = <d 00000000 20000000 /* Config space access */ | 367 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
366 | c 08010000 00001000>; /* Registers */ | 368 | 0x0000000c 0x08010000 0x00001000>; /* Registers */ |
367 | dcr-reg = <100 020>; | 369 | dcr-reg = <0x100 0x020>; |
368 | sdr-base = <300>; | 370 | sdr-base = <0x300>; |
369 | 371 | ||
370 | /* Outbound ranges, one memory and one IO, | 372 | /* Outbound ranges, one memory and one IO, |
371 | * later cannot be changed | 373 | * later cannot be changed |
372 | */ | 374 | */ |
373 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 375 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
374 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 376 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
375 | 377 | ||
376 | /* Inbound 2GB range starting at 0 */ | 378 | /* Inbound 2GB range starting at 0 */ |
377 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 379 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
378 | 380 | ||
379 | /* This drives busses 40 to 0x7f */ | 381 | /* This drives busses 40 to 0x7f */ |
380 | bus-range = <40 7f>; | 382 | bus-range = <0x40 0x7f>; |
381 | 383 | ||
382 | /* Legacy interrupts (note the weird polarity, the bridge seems | 384 | /* Legacy interrupts (note the weird polarity, the bridge seems |
383 | * to invert PCIe legacy interrupts). | 385 | * to invert PCIe legacy interrupts). |
@@ -387,12 +389,12 @@ | |||
387 | * below are basically de-swizzled numbers. | 389 | * below are basically de-swizzled numbers. |
388 | * The real slot is on idsel 0, so the swizzling is 1:1 | 390 | * The real slot is on idsel 0, so the swizzling is 1:1 |
389 | */ | 391 | */ |
390 | interrupt-map-mask = <0000 0 0 7>; | 392 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
391 | interrupt-map = < | 393 | interrupt-map = < |
392 | 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ | 394 | 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ |
393 | 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ | 395 | 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ |
394 | 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ | 396 | 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ |
395 | 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; | 397 | 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; |
396 | }; | 398 | }; |
397 | 399 | ||
398 | PCIE1: pciex@d20000000 { | 400 | PCIE1: pciex@d20000000 { |
@@ -402,23 +404,23 @@ | |||
402 | #address-cells = <3>; | 404 | #address-cells = <3>; |
403 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 405 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
404 | primary; | 406 | primary; |
405 | port = <1>; /* port number */ | 407 | port = <0x1>; /* port number */ |
406 | reg = <d 20000000 20000000 /* Config space access */ | 408 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
407 | c 08011000 00001000>; /* Registers */ | 409 | 0x0000000c 0x08011000 0x00001000>; /* Registers */ |
408 | dcr-reg = <120 020>; | 410 | dcr-reg = <0x120 0x020>; |
409 | sdr-base = <340>; | 411 | sdr-base = <0x340>; |
410 | 412 | ||
411 | /* Outbound ranges, one memory and one IO, | 413 | /* Outbound ranges, one memory and one IO, |
412 | * later cannot be changed | 414 | * later cannot be changed |
413 | */ | 415 | */ |
414 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 416 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
415 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 417 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
416 | 418 | ||
417 | /* Inbound 2GB range starting at 0 */ | 419 | /* Inbound 2GB range starting at 0 */ |
418 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 420 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
419 | 421 | ||
420 | /* This drives busses 80 to 0xbf */ | 422 | /* This drives busses 80 to 0xbf */ |
421 | bus-range = <80 bf>; | 423 | bus-range = <0x80 0xbf>; |
422 | 424 | ||
423 | /* Legacy interrupts (note the weird polarity, the bridge seems | 425 | /* Legacy interrupts (note the weird polarity, the bridge seems |
424 | * to invert PCIe legacy interrupts). | 426 | * to invert PCIe legacy interrupts). |
@@ -428,12 +430,12 @@ | |||
428 | * below are basically de-swizzled numbers. | 430 | * below are basically de-swizzled numbers. |
429 | * The real slot is on idsel 0, so the swizzling is 1:1 | 431 | * The real slot is on idsel 0, so the swizzling is 1:1 |
430 | */ | 432 | */ |
431 | interrupt-map-mask = <0000 0 0 7>; | 433 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
432 | interrupt-map = < | 434 | interrupt-map = < |
433 | 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ | 435 | 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ |
434 | 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ | 436 | 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ |
435 | 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ | 437 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ |
436 | 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; | 438 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; |
437 | }; | 439 | }; |
438 | }; | 440 | }; |
439 | }; | 441 | }; |
diff --git a/arch/powerpc/boot/dts/ebony.dts b/arch/powerpc/boot/dts/ebony.dts index 5079dc890e0e..ec2d142291b4 100644 --- a/arch/powerpc/boot/dts/ebony.dts +++ b/arch/powerpc/boot/dts/ebony.dts | |||
@@ -11,12 +11,14 @@ | |||
11 | * any warranty of any kind, whether express or implied. | 11 | * any warranty of any kind, whether express or implied. |
12 | */ | 12 | */ |
13 | 13 | ||
14 | /dts-v1/; | ||
15 | |||
14 | / { | 16 | / { |
15 | #address-cells = <2>; | 17 | #address-cells = <2>; |
16 | #size-cells = <1>; | 18 | #size-cells = <1>; |
17 | model = "ibm,ebony"; | 19 | model = "ibm,ebony"; |
18 | compatible = "ibm,ebony"; | 20 | compatible = "ibm,ebony"; |
19 | dcr-parent = <&/cpus/cpu@0>; | 21 | dcr-parent = <&{/cpus/cpu@0}>; |
20 | 22 | ||
21 | aliases { | 23 | aliases { |
22 | ethernet0 = &EMAC0; | 24 | ethernet0 = &EMAC0; |
@@ -32,13 +34,13 @@ | |||
32 | cpu@0 { | 34 | cpu@0 { |
33 | device_type = "cpu"; | 35 | device_type = "cpu"; |
34 | model = "PowerPC,440GP"; | 36 | model = "PowerPC,440GP"; |
35 | reg = <0>; | 37 | reg = <0x00000000>; |
36 | clock-frequency = <0>; // Filled in by zImage | 38 | clock-frequency = <0>; // Filled in by zImage |
37 | timebase-frequency = <0>; // Filled in by zImage | 39 | timebase-frequency = <0>; // Filled in by zImage |
38 | i-cache-line-size = <20>; | 40 | i-cache-line-size = <32>; |
39 | d-cache-line-size = <20>; | 41 | d-cache-line-size = <32>; |
40 | i-cache-size = <8000>; /* 32 kB */ | 42 | i-cache-size = <32768>; /* 32 kB */ |
41 | d-cache-size = <8000>; /* 32 kB */ | 43 | d-cache-size = <32768>; /* 32 kB */ |
42 | dcr-controller; | 44 | dcr-controller; |
43 | dcr-access-method = "native"; | 45 | dcr-access-method = "native"; |
44 | }; | 46 | }; |
@@ -46,14 +48,14 @@ | |||
46 | 48 | ||
47 | memory { | 49 | memory { |
48 | device_type = "memory"; | 50 | device_type = "memory"; |
49 | reg = <0 0 0>; // Filled in by zImage | 51 | reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage |
50 | }; | 52 | }; |
51 | 53 | ||
52 | UIC0: interrupt-controller0 { | 54 | UIC0: interrupt-controller0 { |
53 | compatible = "ibm,uic-440gp", "ibm,uic"; | 55 | compatible = "ibm,uic-440gp", "ibm,uic"; |
54 | interrupt-controller; | 56 | interrupt-controller; |
55 | cell-index = <0>; | 57 | cell-index = <0>; |
56 | dcr-reg = <0c0 009>; | 58 | dcr-reg = <0x0c0 0x009>; |
57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
@@ -64,17 +66,17 @@ | |||
64 | compatible = "ibm,uic-440gp", "ibm,uic"; | 66 | compatible = "ibm,uic-440gp", "ibm,uic"; |
65 | interrupt-controller; | 67 | interrupt-controller; |
66 | cell-index = <1>; | 68 | cell-index = <1>; |
67 | dcr-reg = <0d0 009>; | 69 | dcr-reg = <0x0d0 0x009>; |
68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
71 | interrupts = <1e 4 1f 4>; /* cascade */ | 73 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
72 | interrupt-parent = <&UIC0>; | 74 | interrupt-parent = <&UIC0>; |
73 | }; | 75 | }; |
74 | 76 | ||
75 | CPC0: cpc { | 77 | CPC0: cpc { |
76 | compatible = "ibm,cpc-440gp"; | 78 | compatible = "ibm,cpc-440gp"; |
77 | dcr-reg = <0b0 003 0e0 010>; | 79 | dcr-reg = <0x0b0 0x003 0x0e0 0x010>; |
78 | // FIXME: anything else? | 80 | // FIXME: anything else? |
79 | }; | 81 | }; |
80 | 82 | ||
@@ -87,37 +89,37 @@ | |||
87 | 89 | ||
88 | SDRAM0: memory-controller { | 90 | SDRAM0: memory-controller { |
89 | compatible = "ibm,sdram-440gp"; | 91 | compatible = "ibm,sdram-440gp"; |
90 | dcr-reg = <010 2>; | 92 | dcr-reg = <0x010 0x002>; |
91 | // FIXME: anything else? | 93 | // FIXME: anything else? |
92 | }; | 94 | }; |
93 | 95 | ||
94 | SRAM0: sram { | 96 | SRAM0: sram { |
95 | compatible = "ibm,sram-440gp"; | 97 | compatible = "ibm,sram-440gp"; |
96 | dcr-reg = <020 8 00a 1>; | 98 | dcr-reg = <0x020 0x008 0x00a 0x001>; |
97 | }; | 99 | }; |
98 | 100 | ||
99 | DMA0: dma { | 101 | DMA0: dma { |
100 | // FIXME: ??? | 102 | // FIXME: ??? |
101 | compatible = "ibm,dma-440gp"; | 103 | compatible = "ibm,dma-440gp"; |
102 | dcr-reg = <100 027>; | 104 | dcr-reg = <0x100 0x027>; |
103 | }; | 105 | }; |
104 | 106 | ||
105 | MAL0: mcmal { | 107 | MAL0: mcmal { |
106 | compatible = "ibm,mcmal-440gp", "ibm,mcmal"; | 108 | compatible = "ibm,mcmal-440gp", "ibm,mcmal"; |
107 | dcr-reg = <180 62>; | 109 | dcr-reg = <0x180 0x062>; |
108 | num-tx-chans = <4>; | 110 | num-tx-chans = <4>; |
109 | num-rx-chans = <4>; | 111 | num-rx-chans = <4>; |
110 | interrupt-parent = <&MAL0>; | 112 | interrupt-parent = <&MAL0>; |
111 | interrupts = <0 1 2 3 4>; | 113 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
112 | #interrupt-cells = <1>; | 114 | #interrupt-cells = <1>; |
113 | #address-cells = <0>; | 115 | #address-cells = <0>; |
114 | #size-cells = <0>; | 116 | #size-cells = <0>; |
115 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 117 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
116 | /*RXEOB*/ 1 &UIC0 b 4 | 118 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
117 | /*SERR*/ 2 &UIC1 0 4 | 119 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
118 | /*TXDE*/ 3 &UIC1 1 4 | 120 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
119 | /*RXDE*/ 4 &UIC1 2 4>; | 121 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
120 | interrupt-map-mask = <ffffffff>; | 122 | interrupt-map-mask = <0xffffffff>; |
121 | }; | 123 | }; |
122 | 124 | ||
123 | POB0: opb { | 125 | POB0: opb { |
@@ -126,34 +128,34 @@ | |||
126 | #size-cells = <1>; | 128 | #size-cells = <1>; |
127 | /* Wish there was a nicer way of specifying a full 32-bit | 129 | /* Wish there was a nicer way of specifying a full 32-bit |
128 | range */ | 130 | range */ |
129 | ranges = <00000000 1 00000000 80000000 | 131 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
130 | 80000000 1 80000000 80000000>; | 132 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
131 | dcr-reg = <090 00b>; | 133 | dcr-reg = <0x090 0x00b>; |
132 | interrupt-parent = <&UIC1>; | 134 | interrupt-parent = <&UIC1>; |
133 | interrupts = <7 4>; | 135 | interrupts = <0x7 0x4>; |
134 | clock-frequency = <0>; // Filled in by zImage | 136 | clock-frequency = <0>; // Filled in by zImage |
135 | 137 | ||
136 | EBC0: ebc { | 138 | EBC0: ebc { |
137 | compatible = "ibm,ebc-440gp", "ibm,ebc"; | 139 | compatible = "ibm,ebc-440gp", "ibm,ebc"; |
138 | dcr-reg = <012 2>; | 140 | dcr-reg = <0x012 0x002>; |
139 | #address-cells = <2>; | 141 | #address-cells = <2>; |
140 | #size-cells = <1>; | 142 | #size-cells = <1>; |
141 | clock-frequency = <0>; // Filled in by zImage | 143 | clock-frequency = <0>; // Filled in by zImage |
142 | // ranges property is supplied by zImage | 144 | // ranges property is supplied by zImage |
143 | // based on firmware's configuration of the | 145 | // based on firmware's configuration of the |
144 | // EBC bridge | 146 | // EBC bridge |
145 | interrupts = <5 4>; | 147 | interrupts = <0x5 0x4>; |
146 | interrupt-parent = <&UIC1>; | 148 | interrupt-parent = <&UIC1>; |
147 | 149 | ||
148 | small-flash@0,80000 { | 150 | small-flash@0,80000 { |
149 | compatible = "jedec-flash"; | 151 | compatible = "jedec-flash"; |
150 | bank-width = <1>; | 152 | bank-width = <1>; |
151 | reg = <0 80000 80000>; | 153 | reg = <0x00000000 0x00080000 0x00080000>; |
152 | #address-cells = <1>; | 154 | #address-cells = <1>; |
153 | #size-cells = <1>; | 155 | #size-cells = <1>; |
154 | partition@0 { | 156 | partition@0 { |
155 | label = "OpenBIOS"; | 157 | label = "OpenBIOS"; |
156 | reg = <0 80000>; | 158 | reg = <0x00000000 0x00080000>; |
157 | read-only; | 159 | read-only; |
158 | }; | 160 | }; |
159 | }; | 161 | }; |
@@ -161,101 +163,101 @@ | |||
161 | nvram@1,0 { | 163 | nvram@1,0 { |
162 | /* NVRAM & RTC */ | 164 | /* NVRAM & RTC */ |
163 | compatible = "ds1743-nvram"; | 165 | compatible = "ds1743-nvram"; |
164 | #bytes = <2000>; | 166 | #bytes = <0x2000>; |
165 | reg = <1 0 2000>; | 167 | reg = <0x00000001 0x00000000 0x00002000>; |
166 | }; | 168 | }; |
167 | 169 | ||
168 | large-flash@2,0 { | 170 | large-flash@2,0 { |
169 | compatible = "jedec-flash"; | 171 | compatible = "jedec-flash"; |
170 | bank-width = <1>; | 172 | bank-width = <1>; |
171 | reg = <2 0 400000>; | 173 | reg = <0x00000002 0x00000000 0x00400000>; |
172 | #address-cells = <1>; | 174 | #address-cells = <1>; |
173 | #size-cells = <1>; | 175 | #size-cells = <1>; |
174 | partition@0 { | 176 | partition@0 { |
175 | label = "fs"; | 177 | label = "fs"; |
176 | reg = <0 380000>; | 178 | reg = <0x00000000 0x00380000>; |
177 | }; | 179 | }; |
178 | partition@380000 { | 180 | partition@380000 { |
179 | label = "firmware"; | 181 | label = "firmware"; |
180 | reg = <380000 80000>; | 182 | reg = <0x00380000 0x00080000>; |
181 | }; | 183 | }; |
182 | }; | 184 | }; |
183 | 185 | ||
184 | ir@3,0 { | 186 | ir@3,0 { |
185 | reg = <3 0 10>; | 187 | reg = <0x00000003 0x00000000 0x00000010>; |
186 | }; | 188 | }; |
187 | 189 | ||
188 | fpga@7,0 { | 190 | fpga@7,0 { |
189 | compatible = "Ebony-FPGA"; | 191 | compatible = "Ebony-FPGA"; |
190 | reg = <7 0 10>; | 192 | reg = <0x00000007 0x00000000 0x00000010>; |
191 | virtual-reg = <e8300000>; | 193 | virtual-reg = <0xe8300000>; |
192 | }; | 194 | }; |
193 | }; | 195 | }; |
194 | 196 | ||
195 | UART0: serial@40000200 { | 197 | UART0: serial@40000200 { |
196 | device_type = "serial"; | 198 | device_type = "serial"; |
197 | compatible = "ns16550"; | 199 | compatible = "ns16550"; |
198 | reg = <40000200 8>; | 200 | reg = <0x40000200 0x00000008>; |
199 | virtual-reg = <e0000200>; | 201 | virtual-reg = <0xe0000200>; |
200 | clock-frequency = <A8C000>; | 202 | clock-frequency = <11059200>; |
201 | current-speed = <2580>; | 203 | current-speed = <9600>; |
202 | interrupt-parent = <&UIC0>; | 204 | interrupt-parent = <&UIC0>; |
203 | interrupts = <0 4>; | 205 | interrupts = <0x0 0x4>; |
204 | }; | 206 | }; |
205 | 207 | ||
206 | UART1: serial@40000300 { | 208 | UART1: serial@40000300 { |
207 | device_type = "serial"; | 209 | device_type = "serial"; |
208 | compatible = "ns16550"; | 210 | compatible = "ns16550"; |
209 | reg = <40000300 8>; | 211 | reg = <0x40000300 0x00000008>; |
210 | virtual-reg = <e0000300>; | 212 | virtual-reg = <0xe0000300>; |
211 | clock-frequency = <A8C000>; | 213 | clock-frequency = <11059200>; |
212 | current-speed = <2580>; | 214 | current-speed = <9600>; |
213 | interrupt-parent = <&UIC0>; | 215 | interrupt-parent = <&UIC0>; |
214 | interrupts = <1 4>; | 216 | interrupts = <0x1 0x4>; |
215 | }; | 217 | }; |
216 | 218 | ||
217 | IIC0: i2c@40000400 { | 219 | IIC0: i2c@40000400 { |
218 | /* FIXME */ | 220 | /* FIXME */ |
219 | compatible = "ibm,iic-440gp", "ibm,iic"; | 221 | compatible = "ibm,iic-440gp", "ibm,iic"; |
220 | reg = <40000400 14>; | 222 | reg = <0x40000400 0x00000014>; |
221 | interrupt-parent = <&UIC0>; | 223 | interrupt-parent = <&UIC0>; |
222 | interrupts = <2 4>; | 224 | interrupts = <0x2 0x4>; |
223 | }; | 225 | }; |
224 | IIC1: i2c@40000500 { | 226 | IIC1: i2c@40000500 { |
225 | /* FIXME */ | 227 | /* FIXME */ |
226 | compatible = "ibm,iic-440gp", "ibm,iic"; | 228 | compatible = "ibm,iic-440gp", "ibm,iic"; |
227 | reg = <40000500 14>; | 229 | reg = <0x40000500 0x00000014>; |
228 | interrupt-parent = <&UIC0>; | 230 | interrupt-parent = <&UIC0>; |
229 | interrupts = <3 4>; | 231 | interrupts = <0x3 0x4>; |
230 | }; | 232 | }; |
231 | 233 | ||
232 | GPIO0: gpio@40000700 { | 234 | GPIO0: gpio@40000700 { |
233 | /* FIXME */ | 235 | /* FIXME */ |
234 | compatible = "ibm,gpio-440gp"; | 236 | compatible = "ibm,gpio-440gp"; |
235 | reg = <40000700 20>; | 237 | reg = <0x40000700 0x00000020>; |
236 | }; | 238 | }; |
237 | 239 | ||
238 | ZMII0: emac-zmii@40000780 { | 240 | ZMII0: emac-zmii@40000780 { |
239 | compatible = "ibm,zmii-440gp", "ibm,zmii"; | 241 | compatible = "ibm,zmii-440gp", "ibm,zmii"; |
240 | reg = <40000780 c>; | 242 | reg = <0x40000780 0x0000000c>; |
241 | }; | 243 | }; |
242 | 244 | ||
243 | EMAC0: ethernet@40000800 { | 245 | EMAC0: ethernet@40000800 { |
244 | device_type = "network"; | 246 | device_type = "network"; |
245 | compatible = "ibm,emac-440gp", "ibm,emac"; | 247 | compatible = "ibm,emac-440gp", "ibm,emac"; |
246 | interrupt-parent = <&UIC1>; | 248 | interrupt-parent = <&UIC1>; |
247 | interrupts = <1c 4 1d 4>; | 249 | interrupts = <0x1c 0x4 0x1d 0x4>; |
248 | reg = <40000800 70>; | 250 | reg = <0x40000800 0x00000070>; |
249 | local-mac-address = [000000000000]; // Filled in by zImage | 251 | local-mac-address = [000000000000]; // Filled in by zImage |
250 | mal-device = <&MAL0>; | 252 | mal-device = <&MAL0>; |
251 | mal-tx-channel = <0 1>; | 253 | mal-tx-channel = <0 1>; |
252 | mal-rx-channel = <0>; | 254 | mal-rx-channel = <0>; |
253 | cell-index = <0>; | 255 | cell-index = <0>; |
254 | max-frame-size = <5dc>; | 256 | max-frame-size = <1500>; |
255 | rx-fifo-size = <1000>; | 257 | rx-fifo-size = <4096>; |
256 | tx-fifo-size = <800>; | 258 | tx-fifo-size = <2048>; |
257 | phy-mode = "rmii"; | 259 | phy-mode = "rmii"; |
258 | phy-map = <00000001>; | 260 | phy-map = <0x00000001>; |
259 | zmii-device = <&ZMII0>; | 261 | zmii-device = <&ZMII0>; |
260 | zmii-channel = <0>; | 262 | zmii-channel = <0>; |
261 | }; | 263 | }; |
@@ -263,18 +265,18 @@ | |||
263 | device_type = "network"; | 265 | device_type = "network"; |
264 | compatible = "ibm,emac-440gp", "ibm,emac"; | 266 | compatible = "ibm,emac-440gp", "ibm,emac"; |
265 | interrupt-parent = <&UIC1>; | 267 | interrupt-parent = <&UIC1>; |
266 | interrupts = <1e 4 1f 4>; | 268 | interrupts = <0x1e 0x4 0x1f 0x4>; |
267 | reg = <40000900 70>; | 269 | reg = <0x40000900 0x00000070>; |
268 | local-mac-address = [000000000000]; // Filled in by zImage | 270 | local-mac-address = [000000000000]; // Filled in by zImage |
269 | mal-device = <&MAL0>; | 271 | mal-device = <&MAL0>; |
270 | mal-tx-channel = <2 3>; | 272 | mal-tx-channel = <2 3>; |
271 | mal-rx-channel = <1>; | 273 | mal-rx-channel = <1>; |
272 | cell-index = <1>; | 274 | cell-index = <1>; |
273 | max-frame-size = <5dc>; | 275 | max-frame-size = <1500>; |
274 | rx-fifo-size = <1000>; | 276 | rx-fifo-size = <4096>; |
275 | tx-fifo-size = <800>; | 277 | tx-fifo-size = <2048>; |
276 | phy-mode = "rmii"; | 278 | phy-mode = "rmii"; |
277 | phy-map = <00000001>; | 279 | phy-map = <0x00000001>; |
278 | zmii-device = <&ZMII0>; | 280 | zmii-device = <&ZMII0>; |
279 | zmii-channel = <1>; | 281 | zmii-channel = <1>; |
280 | }; | 282 | }; |
@@ -282,9 +284,9 @@ | |||
282 | 284 | ||
283 | GPT0: gpt@40000a00 { | 285 | GPT0: gpt@40000a00 { |
284 | /* FIXME */ | 286 | /* FIXME */ |
285 | reg = <40000a00 d4>; | 287 | reg = <0x40000a00 0x000000d4>; |
286 | interrupt-parent = <&UIC0>; | 288 | interrupt-parent = <&UIC0>; |
287 | interrupts = <12 4 13 4 14 4 15 4 16 4>; | 289 | interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; |
288 | }; | 290 | }; |
289 | 291 | ||
290 | }; | 292 | }; |
@@ -296,35 +298,35 @@ | |||
296 | #address-cells = <3>; | 298 | #address-cells = <3>; |
297 | compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; | 299 | compatible = "ibm,plb440gp-pcix", "ibm,plb-pcix"; |
298 | primary; | 300 | primary; |
299 | reg = <2 0ec00000 8 /* Config space access */ | 301 | reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ |
300 | 0 0 0 /* no IACK cycles */ | 302 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
301 | 2 0ed00000 4 /* Special cycles */ | 303 | 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ |
302 | 2 0ec80000 f0 /* Internal registers */ | 304 | 0x00000002 0x0ec80000 0x000000f0 /* Internal registers */ |
303 | 2 0ec80100 fc>; /* Internal messaging registers */ | 305 | 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
304 | 306 | ||
305 | /* Outbound ranges, one memory and one IO, | 307 | /* Outbound ranges, one memory and one IO, |
306 | * later cannot be changed | 308 | * later cannot be changed |
307 | */ | 309 | */ |
308 | ranges = <02000000 0 80000000 00000003 80000000 0 80000000 | 310 | ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 |
309 | 01000000 0 00000000 00000002 08000000 0 00010000>; | 311 | 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; |
310 | 312 | ||
311 | /* Inbound 2GB range starting at 0 */ | 313 | /* Inbound 2GB range starting at 0 */ |
312 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 314 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
313 | 315 | ||
314 | /* Ebony has all 4 IRQ pins tied together per slot */ | 316 | /* Ebony has all 4 IRQ pins tied together per slot */ |
315 | interrupt-map-mask = <f800 0 0 0>; | 317 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
316 | interrupt-map = < | 318 | interrupt-map = < |
317 | /* IDSEL 1 */ | 319 | /* IDSEL 1 */ |
318 | 0800 0 0 0 &UIC0 17 8 | 320 | 0x800 0x0 0x0 0x0 &UIC0 0x17 0x8 |
319 | 321 | ||
320 | /* IDSEL 2 */ | 322 | /* IDSEL 2 */ |
321 | 1000 0 0 0 &UIC0 18 8 | 323 | 0x1000 0x0 0x0 0x0 &UIC0 0x18 0x8 |
322 | 324 | ||
323 | /* IDSEL 3 */ | 325 | /* IDSEL 3 */ |
324 | 1800 0 0 0 &UIC0 19 8 | 326 | 0x1800 0x0 0x0 0x0 &UIC0 0x19 0x8 |
325 | 327 | ||
326 | /* IDSEL 4 */ | 328 | /* IDSEL 4 */ |
327 | 2000 0 0 0 &UIC0 1a 8 | 329 | 0x2000 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
328 | >; | 330 | >; |
329 | }; | 331 | }; |
330 | }; | 332 | }; |
diff --git a/arch/powerpc/boot/dts/ep405.dts b/arch/powerpc/boot/dts/ep405.dts index 92938557ac8a..53ef06cc2134 100644 --- a/arch/powerpc/boot/dts/ep405.dts +++ b/arch/powerpc/boot/dts/ep405.dts | |||
@@ -9,12 +9,14 @@ | |||
9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | /dts-v1/; | ||
13 | |||
12 | / { | 14 | / { |
13 | #address-cells = <1>; | 15 | #address-cells = <1>; |
14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
15 | model = "ep405"; | 17 | model = "ep405"; |
16 | compatible = "ep405"; | 18 | compatible = "ep405"; |
17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
18 | 20 | ||
19 | aliases { | 21 | aliases { |
20 | ethernet0 = &EMAC; | 22 | ethernet0 = &EMAC; |
@@ -29,13 +31,13 @@ | |||
29 | cpu@0 { | 31 | cpu@0 { |
30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
31 | model = "PowerPC,405GP"; | 33 | model = "PowerPC,405GP"; |
32 | reg = <0>; | 34 | reg = <0x00000000>; |
33 | clock-frequency = <bebc200>; /* Filled in by zImage */ | 35 | clock-frequency = <200000000>; /* Filled in by zImage */ |
34 | timebase-frequency = <0>; /* Filled in by zImage */ | 36 | timebase-frequency = <0>; /* Filled in by zImage */ |
35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
37 | i-cache-size = <4000>; | 39 | i-cache-size = <16384>; |
38 | d-cache-size = <4000>; | 40 | d-cache-size = <16384>; |
39 | dcr-controller; | 41 | dcr-controller; |
40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
41 | }; | 43 | }; |
@@ -43,14 +45,14 @@ | |||
43 | 45 | ||
44 | memory { | 46 | memory { |
45 | device_type = "memory"; | 47 | device_type = "memory"; |
46 | reg = <0 0>; /* Filled in by zImage */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by zImage */ |
47 | }; | 49 | }; |
48 | 50 | ||
49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
50 | compatible = "ibm,uic"; | 52 | compatible = "ibm,uic"; |
51 | interrupt-controller; | 53 | interrupt-controller; |
52 | cell-index = <0>; | 54 | cell-index = <0>; |
53 | dcr-reg = <0c0 9>; | 55 | dcr-reg = <0x0c0 0x009>; |
54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
@@ -65,91 +67,91 @@ | |||
65 | 67 | ||
66 | SDRAM0: memory-controller { | 68 | SDRAM0: memory-controller { |
67 | compatible = "ibm,sdram-405gp"; | 69 | compatible = "ibm,sdram-405gp"; |
68 | dcr-reg = <010 2>; | 70 | dcr-reg = <0x010 0x002>; |
69 | }; | 71 | }; |
70 | 72 | ||
71 | MAL: mcmal { | 73 | MAL: mcmal { |
72 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; | 74 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; |
73 | dcr-reg = <180 62>; | 75 | dcr-reg = <0x180 0x062>; |
74 | num-tx-chans = <1>; | 76 | num-tx-chans = <1>; |
75 | num-rx-chans = <1>; | 77 | num-rx-chans = <1>; |
76 | interrupt-parent = <&UIC0>; | 78 | interrupt-parent = <&UIC0>; |
77 | interrupts = < | 79 | interrupts = < |
78 | b 4 /* TXEOB */ | 80 | 0xb 0x4 /* TXEOB */ |
79 | c 4 /* RXEOB */ | 81 | 0xc 0x4 /* RXEOB */ |
80 | a 4 /* SERR */ | 82 | 0xa 0x4 /* SERR */ |
81 | d 4 /* TXDE */ | 83 | 0xd 0x4 /* TXDE */ |
82 | e 4 /* RXDE */>; | 84 | 0xe 0x4 /* RXDE */>; |
83 | }; | 85 | }; |
84 | 86 | ||
85 | POB0: opb { | 87 | POB0: opb { |
86 | compatible = "ibm,opb-405gp", "ibm,opb"; | 88 | compatible = "ibm,opb-405gp", "ibm,opb"; |
87 | #address-cells = <1>; | 89 | #address-cells = <1>; |
88 | #size-cells = <1>; | 90 | #size-cells = <1>; |
89 | ranges = <ef600000 ef600000 a00000>; | 91 | ranges = <0xef600000 0xef600000 0x00a00000>; |
90 | dcr-reg = <0a0 5>; | 92 | dcr-reg = <0x0a0 0x005>; |
91 | clock-frequency = <0>; /* Filled in by zImage */ | 93 | clock-frequency = <0>; /* Filled in by zImage */ |
92 | 94 | ||
93 | UART0: serial@ef600300 { | 95 | UART0: serial@ef600300 { |
94 | device_type = "serial"; | 96 | device_type = "serial"; |
95 | compatible = "ns16550"; | 97 | compatible = "ns16550"; |
96 | reg = <ef600300 8>; | 98 | reg = <0xef600300 0x00000008>; |
97 | virtual-reg = <ef600300>; | 99 | virtual-reg = <0xef600300>; |
98 | clock-frequency = <0>; /* Filled in by zImage */ | 100 | clock-frequency = <0>; /* Filled in by zImage */ |
99 | current-speed = <2580>; | 101 | current-speed = <9600>; |
100 | interrupt-parent = <&UIC0>; | 102 | interrupt-parent = <&UIC0>; |
101 | interrupts = <0 4>; | 103 | interrupts = <0x0 0x4>; |
102 | }; | 104 | }; |
103 | 105 | ||
104 | UART1: serial@ef600400 { | 106 | UART1: serial@ef600400 { |
105 | device_type = "serial"; | 107 | device_type = "serial"; |
106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
107 | reg = <ef600400 8>; | 109 | reg = <0xef600400 0x00000008>; |
108 | virtual-reg = <ef600400>; | 110 | virtual-reg = <0xef600400>; |
109 | clock-frequency = <0>; /* Filled in by zImage */ | 111 | clock-frequency = <0>; /* Filled in by zImage */ |
110 | current-speed = <2580>; | 112 | current-speed = <9600>; |
111 | interrupt-parent = <&UIC0>; | 113 | interrupt-parent = <&UIC0>; |
112 | interrupts = <1 4>; | 114 | interrupts = <0x1 0x4>; |
113 | }; | 115 | }; |
114 | 116 | ||
115 | IIC: i2c@ef600500 { | 117 | IIC: i2c@ef600500 { |
116 | compatible = "ibm,iic-405gp", "ibm,iic"; | 118 | compatible = "ibm,iic-405gp", "ibm,iic"; |
117 | reg = <ef600500 11>; | 119 | reg = <0xef600500 0x00000011>; |
118 | interrupt-parent = <&UIC0>; | 120 | interrupt-parent = <&UIC0>; |
119 | interrupts = <2 4>; | 121 | interrupts = <0x2 0x4>; |
120 | }; | 122 | }; |
121 | 123 | ||
122 | GPIO: gpio@ef600700 { | 124 | GPIO: gpio@ef600700 { |
123 | compatible = "ibm,gpio-405gp"; | 125 | compatible = "ibm,gpio-405gp"; |
124 | reg = <ef600700 20>; | 126 | reg = <0xef600700 0x00000020>; |
125 | }; | 127 | }; |
126 | 128 | ||
127 | EMAC: ethernet@ef600800 { | 129 | EMAC: ethernet@ef600800 { |
128 | linux,network-index = <0>; | 130 | linux,network-index = <0x0>; |
129 | device_type = "network"; | 131 | device_type = "network"; |
130 | compatible = "ibm,emac-405gp", "ibm,emac"; | 132 | compatible = "ibm,emac-405gp", "ibm,emac"; |
131 | interrupt-parent = <&UIC0>; | 133 | interrupt-parent = <&UIC0>; |
132 | interrupts = < | 134 | interrupts = < |
133 | f 4 /* Ethernet */ | 135 | 0xf 0x4 /* Ethernet */ |
134 | 9 4 /* Ethernet Wake Up */>; | 136 | 0x9 0x4 /* Ethernet Wake Up */>; |
135 | local-mac-address = [000000000000]; /* Filled in by zImage */ | 137 | local-mac-address = [000000000000]; /* Filled in by zImage */ |
136 | reg = <ef600800 70>; | 138 | reg = <0xef600800 0x00000070>; |
137 | mal-device = <&MAL>; | 139 | mal-device = <&MAL>; |
138 | mal-tx-channel = <0>; | 140 | mal-tx-channel = <0>; |
139 | mal-rx-channel = <0>; | 141 | mal-rx-channel = <0>; |
140 | cell-index = <0>; | 142 | cell-index = <0>; |
141 | max-frame-size = <5dc>; | 143 | max-frame-size = <1500>; |
142 | rx-fifo-size = <1000>; | 144 | rx-fifo-size = <4096>; |
143 | tx-fifo-size = <800>; | 145 | tx-fifo-size = <2048>; |
144 | phy-mode = "rmii"; | 146 | phy-mode = "rmii"; |
145 | phy-map = <00000000>; | 147 | phy-map = <0x00000000>; |
146 | }; | 148 | }; |
147 | 149 | ||
148 | }; | 150 | }; |
149 | 151 | ||
150 | EBC0: ebc { | 152 | EBC0: ebc { |
151 | compatible = "ibm,ebc-405gp", "ibm,ebc"; | 153 | compatible = "ibm,ebc-405gp", "ibm,ebc"; |
152 | dcr-reg = <012 2>; | 154 | dcr-reg = <0x012 0x002>; |
153 | #address-cells = <2>; | 155 | #address-cells = <2>; |
154 | #size-cells = <1>; | 156 | #size-cells = <1>; |
155 | 157 | ||
@@ -163,13 +165,13 @@ | |||
163 | /* NVRAM and RTC */ | 165 | /* NVRAM and RTC */ |
164 | nvrtc@4,200000 { | 166 | nvrtc@4,200000 { |
165 | compatible = "ds1742"; | 167 | compatible = "ds1742"; |
166 | reg = <4 200000 0>; /* size fixed up by zImage */ | 168 | reg = <0x00000004 0x00200000 0x00000000>; /* size fixed up by zImage */ |
167 | }; | 169 | }; |
168 | 170 | ||
169 | /* "BCSR" CPLD contains a PCI irq controller */ | 171 | /* "BCSR" CPLD contains a PCI irq controller */ |
170 | bcsr@4,0 { | 172 | bcsr@4,0 { |
171 | compatible = "ep405-bcsr"; | 173 | compatible = "ep405-bcsr"; |
172 | reg = <4 0 10>; | 174 | reg = <0x00000004 0x00000000 0x00000010>; |
173 | interrupt-controller; | 175 | interrupt-controller; |
174 | /* Routing table */ | 176 | /* Routing table */ |
175 | irq-routing = [ 00 /* SYSERR */ | 177 | irq-routing = [ 00 /* SYSERR */ |
@@ -198,26 +200,26 @@ | |||
198 | #address-cells = <3>; | 200 | #address-cells = <3>; |
199 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; | 201 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; |
200 | primary; | 202 | primary; |
201 | reg = <eec00000 8 /* Config space access */ | 203 | reg = <0xeec00000 0x00000008 /* Config space access */ |
202 | eed80000 4 /* IACK */ | 204 | 0xeed80000 0x00000004 /* IACK */ |
203 | eed80000 4 /* Special cycle */ | 205 | 0xeed80000 0x00000004 /* Special cycle */ |
204 | ef480000 40>; /* Internal registers */ | 206 | 0xef480000 0x00000040>; /* Internal registers */ |
205 | 207 | ||
206 | /* Outbound ranges, one memory and one IO, | 208 | /* Outbound ranges, one memory and one IO, |
207 | * later cannot be changed. Chip supports a second | 209 | * later cannot be changed. Chip supports a second |
208 | * IO range but we don't use it for now | 210 | * IO range but we don't use it for now |
209 | */ | 211 | */ |
210 | ranges = <02000000 0 80000000 80000000 0 20000000 | 212 | ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 |
211 | 01000000 0 00000000 e8000000 0 00010000>; | 213 | 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
212 | 214 | ||
213 | /* Inbound 2GB range starting at 0 */ | 215 | /* Inbound 2GB range starting at 0 */ |
214 | dma-ranges = <42000000 0 0 0 0 80000000>; | 216 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
215 | 217 | ||
216 | /* That's all I know about IRQs on that thing ... */ | 218 | /* That's all I know about IRQs on that thing ... */ |
217 | interrupt-map-mask = <f800 0 0 0>; | 219 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
218 | interrupt-map = < | 220 | interrupt-map = < |
219 | /* USB */ | 221 | /* USB */ |
220 | 7000 0 0 0 &UIC0 1e 8 /* IRQ5 */ | 222 | 0x7000 0x0 0x0 0x0 &UIC0 0x1e 0x8 /* IRQ5 */ |
221 | >; | 223 | >; |
222 | }; | 224 | }; |
223 | }; | 225 | }; |
diff --git a/arch/powerpc/boot/dts/glacier.dts b/arch/powerpc/boot/dts/glacier.dts index 0f2fc077d8db..463650c5f61d 100644 --- a/arch/powerpc/boot/dts/glacier.dts +++ b/arch/powerpc/boot/dts/glacier.dts | |||
@@ -8,12 +8,14 @@ | |||
8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
12 | |||
11 | / { | 13 | / { |
12 | #address-cells = <2>; | 14 | #address-cells = <2>; |
13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
14 | model = "amcc,glacier"; | 16 | model = "amcc,glacier"; |
15 | compatible = "amcc,glacier", "amcc,canyonlands"; | 17 | compatible = "amcc,glacier", "amcc,canyonlands"; |
16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
17 | 19 | ||
18 | aliases { | 20 | aliases { |
19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
@@ -31,13 +33,13 @@ | |||
31 | cpu@0 { | 33 | cpu@0 { |
32 | device_type = "cpu"; | 34 | device_type = "cpu"; |
33 | model = "PowerPC,460GT"; | 35 | model = "PowerPC,460GT"; |
34 | reg = <0>; | 36 | reg = <0x00000000>; |
35 | clock-frequency = <0>; /* Filled in by U-Boot */ | 37 | clock-frequency = <0>; /* Filled in by U-Boot */ |
36 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 38 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
37 | i-cache-line-size = <20>; | 39 | i-cache-line-size = <32>; |
38 | d-cache-line-size = <20>; | 40 | d-cache-line-size = <32>; |
39 | i-cache-size = <8000>; | 41 | i-cache-size = <32768>; |
40 | d-cache-size = <8000>; | 42 | d-cache-size = <32768>; |
41 | dcr-controller; | 43 | dcr-controller; |
42 | dcr-access-method = "native"; | 44 | dcr-access-method = "native"; |
43 | }; | 45 | }; |
@@ -45,14 +47,14 @@ | |||
45 | 47 | ||
46 | memory { | 48 | memory { |
47 | device_type = "memory"; | 49 | device_type = "memory"; |
48 | reg = <0 0 0>; /* Filled in by U-Boot */ | 50 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */ |
49 | }; | 51 | }; |
50 | 52 | ||
51 | UIC0: interrupt-controller0 { | 53 | UIC0: interrupt-controller0 { |
52 | compatible = "ibm,uic-460gt","ibm,uic"; | 54 | compatible = "ibm,uic-460gt","ibm,uic"; |
53 | interrupt-controller; | 55 | interrupt-controller; |
54 | cell-index = <0>; | 56 | cell-index = <0>; |
55 | dcr-reg = <0c0 009>; | 57 | dcr-reg = <0x0c0 0x009>; |
56 | #address-cells = <0>; | 58 | #address-cells = <0>; |
57 | #size-cells = <0>; | 59 | #size-cells = <0>; |
58 | #interrupt-cells = <2>; | 60 | #interrupt-cells = <2>; |
@@ -62,11 +64,11 @@ | |||
62 | compatible = "ibm,uic-460gt","ibm,uic"; | 64 | compatible = "ibm,uic-460gt","ibm,uic"; |
63 | interrupt-controller; | 65 | interrupt-controller; |
64 | cell-index = <1>; | 66 | cell-index = <1>; |
65 | dcr-reg = <0d0 009>; | 67 | dcr-reg = <0x0d0 0x009>; |
66 | #address-cells = <0>; | 68 | #address-cells = <0>; |
67 | #size-cells = <0>; | 69 | #size-cells = <0>; |
68 | #interrupt-cells = <2>; | 70 | #interrupt-cells = <2>; |
69 | interrupts = <1e 4 1f 4>; /* cascade */ | 71 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
70 | interrupt-parent = <&UIC0>; | 72 | interrupt-parent = <&UIC0>; |
71 | }; | 73 | }; |
72 | 74 | ||
@@ -74,11 +76,11 @@ | |||
74 | compatible = "ibm,uic-460gt","ibm,uic"; | 76 | compatible = "ibm,uic-460gt","ibm,uic"; |
75 | interrupt-controller; | 77 | interrupt-controller; |
76 | cell-index = <2>; | 78 | cell-index = <2>; |
77 | dcr-reg = <0e0 009>; | 79 | dcr-reg = <0x0e0 0x009>; |
78 | #address-cells = <0>; | 80 | #address-cells = <0>; |
79 | #size-cells = <0>; | 81 | #size-cells = <0>; |
80 | #interrupt-cells = <2>; | 82 | #interrupt-cells = <2>; |
81 | interrupts = <a 4 b 4>; /* cascade */ | 83 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
82 | interrupt-parent = <&UIC0>; | 84 | interrupt-parent = <&UIC0>; |
83 | }; | 85 | }; |
84 | 86 | ||
@@ -86,22 +88,22 @@ | |||
86 | compatible = "ibm,uic-460gt","ibm,uic"; | 88 | compatible = "ibm,uic-460gt","ibm,uic"; |
87 | interrupt-controller; | 89 | interrupt-controller; |
88 | cell-index = <3>; | 90 | cell-index = <3>; |
89 | dcr-reg = <0f0 009>; | 91 | dcr-reg = <0x0f0 0x009>; |
90 | #address-cells = <0>; | 92 | #address-cells = <0>; |
91 | #size-cells = <0>; | 93 | #size-cells = <0>; |
92 | #interrupt-cells = <2>; | 94 | #interrupt-cells = <2>; |
93 | interrupts = <10 4 11 4>; /* cascade */ | 95 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
94 | interrupt-parent = <&UIC0>; | 96 | interrupt-parent = <&UIC0>; |
95 | }; | 97 | }; |
96 | 98 | ||
97 | SDR0: sdr { | 99 | SDR0: sdr { |
98 | compatible = "ibm,sdr-460gt"; | 100 | compatible = "ibm,sdr-460gt"; |
99 | dcr-reg = <00e 002>; | 101 | dcr-reg = <0x00e 0x002>; |
100 | }; | 102 | }; |
101 | 103 | ||
102 | CPR0: cpr { | 104 | CPR0: cpr { |
103 | compatible = "ibm,cpr-460gt"; | 105 | compatible = "ibm,cpr-460gt"; |
104 | dcr-reg = <00c 002>; | 106 | dcr-reg = <0x00c 0x002>; |
105 | }; | 107 | }; |
106 | 108 | ||
107 | plb { | 109 | plb { |
@@ -113,75 +115,75 @@ | |||
113 | 115 | ||
114 | SDRAM0: sdram { | 116 | SDRAM0: sdram { |
115 | compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; | 117 | compatible = "ibm,sdram-460gt", "ibm,sdram-405gp"; |
116 | dcr-reg = <010 2>; | 118 | dcr-reg = <0x010 0x002>; |
117 | }; | 119 | }; |
118 | 120 | ||
119 | MAL0: mcmal { | 121 | MAL0: mcmal { |
120 | compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; | 122 | compatible = "ibm,mcmal-460gt", "ibm,mcmal2"; |
121 | dcr-reg = <180 62>; | 123 | dcr-reg = <0x180 0x062>; |
122 | num-tx-chans = <4>; | 124 | num-tx-chans = <4>; |
123 | num-rx-chans = <20>; | 125 | num-rx-chans = <32>; |
124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
126 | interrupt-parent = <&UIC2>; | 128 | interrupt-parent = <&UIC2>; |
127 | interrupts = < /*TXEOB*/ 6 4 | 129 | interrupts = < /*TXEOB*/ 0x6 0x4 |
128 | /*RXEOB*/ 7 4 | 130 | /*RXEOB*/ 0x7 0x4 |
129 | /*SERR*/ 3 4 | 131 | /*SERR*/ 0x3 0x4 |
130 | /*TXDE*/ 4 4 | 132 | /*TXDE*/ 0x4 0x4 |
131 | /*RXDE*/ 5 4>; | 133 | /*RXDE*/ 0x5 0x4>; |
132 | desc-base-addr-high = <8>; | 134 | desc-base-addr-high = <0x8>; |
133 | }; | 135 | }; |
134 | 136 | ||
135 | POB0: opb { | 137 | POB0: opb { |
136 | compatible = "ibm,opb-460gt", "ibm,opb"; | 138 | compatible = "ibm,opb-460gt", "ibm,opb"; |
137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
139 | ranges = <b0000000 4 b0000000 50000000>; | 141 | ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>; |
140 | clock-frequency = <0>; /* Filled in by U-Boot */ | 142 | clock-frequency = <0>; /* Filled in by U-Boot */ |
141 | 143 | ||
142 | EBC0: ebc { | 144 | EBC0: ebc { |
143 | compatible = "ibm,ebc-460gt", "ibm,ebc"; | 145 | compatible = "ibm,ebc-460gt", "ibm,ebc"; |
144 | dcr-reg = <012 2>; | 146 | dcr-reg = <0x012 0x002>; |
145 | #address-cells = <2>; | 147 | #address-cells = <2>; |
146 | #size-cells = <1>; | 148 | #size-cells = <1>; |
147 | clock-frequency = <0>; /* Filled in by U-Boot */ | 149 | clock-frequency = <0>; /* Filled in by U-Boot */ |
148 | /* ranges property is supplied by U-Boot */ | 150 | /* ranges property is supplied by U-Boot */ |
149 | interrupts = <6 4>; | 151 | interrupts = <0x6 0x4>; |
150 | interrupt-parent = <&UIC1>; | 152 | interrupt-parent = <&UIC1>; |
151 | 153 | ||
152 | nor_flash@0,0 { | 154 | nor_flash@0,0 { |
153 | compatible = "amd,s29gl512n", "cfi-flash"; | 155 | compatible = "amd,s29gl512n", "cfi-flash"; |
154 | bank-width = <2>; | 156 | bank-width = <2>; |
155 | reg = <0 000000 4000000>; | 157 | reg = <0x00000000 0x00000000 0x04000000>; |
156 | #address-cells = <1>; | 158 | #address-cells = <1>; |
157 | #size-cells = <1>; | 159 | #size-cells = <1>; |
158 | partition@0 { | 160 | partition@0 { |
159 | label = "kernel"; | 161 | label = "kernel"; |
160 | reg = <0 1e0000>; | 162 | reg = <0x00000000 0x001e0000>; |
161 | }; | 163 | }; |
162 | partition@1e0000 { | 164 | partition@1e0000 { |
163 | label = "dtb"; | 165 | label = "dtb"; |
164 | reg = <1e0000 20000>; | 166 | reg = <0x001e0000 0x00020000>; |
165 | }; | 167 | }; |
166 | partition@200000 { | 168 | partition@200000 { |
167 | label = "ramdisk"; | 169 | label = "ramdisk"; |
168 | reg = <200000 1400000>; | 170 | reg = <0x00200000 0x01400000>; |
169 | }; | 171 | }; |
170 | partition@1600000 { | 172 | partition@1600000 { |
171 | label = "jffs2"; | 173 | label = "jffs2"; |
172 | reg = <1600000 400000>; | 174 | reg = <0x01600000 0x00400000>; |
173 | }; | 175 | }; |
174 | partition@1a00000 { | 176 | partition@1a00000 { |
175 | label = "user"; | 177 | label = "user"; |
176 | reg = <1a00000 2560000>; | 178 | reg = <0x01a00000 0x02560000>; |
177 | }; | 179 | }; |
178 | partition@3f60000 { | 180 | partition@3f60000 { |
179 | label = "env"; | 181 | label = "env"; |
180 | reg = <3f60000 40000>; | 182 | reg = <0x03f60000 0x00040000>; |
181 | }; | 183 | }; |
182 | partition@3fa0000 { | 184 | partition@3fa0000 { |
183 | label = "u-boot"; | 185 | label = "u-boot"; |
184 | reg = <3fa0000 60000>; | 186 | reg = <0x03fa0000 0x00060000>; |
185 | }; | 187 | }; |
186 | }; | 188 | }; |
187 | }; | 189 | }; |
@@ -189,109 +191,109 @@ | |||
189 | UART0: serial@ef600300 { | 191 | UART0: serial@ef600300 { |
190 | device_type = "serial"; | 192 | device_type = "serial"; |
191 | compatible = "ns16550"; | 193 | compatible = "ns16550"; |
192 | reg = <ef600300 8>; | 194 | reg = <0xef600300 0x00000008>; |
193 | virtual-reg = <ef600300>; | 195 | virtual-reg = <0xef600300>; |
194 | clock-frequency = <0>; /* Filled in by U-Boot */ | 196 | clock-frequency = <0>; /* Filled in by U-Boot */ |
195 | current-speed = <0>; /* Filled in by U-Boot */ | 197 | current-speed = <0>; /* Filled in by U-Boot */ |
196 | interrupt-parent = <&UIC1>; | 198 | interrupt-parent = <&UIC1>; |
197 | interrupts = <1 4>; | 199 | interrupts = <0x1 0x4>; |
198 | }; | 200 | }; |
199 | 201 | ||
200 | UART1: serial@ef600400 { | 202 | UART1: serial@ef600400 { |
201 | device_type = "serial"; | 203 | device_type = "serial"; |
202 | compatible = "ns16550"; | 204 | compatible = "ns16550"; |
203 | reg = <ef600400 8>; | 205 | reg = <0xef600400 0x00000008>; |
204 | virtual-reg = <ef600400>; | 206 | virtual-reg = <0xef600400>; |
205 | clock-frequency = <0>; /* Filled in by U-Boot */ | 207 | clock-frequency = <0>; /* Filled in by U-Boot */ |
206 | current-speed = <0>; /* Filled in by U-Boot */ | 208 | current-speed = <0>; /* Filled in by U-Boot */ |
207 | interrupt-parent = <&UIC0>; | 209 | interrupt-parent = <&UIC0>; |
208 | interrupts = <1 4>; | 210 | interrupts = <0x1 0x4>; |
209 | }; | 211 | }; |
210 | 212 | ||
211 | UART2: serial@ef600500 { | 213 | UART2: serial@ef600500 { |
212 | device_type = "serial"; | 214 | device_type = "serial"; |
213 | compatible = "ns16550"; | 215 | compatible = "ns16550"; |
214 | reg = <ef600500 8>; | 216 | reg = <0xef600500 0x00000008>; |
215 | virtual-reg = <ef600500>; | 217 | virtual-reg = <0xef600500>; |
216 | clock-frequency = <0>; /* Filled in by U-Boot */ | 218 | clock-frequency = <0>; /* Filled in by U-Boot */ |
217 | current-speed = <0>; /* Filled in by U-Boot */ | 219 | current-speed = <0>; /* Filled in by U-Boot */ |
218 | interrupt-parent = <&UIC1>; | 220 | interrupt-parent = <&UIC1>; |
219 | interrupts = <1d 4>; | 221 | interrupts = <0x1d 0x4>; |
220 | }; | 222 | }; |
221 | 223 | ||
222 | UART3: serial@ef600600 { | 224 | UART3: serial@ef600600 { |
223 | device_type = "serial"; | 225 | device_type = "serial"; |
224 | compatible = "ns16550"; | 226 | compatible = "ns16550"; |
225 | reg = <ef600600 8>; | 227 | reg = <0xef600600 0x00000008>; |
226 | virtual-reg = <ef600600>; | 228 | virtual-reg = <0xef600600>; |
227 | clock-frequency = <0>; /* Filled in by U-Boot */ | 229 | clock-frequency = <0>; /* Filled in by U-Boot */ |
228 | current-speed = <0>; /* Filled in by U-Boot */ | 230 | current-speed = <0>; /* Filled in by U-Boot */ |
229 | interrupt-parent = <&UIC1>; | 231 | interrupt-parent = <&UIC1>; |
230 | interrupts = <1e 4>; | 232 | interrupts = <0x1e 0x4>; |
231 | }; | 233 | }; |
232 | 234 | ||
233 | IIC0: i2c@ef600700 { | 235 | IIC0: i2c@ef600700 { |
234 | compatible = "ibm,iic-460gt", "ibm,iic"; | 236 | compatible = "ibm,iic-460gt", "ibm,iic"; |
235 | reg = <ef600700 14>; | 237 | reg = <0xef600700 0x00000014>; |
236 | interrupt-parent = <&UIC0>; | 238 | interrupt-parent = <&UIC0>; |
237 | interrupts = <2 4>; | 239 | interrupts = <0x2 0x4>; |
238 | }; | 240 | }; |
239 | 241 | ||
240 | IIC1: i2c@ef600800 { | 242 | IIC1: i2c@ef600800 { |
241 | compatible = "ibm,iic-460gt", "ibm,iic"; | 243 | compatible = "ibm,iic-460gt", "ibm,iic"; |
242 | reg = <ef600800 14>; | 244 | reg = <0xef600800 0x00000014>; |
243 | interrupt-parent = <&UIC0>; | 245 | interrupt-parent = <&UIC0>; |
244 | interrupts = <3 4>; | 246 | interrupts = <0x3 0x4>; |
245 | }; | 247 | }; |
246 | 248 | ||
247 | ZMII0: emac-zmii@ef600d00 { | 249 | ZMII0: emac-zmii@ef600d00 { |
248 | compatible = "ibm,zmii-460gt", "ibm,zmii"; | 250 | compatible = "ibm,zmii-460gt", "ibm,zmii"; |
249 | reg = <ef600d00 c>; | 251 | reg = <0xef600d00 0x0000000c>; |
250 | }; | 252 | }; |
251 | 253 | ||
252 | RGMII0: emac-rgmii@ef601500 { | 254 | RGMII0: emac-rgmii@ef601500 { |
253 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; | 255 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; |
254 | reg = <ef601500 8>; | 256 | reg = <0xef601500 0x00000008>; |
255 | has-mdio; | 257 | has-mdio; |
256 | }; | 258 | }; |
257 | 259 | ||
258 | RGMII1: emac-rgmii@ef601600 { | 260 | RGMII1: emac-rgmii@ef601600 { |
259 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; | 261 | compatible = "ibm,rgmii-460gt", "ibm,rgmii"; |
260 | reg = <ef601600 8>; | 262 | reg = <0xef601600 0x00000008>; |
261 | has-mdio; | 263 | has-mdio; |
262 | }; | 264 | }; |
263 | 265 | ||
264 | TAH0: emac-tah@ef601350 { | 266 | TAH0: emac-tah@ef601350 { |
265 | compatible = "ibm,tah-460gt", "ibm,tah"; | 267 | compatible = "ibm,tah-460gt", "ibm,tah"; |
266 | reg = <ef601350 30>; | 268 | reg = <0xef601350 0x00000030>; |
267 | }; | 269 | }; |
268 | 270 | ||
269 | TAH1: emac-tah@ef601450 { | 271 | TAH1: emac-tah@ef601450 { |
270 | compatible = "ibm,tah-460gt", "ibm,tah"; | 272 | compatible = "ibm,tah-460gt", "ibm,tah"; |
271 | reg = <ef601450 30>; | 273 | reg = <0xef601450 0x00000030>; |
272 | }; | 274 | }; |
273 | 275 | ||
274 | EMAC0: ethernet@ef600e00 { | 276 | EMAC0: ethernet@ef600e00 { |
275 | device_type = "network"; | 277 | device_type = "network"; |
276 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 278 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
277 | interrupt-parent = <&EMAC0>; | 279 | interrupt-parent = <&EMAC0>; |
278 | interrupts = <0 1>; | 280 | interrupts = <0x0 0x1>; |
279 | #interrupt-cells = <1>; | 281 | #interrupt-cells = <1>; |
280 | #address-cells = <0>; | 282 | #address-cells = <0>; |
281 | #size-cells = <0>; | 283 | #size-cells = <0>; |
282 | interrupt-map = </*Status*/ 0 &UIC2 10 4 | 284 | interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4 |
283 | /*Wake*/ 1 &UIC2 14 4>; | 285 | /*Wake*/ 0x1 &UIC2 0x14 0x4>; |
284 | reg = <ef600e00 70>; | 286 | reg = <0xef600e00 0x00000070>; |
285 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 287 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
286 | mal-device = <&MAL0>; | 288 | mal-device = <&MAL0>; |
287 | mal-tx-channel = <0>; | 289 | mal-tx-channel = <0>; |
288 | mal-rx-channel = <0>; | 290 | mal-rx-channel = <0>; |
289 | cell-index = <0>; | 291 | cell-index = <0>; |
290 | max-frame-size = <2328>; | 292 | max-frame-size = <9000>; |
291 | rx-fifo-size = <1000>; | 293 | rx-fifo-size = <4096>; |
292 | tx-fifo-size = <800>; | 294 | tx-fifo-size = <2048>; |
293 | phy-mode = "rgmii"; | 295 | phy-mode = "rgmii"; |
294 | phy-map = <00000000>; | 296 | phy-map = <0x00000000>; |
295 | rgmii-device = <&RGMII0>; | 297 | rgmii-device = <&RGMII0>; |
296 | rgmii-channel = <0>; | 298 | rgmii-channel = <0>; |
297 | tah-device = <&TAH0>; | 299 | tah-device = <&TAH0>; |
@@ -304,23 +306,23 @@ | |||
304 | device_type = "network"; | 306 | device_type = "network"; |
305 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 307 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
306 | interrupt-parent = <&EMAC1>; | 308 | interrupt-parent = <&EMAC1>; |
307 | interrupts = <0 1>; | 309 | interrupts = <0x0 0x1>; |
308 | #interrupt-cells = <1>; | 310 | #interrupt-cells = <1>; |
309 | #address-cells = <0>; | 311 | #address-cells = <0>; |
310 | #size-cells = <0>; | 312 | #size-cells = <0>; |
311 | interrupt-map = </*Status*/ 0 &UIC2 11 4 | 313 | interrupt-map = </*Status*/ 0x0 &UIC2 0x11 0x4 |
312 | /*Wake*/ 1 &UIC2 15 4>; | 314 | /*Wake*/ 0x1 &UIC2 0x15 0x4>; |
313 | reg = <ef600f00 70>; | 315 | reg = <0xef600f00 0x00000070>; |
314 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 316 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
315 | mal-device = <&MAL0>; | 317 | mal-device = <&MAL0>; |
316 | mal-tx-channel = <1>; | 318 | mal-tx-channel = <1>; |
317 | mal-rx-channel = <8>; | 319 | mal-rx-channel = <8>; |
318 | cell-index = <1>; | 320 | cell-index = <1>; |
319 | max-frame-size = <2328>; | 321 | max-frame-size = <9000>; |
320 | rx-fifo-size = <1000>; | 322 | rx-fifo-size = <4096>; |
321 | tx-fifo-size = <800>; | 323 | tx-fifo-size = <2048>; |
322 | phy-mode = "rgmii"; | 324 | phy-mode = "rgmii"; |
323 | phy-map = <00000000>; | 325 | phy-map = <0x00000000>; |
324 | rgmii-device = <&RGMII0>; | 326 | rgmii-device = <&RGMII0>; |
325 | rgmii-channel = <1>; | 327 | rgmii-channel = <1>; |
326 | tah-device = <&TAH1>; | 328 | tah-device = <&TAH1>; |
@@ -334,23 +336,23 @@ | |||
334 | device_type = "network"; | 336 | device_type = "network"; |
335 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 337 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
336 | interrupt-parent = <&EMAC2>; | 338 | interrupt-parent = <&EMAC2>; |
337 | interrupts = <0 1>; | 339 | interrupts = <0x0 0x1>; |
338 | #interrupt-cells = <1>; | 340 | #interrupt-cells = <1>; |
339 | #address-cells = <0>; | 341 | #address-cells = <0>; |
340 | #size-cells = <0>; | 342 | #size-cells = <0>; |
341 | interrupt-map = </*Status*/ 0 &UIC2 12 4 | 343 | interrupt-map = </*Status*/ 0x0 &UIC2 0x12 0x4 |
342 | /*Wake*/ 1 &UIC2 16 4>; | 344 | /*Wake*/ 0x1 &UIC2 0x16 0x4>; |
343 | reg = <ef601100 70>; | 345 | reg = <0xef601100 0x00000070>; |
344 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 346 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
345 | mal-device = <&MAL0>; | 347 | mal-device = <&MAL0>; |
346 | mal-tx-channel = <2>; | 348 | mal-tx-channel = <2>; |
347 | mal-rx-channel = <10>; | 349 | mal-rx-channel = <16>; |
348 | cell-index = <2>; | 350 | cell-index = <2>; |
349 | max-frame-size = <2328>; | 351 | max-frame-size = <9000>; |
350 | rx-fifo-size = <1000>; | 352 | rx-fifo-size = <4096>; |
351 | tx-fifo-size = <800>; | 353 | tx-fifo-size = <2048>; |
352 | phy-mode = "rgmii"; | 354 | phy-mode = "rgmii"; |
353 | phy-map = <00000000>; | 355 | phy-map = <0x00000000>; |
354 | rgmii-device = <&RGMII1>; | 356 | rgmii-device = <&RGMII1>; |
355 | rgmii-channel = <0>; | 357 | rgmii-channel = <0>; |
356 | has-inverted-stacr-oc; | 358 | has-inverted-stacr-oc; |
@@ -362,23 +364,23 @@ | |||
362 | device_type = "network"; | 364 | device_type = "network"; |
363 | compatible = "ibm,emac-460gt", "ibm,emac4"; | 365 | compatible = "ibm,emac-460gt", "ibm,emac4"; |
364 | interrupt-parent = <&EMAC3>; | 366 | interrupt-parent = <&EMAC3>; |
365 | interrupts = <0 1>; | 367 | interrupts = <0x0 0x1>; |
366 | #interrupt-cells = <1>; | 368 | #interrupt-cells = <1>; |
367 | #address-cells = <0>; | 369 | #address-cells = <0>; |
368 | #size-cells = <0>; | 370 | #size-cells = <0>; |
369 | interrupt-map = </*Status*/ 0 &UIC2 13 4 | 371 | interrupt-map = </*Status*/ 0x0 &UIC2 0x13 0x4 |
370 | /*Wake*/ 1 &UIC2 17 4>; | 372 | /*Wake*/ 0x1 &UIC2 0x17 0x4>; |
371 | reg = <ef601200 70>; | 373 | reg = <0xef601200 0x00000070>; |
372 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 374 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
373 | mal-device = <&MAL0>; | 375 | mal-device = <&MAL0>; |
374 | mal-tx-channel = <3>; | 376 | mal-tx-channel = <3>; |
375 | mal-rx-channel = <18>; | 377 | mal-rx-channel = <24>; |
376 | cell-index = <3>; | 378 | cell-index = <3>; |
377 | max-frame-size = <2328>; | 379 | max-frame-size = <9000>; |
378 | rx-fifo-size = <1000>; | 380 | rx-fifo-size = <4096>; |
379 | tx-fifo-size = <800>; | 381 | tx-fifo-size = <2048>; |
380 | phy-mode = "rgmii"; | 382 | phy-mode = "rgmii"; |
381 | phy-map = <00000000>; | 383 | phy-map = <0x00000000>; |
382 | rgmii-device = <&RGMII1>; | 384 | rgmii-device = <&RGMII1>; |
383 | rgmii-channel = <1>; | 385 | rgmii-channel = <1>; |
384 | has-inverted-stacr-oc; | 386 | has-inverted-stacr-oc; |
@@ -396,27 +398,27 @@ | |||
396 | primary; | 398 | primary; |
397 | large-inbound-windows; | 399 | large-inbound-windows; |
398 | enable-msi-hole; | 400 | enable-msi-hole; |
399 | reg = <c 0ec00000 8 /* Config space access */ | 401 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
400 | 0 0 0 /* no IACK cycles */ | 402 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
401 | c 0ed00000 4 /* Special cycles */ | 403 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
402 | c 0ec80000 100 /* Internal registers */ | 404 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
403 | c 0ec80100 fc>; /* Internal messaging registers */ | 405 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
404 | 406 | ||
405 | /* Outbound ranges, one memory and one IO, | 407 | /* Outbound ranges, one memory and one IO, |
406 | * later cannot be changed | 408 | * later cannot be changed |
407 | */ | 409 | */ |
408 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 410 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
409 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 411 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
410 | 412 | ||
411 | /* Inbound 2GB range starting at 0 */ | 413 | /* Inbound 2GB range starting at 0 */ |
412 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 414 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
413 | 415 | ||
414 | /* This drives busses 0 to 0x3f */ | 416 | /* This drives busses 0 to 0x3f */ |
415 | bus-range = <0 3f>; | 417 | bus-range = <0x0 0x3f>; |
416 | 418 | ||
417 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ | 419 | /* All PCI interrupts are routed to ext IRQ 2 -> UIC1-0 */ |
418 | interrupt-map-mask = <0000 0 0 0>; | 420 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
419 | interrupt-map = < 0000 0 0 0 &UIC1 0 8 >; | 421 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC1 0x0 0x8 >; |
420 | }; | 422 | }; |
421 | 423 | ||
422 | PCIE0: pciex@d00000000 { | 424 | PCIE0: pciex@d00000000 { |
@@ -426,23 +428,23 @@ | |||
426 | #address-cells = <3>; | 428 | #address-cells = <3>; |
427 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 429 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
428 | primary; | 430 | primary; |
429 | port = <0>; /* port number */ | 431 | port = <0x0>; /* port number */ |
430 | reg = <d 00000000 20000000 /* Config space access */ | 432 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
431 | c 08010000 00001000>; /* Registers */ | 433 | 0x0000000c 0x08010000 0x00001000>; /* Registers */ |
432 | dcr-reg = <100 020>; | 434 | dcr-reg = <0x100 0x020>; |
433 | sdr-base = <300>; | 435 | sdr-base = <0x300>; |
434 | 436 | ||
435 | /* Outbound ranges, one memory and one IO, | 437 | /* Outbound ranges, one memory and one IO, |
436 | * later cannot be changed | 438 | * later cannot be changed |
437 | */ | 439 | */ |
438 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 440 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
439 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 441 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
440 | 442 | ||
441 | /* Inbound 2GB range starting at 0 */ | 443 | /* Inbound 2GB range starting at 0 */ |
442 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 444 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
443 | 445 | ||
444 | /* This drives busses 40 to 0x7f */ | 446 | /* This drives busses 40 to 0x7f */ |
445 | bus-range = <40 7f>; | 447 | bus-range = <0x40 0x7f>; |
446 | 448 | ||
447 | /* Legacy interrupts (note the weird polarity, the bridge seems | 449 | /* Legacy interrupts (note the weird polarity, the bridge seems |
448 | * to invert PCIe legacy interrupts). | 450 | * to invert PCIe legacy interrupts). |
@@ -452,12 +454,12 @@ | |||
452 | * below are basically de-swizzled numbers. | 454 | * below are basically de-swizzled numbers. |
453 | * The real slot is on idsel 0, so the swizzling is 1:1 | 455 | * The real slot is on idsel 0, so the swizzling is 1:1 |
454 | */ | 456 | */ |
455 | interrupt-map-mask = <0000 0 0 7>; | 457 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
456 | interrupt-map = < | 458 | interrupt-map = < |
457 | 0000 0 0 1 &UIC3 c 4 /* swizzled int A */ | 459 | 0x0 0x0 0x0 0x1 &UIC3 0xc 0x4 /* swizzled int A */ |
458 | 0000 0 0 2 &UIC3 d 4 /* swizzled int B */ | 460 | 0x0 0x0 0x0 0x2 &UIC3 0xd 0x4 /* swizzled int B */ |
459 | 0000 0 0 3 &UIC3 e 4 /* swizzled int C */ | 461 | 0x0 0x0 0x0 0x3 &UIC3 0xe 0x4 /* swizzled int C */ |
460 | 0000 0 0 4 &UIC3 f 4 /* swizzled int D */>; | 462 | 0x0 0x0 0x0 0x4 &UIC3 0xf 0x4 /* swizzled int D */>; |
461 | }; | 463 | }; |
462 | 464 | ||
463 | PCIE1: pciex@d20000000 { | 465 | PCIE1: pciex@d20000000 { |
@@ -467,23 +469,23 @@ | |||
467 | #address-cells = <3>; | 469 | #address-cells = <3>; |
468 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; | 470 | compatible = "ibm,plb-pciex-460ex", "ibm,plb-pciex"; |
469 | primary; | 471 | primary; |
470 | port = <1>; /* port number */ | 472 | port = <0x1>; /* port number */ |
471 | reg = <d 20000000 20000000 /* Config space access */ | 473 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
472 | c 08011000 00001000>; /* Registers */ | 474 | 0x0000000c 0x08011000 0x00001000>; /* Registers */ |
473 | dcr-reg = <120 020>; | 475 | dcr-reg = <0x120 0x020>; |
474 | sdr-base = <340>; | 476 | sdr-base = <0x340>; |
475 | 477 | ||
476 | /* Outbound ranges, one memory and one IO, | 478 | /* Outbound ranges, one memory and one IO, |
477 | * later cannot be changed | 479 | * later cannot be changed |
478 | */ | 480 | */ |
479 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 481 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
480 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 482 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
481 | 483 | ||
482 | /* Inbound 2GB range starting at 0 */ | 484 | /* Inbound 2GB range starting at 0 */ |
483 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 485 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
484 | 486 | ||
485 | /* This drives busses 80 to 0xbf */ | 487 | /* This drives busses 80 to 0xbf */ |
486 | bus-range = <80 bf>; | 488 | bus-range = <0x80 0xbf>; |
487 | 489 | ||
488 | /* Legacy interrupts (note the weird polarity, the bridge seems | 490 | /* Legacy interrupts (note the weird polarity, the bridge seems |
489 | * to invert PCIe legacy interrupts). | 491 | * to invert PCIe legacy interrupts). |
@@ -493,12 +495,12 @@ | |||
493 | * below are basically de-swizzled numbers. | 495 | * below are basically de-swizzled numbers. |
494 | * The real slot is on idsel 0, so the swizzling is 1:1 | 496 | * The real slot is on idsel 0, so the swizzling is 1:1 |
495 | */ | 497 | */ |
496 | interrupt-map-mask = <0000 0 0 7>; | 498 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
497 | interrupt-map = < | 499 | interrupt-map = < |
498 | 0000 0 0 1 &UIC3 10 4 /* swizzled int A */ | 500 | 0x0 0x0 0x0 0x1 &UIC3 0x10 0x4 /* swizzled int A */ |
499 | 0000 0 0 2 &UIC3 11 4 /* swizzled int B */ | 501 | 0x0 0x0 0x0 0x2 &UIC3 0x11 0x4 /* swizzled int B */ |
500 | 0000 0 0 3 &UIC3 12 4 /* swizzled int C */ | 502 | 0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */ |
501 | 0000 0 0 4 &UIC3 13 4 /* swizzled int D */>; | 503 | 0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>; |
502 | }; | 504 | }; |
503 | }; | 505 | }; |
504 | }; | 506 | }; |
diff --git a/arch/powerpc/boot/dts/haleakala.dts b/arch/powerpc/boot/dts/haleakala.dts index b5d95ac24dbf..2c2fceaabbcd 100644 --- a/arch/powerpc/boot/dts/haleakala.dts +++ b/arch/powerpc/boot/dts/haleakala.dts | |||
@@ -8,12 +8,14 @@ | |||
8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
12 | |||
11 | / { | 13 | / { |
12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
14 | model = "amcc,haleakala"; | 16 | model = "amcc,haleakala"; |
15 | compatible = "amcc,haleakala", "amcc,kilauea"; | 17 | compatible = "amcc,haleakala", "amcc,kilauea"; |
16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
17 | 19 | ||
18 | aliases { | 20 | aliases { |
19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
@@ -28,13 +30,13 @@ | |||
28 | cpu@0 { | 30 | cpu@0 { |
29 | device_type = "cpu"; | 31 | device_type = "cpu"; |
30 | model = "PowerPC,405EXr"; | 32 | model = "PowerPC,405EXr"; |
31 | reg = <0>; | 33 | reg = <0x00000000>; |
32 | clock-frequency = <0>; /* Filled in by U-Boot */ | 34 | clock-frequency = <0>; /* Filled in by U-Boot */ |
33 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 35 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
34 | i-cache-line-size = <20>; | 36 | i-cache-line-size = <32>; |
35 | d-cache-line-size = <20>; | 37 | d-cache-line-size = <32>; |
36 | i-cache-size = <4000>; /* 16 kB */ | 38 | i-cache-size = <16384>; /* 16 kB */ |
37 | d-cache-size = <4000>; /* 16 kB */ | 39 | d-cache-size = <16384>; /* 16 kB */ |
38 | dcr-controller; | 40 | dcr-controller; |
39 | dcr-access-method = "native"; | 41 | dcr-access-method = "native"; |
40 | }; | 42 | }; |
@@ -42,14 +44,14 @@ | |||
42 | 44 | ||
43 | memory { | 45 | memory { |
44 | device_type = "memory"; | 46 | device_type = "memory"; |
45 | reg = <0 0>; /* Filled in by U-Boot */ | 47 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
46 | }; | 48 | }; |
47 | 49 | ||
48 | UIC0: interrupt-controller { | 50 | UIC0: interrupt-controller { |
49 | compatible = "ibm,uic-405exr", "ibm,uic"; | 51 | compatible = "ibm,uic-405exr", "ibm,uic"; |
50 | interrupt-controller; | 52 | interrupt-controller; |
51 | cell-index = <0>; | 53 | cell-index = <0>; |
52 | dcr-reg = <0c0 009>; | 54 | dcr-reg = <0x0c0 0x009>; |
53 | #address-cells = <0>; | 55 | #address-cells = <0>; |
54 | #size-cells = <0>; | 56 | #size-cells = <0>; |
55 | #interrupt-cells = <2>; | 57 | #interrupt-cells = <2>; |
@@ -59,11 +61,11 @@ | |||
59 | compatible = "ibm,uic-405exr","ibm,uic"; | 61 | compatible = "ibm,uic-405exr","ibm,uic"; |
60 | interrupt-controller; | 62 | interrupt-controller; |
61 | cell-index = <1>; | 63 | cell-index = <1>; |
62 | dcr-reg = <0d0 009>; | 64 | dcr-reg = <0x0d0 0x009>; |
63 | #address-cells = <0>; | 65 | #address-cells = <0>; |
64 | #size-cells = <0>; | 66 | #size-cells = <0>; |
65 | #interrupt-cells = <2>; | 67 | #interrupt-cells = <2>; |
66 | interrupts = <1e 4 1f 4>; /* cascade */ | 68 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
67 | interrupt-parent = <&UIC0>; | 69 | interrupt-parent = <&UIC0>; |
68 | }; | 70 | }; |
69 | 71 | ||
@@ -71,11 +73,11 @@ | |||
71 | compatible = "ibm,uic-405exr","ibm,uic"; | 73 | compatible = "ibm,uic-405exr","ibm,uic"; |
72 | interrupt-controller; | 74 | interrupt-controller; |
73 | cell-index = <2>; | 75 | cell-index = <2>; |
74 | dcr-reg = <0e0 009>; | 76 | dcr-reg = <0x0e0 0x009>; |
75 | #address-cells = <0>; | 77 | #address-cells = <0>; |
76 | #size-cells = <0>; | 78 | #size-cells = <0>; |
77 | #interrupt-cells = <2>; | 79 | #interrupt-cells = <2>; |
78 | interrupts = <1c 4 1d 4>; /* cascade */ | 80 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
79 | interrupt-parent = <&UIC0>; | 81 | interrupt-parent = <&UIC0>; |
80 | }; | 82 | }; |
81 | 83 | ||
@@ -88,72 +90,72 @@ | |||
88 | 90 | ||
89 | SDRAM0: memory-controller { | 91 | SDRAM0: memory-controller { |
90 | compatible = "ibm,sdram-405exr"; | 92 | compatible = "ibm,sdram-405exr"; |
91 | dcr-reg = <010 2>; | 93 | dcr-reg = <0x010 0x002>; |
92 | }; | 94 | }; |
93 | 95 | ||
94 | MAL0: mcmal { | 96 | MAL0: mcmal { |
95 | compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; | 97 | compatible = "ibm,mcmal-405exr", "ibm,mcmal2"; |
96 | dcr-reg = <180 62>; | 98 | dcr-reg = <0x180 0x062>; |
97 | num-tx-chans = <2>; | 99 | num-tx-chans = <2>; |
98 | num-rx-chans = <2>; | 100 | num-rx-chans = <2>; |
99 | interrupt-parent = <&MAL0>; | 101 | interrupt-parent = <&MAL0>; |
100 | interrupts = <0 1 2 3 4>; | 102 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
101 | #interrupt-cells = <1>; | 103 | #interrupt-cells = <1>; |
102 | #address-cells = <0>; | 104 | #address-cells = <0>; |
103 | #size-cells = <0>; | 105 | #size-cells = <0>; |
104 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 106 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
105 | /*RXEOB*/ 1 &UIC0 b 4 | 107 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
106 | /*SERR*/ 2 &UIC1 0 4 | 108 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
107 | /*TXDE*/ 3 &UIC1 1 4 | 109 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
108 | /*RXDE*/ 4 &UIC1 2 4>; | 110 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
109 | interrupt-map-mask = <ffffffff>; | 111 | interrupt-map-mask = <0xffffffff>; |
110 | }; | 112 | }; |
111 | 113 | ||
112 | POB0: opb { | 114 | POB0: opb { |
113 | compatible = "ibm,opb-405exr", "ibm,opb"; | 115 | compatible = "ibm,opb-405exr", "ibm,opb"; |
114 | #address-cells = <1>; | 116 | #address-cells = <1>; |
115 | #size-cells = <1>; | 117 | #size-cells = <1>; |
116 | ranges = <80000000 80000000 10000000 | 118 | ranges = <0x80000000 0x80000000 0x10000000 |
117 | ef600000 ef600000 a00000 | 119 | 0xef600000 0xef600000 0x00a00000 |
118 | f0000000 f0000000 10000000>; | 120 | 0xf0000000 0xf0000000 0x10000000>; |
119 | dcr-reg = <0a0 5>; | 121 | dcr-reg = <0x0a0 0x005>; |
120 | clock-frequency = <0>; /* Filled in by U-Boot */ | 122 | clock-frequency = <0>; /* Filled in by U-Boot */ |
121 | 123 | ||
122 | EBC0: ebc { | 124 | EBC0: ebc { |
123 | compatible = "ibm,ebc-405exr", "ibm,ebc"; | 125 | compatible = "ibm,ebc-405exr", "ibm,ebc"; |
124 | dcr-reg = <012 2>; | 126 | dcr-reg = <0x012 0x002>; |
125 | #address-cells = <2>; | 127 | #address-cells = <2>; |
126 | #size-cells = <1>; | 128 | #size-cells = <1>; |
127 | clock-frequency = <0>; /* Filled in by U-Boot */ | 129 | clock-frequency = <0>; /* Filled in by U-Boot */ |
128 | /* ranges property is supplied by U-Boot */ | 130 | /* ranges property is supplied by U-Boot */ |
129 | interrupts = <5 1>; | 131 | interrupts = <0x5 0x1>; |
130 | interrupt-parent = <&UIC1>; | 132 | interrupt-parent = <&UIC1>; |
131 | 133 | ||
132 | nor_flash@0,0 { | 134 | nor_flash@0,0 { |
133 | compatible = "amd,s29gl512n", "cfi-flash"; | 135 | compatible = "amd,s29gl512n", "cfi-flash"; |
134 | bank-width = <2>; | 136 | bank-width = <2>; |
135 | reg = <0 000000 4000000>; | 137 | reg = <0x00000000 0x00000000 0x04000000>; |
136 | #address-cells = <1>; | 138 | #address-cells = <1>; |
137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
138 | partition@0 { | 140 | partition@0 { |
139 | label = "kernel"; | 141 | label = "kernel"; |
140 | reg = <0 200000>; | 142 | reg = <0x00000000 0x00200000>; |
141 | }; | 143 | }; |
142 | partition@200000 { | 144 | partition@200000 { |
143 | label = "root"; | 145 | label = "root"; |
144 | reg = <200000 200000>; | 146 | reg = <0x00200000 0x00200000>; |
145 | }; | 147 | }; |
146 | partition@400000 { | 148 | partition@400000 { |
147 | label = "user"; | 149 | label = "user"; |
148 | reg = <400000 3b60000>; | 150 | reg = <0x00400000 0x03b60000>; |
149 | }; | 151 | }; |
150 | partition@3f60000 { | 152 | partition@3f60000 { |
151 | label = "env"; | 153 | label = "env"; |
152 | reg = <3f60000 40000>; | 154 | reg = <0x03f60000 0x00040000>; |
153 | }; | 155 | }; |
154 | partition@3fa0000 { | 156 | partition@3fa0000 { |
155 | label = "u-boot"; | 157 | label = "u-boot"; |
156 | reg = <3fa0000 60000>; | 158 | reg = <0x03fa0000 0x00060000>; |
157 | }; | 159 | }; |
158 | }; | 160 | }; |
159 | }; | 161 | }; |
@@ -161,68 +163,68 @@ | |||
161 | UART0: serial@ef600200 { | 163 | UART0: serial@ef600200 { |
162 | device_type = "serial"; | 164 | device_type = "serial"; |
163 | compatible = "ns16550"; | 165 | compatible = "ns16550"; |
164 | reg = <ef600200 8>; | 166 | reg = <0xef600200 0x00000008>; |
165 | virtual-reg = <ef600200>; | 167 | virtual-reg = <0xef600200>; |
166 | clock-frequency = <0>; /* Filled in by U-Boot */ | 168 | clock-frequency = <0>; /* Filled in by U-Boot */ |
167 | current-speed = <0>; | 169 | current-speed = <0>; |
168 | interrupt-parent = <&UIC0>; | 170 | interrupt-parent = <&UIC0>; |
169 | interrupts = <1a 4>; | 171 | interrupts = <0x1a 0x4>; |
170 | }; | 172 | }; |
171 | 173 | ||
172 | UART1: serial@ef600300 { | 174 | UART1: serial@ef600300 { |
173 | device_type = "serial"; | 175 | device_type = "serial"; |
174 | compatible = "ns16550"; | 176 | compatible = "ns16550"; |
175 | reg = <ef600300 8>; | 177 | reg = <0xef600300 0x00000008>; |
176 | virtual-reg = <ef600300>; | 178 | virtual-reg = <0xef600300>; |
177 | clock-frequency = <0>; /* Filled in by U-Boot */ | 179 | clock-frequency = <0>; /* Filled in by U-Boot */ |
178 | current-speed = <0>; | 180 | current-speed = <0>; |
179 | interrupt-parent = <&UIC0>; | 181 | interrupt-parent = <&UIC0>; |
180 | interrupts = <1 4>; | 182 | interrupts = <0x1 0x4>; |
181 | }; | 183 | }; |
182 | 184 | ||
183 | IIC0: i2c@ef600400 { | 185 | IIC0: i2c@ef600400 { |
184 | compatible = "ibm,iic-405exr", "ibm,iic"; | 186 | compatible = "ibm,iic-405exr", "ibm,iic"; |
185 | reg = <ef600400 14>; | 187 | reg = <0xef600400 0x00000014>; |
186 | interrupt-parent = <&UIC0>; | 188 | interrupt-parent = <&UIC0>; |
187 | interrupts = <2 4>; | 189 | interrupts = <0x2 0x4>; |
188 | }; | 190 | }; |
189 | 191 | ||
190 | IIC1: i2c@ef600500 { | 192 | IIC1: i2c@ef600500 { |
191 | compatible = "ibm,iic-405exr", "ibm,iic"; | 193 | compatible = "ibm,iic-405exr", "ibm,iic"; |
192 | reg = <ef600500 14>; | 194 | reg = <0xef600500 0x00000014>; |
193 | interrupt-parent = <&UIC0>; | 195 | interrupt-parent = <&UIC0>; |
194 | interrupts = <7 4>; | 196 | interrupts = <0x7 0x4>; |
195 | }; | 197 | }; |
196 | 198 | ||
197 | 199 | ||
198 | RGMII0: emac-rgmii@ef600b00 { | 200 | RGMII0: emac-rgmii@ef600b00 { |
199 | compatible = "ibm,rgmii-405exr", "ibm,rgmii"; | 201 | compatible = "ibm,rgmii-405exr", "ibm,rgmii"; |
200 | reg = <ef600b00 104>; | 202 | reg = <0xef600b00 0x00000104>; |
201 | has-mdio; | 203 | has-mdio; |
202 | }; | 204 | }; |
203 | 205 | ||
204 | EMAC0: ethernet@ef600900 { | 206 | EMAC0: ethernet@ef600900 { |
205 | linux,network-index = <0>; | 207 | linux,network-index = <0x0>; |
206 | device_type = "network"; | 208 | device_type = "network"; |
207 | compatible = "ibm,emac-405exr", "ibm,emac4"; | 209 | compatible = "ibm,emac-405exr", "ibm,emac4"; |
208 | interrupt-parent = <&EMAC0>; | 210 | interrupt-parent = <&EMAC0>; |
209 | interrupts = <0 1>; | 211 | interrupts = <0x0 0x1>; |
210 | #interrupt-cells = <1>; | 212 | #interrupt-cells = <1>; |
211 | #address-cells = <0>; | 213 | #address-cells = <0>; |
212 | #size-cells = <0>; | 214 | #size-cells = <0>; |
213 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 215 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
214 | /*Wake*/ 1 &UIC1 1d 4>; | 216 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
215 | reg = <ef600900 70>; | 217 | reg = <0xef600900 0x00000070>; |
216 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 218 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
217 | mal-device = <&MAL0>; | 219 | mal-device = <&MAL0>; |
218 | mal-tx-channel = <0>; | 220 | mal-tx-channel = <0>; |
219 | mal-rx-channel = <0>; | 221 | mal-rx-channel = <0>; |
220 | cell-index = <0>; | 222 | cell-index = <0>; |
221 | max-frame-size = <2328>; | 223 | max-frame-size = <9000>; |
222 | rx-fifo-size = <1000>; | 224 | rx-fifo-size = <4096>; |
223 | tx-fifo-size = <800>; | 225 | tx-fifo-size = <2048>; |
224 | phy-mode = "rgmii"; | 226 | phy-mode = "rgmii"; |
225 | phy-map = <00000000>; | 227 | phy-map = <0x00000000>; |
226 | rgmii-device = <&RGMII0>; | 228 | rgmii-device = <&RGMII0>; |
227 | rgmii-channel = <0>; | 229 | rgmii-channel = <0>; |
228 | has-inverted-stacr-oc; | 230 | has-inverted-stacr-oc; |
@@ -237,23 +239,23 @@ | |||
237 | #address-cells = <3>; | 239 | #address-cells = <3>; |
238 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 240 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
239 | primary; | 241 | primary; |
240 | port = <0>; /* port number */ | 242 | port = <0x0>; /* port number */ |
241 | reg = <a0000000 20000000 /* Config space access */ | 243 | reg = <0xa0000000 0x20000000 /* Config space access */ |
242 | ef000000 00001000>; /* Registers */ | 244 | 0xef000000 0x00001000>; /* Registers */ |
243 | dcr-reg = <040 020>; | 245 | dcr-reg = <0x040 0x020>; |
244 | sdr-base = <400>; | 246 | sdr-base = <0x400>; |
245 | 247 | ||
246 | /* Outbound ranges, one memory and one IO, | 248 | /* Outbound ranges, one memory and one IO, |
247 | * later cannot be changed | 249 | * later cannot be changed |
248 | */ | 250 | */ |
249 | ranges = <02000000 0 80000000 90000000 0 08000000 | 251 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
250 | 01000000 0 00000000 e0000000 0 00010000>; | 252 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
251 | 253 | ||
252 | /* Inbound 2GB range starting at 0 */ | 254 | /* Inbound 2GB range starting at 0 */ |
253 | dma-ranges = <42000000 0 0 0 0 80000000>; | 255 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
254 | 256 | ||
255 | /* This drives busses 0x00 to 0x3f */ | 257 | /* This drives busses 0x00 to 0x3f */ |
256 | bus-range = <00 3f>; | 258 | bus-range = <0x0 0x3f>; |
257 | 259 | ||
258 | /* Legacy interrupts (note the weird polarity, the bridge seems | 260 | /* Legacy interrupts (note the weird polarity, the bridge seems |
259 | * to invert PCIe legacy interrupts). | 261 | * to invert PCIe legacy interrupts). |
@@ -263,12 +265,12 @@ | |||
263 | * below are basically de-swizzled numbers. | 265 | * below are basically de-swizzled numbers. |
264 | * The real slot is on idsel 0, so the swizzling is 1:1 | 266 | * The real slot is on idsel 0, so the swizzling is 1:1 |
265 | */ | 267 | */ |
266 | interrupt-map-mask = <0000 0 0 7>; | 268 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
267 | interrupt-map = < | 269 | interrupt-map = < |
268 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 270 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
269 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 271 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
270 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 272 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
271 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 273 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
272 | }; | 274 | }; |
273 | }; | 275 | }; |
274 | }; | 276 | }; |
diff --git a/arch/powerpc/boot/dts/holly.dts b/arch/powerpc/boot/dts/holly.dts index b5d87895fe06..f87fe7b9ced9 100644 --- a/arch/powerpc/boot/dts/holly.dts +++ b/arch/powerpc/boot/dts/holly.dts | |||
@@ -10,6 +10,8 @@ | |||
10 | * any warranty of any kind, whether express or implied. | 10 | * any warranty of any kind, whether express or implied. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | /dts-v1/; | ||
14 | |||
13 | / { | 15 | / { |
14 | model = "41K7339"; | 16 | model = "41K7339"; |
15 | compatible = "ibm,holly"; | 17 | compatible = "ibm,holly"; |
@@ -21,22 +23,22 @@ | |||
21 | #size-cells =<0>; | 23 | #size-cells =<0>; |
22 | PowerPC,750CL@0 { | 24 | PowerPC,750CL@0 { |
23 | device_type = "cpu"; | 25 | device_type = "cpu"; |
24 | reg = <0>; | 26 | reg = <0x00000000>; |
25 | d-cache-line-size = <20>; | 27 | d-cache-line-size = <32>; |
26 | i-cache-line-size = <20>; | 28 | i-cache-line-size = <32>; |
27 | d-cache-size = <8000>; | 29 | d-cache-size = <32768>; |
28 | i-cache-size = <8000>; | 30 | i-cache-size = <32768>; |
29 | d-cache-sets = <80>; | 31 | d-cache-sets = <128>; |
30 | i-cache-sets = <80>; | 32 | i-cache-sets = <128>; |
31 | timebase-frequency = <2faf080>; | 33 | timebase-frequency = <50000000>; |
32 | clock-frequency = <23c34600>; | 34 | clock-frequency = <600000000>; |
33 | bus-frequency = <bebc200>; | 35 | bus-frequency = <200000000>; |
34 | }; | 36 | }; |
35 | }; | 37 | }; |
36 | 38 | ||
37 | memory@0 { | 39 | memory@0 { |
38 | device_type = "memory"; | 40 | device_type = "memory"; |
39 | reg = <00000000 20000000>; | 41 | reg = <0x00000000 0x20000000>; |
40 | }; | 42 | }; |
41 | 43 | ||
42 | tsi109@c0000000 { | 44 | tsi109@c0000000 { |
@@ -44,33 +46,33 @@ | |||
44 | compatible = "tsi109-bridge", "tsi108-bridge"; | 46 | compatible = "tsi109-bridge", "tsi108-bridge"; |
45 | #address-cells = <1>; | 47 | #address-cells = <1>; |
46 | #size-cells = <1>; | 48 | #size-cells = <1>; |
47 | ranges = <00000000 c0000000 00010000>; | 49 | ranges = <0x00000000 0xc0000000 0x00010000>; |
48 | reg = <c0000000 00010000>; | 50 | reg = <0xc0000000 0x00010000>; |
49 | 51 | ||
50 | i2c@7000 { | 52 | i2c@7000 { |
51 | device_type = "i2c"; | 53 | device_type = "i2c"; |
52 | compatible = "tsi109-i2c", "tsi108-i2c"; | 54 | compatible = "tsi109-i2c", "tsi108-i2c"; |
53 | interrupt-parent = <&MPIC>; | 55 | interrupt-parent = <&MPIC>; |
54 | interrupts = <e 2>; | 56 | interrupts = <0xe 0x2>; |
55 | reg = <7000 400>; | 57 | reg = <0x00007000 0x00000400>; |
56 | }; | 58 | }; |
57 | 59 | ||
58 | MDIO: mdio@6000 { | 60 | MDIO: mdio@6000 { |
59 | device_type = "mdio"; | 61 | device_type = "mdio"; |
60 | compatible = "tsi109-mdio", "tsi108-mdio"; | 62 | compatible = "tsi109-mdio", "tsi108-mdio"; |
61 | reg = <6000 50>; | 63 | reg = <0x00006000 0x00000050>; |
62 | #address-cells = <1>; | 64 | #address-cells = <1>; |
63 | #size-cells = <0>; | 65 | #size-cells = <0>; |
64 | 66 | ||
65 | PHY1: ethernet-phy@1 { | 67 | PHY1: ethernet-phy@1 { |
66 | compatible = "bcm5461a"; | 68 | compatible = "bcm5461a"; |
67 | reg = <1>; | 69 | reg = <0x00000001>; |
68 | txc-rxc-delay-disable; | 70 | txc-rxc-delay-disable; |
69 | }; | 71 | }; |
70 | 72 | ||
71 | PHY2: ethernet-phy@2 { | 73 | PHY2: ethernet-phy@2 { |
72 | compatible = "bcm5461a"; | 74 | compatible = "bcm5461a"; |
73 | reg = <2>; | 75 | reg = <0x00000002>; |
74 | txc-rxc-delay-disable; | 76 | txc-rxc-delay-disable; |
75 | }; | 77 | }; |
76 | }; | 78 | }; |
@@ -80,10 +82,10 @@ | |||
80 | compatible = "tsi109-ethernet", "tsi108-ethernet"; | 82 | compatible = "tsi109-ethernet", "tsi108-ethernet"; |
81 | #address-cells = <1>; | 83 | #address-cells = <1>; |
82 | #size-cells = <0>; | 84 | #size-cells = <0>; |
83 | reg = <6000 200>; | 85 | reg = <0x00006000 0x00000200>; |
84 | local-mac-address = [ 00 00 00 00 00 00 ]; | 86 | local-mac-address = [ 00 00 00 00 00 00 ]; |
85 | interrupt-parent = <&MPIC>; | 87 | interrupt-parent = <&MPIC>; |
86 | interrupts = <10 2>; | 88 | interrupts = <0x10 0x2>; |
87 | mdio-handle = <&MDIO>; | 89 | mdio-handle = <&MDIO>; |
88 | phy-handle = <&PHY1>; | 90 | phy-handle = <&PHY1>; |
89 | }; | 91 | }; |
@@ -93,10 +95,10 @@ | |||
93 | compatible = "tsi109-ethernet", "tsi108-ethernet"; | 95 | compatible = "tsi109-ethernet", "tsi108-ethernet"; |
94 | #address-cells = <1>; | 96 | #address-cells = <1>; |
95 | #size-cells = <0>; | 97 | #size-cells = <0>; |
96 | reg = <6400 200>; | 98 | reg = <0x00006400 0x00000200>; |
97 | local-mac-address = [ 00 00 00 00 00 00 ]; | 99 | local-mac-address = [ 00 00 00 00 00 00 ]; |
98 | interrupt-parent = <&MPIC>; | 100 | interrupt-parent = <&MPIC>; |
99 | interrupts = <11 2>; | 101 | interrupts = <0x11 0x2>; |
100 | mdio-handle = <&MDIO>; | 102 | mdio-handle = <&MDIO>; |
101 | phy-handle = <&PHY2>; | 103 | phy-handle = <&PHY2>; |
102 | }; | 104 | }; |
@@ -104,23 +106,23 @@ | |||
104 | serial@7808 { | 106 | serial@7808 { |
105 | device_type = "serial"; | 107 | device_type = "serial"; |
106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
107 | reg = <7808 200>; | 109 | reg = <0x00007808 0x00000200>; |
108 | virtual-reg = <c0007808>; | 110 | virtual-reg = <0xc0007808>; |
109 | clock-frequency = <3F9C6000>; | 111 | clock-frequency = <1067212800>; |
110 | current-speed = <1c200>; | 112 | current-speed = <115200>; |
111 | interrupt-parent = <&MPIC>; | 113 | interrupt-parent = <&MPIC>; |
112 | interrupts = <c 2>; | 114 | interrupts = <0xc 0x2>; |
113 | }; | 115 | }; |
114 | 116 | ||
115 | serial@7c08 { | 117 | serial@7c08 { |
116 | device_type = "serial"; | 118 | device_type = "serial"; |
117 | compatible = "ns16550"; | 119 | compatible = "ns16550"; |
118 | reg = <7c08 200>; | 120 | reg = <0x00007c08 0x00000200>; |
119 | virtual-reg = <c0007c08>; | 121 | virtual-reg = <0xc0007c08>; |
120 | clock-frequency = <3F9C6000>; | 122 | clock-frequency = <1067212800>; |
121 | current-speed = <1c200>; | 123 | current-speed = <115200>; |
122 | interrupt-parent = <&MPIC>; | 124 | interrupt-parent = <&MPIC>; |
123 | interrupts = <d 2>; | 125 | interrupts = <0xd 0x2>; |
124 | }; | 126 | }; |
125 | 127 | ||
126 | MPIC: pic@7400 { | 128 | MPIC: pic@7400 { |
@@ -128,7 +130,7 @@ | |||
128 | compatible = "chrp,open-pic"; | 130 | compatible = "chrp,open-pic"; |
129 | interrupt-controller; | 131 | interrupt-controller; |
130 | #interrupt-cells = <2>; | 132 | #interrupt-cells = <2>; |
131 | reg = <7400 400>; | 133 | reg = <0x00007400 0x00000400>; |
132 | big-endian; | 134 | big-endian; |
133 | }; | 135 | }; |
134 | 136 | ||
@@ -138,42 +140,42 @@ | |||
138 | #interrupt-cells = <1>; | 140 | #interrupt-cells = <1>; |
139 | #size-cells = <2>; | 141 | #size-cells = <2>; |
140 | #address-cells = <3>; | 142 | #address-cells = <3>; |
141 | reg = <1000 1000>; | 143 | reg = <0x00001000 0x00001000>; |
142 | bus-range = <0 0>; | 144 | bus-range = <0x0 0x0>; |
143 | /*----------------------------------------------------+ | 145 | /*----------------------------------------------------+ |
144 | | PCI memory range. | 146 | | PCI memory range. |
145 | | 01 denotes I/O space | 147 | | 01 denotes I/O space |
146 | | 02 denotes 32-bit memory space | 148 | | 02 denotes 32-bit memory space |
147 | +----------------------------------------------------*/ | 149 | +----------------------------------------------------*/ |
148 | ranges = <02000000 0 40000000 40000000 0 10000000 | 150 | ranges = <0x02000000 0x00000000 0x40000000 0x40000000 0x00000000 0x10000000 |
149 | 01000000 0 00000000 7e000000 0 00010000>; | 151 | 0x01000000 0x00000000 0x00000000 0x7e000000 0x00000000 0x00010000>; |
150 | clock-frequency = <7f28154>; | 152 | clock-frequency = <133333332>; |
151 | interrupt-parent = <&MPIC>; | 153 | interrupt-parent = <&MPIC>; |
152 | interrupts = <17 2>; | 154 | interrupts = <0x17 0x2>; |
153 | interrupt-map-mask = <f800 0 0 7>; | 155 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
154 | /*----------------------------------------------------+ | 156 | /*----------------------------------------------------+ |
155 | | The INTA, INTB, INTC, INTD are shared. | 157 | | The INTA, INTB, INTC, INTD are shared. |
156 | +----------------------------------------------------*/ | 158 | +----------------------------------------------------*/ |
157 | interrupt-map = < | 159 | interrupt-map = < |
158 | 0800 0 0 1 &RT0 24 0 | 160 | 0x800 0x0 0x0 0x1 &RT0 0x24 0x0 |
159 | 0800 0 0 2 &RT0 25 0 | 161 | 0x800 0x0 0x0 0x2 &RT0 0x25 0x0 |
160 | 0800 0 0 3 &RT0 26 0 | 162 | 0x800 0x0 0x0 0x3 &RT0 0x26 0x0 |
161 | 0800 0 0 4 &RT0 27 0 | 163 | 0x800 0x0 0x0 0x4 &RT0 0x27 0x0 |
162 | 164 | ||
163 | 1000 0 0 1 &RT0 25 0 | 165 | 0x1000 0x0 0x0 0x1 &RT0 0x25 0x0 |
164 | 1000 0 0 2 &RT0 26 0 | 166 | 0x1000 0x0 0x0 0x2 &RT0 0x26 0x0 |
165 | 1000 0 0 3 &RT0 27 0 | 167 | 0x1000 0x0 0x0 0x3 &RT0 0x27 0x0 |
166 | 1000 0 0 4 &RT0 24 0 | 168 | 0x1000 0x0 0x0 0x4 &RT0 0x24 0x0 |
167 | 169 | ||
168 | 1800 0 0 1 &RT0 26 0 | 170 | 0x1800 0x0 0x0 0x1 &RT0 0x26 0x0 |
169 | 1800 0 0 2 &RT0 27 0 | 171 | 0x1800 0x0 0x0 0x2 &RT0 0x27 0x0 |
170 | 1800 0 0 3 &RT0 24 0 | 172 | 0x1800 0x0 0x0 0x3 &RT0 0x24 0x0 |
171 | 1800 0 0 4 &RT0 25 0 | 173 | 0x1800 0x0 0x0 0x4 &RT0 0x25 0x0 |
172 | 174 | ||
173 | 2000 0 0 1 &RT0 27 0 | 175 | 0x2000 0x0 0x0 0x1 &RT0 0x27 0x0 |
174 | 2000 0 0 2 &RT0 24 0 | 176 | 0x2000 0x0 0x0 0x2 &RT0 0x24 0x0 |
175 | 2000 0 0 3 &RT0 25 0 | 177 | 0x2000 0x0 0x0 0x3 &RT0 0x25 0x0 |
176 | 2000 0 0 4 &RT0 26 0 | 178 | 0x2000 0x0 0x0 0x4 &RT0 0x26 0x0 |
177 | >; | 179 | >; |
178 | 180 | ||
179 | RT0: router@1180 { | 181 | RT0: router@1180 { |
@@ -183,7 +185,7 @@ | |||
183 | clock-frequency = <0>; | 185 | clock-frequency = <0>; |
184 | #address-cells = <0>; | 186 | #address-cells = <0>; |
185 | #interrupt-cells = <2>; | 187 | #interrupt-cells = <2>; |
186 | interrupts = <17 2>; | 188 | interrupts = <0x17 0x2>; |
187 | interrupt-parent = <&MPIC>; | 189 | interrupt-parent = <&MPIC>; |
188 | }; | 190 | }; |
189 | }; | 191 | }; |
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts index cc2873a531d2..b94bf61b9bcc 100644 --- a/arch/powerpc/boot/dts/katmai.dts +++ b/arch/powerpc/boot/dts/katmai.dts | |||
@@ -12,12 +12,14 @@ | |||
12 | * any warranty of any kind, whether express or implied. | 12 | * any warranty of any kind, whether express or implied. |
13 | */ | 13 | */ |
14 | 14 | ||
15 | /dts-v1/; | ||
16 | |||
15 | / { | 17 | / { |
16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
18 | model = "amcc,katmai"; | 20 | model = "amcc,katmai"; |
19 | compatible = "amcc,katmai"; | 21 | compatible = "amcc,katmai"; |
20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
21 | 23 | ||
22 | aliases { | 24 | aliases { |
23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
@@ -33,13 +35,13 @@ | |||
33 | cpu@0 { | 35 | cpu@0 { |
34 | device_type = "cpu"; | 36 | device_type = "cpu"; |
35 | model = "PowerPC,440SPe"; | 37 | model = "PowerPC,440SPe"; |
36 | reg = <0>; | 38 | reg = <0x00000000>; |
37 | clock-frequency = <0>; /* Filled in by zImage */ | 39 | clock-frequency = <0>; /* Filled in by zImage */ |
38 | timebase-frequency = <0>; /* Filled in by zImage */ | 40 | timebase-frequency = <0>; /* Filled in by zImage */ |
39 | i-cache-line-size = <20>; | 41 | i-cache-line-size = <32>; |
40 | d-cache-line-size = <20>; | 42 | d-cache-line-size = <32>; |
41 | i-cache-size = <8000>; | 43 | i-cache-size = <32768>; |
42 | d-cache-size = <8000>; | 44 | d-cache-size = <32768>; |
43 | dcr-controller; | 45 | dcr-controller; |
44 | dcr-access-method = "native"; | 46 | dcr-access-method = "native"; |
45 | }; | 47 | }; |
@@ -47,14 +49,14 @@ | |||
47 | 49 | ||
48 | memory { | 50 | memory { |
49 | device_type = "memory"; | 51 | device_type = "memory"; |
50 | reg = <0 0 0>; /* Filled in by zImage */ | 52 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
51 | }; | 53 | }; |
52 | 54 | ||
53 | UIC0: interrupt-controller0 { | 55 | UIC0: interrupt-controller0 { |
54 | compatible = "ibm,uic-440spe","ibm,uic"; | 56 | compatible = "ibm,uic-440spe","ibm,uic"; |
55 | interrupt-controller; | 57 | interrupt-controller; |
56 | cell-index = <0>; | 58 | cell-index = <0>; |
57 | dcr-reg = <0c0 009>; | 59 | dcr-reg = <0x0c0 0x009>; |
58 | #address-cells = <0>; | 60 | #address-cells = <0>; |
59 | #size-cells = <0>; | 61 | #size-cells = <0>; |
60 | #interrupt-cells = <2>; | 62 | #interrupt-cells = <2>; |
@@ -64,11 +66,11 @@ | |||
64 | compatible = "ibm,uic-440spe","ibm,uic"; | 66 | compatible = "ibm,uic-440spe","ibm,uic"; |
65 | interrupt-controller; | 67 | interrupt-controller; |
66 | cell-index = <1>; | 68 | cell-index = <1>; |
67 | dcr-reg = <0d0 009>; | 69 | dcr-reg = <0x0d0 0x009>; |
68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
71 | interrupts = <1e 4 1f 4>; /* cascade */ | 73 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
72 | interrupt-parent = <&UIC0>; | 74 | interrupt-parent = <&UIC0>; |
73 | }; | 75 | }; |
74 | 76 | ||
@@ -76,11 +78,11 @@ | |||
76 | compatible = "ibm,uic-440spe","ibm,uic"; | 78 | compatible = "ibm,uic-440spe","ibm,uic"; |
77 | interrupt-controller; | 79 | interrupt-controller; |
78 | cell-index = <2>; | 80 | cell-index = <2>; |
79 | dcr-reg = <0e0 009>; | 81 | dcr-reg = <0x0e0 0x009>; |
80 | #address-cells = <0>; | 82 | #address-cells = <0>; |
81 | #size-cells = <0>; | 83 | #size-cells = <0>; |
82 | #interrupt-cells = <2>; | 84 | #interrupt-cells = <2>; |
83 | interrupts = <a 4 b 4>; /* cascade */ | 85 | interrupts = <0xa 0x4 0xb 0x4>; /* cascade */ |
84 | interrupt-parent = <&UIC0>; | 86 | interrupt-parent = <&UIC0>; |
85 | }; | 87 | }; |
86 | 88 | ||
@@ -88,22 +90,22 @@ | |||
88 | compatible = "ibm,uic-440spe","ibm,uic"; | 90 | compatible = "ibm,uic-440spe","ibm,uic"; |
89 | interrupt-controller; | 91 | interrupt-controller; |
90 | cell-index = <3>; | 92 | cell-index = <3>; |
91 | dcr-reg = <0f0 009>; | 93 | dcr-reg = <0x0f0 0x009>; |
92 | #address-cells = <0>; | 94 | #address-cells = <0>; |
93 | #size-cells = <0>; | 95 | #size-cells = <0>; |
94 | #interrupt-cells = <2>; | 96 | #interrupt-cells = <2>; |
95 | interrupts = <10 4 11 4>; /* cascade */ | 97 | interrupts = <0x10 0x4 0x11 0x4>; /* cascade */ |
96 | interrupt-parent = <&UIC0>; | 98 | interrupt-parent = <&UIC0>; |
97 | }; | 99 | }; |
98 | 100 | ||
99 | SDR0: sdr { | 101 | SDR0: sdr { |
100 | compatible = "ibm,sdr-440spe"; | 102 | compatible = "ibm,sdr-440spe"; |
101 | dcr-reg = <00e 002>; | 103 | dcr-reg = <0x00e 0x002>; |
102 | }; | 104 | }; |
103 | 105 | ||
104 | CPR0: cpr { | 106 | CPR0: cpr { |
105 | compatible = "ibm,cpr-440spe"; | 107 | compatible = "ibm,cpr-440spe"; |
106 | dcr-reg = <00c 002>; | 108 | dcr-reg = <0x00c 0x002>; |
107 | }; | 109 | }; |
108 | 110 | ||
109 | plb { | 111 | plb { |
@@ -115,108 +117,108 @@ | |||
115 | 117 | ||
116 | SDRAM0: sdram { | 118 | SDRAM0: sdram { |
117 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; | 119 | compatible = "ibm,sdram-440spe", "ibm,sdram-405gp"; |
118 | dcr-reg = <010 2>; | 120 | dcr-reg = <0x010 0x002>; |
119 | }; | 121 | }; |
120 | 122 | ||
121 | MAL0: mcmal { | 123 | MAL0: mcmal { |
122 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; | 124 | compatible = "ibm,mcmal-440spe", "ibm,mcmal2"; |
123 | dcr-reg = <180 62>; | 125 | dcr-reg = <0x180 0x062>; |
124 | num-tx-chans = <2>; | 126 | num-tx-chans = <2>; |
125 | num-rx-chans = <1>; | 127 | num-rx-chans = <1>; |
126 | interrupt-parent = <&MAL0>; | 128 | interrupt-parent = <&MAL0>; |
127 | interrupts = <0 1 2 3 4>; | 129 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
128 | #interrupt-cells = <1>; | 130 | #interrupt-cells = <1>; |
129 | #address-cells = <0>; | 131 | #address-cells = <0>; |
130 | #size-cells = <0>; | 132 | #size-cells = <0>; |
131 | interrupt-map = </*TXEOB*/ 0 &UIC1 6 4 | 133 | interrupt-map = </*TXEOB*/ 0x0 &UIC1 0x6 0x4 |
132 | /*RXEOB*/ 1 &UIC1 7 4 | 134 | /*RXEOB*/ 0x1 &UIC1 0x7 0x4 |
133 | /*SERR*/ 2 &UIC1 1 4 | 135 | /*SERR*/ 0x2 &UIC1 0x1 0x4 |
134 | /*TXDE*/ 3 &UIC1 2 4 | 136 | /*TXDE*/ 0x3 &UIC1 0x2 0x4 |
135 | /*RXDE*/ 4 &UIC1 3 4>; | 137 | /*RXDE*/ 0x4 &UIC1 0x3 0x4>; |
136 | }; | 138 | }; |
137 | 139 | ||
138 | POB0: opb { | 140 | POB0: opb { |
139 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; | 141 | compatible = "ibm,opb-440spe", "ibm,opb-440gp", "ibm,opb"; |
140 | #address-cells = <1>; | 142 | #address-cells = <1>; |
141 | #size-cells = <1>; | 143 | #size-cells = <1>; |
142 | ranges = <00000000 4 e0000000 20000000>; | 144 | ranges = <0x00000000 0x00000004 0xe0000000 0x20000000>; |
143 | clock-frequency = <0>; /* Filled in by zImage */ | 145 | clock-frequency = <0>; /* Filled in by zImage */ |
144 | 146 | ||
145 | EBC0: ebc { | 147 | EBC0: ebc { |
146 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; | 148 | compatible = "ibm,ebc-440spe", "ibm,ebc-440gp", "ibm,ebc"; |
147 | dcr-reg = <012 2>; | 149 | dcr-reg = <0x012 0x002>; |
148 | #address-cells = <2>; | 150 | #address-cells = <2>; |
149 | #size-cells = <1>; | 151 | #size-cells = <1>; |
150 | clock-frequency = <0>; /* Filled in by zImage */ | 152 | clock-frequency = <0>; /* Filled in by zImage */ |
151 | interrupts = <5 1>; | 153 | interrupts = <0x5 0x1>; |
152 | interrupt-parent = <&UIC1>; | 154 | interrupt-parent = <&UIC1>; |
153 | }; | 155 | }; |
154 | 156 | ||
155 | UART0: serial@10000200 { | 157 | UART0: serial@10000200 { |
156 | device_type = "serial"; | 158 | device_type = "serial"; |
157 | compatible = "ns16550"; | 159 | compatible = "ns16550"; |
158 | reg = <10000200 8>; | 160 | reg = <0x10000200 0x00000008>; |
159 | virtual-reg = <a0000200>; | 161 | virtual-reg = <0xa0000200>; |
160 | clock-frequency = <0>; /* Filled in by zImage */ | 162 | clock-frequency = <0>; /* Filled in by zImage */ |
161 | current-speed = <1c200>; | 163 | current-speed = <115200>; |
162 | interrupt-parent = <&UIC0>; | 164 | interrupt-parent = <&UIC0>; |
163 | interrupts = <0 4>; | 165 | interrupts = <0x0 0x4>; |
164 | }; | 166 | }; |
165 | 167 | ||
166 | UART1: serial@10000300 { | 168 | UART1: serial@10000300 { |
167 | device_type = "serial"; | 169 | device_type = "serial"; |
168 | compatible = "ns16550"; | 170 | compatible = "ns16550"; |
169 | reg = <10000300 8>; | 171 | reg = <0x10000300 0x00000008>; |
170 | virtual-reg = <a0000300>; | 172 | virtual-reg = <0xa0000300>; |
171 | clock-frequency = <0>; | 173 | clock-frequency = <0>; |
172 | current-speed = <0>; | 174 | current-speed = <0>; |
173 | interrupt-parent = <&UIC0>; | 175 | interrupt-parent = <&UIC0>; |
174 | interrupts = <1 4>; | 176 | interrupts = <0x1 0x4>; |
175 | }; | 177 | }; |
176 | 178 | ||
177 | 179 | ||
178 | UART2: serial@10000600 { | 180 | UART2: serial@10000600 { |
179 | device_type = "serial"; | 181 | device_type = "serial"; |
180 | compatible = "ns16550"; | 182 | compatible = "ns16550"; |
181 | reg = <10000600 8>; | 183 | reg = <0x10000600 0x00000008>; |
182 | virtual-reg = <a0000600>; | 184 | virtual-reg = <0xa0000600>; |
183 | clock-frequency = <0>; | 185 | clock-frequency = <0>; |
184 | current-speed = <0>; | 186 | current-speed = <0>; |
185 | interrupt-parent = <&UIC1>; | 187 | interrupt-parent = <&UIC1>; |
186 | interrupts = <5 4>; | 188 | interrupts = <0x5 0x4>; |
187 | }; | 189 | }; |
188 | 190 | ||
189 | IIC0: i2c@10000400 { | 191 | IIC0: i2c@10000400 { |
190 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | 192 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
191 | reg = <10000400 14>; | 193 | reg = <0x10000400 0x00000014>; |
192 | interrupt-parent = <&UIC0>; | 194 | interrupt-parent = <&UIC0>; |
193 | interrupts = <2 4>; | 195 | interrupts = <0x2 0x4>; |
194 | }; | 196 | }; |
195 | 197 | ||
196 | IIC1: i2c@10000500 { | 198 | IIC1: i2c@10000500 { |
197 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; | 199 | compatible = "ibm,iic-440spe", "ibm,iic-440gp", "ibm,iic"; |
198 | reg = <10000500 14>; | 200 | reg = <0x10000500 0x00000014>; |
199 | interrupt-parent = <&UIC0>; | 201 | interrupt-parent = <&UIC0>; |
200 | interrupts = <3 4>; | 202 | interrupts = <0x3 0x4>; |
201 | }; | 203 | }; |
202 | 204 | ||
203 | EMAC0: ethernet@10000800 { | 205 | EMAC0: ethernet@10000800 { |
204 | linux,network-index = <0>; | 206 | linux,network-index = <0x0>; |
205 | device_type = "network"; | 207 | device_type = "network"; |
206 | compatible = "ibm,emac-440spe", "ibm,emac4"; | 208 | compatible = "ibm,emac-440spe", "ibm,emac4"; |
207 | interrupt-parent = <&UIC1>; | 209 | interrupt-parent = <&UIC1>; |
208 | interrupts = <1c 4 1d 4>; | 210 | interrupts = <0x1c 0x4 0x1d 0x4>; |
209 | reg = <10000800 70>; | 211 | reg = <0x10000800 0x00000070>; |
210 | local-mac-address = [000000000000]; | 212 | local-mac-address = [000000000000]; |
211 | mal-device = <&MAL0>; | 213 | mal-device = <&MAL0>; |
212 | mal-tx-channel = <0>; | 214 | mal-tx-channel = <0>; |
213 | mal-rx-channel = <0>; | 215 | mal-rx-channel = <0>; |
214 | cell-index = <0>; | 216 | cell-index = <0>; |
215 | max-frame-size = <2328>; | 217 | max-frame-size = <9000>; |
216 | rx-fifo-size = <1000>; | 218 | rx-fifo-size = <4096>; |
217 | tx-fifo-size = <800>; | 219 | tx-fifo-size = <2048>; |
218 | phy-mode = "gmii"; | 220 | phy-mode = "gmii"; |
219 | phy-map = <00000000>; | 221 | phy-map = <0x00000000>; |
220 | has-inverted-stacr-oc; | 222 | has-inverted-stacr-oc; |
221 | has-new-stacr-staopc; | 223 | has-new-stacr-staopc; |
222 | }; | 224 | }; |
@@ -231,23 +233,23 @@ | |||
231 | primary; | 233 | primary; |
232 | large-inbound-windows; | 234 | large-inbound-windows; |
233 | enable-msi-hole; | 235 | enable-msi-hole; |
234 | reg = <c 0ec00000 8 /* Config space access */ | 236 | reg = <0x0000000c 0x0ec00000 0x00000008 /* Config space access */ |
235 | 0 0 0 /* no IACK cycles */ | 237 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
236 | c 0ed00000 4 /* Special cycles */ | 238 | 0x0000000c 0x0ed00000 0x00000004 /* Special cycles */ |
237 | c 0ec80000 100 /* Internal registers */ | 239 | 0x0000000c 0x0ec80000 0x00000100 /* Internal registers */ |
238 | c 0ec80100 fc>; /* Internal messaging registers */ | 240 | 0x0000000c 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
239 | 241 | ||
240 | /* Outbound ranges, one memory and one IO, | 242 | /* Outbound ranges, one memory and one IO, |
241 | * later cannot be changed | 243 | * later cannot be changed |
242 | */ | 244 | */ |
243 | ranges = <02000000 0 80000000 0000000d 80000000 0 80000000 | 245 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000d 0x80000000 0x00000000 0x80000000 |
244 | 01000000 0 00000000 0000000c 08000000 0 00010000>; | 246 | 0x01000000 0x00000000 0x00000000 0x0000000c 0x08000000 0x00000000 0x00010000>; |
245 | 247 | ||
246 | /* Inbound 2GB range starting at 0 */ | 248 | /* Inbound 2GB range starting at 0 */ |
247 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 249 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
248 | 250 | ||
249 | /* This drives busses 0 to 0xf */ | 251 | /* This drives busses 0 to 0xf */ |
250 | bus-range = <0 f>; | 252 | bus-range = <0x0 0xf>; |
251 | 253 | ||
252 | /* | 254 | /* |
253 | * On Katmai, the following PCI-X interrupts signals | 255 | * On Katmai, the following PCI-X interrupts signals |
@@ -258,13 +260,13 @@ | |||
258 | * INTC: J2: 1-2 | 260 | * INTC: J2: 1-2 |
259 | * INTD: J1: 1-2 | 261 | * INTD: J1: 1-2 |
260 | */ | 262 | */ |
261 | interrupt-map-mask = <f800 0 0 7>; | 263 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
262 | interrupt-map = < | 264 | interrupt-map = < |
263 | /* IDSEL 1 */ | 265 | /* IDSEL 1 */ |
264 | 0800 0 0 1 &UIC1 14 8 | 266 | 0x800 0x0 0x0 0x1 &UIC1 0x14 0x8 |
265 | 0800 0 0 2 &UIC1 13 8 | 267 | 0x800 0x0 0x0 0x2 &UIC1 0x13 0x8 |
266 | 0800 0 0 3 &UIC1 12 8 | 268 | 0x800 0x0 0x0 0x3 &UIC1 0x12 0x8 |
267 | 0800 0 0 4 &UIC1 11 8 | 269 | 0x800 0x0 0x0 0x4 &UIC1 0x11 0x8 |
268 | >; | 270 | >; |
269 | }; | 271 | }; |
270 | 272 | ||
@@ -275,23 +277,23 @@ | |||
275 | #address-cells = <3>; | 277 | #address-cells = <3>; |
276 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 278 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
277 | primary; | 279 | primary; |
278 | port = <0>; /* port number */ | 280 | port = <0x0>; /* port number */ |
279 | reg = <d 00000000 20000000 /* Config space access */ | 281 | reg = <0x0000000d 0x00000000 0x20000000 /* Config space access */ |
280 | c 10000000 00001000>; /* Registers */ | 282 | 0x0000000c 0x10000000 0x00001000>; /* Registers */ |
281 | dcr-reg = <100 020>; | 283 | dcr-reg = <0x100 0x020>; |
282 | sdr-base = <300>; | 284 | sdr-base = <0x300>; |
283 | 285 | ||
284 | /* Outbound ranges, one memory and one IO, | 286 | /* Outbound ranges, one memory and one IO, |
285 | * later cannot be changed | 287 | * later cannot be changed |
286 | */ | 288 | */ |
287 | ranges = <02000000 0 80000000 0000000e 00000000 0 80000000 | 289 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x00000000 0x00000000 0x80000000 |
288 | 01000000 0 00000000 0000000f 80000000 0 00010000>; | 290 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80000000 0x00000000 0x00010000>; |
289 | 291 | ||
290 | /* Inbound 2GB range starting at 0 */ | 292 | /* Inbound 2GB range starting at 0 */ |
291 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 293 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
292 | 294 | ||
293 | /* This drives busses 10 to 0x1f */ | 295 | /* This drives busses 10 to 0x1f */ |
294 | bus-range = <10 1f>; | 296 | bus-range = <0x10 0x1f>; |
295 | 297 | ||
296 | /* Legacy interrupts (note the weird polarity, the bridge seems | 298 | /* Legacy interrupts (note the weird polarity, the bridge seems |
297 | * to invert PCIe legacy interrupts). | 299 | * to invert PCIe legacy interrupts). |
@@ -301,12 +303,12 @@ | |||
301 | * below are basically de-swizzled numbers. | 303 | * below are basically de-swizzled numbers. |
302 | * The real slot is on idsel 0, so the swizzling is 1:1 | 304 | * The real slot is on idsel 0, so the swizzling is 1:1 |
303 | */ | 305 | */ |
304 | interrupt-map-mask = <0000 0 0 7>; | 306 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
305 | interrupt-map = < | 307 | interrupt-map = < |
306 | 0000 0 0 1 &UIC3 0 4 /* swizzled int A */ | 308 | 0x0 0x0 0x0 0x1 &UIC3 0x0 0x4 /* swizzled int A */ |
307 | 0000 0 0 2 &UIC3 1 4 /* swizzled int B */ | 309 | 0x0 0x0 0x0 0x2 &UIC3 0x1 0x4 /* swizzled int B */ |
308 | 0000 0 0 3 &UIC3 2 4 /* swizzled int C */ | 310 | 0x0 0x0 0x0 0x3 &UIC3 0x2 0x4 /* swizzled int C */ |
309 | 0000 0 0 4 &UIC3 3 4 /* swizzled int D */>; | 311 | 0x0 0x0 0x0 0x4 &UIC3 0x3 0x4 /* swizzled int D */>; |
310 | }; | 312 | }; |
311 | 313 | ||
312 | PCIE1: pciex@d20000000 { | 314 | PCIE1: pciex@d20000000 { |
@@ -316,23 +318,23 @@ | |||
316 | #address-cells = <3>; | 318 | #address-cells = <3>; |
317 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 319 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
318 | primary; | 320 | primary; |
319 | port = <1>; /* port number */ | 321 | port = <0x1>; /* port number */ |
320 | reg = <d 20000000 20000000 /* Config space access */ | 322 | reg = <0x0000000d 0x20000000 0x20000000 /* Config space access */ |
321 | c 10001000 00001000>; /* Registers */ | 323 | 0x0000000c 0x10001000 0x00001000>; /* Registers */ |
322 | dcr-reg = <120 020>; | 324 | dcr-reg = <0x120 0x020>; |
323 | sdr-base = <340>; | 325 | sdr-base = <0x340>; |
324 | 326 | ||
325 | /* Outbound ranges, one memory and one IO, | 327 | /* Outbound ranges, one memory and one IO, |
326 | * later cannot be changed | 328 | * later cannot be changed |
327 | */ | 329 | */ |
328 | ranges = <02000000 0 80000000 0000000e 80000000 0 80000000 | 330 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000e 0x80000000 0x00000000 0x80000000 |
329 | 01000000 0 00000000 0000000f 80010000 0 00010000>; | 331 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80010000 0x00000000 0x00010000>; |
330 | 332 | ||
331 | /* Inbound 2GB range starting at 0 */ | 333 | /* Inbound 2GB range starting at 0 */ |
332 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 334 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
333 | 335 | ||
334 | /* This drives busses 10 to 0x1f */ | 336 | /* This drives busses 10 to 0x1f */ |
335 | bus-range = <20 2f>; | 337 | bus-range = <0x20 0x2f>; |
336 | 338 | ||
337 | /* Legacy interrupts (note the weird polarity, the bridge seems | 339 | /* Legacy interrupts (note the weird polarity, the bridge seems |
338 | * to invert PCIe legacy interrupts). | 340 | * to invert PCIe legacy interrupts). |
@@ -342,12 +344,12 @@ | |||
342 | * below are basically de-swizzled numbers. | 344 | * below are basically de-swizzled numbers. |
343 | * The real slot is on idsel 0, so the swizzling is 1:1 | 345 | * The real slot is on idsel 0, so the swizzling is 1:1 |
344 | */ | 346 | */ |
345 | interrupt-map-mask = <0000 0 0 7>; | 347 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
346 | interrupt-map = < | 348 | interrupt-map = < |
347 | 0000 0 0 1 &UIC3 4 4 /* swizzled int A */ | 349 | 0x0 0x0 0x0 0x1 &UIC3 0x4 0x4 /* swizzled int A */ |
348 | 0000 0 0 2 &UIC3 5 4 /* swizzled int B */ | 350 | 0x0 0x0 0x0 0x2 &UIC3 0x5 0x4 /* swizzled int B */ |
349 | 0000 0 0 3 &UIC3 6 4 /* swizzled int C */ | 351 | 0x0 0x0 0x0 0x3 &UIC3 0x6 0x4 /* swizzled int C */ |
350 | 0000 0 0 4 &UIC3 7 4 /* swizzled int D */>; | 352 | 0x0 0x0 0x0 0x4 &UIC3 0x7 0x4 /* swizzled int D */>; |
351 | }; | 353 | }; |
352 | 354 | ||
353 | PCIE2: pciex@d40000000 { | 355 | PCIE2: pciex@d40000000 { |
@@ -357,23 +359,23 @@ | |||
357 | #address-cells = <3>; | 359 | #address-cells = <3>; |
358 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; | 360 | compatible = "ibm,plb-pciex-440spe", "ibm,plb-pciex"; |
359 | primary; | 361 | primary; |
360 | port = <2>; /* port number */ | 362 | port = <0x2>; /* port number */ |
361 | reg = <d 40000000 20000000 /* Config space access */ | 363 | reg = <0x0000000d 0x40000000 0x20000000 /* Config space access */ |
362 | c 10002000 00001000>; /* Registers */ | 364 | 0x0000000c 0x10002000 0x00001000>; /* Registers */ |
363 | dcr-reg = <140 020>; | 365 | dcr-reg = <0x140 0x020>; |
364 | sdr-base = <370>; | 366 | sdr-base = <0x370>; |
365 | 367 | ||
366 | /* Outbound ranges, one memory and one IO, | 368 | /* Outbound ranges, one memory and one IO, |
367 | * later cannot be changed | 369 | * later cannot be changed |
368 | */ | 370 | */ |
369 | ranges = <02000000 0 80000000 0000000f 00000000 0 80000000 | 371 | ranges = <0x02000000 0x00000000 0x80000000 0x0000000f 0x00000000 0x00000000 0x80000000 |
370 | 01000000 0 00000000 0000000f 80020000 0 00010000>; | 372 | 0x01000000 0x00000000 0x00000000 0x0000000f 0x80020000 0x00000000 0x00010000>; |
371 | 373 | ||
372 | /* Inbound 2GB range starting at 0 */ | 374 | /* Inbound 2GB range starting at 0 */ |
373 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 375 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
374 | 376 | ||
375 | /* This drives busses 10 to 0x1f */ | 377 | /* This drives busses 10 to 0x1f */ |
376 | bus-range = <30 3f>; | 378 | bus-range = <0x30 0x3f>; |
377 | 379 | ||
378 | /* Legacy interrupts (note the weird polarity, the bridge seems | 380 | /* Legacy interrupts (note the weird polarity, the bridge seems |
379 | * to invert PCIe legacy interrupts). | 381 | * to invert PCIe legacy interrupts). |
@@ -383,12 +385,12 @@ | |||
383 | * below are basically de-swizzled numbers. | 385 | * below are basically de-swizzled numbers. |
384 | * The real slot is on idsel 0, so the swizzling is 1:1 | 386 | * The real slot is on idsel 0, so the swizzling is 1:1 |
385 | */ | 387 | */ |
386 | interrupt-map-mask = <0000 0 0 7>; | 388 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
387 | interrupt-map = < | 389 | interrupt-map = < |
388 | 0000 0 0 1 &UIC3 8 4 /* swizzled int A */ | 390 | 0x0 0x0 0x0 0x1 &UIC3 0x8 0x4 /* swizzled int A */ |
389 | 0000 0 0 2 &UIC3 9 4 /* swizzled int B */ | 391 | 0x0 0x0 0x0 0x2 &UIC3 0x9 0x4 /* swizzled int B */ |
390 | 0000 0 0 3 &UIC3 a 4 /* swizzled int C */ | 392 | 0x0 0x0 0x0 0x3 &UIC3 0xa 0x4 /* swizzled int C */ |
391 | 0000 0 0 4 &UIC3 b 4 /* swizzled int D */>; | 393 | 0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>; |
392 | }; | 394 | }; |
393 | }; | 395 | }; |
394 | 396 | ||
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts index 48c9a6e71f1a..3ed6a8fee1d5 100644 --- a/arch/powerpc/boot/dts/kilauea.dts +++ b/arch/powerpc/boot/dts/kilauea.dts | |||
@@ -8,12 +8,14 @@ | |||
8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
12 | |||
11 | / { | 13 | / { |
12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
14 | model = "amcc,kilauea"; | 16 | model = "amcc,kilauea"; |
15 | compatible = "amcc,kilauea"; | 17 | compatible = "amcc,kilauea"; |
16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
17 | 19 | ||
18 | aliases { | 20 | aliases { |
19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
@@ -29,13 +31,13 @@ | |||
29 | cpu@0 { | 31 | cpu@0 { |
30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
31 | model = "PowerPC,405EX"; | 33 | model = "PowerPC,405EX"; |
32 | reg = <0>; | 34 | reg = <0x00000000>; |
33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
37 | i-cache-size = <4000>; /* 16 kB */ | 39 | i-cache-size = <16384>; /* 16 kB */ |
38 | d-cache-size = <4000>; /* 16 kB */ | 40 | d-cache-size = <16384>; /* 16 kB */ |
39 | dcr-controller; | 41 | dcr-controller; |
40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
41 | }; | 43 | }; |
@@ -43,14 +45,14 @@ | |||
43 | 45 | ||
44 | memory { | 46 | memory { |
45 | device_type = "memory"; | 47 | device_type = "memory"; |
46 | reg = <0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
47 | }; | 49 | }; |
48 | 50 | ||
49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
50 | compatible = "ibm,uic-405ex", "ibm,uic"; | 52 | compatible = "ibm,uic-405ex", "ibm,uic"; |
51 | interrupt-controller; | 53 | interrupt-controller; |
52 | cell-index = <0>; | 54 | cell-index = <0>; |
53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
@@ -60,11 +62,11 @@ | |||
60 | compatible = "ibm,uic-405ex","ibm,uic"; | 62 | compatible = "ibm,uic-405ex","ibm,uic"; |
61 | interrupt-controller; | 63 | interrupt-controller; |
62 | cell-index = <1>; | 64 | cell-index = <1>; |
63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
69 | }; | 71 | }; |
70 | 72 | ||
@@ -72,11 +74,11 @@ | |||
72 | compatible = "ibm,uic-405ex","ibm,uic"; | 74 | compatible = "ibm,uic-405ex","ibm,uic"; |
73 | interrupt-controller; | 75 | interrupt-controller; |
74 | cell-index = <2>; | 76 | cell-index = <2>; |
75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
79 | interrupts = <1c 4 1d 4>; /* cascade */ | 81 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
81 | }; | 83 | }; |
82 | 84 | ||
@@ -89,72 +91,72 @@ | |||
89 | 91 | ||
90 | SDRAM0: memory-controller { | 92 | SDRAM0: memory-controller { |
91 | compatible = "ibm,sdram-405ex"; | 93 | compatible = "ibm,sdram-405ex"; |
92 | dcr-reg = <010 2>; | 94 | dcr-reg = <0x010 0x002>; |
93 | }; | 95 | }; |
94 | 96 | ||
95 | MAL0: mcmal { | 97 | MAL0: mcmal { |
96 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; | 98 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; |
97 | dcr-reg = <180 62>; | 99 | dcr-reg = <0x180 0x062>; |
98 | num-tx-chans = <2>; | 100 | num-tx-chans = <2>; |
99 | num-rx-chans = <2>; | 101 | num-rx-chans = <2>; |
100 | interrupt-parent = <&MAL0>; | 102 | interrupt-parent = <&MAL0>; |
101 | interrupts = <0 1 2 3 4>; | 103 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
102 | #interrupt-cells = <1>; | 104 | #interrupt-cells = <1>; |
103 | #address-cells = <0>; | 105 | #address-cells = <0>; |
104 | #size-cells = <0>; | 106 | #size-cells = <0>; |
105 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 107 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
106 | /*RXEOB*/ 1 &UIC0 b 4 | 108 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
107 | /*SERR*/ 2 &UIC1 0 4 | 109 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
108 | /*TXDE*/ 3 &UIC1 1 4 | 110 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
109 | /*RXDE*/ 4 &UIC1 2 4>; | 111 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
110 | interrupt-map-mask = <ffffffff>; | 112 | interrupt-map-mask = <0xffffffff>; |
111 | }; | 113 | }; |
112 | 114 | ||
113 | POB0: opb { | 115 | POB0: opb { |
114 | compatible = "ibm,opb-405ex", "ibm,opb"; | 116 | compatible = "ibm,opb-405ex", "ibm,opb"; |
115 | #address-cells = <1>; | 117 | #address-cells = <1>; |
116 | #size-cells = <1>; | 118 | #size-cells = <1>; |
117 | ranges = <80000000 80000000 10000000 | 119 | ranges = <0x80000000 0x80000000 0x10000000 |
118 | ef600000 ef600000 a00000 | 120 | 0xef600000 0xef600000 0x00a00000 |
119 | f0000000 f0000000 10000000>; | 121 | 0xf0000000 0xf0000000 0x10000000>; |
120 | dcr-reg = <0a0 5>; | 122 | dcr-reg = <0x0a0 0x005>; |
121 | clock-frequency = <0>; /* Filled in by U-Boot */ | 123 | clock-frequency = <0>; /* Filled in by U-Boot */ |
122 | 124 | ||
123 | EBC0: ebc { | 125 | EBC0: ebc { |
124 | compatible = "ibm,ebc-405ex", "ibm,ebc"; | 126 | compatible = "ibm,ebc-405ex", "ibm,ebc"; |
125 | dcr-reg = <012 2>; | 127 | dcr-reg = <0x012 0x002>; |
126 | #address-cells = <2>; | 128 | #address-cells = <2>; |
127 | #size-cells = <1>; | 129 | #size-cells = <1>; |
128 | clock-frequency = <0>; /* Filled in by U-Boot */ | 130 | clock-frequency = <0>; /* Filled in by U-Boot */ |
129 | /* ranges property is supplied by U-Boot */ | 131 | /* ranges property is supplied by U-Boot */ |
130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
132 | 134 | ||
133 | nor_flash@0,0 { | 135 | nor_flash@0,0 { |
134 | compatible = "amd,s29gl512n", "cfi-flash"; | 136 | compatible = "amd,s29gl512n", "cfi-flash"; |
135 | bank-width = <2>; | 137 | bank-width = <2>; |
136 | reg = <0 000000 4000000>; | 138 | reg = <0x00000000 0x00000000 0x04000000>; |
137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
139 | partition@0 { | 141 | partition@0 { |
140 | label = "kernel"; | 142 | label = "kernel"; |
141 | reg = <0 200000>; | 143 | reg = <0x00000000 0x00200000>; |
142 | }; | 144 | }; |
143 | partition@200000 { | 145 | partition@200000 { |
144 | label = "root"; | 146 | label = "root"; |
145 | reg = <200000 200000>; | 147 | reg = <0x00200000 0x00200000>; |
146 | }; | 148 | }; |
147 | partition@400000 { | 149 | partition@400000 { |
148 | label = "user"; | 150 | label = "user"; |
149 | reg = <400000 3b60000>; | 151 | reg = <0x00400000 0x03b60000>; |
150 | }; | 152 | }; |
151 | partition@3f60000 { | 153 | partition@3f60000 { |
152 | label = "env"; | 154 | label = "env"; |
153 | reg = <3f60000 40000>; | 155 | reg = <0x03f60000 0x00040000>; |
154 | }; | 156 | }; |
155 | partition@3fa0000 { | 157 | partition@3fa0000 { |
156 | label = "u-boot"; | 158 | label = "u-boot"; |
157 | reg = <3fa0000 60000>; | 159 | reg = <0x03fa0000 0x00060000>; |
158 | }; | 160 | }; |
159 | }; | 161 | }; |
160 | }; | 162 | }; |
@@ -162,68 +164,68 @@ | |||
162 | UART0: serial@ef600200 { | 164 | UART0: serial@ef600200 { |
163 | device_type = "serial"; | 165 | device_type = "serial"; |
164 | compatible = "ns16550"; | 166 | compatible = "ns16550"; |
165 | reg = <ef600200 8>; | 167 | reg = <0xef600200 0x00000008>; |
166 | virtual-reg = <ef600200>; | 168 | virtual-reg = <0xef600200>; |
167 | clock-frequency = <0>; /* Filled in by U-Boot */ | 169 | clock-frequency = <0>; /* Filled in by U-Boot */ |
168 | current-speed = <0>; | 170 | current-speed = <0>; |
169 | interrupt-parent = <&UIC0>; | 171 | interrupt-parent = <&UIC0>; |
170 | interrupts = <1a 4>; | 172 | interrupts = <0x1a 0x4>; |
171 | }; | 173 | }; |
172 | 174 | ||
173 | UART1: serial@ef600300 { | 175 | UART1: serial@ef600300 { |
174 | device_type = "serial"; | 176 | device_type = "serial"; |
175 | compatible = "ns16550"; | 177 | compatible = "ns16550"; |
176 | reg = <ef600300 8>; | 178 | reg = <0xef600300 0x00000008>; |
177 | virtual-reg = <ef600300>; | 179 | virtual-reg = <0xef600300>; |
178 | clock-frequency = <0>; /* Filled in by U-Boot */ | 180 | clock-frequency = <0>; /* Filled in by U-Boot */ |
179 | current-speed = <0>; | 181 | current-speed = <0>; |
180 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
181 | interrupts = <1 4>; | 183 | interrupts = <0x1 0x4>; |
182 | }; | 184 | }; |
183 | 185 | ||
184 | IIC0: i2c@ef600400 { | 186 | IIC0: i2c@ef600400 { |
185 | compatible = "ibm,iic-405ex", "ibm,iic"; | 187 | compatible = "ibm,iic-405ex", "ibm,iic"; |
186 | reg = <ef600400 14>; | 188 | reg = <0xef600400 0x00000014>; |
187 | interrupt-parent = <&UIC0>; | 189 | interrupt-parent = <&UIC0>; |
188 | interrupts = <2 4>; | 190 | interrupts = <0x2 0x4>; |
189 | }; | 191 | }; |
190 | 192 | ||
191 | IIC1: i2c@ef600500 { | 193 | IIC1: i2c@ef600500 { |
192 | compatible = "ibm,iic-405ex", "ibm,iic"; | 194 | compatible = "ibm,iic-405ex", "ibm,iic"; |
193 | reg = <ef600500 14>; | 195 | reg = <0xef600500 0x00000014>; |
194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
195 | interrupts = <7 4>; | 197 | interrupts = <0x7 0x4>; |
196 | }; | 198 | }; |
197 | 199 | ||
198 | 200 | ||
199 | RGMII0: emac-rgmii@ef600b00 { | 201 | RGMII0: emac-rgmii@ef600b00 { |
200 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; | 202 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; |
201 | reg = <ef600b00 104>; | 203 | reg = <0xef600b00 0x00000104>; |
202 | has-mdio; | 204 | has-mdio; |
203 | }; | 205 | }; |
204 | 206 | ||
205 | EMAC0: ethernet@ef600900 { | 207 | EMAC0: ethernet@ef600900 { |
206 | linux,network-index = <0>; | 208 | linux,network-index = <0x0>; |
207 | device_type = "network"; | 209 | device_type = "network"; |
208 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 210 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
209 | interrupt-parent = <&EMAC0>; | 211 | interrupt-parent = <&EMAC0>; |
210 | interrupts = <0 1>; | 212 | interrupts = <0x0 0x1>; |
211 | #interrupt-cells = <1>; | 213 | #interrupt-cells = <1>; |
212 | #address-cells = <0>; | 214 | #address-cells = <0>; |
213 | #size-cells = <0>; | 215 | #size-cells = <0>; |
214 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 216 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
215 | /*Wake*/ 1 &UIC1 1d 4>; | 217 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
216 | reg = <ef600900 70>; | 218 | reg = <0xef600900 0x00000070>; |
217 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 219 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
218 | mal-device = <&MAL0>; | 220 | mal-device = <&MAL0>; |
219 | mal-tx-channel = <0>; | 221 | mal-tx-channel = <0>; |
220 | mal-rx-channel = <0>; | 222 | mal-rx-channel = <0>; |
221 | cell-index = <0>; | 223 | cell-index = <0>; |
222 | max-frame-size = <2328>; | 224 | max-frame-size = <9000>; |
223 | rx-fifo-size = <1000>; | 225 | rx-fifo-size = <4096>; |
224 | tx-fifo-size = <800>; | 226 | tx-fifo-size = <2048>; |
225 | phy-mode = "rgmii"; | 227 | phy-mode = "rgmii"; |
226 | phy-map = <00000000>; | 228 | phy-map = <0x00000000>; |
227 | rgmii-device = <&RGMII0>; | 229 | rgmii-device = <&RGMII0>; |
228 | rgmii-channel = <0>; | 230 | rgmii-channel = <0>; |
229 | has-inverted-stacr-oc; | 231 | has-inverted-stacr-oc; |
@@ -231,27 +233,27 @@ | |||
231 | }; | 233 | }; |
232 | 234 | ||
233 | EMAC1: ethernet@ef600a00 { | 235 | EMAC1: ethernet@ef600a00 { |
234 | linux,network-index = <1>; | 236 | linux,network-index = <0x1>; |
235 | device_type = "network"; | 237 | device_type = "network"; |
236 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 238 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
237 | interrupt-parent = <&EMAC1>; | 239 | interrupt-parent = <&EMAC1>; |
238 | interrupts = <0 1>; | 240 | interrupts = <0x0 0x1>; |
239 | #interrupt-cells = <1>; | 241 | #interrupt-cells = <1>; |
240 | #address-cells = <0>; | 242 | #address-cells = <0>; |
241 | #size-cells = <0>; | 243 | #size-cells = <0>; |
242 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 244 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
243 | /*Wake*/ 1 &UIC1 1f 4>; | 245 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
244 | reg = <ef600a00 70>; | 246 | reg = <0xef600a00 0x00000070>; |
245 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 247 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
246 | mal-device = <&MAL0>; | 248 | mal-device = <&MAL0>; |
247 | mal-tx-channel = <1>; | 249 | mal-tx-channel = <1>; |
248 | mal-rx-channel = <1>; | 250 | mal-rx-channel = <1>; |
249 | cell-index = <1>; | 251 | cell-index = <1>; |
250 | max-frame-size = <2328>; | 252 | max-frame-size = <9000>; |
251 | rx-fifo-size = <1000>; | 253 | rx-fifo-size = <4096>; |
252 | tx-fifo-size = <800>; | 254 | tx-fifo-size = <2048>; |
253 | phy-mode = "rgmii"; | 255 | phy-mode = "rgmii"; |
254 | phy-map = <00000000>; | 256 | phy-map = <0x00000000>; |
255 | rgmii-device = <&RGMII0>; | 257 | rgmii-device = <&RGMII0>; |
256 | rgmii-channel = <1>; | 258 | rgmii-channel = <1>; |
257 | has-inverted-stacr-oc; | 259 | has-inverted-stacr-oc; |
@@ -266,23 +268,23 @@ | |||
266 | #address-cells = <3>; | 268 | #address-cells = <3>; |
267 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 269 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
268 | primary; | 270 | primary; |
269 | port = <0>; /* port number */ | 271 | port = <0x0>; /* port number */ |
270 | reg = <a0000000 20000000 /* Config space access */ | 272 | reg = <0xa0000000 0x20000000 /* Config space access */ |
271 | ef000000 00001000>; /* Registers */ | 273 | 0xef000000 0x00001000>; /* Registers */ |
272 | dcr-reg = <040 020>; | 274 | dcr-reg = <0x040 0x020>; |
273 | sdr-base = <400>; | 275 | sdr-base = <0x400>; |
274 | 276 | ||
275 | /* Outbound ranges, one memory and one IO, | 277 | /* Outbound ranges, one memory and one IO, |
276 | * later cannot be changed | 278 | * later cannot be changed |
277 | */ | 279 | */ |
278 | ranges = <02000000 0 80000000 90000000 0 08000000 | 280 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
279 | 01000000 0 00000000 e0000000 0 00010000>; | 281 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
280 | 282 | ||
281 | /* Inbound 2GB range starting at 0 */ | 283 | /* Inbound 2GB range starting at 0 */ |
282 | dma-ranges = <42000000 0 0 0 0 80000000>; | 284 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
283 | 285 | ||
284 | /* This drives busses 0x00 to 0x3f */ | 286 | /* This drives busses 0x00 to 0x3f */ |
285 | bus-range = <00 3f>; | 287 | bus-range = <0x0 0x3f>; |
286 | 288 | ||
287 | /* Legacy interrupts (note the weird polarity, the bridge seems | 289 | /* Legacy interrupts (note the weird polarity, the bridge seems |
288 | * to invert PCIe legacy interrupts). | 290 | * to invert PCIe legacy interrupts). |
@@ -292,12 +294,12 @@ | |||
292 | * below are basically de-swizzled numbers. | 294 | * below are basically de-swizzled numbers. |
293 | * The real slot is on idsel 0, so the swizzling is 1:1 | 295 | * The real slot is on idsel 0, so the swizzling is 1:1 |
294 | */ | 296 | */ |
295 | interrupt-map-mask = <0000 0 0 7>; | 297 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
296 | interrupt-map = < | 298 | interrupt-map = < |
297 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 299 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
298 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 300 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
299 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 301 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
300 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 302 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
301 | }; | 303 | }; |
302 | 304 | ||
303 | PCIE1: pciex@0c0000000 { | 305 | PCIE1: pciex@0c0000000 { |
@@ -307,23 +309,23 @@ | |||
307 | #address-cells = <3>; | 309 | #address-cells = <3>; |
308 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 310 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
309 | primary; | 311 | primary; |
310 | port = <1>; /* port number */ | 312 | port = <0x1>; /* port number */ |
311 | reg = <c0000000 20000000 /* Config space access */ | 313 | reg = <0xc0000000 0x20000000 /* Config space access */ |
312 | ef001000 00001000>; /* Registers */ | 314 | 0xef001000 0x00001000>; /* Registers */ |
313 | dcr-reg = <060 020>; | 315 | dcr-reg = <0x060 0x020>; |
314 | sdr-base = <440>; | 316 | sdr-base = <0x440>; |
315 | 317 | ||
316 | /* Outbound ranges, one memory and one IO, | 318 | /* Outbound ranges, one memory and one IO, |
317 | * later cannot be changed | 319 | * later cannot be changed |
318 | */ | 320 | */ |
319 | ranges = <02000000 0 80000000 98000000 0 08000000 | 321 | ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 |
320 | 01000000 0 00000000 e0010000 0 00010000>; | 322 | 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; |
321 | 323 | ||
322 | /* Inbound 2GB range starting at 0 */ | 324 | /* Inbound 2GB range starting at 0 */ |
323 | dma-ranges = <42000000 0 0 0 0 80000000>; | 325 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
324 | 326 | ||
325 | /* This drives busses 0x40 to 0x7f */ | 327 | /* This drives busses 0x40 to 0x7f */ |
326 | bus-range = <40 7f>; | 328 | bus-range = <0x40 0x7f>; |
327 | 329 | ||
328 | /* Legacy interrupts (note the weird polarity, the bridge seems | 330 | /* Legacy interrupts (note the weird polarity, the bridge seems |
329 | * to invert PCIe legacy interrupts). | 331 | * to invert PCIe legacy interrupts). |
@@ -333,12 +335,12 @@ | |||
333 | * below are basically de-swizzled numbers. | 335 | * below are basically de-swizzled numbers. |
334 | * The real slot is on idsel 0, so the swizzling is 1:1 | 336 | * The real slot is on idsel 0, so the swizzling is 1:1 |
335 | */ | 337 | */ |
336 | interrupt-map-mask = <0000 0 0 7>; | 338 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
337 | interrupt-map = < | 339 | interrupt-map = < |
338 | 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ | 340 | 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ |
339 | 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ | 341 | 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ |
340 | 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ | 342 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ |
341 | 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; | 343 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; |
342 | }; | 344 | }; |
343 | }; | 345 | }; |
344 | }; | 346 | }; |
diff --git a/arch/powerpc/boot/dts/ksi8560.dts b/arch/powerpc/boot/dts/ksi8560.dts index f869ce3ca0b7..fd5804398417 100644 --- a/arch/powerpc/boot/dts/ksi8560.dts +++ b/arch/powerpc/boot/dts/ksi8560.dts | |||
@@ -40,6 +40,7 @@ | |||
40 | timebase-frequency = <0>; /* From U-boot */ | 40 | timebase-frequency = <0>; /* From U-boot */ |
41 | bus-frequency = <0>; /* From U-boot */ | 41 | bus-frequency = <0>; /* From U-boot */ |
42 | clock-frequency = <0>; /* From U-boot */ | 42 | clock-frequency = <0>; /* From U-boot */ |
43 | next-level-cache = <&L2>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -62,7 +63,7 @@ | |||
62 | interrupts = <0x12 0x2>; | 63 | interrupts = <0x12 0x2>; |
63 | }; | 64 | }; |
64 | 65 | ||
65 | l2-cache-controller@20000 { | 66 | L2: l2-cache-controller@20000 { |
66 | compatible = "fsl,8540-l2-cache-controller"; | 67 | compatible = "fsl,8540-l2-cache-controller"; |
67 | reg = <0x20000 0x1000>; | 68 | reg = <0x20000 0x1000>; |
68 | cache-line-size = <0x20>; /* 32 bytes */ | 69 | cache-line-size = <0x20>; /* 32 bytes */ |
@@ -82,6 +83,47 @@ | |||
82 | dfsrr; | 83 | dfsrr; |
83 | }; | 84 | }; |
84 | 85 | ||
86 | dma@21300 { | ||
87 | #address-cells = <1>; | ||
88 | #size-cells = <1>; | ||
89 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | ||
90 | reg = <0x21300 0x4>; | ||
91 | ranges = <0x0 0x21100 0x200>; | ||
92 | cell-index = <0>; | ||
93 | dma-channel@0 { | ||
94 | compatible = "fsl,mpc8560-dma-channel", | ||
95 | "fsl,eloplus-dma-channel"; | ||
96 | reg = <0x0 0x80>; | ||
97 | cell-index = <0>; | ||
98 | interrupt-parent = <&mpic>; | ||
99 | interrupts = <20 2>; | ||
100 | }; | ||
101 | dma-channel@80 { | ||
102 | compatible = "fsl,mpc8560-dma-channel", | ||
103 | "fsl,eloplus-dma-channel"; | ||
104 | reg = <0x80 0x80>; | ||
105 | cell-index = <1>; | ||
106 | interrupt-parent = <&mpic>; | ||
107 | interrupts = <21 2>; | ||
108 | }; | ||
109 | dma-channel@100 { | ||
110 | compatible = "fsl,mpc8560-dma-channel", | ||
111 | "fsl,eloplus-dma-channel"; | ||
112 | reg = <0x100 0x80>; | ||
113 | cell-index = <2>; | ||
114 | interrupt-parent = <&mpic>; | ||
115 | interrupts = <22 2>; | ||
116 | }; | ||
117 | dma-channel@180 { | ||
118 | compatible = "fsl,mpc8560-dma-channel", | ||
119 | "fsl,eloplus-dma-channel"; | ||
120 | reg = <0x180 0x80>; | ||
121 | cell-index = <3>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | interrupts = <23 2>; | ||
124 | }; | ||
125 | }; | ||
126 | |||
85 | mdio@24520 { /* For TSECs */ | 127 | mdio@24520 { /* For TSECs */ |
86 | #address-cells = <1>; | 128 | #address-cells = <1>; |
87 | #size-cells = <0>; | 129 | #size-cells = <0>; |
diff --git a/arch/powerpc/boot/dts/makalu.dts b/arch/powerpc/boot/dts/makalu.dts index 84cc5e72ddd8..1dfcd7ed199c 100644 --- a/arch/powerpc/boot/dts/makalu.dts +++ b/arch/powerpc/boot/dts/makalu.dts | |||
@@ -8,12 +8,14 @@ | |||
8 | * any warranty of any kind, whether express or implied. | 8 | * any warranty of any kind, whether express or implied. |
9 | */ | 9 | */ |
10 | 10 | ||
11 | /dts-v1/; | ||
12 | |||
11 | / { | 13 | / { |
12 | #address-cells = <1>; | 14 | #address-cells = <1>; |
13 | #size-cells = <1>; | 15 | #size-cells = <1>; |
14 | model = "amcc,makalu"; | 16 | model = "amcc,makalu"; |
15 | compatible = "amcc,makalu"; | 17 | compatible = "amcc,makalu"; |
16 | dcr-parent = <&/cpus/cpu@0>; | 18 | dcr-parent = <&{/cpus/cpu@0}>; |
17 | 19 | ||
18 | aliases { | 20 | aliases { |
19 | ethernet0 = &EMAC0; | 21 | ethernet0 = &EMAC0; |
@@ -29,13 +31,13 @@ | |||
29 | cpu@0 { | 31 | cpu@0 { |
30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
31 | model = "PowerPC,405EX"; | 33 | model = "PowerPC,405EX"; |
32 | reg = <0>; | 34 | reg = <0x00000000>; |
33 | clock-frequency = <0>; /* Filled in by U-Boot */ | 35 | clock-frequency = <0>; /* Filled in by U-Boot */ |
34 | timebase-frequency = <0>; /* Filled in by U-Boot */ | 36 | timebase-frequency = <0>; /* Filled in by U-Boot */ |
35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
37 | i-cache-size = <4000>; /* 16 kB */ | 39 | i-cache-size = <16384>; /* 16 kB */ |
38 | d-cache-size = <4000>; /* 16 kB */ | 40 | d-cache-size = <16384>; /* 16 kB */ |
39 | dcr-controller; | 41 | dcr-controller; |
40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
41 | }; | 43 | }; |
@@ -43,14 +45,14 @@ | |||
43 | 45 | ||
44 | memory { | 46 | memory { |
45 | device_type = "memory"; | 47 | device_type = "memory"; |
46 | reg = <0 0>; /* Filled in by U-Boot */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by U-Boot */ |
47 | }; | 49 | }; |
48 | 50 | ||
49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
50 | compatible = "ibm,uic-405ex", "ibm,uic"; | 52 | compatible = "ibm,uic-405ex", "ibm,uic"; |
51 | interrupt-controller; | 53 | interrupt-controller; |
52 | cell-index = <0>; | 54 | cell-index = <0>; |
53 | dcr-reg = <0c0 009>; | 55 | dcr-reg = <0x0c0 0x009>; |
54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
@@ -60,11 +62,11 @@ | |||
60 | compatible = "ibm,uic-405ex","ibm,uic"; | 62 | compatible = "ibm,uic-405ex","ibm,uic"; |
61 | interrupt-controller; | 63 | interrupt-controller; |
62 | cell-index = <1>; | 64 | cell-index = <1>; |
63 | dcr-reg = <0d0 009>; | 65 | dcr-reg = <0x0d0 0x009>; |
64 | #address-cells = <0>; | 66 | #address-cells = <0>; |
65 | #size-cells = <0>; | 67 | #size-cells = <0>; |
66 | #interrupt-cells = <2>; | 68 | #interrupt-cells = <2>; |
67 | interrupts = <1e 4 1f 4>; /* cascade */ | 69 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
68 | interrupt-parent = <&UIC0>; | 70 | interrupt-parent = <&UIC0>; |
69 | }; | 71 | }; |
70 | 72 | ||
@@ -72,11 +74,11 @@ | |||
72 | compatible = "ibm,uic-405ex","ibm,uic"; | 74 | compatible = "ibm,uic-405ex","ibm,uic"; |
73 | interrupt-controller; | 75 | interrupt-controller; |
74 | cell-index = <2>; | 76 | cell-index = <2>; |
75 | dcr-reg = <0e0 009>; | 77 | dcr-reg = <0x0e0 0x009>; |
76 | #address-cells = <0>; | 78 | #address-cells = <0>; |
77 | #size-cells = <0>; | 79 | #size-cells = <0>; |
78 | #interrupt-cells = <2>; | 80 | #interrupt-cells = <2>; |
79 | interrupts = <1c 4 1d 4>; /* cascade */ | 81 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
80 | interrupt-parent = <&UIC0>; | 82 | interrupt-parent = <&UIC0>; |
81 | }; | 83 | }; |
82 | 84 | ||
@@ -89,72 +91,72 @@ | |||
89 | 91 | ||
90 | SDRAM0: memory-controller { | 92 | SDRAM0: memory-controller { |
91 | compatible = "ibm,sdram-405ex"; | 93 | compatible = "ibm,sdram-405ex"; |
92 | dcr-reg = <010 2>; | 94 | dcr-reg = <0x010 0x002>; |
93 | }; | 95 | }; |
94 | 96 | ||
95 | MAL0: mcmal { | 97 | MAL0: mcmal { |
96 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; | 98 | compatible = "ibm,mcmal-405ex", "ibm,mcmal2"; |
97 | dcr-reg = <180 62>; | 99 | dcr-reg = <0x180 0x062>; |
98 | num-tx-chans = <2>; | 100 | num-tx-chans = <2>; |
99 | num-rx-chans = <2>; | 101 | num-rx-chans = <2>; |
100 | interrupt-parent = <&MAL0>; | 102 | interrupt-parent = <&MAL0>; |
101 | interrupts = <0 1 2 3 4>; | 103 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
102 | #interrupt-cells = <1>; | 104 | #interrupt-cells = <1>; |
103 | #address-cells = <0>; | 105 | #address-cells = <0>; |
104 | #size-cells = <0>; | 106 | #size-cells = <0>; |
105 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 107 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
106 | /*RXEOB*/ 1 &UIC0 b 4 | 108 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
107 | /*SERR*/ 2 &UIC1 0 4 | 109 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
108 | /*TXDE*/ 3 &UIC1 1 4 | 110 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
109 | /*RXDE*/ 4 &UIC1 2 4>; | 111 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
110 | interrupt-map-mask = <ffffffff>; | 112 | interrupt-map-mask = <0xffffffff>; |
111 | }; | 113 | }; |
112 | 114 | ||
113 | POB0: opb { | 115 | POB0: opb { |
114 | compatible = "ibm,opb-405ex", "ibm,opb"; | 116 | compatible = "ibm,opb-405ex", "ibm,opb"; |
115 | #address-cells = <1>; | 117 | #address-cells = <1>; |
116 | #size-cells = <1>; | 118 | #size-cells = <1>; |
117 | ranges = <80000000 80000000 10000000 | 119 | ranges = <0x80000000 0x80000000 0x10000000 |
118 | ef600000 ef600000 a00000 | 120 | 0xef600000 0xef600000 0x00a00000 |
119 | f0000000 f0000000 10000000>; | 121 | 0xf0000000 0xf0000000 0x10000000>; |
120 | dcr-reg = <0a0 5>; | 122 | dcr-reg = <0x0a0 0x005>; |
121 | clock-frequency = <0>; /* Filled in by U-Boot */ | 123 | clock-frequency = <0>; /* Filled in by U-Boot */ |
122 | 124 | ||
123 | EBC0: ebc { | 125 | EBC0: ebc { |
124 | compatible = "ibm,ebc-405ex", "ibm,ebc"; | 126 | compatible = "ibm,ebc-405ex", "ibm,ebc"; |
125 | dcr-reg = <012 2>; | 127 | dcr-reg = <0x012 0x002>; |
126 | #address-cells = <2>; | 128 | #address-cells = <2>; |
127 | #size-cells = <1>; | 129 | #size-cells = <1>; |
128 | clock-frequency = <0>; /* Filled in by U-Boot */ | 130 | clock-frequency = <0>; /* Filled in by U-Boot */ |
129 | /* ranges property is supplied by U-Boot */ | 131 | /* ranges property is supplied by U-Boot */ |
130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
132 | 134 | ||
133 | nor_flash@0,0 { | 135 | nor_flash@0,0 { |
134 | compatible = "amd,s29gl512n", "cfi-flash"; | 136 | compatible = "amd,s29gl512n", "cfi-flash"; |
135 | bank-width = <2>; | 137 | bank-width = <2>; |
136 | reg = <0 000000 4000000>; | 138 | reg = <0x00000000 0x00000000 0x04000000>; |
137 | #address-cells = <1>; | 139 | #address-cells = <1>; |
138 | #size-cells = <1>; | 140 | #size-cells = <1>; |
139 | partition@0 { | 141 | partition@0 { |
140 | label = "kernel"; | 142 | label = "kernel"; |
141 | reg = <0 200000>; | 143 | reg = <0x00000000 0x00200000>; |
142 | }; | 144 | }; |
143 | partition@200000 { | 145 | partition@200000 { |
144 | label = "root"; | 146 | label = "root"; |
145 | reg = <200000 200000>; | 147 | reg = <0x00200000 0x00200000>; |
146 | }; | 148 | }; |
147 | partition@400000 { | 149 | partition@400000 { |
148 | label = "user"; | 150 | label = "user"; |
149 | reg = <400000 3b60000>; | 151 | reg = <0x00400000 0x03b60000>; |
150 | }; | 152 | }; |
151 | partition@3f60000 { | 153 | partition@3f60000 { |
152 | label = "env"; | 154 | label = "env"; |
153 | reg = <3f60000 40000>; | 155 | reg = <0x03f60000 0x00040000>; |
154 | }; | 156 | }; |
155 | partition@3fa0000 { | 157 | partition@3fa0000 { |
156 | label = "u-boot"; | 158 | label = "u-boot"; |
157 | reg = <3fa0000 60000>; | 159 | reg = <0x03fa0000 0x00060000>; |
158 | }; | 160 | }; |
159 | }; | 161 | }; |
160 | }; | 162 | }; |
@@ -162,68 +164,68 @@ | |||
162 | UART0: serial@ef600200 { | 164 | UART0: serial@ef600200 { |
163 | device_type = "serial"; | 165 | device_type = "serial"; |
164 | compatible = "ns16550"; | 166 | compatible = "ns16550"; |
165 | reg = <ef600200 8>; | 167 | reg = <0xef600200 0x00000008>; |
166 | virtual-reg = <ef600200>; | 168 | virtual-reg = <0xef600200>; |
167 | clock-frequency = <0>; /* Filled in by U-Boot */ | 169 | clock-frequency = <0>; /* Filled in by U-Boot */ |
168 | current-speed = <0>; | 170 | current-speed = <0>; |
169 | interrupt-parent = <&UIC0>; | 171 | interrupt-parent = <&UIC0>; |
170 | interrupts = <1a 4>; | 172 | interrupts = <0x1a 0x4>; |
171 | }; | 173 | }; |
172 | 174 | ||
173 | UART1: serial@ef600300 { | 175 | UART1: serial@ef600300 { |
174 | device_type = "serial"; | 176 | device_type = "serial"; |
175 | compatible = "ns16550"; | 177 | compatible = "ns16550"; |
176 | reg = <ef600300 8>; | 178 | reg = <0xef600300 0x00000008>; |
177 | virtual-reg = <ef600300>; | 179 | virtual-reg = <0xef600300>; |
178 | clock-frequency = <0>; /* Filled in by U-Boot */ | 180 | clock-frequency = <0>; /* Filled in by U-Boot */ |
179 | current-speed = <0>; | 181 | current-speed = <0>; |
180 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
181 | interrupts = <1 4>; | 183 | interrupts = <0x1 0x4>; |
182 | }; | 184 | }; |
183 | 185 | ||
184 | IIC0: i2c@ef600400 { | 186 | IIC0: i2c@ef600400 { |
185 | compatible = "ibm,iic-405ex", "ibm,iic"; | 187 | compatible = "ibm,iic-405ex", "ibm,iic"; |
186 | reg = <ef600400 14>; | 188 | reg = <0xef600400 0x00000014>; |
187 | interrupt-parent = <&UIC0>; | 189 | interrupt-parent = <&UIC0>; |
188 | interrupts = <2 4>; | 190 | interrupts = <0x2 0x4>; |
189 | }; | 191 | }; |
190 | 192 | ||
191 | IIC1: i2c@ef600500 { | 193 | IIC1: i2c@ef600500 { |
192 | compatible = "ibm,iic-405ex", "ibm,iic"; | 194 | compatible = "ibm,iic-405ex", "ibm,iic"; |
193 | reg = <ef600500 14>; | 195 | reg = <0xef600500 0x00000014>; |
194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
195 | interrupts = <7 4>; | 197 | interrupts = <0x7 0x4>; |
196 | }; | 198 | }; |
197 | 199 | ||
198 | 200 | ||
199 | RGMII0: emac-rgmii@ef600b00 { | 201 | RGMII0: emac-rgmii@ef600b00 { |
200 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; | 202 | compatible = "ibm,rgmii-405ex", "ibm,rgmii"; |
201 | reg = <ef600b00 104>; | 203 | reg = <0xef600b00 0x00000104>; |
202 | has-mdio; | 204 | has-mdio; |
203 | }; | 205 | }; |
204 | 206 | ||
205 | EMAC0: ethernet@ef600900 { | 207 | EMAC0: ethernet@ef600900 { |
206 | linux,network-index = <0>; | 208 | linux,network-index = <0x0>; |
207 | device_type = "network"; | 209 | device_type = "network"; |
208 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 210 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
209 | interrupt-parent = <&EMAC0>; | 211 | interrupt-parent = <&EMAC0>; |
210 | interrupts = <0 1>; | 212 | interrupts = <0x0 0x1>; |
211 | #interrupt-cells = <1>; | 213 | #interrupt-cells = <1>; |
212 | #address-cells = <0>; | 214 | #address-cells = <0>; |
213 | #size-cells = <0>; | 215 | #size-cells = <0>; |
214 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 216 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
215 | /*Wake*/ 1 &UIC1 1d 4>; | 217 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
216 | reg = <ef600900 70>; | 218 | reg = <0xef600900 0x00000070>; |
217 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 219 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
218 | mal-device = <&MAL0>; | 220 | mal-device = <&MAL0>; |
219 | mal-tx-channel = <0>; | 221 | mal-tx-channel = <0>; |
220 | mal-rx-channel = <0>; | 222 | mal-rx-channel = <0>; |
221 | cell-index = <0>; | 223 | cell-index = <0>; |
222 | max-frame-size = <2328>; | 224 | max-frame-size = <9000>; |
223 | rx-fifo-size = <1000>; | 225 | rx-fifo-size = <4096>; |
224 | tx-fifo-size = <800>; | 226 | tx-fifo-size = <2048>; |
225 | phy-mode = "rgmii"; | 227 | phy-mode = "rgmii"; |
226 | phy-map = <0000003f>; /* Start at 6 */ | 228 | phy-map = <0x0000003f>; /* Start at 6 */ |
227 | rgmii-device = <&RGMII0>; | 229 | rgmii-device = <&RGMII0>; |
228 | rgmii-channel = <0>; | 230 | rgmii-channel = <0>; |
229 | has-inverted-stacr-oc; | 231 | has-inverted-stacr-oc; |
@@ -231,27 +233,27 @@ | |||
231 | }; | 233 | }; |
232 | 234 | ||
233 | EMAC1: ethernet@ef600a00 { | 235 | EMAC1: ethernet@ef600a00 { |
234 | linux,network-index = <1>; | 236 | linux,network-index = <0x1>; |
235 | device_type = "network"; | 237 | device_type = "network"; |
236 | compatible = "ibm,emac-405ex", "ibm,emac4"; | 238 | compatible = "ibm,emac-405ex", "ibm,emac4"; |
237 | interrupt-parent = <&EMAC1>; | 239 | interrupt-parent = <&EMAC1>; |
238 | interrupts = <0 1>; | 240 | interrupts = <0x0 0x1>; |
239 | #interrupt-cells = <1>; | 241 | #interrupt-cells = <1>; |
240 | #address-cells = <0>; | 242 | #address-cells = <0>; |
241 | #size-cells = <0>; | 243 | #size-cells = <0>; |
242 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 244 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
243 | /*Wake*/ 1 &UIC1 1f 4>; | 245 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
244 | reg = <ef600a00 70>; | 246 | reg = <0xef600a00 0x00000070>; |
245 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ | 247 | local-mac-address = [000000000000]; /* Filled in by U-Boot */ |
246 | mal-device = <&MAL0>; | 248 | mal-device = <&MAL0>; |
247 | mal-tx-channel = <1>; | 249 | mal-tx-channel = <1>; |
248 | mal-rx-channel = <1>; | 250 | mal-rx-channel = <1>; |
249 | cell-index = <1>; | 251 | cell-index = <1>; |
250 | max-frame-size = <2328>; | 252 | max-frame-size = <9000>; |
251 | rx-fifo-size = <1000>; | 253 | rx-fifo-size = <4096>; |
252 | tx-fifo-size = <800>; | 254 | tx-fifo-size = <2048>; |
253 | phy-mode = "rgmii"; | 255 | phy-mode = "rgmii"; |
254 | phy-map = <00000000>; | 256 | phy-map = <0x00000000>; |
255 | rgmii-device = <&RGMII0>; | 257 | rgmii-device = <&RGMII0>; |
256 | rgmii-channel = <1>; | 258 | rgmii-channel = <1>; |
257 | has-inverted-stacr-oc; | 259 | has-inverted-stacr-oc; |
@@ -266,23 +268,23 @@ | |||
266 | #address-cells = <3>; | 268 | #address-cells = <3>; |
267 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 269 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
268 | primary; | 270 | primary; |
269 | port = <0>; /* port number */ | 271 | port = <0x0>; /* port number */ |
270 | reg = <a0000000 20000000 /* Config space access */ | 272 | reg = <0xa0000000 0x20000000 /* Config space access */ |
271 | ef000000 00001000>; /* Registers */ | 273 | 0xef000000 0x00001000>; /* Registers */ |
272 | dcr-reg = <040 020>; | 274 | dcr-reg = <0x040 0x020>; |
273 | sdr-base = <400>; | 275 | sdr-base = <0x400>; |
274 | 276 | ||
275 | /* Outbound ranges, one memory and one IO, | 277 | /* Outbound ranges, one memory and one IO, |
276 | * later cannot be changed | 278 | * later cannot be changed |
277 | */ | 279 | */ |
278 | ranges = <02000000 0 80000000 90000000 0 08000000 | 280 | ranges = <0x02000000 0x00000000 0x80000000 0x90000000 0x00000000 0x08000000 |
279 | 01000000 0 00000000 e0000000 0 00010000>; | 281 | 0x01000000 0x00000000 0x00000000 0xe0000000 0x00000000 0x00010000>; |
280 | 282 | ||
281 | /* Inbound 2GB range starting at 0 */ | 283 | /* Inbound 2GB range starting at 0 */ |
282 | dma-ranges = <42000000 0 0 0 0 80000000>; | 284 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
283 | 285 | ||
284 | /* This drives busses 0x00 to 0x3f */ | 286 | /* This drives busses 0x00 to 0x3f */ |
285 | bus-range = <00 3f>; | 287 | bus-range = <0x0 0x3f>; |
286 | 288 | ||
287 | /* Legacy interrupts (note the weird polarity, the bridge seems | 289 | /* Legacy interrupts (note the weird polarity, the bridge seems |
288 | * to invert PCIe legacy interrupts). | 290 | * to invert PCIe legacy interrupts). |
@@ -292,12 +294,12 @@ | |||
292 | * below are basically de-swizzled numbers. | 294 | * below are basically de-swizzled numbers. |
293 | * The real slot is on idsel 0, so the swizzling is 1:1 | 295 | * The real slot is on idsel 0, so the swizzling is 1:1 |
294 | */ | 296 | */ |
295 | interrupt-map-mask = <0000 0 0 7>; | 297 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
296 | interrupt-map = < | 298 | interrupt-map = < |
297 | 0000 0 0 1 &UIC2 0 4 /* swizzled int A */ | 299 | 0x0 0x0 0x0 0x1 &UIC2 0x0 0x4 /* swizzled int A */ |
298 | 0000 0 0 2 &UIC2 1 4 /* swizzled int B */ | 300 | 0x0 0x0 0x0 0x2 &UIC2 0x1 0x4 /* swizzled int B */ |
299 | 0000 0 0 3 &UIC2 2 4 /* swizzled int C */ | 301 | 0x0 0x0 0x0 0x3 &UIC2 0x2 0x4 /* swizzled int C */ |
300 | 0000 0 0 4 &UIC2 3 4 /* swizzled int D */>; | 302 | 0x0 0x0 0x0 0x4 &UIC2 0x3 0x4 /* swizzled int D */>; |
301 | }; | 303 | }; |
302 | 304 | ||
303 | PCIE1: pciex@0c0000000 { | 305 | PCIE1: pciex@0c0000000 { |
@@ -307,23 +309,23 @@ | |||
307 | #address-cells = <3>; | 309 | #address-cells = <3>; |
308 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; | 310 | compatible = "ibm,plb-pciex-405ex", "ibm,plb-pciex"; |
309 | primary; | 311 | primary; |
310 | port = <1>; /* port number */ | 312 | port = <0x1>; /* port number */ |
311 | reg = <c0000000 20000000 /* Config space access */ | 313 | reg = <0xc0000000 0x20000000 /* Config space access */ |
312 | ef001000 00001000>; /* Registers */ | 314 | 0xef001000 0x00001000>; /* Registers */ |
313 | dcr-reg = <060 020>; | 315 | dcr-reg = <0x060 0x020>; |
314 | sdr-base = <440>; | 316 | sdr-base = <0x440>; |
315 | 317 | ||
316 | /* Outbound ranges, one memory and one IO, | 318 | /* Outbound ranges, one memory and one IO, |
317 | * later cannot be changed | 319 | * later cannot be changed |
318 | */ | 320 | */ |
319 | ranges = <02000000 0 80000000 98000000 0 08000000 | 321 | ranges = <0x02000000 0x00000000 0x80000000 0x98000000 0x00000000 0x08000000 |
320 | 01000000 0 00000000 e0010000 0 00010000>; | 322 | 0x01000000 0x00000000 0x00000000 0xe0010000 0x00000000 0x00010000>; |
321 | 323 | ||
322 | /* Inbound 2GB range starting at 0 */ | 324 | /* Inbound 2GB range starting at 0 */ |
323 | dma-ranges = <42000000 0 0 0 0 80000000>; | 325 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
324 | 326 | ||
325 | /* This drives busses 0x40 to 0x7f */ | 327 | /* This drives busses 0x40 to 0x7f */ |
326 | bus-range = <40 7f>; | 328 | bus-range = <0x40 0x7f>; |
327 | 329 | ||
328 | /* Legacy interrupts (note the weird polarity, the bridge seems | 330 | /* Legacy interrupts (note the weird polarity, the bridge seems |
329 | * to invert PCIe legacy interrupts). | 331 | * to invert PCIe legacy interrupts). |
@@ -333,12 +335,12 @@ | |||
333 | * below are basically de-swizzled numbers. | 335 | * below are basically de-swizzled numbers. |
334 | * The real slot is on idsel 0, so the swizzling is 1:1 | 336 | * The real slot is on idsel 0, so the swizzling is 1:1 |
335 | */ | 337 | */ |
336 | interrupt-map-mask = <0000 0 0 7>; | 338 | interrupt-map-mask = <0x0 0x0 0x0 0x7>; |
337 | interrupt-map = < | 339 | interrupt-map = < |
338 | 0000 0 0 1 &UIC2 b 4 /* swizzled int A */ | 340 | 0x0 0x0 0x0 0x1 &UIC2 0xb 0x4 /* swizzled int A */ |
339 | 0000 0 0 2 &UIC2 c 4 /* swizzled int B */ | 341 | 0x0 0x0 0x0 0x2 &UIC2 0xc 0x4 /* swizzled int B */ |
340 | 0000 0 0 3 &UIC2 d 4 /* swizzled int C */ | 342 | 0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */ |
341 | 0000 0 0 4 &UIC2 e 4 /* swizzled int D */>; | 343 | 0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>; |
342 | }; | 344 | }; |
343 | }; | 345 | }; |
344 | }; | 346 | }; |
diff --git a/arch/powerpc/boot/dts/mpc7448hpc2.dts b/arch/powerpc/boot/dts/mpc7448hpc2.dts index 4936349b87cd..705c23c14f32 100644 --- a/arch/powerpc/boot/dts/mpc7448hpc2.dts +++ b/arch/powerpc/boot/dts/mpc7448hpc2.dts | |||
@@ -124,14 +124,12 @@ | |||
124 | }; | 124 | }; |
125 | 125 | ||
126 | mpic: pic@7400 { | 126 | mpic: pic@7400 { |
127 | clock-frequency = <0>; | ||
128 | interrupt-controller; | 127 | interrupt-controller; |
129 | #address-cells = <0>; | 128 | #address-cells = <0>; |
130 | #interrupt-cells = <2>; | 129 | #interrupt-cells = <2>; |
131 | reg = <0x7400 0x400>; | 130 | reg = <0x7400 0x400>; |
132 | compatible = "chrp,open-pic"; | 131 | compatible = "chrp,open-pic"; |
133 | device_type = "open-pic"; | 132 | device_type = "open-pic"; |
134 | big-endian; | ||
135 | }; | 133 | }; |
136 | pci@1000 { | 134 | pci@1000 { |
137 | compatible = "tsi108-pci"; | 135 | compatible = "tsi108-pci"; |
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts index e1f0dca8ac39..b2068430a06d 100644 --- a/arch/powerpc/boot/dts/mpc8313erdb.dts +++ b/arch/powerpc/boot/dts/mpc8313erdb.dts | |||
@@ -144,6 +144,41 @@ | |||
144 | mode = "cpu"; | 144 | mode = "cpu"; |
145 | }; | 145 | }; |
146 | 146 | ||
147 | dma@82a8 { | ||
148 | #address-cells = <1>; | ||
149 | #size-cells = <1>; | ||
150 | compatible = "fsl,mpc8313-dma", "fsl,elo-dma"; | ||
151 | reg = <0x82a8 4>; | ||
152 | ranges = <0 0x8100 0x1a8>; | ||
153 | interrupt-parent = <&ipic>; | ||
154 | interrupts = <71 8>; | ||
155 | cell-index = <0>; | ||
156 | dma-channel@0 { | ||
157 | compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; | ||
158 | reg = <0 0x80>; | ||
159 | interrupt-parent = <&ipic>; | ||
160 | interrupts = <71 8>; | ||
161 | }; | ||
162 | dma-channel@80 { | ||
163 | compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; | ||
164 | reg = <0x80 0x80>; | ||
165 | interrupt-parent = <&ipic>; | ||
166 | interrupts = <71 8>; | ||
167 | }; | ||
168 | dma-channel@100 { | ||
169 | compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; | ||
170 | reg = <0x100 0x80>; | ||
171 | interrupt-parent = <&ipic>; | ||
172 | interrupts = <71 8>; | ||
173 | }; | ||
174 | dma-channel@180 { | ||
175 | compatible = "fsl,mpc8313-dma-channel", "fsl,elo-dma-channel"; | ||
176 | reg = <0x180 0x28>; | ||
177 | interrupt-parent = <&ipic>; | ||
178 | interrupts = <71 8>; | ||
179 | }; | ||
180 | }; | ||
181 | |||
147 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ | 182 | /* phy type (ULPI, UTMI, UTMI_WIDE, SERIAL) */ |
148 | usb@23000 { | 183 | usb@23000 { |
149 | compatible = "fsl-usb2-dr"; | 184 | compatible = "fsl-usb2-dr"; |
diff --git a/arch/powerpc/boot/dts/mpc8315erdb.dts b/arch/powerpc/boot/dts/mpc8315erdb.dts index d7a1ececa30f..a40e8064d429 100644 --- a/arch/powerpc/boot/dts/mpc8315erdb.dts +++ b/arch/powerpc/boot/dts/mpc8315erdb.dts | |||
@@ -132,6 +132,41 @@ | |||
132 | mode = "cpu"; | 132 | mode = "cpu"; |
133 | }; | 133 | }; |
134 | 134 | ||
135 | dma@82a8 { | ||
136 | #address-cells = <1>; | ||
137 | #size-cells = <1>; | ||
138 | compatible = "fsl,mpc8315-dma", "fsl,elo-dma"; | ||
139 | reg = <0x82a8 4>; | ||
140 | ranges = <0 0x8100 0x1a8>; | ||
141 | interrupt-parent = <&ipic>; | ||
142 | interrupts = <71 8>; | ||
143 | cell-index = <0>; | ||
144 | dma-channel@0 { | ||
145 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; | ||
146 | reg = <0 0x80>; | ||
147 | interrupt-parent = <&ipic>; | ||
148 | interrupts = <71 8>; | ||
149 | }; | ||
150 | dma-channel@80 { | ||
151 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; | ||
152 | reg = <0x80 0x80>; | ||
153 | interrupt-parent = <&ipic>; | ||
154 | interrupts = <71 8>; | ||
155 | }; | ||
156 | dma-channel@100 { | ||
157 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; | ||
158 | reg = <0x100 0x80>; | ||
159 | interrupt-parent = <&ipic>; | ||
160 | interrupts = <71 8>; | ||
161 | }; | ||
162 | dma-channel@180 { | ||
163 | compatible = "fsl,mpc8315-dma-channel", "fsl,elo-dma-channel"; | ||
164 | reg = <0x180 0x28>; | ||
165 | interrupt-parent = <&ipic>; | ||
166 | interrupts = <71 8>; | ||
167 | }; | ||
168 | }; | ||
169 | |||
135 | usb@23000 { | 170 | usb@23000 { |
136 | compatible = "fsl-usb2-dr"; | 171 | compatible = "fsl-usb2-dr"; |
137 | reg = <0x23000 0x1000>; | 172 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc832x_mds.dts b/arch/powerpc/boot/dts/mpc832x_mds.dts index 539e02fb3526..b5968b6c8a29 100644 --- a/arch/powerpc/boot/dts/mpc832x_mds.dts +++ b/arch/powerpc/boot/dts/mpc832x_mds.dts | |||
@@ -114,6 +114,41 @@ | |||
114 | interrupt-parent = <&ipic>; | 114 | interrupt-parent = <&ipic>; |
115 | }; | 115 | }; |
116 | 116 | ||
117 | dma@82a8 { | ||
118 | #address-cells = <1>; | ||
119 | #size-cells = <1>; | ||
120 | compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; | ||
121 | reg = <0x82a8 4>; | ||
122 | ranges = <0 0x8100 0x1a8>; | ||
123 | interrupt-parent = <&ipic>; | ||
124 | interrupts = <71 8>; | ||
125 | cell-index = <0>; | ||
126 | dma-channel@0 { | ||
127 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
128 | reg = <0 0x80>; | ||
129 | interrupt-parent = <&ipic>; | ||
130 | interrupts = <71 8>; | ||
131 | }; | ||
132 | dma-channel@80 { | ||
133 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
134 | reg = <0x80 0x80>; | ||
135 | interrupt-parent = <&ipic>; | ||
136 | interrupts = <71 8>; | ||
137 | }; | ||
138 | dma-channel@100 { | ||
139 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
140 | reg = <0x100 0x80>; | ||
141 | interrupt-parent = <&ipic>; | ||
142 | interrupts = <71 8>; | ||
143 | }; | ||
144 | dma-channel@180 { | ||
145 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
146 | reg = <0x180 0x28>; | ||
147 | interrupt-parent = <&ipic>; | ||
148 | interrupts = <71 8>; | ||
149 | }; | ||
150 | }; | ||
151 | |||
117 | crypto@30000 { | 152 | crypto@30000 { |
118 | device_type = "crypto"; | 153 | device_type = "crypto"; |
119 | model = "SEC2"; | 154 | model = "SEC2"; |
diff --git a/arch/powerpc/boot/dts/mpc832x_rdb.dts b/arch/powerpc/boot/dts/mpc832x_rdb.dts index 179c81c6a7ac..a798d8639a7d 100644 --- a/arch/powerpc/boot/dts/mpc832x_rdb.dts +++ b/arch/powerpc/boot/dts/mpc832x_rdb.dts | |||
@@ -68,7 +68,7 @@ | |||
68 | compatible = "fsl-i2c"; | 68 | compatible = "fsl-i2c"; |
69 | reg = <0x3000 0x100>; | 69 | reg = <0x3000 0x100>; |
70 | interrupts = <14 0x8>; | 70 | interrupts = <14 0x8>; |
71 | interrupt-parent = <&pic>; | 71 | interrupt-parent = <&ipic>; |
72 | dfsrr; | 72 | dfsrr; |
73 | }; | 73 | }; |
74 | 74 | ||
@@ -79,7 +79,7 @@ | |||
79 | reg = <0x4500 0x100>; | 79 | reg = <0x4500 0x100>; |
80 | clock-frequency = <0>; | 80 | clock-frequency = <0>; |
81 | interrupts = <9 0x8>; | 81 | interrupts = <9 0x8>; |
82 | interrupt-parent = <&pic>; | 82 | interrupt-parent = <&ipic>; |
83 | }; | 83 | }; |
84 | 84 | ||
85 | serial1: serial@4600 { | 85 | serial1: serial@4600 { |
@@ -89,7 +89,42 @@ | |||
89 | reg = <0x4600 0x100>; | 89 | reg = <0x4600 0x100>; |
90 | clock-frequency = <0>; | 90 | clock-frequency = <0>; |
91 | interrupts = <10 0x8>; | 91 | interrupts = <10 0x8>; |
92 | interrupt-parent = <&pic>; | 92 | interrupt-parent = <&ipic>; |
93 | }; | ||
94 | |||
95 | dma@82a8 { | ||
96 | #address-cells = <1>; | ||
97 | #size-cells = <1>; | ||
98 | compatible = "fsl,mpc8323-dma", "fsl,elo-dma"; | ||
99 | reg = <0x82a8 4>; | ||
100 | ranges = <0 0x8100 0x1a8>; | ||
101 | interrupt-parent = <&ipic>; | ||
102 | interrupts = <71 8>; | ||
103 | cell-index = <0>; | ||
104 | dma-channel@0 { | ||
105 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
106 | reg = <0 0x80>; | ||
107 | interrupt-parent = <&ipic>; | ||
108 | interrupts = <71 8>; | ||
109 | }; | ||
110 | dma-channel@80 { | ||
111 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
112 | reg = <0x80 0x80>; | ||
113 | interrupt-parent = <&ipic>; | ||
114 | interrupts = <71 8>; | ||
115 | }; | ||
116 | dma-channel@100 { | ||
117 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
118 | reg = <0x100 0x80>; | ||
119 | interrupt-parent = <&ipic>; | ||
120 | interrupts = <71 8>; | ||
121 | }; | ||
122 | dma-channel@180 { | ||
123 | compatible = "fsl,mpc8323-dma-channel", "fsl,elo-dma-channel"; | ||
124 | reg = <0x180 0x28>; | ||
125 | interrupt-parent = <&ipic>; | ||
126 | interrupts = <71 8>; | ||
127 | }; | ||
93 | }; | 128 | }; |
94 | 129 | ||
95 | crypto@30000 { | 130 | crypto@30000 { |
@@ -98,7 +133,7 @@ | |||
98 | compatible = "talitos"; | 133 | compatible = "talitos"; |
99 | reg = <0x30000 0x7000>; | 134 | reg = <0x30000 0x7000>; |
100 | interrupts = <11 0x8>; | 135 | interrupts = <11 0x8>; |
101 | interrupt-parent = <&pic>; | 136 | interrupt-parent = <&ipic>; |
102 | /* Rev. 2.2 */ | 137 | /* Rev. 2.2 */ |
103 | num-channels = <1>; | 138 | num-channels = <1>; |
104 | channel-fifo-len = <24>; | 139 | channel-fifo-len = <24>; |
@@ -106,7 +141,7 @@ | |||
106 | descriptor-types-mask = <0x0122003f>; | 141 | descriptor-types-mask = <0x0122003f>; |
107 | }; | 142 | }; |
108 | 143 | ||
109 | pic:pic@700 { | 144 | ipic:pic@700 { |
110 | interrupt-controller; | 145 | interrupt-controller; |
111 | #address-cells = <0>; | 146 | #address-cells = <0>; |
112 | #interrupt-cells = <2>; | 147 | #interrupt-cells = <2>; |
@@ -240,13 +275,13 @@ | |||
240 | compatible = "fsl,ucc-mdio"; | 275 | compatible = "fsl,ucc-mdio"; |
241 | 276 | ||
242 | phy00:ethernet-phy@00 { | 277 | phy00:ethernet-phy@00 { |
243 | interrupt-parent = <&pic>; | 278 | interrupt-parent = <&ipic>; |
244 | interrupts = <0>; | 279 | interrupts = <0>; |
245 | reg = <0x0>; | 280 | reg = <0x0>; |
246 | device_type = "ethernet-phy"; | 281 | device_type = "ethernet-phy"; |
247 | }; | 282 | }; |
248 | phy04:ethernet-phy@04 { | 283 | phy04:ethernet-phy@04 { |
249 | interrupt-parent = <&pic>; | 284 | interrupt-parent = <&ipic>; |
250 | interrupts = <0>; | 285 | interrupts = <0>; |
251 | reg = <0x4>; | 286 | reg = <0x4>; |
252 | device_type = "ethernet-phy"; | 287 | device_type = "ethernet-phy"; |
@@ -261,7 +296,7 @@ | |||
261 | reg = <0x80 0x80>; | 296 | reg = <0x80 0x80>; |
262 | big-endian; | 297 | big-endian; |
263 | interrupts = <32 0x8 33 0x8>; //high:32 low:33 | 298 | interrupts = <32 0x8 33 0x8>; //high:32 low:33 |
264 | interrupt-parent = <&pic>; | 299 | interrupt-parent = <&ipic>; |
265 | }; | 300 | }; |
266 | }; | 301 | }; |
267 | 302 | ||
@@ -270,21 +305,21 @@ | |||
270 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | 305 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
271 | interrupt-map = < | 306 | interrupt-map = < |
272 | /* IDSEL 0x10 AD16 (USB) */ | 307 | /* IDSEL 0x10 AD16 (USB) */ |
273 | 0x8000 0x0 0x0 0x1 &pic 17 0x8 | 308 | 0x8000 0x0 0x0 0x1 &ipic 17 0x8 |
274 | 309 | ||
275 | /* IDSEL 0x11 AD17 (Mini1)*/ | 310 | /* IDSEL 0x11 AD17 (Mini1)*/ |
276 | 0x8800 0x0 0x0 0x1 &pic 18 0x8 | 311 | 0x8800 0x0 0x0 0x1 &ipic 18 0x8 |
277 | 0x8800 0x0 0x0 0x2 &pic 19 0x8 | 312 | 0x8800 0x0 0x0 0x2 &ipic 19 0x8 |
278 | 0x8800 0x0 0x0 0x3 &pic 20 0x8 | 313 | 0x8800 0x0 0x0 0x3 &ipic 20 0x8 |
279 | 0x8800 0x0 0x0 0x4 &pic 48 0x8 | 314 | 0x8800 0x0 0x0 0x4 &ipic 48 0x8 |
280 | 315 | ||
281 | /* IDSEL 0x12 AD18 (PCI/Mini2) */ | 316 | /* IDSEL 0x12 AD18 (PCI/Mini2) */ |
282 | 0x9000 0x0 0x0 0x1 &pic 19 0x8 | 317 | 0x9000 0x0 0x0 0x1 &ipic 19 0x8 |
283 | 0x9000 0x0 0x0 0x2 &pic 20 0x8 | 318 | 0x9000 0x0 0x0 0x2 &ipic 20 0x8 |
284 | 0x9000 0x0 0x0 0x3 &pic 48 0x8 | 319 | 0x9000 0x0 0x0 0x3 &ipic 48 0x8 |
285 | 0x9000 0x0 0x0 0x4 &pic 17 0x8>; | 320 | 0x9000 0x0 0x0 0x4 &ipic 17 0x8>; |
286 | 321 | ||
287 | interrupt-parent = <&pic>; | 322 | interrupt-parent = <&ipic>; |
288 | interrupts = <66 0x8>; | 323 | interrupts = <66 0x8>; |
289 | bus-range = <0x0 0x0>; | 324 | bus-range = <0x0 0x0>; |
290 | ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 | 325 | ranges = <0x42000000 0x0 0x80000000 0x80000000 0x0 0x10000000 |
diff --git a/arch/powerpc/boot/dts/mpc8349emitx.dts b/arch/powerpc/boot/dts/mpc8349emitx.dts index 9426676b0b7d..fc0f4c918c76 100644 --- a/arch/powerpc/boot/dts/mpc8349emitx.dts +++ b/arch/powerpc/boot/dts/mpc8349emitx.dts | |||
@@ -93,6 +93,41 @@ | |||
93 | mode = "cpu"; | 93 | mode = "cpu"; |
94 | }; | 94 | }; |
95 | 95 | ||
96 | dma@82a8 { | ||
97 | #address-cells = <1>; | ||
98 | #size-cells = <1>; | ||
99 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
100 | reg = <0x82a8 4>; | ||
101 | ranges = <0 0x8100 0x1a8>; | ||
102 | interrupt-parent = <&ipic>; | ||
103 | interrupts = <71 8>; | ||
104 | cell-index = <0>; | ||
105 | dma-channel@0 { | ||
106 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
107 | reg = <0 0x80>; | ||
108 | interrupt-parent = <&ipic>; | ||
109 | interrupts = <71 8>; | ||
110 | }; | ||
111 | dma-channel@80 { | ||
112 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
113 | reg = <0x80 0x80>; | ||
114 | interrupt-parent = <&ipic>; | ||
115 | interrupts = <71 8>; | ||
116 | }; | ||
117 | dma-channel@100 { | ||
118 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
119 | reg = <0x100 0x80>; | ||
120 | interrupt-parent = <&ipic>; | ||
121 | interrupts = <71 8>; | ||
122 | }; | ||
123 | dma-channel@180 { | ||
124 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
125 | reg = <0x180 0x28>; | ||
126 | interrupt-parent = <&ipic>; | ||
127 | interrupts = <71 8>; | ||
128 | }; | ||
129 | }; | ||
130 | |||
96 | usb@22000 { | 131 | usb@22000 { |
97 | compatible = "fsl-usb2-mph"; | 132 | compatible = "fsl-usb2-mph"; |
98 | reg = <0x22000 0x1000>; | 133 | reg = <0x22000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8349emitxgp.dts b/arch/powerpc/boot/dts/mpc8349emitxgp.dts index f81d735e6e72..e6afb1d1e19e 100644 --- a/arch/powerpc/boot/dts/mpc8349emitxgp.dts +++ b/arch/powerpc/boot/dts/mpc8349emitxgp.dts | |||
@@ -91,6 +91,41 @@ | |||
91 | mode = "cpu"; | 91 | mode = "cpu"; |
92 | }; | 92 | }; |
93 | 93 | ||
94 | dma@82a8 { | ||
95 | #address-cells = <1>; | ||
96 | #size-cells = <1>; | ||
97 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
98 | reg = <0x82a8 4>; | ||
99 | ranges = <0 0x8100 0x1a8>; | ||
100 | interrupt-parent = <&ipic>; | ||
101 | interrupts = <71 8>; | ||
102 | cell-index = <0>; | ||
103 | dma-channel@0 { | ||
104 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
105 | reg = <0 0x80>; | ||
106 | interrupt-parent = <&ipic>; | ||
107 | interrupts = <71 8>; | ||
108 | }; | ||
109 | dma-channel@80 { | ||
110 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
111 | reg = <0x80 0x80>; | ||
112 | interrupt-parent = <&ipic>; | ||
113 | interrupts = <71 8>; | ||
114 | }; | ||
115 | dma-channel@100 { | ||
116 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
117 | reg = <0x100 0x80>; | ||
118 | interrupt-parent = <&ipic>; | ||
119 | interrupts = <71 8>; | ||
120 | }; | ||
121 | dma-channel@180 { | ||
122 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
123 | reg = <0x180 0x28>; | ||
124 | interrupt-parent = <&ipic>; | ||
125 | interrupts = <71 8>; | ||
126 | }; | ||
127 | }; | ||
128 | |||
94 | usb@23000 { | 129 | usb@23000 { |
95 | compatible = "fsl-usb2-dr"; | 130 | compatible = "fsl-usb2-dr"; |
96 | reg = <0x23000 0x1000>; | 131 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc834x_mds.dts b/arch/powerpc/boot/dts/mpc834x_mds.dts index 0199c5c548d8..9c75c7c69e21 100644 --- a/arch/powerpc/boot/dts/mpc834x_mds.dts +++ b/arch/powerpc/boot/dts/mpc834x_mds.dts | |||
@@ -103,6 +103,41 @@ | |||
103 | mode = "cpu"; | 103 | mode = "cpu"; |
104 | }; | 104 | }; |
105 | 105 | ||
106 | dma@82a8 { | ||
107 | #address-cells = <1>; | ||
108 | #size-cells = <1>; | ||
109 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
110 | reg = <0x82a8 4>; | ||
111 | ranges = <0 0x8100 0x1a8>; | ||
112 | interrupt-parent = <&ipic>; | ||
113 | interrupts = <71 8>; | ||
114 | cell-index = <0>; | ||
115 | dma-channel@0 { | ||
116 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
117 | reg = <0 0x80>; | ||
118 | interrupt-parent = <&ipic>; | ||
119 | interrupts = <71 8>; | ||
120 | }; | ||
121 | dma-channel@80 { | ||
122 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
123 | reg = <0x80 0x80>; | ||
124 | interrupt-parent = <&ipic>; | ||
125 | interrupts = <71 8>; | ||
126 | }; | ||
127 | dma-channel@100 { | ||
128 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
129 | reg = <0x100 0x80>; | ||
130 | interrupt-parent = <&ipic>; | ||
131 | interrupts = <71 8>; | ||
132 | }; | ||
133 | dma-channel@180 { | ||
134 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
135 | reg = <0x180 0x28>; | ||
136 | interrupt-parent = <&ipic>; | ||
137 | interrupts = <71 8>; | ||
138 | }; | ||
139 | }; | ||
140 | |||
106 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ | 141 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ |
107 | /* port = 0 or 1 */ | 142 | /* port = 0 or 1 */ |
108 | usb@22000 { | 143 | usb@22000 { |
diff --git a/arch/powerpc/boot/dts/mpc836x_mds.dts b/arch/powerpc/boot/dts/mpc836x_mds.dts index 8160ff24e87e..8e33b155f112 100644 --- a/arch/powerpc/boot/dts/mpc836x_mds.dts +++ b/arch/powerpc/boot/dts/mpc836x_mds.dts | |||
@@ -118,6 +118,41 @@ | |||
118 | interrupt-parent = <&ipic>; | 118 | interrupt-parent = <&ipic>; |
119 | }; | 119 | }; |
120 | 120 | ||
121 | dma@82a8 { | ||
122 | #address-cells = <1>; | ||
123 | #size-cells = <1>; | ||
124 | compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; | ||
125 | reg = <0x82a8 4>; | ||
126 | ranges = <0 0x8100 0x1a8>; | ||
127 | interrupt-parent = <&ipic>; | ||
128 | interrupts = <71 8>; | ||
129 | cell-index = <0>; | ||
130 | dma-channel@0 { | ||
131 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
132 | reg = <0 0x80>; | ||
133 | interrupt-parent = <&ipic>; | ||
134 | interrupts = <71 8>; | ||
135 | }; | ||
136 | dma-channel@80 { | ||
137 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
138 | reg = <0x80 0x80>; | ||
139 | interrupt-parent = <&ipic>; | ||
140 | interrupts = <71 8>; | ||
141 | }; | ||
142 | dma-channel@100 { | ||
143 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
144 | reg = <0x100 0x80>; | ||
145 | interrupt-parent = <&ipic>; | ||
146 | interrupts = <71 8>; | ||
147 | }; | ||
148 | dma-channel@180 { | ||
149 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
150 | reg = <0x180 0x28>; | ||
151 | interrupt-parent = <&ipic>; | ||
152 | interrupts = <71 8>; | ||
153 | }; | ||
154 | }; | ||
155 | |||
121 | crypto@30000 { | 156 | crypto@30000 { |
122 | device_type = "crypto"; | 157 | device_type = "crypto"; |
123 | model = "SEC2"; | 158 | model = "SEC2"; |
diff --git a/arch/powerpc/boot/dts/mpc836x_rdk.dts b/arch/powerpc/boot/dts/mpc836x_rdk.dts new file mode 100644 index 000000000000..8acd1d6577f2 --- /dev/null +++ b/arch/powerpc/boot/dts/mpc836x_rdk.dts | |||
@@ -0,0 +1,432 @@ | |||
1 | /* | ||
2 | * MPC8360E RDK Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * Copyright 2007-2008 MontaVista Software, Inc. | ||
6 | * | ||
7 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | |||
15 | /dts-v1/; | ||
16 | |||
17 | / { | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | compatible = "fsl,mpc8360rdk"; | ||
21 | |||
22 | aliases { | ||
23 | serial0 = &serial0; | ||
24 | serial1 = &serial1; | ||
25 | serial2 = &serial2; | ||
26 | serial3 = &serial3; | ||
27 | ethernet0 = &enet0; | ||
28 | ethernet1 = &enet1; | ||
29 | ethernet2 = &enet2; | ||
30 | ethernet3 = &enet3; | ||
31 | pci0 = &pci0; | ||
32 | }; | ||
33 | |||
34 | cpus { | ||
35 | #address-cells = <1>; | ||
36 | #size-cells = <0>; | ||
37 | |||
38 | PowerPC,8360@0 { | ||
39 | device_type = "cpu"; | ||
40 | reg = <0>; | ||
41 | d-cache-line-size = <32>; | ||
42 | i-cache-line-size = <32>; | ||
43 | d-cache-size = <32768>; | ||
44 | i-cache-size = <32768>; | ||
45 | /* filled by u-boot */ | ||
46 | timebase-frequency = <0>; | ||
47 | bus-frequency = <0>; | ||
48 | clock-frequency = <0>; | ||
49 | }; | ||
50 | }; | ||
51 | |||
52 | memory { | ||
53 | device_type = "memory"; | ||
54 | /* filled by u-boot */ | ||
55 | reg = <0 0>; | ||
56 | }; | ||
57 | |||
58 | soc@e0000000 { | ||
59 | #address-cells = <1>; | ||
60 | #size-cells = <1>; | ||
61 | device_type = "soc"; | ||
62 | compatible = "fsl,mpc8360-immr", "fsl,immr", "fsl,soc", | ||
63 | "simple-bus"; | ||
64 | ranges = <0 0xe0000000 0x200000>; | ||
65 | reg = <0xe0000000 0x200>; | ||
66 | /* filled by u-boot */ | ||
67 | bus-frequency = <0>; | ||
68 | |||
69 | wdt@200 { | ||
70 | compatible = "mpc83xx_wdt"; | ||
71 | reg = <0x200 0x100>; | ||
72 | }; | ||
73 | |||
74 | i2c@3000 { | ||
75 | #address-cells = <1>; | ||
76 | #size-cells = <0>; | ||
77 | cell-index = <0>; | ||
78 | compatible = "fsl-i2c"; | ||
79 | reg = <0x3000 0x100>; | ||
80 | interrupts = <14 8>; | ||
81 | interrupt-parent = <&ipic>; | ||
82 | dfsrr; | ||
83 | }; | ||
84 | |||
85 | i2c@3100 { | ||
86 | #address-cells = <1>; | ||
87 | #size-cells = <0>; | ||
88 | cell-index = <1>; | ||
89 | compatible = "fsl-i2c"; | ||
90 | reg = <0x3100 0x100>; | ||
91 | interrupts = <16 8>; | ||
92 | interrupt-parent = <&ipic>; | ||
93 | dfsrr; | ||
94 | }; | ||
95 | |||
96 | serial0: serial@4500 { | ||
97 | device_type = "serial"; | ||
98 | compatible = "ns16550"; | ||
99 | reg = <0x4500 0x100>; | ||
100 | interrupts = <9 8>; | ||
101 | interrupt-parent = <&ipic>; | ||
102 | /* filled by u-boot */ | ||
103 | clock-frequency = <0>; | ||
104 | }; | ||
105 | |||
106 | serial1: serial@4600 { | ||
107 | device_type = "serial"; | ||
108 | compatible = "ns16550"; | ||
109 | reg = <0x4600 0x100>; | ||
110 | interrupts = <10 8>; | ||
111 | interrupt-parent = <&ipic>; | ||
112 | /* filled by u-boot */ | ||
113 | clock-frequency = <0>; | ||
114 | }; | ||
115 | |||
116 | dma@82a8 { | ||
117 | #address-cells = <1>; | ||
118 | #size-cells = <1>; | ||
119 | compatible = "fsl,mpc8360-dma", "fsl,elo-dma"; | ||
120 | reg = <0x82a8 4>; | ||
121 | ranges = <0 0x8100 0x1a8>; | ||
122 | interrupt-parent = <&ipic>; | ||
123 | interrupts = <71 8>; | ||
124 | cell-index = <0>; | ||
125 | dma-channel@0 { | ||
126 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
127 | reg = <0 0x80>; | ||
128 | interrupt-parent = <&ipic>; | ||
129 | interrupts = <71 8>; | ||
130 | }; | ||
131 | dma-channel@80 { | ||
132 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
133 | reg = <0x80 0x80>; | ||
134 | interrupt-parent = <&ipic>; | ||
135 | interrupts = <71 8>; | ||
136 | }; | ||
137 | dma-channel@100 { | ||
138 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
139 | reg = <0x100 0x80>; | ||
140 | interrupt-parent = <&ipic>; | ||
141 | interrupts = <71 8>; | ||
142 | }; | ||
143 | dma-channel@180 { | ||
144 | compatible = "fsl,mpc8360-dma-channel", "fsl,elo-dma-channel"; | ||
145 | reg = <0x180 0x28>; | ||
146 | interrupt-parent = <&ipic>; | ||
147 | interrupts = <71 8>; | ||
148 | }; | ||
149 | }; | ||
150 | |||
151 | crypto@30000 { | ||
152 | compatible = "fsl,sec2-crypto"; | ||
153 | reg = <0x30000 0x10000>; | ||
154 | interrupts = <11 8>; | ||
155 | interrupt-parent = <&ipic>; | ||
156 | num-channels = <4>; | ||
157 | channel-fifo-len = <24>; | ||
158 | exec-units-mask = <0x7e>; | ||
159 | /* | ||
160 | * desc mask is for rev1.x, we need runtime fixup | ||
161 | * for >=2.x | ||
162 | */ | ||
163 | descriptor-types-mask = <0x1010ebf>; | ||
164 | }; | ||
165 | |||
166 | ipic: interrupt-controller@700 { | ||
167 | #address-cells = <0>; | ||
168 | #interrupt-cells = <2>; | ||
169 | compatible = "fsl,pq2pro-pic", "fsl,ipic"; | ||
170 | interrupt-controller; | ||
171 | reg = <0x700 0x100>; | ||
172 | }; | ||
173 | |||
174 | qe_pio_b: gpio-controller@1418 { | ||
175 | #gpio-cells = <2>; | ||
176 | compatible = "fsl,mpc8360-qe-pario-bank", | ||
177 | "fsl,mpc8323-qe-pario-bank"; | ||
178 | reg = <0x1418 0x18>; | ||
179 | gpio-controller; | ||
180 | }; | ||
181 | |||
182 | qe_pio_e: gpio-controller@1460 { | ||
183 | #gpio-cells = <2>; | ||
184 | compatible = "fsl,mpc8360-qe-pario-bank", | ||
185 | "fsl,mpc8323-qe-pario-bank"; | ||
186 | reg = <0x1460 0x18>; | ||
187 | gpio-controller; | ||
188 | }; | ||
189 | |||
190 | qe@100000 { | ||
191 | #address-cells = <1>; | ||
192 | #size-cells = <1>; | ||
193 | device_type = "qe"; | ||
194 | compatible = "fsl,qe", "simple-bus"; | ||
195 | ranges = <0 0x100000 0x100000>; | ||
196 | reg = <0x100000 0x480>; | ||
197 | /* filled by u-boot */ | ||
198 | clock-frequency = <0>; | ||
199 | bus-frequency = <0>; | ||
200 | brg-frequency = <0>; | ||
201 | |||
202 | muram@10000 { | ||
203 | #address-cells = <1>; | ||
204 | #size-cells = <1>; | ||
205 | compatible = "fsl,qe-muram", "fsl,cpm-muram"; | ||
206 | ranges = <0 0x10000 0xc000>; | ||
207 | |||
208 | data-only@0 { | ||
209 | compatible = "fsl,qe-muram-data", | ||
210 | "fsl,cpm-muram-data"; | ||
211 | reg = <0 0xc000>; | ||
212 | }; | ||
213 | }; | ||
214 | |||
215 | timer@440 { | ||
216 | compatible = "fsl,mpc8360-qe-gtm", | ||
217 | "fsl,qe-gtm", "fsl,gtm"; | ||
218 | reg = <0x440 0x40>; | ||
219 | interrupts = <12 13 14 15>; | ||
220 | interrupt-parent = <&qeic>; | ||
221 | /* filled by u-boot */ | ||
222 | clock-frequency = <0>; | ||
223 | }; | ||
224 | |||
225 | spi@4c0 { | ||
226 | cell-index = <0>; | ||
227 | compatible = "fsl,spi"; | ||
228 | reg = <0x4c0 0x40>; | ||
229 | interrupts = <2>; | ||
230 | interrupt-parent = <&qeic>; | ||
231 | mode = "cpu-qe"; | ||
232 | }; | ||
233 | |||
234 | spi@500 { | ||
235 | cell-index = <1>; | ||
236 | compatible = "fsl,spi"; | ||
237 | reg = <0x500 0x40>; | ||
238 | interrupts = <1>; | ||
239 | interrupt-parent = <&qeic>; | ||
240 | mode = "cpu-qe"; | ||
241 | }; | ||
242 | |||
243 | enet0: ucc@2000 { | ||
244 | device_type = "network"; | ||
245 | compatible = "ucc_geth"; | ||
246 | cell-index = <1>; | ||
247 | reg = <0x2000 0x200>; | ||
248 | interrupts = <32>; | ||
249 | interrupt-parent = <&qeic>; | ||
250 | rx-clock-name = "none"; | ||
251 | tx-clock-name = "clk9"; | ||
252 | phy-handle = <&phy2>; | ||
253 | phy-connection-type = "rgmii-rxid"; | ||
254 | /* filled by u-boot */ | ||
255 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
256 | }; | ||
257 | |||
258 | enet1: ucc@3000 { | ||
259 | device_type = "network"; | ||
260 | compatible = "ucc_geth"; | ||
261 | cell-index = <2>; | ||
262 | reg = <0x3000 0x200>; | ||
263 | interrupts = <33>; | ||
264 | interrupt-parent = <&qeic>; | ||
265 | rx-clock-name = "none"; | ||
266 | tx-clock-name = "clk4"; | ||
267 | phy-handle = <&phy4>; | ||
268 | phy-connection-type = "rgmii-rxid"; | ||
269 | /* filled by u-boot */ | ||
270 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
271 | }; | ||
272 | |||
273 | enet2: ucc@2600 { | ||
274 | device_type = "network"; | ||
275 | compatible = "ucc_geth"; | ||
276 | cell-index = <7>; | ||
277 | reg = <0x2600 0x200>; | ||
278 | interrupts = <42>; | ||
279 | interrupt-parent = <&qeic>; | ||
280 | rx-clock-name = "clk20"; | ||
281 | tx-clock-name = "clk19"; | ||
282 | phy-handle = <&phy1>; | ||
283 | phy-connection-type = "mii"; | ||
284 | /* filled by u-boot */ | ||
285 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
286 | }; | ||
287 | |||
288 | enet3: ucc@3200 { | ||
289 | device_type = "network"; | ||
290 | compatible = "ucc_geth"; | ||
291 | cell-index = <4>; | ||
292 | reg = <0x3200 0x200>; | ||
293 | interrupts = <35>; | ||
294 | interrupt-parent = <&qeic>; | ||
295 | rx-clock-name = "clk8"; | ||
296 | tx-clock-name = "clk7"; | ||
297 | phy-handle = <&phy3>; | ||
298 | phy-connection-type = "mii"; | ||
299 | /* filled by u-boot */ | ||
300 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
301 | }; | ||
302 | |||
303 | mdio@2120 { | ||
304 | #address-cells = <1>; | ||
305 | #size-cells = <0>; | ||
306 | compatible = "fsl,ucc-mdio"; | ||
307 | reg = <0x2120 0x18>; | ||
308 | |||
309 | phy1: ethernet-phy@1 { | ||
310 | device_type = "ethernet-phy"; | ||
311 | compatible = "national,DP83848VV"; | ||
312 | reg = <1>; | ||
313 | }; | ||
314 | |||
315 | phy2: ethernet-phy@2 { | ||
316 | device_type = "ethernet-phy"; | ||
317 | compatible = "broadcom,BCM5481UA2KMLG"; | ||
318 | reg = <2>; | ||
319 | }; | ||
320 | |||
321 | phy3: ethernet-phy@3 { | ||
322 | device_type = "ethernet-phy"; | ||
323 | compatible = "national,DP83848VV"; | ||
324 | reg = <3>; | ||
325 | }; | ||
326 | |||
327 | phy4: ethernet-phy@4 { | ||
328 | device_type = "ethernet-phy"; | ||
329 | compatible = "broadcom,BCM5481UA2KMLG"; | ||
330 | reg = <4>; | ||
331 | }; | ||
332 | }; | ||
333 | |||
334 | serial2: ucc@2400 { | ||
335 | device_type = "serial"; | ||
336 | compatible = "ucc_uart"; | ||
337 | reg = <0x2400 0x200>; | ||
338 | cell-index = <5>; | ||
339 | port-number = <0>; | ||
340 | rx-clock-name = "brg7"; | ||
341 | tx-clock-name = "brg8"; | ||
342 | interrupts = <40>; | ||
343 | interrupt-parent = <&qeic>; | ||
344 | soft-uart; | ||
345 | }; | ||
346 | |||
347 | serial3: ucc@3400 { | ||
348 | device_type = "serial"; | ||
349 | compatible = "ucc_uart"; | ||
350 | reg = <0x3400 0x200>; | ||
351 | cell-index = <6>; | ||
352 | port-number = <1>; | ||
353 | rx-clock-name = "brg13"; | ||
354 | tx-clock-name = "brg14"; | ||
355 | interrupts = <41>; | ||
356 | interrupt-parent = <&qeic>; | ||
357 | soft-uart; | ||
358 | }; | ||
359 | |||
360 | qeic: interrupt-controller@80 { | ||
361 | #address-cells = <0>; | ||
362 | #interrupt-cells = <1>; | ||
363 | compatible = "fsl,qe-ic"; | ||
364 | interrupt-controller; | ||
365 | reg = <0x80 0x80>; | ||
366 | big-endian; | ||
367 | interrupts = <32 8 33 8>; | ||
368 | interrupt-parent = <&ipic>; | ||
369 | }; | ||
370 | }; | ||
371 | }; | ||
372 | |||
373 | localbus@e0005000 { | ||
374 | #address-cells = <2>; | ||
375 | #size-cells = <1>; | ||
376 | compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus", | ||
377 | "simple-bus"; | ||
378 | reg = <0xe0005000 0xd8>; | ||
379 | ranges = <0 0 0xff800000 0x0800000 | ||
380 | 1 0 0x60000000 0x0001000 | ||
381 | 2 0 0x70000000 0x4000000>; | ||
382 | |||
383 | flash@0,0 { | ||
384 | compatible = "intel,PC28F640P30T85", "cfi-flash"; | ||
385 | reg = <0 0 0x800000>; | ||
386 | bank-width = <2>; | ||
387 | device-width = <1>; | ||
388 | }; | ||
389 | |||
390 | display@2,0 { | ||
391 | device_type = "display"; | ||
392 | compatible = "fujitsu,MB86277", "fujitsu,mint"; | ||
393 | reg = <2 0 0x4000000>; | ||
394 | fujitsu,sh3; | ||
395 | little-endian; | ||
396 | /* filled by u-boot */ | ||
397 | address = <0>; | ||
398 | depth = <0>; | ||
399 | width = <0>; | ||
400 | height = <0>; | ||
401 | linebytes = <0>; | ||
402 | /* linux,opened; - added by uboot */ | ||
403 | }; | ||
404 | }; | ||
405 | |||
406 | pci0: pci@e0008500 { | ||
407 | #address-cells = <3>; | ||
408 | #size-cells = <2>; | ||
409 | #interrupt-cells = <1>; | ||
410 | device_type = "pci"; | ||
411 | compatible = "fsl,mpc8360-pci", "fsl,mpc8349-pci"; | ||
412 | reg = <0xe0008500 0x100>; | ||
413 | ranges = <0x02000000 0 0x90000000 0x90000000 0 0x10000000 | ||
414 | 0x42000000 0 0x80000000 0x80000000 0 0x10000000 | ||
415 | 0x01000000 0 0xe0300000 0xe0300000 0 0x00100000>; | ||
416 | interrupts = <66 8>; | ||
417 | interrupt-parent = <&ipic>; | ||
418 | interrupt-map-mask = <0xf800 0 0 7>; | ||
419 | interrupt-map = </* miniPCI0 IDSEL 0x14 AD20 */ | ||
420 | 0xa000 0 0 1 &ipic 18 8 | ||
421 | 0xa000 0 0 2 &ipic 19 8 | ||
422 | |||
423 | /* PCI1 IDSEL 0x15 AD21 */ | ||
424 | 0xa800 0 0 1 &ipic 19 8 | ||
425 | 0xa800 0 0 2 &ipic 20 8 | ||
426 | 0xa800 0 0 3 &ipic 21 8 | ||
427 | 0xa800 0 0 4 &ipic 18 8>; | ||
428 | /* filled by u-boot */ | ||
429 | bus-range = <0 0>; | ||
430 | clock-frequency = <0>; | ||
431 | }; | ||
432 | }; | ||
diff --git a/arch/powerpc/boot/dts/mpc8377_mds.dts b/arch/powerpc/boot/dts/mpc8377_mds.dts index fea592574004..49a38cb95b52 100644 --- a/arch/powerpc/boot/dts/mpc8377_mds.dts +++ b/arch/powerpc/boot/dts/mpc8377_mds.dts | |||
@@ -233,41 +233,6 @@ | |||
233 | interrupt-parent = <&ipic>; | 233 | interrupt-parent = <&ipic>; |
234 | }; | 234 | }; |
235 | 235 | ||
236 | crypto@30000 { | ||
237 | model = "SEC3"; | ||
238 | compatible = "talitos"; | ||
239 | reg = <0x30000 0x10000>; | ||
240 | interrupts = <11 0x8>; | ||
241 | interrupt-parent = <&ipic>; | ||
242 | /* Rev. 3.0 geometry */ | ||
243 | num-channels = <4>; | ||
244 | channel-fifo-len = <24>; | ||
245 | exec-units-mask = <0x000001fe>; | ||
246 | descriptor-types-mask = <0x03ab0ebf>; | ||
247 | }; | ||
248 | |||
249 | sdhc@2e000 { | ||
250 | model = "eSDHC"; | ||
251 | compatible = "fsl,esdhc"; | ||
252 | reg = <0x2e000 0x1000>; | ||
253 | interrupts = <42 0x8>; | ||
254 | interrupt-parent = <&ipic>; | ||
255 | }; | ||
256 | |||
257 | sata@18000 { | ||
258 | compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; | ||
259 | reg = <0x18000 0x1000>; | ||
260 | interrupts = <44 0x8>; | ||
261 | interrupt-parent = <&ipic>; | ||
262 | }; | ||
263 | |||
264 | sata@19000 { | ||
265 | compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; | ||
266 | reg = <0x19000 0x1000>; | ||
267 | interrupts = <45 0x8>; | ||
268 | interrupt-parent = <&ipic>; | ||
269 | }; | ||
270 | |||
271 | dma@82a8 { | 236 | dma@82a8 { |
272 | #address-cells = <1>; | 237 | #address-cells = <1>; |
273 | #size-cells = <1>; | 238 | #size-cells = <1>; |
@@ -303,6 +268,41 @@ | |||
303 | }; | 268 | }; |
304 | }; | 269 | }; |
305 | 270 | ||
271 | crypto@30000 { | ||
272 | model = "SEC3"; | ||
273 | compatible = "talitos"; | ||
274 | reg = <0x30000 0x10000>; | ||
275 | interrupts = <11 0x8>; | ||
276 | interrupt-parent = <&ipic>; | ||
277 | /* Rev. 3.0 geometry */ | ||
278 | num-channels = <4>; | ||
279 | channel-fifo-len = <24>; | ||
280 | exec-units-mask = <0x000001fe>; | ||
281 | descriptor-types-mask = <0x03ab0ebf>; | ||
282 | }; | ||
283 | |||
284 | sdhc@2e000 { | ||
285 | model = "eSDHC"; | ||
286 | compatible = "fsl,esdhc"; | ||
287 | reg = <0x2e000 0x1000>; | ||
288 | interrupts = <42 0x8>; | ||
289 | interrupt-parent = <&ipic>; | ||
290 | }; | ||
291 | |||
292 | sata@18000 { | ||
293 | compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; | ||
294 | reg = <0x18000 0x1000>; | ||
295 | interrupts = <44 0x8>; | ||
296 | interrupt-parent = <&ipic>; | ||
297 | }; | ||
298 | |||
299 | sata@19000 { | ||
300 | compatible = "fsl,mpc8379-sata", "fsl,pq-sata"; | ||
301 | reg = <0x19000 0x1000>; | ||
302 | interrupts = <45 0x8>; | ||
303 | interrupt-parent = <&ipic>; | ||
304 | }; | ||
305 | |||
306 | /* IPIC | 306 | /* IPIC |
307 | * interrupts cell = <intr #, sense> | 307 | * interrupts cell = <intr #, sense> |
308 | * sense values match linux IORESOURCE_IRQ_* defines: | 308 | * sense values match linux IORESOURCE_IRQ_* defines: |
diff --git a/arch/powerpc/boot/dts/mpc8377_rdb.dts b/arch/powerpc/boot/dts/mpc8377_rdb.dts index f3083c779b66..1f4538790302 100644 --- a/arch/powerpc/boot/dts/mpc8377_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8377_rdb.dts | |||
@@ -143,6 +143,41 @@ | |||
143 | mode = "cpu"; | 143 | mode = "cpu"; |
144 | }; | 144 | }; |
145 | 145 | ||
146 | dma@82a8 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <1>; | ||
149 | compatible = "fsl,mpc8377-dma", "fsl,elo-dma"; | ||
150 | reg = <0x82a8 4>; | ||
151 | ranges = <0 0x8100 0x1a8>; | ||
152 | interrupt-parent = <&ipic>; | ||
153 | interrupts = <71 8>; | ||
154 | cell-index = <0>; | ||
155 | dma-channel@0 { | ||
156 | compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; | ||
157 | reg = <0 0x80>; | ||
158 | interrupt-parent = <&ipic>; | ||
159 | interrupts = <71 8>; | ||
160 | }; | ||
161 | dma-channel@80 { | ||
162 | compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; | ||
163 | reg = <0x80 0x80>; | ||
164 | interrupt-parent = <&ipic>; | ||
165 | interrupts = <71 8>; | ||
166 | }; | ||
167 | dma-channel@100 { | ||
168 | compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; | ||
169 | reg = <0x100 0x80>; | ||
170 | interrupt-parent = <&ipic>; | ||
171 | interrupts = <71 8>; | ||
172 | }; | ||
173 | dma-channel@180 { | ||
174 | compatible = "fsl,mpc8377-dma-channel", "fsl,elo-dma-channel"; | ||
175 | reg = <0x180 0x28>; | ||
176 | interrupt-parent = <&ipic>; | ||
177 | interrupts = <71 8>; | ||
178 | }; | ||
179 | }; | ||
180 | |||
146 | usb@23000 { | 181 | usb@23000 { |
147 | compatible = "fsl-usb2-dr"; | 182 | compatible = "fsl-usb2-dr"; |
148 | reg = <0x23000 0x1000>; | 183 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8378_mds.dts b/arch/powerpc/boot/dts/mpc8378_mds.dts index 1d6ea080ad73..99ad49d4f13f 100644 --- a/arch/powerpc/boot/dts/mpc8378_mds.dts +++ b/arch/powerpc/boot/dts/mpc8378_mds.dts | |||
@@ -157,6 +157,41 @@ | |||
157 | mode = "cpu"; | 157 | mode = "cpu"; |
158 | }; | 158 | }; |
159 | 159 | ||
160 | dma@82a8 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; | ||
164 | reg = <0x82a8 4>; | ||
165 | ranges = <0 0x8100 0x1a8>; | ||
166 | interrupt-parent = <&ipic>; | ||
167 | interrupts = <71 8>; | ||
168 | cell-index = <0>; | ||
169 | dma-channel@0 { | ||
170 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
171 | reg = <0 0x80>; | ||
172 | interrupt-parent = <&ipic>; | ||
173 | interrupts = <71 8>; | ||
174 | }; | ||
175 | dma-channel@80 { | ||
176 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
177 | reg = <0x80 0x80>; | ||
178 | interrupt-parent = <&ipic>; | ||
179 | interrupts = <71 8>; | ||
180 | }; | ||
181 | dma-channel@100 { | ||
182 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
183 | reg = <0x100 0x80>; | ||
184 | interrupt-parent = <&ipic>; | ||
185 | interrupts = <71 8>; | ||
186 | }; | ||
187 | dma-channel@180 { | ||
188 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
189 | reg = <0x180 0x28>; | ||
190 | interrupt-parent = <&ipic>; | ||
191 | interrupts = <71 8>; | ||
192 | }; | ||
193 | }; | ||
194 | |||
160 | usb@23000 { | 195 | usb@23000 { |
161 | compatible = "fsl-usb2-dr"; | 196 | compatible = "fsl-usb2-dr"; |
162 | reg = <0x23000 0x1000>; | 197 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8378_rdb.dts b/arch/powerpc/boot/dts/mpc8378_rdb.dts index 0e872a60e091..44e34d3f21cf 100644 --- a/arch/powerpc/boot/dts/mpc8378_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8378_rdb.dts | |||
@@ -143,6 +143,41 @@ | |||
143 | mode = "cpu"; | 143 | mode = "cpu"; |
144 | }; | 144 | }; |
145 | 145 | ||
146 | dma@82a8 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <1>; | ||
149 | compatible = "fsl,mpc8378-dma", "fsl,elo-dma"; | ||
150 | reg = <0x82a8 4>; | ||
151 | ranges = <0 0x8100 0x1a8>; | ||
152 | interrupt-parent = <&ipic>; | ||
153 | interrupts = <71 8>; | ||
154 | cell-index = <0>; | ||
155 | dma-channel@0 { | ||
156 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
157 | reg = <0 0x80>; | ||
158 | interrupt-parent = <&ipic>; | ||
159 | interrupts = <71 8>; | ||
160 | }; | ||
161 | dma-channel@80 { | ||
162 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
163 | reg = <0x80 0x80>; | ||
164 | interrupt-parent = <&ipic>; | ||
165 | interrupts = <71 8>; | ||
166 | }; | ||
167 | dma-channel@100 { | ||
168 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
169 | reg = <0x100 0x80>; | ||
170 | interrupt-parent = <&ipic>; | ||
171 | interrupts = <71 8>; | ||
172 | }; | ||
173 | dma-channel@180 { | ||
174 | compatible = "fsl,mpc8378-dma-channel", "fsl,elo-dma-channel"; | ||
175 | reg = <0x180 0x28>; | ||
176 | interrupt-parent = <&ipic>; | ||
177 | interrupts = <71 8>; | ||
178 | }; | ||
179 | }; | ||
180 | |||
146 | usb@23000 { | 181 | usb@23000 { |
147 | compatible = "fsl-usb2-dr"; | 182 | compatible = "fsl-usb2-dr"; |
148 | reg = <0x23000 0x1000>; | 183 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8379_mds.dts b/arch/powerpc/boot/dts/mpc8379_mds.dts index 6f78a9fd9826..980be8136276 100644 --- a/arch/powerpc/boot/dts/mpc8379_mds.dts +++ b/arch/powerpc/boot/dts/mpc8379_mds.dts | |||
@@ -157,6 +157,41 @@ | |||
157 | mode = "cpu"; | 157 | mode = "cpu"; |
158 | }; | 158 | }; |
159 | 159 | ||
160 | dma@82a8 { | ||
161 | #address-cells = <1>; | ||
162 | #size-cells = <1>; | ||
163 | compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; | ||
164 | reg = <0x82a8 4>; | ||
165 | ranges = <0 0x8100 0x1a8>; | ||
166 | interrupt-parent = <&ipic>; | ||
167 | interrupts = <71 8>; | ||
168 | cell-index = <0>; | ||
169 | dma-channel@0 { | ||
170 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
171 | reg = <0 0x80>; | ||
172 | interrupt-parent = <&ipic>; | ||
173 | interrupts = <71 8>; | ||
174 | }; | ||
175 | dma-channel@80 { | ||
176 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
177 | reg = <0x80 0x80>; | ||
178 | interrupt-parent = <&ipic>; | ||
179 | interrupts = <71 8>; | ||
180 | }; | ||
181 | dma-channel@100 { | ||
182 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
183 | reg = <0x100 0x80>; | ||
184 | interrupt-parent = <&ipic>; | ||
185 | interrupts = <71 8>; | ||
186 | }; | ||
187 | dma-channel@180 { | ||
188 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
189 | reg = <0x180 0x28>; | ||
190 | interrupt-parent = <&ipic>; | ||
191 | interrupts = <71 8>; | ||
192 | }; | ||
193 | }; | ||
194 | |||
160 | usb@23000 { | 195 | usb@23000 { |
161 | compatible = "fsl-usb2-dr"; | 196 | compatible = "fsl-usb2-dr"; |
162 | reg = <0x23000 0x1000>; | 197 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8379_rdb.dts b/arch/powerpc/boot/dts/mpc8379_rdb.dts index 1eb8defaff6f..eeedf5884881 100644 --- a/arch/powerpc/boot/dts/mpc8379_rdb.dts +++ b/arch/powerpc/boot/dts/mpc8379_rdb.dts | |||
@@ -143,6 +143,41 @@ | |||
143 | mode = "cpu"; | 143 | mode = "cpu"; |
144 | }; | 144 | }; |
145 | 145 | ||
146 | dma@82a8 { | ||
147 | #address-cells = <1>; | ||
148 | #size-cells = <1>; | ||
149 | compatible = "fsl,mpc8379-dma", "fsl,elo-dma"; | ||
150 | reg = <0x82a8 4>; | ||
151 | ranges = <0 0x8100 0x1a8>; | ||
152 | interrupt-parent = <&ipic>; | ||
153 | interrupts = <71 8>; | ||
154 | cell-index = <0>; | ||
155 | dma-channel@0 { | ||
156 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
157 | reg = <0 0x80>; | ||
158 | interrupt-parent = <&ipic>; | ||
159 | interrupts = <71 8>; | ||
160 | }; | ||
161 | dma-channel@80 { | ||
162 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
163 | reg = <0x80 0x80>; | ||
164 | interrupt-parent = <&ipic>; | ||
165 | interrupts = <71 8>; | ||
166 | }; | ||
167 | dma-channel@100 { | ||
168 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
169 | reg = <0x100 0x80>; | ||
170 | interrupt-parent = <&ipic>; | ||
171 | interrupts = <71 8>; | ||
172 | }; | ||
173 | dma-channel@180 { | ||
174 | compatible = "fsl,mpc8379-dma-channel", "fsl,elo-dma-channel"; | ||
175 | reg = <0x180 0x28>; | ||
176 | interrupt-parent = <&ipic>; | ||
177 | interrupts = <71 8>; | ||
178 | }; | ||
179 | }; | ||
180 | |||
146 | usb@23000 { | 181 | usb@23000 { |
147 | compatible = "fsl-usb2-dr"; | 182 | compatible = "fsl-usb2-dr"; |
148 | reg = <0x23000 0x1000>; | 183 | reg = <0x23000 0x1000>; |
diff --git a/arch/powerpc/boot/dts/mpc8540ads.dts b/arch/powerpc/boot/dts/mpc8540ads.dts index 18033ed0b535..f2273a872b11 100644 --- a/arch/powerpc/boot/dts/mpc8540ads.dts +++ b/arch/powerpc/boot/dts/mpc8540ads.dts | |||
@@ -40,6 +40,7 @@ | |||
40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
43 | next-level-cache = <&L2>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -63,7 +64,7 @@ | |||
63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
64 | }; | 65 | }; |
65 | 66 | ||
66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
@@ -83,6 +84,47 @@ | |||
83 | dfsrr; | 84 | dfsrr; |
84 | }; | 85 | }; |
85 | 86 | ||
87 | dma@21300 { | ||
88 | #address-cells = <1>; | ||
89 | #size-cells = <1>; | ||
90 | compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; | ||
91 | reg = <0x21300 0x4>; | ||
92 | ranges = <0x0 0x21100 0x200>; | ||
93 | cell-index = <0>; | ||
94 | dma-channel@0 { | ||
95 | compatible = "fsl,mpc8540-dma-channel", | ||
96 | "fsl,eloplus-dma-channel"; | ||
97 | reg = <0x0 0x80>; | ||
98 | cell-index = <0>; | ||
99 | interrupt-parent = <&mpic>; | ||
100 | interrupts = <20 2>; | ||
101 | }; | ||
102 | dma-channel@80 { | ||
103 | compatible = "fsl,mpc8540-dma-channel", | ||
104 | "fsl,eloplus-dma-channel"; | ||
105 | reg = <0x80 0x80>; | ||
106 | cell-index = <1>; | ||
107 | interrupt-parent = <&mpic>; | ||
108 | interrupts = <21 2>; | ||
109 | }; | ||
110 | dma-channel@100 { | ||
111 | compatible = "fsl,mpc8540-dma-channel", | ||
112 | "fsl,eloplus-dma-channel"; | ||
113 | reg = <0x100 0x80>; | ||
114 | cell-index = <2>; | ||
115 | interrupt-parent = <&mpic>; | ||
116 | interrupts = <22 2>; | ||
117 | }; | ||
118 | dma-channel@180 { | ||
119 | compatible = "fsl,mpc8540-dma-channel", | ||
120 | "fsl,eloplus-dma-channel"; | ||
121 | reg = <0x180 0x80>; | ||
122 | cell-index = <3>; | ||
123 | interrupt-parent = <&mpic>; | ||
124 | interrupts = <23 2>; | ||
125 | }; | ||
126 | }; | ||
127 | |||
86 | mdio@24520 { | 128 | mdio@24520 { |
87 | #address-cells = <1>; | 129 | #address-cells = <1>; |
88 | #size-cells = <0>; | 130 | #size-cells = <0>; |
@@ -165,14 +207,12 @@ | |||
165 | interrupt-parent = <&mpic>; | 207 | interrupt-parent = <&mpic>; |
166 | }; | 208 | }; |
167 | mpic: pic@40000 { | 209 | mpic: pic@40000 { |
168 | clock-frequency = <0>; | ||
169 | interrupt-controller; | 210 | interrupt-controller; |
170 | #address-cells = <0>; | 211 | #address-cells = <0>; |
171 | #interrupt-cells = <2>; | 212 | #interrupt-cells = <2>; |
172 | reg = <0x40000 0x40000>; | 213 | reg = <0x40000 0x40000>; |
173 | compatible = "chrp,open-pic"; | 214 | compatible = "chrp,open-pic"; |
174 | device_type = "open-pic"; | 215 | device_type = "open-pic"; |
175 | big-endian; | ||
176 | }; | 216 | }; |
177 | }; | 217 | }; |
178 | 218 | ||
diff --git a/arch/powerpc/boot/dts/mpc8541cds.dts b/arch/powerpc/boot/dts/mpc8541cds.dts index 663c7c50ca45..21ad71b825c1 100644 --- a/arch/powerpc/boot/dts/mpc8541cds.dts +++ b/arch/powerpc/boot/dts/mpc8541cds.dts | |||
@@ -40,6 +40,7 @@ | |||
40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
43 | next-level-cache = <&L2>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -63,7 +64,7 @@ | |||
63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
64 | }; | 65 | }; |
65 | 66 | ||
66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
67 | compatible = "fsl,8541-l2-cache-controller"; | 68 | compatible = "fsl,8541-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
@@ -83,6 +84,47 @@ | |||
83 | dfsrr; | 84 | dfsrr; |
84 | }; | 85 | }; |
85 | 86 | ||
87 | dma@21300 { | ||
88 | #address-cells = <1>; | ||
89 | #size-cells = <1>; | ||
90 | compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; | ||
91 | reg = <0x21300 0x4>; | ||
92 | ranges = <0x0 0x21100 0x200>; | ||
93 | cell-index = <0>; | ||
94 | dma-channel@0 { | ||
95 | compatible = "fsl,mpc8541-dma-channel", | ||
96 | "fsl,eloplus-dma-channel"; | ||
97 | reg = <0x0 0x80>; | ||
98 | cell-index = <0>; | ||
99 | interrupt-parent = <&mpic>; | ||
100 | interrupts = <20 2>; | ||
101 | }; | ||
102 | dma-channel@80 { | ||
103 | compatible = "fsl,mpc8541-dma-channel", | ||
104 | "fsl,eloplus-dma-channel"; | ||
105 | reg = <0x80 0x80>; | ||
106 | cell-index = <1>; | ||
107 | interrupt-parent = <&mpic>; | ||
108 | interrupts = <21 2>; | ||
109 | }; | ||
110 | dma-channel@100 { | ||
111 | compatible = "fsl,mpc8541-dma-channel", | ||
112 | "fsl,eloplus-dma-channel"; | ||
113 | reg = <0x100 0x80>; | ||
114 | cell-index = <2>; | ||
115 | interrupt-parent = <&mpic>; | ||
116 | interrupts = <22 2>; | ||
117 | }; | ||
118 | dma-channel@180 { | ||
119 | compatible = "fsl,mpc8541-dma-channel", | ||
120 | "fsl,eloplus-dma-channel"; | ||
121 | reg = <0x180 0x80>; | ||
122 | cell-index = <3>; | ||
123 | interrupt-parent = <&mpic>; | ||
124 | interrupts = <23 2>; | ||
125 | }; | ||
126 | }; | ||
127 | |||
86 | mdio@24520 { | 128 | mdio@24520 { |
87 | #address-cells = <1>; | 129 | #address-cells = <1>; |
88 | #size-cells = <0>; | 130 | #size-cells = <0>; |
@@ -148,14 +190,12 @@ | |||
148 | }; | 190 | }; |
149 | 191 | ||
150 | mpic: pic@40000 { | 192 | mpic: pic@40000 { |
151 | clock-frequency = <0>; | ||
152 | interrupt-controller; | 193 | interrupt-controller; |
153 | #address-cells = <0>; | 194 | #address-cells = <0>; |
154 | #interrupt-cells = <2>; | 195 | #interrupt-cells = <2>; |
155 | reg = <0x40000 0x40000>; | 196 | reg = <0x40000 0x40000>; |
156 | compatible = "chrp,open-pic"; | 197 | compatible = "chrp,open-pic"; |
157 | device_type = "open-pic"; | 198 | device_type = "open-pic"; |
158 | big-endian; | ||
159 | }; | 199 | }; |
160 | 200 | ||
161 | cpm@919c0 { | 201 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/mpc8544ds.dts b/arch/powerpc/boot/dts/mpc8544ds.dts index 6a0d8db96d97..6cf533f4b5fb 100644 --- a/arch/powerpc/boot/dts/mpc8544ds.dts +++ b/arch/powerpc/boot/dts/mpc8544ds.dts | |||
@@ -41,6 +41,7 @@ | |||
41 | timebase-frequency = <0>; | 41 | timebase-frequency = <0>; |
42 | bus-frequency = <0>; | 42 | bus-frequency = <0>; |
43 | clock-frequency = <0>; | 43 | clock-frequency = <0>; |
44 | next-level-cache = <&L2>; | ||
44 | }; | 45 | }; |
45 | }; | 46 | }; |
46 | 47 | ||
@@ -65,7 +66,7 @@ | |||
65 | interrupts = <18 2>; | 66 | interrupts = <18 2>; |
66 | }; | 67 | }; |
67 | 68 | ||
68 | l2-cache-controller@20000 { | 69 | L2: l2-cache-controller@20000 { |
69 | compatible = "fsl,8544-l2-cache-controller"; | 70 | compatible = "fsl,8544-l2-cache-controller"; |
70 | reg = <0x20000 0x1000>; | 71 | reg = <0x20000 0x1000>; |
71 | cache-line-size = <32>; // 32 bytes | 72 | cache-line-size = <32>; // 32 bytes |
@@ -210,14 +211,28 @@ | |||
210 | }; | 211 | }; |
211 | 212 | ||
212 | mpic: pic@40000 { | 213 | mpic: pic@40000 { |
213 | clock-frequency = <0>; | ||
214 | interrupt-controller; | 214 | interrupt-controller; |
215 | #address-cells = <0>; | 215 | #address-cells = <0>; |
216 | #interrupt-cells = <2>; | 216 | #interrupt-cells = <2>; |
217 | reg = <0x40000 0x40000>; | 217 | reg = <0x40000 0x40000>; |
218 | compatible = "chrp,open-pic"; | 218 | compatible = "chrp,open-pic"; |
219 | device_type = "open-pic"; | 219 | device_type = "open-pic"; |
220 | big-endian; | 220 | }; |
221 | |||
222 | msi@41600 { | ||
223 | compatible = "fsl,mpc8544-msi", "fsl,mpic-msi"; | ||
224 | reg = <0x41600 0x80>; | ||
225 | msi-available-ranges = <0 0x100>; | ||
226 | interrupts = < | ||
227 | 0xe0 0 | ||
228 | 0xe1 0 | ||
229 | 0xe2 0 | ||
230 | 0xe3 0 | ||
231 | 0xe4 0 | ||
232 | 0xe5 0 | ||
233 | 0xe6 0 | ||
234 | 0xe7 0>; | ||
235 | interrupt-parent = <&mpic>; | ||
221 | }; | 236 | }; |
222 | }; | 237 | }; |
223 | 238 | ||
diff --git a/arch/powerpc/boot/dts/mpc8548cds.dts b/arch/powerpc/boot/dts/mpc8548cds.dts index 4811b8107415..d1fa6bbfaea0 100644 --- a/arch/powerpc/boot/dts/mpc8548cds.dts +++ b/arch/powerpc/boot/dts/mpc8548cds.dts | |||
@@ -45,6 +45,7 @@ | |||
45 | timebase-frequency = <0>; // 33 MHz, from uboot | 45 | timebase-frequency = <0>; // 33 MHz, from uboot |
46 | bus-frequency = <0>; // 166 MHz | 46 | bus-frequency = <0>; // 166 MHz |
47 | clock-frequency = <0>; // 825 MHz, from uboot | 47 | clock-frequency = <0>; // 825 MHz, from uboot |
48 | next-level-cache = <&L2>; | ||
48 | }; | 49 | }; |
49 | }; | 50 | }; |
50 | 51 | ||
@@ -68,7 +69,7 @@ | |||
68 | interrupts = <18 2>; | 69 | interrupts = <18 2>; |
69 | }; | 70 | }; |
70 | 71 | ||
71 | l2-cache-controller@20000 { | 72 | L2: l2-cache-controller@20000 { |
72 | compatible = "fsl,8548-l2-cache-controller"; | 73 | compatible = "fsl,8548-l2-cache-controller"; |
73 | reg = <0x20000 0x1000>; | 74 | reg = <0x20000 0x1000>; |
74 | cache-line-size = <32>; // 32 bytes | 75 | cache-line-size = <32>; // 32 bytes |
@@ -99,6 +100,47 @@ | |||
99 | dfsrr; | 100 | dfsrr; |
100 | }; | 101 | }; |
101 | 102 | ||
103 | dma@21300 { | ||
104 | #address-cells = <1>; | ||
105 | #size-cells = <1>; | ||
106 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
107 | reg = <0x21300 0x4>; | ||
108 | ranges = <0x0 0x21100 0x200>; | ||
109 | cell-index = <0>; | ||
110 | dma-channel@0 { | ||
111 | compatible = "fsl,mpc8548-dma-channel", | ||
112 | "fsl,eloplus-dma-channel"; | ||
113 | reg = <0x0 0x80>; | ||
114 | cell-index = <0>; | ||
115 | interrupt-parent = <&mpic>; | ||
116 | interrupts = <20 2>; | ||
117 | }; | ||
118 | dma-channel@80 { | ||
119 | compatible = "fsl,mpc8548-dma-channel", | ||
120 | "fsl,eloplus-dma-channel"; | ||
121 | reg = <0x80 0x80>; | ||
122 | cell-index = <1>; | ||
123 | interrupt-parent = <&mpic>; | ||
124 | interrupts = <21 2>; | ||
125 | }; | ||
126 | dma-channel@100 { | ||
127 | compatible = "fsl,mpc8548-dma-channel", | ||
128 | "fsl,eloplus-dma-channel"; | ||
129 | reg = <0x100 0x80>; | ||
130 | cell-index = <2>; | ||
131 | interrupt-parent = <&mpic>; | ||
132 | interrupts = <22 2>; | ||
133 | }; | ||
134 | dma-channel@180 { | ||
135 | compatible = "fsl,mpc8548-dma-channel", | ||
136 | "fsl,eloplus-dma-channel"; | ||
137 | reg = <0x180 0x80>; | ||
138 | cell-index = <3>; | ||
139 | interrupt-parent = <&mpic>; | ||
140 | interrupts = <23 2>; | ||
141 | }; | ||
142 | }; | ||
143 | |||
102 | mdio@24520 { | 144 | mdio@24520 { |
103 | #address-cells = <1>; | 145 | #address-cells = <1>; |
104 | #size-cells = <0>; | 146 | #size-cells = <0>; |
@@ -208,14 +250,12 @@ | |||
208 | }; | 250 | }; |
209 | 251 | ||
210 | mpic: pic@40000 { | 252 | mpic: pic@40000 { |
211 | clock-frequency = <0>; | ||
212 | interrupt-controller; | 253 | interrupt-controller; |
213 | #address-cells = <0>; | 254 | #address-cells = <0>; |
214 | #interrupt-cells = <2>; | 255 | #interrupt-cells = <2>; |
215 | reg = <0x40000 0x40000>; | 256 | reg = <0x40000 0x40000>; |
216 | compatible = "chrp,open-pic"; | 257 | compatible = "chrp,open-pic"; |
217 | device_type = "open-pic"; | 258 | device_type = "open-pic"; |
218 | big-endian; | ||
219 | }; | 259 | }; |
220 | }; | 260 | }; |
221 | 261 | ||
diff --git a/arch/powerpc/boot/dts/mpc8555cds.dts b/arch/powerpc/boot/dts/mpc8555cds.dts index b025c566c10d..6fc8059b5a01 100644 --- a/arch/powerpc/boot/dts/mpc8555cds.dts +++ b/arch/powerpc/boot/dts/mpc8555cds.dts | |||
@@ -40,6 +40,7 @@ | |||
40 | timebase-frequency = <0>; // 33 MHz, from uboot | 40 | timebase-frequency = <0>; // 33 MHz, from uboot |
41 | bus-frequency = <0>; // 166 MHz | 41 | bus-frequency = <0>; // 166 MHz |
42 | clock-frequency = <0>; // 825 MHz, from uboot | 42 | clock-frequency = <0>; // 825 MHz, from uboot |
43 | next-level-cache = <&L2>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -63,7 +64,7 @@ | |||
63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
64 | }; | 65 | }; |
65 | 66 | ||
66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
67 | compatible = "fsl,8555-l2-cache-controller"; | 68 | compatible = "fsl,8555-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
69 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
@@ -83,6 +84,47 @@ | |||
83 | dfsrr; | 84 | dfsrr; |
84 | }; | 85 | }; |
85 | 86 | ||
87 | dma@21300 { | ||
88 | #address-cells = <1>; | ||
89 | #size-cells = <1>; | ||
90 | compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; | ||
91 | reg = <0x21300 0x4>; | ||
92 | ranges = <0x0 0x21100 0x200>; | ||
93 | cell-index = <0>; | ||
94 | dma-channel@0 { | ||
95 | compatible = "fsl,mpc8555-dma-channel", | ||
96 | "fsl,eloplus-dma-channel"; | ||
97 | reg = <0x0 0x80>; | ||
98 | cell-index = <0>; | ||
99 | interrupt-parent = <&mpic>; | ||
100 | interrupts = <20 2>; | ||
101 | }; | ||
102 | dma-channel@80 { | ||
103 | compatible = "fsl,mpc8555-dma-channel", | ||
104 | "fsl,eloplus-dma-channel"; | ||
105 | reg = <0x80 0x80>; | ||
106 | cell-index = <1>; | ||
107 | interrupt-parent = <&mpic>; | ||
108 | interrupts = <21 2>; | ||
109 | }; | ||
110 | dma-channel@100 { | ||
111 | compatible = "fsl,mpc8555-dma-channel", | ||
112 | "fsl,eloplus-dma-channel"; | ||
113 | reg = <0x100 0x80>; | ||
114 | cell-index = <2>; | ||
115 | interrupt-parent = <&mpic>; | ||
116 | interrupts = <22 2>; | ||
117 | }; | ||
118 | dma-channel@180 { | ||
119 | compatible = "fsl,mpc8555-dma-channel", | ||
120 | "fsl,eloplus-dma-channel"; | ||
121 | reg = <0x180 0x80>; | ||
122 | cell-index = <3>; | ||
123 | interrupt-parent = <&mpic>; | ||
124 | interrupts = <23 2>; | ||
125 | }; | ||
126 | }; | ||
127 | |||
86 | mdio@24520 { | 128 | mdio@24520 { |
87 | #address-cells = <1>; | 129 | #address-cells = <1>; |
88 | #size-cells = <0>; | 130 | #size-cells = <0>; |
@@ -148,14 +190,12 @@ | |||
148 | }; | 190 | }; |
149 | 191 | ||
150 | mpic: pic@40000 { | 192 | mpic: pic@40000 { |
151 | clock-frequency = <0>; | ||
152 | interrupt-controller; | 193 | interrupt-controller; |
153 | #address-cells = <0>; | 194 | #address-cells = <0>; |
154 | #interrupt-cells = <2>; | 195 | #interrupt-cells = <2>; |
155 | reg = <0x40000 0x40000>; | 196 | reg = <0x40000 0x40000>; |
156 | compatible = "chrp,open-pic"; | 197 | compatible = "chrp,open-pic"; |
157 | device_type = "open-pic"; | 198 | device_type = "open-pic"; |
158 | big-endian; | ||
159 | }; | 199 | }; |
160 | 200 | ||
161 | cpm@919c0 { | 201 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/mpc8560ads.dts b/arch/powerpc/boot/dts/mpc8560ads.dts index 0cc16ab305d1..ba8159de040b 100644 --- a/arch/powerpc/boot/dts/mpc8560ads.dts +++ b/arch/powerpc/boot/dts/mpc8560ads.dts | |||
@@ -64,7 +64,7 @@ | |||
64 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
65 | }; | 65 | }; |
66 | 66 | ||
67 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
68 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
69 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
70 | cache-line-size = <32>; // 32 bytes | 70 | cache-line-size = <32>; // 32 bytes |
@@ -73,6 +73,47 @@ | |||
73 | interrupts = <16 2>; | 73 | interrupts = <16 2>; |
74 | }; | 74 | }; |
75 | 75 | ||
76 | dma@21300 { | ||
77 | #address-cells = <1>; | ||
78 | #size-cells = <1>; | ||
79 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | ||
80 | reg = <0x21300 0x4>; | ||
81 | ranges = <0x0 0x21100 0x200>; | ||
82 | cell-index = <0>; | ||
83 | dma-channel@0 { | ||
84 | compatible = "fsl,mpc8560-dma-channel", | ||
85 | "fsl,eloplus-dma-channel"; | ||
86 | reg = <0x0 0x80>; | ||
87 | cell-index = <0>; | ||
88 | interrupt-parent = <&mpic>; | ||
89 | interrupts = <20 2>; | ||
90 | }; | ||
91 | dma-channel@80 { | ||
92 | compatible = "fsl,mpc8560-dma-channel", | ||
93 | "fsl,eloplus-dma-channel"; | ||
94 | reg = <0x80 0x80>; | ||
95 | cell-index = <1>; | ||
96 | interrupt-parent = <&mpic>; | ||
97 | interrupts = <21 2>; | ||
98 | }; | ||
99 | dma-channel@100 { | ||
100 | compatible = "fsl,mpc8560-dma-channel", | ||
101 | "fsl,eloplus-dma-channel"; | ||
102 | reg = <0x100 0x80>; | ||
103 | cell-index = <2>; | ||
104 | interrupt-parent = <&mpic>; | ||
105 | interrupts = <22 2>; | ||
106 | }; | ||
107 | dma-channel@180 { | ||
108 | compatible = "fsl,mpc8560-dma-channel", | ||
109 | "fsl,eloplus-dma-channel"; | ||
110 | reg = <0x180 0x80>; | ||
111 | cell-index = <3>; | ||
112 | interrupt-parent = <&mpic>; | ||
113 | interrupts = <23 2>; | ||
114 | }; | ||
115 | }; | ||
116 | |||
76 | mdio@24520 { | 117 | mdio@24520 { |
77 | #address-cells = <1>; | 118 | #address-cells = <1>; |
78 | #size-cells = <0>; | 119 | #size-cells = <0>; |
@@ -134,6 +175,7 @@ | |||
134 | #address-cells = <0>; | 175 | #address-cells = <0>; |
135 | #interrupt-cells = <2>; | 176 | #interrupt-cells = <2>; |
136 | reg = <0x40000 0x40000>; | 177 | reg = <0x40000 0x40000>; |
178 | compatible = "chrp,open-pic"; | ||
137 | device_type = "open-pic"; | 179 | device_type = "open-pic"; |
138 | }; | 180 | }; |
139 | 181 | ||
diff --git a/arch/powerpc/boot/dts/mpc8568mds.dts b/arch/powerpc/boot/dts/mpc8568mds.dts index a025a8ededc5..be9a289c0d62 100644 --- a/arch/powerpc/boot/dts/mpc8568mds.dts +++ b/arch/powerpc/boot/dts/mpc8568mds.dts | |||
@@ -42,6 +42,7 @@ | |||
42 | timebase-frequency = <0>; | 42 | timebase-frequency = <0>; |
43 | bus-frequency = <0>; | 43 | bus-frequency = <0>; |
44 | clock-frequency = <0>; | 44 | clock-frequency = <0>; |
45 | next-level-cache = <&L2>; | ||
45 | }; | 46 | }; |
46 | }; | 47 | }; |
47 | 48 | ||
@@ -70,7 +71,7 @@ | |||
70 | interrupts = <18 2>; | 71 | interrupts = <18 2>; |
71 | }; | 72 | }; |
72 | 73 | ||
73 | l2-cache-controller@20000 { | 74 | L2: l2-cache-controller@20000 { |
74 | compatible = "fsl,8568-l2-cache-controller"; | 75 | compatible = "fsl,8568-l2-cache-controller"; |
75 | reg = <0x20000 0x1000>; | 76 | reg = <0x20000 0x1000>; |
76 | cache-line-size = <32>; // 32 bytes | 77 | cache-line-size = <32>; // 32 bytes |
@@ -106,6 +107,47 @@ | |||
106 | dfsrr; | 107 | dfsrr; |
107 | }; | 108 | }; |
108 | 109 | ||
110 | dma@21300 { | ||
111 | #address-cells = <1>; | ||
112 | #size-cells = <1>; | ||
113 | compatible = "fsl,mpc8568-dma", "fsl,eloplus-dma"; | ||
114 | reg = <0x21300 0x4>; | ||
115 | ranges = <0x0 0x21100 0x200>; | ||
116 | cell-index = <0>; | ||
117 | dma-channel@0 { | ||
118 | compatible = "fsl,mpc8568-dma-channel", | ||
119 | "fsl,eloplus-dma-channel"; | ||
120 | reg = <0x0 0x80>; | ||
121 | cell-index = <0>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | interrupts = <20 2>; | ||
124 | }; | ||
125 | dma-channel@80 { | ||
126 | compatible = "fsl,mpc8568-dma-channel", | ||
127 | "fsl,eloplus-dma-channel"; | ||
128 | reg = <0x80 0x80>; | ||
129 | cell-index = <1>; | ||
130 | interrupt-parent = <&mpic>; | ||
131 | interrupts = <21 2>; | ||
132 | }; | ||
133 | dma-channel@100 { | ||
134 | compatible = "fsl,mpc8568-dma-channel", | ||
135 | "fsl,eloplus-dma-channel"; | ||
136 | reg = <0x100 0x80>; | ||
137 | cell-index = <2>; | ||
138 | interrupt-parent = <&mpic>; | ||
139 | interrupts = <22 2>; | ||
140 | }; | ||
141 | dma-channel@180 { | ||
142 | compatible = "fsl,mpc8568-dma-channel", | ||
143 | "fsl,eloplus-dma-channel"; | ||
144 | reg = <0x180 0x80>; | ||
145 | cell-index = <3>; | ||
146 | interrupt-parent = <&mpic>; | ||
147 | interrupts = <23 2>; | ||
148 | }; | ||
149 | }; | ||
150 | |||
109 | mdio@24520 { | 151 | mdio@24520 { |
110 | #address-cells = <1>; | 152 | #address-cells = <1>; |
111 | #size-cells = <0>; | 153 | #size-cells = <0>; |
@@ -202,14 +244,12 @@ | |||
202 | }; | 244 | }; |
203 | 245 | ||
204 | mpic: pic@40000 { | 246 | mpic: pic@40000 { |
205 | clock-frequency = <0>; | ||
206 | interrupt-controller; | 247 | interrupt-controller; |
207 | #address-cells = <0>; | 248 | #address-cells = <0>; |
208 | #interrupt-cells = <2>; | 249 | #interrupt-cells = <2>; |
209 | reg = <0x40000 0x40000>; | 250 | reg = <0x40000 0x40000>; |
210 | compatible = "chrp,open-pic"; | 251 | compatible = "chrp,open-pic"; |
211 | device_type = "open-pic"; | 252 | device_type = "open-pic"; |
212 | big-endian; | ||
213 | }; | 253 | }; |
214 | 254 | ||
215 | par_io@e0100 { | 255 | par_io@e0100 { |
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts index 66f27ab613a2..cb06325f0b79 100644 --- a/arch/powerpc/boot/dts/mpc8572ds.dts +++ b/arch/powerpc/boot/dts/mpc8572ds.dts | |||
@@ -42,6 +42,7 @@ | |||
42 | timebase-frequency = <0>; | 42 | timebase-frequency = <0>; |
43 | bus-frequency = <0>; | 43 | bus-frequency = <0>; |
44 | clock-frequency = <0>; | 44 | clock-frequency = <0>; |
45 | next-level-cache = <&L2>; | ||
45 | }; | 46 | }; |
46 | 47 | ||
47 | PowerPC,8572@1 { | 48 | PowerPC,8572@1 { |
@@ -54,6 +55,7 @@ | |||
54 | timebase-frequency = <0>; | 55 | timebase-frequency = <0>; |
55 | bus-frequency = <0>; | 56 | bus-frequency = <0>; |
56 | clock-frequency = <0>; | 57 | clock-frequency = <0>; |
58 | next-level-cache = <&L2>; | ||
57 | }; | 59 | }; |
58 | }; | 60 | }; |
59 | 61 | ||
@@ -84,7 +86,7 @@ | |||
84 | interrupts = <18 2>; | 86 | interrupts = <18 2>; |
85 | }; | 87 | }; |
86 | 88 | ||
87 | l2-cache-controller@20000 { | 89 | L2: l2-cache-controller@20000 { |
88 | compatible = "fsl,mpc8572-l2-cache-controller"; | 90 | compatible = "fsl,mpc8572-l2-cache-controller"; |
89 | reg = <0x20000 0x1000>; | 91 | reg = <0x20000 0x1000>; |
90 | cache-line-size = <32>; // 32 bytes | 92 | cache-line-size = <32>; // 32 bytes |
@@ -115,6 +117,88 @@ | |||
115 | dfsrr; | 117 | dfsrr; |
116 | }; | 118 | }; |
117 | 119 | ||
120 | dma@c300 { | ||
121 | #address-cells = <1>; | ||
122 | #size-cells = <1>; | ||
123 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
124 | reg = <0xc300 0x4>; | ||
125 | ranges = <0x0 0xc100 0x200>; | ||
126 | cell-index = <1>; | ||
127 | dma-channel@0 { | ||
128 | compatible = "fsl,mpc8572-dma-channel", | ||
129 | "fsl,eloplus-dma-channel"; | ||
130 | reg = <0x0 0x80>; | ||
131 | cell-index = <0>; | ||
132 | interrupt-parent = <&mpic>; | ||
133 | interrupts = <76 2>; | ||
134 | }; | ||
135 | dma-channel@80 { | ||
136 | compatible = "fsl,mpc8572-dma-channel", | ||
137 | "fsl,eloplus-dma-channel"; | ||
138 | reg = <0x80 0x80>; | ||
139 | cell-index = <1>; | ||
140 | interrupt-parent = <&mpic>; | ||
141 | interrupts = <77 2>; | ||
142 | }; | ||
143 | dma-channel@100 { | ||
144 | compatible = "fsl,mpc8572-dma-channel", | ||
145 | "fsl,eloplus-dma-channel"; | ||
146 | reg = <0x100 0x80>; | ||
147 | cell-index = <2>; | ||
148 | interrupt-parent = <&mpic>; | ||
149 | interrupts = <78 2>; | ||
150 | }; | ||
151 | dma-channel@180 { | ||
152 | compatible = "fsl,mpc8572-dma-channel", | ||
153 | "fsl,eloplus-dma-channel"; | ||
154 | reg = <0x180 0x80>; | ||
155 | cell-index = <3>; | ||
156 | interrupt-parent = <&mpic>; | ||
157 | interrupts = <79 2>; | ||
158 | }; | ||
159 | }; | ||
160 | |||
161 | dma@21300 { | ||
162 | #address-cells = <1>; | ||
163 | #size-cells = <1>; | ||
164 | compatible = "fsl,mpc8572-dma", "fsl,eloplus-dma"; | ||
165 | reg = <0x21300 0x4>; | ||
166 | ranges = <0x0 0x21100 0x200>; | ||
167 | cell-index = <0>; | ||
168 | dma-channel@0 { | ||
169 | compatible = "fsl,mpc8572-dma-channel", | ||
170 | "fsl,eloplus-dma-channel"; | ||
171 | reg = <0x0 0x80>; | ||
172 | cell-index = <0>; | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <20 2>; | ||
175 | }; | ||
176 | dma-channel@80 { | ||
177 | compatible = "fsl,mpc8572-dma-channel", | ||
178 | "fsl,eloplus-dma-channel"; | ||
179 | reg = <0x80 0x80>; | ||
180 | cell-index = <1>; | ||
181 | interrupt-parent = <&mpic>; | ||
182 | interrupts = <21 2>; | ||
183 | }; | ||
184 | dma-channel@100 { | ||
185 | compatible = "fsl,mpc8572-dma-channel", | ||
186 | "fsl,eloplus-dma-channel"; | ||
187 | reg = <0x100 0x80>; | ||
188 | cell-index = <2>; | ||
189 | interrupt-parent = <&mpic>; | ||
190 | interrupts = <22 2>; | ||
191 | }; | ||
192 | dma-channel@180 { | ||
193 | compatible = "fsl,mpc8572-dma-channel", | ||
194 | "fsl,eloplus-dma-channel"; | ||
195 | reg = <0x180 0x80>; | ||
196 | cell-index = <3>; | ||
197 | interrupt-parent = <&mpic>; | ||
198 | interrupts = <23 2>; | ||
199 | }; | ||
200 | }; | ||
201 | |||
118 | mdio@24520 { | 202 | mdio@24520 { |
119 | #address-cells = <1>; | 203 | #address-cells = <1>; |
120 | #size-cells = <0>; | 204 | #size-cells = <0>; |
@@ -221,15 +305,29 @@ | |||
221 | fsl,has-rstcr; | 305 | fsl,has-rstcr; |
222 | }; | 306 | }; |
223 | 307 | ||
308 | msi@41600 { | ||
309 | compatible = "fsl,mpc8572-msi", "fsl,mpic-msi"; | ||
310 | reg = <0x41600 0x80>; | ||
311 | msi-available-ranges = <0 0x100>; | ||
312 | interrupts = < | ||
313 | 0xe0 0 | ||
314 | 0xe1 0 | ||
315 | 0xe2 0 | ||
316 | 0xe3 0 | ||
317 | 0xe4 0 | ||
318 | 0xe5 0 | ||
319 | 0xe6 0 | ||
320 | 0xe7 0>; | ||
321 | interrupt-parent = <&mpic>; | ||
322 | }; | ||
323 | |||
224 | mpic: pic@40000 { | 324 | mpic: pic@40000 { |
225 | clock-frequency = <0>; | ||
226 | interrupt-controller; | 325 | interrupt-controller; |
227 | #address-cells = <0>; | 326 | #address-cells = <0>; |
228 | #interrupt-cells = <2>; | 327 | #interrupt-cells = <2>; |
229 | reg = <0x40000 0x40000>; | 328 | reg = <0x40000 0x40000>; |
230 | compatible = "chrp,open-pic"; | 329 | compatible = "chrp,open-pic"; |
231 | device_type = "open-pic"; | 330 | device_type = "open-pic"; |
232 | big-endian; | ||
233 | }; | 331 | }; |
234 | }; | 332 | }; |
235 | 333 | ||
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts index fa9b6bbeb5af..65a5f64b2339 100644 --- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts +++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts | |||
@@ -172,14 +172,28 @@ | |||
172 | }; | 172 | }; |
173 | 173 | ||
174 | mpic: interrupt-controller@40000 { | 174 | mpic: interrupt-controller@40000 { |
175 | clock-frequency = <0>; | ||
176 | interrupt-controller; | 175 | interrupt-controller; |
177 | #address-cells = <0>; | 176 | #address-cells = <0>; |
178 | #interrupt-cells = <2>; | 177 | #interrupt-cells = <2>; |
179 | reg = <0x40000 0x40000>; | 178 | reg = <0x40000 0x40000>; |
180 | compatible = "chrp,open-pic"; | 179 | compatible = "chrp,open-pic"; |
181 | device_type = "open-pic"; | 180 | device_type = "open-pic"; |
182 | big-endian; | 181 | }; |
182 | |||
183 | msi@41600 { | ||
184 | compatible = "fsl,mpc8610-msi", "fsl,mpic-msi"; | ||
185 | reg = <0x41600 0x80>; | ||
186 | msi-available-ranges = <0 0x100>; | ||
187 | interrupts = < | ||
188 | 0xe0 0 | ||
189 | 0xe1 0 | ||
190 | 0xe2 0 | ||
191 | 0xe3 0 | ||
192 | 0xe4 0 | ||
193 | 0xe5 0 | ||
194 | 0xe6 0 | ||
195 | 0xe7 0>; | ||
196 | interrupt-parent = <&mpic>; | ||
183 | }; | 197 | }; |
184 | 198 | ||
185 | global-utilities@e0000 { | 199 | global-utilities@e0000 { |
diff --git a/arch/powerpc/boot/dts/mpc8641_hpcn.dts b/arch/powerpc/boot/dts/mpc8641_hpcn.dts index 1e4bfe9cadb9..ae08761ffff1 100644 --- a/arch/powerpc/boot/dts/mpc8641_hpcn.dts +++ b/arch/powerpc/boot/dts/mpc8641_hpcn.dts | |||
@@ -134,6 +134,47 @@ | |||
134 | dfsrr; | 134 | dfsrr; |
135 | }; | 135 | }; |
136 | 136 | ||
137 | dma@21300 { | ||
138 | #address-cells = <1>; | ||
139 | #size-cells = <1>; | ||
140 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
141 | reg = <0x21300 0x4>; | ||
142 | ranges = <0x0 0x21100 0x200>; | ||
143 | cell-index = <0>; | ||
144 | dma-channel@0 { | ||
145 | compatible = "fsl,mpc8641-dma-channel", | ||
146 | "fsl,eloplus-dma-channel"; | ||
147 | reg = <0x0 0x80>; | ||
148 | cell-index = <0>; | ||
149 | interrupt-parent = <&mpic>; | ||
150 | interrupts = <20 2>; | ||
151 | }; | ||
152 | dma-channel@80 { | ||
153 | compatible = "fsl,mpc8641-dma-channel", | ||
154 | "fsl,eloplus-dma-channel"; | ||
155 | reg = <0x80 0x80>; | ||
156 | cell-index = <1>; | ||
157 | interrupt-parent = <&mpic>; | ||
158 | interrupts = <21 2>; | ||
159 | }; | ||
160 | dma-channel@100 { | ||
161 | compatible = "fsl,mpc8641-dma-channel", | ||
162 | "fsl,eloplus-dma-channel"; | ||
163 | reg = <0x100 0x80>; | ||
164 | cell-index = <2>; | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <22 2>; | ||
167 | }; | ||
168 | dma-channel@180 { | ||
169 | compatible = "fsl,mpc8641-dma-channel", | ||
170 | "fsl,eloplus-dma-channel"; | ||
171 | reg = <0x180 0x80>; | ||
172 | cell-index = <3>; | ||
173 | interrupt-parent = <&mpic>; | ||
174 | interrupts = <23 2>; | ||
175 | }; | ||
176 | }; | ||
177 | |||
137 | mdio@24520 { | 178 | mdio@24520 { |
138 | #address-cells = <1>; | 179 | #address-cells = <1>; |
139 | #size-cells = <0>; | 180 | #size-cells = <0>; |
@@ -239,14 +280,12 @@ | |||
239 | }; | 280 | }; |
240 | 281 | ||
241 | mpic: pic@40000 { | 282 | mpic: pic@40000 { |
242 | clock-frequency = <0>; | ||
243 | interrupt-controller; | 283 | interrupt-controller; |
244 | #address-cells = <0>; | 284 | #address-cells = <0>; |
245 | #interrupt-cells = <2>; | 285 | #interrupt-cells = <2>; |
246 | reg = <0x40000 0x40000>; | 286 | reg = <0x40000 0x40000>; |
247 | compatible = "chrp,open-pic"; | 287 | compatible = "chrp,open-pic"; |
248 | device_type = "open-pic"; | 288 | device_type = "open-pic"; |
249 | big-endian; | ||
250 | }; | 289 | }; |
251 | 290 | ||
252 | global-utilities@e0000 { | 291 | global-utilities@e0000 { |
diff --git a/arch/powerpc/boot/dts/ps3.dts b/arch/powerpc/boot/dts/ps3.dts index 379ded282d5e..96ba5b512afe 100644 --- a/arch/powerpc/boot/dts/ps3.dts +++ b/arch/powerpc/boot/dts/ps3.dts | |||
@@ -18,6 +18,8 @@ | |||
18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA | 18 | * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA |
19 | */ | 19 | */ |
20 | 20 | ||
21 | /dts-v1/; | ||
22 | |||
21 | / { | 23 | / { |
22 | model = "SonyPS3"; | 24 | model = "SonyPS3"; |
23 | compatible = "sony,ps3"; | 25 | compatible = "sony,ps3"; |
@@ -34,7 +36,7 @@ | |||
34 | 36 | ||
35 | memory { | 37 | memory { |
36 | device_type = "memory"; | 38 | device_type = "memory"; |
37 | reg = <0 0 0 0>; | 39 | reg = <0x00000000 0x00000000 0x00000000 0x00000000>; |
38 | }; | 40 | }; |
39 | 41 | ||
40 | /* | 42 | /* |
@@ -55,14 +57,14 @@ | |||
55 | 57 | ||
56 | cpu@0 { | 58 | cpu@0 { |
57 | device_type = "cpu"; | 59 | device_type = "cpu"; |
58 | reg = <0>; | 60 | reg = <0x00000000>; |
59 | ibm,ppc-interrupt-server#s = <0 1>; | 61 | ibm,ppc-interrupt-server#s = <0x0 0x1>; |
60 | clock-frequency = <0>; | 62 | clock-frequency = <0>; |
61 | timebase-frequency = <0>; | 63 | timebase-frequency = <0>; |
62 | i-cache-size = <8000>; | 64 | i-cache-size = <32768>; |
63 | d-cache-size = <8000>; | 65 | d-cache-size = <32768>; |
64 | i-cache-line-size = <80>; | 66 | i-cache-line-size = <128>; |
65 | d-cache-line-size = <80>; | 67 | d-cache-line-size = <128>; |
66 | }; | 68 | }; |
67 | }; | 69 | }; |
68 | }; | 70 | }; |
diff --git a/arch/powerpc/boot/dts/rainier.dts b/arch/powerpc/boot/dts/rainier.dts index 6a8fa7089ea2..2afb63a42ea9 100644 --- a/arch/powerpc/boot/dts/rainier.dts +++ b/arch/powerpc/boot/dts/rainier.dts | |||
@@ -12,12 +12,14 @@ | |||
12 | * | 12 | * |
13 | */ | 13 | */ |
14 | 14 | ||
15 | /dts-v1/; | ||
16 | |||
15 | / { | 17 | / { |
16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
18 | model = "amcc,rainier"; | 20 | model = "amcc,rainier"; |
19 | compatible = "amcc,rainier"; | 21 | compatible = "amcc,rainier"; |
20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
21 | 23 | ||
22 | aliases { | 24 | aliases { |
23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
@@ -35,13 +37,13 @@ | |||
35 | cpu@0 { | 37 | cpu@0 { |
36 | device_type = "cpu"; | 38 | device_type = "cpu"; |
37 | model = "PowerPC,440GRx"; | 39 | model = "PowerPC,440GRx"; |
38 | reg = <0>; | 40 | reg = <0x00000000>; |
39 | clock-frequency = <0>; /* Filled in by zImage */ | 41 | clock-frequency = <0>; /* Filled in by zImage */ |
40 | timebase-frequency = <0>; /* Filled in by zImage */ | 42 | timebase-frequency = <0>; /* Filled in by zImage */ |
41 | i-cache-line-size = <20>; | 43 | i-cache-line-size = <32>; |
42 | d-cache-line-size = <20>; | 44 | d-cache-line-size = <32>; |
43 | i-cache-size = <8000>; | 45 | i-cache-size = <32768>; |
44 | d-cache-size = <8000>; | 46 | d-cache-size = <32768>; |
45 | dcr-controller; | 47 | dcr-controller; |
46 | dcr-access-method = "native"; | 48 | dcr-access-method = "native"; |
47 | }; | 49 | }; |
@@ -49,14 +51,14 @@ | |||
49 | 51 | ||
50 | memory { | 52 | memory { |
51 | device_type = "memory"; | 53 | device_type = "memory"; |
52 | reg = <0 0 0>; /* Filled in by zImage */ | 54 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
53 | }; | 55 | }; |
54 | 56 | ||
55 | UIC0: interrupt-controller0 { | 57 | UIC0: interrupt-controller0 { |
56 | compatible = "ibm,uic-440grx","ibm,uic"; | 58 | compatible = "ibm,uic-440grx","ibm,uic"; |
57 | interrupt-controller; | 59 | interrupt-controller; |
58 | cell-index = <0>; | 60 | cell-index = <0>; |
59 | dcr-reg = <0c0 009>; | 61 | dcr-reg = <0x0c0 0x009>; |
60 | #address-cells = <0>; | 62 | #address-cells = <0>; |
61 | #size-cells = <0>; | 63 | #size-cells = <0>; |
62 | #interrupt-cells = <2>; | 64 | #interrupt-cells = <2>; |
@@ -66,11 +68,11 @@ | |||
66 | compatible = "ibm,uic-440grx","ibm,uic"; | 68 | compatible = "ibm,uic-440grx","ibm,uic"; |
67 | interrupt-controller; | 69 | interrupt-controller; |
68 | cell-index = <1>; | 70 | cell-index = <1>; |
69 | dcr-reg = <0d0 009>; | 71 | dcr-reg = <0x0d0 0x009>; |
70 | #address-cells = <0>; | 72 | #address-cells = <0>; |
71 | #size-cells = <0>; | 73 | #size-cells = <0>; |
72 | #interrupt-cells = <2>; | 74 | #interrupt-cells = <2>; |
73 | interrupts = <1e 4 1f 4>; /* cascade */ | 75 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
74 | interrupt-parent = <&UIC0>; | 76 | interrupt-parent = <&UIC0>; |
75 | }; | 77 | }; |
76 | 78 | ||
@@ -78,22 +80,22 @@ | |||
78 | compatible = "ibm,uic-440grx","ibm,uic"; | 80 | compatible = "ibm,uic-440grx","ibm,uic"; |
79 | interrupt-controller; | 81 | interrupt-controller; |
80 | cell-index = <2>; | 82 | cell-index = <2>; |
81 | dcr-reg = <0e0 009>; | 83 | dcr-reg = <0x0e0 0x009>; |
82 | #address-cells = <0>; | 84 | #address-cells = <0>; |
83 | #size-cells = <0>; | 85 | #size-cells = <0>; |
84 | #interrupt-cells = <2>; | 86 | #interrupt-cells = <2>; |
85 | interrupts = <1c 4 1d 4>; /* cascade */ | 87 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
86 | interrupt-parent = <&UIC0>; | 88 | interrupt-parent = <&UIC0>; |
87 | }; | 89 | }; |
88 | 90 | ||
89 | SDR0: sdr { | 91 | SDR0: sdr { |
90 | compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; | 92 | compatible = "ibm,sdr-440grx", "ibm,sdr-440ep"; |
91 | dcr-reg = <00e 002>; | 93 | dcr-reg = <0x00e 0x002>; |
92 | }; | 94 | }; |
93 | 95 | ||
94 | CPR0: cpr { | 96 | CPR0: cpr { |
95 | compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; | 97 | compatible = "ibm,cpr-440grx", "ibm,cpr-440ep"; |
96 | dcr-reg = <00c 002>; | 98 | dcr-reg = <0x00c 0x002>; |
97 | }; | 99 | }; |
98 | 100 | ||
99 | plb { | 101 | plb { |
@@ -105,80 +107,80 @@ | |||
105 | 107 | ||
106 | SDRAM0: sdram { | 108 | SDRAM0: sdram { |
107 | compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; | 109 | compatible = "ibm,sdram-440grx", "ibm,sdram-44x-ddr2denali"; |
108 | dcr-reg = <010 2>; | 110 | dcr-reg = <0x010 0x002>; |
109 | }; | 111 | }; |
110 | 112 | ||
111 | DMA0: dma { | 113 | DMA0: dma { |
112 | compatible = "ibm,dma-440grx", "ibm,dma-4xx"; | 114 | compatible = "ibm,dma-440grx", "ibm,dma-4xx"; |
113 | dcr-reg = <100 027>; | 115 | dcr-reg = <0x100 0x027>; |
114 | }; | 116 | }; |
115 | 117 | ||
116 | MAL0: mcmal { | 118 | MAL0: mcmal { |
117 | compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; | 119 | compatible = "ibm,mcmal-440grx", "ibm,mcmal2"; |
118 | dcr-reg = <180 62>; | 120 | dcr-reg = <0x180 0x062>; |
119 | num-tx-chans = <2>; | 121 | num-tx-chans = <2>; |
120 | num-rx-chans = <2>; | 122 | num-rx-chans = <2>; |
121 | interrupt-parent = <&MAL0>; | 123 | interrupt-parent = <&MAL0>; |
122 | interrupts = <0 1 2 3 4>; | 124 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
123 | #interrupt-cells = <1>; | 125 | #interrupt-cells = <1>; |
124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
126 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 128 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
127 | /*RXEOB*/ 1 &UIC0 b 4 | 129 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
128 | /*SERR*/ 2 &UIC1 0 4 | 130 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
129 | /*TXDE*/ 3 &UIC1 1 4 | 131 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
130 | /*RXDE*/ 4 &UIC1 2 4>; | 132 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
131 | interrupt-map-mask = <ffffffff>; | 133 | interrupt-map-mask = <0xffffffff>; |
132 | }; | 134 | }; |
133 | 135 | ||
134 | POB0: opb { | 136 | POB0: opb { |
135 | compatible = "ibm,opb-440grx", "ibm,opb"; | 137 | compatible = "ibm,opb-440grx", "ibm,opb"; |
136 | #address-cells = <1>; | 138 | #address-cells = <1>; |
137 | #size-cells = <1>; | 139 | #size-cells = <1>; |
138 | ranges = <00000000 1 00000000 80000000 | 140 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
139 | 80000000 1 80000000 80000000>; | 141 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
140 | interrupt-parent = <&UIC1>; | 142 | interrupt-parent = <&UIC1>; |
141 | interrupts = <7 4>; | 143 | interrupts = <0x7 0x4>; |
142 | clock-frequency = <0>; /* Filled in by zImage */ | 144 | clock-frequency = <0>; /* Filled in by zImage */ |
143 | 145 | ||
144 | EBC0: ebc { | 146 | EBC0: ebc { |
145 | compatible = "ibm,ebc-440grx", "ibm,ebc"; | 147 | compatible = "ibm,ebc-440grx", "ibm,ebc"; |
146 | dcr-reg = <012 2>; | 148 | dcr-reg = <0x012 0x002>; |
147 | #address-cells = <2>; | 149 | #address-cells = <2>; |
148 | #size-cells = <1>; | 150 | #size-cells = <1>; |
149 | clock-frequency = <0>; /* Filled in by zImage */ | 151 | clock-frequency = <0>; /* Filled in by zImage */ |
150 | interrupts = <5 1>; | 152 | interrupts = <0x5 0x1>; |
151 | interrupt-parent = <&UIC1>; | 153 | interrupt-parent = <&UIC1>; |
152 | 154 | ||
153 | nor_flash@0,0 { | 155 | nor_flash@0,0 { |
154 | compatible = "amd,s29gl256n", "cfi-flash"; | 156 | compatible = "amd,s29gl256n", "cfi-flash"; |
155 | bank-width = <2>; | 157 | bank-width = <2>; |
156 | reg = <0 000000 4000000>; | 158 | reg = <0x00000000 0x00000000 0x04000000>; |
157 | #address-cells = <1>; | 159 | #address-cells = <1>; |
158 | #size-cells = <1>; | 160 | #size-cells = <1>; |
159 | partition@0 { | 161 | partition@0 { |
160 | label = "Kernel"; | 162 | label = "Kernel"; |
161 | reg = <0 180000>; | 163 | reg = <0x00000000 0x00180000>; |
162 | }; | 164 | }; |
163 | partition@180000 { | 165 | partition@180000 { |
164 | label = "ramdisk"; | 166 | label = "ramdisk"; |
165 | reg = <180000 200000>; | 167 | reg = <0x00180000 0x00200000>; |
166 | }; | 168 | }; |
167 | partition@380000 { | 169 | partition@380000 { |
168 | label = "file system"; | 170 | label = "file system"; |
169 | reg = <380000 3aa0000>; | 171 | reg = <0x00380000 0x03aa0000>; |
170 | }; | 172 | }; |
171 | partition@3e20000 { | 173 | partition@3e20000 { |
172 | label = "kozio"; | 174 | label = "kozio"; |
173 | reg = <3e20000 140000>; | 175 | reg = <0x03e20000 0x00140000>; |
174 | }; | 176 | }; |
175 | partition@3f60000 { | 177 | partition@3f60000 { |
176 | label = "env"; | 178 | label = "env"; |
177 | reg = <3f60000 40000>; | 179 | reg = <0x03f60000 0x00040000>; |
178 | }; | 180 | }; |
179 | partition@3fa0000 { | 181 | partition@3fa0000 { |
180 | label = "u-boot"; | 182 | label = "u-boot"; |
181 | reg = <3fa0000 60000>; | 183 | reg = <0x03fa0000 0x00060000>; |
182 | }; | 184 | }; |
183 | }; | 185 | }; |
184 | 186 | ||
@@ -187,69 +189,69 @@ | |||
187 | UART0: serial@ef600300 { | 189 | UART0: serial@ef600300 { |
188 | device_type = "serial"; | 190 | device_type = "serial"; |
189 | compatible = "ns16550"; | 191 | compatible = "ns16550"; |
190 | reg = <ef600300 8>; | 192 | reg = <0xef600300 0x00000008>; |
191 | virtual-reg = <ef600300>; | 193 | virtual-reg = <0xef600300>; |
192 | clock-frequency = <0>; /* Filled in by zImage */ | 194 | clock-frequency = <0>; /* Filled in by zImage */ |
193 | current-speed = <1c200>; | 195 | current-speed = <115200>; |
194 | interrupt-parent = <&UIC0>; | 196 | interrupt-parent = <&UIC0>; |
195 | interrupts = <0 4>; | 197 | interrupts = <0x0 0x4>; |
196 | }; | 198 | }; |
197 | 199 | ||
198 | UART1: serial@ef600400 { | 200 | UART1: serial@ef600400 { |
199 | device_type = "serial"; | 201 | device_type = "serial"; |
200 | compatible = "ns16550"; | 202 | compatible = "ns16550"; |
201 | reg = <ef600400 8>; | 203 | reg = <0xef600400 0x00000008>; |
202 | virtual-reg = <ef600400>; | 204 | virtual-reg = <0xef600400>; |
203 | clock-frequency = <0>; | 205 | clock-frequency = <0>; |
204 | current-speed = <0>; | 206 | current-speed = <0>; |
205 | interrupt-parent = <&UIC0>; | 207 | interrupt-parent = <&UIC0>; |
206 | interrupts = <1 4>; | 208 | interrupts = <0x1 0x4>; |
207 | }; | 209 | }; |
208 | 210 | ||
209 | UART2: serial@ef600500 { | 211 | UART2: serial@ef600500 { |
210 | device_type = "serial"; | 212 | device_type = "serial"; |
211 | compatible = "ns16550"; | 213 | compatible = "ns16550"; |
212 | reg = <ef600500 8>; | 214 | reg = <0xef600500 0x00000008>; |
213 | virtual-reg = <ef600500>; | 215 | virtual-reg = <0xef600500>; |
214 | clock-frequency = <0>; | 216 | clock-frequency = <0>; |
215 | current-speed = <0>; | 217 | current-speed = <0>; |
216 | interrupt-parent = <&UIC1>; | 218 | interrupt-parent = <&UIC1>; |
217 | interrupts = <3 4>; | 219 | interrupts = <0x3 0x4>; |
218 | }; | 220 | }; |
219 | 221 | ||
220 | UART3: serial@ef600600 { | 222 | UART3: serial@ef600600 { |
221 | device_type = "serial"; | 223 | device_type = "serial"; |
222 | compatible = "ns16550"; | 224 | compatible = "ns16550"; |
223 | reg = <ef600600 8>; | 225 | reg = <0xef600600 0x00000008>; |
224 | virtual-reg = <ef600600>; | 226 | virtual-reg = <0xef600600>; |
225 | clock-frequency = <0>; | 227 | clock-frequency = <0>; |
226 | current-speed = <0>; | 228 | current-speed = <0>; |
227 | interrupt-parent = <&UIC1>; | 229 | interrupt-parent = <&UIC1>; |
228 | interrupts = <4 4>; | 230 | interrupts = <0x4 0x4>; |
229 | }; | 231 | }; |
230 | 232 | ||
231 | IIC0: i2c@ef600700 { | 233 | IIC0: i2c@ef600700 { |
232 | compatible = "ibm,iic-440grx", "ibm,iic"; | 234 | compatible = "ibm,iic-440grx", "ibm,iic"; |
233 | reg = <ef600700 14>; | 235 | reg = <0xef600700 0x00000014>; |
234 | interrupt-parent = <&UIC0>; | 236 | interrupt-parent = <&UIC0>; |
235 | interrupts = <2 4>; | 237 | interrupts = <0x2 0x4>; |
236 | }; | 238 | }; |
237 | 239 | ||
238 | IIC1: i2c@ef600800 { | 240 | IIC1: i2c@ef600800 { |
239 | compatible = "ibm,iic-440grx", "ibm,iic"; | 241 | compatible = "ibm,iic-440grx", "ibm,iic"; |
240 | reg = <ef600800 14>; | 242 | reg = <0xef600800 0x00000014>; |
241 | interrupt-parent = <&UIC0>; | 243 | interrupt-parent = <&UIC0>; |
242 | interrupts = <7 4>; | 244 | interrupts = <0x7 0x4>; |
243 | }; | 245 | }; |
244 | 246 | ||
245 | ZMII0: emac-zmii@ef600d00 { | 247 | ZMII0: emac-zmii@ef600d00 { |
246 | compatible = "ibm,zmii-440grx", "ibm,zmii"; | 248 | compatible = "ibm,zmii-440grx", "ibm,zmii"; |
247 | reg = <ef600d00 c>; | 249 | reg = <0xef600d00 0x0000000c>; |
248 | }; | 250 | }; |
249 | 251 | ||
250 | RGMII0: emac-rgmii@ef601000 { | 252 | RGMII0: emac-rgmii@ef601000 { |
251 | compatible = "ibm,rgmii-440grx", "ibm,rgmii"; | 253 | compatible = "ibm,rgmii-440grx", "ibm,rgmii"; |
252 | reg = <ef601000 8>; | 254 | reg = <0xef601000 0x00000008>; |
253 | has-mdio; | 255 | has-mdio; |
254 | }; | 256 | }; |
255 | 257 | ||
@@ -257,23 +259,23 @@ | |||
257 | device_type = "network"; | 259 | device_type = "network"; |
258 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | 260 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; |
259 | interrupt-parent = <&EMAC0>; | 261 | interrupt-parent = <&EMAC0>; |
260 | interrupts = <0 1>; | 262 | interrupts = <0x0 0x1>; |
261 | #interrupt-cells = <1>; | 263 | #interrupt-cells = <1>; |
262 | #address-cells = <0>; | 264 | #address-cells = <0>; |
263 | #size-cells = <0>; | 265 | #size-cells = <0>; |
264 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 266 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
265 | /*Wake*/ 1 &UIC1 1d 4>; | 267 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
266 | reg = <ef600e00 70>; | 268 | reg = <0xef600e00 0x00000070>; |
267 | local-mac-address = [000000000000]; | 269 | local-mac-address = [000000000000]; |
268 | mal-device = <&MAL0>; | 270 | mal-device = <&MAL0>; |
269 | mal-tx-channel = <0>; | 271 | mal-tx-channel = <0>; |
270 | mal-rx-channel = <0>; | 272 | mal-rx-channel = <0>; |
271 | cell-index = <0>; | 273 | cell-index = <0>; |
272 | max-frame-size = <2328>; | 274 | max-frame-size = <9000>; |
273 | rx-fifo-size = <1000>; | 275 | rx-fifo-size = <4096>; |
274 | tx-fifo-size = <800>; | 276 | tx-fifo-size = <2048>; |
275 | phy-mode = "rgmii"; | 277 | phy-mode = "rgmii"; |
276 | phy-map = <00000000>; | 278 | phy-map = <0x00000000>; |
277 | zmii-device = <&ZMII0>; | 279 | zmii-device = <&ZMII0>; |
278 | zmii-channel = <0>; | 280 | zmii-channel = <0>; |
279 | rgmii-device = <&RGMII0>; | 281 | rgmii-device = <&RGMII0>; |
@@ -286,23 +288,23 @@ | |||
286 | device_type = "network"; | 288 | device_type = "network"; |
287 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; | 289 | compatible = "ibm,emac-440grx", "ibm,emac-440epx", "ibm,emac4"; |
288 | interrupt-parent = <&EMAC1>; | 290 | interrupt-parent = <&EMAC1>; |
289 | interrupts = <0 1>; | 291 | interrupts = <0x0 0x1>; |
290 | #interrupt-cells = <1>; | 292 | #interrupt-cells = <1>; |
291 | #address-cells = <0>; | 293 | #address-cells = <0>; |
292 | #size-cells = <0>; | 294 | #size-cells = <0>; |
293 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 295 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
294 | /*Wake*/ 1 &UIC1 1f 4>; | 296 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
295 | reg = <ef600f00 70>; | 297 | reg = <0xef600f00 0x00000070>; |
296 | local-mac-address = [000000000000]; | 298 | local-mac-address = [000000000000]; |
297 | mal-device = <&MAL0>; | 299 | mal-device = <&MAL0>; |
298 | mal-tx-channel = <1>; | 300 | mal-tx-channel = <1>; |
299 | mal-rx-channel = <1>; | 301 | mal-rx-channel = <1>; |
300 | cell-index = <1>; | 302 | cell-index = <1>; |
301 | max-frame-size = <2328>; | 303 | max-frame-size = <9000>; |
302 | rx-fifo-size = <1000>; | 304 | rx-fifo-size = <4096>; |
303 | tx-fifo-size = <800>; | 305 | tx-fifo-size = <2048>; |
304 | phy-mode = "rgmii"; | 306 | phy-mode = "rgmii"; |
305 | phy-map = <00000000>; | 307 | phy-map = <0x00000000>; |
306 | zmii-device = <&ZMII0>; | 308 | zmii-device = <&ZMII0>; |
307 | zmii-channel = <1>; | 309 | zmii-channel = <1>; |
308 | rgmii-device = <&RGMII0>; | 310 | rgmii-device = <&RGMII0>; |
@@ -319,24 +321,25 @@ | |||
319 | #address-cells = <3>; | 321 | #address-cells = <3>; |
320 | compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; | 322 | compatible = "ibm,plb440grx-pci", "ibm,plb-pci"; |
321 | primary; | 323 | primary; |
322 | reg = <1 eec00000 8 /* Config space access */ | 324 | reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ |
323 | 1 eed00000 4 /* IACK */ | 325 | 0x00000001 0xeed00000 0x00000004 /* IACK */ |
324 | 1 eed00000 4 /* Special cycle */ | 326 | 0x00000001 0xeed00000 0x00000004 /* Special cycle */ |
325 | 1 ef400000 40>; /* Internal registers */ | 327 | 0x00000001 0xef400000 0x00000040>; /* Internal registers */ |
326 | 328 | ||
327 | /* Outbound ranges, one memory and one IO, | 329 | /* Outbound ranges, one memory and one IO, |
328 | * later cannot be changed. Chip supports a second | 330 | * later cannot be changed. Chip supports a second |
329 | * IO range but we don't use it for now | 331 | * IO range but we don't use it for now |
330 | */ | 332 | */ |
331 | ranges = <02000000 0 80000000 1 80000000 0 10000000 | 333 | ranges = <0x02000000 0x0 0x80000000 0x1 0x80000000 0x0 0x40000000 |
332 | 01000000 0 00000000 1 e8000000 0 00100000>; | 334 | 0x01000000 0x0 0x00000000 0x1 0xe8000000 0x0 0x00010000 |
335 | 0x01000000 0x0 0x00000000 0x1 0xe8800000 0x0 0x03800000>; | ||
333 | 336 | ||
334 | /* Inbound 2GB range starting at 0 */ | 337 | /* Inbound 2GB range starting at 0 */ |
335 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 338 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
336 | 339 | ||
337 | /* All PCI interrupts are routed to IRQ 67 */ | 340 | /* All PCI interrupts are routed to IRQ 67 */ |
338 | interrupt-map-mask = <0000 0 0 0>; | 341 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
339 | interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; | 342 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; |
340 | }; | 343 | }; |
341 | }; | 344 | }; |
342 | 345 | ||
diff --git a/arch/powerpc/boot/dts/sam440ep.dts b/arch/powerpc/boot/dts/sam440ep.dts new file mode 100644 index 000000000000..f0663be10421 --- /dev/null +++ b/arch/powerpc/boot/dts/sam440ep.dts | |||
@@ -0,0 +1,293 @@ | |||
1 | /* | ||
2 | * Device Tree Source for ACube Sam440ep based off bamboo.dts code | ||
3 | * original copyrights below | ||
4 | * | ||
5 | * Copyright (c) 2006, 2007 IBM Corp. | ||
6 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
7 | * | ||
8 | * Modified from bamboo.dts for sam440ep: | ||
9 | * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> | ||
10 | * | ||
11 | * This file is licensed under the terms of the GNU General Public | ||
12 | * License version 2. This program is licensed "as is" without | ||
13 | * any warranty of any kind, whether express or implied. | ||
14 | */ | ||
15 | |||
16 | /dts-v1/; | ||
17 | |||
18 | / { | ||
19 | #address-cells = <2>; | ||
20 | #size-cells = <1>; | ||
21 | model = "acube,sam440ep"; | ||
22 | compatible = "acube,sam440ep"; | ||
23 | |||
24 | aliases { | ||
25 | ethernet0 = &EMAC0; | ||
26 | ethernet1 = &EMAC1; | ||
27 | serial0 = &UART0; | ||
28 | serial1 = &UART1; | ||
29 | serial2 = &UART2; | ||
30 | serial3 = &UART3; | ||
31 | }; | ||
32 | |||
33 | cpus { | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <0>; | ||
36 | |||
37 | cpu@0 { | ||
38 | device_type = "cpu"; | ||
39 | model = "PowerPC,440EP"; | ||
40 | reg = <0>; | ||
41 | clock-frequency = <0>; /* Filled in by zImage */ | ||
42 | timebase-frequency = <0>; /* Filled in by zImage */ | ||
43 | i-cache-line-size = <32>; | ||
44 | d-cache-line-size = <32>; | ||
45 | i-cache-size = <32768>; | ||
46 | d-cache-size = <32768>; | ||
47 | dcr-controller; | ||
48 | dcr-access-method = "native"; | ||
49 | }; | ||
50 | }; | ||
51 | |||
52 | memory { | ||
53 | device_type = "memory"; | ||
54 | reg = <0 0 0>; /* Filled in by zImage */ | ||
55 | }; | ||
56 | |||
57 | UIC0: interrupt-controller0 { | ||
58 | compatible = "ibm,uic-440ep","ibm,uic"; | ||
59 | interrupt-controller; | ||
60 | cell-index = <0>; | ||
61 | dcr-reg = <0x0c0 9>; | ||
62 | #address-cells = <0>; | ||
63 | #size-cells = <0>; | ||
64 | #interrupt-cells = <2>; | ||
65 | }; | ||
66 | |||
67 | UIC1: interrupt-controller1 { | ||
68 | compatible = "ibm,uic-440ep","ibm,uic"; | ||
69 | interrupt-controller; | ||
70 | cell-index = <1>; | ||
71 | dcr-reg = <0x0d0 9>; | ||
72 | #address-cells = <0>; | ||
73 | #size-cells = <0>; | ||
74 | #interrupt-cells = <2>; | ||
75 | interrupts = <0x1e 4 0x1f 4>; /* cascade */ | ||
76 | interrupt-parent = <&UIC0>; | ||
77 | }; | ||
78 | |||
79 | SDR0: sdr { | ||
80 | compatible = "ibm,sdr-440ep"; | ||
81 | dcr-reg = <0x00e 2>; | ||
82 | }; | ||
83 | |||
84 | CPR0: cpr { | ||
85 | compatible = "ibm,cpr-440ep"; | ||
86 | dcr-reg = <0x00c 2>; | ||
87 | }; | ||
88 | |||
89 | plb { | ||
90 | compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; | ||
91 | #address-cells = <2>; | ||
92 | #size-cells = <1>; | ||
93 | ranges; | ||
94 | clock-frequency = <0>; /* Filled in by zImage */ | ||
95 | |||
96 | SDRAM0: sdram { | ||
97 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | ||
98 | dcr-reg = <0x010 2>; | ||
99 | }; | ||
100 | |||
101 | DMA0: dma { | ||
102 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | ||
103 | dcr-reg = <0x100 0x027>; | ||
104 | }; | ||
105 | |||
106 | MAL0: mcmal { | ||
107 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | ||
108 | dcr-reg = <0x180 0x062>; | ||
109 | num-tx-chans = <4>; | ||
110 | num-rx-chans = <2>; | ||
111 | interrupt-parent = <&MAL0>; | ||
112 | interrupts = <0 1 2 3 4>; | ||
113 | #interrupt-cells = <1>; | ||
114 | #address-cells = <0>; | ||
115 | #size-cells = <0>; | ||
116 | interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 | ||
117 | /*RXEOB*/ 1 &UIC0 11 4 | ||
118 | /*SERR*/ 2 &UIC1 0 4 | ||
119 | /*TXDE*/ 3 &UIC1 1 4 | ||
120 | /*RXDE*/ 4 &UIC1 2 4>; | ||
121 | }; | ||
122 | |||
123 | POB0: opb { | ||
124 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | ||
125 | #address-cells = <1>; | ||
126 | #size-cells = <1>; | ||
127 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | ||
128 | * bits. | ||
129 | */ | ||
130 | ranges = <0x00000000 0 0x00000000 0x80000000 | ||
131 | 0x80000000 0 0x80000000 0x80000000>; | ||
132 | interrupt-parent = <&UIC1>; | ||
133 | interrupts = <7 4>; | ||
134 | clock-frequency = <0>; /* Filled in by zImage */ | ||
135 | |||
136 | EBC0: ebc { | ||
137 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | ||
138 | dcr-reg = <0x012 2>; | ||
139 | #address-cells = <2>; | ||
140 | #size-cells = <1>; | ||
141 | clock-frequency = <0>; /* Filled in by zImage */ | ||
142 | interrupts = <5 1>; | ||
143 | interrupt-parent = <&UIC1>; | ||
144 | }; | ||
145 | |||
146 | UART0: serial@ef600300 { | ||
147 | device_type = "serial"; | ||
148 | compatible = "ns16550"; | ||
149 | reg = <0xef600300 8>; | ||
150 | virtual-reg = <0xef600300>; | ||
151 | clock-frequency = <0>; /* Filled in by zImage */ | ||
152 | current-speed = <0x1c200>; | ||
153 | interrupt-parent = <&UIC0>; | ||
154 | interrupts = <0 4>; | ||
155 | }; | ||
156 | |||
157 | UART1: serial@ef600400 { | ||
158 | device_type = "serial"; | ||
159 | compatible = "ns16550"; | ||
160 | reg = <0xef600400 8>; | ||
161 | virtual-reg = <0xef600400>; | ||
162 | clock-frequency = <0>; | ||
163 | current-speed = <0>; | ||
164 | interrupt-parent = <&UIC0>; | ||
165 | interrupts = <1 4>; | ||
166 | }; | ||
167 | |||
168 | UART2: serial@ef600500 { | ||
169 | device_type = "serial"; | ||
170 | compatible = "ns16550"; | ||
171 | reg = <0xef600500 8>; | ||
172 | virtual-reg = <0xef600500>; | ||
173 | clock-frequency = <0>; | ||
174 | current-speed = <0>; | ||
175 | interrupt-parent = <&UIC0>; | ||
176 | interrupts = <3 4>; | ||
177 | }; | ||
178 | |||
179 | UART3: serial@ef600600 { | ||
180 | device_type = "serial"; | ||
181 | compatible = "ns16550"; | ||
182 | reg = <0xef600600 8>; | ||
183 | virtual-reg = <0xef600600>; | ||
184 | clock-frequency = <0>; | ||
185 | current-speed = <0>; | ||
186 | interrupt-parent = <&UIC0>; | ||
187 | interrupts = <4 4>; | ||
188 | }; | ||
189 | |||
190 | IIC0: i2c@ef600700 { | ||
191 | #address-cells = <1>; | ||
192 | #size-cells = <0>; | ||
193 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | ||
194 | index = <0>; | ||
195 | reg = <0xef600700 0x14>; | ||
196 | interrupt-parent = <&UIC0>; | ||
197 | interrupts = <2 4>; | ||
198 | rtc@68 { | ||
199 | compatible = "stm,m41t80"; | ||
200 | reg = <0x68>; | ||
201 | }; | ||
202 | }; | ||
203 | |||
204 | IIC1: i2c@ef600800 { | ||
205 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | ||
206 | index = <5>; | ||
207 | reg = <0xef600800 0x14>; | ||
208 | interrupt-parent = <&UIC0>; | ||
209 | interrupts = <7 4>; | ||
210 | }; | ||
211 | |||
212 | ZMII0: emac-zmii@ef600d00 { | ||
213 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | ||
214 | reg = <0xef600d00 0xc>; | ||
215 | }; | ||
216 | |||
217 | EMAC0: ethernet@ef600e00 { | ||
218 | linux,network-index = <0>; | ||
219 | device_type = "network"; | ||
220 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | ||
221 | interrupt-parent = <&UIC1>; | ||
222 | interrupts = <0x1c 4 0x1d 4>; | ||
223 | reg = <0xef600e00 0x70>; | ||
224 | local-mac-address = [000000000000]; | ||
225 | mal-device = <&MAL0>; | ||
226 | mal-tx-channel = <0 1>; | ||
227 | mal-rx-channel = <0>; | ||
228 | cell-index = <0>; | ||
229 | max-frame-size = <0x5dc>; | ||
230 | rx-fifo-size = <0x1000>; | ||
231 | tx-fifo-size = <0x800>; | ||
232 | phy-mode = "rmii"; | ||
233 | phy-map = <00000000>; | ||
234 | zmii-device = <&ZMII0>; | ||
235 | zmii-channel = <0>; | ||
236 | }; | ||
237 | |||
238 | EMAC1: ethernet@ef600f00 { | ||
239 | linux,network-index = <1>; | ||
240 | device_type = "network"; | ||
241 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | ||
242 | interrupt-parent = <&UIC1>; | ||
243 | interrupts = <0x1e 4 0x1f 4>; | ||
244 | reg = <0xef600f00 0x70>; | ||
245 | local-mac-address = [000000000000]; | ||
246 | mal-device = <&MAL0>; | ||
247 | mal-tx-channel = <2 3>; | ||
248 | mal-rx-channel = <1>; | ||
249 | cell-index = <1>; | ||
250 | max-frame-size = <0x5dc>; | ||
251 | rx-fifo-size = <0x1000>; | ||
252 | tx-fifo-size = <0x800>; | ||
253 | phy-mode = "rmii"; | ||
254 | phy-map = <00000000>; | ||
255 | zmii-device = <&ZMII0>; | ||
256 | zmii-channel = <1>; | ||
257 | }; | ||
258 | usb@ef601000 { | ||
259 | compatible = "ohci-be"; | ||
260 | reg = <0xef601000 0x80>; | ||
261 | interrupts = <8 4 9 4>; | ||
262 | interrupt-parent = <&UIC1>; | ||
263 | }; | ||
264 | }; | ||
265 | |||
266 | PCI0: pci@ec000000 { | ||
267 | device_type = "pci"; | ||
268 | #interrupt-cells = <1>; | ||
269 | #size-cells = <2>; | ||
270 | #address-cells = <3>; | ||
271 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | ||
272 | primary; | ||
273 | reg = <0 0xeec00000 8 /* Config space access */ | ||
274 | 0 0xeed00000 4 /* IACK */ | ||
275 | 0 0xeed00000 4 /* Special cycle */ | ||
276 | 0 0xef400000 0x40>; /* Internal registers */ | ||
277 | |||
278 | /* Outbound ranges, one memory and one IO, | ||
279 | * later cannot be changed. Chip supports a second | ||
280 | * IO range but we don't use it for now | ||
281 | */ | ||
282 | ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 | ||
283 | 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; | ||
284 | |||
285 | /* Inbound 2GB range starting at 0 */ | ||
286 | dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; | ||
287 | }; | ||
288 | }; | ||
289 | |||
290 | chosen { | ||
291 | linux,stdout-path = "/plb/opb/serial@ef600300"; | ||
292 | }; | ||
293 | }; | ||
diff --git a/arch/powerpc/boot/dts/sbc8349.dts b/arch/powerpc/boot/dts/sbc8349.dts index 3839d4b7d6a7..5b76bb26085a 100644 --- a/arch/powerpc/boot/dts/sbc8349.dts +++ b/arch/powerpc/boot/dts/sbc8349.dts | |||
@@ -95,6 +95,41 @@ | |||
95 | mode = "cpu"; | 95 | mode = "cpu"; |
96 | }; | 96 | }; |
97 | 97 | ||
98 | dma@82a8 { | ||
99 | #address-cells = <1>; | ||
100 | #size-cells = <1>; | ||
101 | compatible = "fsl,mpc8349-dma", "fsl,elo-dma"; | ||
102 | reg = <0x82a8 4>; | ||
103 | ranges = <0 0x8100 0x1a8>; | ||
104 | interrupt-parent = <&ipic>; | ||
105 | interrupts = <71 8>; | ||
106 | cell-index = <0>; | ||
107 | dma-channel@0 { | ||
108 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
109 | reg = <0 0x80>; | ||
110 | interrupt-parent = <&ipic>; | ||
111 | interrupts = <71 8>; | ||
112 | }; | ||
113 | dma-channel@80 { | ||
114 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
115 | reg = <0x80 0x80>; | ||
116 | interrupt-parent = <&ipic>; | ||
117 | interrupts = <71 8>; | ||
118 | }; | ||
119 | dma-channel@100 { | ||
120 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
121 | reg = <0x100 0x80>; | ||
122 | interrupt-parent = <&ipic>; | ||
123 | interrupts = <71 8>; | ||
124 | }; | ||
125 | dma-channel@180 { | ||
126 | compatible = "fsl,mpc8349-dma-channel", "fsl,elo-dma-channel"; | ||
127 | reg = <0x180 0x28>; | ||
128 | interrupt-parent = <&ipic>; | ||
129 | interrupts = <71 8>; | ||
130 | }; | ||
131 | }; | ||
132 | |||
98 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ | 133 | /* phy type (ULPI or SERIAL) are only types supported for MPH */ |
99 | /* port = 0 or 1 */ | 134 | /* port = 0 or 1 */ |
100 | usb@22000 { | 135 | usb@22000 { |
diff --git a/arch/powerpc/boot/dts/sbc8548.dts b/arch/powerpc/boot/dts/sbc8548.dts index 22d967178fe9..21cbacb1000c 100644 --- a/arch/powerpc/boot/dts/sbc8548.dts +++ b/arch/powerpc/boot/dts/sbc8548.dts | |||
@@ -44,6 +44,7 @@ | |||
44 | timebase-frequency = <0>; // From uboot | 44 | timebase-frequency = <0>; // From uboot |
45 | bus-frequency = <0>; | 45 | bus-frequency = <0>; |
46 | clock-frequency = <0>; | 46 | clock-frequency = <0>; |
47 | next-level-cache = <&L2>; | ||
47 | }; | 48 | }; |
48 | }; | 49 | }; |
49 | 50 | ||
@@ -161,7 +162,7 @@ | |||
161 | interrupts = <0x12 0x2>; | 162 | interrupts = <0x12 0x2>; |
162 | }; | 163 | }; |
163 | 164 | ||
164 | l2-cache-controller@20000 { | 165 | L2: l2-cache-controller@20000 { |
165 | compatible = "fsl,8548-l2-cache-controller"; | 166 | compatible = "fsl,8548-l2-cache-controller"; |
166 | reg = <0x20000 0x1000>; | 167 | reg = <0x20000 0x1000>; |
167 | cache-line-size = <0x20>; // 32 bytes | 168 | cache-line-size = <0x20>; // 32 bytes |
@@ -192,6 +193,47 @@ | |||
192 | dfsrr; | 193 | dfsrr; |
193 | }; | 194 | }; |
194 | 195 | ||
196 | dma@21300 { | ||
197 | #address-cells = <1>; | ||
198 | #size-cells = <1>; | ||
199 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
200 | reg = <0x21300 0x4>; | ||
201 | ranges = <0x0 0x21100 0x200>; | ||
202 | cell-index = <0>; | ||
203 | dma-channel@0 { | ||
204 | compatible = "fsl,mpc8548-dma-channel", | ||
205 | "fsl,eloplus-dma-channel"; | ||
206 | reg = <0x0 0x80>; | ||
207 | cell-index = <0>; | ||
208 | interrupt-parent = <&mpic>; | ||
209 | interrupts = <20 2>; | ||
210 | }; | ||
211 | dma-channel@80 { | ||
212 | compatible = "fsl,mpc8548-dma-channel", | ||
213 | "fsl,eloplus-dma-channel"; | ||
214 | reg = <0x80 0x80>; | ||
215 | cell-index = <1>; | ||
216 | interrupt-parent = <&mpic>; | ||
217 | interrupts = <21 2>; | ||
218 | }; | ||
219 | dma-channel@100 { | ||
220 | compatible = "fsl,mpc8548-dma-channel", | ||
221 | "fsl,eloplus-dma-channel"; | ||
222 | reg = <0x100 0x80>; | ||
223 | cell-index = <2>; | ||
224 | interrupt-parent = <&mpic>; | ||
225 | interrupts = <22 2>; | ||
226 | }; | ||
227 | dma-channel@180 { | ||
228 | compatible = "fsl,mpc8548-dma-channel", | ||
229 | "fsl,eloplus-dma-channel"; | ||
230 | reg = <0x180 0x80>; | ||
231 | cell-index = <3>; | ||
232 | interrupt-parent = <&mpic>; | ||
233 | interrupts = <23 2>; | ||
234 | }; | ||
235 | }; | ||
236 | |||
195 | mdio@24520 { | 237 | mdio@24520 { |
196 | #address-cells = <1>; | 238 | #address-cells = <1>; |
197 | #size-cells = <0>; | 239 | #size-cells = <0>; |
@@ -265,12 +307,10 @@ | |||
265 | mpic: pic@40000 { | 307 | mpic: pic@40000 { |
266 | interrupt-controller; | 308 | interrupt-controller; |
267 | #address-cells = <0>; | 309 | #address-cells = <0>; |
268 | #size-cells = <0>; | ||
269 | #interrupt-cells = <2>; | 310 | #interrupt-cells = <2>; |
270 | reg = <0x40000 0x40000>; | 311 | reg = <0x40000 0x40000>; |
271 | compatible = "chrp,open-pic"; | 312 | compatible = "chrp,open-pic"; |
272 | device_type = "open-pic"; | 313 | device_type = "open-pic"; |
273 | big-endian; | ||
274 | }; | 314 | }; |
275 | }; | 315 | }; |
276 | 316 | ||
diff --git a/arch/powerpc/boot/dts/sbc8560.dts b/arch/powerpc/boot/dts/sbc8560.dts index 0476802fba60..db3632ef9888 100644 --- a/arch/powerpc/boot/dts/sbc8560.dts +++ b/arch/powerpc/boot/dts/sbc8560.dts | |||
@@ -43,6 +43,7 @@ | |||
43 | timebase-frequency = <0>; // From uboot | 43 | timebase-frequency = <0>; // From uboot |
44 | bus-frequency = <0>; | 44 | bus-frequency = <0>; |
45 | clock-frequency = <0>; | 45 | clock-frequency = <0>; |
46 | next-level-cache = <&L2>; | ||
46 | }; | 47 | }; |
47 | }; | 48 | }; |
48 | 49 | ||
@@ -66,7 +67,7 @@ | |||
66 | interrupts = <0x12 0x2>; | 67 | interrupts = <0x12 0x2>; |
67 | }; | 68 | }; |
68 | 69 | ||
69 | l2-cache-controller@20000 { | 70 | L2: l2-cache-controller@20000 { |
70 | compatible = "fsl,8560-l2-cache-controller"; | 71 | compatible = "fsl,8560-l2-cache-controller"; |
71 | reg = <0x20000 0x1000>; | 72 | reg = <0x20000 0x1000>; |
72 | cache-line-size = <0x20>; // 32 bytes | 73 | cache-line-size = <0x20>; // 32 bytes |
@@ -97,6 +98,47 @@ | |||
97 | dfsrr; | 98 | dfsrr; |
98 | }; | 99 | }; |
99 | 100 | ||
101 | dma@21300 { | ||
102 | #address-cells = <1>; | ||
103 | #size-cells = <1>; | ||
104 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | ||
105 | reg = <0x21300 0x4>; | ||
106 | ranges = <0x0 0x21100 0x200>; | ||
107 | cell-index = <0>; | ||
108 | dma-channel@0 { | ||
109 | compatible = "fsl,mpc8560-dma-channel", | ||
110 | "fsl,eloplus-dma-channel"; | ||
111 | reg = <0x0 0x80>; | ||
112 | cell-index = <0>; | ||
113 | interrupt-parent = <&mpic>; | ||
114 | interrupts = <20 2>; | ||
115 | }; | ||
116 | dma-channel@80 { | ||
117 | compatible = "fsl,mpc8560-dma-channel", | ||
118 | "fsl,eloplus-dma-channel"; | ||
119 | reg = <0x80 0x80>; | ||
120 | cell-index = <1>; | ||
121 | interrupt-parent = <&mpic>; | ||
122 | interrupts = <21 2>; | ||
123 | }; | ||
124 | dma-channel@100 { | ||
125 | compatible = "fsl,mpc8560-dma-channel", | ||
126 | "fsl,eloplus-dma-channel"; | ||
127 | reg = <0x100 0x80>; | ||
128 | cell-index = <2>; | ||
129 | interrupt-parent = <&mpic>; | ||
130 | interrupts = <22 2>; | ||
131 | }; | ||
132 | dma-channel@180 { | ||
133 | compatible = "fsl,mpc8560-dma-channel", | ||
134 | "fsl,eloplus-dma-channel"; | ||
135 | reg = <0x180 0x80>; | ||
136 | cell-index = <3>; | ||
137 | interrupt-parent = <&mpic>; | ||
138 | interrupts = <23 2>; | ||
139 | }; | ||
140 | }; | ||
141 | |||
100 | mdio@24520 { | 142 | mdio@24520 { |
101 | #address-cells = <1>; | 143 | #address-cells = <1>; |
102 | #size-cells = <0>; | 144 | #size-cells = <0>; |
@@ -155,8 +197,8 @@ | |||
155 | mpic: pic@40000 { | 197 | mpic: pic@40000 { |
156 | interrupt-controller; | 198 | interrupt-controller; |
157 | #address-cells = <0>; | 199 | #address-cells = <0>; |
158 | #size-cells = <0>; | ||
159 | #interrupt-cells = <2>; | 200 | #interrupt-cells = <2>; |
201 | compatible = "chrp,open-pic"; | ||
160 | reg = <0x40000 0x40000>; | 202 | reg = <0x40000 0x40000>; |
161 | device_type = "open-pic"; | 203 | device_type = "open-pic"; |
162 | }; | 204 | }; |
diff --git a/arch/powerpc/boot/dts/sbc8641d.dts b/arch/powerpc/boot/dts/sbc8641d.dts index 3eebeec157b3..9652456158fb 100644 --- a/arch/powerpc/boot/dts/sbc8641d.dts +++ b/arch/powerpc/boot/dts/sbc8641d.dts | |||
@@ -151,6 +151,47 @@ | |||
151 | dfsrr; | 151 | dfsrr; |
152 | }; | 152 | }; |
153 | 153 | ||
154 | dma@21300 { | ||
155 | #address-cells = <1>; | ||
156 | #size-cells = <1>; | ||
157 | compatible = "fsl,mpc8641-dma", "fsl,eloplus-dma"; | ||
158 | reg = <0x21300 0x4>; | ||
159 | ranges = <0x0 0x21100 0x200>; | ||
160 | cell-index = <0>; | ||
161 | dma-channel@0 { | ||
162 | compatible = "fsl,mpc8641-dma-channel", | ||
163 | "fsl,eloplus-dma-channel"; | ||
164 | reg = <0x0 0x80>; | ||
165 | cell-index = <0>; | ||
166 | interrupt-parent = <&mpic>; | ||
167 | interrupts = <20 2>; | ||
168 | }; | ||
169 | dma-channel@80 { | ||
170 | compatible = "fsl,mpc8641-dma-channel", | ||
171 | "fsl,eloplus-dma-channel"; | ||
172 | reg = <0x80 0x80>; | ||
173 | cell-index = <1>; | ||
174 | interrupt-parent = <&mpic>; | ||
175 | interrupts = <21 2>; | ||
176 | }; | ||
177 | dma-channel@100 { | ||
178 | compatible = "fsl,mpc8641-dma-channel", | ||
179 | "fsl,eloplus-dma-channel"; | ||
180 | reg = <0x100 0x80>; | ||
181 | cell-index = <2>; | ||
182 | interrupt-parent = <&mpic>; | ||
183 | interrupts = <22 2>; | ||
184 | }; | ||
185 | dma-channel@180 { | ||
186 | compatible = "fsl,mpc8641-dma-channel", | ||
187 | "fsl,eloplus-dma-channel"; | ||
188 | reg = <0x180 0x80>; | ||
189 | cell-index = <3>; | ||
190 | interrupt-parent = <&mpic>; | ||
191 | interrupts = <23 2>; | ||
192 | }; | ||
193 | }; | ||
194 | |||
154 | mdio@24520 { | 195 | mdio@24520 { |
155 | #address-cells = <1>; | 196 | #address-cells = <1>; |
156 | #size-cells = <0>; | 197 | #size-cells = <0>; |
diff --git a/arch/powerpc/boot/dts/sequoia.dts b/arch/powerpc/boot/dts/sequoia.dts index 72d67564bdfc..149dabc55217 100644 --- a/arch/powerpc/boot/dts/sequoia.dts +++ b/arch/powerpc/boot/dts/sequoia.dts | |||
@@ -12,12 +12,14 @@ | |||
12 | * | 12 | * |
13 | */ | 13 | */ |
14 | 14 | ||
15 | /dts-v1/; | ||
16 | |||
15 | / { | 17 | / { |
16 | #address-cells = <2>; | 18 | #address-cells = <2>; |
17 | #size-cells = <1>; | 19 | #size-cells = <1>; |
18 | model = "amcc,sequoia"; | 20 | model = "amcc,sequoia"; |
19 | compatible = "amcc,sequoia"; | 21 | compatible = "amcc,sequoia"; |
20 | dcr-parent = <&/cpus/cpu@0>; | 22 | dcr-parent = <&{/cpus/cpu@0}>; |
21 | 23 | ||
22 | aliases { | 24 | aliases { |
23 | ethernet0 = &EMAC0; | 25 | ethernet0 = &EMAC0; |
@@ -35,13 +37,13 @@ | |||
35 | cpu@0 { | 37 | cpu@0 { |
36 | device_type = "cpu"; | 38 | device_type = "cpu"; |
37 | model = "PowerPC,440EPx"; | 39 | model = "PowerPC,440EPx"; |
38 | reg = <0>; | 40 | reg = <0x00000000>; |
39 | clock-frequency = <0>; /* Filled in by zImage */ | 41 | clock-frequency = <0>; /* Filled in by zImage */ |
40 | timebase-frequency = <0>; /* Filled in by zImage */ | 42 | timebase-frequency = <0>; /* Filled in by zImage */ |
41 | i-cache-line-size = <20>; | 43 | i-cache-line-size = <32>; |
42 | d-cache-line-size = <20>; | 44 | d-cache-line-size = <32>; |
43 | i-cache-size = <8000>; | 45 | i-cache-size = <32768>; |
44 | d-cache-size = <8000>; | 46 | d-cache-size = <32768>; |
45 | dcr-controller; | 47 | dcr-controller; |
46 | dcr-access-method = "native"; | 48 | dcr-access-method = "native"; |
47 | }; | 49 | }; |
@@ -49,14 +51,14 @@ | |||
49 | 51 | ||
50 | memory { | 52 | memory { |
51 | device_type = "memory"; | 53 | device_type = "memory"; |
52 | reg = <0 0 0>; /* Filled in by zImage */ | 54 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
53 | }; | 55 | }; |
54 | 56 | ||
55 | UIC0: interrupt-controller0 { | 57 | UIC0: interrupt-controller0 { |
56 | compatible = "ibm,uic-440epx","ibm,uic"; | 58 | compatible = "ibm,uic-440epx","ibm,uic"; |
57 | interrupt-controller; | 59 | interrupt-controller; |
58 | cell-index = <0>; | 60 | cell-index = <0>; |
59 | dcr-reg = <0c0 009>; | 61 | dcr-reg = <0x0c0 0x009>; |
60 | #address-cells = <0>; | 62 | #address-cells = <0>; |
61 | #size-cells = <0>; | 63 | #size-cells = <0>; |
62 | #interrupt-cells = <2>; | 64 | #interrupt-cells = <2>; |
@@ -66,11 +68,11 @@ | |||
66 | compatible = "ibm,uic-440epx","ibm,uic"; | 68 | compatible = "ibm,uic-440epx","ibm,uic"; |
67 | interrupt-controller; | 69 | interrupt-controller; |
68 | cell-index = <1>; | 70 | cell-index = <1>; |
69 | dcr-reg = <0d0 009>; | 71 | dcr-reg = <0x0d0 0x009>; |
70 | #address-cells = <0>; | 72 | #address-cells = <0>; |
71 | #size-cells = <0>; | 73 | #size-cells = <0>; |
72 | #interrupt-cells = <2>; | 74 | #interrupt-cells = <2>; |
73 | interrupts = <1e 4 1f 4>; /* cascade */ | 75 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
74 | interrupt-parent = <&UIC0>; | 76 | interrupt-parent = <&UIC0>; |
75 | }; | 77 | }; |
76 | 78 | ||
@@ -78,22 +80,22 @@ | |||
78 | compatible = "ibm,uic-440epx","ibm,uic"; | 80 | compatible = "ibm,uic-440epx","ibm,uic"; |
79 | interrupt-controller; | 81 | interrupt-controller; |
80 | cell-index = <2>; | 82 | cell-index = <2>; |
81 | dcr-reg = <0e0 009>; | 83 | dcr-reg = <0x0e0 0x009>; |
82 | #address-cells = <0>; | 84 | #address-cells = <0>; |
83 | #size-cells = <0>; | 85 | #size-cells = <0>; |
84 | #interrupt-cells = <2>; | 86 | #interrupt-cells = <2>; |
85 | interrupts = <1c 4 1d 4>; /* cascade */ | 87 | interrupts = <0x1c 0x4 0x1d 0x4>; /* cascade */ |
86 | interrupt-parent = <&UIC0>; | 88 | interrupt-parent = <&UIC0>; |
87 | }; | 89 | }; |
88 | 90 | ||
89 | SDR0: sdr { | 91 | SDR0: sdr { |
90 | compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; | 92 | compatible = "ibm,sdr-440epx", "ibm,sdr-440ep"; |
91 | dcr-reg = <00e 002>; | 93 | dcr-reg = <0x00e 0x002>; |
92 | }; | 94 | }; |
93 | 95 | ||
94 | CPR0: cpr { | 96 | CPR0: cpr { |
95 | compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; | 97 | compatible = "ibm,cpr-440epx", "ibm,cpr-440ep"; |
96 | dcr-reg = <00c 002>; | 98 | dcr-reg = <0x00c 0x002>; |
97 | }; | 99 | }; |
98 | 100 | ||
99 | plb { | 101 | plb { |
@@ -105,44 +107,44 @@ | |||
105 | 107 | ||
106 | SDRAM0: sdram { | 108 | SDRAM0: sdram { |
107 | compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; | 109 | compatible = "ibm,sdram-440epx", "ibm,sdram-44x-ddr2denali"; |
108 | dcr-reg = <010 2>; | 110 | dcr-reg = <0x010 0x002>; |
109 | }; | 111 | }; |
110 | 112 | ||
111 | DMA0: dma { | 113 | DMA0: dma { |
112 | compatible = "ibm,dma-440epx", "ibm,dma-4xx"; | 114 | compatible = "ibm,dma-440epx", "ibm,dma-4xx"; |
113 | dcr-reg = <100 027>; | 115 | dcr-reg = <0x100 0x027>; |
114 | }; | 116 | }; |
115 | 117 | ||
116 | MAL0: mcmal { | 118 | MAL0: mcmal { |
117 | compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; | 119 | compatible = "ibm,mcmal-440epx", "ibm,mcmal2"; |
118 | dcr-reg = <180 62>; | 120 | dcr-reg = <0x180 0x062>; |
119 | num-tx-chans = <2>; | 121 | num-tx-chans = <2>; |
120 | num-rx-chans = <2>; | 122 | num-rx-chans = <2>; |
121 | interrupt-parent = <&MAL0>; | 123 | interrupt-parent = <&MAL0>; |
122 | interrupts = <0 1 2 3 4>; | 124 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
123 | #interrupt-cells = <1>; | 125 | #interrupt-cells = <1>; |
124 | #address-cells = <0>; | 126 | #address-cells = <0>; |
125 | #size-cells = <0>; | 127 | #size-cells = <0>; |
126 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 128 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
127 | /*RXEOB*/ 1 &UIC0 b 4 | 129 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
128 | /*SERR*/ 2 &UIC1 0 4 | 130 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
129 | /*TXDE*/ 3 &UIC1 1 4 | 131 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
130 | /*RXDE*/ 4 &UIC1 2 4>; | 132 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
131 | interrupt-map-mask = <ffffffff>; | 133 | interrupt-map-mask = <0xffffffff>; |
132 | }; | 134 | }; |
133 | 135 | ||
134 | USB1: usb@e0000400 { | 136 | USB1: usb@e0000400 { |
135 | compatible = "ohci-be"; | 137 | compatible = "ohci-be"; |
136 | reg = <0 e0000400 60>; | 138 | reg = <0x00000000 0xe0000400 0x00000060>; |
137 | interrupt-parent = <&UIC0>; | 139 | interrupt-parent = <&UIC0>; |
138 | interrupts = <15 8>; | 140 | interrupts = <0x15 0x8>; |
139 | }; | 141 | }; |
140 | 142 | ||
141 | USB0: ehci@e0000300 { | 143 | USB0: ehci@e0000300 { |
142 | compatible = "ibm,usb-ehci-440epx", "usb-ehci"; | 144 | compatible = "ibm,usb-ehci-440epx", "usb-ehci"; |
143 | interrupt-parent = <&UIC0>; | 145 | interrupt-parent = <&UIC0>; |
144 | interrupts = <1a 4>; | 146 | interrupts = <0x1a 0x4>; |
145 | reg = <0 e0000300 90 0 e0000390 70>; | 147 | reg = <0x00000000 0xe0000300 0x00000090 0x00000000 0xe0000390 0x00000070>; |
146 | big-endian; | 148 | big-endian; |
147 | }; | 149 | }; |
148 | 150 | ||
@@ -150,50 +152,50 @@ | |||
150 | compatible = "ibm,opb-440epx", "ibm,opb"; | 152 | compatible = "ibm,opb-440epx", "ibm,opb"; |
151 | #address-cells = <1>; | 153 | #address-cells = <1>; |
152 | #size-cells = <1>; | 154 | #size-cells = <1>; |
153 | ranges = <00000000 1 00000000 80000000 | 155 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
154 | 80000000 1 80000000 80000000>; | 156 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
155 | interrupt-parent = <&UIC1>; | 157 | interrupt-parent = <&UIC1>; |
156 | interrupts = <7 4>; | 158 | interrupts = <0x7 0x4>; |
157 | clock-frequency = <0>; /* Filled in by zImage */ | 159 | clock-frequency = <0>; /* Filled in by zImage */ |
158 | 160 | ||
159 | EBC0: ebc { | 161 | EBC0: ebc { |
160 | compatible = "ibm,ebc-440epx", "ibm,ebc"; | 162 | compatible = "ibm,ebc-440epx", "ibm,ebc"; |
161 | dcr-reg = <012 2>; | 163 | dcr-reg = <0x012 0x002>; |
162 | #address-cells = <2>; | 164 | #address-cells = <2>; |
163 | #size-cells = <1>; | 165 | #size-cells = <1>; |
164 | clock-frequency = <0>; /* Filled in by zImage */ | 166 | clock-frequency = <0>; /* Filled in by zImage */ |
165 | interrupts = <5 1>; | 167 | interrupts = <0x5 0x1>; |
166 | interrupt-parent = <&UIC1>; | 168 | interrupt-parent = <&UIC1>; |
167 | 169 | ||
168 | nor_flash@0,0 { | 170 | nor_flash@0,0 { |
169 | compatible = "amd,s29gl256n", "cfi-flash"; | 171 | compatible = "amd,s29gl256n", "cfi-flash"; |
170 | bank-width = <2>; | 172 | bank-width = <2>; |
171 | reg = <0 000000 4000000>; | 173 | reg = <0x00000000 0x00000000 0x04000000>; |
172 | #address-cells = <1>; | 174 | #address-cells = <1>; |
173 | #size-cells = <1>; | 175 | #size-cells = <1>; |
174 | partition@0 { | 176 | partition@0 { |
175 | label = "Kernel"; | 177 | label = "Kernel"; |
176 | reg = <0 180000>; | 178 | reg = <0x00000000 0x00180000>; |
177 | }; | 179 | }; |
178 | partition@180000 { | 180 | partition@180000 { |
179 | label = "ramdisk"; | 181 | label = "ramdisk"; |
180 | reg = <180000 200000>; | 182 | reg = <0x00180000 0x00200000>; |
181 | }; | 183 | }; |
182 | partition@380000 { | 184 | partition@380000 { |
183 | label = "file system"; | 185 | label = "file system"; |
184 | reg = <380000 3aa0000>; | 186 | reg = <0x00380000 0x03aa0000>; |
185 | }; | 187 | }; |
186 | partition@3e20000 { | 188 | partition@3e20000 { |
187 | label = "kozio"; | 189 | label = "kozio"; |
188 | reg = <3e20000 140000>; | 190 | reg = <0x03e20000 0x00140000>; |
189 | }; | 191 | }; |
190 | partition@3f60000 { | 192 | partition@3f60000 { |
191 | label = "env"; | 193 | label = "env"; |
192 | reg = <3f60000 40000>; | 194 | reg = <0x03f60000 0x00040000>; |
193 | }; | 195 | }; |
194 | partition@3fa0000 { | 196 | partition@3fa0000 { |
195 | label = "u-boot"; | 197 | label = "u-boot"; |
196 | reg = <3fa0000 60000>; | 198 | reg = <0x03fa0000 0x00060000>; |
197 | }; | 199 | }; |
198 | }; | 200 | }; |
199 | 201 | ||
@@ -202,69 +204,69 @@ | |||
202 | UART0: serial@ef600300 { | 204 | UART0: serial@ef600300 { |
203 | device_type = "serial"; | 205 | device_type = "serial"; |
204 | compatible = "ns16550"; | 206 | compatible = "ns16550"; |
205 | reg = <ef600300 8>; | 207 | reg = <0xef600300 0x00000008>; |
206 | virtual-reg = <ef600300>; | 208 | virtual-reg = <0xef600300>; |
207 | clock-frequency = <0>; /* Filled in by zImage */ | 209 | clock-frequency = <0>; /* Filled in by zImage */ |
208 | current-speed = <1c200>; | 210 | current-speed = <115200>; |
209 | interrupt-parent = <&UIC0>; | 211 | interrupt-parent = <&UIC0>; |
210 | interrupts = <0 4>; | 212 | interrupts = <0x0 0x4>; |
211 | }; | 213 | }; |
212 | 214 | ||
213 | UART1: serial@ef600400 { | 215 | UART1: serial@ef600400 { |
214 | device_type = "serial"; | 216 | device_type = "serial"; |
215 | compatible = "ns16550"; | 217 | compatible = "ns16550"; |
216 | reg = <ef600400 8>; | 218 | reg = <0xef600400 0x00000008>; |
217 | virtual-reg = <ef600400>; | 219 | virtual-reg = <0xef600400>; |
218 | clock-frequency = <0>; | 220 | clock-frequency = <0>; |
219 | current-speed = <0>; | 221 | current-speed = <0>; |
220 | interrupt-parent = <&UIC0>; | 222 | interrupt-parent = <&UIC0>; |
221 | interrupts = <1 4>; | 223 | interrupts = <0x1 0x4>; |
222 | }; | 224 | }; |
223 | 225 | ||
224 | UART2: serial@ef600500 { | 226 | UART2: serial@ef600500 { |
225 | device_type = "serial"; | 227 | device_type = "serial"; |
226 | compatible = "ns16550"; | 228 | compatible = "ns16550"; |
227 | reg = <ef600500 8>; | 229 | reg = <0xef600500 0x00000008>; |
228 | virtual-reg = <ef600500>; | 230 | virtual-reg = <0xef600500>; |
229 | clock-frequency = <0>; | 231 | clock-frequency = <0>; |
230 | current-speed = <0>; | 232 | current-speed = <0>; |
231 | interrupt-parent = <&UIC1>; | 233 | interrupt-parent = <&UIC1>; |
232 | interrupts = <3 4>; | 234 | interrupts = <0x3 0x4>; |
233 | }; | 235 | }; |
234 | 236 | ||
235 | UART3: serial@ef600600 { | 237 | UART3: serial@ef600600 { |
236 | device_type = "serial"; | 238 | device_type = "serial"; |
237 | compatible = "ns16550"; | 239 | compatible = "ns16550"; |
238 | reg = <ef600600 8>; | 240 | reg = <0xef600600 0x00000008>; |
239 | virtual-reg = <ef600600>; | 241 | virtual-reg = <0xef600600>; |
240 | clock-frequency = <0>; | 242 | clock-frequency = <0>; |
241 | current-speed = <0>; | 243 | current-speed = <0>; |
242 | interrupt-parent = <&UIC1>; | 244 | interrupt-parent = <&UIC1>; |
243 | interrupts = <4 4>; | 245 | interrupts = <0x4 0x4>; |
244 | }; | 246 | }; |
245 | 247 | ||
246 | IIC0: i2c@ef600700 { | 248 | IIC0: i2c@ef600700 { |
247 | compatible = "ibm,iic-440epx", "ibm,iic"; | 249 | compatible = "ibm,iic-440epx", "ibm,iic"; |
248 | reg = <ef600700 14>; | 250 | reg = <0xef600700 0x00000014>; |
249 | interrupt-parent = <&UIC0>; | 251 | interrupt-parent = <&UIC0>; |
250 | interrupts = <2 4>; | 252 | interrupts = <0x2 0x4>; |
251 | }; | 253 | }; |
252 | 254 | ||
253 | IIC1: i2c@ef600800 { | 255 | IIC1: i2c@ef600800 { |
254 | compatible = "ibm,iic-440epx", "ibm,iic"; | 256 | compatible = "ibm,iic-440epx", "ibm,iic"; |
255 | reg = <ef600800 14>; | 257 | reg = <0xef600800 0x00000014>; |
256 | interrupt-parent = <&UIC0>; | 258 | interrupt-parent = <&UIC0>; |
257 | interrupts = <7 4>; | 259 | interrupts = <0x7 0x4>; |
258 | }; | 260 | }; |
259 | 261 | ||
260 | ZMII0: emac-zmii@ef600d00 { | 262 | ZMII0: emac-zmii@ef600d00 { |
261 | compatible = "ibm,zmii-440epx", "ibm,zmii"; | 263 | compatible = "ibm,zmii-440epx", "ibm,zmii"; |
262 | reg = <ef600d00 c>; | 264 | reg = <0xef600d00 0x0000000c>; |
263 | }; | 265 | }; |
264 | 266 | ||
265 | RGMII0: emac-rgmii@ef601000 { | 267 | RGMII0: emac-rgmii@ef601000 { |
266 | compatible = "ibm,rgmii-440epx", "ibm,rgmii"; | 268 | compatible = "ibm,rgmii-440epx", "ibm,rgmii"; |
267 | reg = <ef601000 8>; | 269 | reg = <0xef601000 0x00000008>; |
268 | has-mdio; | 270 | has-mdio; |
269 | }; | 271 | }; |
270 | 272 | ||
@@ -272,23 +274,23 @@ | |||
272 | device_type = "network"; | 274 | device_type = "network"; |
273 | compatible = "ibm,emac-440epx", "ibm,emac4"; | 275 | compatible = "ibm,emac-440epx", "ibm,emac4"; |
274 | interrupt-parent = <&EMAC0>; | 276 | interrupt-parent = <&EMAC0>; |
275 | interrupts = <0 1>; | 277 | interrupts = <0x0 0x1>; |
276 | #interrupt-cells = <1>; | 278 | #interrupt-cells = <1>; |
277 | #address-cells = <0>; | 279 | #address-cells = <0>; |
278 | #size-cells = <0>; | 280 | #size-cells = <0>; |
279 | interrupt-map = </*Status*/ 0 &UIC0 18 4 | 281 | interrupt-map = </*Status*/ 0x0 &UIC0 0x18 0x4 |
280 | /*Wake*/ 1 &UIC1 1d 4>; | 282 | /*Wake*/ 0x1 &UIC1 0x1d 0x4>; |
281 | reg = <ef600e00 70>; | 283 | reg = <0xef600e00 0x00000070>; |
282 | local-mac-address = [000000000000]; | 284 | local-mac-address = [000000000000]; |
283 | mal-device = <&MAL0>; | 285 | mal-device = <&MAL0>; |
284 | mal-tx-channel = <0>; | 286 | mal-tx-channel = <0>; |
285 | mal-rx-channel = <0>; | 287 | mal-rx-channel = <0>; |
286 | cell-index = <0>; | 288 | cell-index = <0>; |
287 | max-frame-size = <2328>; | 289 | max-frame-size = <9000>; |
288 | rx-fifo-size = <1000>; | 290 | rx-fifo-size = <4096>; |
289 | tx-fifo-size = <800>; | 291 | tx-fifo-size = <2048>; |
290 | phy-mode = "rgmii"; | 292 | phy-mode = "rgmii"; |
291 | phy-map = <00000000>; | 293 | phy-map = <0x00000000>; |
292 | zmii-device = <&ZMII0>; | 294 | zmii-device = <&ZMII0>; |
293 | zmii-channel = <0>; | 295 | zmii-channel = <0>; |
294 | rgmii-device = <&RGMII0>; | 296 | rgmii-device = <&RGMII0>; |
@@ -301,23 +303,23 @@ | |||
301 | device_type = "network"; | 303 | device_type = "network"; |
302 | compatible = "ibm,emac-440epx", "ibm,emac4"; | 304 | compatible = "ibm,emac-440epx", "ibm,emac4"; |
303 | interrupt-parent = <&EMAC1>; | 305 | interrupt-parent = <&EMAC1>; |
304 | interrupts = <0 1>; | 306 | interrupts = <0x0 0x1>; |
305 | #interrupt-cells = <1>; | 307 | #interrupt-cells = <1>; |
306 | #address-cells = <0>; | 308 | #address-cells = <0>; |
307 | #size-cells = <0>; | 309 | #size-cells = <0>; |
308 | interrupt-map = </*Status*/ 0 &UIC0 19 4 | 310 | interrupt-map = </*Status*/ 0x0 &UIC0 0x19 0x4 |
309 | /*Wake*/ 1 &UIC1 1f 4>; | 311 | /*Wake*/ 0x1 &UIC1 0x1f 0x4>; |
310 | reg = <ef600f00 70>; | 312 | reg = <0xef600f00 0x00000070>; |
311 | local-mac-address = [000000000000]; | 313 | local-mac-address = [000000000000]; |
312 | mal-device = <&MAL0>; | 314 | mal-device = <&MAL0>; |
313 | mal-tx-channel = <1>; | 315 | mal-tx-channel = <1>; |
314 | mal-rx-channel = <1>; | 316 | mal-rx-channel = <1>; |
315 | cell-index = <1>; | 317 | cell-index = <1>; |
316 | max-frame-size = <2328>; | 318 | max-frame-size = <9000>; |
317 | rx-fifo-size = <1000>; | 319 | rx-fifo-size = <4096>; |
318 | tx-fifo-size = <800>; | 320 | tx-fifo-size = <2048>; |
319 | phy-mode = "rgmii"; | 321 | phy-mode = "rgmii"; |
320 | phy-map = <00000000>; | 322 | phy-map = <0x00000000>; |
321 | zmii-device = <&ZMII0>; | 323 | zmii-device = <&ZMII0>; |
322 | zmii-channel = <1>; | 324 | zmii-channel = <1>; |
323 | rgmii-device = <&RGMII0>; | 325 | rgmii-device = <&RGMII0>; |
@@ -334,10 +336,10 @@ | |||
334 | #address-cells = <3>; | 336 | #address-cells = <3>; |
335 | compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; | 337 | compatible = "ibm,plb440epx-pci", "ibm,plb-pci"; |
336 | primary; | 338 | primary; |
337 | reg = <1 eec00000 8 /* Config space access */ | 339 | reg = <0x00000001 0xeec00000 0x00000008 /* Config space access */ |
338 | 1 eed00000 4 /* IACK */ | 340 | 0x00000001 0xeed00000 0x00000004 /* IACK */ |
339 | 1 eed00000 4 /* Special cycle */ | 341 | 0x00000001 0xeed00000 0x00000004 /* Special cycle */ |
340 | 1 ef400000 40>; /* Internal registers */ | 342 | 0x00000001 0xef400000 0x00000040>; /* Internal registers */ |
341 | 343 | ||
342 | /* Outbound ranges, one memory and one IO, | 344 | /* Outbound ranges, one memory and one IO, |
343 | * later cannot be changed. Chip supports a second | 345 | * later cannot be changed. Chip supports a second |
@@ -347,16 +349,16 @@ | |||
347 | * I/O 1 E800 0000 1 E800 FFFF 64KB | 349 | * I/O 1 E800 0000 1 E800 FFFF 64KB |
348 | * I/O 1 E880 0000 1 EBFF FFFF 56MB | 350 | * I/O 1 E880 0000 1 EBFF FFFF 56MB |
349 | */ | 351 | */ |
350 | ranges = <02000000 0 80000000 1 80000000 0 40000000 | 352 | ranges = <0x02000000 0x00000000 0x80000000 0x00000001 0x80000000 0x00000000 0x40000000 |
351 | 01000000 0 00000000 1 e8000000 0 00010000 | 353 | 0x01000000 0x00000000 0x00000000 0x00000001 0xe8000000 0x00000000 0x00010000 |
352 | 01000000 0 00000000 1 e8800000 0 03800000>; | 354 | 0x01000000 0x00000000 0x00000000 0x00000001 0xe8800000 0x00000000 0x03800000>; |
353 | 355 | ||
354 | /* Inbound 2GB range starting at 0 */ | 356 | /* Inbound 2GB range starting at 0 */ |
355 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 357 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
356 | 358 | ||
357 | /* All PCI interrupts are routed to IRQ 67 */ | 359 | /* All PCI interrupts are routed to IRQ 67 */ |
358 | interrupt-map-mask = <0000 0 0 0>; | 360 | interrupt-map-mask = <0x0 0x0 0x0 0x0>; |
359 | interrupt-map = < 0000 0 0 0 &UIC2 3 8 >; | 361 | interrupt-map = < 0x0 0x0 0x0 0x0 &UIC2 0x3 0x8 >; |
360 | }; | 362 | }; |
361 | }; | 363 | }; |
362 | 364 | ||
diff --git a/arch/powerpc/boot/dts/storcenter.dts b/arch/powerpc/boot/dts/storcenter.dts index 5893816c0bce..eab680ce10da 100644 --- a/arch/powerpc/boot/dts/storcenter.dts +++ b/arch/powerpc/boot/dts/storcenter.dts | |||
@@ -95,6 +95,7 @@ | |||
95 | 95 | ||
96 | mpic: interrupt-controller@40000 { | 96 | mpic: interrupt-controller@40000 { |
97 | #interrupt-cells = <2>; | 97 | #interrupt-cells = <2>; |
98 | #address-cells = <0>; | ||
98 | device_type = "open-pic"; | 99 | device_type = "open-pic"; |
99 | compatible = "chrp,open-pic"; | 100 | compatible = "chrp,open-pic"; |
100 | interrupt-controller; | 101 | interrupt-controller; |
diff --git a/arch/powerpc/boot/dts/stx_gp3_8560.dts b/arch/powerpc/boot/dts/stx_gp3_8560.dts index f81fd7fdb29e..fcd1db6ca0a8 100644 --- a/arch/powerpc/boot/dts/stx_gp3_8560.dts +++ b/arch/powerpc/boot/dts/stx_gp3_8560.dts | |||
@@ -38,6 +38,7 @@ | |||
38 | timebase-frequency = <0>; | 38 | timebase-frequency = <0>; |
39 | bus-frequency = <0>; | 39 | bus-frequency = <0>; |
40 | clock-frequency = <0>; | 40 | clock-frequency = <0>; |
41 | next-level-cache = <&L2>; | ||
41 | }; | 42 | }; |
42 | }; | 43 | }; |
43 | 44 | ||
@@ -62,7 +63,7 @@ | |||
62 | interrupts = <18 2>; | 63 | interrupts = <18 2>; |
63 | }; | 64 | }; |
64 | 65 | ||
65 | l2-cache-controller@20000 { | 66 | L2: l2-cache-controller@20000 { |
66 | compatible = "fsl,8540-l2-cache-controller"; | 67 | compatible = "fsl,8540-l2-cache-controller"; |
67 | reg = <0x20000 0x1000>; | 68 | reg = <0x20000 0x1000>; |
68 | cache-line-size = <32>; | 69 | cache-line-size = <32>; |
@@ -82,6 +83,47 @@ | |||
82 | dfsrr; | 83 | dfsrr; |
83 | }; | 84 | }; |
84 | 85 | ||
86 | dma@21300 { | ||
87 | #address-cells = <1>; | ||
88 | #size-cells = <1>; | ||
89 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | ||
90 | reg = <0x21300 0x4>; | ||
91 | ranges = <0x0 0x21100 0x200>; | ||
92 | cell-index = <0>; | ||
93 | dma-channel@0 { | ||
94 | compatible = "fsl,mpc8560-dma-channel", | ||
95 | "fsl,eloplus-dma-channel"; | ||
96 | reg = <0x0 0x80>; | ||
97 | cell-index = <0>; | ||
98 | interrupt-parent = <&mpic>; | ||
99 | interrupts = <20 2>; | ||
100 | }; | ||
101 | dma-channel@80 { | ||
102 | compatible = "fsl,mpc8560-dma-channel", | ||
103 | "fsl,eloplus-dma-channel"; | ||
104 | reg = <0x80 0x80>; | ||
105 | cell-index = <1>; | ||
106 | interrupt-parent = <&mpic>; | ||
107 | interrupts = <21 2>; | ||
108 | }; | ||
109 | dma-channel@100 { | ||
110 | compatible = "fsl,mpc8560-dma-channel", | ||
111 | "fsl,eloplus-dma-channel"; | ||
112 | reg = <0x100 0x80>; | ||
113 | cell-index = <2>; | ||
114 | interrupt-parent = <&mpic>; | ||
115 | interrupts = <22 2>; | ||
116 | }; | ||
117 | dma-channel@180 { | ||
118 | compatible = "fsl,mpc8560-dma-channel", | ||
119 | "fsl,eloplus-dma-channel"; | ||
120 | reg = <0x180 0x80>; | ||
121 | cell-index = <3>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | interrupts = <23 2>; | ||
124 | }; | ||
125 | }; | ||
126 | |||
85 | mdio@24520 { | 127 | mdio@24520 { |
86 | #address-cells = <1>; | 128 | #address-cells = <1>; |
87 | #size-cells = <0>; | 129 | #size-cells = <0>; |
@@ -131,6 +173,7 @@ | |||
131 | #address-cells = <0>; | 173 | #address-cells = <0>; |
132 | #interrupt-cells = <2>; | 174 | #interrupt-cells = <2>; |
133 | reg = <0x40000 0x40000>; | 175 | reg = <0x40000 0x40000>; |
176 | compatible = "chrp,open-pic"; | ||
134 | device_type = "open-pic"; | 177 | device_type = "open-pic"; |
135 | }; | 178 | }; |
136 | 179 | ||
diff --git a/arch/powerpc/boot/dts/taishan.dts b/arch/powerpc/boot/dts/taishan.dts index e808e1c5593a..d4867ded8699 100644 --- a/arch/powerpc/boot/dts/taishan.dts +++ b/arch/powerpc/boot/dts/taishan.dts | |||
@@ -10,12 +10,14 @@ | |||
10 | * any warranty of any kind, whether express or implied. | 10 | * any warranty of any kind, whether express or implied. |
11 | */ | 11 | */ |
12 | 12 | ||
13 | /dts-v1/; | ||
14 | |||
13 | / { | 15 | / { |
14 | #address-cells = <2>; | 16 | #address-cells = <2>; |
15 | #size-cells = <1>; | 17 | #size-cells = <1>; |
16 | model = "amcc,taishan"; | 18 | model = "amcc,taishan"; |
17 | compatible = "amcc,taishan"; | 19 | compatible = "amcc,taishan"; |
18 | dcr-parent = <&/cpus/cpu@0>; | 20 | dcr-parent = <&{/cpus/cpu@0}>; |
19 | 21 | ||
20 | aliases { | 22 | aliases { |
21 | ethernet0 = &EMAC2; | 23 | ethernet0 = &EMAC2; |
@@ -31,13 +33,13 @@ | |||
31 | cpu@0 { | 33 | cpu@0 { |
32 | device_type = "cpu"; | 34 | device_type = "cpu"; |
33 | model = "PowerPC,440GX"; | 35 | model = "PowerPC,440GX"; |
34 | reg = <0>; | 36 | reg = <0x00000000>; |
35 | clock-frequency = <2FAF0800>; // 800MHz | 37 | clock-frequency = <800000000>; // 800MHz |
36 | timebase-frequency = <0>; // Filled in by zImage | 38 | timebase-frequency = <0>; // Filled in by zImage |
37 | i-cache-line-size = <32>; | 39 | i-cache-line-size = <50>; |
38 | d-cache-line-size = <32>; | 40 | d-cache-line-size = <50>; |
39 | i-cache-size = <8000>; /* 32 kB */ | 41 | i-cache-size = <32768>; /* 32 kB */ |
40 | d-cache-size = <8000>; /* 32 kB */ | 42 | d-cache-size = <32768>; /* 32 kB */ |
41 | dcr-controller; | 43 | dcr-controller; |
42 | dcr-access-method = "native"; | 44 | dcr-access-method = "native"; |
43 | }; | 45 | }; |
@@ -45,7 +47,7 @@ | |||
45 | 47 | ||
46 | memory { | 48 | memory { |
47 | device_type = "memory"; | 49 | device_type = "memory"; |
48 | reg = <0 0 0>; // Filled in by zImage | 50 | reg = <0x00000000 0x00000000 0x00000000>; // Filled in by zImage |
49 | }; | 51 | }; |
50 | 52 | ||
51 | 53 | ||
@@ -53,7 +55,7 @@ | |||
53 | compatible = "ibm,uic-440gx", "ibm,uic"; | 55 | compatible = "ibm,uic-440gx", "ibm,uic"; |
54 | interrupt-controller; | 56 | interrupt-controller; |
55 | cell-index = <3>; | 57 | cell-index = <3>; |
56 | dcr-reg = <200 009>; | 58 | dcr-reg = <0x200 0x009>; |
57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
@@ -64,11 +66,11 @@ | |||
64 | compatible = "ibm,uic-440gx", "ibm,uic"; | 66 | compatible = "ibm,uic-440gx", "ibm,uic"; |
65 | interrupt-controller; | 67 | interrupt-controller; |
66 | cell-index = <0>; | 68 | cell-index = <0>; |
67 | dcr-reg = <0c0 009>; | 69 | dcr-reg = <0x0c0 0x009>; |
68 | #address-cells = <0>; | 70 | #address-cells = <0>; |
69 | #size-cells = <0>; | 71 | #size-cells = <0>; |
70 | #interrupt-cells = <2>; | 72 | #interrupt-cells = <2>; |
71 | interrupts = <01 4 00 4>; /* cascade - first non-critical */ | 73 | interrupts = <0x1 0x4 0x0 0x4>; /* cascade - first non-critical */ |
72 | interrupt-parent = <&UICB0>; | 74 | interrupt-parent = <&UICB0>; |
73 | 75 | ||
74 | }; | 76 | }; |
@@ -77,11 +79,11 @@ | |||
77 | compatible = "ibm,uic-440gx", "ibm,uic"; | 79 | compatible = "ibm,uic-440gx", "ibm,uic"; |
78 | interrupt-controller; | 80 | interrupt-controller; |
79 | cell-index = <1>; | 81 | cell-index = <1>; |
80 | dcr-reg = <0d0 009>; | 82 | dcr-reg = <0x0d0 0x009>; |
81 | #address-cells = <0>; | 83 | #address-cells = <0>; |
82 | #size-cells = <0>; | 84 | #size-cells = <0>; |
83 | #interrupt-cells = <2>; | 85 | #interrupt-cells = <2>; |
84 | interrupts = <03 4 02 4>; /* cascade */ | 86 | interrupts = <0x3 0x4 0x2 0x4>; /* cascade */ |
85 | interrupt-parent = <&UICB0>; | 87 | interrupt-parent = <&UICB0>; |
86 | }; | 88 | }; |
87 | 89 | ||
@@ -89,29 +91,29 @@ | |||
89 | compatible = "ibm,uic-440gx", "ibm,uic"; | 91 | compatible = "ibm,uic-440gx", "ibm,uic"; |
90 | interrupt-controller; | 92 | interrupt-controller; |
91 | cell-index = <2>; /* was 1 */ | 93 | cell-index = <2>; /* was 1 */ |
92 | dcr-reg = <210 009>; | 94 | dcr-reg = <0x210 0x009>; |
93 | #address-cells = <0>; | 95 | #address-cells = <0>; |
94 | #size-cells = <0>; | 96 | #size-cells = <0>; |
95 | #interrupt-cells = <2>; | 97 | #interrupt-cells = <2>; |
96 | interrupts = <05 4 04 4>; /* cascade */ | 98 | interrupts = <0x5 0x4 0x4 0x4>; /* cascade */ |
97 | interrupt-parent = <&UICB0>; | 99 | interrupt-parent = <&UICB0>; |
98 | }; | 100 | }; |
99 | 101 | ||
100 | 102 | ||
101 | CPC0: cpc { | 103 | CPC0: cpc { |
102 | compatible = "ibm,cpc-440gp"; | 104 | compatible = "ibm,cpc-440gp"; |
103 | dcr-reg = <0b0 003 0e0 010>; | 105 | dcr-reg = <0x0b0 0x003 0x0e0 0x010>; |
104 | // FIXME: anything else? | 106 | // FIXME: anything else? |
105 | }; | 107 | }; |
106 | 108 | ||
107 | L2C0: l2c { | 109 | L2C0: l2c { |
108 | compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; | 110 | compatible = "ibm,l2-cache-440gx", "ibm,l2-cache"; |
109 | dcr-reg = <20 8 /* Internal SRAM DCR's */ | 111 | dcr-reg = <0x020 0x008 /* Internal SRAM DCR's */ |
110 | 30 8>; /* L2 cache DCR's */ | 112 | 0x030 0x008>; /* L2 cache DCR's */ |
111 | cache-line-size = <20>; /* 32 bytes */ | 113 | cache-line-size = <32>; /* 32 bytes */ |
112 | cache-size = <40000>; /* L2, 256K */ | 114 | cache-size = <262144>; /* L2, 256K */ |
113 | interrupt-parent = <&UIC2>; | 115 | interrupt-parent = <&UIC2>; |
114 | interrupts = <17 1>; | 116 | interrupts = <0x17 0x1>; |
115 | }; | 117 | }; |
116 | 118 | ||
117 | plb { | 119 | plb { |
@@ -119,41 +121,41 @@ | |||
119 | #address-cells = <2>; | 121 | #address-cells = <2>; |
120 | #size-cells = <1>; | 122 | #size-cells = <1>; |
121 | ranges; | 123 | ranges; |
122 | clock-frequency = <9896800>; // 160MHz | 124 | clock-frequency = <160000000>; // 160MHz |
123 | 125 | ||
124 | SDRAM0: memory-controller { | 126 | SDRAM0: memory-controller { |
125 | compatible = "ibm,sdram-440gp"; | 127 | compatible = "ibm,sdram-440gp"; |
126 | dcr-reg = <010 2>; | 128 | dcr-reg = <0x010 0x002>; |
127 | // FIXME: anything else? | 129 | // FIXME: anything else? |
128 | }; | 130 | }; |
129 | 131 | ||
130 | SRAM0: sram { | 132 | SRAM0: sram { |
131 | compatible = "ibm,sram-440gp"; | 133 | compatible = "ibm,sram-440gp"; |
132 | dcr-reg = <020 8 00a 1>; | 134 | dcr-reg = <0x020 0x008 0x00a 0x001>; |
133 | }; | 135 | }; |
134 | 136 | ||
135 | DMA0: dma { | 137 | DMA0: dma { |
136 | // FIXME: ??? | 138 | // FIXME: ??? |
137 | compatible = "ibm,dma-440gp"; | 139 | compatible = "ibm,dma-440gp"; |
138 | dcr-reg = <100 027>; | 140 | dcr-reg = <0x100 0x027>; |
139 | }; | 141 | }; |
140 | 142 | ||
141 | MAL0: mcmal { | 143 | MAL0: mcmal { |
142 | compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; | 144 | compatible = "ibm,mcmal-440gx", "ibm,mcmal2"; |
143 | dcr-reg = <180 62>; | 145 | dcr-reg = <0x180 0x062>; |
144 | num-tx-chans = <4>; | 146 | num-tx-chans = <4>; |
145 | num-rx-chans = <4>; | 147 | num-rx-chans = <4>; |
146 | interrupt-parent = <&MAL0>; | 148 | interrupt-parent = <&MAL0>; |
147 | interrupts = <0 1 2 3 4>; | 149 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
148 | #interrupt-cells = <1>; | 150 | #interrupt-cells = <1>; |
149 | #address-cells = <0>; | 151 | #address-cells = <0>; |
150 | #size-cells = <0>; | 152 | #size-cells = <0>; |
151 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 153 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
152 | /*RXEOB*/ 1 &UIC0 b 4 | 154 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
153 | /*SERR*/ 2 &UIC1 0 4 | 155 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
154 | /*TXDE*/ 3 &UIC1 1 4 | 156 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
155 | /*RXDE*/ 4 &UIC1 2 4>; | 157 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
156 | interrupt-map-mask = <ffffffff>; | 158 | interrupt-map-mask = <0xffffffff>; |
157 | }; | 159 | }; |
158 | 160 | ||
159 | POB0: opb { | 161 | POB0: opb { |
@@ -162,29 +164,56 @@ | |||
162 | #size-cells = <1>; | 164 | #size-cells = <1>; |
163 | /* Wish there was a nicer way of specifying a full 32-bit | 165 | /* Wish there was a nicer way of specifying a full 32-bit |
164 | range */ | 166 | range */ |
165 | ranges = <00000000 1 00000000 80000000 | 167 | ranges = <0x00000000 0x00000001 0x00000000 0x80000000 |
166 | 80000000 1 80000000 80000000>; | 168 | 0x80000000 0x00000001 0x80000000 0x80000000>; |
167 | dcr-reg = <090 00b>; | 169 | dcr-reg = <0x090 0x00b>; |
168 | interrupt-parent = <&UIC1>; | 170 | interrupt-parent = <&UIC1>; |
169 | interrupts = <7 4>; | 171 | interrupts = <0x7 0x4>; |
170 | clock-frequency = <4C4B400>; // 80MHz | 172 | clock-frequency = <80000000>; // 80MHz |
171 | 173 | ||
172 | 174 | ||
173 | EBC0: ebc { | 175 | EBC0: ebc { |
174 | compatible = "ibm,ebc-440gx", "ibm,ebc"; | 176 | compatible = "ibm,ebc-440gx", "ibm,ebc"; |
175 | dcr-reg = <012 2>; | 177 | dcr-reg = <0x012 0x002>; |
176 | #address-cells = <2>; | 178 | #address-cells = <2>; |
177 | #size-cells = <1>; | 179 | #size-cells = <1>; |
178 | clock-frequency = <4C4B400>; // 80MHz | 180 | clock-frequency = <80000000>; // 80MHz |
179 | 181 | ||
180 | /* ranges property is supplied by zImage | 182 | /* ranges property is supplied by zImage |
181 | * based on firmware's configuration of the | 183 | * based on firmware's configuration of the |
182 | * EBC bridge */ | 184 | * EBC bridge */ |
183 | 185 | ||
184 | interrupts = <5 4>; | 186 | interrupts = <0x5 0x4>; |
185 | interrupt-parent = <&UIC1>; | 187 | interrupt-parent = <&UIC1>; |
186 | 188 | ||
187 | /* TODO: Add other EBC devices */ | 189 | nor_flash@0,0 { |
190 | compatible = "cfi-flash"; | ||
191 | bank-width = <4>; | ||
192 | device-width = <2>; | ||
193 | reg = <0x0 0x0 0x4000000>; | ||
194 | #address-cells = <1>; | ||
195 | #size-cells = <1>; | ||
196 | partition@0 { | ||
197 | label = "kernel"; | ||
198 | reg = <0x0 0x180000>; | ||
199 | }; | ||
200 | partition@180000 { | ||
201 | label = "root"; | ||
202 | reg = <0x180000 0x200000>; | ||
203 | }; | ||
204 | partition@380000 { | ||
205 | label = "user"; | ||
206 | reg = <0x380000 0x3bc0000>; | ||
207 | }; | ||
208 | partition@3f40000 { | ||
209 | label = "env"; | ||
210 | reg = <0x3f40000 0x80000>; | ||
211 | }; | ||
212 | partition@3fc0000 { | ||
213 | label = "u-boot"; | ||
214 | reg = <0x3fc0000 0x40000>; | ||
215 | }; | ||
216 | }; | ||
188 | }; | 217 | }; |
189 | 218 | ||
190 | 219 | ||
@@ -192,103 +221,103 @@ | |||
192 | UART0: serial@40000200 { | 221 | UART0: serial@40000200 { |
193 | device_type = "serial"; | 222 | device_type = "serial"; |
194 | compatible = "ns16550"; | 223 | compatible = "ns16550"; |
195 | reg = <40000200 8>; | 224 | reg = <0x40000200 0x00000008>; |
196 | virtual-reg = <e0000200>; | 225 | virtual-reg = <0xe0000200>; |
197 | clock-frequency = <A8C000>; | 226 | clock-frequency = <11059200>; |
198 | current-speed = <1C200>; /* 115200 */ | 227 | current-speed = <115200>; /* 115200 */ |
199 | interrupt-parent = <&UIC0>; | 228 | interrupt-parent = <&UIC0>; |
200 | interrupts = <0 4>; | 229 | interrupts = <0x0 0x4>; |
201 | }; | 230 | }; |
202 | 231 | ||
203 | UART1: serial@40000300 { | 232 | UART1: serial@40000300 { |
204 | device_type = "serial"; | 233 | device_type = "serial"; |
205 | compatible = "ns16550"; | 234 | compatible = "ns16550"; |
206 | reg = <40000300 8>; | 235 | reg = <0x40000300 0x00000008>; |
207 | virtual-reg = <e0000300>; | 236 | virtual-reg = <0xe0000300>; |
208 | clock-frequency = <A8C000>; | 237 | clock-frequency = <11059200>; |
209 | current-speed = <1C200>; /* 115200 */ | 238 | current-speed = <115200>; /* 115200 */ |
210 | interrupt-parent = <&UIC0>; | 239 | interrupt-parent = <&UIC0>; |
211 | interrupts = <1 4>; | 240 | interrupts = <0x1 0x4>; |
212 | }; | 241 | }; |
213 | 242 | ||
214 | IIC0: i2c@40000400 { | 243 | IIC0: i2c@40000400 { |
215 | /* FIXME */ | 244 | /* FIXME */ |
216 | compatible = "ibm,iic-440gp", "ibm,iic"; | 245 | compatible = "ibm,iic-440gp", "ibm,iic"; |
217 | reg = <40000400 14>; | 246 | reg = <0x40000400 0x00000014>; |
218 | interrupt-parent = <&UIC0>; | 247 | interrupt-parent = <&UIC0>; |
219 | interrupts = <2 4>; | 248 | interrupts = <0x2 0x4>; |
220 | }; | 249 | }; |
221 | IIC1: i2c@40000500 { | 250 | IIC1: i2c@40000500 { |
222 | /* FIXME */ | 251 | /* FIXME */ |
223 | compatible = "ibm,iic-440gp", "ibm,iic"; | 252 | compatible = "ibm,iic-440gp", "ibm,iic"; |
224 | reg = <40000500 14>; | 253 | reg = <0x40000500 0x00000014>; |
225 | interrupt-parent = <&UIC0>; | 254 | interrupt-parent = <&UIC0>; |
226 | interrupts = <3 4>; | 255 | interrupts = <0x3 0x4>; |
227 | }; | 256 | }; |
228 | 257 | ||
229 | GPIO0: gpio@40000700 { | 258 | GPIO0: gpio@40000700 { |
230 | /* FIXME */ | 259 | /* FIXME */ |
231 | compatible = "ibm,gpio-440gp"; | 260 | compatible = "ibm,gpio-440gp"; |
232 | reg = <40000700 20>; | 261 | reg = <0x40000700 0x00000020>; |
233 | }; | 262 | }; |
234 | 263 | ||
235 | ZMII0: emac-zmii@40000780 { | 264 | ZMII0: emac-zmii@40000780 { |
236 | compatible = "ibm,zmii-440gx", "ibm,zmii"; | 265 | compatible = "ibm,zmii-440gx", "ibm,zmii"; |
237 | reg = <40000780 c>; | 266 | reg = <0x40000780 0x0000000c>; |
238 | }; | 267 | }; |
239 | 268 | ||
240 | RGMII0: emac-rgmii@40000790 { | 269 | RGMII0: emac-rgmii@40000790 { |
241 | compatible = "ibm,rgmii"; | 270 | compatible = "ibm,rgmii"; |
242 | reg = <40000790 8>; | 271 | reg = <0x40000790 0x00000008>; |
243 | }; | 272 | }; |
244 | 273 | ||
245 | TAH0: emac-tah@40000b50 { | 274 | TAH0: emac-tah@40000b50 { |
246 | compatible = "ibm,tah-440gx", "ibm,tah"; | 275 | compatible = "ibm,tah-440gx", "ibm,tah"; |
247 | reg = <40000b50 30>; | 276 | reg = <0x40000b50 0x00000030>; |
248 | }; | 277 | }; |
249 | 278 | ||
250 | TAH1: emac-tah@40000d50 { | 279 | TAH1: emac-tah@40000d50 { |
251 | compatible = "ibm,tah-440gx", "ibm,tah"; | 280 | compatible = "ibm,tah-440gx", "ibm,tah"; |
252 | reg = <40000d50 30>; | 281 | reg = <0x40000d50 0x00000030>; |
253 | }; | 282 | }; |
254 | 283 | ||
255 | EMAC0: ethernet@40000800 { | 284 | EMAC0: ethernet@40000800 { |
256 | unused = <1>; | 285 | unused = <0x1>; |
257 | device_type = "network"; | 286 | device_type = "network"; |
258 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 287 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
259 | interrupt-parent = <&UIC1>; | 288 | interrupt-parent = <&UIC1>; |
260 | interrupts = <1c 4 1d 4>; | 289 | interrupts = <0x1c 0x4 0x1d 0x4>; |
261 | reg = <40000800 70>; | 290 | reg = <0x40000800 0x00000070>; |
262 | local-mac-address = [000000000000]; // Filled in by zImage | 291 | local-mac-address = [000000000000]; // Filled in by zImage |
263 | mal-device = <&MAL0>; | 292 | mal-device = <&MAL0>; |
264 | mal-tx-channel = <0>; | 293 | mal-tx-channel = <0>; |
265 | mal-rx-channel = <0>; | 294 | mal-rx-channel = <0>; |
266 | cell-index = <0>; | 295 | cell-index = <0>; |
267 | max-frame-size = <5dc>; | 296 | max-frame-size = <1500>; |
268 | rx-fifo-size = <1000>; | 297 | rx-fifo-size = <4096>; |
269 | tx-fifo-size = <800>; | 298 | tx-fifo-size = <2048>; |
270 | phy-mode = "rmii"; | 299 | phy-mode = "rmii"; |
271 | phy-map = <00000001>; | 300 | phy-map = <0x00000001>; |
272 | zmii-device = <&ZMII0>; | 301 | zmii-device = <&ZMII0>; |
273 | zmii-channel = <0>; | 302 | zmii-channel = <0>; |
274 | }; | 303 | }; |
275 | EMAC1: ethernet@40000900 { | 304 | EMAC1: ethernet@40000900 { |
276 | unused = <1>; | 305 | unused = <0x1>; |
277 | device_type = "network"; | 306 | device_type = "network"; |
278 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 307 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
279 | interrupt-parent = <&UIC1>; | 308 | interrupt-parent = <&UIC1>; |
280 | interrupts = <1e 4 1f 4>; | 309 | interrupts = <0x1e 0x4 0x1f 0x4>; |
281 | reg = <40000900 70>; | 310 | reg = <0x40000900 0x00000070>; |
282 | local-mac-address = [000000000000]; // Filled in by zImage | 311 | local-mac-address = [000000000000]; // Filled in by zImage |
283 | mal-device = <&MAL0>; | 312 | mal-device = <&MAL0>; |
284 | mal-tx-channel = <1>; | 313 | mal-tx-channel = <1>; |
285 | mal-rx-channel = <1>; | 314 | mal-rx-channel = <1>; |
286 | cell-index = <1>; | 315 | cell-index = <1>; |
287 | max-frame-size = <5dc>; | 316 | max-frame-size = <1500>; |
288 | rx-fifo-size = <1000>; | 317 | rx-fifo-size = <4096>; |
289 | tx-fifo-size = <800>; | 318 | tx-fifo-size = <2048>; |
290 | phy-mode = "rmii"; | 319 | phy-mode = "rmii"; |
291 | phy-map = <00000001>; | 320 | phy-map = <0x00000001>; |
292 | zmii-device = <&ZMII0>; | 321 | zmii-device = <&ZMII0>; |
293 | zmii-channel = <1>; | 322 | zmii-channel = <1>; |
294 | }; | 323 | }; |
@@ -297,18 +326,18 @@ | |||
297 | device_type = "network"; | 326 | device_type = "network"; |
298 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 327 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
299 | interrupt-parent = <&UIC2>; | 328 | interrupt-parent = <&UIC2>; |
300 | interrupts = <0 4 1 4>; | 329 | interrupts = <0x0 0x4 0x1 0x4>; |
301 | reg = <40000c00 70>; | 330 | reg = <0x40000c00 0x00000070>; |
302 | local-mac-address = [000000000000]; // Filled in by zImage | 331 | local-mac-address = [000000000000]; // Filled in by zImage |
303 | mal-device = <&MAL0>; | 332 | mal-device = <&MAL0>; |
304 | mal-tx-channel = <2>; | 333 | mal-tx-channel = <2>; |
305 | mal-rx-channel = <2>; | 334 | mal-rx-channel = <2>; |
306 | cell-index = <2>; | 335 | cell-index = <2>; |
307 | max-frame-size = <2328>; | 336 | max-frame-size = <9000>; |
308 | rx-fifo-size = <1000>; | 337 | rx-fifo-size = <4096>; |
309 | tx-fifo-size = <800>; | 338 | tx-fifo-size = <2048>; |
310 | phy-mode = "rgmii"; | 339 | phy-mode = "rgmii"; |
311 | phy-map = <00000001>; | 340 | phy-map = <0x00000001>; |
312 | rgmii-device = <&RGMII0>; | 341 | rgmii-device = <&RGMII0>; |
313 | rgmii-channel = <0>; | 342 | rgmii-channel = <0>; |
314 | zmii-device = <&ZMII0>; | 343 | zmii-device = <&ZMII0>; |
@@ -321,18 +350,18 @@ | |||
321 | device_type = "network"; | 350 | device_type = "network"; |
322 | compatible = "ibm,emac-440gx", "ibm,emac4"; | 351 | compatible = "ibm,emac-440gx", "ibm,emac4"; |
323 | interrupt-parent = <&UIC2>; | 352 | interrupt-parent = <&UIC2>; |
324 | interrupts = <2 4 3 4>; | 353 | interrupts = <0x2 0x4 0x3 0x4>; |
325 | reg = <40000e00 70>; | 354 | reg = <0x40000e00 0x00000070>; |
326 | local-mac-address = [000000000000]; // Filled in by zImage | 355 | local-mac-address = [000000000000]; // Filled in by zImage |
327 | mal-device = <&MAL0>; | 356 | mal-device = <&MAL0>; |
328 | mal-tx-channel = <3>; | 357 | mal-tx-channel = <3>; |
329 | mal-rx-channel = <3>; | 358 | mal-rx-channel = <3>; |
330 | cell-index = <3>; | 359 | cell-index = <3>; |
331 | max-frame-size = <2328>; | 360 | max-frame-size = <9000>; |
332 | rx-fifo-size = <1000>; | 361 | rx-fifo-size = <4096>; |
333 | tx-fifo-size = <800>; | 362 | tx-fifo-size = <2048>; |
334 | phy-mode = "rgmii"; | 363 | phy-mode = "rgmii"; |
335 | phy-map = <00000003>; | 364 | phy-map = <0x00000003>; |
336 | rgmii-device = <&RGMII0>; | 365 | rgmii-device = <&RGMII0>; |
337 | rgmii-channel = <1>; | 366 | rgmii-channel = <1>; |
338 | zmii-device = <&ZMII0>; | 367 | zmii-device = <&ZMII0>; |
@@ -344,9 +373,9 @@ | |||
344 | 373 | ||
345 | GPT0: gpt@40000a00 { | 374 | GPT0: gpt@40000a00 { |
346 | /* FIXME */ | 375 | /* FIXME */ |
347 | reg = <40000a00 d4>; | 376 | reg = <0x40000a00 0x000000d4>; |
348 | interrupt-parent = <&UIC0>; | 377 | interrupt-parent = <&UIC0>; |
349 | interrupts = <12 4 13 4 14 4 15 4 16 4>; | 378 | interrupts = <0x12 0x4 0x13 0x4 0x14 0x4 0x15 0x4 0x16 0x4>; |
350 | }; | 379 | }; |
351 | 380 | ||
352 | }; | 381 | }; |
@@ -360,34 +389,34 @@ | |||
360 | primary; | 389 | primary; |
361 | large-inbound-windows; | 390 | large-inbound-windows; |
362 | enable-msi-hole; | 391 | enable-msi-hole; |
363 | reg = <2 0ec00000 8 /* Config space access */ | 392 | reg = <0x00000002 0x0ec00000 0x00000008 /* Config space access */ |
364 | 0 0 0 /* no IACK cycles */ | 393 | 0x00000000 0x00000000 0x00000000 /* no IACK cycles */ |
365 | 2 0ed00000 4 /* Special cycles */ | 394 | 0x00000002 0x0ed00000 0x00000004 /* Special cycles */ |
366 | 2 0ec80000 100 /* Internal registers */ | 395 | 0x00000002 0x0ec80000 0x00000100 /* Internal registers */ |
367 | 2 0ec80100 fc>; /* Internal messaging registers */ | 396 | 0x00000002 0x0ec80100 0x000000fc>; /* Internal messaging registers */ |
368 | 397 | ||
369 | /* Outbound ranges, one memory and one IO, | 398 | /* Outbound ranges, one memory and one IO, |
370 | * later cannot be changed | 399 | * later cannot be changed |
371 | */ | 400 | */ |
372 | ranges = <02000000 0 80000000 00000003 80000000 0 80000000 | 401 | ranges = <0x02000000 0x00000000 0x80000000 0x00000003 0x80000000 0x00000000 0x80000000 |
373 | 01000000 0 00000000 00000002 08000000 0 00010000>; | 402 | 0x01000000 0x00000000 0x00000000 0x00000002 0x08000000 0x00000000 0x00010000>; |
374 | 403 | ||
375 | /* Inbound 2GB range starting at 0 */ | 404 | /* Inbound 2GB range starting at 0 */ |
376 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 405 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
377 | 406 | ||
378 | interrupt-map-mask = <f800 0 0 7>; | 407 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; |
379 | interrupt-map = < | 408 | interrupt-map = < |
380 | /* IDSEL 1 */ | 409 | /* IDSEL 1 */ |
381 | 0800 0 0 1 &UIC0 17 8 | 410 | 0x800 0x0 0x0 0x1 &UIC0 0x17 0x8 |
382 | 0800 0 0 2 &UIC0 18 8 | 411 | 0x800 0x0 0x0 0x2 &UIC0 0x18 0x8 |
383 | 0800 0 0 3 &UIC0 19 8 | 412 | 0x800 0x0 0x0 0x3 &UIC0 0x19 0x8 |
384 | 0800 0 0 4 &UIC0 1a 8 | 413 | 0x800 0x0 0x0 0x4 &UIC0 0x1a 0x8 |
385 | 414 | ||
386 | /* IDSEL 2 */ | 415 | /* IDSEL 2 */ |
387 | 1000 0 0 1 &UIC0 18 8 | 416 | 0x1000 0x0 0x0 0x1 &UIC0 0x18 0x8 |
388 | 1000 0 0 2 &UIC0 19 8 | 417 | 0x1000 0x0 0x0 0x2 &UIC0 0x19 0x8 |
389 | 1000 0 0 3 &UIC0 1a 8 | 418 | 0x1000 0x0 0x0 0x3 &UIC0 0x1a 0x8 |
390 | 1000 0 0 4 &UIC0 17 8 | 419 | 0x1000 0x0 0x0 0x4 &UIC0 0x17 0x8 |
391 | >; | 420 | >; |
392 | }; | 421 | }; |
393 | }; | 422 | }; |
diff --git a/arch/powerpc/boot/dts/tqm8540.dts b/arch/powerpc/boot/dts/tqm8540.dts index 1addb3ae719e..e1d260b9085e 100644 --- a/arch/powerpc/boot/dts/tqm8540.dts +++ b/arch/powerpc/boot/dts/tqm8540.dts | |||
@@ -12,8 +12,8 @@ | |||
12 | /dts-v1/; | 12 | /dts-v1/; |
13 | 13 | ||
14 | / { | 14 | / { |
15 | model = "tqm,8540"; | 15 | model = "tqc,tqm8540"; |
16 | compatible = "tqm,8540", "tqm,85xx"; | 16 | compatible = "tqc,tqm8540"; |
17 | #address-cells = <1>; | 17 | #address-cells = <1>; |
18 | #size-cells = <1>; | 18 | #size-cells = <1>; |
19 | 19 | ||
@@ -40,6 +40,7 @@ | |||
40 | timebase-frequency = <0>; | 40 | timebase-frequency = <0>; |
41 | bus-frequency = <0>; | 41 | bus-frequency = <0>; |
42 | clock-frequency = <0>; | 42 | clock-frequency = <0>; |
43 | next-level-cache = <&L2>; | ||
43 | }; | 44 | }; |
44 | }; | 45 | }; |
45 | 46 | ||
@@ -64,7 +65,7 @@ | |||
64 | interrupts = <18 2>; | 65 | interrupts = <18 2>; |
65 | }; | 66 | }; |
66 | 67 | ||
67 | l2-cache-controller@20000 { | 68 | L2: l2-cache-controller@20000 { |
68 | compatible = "fsl,8540-l2-cache-controller"; | 69 | compatible = "fsl,8540-l2-cache-controller"; |
69 | reg = <0x20000 0x1000>; | 70 | reg = <0x20000 0x1000>; |
70 | cache-line-size = <32>; | 71 | cache-line-size = <32>; |
@@ -89,6 +90,47 @@ | |||
89 | }; | 90 | }; |
90 | }; | 91 | }; |
91 | 92 | ||
93 | dma@21300 { | ||
94 | #address-cells = <1>; | ||
95 | #size-cells = <1>; | ||
96 | compatible = "fsl,mpc8540-dma", "fsl,eloplus-dma"; | ||
97 | reg = <0x21300 0x4>; | ||
98 | ranges = <0x0 0x21100 0x200>; | ||
99 | cell-index = <0>; | ||
100 | dma-channel@0 { | ||
101 | compatible = "fsl,mpc8540-dma-channel", | ||
102 | "fsl,eloplus-dma-channel"; | ||
103 | reg = <0x0 0x80>; | ||
104 | cell-index = <0>; | ||
105 | interrupt-parent = <&mpic>; | ||
106 | interrupts = <20 2>; | ||
107 | }; | ||
108 | dma-channel@80 { | ||
109 | compatible = "fsl,mpc8540-dma-channel", | ||
110 | "fsl,eloplus-dma-channel"; | ||
111 | reg = <0x80 0x80>; | ||
112 | cell-index = <1>; | ||
113 | interrupt-parent = <&mpic>; | ||
114 | interrupts = <21 2>; | ||
115 | }; | ||
116 | dma-channel@100 { | ||
117 | compatible = "fsl,mpc8540-dma-channel", | ||
118 | "fsl,eloplus-dma-channel"; | ||
119 | reg = <0x100 0x80>; | ||
120 | cell-index = <2>; | ||
121 | interrupt-parent = <&mpic>; | ||
122 | interrupts = <22 2>; | ||
123 | }; | ||
124 | dma-channel@180 { | ||
125 | compatible = "fsl,mpc8540-dma-channel", | ||
126 | "fsl,eloplus-dma-channel"; | ||
127 | reg = <0x180 0x80>; | ||
128 | cell-index = <3>; | ||
129 | interrupt-parent = <&mpic>; | ||
130 | interrupts = <23 2>; | ||
131 | }; | ||
132 | }; | ||
133 | |||
92 | mdio@24520 { | 134 | mdio@24520 { |
93 | #address-cells = <1>; | 135 | #address-cells = <1>; |
94 | #size-cells = <0>; | 136 | #size-cells = <0>; |
@@ -177,6 +219,7 @@ | |||
177 | #interrupt-cells = <2>; | 219 | #interrupt-cells = <2>; |
178 | reg = <0x40000 0x40000>; | 220 | reg = <0x40000 0x40000>; |
179 | device_type = "open-pic"; | 221 | device_type = "open-pic"; |
222 | compatible = "chrp,open-pic"; | ||
180 | }; | 223 | }; |
181 | }; | 224 | }; |
182 | 225 | ||
diff --git a/arch/powerpc/boot/dts/tqm8541.dts b/arch/powerpc/boot/dts/tqm8541.dts index 9e01093f496e..d083a648a81d 100644 --- a/arch/powerpc/boot/dts/tqm8541.dts +++ b/arch/powerpc/boot/dts/tqm8541.dts | |||
@@ -12,8 +12,8 @@ | |||
12 | /dts-v1/; | 12 | /dts-v1/; |
13 | 13 | ||
14 | / { | 14 | / { |
15 | model = "tqm,8541"; | 15 | model = "tqc,tqm8541"; |
16 | compatible = "tqm,8541", "tqm,85xx"; | 16 | compatible = "tqc,tqm8541"; |
17 | #address-cells = <1>; | 17 | #address-cells = <1>; |
18 | #size-cells = <1>; | 18 | #size-cells = <1>; |
19 | 19 | ||
@@ -39,6 +39,7 @@ | |||
39 | timebase-frequency = <0>; | 39 | timebase-frequency = <0>; |
40 | bus-frequency = <0>; | 40 | bus-frequency = <0>; |
41 | clock-frequency = <0>; | 41 | clock-frequency = <0>; |
42 | next-level-cache = <&L2>; | ||
42 | }; | 43 | }; |
43 | }; | 44 | }; |
44 | 45 | ||
@@ -63,7 +64,7 @@ | |||
63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
64 | }; | 65 | }; |
65 | 66 | ||
66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
69 | cache-line-size = <32>; | 70 | cache-line-size = <32>; |
@@ -88,6 +89,47 @@ | |||
88 | }; | 89 | }; |
89 | }; | 90 | }; |
90 | 91 | ||
92 | dma@21300 { | ||
93 | #address-cells = <1>; | ||
94 | #size-cells = <1>; | ||
95 | compatible = "fsl,mpc8541-dma", "fsl,eloplus-dma"; | ||
96 | reg = <0x21300 0x4>; | ||
97 | ranges = <0x0 0x21100 0x200>; | ||
98 | cell-index = <0>; | ||
99 | dma-channel@0 { | ||
100 | compatible = "fsl,mpc8541-dma-channel", | ||
101 | "fsl,eloplus-dma-channel"; | ||
102 | reg = <0x0 0x80>; | ||
103 | cell-index = <0>; | ||
104 | interrupt-parent = <&mpic>; | ||
105 | interrupts = <20 2>; | ||
106 | }; | ||
107 | dma-channel@80 { | ||
108 | compatible = "fsl,mpc8541-dma-channel", | ||
109 | "fsl,eloplus-dma-channel"; | ||
110 | reg = <0x80 0x80>; | ||
111 | cell-index = <1>; | ||
112 | interrupt-parent = <&mpic>; | ||
113 | interrupts = <21 2>; | ||
114 | }; | ||
115 | dma-channel@100 { | ||
116 | compatible = "fsl,mpc8541-dma-channel", | ||
117 | "fsl,eloplus-dma-channel"; | ||
118 | reg = <0x100 0x80>; | ||
119 | cell-index = <2>; | ||
120 | interrupt-parent = <&mpic>; | ||
121 | interrupts = <22 2>; | ||
122 | }; | ||
123 | dma-channel@180 { | ||
124 | compatible = "fsl,mpc8541-dma-channel", | ||
125 | "fsl,eloplus-dma-channel"; | ||
126 | reg = <0x180 0x80>; | ||
127 | cell-index = <3>; | ||
128 | interrupt-parent = <&mpic>; | ||
129 | interrupts = <23 2>; | ||
130 | }; | ||
131 | }; | ||
132 | |||
91 | mdio@24520 { | 133 | mdio@24520 { |
92 | #address-cells = <1>; | 134 | #address-cells = <1>; |
93 | #size-cells = <0>; | 135 | #size-cells = <0>; |
@@ -164,6 +206,7 @@ | |||
164 | #interrupt-cells = <2>; | 206 | #interrupt-cells = <2>; |
165 | reg = <0x40000 0x40000>; | 207 | reg = <0x40000 0x40000>; |
166 | device_type = "open-pic"; | 208 | device_type = "open-pic"; |
209 | compatible = "chrp,open-pic"; | ||
167 | }; | 210 | }; |
168 | 211 | ||
169 | cpm@919c0 { | 212 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/tqm8548-bigflash.dts b/arch/powerpc/boot/dts/tqm8548-bigflash.dts new file mode 100644 index 000000000000..64d2d5bbcdf1 --- /dev/null +++ b/arch/powerpc/boot/dts/tqm8548-bigflash.dts | |||
@@ -0,0 +1,406 @@ | |||
1 | /* | ||
2 | * TQM8548 Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * Copyright 2008 Wolfgang Grandegger <wg@denx.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | model = "tqc,tqm8548"; | ||
17 | compatible = "tqc,tqm8548"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = &enet0; | ||
23 | ethernet1 = &enet1; | ||
24 | ethernet2 = &enet2; | ||
25 | ethernet3 = &enet3; | ||
26 | |||
27 | serial0 = &serial0; | ||
28 | serial1 = &serial1; | ||
29 | pci0 = &pci0; | ||
30 | pci1 = &pci1; | ||
31 | }; | ||
32 | |||
33 | cpus { | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <0>; | ||
36 | |||
37 | PowerPC,8548@0 { | ||
38 | device_type = "cpu"; | ||
39 | reg = <0>; | ||
40 | d-cache-line-size = <32>; // 32 bytes | ||
41 | i-cache-line-size = <32>; // 32 bytes | ||
42 | d-cache-size = <0x8000>; // L1, 32K | ||
43 | i-cache-size = <0x8000>; // L1, 32K | ||
44 | next-level-cache = <&L2>; | ||
45 | }; | ||
46 | }; | ||
47 | |||
48 | memory { | ||
49 | device_type = "memory"; | ||
50 | reg = <0x00000000 0x00000000>; // Filled in by U-Boot | ||
51 | }; | ||
52 | |||
53 | soc8548@a0000000 { | ||
54 | #address-cells = <1>; | ||
55 | #size-cells = <1>; | ||
56 | device_type = "soc"; | ||
57 | ranges = <0x0 0xa0000000 0x100000>; | ||
58 | reg = <0xa0000000 0x1000>; // CCSRBAR | ||
59 | bus-frequency = <0>; | ||
60 | |||
61 | memory-controller@2000 { | ||
62 | compatible = "fsl,mpc8548-memory-controller"; | ||
63 | reg = <0x2000 0x1000>; | ||
64 | interrupt-parent = <&mpic>; | ||
65 | interrupts = <18 2>; | ||
66 | }; | ||
67 | |||
68 | L2: l2-cache-controller@20000 { | ||
69 | compatible = "fsl,mpc8548-l2-cache-controller"; | ||
70 | reg = <0x20000 0x1000>; | ||
71 | cache-line-size = <32>; // 32 bytes | ||
72 | cache-size = <0x80000>; // L2, 512K | ||
73 | interrupt-parent = <&mpic>; | ||
74 | interrupts = <16 2>; | ||
75 | }; | ||
76 | |||
77 | i2c@3000 { | ||
78 | #address-cells = <1>; | ||
79 | #size-cells = <0>; | ||
80 | cell-index = <0>; | ||
81 | compatible = "fsl-i2c"; | ||
82 | reg = <0x3000 0x100>; | ||
83 | interrupts = <43 2>; | ||
84 | interrupt-parent = <&mpic>; | ||
85 | dfsrr; | ||
86 | }; | ||
87 | |||
88 | i2c@3100 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | cell-index = <1>; | ||
92 | compatible = "fsl-i2c"; | ||
93 | reg = <0x3100 0x100>; | ||
94 | interrupts = <43 2>; | ||
95 | interrupt-parent = <&mpic>; | ||
96 | dfsrr; | ||
97 | }; | ||
98 | |||
99 | dma@21300 { | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <1>; | ||
102 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
103 | reg = <0x21300 0x4>; | ||
104 | ranges = <0x0 0x21100 0x200>; | ||
105 | cell-index = <0>; | ||
106 | dma-channel@0 { | ||
107 | compatible = "fsl,mpc8548-dma-channel", | ||
108 | "fsl,eloplus-dma-channel"; | ||
109 | reg = <0x0 0x80>; | ||
110 | cell-index = <0>; | ||
111 | interrupt-parent = <&mpic>; | ||
112 | interrupts = <20 2>; | ||
113 | }; | ||
114 | dma-channel@80 { | ||
115 | compatible = "fsl,mpc8548-dma-channel", | ||
116 | "fsl,eloplus-dma-channel"; | ||
117 | reg = <0x80 0x80>; | ||
118 | cell-index = <1>; | ||
119 | interrupt-parent = <&mpic>; | ||
120 | interrupts = <21 2>; | ||
121 | }; | ||
122 | dma-channel@100 { | ||
123 | compatible = "fsl,mpc8548-dma-channel", | ||
124 | "fsl,eloplus-dma-channel"; | ||
125 | reg = <0x100 0x80>; | ||
126 | cell-index = <2>; | ||
127 | interrupt-parent = <&mpic>; | ||
128 | interrupts = <22 2>; | ||
129 | }; | ||
130 | dma-channel@180 { | ||
131 | compatible = "fsl,mpc8548-dma-channel", | ||
132 | "fsl,eloplus-dma-channel"; | ||
133 | reg = <0x180 0x80>; | ||
134 | cell-index = <3>; | ||
135 | interrupt-parent = <&mpic>; | ||
136 | interrupts = <23 2>; | ||
137 | }; | ||
138 | }; | ||
139 | |||
140 | mdio@24520 { | ||
141 | #address-cells = <1>; | ||
142 | #size-cells = <0>; | ||
143 | compatible = "fsl,gianfar-mdio"; | ||
144 | reg = <0x24520 0x20>; | ||
145 | |||
146 | phy1: ethernet-phy@0 { | ||
147 | interrupt-parent = <&mpic>; | ||
148 | interrupts = <8 1>; | ||
149 | reg = <1>; | ||
150 | device_type = "ethernet-phy"; | ||
151 | }; | ||
152 | phy2: ethernet-phy@1 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <8 1>; | ||
155 | reg = <2>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | phy3: ethernet-phy@3 { | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <8 1>; | ||
161 | reg = <3>; | ||
162 | device_type = "ethernet-phy"; | ||
163 | }; | ||
164 | phy4: ethernet-phy@4 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <8 1>; | ||
167 | reg = <4>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy5: ethernet-phy@5 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <8 1>; | ||
173 | reg = <5>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | }; | ||
177 | |||
178 | enet0: ethernet@24000 { | ||
179 | cell-index = <0>; | ||
180 | device_type = "network"; | ||
181 | model = "eTSEC"; | ||
182 | compatible = "gianfar"; | ||
183 | reg = <0x24000 0x1000>; | ||
184 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
185 | interrupts = <29 2 30 2 34 2>; | ||
186 | interrupt-parent = <&mpic>; | ||
187 | phy-handle = <&phy2>; | ||
188 | }; | ||
189 | |||
190 | enet1: ethernet@25000 { | ||
191 | cell-index = <1>; | ||
192 | device_type = "network"; | ||
193 | model = "eTSEC"; | ||
194 | compatible = "gianfar"; | ||
195 | reg = <0x25000 0x1000>; | ||
196 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
197 | interrupts = <35 2 36 2 40 2>; | ||
198 | interrupt-parent = <&mpic>; | ||
199 | phy-handle = <&phy1>; | ||
200 | }; | ||
201 | |||
202 | enet2: ethernet@26000 { | ||
203 | cell-index = <2>; | ||
204 | device_type = "network"; | ||
205 | model = "eTSEC"; | ||
206 | compatible = "gianfar"; | ||
207 | reg = <0x26000 0x1000>; | ||
208 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
209 | interrupts = <31 2 32 2 33 2>; | ||
210 | interrupt-parent = <&mpic>; | ||
211 | phy-handle = <&phy3>; | ||
212 | }; | ||
213 | |||
214 | enet3: ethernet@27000 { | ||
215 | cell-index = <3>; | ||
216 | device_type = "network"; | ||
217 | model = "eTSEC"; | ||
218 | compatible = "gianfar"; | ||
219 | reg = <0x27000 0x1000>; | ||
220 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
221 | interrupts = <37 2 38 2 39 2>; | ||
222 | interrupt-parent = <&mpic>; | ||
223 | phy-handle = <&phy4>; | ||
224 | }; | ||
225 | |||
226 | serial0: serial@4500 { | ||
227 | cell-index = <0>; | ||
228 | device_type = "serial"; | ||
229 | compatible = "ns16550"; | ||
230 | reg = <0x4500 0x100>; // reg base, size | ||
231 | clock-frequency = <0>; // should we fill in in uboot? | ||
232 | current-speed = <115200>; | ||
233 | interrupts = <42 2>; | ||
234 | interrupt-parent = <&mpic>; | ||
235 | }; | ||
236 | |||
237 | serial1: serial@4600 { | ||
238 | cell-index = <1>; | ||
239 | device_type = "serial"; | ||
240 | compatible = "ns16550"; | ||
241 | reg = <0x4600 0x100>; // reg base, size | ||
242 | clock-frequency = <0>; // should we fill in in uboot? | ||
243 | current-speed = <115200>; | ||
244 | interrupts = <42 2>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | }; | ||
247 | |||
248 | global-utilities@e0000 { // global utilities reg | ||
249 | compatible = "fsl,mpc8548-guts"; | ||
250 | reg = <0xe0000 0x1000>; | ||
251 | fsl,has-rstcr; | ||
252 | }; | ||
253 | |||
254 | mpic: pic@40000 { | ||
255 | interrupt-controller; | ||
256 | #address-cells = <0>; | ||
257 | #interrupt-cells = <2>; | ||
258 | reg = <0x40000 0x40000>; | ||
259 | compatible = "chrp,open-pic"; | ||
260 | device_type = "open-pic"; | ||
261 | }; | ||
262 | }; | ||
263 | |||
264 | localbus@a0005000 { | ||
265 | compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", | ||
266 | "simple-bus"; | ||
267 | #address-cells = <2>; | ||
268 | #size-cells = <1>; | ||
269 | reg = <0xa0005000 0x100>; // BRx, ORx, etc. | ||
270 | |||
271 | ranges = < | ||
272 | 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 | ||
273 | 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 | ||
274 | 2 0x0 0xa3000000 0x00008000 // CAN (2 x i82527) | ||
275 | 3 0x0 0xa3010000 0x00008000 // NAND FLASH | ||
276 | |||
277 | >; | ||
278 | |||
279 | flash@1,0 { | ||
280 | #address-cells = <1>; | ||
281 | #size-cells = <1>; | ||
282 | compatible = "cfi-flash"; | ||
283 | reg = <1 0x0 0x8000000>; | ||
284 | bank-width = <4>; | ||
285 | device-width = <1>; | ||
286 | |||
287 | partition@0 { | ||
288 | label = "kernel"; | ||
289 | reg = <0x00000000 0x00200000>; | ||
290 | }; | ||
291 | partition@200000 { | ||
292 | label = "root"; | ||
293 | reg = <0x00200000 0x00300000>; | ||
294 | }; | ||
295 | partition@500000 { | ||
296 | label = "user"; | ||
297 | reg = <0x00500000 0x07a00000>; | ||
298 | }; | ||
299 | partition@7f00000 { | ||
300 | label = "env1"; | ||
301 | reg = <0x07f00000 0x00040000>; | ||
302 | }; | ||
303 | partition@7f40000 { | ||
304 | label = "env2"; | ||
305 | reg = <0x07f40000 0x00040000>; | ||
306 | }; | ||
307 | partition@7f80000 { | ||
308 | label = "u-boot"; | ||
309 | reg = <0x07f80000 0x00080000>; | ||
310 | read-only; | ||
311 | }; | ||
312 | }; | ||
313 | |||
314 | /* Note: CAN support needs be enabled in U-Boot */ | ||
315 | can0@2,0 { | ||
316 | compatible = "intel,82527"; // Bosch CC770 | ||
317 | reg = <2 0x0 0x100>; | ||
318 | interrupts = <4 0>; | ||
319 | interrupt-parent = <&mpic>; | ||
320 | }; | ||
321 | |||
322 | can1@2,100 { | ||
323 | compatible = "intel,82527"; // Bosch CC770 | ||
324 | reg = <2 0x100 0x100>; | ||
325 | interrupts = <4 0>; | ||
326 | interrupt-parent = <&mpic>; | ||
327 | }; | ||
328 | |||
329 | /* Note: NAND support needs to be enabled in U-Boot */ | ||
330 | upm@3,0 { | ||
331 | #address-cells = <0>; | ||
332 | #size-cells = <0>; | ||
333 | compatible = "fsl,upm-nand"; | ||
334 | reg = <3 0x0 0x800>; | ||
335 | fsl,upm-addr-offset = <0x10>; | ||
336 | fsl,upm-cmd-offset = <0x08>; | ||
337 | chip-delay = <25>; // in micro-seconds | ||
338 | |||
339 | nand@0 { | ||
340 | #address-cells = <1>; | ||
341 | #size-cells = <1>; | ||
342 | |||
343 | partition@0 { | ||
344 | label = "fs"; | ||
345 | reg = <0x00000000 0x01000000>; | ||
346 | }; | ||
347 | }; | ||
348 | }; | ||
349 | }; | ||
350 | |||
351 | pci0: pci@a0008000 { | ||
352 | cell-index = <0>; | ||
353 | #interrupt-cells = <1>; | ||
354 | #size-cells = <2>; | ||
355 | #address-cells = <3>; | ||
356 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | ||
357 | device_type = "pci"; | ||
358 | reg = <0xa0008000 0x1000>; | ||
359 | clock-frequency = <33333333>; | ||
360 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
361 | interrupt-map = < | ||
362 | /* IDSEL 28 */ | ||
363 | 0xe000 0 0 1 &mpic 2 1 | ||
364 | 0xe000 0 0 2 &mpic 3 1>; | ||
365 | |||
366 | interrupt-parent = <&mpic>; | ||
367 | interrupts = <24 2>; | ||
368 | bus-range = <0 0>; | ||
369 | ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 | ||
370 | 0x01000000 0 0x00000000 0xa2000000 0 0x01000000>; | ||
371 | }; | ||
372 | |||
373 | pci1: pcie@a000a000 { | ||
374 | cell-index = <2>; | ||
375 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
376 | interrupt-map = < | ||
377 | /* IDSEL 0x0 (PEX) */ | ||
378 | 0x00000 0 0 1 &mpic 0 1 | ||
379 | 0x00000 0 0 2 &mpic 1 1 | ||
380 | 0x00000 0 0 3 &mpic 2 1 | ||
381 | 0x00000 0 0 4 &mpic 3 1>; | ||
382 | |||
383 | interrupt-parent = <&mpic>; | ||
384 | interrupts = <26 2>; | ||
385 | bus-range = <0 0xff>; | ||
386 | ranges = <0x02000000 0 0xb0000000 0xb0000000 0 0x10000000 | ||
387 | 0x01000000 0 0x00000000 0xaf000000 0 0x08000000>; | ||
388 | clock-frequency = <33333333>; | ||
389 | #interrupt-cells = <1>; | ||
390 | #size-cells = <2>; | ||
391 | #address-cells = <3>; | ||
392 | reg = <0xa000a000 0x1000>; | ||
393 | compatible = "fsl,mpc8548-pcie"; | ||
394 | device_type = "pci"; | ||
395 | pcie@0 { | ||
396 | reg = <0 0 0 0 0>; | ||
397 | #size-cells = <2>; | ||
398 | #address-cells = <3>; | ||
399 | device_type = "pci"; | ||
400 | ranges = <0x02000000 0 0xb0000000 0x02000000 0 | ||
401 | 0xb0000000 0 0x10000000 | ||
402 | 0x01000000 0 0x00000000 0x01000000 0 | ||
403 | 0x00000000 0 0x08000000>; | ||
404 | }; | ||
405 | }; | ||
406 | }; | ||
diff --git a/arch/powerpc/boot/dts/tqm8548.dts b/arch/powerpc/boot/dts/tqm8548.dts new file mode 100644 index 000000000000..13cd7280cb26 --- /dev/null +++ b/arch/powerpc/boot/dts/tqm8548.dts | |||
@@ -0,0 +1,406 @@ | |||
1 | /* | ||
2 | * TQM8548 Device Tree Source | ||
3 | * | ||
4 | * Copyright 2006 Freescale Semiconductor Inc. | ||
5 | * Copyright 2008 Wolfgang Grandegger <wg@denx.de> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or modify it | ||
8 | * under the terms of the GNU General Public License as published by the | ||
9 | * Free Software Foundation; either version 2 of the License, or (at your | ||
10 | * option) any later version. | ||
11 | */ | ||
12 | |||
13 | /dts-v1/; | ||
14 | |||
15 | / { | ||
16 | model = "tqc,tqm8548"; | ||
17 | compatible = "tqc,tqm8548"; | ||
18 | #address-cells = <1>; | ||
19 | #size-cells = <1>; | ||
20 | |||
21 | aliases { | ||
22 | ethernet0 = &enet0; | ||
23 | ethernet1 = &enet1; | ||
24 | ethernet2 = &enet2; | ||
25 | ethernet3 = &enet3; | ||
26 | |||
27 | serial0 = &serial0; | ||
28 | serial1 = &serial1; | ||
29 | pci0 = &pci0; | ||
30 | pci1 = &pci1; | ||
31 | }; | ||
32 | |||
33 | cpus { | ||
34 | #address-cells = <1>; | ||
35 | #size-cells = <0>; | ||
36 | |||
37 | PowerPC,8548@0 { | ||
38 | device_type = "cpu"; | ||
39 | reg = <0>; | ||
40 | d-cache-line-size = <32>; // 32 bytes | ||
41 | i-cache-line-size = <32>; // 32 bytes | ||
42 | d-cache-size = <0x8000>; // L1, 32K | ||
43 | i-cache-size = <0x8000>; // L1, 32K | ||
44 | next-level-cache = <&L2>; | ||
45 | }; | ||
46 | }; | ||
47 | |||
48 | memory { | ||
49 | device_type = "memory"; | ||
50 | reg = <0x00000000 0x00000000>; // Filled in by U-Boot | ||
51 | }; | ||
52 | |||
53 | soc8548@e0000000 { | ||
54 | #address-cells = <1>; | ||
55 | #size-cells = <1>; | ||
56 | device_type = "soc"; | ||
57 | ranges = <0x0 0xe0000000 0x100000>; | ||
58 | reg = <0xe0000000 0x1000>; // CCSRBAR | ||
59 | bus-frequency = <0>; | ||
60 | |||
61 | memory-controller@2000 { | ||
62 | compatible = "fsl,mpc8548-memory-controller"; | ||
63 | reg = <0x2000 0x1000>; | ||
64 | interrupt-parent = <&mpic>; | ||
65 | interrupts = <18 2>; | ||
66 | }; | ||
67 | |||
68 | L2: l2-cache-controller@20000 { | ||
69 | compatible = "fsl,mpc8548-l2-cache-controller"; | ||
70 | reg = <0x20000 0x1000>; | ||
71 | cache-line-size = <32>; // 32 bytes | ||
72 | cache-size = <0x80000>; // L2, 512K | ||
73 | interrupt-parent = <&mpic>; | ||
74 | interrupts = <16 2>; | ||
75 | }; | ||
76 | |||
77 | i2c@3000 { | ||
78 | #address-cells = <1>; | ||
79 | #size-cells = <0>; | ||
80 | cell-index = <0>; | ||
81 | compatible = "fsl-i2c"; | ||
82 | reg = <0x3000 0x100>; | ||
83 | interrupts = <43 2>; | ||
84 | interrupt-parent = <&mpic>; | ||
85 | dfsrr; | ||
86 | }; | ||
87 | |||
88 | i2c@3100 { | ||
89 | #address-cells = <1>; | ||
90 | #size-cells = <0>; | ||
91 | cell-index = <1>; | ||
92 | compatible = "fsl-i2c"; | ||
93 | reg = <0x3100 0x100>; | ||
94 | interrupts = <43 2>; | ||
95 | interrupt-parent = <&mpic>; | ||
96 | dfsrr; | ||
97 | }; | ||
98 | |||
99 | dma@21300 { | ||
100 | #address-cells = <1>; | ||
101 | #size-cells = <1>; | ||
102 | compatible = "fsl,mpc8548-dma", "fsl,eloplus-dma"; | ||
103 | reg = <0x21300 0x4>; | ||
104 | ranges = <0x0 0x21100 0x200>; | ||
105 | cell-index = <0>; | ||
106 | dma-channel@0 { | ||
107 | compatible = "fsl,mpc8548-dma-channel", | ||
108 | "fsl,eloplus-dma-channel"; | ||
109 | reg = <0x0 0x80>; | ||
110 | cell-index = <0>; | ||
111 | interrupt-parent = <&mpic>; | ||
112 | interrupts = <20 2>; | ||
113 | }; | ||
114 | dma-channel@80 { | ||
115 | compatible = "fsl,mpc8548-dma-channel", | ||
116 | "fsl,eloplus-dma-channel"; | ||
117 | reg = <0x80 0x80>; | ||
118 | cell-index = <1>; | ||
119 | interrupt-parent = <&mpic>; | ||
120 | interrupts = <21 2>; | ||
121 | }; | ||
122 | dma-channel@100 { | ||
123 | compatible = "fsl,mpc8548-dma-channel", | ||
124 | "fsl,eloplus-dma-channel"; | ||
125 | reg = <0x100 0x80>; | ||
126 | cell-index = <2>; | ||
127 | interrupt-parent = <&mpic>; | ||
128 | interrupts = <22 2>; | ||
129 | }; | ||
130 | dma-channel@180 { | ||
131 | compatible = "fsl,mpc8548-dma-channel", | ||
132 | "fsl,eloplus-dma-channel"; | ||
133 | reg = <0x180 0x80>; | ||
134 | cell-index = <3>; | ||
135 | interrupt-parent = <&mpic>; | ||
136 | interrupts = <23 2>; | ||
137 | }; | ||
138 | }; | ||
139 | |||
140 | mdio@24520 { | ||
141 | #address-cells = <1>; | ||
142 | #size-cells = <0>; | ||
143 | compatible = "fsl,gianfar-mdio"; | ||
144 | reg = <0x24520 0x20>; | ||
145 | |||
146 | phy1: ethernet-phy@0 { | ||
147 | interrupt-parent = <&mpic>; | ||
148 | interrupts = <8 1>; | ||
149 | reg = <1>; | ||
150 | device_type = "ethernet-phy"; | ||
151 | }; | ||
152 | phy2: ethernet-phy@1 { | ||
153 | interrupt-parent = <&mpic>; | ||
154 | interrupts = <8 1>; | ||
155 | reg = <2>; | ||
156 | device_type = "ethernet-phy"; | ||
157 | }; | ||
158 | phy3: ethernet-phy@3 { | ||
159 | interrupt-parent = <&mpic>; | ||
160 | interrupts = <8 1>; | ||
161 | reg = <3>; | ||
162 | device_type = "ethernet-phy"; | ||
163 | }; | ||
164 | phy4: ethernet-phy@4 { | ||
165 | interrupt-parent = <&mpic>; | ||
166 | interrupts = <8 1>; | ||
167 | reg = <4>; | ||
168 | device_type = "ethernet-phy"; | ||
169 | }; | ||
170 | phy5: ethernet-phy@5 { | ||
171 | interrupt-parent = <&mpic>; | ||
172 | interrupts = <8 1>; | ||
173 | reg = <5>; | ||
174 | device_type = "ethernet-phy"; | ||
175 | }; | ||
176 | }; | ||
177 | |||
178 | enet0: ethernet@24000 { | ||
179 | cell-index = <0>; | ||
180 | device_type = "network"; | ||
181 | model = "eTSEC"; | ||
182 | compatible = "gianfar"; | ||
183 | reg = <0x24000 0x1000>; | ||
184 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
185 | interrupts = <29 2 30 2 34 2>; | ||
186 | interrupt-parent = <&mpic>; | ||
187 | phy-handle = <&phy2>; | ||
188 | }; | ||
189 | |||
190 | enet1: ethernet@25000 { | ||
191 | cell-index = <1>; | ||
192 | device_type = "network"; | ||
193 | model = "eTSEC"; | ||
194 | compatible = "gianfar"; | ||
195 | reg = <0x25000 0x1000>; | ||
196 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
197 | interrupts = <35 2 36 2 40 2>; | ||
198 | interrupt-parent = <&mpic>; | ||
199 | phy-handle = <&phy1>; | ||
200 | }; | ||
201 | |||
202 | enet2: ethernet@26000 { | ||
203 | cell-index = <2>; | ||
204 | device_type = "network"; | ||
205 | model = "eTSEC"; | ||
206 | compatible = "gianfar"; | ||
207 | reg = <0x26000 0x1000>; | ||
208 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
209 | interrupts = <31 2 32 2 33 2>; | ||
210 | interrupt-parent = <&mpic>; | ||
211 | phy-handle = <&phy3>; | ||
212 | }; | ||
213 | |||
214 | enet3: ethernet@27000 { | ||
215 | cell-index = <3>; | ||
216 | device_type = "network"; | ||
217 | model = "eTSEC"; | ||
218 | compatible = "gianfar"; | ||
219 | reg = <0x27000 0x1000>; | ||
220 | local-mac-address = [ 00 00 00 00 00 00 ]; | ||
221 | interrupts = <37 2 38 2 39 2>; | ||
222 | interrupt-parent = <&mpic>; | ||
223 | phy-handle = <&phy4>; | ||
224 | }; | ||
225 | |||
226 | serial0: serial@4500 { | ||
227 | cell-index = <0>; | ||
228 | device_type = "serial"; | ||
229 | compatible = "ns16550"; | ||
230 | reg = <0x4500 0x100>; // reg base, size | ||
231 | clock-frequency = <0>; // should we fill in in uboot? | ||
232 | current-speed = <115200>; | ||
233 | interrupts = <42 2>; | ||
234 | interrupt-parent = <&mpic>; | ||
235 | }; | ||
236 | |||
237 | serial1: serial@4600 { | ||
238 | cell-index = <1>; | ||
239 | device_type = "serial"; | ||
240 | compatible = "ns16550"; | ||
241 | reg = <0x4600 0x100>; // reg base, size | ||
242 | clock-frequency = <0>; // should we fill in in uboot? | ||
243 | current-speed = <115200>; | ||
244 | interrupts = <42 2>; | ||
245 | interrupt-parent = <&mpic>; | ||
246 | }; | ||
247 | |||
248 | global-utilities@e0000 { // global utilities reg | ||
249 | compatible = "fsl,mpc8548-guts"; | ||
250 | reg = <0xe0000 0x1000>; | ||
251 | fsl,has-rstcr; | ||
252 | }; | ||
253 | |||
254 | mpic: pic@40000 { | ||
255 | interrupt-controller; | ||
256 | #address-cells = <0>; | ||
257 | #interrupt-cells = <2>; | ||
258 | reg = <0x40000 0x40000>; | ||
259 | compatible = "chrp,open-pic"; | ||
260 | device_type = "open-pic"; | ||
261 | }; | ||
262 | }; | ||
263 | |||
264 | localbus@e0005000 { | ||
265 | compatible = "fsl,mpc8548-localbus", "fsl,pq3-localbus", | ||
266 | "simple-bus"; | ||
267 | #address-cells = <2>; | ||
268 | #size-cells = <1>; | ||
269 | reg = <0xe0005000 0x100>; // BRx, ORx, etc. | ||
270 | |||
271 | ranges = < | ||
272 | 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 | ||
273 | 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 | ||
274 | 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) | ||
275 | 3 0x0 0xe3010000 0x00008000 // NAND FLASH | ||
276 | |||
277 | >; | ||
278 | |||
279 | flash@1,0 { | ||
280 | #address-cells = <1>; | ||
281 | #size-cells = <1>; | ||
282 | compatible = "cfi-flash"; | ||
283 | reg = <1 0x0 0x8000000>; | ||
284 | bank-width = <4>; | ||
285 | device-width = <1>; | ||
286 | |||
287 | partition@0 { | ||
288 | label = "kernel"; | ||
289 | reg = <0x00000000 0x00200000>; | ||
290 | }; | ||
291 | partition@200000 { | ||
292 | label = "root"; | ||
293 | reg = <0x00200000 0x00300000>; | ||
294 | }; | ||
295 | partition@500000 { | ||
296 | label = "user"; | ||
297 | reg = <0x00500000 0x07a00000>; | ||
298 | }; | ||
299 | partition@7f00000 { | ||
300 | label = "env1"; | ||
301 | reg = <0x07f00000 0x00040000>; | ||
302 | }; | ||
303 | partition@7f40000 { | ||
304 | label = "env2"; | ||
305 | reg = <0x07f40000 0x00040000>; | ||
306 | }; | ||
307 | partition@7f80000 { | ||
308 | label = "u-boot"; | ||
309 | reg = <0x07f80000 0x00080000>; | ||
310 | read-only; | ||
311 | }; | ||
312 | }; | ||
313 | |||
314 | /* Note: CAN support needs be enabled in U-Boot */ | ||
315 | can0@2,0 { | ||
316 | compatible = "intel,82527"; // Bosch CC770 | ||
317 | reg = <2 0x0 0x100>; | ||
318 | interrupts = <4 0>; | ||
319 | interrupt-parent = <&mpic>; | ||
320 | }; | ||
321 | |||
322 | can1@2,100 { | ||
323 | compatible = "intel,82527"; // Bosch CC770 | ||
324 | reg = <2 0x100 0x100>; | ||
325 | interrupts = <4 0>; | ||
326 | interrupt-parent = <&mpic>; | ||
327 | }; | ||
328 | |||
329 | /* Note: NAND support needs to be enabled in U-Boot */ | ||
330 | upm@3,0 { | ||
331 | #address-cells = <0>; | ||
332 | #size-cells = <0>; | ||
333 | compatible = "fsl,upm-nand"; | ||
334 | reg = <3 0x0 0x800>; | ||
335 | fsl,upm-addr-offset = <0x10>; | ||
336 | fsl,upm-cmd-offset = <0x08>; | ||
337 | chip-delay = <25>; // in micro-seconds | ||
338 | |||
339 | nand@0 { | ||
340 | #address-cells = <1>; | ||
341 | #size-cells = <1>; | ||
342 | |||
343 | partition@0 { | ||
344 | label = "fs"; | ||
345 | reg = <0x00000000 0x01000000>; | ||
346 | }; | ||
347 | }; | ||
348 | }; | ||
349 | }; | ||
350 | |||
351 | pci0: pci@e0008000 { | ||
352 | cell-index = <0>; | ||
353 | #interrupt-cells = <1>; | ||
354 | #size-cells = <2>; | ||
355 | #address-cells = <3>; | ||
356 | compatible = "fsl,mpc8540-pcix", "fsl,mpc8540-pci"; | ||
357 | device_type = "pci"; | ||
358 | reg = <0xe0008000 0x1000>; | ||
359 | clock-frequency = <33333333>; | ||
360 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
361 | interrupt-map = < | ||
362 | /* IDSEL 28 */ | ||
363 | 0xe000 0 0 1 &mpic 2 1 | ||
364 | 0xe000 0 0 2 &mpic 3 1>; | ||
365 | |||
366 | interrupt-parent = <&mpic>; | ||
367 | interrupts = <24 2>; | ||
368 | bus-range = <0 0>; | ||
369 | ranges = <0x02000000 0 0x80000000 0x80000000 0 0x20000000 | ||
370 | 0x01000000 0 0x00000000 0xe2000000 0 0x01000000>; | ||
371 | }; | ||
372 | |||
373 | pci1: pcie@e000a000 { | ||
374 | cell-index = <2>; | ||
375 | interrupt-map-mask = <0xf800 0x0 0x0 0x7>; | ||
376 | interrupt-map = < | ||
377 | /* IDSEL 0x0 (PEX) */ | ||
378 | 0x00000 0 0 1 &mpic 0 1 | ||
379 | 0x00000 0 0 2 &mpic 1 1 | ||
380 | 0x00000 0 0 3 &mpic 2 1 | ||
381 | 0x00000 0 0 4 &mpic 3 1>; | ||
382 | |||
383 | interrupt-parent = <&mpic>; | ||
384 | interrupts = <26 2>; | ||
385 | bus-range = <0 0xff>; | ||
386 | ranges = <0x02000000 0 0xc0000000 0xc0000000 0 0x20000000 | ||
387 | 0x01000000 0 0x00000000 0xef000000 0 0x08000000>; | ||
388 | clock-frequency = <33333333>; | ||
389 | #interrupt-cells = <1>; | ||
390 | #size-cells = <2>; | ||
391 | #address-cells = <3>; | ||
392 | reg = <0xe000a000 0x1000>; | ||
393 | compatible = "fsl,mpc8548-pcie"; | ||
394 | device_type = "pci"; | ||
395 | pcie@0 { | ||
396 | reg = <0 0 0 0 0>; | ||
397 | #size-cells = <2>; | ||
398 | #address-cells = <3>; | ||
399 | device_type = "pci"; | ||
400 | ranges = <0x02000000 0 0xc0000000 0x02000000 0 | ||
401 | 0xc0000000 0 0x20000000 | ||
402 | 0x01000000 0 0x00000000 0x01000000 0 | ||
403 | 0x00000000 0 0x08000000>; | ||
404 | }; | ||
405 | }; | ||
406 | }; | ||
diff --git a/arch/powerpc/boot/dts/tqm8555.dts b/arch/powerpc/boot/dts/tqm8555.dts index a20eb06c482f..96b0b94ad925 100644 --- a/arch/powerpc/boot/dts/tqm8555.dts +++ b/arch/powerpc/boot/dts/tqm8555.dts | |||
@@ -12,8 +12,8 @@ | |||
12 | /dts-v1/; | 12 | /dts-v1/; |
13 | 13 | ||
14 | / { | 14 | / { |
15 | model = "tqm,8555"; | 15 | model = "tqc,tqm8555"; |
16 | compatible = "tqm,8555", "tqm,85xx"; | 16 | compatible = "tqc,tqm8555"; |
17 | #address-cells = <1>; | 17 | #address-cells = <1>; |
18 | #size-cells = <1>; | 18 | #size-cells = <1>; |
19 | 19 | ||
@@ -39,6 +39,7 @@ | |||
39 | timebase-frequency = <0>; | 39 | timebase-frequency = <0>; |
40 | bus-frequency = <0>; | 40 | bus-frequency = <0>; |
41 | clock-frequency = <0>; | 41 | clock-frequency = <0>; |
42 | next-level-cache = <&L2>; | ||
42 | }; | 43 | }; |
43 | }; | 44 | }; |
44 | 45 | ||
@@ -63,7 +64,7 @@ | |||
63 | interrupts = <18 2>; | 64 | interrupts = <18 2>; |
64 | }; | 65 | }; |
65 | 66 | ||
66 | l2-cache-controller@20000 { | 67 | L2: l2-cache-controller@20000 { |
67 | compatible = "fsl,8540-l2-cache-controller"; | 68 | compatible = "fsl,8540-l2-cache-controller"; |
68 | reg = <0x20000 0x1000>; | 69 | reg = <0x20000 0x1000>; |
69 | cache-line-size = <32>; | 70 | cache-line-size = <32>; |
@@ -88,6 +89,47 @@ | |||
88 | }; | 89 | }; |
89 | }; | 90 | }; |
90 | 91 | ||
92 | dma@21300 { | ||
93 | #address-cells = <1>; | ||
94 | #size-cells = <1>; | ||
95 | compatible = "fsl,mpc8555-dma", "fsl,eloplus-dma"; | ||
96 | reg = <0x21300 0x4>; | ||
97 | ranges = <0x0 0x21100 0x200>; | ||
98 | cell-index = <0>; | ||
99 | dma-channel@0 { | ||
100 | compatible = "fsl,mpc8555-dma-channel", | ||
101 | "fsl,eloplus-dma-channel"; | ||
102 | reg = <0x0 0x80>; | ||
103 | cell-index = <0>; | ||
104 | interrupt-parent = <&mpic>; | ||
105 | interrupts = <20 2>; | ||
106 | }; | ||
107 | dma-channel@80 { | ||
108 | compatible = "fsl,mpc8555-dma-channel", | ||
109 | "fsl,eloplus-dma-channel"; | ||
110 | reg = <0x80 0x80>; | ||
111 | cell-index = <1>; | ||
112 | interrupt-parent = <&mpic>; | ||
113 | interrupts = <21 2>; | ||
114 | }; | ||
115 | dma-channel@100 { | ||
116 | compatible = "fsl,mpc8555-dma-channel", | ||
117 | "fsl,eloplus-dma-channel"; | ||
118 | reg = <0x100 0x80>; | ||
119 | cell-index = <2>; | ||
120 | interrupt-parent = <&mpic>; | ||
121 | interrupts = <22 2>; | ||
122 | }; | ||
123 | dma-channel@180 { | ||
124 | compatible = "fsl,mpc8555-dma-channel", | ||
125 | "fsl,eloplus-dma-channel"; | ||
126 | reg = <0x180 0x80>; | ||
127 | cell-index = <3>; | ||
128 | interrupt-parent = <&mpic>; | ||
129 | interrupts = <23 2>; | ||
130 | }; | ||
131 | }; | ||
132 | |||
91 | mdio@24520 { | 133 | mdio@24520 { |
92 | #address-cells = <1>; | 134 | #address-cells = <1>; |
93 | #size-cells = <0>; | 135 | #size-cells = <0>; |
@@ -164,6 +206,7 @@ | |||
164 | #interrupt-cells = <2>; | 206 | #interrupt-cells = <2>; |
165 | reg = <0x40000 0x40000>; | 207 | reg = <0x40000 0x40000>; |
166 | device_type = "open-pic"; | 208 | device_type = "open-pic"; |
209 | compatible = "chrp,open-pic"; | ||
167 | }; | 210 | }; |
168 | 211 | ||
169 | cpm@919c0 { | 212 | cpm@919c0 { |
diff --git a/arch/powerpc/boot/dts/tqm8560.dts b/arch/powerpc/boot/dts/tqm8560.dts index b9ac6c943b89..3fe35208907b 100644 --- a/arch/powerpc/boot/dts/tqm8560.dts +++ b/arch/powerpc/boot/dts/tqm8560.dts | |||
@@ -2,6 +2,7 @@ | |||
2 | * TQM 8560 Device Tree Source | 2 | * TQM 8560 Device Tree Source |
3 | * | 3 | * |
4 | * Copyright 2008 Freescale Semiconductor Inc. | 4 | * Copyright 2008 Freescale Semiconductor Inc. |
5 | * Copyright 2008 Wolfgang Grandegger <wg@grandegger.com> | ||
5 | * | 6 | * |
6 | * This program is free software; you can redistribute it and/or modify it | 7 | * This program is free software; you can redistribute it and/or modify it |
7 | * under the terms of the GNU General Public License as published by the | 8 | * under the terms of the GNU General Public License as published by the |
@@ -12,8 +13,8 @@ | |||
12 | /dts-v1/; | 13 | /dts-v1/; |
13 | 14 | ||
14 | / { | 15 | / { |
15 | model = "tqm,8560"; | 16 | model = "tqc,tqm8560"; |
16 | compatible = "tqm,8560", "tqm,85xx"; | 17 | compatible = "tqc,tqm8560"; |
17 | #address-cells = <1>; | 18 | #address-cells = <1>; |
18 | #size-cells = <1>; | 19 | #size-cells = <1>; |
19 | 20 | ||
@@ -40,6 +41,7 @@ | |||
40 | timebase-frequency = <0>; | 41 | timebase-frequency = <0>; |
41 | bus-frequency = <0>; | 42 | bus-frequency = <0>; |
42 | clock-frequency = <0>; | 43 | clock-frequency = <0>; |
44 | next-level-cache = <&L2>; | ||
43 | }; | 45 | }; |
44 | }; | 46 | }; |
45 | 47 | ||
@@ -64,7 +66,7 @@ | |||
64 | interrupts = <18 2>; | 66 | interrupts = <18 2>; |
65 | }; | 67 | }; |
66 | 68 | ||
67 | l2-cache-controller@20000 { | 69 | L2: l2-cache-controller@20000 { |
68 | compatible = "fsl,8540-l2-cache-controller"; | 70 | compatible = "fsl,8540-l2-cache-controller"; |
69 | reg = <0x20000 0x1000>; | 71 | reg = <0x20000 0x1000>; |
70 | cache-line-size = <32>; | 72 | cache-line-size = <32>; |
@@ -89,6 +91,47 @@ | |||
89 | }; | 91 | }; |
90 | }; | 92 | }; |
91 | 93 | ||
94 | dma@21300 { | ||
95 | #address-cells = <1>; | ||
96 | #size-cells = <1>; | ||
97 | compatible = "fsl,mpc8560-dma", "fsl,eloplus-dma"; | ||
98 | reg = <0x21300 0x4>; | ||
99 | ranges = <0x0 0x21100 0x200>; | ||
100 | cell-index = <0>; | ||
101 | dma-channel@0 { | ||
102 | compatible = "fsl,mpc8560-dma-channel", | ||
103 | "fsl,eloplus-dma-channel"; | ||
104 | reg = <0x0 0x80>; | ||
105 | cell-index = <0>; | ||
106 | interrupt-parent = <&mpic>; | ||
107 | interrupts = <20 2>; | ||
108 | }; | ||
109 | dma-channel@80 { | ||
110 | compatible = "fsl,mpc8560-dma-channel", | ||
111 | "fsl,eloplus-dma-channel"; | ||
112 | reg = <0x80 0x80>; | ||
113 | cell-index = <1>; | ||
114 | interrupt-parent = <&mpic>; | ||
115 | interrupts = <21 2>; | ||
116 | }; | ||
117 | dma-channel@100 { | ||
118 | compatible = "fsl,mpc8560-dma-channel", | ||
119 | "fsl,eloplus-dma-channel"; | ||
120 | reg = <0x100 0x80>; | ||
121 | cell-index = <2>; | ||
122 | interrupt-parent = <&mpic>; | ||
123 | interrupts = <22 2>; | ||
124 | }; | ||
125 | dma-channel@180 { | ||
126 | compatible = "fsl,mpc8560-dma-channel", | ||
127 | "fsl,eloplus-dma-channel"; | ||
128 | reg = <0x180 0x80>; | ||
129 | cell-index = <3>; | ||
130 | interrupt-parent = <&mpic>; | ||
131 | interrupts = <23 2>; | ||
132 | }; | ||
133 | }; | ||
134 | |||
92 | mdio@24520 { | 135 | mdio@24520 { |
93 | #address-cells = <1>; | 136 | #address-cells = <1>; |
94 | #size-cells = <0>; | 137 | #size-cells = <0>; |
@@ -145,6 +188,7 @@ | |||
145 | #interrupt-cells = <2>; | 188 | #interrupt-cells = <2>; |
146 | reg = <0x40000 0x40000>; | 189 | reg = <0x40000 0x40000>; |
147 | device_type = "open-pic"; | 190 | device_type = "open-pic"; |
191 | compatible = "chrp,open-pic"; | ||
148 | }; | 192 | }; |
149 | 193 | ||
150 | cpm@919c0 { | 194 | cpm@919c0 { |
@@ -221,6 +265,70 @@ | |||
221 | }; | 265 | }; |
222 | }; | 266 | }; |
223 | 267 | ||
268 | localbus@e0005000 { | ||
269 | compatible = "fsl,mpc8560-localbus", "fsl,pq3-localbus", | ||
270 | "simple-bus"; | ||
271 | #address-cells = <2>; | ||
272 | #size-cells = <1>; | ||
273 | reg = <0xe0005000 0x100>; // BRx, ORx, etc. | ||
274 | |||
275 | ranges = < | ||
276 | 0 0x0 0xfc000000 0x04000000 // NOR FLASH bank 1 | ||
277 | 1 0x0 0xf8000000 0x08000000 // NOR FLASH bank 0 | ||
278 | 2 0x0 0xe3000000 0x00008000 // CAN (2 x i82527) | ||
279 | >; | ||
280 | |||
281 | flash@1,0 { | ||
282 | #address-cells = <1>; | ||
283 | #size-cells = <1>; | ||
284 | compatible = "cfi-flash"; | ||
285 | reg = <1 0x0 0x8000000>; | ||
286 | bank-width = <4>; | ||
287 | device-width = <1>; | ||
288 | |||
289 | partition@0 { | ||
290 | label = "kernel"; | ||
291 | reg = <0x00000000 0x00200000>; | ||
292 | }; | ||
293 | partition@200000 { | ||
294 | label = "root"; | ||
295 | reg = <0x00200000 0x00300000>; | ||
296 | }; | ||
297 | partition@500000 { | ||
298 | label = "user"; | ||
299 | reg = <0x00500000 0x07a00000>; | ||
300 | }; | ||
301 | partition@7f00000 { | ||
302 | label = "env1"; | ||
303 | reg = <0x07f00000 0x00040000>; | ||
304 | }; | ||
305 | partition@7f40000 { | ||
306 | label = "env2"; | ||
307 | reg = <0x07f40000 0x00040000>; | ||
308 | }; | ||
309 | partition@7f80000 { | ||
310 | label = "u-boot"; | ||
311 | reg = <0x07f80000 0x00080000>; | ||
312 | read-only; | ||
313 | }; | ||
314 | }; | ||
315 | |||
316 | /* Note: CAN support needs be enabled in U-Boot */ | ||
317 | can0@2,0 { | ||
318 | compatible = "intel,82527"; // Bosch CC770 | ||
319 | reg = <2 0x0 0x100>; | ||
320 | interrupts = <4 0>; | ||
321 | interrupt-parent = <&mpic>; | ||
322 | }; | ||
323 | |||
324 | can1@2,100 { | ||
325 | compatible = "intel,82527"; // Bosch CC770 | ||
326 | reg = <2 0x100 0x100>; | ||
327 | interrupts = <4 0>; | ||
328 | interrupt-parent = <&mpic>; | ||
329 | }; | ||
330 | }; | ||
331 | |||
224 | pci0: pci@e0008000 { | 332 | pci0: pci@e0008000 { |
225 | cell-index = <0>; | 333 | cell-index = <0>; |
226 | #interrupt-cells = <1>; | 334 | #interrupt-cells = <1>; |
diff --git a/arch/powerpc/boot/dts/walnut.dts b/arch/powerpc/boot/dts/walnut.dts index a328607c8f84..4a9f726ada13 100644 --- a/arch/powerpc/boot/dts/walnut.dts +++ b/arch/powerpc/boot/dts/walnut.dts | |||
@@ -9,12 +9,14 @@ | |||
9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | /dts-v1/; | ||
13 | |||
12 | / { | 14 | / { |
13 | #address-cells = <1>; | 15 | #address-cells = <1>; |
14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
15 | model = "ibm,walnut"; | 17 | model = "ibm,walnut"; |
16 | compatible = "ibm,walnut"; | 18 | compatible = "ibm,walnut"; |
17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
18 | 20 | ||
19 | aliases { | 21 | aliases { |
20 | ethernet0 = &EMAC; | 22 | ethernet0 = &EMAC; |
@@ -29,13 +31,13 @@ | |||
29 | cpu@0 { | 31 | cpu@0 { |
30 | device_type = "cpu"; | 32 | device_type = "cpu"; |
31 | model = "PowerPC,405GP"; | 33 | model = "PowerPC,405GP"; |
32 | reg = <0>; | 34 | reg = <0x00000000>; |
33 | clock-frequency = <bebc200>; /* Filled in by zImage */ | 35 | clock-frequency = <200000000>; /* Filled in by zImage */ |
34 | timebase-frequency = <0>; /* Filled in by zImage */ | 36 | timebase-frequency = <0>; /* Filled in by zImage */ |
35 | i-cache-line-size = <20>; | 37 | i-cache-line-size = <32>; |
36 | d-cache-line-size = <20>; | 38 | d-cache-line-size = <32>; |
37 | i-cache-size = <4000>; | 39 | i-cache-size = <16384>; |
38 | d-cache-size = <4000>; | 40 | d-cache-size = <16384>; |
39 | dcr-controller; | 41 | dcr-controller; |
40 | dcr-access-method = "native"; | 42 | dcr-access-method = "native"; |
41 | }; | 43 | }; |
@@ -43,14 +45,14 @@ | |||
43 | 45 | ||
44 | memory { | 46 | memory { |
45 | device_type = "memory"; | 47 | device_type = "memory"; |
46 | reg = <0 0>; /* Filled in by zImage */ | 48 | reg = <0x00000000 0x00000000>; /* Filled in by zImage */ |
47 | }; | 49 | }; |
48 | 50 | ||
49 | UIC0: interrupt-controller { | 51 | UIC0: interrupt-controller { |
50 | compatible = "ibm,uic"; | 52 | compatible = "ibm,uic"; |
51 | interrupt-controller; | 53 | interrupt-controller; |
52 | cell-index = <0>; | 54 | cell-index = <0>; |
53 | dcr-reg = <0c0 9>; | 55 | dcr-reg = <0x0c0 0x009>; |
54 | #address-cells = <0>; | 56 | #address-cells = <0>; |
55 | #size-cells = <0>; | 57 | #size-cells = <0>; |
56 | #interrupt-cells = <2>; | 58 | #interrupt-cells = <2>; |
@@ -65,63 +67,63 @@ | |||
65 | 67 | ||
66 | SDRAM0: memory-controller { | 68 | SDRAM0: memory-controller { |
67 | compatible = "ibm,sdram-405gp"; | 69 | compatible = "ibm,sdram-405gp"; |
68 | dcr-reg = <010 2>; | 70 | dcr-reg = <0x010 0x002>; |
69 | }; | 71 | }; |
70 | 72 | ||
71 | MAL: mcmal { | 73 | MAL: mcmal { |
72 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; | 74 | compatible = "ibm,mcmal-405gp", "ibm,mcmal"; |
73 | dcr-reg = <180 62>; | 75 | dcr-reg = <0x180 0x062>; |
74 | num-tx-chans = <1>; | 76 | num-tx-chans = <1>; |
75 | num-rx-chans = <1>; | 77 | num-rx-chans = <1>; |
76 | interrupt-parent = <&UIC0>; | 78 | interrupt-parent = <&UIC0>; |
77 | interrupts = < | 79 | interrupts = < |
78 | b 4 /* TXEOB */ | 80 | 0xb 0x4 /* TXEOB */ |
79 | c 4 /* RXEOB */ | 81 | 0xc 0x4 /* RXEOB */ |
80 | a 4 /* SERR */ | 82 | 0xa 0x4 /* SERR */ |
81 | d 4 /* TXDE */ | 83 | 0xd 0x4 /* TXDE */ |
82 | e 4 /* RXDE */>; | 84 | 0xe 0x4 /* RXDE */>; |
83 | }; | 85 | }; |
84 | 86 | ||
85 | POB0: opb { | 87 | POB0: opb { |
86 | compatible = "ibm,opb-405gp", "ibm,opb"; | 88 | compatible = "ibm,opb-405gp", "ibm,opb"; |
87 | #address-cells = <1>; | 89 | #address-cells = <1>; |
88 | #size-cells = <1>; | 90 | #size-cells = <1>; |
89 | ranges = <ef600000 ef600000 a00000>; | 91 | ranges = <0xef600000 0xef600000 0x00a00000>; |
90 | dcr-reg = <0a0 5>; | 92 | dcr-reg = <0x0a0 0x005>; |
91 | clock-frequency = <0>; /* Filled in by zImage */ | 93 | clock-frequency = <0>; /* Filled in by zImage */ |
92 | 94 | ||
93 | UART0: serial@ef600300 { | 95 | UART0: serial@ef600300 { |
94 | device_type = "serial"; | 96 | device_type = "serial"; |
95 | compatible = "ns16550"; | 97 | compatible = "ns16550"; |
96 | reg = <ef600300 8>; | 98 | reg = <0xef600300 0x00000008>; |
97 | virtual-reg = <ef600300>; | 99 | virtual-reg = <0xef600300>; |
98 | clock-frequency = <0>; /* Filled in by zImage */ | 100 | clock-frequency = <0>; /* Filled in by zImage */ |
99 | current-speed = <2580>; | 101 | current-speed = <9600>; |
100 | interrupt-parent = <&UIC0>; | 102 | interrupt-parent = <&UIC0>; |
101 | interrupts = <0 4>; | 103 | interrupts = <0x0 0x4>; |
102 | }; | 104 | }; |
103 | 105 | ||
104 | UART1: serial@ef600400 { | 106 | UART1: serial@ef600400 { |
105 | device_type = "serial"; | 107 | device_type = "serial"; |
106 | compatible = "ns16550"; | 108 | compatible = "ns16550"; |
107 | reg = <ef600400 8>; | 109 | reg = <0xef600400 0x00000008>; |
108 | virtual-reg = <ef600400>; | 110 | virtual-reg = <0xef600400>; |
109 | clock-frequency = <0>; /* Filled in by zImage */ | 111 | clock-frequency = <0>; /* Filled in by zImage */ |
110 | current-speed = <2580>; | 112 | current-speed = <9600>; |
111 | interrupt-parent = <&UIC0>; | 113 | interrupt-parent = <&UIC0>; |
112 | interrupts = <1 4>; | 114 | interrupts = <0x1 0x4>; |
113 | }; | 115 | }; |
114 | 116 | ||
115 | IIC: i2c@ef600500 { | 117 | IIC: i2c@ef600500 { |
116 | compatible = "ibm,iic-405gp", "ibm,iic"; | 118 | compatible = "ibm,iic-405gp", "ibm,iic"; |
117 | reg = <ef600500 11>; | 119 | reg = <0xef600500 0x00000011>; |
118 | interrupt-parent = <&UIC0>; | 120 | interrupt-parent = <&UIC0>; |
119 | interrupts = <2 4>; | 121 | interrupts = <0x2 0x4>; |
120 | }; | 122 | }; |
121 | 123 | ||
122 | GPIO: gpio@ef600700 { | 124 | GPIO: gpio@ef600700 { |
123 | compatible = "ibm,gpio-405gp"; | 125 | compatible = "ibm,gpio-405gp"; |
124 | reg = <ef600700 20>; | 126 | reg = <0xef600700 0x00000020>; |
125 | }; | 127 | }; |
126 | 128 | ||
127 | EMAC: ethernet@ef600800 { | 129 | EMAC: ethernet@ef600800 { |
@@ -129,26 +131,26 @@ | |||
129 | compatible = "ibm,emac-405gp", "ibm,emac"; | 131 | compatible = "ibm,emac-405gp", "ibm,emac"; |
130 | interrupt-parent = <&UIC0>; | 132 | interrupt-parent = <&UIC0>; |
131 | interrupts = < | 133 | interrupts = < |
132 | f 4 /* Ethernet */ | 134 | 0xf 0x4 /* Ethernet */ |
133 | 9 4 /* Ethernet Wake Up */>; | 135 | 0x9 0x4 /* Ethernet Wake Up */>; |
134 | local-mac-address = [000000000000]; /* Filled in by zImage */ | 136 | local-mac-address = [000000000000]; /* Filled in by zImage */ |
135 | reg = <ef600800 70>; | 137 | reg = <0xef600800 0x00000070>; |
136 | mal-device = <&MAL>; | 138 | mal-device = <&MAL>; |
137 | mal-tx-channel = <0>; | 139 | mal-tx-channel = <0>; |
138 | mal-rx-channel = <0>; | 140 | mal-rx-channel = <0>; |
139 | cell-index = <0>; | 141 | cell-index = <0>; |
140 | max-frame-size = <5dc>; | 142 | max-frame-size = <1500>; |
141 | rx-fifo-size = <1000>; | 143 | rx-fifo-size = <4096>; |
142 | tx-fifo-size = <800>; | 144 | tx-fifo-size = <2048>; |
143 | phy-mode = "rmii"; | 145 | phy-mode = "rmii"; |
144 | phy-map = <00000001>; | 146 | phy-map = <0x00000001>; |
145 | }; | 147 | }; |
146 | 148 | ||
147 | }; | 149 | }; |
148 | 150 | ||
149 | EBC0: ebc { | 151 | EBC0: ebc { |
150 | compatible = "ibm,ebc-405gp", "ibm,ebc"; | 152 | compatible = "ibm,ebc-405gp", "ibm,ebc"; |
151 | dcr-reg = <012 2>; | 153 | dcr-reg = <0x012 0x002>; |
152 | #address-cells = <2>; | 154 | #address-cells = <2>; |
153 | #size-cells = <1>; | 155 | #size-cells = <1>; |
154 | /* The ranges property is supplied by the bootwrapper | 156 | /* The ranges property is supplied by the bootwrapper |
@@ -158,18 +160,18 @@ | |||
158 | clock-frequency = <0>; /* Filled in by zImage */ | 160 | clock-frequency = <0>; /* Filled in by zImage */ |
159 | 161 | ||
160 | sram@0,0 { | 162 | sram@0,0 { |
161 | reg = <0 0 80000>; | 163 | reg = <0x00000000 0x00000000 0x00080000>; |
162 | }; | 164 | }; |
163 | 165 | ||
164 | flash@0,80000 { | 166 | flash@0,80000 { |
165 | compatible = "jedec-flash"; | 167 | compatible = "jedec-flash"; |
166 | bank-width = <1>; | 168 | bank-width = <1>; |
167 | reg = <0 80000 80000>; | 169 | reg = <0x00000000 0x00080000 0x00080000>; |
168 | #address-cells = <1>; | 170 | #address-cells = <1>; |
169 | #size-cells = <1>; | 171 | #size-cells = <1>; |
170 | partition@0 { | 172 | partition@0 { |
171 | label = "OpenBIOS"; | 173 | label = "OpenBIOS"; |
172 | reg = <0 80000>; | 174 | reg = <0x00000000 0x00080000>; |
173 | read-only; | 175 | read-only; |
174 | }; | 176 | }; |
175 | }; | 177 | }; |
@@ -177,24 +179,24 @@ | |||
177 | nvram@1,0 { | 179 | nvram@1,0 { |
178 | /* NVRAM and RTC */ | 180 | /* NVRAM and RTC */ |
179 | compatible = "ds1743-nvram"; | 181 | compatible = "ds1743-nvram"; |
180 | #bytes = <2000>; | 182 | #bytes = <0x2000>; |
181 | reg = <1 0 2000>; | 183 | reg = <0x00000001 0x00000000 0x00002000>; |
182 | }; | 184 | }; |
183 | 185 | ||
184 | keyboard@2,0 { | 186 | keyboard@2,0 { |
185 | compatible = "intel,82C42PC"; | 187 | compatible = "intel,82C42PC"; |
186 | reg = <2 0 2>; | 188 | reg = <0x00000002 0x00000000 0x00000002>; |
187 | }; | 189 | }; |
188 | 190 | ||
189 | ir@3,0 { | 191 | ir@3,0 { |
190 | compatible = "ti,TIR2000PAG"; | 192 | compatible = "ti,TIR2000PAG"; |
191 | reg = <3 0 10>; | 193 | reg = <0x00000003 0x00000000 0x00000010>; |
192 | }; | 194 | }; |
193 | 195 | ||
194 | fpga@7,0 { | 196 | fpga@7,0 { |
195 | compatible = "Walnut-FPGA"; | 197 | compatible = "Walnut-FPGA"; |
196 | reg = <7 0 10>; | 198 | reg = <0x00000007 0x00000000 0x00000010>; |
197 | virtual-reg = <f0300005>; | 199 | virtual-reg = <0xf0300005>; |
198 | }; | 200 | }; |
199 | }; | 201 | }; |
200 | 202 | ||
@@ -205,35 +207,35 @@ | |||
205 | #address-cells = <3>; | 207 | #address-cells = <3>; |
206 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; | 208 | compatible = "ibm,plb405gp-pci", "ibm,plb-pci"; |
207 | primary; | 209 | primary; |
208 | reg = <eec00000 8 /* Config space access */ | 210 | reg = <0xeec00000 0x00000008 /* Config space access */ |
209 | eed80000 4 /* IACK */ | 211 | 0xeed80000 0x00000004 /* IACK */ |
210 | eed80000 4 /* Special cycle */ | 212 | 0xeed80000 0x00000004 /* Special cycle */ |
211 | ef480000 40>; /* Internal registers */ | 213 | 0xef480000 0x00000040>; /* Internal registers */ |
212 | 214 | ||
213 | /* Outbound ranges, one memory and one IO, | 215 | /* Outbound ranges, one memory and one IO, |
214 | * later cannot be changed. Chip supports a second | 216 | * later cannot be changed. Chip supports a second |
215 | * IO range but we don't use it for now | 217 | * IO range but we don't use it for now |
216 | */ | 218 | */ |
217 | ranges = <02000000 0 80000000 80000000 0 20000000 | 219 | ranges = <0x02000000 0x00000000 0x80000000 0x80000000 0x00000000 0x20000000 |
218 | 01000000 0 00000000 e8000000 0 00010000>; | 220 | 0x01000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
219 | 221 | ||
220 | /* Inbound 2GB range starting at 0 */ | 222 | /* Inbound 2GB range starting at 0 */ |
221 | dma-ranges = <42000000 0 0 0 0 80000000>; | 223 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x80000000>; |
222 | 224 | ||
223 | /* Walnut has all 4 IRQ pins tied together per slot */ | 225 | /* Walnut has all 4 IRQ pins tied together per slot */ |
224 | interrupt-map-mask = <f800 0 0 0>; | 226 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
225 | interrupt-map = < | 227 | interrupt-map = < |
226 | /* IDSEL 1 */ | 228 | /* IDSEL 1 */ |
227 | 0800 0 0 0 &UIC0 1c 8 | 229 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
228 | 230 | ||
229 | /* IDSEL 2 */ | 231 | /* IDSEL 2 */ |
230 | 1000 0 0 0 &UIC0 1d 8 | 232 | 0x1000 0x0 0x0 0x0 &UIC0 0x1d 0x8 |
231 | 233 | ||
232 | /* IDSEL 3 */ | 234 | /* IDSEL 3 */ |
233 | 1800 0 0 0 &UIC0 1e 8 | 235 | 0x1800 0x0 0x0 0x0 &UIC0 0x1e 0x8 |
234 | 236 | ||
235 | /* IDSEL 4 */ | 237 | /* IDSEL 4 */ |
236 | 2000 0 0 0 &UIC0 1f 8 | 238 | 0x2000 0x0 0x0 0x0 &UIC0 0x1f 0x8 |
237 | >; | 239 | >; |
238 | }; | 240 | }; |
239 | }; | 241 | }; |
diff --git a/arch/powerpc/boot/dts/warp.dts b/arch/powerpc/boot/dts/warp.dts index b04a52e22bf5..340018cf16b7 100644 --- a/arch/powerpc/boot/dts/warp.dts +++ b/arch/powerpc/boot/dts/warp.dts | |||
@@ -9,12 +9,14 @@ | |||
9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | /dts-v1/; | ||
13 | |||
12 | / { | 14 | / { |
13 | #address-cells = <2>; | 15 | #address-cells = <2>; |
14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
15 | model = "pika,warp"; | 17 | model = "pika,warp"; |
16 | compatible = "pika,warp"; | 18 | compatible = "pika,warp"; |
17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
18 | 20 | ||
19 | aliases { | 21 | aliases { |
20 | ethernet0 = &EMAC0; | 22 | ethernet0 = &EMAC0; |
@@ -28,13 +30,13 @@ | |||
28 | cpu@0 { | 30 | cpu@0 { |
29 | device_type = "cpu"; | 31 | device_type = "cpu"; |
30 | model = "PowerPC,440EP"; | 32 | model = "PowerPC,440EP"; |
31 | reg = <0>; | 33 | reg = <0x00000000>; |
32 | clock-frequency = <0>; /* Filled in by zImage */ | 34 | clock-frequency = <0>; /* Filled in by zImage */ |
33 | timebase-frequency = <0>; /* Filled in by zImage */ | 35 | timebase-frequency = <0>; /* Filled in by zImage */ |
34 | i-cache-line-size = <20>; | 36 | i-cache-line-size = <32>; |
35 | d-cache-line-size = <20>; | 37 | d-cache-line-size = <32>; |
36 | i-cache-size = <8000>; | 38 | i-cache-size = <32768>; |
37 | d-cache-size = <8000>; | 39 | d-cache-size = <32768>; |
38 | dcr-controller; | 40 | dcr-controller; |
39 | dcr-access-method = "native"; | 41 | dcr-access-method = "native"; |
40 | }; | 42 | }; |
@@ -42,14 +44,14 @@ | |||
42 | 44 | ||
43 | memory { | 45 | memory { |
44 | device_type = "memory"; | 46 | device_type = "memory"; |
45 | reg = <0 0 0>; /* Filled in by zImage */ | 47 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
46 | }; | 48 | }; |
47 | 49 | ||
48 | UIC0: interrupt-controller0 { | 50 | UIC0: interrupt-controller0 { |
49 | compatible = "ibm,uic-440ep","ibm,uic"; | 51 | compatible = "ibm,uic-440ep","ibm,uic"; |
50 | interrupt-controller; | 52 | interrupt-controller; |
51 | cell-index = <0>; | 53 | cell-index = <0>; |
52 | dcr-reg = <0c0 009>; | 54 | dcr-reg = <0x0c0 0x009>; |
53 | #address-cells = <0>; | 55 | #address-cells = <0>; |
54 | #size-cells = <0>; | 56 | #size-cells = <0>; |
55 | #interrupt-cells = <2>; | 57 | #interrupt-cells = <2>; |
@@ -59,22 +61,22 @@ | |||
59 | compatible = "ibm,uic-440ep","ibm,uic"; | 61 | compatible = "ibm,uic-440ep","ibm,uic"; |
60 | interrupt-controller; | 62 | interrupt-controller; |
61 | cell-index = <1>; | 63 | cell-index = <1>; |
62 | dcr-reg = <0d0 009>; | 64 | dcr-reg = <0x0d0 0x009>; |
63 | #address-cells = <0>; | 65 | #address-cells = <0>; |
64 | #size-cells = <0>; | 66 | #size-cells = <0>; |
65 | #interrupt-cells = <2>; | 67 | #interrupt-cells = <2>; |
66 | interrupts = <1e 4 1f 4>; /* cascade */ | 68 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
67 | interrupt-parent = <&UIC0>; | 69 | interrupt-parent = <&UIC0>; |
68 | }; | 70 | }; |
69 | 71 | ||
70 | SDR0: sdr { | 72 | SDR0: sdr { |
71 | compatible = "ibm,sdr-440ep"; | 73 | compatible = "ibm,sdr-440ep"; |
72 | dcr-reg = <00e 002>; | 74 | dcr-reg = <0x00e 0x002>; |
73 | }; | 75 | }; |
74 | 76 | ||
75 | CPR0: cpr { | 77 | CPR0: cpr { |
76 | compatible = "ibm,cpr-440ep"; | 78 | compatible = "ibm,cpr-440ep"; |
77 | dcr-reg = <00c 002>; | 79 | dcr-reg = <0x00c 0x002>; |
78 | }; | 80 | }; |
79 | 81 | ||
80 | plb { | 82 | plb { |
@@ -86,86 +88,79 @@ | |||
86 | 88 | ||
87 | SDRAM0: sdram { | 89 | SDRAM0: sdram { |
88 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 90 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
89 | dcr-reg = <010 2>; | 91 | dcr-reg = <0x010 0x002>; |
90 | }; | 92 | }; |
91 | 93 | ||
92 | DMA0: dma { | 94 | DMA0: dma { |
93 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 95 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
94 | dcr-reg = <100 027>; | 96 | dcr-reg = <0x100 0x027>; |
95 | }; | 97 | }; |
96 | 98 | ||
97 | MAL0: mcmal { | 99 | MAL0: mcmal { |
98 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 100 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
99 | dcr-reg = <180 62>; | 101 | dcr-reg = <0x180 0x062>; |
100 | num-tx-chans = <4>; | 102 | num-tx-chans = <4>; |
101 | num-rx-chans = <2>; | 103 | num-rx-chans = <2>; |
102 | interrupt-parent = <&MAL0>; | 104 | interrupt-parent = <&MAL0>; |
103 | interrupts = <0 1 2 3 4>; | 105 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
104 | #interrupt-cells = <1>; | 106 | #interrupt-cells = <1>; |
105 | #address-cells = <0>; | 107 | #address-cells = <0>; |
106 | #size-cells = <0>; | 108 | #size-cells = <0>; |
107 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 109 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
108 | /*RXEOB*/ 1 &UIC0 b 4 | 110 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
109 | /*SERR*/ 2 &UIC1 0 4 | 111 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
110 | /*TXDE*/ 3 &UIC1 1 4 | 112 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
111 | /*RXDE*/ 4 &UIC1 2 4>; | 113 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
112 | }; | 114 | }; |
113 | 115 | ||
114 | POB0: opb { | 116 | POB0: opb { |
115 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | 117 | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; |
116 | #address-cells = <1>; | 118 | #address-cells = <1>; |
117 | #size-cells = <1>; | 119 | #size-cells = <1>; |
118 | ranges = <00000000 0 00000000 80000000 | 120 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
119 | 80000000 0 80000000 80000000>; | 121 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
120 | interrupt-parent = <&UIC1>; | 122 | interrupt-parent = <&UIC1>; |
121 | interrupts = <7 4>; | 123 | interrupts = <0x7 0x4>; |
122 | clock-frequency = <0>; /* Filled in by zImage */ | 124 | clock-frequency = <0>; /* Filled in by zImage */ |
123 | 125 | ||
124 | EBC0: ebc { | 126 | EBC0: ebc { |
125 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 127 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
126 | dcr-reg = <012 2>; | 128 | dcr-reg = <0x012 0x002>; |
127 | #address-cells = <2>; | 129 | #address-cells = <2>; |
128 | #size-cells = <1>; | 130 | #size-cells = <1>; |
129 | clock-frequency = <0>; /* Filled in by zImage */ | 131 | clock-frequency = <0>; /* Filled in by zImage */ |
130 | interrupts = <5 1>; | 132 | interrupts = <0x5 0x1>; |
131 | interrupt-parent = <&UIC1>; | 133 | interrupt-parent = <&UIC1>; |
132 | 134 | ||
133 | fpga@2,0 { | 135 | fpga@2,0 { |
134 | compatible = "pika,fpga"; | 136 | compatible = "pika,fpga"; |
135 | reg = <2 0 2200>; | 137 | reg = <0x00000002 0x00000000 0x00001000>; |
136 | interrupts = <18 8>; | 138 | interrupts = <0x18 0x8>; |
137 | interrupt-parent = <&UIC0>; | 139 | interrupt-parent = <&UIC0>; |
138 | }; | 140 | }; |
139 | 141 | ||
142 | fpga@2,4000 { | ||
143 | compatible = "pika,fpga-sd"; | ||
144 | reg = <0x00000002 0x00004000 0x00000A00>; | ||
145 | }; | ||
146 | |||
140 | nor_flash@0,0 { | 147 | nor_flash@0,0 { |
141 | compatible = "amd,s29gl512n", "cfi-flash"; | 148 | compatible = "amd,s29gl032a", "cfi-flash"; |
142 | bank-width = <2>; | 149 | bank-width = <2>; |
143 | reg = <0 0 4000000>; | 150 | reg = <0x00000000 0x00000000 0x00400000>; |
144 | #address-cells = <1>; | 151 | #address-cells = <1>; |
145 | #size-cells = <1>; | 152 | #size-cells = <1>; |
146 | partition@0 { | 153 | partition@300000 { |
147 | label = "kernel"; | ||
148 | reg = <0 180000>; | ||
149 | }; | ||
150 | partition@180000 { | ||
151 | label = "root"; | ||
152 | reg = <180000 3480000>; | ||
153 | }; | ||
154 | partition@3600000 { | ||
155 | label = "user"; | ||
156 | reg = <3600000 900000>; | ||
157 | }; | ||
158 | partition@3f00000 { | ||
159 | label = "fpga"; | 154 | label = "fpga"; |
160 | reg = <3f00000 40000>; | 155 | reg = <0x0030000 0x00040000>; |
161 | }; | 156 | }; |
162 | partition@3f40000 { | 157 | partition@340000 { |
163 | label = "env"; | 158 | label = "env"; |
164 | reg = <3f40000 40000>; | 159 | reg = <0x0340000 0x00040000>; |
165 | }; | 160 | }; |
166 | partition@3f80000 { | 161 | partition@380000 { |
167 | label = "u-boot"; | 162 | label = "u-boot"; |
168 | reg = <3f80000 80000>; | 163 | reg = <0x0380000 0x00080000>; |
169 | }; | 164 | }; |
170 | }; | 165 | }; |
171 | }; | 166 | }; |
@@ -173,60 +168,80 @@ | |||
173 | UART0: serial@ef600300 { | 168 | UART0: serial@ef600300 { |
174 | device_type = "serial"; | 169 | device_type = "serial"; |
175 | compatible = "ns16550"; | 170 | compatible = "ns16550"; |
176 | reg = <ef600300 8>; | 171 | reg = <0xef600300 0x00000008>; |
177 | virtual-reg = <ef600300>; | 172 | virtual-reg = <0xef600300>; |
178 | clock-frequency = <0>; /* Filled in by zImage */ | 173 | clock-frequency = <0>; /* Filled in by zImage */ |
179 | current-speed = <1c200>; | 174 | current-speed = <115200>; |
180 | interrupt-parent = <&UIC0>; | 175 | interrupt-parent = <&UIC0>; |
181 | interrupts = <0 4>; | 176 | interrupts = <0x0 0x4>; |
182 | }; | 177 | }; |
183 | 178 | ||
184 | IIC0: i2c@ef600700 { | 179 | IIC0: i2c@ef600700 { |
185 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 180 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
186 | reg = <ef600700 14>; | 181 | reg = <0xef600700 0x00000014>; |
187 | interrupt-parent = <&UIC0>; | 182 | interrupt-parent = <&UIC0>; |
188 | interrupts = <2 4>; | 183 | interrupts = <0x2 0x4>; |
184 | index = <0x0>; | ||
185 | #address-cells = <1>; | ||
186 | #size-cells = <0>; | ||
187 | |||
188 | ad7414@4a { | ||
189 | compatible = "adi,ad7414"; | ||
190 | reg = <0x4a>; | ||
191 | interrupts = <0x19 0x8>; | ||
192 | interrupt-parent = <&UIC0>; | ||
193 | }; | ||
189 | }; | 194 | }; |
190 | 195 | ||
191 | GPIO0: gpio@ef600b00 { | 196 | GPIO0: gpio@ef600b00 { |
192 | compatible = "ibm,gpio-440ep"; | 197 | compatible = "ibm,gpio-440ep"; |
193 | reg = <ef600b00 48>; | 198 | reg = <0xef600b00 0x00000048>; |
199 | #gpio-cells = <2>; | ||
200 | gpio-controller; | ||
194 | }; | 201 | }; |
195 | 202 | ||
196 | GPIO1: gpio@ef600c00 { | 203 | GPIO1: gpio@ef600c00 { |
197 | compatible = "ibm,gpio-440ep"; | 204 | compatible = "ibm,gpio-440ep"; |
198 | reg = <ef600c00 48>; | 205 | reg = <0xef600c00 0x00000048>; |
206 | #gpio-cells = <2>; | ||
207 | gpio-controller; | ||
208 | |||
209 | led@31 { | ||
210 | compatible = "linux,gpio-led"; | ||
211 | linux,name = ":green:"; | ||
212 | gpios = <&GPIO1 0x30 0>; | ||
213 | }; | ||
199 | }; | 214 | }; |
200 | 215 | ||
201 | ZMII0: emac-zmii@ef600d00 { | 216 | ZMII0: emac-zmii@ef600d00 { |
202 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 217 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
203 | reg = <ef600d00 c>; | 218 | reg = <0xef600d00 0x0000000c>; |
204 | }; | 219 | }; |
205 | 220 | ||
206 | EMAC0: ethernet@ef600e00 { | 221 | EMAC0: ethernet@ef600e00 { |
207 | device_type = "network"; | 222 | device_type = "network"; |
208 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 223 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
209 | interrupt-parent = <&UIC1>; | 224 | interrupt-parent = <&UIC1>; |
210 | interrupts = <1c 4 1d 4>; | 225 | interrupts = <0x1c 0x4 0x1d 0x4>; |
211 | reg = <ef600e00 70>; | 226 | reg = <0xef600e00 0x00000070>; |
212 | local-mac-address = [000000000000]; | 227 | local-mac-address = [000000000000]; |
213 | mal-device = <&MAL0>; | 228 | mal-device = <&MAL0>; |
214 | mal-tx-channel = <0 1>; | 229 | mal-tx-channel = <0 1>; |
215 | mal-rx-channel = <0>; | 230 | mal-rx-channel = <0>; |
216 | cell-index = <0>; | 231 | cell-index = <0>; |
217 | max-frame-size = <5dc>; | 232 | max-frame-size = <1500>; |
218 | rx-fifo-size = <1000>; | 233 | rx-fifo-size = <4096>; |
219 | tx-fifo-size = <800>; | 234 | tx-fifo-size = <2048>; |
220 | phy-mode = "rmii"; | 235 | phy-mode = "rmii"; |
221 | phy-map = <00000000>; | 236 | phy-map = <0x00000000>; |
222 | zmii-device = <&ZMII0>; | 237 | zmii-device = <&ZMII0>; |
223 | zmii-channel = <0>; | 238 | zmii-channel = <0>; |
224 | }; | 239 | }; |
225 | 240 | ||
226 | usb@ef601000 { | 241 | usb@ef601000 { |
227 | compatible = "ohci-be"; | 242 | compatible = "ohci-be"; |
228 | reg = <ef601000 80>; | 243 | reg = <0xef601000 0x00000080>; |
229 | interrupts = <8 1 9 1>; | 244 | interrupts = <0x8 0x1 0x9 0x1>; |
230 | interrupt-parent = < &UIC1 >; | 245 | interrupt-parent = < &UIC1 >; |
231 | }; | 246 | }; |
232 | }; | 247 | }; |
diff --git a/arch/powerpc/boot/dts/yosemite.dts b/arch/powerpc/boot/dts/yosemite.dts index 0d6d332814e0..e39422aa0d85 100644 --- a/arch/powerpc/boot/dts/yosemite.dts +++ b/arch/powerpc/boot/dts/yosemite.dts | |||
@@ -9,12 +9,14 @@ | |||
9 | * any warranty of any kind, whether express or implied. | 9 | * any warranty of any kind, whether express or implied. |
10 | */ | 10 | */ |
11 | 11 | ||
12 | /dts-v1/; | ||
13 | |||
12 | / { | 14 | / { |
13 | #address-cells = <2>; | 15 | #address-cells = <2>; |
14 | #size-cells = <1>; | 16 | #size-cells = <1>; |
15 | model = "amcc,yosemite"; | 17 | model = "amcc,yosemite"; |
16 | compatible = "amcc,yosemite","amcc,bamboo"; | 18 | compatible = "amcc,yosemite","amcc,bamboo"; |
17 | dcr-parent = <&/cpus/cpu@0>; | 19 | dcr-parent = <&{/cpus/cpu@0}>; |
18 | 20 | ||
19 | aliases { | 21 | aliases { |
20 | ethernet0 = &EMAC0; | 22 | ethernet0 = &EMAC0; |
@@ -32,13 +34,13 @@ | |||
32 | cpu@0 { | 34 | cpu@0 { |
33 | device_type = "cpu"; | 35 | device_type = "cpu"; |
34 | model = "PowerPC,440EP"; | 36 | model = "PowerPC,440EP"; |
35 | reg = <0>; | 37 | reg = <0x00000000>; |
36 | clock-frequency = <0>; /* Filled in by zImage */ | 38 | clock-frequency = <0>; /* Filled in by zImage */ |
37 | timebase-frequency = <0>; /* Filled in by zImage */ | 39 | timebase-frequency = <0>; /* Filled in by zImage */ |
38 | i-cache-line-size = <20>; | 40 | i-cache-line-size = <32>; |
39 | d-cache-line-size = <20>; | 41 | d-cache-line-size = <32>; |
40 | i-cache-size = <8000>; | 42 | i-cache-size = <32768>; |
41 | d-cache-size = <8000>; | 43 | d-cache-size = <32768>; |
42 | dcr-controller; | 44 | dcr-controller; |
43 | dcr-access-method = "native"; | 45 | dcr-access-method = "native"; |
44 | }; | 46 | }; |
@@ -46,14 +48,14 @@ | |||
46 | 48 | ||
47 | memory { | 49 | memory { |
48 | device_type = "memory"; | 50 | device_type = "memory"; |
49 | reg = <0 0 0>; /* Filled in by zImage */ | 51 | reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by zImage */ |
50 | }; | 52 | }; |
51 | 53 | ||
52 | UIC0: interrupt-controller0 { | 54 | UIC0: interrupt-controller0 { |
53 | compatible = "ibm,uic-440ep","ibm,uic"; | 55 | compatible = "ibm,uic-440ep","ibm,uic"; |
54 | interrupt-controller; | 56 | interrupt-controller; |
55 | cell-index = <0>; | 57 | cell-index = <0>; |
56 | dcr-reg = <0c0 009>; | 58 | dcr-reg = <0x0c0 0x009>; |
57 | #address-cells = <0>; | 59 | #address-cells = <0>; |
58 | #size-cells = <0>; | 60 | #size-cells = <0>; |
59 | #interrupt-cells = <2>; | 61 | #interrupt-cells = <2>; |
@@ -63,22 +65,22 @@ | |||
63 | compatible = "ibm,uic-440ep","ibm,uic"; | 65 | compatible = "ibm,uic-440ep","ibm,uic"; |
64 | interrupt-controller; | 66 | interrupt-controller; |
65 | cell-index = <1>; | 67 | cell-index = <1>; |
66 | dcr-reg = <0d0 009>; | 68 | dcr-reg = <0x0d0 0x009>; |
67 | #address-cells = <0>; | 69 | #address-cells = <0>; |
68 | #size-cells = <0>; | 70 | #size-cells = <0>; |
69 | #interrupt-cells = <2>; | 71 | #interrupt-cells = <2>; |
70 | interrupts = <1e 4 1f 4>; /* cascade */ | 72 | interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */ |
71 | interrupt-parent = <&UIC0>; | 73 | interrupt-parent = <&UIC0>; |
72 | }; | 74 | }; |
73 | 75 | ||
74 | SDR0: sdr { | 76 | SDR0: sdr { |
75 | compatible = "ibm,sdr-440ep"; | 77 | compatible = "ibm,sdr-440ep"; |
76 | dcr-reg = <00e 002>; | 78 | dcr-reg = <0x00e 0x002>; |
77 | }; | 79 | }; |
78 | 80 | ||
79 | CPR0: cpr { | 81 | CPR0: cpr { |
80 | compatible = "ibm,cpr-440ep"; | 82 | compatible = "ibm,cpr-440ep"; |
81 | dcr-reg = <00c 002>; | 83 | dcr-reg = <0x00c 0x002>; |
82 | }; | 84 | }; |
83 | 85 | ||
84 | plb { | 86 | plb { |
@@ -90,29 +92,29 @@ | |||
90 | 92 | ||
91 | SDRAM0: sdram { | 93 | SDRAM0: sdram { |
92 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 94 | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; |
93 | dcr-reg = <010 2>; | 95 | dcr-reg = <0x010 0x002>; |
94 | }; | 96 | }; |
95 | 97 | ||
96 | DMA0: dma { | 98 | DMA0: dma { |
97 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 99 | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; |
98 | dcr-reg = <100 027>; | 100 | dcr-reg = <0x100 0x027>; |
99 | }; | 101 | }; |
100 | 102 | ||
101 | MAL0: mcmal { | 103 | MAL0: mcmal { |
102 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 104 | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; |
103 | dcr-reg = <180 62>; | 105 | dcr-reg = <0x180 0x062>; |
104 | num-tx-chans = <4>; | 106 | num-tx-chans = <4>; |
105 | num-rx-chans = <2>; | 107 | num-rx-chans = <2>; |
106 | interrupt-parent = <&MAL0>; | 108 | interrupt-parent = <&MAL0>; |
107 | interrupts = <0 1 2 3 4>; | 109 | interrupts = <0x0 0x1 0x2 0x3 0x4>; |
108 | #interrupt-cells = <1>; | 110 | #interrupt-cells = <1>; |
109 | #address-cells = <0>; | 111 | #address-cells = <0>; |
110 | #size-cells = <0>; | 112 | #size-cells = <0>; |
111 | interrupt-map = </*TXEOB*/ 0 &UIC0 a 4 | 113 | interrupt-map = </*TXEOB*/ 0x0 &UIC0 0xa 0x4 |
112 | /*RXEOB*/ 1 &UIC0 b 4 | 114 | /*RXEOB*/ 0x1 &UIC0 0xb 0x4 |
113 | /*SERR*/ 2 &UIC1 0 4 | 115 | /*SERR*/ 0x2 &UIC1 0x0 0x4 |
114 | /*TXDE*/ 3 &UIC1 1 4 | 116 | /*TXDE*/ 0x3 &UIC1 0x1 0x4 |
115 | /*RXDE*/ 4 &UIC1 2 4>; | 117 | /*RXDE*/ 0x4 &UIC1 0x2 0x4>; |
116 | }; | 118 | }; |
117 | 119 | ||
118 | POB0: opb { | 120 | POB0: opb { |
@@ -122,110 +124,110 @@ | |||
122 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 124 | /* Bamboo is oddball in the 44x world and doesn't use the ERPN |
123 | * bits. | 125 | * bits. |
124 | */ | 126 | */ |
125 | ranges = <00000000 0 00000000 80000000 | 127 | ranges = <0x00000000 0x00000000 0x00000000 0x80000000 |
126 | 80000000 0 80000000 80000000>; | 128 | 0x80000000 0x00000000 0x80000000 0x80000000>; |
127 | interrupt-parent = <&UIC1>; | 129 | interrupt-parent = <&UIC1>; |
128 | interrupts = <7 4>; | 130 | interrupts = <0x7 0x4>; |
129 | clock-frequency = <0>; /* Filled in by zImage */ | 131 | clock-frequency = <0>; /* Filled in by zImage */ |
130 | 132 | ||
131 | EBC0: ebc { | 133 | EBC0: ebc { |
132 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 134 | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; |
133 | dcr-reg = <012 2>; | 135 | dcr-reg = <0x012 0x002>; |
134 | #address-cells = <2>; | 136 | #address-cells = <2>; |
135 | #size-cells = <1>; | 137 | #size-cells = <1>; |
136 | clock-frequency = <0>; /* Filled in by zImage */ | 138 | clock-frequency = <0>; /* Filled in by zImage */ |
137 | interrupts = <5 1>; | 139 | interrupts = <0x5 0x1>; |
138 | interrupt-parent = <&UIC1>; | 140 | interrupt-parent = <&UIC1>; |
139 | }; | 141 | }; |
140 | 142 | ||
141 | UART0: serial@ef600300 { | 143 | UART0: serial@ef600300 { |
142 | device_type = "serial"; | 144 | device_type = "serial"; |
143 | compatible = "ns16550"; | 145 | compatible = "ns16550"; |
144 | reg = <ef600300 8>; | 146 | reg = <0xef600300 0x00000008>; |
145 | virtual-reg = <ef600300>; | 147 | virtual-reg = <0xef600300>; |
146 | clock-frequency = <0>; /* Filled in by zImage */ | 148 | clock-frequency = <0>; /* Filled in by zImage */ |
147 | current-speed = <1c200>; | 149 | current-speed = <115200>; |
148 | interrupt-parent = <&UIC0>; | 150 | interrupt-parent = <&UIC0>; |
149 | interrupts = <0 4>; | 151 | interrupts = <0x0 0x4>; |
150 | }; | 152 | }; |
151 | 153 | ||
152 | UART1: serial@ef600400 { | 154 | UART1: serial@ef600400 { |
153 | device_type = "serial"; | 155 | device_type = "serial"; |
154 | compatible = "ns16550"; | 156 | compatible = "ns16550"; |
155 | reg = <ef600400 8>; | 157 | reg = <0xef600400 0x00000008>; |
156 | virtual-reg = <ef600400>; | 158 | virtual-reg = <0xef600400>; |
157 | clock-frequency = <0>; | 159 | clock-frequency = <0>; |
158 | current-speed = <0>; | 160 | current-speed = <0>; |
159 | interrupt-parent = <&UIC0>; | 161 | interrupt-parent = <&UIC0>; |
160 | interrupts = <1 4>; | 162 | interrupts = <0x1 0x4>; |
161 | }; | 163 | }; |
162 | 164 | ||
163 | UART2: serial@ef600500 { | 165 | UART2: serial@ef600500 { |
164 | device_type = "serial"; | 166 | device_type = "serial"; |
165 | compatible = "ns16550"; | 167 | compatible = "ns16550"; |
166 | reg = <ef600500 8>; | 168 | reg = <0xef600500 0x00000008>; |
167 | virtual-reg = <ef600500>; | 169 | virtual-reg = <0xef600500>; |
168 | clock-frequency = <0>; | 170 | clock-frequency = <0>; |
169 | current-speed = <0>; | 171 | current-speed = <0>; |
170 | interrupt-parent = <&UIC0>; | 172 | interrupt-parent = <&UIC0>; |
171 | interrupts = <3 4>; | 173 | interrupts = <0x3 0x4>; |
172 | status = "disabled"; | 174 | status = "disabled"; |
173 | }; | 175 | }; |
174 | 176 | ||
175 | UART3: serial@ef600600 { | 177 | UART3: serial@ef600600 { |
176 | device_type = "serial"; | 178 | device_type = "serial"; |
177 | compatible = "ns16550"; | 179 | compatible = "ns16550"; |
178 | reg = <ef600600 8>; | 180 | reg = <0xef600600 0x00000008>; |
179 | virtual-reg = <ef600600>; | 181 | virtual-reg = <0xef600600>; |
180 | clock-frequency = <0>; | 182 | clock-frequency = <0>; |
181 | current-speed = <0>; | 183 | current-speed = <0>; |
182 | interrupt-parent = <&UIC0>; | 184 | interrupt-parent = <&UIC0>; |
183 | interrupts = <4 4>; | 185 | interrupts = <0x4 0x4>; |
184 | status = "disabled"; | 186 | status = "disabled"; |
185 | }; | 187 | }; |
186 | 188 | ||
187 | IIC0: i2c@ef600700 { | 189 | IIC0: i2c@ef600700 { |
188 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 190 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
189 | reg = <ef600700 14>; | 191 | reg = <0xef600700 0x00000014>; |
190 | interrupt-parent = <&UIC0>; | 192 | interrupt-parent = <&UIC0>; |
191 | interrupts = <2 4>; | 193 | interrupts = <0x2 0x4>; |
192 | }; | 194 | }; |
193 | 195 | ||
194 | IIC1: i2c@ef600800 { | 196 | IIC1: i2c@ef600800 { |
195 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 197 | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; |
196 | reg = <ef600800 14>; | 198 | reg = <0xef600800 0x00000014>; |
197 | interrupt-parent = <&UIC0>; | 199 | interrupt-parent = <&UIC0>; |
198 | interrupts = <7 4>; | 200 | interrupts = <0x7 0x4>; |
199 | }; | 201 | }; |
200 | 202 | ||
201 | spi@ef600900 { | 203 | spi@ef600900 { |
202 | compatible = "amcc,spi-440ep"; | 204 | compatible = "amcc,spi-440ep"; |
203 | reg = <ef600900 6>; | 205 | reg = <0xef600900 0x00000006>; |
204 | interrupts = <8 4>; | 206 | interrupts = <0x8 0x4>; |
205 | interrupt-parent = <&UIC0>; | 207 | interrupt-parent = <&UIC0>; |
206 | }; | 208 | }; |
207 | 209 | ||
208 | ZMII0: emac-zmii@ef600d00 { | 210 | ZMII0: emac-zmii@ef600d00 { |
209 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 211 | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; |
210 | reg = <ef600d00 c>; | 212 | reg = <0xef600d00 0x0000000c>; |
211 | }; | 213 | }; |
212 | 214 | ||
213 | EMAC0: ethernet@ef600e00 { | 215 | EMAC0: ethernet@ef600e00 { |
214 | device_type = "network"; | 216 | device_type = "network"; |
215 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 217 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
216 | interrupt-parent = <&UIC1>; | 218 | interrupt-parent = <&UIC1>; |
217 | interrupts = <1c 4 1d 4>; | 219 | interrupts = <0x1c 0x4 0x1d 0x4>; |
218 | reg = <ef600e00 70>; | 220 | reg = <0xef600e00 0x00000070>; |
219 | local-mac-address = [000000000000]; | 221 | local-mac-address = [000000000000]; |
220 | mal-device = <&MAL0>; | 222 | mal-device = <&MAL0>; |
221 | mal-tx-channel = <0 1>; | 223 | mal-tx-channel = <0 1>; |
222 | mal-rx-channel = <0>; | 224 | mal-rx-channel = <0>; |
223 | cell-index = <0>; | 225 | cell-index = <0>; |
224 | max-frame-size = <5dc>; | 226 | max-frame-size = <1500>; |
225 | rx-fifo-size = <1000>; | 227 | rx-fifo-size = <4096>; |
226 | tx-fifo-size = <800>; | 228 | tx-fifo-size = <2048>; |
227 | phy-mode = "rmii"; | 229 | phy-mode = "rmii"; |
228 | phy-map = <00000000>; | 230 | phy-map = <0x00000000>; |
229 | zmii-device = <&ZMII0>; | 231 | zmii-device = <&ZMII0>; |
230 | zmii-channel = <0>; | 232 | zmii-channel = <0>; |
231 | }; | 233 | }; |
@@ -234,26 +236,26 @@ | |||
234 | device_type = "network"; | 236 | device_type = "network"; |
235 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 237 | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; |
236 | interrupt-parent = <&UIC1>; | 238 | interrupt-parent = <&UIC1>; |
237 | interrupts = <1e 4 1f 4>; | 239 | interrupts = <0x1e 0x4 0x1f 0x4>; |
238 | reg = <ef600f00 70>; | 240 | reg = <0xef600f00 0x00000070>; |
239 | local-mac-address = [000000000000]; | 241 | local-mac-address = [000000000000]; |
240 | mal-device = <&MAL0>; | 242 | mal-device = <&MAL0>; |
241 | mal-tx-channel = <2 3>; | 243 | mal-tx-channel = <2 3>; |
242 | mal-rx-channel = <1>; | 244 | mal-rx-channel = <1>; |
243 | cell-index = <1>; | 245 | cell-index = <1>; |
244 | max-frame-size = <5dc>; | 246 | max-frame-size = <1500>; |
245 | rx-fifo-size = <1000>; | 247 | rx-fifo-size = <4096>; |
246 | tx-fifo-size = <800>; | 248 | tx-fifo-size = <2048>; |
247 | phy-mode = "rmii"; | 249 | phy-mode = "rmii"; |
248 | phy-map = <00000000>; | 250 | phy-map = <0x00000000>; |
249 | zmii-device = <&ZMII0>; | 251 | zmii-device = <&ZMII0>; |
250 | zmii-channel = <1>; | 252 | zmii-channel = <1>; |
251 | }; | 253 | }; |
252 | 254 | ||
253 | usb@ef601000 { | 255 | usb@ef601000 { |
254 | compatible = "ohci-be"; | 256 | compatible = "ohci-be"; |
255 | reg = <ef601000 80>; | 257 | reg = <0xef601000 0x00000080>; |
256 | interrupts = <8 4 9 4>; | 258 | interrupts = <0x8 0x4 0x9 0x4>; |
257 | interrupt-parent = < &UIC1 >; | 259 | interrupt-parent = < &UIC1 >; |
258 | }; | 260 | }; |
259 | }; | 261 | }; |
@@ -265,35 +267,35 @@ | |||
265 | #address-cells = <3>; | 267 | #address-cells = <3>; |
266 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 268 | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; |
267 | primary; | 269 | primary; |
268 | reg = <0 eec00000 8 /* Config space access */ | 270 | reg = <0x00000000 0xeec00000 0x00000008 /* Config space access */ |
269 | 0 eed00000 4 /* IACK */ | 271 | 0x00000000 0xeed00000 0x00000004 /* IACK */ |
270 | 0 eed00000 4 /* Special cycle */ | 272 | 0x00000000 0xeed00000 0x00000004 /* Special cycle */ |
271 | 0 ef400000 40>; /* Internal registers */ | 273 | 0x00000000 0xef400000 0x00000040>; /* Internal registers */ |
272 | 274 | ||
273 | /* Outbound ranges, one memory and one IO, | 275 | /* Outbound ranges, one memory and one IO, |
274 | * later cannot be changed. Chip supports a second | 276 | * later cannot be changed. Chip supports a second |
275 | * IO range but we don't use it for now | 277 | * IO range but we don't use it for now |
276 | */ | 278 | */ |
277 | ranges = <02000000 0 a0000000 0 a0000000 0 20000000 | 279 | ranges = <0x02000000 0x00000000 0xa0000000 0x00000000 0xa0000000 0x00000000 0x20000000 |
278 | 01000000 0 00000000 0 e8000000 0 00010000>; | 280 | 0x01000000 0x00000000 0x00000000 0x00000000 0xe8000000 0x00000000 0x00010000>; |
279 | 281 | ||
280 | /* Inbound 2GB range starting at 0 */ | 282 | /* Inbound 2GB range starting at 0 */ |
281 | dma-ranges = <42000000 0 0 0 0 0 80000000>; | 283 | dma-ranges = <0x42000000 0x0 0x0 0x0 0x0 0x0 0x80000000>; |
282 | 284 | ||
283 | /* Bamboo has all 4 IRQ pins tied together per slot */ | 285 | /* Bamboo has all 4 IRQ pins tied together per slot */ |
284 | interrupt-map-mask = <f800 0 0 0>; | 286 | interrupt-map-mask = <0xf800 0x0 0x0 0x0>; |
285 | interrupt-map = < | 287 | interrupt-map = < |
286 | /* IDSEL 1 */ | 288 | /* IDSEL 1 */ |
287 | 0800 0 0 0 &UIC0 1c 8 | 289 | 0x800 0x0 0x0 0x0 &UIC0 0x1c 0x8 |
288 | 290 | ||
289 | /* IDSEL 2 */ | 291 | /* IDSEL 2 */ |
290 | 1000 0 0 0 &UIC0 1b 8 | 292 | 0x1000 0x0 0x0 0x0 &UIC0 0x1b 0x8 |
291 | 293 | ||
292 | /* IDSEL 3 */ | 294 | /* IDSEL 3 */ |
293 | 1800 0 0 0 &UIC0 1a 8 | 295 | 0x1800 0x0 0x0 0x0 &UIC0 0x1a 0x8 |
294 | 296 | ||
295 | /* IDSEL 4 */ | 297 | /* IDSEL 4 */ |
296 | 2000 0 0 0 &UIC0 19 8 | 298 | 0x2000 0x0 0x0 0x0 &UIC0 0x19 0x8 |
297 | >; | 299 | >; |
298 | }; | 300 | }; |
299 | }; | 301 | }; |
diff --git a/arch/powerpc/boot/redboot-83xx.c b/arch/powerpc/boot/redboot-83xx.c new file mode 100644 index 000000000000..79aa9e151fa7 --- /dev/null +++ b/arch/powerpc/boot/redboot-83xx.c | |||
@@ -0,0 +1,60 @@ | |||
1 | /* | ||
2 | * RedBoot firmware support | ||
3 | * | ||
4 | * Author: Scott Wood <scottwood@freescale.com> | ||
5 | * | ||
6 | * Copyright (c) 2007 Freescale Semiconductor, Inc. | ||
7 | * Copyright (c) 2008 Codehermit | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License version 2 as published | ||
11 | * by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include "ops.h" | ||
15 | #include "stdio.h" | ||
16 | #include "redboot.h" | ||
17 | #include "fsl-soc.h" | ||
18 | #include "io.h" | ||
19 | |||
20 | static bd_t bd; | ||
21 | BSS_STACK(4096); | ||
22 | |||
23 | #define MHZ(x) ((x + 500000) / 1000000) | ||
24 | |||
25 | static void platform_fixups(void) | ||
26 | { | ||
27 | void *node; | ||
28 | |||
29 | dt_fixup_memory(bd.bi_memstart, bd.bi_memsize); | ||
30 | dt_fixup_mac_addresses(bd.bi_enetaddr); | ||
31 | dt_fixup_cpu_clocks(bd.bi_intfreq, bd.bi_busfreq / 16, bd.bi_busfreq); | ||
32 | |||
33 | node = finddevice("/soc/cpm/brg"); | ||
34 | if (node) { | ||
35 | printf("BRG clock-frequency <- 0x%x (%dMHz)\r\n", | ||
36 | bd.bi_busfreq, MHZ(bd.bi_busfreq)); | ||
37 | setprop(node, "clock-frequency", &bd.bi_busfreq, 4); | ||
38 | } | ||
39 | |||
40 | } | ||
41 | |||
42 | void platform_init(unsigned long r3, unsigned long r4, unsigned long r5, | ||
43 | unsigned long r6, unsigned long r7) | ||
44 | { | ||
45 | memcpy(&bd, (char *)r3, sizeof(bd)); | ||
46 | |||
47 | if (bd.bi_tag != 0x42444944) | ||
48 | return; | ||
49 | |||
50 | simple_alloc_init(_end, | ||
51 | bd.bi_memstart + bd.bi_memsize - (unsigned long)_end, | ||
52 | 32, 64); | ||
53 | |||
54 | fdt_init(_dtb_start); | ||
55 | serial_console_init(); | ||
56 | platform_ops.fixups = platform_fixups; | ||
57 | |||
58 | loader_info.cmdline = (char *)bd.bi_cmdline; | ||
59 | loader_info.cmdline_len = strlen((char *)bd.bi_cmdline); | ||
60 | } | ||
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper index d6c96d9ab291..cb87a015be7c 100755 --- a/arch/powerpc/boot/wrapper +++ b/arch/powerpc/boot/wrapper | |||
@@ -171,13 +171,13 @@ cuboot*) | |||
171 | *-mpc824*) | 171 | *-mpc824*) |
172 | platformo=$object/cuboot-824x.o | 172 | platformo=$object/cuboot-824x.o |
173 | ;; | 173 | ;; |
174 | *-mpc83*) | 174 | *-mpc83*|*-asp834x*) |
175 | platformo=$object/cuboot-83xx.o | 175 | platformo=$object/cuboot-83xx.o |
176 | ;; | 176 | ;; |
177 | *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) | 177 | *-tqm8541|*-mpc8560*|*-tqm8560|*-tqm8555|*-ksi8560*) |
178 | platformo=$object/cuboot-85xx-cpm2.o | 178 | platformo=$object/cuboot-85xx-cpm2.o |
179 | ;; | 179 | ;; |
180 | *-mpc85*|*-tqm8540|*-sbc85*) | 180 | *-mpc85*|*-tqm85*|*-sbc85*) |
181 | platformo=$object/cuboot-85xx.o | 181 | platformo=$object/cuboot-85xx.o |
182 | ;; | 182 | ;; |
183 | esac | 183 | esac |
@@ -203,6 +203,10 @@ simpleboot-virtex405-*) | |||
203 | platformo="$object/virtex405-head.o $object/simpleboot.o" | 203 | platformo="$object/virtex405-head.o $object/simpleboot.o" |
204 | binary=y | 204 | binary=y |
205 | ;; | 205 | ;; |
206 | asp834x-redboot) | ||
207 | platformo="$object/fixed-head.o $object/redboot-83xx.o" | ||
208 | binary=y | ||
209 | ;; | ||
206 | esac | 210 | esac |
207 | 211 | ||
208 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" | 212 | vmz="$tmpdir/`basename \"$kernel\"`.$ext" |
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig new file mode 100644 index 000000000000..9ce5cbc2a4e7 --- /dev/null +++ b/arch/powerpc/configs/44x/sam440ep_defconfig | |||
@@ -0,0 +1,1192 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.25 | ||
4 | # Mon May 5 13:43:02 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_6xx is not set | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | CONFIG_44x=y | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | CONFIG_4xx=y | ||
19 | CONFIG_BOOKE=y | ||
20 | CONFIG_PTE_64BIT=y | ||
21 | CONFIG_PHYS_64BIT=y | ||
22 | # CONFIG_PPC_MM_SLICES is not set | ||
23 | CONFIG_NOT_COHERENT_CACHE=y | ||
24 | CONFIG_PPC32=y | ||
25 | CONFIG_WORD_SIZE=32 | ||
26 | CONFIG_PPC_MERGE=y | ||
27 | CONFIG_MMU=y | ||
28 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
29 | CONFIG_GENERIC_TIME=y | ||
30 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
31 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
32 | CONFIG_GENERIC_HARDIRQS=y | ||
33 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
34 | CONFIG_IRQ_PER_CPU=y | ||
35 | CONFIG_STACKTRACE_SUPPORT=y | ||
36 | CONFIG_LOCKDEP_SUPPORT=y | ||
37 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
38 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
39 | CONFIG_GENERIC_HWEIGHT=y | ||
40 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
41 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
42 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
43 | CONFIG_PPC=y | ||
44 | CONFIG_EARLY_PRINTK=y | ||
45 | CONFIG_GENERIC_NVRAM=y | ||
46 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
47 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
48 | CONFIG_PPC_OF=y | ||
49 | CONFIG_OF=y | ||
50 | CONFIG_PPC_UDBG_16550=y | ||
51 | # CONFIG_GENERIC_TBSYNC is not set | ||
52 | CONFIG_AUDIT_ARCH=y | ||
53 | CONFIG_GENERIC_BUG=y | ||
54 | # CONFIG_DEFAULT_UIMAGE is not set | ||
55 | CONFIG_PPC_DCR_NATIVE=y | ||
56 | # CONFIG_PPC_DCR_MMIO is not set | ||
57 | CONFIG_PPC_DCR=y | ||
58 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
59 | |||
60 | # | ||
61 | # General setup | ||
62 | # | ||
63 | CONFIG_EXPERIMENTAL=y | ||
64 | CONFIG_BROKEN_ON_SMP=y | ||
65 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
66 | CONFIG_LOCALVERSION="" | ||
67 | CONFIG_LOCALVERSION_AUTO=y | ||
68 | CONFIG_SWAP=y | ||
69 | CONFIG_SYSVIPC=y | ||
70 | CONFIG_SYSVIPC_SYSCTL=y | ||
71 | CONFIG_POSIX_MQUEUE=y | ||
72 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
73 | # CONFIG_TASKSTATS is not set | ||
74 | # CONFIG_AUDIT is not set | ||
75 | CONFIG_IKCONFIG=y | ||
76 | # CONFIG_IKCONFIG_PROC is not set | ||
77 | CONFIG_LOG_BUF_SHIFT=14 | ||
78 | # CONFIG_CGROUPS is not set | ||
79 | CONFIG_GROUP_SCHED=y | ||
80 | CONFIG_FAIR_GROUP_SCHED=y | ||
81 | # CONFIG_RT_GROUP_SCHED is not set | ||
82 | CONFIG_USER_SCHED=y | ||
83 | # CONFIG_CGROUP_SCHED is not set | ||
84 | CONFIG_SYSFS_DEPRECATED=y | ||
85 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
86 | # CONFIG_RELAY is not set | ||
87 | # CONFIG_NAMESPACES is not set | ||
88 | CONFIG_BLK_DEV_INITRD=y | ||
89 | CONFIG_INITRAMFS_SOURCE="" | ||
90 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
91 | CONFIG_SYSCTL=y | ||
92 | CONFIG_EMBEDDED=y | ||
93 | CONFIG_SYSCTL_SYSCALL=y | ||
94 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
95 | CONFIG_KALLSYMS=y | ||
96 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
97 | CONFIG_HOTPLUG=y | ||
98 | CONFIG_PRINTK=y | ||
99 | CONFIG_BUG=y | ||
100 | CONFIG_ELF_CORE=y | ||
101 | CONFIG_COMPAT_BRK=y | ||
102 | CONFIG_BASE_FULL=y | ||
103 | CONFIG_FUTEX=y | ||
104 | CONFIG_ANON_INODES=y | ||
105 | CONFIG_EPOLL=y | ||
106 | CONFIG_SIGNALFD=y | ||
107 | CONFIG_TIMERFD=y | ||
108 | CONFIG_EVENTFD=y | ||
109 | CONFIG_SHMEM=y | ||
110 | CONFIG_VM_EVENT_COUNTERS=y | ||
111 | CONFIG_SLUB_DEBUG=y | ||
112 | # CONFIG_SLAB is not set | ||
113 | CONFIG_SLUB=y | ||
114 | # CONFIG_SLOB is not set | ||
115 | # CONFIG_PROFILING is not set | ||
116 | # CONFIG_MARKERS is not set | ||
117 | CONFIG_HAVE_OPROFILE=y | ||
118 | # CONFIG_KPROBES is not set | ||
119 | CONFIG_HAVE_KPROBES=y | ||
120 | CONFIG_HAVE_KRETPROBES=y | ||
121 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
122 | CONFIG_PROC_PAGE_MONITOR=y | ||
123 | CONFIG_SLABINFO=y | ||
124 | CONFIG_RT_MUTEXES=y | ||
125 | # CONFIG_TINY_SHMEM is not set | ||
126 | CONFIG_BASE_SMALL=0 | ||
127 | CONFIG_MODULES=y | ||
128 | CONFIG_MODULE_UNLOAD=y | ||
129 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
130 | # CONFIG_MODVERSIONS is not set | ||
131 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
132 | CONFIG_KMOD=y | ||
133 | CONFIG_BLOCK=y | ||
134 | # CONFIG_LBD is not set | ||
135 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
136 | # CONFIG_LSF is not set | ||
137 | # CONFIG_BLK_DEV_BSG is not set | ||
138 | |||
139 | # | ||
140 | # IO Schedulers | ||
141 | # | ||
142 | CONFIG_IOSCHED_NOOP=y | ||
143 | CONFIG_IOSCHED_AS=y | ||
144 | # CONFIG_IOSCHED_DEADLINE is not set | ||
145 | # CONFIG_IOSCHED_CFQ is not set | ||
146 | CONFIG_DEFAULT_AS=y | ||
147 | # CONFIG_DEFAULT_DEADLINE is not set | ||
148 | # CONFIG_DEFAULT_CFQ is not set | ||
149 | # CONFIG_DEFAULT_NOOP is not set | ||
150 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
151 | CONFIG_CLASSIC_RCU=y | ||
152 | # CONFIG_PPC4xx_PCI_EXPRESS is not set | ||
153 | |||
154 | # | ||
155 | # Platform support | ||
156 | # | ||
157 | # CONFIG_PPC_MPC512x is not set | ||
158 | # CONFIG_PPC_MPC5121 is not set | ||
159 | # CONFIG_PPC_CELL is not set | ||
160 | # CONFIG_PPC_CELL_NATIVE is not set | ||
161 | # CONFIG_PQ2ADS is not set | ||
162 | # CONFIG_BAMBOO is not set | ||
163 | # CONFIG_EBONY is not set | ||
164 | CONFIG_SAM440EP=y | ||
165 | # CONFIG_SEQUOIA is not set | ||
166 | # CONFIG_TAISHAN is not set | ||
167 | # CONFIG_KATMAI is not set | ||
168 | # CONFIG_RAINIER is not set | ||
169 | # CONFIG_WARP is not set | ||
170 | # CONFIG_CANYONLANDS is not set | ||
171 | # CONFIG_YOSEMITE is not set | ||
172 | CONFIG_440EP=y | ||
173 | CONFIG_IBM440EP_ERR42=y | ||
174 | # CONFIG_IPIC is not set | ||
175 | # CONFIG_MPIC is not set | ||
176 | # CONFIG_MPIC_WEIRD is not set | ||
177 | # CONFIG_PPC_I8259 is not set | ||
178 | # CONFIG_PPC_RTAS is not set | ||
179 | # CONFIG_MMIO_NVRAM is not set | ||
180 | # CONFIG_PPC_MPC106 is not set | ||
181 | # CONFIG_PPC_970_NAP is not set | ||
182 | # CONFIG_PPC_INDIRECT_IO is not set | ||
183 | # CONFIG_GENERIC_IOMAP is not set | ||
184 | # CONFIG_CPU_FREQ is not set | ||
185 | # CONFIG_FSL_ULI1575 is not set | ||
186 | |||
187 | # | ||
188 | # Kernel options | ||
189 | # | ||
190 | # CONFIG_HIGHMEM is not set | ||
191 | # CONFIG_TICK_ONESHOT is not set | ||
192 | # CONFIG_NO_HZ is not set | ||
193 | # CONFIG_HIGH_RES_TIMERS is not set | ||
194 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
195 | # CONFIG_HZ_100 is not set | ||
196 | CONFIG_HZ_250=y | ||
197 | # CONFIG_HZ_300 is not set | ||
198 | # CONFIG_HZ_1000 is not set | ||
199 | CONFIG_HZ=250 | ||
200 | # CONFIG_SCHED_HRTICK is not set | ||
201 | CONFIG_PREEMPT_NONE=y | ||
202 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
203 | # CONFIG_PREEMPT is not set | ||
204 | CONFIG_BINFMT_ELF=y | ||
205 | # CONFIG_BINFMT_MISC is not set | ||
206 | # CONFIG_MATH_EMULATION is not set | ||
207 | # CONFIG_IOMMU_HELPER is not set | ||
208 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
209 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
210 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
211 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
212 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
213 | CONFIG_SELECT_MEMORY_MODEL=y | ||
214 | CONFIG_FLATMEM_MANUAL=y | ||
215 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
216 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
217 | CONFIG_FLATMEM=y | ||
218 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
219 | # CONFIG_SPARSEMEM_STATIC is not set | ||
220 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
221 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
222 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
223 | CONFIG_RESOURCES_64BIT=y | ||
224 | CONFIG_ZONE_DMA_FLAG=1 | ||
225 | CONFIG_BOUNCE=y | ||
226 | CONFIG_VIRT_TO_BUS=y | ||
227 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
228 | CONFIG_PROC_DEVICETREE=y | ||
229 | CONFIG_CMDLINE_BOOL=y | ||
230 | CONFIG_CMDLINE="" | ||
231 | CONFIG_SECCOMP=y | ||
232 | CONFIG_ISA_DMA_API=y | ||
233 | |||
234 | # | ||
235 | # Bus options | ||
236 | # | ||
237 | CONFIG_ZONE_DMA=y | ||
238 | CONFIG_PPC_INDIRECT_PCI=y | ||
239 | CONFIG_4xx_SOC=y | ||
240 | CONFIG_PCI=y | ||
241 | CONFIG_PCI_DOMAINS=y | ||
242 | CONFIG_PCI_SYSCALL=y | ||
243 | # CONFIG_PCIEPORTBUS is not set | ||
244 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
245 | # CONFIG_PCI_MSI is not set | ||
246 | CONFIG_PCI_LEGACY=y | ||
247 | # CONFIG_PCCARD is not set | ||
248 | # CONFIG_HOTPLUG_PCI is not set | ||
249 | # CONFIG_HAS_RAPIDIO is not set | ||
250 | |||
251 | # | ||
252 | # Advanced setup | ||
253 | # | ||
254 | # CONFIG_ADVANCED_OPTIONS is not set | ||
255 | |||
256 | # | ||
257 | # Default settings for advanced configuration options are used | ||
258 | # | ||
259 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
260 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
261 | CONFIG_KERNEL_START=0xc0000000 | ||
262 | CONFIG_PHYSICAL_START=0x00000000 | ||
263 | CONFIG_TASK_SIZE=0xc0000000 | ||
264 | CONFIG_CONSISTENT_START=0xff100000 | ||
265 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
266 | |||
267 | # | ||
268 | # Networking | ||
269 | # | ||
270 | CONFIG_NET=y | ||
271 | |||
272 | # | ||
273 | # Networking options | ||
274 | # | ||
275 | CONFIG_PACKET=y | ||
276 | # CONFIG_PACKET_MMAP is not set | ||
277 | CONFIG_UNIX=y | ||
278 | # CONFIG_NET_KEY is not set | ||
279 | CONFIG_INET=y | ||
280 | # CONFIG_IP_MULTICAST is not set | ||
281 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
282 | CONFIG_IP_FIB_HASH=y | ||
283 | CONFIG_IP_PNP=y | ||
284 | CONFIG_IP_PNP_DHCP=y | ||
285 | CONFIG_IP_PNP_BOOTP=y | ||
286 | # CONFIG_IP_PNP_RARP is not set | ||
287 | # CONFIG_NET_IPIP is not set | ||
288 | # CONFIG_NET_IPGRE is not set | ||
289 | # CONFIG_ARPD is not set | ||
290 | # CONFIG_SYN_COOKIES is not set | ||
291 | # CONFIG_INET_AH is not set | ||
292 | # CONFIG_INET_ESP is not set | ||
293 | # CONFIG_INET_IPCOMP is not set | ||
294 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
295 | # CONFIG_INET_TUNNEL is not set | ||
296 | # CONFIG_INET_XFRM_MODE_TRANSPORT is not set | ||
297 | # CONFIG_INET_XFRM_MODE_TUNNEL is not set | ||
298 | # CONFIG_INET_XFRM_MODE_BEET is not set | ||
299 | # CONFIG_INET_LRO is not set | ||
300 | CONFIG_INET_DIAG=y | ||
301 | CONFIG_INET_TCP_DIAG=y | ||
302 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
303 | CONFIG_TCP_CONG_CUBIC=y | ||
304 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
305 | # CONFIG_TCP_MD5SIG is not set | ||
306 | # CONFIG_IPV6 is not set | ||
307 | # CONFIG_NETWORK_SECMARK is not set | ||
308 | # CONFIG_NETFILTER is not set | ||
309 | # CONFIG_IP_DCCP is not set | ||
310 | # CONFIG_IP_SCTP is not set | ||
311 | # CONFIG_TIPC is not set | ||
312 | # CONFIG_ATM is not set | ||
313 | # CONFIG_BRIDGE is not set | ||
314 | # CONFIG_VLAN_8021Q is not set | ||
315 | # CONFIG_DECNET is not set | ||
316 | # CONFIG_LLC2 is not set | ||
317 | # CONFIG_IPX is not set | ||
318 | # CONFIG_ATALK is not set | ||
319 | # CONFIG_X25 is not set | ||
320 | # CONFIG_LAPB is not set | ||
321 | # CONFIG_ECONET is not set | ||
322 | # CONFIG_WAN_ROUTER is not set | ||
323 | # CONFIG_NET_SCHED is not set | ||
324 | |||
325 | # | ||
326 | # Network testing | ||
327 | # | ||
328 | # CONFIG_NET_PKTGEN is not set | ||
329 | # CONFIG_HAMRADIO is not set | ||
330 | # CONFIG_CAN is not set | ||
331 | # CONFIG_IRDA is not set | ||
332 | # CONFIG_BT is not set | ||
333 | # CONFIG_AF_RXRPC is not set | ||
334 | |||
335 | # | ||
336 | # Wireless | ||
337 | # | ||
338 | # CONFIG_CFG80211 is not set | ||
339 | # CONFIG_WIRELESS_EXT is not set | ||
340 | # CONFIG_MAC80211 is not set | ||
341 | # CONFIG_IEEE80211 is not set | ||
342 | # CONFIG_RFKILL is not set | ||
343 | # CONFIG_NET_9P is not set | ||
344 | |||
345 | # | ||
346 | # Device Drivers | ||
347 | # | ||
348 | |||
349 | # | ||
350 | # Generic Driver Options | ||
351 | # | ||
352 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
353 | CONFIG_STANDALONE=y | ||
354 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
355 | CONFIG_FW_LOADER=y | ||
356 | # CONFIG_SYS_HYPERVISOR is not set | ||
357 | CONFIG_CONNECTOR=y | ||
358 | CONFIG_PROC_EVENTS=y | ||
359 | # CONFIG_MTD is not set | ||
360 | CONFIG_OF_DEVICE=y | ||
361 | CONFIG_OF_I2C=y | ||
362 | # CONFIG_PARPORT is not set | ||
363 | CONFIG_BLK_DEV=y | ||
364 | # CONFIG_BLK_DEV_FD is not set | ||
365 | # CONFIG_BLK_CPQ_DA is not set | ||
366 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
367 | # CONFIG_BLK_DEV_DAC960 is not set | ||
368 | # CONFIG_BLK_DEV_UMEM is not set | ||
369 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
370 | CONFIG_BLK_DEV_LOOP=y | ||
371 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
372 | # CONFIG_BLK_DEV_NBD is not set | ||
373 | # CONFIG_BLK_DEV_SX8 is not set | ||
374 | # CONFIG_BLK_DEV_UB is not set | ||
375 | CONFIG_BLK_DEV_RAM=y | ||
376 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
377 | CONFIG_BLK_DEV_RAM_SIZE=35000 | ||
378 | # CONFIG_BLK_DEV_XIP is not set | ||
379 | # CONFIG_CDROM_PKTCDVD is not set | ||
380 | # CONFIG_ATA_OVER_ETH is not set | ||
381 | # CONFIG_XILINX_SYSACE is not set | ||
382 | # CONFIG_MISC_DEVICES is not set | ||
383 | CONFIG_HAVE_IDE=y | ||
384 | # CONFIG_IDE is not set | ||
385 | |||
386 | # | ||
387 | # SCSI device support | ||
388 | # | ||
389 | # CONFIG_RAID_ATTRS is not set | ||
390 | CONFIG_SCSI=y | ||
391 | CONFIG_SCSI_DMA=y | ||
392 | # CONFIG_SCSI_TGT is not set | ||
393 | # CONFIG_SCSI_NETLINK is not set | ||
394 | CONFIG_SCSI_PROC_FS=y | ||
395 | |||
396 | # | ||
397 | # SCSI support type (disk, tape, CD-ROM) | ||
398 | # | ||
399 | CONFIG_BLK_DEV_SD=y | ||
400 | # CONFIG_CHR_DEV_ST is not set | ||
401 | # CONFIG_CHR_DEV_OSST is not set | ||
402 | CONFIG_BLK_DEV_SR=y | ||
403 | # CONFIG_BLK_DEV_SR_VENDOR is not set | ||
404 | CONFIG_CHR_DEV_SG=y | ||
405 | # CONFIG_CHR_DEV_SCH is not set | ||
406 | |||
407 | # | ||
408 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
409 | # | ||
410 | # CONFIG_SCSI_MULTI_LUN is not set | ||
411 | # CONFIG_SCSI_CONSTANTS is not set | ||
412 | # CONFIG_SCSI_LOGGING is not set | ||
413 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
414 | CONFIG_SCSI_WAIT_SCAN=m | ||
415 | |||
416 | # | ||
417 | # SCSI Transports | ||
418 | # | ||
419 | # CONFIG_SCSI_SPI_ATTRS is not set | ||
420 | # CONFIG_SCSI_FC_ATTRS is not set | ||
421 | # CONFIG_SCSI_ISCSI_ATTRS is not set | ||
422 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
423 | # CONFIG_SCSI_SRP_ATTRS is not set | ||
424 | # CONFIG_SCSI_LOWLEVEL is not set | ||
425 | CONFIG_ATA=y | ||
426 | # CONFIG_ATA_NONSTANDARD is not set | ||
427 | # CONFIG_SATA_PMP is not set | ||
428 | # CONFIG_SATA_AHCI is not set | ||
429 | # CONFIG_SATA_SIL24 is not set | ||
430 | CONFIG_ATA_SFF=y | ||
431 | # CONFIG_SATA_SVW is not set | ||
432 | # CONFIG_ATA_PIIX is not set | ||
433 | # CONFIG_SATA_MV is not set | ||
434 | # CONFIG_SATA_NV is not set | ||
435 | # CONFIG_PDC_ADMA is not set | ||
436 | # CONFIG_SATA_QSTOR is not set | ||
437 | # CONFIG_SATA_PROMISE is not set | ||
438 | # CONFIG_SATA_SX4 is not set | ||
439 | CONFIG_SATA_SIL=y | ||
440 | # CONFIG_SATA_SIS is not set | ||
441 | # CONFIG_SATA_ULI is not set | ||
442 | # CONFIG_SATA_VIA is not set | ||
443 | # CONFIG_SATA_VITESSE is not set | ||
444 | # CONFIG_SATA_INIC162X is not set | ||
445 | # CONFIG_PATA_ALI is not set | ||
446 | # CONFIG_PATA_AMD is not set | ||
447 | # CONFIG_PATA_ARTOP is not set | ||
448 | # CONFIG_PATA_ATIIXP is not set | ||
449 | # CONFIG_PATA_CMD640_PCI is not set | ||
450 | # CONFIG_PATA_CMD64X is not set | ||
451 | # CONFIG_PATA_CS5520 is not set | ||
452 | # CONFIG_PATA_CS5530 is not set | ||
453 | # CONFIG_PATA_CYPRESS is not set | ||
454 | # CONFIG_PATA_EFAR is not set | ||
455 | # CONFIG_ATA_GENERIC is not set | ||
456 | # CONFIG_PATA_HPT366 is not set | ||
457 | # CONFIG_PATA_HPT37X is not set | ||
458 | # CONFIG_PATA_HPT3X2N is not set | ||
459 | # CONFIG_PATA_HPT3X3 is not set | ||
460 | # CONFIG_PATA_IT821X is not set | ||
461 | # CONFIG_PATA_IT8213 is not set | ||
462 | # CONFIG_PATA_JMICRON is not set | ||
463 | # CONFIG_PATA_TRIFLEX is not set | ||
464 | # CONFIG_PATA_MARVELL is not set | ||
465 | # CONFIG_PATA_MPIIX is not set | ||
466 | # CONFIG_PATA_OLDPIIX is not set | ||
467 | # CONFIG_PATA_NETCELL is not set | ||
468 | # CONFIG_PATA_NINJA32 is not set | ||
469 | # CONFIG_PATA_NS87410 is not set | ||
470 | # CONFIG_PATA_NS87415 is not set | ||
471 | # CONFIG_PATA_OPTI is not set | ||
472 | # CONFIG_PATA_OPTIDMA is not set | ||
473 | # CONFIG_PATA_PDC_OLD is not set | ||
474 | # CONFIG_PATA_RADISYS is not set | ||
475 | # CONFIG_PATA_RZ1000 is not set | ||
476 | # CONFIG_PATA_SC1200 is not set | ||
477 | # CONFIG_PATA_SERVERWORKS is not set | ||
478 | # CONFIG_PATA_PDC2027X is not set | ||
479 | # CONFIG_PATA_SIL680 is not set | ||
480 | # CONFIG_PATA_SIS is not set | ||
481 | # CONFIG_PATA_VIA is not set | ||
482 | # CONFIG_PATA_WINBOND is not set | ||
483 | # CONFIG_PATA_PLATFORM is not set | ||
484 | # CONFIG_MD is not set | ||
485 | # CONFIG_FUSION is not set | ||
486 | |||
487 | # | ||
488 | # IEEE 1394 (FireWire) support | ||
489 | # | ||
490 | # CONFIG_FIREWIRE is not set | ||
491 | # CONFIG_IEEE1394 is not set | ||
492 | # CONFIG_I2O is not set | ||
493 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
494 | CONFIG_NETDEVICES=y | ||
495 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
496 | # CONFIG_DUMMY is not set | ||
497 | # CONFIG_BONDING is not set | ||
498 | # CONFIG_MACVLAN is not set | ||
499 | # CONFIG_EQUALIZER is not set | ||
500 | # CONFIG_TUN is not set | ||
501 | # CONFIG_VETH is not set | ||
502 | # CONFIG_ARCNET is not set | ||
503 | # CONFIG_PHYLIB is not set | ||
504 | CONFIG_NET_ETHERNET=y | ||
505 | # CONFIG_MII is not set | ||
506 | # CONFIG_HAPPYMEAL is not set | ||
507 | # CONFIG_SUNGEM is not set | ||
508 | # CONFIG_CASSINI is not set | ||
509 | # CONFIG_NET_VENDOR_3COM is not set | ||
510 | # CONFIG_NET_TULIP is not set | ||
511 | # CONFIG_HP100 is not set | ||
512 | CONFIG_IBM_NEW_EMAC=y | ||
513 | CONFIG_IBM_NEW_EMAC_RXB=128 | ||
514 | CONFIG_IBM_NEW_EMAC_TXB=64 | ||
515 | CONFIG_IBM_NEW_EMAC_POLL_WEIGHT=32 | ||
516 | CONFIG_IBM_NEW_EMAC_RX_COPY_THRESHOLD=256 | ||
517 | CONFIG_IBM_NEW_EMAC_RX_SKB_HEADROOM=0 | ||
518 | # CONFIG_IBM_NEW_EMAC_DEBUG is not set | ||
519 | CONFIG_IBM_NEW_EMAC_ZMII=y | ||
520 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
521 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
522 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
523 | # CONFIG_NET_PCI is not set | ||
524 | # CONFIG_B44 is not set | ||
525 | # CONFIG_NETDEV_1000 is not set | ||
526 | # CONFIG_NETDEV_10000 is not set | ||
527 | # CONFIG_TR is not set | ||
528 | |||
529 | # | ||
530 | # Wireless LAN | ||
531 | # | ||
532 | # CONFIG_WLAN_PRE80211 is not set | ||
533 | # CONFIG_WLAN_80211 is not set | ||
534 | # CONFIG_IWLWIFI is not set | ||
535 | # CONFIG_IWLWIFI_LEDS is not set | ||
536 | |||
537 | # | ||
538 | # USB Network Adapters | ||
539 | # | ||
540 | # CONFIG_USB_CATC is not set | ||
541 | # CONFIG_USB_KAWETH is not set | ||
542 | # CONFIG_USB_PEGASUS is not set | ||
543 | # CONFIG_USB_RTL8150 is not set | ||
544 | # CONFIG_USB_USBNET is not set | ||
545 | # CONFIG_WAN is not set | ||
546 | # CONFIG_FDDI is not set | ||
547 | # CONFIG_HIPPI is not set | ||
548 | # CONFIG_PPP is not set | ||
549 | # CONFIG_SLIP is not set | ||
550 | # CONFIG_NET_FC is not set | ||
551 | # CONFIG_NETCONSOLE is not set | ||
552 | # CONFIG_NETPOLL is not set | ||
553 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
554 | # CONFIG_ISDN is not set | ||
555 | # CONFIG_PHONE is not set | ||
556 | |||
557 | # | ||
558 | # Input device support | ||
559 | # | ||
560 | CONFIG_INPUT=y | ||
561 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
562 | # CONFIG_INPUT_POLLDEV is not set | ||
563 | |||
564 | # | ||
565 | # Userland interfaces | ||
566 | # | ||
567 | CONFIG_INPUT_MOUSEDEV=y | ||
568 | CONFIG_INPUT_MOUSEDEV_PSAUX=y | ||
569 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
570 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
571 | # CONFIG_INPUT_JOYDEV is not set | ||
572 | # CONFIG_INPUT_EVDEV is not set | ||
573 | # CONFIG_INPUT_EVBUG is not set | ||
574 | |||
575 | # | ||
576 | # Input Device Drivers | ||
577 | # | ||
578 | CONFIG_INPUT_KEYBOARD=y | ||
579 | CONFIG_KEYBOARD_ATKBD=y | ||
580 | # CONFIG_KEYBOARD_SUNKBD is not set | ||
581 | # CONFIG_KEYBOARD_LKKBD is not set | ||
582 | # CONFIG_KEYBOARD_XTKBD is not set | ||
583 | # CONFIG_KEYBOARD_NEWTON is not set | ||
584 | # CONFIG_KEYBOARD_STOWAWAY is not set | ||
585 | CONFIG_INPUT_MOUSE=y | ||
586 | CONFIG_MOUSE_PS2=y | ||
587 | CONFIG_MOUSE_PS2_ALPS=y | ||
588 | CONFIG_MOUSE_PS2_LOGIPS2PP=y | ||
589 | CONFIG_MOUSE_PS2_SYNAPTICS=y | ||
590 | CONFIG_MOUSE_PS2_LIFEBOOK=y | ||
591 | CONFIG_MOUSE_PS2_TRACKPOINT=y | ||
592 | # CONFIG_MOUSE_PS2_TOUCHKIT is not set | ||
593 | # CONFIG_MOUSE_SERIAL is not set | ||
594 | # CONFIG_MOUSE_APPLETOUCH is not set | ||
595 | # CONFIG_MOUSE_VSXXXAA is not set | ||
596 | # CONFIG_INPUT_JOYSTICK is not set | ||
597 | # CONFIG_INPUT_TABLET is not set | ||
598 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
599 | # CONFIG_INPUT_MISC is not set | ||
600 | |||
601 | # | ||
602 | # Hardware I/O ports | ||
603 | # | ||
604 | CONFIG_SERIO=y | ||
605 | CONFIG_SERIO_I8042=y | ||
606 | CONFIG_SERIO_SERPORT=y | ||
607 | # CONFIG_SERIO_PCIPS2 is not set | ||
608 | CONFIG_SERIO_LIBPS2=y | ||
609 | # CONFIG_SERIO_RAW is not set | ||
610 | # CONFIG_GAMEPORT is not set | ||
611 | |||
612 | # | ||
613 | # Character devices | ||
614 | # | ||
615 | CONFIG_VT=y | ||
616 | CONFIG_VT_CONSOLE=y | ||
617 | CONFIG_HW_CONSOLE=y | ||
618 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
619 | CONFIG_DEVKMEM=y | ||
620 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
621 | # CONFIG_NOZOMI is not set | ||
622 | |||
623 | # | ||
624 | # Serial drivers | ||
625 | # | ||
626 | CONFIG_SERIAL_8250=y | ||
627 | CONFIG_SERIAL_8250_CONSOLE=y | ||
628 | # CONFIG_SERIAL_8250_PCI is not set | ||
629 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
630 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
631 | CONFIG_SERIAL_8250_EXTENDED=y | ||
632 | # CONFIG_SERIAL_8250_MANY_PORTS is not set | ||
633 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
634 | # CONFIG_SERIAL_8250_DETECT_IRQ is not set | ||
635 | # CONFIG_SERIAL_8250_RSA is not set | ||
636 | |||
637 | # | ||
638 | # Non-8250 serial port support | ||
639 | # | ||
640 | # CONFIG_SERIAL_UARTLITE is not set | ||
641 | CONFIG_SERIAL_CORE=y | ||
642 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
643 | # CONFIG_SERIAL_JSM is not set | ||
644 | CONFIG_SERIAL_OF_PLATFORM=y | ||
645 | CONFIG_UNIX98_PTYS=y | ||
646 | CONFIG_LEGACY_PTYS=y | ||
647 | CONFIG_LEGACY_PTY_COUNT=256 | ||
648 | # CONFIG_IPMI_HANDLER is not set | ||
649 | # CONFIG_HW_RANDOM is not set | ||
650 | # CONFIG_NVRAM is not set | ||
651 | # CONFIG_R3964 is not set | ||
652 | # CONFIG_APPLICOM is not set | ||
653 | # CONFIG_RAW_DRIVER is not set | ||
654 | # CONFIG_TCG_TPM is not set | ||
655 | CONFIG_DEVPORT=y | ||
656 | CONFIG_I2C=y | ||
657 | CONFIG_I2C_BOARDINFO=y | ||
658 | # CONFIG_I2C_CHARDEV is not set | ||
659 | CONFIG_I2C_ALGOBIT=y | ||
660 | |||
661 | # | ||
662 | # I2C Hardware Bus support | ||
663 | # | ||
664 | # CONFIG_I2C_ALI1535 is not set | ||
665 | # CONFIG_I2C_ALI1563 is not set | ||
666 | # CONFIG_I2C_ALI15X3 is not set | ||
667 | # CONFIG_I2C_AMD756 is not set | ||
668 | # CONFIG_I2C_AMD8111 is not set | ||
669 | # CONFIG_I2C_I801 is not set | ||
670 | # CONFIG_I2C_I810 is not set | ||
671 | # CONFIG_I2C_PIIX4 is not set | ||
672 | CONFIG_I2C_IBM_IIC=y | ||
673 | # CONFIG_I2C_MPC is not set | ||
674 | # CONFIG_I2C_NFORCE2 is not set | ||
675 | # CONFIG_I2C_OCORES is not set | ||
676 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
677 | # CONFIG_I2C_PROSAVAGE is not set | ||
678 | # CONFIG_I2C_SAVAGE4 is not set | ||
679 | # CONFIG_I2C_SIMTEC is not set | ||
680 | # CONFIG_I2C_SIS5595 is not set | ||
681 | # CONFIG_I2C_SIS630 is not set | ||
682 | # CONFIG_I2C_SIS96X is not set | ||
683 | # CONFIG_I2C_TAOS_EVM is not set | ||
684 | # CONFIG_I2C_STUB is not set | ||
685 | # CONFIG_I2C_TINY_USB is not set | ||
686 | # CONFIG_I2C_VIA is not set | ||
687 | # CONFIG_I2C_VIAPRO is not set | ||
688 | # CONFIG_I2C_VOODOO3 is not set | ||
689 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
690 | |||
691 | # | ||
692 | # Miscellaneous I2C Chip support | ||
693 | # | ||
694 | # CONFIG_DS1682 is not set | ||
695 | # CONFIG_SENSORS_EEPROM is not set | ||
696 | # CONFIG_SENSORS_PCF8574 is not set | ||
697 | # CONFIG_PCF8575 is not set | ||
698 | # CONFIG_SENSORS_PCF8591 is not set | ||
699 | # CONFIG_SENSORS_MAX6875 is not set | ||
700 | # CONFIG_SENSORS_TSL2550 is not set | ||
701 | # CONFIG_I2C_DEBUG_CORE is not set | ||
702 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
703 | # CONFIG_I2C_DEBUG_BUS is not set | ||
704 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
705 | # CONFIG_SPI is not set | ||
706 | # CONFIG_W1 is not set | ||
707 | # CONFIG_POWER_SUPPLY is not set | ||
708 | # CONFIG_HWMON is not set | ||
709 | # CONFIG_THERMAL is not set | ||
710 | # CONFIG_WATCHDOG is not set | ||
711 | |||
712 | # | ||
713 | # Sonics Silicon Backplane | ||
714 | # | ||
715 | CONFIG_SSB_POSSIBLE=y | ||
716 | # CONFIG_SSB is not set | ||
717 | |||
718 | # | ||
719 | # Multifunction device drivers | ||
720 | # | ||
721 | # CONFIG_MFD_SM501 is not set | ||
722 | # CONFIG_HTC_PASIC3 is not set | ||
723 | |||
724 | # | ||
725 | # Multimedia devices | ||
726 | # | ||
727 | |||
728 | # | ||
729 | # Multimedia core support | ||
730 | # | ||
731 | # CONFIG_VIDEO_DEV is not set | ||
732 | # CONFIG_DVB_CORE is not set | ||
733 | |||
734 | # | ||
735 | # Multimedia drivers | ||
736 | # | ||
737 | # CONFIG_DAB is not set | ||
738 | |||
739 | # | ||
740 | # Graphics support | ||
741 | # | ||
742 | # CONFIG_AGP is not set | ||
743 | # CONFIG_DRM is not set | ||
744 | # CONFIG_VGASTATE is not set | ||
745 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
746 | CONFIG_FB=y | ||
747 | # CONFIG_FIRMWARE_EDID is not set | ||
748 | CONFIG_FB_DDC=y | ||
749 | CONFIG_FB_CFB_FILLRECT=y | ||
750 | CONFIG_FB_CFB_COPYAREA=y | ||
751 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
752 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
753 | # CONFIG_FB_SYS_FILLRECT is not set | ||
754 | # CONFIG_FB_SYS_COPYAREA is not set | ||
755 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
756 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
757 | # CONFIG_FB_SYS_FOPS is not set | ||
758 | CONFIG_FB_DEFERRED_IO=y | ||
759 | # CONFIG_FB_SVGALIB is not set | ||
760 | CONFIG_FB_MACMODES=y | ||
761 | CONFIG_FB_BACKLIGHT=y | ||
762 | CONFIG_FB_MODE_HELPERS=y | ||
763 | # CONFIG_FB_TILEBLITTING is not set | ||
764 | |||
765 | # | ||
766 | # Frame buffer hardware drivers | ||
767 | # | ||
768 | # CONFIG_FB_CIRRUS is not set | ||
769 | # CONFIG_FB_PM2 is not set | ||
770 | # CONFIG_FB_CYBER2000 is not set | ||
771 | # CONFIG_FB_OF is not set | ||
772 | # CONFIG_FB_CT65550 is not set | ||
773 | # CONFIG_FB_ASILIANT is not set | ||
774 | # CONFIG_FB_IMSTT is not set | ||
775 | # CONFIG_FB_VGA16 is not set | ||
776 | # CONFIG_FB_UVESA is not set | ||
777 | # CONFIG_FB_S1D13XXX is not set | ||
778 | # CONFIG_FB_NVIDIA is not set | ||
779 | # CONFIG_FB_RIVA is not set | ||
780 | # CONFIG_FB_MATROX is not set | ||
781 | CONFIG_FB_RADEON=y | ||
782 | CONFIG_FB_RADEON_I2C=y | ||
783 | CONFIG_FB_RADEON_BACKLIGHT=y | ||
784 | # CONFIG_FB_RADEON_DEBUG is not set | ||
785 | # CONFIG_FB_ATY128 is not set | ||
786 | # CONFIG_FB_ATY is not set | ||
787 | # CONFIG_FB_S3 is not set | ||
788 | # CONFIG_FB_SAVAGE is not set | ||
789 | # CONFIG_FB_SIS is not set | ||
790 | # CONFIG_FB_NEOMAGIC is not set | ||
791 | # CONFIG_FB_KYRO is not set | ||
792 | # CONFIG_FB_3DFX is not set | ||
793 | # CONFIG_FB_VOODOO1 is not set | ||
794 | # CONFIG_FB_VT8623 is not set | ||
795 | # CONFIG_FB_TRIDENT is not set | ||
796 | # CONFIG_FB_ARK is not set | ||
797 | # CONFIG_FB_PM3 is not set | ||
798 | # CONFIG_FB_IBM_GXT4500 is not set | ||
799 | # CONFIG_FB_VIRTUAL is not set | ||
800 | CONFIG_BACKLIGHT_LCD_SUPPORT=y | ||
801 | CONFIG_LCD_CLASS_DEVICE=y | ||
802 | CONFIG_BACKLIGHT_CLASS_DEVICE=y | ||
803 | # CONFIG_BACKLIGHT_CORGI is not set | ||
804 | |||
805 | # | ||
806 | # Display device support | ||
807 | # | ||
808 | # CONFIG_DISPLAY_SUPPORT is not set | ||
809 | |||
810 | # | ||
811 | # Console display driver support | ||
812 | # | ||
813 | CONFIG_DUMMY_CONSOLE=y | ||
814 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
815 | CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY=y | ||
816 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
817 | # CONFIG_FONTS is not set | ||
818 | CONFIG_FONT_8x8=y | ||
819 | CONFIG_FONT_8x16=y | ||
820 | CONFIG_LOGO=y | ||
821 | CONFIG_LOGO_LINUX_MONO=y | ||
822 | CONFIG_LOGO_LINUX_VGA16=y | ||
823 | CONFIG_LOGO_LINUX_CLUT224=y | ||
824 | |||
825 | # | ||
826 | # Sound | ||
827 | # | ||
828 | # CONFIG_SOUND is not set | ||
829 | CONFIG_HID_SUPPORT=y | ||
830 | CONFIG_HID=y | ||
831 | # CONFIG_HID_DEBUG is not set | ||
832 | # CONFIG_HIDRAW is not set | ||
833 | |||
834 | # | ||
835 | # USB Input Devices | ||
836 | # | ||
837 | CONFIG_USB_HID=y | ||
838 | # CONFIG_USB_HIDINPUT_POWERBOOK is not set | ||
839 | # CONFIG_HID_FF is not set | ||
840 | # CONFIG_USB_HIDDEV is not set | ||
841 | CONFIG_USB_SUPPORT=y | ||
842 | CONFIG_USB_ARCH_HAS_HCD=y | ||
843 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
844 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
845 | CONFIG_USB=y | ||
846 | # CONFIG_USB_DEBUG is not set | ||
847 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
848 | |||
849 | # | ||
850 | # Miscellaneous USB options | ||
851 | # | ||
852 | CONFIG_USB_DEVICEFS=y | ||
853 | # CONFIG_USB_DEVICE_CLASS is not set | ||
854 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
855 | # CONFIG_USB_OTG is not set | ||
856 | # CONFIG_USB_OTG_WHITELIST is not set | ||
857 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
858 | |||
859 | # | ||
860 | # USB Host Controller Drivers | ||
861 | # | ||
862 | CONFIG_USB_EHCI_HCD=m | ||
863 | # CONFIG_USB_EHCI_ROOT_HUB_TT is not set | ||
864 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
865 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
866 | # CONFIG_USB_ISP116X_HCD is not set | ||
867 | CONFIG_USB_OHCI_HCD=y | ||
868 | CONFIG_USB_OHCI_HCD_PPC_OF=y | ||
869 | CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | ||
870 | CONFIG_USB_OHCI_HCD_PPC_OF_LE=y | ||
871 | CONFIG_USB_OHCI_HCD_PCI=y | ||
872 | CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y | ||
873 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | ||
874 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
875 | # CONFIG_USB_UHCI_HCD is not set | ||
876 | # CONFIG_USB_SL811_HCD is not set | ||
877 | # CONFIG_USB_R8A66597_HCD is not set | ||
878 | |||
879 | # | ||
880 | # USB Device Class drivers | ||
881 | # | ||
882 | # CONFIG_USB_ACM is not set | ||
883 | # CONFIG_USB_PRINTER is not set | ||
884 | |||
885 | # | ||
886 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
887 | # | ||
888 | |||
889 | # | ||
890 | # may also be needed; see USB_STORAGE Help for more information | ||
891 | # | ||
892 | CONFIG_USB_STORAGE=m | ||
893 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
894 | # CONFIG_USB_STORAGE_DATAFAB is not set | ||
895 | # CONFIG_USB_STORAGE_FREECOM is not set | ||
896 | # CONFIG_USB_STORAGE_ISD200 is not set | ||
897 | # CONFIG_USB_STORAGE_DPCM is not set | ||
898 | # CONFIG_USB_STORAGE_USBAT is not set | ||
899 | # CONFIG_USB_STORAGE_SDDR09 is not set | ||
900 | # CONFIG_USB_STORAGE_SDDR55 is not set | ||
901 | # CONFIG_USB_STORAGE_JUMPSHOT is not set | ||
902 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
903 | # CONFIG_USB_STORAGE_KARMA is not set | ||
904 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
905 | # CONFIG_USB_LIBUSUAL is not set | ||
906 | |||
907 | # | ||
908 | # USB Imaging devices | ||
909 | # | ||
910 | # CONFIG_USB_MDC800 is not set | ||
911 | # CONFIG_USB_MICROTEK is not set | ||
912 | # CONFIG_USB_MON is not set | ||
913 | |||
914 | # | ||
915 | # USB port drivers | ||
916 | # | ||
917 | # CONFIG_USB_SERIAL is not set | ||
918 | |||
919 | # | ||
920 | # USB Miscellaneous drivers | ||
921 | # | ||
922 | # CONFIG_USB_EMI62 is not set | ||
923 | # CONFIG_USB_EMI26 is not set | ||
924 | # CONFIG_USB_ADUTUX is not set | ||
925 | # CONFIG_USB_AUERSWALD is not set | ||
926 | # CONFIG_USB_RIO500 is not set | ||
927 | # CONFIG_USB_LEGOTOWER is not set | ||
928 | # CONFIG_USB_LCD is not set | ||
929 | # CONFIG_USB_BERRY_CHARGE is not set | ||
930 | # CONFIG_USB_LED is not set | ||
931 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
932 | # CONFIG_USB_CYTHERM is not set | ||
933 | # CONFIG_USB_PHIDGET is not set | ||
934 | # CONFIG_USB_IDMOUSE is not set | ||
935 | # CONFIG_USB_FTDI_ELAN is not set | ||
936 | # CONFIG_USB_APPLEDISPLAY is not set | ||
937 | # CONFIG_USB_SISUSBVGA is not set | ||
938 | # CONFIG_USB_LD is not set | ||
939 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
940 | # CONFIG_USB_IOWARRIOR is not set | ||
941 | # CONFIG_USB_TEST is not set | ||
942 | # CONFIG_USB_GADGET is not set | ||
943 | # CONFIG_MMC is not set | ||
944 | # CONFIG_MEMSTICK is not set | ||
945 | # CONFIG_NEW_LEDS is not set | ||
946 | # CONFIG_ACCESSIBILITY is not set | ||
947 | # CONFIG_INFINIBAND is not set | ||
948 | # CONFIG_EDAC is not set | ||
949 | CONFIG_RTC_LIB=y | ||
950 | CONFIG_RTC_CLASS=y | ||
951 | CONFIG_RTC_HCTOSYS=y | ||
952 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
953 | # CONFIG_RTC_DEBUG is not set | ||
954 | |||
955 | # | ||
956 | # RTC interfaces | ||
957 | # | ||
958 | CONFIG_RTC_INTF_SYSFS=y | ||
959 | CONFIG_RTC_INTF_PROC=y | ||
960 | CONFIG_RTC_INTF_DEV=y | ||
961 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
962 | # CONFIG_RTC_DRV_TEST is not set | ||
963 | |||
964 | # | ||
965 | # I2C RTC drivers | ||
966 | # | ||
967 | # CONFIG_RTC_DRV_DS1307 is not set | ||
968 | # CONFIG_RTC_DRV_DS1374 is not set | ||
969 | # CONFIG_RTC_DRV_DS1672 is not set | ||
970 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
971 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
972 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
973 | # CONFIG_RTC_DRV_X1205 is not set | ||
974 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
975 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
976 | CONFIG_RTC_DRV_M41T80=y | ||
977 | CONFIG_RTC_DRV_M41T80_WDT=y | ||
978 | # CONFIG_RTC_DRV_S35390A is not set | ||
979 | |||
980 | # | ||
981 | # SPI RTC drivers | ||
982 | # | ||
983 | |||
984 | # | ||
985 | # Platform RTC drivers | ||
986 | # | ||
987 | # CONFIG_RTC_DRV_CMOS is not set | ||
988 | # CONFIG_RTC_DRV_DS1511 is not set | ||
989 | # CONFIG_RTC_DRV_DS1553 is not set | ||
990 | # CONFIG_RTC_DRV_DS1742 is not set | ||
991 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
992 | # CONFIG_RTC_DRV_M48T86 is not set | ||
993 | # CONFIG_RTC_DRV_M48T59 is not set | ||
994 | # CONFIG_RTC_DRV_V3020 is not set | ||
995 | |||
996 | # | ||
997 | # on-CPU RTC drivers | ||
998 | # | ||
999 | # CONFIG_DMADEVICES is not set | ||
1000 | # CONFIG_UIO is not set | ||
1001 | |||
1002 | # | ||
1003 | # File systems | ||
1004 | # | ||
1005 | CONFIG_EXT2_FS=y | ||
1006 | CONFIG_EXT2_FS_XATTR=y | ||
1007 | CONFIG_EXT2_FS_POSIX_ACL=y | ||
1008 | # CONFIG_EXT2_FS_SECURITY is not set | ||
1009 | # CONFIG_EXT2_FS_XIP is not set | ||
1010 | CONFIG_EXT3_FS=y | ||
1011 | CONFIG_EXT3_FS_XATTR=y | ||
1012 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
1013 | # CONFIG_EXT3_FS_SECURITY is not set | ||
1014 | # CONFIG_EXT4DEV_FS is not set | ||
1015 | CONFIG_JBD=y | ||
1016 | CONFIG_FS_MBCACHE=y | ||
1017 | CONFIG_REISERFS_FS=y | ||
1018 | # CONFIG_REISERFS_CHECK is not set | ||
1019 | # CONFIG_REISERFS_PROC_INFO is not set | ||
1020 | # CONFIG_REISERFS_FS_XATTR is not set | ||
1021 | # CONFIG_JFS_FS is not set | ||
1022 | CONFIG_FS_POSIX_ACL=y | ||
1023 | # CONFIG_XFS_FS is not set | ||
1024 | # CONFIG_OCFS2_FS is not set | ||
1025 | CONFIG_DNOTIFY=y | ||
1026 | CONFIG_INOTIFY=y | ||
1027 | CONFIG_INOTIFY_USER=y | ||
1028 | # CONFIG_QUOTA is not set | ||
1029 | # CONFIG_AUTOFS_FS is not set | ||
1030 | CONFIG_AUTOFS4_FS=y | ||
1031 | # CONFIG_FUSE_FS is not set | ||
1032 | |||
1033 | # | ||
1034 | # CD-ROM/DVD Filesystems | ||
1035 | # | ||
1036 | CONFIG_ISO9660_FS=y | ||
1037 | CONFIG_JOLIET=y | ||
1038 | CONFIG_ZISOFS=y | ||
1039 | CONFIG_UDF_FS=y | ||
1040 | CONFIG_UDF_NLS=y | ||
1041 | |||
1042 | # | ||
1043 | # DOS/FAT/NT Filesystems | ||
1044 | # | ||
1045 | CONFIG_FAT_FS=m | ||
1046 | CONFIG_MSDOS_FS=m | ||
1047 | CONFIG_VFAT_FS=m | ||
1048 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1049 | CONFIG_FAT_DEFAULT_IOCHARSET="iso8859-1" | ||
1050 | # CONFIG_NTFS_FS is not set | ||
1051 | |||
1052 | # | ||
1053 | # Pseudo filesystems | ||
1054 | # | ||
1055 | CONFIG_PROC_FS=y | ||
1056 | CONFIG_PROC_KCORE=y | ||
1057 | CONFIG_PROC_SYSCTL=y | ||
1058 | CONFIG_SYSFS=y | ||
1059 | CONFIG_TMPFS=y | ||
1060 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1061 | # CONFIG_HUGETLB_PAGE is not set | ||
1062 | # CONFIG_CONFIGFS_FS is not set | ||
1063 | |||
1064 | # | ||
1065 | # Miscellaneous filesystems | ||
1066 | # | ||
1067 | # CONFIG_ADFS_FS is not set | ||
1068 | CONFIG_AFFS_FS=m | ||
1069 | # CONFIG_HFS_FS is not set | ||
1070 | # CONFIG_HFSPLUS_FS is not set | ||
1071 | # CONFIG_BEFS_FS is not set | ||
1072 | # CONFIG_BFS_FS is not set | ||
1073 | # CONFIG_EFS_FS is not set | ||
1074 | # CONFIG_CRAMFS is not set | ||
1075 | # CONFIG_VXFS_FS is not set | ||
1076 | # CONFIG_MINIX_FS is not set | ||
1077 | # CONFIG_HPFS_FS is not set | ||
1078 | # CONFIG_QNX4FS_FS is not set | ||
1079 | # CONFIG_ROMFS_FS is not set | ||
1080 | # CONFIG_SYSV_FS is not set | ||
1081 | # CONFIG_UFS_FS is not set | ||
1082 | # CONFIG_NETWORK_FILESYSTEMS is not set | ||
1083 | |||
1084 | # | ||
1085 | # Partition Types | ||
1086 | # | ||
1087 | CONFIG_PARTITION_ADVANCED=y | ||
1088 | # CONFIG_ACORN_PARTITION is not set | ||
1089 | # CONFIG_OSF_PARTITION is not set | ||
1090 | CONFIG_AMIGA_PARTITION=y | ||
1091 | # CONFIG_ATARI_PARTITION is not set | ||
1092 | # CONFIG_MAC_PARTITION is not set | ||
1093 | CONFIG_MSDOS_PARTITION=y | ||
1094 | # CONFIG_BSD_DISKLABEL is not set | ||
1095 | # CONFIG_MINIX_SUBPARTITION is not set | ||
1096 | # CONFIG_SOLARIS_X86_PARTITION is not set | ||
1097 | # CONFIG_UNIXWARE_DISKLABEL is not set | ||
1098 | # CONFIG_LDM_PARTITION is not set | ||
1099 | # CONFIG_SGI_PARTITION is not set | ||
1100 | # CONFIG_ULTRIX_PARTITION is not set | ||
1101 | # CONFIG_SUN_PARTITION is not set | ||
1102 | # CONFIG_KARMA_PARTITION is not set | ||
1103 | # CONFIG_EFI_PARTITION is not set | ||
1104 | # CONFIG_SYSV68_PARTITION is not set | ||
1105 | CONFIG_NLS=y | ||
1106 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1107 | CONFIG_NLS_CODEPAGE_437=y | ||
1108 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1109 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1110 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1111 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1112 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1113 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1114 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1115 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1116 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1117 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1118 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1119 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1120 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1121 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1122 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1123 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1124 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1125 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1126 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1127 | # CONFIG_NLS_ISO8859_8 is not set | ||
1128 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1129 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1130 | # CONFIG_NLS_ASCII is not set | ||
1131 | CONFIG_NLS_ISO8859_1=y | ||
1132 | # CONFIG_NLS_ISO8859_2 is not set | ||
1133 | # CONFIG_NLS_ISO8859_3 is not set | ||
1134 | # CONFIG_NLS_ISO8859_4 is not set | ||
1135 | # CONFIG_NLS_ISO8859_5 is not set | ||
1136 | # CONFIG_NLS_ISO8859_6 is not set | ||
1137 | # CONFIG_NLS_ISO8859_7 is not set | ||
1138 | # CONFIG_NLS_ISO8859_9 is not set | ||
1139 | # CONFIG_NLS_ISO8859_13 is not set | ||
1140 | # CONFIG_NLS_ISO8859_14 is not set | ||
1141 | # CONFIG_NLS_ISO8859_15 is not set | ||
1142 | # CONFIG_NLS_KOI8_R is not set | ||
1143 | # CONFIG_NLS_KOI8_U is not set | ||
1144 | # CONFIG_NLS_UTF8 is not set | ||
1145 | # CONFIG_DLM is not set | ||
1146 | |||
1147 | # | ||
1148 | # Library routines | ||
1149 | # | ||
1150 | CONFIG_BITREVERSE=y | ||
1151 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
1152 | # CONFIG_CRC_CCITT is not set | ||
1153 | # CONFIG_CRC16 is not set | ||
1154 | CONFIG_CRC_ITU_T=y | ||
1155 | CONFIG_CRC32=y | ||
1156 | # CONFIG_CRC7 is not set | ||
1157 | # CONFIG_LIBCRC32C is not set | ||
1158 | CONFIG_ZLIB_INFLATE=y | ||
1159 | CONFIG_PLIST=y | ||
1160 | CONFIG_HAS_IOMEM=y | ||
1161 | CONFIG_HAS_IOPORT=y | ||
1162 | CONFIG_HAS_DMA=y | ||
1163 | CONFIG_HAVE_LMB=y | ||
1164 | |||
1165 | # | ||
1166 | # Kernel hacking | ||
1167 | # | ||
1168 | # CONFIG_PRINTK_TIME is not set | ||
1169 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1170 | CONFIG_ENABLE_MUST_CHECK=y | ||
1171 | CONFIG_FRAME_WARN=1024 | ||
1172 | CONFIG_MAGIC_SYSRQ=y | ||
1173 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1174 | # CONFIG_DEBUG_FS is not set | ||
1175 | # CONFIG_HEADERS_CHECK is not set | ||
1176 | # CONFIG_DEBUG_KERNEL is not set | ||
1177 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1178 | # CONFIG_SLUB_STATS is not set | ||
1179 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1180 | # CONFIG_SAMPLES is not set | ||
1181 | # CONFIG_IRQSTACKS is not set | ||
1182 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1183 | |||
1184 | # | ||
1185 | # Security options | ||
1186 | # | ||
1187 | # CONFIG_KEYS is not set | ||
1188 | # CONFIG_SECURITY is not set | ||
1189 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1190 | # CONFIG_CRYPTO is not set | ||
1191 | # CONFIG_PPC_CLOCK is not set | ||
1192 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig index 087aedce1338..e53c92655bd6 100644 --- a/arch/powerpc/configs/44x/taishan_defconfig +++ b/arch/powerpc/configs/44x/taishan_defconfig | |||
@@ -348,7 +348,83 @@ CONFIG_FW_LOADER=y | |||
348 | # CONFIG_SYS_HYPERVISOR is not set | 348 | # CONFIG_SYS_HYPERVISOR is not set |
349 | CONFIG_CONNECTOR=y | 349 | CONFIG_CONNECTOR=y |
350 | CONFIG_PROC_EVENTS=y | 350 | CONFIG_PROC_EVENTS=y |
351 | # CONFIG_MTD is not set | 351 | CONFIG_MTD=y |
352 | # CONFIG_MTD_DEBUG is not set | ||
353 | # CONFIG_MTD_CONCAT is not set | ||
354 | CONFIG_MTD_PARTITIONS=y | ||
355 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
356 | CONFIG_MTD_CMDLINE_PARTS=y | ||
357 | |||
358 | # | ||
359 | # User Modules And Translation Layers | ||
360 | # | ||
361 | CONFIG_MTD_CHAR=y | ||
362 | # CONFIG_MTD_BLKDEVS is not set | ||
363 | # CONFIG_MTD_BLOCK is not set | ||
364 | # CONFIG_MTD_BLOCK_RO is not set | ||
365 | # CONFIG_FTL is not set | ||
366 | # CONFIG_NFTL is not set | ||
367 | # CONFIG_INFTL is not set | ||
368 | # CONFIG_RFD_FTL is not set | ||
369 | # CONFIG_SSFDC is not set | ||
370 | # CONFIG_MTD_OOPS is not set | ||
371 | |||
372 | # | ||
373 | # RAM/ROM/Flash chip drivers | ||
374 | # | ||
375 | CONFIG_MTD_CFI=y | ||
376 | # CONFIG_MTD_JEDECPROBE is not set | ||
377 | CONFIG_MTD_GEN_PROBE=y | ||
378 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
379 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
380 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
381 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
382 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
383 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
384 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
385 | CONFIG_MTD_CFI_I1=y | ||
386 | CONFIG_MTD_CFI_I2=y | ||
387 | # CONFIG_MTD_CFI_I4 is not set | ||
388 | # CONFIG_MTD_CFI_I8 is not set | ||
389 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
390 | CONFIG_MTD_CFI_AMDSTD=y | ||
391 | # CONFIG_MTD_CFI_STAA is not set | ||
392 | CONFIG_MTD_CFI_UTIL=y | ||
393 | # CONFIG_MTD_RAM is not set | ||
394 | # CONFIG_MTD_ROM is not set | ||
395 | # CONFIG_MTD_ABSENT is not set | ||
396 | |||
397 | # | ||
398 | # Mapping drivers for chip access | ||
399 | # | ||
400 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
401 | # CONFIG_MTD_PHYSMAP is not set | ||
402 | CONFIG_MTD_PHYSMAP_OF=y | ||
403 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
404 | # CONFIG_MTD_PLATRAM is not set | ||
405 | |||
406 | # | ||
407 | # Self-contained MTD device drivers | ||
408 | # | ||
409 | # CONFIG_MTD_PMC551 is not set | ||
410 | # CONFIG_MTD_SLRAM is not set | ||
411 | # CONFIG_MTD_PHRAM is not set | ||
412 | # CONFIG_MTD_MTDRAM is not set | ||
413 | # CONFIG_MTD_BLOCK2MTD is not set | ||
414 | |||
415 | # | ||
416 | # Disk-On-Chip Device Drivers | ||
417 | # | ||
418 | # CONFIG_MTD_DOC2000 is not set | ||
419 | # CONFIG_MTD_DOC2001 is not set | ||
420 | # CONFIG_MTD_DOC2001PLUS is not set | ||
421 | # CONFIG_MTD_NAND is not set | ||
422 | # CONFIG_MTD_ONENAND is not set | ||
423 | |||
424 | # | ||
425 | # UBI - Unsorted block images | ||
426 | # | ||
427 | # CONFIG_MTD_UBI is not set | ||
352 | CONFIG_OF_DEVICE=y | 428 | CONFIG_OF_DEVICE=y |
353 | # CONFIG_PARPORT is not set | 429 | # CONFIG_PARPORT is not set |
354 | CONFIG_BLK_DEV=y | 430 | CONFIG_BLK_DEV=y |
@@ -660,6 +736,7 @@ CONFIG_TMPFS=y | |||
660 | # CONFIG_BEFS_FS is not set | 736 | # CONFIG_BEFS_FS is not set |
661 | # CONFIG_BFS_FS is not set | 737 | # CONFIG_BFS_FS is not set |
662 | # CONFIG_EFS_FS is not set | 738 | # CONFIG_EFS_FS is not set |
739 | # CONFIG_JFFS2_FS is not set | ||
663 | CONFIG_CRAMFS=y | 740 | CONFIG_CRAMFS=y |
664 | # CONFIG_VXFS_FS is not set | 741 | # CONFIG_VXFS_FS is not set |
665 | # CONFIG_MINIX_FS is not set | 742 | # CONFIG_MINIX_FS is not set |
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig new file mode 100644 index 000000000000..d2c435f0da42 --- /dev/null +++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig | |||
@@ -0,0 +1,1128 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.26-rc2 | ||
4 | # Mon May 19 21:12:32 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | # CONFIG_FSL_EMB_PERFMON is not set | ||
19 | CONFIG_PPC_STD_MMU=y | ||
20 | CONFIG_PPC_STD_MMU_32=y | ||
21 | # CONFIG_PPC_MM_SLICES is not set | ||
22 | # CONFIG_SMP is not set | ||
23 | CONFIG_PPC32=y | ||
24 | CONFIG_WORD_SIZE=32 | ||
25 | CONFIG_PPC_MERGE=y | ||
26 | CONFIG_MMU=y | ||
27 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
28 | CONFIG_GENERIC_TIME=y | ||
29 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
30 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
31 | CONFIG_GENERIC_HARDIRQS=y | ||
32 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
33 | CONFIG_IRQ_PER_CPU=y | ||
34 | CONFIG_STACKTRACE_SUPPORT=y | ||
35 | CONFIG_LOCKDEP_SUPPORT=y | ||
36 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
37 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
38 | CONFIG_GENERIC_HWEIGHT=y | ||
39 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
40 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
41 | CONFIG_GENERIC_GPIO=y | ||
42 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
43 | CONFIG_PPC=y | ||
44 | CONFIG_EARLY_PRINTK=y | ||
45 | CONFIG_GENERIC_NVRAM=y | ||
46 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
47 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
48 | CONFIG_PPC_OF=y | ||
49 | CONFIG_OF=y | ||
50 | CONFIG_PPC_UDBG_16550=y | ||
51 | # CONFIG_GENERIC_TBSYNC is not set | ||
52 | CONFIG_AUDIT_ARCH=y | ||
53 | CONFIG_GENERIC_BUG=y | ||
54 | CONFIG_DEFAULT_UIMAGE=y | ||
55 | # CONFIG_PPC_DCR_NATIVE is not set | ||
56 | # CONFIG_PPC_DCR_MMIO is not set | ||
57 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
58 | |||
59 | # | ||
60 | # General setup | ||
61 | # | ||
62 | CONFIG_EXPERIMENTAL=y | ||
63 | CONFIG_BROKEN_ON_SMP=y | ||
64 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
65 | CONFIG_LOCALVERSION="" | ||
66 | CONFIG_LOCALVERSION_AUTO=y | ||
67 | CONFIG_SWAP=y | ||
68 | CONFIG_SYSVIPC=y | ||
69 | CONFIG_SYSVIPC_SYSCTL=y | ||
70 | # CONFIG_POSIX_MQUEUE is not set | ||
71 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
72 | # CONFIG_TASKSTATS is not set | ||
73 | # CONFIG_AUDIT is not set | ||
74 | # CONFIG_IKCONFIG is not set | ||
75 | CONFIG_LOG_BUF_SHIFT=14 | ||
76 | # CONFIG_CGROUPS is not set | ||
77 | CONFIG_GROUP_SCHED=y | ||
78 | CONFIG_FAIR_GROUP_SCHED=y | ||
79 | # CONFIG_RT_GROUP_SCHED is not set | ||
80 | CONFIG_USER_SCHED=y | ||
81 | # CONFIG_CGROUP_SCHED is not set | ||
82 | CONFIG_SYSFS_DEPRECATED=y | ||
83 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
84 | # CONFIG_RELAY is not set | ||
85 | # CONFIG_NAMESPACES is not set | ||
86 | CONFIG_BLK_DEV_INITRD=y | ||
87 | CONFIG_INITRAMFS_SOURCE="" | ||
88 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
89 | CONFIG_SYSCTL=y | ||
90 | CONFIG_EMBEDDED=y | ||
91 | CONFIG_SYSCTL_SYSCALL=y | ||
92 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
93 | # CONFIG_KALLSYMS is not set | ||
94 | CONFIG_HOTPLUG=y | ||
95 | CONFIG_PRINTK=y | ||
96 | CONFIG_BUG=y | ||
97 | CONFIG_ELF_CORE=y | ||
98 | CONFIG_COMPAT_BRK=y | ||
99 | CONFIG_BASE_FULL=y | ||
100 | CONFIG_FUTEX=y | ||
101 | CONFIG_ANON_INODES=y | ||
102 | # CONFIG_EPOLL is not set | ||
103 | CONFIG_SIGNALFD=y | ||
104 | CONFIG_TIMERFD=y | ||
105 | CONFIG_EVENTFD=y | ||
106 | CONFIG_SHMEM=y | ||
107 | CONFIG_VM_EVENT_COUNTERS=y | ||
108 | CONFIG_SLUB_DEBUG=y | ||
109 | # CONFIG_SLAB is not set | ||
110 | CONFIG_SLUB=y | ||
111 | # CONFIG_SLOB is not set | ||
112 | # CONFIG_PROFILING is not set | ||
113 | # CONFIG_MARKERS is not set | ||
114 | CONFIG_HAVE_OPROFILE=y | ||
115 | CONFIG_HAVE_KPROBES=y | ||
116 | CONFIG_HAVE_KRETPROBES=y | ||
117 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
118 | CONFIG_PROC_PAGE_MONITOR=y | ||
119 | CONFIG_SLABINFO=y | ||
120 | CONFIG_RT_MUTEXES=y | ||
121 | # CONFIG_TINY_SHMEM is not set | ||
122 | CONFIG_BASE_SMALL=0 | ||
123 | CONFIG_MODULES=y | ||
124 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
125 | CONFIG_MODULE_UNLOAD=y | ||
126 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
127 | # CONFIG_MODVERSIONS is not set | ||
128 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
129 | # CONFIG_KMOD is not set | ||
130 | CONFIG_BLOCK=y | ||
131 | # CONFIG_LBD is not set | ||
132 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
133 | # CONFIG_LSF is not set | ||
134 | # CONFIG_BLK_DEV_BSG is not set | ||
135 | |||
136 | # | ||
137 | # IO Schedulers | ||
138 | # | ||
139 | CONFIG_IOSCHED_NOOP=y | ||
140 | CONFIG_IOSCHED_AS=y | ||
141 | CONFIG_IOSCHED_DEADLINE=y | ||
142 | CONFIG_IOSCHED_CFQ=y | ||
143 | CONFIG_DEFAULT_AS=y | ||
144 | # CONFIG_DEFAULT_DEADLINE is not set | ||
145 | # CONFIG_DEFAULT_CFQ is not set | ||
146 | # CONFIG_DEFAULT_NOOP is not set | ||
147 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
148 | CONFIG_CLASSIC_RCU=y | ||
149 | |||
150 | # | ||
151 | # Platform support | ||
152 | # | ||
153 | # CONFIG_PPC_MULTIPLATFORM is not set | ||
154 | # CONFIG_PPC_82xx is not set | ||
155 | CONFIG_PPC_83xx=y | ||
156 | # CONFIG_PPC_86xx is not set | ||
157 | # CONFIG_PPC_MPC512x is not set | ||
158 | # CONFIG_PPC_MPC5121 is not set | ||
159 | # CONFIG_PPC_CELL is not set | ||
160 | # CONFIG_PPC_CELL_NATIVE is not set | ||
161 | # CONFIG_PQ2ADS is not set | ||
162 | CONFIG_MPC83xx=y | ||
163 | # CONFIG_MPC831x_RDB is not set | ||
164 | # CONFIG_MPC832x_MDS is not set | ||
165 | # CONFIG_MPC832x_RDB is not set | ||
166 | # CONFIG_MPC834x_MDS is not set | ||
167 | # CONFIG_MPC834x_ITX is not set | ||
168 | # CONFIG_MPC836x_MDS is not set | ||
169 | CONFIG_MPC836x_RDK=y | ||
170 | # CONFIG_MPC837x_MDS is not set | ||
171 | # CONFIG_MPC837x_RDB is not set | ||
172 | # CONFIG_SBC834x is not set | ||
173 | CONFIG_IPIC=y | ||
174 | # CONFIG_MPIC is not set | ||
175 | # CONFIG_MPIC_WEIRD is not set | ||
176 | # CONFIG_PPC_I8259 is not set | ||
177 | # CONFIG_PPC_RTAS is not set | ||
178 | # CONFIG_MMIO_NVRAM is not set | ||
179 | # CONFIG_PPC_MPC106 is not set | ||
180 | # CONFIG_PPC_970_NAP is not set | ||
181 | # CONFIG_PPC_INDIRECT_IO is not set | ||
182 | # CONFIG_GENERIC_IOMAP is not set | ||
183 | # CONFIG_CPU_FREQ is not set | ||
184 | CONFIG_QUICC_ENGINE=y | ||
185 | # CONFIG_FSL_ULI1575 is not set | ||
186 | |||
187 | # | ||
188 | # Kernel options | ||
189 | # | ||
190 | # CONFIG_HIGHMEM is not set | ||
191 | # CONFIG_TICK_ONESHOT is not set | ||
192 | # CONFIG_NO_HZ is not set | ||
193 | # CONFIG_HIGH_RES_TIMERS is not set | ||
194 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
195 | # CONFIG_HZ_100 is not set | ||
196 | CONFIG_HZ_250=y | ||
197 | # CONFIG_HZ_300 is not set | ||
198 | # CONFIG_HZ_1000 is not set | ||
199 | CONFIG_HZ=250 | ||
200 | # CONFIG_SCHED_HRTICK is not set | ||
201 | CONFIG_PREEMPT_NONE=y | ||
202 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
203 | # CONFIG_PREEMPT is not set | ||
204 | CONFIG_BINFMT_ELF=y | ||
205 | # CONFIG_BINFMT_MISC is not set | ||
206 | # CONFIG_IOMMU_HELPER is not set | ||
207 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
208 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
209 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
210 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
211 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
212 | CONFIG_SELECT_MEMORY_MODEL=y | ||
213 | CONFIG_FLATMEM_MANUAL=y | ||
214 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
215 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
216 | CONFIG_FLATMEM=y | ||
217 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
218 | # CONFIG_SPARSEMEM_STATIC is not set | ||
219 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
220 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
221 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
222 | # CONFIG_RESOURCES_64BIT is not set | ||
223 | CONFIG_ZONE_DMA_FLAG=1 | ||
224 | CONFIG_BOUNCE=y | ||
225 | CONFIG_VIRT_TO_BUS=y | ||
226 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
227 | CONFIG_PROC_DEVICETREE=y | ||
228 | # CONFIG_CMDLINE_BOOL is not set | ||
229 | # CONFIG_PM is not set | ||
230 | CONFIG_SECCOMP=y | ||
231 | CONFIG_ISA_DMA_API=y | ||
232 | |||
233 | # | ||
234 | # Bus options | ||
235 | # | ||
236 | CONFIG_ZONE_DMA=y | ||
237 | CONFIG_GENERIC_ISA_DMA=y | ||
238 | CONFIG_PPC_INDIRECT_PCI=y | ||
239 | CONFIG_FSL_SOC=y | ||
240 | CONFIG_FSL_LBC=y | ||
241 | CONFIG_FSL_GTM=y | ||
242 | CONFIG_PCI=y | ||
243 | CONFIG_PCI_DOMAINS=y | ||
244 | CONFIG_PCI_SYSCALL=y | ||
245 | # CONFIG_PCIEPORTBUS is not set | ||
246 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
247 | # CONFIG_PCI_MSI is not set | ||
248 | CONFIG_PCI_LEGACY=y | ||
249 | # CONFIG_PCCARD is not set | ||
250 | # CONFIG_HOTPLUG_PCI is not set | ||
251 | # CONFIG_HAS_RAPIDIO is not set | ||
252 | |||
253 | # | ||
254 | # Advanced setup | ||
255 | # | ||
256 | # CONFIG_ADVANCED_OPTIONS is not set | ||
257 | |||
258 | # | ||
259 | # Default settings for advanced configuration options are used | ||
260 | # | ||
261 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
262 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
263 | CONFIG_KERNEL_START=0xc0000000 | ||
264 | CONFIG_PHYSICAL_START=0x00000000 | ||
265 | CONFIG_TASK_SIZE=0xc0000000 | ||
266 | |||
267 | # | ||
268 | # Networking | ||
269 | # | ||
270 | CONFIG_NET=y | ||
271 | |||
272 | # | ||
273 | # Networking options | ||
274 | # | ||
275 | CONFIG_PACKET=y | ||
276 | # CONFIG_PACKET_MMAP is not set | ||
277 | CONFIG_UNIX=y | ||
278 | CONFIG_XFRM=y | ||
279 | # CONFIG_XFRM_USER is not set | ||
280 | # CONFIG_XFRM_SUB_POLICY is not set | ||
281 | # CONFIG_XFRM_MIGRATE is not set | ||
282 | # CONFIG_XFRM_STATISTICS is not set | ||
283 | # CONFIG_NET_KEY is not set | ||
284 | CONFIG_INET=y | ||
285 | CONFIG_IP_MULTICAST=y | ||
286 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
287 | CONFIG_IP_FIB_HASH=y | ||
288 | CONFIG_IP_PNP=y | ||
289 | CONFIG_IP_PNP_DHCP=y | ||
290 | CONFIG_IP_PNP_BOOTP=y | ||
291 | # CONFIG_IP_PNP_RARP is not set | ||
292 | # CONFIG_NET_IPIP is not set | ||
293 | # CONFIG_NET_IPGRE is not set | ||
294 | # CONFIG_IP_MROUTE is not set | ||
295 | # CONFIG_ARPD is not set | ||
296 | CONFIG_SYN_COOKIES=y | ||
297 | # CONFIG_INET_AH is not set | ||
298 | # CONFIG_INET_ESP is not set | ||
299 | # CONFIG_INET_IPCOMP is not set | ||
300 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
301 | # CONFIG_INET_TUNNEL is not set | ||
302 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
303 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
304 | CONFIG_INET_XFRM_MODE_BEET=y | ||
305 | # CONFIG_INET_LRO is not set | ||
306 | CONFIG_INET_DIAG=y | ||
307 | CONFIG_INET_TCP_DIAG=y | ||
308 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
309 | CONFIG_TCP_CONG_CUBIC=y | ||
310 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
311 | # CONFIG_TCP_MD5SIG is not set | ||
312 | # CONFIG_IPV6 is not set | ||
313 | # CONFIG_NETWORK_SECMARK is not set | ||
314 | # CONFIG_NETFILTER is not set | ||
315 | # CONFIG_IP_DCCP is not set | ||
316 | # CONFIG_IP_SCTP is not set | ||
317 | # CONFIG_TIPC is not set | ||
318 | # CONFIG_ATM is not set | ||
319 | # CONFIG_BRIDGE is not set | ||
320 | # CONFIG_VLAN_8021Q is not set | ||
321 | # CONFIG_DECNET is not set | ||
322 | # CONFIG_LLC2 is not set | ||
323 | # CONFIG_IPX is not set | ||
324 | # CONFIG_ATALK is not set | ||
325 | # CONFIG_X25 is not set | ||
326 | # CONFIG_LAPB is not set | ||
327 | # CONFIG_ECONET is not set | ||
328 | # CONFIG_WAN_ROUTER is not set | ||
329 | # CONFIG_NET_SCHED is not set | ||
330 | |||
331 | # | ||
332 | # Network testing | ||
333 | # | ||
334 | # CONFIG_NET_PKTGEN is not set | ||
335 | # CONFIG_HAMRADIO is not set | ||
336 | # CONFIG_CAN is not set | ||
337 | # CONFIG_IRDA is not set | ||
338 | # CONFIG_BT is not set | ||
339 | # CONFIG_AF_RXRPC is not set | ||
340 | |||
341 | # | ||
342 | # Wireless | ||
343 | # | ||
344 | # CONFIG_CFG80211 is not set | ||
345 | # CONFIG_WIRELESS_EXT is not set | ||
346 | # CONFIG_MAC80211 is not set | ||
347 | # CONFIG_IEEE80211 is not set | ||
348 | # CONFIG_RFKILL is not set | ||
349 | # CONFIG_NET_9P is not set | ||
350 | |||
351 | # | ||
352 | # Device Drivers | ||
353 | # | ||
354 | |||
355 | # | ||
356 | # Generic Driver Options | ||
357 | # | ||
358 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
359 | CONFIG_STANDALONE=y | ||
360 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
361 | CONFIG_FW_LOADER=y | ||
362 | # CONFIG_SYS_HYPERVISOR is not set | ||
363 | # CONFIG_CONNECTOR is not set | ||
364 | CONFIG_MTD=y | ||
365 | # CONFIG_MTD_DEBUG is not set | ||
366 | # CONFIG_MTD_CONCAT is not set | ||
367 | CONFIG_MTD_PARTITIONS=y | ||
368 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
369 | CONFIG_MTD_CMDLINE_PARTS=y | ||
370 | # CONFIG_MTD_OF_PARTS is not set | ||
371 | # CONFIG_MTD_AR7_PARTS is not set | ||
372 | |||
373 | # | ||
374 | # User Modules And Translation Layers | ||
375 | # | ||
376 | CONFIG_MTD_CHAR=y | ||
377 | CONFIG_MTD_BLKDEVS=y | ||
378 | CONFIG_MTD_BLOCK=y | ||
379 | # CONFIG_FTL is not set | ||
380 | # CONFIG_NFTL is not set | ||
381 | # CONFIG_INFTL is not set | ||
382 | # CONFIG_RFD_FTL is not set | ||
383 | # CONFIG_SSFDC is not set | ||
384 | # CONFIG_MTD_OOPS is not set | ||
385 | |||
386 | # | ||
387 | # RAM/ROM/Flash chip drivers | ||
388 | # | ||
389 | CONFIG_MTD_CFI=y | ||
390 | # CONFIG_MTD_JEDECPROBE is not set | ||
391 | CONFIG_MTD_GEN_PROBE=y | ||
392 | CONFIG_MTD_CFI_ADV_OPTIONS=y | ||
393 | CONFIG_MTD_CFI_NOSWAP=y | ||
394 | # CONFIG_MTD_CFI_BE_BYTE_SWAP is not set | ||
395 | # CONFIG_MTD_CFI_LE_BYTE_SWAP is not set | ||
396 | # CONFIG_MTD_CFI_GEOMETRY is not set | ||
397 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
398 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
399 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
400 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
401 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
402 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
403 | CONFIG_MTD_CFI_I1=y | ||
404 | CONFIG_MTD_CFI_I2=y | ||
405 | # CONFIG_MTD_CFI_I4 is not set | ||
406 | # CONFIG_MTD_CFI_I8 is not set | ||
407 | # CONFIG_MTD_OTP is not set | ||
408 | CONFIG_MTD_CFI_INTELEXT=y | ||
409 | # CONFIG_MTD_CFI_AMDSTD is not set | ||
410 | # CONFIG_MTD_CFI_STAA is not set | ||
411 | CONFIG_MTD_CFI_UTIL=y | ||
412 | # CONFIG_MTD_RAM is not set | ||
413 | # CONFIG_MTD_ROM is not set | ||
414 | # CONFIG_MTD_ABSENT is not set | ||
415 | |||
416 | # | ||
417 | # Mapping drivers for chip access | ||
418 | # | ||
419 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
420 | # CONFIG_MTD_PHYSMAP is not set | ||
421 | CONFIG_MTD_PHYSMAP_OF=y | ||
422 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
423 | # CONFIG_MTD_PLATRAM is not set | ||
424 | |||
425 | # | ||
426 | # Self-contained MTD device drivers | ||
427 | # | ||
428 | # CONFIG_MTD_PMC551 is not set | ||
429 | # CONFIG_MTD_DATAFLASH is not set | ||
430 | # CONFIG_MTD_M25P80 is not set | ||
431 | # CONFIG_MTD_SLRAM is not set | ||
432 | # CONFIG_MTD_PHRAM is not set | ||
433 | # CONFIG_MTD_MTDRAM is not set | ||
434 | # CONFIG_MTD_BLOCK2MTD is not set | ||
435 | |||
436 | # | ||
437 | # Disk-On-Chip Device Drivers | ||
438 | # | ||
439 | # CONFIG_MTD_DOC2000 is not set | ||
440 | # CONFIG_MTD_DOC2001 is not set | ||
441 | # CONFIG_MTD_DOC2001PLUS is not set | ||
442 | # CONFIG_MTD_NAND is not set | ||
443 | # CONFIG_MTD_ONENAND is not set | ||
444 | |||
445 | # | ||
446 | # UBI - Unsorted block images | ||
447 | # | ||
448 | # CONFIG_MTD_UBI is not set | ||
449 | CONFIG_OF_DEVICE=y | ||
450 | CONFIG_OF_GPIO=y | ||
451 | CONFIG_OF_I2C=y | ||
452 | # CONFIG_PARPORT is not set | ||
453 | CONFIG_BLK_DEV=y | ||
454 | # CONFIG_BLK_DEV_FD is not set | ||
455 | # CONFIG_BLK_CPQ_DA is not set | ||
456 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
457 | # CONFIG_BLK_DEV_DAC960 is not set | ||
458 | # CONFIG_BLK_DEV_UMEM is not set | ||
459 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
460 | CONFIG_BLK_DEV_LOOP=y | ||
461 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
462 | # CONFIG_BLK_DEV_NBD is not set | ||
463 | # CONFIG_BLK_DEV_SX8 is not set | ||
464 | CONFIG_BLK_DEV_RAM=y | ||
465 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
466 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
467 | # CONFIG_BLK_DEV_XIP is not set | ||
468 | # CONFIG_CDROM_PKTCDVD is not set | ||
469 | # CONFIG_ATA_OVER_ETH is not set | ||
470 | CONFIG_MISC_DEVICES=y | ||
471 | # CONFIG_PHANTOM is not set | ||
472 | # CONFIG_EEPROM_93CX6 is not set | ||
473 | # CONFIG_SGI_IOC4 is not set | ||
474 | # CONFIG_TIFM_CORE is not set | ||
475 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
476 | CONFIG_HAVE_IDE=y | ||
477 | # CONFIG_IDE is not set | ||
478 | |||
479 | # | ||
480 | # SCSI device support | ||
481 | # | ||
482 | # CONFIG_RAID_ATTRS is not set | ||
483 | # CONFIG_SCSI is not set | ||
484 | # CONFIG_SCSI_DMA is not set | ||
485 | # CONFIG_SCSI_NETLINK is not set | ||
486 | # CONFIG_ATA is not set | ||
487 | # CONFIG_MD is not set | ||
488 | # CONFIG_FUSION is not set | ||
489 | |||
490 | # | ||
491 | # IEEE 1394 (FireWire) support | ||
492 | # | ||
493 | # CONFIG_FIREWIRE is not set | ||
494 | # CONFIG_IEEE1394 is not set | ||
495 | # CONFIG_I2O is not set | ||
496 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
497 | CONFIG_NETDEVICES=y | ||
498 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
499 | # CONFIG_DUMMY is not set | ||
500 | # CONFIG_BONDING is not set | ||
501 | # CONFIG_MACVLAN is not set | ||
502 | # CONFIG_EQUALIZER is not set | ||
503 | # CONFIG_TUN is not set | ||
504 | # CONFIG_VETH is not set | ||
505 | # CONFIG_ARCNET is not set | ||
506 | CONFIG_PHYLIB=y | ||
507 | |||
508 | # | ||
509 | # MII PHY device drivers | ||
510 | # | ||
511 | # CONFIG_MARVELL_PHY is not set | ||
512 | # CONFIG_DAVICOM_PHY is not set | ||
513 | # CONFIG_QSEMI_PHY is not set | ||
514 | # CONFIG_LXT_PHY is not set | ||
515 | # CONFIG_CICADA_PHY is not set | ||
516 | # CONFIG_VITESSE_PHY is not set | ||
517 | # CONFIG_SMSC_PHY is not set | ||
518 | CONFIG_BROADCOM_PHY=y | ||
519 | # CONFIG_ICPLUS_PHY is not set | ||
520 | # CONFIG_REALTEK_PHY is not set | ||
521 | # CONFIG_FIXED_PHY is not set | ||
522 | # CONFIG_MDIO_BITBANG is not set | ||
523 | # CONFIG_NET_ETHERNET is not set | ||
524 | CONFIG_NETDEV_1000=y | ||
525 | # CONFIG_ACENIC is not set | ||
526 | # CONFIG_DL2K is not set | ||
527 | # CONFIG_E1000 is not set | ||
528 | # CONFIG_E1000E is not set | ||
529 | # CONFIG_E1000E_ENABLED is not set | ||
530 | # CONFIG_IP1000 is not set | ||
531 | # CONFIG_IGB is not set | ||
532 | # CONFIG_NS83820 is not set | ||
533 | # CONFIG_HAMACHI is not set | ||
534 | # CONFIG_YELLOWFIN is not set | ||
535 | # CONFIG_R8169 is not set | ||
536 | # CONFIG_SIS190 is not set | ||
537 | # CONFIG_SKGE is not set | ||
538 | # CONFIG_SKY2 is not set | ||
539 | # CONFIG_VIA_VELOCITY is not set | ||
540 | # CONFIG_TIGON3 is not set | ||
541 | # CONFIG_BNX2 is not set | ||
542 | # CONFIG_GIANFAR is not set | ||
543 | CONFIG_UCC_GETH=y | ||
544 | CONFIG_UGETH_NAPI=y | ||
545 | # CONFIG_UGETH_MAGIC_PACKET is not set | ||
546 | # CONFIG_UGETH_FILTERING is not set | ||
547 | # CONFIG_UGETH_TX_ON_DEMAND is not set | ||
548 | # CONFIG_QLA3XXX is not set | ||
549 | # CONFIG_ATL1 is not set | ||
550 | # CONFIG_NETDEV_10000 is not set | ||
551 | # CONFIG_TR is not set | ||
552 | |||
553 | # | ||
554 | # Wireless LAN | ||
555 | # | ||
556 | # CONFIG_WLAN_PRE80211 is not set | ||
557 | # CONFIG_WLAN_80211 is not set | ||
558 | # CONFIG_IWLWIFI_LEDS is not set | ||
559 | # CONFIG_WAN is not set | ||
560 | # CONFIG_FDDI is not set | ||
561 | # CONFIG_HIPPI is not set | ||
562 | # CONFIG_PPP is not set | ||
563 | # CONFIG_SLIP is not set | ||
564 | # CONFIG_NETCONSOLE is not set | ||
565 | # CONFIG_NETPOLL is not set | ||
566 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
567 | # CONFIG_ISDN is not set | ||
568 | # CONFIG_PHONE is not set | ||
569 | |||
570 | # | ||
571 | # Input device support | ||
572 | # | ||
573 | CONFIG_INPUT=y | ||
574 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
575 | # CONFIG_INPUT_POLLDEV is not set | ||
576 | |||
577 | # | ||
578 | # Userland interfaces | ||
579 | # | ||
580 | # CONFIG_INPUT_MOUSEDEV is not set | ||
581 | # CONFIG_INPUT_JOYDEV is not set | ||
582 | # CONFIG_INPUT_EVDEV is not set | ||
583 | # CONFIG_INPUT_EVBUG is not set | ||
584 | |||
585 | # | ||
586 | # Input Device Drivers | ||
587 | # | ||
588 | # CONFIG_INPUT_KEYBOARD is not set | ||
589 | # CONFIG_INPUT_MOUSE is not set | ||
590 | # CONFIG_INPUT_JOYSTICK is not set | ||
591 | # CONFIG_INPUT_TABLET is not set | ||
592 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
593 | # CONFIG_INPUT_MISC is not set | ||
594 | |||
595 | # | ||
596 | # Hardware I/O ports | ||
597 | # | ||
598 | # CONFIG_SERIO is not set | ||
599 | # CONFIG_GAMEPORT is not set | ||
600 | |||
601 | # | ||
602 | # Character devices | ||
603 | # | ||
604 | CONFIG_VT=y | ||
605 | CONFIG_VT_CONSOLE=y | ||
606 | CONFIG_HW_CONSOLE=y | ||
607 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
608 | # CONFIG_DEVKMEM is not set | ||
609 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
610 | # CONFIG_NOZOMI is not set | ||
611 | |||
612 | # | ||
613 | # Serial drivers | ||
614 | # | ||
615 | CONFIG_SERIAL_8250=y | ||
616 | CONFIG_SERIAL_8250_CONSOLE=y | ||
617 | CONFIG_SERIAL_8250_PCI=y | ||
618 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
619 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
620 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
621 | |||
622 | # | ||
623 | # Non-8250 serial port support | ||
624 | # | ||
625 | # CONFIG_SERIAL_UARTLITE is not set | ||
626 | CONFIG_SERIAL_CORE=y | ||
627 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
628 | # CONFIG_SERIAL_JSM is not set | ||
629 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
630 | CONFIG_SERIAL_QE=y | ||
631 | CONFIG_UNIX98_PTYS=y | ||
632 | CONFIG_LEGACY_PTYS=y | ||
633 | CONFIG_LEGACY_PTY_COUNT=256 | ||
634 | # CONFIG_IPMI_HANDLER is not set | ||
635 | CONFIG_HW_RANDOM=y | ||
636 | # CONFIG_NVRAM is not set | ||
637 | # CONFIG_GEN_RTC is not set | ||
638 | # CONFIG_R3964 is not set | ||
639 | # CONFIG_APPLICOM is not set | ||
640 | # CONFIG_RAW_DRIVER is not set | ||
641 | # CONFIG_TCG_TPM is not set | ||
642 | CONFIG_DEVPORT=y | ||
643 | CONFIG_I2C=y | ||
644 | CONFIG_I2C_BOARDINFO=y | ||
645 | CONFIG_I2C_CHARDEV=y | ||
646 | |||
647 | # | ||
648 | # I2C Hardware Bus support | ||
649 | # | ||
650 | # CONFIG_I2C_ALI1535 is not set | ||
651 | # CONFIG_I2C_ALI1563 is not set | ||
652 | # CONFIG_I2C_ALI15X3 is not set | ||
653 | # CONFIG_I2C_AMD756 is not set | ||
654 | # CONFIG_I2C_AMD8111 is not set | ||
655 | # CONFIG_I2C_GPIO is not set | ||
656 | # CONFIG_I2C_I801 is not set | ||
657 | # CONFIG_I2C_I810 is not set | ||
658 | # CONFIG_I2C_PIIX4 is not set | ||
659 | CONFIG_I2C_MPC=y | ||
660 | # CONFIG_I2C_NFORCE2 is not set | ||
661 | # CONFIG_I2C_OCORES is not set | ||
662 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
663 | # CONFIG_I2C_PROSAVAGE is not set | ||
664 | # CONFIG_I2C_SAVAGE4 is not set | ||
665 | # CONFIG_I2C_SIMTEC is not set | ||
666 | # CONFIG_I2C_SIS5595 is not set | ||
667 | # CONFIG_I2C_SIS630 is not set | ||
668 | # CONFIG_I2C_SIS96X is not set | ||
669 | # CONFIG_I2C_TAOS_EVM is not set | ||
670 | # CONFIG_I2C_STUB is not set | ||
671 | # CONFIG_I2C_VIA is not set | ||
672 | # CONFIG_I2C_VIAPRO is not set | ||
673 | # CONFIG_I2C_VOODOO3 is not set | ||
674 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
675 | |||
676 | # | ||
677 | # Miscellaneous I2C Chip support | ||
678 | # | ||
679 | # CONFIG_DS1682 is not set | ||
680 | # CONFIG_SENSORS_EEPROM is not set | ||
681 | # CONFIG_SENSORS_PCF8574 is not set | ||
682 | # CONFIG_PCF8575 is not set | ||
683 | # CONFIG_SENSORS_PCF8591 is not set | ||
684 | # CONFIG_TPS65010 is not set | ||
685 | # CONFIG_SENSORS_MAX6875 is not set | ||
686 | # CONFIG_SENSORS_TSL2550 is not set | ||
687 | # CONFIG_I2C_DEBUG_CORE is not set | ||
688 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
689 | # CONFIG_I2C_DEBUG_BUS is not set | ||
690 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
691 | CONFIG_SPI=y | ||
692 | CONFIG_SPI_MASTER=y | ||
693 | |||
694 | # | ||
695 | # SPI Master Controller Drivers | ||
696 | # | ||
697 | CONFIG_SPI_BITBANG=y | ||
698 | CONFIG_SPI_MPC83xx=y | ||
699 | |||
700 | # | ||
701 | # SPI Protocol Masters | ||
702 | # | ||
703 | # CONFIG_SPI_AT25 is not set | ||
704 | CONFIG_SPI_SPIDEV=y | ||
705 | # CONFIG_SPI_TLE62X0 is not set | ||
706 | CONFIG_HAVE_GPIO_LIB=y | ||
707 | |||
708 | # | ||
709 | # GPIO Support | ||
710 | # | ||
711 | |||
712 | # | ||
713 | # I2C GPIO expanders: | ||
714 | # | ||
715 | # CONFIG_GPIO_PCA953X is not set | ||
716 | # CONFIG_GPIO_PCF857X is not set | ||
717 | |||
718 | # | ||
719 | # SPI GPIO expanders: | ||
720 | # | ||
721 | # CONFIG_GPIO_MCP23S08 is not set | ||
722 | # CONFIG_W1 is not set | ||
723 | # CONFIG_POWER_SUPPLY is not set | ||
724 | # CONFIG_HWMON is not set | ||
725 | # CONFIG_THERMAL is not set | ||
726 | CONFIG_WATCHDOG=y | ||
727 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
728 | |||
729 | # | ||
730 | # Watchdog Device Drivers | ||
731 | # | ||
732 | # CONFIG_SOFT_WATCHDOG is not set | ||
733 | CONFIG_83xx_WDT=y | ||
734 | |||
735 | # | ||
736 | # PCI-based Watchdog Cards | ||
737 | # | ||
738 | # CONFIG_PCIPCWATCHDOG is not set | ||
739 | # CONFIG_WDTPCI is not set | ||
740 | |||
741 | # | ||
742 | # Sonics Silicon Backplane | ||
743 | # | ||
744 | CONFIG_SSB_POSSIBLE=y | ||
745 | # CONFIG_SSB is not set | ||
746 | |||
747 | # | ||
748 | # Multifunction device drivers | ||
749 | # | ||
750 | # CONFIG_MFD_SM501 is not set | ||
751 | # CONFIG_HTC_EGPIO is not set | ||
752 | # CONFIG_HTC_PASIC3 is not set | ||
753 | |||
754 | # | ||
755 | # Multimedia devices | ||
756 | # | ||
757 | |||
758 | # | ||
759 | # Multimedia core support | ||
760 | # | ||
761 | # CONFIG_VIDEO_DEV is not set | ||
762 | # CONFIG_DVB_CORE is not set | ||
763 | # CONFIG_VIDEO_MEDIA is not set | ||
764 | |||
765 | # | ||
766 | # Multimedia drivers | ||
767 | # | ||
768 | CONFIG_DAB=y | ||
769 | |||
770 | # | ||
771 | # Graphics support | ||
772 | # | ||
773 | # CONFIG_AGP is not set | ||
774 | # CONFIG_DRM is not set | ||
775 | # CONFIG_VGASTATE is not set | ||
776 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
777 | CONFIG_FB=y | ||
778 | # CONFIG_FIRMWARE_EDID is not set | ||
779 | # CONFIG_FB_DDC is not set | ||
780 | CONFIG_FB_CFB_FILLRECT=y | ||
781 | CONFIG_FB_CFB_COPYAREA=y | ||
782 | CONFIG_FB_CFB_IMAGEBLIT=y | ||
783 | # CONFIG_FB_CFB_REV_PIXELS_IN_BYTE is not set | ||
784 | # CONFIG_FB_SYS_FILLRECT is not set | ||
785 | # CONFIG_FB_SYS_COPYAREA is not set | ||
786 | # CONFIG_FB_SYS_IMAGEBLIT is not set | ||
787 | # CONFIG_FB_FOREIGN_ENDIAN is not set | ||
788 | # CONFIG_FB_SYS_FOPS is not set | ||
789 | # CONFIG_FB_SVGALIB is not set | ||
790 | CONFIG_FB_MACMODES=y | ||
791 | # CONFIG_FB_BACKLIGHT is not set | ||
792 | # CONFIG_FB_MODE_HELPERS is not set | ||
793 | # CONFIG_FB_TILEBLITTING is not set | ||
794 | |||
795 | # | ||
796 | # Frame buffer hardware drivers | ||
797 | # | ||
798 | # CONFIG_FB_CIRRUS is not set | ||
799 | # CONFIG_FB_PM2 is not set | ||
800 | # CONFIG_FB_CYBER2000 is not set | ||
801 | CONFIG_FB_OF=y | ||
802 | # CONFIG_FB_CT65550 is not set | ||
803 | # CONFIG_FB_ASILIANT is not set | ||
804 | # CONFIG_FB_IMSTT is not set | ||
805 | # CONFIG_FB_VGA16 is not set | ||
806 | # CONFIG_FB_S1D13XXX is not set | ||
807 | # CONFIG_FB_NVIDIA is not set | ||
808 | # CONFIG_FB_RIVA is not set | ||
809 | # CONFIG_FB_MATROX is not set | ||
810 | # CONFIG_FB_RADEON is not set | ||
811 | # CONFIG_FB_ATY128 is not set | ||
812 | # CONFIG_FB_ATY is not set | ||
813 | # CONFIG_FB_S3 is not set | ||
814 | # CONFIG_FB_SAVAGE is not set | ||
815 | # CONFIG_FB_SIS is not set | ||
816 | # CONFIG_FB_NEOMAGIC is not set | ||
817 | # CONFIG_FB_KYRO is not set | ||
818 | # CONFIG_FB_3DFX is not set | ||
819 | # CONFIG_FB_VOODOO1 is not set | ||
820 | # CONFIG_FB_VT8623 is not set | ||
821 | # CONFIG_FB_TRIDENT is not set | ||
822 | # CONFIG_FB_ARK is not set | ||
823 | # CONFIG_FB_PM3 is not set | ||
824 | # CONFIG_FB_FSL_DIU is not set | ||
825 | # CONFIG_FB_IBM_GXT4500 is not set | ||
826 | # CONFIG_FB_VIRTUAL is not set | ||
827 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
828 | |||
829 | # | ||
830 | # Display device support | ||
831 | # | ||
832 | # CONFIG_DISPLAY_SUPPORT is not set | ||
833 | |||
834 | # | ||
835 | # Console display driver support | ||
836 | # | ||
837 | # CONFIG_VGA_CONSOLE is not set | ||
838 | CONFIG_DUMMY_CONSOLE=y | ||
839 | CONFIG_FRAMEBUFFER_CONSOLE=y | ||
840 | # CONFIG_FRAMEBUFFER_CONSOLE_DETECT_PRIMARY is not set | ||
841 | # CONFIG_FRAMEBUFFER_CONSOLE_ROTATION is not set | ||
842 | # CONFIG_FONTS is not set | ||
843 | CONFIG_FONT_8x8=y | ||
844 | CONFIG_FONT_8x16=y | ||
845 | CONFIG_LOGO=y | ||
846 | # CONFIG_LOGO_LINUX_MONO is not set | ||
847 | CONFIG_LOGO_LINUX_VGA16=y | ||
848 | CONFIG_LOGO_LINUX_CLUT224=y | ||
849 | |||
850 | # | ||
851 | # Sound | ||
852 | # | ||
853 | # CONFIG_SOUND is not set | ||
854 | CONFIG_HID_SUPPORT=y | ||
855 | CONFIG_HID=y | ||
856 | # CONFIG_HID_DEBUG is not set | ||
857 | # CONFIG_HIDRAW is not set | ||
858 | # CONFIG_USB_SUPPORT is not set | ||
859 | # CONFIG_MMC is not set | ||
860 | # CONFIG_MEMSTICK is not set | ||
861 | # CONFIG_NEW_LEDS is not set | ||
862 | # CONFIG_ACCESSIBILITY is not set | ||
863 | # CONFIG_INFINIBAND is not set | ||
864 | # CONFIG_EDAC is not set | ||
865 | # CONFIG_RTC_CLASS is not set | ||
866 | # CONFIG_DMADEVICES is not set | ||
867 | # CONFIG_UIO is not set | ||
868 | |||
869 | # | ||
870 | # File systems | ||
871 | # | ||
872 | CONFIG_EXT2_FS=y | ||
873 | # CONFIG_EXT2_FS_XATTR is not set | ||
874 | # CONFIG_EXT2_FS_XIP is not set | ||
875 | CONFIG_EXT3_FS=y | ||
876 | CONFIG_EXT3_FS_XATTR=y | ||
877 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
878 | # CONFIG_EXT3_FS_SECURITY is not set | ||
879 | # CONFIG_EXT4DEV_FS is not set | ||
880 | CONFIG_JBD=y | ||
881 | CONFIG_FS_MBCACHE=y | ||
882 | # CONFIG_REISERFS_FS is not set | ||
883 | # CONFIG_JFS_FS is not set | ||
884 | # CONFIG_FS_POSIX_ACL is not set | ||
885 | # CONFIG_XFS_FS is not set | ||
886 | # CONFIG_OCFS2_FS is not set | ||
887 | CONFIG_DNOTIFY=y | ||
888 | CONFIG_INOTIFY=y | ||
889 | CONFIG_INOTIFY_USER=y | ||
890 | # CONFIG_QUOTA is not set | ||
891 | # CONFIG_AUTOFS_FS is not set | ||
892 | # CONFIG_AUTOFS4_FS is not set | ||
893 | # CONFIG_FUSE_FS is not set | ||
894 | |||
895 | # | ||
896 | # CD-ROM/DVD Filesystems | ||
897 | # | ||
898 | # CONFIG_ISO9660_FS is not set | ||
899 | # CONFIG_UDF_FS is not set | ||
900 | |||
901 | # | ||
902 | # DOS/FAT/NT Filesystems | ||
903 | # | ||
904 | # CONFIG_MSDOS_FS is not set | ||
905 | # CONFIG_VFAT_FS is not set | ||
906 | # CONFIG_NTFS_FS is not set | ||
907 | |||
908 | # | ||
909 | # Pseudo filesystems | ||
910 | # | ||
911 | CONFIG_PROC_FS=y | ||
912 | CONFIG_PROC_KCORE=y | ||
913 | CONFIG_PROC_SYSCTL=y | ||
914 | CONFIG_SYSFS=y | ||
915 | CONFIG_TMPFS=y | ||
916 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
917 | # CONFIG_HUGETLB_PAGE is not set | ||
918 | # CONFIG_CONFIGFS_FS is not set | ||
919 | |||
920 | # | ||
921 | # Miscellaneous filesystems | ||
922 | # | ||
923 | # CONFIG_ADFS_FS is not set | ||
924 | # CONFIG_AFFS_FS is not set | ||
925 | # CONFIG_HFS_FS is not set | ||
926 | # CONFIG_HFSPLUS_FS is not set | ||
927 | # CONFIG_BEFS_FS is not set | ||
928 | # CONFIG_BFS_FS is not set | ||
929 | # CONFIG_EFS_FS is not set | ||
930 | CONFIG_JFFS2_FS=y | ||
931 | CONFIG_JFFS2_FS_DEBUG=0 | ||
932 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
933 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
934 | # CONFIG_JFFS2_SUMMARY is not set | ||
935 | # CONFIG_JFFS2_FS_XATTR is not set | ||
936 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
937 | CONFIG_JFFS2_ZLIB=y | ||
938 | # CONFIG_JFFS2_LZO is not set | ||
939 | CONFIG_JFFS2_RTIME=y | ||
940 | # CONFIG_JFFS2_RUBIN is not set | ||
941 | # CONFIG_CRAMFS is not set | ||
942 | # CONFIG_VXFS_FS is not set | ||
943 | # CONFIG_MINIX_FS is not set | ||
944 | # CONFIG_HPFS_FS is not set | ||
945 | # CONFIG_QNX4FS_FS is not set | ||
946 | # CONFIG_ROMFS_FS is not set | ||
947 | # CONFIG_SYSV_FS is not set | ||
948 | # CONFIG_UFS_FS is not set | ||
949 | CONFIG_NETWORK_FILESYSTEMS=y | ||
950 | CONFIG_NFS_FS=y | ||
951 | CONFIG_NFS_V3=y | ||
952 | # CONFIG_NFS_V3_ACL is not set | ||
953 | CONFIG_NFS_V4=y | ||
954 | # CONFIG_NFSD is not set | ||
955 | CONFIG_ROOT_NFS=y | ||
956 | CONFIG_LOCKD=y | ||
957 | CONFIG_LOCKD_V4=y | ||
958 | CONFIG_NFS_COMMON=y | ||
959 | CONFIG_SUNRPC=y | ||
960 | CONFIG_SUNRPC_GSS=y | ||
961 | # CONFIG_SUNRPC_BIND34 is not set | ||
962 | CONFIG_RPCSEC_GSS_KRB5=y | ||
963 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
964 | # CONFIG_SMB_FS is not set | ||
965 | # CONFIG_CIFS is not set | ||
966 | # CONFIG_NCP_FS is not set | ||
967 | # CONFIG_CODA_FS is not set | ||
968 | # CONFIG_AFS_FS is not set | ||
969 | |||
970 | # | ||
971 | # Partition Types | ||
972 | # | ||
973 | CONFIG_PARTITION_ADVANCED=y | ||
974 | # CONFIG_ACORN_PARTITION is not set | ||
975 | # CONFIG_OSF_PARTITION is not set | ||
976 | # CONFIG_AMIGA_PARTITION is not set | ||
977 | # CONFIG_ATARI_PARTITION is not set | ||
978 | # CONFIG_MAC_PARTITION is not set | ||
979 | # CONFIG_MSDOS_PARTITION is not set | ||
980 | # CONFIG_LDM_PARTITION is not set | ||
981 | # CONFIG_SGI_PARTITION is not set | ||
982 | # CONFIG_ULTRIX_PARTITION is not set | ||
983 | # CONFIG_SUN_PARTITION is not set | ||
984 | # CONFIG_KARMA_PARTITION is not set | ||
985 | # CONFIG_EFI_PARTITION is not set | ||
986 | # CONFIG_SYSV68_PARTITION is not set | ||
987 | # CONFIG_NLS is not set | ||
988 | # CONFIG_DLM is not set | ||
989 | CONFIG_UCC_SLOW=y | ||
990 | CONFIG_UCC_FAST=y | ||
991 | CONFIG_UCC=y | ||
992 | CONFIG_QE_GPIO=y | ||
993 | |||
994 | # | ||
995 | # Library routines | ||
996 | # | ||
997 | CONFIG_BITREVERSE=y | ||
998 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
999 | # CONFIG_CRC_CCITT is not set | ||
1000 | # CONFIG_CRC16 is not set | ||
1001 | # CONFIG_CRC_ITU_T is not set | ||
1002 | CONFIG_CRC32=y | ||
1003 | # CONFIG_CRC7 is not set | ||
1004 | # CONFIG_LIBCRC32C is not set | ||
1005 | CONFIG_ZLIB_INFLATE=y | ||
1006 | CONFIG_ZLIB_DEFLATE=y | ||
1007 | CONFIG_PLIST=y | ||
1008 | CONFIG_HAS_IOMEM=y | ||
1009 | CONFIG_HAS_IOPORT=y | ||
1010 | CONFIG_HAS_DMA=y | ||
1011 | CONFIG_HAVE_LMB=y | ||
1012 | |||
1013 | # | ||
1014 | # Kernel hacking | ||
1015 | # | ||
1016 | # CONFIG_PRINTK_TIME is not set | ||
1017 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1018 | CONFIG_ENABLE_MUST_CHECK=y | ||
1019 | CONFIG_FRAME_WARN=1024 | ||
1020 | # CONFIG_MAGIC_SYSRQ is not set | ||
1021 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1022 | # CONFIG_DEBUG_FS is not set | ||
1023 | # CONFIG_HEADERS_CHECK is not set | ||
1024 | # CONFIG_DEBUG_KERNEL is not set | ||
1025 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1026 | # CONFIG_SLUB_STATS is not set | ||
1027 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1028 | # CONFIG_SAMPLES is not set | ||
1029 | # CONFIG_IRQSTACKS is not set | ||
1030 | CONFIG_PPC_EARLY_DEBUG=y | ||
1031 | # CONFIG_PPC_EARLY_DEBUG_LPAR is not set | ||
1032 | # CONFIG_PPC_EARLY_DEBUG_G5 is not set | ||
1033 | # CONFIG_PPC_EARLY_DEBUG_RTAS_PANEL is not set | ||
1034 | # CONFIG_PPC_EARLY_DEBUG_RTAS_CONSOLE is not set | ||
1035 | # CONFIG_PPC_EARLY_DEBUG_MAPLE is not set | ||
1036 | # CONFIG_PPC_EARLY_DEBUG_ISERIES is not set | ||
1037 | # CONFIG_PPC_EARLY_DEBUG_PAS_REALMODE is not set | ||
1038 | # CONFIG_PPC_EARLY_DEBUG_BEAT is not set | ||
1039 | # CONFIG_PPC_EARLY_DEBUG_44x is not set | ||
1040 | # CONFIG_PPC_EARLY_DEBUG_40x is not set | ||
1041 | # CONFIG_PPC_EARLY_DEBUG_CPM is not set | ||
1042 | |||
1043 | # | ||
1044 | # Security options | ||
1045 | # | ||
1046 | # CONFIG_KEYS is not set | ||
1047 | # CONFIG_SECURITY is not set | ||
1048 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1049 | CONFIG_CRYPTO=y | ||
1050 | |||
1051 | # | ||
1052 | # Crypto core or helper | ||
1053 | # | ||
1054 | CONFIG_CRYPTO_ALGAPI=y | ||
1055 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1056 | CONFIG_CRYPTO_MANAGER=y | ||
1057 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1058 | # CONFIG_CRYPTO_NULL is not set | ||
1059 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1060 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1061 | # CONFIG_CRYPTO_TEST is not set | ||
1062 | |||
1063 | # | ||
1064 | # Authenticated Encryption with Associated Data | ||
1065 | # | ||
1066 | # CONFIG_CRYPTO_CCM is not set | ||
1067 | # CONFIG_CRYPTO_GCM is not set | ||
1068 | # CONFIG_CRYPTO_SEQIV is not set | ||
1069 | |||
1070 | # | ||
1071 | # Block modes | ||
1072 | # | ||
1073 | CONFIG_CRYPTO_CBC=y | ||
1074 | # CONFIG_CRYPTO_CTR is not set | ||
1075 | # CONFIG_CRYPTO_CTS is not set | ||
1076 | # CONFIG_CRYPTO_ECB is not set | ||
1077 | # CONFIG_CRYPTO_LRW is not set | ||
1078 | # CONFIG_CRYPTO_PCBC is not set | ||
1079 | # CONFIG_CRYPTO_XTS is not set | ||
1080 | |||
1081 | # | ||
1082 | # Hash modes | ||
1083 | # | ||
1084 | # CONFIG_CRYPTO_HMAC is not set | ||
1085 | # CONFIG_CRYPTO_XCBC is not set | ||
1086 | |||
1087 | # | ||
1088 | # Digest | ||
1089 | # | ||
1090 | # CONFIG_CRYPTO_CRC32C is not set | ||
1091 | # CONFIG_CRYPTO_MD4 is not set | ||
1092 | CONFIG_CRYPTO_MD5=y | ||
1093 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1094 | # CONFIG_CRYPTO_SHA1 is not set | ||
1095 | # CONFIG_CRYPTO_SHA256 is not set | ||
1096 | # CONFIG_CRYPTO_SHA512 is not set | ||
1097 | # CONFIG_CRYPTO_TGR192 is not set | ||
1098 | # CONFIG_CRYPTO_WP512 is not set | ||
1099 | |||
1100 | # | ||
1101 | # Ciphers | ||
1102 | # | ||
1103 | # CONFIG_CRYPTO_AES is not set | ||
1104 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1105 | # CONFIG_CRYPTO_ARC4 is not set | ||
1106 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1107 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1108 | # CONFIG_CRYPTO_CAST5 is not set | ||
1109 | # CONFIG_CRYPTO_CAST6 is not set | ||
1110 | CONFIG_CRYPTO_DES=y | ||
1111 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1112 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1113 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1114 | # CONFIG_CRYPTO_SEED is not set | ||
1115 | # CONFIG_CRYPTO_SERPENT is not set | ||
1116 | # CONFIG_CRYPTO_TEA is not set | ||
1117 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1118 | |||
1119 | # | ||
1120 | # Compression | ||
1121 | # | ||
1122 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1123 | # CONFIG_CRYPTO_LZO is not set | ||
1124 | CONFIG_CRYPTO_HW=y | ||
1125 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1126 | # CONFIG_PPC_CLOCK is not set | ||
1127 | CONFIG_PPC_LIB_RHEAP=y | ||
1128 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig new file mode 100644 index 000000000000..5d5b898767a3 --- /dev/null +++ b/arch/powerpc/configs/85xx/tqm8548_defconfig | |||
@@ -0,0 +1,1094 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.26-rc4 | ||
4 | # Tue Jun 3 14:39:30 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | # CONFIG_6xx is not set | ||
12 | CONFIG_PPC_85xx=y | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_E500=y | ||
18 | CONFIG_BOOKE=y | ||
19 | CONFIG_FSL_BOOKE=y | ||
20 | CONFIG_FSL_EMB_PERFMON=y | ||
21 | # CONFIG_PHYS_64BIT is not set | ||
22 | CONFIG_SPE=y | ||
23 | # CONFIG_PPC_MM_SLICES is not set | ||
24 | CONFIG_PPC32=y | ||
25 | CONFIG_WORD_SIZE=32 | ||
26 | CONFIG_PPC_MERGE=y | ||
27 | CONFIG_MMU=y | ||
28 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
29 | CONFIG_GENERIC_TIME=y | ||
30 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
31 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
32 | CONFIG_GENERIC_HARDIRQS=y | ||
33 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
34 | CONFIG_IRQ_PER_CPU=y | ||
35 | CONFIG_STACKTRACE_SUPPORT=y | ||
36 | CONFIG_LOCKDEP_SUPPORT=y | ||
37 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
38 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
39 | CONFIG_GENERIC_HWEIGHT=y | ||
40 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
41 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
42 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
43 | CONFIG_PPC=y | ||
44 | CONFIG_EARLY_PRINTK=y | ||
45 | CONFIG_GENERIC_NVRAM=y | ||
46 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
47 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
48 | CONFIG_PPC_OF=y | ||
49 | CONFIG_OF=y | ||
50 | CONFIG_PPC_UDBG_16550=y | ||
51 | # CONFIG_GENERIC_TBSYNC is not set | ||
52 | CONFIG_AUDIT_ARCH=y | ||
53 | CONFIG_GENERIC_BUG=y | ||
54 | CONFIG_DEFAULT_UIMAGE=y | ||
55 | # CONFIG_PPC_DCR_NATIVE is not set | ||
56 | # CONFIG_PPC_DCR_MMIO is not set | ||
57 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
58 | |||
59 | # | ||
60 | # General setup | ||
61 | # | ||
62 | CONFIG_EXPERIMENTAL=y | ||
63 | CONFIG_BROKEN_ON_SMP=y | ||
64 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
65 | CONFIG_LOCALVERSION="" | ||
66 | CONFIG_LOCALVERSION_AUTO=y | ||
67 | CONFIG_SWAP=y | ||
68 | CONFIG_SYSVIPC=y | ||
69 | CONFIG_SYSVIPC_SYSCTL=y | ||
70 | # CONFIG_POSIX_MQUEUE is not set | ||
71 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
72 | # CONFIG_TASKSTATS is not set | ||
73 | # CONFIG_AUDIT is not set | ||
74 | # CONFIG_IKCONFIG is not set | ||
75 | CONFIG_LOG_BUF_SHIFT=14 | ||
76 | # CONFIG_CGROUPS is not set | ||
77 | CONFIG_GROUP_SCHED=y | ||
78 | # CONFIG_FAIR_GROUP_SCHED is not set | ||
79 | # CONFIG_RT_GROUP_SCHED is not set | ||
80 | CONFIG_USER_SCHED=y | ||
81 | # CONFIG_CGROUP_SCHED is not set | ||
82 | CONFIG_SYSFS_DEPRECATED=y | ||
83 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
84 | # CONFIG_RELAY is not set | ||
85 | # CONFIG_NAMESPACES is not set | ||
86 | CONFIG_BLK_DEV_INITRD=y | ||
87 | CONFIG_INITRAMFS_SOURCE="" | ||
88 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
89 | CONFIG_SYSCTL=y | ||
90 | CONFIG_EMBEDDED=y | ||
91 | CONFIG_SYSCTL_SYSCALL=y | ||
92 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
93 | CONFIG_KALLSYMS=y | ||
94 | # CONFIG_KALLSYMS_ALL is not set | ||
95 | # CONFIG_KALLSYMS_EXTRA_PASS is not set | ||
96 | CONFIG_HOTPLUG=y | ||
97 | CONFIG_PRINTK=y | ||
98 | CONFIG_BUG=y | ||
99 | CONFIG_ELF_CORE=y | ||
100 | CONFIG_COMPAT_BRK=y | ||
101 | CONFIG_BASE_FULL=y | ||
102 | CONFIG_FUTEX=y | ||
103 | CONFIG_ANON_INODES=y | ||
104 | CONFIG_EPOLL=y | ||
105 | CONFIG_SIGNALFD=y | ||
106 | CONFIG_TIMERFD=y | ||
107 | CONFIG_EVENTFD=y | ||
108 | CONFIG_SHMEM=y | ||
109 | CONFIG_VM_EVENT_COUNTERS=y | ||
110 | CONFIG_SLUB_DEBUG=y | ||
111 | # CONFIG_SLAB is not set | ||
112 | CONFIG_SLUB=y | ||
113 | # CONFIG_SLOB is not set | ||
114 | # CONFIG_PROFILING is not set | ||
115 | # CONFIG_MARKERS is not set | ||
116 | CONFIG_HAVE_OPROFILE=y | ||
117 | # CONFIG_KPROBES is not set | ||
118 | CONFIG_HAVE_KPROBES=y | ||
119 | CONFIG_HAVE_KRETPROBES=y | ||
120 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
121 | CONFIG_PROC_PAGE_MONITOR=y | ||
122 | CONFIG_SLABINFO=y | ||
123 | CONFIG_RT_MUTEXES=y | ||
124 | # CONFIG_TINY_SHMEM is not set | ||
125 | CONFIG_BASE_SMALL=0 | ||
126 | CONFIG_MODULES=y | ||
127 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
128 | CONFIG_MODULE_UNLOAD=y | ||
129 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
130 | # CONFIG_MODVERSIONS is not set | ||
131 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
132 | # CONFIG_KMOD is not set | ||
133 | CONFIG_BLOCK=y | ||
134 | # CONFIG_LBD is not set | ||
135 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
136 | # CONFIG_LSF is not set | ||
137 | # CONFIG_BLK_DEV_BSG is not set | ||
138 | |||
139 | # | ||
140 | # IO Schedulers | ||
141 | # | ||
142 | CONFIG_IOSCHED_NOOP=y | ||
143 | CONFIG_IOSCHED_AS=y | ||
144 | CONFIG_IOSCHED_DEADLINE=y | ||
145 | CONFIG_IOSCHED_CFQ=y | ||
146 | CONFIG_DEFAULT_AS=y | ||
147 | # CONFIG_DEFAULT_DEADLINE is not set | ||
148 | # CONFIG_DEFAULT_CFQ is not set | ||
149 | # CONFIG_DEFAULT_NOOP is not set | ||
150 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
151 | CONFIG_CLASSIC_RCU=y | ||
152 | |||
153 | # | ||
154 | # Platform support | ||
155 | # | ||
156 | # CONFIG_PPC_MPC512x is not set | ||
157 | # CONFIG_PPC_MPC5121 is not set | ||
158 | # CONFIG_PPC_CELL is not set | ||
159 | # CONFIG_PPC_CELL_NATIVE is not set | ||
160 | # CONFIG_PQ2ADS is not set | ||
161 | CONFIG_MPC85xx=y | ||
162 | # CONFIG_MPC8540_ADS is not set | ||
163 | # CONFIG_MPC8560_ADS is not set | ||
164 | # CONFIG_MPC85xx_CDS is not set | ||
165 | # CONFIG_MPC85xx_MDS is not set | ||
166 | # CONFIG_MPC85xx_DS is not set | ||
167 | # CONFIG_KSI8560 is not set | ||
168 | # CONFIG_STX_GP3 is not set | ||
169 | # CONFIG_TQM8540 is not set | ||
170 | # CONFIG_TQM8541 is not set | ||
171 | CONFIG_TQM8548=y | ||
172 | # CONFIG_TQM8555 is not set | ||
173 | # CONFIG_TQM8560 is not set | ||
174 | # CONFIG_SBC8548 is not set | ||
175 | # CONFIG_SBC8560 is not set | ||
176 | CONFIG_TQM85xx=y | ||
177 | # CONFIG_IPIC is not set | ||
178 | CONFIG_MPIC=y | ||
179 | # CONFIG_MPIC_WEIRD is not set | ||
180 | # CONFIG_PPC_I8259 is not set | ||
181 | # CONFIG_PPC_RTAS is not set | ||
182 | # CONFIG_MMIO_NVRAM is not set | ||
183 | # CONFIG_PPC_MPC106 is not set | ||
184 | # CONFIG_PPC_970_NAP is not set | ||
185 | # CONFIG_PPC_INDIRECT_IO is not set | ||
186 | # CONFIG_GENERIC_IOMAP is not set | ||
187 | # CONFIG_CPU_FREQ is not set | ||
188 | # CONFIG_CPM2 is not set | ||
189 | CONFIG_PPC_CPM_NEW_BINDING=y | ||
190 | # CONFIG_FSL_ULI1575 is not set | ||
191 | |||
192 | # | ||
193 | # Kernel options | ||
194 | # | ||
195 | # CONFIG_HIGHMEM is not set | ||
196 | CONFIG_TICK_ONESHOT=y | ||
197 | CONFIG_NO_HZ=y | ||
198 | CONFIG_HIGH_RES_TIMERS=y | ||
199 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
200 | # CONFIG_HZ_100 is not set | ||
201 | CONFIG_HZ_250=y | ||
202 | # CONFIG_HZ_300 is not set | ||
203 | # CONFIG_HZ_1000 is not set | ||
204 | CONFIG_HZ=250 | ||
205 | # CONFIG_SCHED_HRTICK is not set | ||
206 | CONFIG_PREEMPT_NONE=y | ||
207 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
208 | # CONFIG_PREEMPT is not set | ||
209 | CONFIG_BINFMT_ELF=y | ||
210 | CONFIG_BINFMT_MISC=y | ||
211 | CONFIG_MATH_EMULATION=y | ||
212 | # CONFIG_IOMMU_HELPER is not set | ||
213 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
214 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
215 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
216 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
217 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
218 | CONFIG_SELECT_MEMORY_MODEL=y | ||
219 | CONFIG_FLATMEM_MANUAL=y | ||
220 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
221 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
222 | CONFIG_FLATMEM=y | ||
223 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
224 | # CONFIG_SPARSEMEM_STATIC is not set | ||
225 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
226 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
227 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
228 | # CONFIG_RESOURCES_64BIT is not set | ||
229 | CONFIG_ZONE_DMA_FLAG=1 | ||
230 | CONFIG_BOUNCE=y | ||
231 | CONFIG_VIRT_TO_BUS=y | ||
232 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
233 | CONFIG_PROC_DEVICETREE=y | ||
234 | # CONFIG_CMDLINE_BOOL is not set | ||
235 | # CONFIG_PM is not set | ||
236 | # CONFIG_SECCOMP is not set | ||
237 | CONFIG_ISA_DMA_API=y | ||
238 | |||
239 | # | ||
240 | # Bus options | ||
241 | # | ||
242 | CONFIG_ZONE_DMA=y | ||
243 | CONFIG_PPC_INDIRECT_PCI=y | ||
244 | CONFIG_FSL_SOC=y | ||
245 | CONFIG_FSL_PCI=y | ||
246 | CONFIG_FSL_LBC=y | ||
247 | CONFIG_PCI=y | ||
248 | CONFIG_PCI_DOMAINS=y | ||
249 | CONFIG_PCI_SYSCALL=y | ||
250 | CONFIG_PCIEPORTBUS=y | ||
251 | CONFIG_PCIEAER=y | ||
252 | # CONFIG_PCIEASPM is not set | ||
253 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
254 | # CONFIG_PCI_MSI is not set | ||
255 | CONFIG_PCI_LEGACY=y | ||
256 | # CONFIG_PCI_DEBUG is not set | ||
257 | # CONFIG_PCCARD is not set | ||
258 | # CONFIG_HOTPLUG_PCI is not set | ||
259 | # CONFIG_HAS_RAPIDIO is not set | ||
260 | |||
261 | # | ||
262 | # Advanced setup | ||
263 | # | ||
264 | # CONFIG_ADVANCED_OPTIONS is not set | ||
265 | |||
266 | # | ||
267 | # Default settings for advanced configuration options are used | ||
268 | # | ||
269 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
270 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
271 | CONFIG_KERNEL_START=0xc0000000 | ||
272 | CONFIG_PHYSICAL_START=0x00000000 | ||
273 | CONFIG_PHYSICAL_ALIGN=0x10000000 | ||
274 | CONFIG_TASK_SIZE=0xc0000000 | ||
275 | |||
276 | # | ||
277 | # Networking | ||
278 | # | ||
279 | CONFIG_NET=y | ||
280 | |||
281 | # | ||
282 | # Networking options | ||
283 | # | ||
284 | CONFIG_PACKET=y | ||
285 | # CONFIG_PACKET_MMAP is not set | ||
286 | CONFIG_UNIX=y | ||
287 | CONFIG_XFRM=y | ||
288 | CONFIG_XFRM_USER=y | ||
289 | # CONFIG_XFRM_SUB_POLICY is not set | ||
290 | # CONFIG_XFRM_MIGRATE is not set | ||
291 | # CONFIG_XFRM_STATISTICS is not set | ||
292 | # CONFIG_NET_KEY is not set | ||
293 | CONFIG_INET=y | ||
294 | CONFIG_IP_MULTICAST=y | ||
295 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
296 | CONFIG_IP_FIB_HASH=y | ||
297 | CONFIG_IP_PNP=y | ||
298 | CONFIG_IP_PNP_DHCP=y | ||
299 | CONFIG_IP_PNP_BOOTP=y | ||
300 | # CONFIG_IP_PNP_RARP is not set | ||
301 | # CONFIG_NET_IPIP is not set | ||
302 | # CONFIG_NET_IPGRE is not set | ||
303 | # CONFIG_IP_MROUTE is not set | ||
304 | # CONFIG_ARPD is not set | ||
305 | CONFIG_SYN_COOKIES=y | ||
306 | # CONFIG_INET_AH is not set | ||
307 | # CONFIG_INET_ESP is not set | ||
308 | # CONFIG_INET_IPCOMP is not set | ||
309 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
310 | # CONFIG_INET_TUNNEL is not set | ||
311 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
312 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
313 | CONFIG_INET_XFRM_MODE_BEET=y | ||
314 | # CONFIG_INET_LRO is not set | ||
315 | CONFIG_INET_DIAG=y | ||
316 | CONFIG_INET_TCP_DIAG=y | ||
317 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
318 | CONFIG_TCP_CONG_CUBIC=y | ||
319 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
320 | # CONFIG_TCP_MD5SIG is not set | ||
321 | # CONFIG_IPV6 is not set | ||
322 | # CONFIG_NETWORK_SECMARK is not set | ||
323 | # CONFIG_NETFILTER is not set | ||
324 | # CONFIG_IP_DCCP is not set | ||
325 | # CONFIG_IP_SCTP is not set | ||
326 | # CONFIG_TIPC is not set | ||
327 | # CONFIG_ATM is not set | ||
328 | # CONFIG_BRIDGE is not set | ||
329 | # CONFIG_VLAN_8021Q is not set | ||
330 | # CONFIG_DECNET is not set | ||
331 | # CONFIG_LLC2 is not set | ||
332 | # CONFIG_IPX is not set | ||
333 | # CONFIG_ATALK is not set | ||
334 | # CONFIG_X25 is not set | ||
335 | # CONFIG_LAPB is not set | ||
336 | # CONFIG_ECONET is not set | ||
337 | # CONFIG_WAN_ROUTER is not set | ||
338 | # CONFIG_NET_SCHED is not set | ||
339 | |||
340 | # | ||
341 | # Network testing | ||
342 | # | ||
343 | # CONFIG_NET_PKTGEN is not set | ||
344 | # CONFIG_HAMRADIO is not set | ||
345 | # CONFIG_CAN is not set | ||
346 | # CONFIG_IRDA is not set | ||
347 | # CONFIG_BT is not set | ||
348 | # CONFIG_AF_RXRPC is not set | ||
349 | |||
350 | # | ||
351 | # Wireless | ||
352 | # | ||
353 | # CONFIG_CFG80211 is not set | ||
354 | # CONFIG_WIRELESS_EXT is not set | ||
355 | # CONFIG_MAC80211 is not set | ||
356 | # CONFIG_IEEE80211 is not set | ||
357 | # CONFIG_RFKILL is not set | ||
358 | # CONFIG_NET_9P is not set | ||
359 | |||
360 | # | ||
361 | # Device Drivers | ||
362 | # | ||
363 | |||
364 | # | ||
365 | # Generic Driver Options | ||
366 | # | ||
367 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
368 | CONFIG_STANDALONE=y | ||
369 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
370 | # CONFIG_FW_LOADER is not set | ||
371 | # CONFIG_DEBUG_DRIVER is not set | ||
372 | # CONFIG_DEBUG_DEVRES is not set | ||
373 | # CONFIG_SYS_HYPERVISOR is not set | ||
374 | # CONFIG_CONNECTOR is not set | ||
375 | CONFIG_MTD=y | ||
376 | # CONFIG_MTD_DEBUG is not set | ||
377 | # CONFIG_MTD_CONCAT is not set | ||
378 | CONFIG_MTD_PARTITIONS=y | ||
379 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
380 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
381 | CONFIG_MTD_OF_PARTS=y | ||
382 | # CONFIG_MTD_AR7_PARTS is not set | ||
383 | |||
384 | # | ||
385 | # User Modules And Translation Layers | ||
386 | # | ||
387 | CONFIG_MTD_CHAR=y | ||
388 | CONFIG_MTD_BLKDEVS=y | ||
389 | # CONFIG_MTD_BLOCK is not set | ||
390 | # CONFIG_MTD_BLOCK_RO is not set | ||
391 | # CONFIG_FTL is not set | ||
392 | # CONFIG_NFTL is not set | ||
393 | # CONFIG_INFTL is not set | ||
394 | # CONFIG_RFD_FTL is not set | ||
395 | # CONFIG_SSFDC is not set | ||
396 | # CONFIG_MTD_OOPS is not set | ||
397 | |||
398 | # | ||
399 | # RAM/ROM/Flash chip drivers | ||
400 | # | ||
401 | CONFIG_MTD_CFI=y | ||
402 | # CONFIG_MTD_JEDECPROBE is not set | ||
403 | CONFIG_MTD_GEN_PROBE=y | ||
404 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
405 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
406 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
407 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
408 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
409 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
410 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
411 | CONFIG_MTD_CFI_I1=y | ||
412 | CONFIG_MTD_CFI_I2=y | ||
413 | # CONFIG_MTD_CFI_I4 is not set | ||
414 | # CONFIG_MTD_CFI_I8 is not set | ||
415 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
416 | CONFIG_MTD_CFI_AMDSTD=y | ||
417 | # CONFIG_MTD_CFI_STAA is not set | ||
418 | CONFIG_MTD_CFI_UTIL=y | ||
419 | # CONFIG_MTD_RAM is not set | ||
420 | # CONFIG_MTD_ROM is not set | ||
421 | # CONFIG_MTD_ABSENT is not set | ||
422 | |||
423 | # | ||
424 | # Mapping drivers for chip access | ||
425 | # | ||
426 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
427 | # CONFIG_MTD_PHYSMAP is not set | ||
428 | CONFIG_MTD_PHYSMAP_OF=y | ||
429 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
430 | # CONFIG_MTD_PLATRAM is not set | ||
431 | |||
432 | # | ||
433 | # Self-contained MTD device drivers | ||
434 | # | ||
435 | # CONFIG_MTD_PMC551 is not set | ||
436 | # CONFIG_MTD_SLRAM is not set | ||
437 | # CONFIG_MTD_PHRAM is not set | ||
438 | # CONFIG_MTD_MTDRAM is not set | ||
439 | # CONFIG_MTD_BLOCK2MTD is not set | ||
440 | |||
441 | # | ||
442 | # Disk-On-Chip Device Drivers | ||
443 | # | ||
444 | # CONFIG_MTD_DOC2000 is not set | ||
445 | # CONFIG_MTD_DOC2001 is not set | ||
446 | # CONFIG_MTD_DOC2001PLUS is not set | ||
447 | CONFIG_MTD_NAND=y | ||
448 | # CONFIG_MTD_NAND_VERIFY_WRITE is not set | ||
449 | CONFIG_MTD_NAND_ECC_SMC=y | ||
450 | # CONFIG_MTD_NAND_MUSEUM_IDS is not set | ||
451 | CONFIG_MTD_NAND_IDS=y | ||
452 | # CONFIG_MTD_NAND_DISKONCHIP is not set | ||
453 | # CONFIG_MTD_NAND_CAFE is not set | ||
454 | # CONFIG_MTD_NAND_NANDSIM is not set | ||
455 | # CONFIG_MTD_NAND_PLATFORM is not set | ||
456 | # CONFIG_MTD_NAND_FSL_ELBC is not set | ||
457 | CONFIG_MTD_NAND_FSL_UPM=y | ||
458 | # CONFIG_MTD_ONENAND is not set | ||
459 | |||
460 | # | ||
461 | # UBI - Unsorted block images | ||
462 | # | ||
463 | CONFIG_MTD_UBI=m | ||
464 | CONFIG_MTD_UBI_WL_THRESHOLD=4096 | ||
465 | CONFIG_MTD_UBI_BEB_RESERVE=1 | ||
466 | # CONFIG_MTD_UBI_GLUEBI is not set | ||
467 | |||
468 | # | ||
469 | # UBI debugging options | ||
470 | # | ||
471 | # CONFIG_MTD_UBI_DEBUG is not set | ||
472 | CONFIG_OF_DEVICE=y | ||
473 | # CONFIG_PARPORT is not set | ||
474 | CONFIG_BLK_DEV=y | ||
475 | # CONFIG_BLK_DEV_FD is not set | ||
476 | # CONFIG_BLK_CPQ_DA is not set | ||
477 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
478 | # CONFIG_BLK_DEV_DAC960 is not set | ||
479 | # CONFIG_BLK_DEV_UMEM is not set | ||
480 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
481 | CONFIG_BLK_DEV_LOOP=y | ||
482 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
483 | # CONFIG_BLK_DEV_NBD is not set | ||
484 | # CONFIG_BLK_DEV_SX8 is not set | ||
485 | CONFIG_BLK_DEV_RAM=y | ||
486 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
487 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
488 | # CONFIG_BLK_DEV_XIP is not set | ||
489 | # CONFIG_CDROM_PKTCDVD is not set | ||
490 | # CONFIG_ATA_OVER_ETH is not set | ||
491 | CONFIG_MISC_DEVICES=y | ||
492 | # CONFIG_PHANTOM is not set | ||
493 | # CONFIG_EEPROM_93CX6 is not set | ||
494 | # CONFIG_SGI_IOC4 is not set | ||
495 | # CONFIG_TIFM_CORE is not set | ||
496 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
497 | CONFIG_HAVE_IDE=y | ||
498 | CONFIG_IDE=y | ||
499 | CONFIG_IDE_MAX_HWIFS=4 | ||
500 | CONFIG_BLK_DEV_IDE=y | ||
501 | |||
502 | # | ||
503 | # Please see Documentation/ide/ide.txt for help/info on IDE drives | ||
504 | # | ||
505 | # CONFIG_BLK_DEV_IDE_SATA is not set | ||
506 | # CONFIG_BLK_DEV_IDEDISK is not set | ||
507 | # CONFIG_IDEDISK_MULTI_MODE is not set | ||
508 | # CONFIG_BLK_DEV_IDECD is not set | ||
509 | # CONFIG_BLK_DEV_IDETAPE is not set | ||
510 | # CONFIG_BLK_DEV_IDEFLOPPY is not set | ||
511 | # CONFIG_IDE_TASK_IOCTL is not set | ||
512 | CONFIG_IDE_PROC_FS=y | ||
513 | |||
514 | # | ||
515 | # IDE chipset support/bugfixes | ||
516 | # | ||
517 | CONFIG_IDE_GENERIC=y | ||
518 | # CONFIG_BLK_DEV_PLATFORM is not set | ||
519 | CONFIG_BLK_DEV_IDEDMA_SFF=y | ||
520 | |||
521 | # | ||
522 | # PCI IDE chipsets support | ||
523 | # | ||
524 | CONFIG_BLK_DEV_IDEPCI=y | ||
525 | CONFIG_IDEPCI_PCIBUS_ORDER=y | ||
526 | # CONFIG_BLK_DEV_OFFBOARD is not set | ||
527 | CONFIG_BLK_DEV_GENERIC=y | ||
528 | # CONFIG_BLK_DEV_OPTI621 is not set | ||
529 | CONFIG_BLK_DEV_IDEDMA_PCI=y | ||
530 | # CONFIG_BLK_DEV_AEC62XX is not set | ||
531 | # CONFIG_BLK_DEV_ALI15X3 is not set | ||
532 | # CONFIG_BLK_DEV_AMD74XX is not set | ||
533 | # CONFIG_BLK_DEV_CMD64X is not set | ||
534 | # CONFIG_BLK_DEV_TRIFLEX is not set | ||
535 | # CONFIG_BLK_DEV_CY82C693 is not set | ||
536 | # CONFIG_BLK_DEV_CS5520 is not set | ||
537 | # CONFIG_BLK_DEV_CS5530 is not set | ||
538 | # CONFIG_BLK_DEV_HPT34X is not set | ||
539 | # CONFIG_BLK_DEV_HPT366 is not set | ||
540 | # CONFIG_BLK_DEV_JMICRON is not set | ||
541 | # CONFIG_BLK_DEV_SC1200 is not set | ||
542 | # CONFIG_BLK_DEV_PIIX is not set | ||
543 | # CONFIG_BLK_DEV_IT8213 is not set | ||
544 | # CONFIG_BLK_DEV_IT821X is not set | ||
545 | # CONFIG_BLK_DEV_NS87415 is not set | ||
546 | # CONFIG_BLK_DEV_PDC202XX_OLD is not set | ||
547 | # CONFIG_BLK_DEV_PDC202XX_NEW is not set | ||
548 | # CONFIG_BLK_DEV_SVWKS is not set | ||
549 | # CONFIG_BLK_DEV_SIIMAGE is not set | ||
550 | # CONFIG_BLK_DEV_SL82C105 is not set | ||
551 | # CONFIG_BLK_DEV_SLC90E66 is not set | ||
552 | # CONFIG_BLK_DEV_TRM290 is not set | ||
553 | CONFIG_BLK_DEV_VIA82CXXX=y | ||
554 | # CONFIG_BLK_DEV_TC86C001 is not set | ||
555 | CONFIG_BLK_DEV_IDEDMA=y | ||
556 | # CONFIG_BLK_DEV_HD_ONLY is not set | ||
557 | # CONFIG_BLK_DEV_HD is not set | ||
558 | |||
559 | # | ||
560 | # SCSI device support | ||
561 | # | ||
562 | # CONFIG_RAID_ATTRS is not set | ||
563 | # CONFIG_SCSI is not set | ||
564 | # CONFIG_SCSI_DMA is not set | ||
565 | # CONFIG_SCSI_NETLINK is not set | ||
566 | # CONFIG_ATA is not set | ||
567 | # CONFIG_MD is not set | ||
568 | # CONFIG_FUSION is not set | ||
569 | |||
570 | # | ||
571 | # IEEE 1394 (FireWire) support | ||
572 | # | ||
573 | # CONFIG_FIREWIRE is not set | ||
574 | # CONFIG_IEEE1394 is not set | ||
575 | # CONFIG_I2O is not set | ||
576 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
577 | CONFIG_NETDEVICES=y | ||
578 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
579 | # CONFIG_DUMMY is not set | ||
580 | # CONFIG_BONDING is not set | ||
581 | # CONFIG_MACVLAN is not set | ||
582 | # CONFIG_EQUALIZER is not set | ||
583 | # CONFIG_TUN is not set | ||
584 | # CONFIG_VETH is not set | ||
585 | # CONFIG_ARCNET is not set | ||
586 | CONFIG_PHYLIB=y | ||
587 | |||
588 | # | ||
589 | # MII PHY device drivers | ||
590 | # | ||
591 | # CONFIG_MARVELL_PHY is not set | ||
592 | # CONFIG_DAVICOM_PHY is not set | ||
593 | # CONFIG_QSEMI_PHY is not set | ||
594 | # CONFIG_LXT_PHY is not set | ||
595 | # CONFIG_CICADA_PHY is not set | ||
596 | # CONFIG_VITESSE_PHY is not set | ||
597 | # CONFIG_SMSC_PHY is not set | ||
598 | # CONFIG_BROADCOM_PHY is not set | ||
599 | # CONFIG_ICPLUS_PHY is not set | ||
600 | # CONFIG_REALTEK_PHY is not set | ||
601 | # CONFIG_FIXED_PHY is not set | ||
602 | # CONFIG_MDIO_BITBANG is not set | ||
603 | CONFIG_NET_ETHERNET=y | ||
604 | CONFIG_MII=y | ||
605 | # CONFIG_HAPPYMEAL is not set | ||
606 | # CONFIG_SUNGEM is not set | ||
607 | # CONFIG_CASSINI is not set | ||
608 | # CONFIG_NET_VENDOR_3COM is not set | ||
609 | # CONFIG_NET_TULIP is not set | ||
610 | # CONFIG_HP100 is not set | ||
611 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
612 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
613 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
614 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
615 | # CONFIG_NET_PCI is not set | ||
616 | # CONFIG_B44 is not set | ||
617 | CONFIG_NETDEV_1000=y | ||
618 | # CONFIG_ACENIC is not set | ||
619 | # CONFIG_DL2K is not set | ||
620 | CONFIG_E1000=y | ||
621 | CONFIG_E1000_NAPI=y | ||
622 | # CONFIG_E1000_DISABLE_PACKET_SPLIT is not set | ||
623 | # CONFIG_E1000E is not set | ||
624 | # CONFIG_E1000E_ENABLED is not set | ||
625 | # CONFIG_IP1000 is not set | ||
626 | # CONFIG_IGB is not set | ||
627 | # CONFIG_NS83820 is not set | ||
628 | # CONFIG_HAMACHI is not set | ||
629 | # CONFIG_YELLOWFIN is not set | ||
630 | # CONFIG_R8169 is not set | ||
631 | # CONFIG_SIS190 is not set | ||
632 | # CONFIG_SKGE is not set | ||
633 | # CONFIG_SKY2 is not set | ||
634 | # CONFIG_VIA_VELOCITY is not set | ||
635 | # CONFIG_TIGON3 is not set | ||
636 | # CONFIG_BNX2 is not set | ||
637 | CONFIG_GIANFAR=y | ||
638 | CONFIG_GFAR_NAPI=y | ||
639 | # CONFIG_QLA3XXX is not set | ||
640 | # CONFIG_ATL1 is not set | ||
641 | CONFIG_NETDEV_10000=y | ||
642 | # CONFIG_CHELSIO_T1 is not set | ||
643 | # CONFIG_CHELSIO_T3 is not set | ||
644 | # CONFIG_IXGBE is not set | ||
645 | # CONFIG_IXGB is not set | ||
646 | # CONFIG_S2IO is not set | ||
647 | # CONFIG_MYRI10GE is not set | ||
648 | # CONFIG_NETXEN_NIC is not set | ||
649 | # CONFIG_NIU is not set | ||
650 | # CONFIG_MLX4_CORE is not set | ||
651 | # CONFIG_TEHUTI is not set | ||
652 | # CONFIG_BNX2X is not set | ||
653 | # CONFIG_SFC is not set | ||
654 | # CONFIG_TR is not set | ||
655 | |||
656 | # | ||
657 | # Wireless LAN | ||
658 | # | ||
659 | # CONFIG_WLAN_PRE80211 is not set | ||
660 | # CONFIG_WLAN_80211 is not set | ||
661 | # CONFIG_IWLWIFI_LEDS is not set | ||
662 | # CONFIG_WAN is not set | ||
663 | # CONFIG_FDDI is not set | ||
664 | # CONFIG_HIPPI is not set | ||
665 | # CONFIG_PPP is not set | ||
666 | # CONFIG_SLIP is not set | ||
667 | # CONFIG_NETCONSOLE is not set | ||
668 | # CONFIG_NETPOLL is not set | ||
669 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
670 | # CONFIG_ISDN is not set | ||
671 | # CONFIG_PHONE is not set | ||
672 | |||
673 | # | ||
674 | # Input device support | ||
675 | # | ||
676 | CONFIG_INPUT=y | ||
677 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
678 | # CONFIG_INPUT_POLLDEV is not set | ||
679 | |||
680 | # | ||
681 | # Userland interfaces | ||
682 | # | ||
683 | # CONFIG_INPUT_MOUSEDEV is not set | ||
684 | # CONFIG_INPUT_JOYDEV is not set | ||
685 | # CONFIG_INPUT_EVDEV is not set | ||
686 | # CONFIG_INPUT_EVBUG is not set | ||
687 | |||
688 | # | ||
689 | # Input Device Drivers | ||
690 | # | ||
691 | # CONFIG_INPUT_KEYBOARD is not set | ||
692 | # CONFIG_INPUT_MOUSE is not set | ||
693 | # CONFIG_INPUT_JOYSTICK is not set | ||
694 | # CONFIG_INPUT_TABLET is not set | ||
695 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
696 | # CONFIG_INPUT_MISC is not set | ||
697 | |||
698 | # | ||
699 | # Hardware I/O ports | ||
700 | # | ||
701 | # CONFIG_SERIO is not set | ||
702 | # CONFIG_GAMEPORT is not set | ||
703 | |||
704 | # | ||
705 | # Character devices | ||
706 | # | ||
707 | # CONFIG_VT is not set | ||
708 | CONFIG_DEVKMEM=y | ||
709 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
710 | # CONFIG_NOZOMI is not set | ||
711 | |||
712 | # | ||
713 | # Serial drivers | ||
714 | # | ||
715 | CONFIG_SERIAL_8250=y | ||
716 | CONFIG_SERIAL_8250_CONSOLE=y | ||
717 | CONFIG_SERIAL_8250_PCI=y | ||
718 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
719 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
720 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
721 | CONFIG_SERIAL_8250_SHARE_IRQ=y | ||
722 | |||
723 | # | ||
724 | # Non-8250 serial port support | ||
725 | # | ||
726 | # CONFIG_SERIAL_UARTLITE is not set | ||
727 | CONFIG_SERIAL_CORE=y | ||
728 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
729 | # CONFIG_SERIAL_JSM is not set | ||
730 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
731 | CONFIG_UNIX98_PTYS=y | ||
732 | CONFIG_LEGACY_PTYS=y | ||
733 | CONFIG_LEGACY_PTY_COUNT=256 | ||
734 | # CONFIG_IPMI_HANDLER is not set | ||
735 | # CONFIG_HW_RANDOM is not set | ||
736 | # CONFIG_NVRAM is not set | ||
737 | CONFIG_GEN_RTC=y | ||
738 | # CONFIG_GEN_RTC_X is not set | ||
739 | # CONFIG_R3964 is not set | ||
740 | # CONFIG_APPLICOM is not set | ||
741 | # CONFIG_RAW_DRIVER is not set | ||
742 | # CONFIG_TCG_TPM is not set | ||
743 | CONFIG_DEVPORT=y | ||
744 | # CONFIG_I2C is not set | ||
745 | # CONFIG_SPI is not set | ||
746 | # CONFIG_W1 is not set | ||
747 | # CONFIG_POWER_SUPPLY is not set | ||
748 | CONFIG_HWMON=y | ||
749 | # CONFIG_HWMON_VID is not set | ||
750 | # CONFIG_SENSORS_I5K_AMB is not set | ||
751 | # CONFIG_SENSORS_F71805F is not set | ||
752 | # CONFIG_SENSORS_F71882FG is not set | ||
753 | # CONFIG_SENSORS_IT87 is not set | ||
754 | # CONFIG_SENSORS_PC87360 is not set | ||
755 | # CONFIG_SENSORS_PC87427 is not set | ||
756 | # CONFIG_SENSORS_SIS5595 is not set | ||
757 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
758 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
759 | # CONFIG_SENSORS_VIA686A is not set | ||
760 | # CONFIG_SENSORS_VT1211 is not set | ||
761 | # CONFIG_SENSORS_VT8231 is not set | ||
762 | # CONFIG_SENSORS_W83627HF is not set | ||
763 | # CONFIG_SENSORS_W83627EHF is not set | ||
764 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
765 | # CONFIG_THERMAL is not set | ||
766 | # CONFIG_WATCHDOG is not set | ||
767 | |||
768 | # | ||
769 | # Sonics Silicon Backplane | ||
770 | # | ||
771 | CONFIG_SSB_POSSIBLE=y | ||
772 | # CONFIG_SSB is not set | ||
773 | |||
774 | # | ||
775 | # Multifunction device drivers | ||
776 | # | ||
777 | # CONFIG_MFD_SM501 is not set | ||
778 | # CONFIG_HTC_PASIC3 is not set | ||
779 | |||
780 | # | ||
781 | # Multimedia devices | ||
782 | # | ||
783 | |||
784 | # | ||
785 | # Multimedia core support | ||
786 | # | ||
787 | # CONFIG_VIDEO_DEV is not set | ||
788 | # CONFIG_DVB_CORE is not set | ||
789 | # CONFIG_VIDEO_MEDIA is not set | ||
790 | |||
791 | # | ||
792 | # Multimedia drivers | ||
793 | # | ||
794 | CONFIG_DAB=y | ||
795 | |||
796 | # | ||
797 | # Graphics support | ||
798 | # | ||
799 | # CONFIG_AGP is not set | ||
800 | # CONFIG_DRM is not set | ||
801 | # CONFIG_VGASTATE is not set | ||
802 | CONFIG_VIDEO_OUTPUT_CONTROL=y | ||
803 | # CONFIG_FB is not set | ||
804 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
805 | |||
806 | # | ||
807 | # Display device support | ||
808 | # | ||
809 | # CONFIG_DISPLAY_SUPPORT is not set | ||
810 | |||
811 | # | ||
812 | # Sound | ||
813 | # | ||
814 | # CONFIG_SOUND is not set | ||
815 | CONFIG_HID_SUPPORT=y | ||
816 | CONFIG_HID=y | ||
817 | # CONFIG_HID_DEBUG is not set | ||
818 | # CONFIG_HIDRAW is not set | ||
819 | CONFIG_USB_SUPPORT=y | ||
820 | CONFIG_USB_ARCH_HAS_HCD=y | ||
821 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
822 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
823 | # CONFIG_USB is not set | ||
824 | # CONFIG_USB_OTG_WHITELIST is not set | ||
825 | # CONFIG_USB_OTG_BLACKLIST_HUB is not set | ||
826 | |||
827 | # | ||
828 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
829 | # | ||
830 | # CONFIG_USB_GADGET is not set | ||
831 | # CONFIG_MMC is not set | ||
832 | # CONFIG_MEMSTICK is not set | ||
833 | # CONFIG_NEW_LEDS is not set | ||
834 | # CONFIG_ACCESSIBILITY is not set | ||
835 | # CONFIG_INFINIBAND is not set | ||
836 | # CONFIG_EDAC is not set | ||
837 | # CONFIG_RTC_CLASS is not set | ||
838 | # CONFIG_DMADEVICES is not set | ||
839 | # CONFIG_UIO is not set | ||
840 | |||
841 | # | ||
842 | # File systems | ||
843 | # | ||
844 | CONFIG_EXT2_FS=y | ||
845 | # CONFIG_EXT2_FS_XATTR is not set | ||
846 | # CONFIG_EXT2_FS_XIP is not set | ||
847 | CONFIG_EXT3_FS=y | ||
848 | CONFIG_EXT3_FS_XATTR=y | ||
849 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
850 | # CONFIG_EXT3_FS_SECURITY is not set | ||
851 | # CONFIG_EXT4DEV_FS is not set | ||
852 | CONFIG_JBD=y | ||
853 | CONFIG_FS_MBCACHE=y | ||
854 | # CONFIG_REISERFS_FS is not set | ||
855 | # CONFIG_JFS_FS is not set | ||
856 | # CONFIG_FS_POSIX_ACL is not set | ||
857 | # CONFIG_XFS_FS is not set | ||
858 | # CONFIG_OCFS2_FS is not set | ||
859 | CONFIG_DNOTIFY=y | ||
860 | CONFIG_INOTIFY=y | ||
861 | CONFIG_INOTIFY_USER=y | ||
862 | # CONFIG_QUOTA is not set | ||
863 | # CONFIG_AUTOFS_FS is not set | ||
864 | # CONFIG_AUTOFS4_FS is not set | ||
865 | # CONFIG_FUSE_FS is not set | ||
866 | |||
867 | # | ||
868 | # CD-ROM/DVD Filesystems | ||
869 | # | ||
870 | # CONFIG_ISO9660_FS is not set | ||
871 | # CONFIG_UDF_FS is not set | ||
872 | |||
873 | # | ||
874 | # DOS/FAT/NT Filesystems | ||
875 | # | ||
876 | # CONFIG_MSDOS_FS is not set | ||
877 | # CONFIG_VFAT_FS is not set | ||
878 | # CONFIG_NTFS_FS is not set | ||
879 | |||
880 | # | ||
881 | # Pseudo filesystems | ||
882 | # | ||
883 | CONFIG_PROC_FS=y | ||
884 | CONFIG_PROC_KCORE=y | ||
885 | CONFIG_PROC_SYSCTL=y | ||
886 | CONFIG_SYSFS=y | ||
887 | CONFIG_TMPFS=y | ||
888 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
889 | # CONFIG_HUGETLB_PAGE is not set | ||
890 | # CONFIG_CONFIGFS_FS is not set | ||
891 | |||
892 | # | ||
893 | # Miscellaneous filesystems | ||
894 | # | ||
895 | # CONFIG_ADFS_FS is not set | ||
896 | # CONFIG_AFFS_FS is not set | ||
897 | # CONFIG_HFS_FS is not set | ||
898 | # CONFIG_HFSPLUS_FS is not set | ||
899 | # CONFIG_BEFS_FS is not set | ||
900 | # CONFIG_BFS_FS is not set | ||
901 | # CONFIG_EFS_FS is not set | ||
902 | # CONFIG_JFFS2_FS is not set | ||
903 | # CONFIG_CRAMFS is not set | ||
904 | # CONFIG_VXFS_FS is not set | ||
905 | # CONFIG_MINIX_FS is not set | ||
906 | # CONFIG_HPFS_FS is not set | ||
907 | # CONFIG_QNX4FS_FS is not set | ||
908 | # CONFIG_ROMFS_FS is not set | ||
909 | # CONFIG_SYSV_FS is not set | ||
910 | # CONFIG_UFS_FS is not set | ||
911 | CONFIG_NETWORK_FILESYSTEMS=y | ||
912 | CONFIG_NFS_FS=y | ||
913 | # CONFIG_NFS_V3 is not set | ||
914 | # CONFIG_NFS_V4 is not set | ||
915 | # CONFIG_NFSD is not set | ||
916 | CONFIG_ROOT_NFS=y | ||
917 | CONFIG_LOCKD=y | ||
918 | CONFIG_NFS_COMMON=y | ||
919 | CONFIG_SUNRPC=y | ||
920 | # CONFIG_SUNRPC_BIND34 is not set | ||
921 | # CONFIG_RPCSEC_GSS_KRB5 is not set | ||
922 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
923 | # CONFIG_SMB_FS is not set | ||
924 | # CONFIG_CIFS is not set | ||
925 | # CONFIG_NCP_FS is not set | ||
926 | # CONFIG_CODA_FS is not set | ||
927 | # CONFIG_AFS_FS is not set | ||
928 | |||
929 | # | ||
930 | # Partition Types | ||
931 | # | ||
932 | CONFIG_PARTITION_ADVANCED=y | ||
933 | # CONFIG_ACORN_PARTITION is not set | ||
934 | # CONFIG_OSF_PARTITION is not set | ||
935 | # CONFIG_AMIGA_PARTITION is not set | ||
936 | # CONFIG_ATARI_PARTITION is not set | ||
937 | # CONFIG_MAC_PARTITION is not set | ||
938 | # CONFIG_MSDOS_PARTITION is not set | ||
939 | # CONFIG_LDM_PARTITION is not set | ||
940 | # CONFIG_SGI_PARTITION is not set | ||
941 | # CONFIG_ULTRIX_PARTITION is not set | ||
942 | # CONFIG_SUN_PARTITION is not set | ||
943 | # CONFIG_KARMA_PARTITION is not set | ||
944 | # CONFIG_EFI_PARTITION is not set | ||
945 | # CONFIG_SYSV68_PARTITION is not set | ||
946 | # CONFIG_NLS is not set | ||
947 | # CONFIG_DLM is not set | ||
948 | |||
949 | # | ||
950 | # Library routines | ||
951 | # | ||
952 | CONFIG_BITREVERSE=y | ||
953 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
954 | # CONFIG_CRC_CCITT is not set | ||
955 | # CONFIG_CRC16 is not set | ||
956 | # CONFIG_CRC_ITU_T is not set | ||
957 | CONFIG_CRC32=y | ||
958 | # CONFIG_CRC7 is not set | ||
959 | # CONFIG_LIBCRC32C is not set | ||
960 | CONFIG_PLIST=y | ||
961 | CONFIG_HAS_IOMEM=y | ||
962 | CONFIG_HAS_IOPORT=y | ||
963 | CONFIG_HAS_DMA=y | ||
964 | CONFIG_HAVE_LMB=y | ||
965 | |||
966 | # | ||
967 | # Kernel hacking | ||
968 | # | ||
969 | # CONFIG_PRINTK_TIME is not set | ||
970 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
971 | CONFIG_ENABLE_MUST_CHECK=y | ||
972 | CONFIG_FRAME_WARN=1024 | ||
973 | # CONFIG_MAGIC_SYSRQ is not set | ||
974 | # CONFIG_UNUSED_SYMBOLS is not set | ||
975 | # CONFIG_DEBUG_FS is not set | ||
976 | # CONFIG_HEADERS_CHECK is not set | ||
977 | CONFIG_DEBUG_KERNEL=y | ||
978 | # CONFIG_DEBUG_SHIRQ is not set | ||
979 | CONFIG_DETECT_SOFTLOCKUP=y | ||
980 | CONFIG_SCHED_DEBUG=y | ||
981 | # CONFIG_SCHEDSTATS is not set | ||
982 | # CONFIG_TIMER_STATS is not set | ||
983 | # CONFIG_DEBUG_OBJECTS is not set | ||
984 | # CONFIG_SLUB_DEBUG_ON is not set | ||
985 | # CONFIG_SLUB_STATS is not set | ||
986 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
987 | # CONFIG_RT_MUTEX_TESTER is not set | ||
988 | # CONFIG_DEBUG_SPINLOCK is not set | ||
989 | CONFIG_DEBUG_MUTEXES=y | ||
990 | # CONFIG_DEBUG_SPINLOCK_SLEEP is not set | ||
991 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
992 | # CONFIG_DEBUG_KOBJECT is not set | ||
993 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
994 | # CONFIG_DEBUG_INFO is not set | ||
995 | # CONFIG_DEBUG_VM is not set | ||
996 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
997 | # CONFIG_DEBUG_LIST is not set | ||
998 | # CONFIG_DEBUG_SG is not set | ||
999 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1000 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1001 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1002 | # CONFIG_FAULT_INJECTION is not set | ||
1003 | # CONFIG_SAMPLES is not set | ||
1004 | # CONFIG_DEBUG_STACKOVERFLOW is not set | ||
1005 | # CONFIG_DEBUG_STACK_USAGE is not set | ||
1006 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1007 | # CONFIG_DEBUGGER is not set | ||
1008 | # CONFIG_IRQSTACKS is not set | ||
1009 | # CONFIG_BDI_SWITCH is not set | ||
1010 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1011 | |||
1012 | # | ||
1013 | # Security options | ||
1014 | # | ||
1015 | # CONFIG_KEYS is not set | ||
1016 | # CONFIG_SECURITY is not set | ||
1017 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1018 | CONFIG_CRYPTO=y | ||
1019 | |||
1020 | # | ||
1021 | # Crypto core or helper | ||
1022 | # | ||
1023 | # CONFIG_CRYPTO_MANAGER is not set | ||
1024 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1025 | # CONFIG_CRYPTO_NULL is not set | ||
1026 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1027 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1028 | # CONFIG_CRYPTO_TEST is not set | ||
1029 | |||
1030 | # | ||
1031 | # Authenticated Encryption with Associated Data | ||
1032 | # | ||
1033 | # CONFIG_CRYPTO_CCM is not set | ||
1034 | # CONFIG_CRYPTO_GCM is not set | ||
1035 | # CONFIG_CRYPTO_SEQIV is not set | ||
1036 | |||
1037 | # | ||
1038 | # Block modes | ||
1039 | # | ||
1040 | # CONFIG_CRYPTO_CBC is not set | ||
1041 | # CONFIG_CRYPTO_CTR is not set | ||
1042 | # CONFIG_CRYPTO_CTS is not set | ||
1043 | # CONFIG_CRYPTO_ECB is not set | ||
1044 | # CONFIG_CRYPTO_LRW is not set | ||
1045 | # CONFIG_CRYPTO_PCBC is not set | ||
1046 | # CONFIG_CRYPTO_XTS is not set | ||
1047 | |||
1048 | # | ||
1049 | # Hash modes | ||
1050 | # | ||
1051 | # CONFIG_CRYPTO_HMAC is not set | ||
1052 | # CONFIG_CRYPTO_XCBC is not set | ||
1053 | |||
1054 | # | ||
1055 | # Digest | ||
1056 | # | ||
1057 | # CONFIG_CRYPTO_CRC32C is not set | ||
1058 | # CONFIG_CRYPTO_MD4 is not set | ||
1059 | # CONFIG_CRYPTO_MD5 is not set | ||
1060 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1061 | # CONFIG_CRYPTO_SHA1 is not set | ||
1062 | # CONFIG_CRYPTO_SHA256 is not set | ||
1063 | # CONFIG_CRYPTO_SHA512 is not set | ||
1064 | # CONFIG_CRYPTO_TGR192 is not set | ||
1065 | # CONFIG_CRYPTO_WP512 is not set | ||
1066 | |||
1067 | # | ||
1068 | # Ciphers | ||
1069 | # | ||
1070 | # CONFIG_CRYPTO_AES is not set | ||
1071 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1072 | # CONFIG_CRYPTO_ARC4 is not set | ||
1073 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1074 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1075 | # CONFIG_CRYPTO_CAST5 is not set | ||
1076 | # CONFIG_CRYPTO_CAST6 is not set | ||
1077 | # CONFIG_CRYPTO_DES is not set | ||
1078 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1079 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1080 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1081 | # CONFIG_CRYPTO_SEED is not set | ||
1082 | # CONFIG_CRYPTO_SERPENT is not set | ||
1083 | # CONFIG_CRYPTO_TEA is not set | ||
1084 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1085 | |||
1086 | # | ||
1087 | # Compression | ||
1088 | # | ||
1089 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1090 | # CONFIG_CRYPTO_LZO is not set | ||
1091 | CONFIG_CRYPTO_HW=y | ||
1092 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1093 | # CONFIG_PPC_CLOCK is not set | ||
1094 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/configs/asp8347_defconfig b/arch/powerpc/configs/asp8347_defconfig new file mode 100644 index 000000000000..60bb4d106c87 --- /dev/null +++ b/arch/powerpc/configs/asp8347_defconfig | |||
@@ -0,0 +1,1214 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.25-rc6 | ||
4 | # Tue May 6 02:21:00 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | CONFIG_FSL_EMB_PERFMON=y | ||
19 | CONFIG_PPC_STD_MMU=y | ||
20 | CONFIG_PPC_STD_MMU_32=y | ||
21 | # CONFIG_PPC_MM_SLICES is not set | ||
22 | # CONFIG_SMP is not set | ||
23 | CONFIG_PPC32=y | ||
24 | CONFIG_WORD_SIZE=32 | ||
25 | CONFIG_PPC_MERGE=y | ||
26 | CONFIG_MMU=y | ||
27 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
28 | CONFIG_GENERIC_TIME=y | ||
29 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
30 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
31 | CONFIG_GENERIC_HARDIRQS=y | ||
32 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
33 | CONFIG_IRQ_PER_CPU=y | ||
34 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
35 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
36 | CONFIG_GENERIC_HWEIGHT=y | ||
37 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
38 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
39 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
40 | CONFIG_PPC=y | ||
41 | CONFIG_EARLY_PRINTK=y | ||
42 | CONFIG_GENERIC_NVRAM=y | ||
43 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
44 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
45 | CONFIG_PPC_OF=y | ||
46 | CONFIG_OF=y | ||
47 | CONFIG_PPC_UDBG_16550=y | ||
48 | # CONFIG_GENERIC_TBSYNC is not set | ||
49 | CONFIG_AUDIT_ARCH=y | ||
50 | CONFIG_GENERIC_BUG=y | ||
51 | # CONFIG_DEFAULT_UIMAGE is not set | ||
52 | CONFIG_REDBOOT=y | ||
53 | # CONFIG_PPC_DCR_NATIVE is not set | ||
54 | # CONFIG_PPC_DCR_MMIO is not set | ||
55 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
56 | |||
57 | # | ||
58 | # General setup | ||
59 | # | ||
60 | CONFIG_EXPERIMENTAL=y | ||
61 | CONFIG_BROKEN_ON_SMP=y | ||
62 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
63 | CONFIG_LOCALVERSION="" | ||
64 | CONFIG_LOCALVERSION_AUTO=y | ||
65 | CONFIG_SWAP=y | ||
66 | CONFIG_SYSVIPC=y | ||
67 | CONFIG_SYSVIPC_SYSCTL=y | ||
68 | # CONFIG_POSIX_MQUEUE is not set | ||
69 | # CONFIG_BSD_PROCESS_ACCT is not set | ||
70 | # CONFIG_TASKSTATS is not set | ||
71 | # CONFIG_AUDIT is not set | ||
72 | # CONFIG_IKCONFIG is not set | ||
73 | CONFIG_LOG_BUF_SHIFT=14 | ||
74 | # CONFIG_CGROUPS is not set | ||
75 | CONFIG_GROUP_SCHED=y | ||
76 | # CONFIG_FAIR_GROUP_SCHED is not set | ||
77 | # CONFIG_RT_GROUP_SCHED is not set | ||
78 | CONFIG_USER_SCHED=y | ||
79 | # CONFIG_CGROUP_SCHED is not set | ||
80 | CONFIG_SYSFS_DEPRECATED=y | ||
81 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
82 | # CONFIG_RELAY is not set | ||
83 | # CONFIG_NAMESPACES is not set | ||
84 | CONFIG_BLK_DEV_INITRD=y | ||
85 | CONFIG_INITRAMFS_SOURCE="" | ||
86 | # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set | ||
87 | CONFIG_SYSCTL=y | ||
88 | CONFIG_EMBEDDED=y | ||
89 | CONFIG_SYSCTL_SYSCALL=y | ||
90 | # CONFIG_KALLSYMS is not set | ||
91 | CONFIG_HOTPLUG=y | ||
92 | CONFIG_PRINTK=y | ||
93 | CONFIG_BUG=y | ||
94 | CONFIG_ELF_CORE=y | ||
95 | CONFIG_COMPAT_BRK=y | ||
96 | CONFIG_BASE_FULL=y | ||
97 | CONFIG_FUTEX=y | ||
98 | CONFIG_ANON_INODES=y | ||
99 | # CONFIG_EPOLL is not set | ||
100 | CONFIG_SIGNALFD=y | ||
101 | CONFIG_TIMERFD=y | ||
102 | CONFIG_EVENTFD=y | ||
103 | CONFIG_SHMEM=y | ||
104 | CONFIG_VM_EVENT_COUNTERS=y | ||
105 | CONFIG_SLUB_DEBUG=y | ||
106 | # CONFIG_SLAB is not set | ||
107 | CONFIG_SLUB=y | ||
108 | # CONFIG_SLOB is not set | ||
109 | # CONFIG_PROFILING is not set | ||
110 | # CONFIG_MARKERS is not set | ||
111 | CONFIG_HAVE_OPROFILE=y | ||
112 | CONFIG_HAVE_KPROBES=y | ||
113 | CONFIG_HAVE_KRETPROBES=y | ||
114 | CONFIG_PROC_PAGE_MONITOR=y | ||
115 | CONFIG_SLABINFO=y | ||
116 | CONFIG_RT_MUTEXES=y | ||
117 | # CONFIG_TINY_SHMEM is not set | ||
118 | CONFIG_BASE_SMALL=0 | ||
119 | CONFIG_MODULES=y | ||
120 | CONFIG_MODULE_UNLOAD=y | ||
121 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
122 | # CONFIG_MODVERSIONS is not set | ||
123 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
124 | # CONFIG_KMOD is not set | ||
125 | CONFIG_BLOCK=y | ||
126 | # CONFIG_LBD is not set | ||
127 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
128 | # CONFIG_LSF is not set | ||
129 | # CONFIG_BLK_DEV_BSG is not set | ||
130 | |||
131 | # | ||
132 | # IO Schedulers | ||
133 | # | ||
134 | CONFIG_IOSCHED_NOOP=y | ||
135 | CONFIG_IOSCHED_AS=y | ||
136 | CONFIG_IOSCHED_DEADLINE=y | ||
137 | CONFIG_IOSCHED_CFQ=y | ||
138 | CONFIG_DEFAULT_AS=y | ||
139 | # CONFIG_DEFAULT_DEADLINE is not set | ||
140 | # CONFIG_DEFAULT_CFQ is not set | ||
141 | # CONFIG_DEFAULT_NOOP is not set | ||
142 | CONFIG_DEFAULT_IOSCHED="anticipatory" | ||
143 | CONFIG_CLASSIC_RCU=y | ||
144 | |||
145 | # | ||
146 | # Platform support | ||
147 | # | ||
148 | # CONFIG_PPC_MULTIPLATFORM is not set | ||
149 | # CONFIG_PPC_82xx is not set | ||
150 | CONFIG_PPC_83xx=y | ||
151 | # CONFIG_PPC_86xx is not set | ||
152 | # CONFIG_PPC_MPC512x is not set | ||
153 | # CONFIG_PPC_MPC5121 is not set | ||
154 | # CONFIG_PPC_CELL is not set | ||
155 | # CONFIG_PPC_CELL_NATIVE is not set | ||
156 | # CONFIG_PQ2ADS is not set | ||
157 | CONFIG_MPC83xx=y | ||
158 | # CONFIG_MPC831x_RDB is not set | ||
159 | # CONFIG_MPC832x_MDS is not set | ||
160 | # CONFIG_MPC832x_RDB is not set | ||
161 | # CONFIG_MPC834x_MDS is not set | ||
162 | # CONFIG_MPC834x_ITX is not set | ||
163 | # CONFIG_MPC836x_MDS is not set | ||
164 | # CONFIG_MPC837x_MDS is not set | ||
165 | # CONFIG_MPC837x_RDB is not set | ||
166 | # CONFIG_SBC834x is not set | ||
167 | CONFIG_ASP834x=y | ||
168 | CONFIG_PPC_MPC834x=y | ||
169 | CONFIG_IPIC=y | ||
170 | # CONFIG_MPIC is not set | ||
171 | # CONFIG_MPIC_WEIRD is not set | ||
172 | # CONFIG_PPC_I8259 is not set | ||
173 | # CONFIG_PPC_RTAS is not set | ||
174 | # CONFIG_MMIO_NVRAM is not set | ||
175 | # CONFIG_PPC_MPC106 is not set | ||
176 | # CONFIG_PPC_970_NAP is not set | ||
177 | # CONFIG_PPC_INDIRECT_IO is not set | ||
178 | # CONFIG_GENERIC_IOMAP is not set | ||
179 | # CONFIG_CPU_FREQ is not set | ||
180 | # CONFIG_FSL_ULI1575 is not set | ||
181 | |||
182 | # | ||
183 | # Kernel options | ||
184 | # | ||
185 | # CONFIG_HIGHMEM is not set | ||
186 | CONFIG_TICK_ONESHOT=y | ||
187 | CONFIG_NO_HZ=y | ||
188 | CONFIG_HIGH_RES_TIMERS=y | ||
189 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
190 | # CONFIG_HZ_100 is not set | ||
191 | CONFIG_HZ_250=y | ||
192 | # CONFIG_HZ_300 is not set | ||
193 | # CONFIG_HZ_1000 is not set | ||
194 | CONFIG_HZ=250 | ||
195 | # CONFIG_SCHED_HRTICK is not set | ||
196 | CONFIG_PREEMPT_NONE=y | ||
197 | # CONFIG_PREEMPT_VOLUNTARY is not set | ||
198 | # CONFIG_PREEMPT is not set | ||
199 | CONFIG_BINFMT_ELF=y | ||
200 | # CONFIG_BINFMT_MISC is not set | ||
201 | # CONFIG_IOMMU_HELPER is not set | ||
202 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
203 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
204 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
205 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
206 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
207 | CONFIG_SELECT_MEMORY_MODEL=y | ||
208 | CONFIG_FLATMEM_MANUAL=y | ||
209 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
210 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
211 | CONFIG_FLATMEM=y | ||
212 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
213 | # CONFIG_SPARSEMEM_STATIC is not set | ||
214 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
215 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
216 | # CONFIG_RESOURCES_64BIT is not set | ||
217 | CONFIG_ZONE_DMA_FLAG=1 | ||
218 | CONFIG_BOUNCE=y | ||
219 | CONFIG_VIRT_TO_BUS=y | ||
220 | CONFIG_PROC_DEVICETREE=y | ||
221 | # CONFIG_CMDLINE_BOOL is not set | ||
222 | # CONFIG_PM is not set | ||
223 | CONFIG_SECCOMP=y | ||
224 | CONFIG_ISA_DMA_API=y | ||
225 | |||
226 | # | ||
227 | # Bus options | ||
228 | # | ||
229 | CONFIG_ZONE_DMA=y | ||
230 | CONFIG_GENERIC_ISA_DMA=y | ||
231 | CONFIG_PPC_INDIRECT_PCI=y | ||
232 | CONFIG_FSL_SOC=y | ||
233 | CONFIG_PCI=y | ||
234 | CONFIG_PCI_DOMAINS=y | ||
235 | CONFIG_PCI_SYSCALL=y | ||
236 | # CONFIG_PCIEPORTBUS is not set | ||
237 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
238 | # CONFIG_PCI_MSI is not set | ||
239 | CONFIG_PCI_LEGACY=y | ||
240 | # CONFIG_PCCARD is not set | ||
241 | # CONFIG_HOTPLUG_PCI is not set | ||
242 | |||
243 | # | ||
244 | # Advanced setup | ||
245 | # | ||
246 | # CONFIG_ADVANCED_OPTIONS is not set | ||
247 | |||
248 | # | ||
249 | # Default settings for advanced configuration options are used | ||
250 | # | ||
251 | CONFIG_HIGHMEM_START=0xfe000000 | ||
252 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
253 | CONFIG_KERNEL_START=0xc0000000 | ||
254 | CONFIG_TASK_SIZE=0xc0000000 | ||
255 | CONFIG_BOOT_LOAD=0x00800000 | ||
256 | |||
257 | # | ||
258 | # Networking | ||
259 | # | ||
260 | CONFIG_NET=y | ||
261 | |||
262 | # | ||
263 | # Networking options | ||
264 | # | ||
265 | CONFIG_PACKET=y | ||
266 | # CONFIG_PACKET_MMAP is not set | ||
267 | CONFIG_UNIX=y | ||
268 | CONFIG_XFRM=y | ||
269 | CONFIG_XFRM_USER=m | ||
270 | # CONFIG_XFRM_SUB_POLICY is not set | ||
271 | # CONFIG_XFRM_MIGRATE is not set | ||
272 | # CONFIG_XFRM_STATISTICS is not set | ||
273 | # CONFIG_NET_KEY is not set | ||
274 | CONFIG_INET=y | ||
275 | CONFIG_IP_MULTICAST=y | ||
276 | # CONFIG_IP_ADVANCED_ROUTER is not set | ||
277 | CONFIG_IP_FIB_HASH=y | ||
278 | CONFIG_IP_PNP=y | ||
279 | CONFIG_IP_PNP_DHCP=y | ||
280 | CONFIG_IP_PNP_BOOTP=y | ||
281 | # CONFIG_IP_PNP_RARP is not set | ||
282 | # CONFIG_NET_IPIP is not set | ||
283 | # CONFIG_NET_IPGRE is not set | ||
284 | # CONFIG_IP_MROUTE is not set | ||
285 | # CONFIG_ARPD is not set | ||
286 | CONFIG_SYN_COOKIES=y | ||
287 | # CONFIG_INET_AH is not set | ||
288 | # CONFIG_INET_ESP is not set | ||
289 | # CONFIG_INET_IPCOMP is not set | ||
290 | # CONFIG_INET_XFRM_TUNNEL is not set | ||
291 | # CONFIG_INET_TUNNEL is not set | ||
292 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
293 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
294 | CONFIG_INET_XFRM_MODE_BEET=y | ||
295 | # CONFIG_INET_LRO is not set | ||
296 | CONFIG_INET_DIAG=y | ||
297 | CONFIG_INET_TCP_DIAG=y | ||
298 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
299 | CONFIG_TCP_CONG_CUBIC=y | ||
300 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
301 | # CONFIG_TCP_MD5SIG is not set | ||
302 | # CONFIG_IPV6 is not set | ||
303 | # CONFIG_INET6_XFRM_TUNNEL is not set | ||
304 | # CONFIG_INET6_TUNNEL is not set | ||
305 | # CONFIG_NETWORK_SECMARK is not set | ||
306 | # CONFIG_NETFILTER is not set | ||
307 | # CONFIG_IP_DCCP is not set | ||
308 | # CONFIG_IP_SCTP is not set | ||
309 | # CONFIG_TIPC is not set | ||
310 | # CONFIG_ATM is not set | ||
311 | # CONFIG_BRIDGE is not set | ||
312 | # CONFIG_VLAN_8021Q is not set | ||
313 | # CONFIG_DECNET is not set | ||
314 | # CONFIG_LLC2 is not set | ||
315 | # CONFIG_IPX is not set | ||
316 | # CONFIG_ATALK is not set | ||
317 | # CONFIG_X25 is not set | ||
318 | # CONFIG_LAPB is not set | ||
319 | # CONFIG_ECONET is not set | ||
320 | # CONFIG_WAN_ROUTER is not set | ||
321 | # CONFIG_NET_SCHED is not set | ||
322 | |||
323 | # | ||
324 | # Network testing | ||
325 | # | ||
326 | # CONFIG_NET_PKTGEN is not set | ||
327 | # CONFIG_HAMRADIO is not set | ||
328 | # CONFIG_CAN is not set | ||
329 | # CONFIG_IRDA is not set | ||
330 | # CONFIG_BT is not set | ||
331 | # CONFIG_AF_RXRPC is not set | ||
332 | |||
333 | # | ||
334 | # Wireless | ||
335 | # | ||
336 | # CONFIG_CFG80211 is not set | ||
337 | # CONFIG_WIRELESS_EXT is not set | ||
338 | # CONFIG_MAC80211 is not set | ||
339 | # CONFIG_IEEE80211 is not set | ||
340 | # CONFIG_RFKILL is not set | ||
341 | # CONFIG_NET_9P is not set | ||
342 | |||
343 | # | ||
344 | # Device Drivers | ||
345 | # | ||
346 | |||
347 | # | ||
348 | # Generic Driver Options | ||
349 | # | ||
350 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
351 | CONFIG_STANDALONE=y | ||
352 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
353 | # CONFIG_FW_LOADER is not set | ||
354 | # CONFIG_SYS_HYPERVISOR is not set | ||
355 | # CONFIG_CONNECTOR is not set | ||
356 | CONFIG_MTD=y | ||
357 | # CONFIG_MTD_DEBUG is not set | ||
358 | # CONFIG_MTD_CONCAT is not set | ||
359 | CONFIG_MTD_PARTITIONS=y | ||
360 | CONFIG_MTD_REDBOOT_PARTS=y | ||
361 | CONFIG_MTD_REDBOOT_DIRECTORY_BLOCK=-1 | ||
362 | CONFIG_MTD_REDBOOT_PARTS_UNALLOCATED=y | ||
363 | # CONFIG_MTD_REDBOOT_PARTS_READONLY is not set | ||
364 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
365 | CONFIG_MTD_OF_PARTS=y | ||
366 | |||
367 | # | ||
368 | # User Modules And Translation Layers | ||
369 | # | ||
370 | CONFIG_MTD_CHAR=y | ||
371 | CONFIG_MTD_BLKDEVS=y | ||
372 | CONFIG_MTD_BLOCK=y | ||
373 | # CONFIG_FTL is not set | ||
374 | # CONFIG_NFTL is not set | ||
375 | # CONFIG_INFTL is not set | ||
376 | # CONFIG_RFD_FTL is not set | ||
377 | # CONFIG_SSFDC is not set | ||
378 | # CONFIG_MTD_OOPS is not set | ||
379 | |||
380 | # | ||
381 | # RAM/ROM/Flash chip drivers | ||
382 | # | ||
383 | CONFIG_MTD_CFI=y | ||
384 | # CONFIG_MTD_JEDECPROBE is not set | ||
385 | CONFIG_MTD_GEN_PROBE=y | ||
386 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
387 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
388 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
389 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
390 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
391 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
392 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
393 | CONFIG_MTD_CFI_I1=y | ||
394 | CONFIG_MTD_CFI_I2=y | ||
395 | # CONFIG_MTD_CFI_I4 is not set | ||
396 | # CONFIG_MTD_CFI_I8 is not set | ||
397 | CONFIG_MTD_CFI_INTELEXT=y | ||
398 | CONFIG_MTD_CFI_AMDSTD=y | ||
399 | # CONFIG_MTD_CFI_STAA is not set | ||
400 | CONFIG_MTD_CFI_UTIL=y | ||
401 | # CONFIG_MTD_RAM is not set | ||
402 | # CONFIG_MTD_ROM is not set | ||
403 | # CONFIG_MTD_ABSENT is not set | ||
404 | |||
405 | # | ||
406 | # Mapping drivers for chip access | ||
407 | # | ||
408 | # CONFIG_MTD_COMPLEX_MAPPINGS is not set | ||
409 | # CONFIG_MTD_PHYSMAP is not set | ||
410 | CONFIG_MTD_PHYSMAP_OF=y | ||
411 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
412 | # CONFIG_MTD_PLATRAM is not set | ||
413 | |||
414 | # | ||
415 | # Self-contained MTD device drivers | ||
416 | # | ||
417 | # CONFIG_MTD_PMC551 is not set | ||
418 | # CONFIG_MTD_SLRAM is not set | ||
419 | # CONFIG_MTD_PHRAM is not set | ||
420 | # CONFIG_MTD_MTDRAM is not set | ||
421 | # CONFIG_MTD_BLOCK2MTD is not set | ||
422 | |||
423 | # | ||
424 | # Disk-On-Chip Device Drivers | ||
425 | # | ||
426 | # CONFIG_MTD_DOC2000 is not set | ||
427 | # CONFIG_MTD_DOC2001 is not set | ||
428 | # CONFIG_MTD_DOC2001PLUS is not set | ||
429 | # CONFIG_MTD_NAND is not set | ||
430 | # CONFIG_MTD_ONENAND is not set | ||
431 | |||
432 | # | ||
433 | # UBI - Unsorted block images | ||
434 | # | ||
435 | # CONFIG_MTD_UBI is not set | ||
436 | CONFIG_OF_DEVICE=y | ||
437 | # CONFIG_PARPORT is not set | ||
438 | CONFIG_BLK_DEV=y | ||
439 | # CONFIG_BLK_DEV_FD is not set | ||
440 | # CONFIG_BLK_CPQ_DA is not set | ||
441 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
442 | # CONFIG_BLK_DEV_DAC960 is not set | ||
443 | # CONFIG_BLK_DEV_UMEM is not set | ||
444 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
445 | CONFIG_BLK_DEV_LOOP=y | ||
446 | # CONFIG_BLK_DEV_CRYPTOLOOP is not set | ||
447 | # CONFIG_BLK_DEV_NBD is not set | ||
448 | # CONFIG_BLK_DEV_SX8 is not set | ||
449 | # CONFIG_BLK_DEV_UB is not set | ||
450 | CONFIG_BLK_DEV_RAM=y | ||
451 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
452 | CONFIG_BLK_DEV_RAM_SIZE=32768 | ||
453 | # CONFIG_BLK_DEV_XIP is not set | ||
454 | # CONFIG_CDROM_PKTCDVD is not set | ||
455 | # CONFIG_ATA_OVER_ETH is not set | ||
456 | CONFIG_MISC_DEVICES=y | ||
457 | # CONFIG_PHANTOM is not set | ||
458 | # CONFIG_EEPROM_93CX6 is not set | ||
459 | # CONFIG_SGI_IOC4 is not set | ||
460 | # CONFIG_TIFM_CORE is not set | ||
461 | # CONFIG_ENCLOSURE_SERVICES is not set | ||
462 | CONFIG_HAVE_IDE=y | ||
463 | # CONFIG_IDE is not set | ||
464 | |||
465 | # | ||
466 | # SCSI device support | ||
467 | # | ||
468 | # CONFIG_RAID_ATTRS is not set | ||
469 | # CONFIG_SCSI is not set | ||
470 | # CONFIG_SCSI_DMA is not set | ||
471 | # CONFIG_SCSI_NETLINK is not set | ||
472 | # CONFIG_ATA is not set | ||
473 | # CONFIG_MD is not set | ||
474 | # CONFIG_FUSION is not set | ||
475 | |||
476 | # | ||
477 | # IEEE 1394 (FireWire) support | ||
478 | # | ||
479 | # CONFIG_FIREWIRE is not set | ||
480 | # CONFIG_IEEE1394 is not set | ||
481 | # CONFIG_I2O is not set | ||
482 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
483 | CONFIG_NETDEVICES=y | ||
484 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
485 | # CONFIG_DUMMY is not set | ||
486 | # CONFIG_BONDING is not set | ||
487 | # CONFIG_MACVLAN is not set | ||
488 | # CONFIG_EQUALIZER is not set | ||
489 | # CONFIG_TUN is not set | ||
490 | # CONFIG_VETH is not set | ||
491 | # CONFIG_ARCNET is not set | ||
492 | CONFIG_PHYLIB=y | ||
493 | |||
494 | # | ||
495 | # MII PHY device drivers | ||
496 | # | ||
497 | # CONFIG_MARVELL_PHY is not set | ||
498 | # CONFIG_DAVICOM_PHY is not set | ||
499 | # CONFIG_QSEMI_PHY is not set | ||
500 | # CONFIG_LXT_PHY is not set | ||
501 | # CONFIG_CICADA_PHY is not set | ||
502 | # CONFIG_VITESSE_PHY is not set | ||
503 | # CONFIG_SMSC_PHY is not set | ||
504 | # CONFIG_BROADCOM_PHY is not set | ||
505 | # CONFIG_ICPLUS_PHY is not set | ||
506 | # CONFIG_REALTEK_PHY is not set | ||
507 | # CONFIG_FIXED_PHY is not set | ||
508 | # CONFIG_MDIO_BITBANG is not set | ||
509 | CONFIG_NET_ETHERNET=y | ||
510 | CONFIG_MII=y | ||
511 | # CONFIG_HAPPYMEAL is not set | ||
512 | # CONFIG_SUNGEM is not set | ||
513 | # CONFIG_CASSINI is not set | ||
514 | # CONFIG_NET_VENDOR_3COM is not set | ||
515 | # CONFIG_NET_TULIP is not set | ||
516 | # CONFIG_HP100 is not set | ||
517 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
518 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
519 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
520 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
521 | # CONFIG_NET_PCI is not set | ||
522 | # CONFIG_B44 is not set | ||
523 | CONFIG_NETDEV_1000=y | ||
524 | # CONFIG_ACENIC is not set | ||
525 | # CONFIG_DL2K is not set | ||
526 | # CONFIG_E1000 is not set | ||
527 | # CONFIG_E1000E is not set | ||
528 | # CONFIG_E1000E_ENABLED is not set | ||
529 | # CONFIG_IP1000 is not set | ||
530 | # CONFIG_IGB is not set | ||
531 | # CONFIG_NS83820 is not set | ||
532 | # CONFIG_HAMACHI is not set | ||
533 | # CONFIG_YELLOWFIN is not set | ||
534 | # CONFIG_R8169 is not set | ||
535 | # CONFIG_SIS190 is not set | ||
536 | # CONFIG_SKGE is not set | ||
537 | # CONFIG_SKY2 is not set | ||
538 | # CONFIG_SK98LIN is not set | ||
539 | # CONFIG_VIA_VELOCITY is not set | ||
540 | # CONFIG_TIGON3 is not set | ||
541 | # CONFIG_BNX2 is not set | ||
542 | CONFIG_GIANFAR=y | ||
543 | # CONFIG_GFAR_NAPI is not set | ||
544 | # CONFIG_QLA3XXX is not set | ||
545 | # CONFIG_ATL1 is not set | ||
546 | # CONFIG_NETDEV_10000 is not set | ||
547 | # CONFIG_TR is not set | ||
548 | |||
549 | # | ||
550 | # Wireless LAN | ||
551 | # | ||
552 | # CONFIG_WLAN_PRE80211 is not set | ||
553 | # CONFIG_WLAN_80211 is not set | ||
554 | |||
555 | # | ||
556 | # USB Network Adapters | ||
557 | # | ||
558 | # CONFIG_USB_CATC is not set | ||
559 | # CONFIG_USB_KAWETH is not set | ||
560 | # CONFIG_USB_PEGASUS is not set | ||
561 | # CONFIG_USB_RTL8150 is not set | ||
562 | # CONFIG_USB_USBNET is not set | ||
563 | # CONFIG_WAN is not set | ||
564 | # CONFIG_FDDI is not set | ||
565 | # CONFIG_HIPPI is not set | ||
566 | # CONFIG_PPP is not set | ||
567 | # CONFIG_SLIP is not set | ||
568 | # CONFIG_NETCONSOLE is not set | ||
569 | # CONFIG_NETPOLL is not set | ||
570 | # CONFIG_NET_POLL_CONTROLLER is not set | ||
571 | # CONFIG_ISDN is not set | ||
572 | # CONFIG_PHONE is not set | ||
573 | |||
574 | # | ||
575 | # Input device support | ||
576 | # | ||
577 | CONFIG_INPUT=y | ||
578 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
579 | # CONFIG_INPUT_POLLDEV is not set | ||
580 | |||
581 | # | ||
582 | # Userland interfaces | ||
583 | # | ||
584 | # CONFIG_INPUT_MOUSEDEV is not set | ||
585 | # CONFIG_INPUT_JOYDEV is not set | ||
586 | # CONFIG_INPUT_EVDEV is not set | ||
587 | # CONFIG_INPUT_EVBUG is not set | ||
588 | |||
589 | # | ||
590 | # Input Device Drivers | ||
591 | # | ||
592 | # CONFIG_INPUT_KEYBOARD is not set | ||
593 | # CONFIG_INPUT_MOUSE is not set | ||
594 | # CONFIG_INPUT_JOYSTICK is not set | ||
595 | # CONFIG_INPUT_TABLET is not set | ||
596 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
597 | # CONFIG_INPUT_MISC is not set | ||
598 | |||
599 | # | ||
600 | # Hardware I/O ports | ||
601 | # | ||
602 | # CONFIG_SERIO is not set | ||
603 | # CONFIG_GAMEPORT is not set | ||
604 | |||
605 | # | ||
606 | # Character devices | ||
607 | # | ||
608 | # CONFIG_VT is not set | ||
609 | # CONFIG_SERIAL_NONSTANDARD is not set | ||
610 | # CONFIG_NOZOMI is not set | ||
611 | |||
612 | # | ||
613 | # Serial drivers | ||
614 | # | ||
615 | CONFIG_SERIAL_8250=y | ||
616 | CONFIG_SERIAL_8250_CONSOLE=y | ||
617 | CONFIG_SERIAL_8250_PCI=y | ||
618 | CONFIG_SERIAL_8250_NR_UARTS=4 | ||
619 | CONFIG_SERIAL_8250_RUNTIME_UARTS=4 | ||
620 | # CONFIG_SERIAL_8250_EXTENDED is not set | ||
621 | |||
622 | # | ||
623 | # Non-8250 serial port support | ||
624 | # | ||
625 | # CONFIG_SERIAL_UARTLITE is not set | ||
626 | CONFIG_SERIAL_CORE=y | ||
627 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
628 | # CONFIG_SERIAL_JSM is not set | ||
629 | # CONFIG_SERIAL_OF_PLATFORM is not set | ||
630 | CONFIG_UNIX98_PTYS=y | ||
631 | CONFIG_LEGACY_PTYS=y | ||
632 | CONFIG_LEGACY_PTY_COUNT=256 | ||
633 | # CONFIG_IPMI_HANDLER is not set | ||
634 | # CONFIG_HW_RANDOM is not set | ||
635 | # CONFIG_NVRAM is not set | ||
636 | CONFIG_GEN_RTC=y | ||
637 | # CONFIG_GEN_RTC_X is not set | ||
638 | # CONFIG_R3964 is not set | ||
639 | # CONFIG_APPLICOM is not set | ||
640 | # CONFIG_RAW_DRIVER is not set | ||
641 | # CONFIG_TCG_TPM is not set | ||
642 | CONFIG_DEVPORT=y | ||
643 | CONFIG_I2C=y | ||
644 | CONFIG_I2C_BOARDINFO=y | ||
645 | CONFIG_I2C_CHARDEV=y | ||
646 | |||
647 | # | ||
648 | # I2C Algorithms | ||
649 | # | ||
650 | # CONFIG_I2C_ALGOBIT is not set | ||
651 | # CONFIG_I2C_ALGOPCF is not set | ||
652 | # CONFIG_I2C_ALGOPCA is not set | ||
653 | |||
654 | # | ||
655 | # I2C Hardware Bus support | ||
656 | # | ||
657 | # CONFIG_I2C_ALI1535 is not set | ||
658 | # CONFIG_I2C_ALI1563 is not set | ||
659 | # CONFIG_I2C_ALI15X3 is not set | ||
660 | # CONFIG_I2C_AMD756 is not set | ||
661 | # CONFIG_I2C_AMD8111 is not set | ||
662 | # CONFIG_I2C_I801 is not set | ||
663 | # CONFIG_I2C_I810 is not set | ||
664 | # CONFIG_I2C_PIIX4 is not set | ||
665 | CONFIG_I2C_MPC=y | ||
666 | # CONFIG_I2C_NFORCE2 is not set | ||
667 | # CONFIG_I2C_OCORES is not set | ||
668 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
669 | # CONFIG_I2C_PROSAVAGE is not set | ||
670 | # CONFIG_I2C_SAVAGE4 is not set | ||
671 | # CONFIG_I2C_SIMTEC is not set | ||
672 | # CONFIG_I2C_SIS5595 is not set | ||
673 | # CONFIG_I2C_SIS630 is not set | ||
674 | # CONFIG_I2C_SIS96X is not set | ||
675 | # CONFIG_I2C_TAOS_EVM is not set | ||
676 | # CONFIG_I2C_STUB is not set | ||
677 | # CONFIG_I2C_TINY_USB is not set | ||
678 | # CONFIG_I2C_VIA is not set | ||
679 | # CONFIG_I2C_VIAPRO is not set | ||
680 | # CONFIG_I2C_VOODOO3 is not set | ||
681 | |||
682 | # | ||
683 | # Miscellaneous I2C Chip support | ||
684 | # | ||
685 | # CONFIG_DS1682 is not set | ||
686 | # CONFIG_SENSORS_EEPROM is not set | ||
687 | # CONFIG_SENSORS_PCF8574 is not set | ||
688 | # CONFIG_PCF8575 is not set | ||
689 | # CONFIG_SENSORS_PCF8591 is not set | ||
690 | # CONFIG_TPS65010 is not set | ||
691 | # CONFIG_SENSORS_MAX6875 is not set | ||
692 | # CONFIG_SENSORS_TSL2550 is not set | ||
693 | # CONFIG_I2C_DEBUG_CORE is not set | ||
694 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
695 | # CONFIG_I2C_DEBUG_BUS is not set | ||
696 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
697 | |||
698 | # | ||
699 | # SPI support | ||
700 | # | ||
701 | # CONFIG_SPI is not set | ||
702 | # CONFIG_SPI_MASTER is not set | ||
703 | # CONFIG_W1 is not set | ||
704 | # CONFIG_POWER_SUPPLY is not set | ||
705 | CONFIG_HWMON=y | ||
706 | # CONFIG_HWMON_VID is not set | ||
707 | # CONFIG_SENSORS_AD7418 is not set | ||
708 | # CONFIG_SENSORS_ADM1021 is not set | ||
709 | # CONFIG_SENSORS_ADM1025 is not set | ||
710 | # CONFIG_SENSORS_ADM1026 is not set | ||
711 | # CONFIG_SENSORS_ADM1029 is not set | ||
712 | # CONFIG_SENSORS_ADM1031 is not set | ||
713 | # CONFIG_SENSORS_ADM9240 is not set | ||
714 | # CONFIG_SENSORS_ADT7470 is not set | ||
715 | # CONFIG_SENSORS_ADT7473 is not set | ||
716 | # CONFIG_SENSORS_ATXP1 is not set | ||
717 | # CONFIG_SENSORS_DS1621 is not set | ||
718 | # CONFIG_SENSORS_I5K_AMB is not set | ||
719 | # CONFIG_SENSORS_F71805F is not set | ||
720 | # CONFIG_SENSORS_F71882FG is not set | ||
721 | # CONFIG_SENSORS_F75375S is not set | ||
722 | # CONFIG_SENSORS_GL518SM is not set | ||
723 | # CONFIG_SENSORS_GL520SM is not set | ||
724 | # CONFIG_SENSORS_IT87 is not set | ||
725 | # CONFIG_SENSORS_LM63 is not set | ||
726 | # CONFIG_SENSORS_LM75 is not set | ||
727 | # CONFIG_SENSORS_LM77 is not set | ||
728 | # CONFIG_SENSORS_LM78 is not set | ||
729 | # CONFIG_SENSORS_LM80 is not set | ||
730 | # CONFIG_SENSORS_LM83 is not set | ||
731 | # CONFIG_SENSORS_LM85 is not set | ||
732 | # CONFIG_SENSORS_LM87 is not set | ||
733 | # CONFIG_SENSORS_LM90 is not set | ||
734 | # CONFIG_SENSORS_LM92 is not set | ||
735 | # CONFIG_SENSORS_LM93 is not set | ||
736 | # CONFIG_SENSORS_MAX1619 is not set | ||
737 | # CONFIG_SENSORS_MAX6650 is not set | ||
738 | # CONFIG_SENSORS_PC87360 is not set | ||
739 | # CONFIG_SENSORS_PC87427 is not set | ||
740 | # CONFIG_SENSORS_SIS5595 is not set | ||
741 | # CONFIG_SENSORS_DME1737 is not set | ||
742 | # CONFIG_SENSORS_SMSC47M1 is not set | ||
743 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
744 | # CONFIG_SENSORS_SMSC47B397 is not set | ||
745 | # CONFIG_SENSORS_ADS7828 is not set | ||
746 | # CONFIG_SENSORS_THMC50 is not set | ||
747 | # CONFIG_SENSORS_VIA686A is not set | ||
748 | # CONFIG_SENSORS_VT1211 is not set | ||
749 | # CONFIG_SENSORS_VT8231 is not set | ||
750 | # CONFIG_SENSORS_W83781D is not set | ||
751 | # CONFIG_SENSORS_W83791D is not set | ||
752 | # CONFIG_SENSORS_W83792D is not set | ||
753 | # CONFIG_SENSORS_W83793 is not set | ||
754 | # CONFIG_SENSORS_W83L785TS is not set | ||
755 | # CONFIG_SENSORS_W83L786NG is not set | ||
756 | # CONFIG_SENSORS_W83627HF is not set | ||
757 | # CONFIG_SENSORS_W83627EHF is not set | ||
758 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
759 | CONFIG_THERMAL=y | ||
760 | CONFIG_WATCHDOG=y | ||
761 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
762 | |||
763 | # | ||
764 | # Watchdog Device Drivers | ||
765 | # | ||
766 | # CONFIG_SOFT_WATCHDOG is not set | ||
767 | CONFIG_83xx_WDT=y | ||
768 | |||
769 | # | ||
770 | # PCI-based Watchdog Cards | ||
771 | # | ||
772 | # CONFIG_PCIPCWATCHDOG is not set | ||
773 | # CONFIG_WDTPCI is not set | ||
774 | |||
775 | # | ||
776 | # USB-based Watchdog Cards | ||
777 | # | ||
778 | # CONFIG_USBPCWATCHDOG is not set | ||
779 | |||
780 | # | ||
781 | # Sonics Silicon Backplane | ||
782 | # | ||
783 | CONFIG_SSB_POSSIBLE=y | ||
784 | # CONFIG_SSB is not set | ||
785 | |||
786 | # | ||
787 | # Multifunction device drivers | ||
788 | # | ||
789 | # CONFIG_MFD_SM501 is not set | ||
790 | |||
791 | # | ||
792 | # Multimedia devices | ||
793 | # | ||
794 | # CONFIG_VIDEO_DEV is not set | ||
795 | # CONFIG_DVB_CORE is not set | ||
796 | CONFIG_DAB=y | ||
797 | # CONFIG_USB_DABUSB is not set | ||
798 | |||
799 | # | ||
800 | # Graphics support | ||
801 | # | ||
802 | # CONFIG_AGP is not set | ||
803 | # CONFIG_DRM is not set | ||
804 | # CONFIG_VGASTATE is not set | ||
805 | CONFIG_VIDEO_OUTPUT_CONTROL=m | ||
806 | # CONFIG_FB is not set | ||
807 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
808 | |||
809 | # | ||
810 | # Display device support | ||
811 | # | ||
812 | # CONFIG_DISPLAY_SUPPORT is not set | ||
813 | |||
814 | # | ||
815 | # Sound | ||
816 | # | ||
817 | # CONFIG_SOUND is not set | ||
818 | # CONFIG_HID_SUPPORT is not set | ||
819 | CONFIG_USB_SUPPORT=y | ||
820 | CONFIG_USB_ARCH_HAS_HCD=y | ||
821 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
822 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
823 | CONFIG_USB=y | ||
824 | # CONFIG_USB_DEBUG is not set | ||
825 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
826 | |||
827 | # | ||
828 | # Miscellaneous USB options | ||
829 | # | ||
830 | # CONFIG_USB_DEVICEFS is not set | ||
831 | CONFIG_USB_DEVICE_CLASS=y | ||
832 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
833 | # CONFIG_USB_OTG is not set | ||
834 | |||
835 | # | ||
836 | # USB Host Controller Drivers | ||
837 | # | ||
838 | CONFIG_USB_EHCI_HCD=y | ||
839 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
840 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
841 | CONFIG_USB_EHCI_FSL=y | ||
842 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
843 | # CONFIG_USB_ISP116X_HCD is not set | ||
844 | # CONFIG_USB_OHCI_HCD is not set | ||
845 | # CONFIG_USB_UHCI_HCD is not set | ||
846 | # CONFIG_USB_SL811_HCD is not set | ||
847 | # CONFIG_USB_R8A66597_HCD is not set | ||
848 | |||
849 | # | ||
850 | # USB Device Class drivers | ||
851 | # | ||
852 | # CONFIG_USB_ACM is not set | ||
853 | # CONFIG_USB_PRINTER is not set | ||
854 | |||
855 | # | ||
856 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
857 | # | ||
858 | |||
859 | # | ||
860 | # may also be needed; see USB_STORAGE Help for more information | ||
861 | # | ||
862 | # CONFIG_USB_LIBUSUAL is not set | ||
863 | |||
864 | # | ||
865 | # USB Imaging devices | ||
866 | # | ||
867 | # CONFIG_USB_MDC800 is not set | ||
868 | CONFIG_USB_MON=y | ||
869 | |||
870 | # | ||
871 | # USB port drivers | ||
872 | # | ||
873 | # CONFIG_USB_SERIAL is not set | ||
874 | |||
875 | # | ||
876 | # USB Miscellaneous drivers | ||
877 | # | ||
878 | # CONFIG_USB_EMI62 is not set | ||
879 | # CONFIG_USB_EMI26 is not set | ||
880 | # CONFIG_USB_ADUTUX is not set | ||
881 | # CONFIG_USB_AUERSWALD is not set | ||
882 | # CONFIG_USB_RIO500 is not set | ||
883 | # CONFIG_USB_LEGOTOWER is not set | ||
884 | # CONFIG_USB_LCD is not set | ||
885 | # CONFIG_USB_BERRY_CHARGE is not set | ||
886 | # CONFIG_USB_LED is not set | ||
887 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
888 | # CONFIG_USB_CYTHERM is not set | ||
889 | # CONFIG_USB_PHIDGET is not set | ||
890 | # CONFIG_USB_IDMOUSE is not set | ||
891 | # CONFIG_USB_FTDI_ELAN is not set | ||
892 | # CONFIG_USB_APPLEDISPLAY is not set | ||
893 | # CONFIG_USB_SISUSBVGA is not set | ||
894 | # CONFIG_USB_LD is not set | ||
895 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
896 | # CONFIG_USB_IOWARRIOR is not set | ||
897 | # CONFIG_USB_GADGET is not set | ||
898 | # CONFIG_MMC is not set | ||
899 | # CONFIG_MEMSTICK is not set | ||
900 | # CONFIG_NEW_LEDS is not set | ||
901 | # CONFIG_INFINIBAND is not set | ||
902 | # CONFIG_EDAC is not set | ||
903 | CONFIG_RTC_LIB=y | ||
904 | CONFIG_RTC_CLASS=y | ||
905 | |||
906 | # | ||
907 | # Conflicting RTC option has been selected, check GEN_RTC and RTC | ||
908 | # | ||
909 | CONFIG_RTC_HCTOSYS=y | ||
910 | CONFIG_RTC_HCTOSYS_DEVICE="rtc0" | ||
911 | # CONFIG_RTC_DEBUG is not set | ||
912 | |||
913 | # | ||
914 | # RTC interfaces | ||
915 | # | ||
916 | CONFIG_RTC_INTF_SYSFS=y | ||
917 | CONFIG_RTC_INTF_PROC=y | ||
918 | CONFIG_RTC_INTF_DEV=y | ||
919 | # CONFIG_RTC_INTF_DEV_UIE_EMUL is not set | ||
920 | # CONFIG_RTC_DRV_TEST is not set | ||
921 | |||
922 | # | ||
923 | # I2C RTC drivers | ||
924 | # | ||
925 | # CONFIG_RTC_DRV_DS1307 is not set | ||
926 | CONFIG_RTC_DRV_DS1374=y | ||
927 | # CONFIG_RTC_DRV_DS1672 is not set | ||
928 | # CONFIG_RTC_DRV_MAX6900 is not set | ||
929 | # CONFIG_RTC_DRV_RS5C372 is not set | ||
930 | # CONFIG_RTC_DRV_ISL1208 is not set | ||
931 | # CONFIG_RTC_DRV_X1205 is not set | ||
932 | # CONFIG_RTC_DRV_PCF8563 is not set | ||
933 | # CONFIG_RTC_DRV_PCF8583 is not set | ||
934 | # CONFIG_RTC_DRV_M41T80 is not set | ||
935 | # CONFIG_RTC_DRV_S35390A is not set | ||
936 | |||
937 | # | ||
938 | # SPI RTC drivers | ||
939 | # | ||
940 | |||
941 | # | ||
942 | # Platform RTC drivers | ||
943 | # | ||
944 | # CONFIG_RTC_DRV_CMOS is not set | ||
945 | # CONFIG_RTC_DRV_DS1511 is not set | ||
946 | # CONFIG_RTC_DRV_DS1553 is not set | ||
947 | # CONFIG_RTC_DRV_DS1742 is not set | ||
948 | # CONFIG_RTC_DRV_STK17TA8 is not set | ||
949 | # CONFIG_RTC_DRV_M48T86 is not set | ||
950 | # CONFIG_RTC_DRV_M48T59 is not set | ||
951 | # CONFIG_RTC_DRV_V3020 is not set | ||
952 | |||
953 | # | ||
954 | # on-CPU RTC drivers | ||
955 | # | ||
956 | # CONFIG_DMADEVICES is not set | ||
957 | |||
958 | # | ||
959 | # Userspace I/O | ||
960 | # | ||
961 | # CONFIG_UIO is not set | ||
962 | |||
963 | # | ||
964 | # File systems | ||
965 | # | ||
966 | CONFIG_EXT2_FS=y | ||
967 | # CONFIG_EXT2_FS_XATTR is not set | ||
968 | # CONFIG_EXT2_FS_XIP is not set | ||
969 | CONFIG_EXT3_FS=y | ||
970 | CONFIG_EXT3_FS_XATTR=y | ||
971 | # CONFIG_EXT3_FS_POSIX_ACL is not set | ||
972 | # CONFIG_EXT3_FS_SECURITY is not set | ||
973 | # CONFIG_EXT4DEV_FS is not set | ||
974 | CONFIG_JBD=y | ||
975 | CONFIG_FS_MBCACHE=y | ||
976 | # CONFIG_REISERFS_FS is not set | ||
977 | # CONFIG_JFS_FS is not set | ||
978 | # CONFIG_FS_POSIX_ACL is not set | ||
979 | # CONFIG_XFS_FS is not set | ||
980 | # CONFIG_GFS2_FS is not set | ||
981 | # CONFIG_OCFS2_FS is not set | ||
982 | CONFIG_DNOTIFY=y | ||
983 | CONFIG_INOTIFY=y | ||
984 | CONFIG_INOTIFY_USER=y | ||
985 | # CONFIG_QUOTA is not set | ||
986 | # CONFIG_AUTOFS_FS is not set | ||
987 | # CONFIG_AUTOFS4_FS is not set | ||
988 | # CONFIG_FUSE_FS is not set | ||
989 | |||
990 | # | ||
991 | # CD-ROM/DVD Filesystems | ||
992 | # | ||
993 | # CONFIG_ISO9660_FS is not set | ||
994 | # CONFIG_UDF_FS is not set | ||
995 | |||
996 | # | ||
997 | # DOS/FAT/NT Filesystems | ||
998 | # | ||
999 | # CONFIG_MSDOS_FS is not set | ||
1000 | # CONFIG_VFAT_FS is not set | ||
1001 | # CONFIG_NTFS_FS is not set | ||
1002 | |||
1003 | # | ||
1004 | # Pseudo filesystems | ||
1005 | # | ||
1006 | CONFIG_PROC_FS=y | ||
1007 | CONFIG_PROC_KCORE=y | ||
1008 | CONFIG_PROC_SYSCTL=y | ||
1009 | CONFIG_SYSFS=y | ||
1010 | CONFIG_TMPFS=y | ||
1011 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1012 | # CONFIG_HUGETLB_PAGE is not set | ||
1013 | # CONFIG_CONFIGFS_FS is not set | ||
1014 | |||
1015 | # | ||
1016 | # Miscellaneous filesystems | ||
1017 | # | ||
1018 | # CONFIG_ADFS_FS is not set | ||
1019 | # CONFIG_AFFS_FS is not set | ||
1020 | # CONFIG_HFS_FS is not set | ||
1021 | # CONFIG_HFSPLUS_FS is not set | ||
1022 | # CONFIG_BEFS_FS is not set | ||
1023 | # CONFIG_BFS_FS is not set | ||
1024 | # CONFIG_EFS_FS is not set | ||
1025 | CONFIG_JFFS2_FS=y | ||
1026 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1027 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1028 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1029 | # CONFIG_JFFS2_SUMMARY is not set | ||
1030 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1031 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1032 | CONFIG_JFFS2_ZLIB=y | ||
1033 | # CONFIG_JFFS2_LZO is not set | ||
1034 | CONFIG_JFFS2_RTIME=y | ||
1035 | # CONFIG_JFFS2_RUBIN is not set | ||
1036 | # CONFIG_CRAMFS is not set | ||
1037 | # CONFIG_VXFS_FS is not set | ||
1038 | # CONFIG_MINIX_FS is not set | ||
1039 | # CONFIG_HPFS_FS is not set | ||
1040 | # CONFIG_QNX4FS_FS is not set | ||
1041 | # CONFIG_ROMFS_FS is not set | ||
1042 | # CONFIG_SYSV_FS is not set | ||
1043 | # CONFIG_UFS_FS is not set | ||
1044 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1045 | CONFIG_NFS_FS=y | ||
1046 | CONFIG_NFS_V3=y | ||
1047 | # CONFIG_NFS_V3_ACL is not set | ||
1048 | CONFIG_NFS_V4=y | ||
1049 | # CONFIG_NFS_DIRECTIO is not set | ||
1050 | # CONFIG_NFSD is not set | ||
1051 | CONFIG_ROOT_NFS=y | ||
1052 | CONFIG_LOCKD=y | ||
1053 | CONFIG_LOCKD_V4=y | ||
1054 | CONFIG_NFS_COMMON=y | ||
1055 | CONFIG_SUNRPC=y | ||
1056 | CONFIG_SUNRPC_GSS=y | ||
1057 | # CONFIG_SUNRPC_BIND34 is not set | ||
1058 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1059 | # CONFIG_RPCSEC_GSS_SPKM3 is not set | ||
1060 | # CONFIG_SMB_FS is not set | ||
1061 | # CONFIG_CIFS is not set | ||
1062 | # CONFIG_NCP_FS is not set | ||
1063 | # CONFIG_CODA_FS is not set | ||
1064 | # CONFIG_AFS_FS is not set | ||
1065 | |||
1066 | # | ||
1067 | # Partition Types | ||
1068 | # | ||
1069 | CONFIG_PARTITION_ADVANCED=y | ||
1070 | # CONFIG_ACORN_PARTITION is not set | ||
1071 | # CONFIG_OSF_PARTITION is not set | ||
1072 | # CONFIG_AMIGA_PARTITION is not set | ||
1073 | # CONFIG_ATARI_PARTITION is not set | ||
1074 | # CONFIG_MAC_PARTITION is not set | ||
1075 | # CONFIG_MSDOS_PARTITION is not set | ||
1076 | # CONFIG_LDM_PARTITION is not set | ||
1077 | # CONFIG_SGI_PARTITION is not set | ||
1078 | # CONFIG_ULTRIX_PARTITION is not set | ||
1079 | # CONFIG_SUN_PARTITION is not set | ||
1080 | # CONFIG_KARMA_PARTITION is not set | ||
1081 | # CONFIG_EFI_PARTITION is not set | ||
1082 | # CONFIG_SYSV68_PARTITION is not set | ||
1083 | CONFIG_NLS=y | ||
1084 | CONFIG_NLS_DEFAULT="iso8859-1" | ||
1085 | # CONFIG_NLS_CODEPAGE_437 is not set | ||
1086 | # CONFIG_NLS_CODEPAGE_737 is not set | ||
1087 | # CONFIG_NLS_CODEPAGE_775 is not set | ||
1088 | # CONFIG_NLS_CODEPAGE_850 is not set | ||
1089 | # CONFIG_NLS_CODEPAGE_852 is not set | ||
1090 | # CONFIG_NLS_CODEPAGE_855 is not set | ||
1091 | # CONFIG_NLS_CODEPAGE_857 is not set | ||
1092 | # CONFIG_NLS_CODEPAGE_860 is not set | ||
1093 | # CONFIG_NLS_CODEPAGE_861 is not set | ||
1094 | # CONFIG_NLS_CODEPAGE_862 is not set | ||
1095 | # CONFIG_NLS_CODEPAGE_863 is not set | ||
1096 | # CONFIG_NLS_CODEPAGE_864 is not set | ||
1097 | # CONFIG_NLS_CODEPAGE_865 is not set | ||
1098 | # CONFIG_NLS_CODEPAGE_866 is not set | ||
1099 | # CONFIG_NLS_CODEPAGE_869 is not set | ||
1100 | # CONFIG_NLS_CODEPAGE_936 is not set | ||
1101 | # CONFIG_NLS_CODEPAGE_950 is not set | ||
1102 | # CONFIG_NLS_CODEPAGE_932 is not set | ||
1103 | # CONFIG_NLS_CODEPAGE_949 is not set | ||
1104 | # CONFIG_NLS_CODEPAGE_874 is not set | ||
1105 | # CONFIG_NLS_ISO8859_8 is not set | ||
1106 | # CONFIG_NLS_CODEPAGE_1250 is not set | ||
1107 | # CONFIG_NLS_CODEPAGE_1251 is not set | ||
1108 | # CONFIG_NLS_ASCII is not set | ||
1109 | # CONFIG_NLS_ISO8859_1 is not set | ||
1110 | # CONFIG_NLS_ISO8859_2 is not set | ||
1111 | # CONFIG_NLS_ISO8859_3 is not set | ||
1112 | # CONFIG_NLS_ISO8859_4 is not set | ||
1113 | # CONFIG_NLS_ISO8859_5 is not set | ||
1114 | # CONFIG_NLS_ISO8859_6 is not set | ||
1115 | # CONFIG_NLS_ISO8859_7 is not set | ||
1116 | # CONFIG_NLS_ISO8859_9 is not set | ||
1117 | # CONFIG_NLS_ISO8859_13 is not set | ||
1118 | # CONFIG_NLS_ISO8859_14 is not set | ||
1119 | # CONFIG_NLS_ISO8859_15 is not set | ||
1120 | # CONFIG_NLS_KOI8_R is not set | ||
1121 | # CONFIG_NLS_KOI8_U is not set | ||
1122 | # CONFIG_NLS_UTF8 is not set | ||
1123 | # CONFIG_DLM is not set | ||
1124 | |||
1125 | # | ||
1126 | # Library routines | ||
1127 | # | ||
1128 | CONFIG_BITREVERSE=y | ||
1129 | # CONFIG_CRC_CCITT is not set | ||
1130 | # CONFIG_CRC16 is not set | ||
1131 | # CONFIG_CRC_ITU_T is not set | ||
1132 | CONFIG_CRC32=y | ||
1133 | # CONFIG_CRC7 is not set | ||
1134 | # CONFIG_LIBCRC32C is not set | ||
1135 | CONFIG_ZLIB_INFLATE=y | ||
1136 | CONFIG_ZLIB_DEFLATE=y | ||
1137 | CONFIG_PLIST=y | ||
1138 | CONFIG_HAS_IOMEM=y | ||
1139 | CONFIG_HAS_IOPORT=y | ||
1140 | CONFIG_HAS_DMA=y | ||
1141 | CONFIG_HAVE_LMB=y | ||
1142 | |||
1143 | # | ||
1144 | # Kernel hacking | ||
1145 | # | ||
1146 | # CONFIG_PRINTK_TIME is not set | ||
1147 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1148 | CONFIG_ENABLE_MUST_CHECK=y | ||
1149 | # CONFIG_MAGIC_SYSRQ is not set | ||
1150 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1151 | # CONFIG_DEBUG_FS is not set | ||
1152 | # CONFIG_HEADERS_CHECK is not set | ||
1153 | # CONFIG_DEBUG_KERNEL is not set | ||
1154 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1155 | # CONFIG_SLUB_STATS is not set | ||
1156 | # CONFIG_DEBUG_BUGVERBOSE is not set | ||
1157 | # CONFIG_SAMPLES is not set | ||
1158 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1159 | |||
1160 | # | ||
1161 | # Security options | ||
1162 | # | ||
1163 | # CONFIG_KEYS is not set | ||
1164 | # CONFIG_SECURITY is not set | ||
1165 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1166 | CONFIG_CRYPTO=y | ||
1167 | CONFIG_CRYPTO_ALGAPI=y | ||
1168 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1169 | # CONFIG_CRYPTO_SEQIV is not set | ||
1170 | CONFIG_CRYPTO_MANAGER=y | ||
1171 | # CONFIG_CRYPTO_HMAC is not set | ||
1172 | # CONFIG_CRYPTO_XCBC is not set | ||
1173 | # CONFIG_CRYPTO_NULL is not set | ||
1174 | # CONFIG_CRYPTO_MD4 is not set | ||
1175 | CONFIG_CRYPTO_MD5=y | ||
1176 | # CONFIG_CRYPTO_SHA1 is not set | ||
1177 | # CONFIG_CRYPTO_SHA256 is not set | ||
1178 | # CONFIG_CRYPTO_SHA512 is not set | ||
1179 | # CONFIG_CRYPTO_WP512 is not set | ||
1180 | # CONFIG_CRYPTO_TGR192 is not set | ||
1181 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1182 | CONFIG_CRYPTO_ECB=m | ||
1183 | CONFIG_CRYPTO_CBC=y | ||
1184 | CONFIG_CRYPTO_PCBC=m | ||
1185 | # CONFIG_CRYPTO_LRW is not set | ||
1186 | # CONFIG_CRYPTO_XTS is not set | ||
1187 | # CONFIG_CRYPTO_CTR is not set | ||
1188 | # CONFIG_CRYPTO_GCM is not set | ||
1189 | # CONFIG_CRYPTO_CCM is not set | ||
1190 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1191 | CONFIG_CRYPTO_DES=y | ||
1192 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1193 | # CONFIG_CRYPTO_BLOWFISH is not set | ||
1194 | # CONFIG_CRYPTO_TWOFISH is not set | ||
1195 | # CONFIG_CRYPTO_SERPENT is not set | ||
1196 | # CONFIG_CRYPTO_AES is not set | ||
1197 | # CONFIG_CRYPTO_CAST5 is not set | ||
1198 | # CONFIG_CRYPTO_CAST6 is not set | ||
1199 | # CONFIG_CRYPTO_TEA is not set | ||
1200 | # CONFIG_CRYPTO_ARC4 is not set | ||
1201 | # CONFIG_CRYPTO_KHAZAD is not set | ||
1202 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1203 | # CONFIG_CRYPTO_SEED is not set | ||
1204 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1205 | # CONFIG_CRYPTO_DEFLATE is not set | ||
1206 | # CONFIG_CRYPTO_MICHAEL_MIC is not set | ||
1207 | # CONFIG_CRYPTO_CRC32C is not set | ||
1208 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1209 | # CONFIG_CRYPTO_TEST is not set | ||
1210 | # CONFIG_CRYPTO_AUTHENC is not set | ||
1211 | # CONFIG_CRYPTO_LZO is not set | ||
1212 | CONFIG_CRYPTO_HW=y | ||
1213 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1214 | # CONFIG_PPC_CLOCK is not set | ||
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig new file mode 100644 index 000000000000..dc599c7e97d5 --- /dev/null +++ b/arch/powerpc/configs/c2k_defconfig | |||
@@ -0,0 +1,1872 @@ | |||
1 | # | ||
2 | # Automatically generated make config: don't edit | ||
3 | # Linux kernel version: 2.6.26-rc2 | ||
4 | # Thu May 15 11:00:14 2008 | ||
5 | # | ||
6 | # CONFIG_PPC64 is not set | ||
7 | |||
8 | # | ||
9 | # Processor support | ||
10 | # | ||
11 | CONFIG_6xx=y | ||
12 | # CONFIG_PPC_85xx is not set | ||
13 | # CONFIG_PPC_8xx is not set | ||
14 | # CONFIG_40x is not set | ||
15 | # CONFIG_44x is not set | ||
16 | # CONFIG_E200 is not set | ||
17 | CONFIG_PPC_FPU=y | ||
18 | # CONFIG_ALTIVEC is not set | ||
19 | CONFIG_PPC_STD_MMU=y | ||
20 | CONFIG_PPC_STD_MMU_32=y | ||
21 | # CONFIG_PPC_MM_SLICES is not set | ||
22 | # CONFIG_SMP is not set | ||
23 | CONFIG_NOT_COHERENT_CACHE=y | ||
24 | CONFIG_CHECK_CACHE_COHERENCY=y | ||
25 | CONFIG_PPC32=y | ||
26 | CONFIG_WORD_SIZE=32 | ||
27 | CONFIG_PPC_MERGE=y | ||
28 | CONFIG_MMU=y | ||
29 | CONFIG_GENERIC_CMOS_UPDATE=y | ||
30 | CONFIG_GENERIC_TIME=y | ||
31 | CONFIG_GENERIC_TIME_VSYSCALL=y | ||
32 | CONFIG_GENERIC_CLOCKEVENTS=y | ||
33 | CONFIG_GENERIC_HARDIRQS=y | ||
34 | # CONFIG_HAVE_SETUP_PER_CPU_AREA is not set | ||
35 | CONFIG_IRQ_PER_CPU=y | ||
36 | CONFIG_STACKTRACE_SUPPORT=y | ||
37 | CONFIG_LOCKDEP_SUPPORT=y | ||
38 | CONFIG_RWSEM_XCHGADD_ALGORITHM=y | ||
39 | CONFIG_ARCH_HAS_ILOG2_U32=y | ||
40 | CONFIG_GENERIC_HWEIGHT=y | ||
41 | CONFIG_GENERIC_CALIBRATE_DELAY=y | ||
42 | CONFIG_GENERIC_FIND_NEXT_BIT=y | ||
43 | # CONFIG_ARCH_NO_VIRT_TO_BUS is not set | ||
44 | CONFIG_PPC=y | ||
45 | CONFIG_EARLY_PRINTK=y | ||
46 | CONFIG_GENERIC_NVRAM=y | ||
47 | CONFIG_SCHED_NO_NO_OMIT_FRAME_POINTER=y | ||
48 | CONFIG_ARCH_MAY_HAVE_PC_FDC=y | ||
49 | CONFIG_PPC_OF=y | ||
50 | CONFIG_OF=y | ||
51 | # CONFIG_PPC_UDBG_16550 is not set | ||
52 | # CONFIG_GENERIC_TBSYNC is not set | ||
53 | CONFIG_AUDIT_ARCH=y | ||
54 | CONFIG_GENERIC_BUG=y | ||
55 | # CONFIG_DEFAULT_UIMAGE is not set | ||
56 | # CONFIG_PPC_DCR_NATIVE is not set | ||
57 | # CONFIG_PPC_DCR_MMIO is not set | ||
58 | CONFIG_DEFCONFIG_LIST="/lib/modules/$UNAME_RELEASE/.config" | ||
59 | |||
60 | # | ||
61 | # General setup | ||
62 | # | ||
63 | CONFIG_EXPERIMENTAL=y | ||
64 | CONFIG_BROKEN_ON_SMP=y | ||
65 | CONFIG_INIT_ENV_ARG_LIMIT=32 | ||
66 | CONFIG_LOCALVERSION="" | ||
67 | CONFIG_LOCALVERSION_AUTO=y | ||
68 | CONFIG_SWAP=y | ||
69 | CONFIG_SYSVIPC=y | ||
70 | CONFIG_SYSVIPC_SYSCTL=y | ||
71 | CONFIG_POSIX_MQUEUE=y | ||
72 | CONFIG_BSD_PROCESS_ACCT=y | ||
73 | # CONFIG_BSD_PROCESS_ACCT_V3 is not set | ||
74 | # CONFIG_TASKSTATS is not set | ||
75 | CONFIG_AUDIT=y | ||
76 | CONFIG_AUDITSYSCALL=y | ||
77 | CONFIG_AUDIT_TREE=y | ||
78 | # CONFIG_IKCONFIG is not set | ||
79 | CONFIG_LOG_BUF_SHIFT=17 | ||
80 | # CONFIG_CGROUPS is not set | ||
81 | CONFIG_GROUP_SCHED=y | ||
82 | CONFIG_FAIR_GROUP_SCHED=y | ||
83 | # CONFIG_RT_GROUP_SCHED is not set | ||
84 | CONFIG_USER_SCHED=y | ||
85 | # CONFIG_CGROUP_SCHED is not set | ||
86 | CONFIG_SYSFS_DEPRECATED=y | ||
87 | CONFIG_SYSFS_DEPRECATED_V2=y | ||
88 | # CONFIG_RELAY is not set | ||
89 | CONFIG_NAMESPACES=y | ||
90 | # CONFIG_UTS_NS is not set | ||
91 | # CONFIG_IPC_NS is not set | ||
92 | # CONFIG_USER_NS is not set | ||
93 | # CONFIG_PID_NS is not set | ||
94 | CONFIG_BLK_DEV_INITRD=y | ||
95 | CONFIG_INITRAMFS_SOURCE="" | ||
96 | CONFIG_CC_OPTIMIZE_FOR_SIZE=y | ||
97 | CONFIG_SYSCTL=y | ||
98 | # CONFIG_EMBEDDED is not set | ||
99 | CONFIG_SYSCTL_SYSCALL=y | ||
100 | CONFIG_SYSCTL_SYSCALL_CHECK=y | ||
101 | CONFIG_KALLSYMS=y | ||
102 | # CONFIG_KALLSYMS_ALL is not set | ||
103 | CONFIG_KALLSYMS_EXTRA_PASS=y | ||
104 | CONFIG_HOTPLUG=y | ||
105 | CONFIG_PRINTK=y | ||
106 | CONFIG_BUG=y | ||
107 | CONFIG_ELF_CORE=y | ||
108 | CONFIG_COMPAT_BRK=y | ||
109 | CONFIG_BASE_FULL=y | ||
110 | CONFIG_FUTEX=y | ||
111 | CONFIG_ANON_INODES=y | ||
112 | CONFIG_EPOLL=y | ||
113 | CONFIG_SIGNALFD=y | ||
114 | CONFIG_TIMERFD=y | ||
115 | CONFIG_EVENTFD=y | ||
116 | CONFIG_SHMEM=y | ||
117 | CONFIG_VM_EVENT_COUNTERS=y | ||
118 | CONFIG_SLUB_DEBUG=y | ||
119 | # CONFIG_SLAB is not set | ||
120 | CONFIG_SLUB=y | ||
121 | # CONFIG_SLOB is not set | ||
122 | CONFIG_PROFILING=y | ||
123 | # CONFIG_MARKERS is not set | ||
124 | CONFIG_OPROFILE=m | ||
125 | CONFIG_HAVE_OPROFILE=y | ||
126 | CONFIG_KPROBES=y | ||
127 | CONFIG_KRETPROBES=y | ||
128 | CONFIG_HAVE_KPROBES=y | ||
129 | CONFIG_HAVE_KRETPROBES=y | ||
130 | # CONFIG_HAVE_DMA_ATTRS is not set | ||
131 | CONFIG_PROC_PAGE_MONITOR=y | ||
132 | CONFIG_SLABINFO=y | ||
133 | CONFIG_RT_MUTEXES=y | ||
134 | # CONFIG_TINY_SHMEM is not set | ||
135 | CONFIG_BASE_SMALL=0 | ||
136 | CONFIG_MODULES=y | ||
137 | # CONFIG_MODULE_FORCE_LOAD is not set | ||
138 | CONFIG_MODULE_UNLOAD=y | ||
139 | # CONFIG_MODULE_FORCE_UNLOAD is not set | ||
140 | CONFIG_MODVERSIONS=y | ||
141 | # CONFIG_MODULE_SRCVERSION_ALL is not set | ||
142 | CONFIG_KMOD=y | ||
143 | CONFIG_BLOCK=y | ||
144 | CONFIG_LBD=y | ||
145 | # CONFIG_BLK_DEV_IO_TRACE is not set | ||
146 | # CONFIG_LSF is not set | ||
147 | # CONFIG_BLK_DEV_BSG is not set | ||
148 | |||
149 | # | ||
150 | # IO Schedulers | ||
151 | # | ||
152 | CONFIG_IOSCHED_NOOP=y | ||
153 | CONFIG_IOSCHED_AS=y | ||
154 | CONFIG_IOSCHED_DEADLINE=y | ||
155 | CONFIG_IOSCHED_CFQ=y | ||
156 | # CONFIG_DEFAULT_AS is not set | ||
157 | # CONFIG_DEFAULT_DEADLINE is not set | ||
158 | CONFIG_DEFAULT_CFQ=y | ||
159 | # CONFIG_DEFAULT_NOOP is not set | ||
160 | CONFIG_DEFAULT_IOSCHED="cfq" | ||
161 | CONFIG_CLASSIC_RCU=y | ||
162 | |||
163 | # | ||
164 | # Platform support | ||
165 | # | ||
166 | CONFIG_PPC_MULTIPLATFORM=y | ||
167 | # CONFIG_PPC_82xx is not set | ||
168 | # CONFIG_PPC_83xx is not set | ||
169 | # CONFIG_PPC_86xx is not set | ||
170 | CONFIG_CLASSIC32=y | ||
171 | # CONFIG_PPC_CHRP is not set | ||
172 | # CONFIG_PPC_MPC512x is not set | ||
173 | # CONFIG_PPC_MPC5121 is not set | ||
174 | # CONFIG_MPC5121_ADS is not set | ||
175 | # CONFIG_PPC_MPC52xx is not set | ||
176 | # CONFIG_PPC_PMAC is not set | ||
177 | # CONFIG_PPC_CELL is not set | ||
178 | # CONFIG_PPC_CELL_NATIVE is not set | ||
179 | # CONFIG_PQ2ADS is not set | ||
180 | CONFIG_EMBEDDED6xx=y | ||
181 | # CONFIG_LINKSTATION is not set | ||
182 | # CONFIG_STORCENTER is not set | ||
183 | # CONFIG_MPC7448HPC2 is not set | ||
184 | # CONFIG_PPC_HOLLY is not set | ||
185 | # CONFIG_PPC_PRPMC2800 is not set | ||
186 | CONFIG_PPC_C2K=y | ||
187 | CONFIG_MV64X60=y | ||
188 | # CONFIG_IPIC is not set | ||
189 | # CONFIG_MPIC is not set | ||
190 | # CONFIG_MPIC_WEIRD is not set | ||
191 | # CONFIG_PPC_I8259 is not set | ||
192 | # CONFIG_PPC_RTAS is not set | ||
193 | # CONFIG_MMIO_NVRAM is not set | ||
194 | # CONFIG_PPC_MPC106 is not set | ||
195 | # CONFIG_PPC_970_NAP is not set | ||
196 | # CONFIG_PPC_INDIRECT_IO is not set | ||
197 | # CONFIG_GENERIC_IOMAP is not set | ||
198 | CONFIG_CPU_FREQ=y | ||
199 | CONFIG_CPU_FREQ_TABLE=y | ||
200 | # CONFIG_CPU_FREQ_DEBUG is not set | ||
201 | CONFIG_CPU_FREQ_STAT=y | ||
202 | # CONFIG_CPU_FREQ_STAT_DETAILS is not set | ||
203 | # CONFIG_CPU_FREQ_DEFAULT_GOV_PERFORMANCE is not set | ||
204 | # CONFIG_CPU_FREQ_DEFAULT_GOV_POWERSAVE is not set | ||
205 | CONFIG_CPU_FREQ_DEFAULT_GOV_USERSPACE=y | ||
206 | # CONFIG_CPU_FREQ_DEFAULT_GOV_ONDEMAND is not set | ||
207 | # CONFIG_CPU_FREQ_DEFAULT_GOV_CONSERVATIVE is not set | ||
208 | CONFIG_CPU_FREQ_GOV_PERFORMANCE=y | ||
209 | CONFIG_CPU_FREQ_GOV_POWERSAVE=m | ||
210 | CONFIG_CPU_FREQ_GOV_USERSPACE=y | ||
211 | CONFIG_CPU_FREQ_GOV_ONDEMAND=m | ||
212 | # CONFIG_CPU_FREQ_GOV_CONSERVATIVE is not set | ||
213 | |||
214 | # | ||
215 | # CPU Frequency drivers | ||
216 | # | ||
217 | # CONFIG_TAU is not set | ||
218 | # CONFIG_FSL_ULI1575 is not set | ||
219 | |||
220 | # | ||
221 | # Kernel options | ||
222 | # | ||
223 | CONFIG_HIGHMEM=y | ||
224 | # CONFIG_TICK_ONESHOT is not set | ||
225 | # CONFIG_NO_HZ is not set | ||
226 | # CONFIG_HIGH_RES_TIMERS is not set | ||
227 | CONFIG_GENERIC_CLOCKEVENTS_BUILD=y | ||
228 | # CONFIG_HZ_100 is not set | ||
229 | CONFIG_HZ_250=y | ||
230 | # CONFIG_HZ_300 is not set | ||
231 | # CONFIG_HZ_1000 is not set | ||
232 | CONFIG_HZ=250 | ||
233 | # CONFIG_SCHED_HRTICK is not set | ||
234 | # CONFIG_PREEMPT_NONE is not set | ||
235 | CONFIG_PREEMPT_VOLUNTARY=y | ||
236 | # CONFIG_PREEMPT is not set | ||
237 | CONFIG_BINFMT_ELF=y | ||
238 | CONFIG_BINFMT_MISC=y | ||
239 | # CONFIG_IOMMU_HELPER is not set | ||
240 | CONFIG_ARCH_ENABLE_MEMORY_HOTPLUG=y | ||
241 | CONFIG_ARCH_HAS_WALK_MEMORY=y | ||
242 | CONFIG_ARCH_ENABLE_MEMORY_HOTREMOVE=y | ||
243 | # CONFIG_KEXEC is not set | ||
244 | CONFIG_ARCH_FLATMEM_ENABLE=y | ||
245 | CONFIG_ARCH_POPULATES_NODE_MAP=y | ||
246 | CONFIG_SELECT_MEMORY_MODEL=y | ||
247 | CONFIG_FLATMEM_MANUAL=y | ||
248 | # CONFIG_DISCONTIGMEM_MANUAL is not set | ||
249 | # CONFIG_SPARSEMEM_MANUAL is not set | ||
250 | CONFIG_FLATMEM=y | ||
251 | CONFIG_FLAT_NODE_MEM_MAP=y | ||
252 | # CONFIG_SPARSEMEM_STATIC is not set | ||
253 | # CONFIG_SPARSEMEM_VMEMMAP_ENABLE is not set | ||
254 | CONFIG_PAGEFLAGS_EXTENDED=y | ||
255 | CONFIG_SPLIT_PTLOCK_CPUS=4 | ||
256 | # CONFIG_RESOURCES_64BIT is not set | ||
257 | CONFIG_ZONE_DMA_FLAG=1 | ||
258 | CONFIG_BOUNCE=y | ||
259 | CONFIG_VIRT_TO_BUS=y | ||
260 | CONFIG_FORCE_MAX_ZONEORDER=11 | ||
261 | # CONFIG_PROC_DEVICETREE is not set | ||
262 | # CONFIG_CMDLINE_BOOL is not set | ||
263 | CONFIG_PM=y | ||
264 | # CONFIG_PM_DEBUG is not set | ||
265 | CONFIG_SECCOMP=y | ||
266 | CONFIG_ISA_DMA_API=y | ||
267 | |||
268 | # | ||
269 | # Bus options | ||
270 | # | ||
271 | CONFIG_ZONE_DMA=y | ||
272 | CONFIG_GENERIC_ISA_DMA=y | ||
273 | CONFIG_PPC_INDIRECT_PCI=y | ||
274 | CONFIG_PCI=y | ||
275 | CONFIG_PCI_DOMAINS=y | ||
276 | CONFIG_PCI_SYSCALL=y | ||
277 | # CONFIG_PCIEPORTBUS is not set | ||
278 | CONFIG_ARCH_SUPPORTS_MSI=y | ||
279 | CONFIG_PCI_MSI=y | ||
280 | CONFIG_PCI_LEGACY=y | ||
281 | # CONFIG_PCI_DEBUG is not set | ||
282 | # CONFIG_PCCARD is not set | ||
283 | CONFIG_HOTPLUG_PCI=y | ||
284 | # CONFIG_HOTPLUG_PCI_FAKE is not set | ||
285 | # CONFIG_HOTPLUG_PCI_CPCI is not set | ||
286 | CONFIG_HOTPLUG_PCI_SHPC=m | ||
287 | # CONFIG_HAS_RAPIDIO is not set | ||
288 | |||
289 | # | ||
290 | # Advanced setup | ||
291 | # | ||
292 | # CONFIG_ADVANCED_OPTIONS is not set | ||
293 | |||
294 | # | ||
295 | # Default settings for advanced configuration options are used | ||
296 | # | ||
297 | CONFIG_LOWMEM_SIZE=0x30000000 | ||
298 | CONFIG_PAGE_OFFSET=0xc0000000 | ||
299 | CONFIG_KERNEL_START=0xc0000000 | ||
300 | CONFIG_PHYSICAL_START=0x00000000 | ||
301 | CONFIG_TASK_SIZE=0xc0000000 | ||
302 | CONFIG_CONSISTENT_START=0xff100000 | ||
303 | CONFIG_CONSISTENT_SIZE=0x00200000 | ||
304 | |||
305 | # | ||
306 | # Networking | ||
307 | # | ||
308 | CONFIG_NET=y | ||
309 | |||
310 | # | ||
311 | # Networking options | ||
312 | # | ||
313 | CONFIG_PACKET=y | ||
314 | CONFIG_PACKET_MMAP=y | ||
315 | CONFIG_UNIX=y | ||
316 | CONFIG_XFRM=y | ||
317 | CONFIG_XFRM_USER=y | ||
318 | # CONFIG_XFRM_SUB_POLICY is not set | ||
319 | # CONFIG_XFRM_MIGRATE is not set | ||
320 | # CONFIG_XFRM_STATISTICS is not set | ||
321 | CONFIG_NET_KEY=m | ||
322 | # CONFIG_NET_KEY_MIGRATE is not set | ||
323 | CONFIG_INET=y | ||
324 | CONFIG_IP_MULTICAST=y | ||
325 | CONFIG_IP_ADVANCED_ROUTER=y | ||
326 | CONFIG_ASK_IP_FIB_HASH=y | ||
327 | # CONFIG_IP_FIB_TRIE is not set | ||
328 | CONFIG_IP_FIB_HASH=y | ||
329 | CONFIG_IP_MULTIPLE_TABLES=y | ||
330 | CONFIG_IP_ROUTE_MULTIPATH=y | ||
331 | CONFIG_IP_ROUTE_VERBOSE=y | ||
332 | CONFIG_IP_PNP=y | ||
333 | CONFIG_IP_PNP_DHCP=y | ||
334 | # CONFIG_IP_PNP_BOOTP is not set | ||
335 | # CONFIG_IP_PNP_RARP is not set | ||
336 | CONFIG_NET_IPIP=m | ||
337 | CONFIG_NET_IPGRE=m | ||
338 | CONFIG_NET_IPGRE_BROADCAST=y | ||
339 | CONFIG_IP_MROUTE=y | ||
340 | CONFIG_IP_PIMSM_V1=y | ||
341 | CONFIG_IP_PIMSM_V2=y | ||
342 | # CONFIG_ARPD is not set | ||
343 | CONFIG_SYN_COOKIES=y | ||
344 | CONFIG_INET_AH=m | ||
345 | CONFIG_INET_ESP=m | ||
346 | CONFIG_INET_IPCOMP=m | ||
347 | CONFIG_INET_XFRM_TUNNEL=m | ||
348 | CONFIG_INET_TUNNEL=m | ||
349 | CONFIG_INET_XFRM_MODE_TRANSPORT=y | ||
350 | CONFIG_INET_XFRM_MODE_TUNNEL=y | ||
351 | CONFIG_INET_XFRM_MODE_BEET=y | ||
352 | # CONFIG_INET_LRO is not set | ||
353 | CONFIG_INET_DIAG=y | ||
354 | CONFIG_INET_TCP_DIAG=y | ||
355 | # CONFIG_TCP_CONG_ADVANCED is not set | ||
356 | CONFIG_TCP_CONG_CUBIC=y | ||
357 | CONFIG_DEFAULT_TCP_CONG="cubic" | ||
358 | # CONFIG_TCP_MD5SIG is not set | ||
359 | CONFIG_IP_VS=m | ||
360 | # CONFIG_IP_VS_DEBUG is not set | ||
361 | CONFIG_IP_VS_TAB_BITS=12 | ||
362 | |||
363 | # | ||
364 | # IPVS transport protocol load balancing support | ||
365 | # | ||
366 | CONFIG_IP_VS_PROTO_TCP=y | ||
367 | CONFIG_IP_VS_PROTO_UDP=y | ||
368 | CONFIG_IP_VS_PROTO_ESP=y | ||
369 | CONFIG_IP_VS_PROTO_AH=y | ||
370 | |||
371 | # | ||
372 | # IPVS scheduler | ||
373 | # | ||
374 | CONFIG_IP_VS_RR=m | ||
375 | CONFIG_IP_VS_WRR=m | ||
376 | CONFIG_IP_VS_LC=m | ||
377 | CONFIG_IP_VS_WLC=m | ||
378 | CONFIG_IP_VS_LBLC=m | ||
379 | CONFIG_IP_VS_LBLCR=m | ||
380 | CONFIG_IP_VS_DH=m | ||
381 | CONFIG_IP_VS_SH=m | ||
382 | CONFIG_IP_VS_SED=m | ||
383 | CONFIG_IP_VS_NQ=m | ||
384 | |||
385 | # | ||
386 | # IPVS application helper | ||
387 | # | ||
388 | CONFIG_IP_VS_FTP=m | ||
389 | CONFIG_IPV6=m | ||
390 | CONFIG_IPV6_PRIVACY=y | ||
391 | # CONFIG_IPV6_ROUTER_PREF is not set | ||
392 | # CONFIG_IPV6_OPTIMISTIC_DAD is not set | ||
393 | CONFIG_INET6_AH=m | ||
394 | CONFIG_INET6_ESP=m | ||
395 | CONFIG_INET6_IPCOMP=m | ||
396 | # CONFIG_IPV6_MIP6 is not set | ||
397 | CONFIG_INET6_XFRM_TUNNEL=m | ||
398 | CONFIG_INET6_TUNNEL=m | ||
399 | CONFIG_INET6_XFRM_MODE_TRANSPORT=m | ||
400 | CONFIG_INET6_XFRM_MODE_TUNNEL=m | ||
401 | CONFIG_INET6_XFRM_MODE_BEET=m | ||
402 | # CONFIG_INET6_XFRM_MODE_ROUTEOPTIMIZATION is not set | ||
403 | CONFIG_IPV6_SIT=m | ||
404 | CONFIG_IPV6_NDISC_NODETYPE=y | ||
405 | CONFIG_IPV6_TUNNEL=m | ||
406 | # CONFIG_IPV6_MULTIPLE_TABLES is not set | ||
407 | # CONFIG_IPV6_MROUTE is not set | ||
408 | # CONFIG_NETLABEL is not set | ||
409 | CONFIG_NETWORK_SECMARK=y | ||
410 | CONFIG_NETFILTER=y | ||
411 | # CONFIG_NETFILTER_DEBUG is not set | ||
412 | CONFIG_NETFILTER_ADVANCED=y | ||
413 | CONFIG_BRIDGE_NETFILTER=y | ||
414 | |||
415 | # | ||
416 | # Core Netfilter Configuration | ||
417 | # | ||
418 | # CONFIG_NETFILTER_NETLINK_QUEUE is not set | ||
419 | # CONFIG_NETFILTER_NETLINK_LOG is not set | ||
420 | # CONFIG_NF_CONNTRACK is not set | ||
421 | CONFIG_NETFILTER_XTABLES=m | ||
422 | # CONFIG_NETFILTER_XT_TARGET_CLASSIFY is not set | ||
423 | # CONFIG_NETFILTER_XT_TARGET_DSCP is not set | ||
424 | # CONFIG_NETFILTER_XT_TARGET_MARK is not set | ||
425 | # CONFIG_NETFILTER_XT_TARGET_NFQUEUE is not set | ||
426 | # CONFIG_NETFILTER_XT_TARGET_NFLOG is not set | ||
427 | # CONFIG_NETFILTER_XT_TARGET_RATEEST is not set | ||
428 | # CONFIG_NETFILTER_XT_TARGET_TRACE is not set | ||
429 | # CONFIG_NETFILTER_XT_TARGET_SECMARK is not set | ||
430 | # CONFIG_NETFILTER_XT_TARGET_TCPMSS is not set | ||
431 | # CONFIG_NETFILTER_XT_TARGET_TCPOPTSTRIP is not set | ||
432 | # CONFIG_NETFILTER_XT_MATCH_COMMENT is not set | ||
433 | # CONFIG_NETFILTER_XT_MATCH_DCCP is not set | ||
434 | # CONFIG_NETFILTER_XT_MATCH_DSCP is not set | ||
435 | # CONFIG_NETFILTER_XT_MATCH_ESP is not set | ||
436 | # CONFIG_NETFILTER_XT_MATCH_IPRANGE is not set | ||
437 | # CONFIG_NETFILTER_XT_MATCH_LENGTH is not set | ||
438 | # CONFIG_NETFILTER_XT_MATCH_LIMIT is not set | ||
439 | # CONFIG_NETFILTER_XT_MATCH_MAC is not set | ||
440 | # CONFIG_NETFILTER_XT_MATCH_MARK is not set | ||
441 | # CONFIG_NETFILTER_XT_MATCH_OWNER is not set | ||
442 | # CONFIG_NETFILTER_XT_MATCH_POLICY is not set | ||
443 | # CONFIG_NETFILTER_XT_MATCH_MULTIPORT is not set | ||
444 | # CONFIG_NETFILTER_XT_MATCH_PHYSDEV is not set | ||
445 | # CONFIG_NETFILTER_XT_MATCH_PKTTYPE is not set | ||
446 | # CONFIG_NETFILTER_XT_MATCH_QUOTA is not set | ||
447 | # CONFIG_NETFILTER_XT_MATCH_RATEEST is not set | ||
448 | # CONFIG_NETFILTER_XT_MATCH_REALM is not set | ||
449 | # CONFIG_NETFILTER_XT_MATCH_SCTP is not set | ||
450 | # CONFIG_NETFILTER_XT_MATCH_STATISTIC is not set | ||
451 | # CONFIG_NETFILTER_XT_MATCH_STRING is not set | ||
452 | # CONFIG_NETFILTER_XT_MATCH_TCPMSS is not set | ||
453 | # CONFIG_NETFILTER_XT_MATCH_TIME is not set | ||
454 | # CONFIG_NETFILTER_XT_MATCH_U32 is not set | ||
455 | # CONFIG_NETFILTER_XT_MATCH_HASHLIMIT is not set | ||
456 | |||
457 | # | ||
458 | # IP: Netfilter Configuration | ||
459 | # | ||
460 | CONFIG_IP_NF_QUEUE=m | ||
461 | CONFIG_IP_NF_IPTABLES=m | ||
462 | CONFIG_IP_NF_MATCH_RECENT=m | ||
463 | CONFIG_IP_NF_MATCH_ECN=m | ||
464 | # CONFIG_IP_NF_MATCH_AH is not set | ||
465 | CONFIG_IP_NF_MATCH_TTL=m | ||
466 | CONFIG_IP_NF_MATCH_ADDRTYPE=m | ||
467 | CONFIG_IP_NF_FILTER=m | ||
468 | CONFIG_IP_NF_TARGET_REJECT=m | ||
469 | CONFIG_IP_NF_TARGET_LOG=m | ||
470 | CONFIG_IP_NF_TARGET_ULOG=m | ||
471 | CONFIG_IP_NF_MANGLE=m | ||
472 | CONFIG_IP_NF_TARGET_ECN=m | ||
473 | # CONFIG_IP_NF_TARGET_TTL is not set | ||
474 | CONFIG_IP_NF_RAW=m | ||
475 | CONFIG_IP_NF_ARPTABLES=m | ||
476 | CONFIG_IP_NF_ARPFILTER=m | ||
477 | CONFIG_IP_NF_ARP_MANGLE=m | ||
478 | |||
479 | # | ||
480 | # IPv6: Netfilter Configuration | ||
481 | # | ||
482 | # CONFIG_IP6_NF_QUEUE is not set | ||
483 | CONFIG_IP6_NF_IPTABLES=m | ||
484 | CONFIG_IP6_NF_MATCH_RT=m | ||
485 | CONFIG_IP6_NF_MATCH_OPTS=m | ||
486 | CONFIG_IP6_NF_MATCH_FRAG=m | ||
487 | CONFIG_IP6_NF_MATCH_HL=m | ||
488 | CONFIG_IP6_NF_MATCH_IPV6HEADER=m | ||
489 | # CONFIG_IP6_NF_MATCH_AH is not set | ||
490 | # CONFIG_IP6_NF_MATCH_MH is not set | ||
491 | CONFIG_IP6_NF_MATCH_EUI64=m | ||
492 | CONFIG_IP6_NF_FILTER=m | ||
493 | CONFIG_IP6_NF_TARGET_LOG=m | ||
494 | # CONFIG_IP6_NF_TARGET_REJECT is not set | ||
495 | CONFIG_IP6_NF_MANGLE=m | ||
496 | # CONFIG_IP6_NF_TARGET_HL is not set | ||
497 | CONFIG_IP6_NF_RAW=m | ||
498 | |||
499 | # | ||
500 | # Bridge: Netfilter Configuration | ||
501 | # | ||
502 | CONFIG_BRIDGE_NF_EBTABLES=m | ||
503 | CONFIG_BRIDGE_EBT_BROUTE=m | ||
504 | CONFIG_BRIDGE_EBT_T_FILTER=m | ||
505 | CONFIG_BRIDGE_EBT_T_NAT=m | ||
506 | CONFIG_BRIDGE_EBT_802_3=m | ||
507 | CONFIG_BRIDGE_EBT_AMONG=m | ||
508 | CONFIG_BRIDGE_EBT_ARP=m | ||
509 | CONFIG_BRIDGE_EBT_IP=m | ||
510 | CONFIG_BRIDGE_EBT_LIMIT=m | ||
511 | CONFIG_BRIDGE_EBT_MARK=m | ||
512 | CONFIG_BRIDGE_EBT_PKTTYPE=m | ||
513 | CONFIG_BRIDGE_EBT_STP=m | ||
514 | CONFIG_BRIDGE_EBT_VLAN=m | ||
515 | CONFIG_BRIDGE_EBT_ARPREPLY=m | ||
516 | CONFIG_BRIDGE_EBT_DNAT=m | ||
517 | CONFIG_BRIDGE_EBT_MARK_T=m | ||
518 | CONFIG_BRIDGE_EBT_REDIRECT=m | ||
519 | CONFIG_BRIDGE_EBT_SNAT=m | ||
520 | CONFIG_BRIDGE_EBT_LOG=m | ||
521 | # CONFIG_BRIDGE_EBT_ULOG is not set | ||
522 | # CONFIG_BRIDGE_EBT_NFLOG is not set | ||
523 | # CONFIG_IP_DCCP is not set | ||
524 | CONFIG_IP_SCTP=m | ||
525 | # CONFIG_SCTP_DBG_MSG is not set | ||
526 | # CONFIG_SCTP_DBG_OBJCNT is not set | ||
527 | # CONFIG_SCTP_HMAC_NONE is not set | ||
528 | # CONFIG_SCTP_HMAC_SHA1 is not set | ||
529 | CONFIG_SCTP_HMAC_MD5=y | ||
530 | # CONFIG_TIPC is not set | ||
531 | CONFIG_ATM=m | ||
532 | CONFIG_ATM_CLIP=m | ||
533 | # CONFIG_ATM_CLIP_NO_ICMP is not set | ||
534 | CONFIG_ATM_LANE=m | ||
535 | # CONFIG_ATM_MPOA is not set | ||
536 | CONFIG_ATM_BR2684=m | ||
537 | # CONFIG_ATM_BR2684_IPFILTER is not set | ||
538 | CONFIG_BRIDGE=m | ||
539 | CONFIG_VLAN_8021Q=m | ||
540 | # CONFIG_DECNET is not set | ||
541 | CONFIG_LLC=m | ||
542 | # CONFIG_LLC2 is not set | ||
543 | # CONFIG_IPX is not set | ||
544 | # CONFIG_ATALK is not set | ||
545 | # CONFIG_X25 is not set | ||
546 | # CONFIG_LAPB is not set | ||
547 | # CONFIG_ECONET is not set | ||
548 | # CONFIG_WAN_ROUTER is not set | ||
549 | CONFIG_NET_SCHED=y | ||
550 | |||
551 | # | ||
552 | # Queueing/Scheduling | ||
553 | # | ||
554 | CONFIG_NET_SCH_CBQ=m | ||
555 | CONFIG_NET_SCH_HTB=m | ||
556 | CONFIG_NET_SCH_HFSC=m | ||
557 | CONFIG_NET_SCH_ATM=m | ||
558 | CONFIG_NET_SCH_PRIO=m | ||
559 | # CONFIG_NET_SCH_RR is not set | ||
560 | CONFIG_NET_SCH_RED=m | ||
561 | CONFIG_NET_SCH_SFQ=m | ||
562 | CONFIG_NET_SCH_TEQL=m | ||
563 | CONFIG_NET_SCH_TBF=m | ||
564 | CONFIG_NET_SCH_GRED=m | ||
565 | CONFIG_NET_SCH_DSMARK=m | ||
566 | CONFIG_NET_SCH_NETEM=m | ||
567 | |||
568 | # | ||
569 | # Classification | ||
570 | # | ||
571 | CONFIG_NET_CLS=y | ||
572 | # CONFIG_NET_CLS_BASIC is not set | ||
573 | CONFIG_NET_CLS_TCINDEX=m | ||
574 | CONFIG_NET_CLS_ROUTE4=m | ||
575 | CONFIG_NET_CLS_ROUTE=y | ||
576 | CONFIG_NET_CLS_FW=m | ||
577 | CONFIG_NET_CLS_U32=m | ||
578 | CONFIG_CLS_U32_PERF=y | ||
579 | # CONFIG_CLS_U32_MARK is not set | ||
580 | CONFIG_NET_CLS_RSVP=m | ||
581 | CONFIG_NET_CLS_RSVP6=m | ||
582 | # CONFIG_NET_CLS_FLOW is not set | ||
583 | # CONFIG_NET_EMATCH is not set | ||
584 | # CONFIG_NET_CLS_ACT is not set | ||
585 | CONFIG_NET_CLS_IND=y | ||
586 | CONFIG_NET_SCH_FIFO=y | ||
587 | |||
588 | # | ||
589 | # Network testing | ||
590 | # | ||
591 | # CONFIG_NET_PKTGEN is not set | ||
592 | # CONFIG_NET_TCPPROBE is not set | ||
593 | # CONFIG_HAMRADIO is not set | ||
594 | # CONFIG_CAN is not set | ||
595 | # CONFIG_IRDA is not set | ||
596 | CONFIG_BT=m | ||
597 | CONFIG_BT_L2CAP=m | ||
598 | CONFIG_BT_SCO=m | ||
599 | CONFIG_BT_RFCOMM=m | ||
600 | CONFIG_BT_RFCOMM_TTY=y | ||
601 | CONFIG_BT_BNEP=m | ||
602 | CONFIG_BT_BNEP_MC_FILTER=y | ||
603 | CONFIG_BT_BNEP_PROTO_FILTER=y | ||
604 | CONFIG_BT_CMTP=m | ||
605 | CONFIG_BT_HIDP=m | ||
606 | |||
607 | # | ||
608 | # Bluetooth device drivers | ||
609 | # | ||
610 | CONFIG_BT_HCIUSB=m | ||
611 | CONFIG_BT_HCIUSB_SCO=y | ||
612 | CONFIG_BT_HCIUART=m | ||
613 | CONFIG_BT_HCIUART_H4=y | ||
614 | CONFIG_BT_HCIUART_BCSP=y | ||
615 | # CONFIG_BT_HCIUART_LL is not set | ||
616 | CONFIG_BT_HCIBCM203X=m | ||
617 | # CONFIG_BT_HCIBPA10X is not set | ||
618 | CONFIG_BT_HCIBFUSB=m | ||
619 | CONFIG_BT_HCIVHCI=m | ||
620 | # CONFIG_AF_RXRPC is not set | ||
621 | CONFIG_FIB_RULES=y | ||
622 | |||
623 | # | ||
624 | # Wireless | ||
625 | # | ||
626 | # CONFIG_CFG80211 is not set | ||
627 | CONFIG_WIRELESS_EXT=y | ||
628 | # CONFIG_MAC80211 is not set | ||
629 | CONFIG_IEEE80211=m | ||
630 | # CONFIG_IEEE80211_DEBUG is not set | ||
631 | CONFIG_IEEE80211_CRYPT_WEP=m | ||
632 | CONFIG_IEEE80211_CRYPT_CCMP=m | ||
633 | CONFIG_IEEE80211_CRYPT_TKIP=m | ||
634 | # CONFIG_RFKILL is not set | ||
635 | # CONFIG_NET_9P is not set | ||
636 | |||
637 | # | ||
638 | # Device Drivers | ||
639 | # | ||
640 | |||
641 | # | ||
642 | # Generic Driver Options | ||
643 | # | ||
644 | CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug" | ||
645 | CONFIG_STANDALONE=y | ||
646 | CONFIG_PREVENT_FIRMWARE_BUILD=y | ||
647 | CONFIG_FW_LOADER=y | ||
648 | # CONFIG_DEBUG_DRIVER is not set | ||
649 | # CONFIG_DEBUG_DEVRES is not set | ||
650 | # CONFIG_SYS_HYPERVISOR is not set | ||
651 | # CONFIG_CONNECTOR is not set | ||
652 | CONFIG_MTD=y | ||
653 | # CONFIG_MTD_DEBUG is not set | ||
654 | CONFIG_MTD_CONCAT=m | ||
655 | CONFIG_MTD_PARTITIONS=y | ||
656 | # CONFIG_MTD_REDBOOT_PARTS is not set | ||
657 | # CONFIG_MTD_CMDLINE_PARTS is not set | ||
658 | CONFIG_MTD_OF_PARTS=y | ||
659 | # CONFIG_MTD_AR7_PARTS is not set | ||
660 | |||
661 | # | ||
662 | # User Modules And Translation Layers | ||
663 | # | ||
664 | CONFIG_MTD_CHAR=m | ||
665 | CONFIG_MTD_BLKDEVS=y | ||
666 | CONFIG_MTD_BLOCK=y | ||
667 | # CONFIG_FTL is not set | ||
668 | # CONFIG_NFTL is not set | ||
669 | # CONFIG_INFTL is not set | ||
670 | # CONFIG_RFD_FTL is not set | ||
671 | # CONFIG_SSFDC is not set | ||
672 | # CONFIG_MTD_OOPS is not set | ||
673 | |||
674 | # | ||
675 | # RAM/ROM/Flash chip drivers | ||
676 | # | ||
677 | CONFIG_MTD_CFI=y | ||
678 | # CONFIG_MTD_JEDECPROBE is not set | ||
679 | CONFIG_MTD_GEN_PROBE=y | ||
680 | # CONFIG_MTD_CFI_ADV_OPTIONS is not set | ||
681 | CONFIG_MTD_MAP_BANK_WIDTH_1=y | ||
682 | CONFIG_MTD_MAP_BANK_WIDTH_2=y | ||
683 | CONFIG_MTD_MAP_BANK_WIDTH_4=y | ||
684 | # CONFIG_MTD_MAP_BANK_WIDTH_8 is not set | ||
685 | # CONFIG_MTD_MAP_BANK_WIDTH_16 is not set | ||
686 | # CONFIG_MTD_MAP_BANK_WIDTH_32 is not set | ||
687 | CONFIG_MTD_CFI_I1=y | ||
688 | CONFIG_MTD_CFI_I2=y | ||
689 | CONFIG_MTD_CFI_I4=y | ||
690 | # CONFIG_MTD_CFI_I8 is not set | ||
691 | # CONFIG_MTD_CFI_INTELEXT is not set | ||
692 | CONFIG_MTD_CFI_AMDSTD=y | ||
693 | # CONFIG_MTD_CFI_STAA is not set | ||
694 | CONFIG_MTD_CFI_UTIL=y | ||
695 | # CONFIG_MTD_RAM is not set | ||
696 | # CONFIG_MTD_ROM is not set | ||
697 | # CONFIG_MTD_ABSENT is not set | ||
698 | |||
699 | # | ||
700 | # Mapping drivers for chip access | ||
701 | # | ||
702 | CONFIG_MTD_COMPLEX_MAPPINGS=y | ||
703 | # CONFIG_MTD_PHYSMAP is not set | ||
704 | CONFIG_MTD_PHYSMAP_OF=y | ||
705 | # CONFIG_MTD_PCI is not set | ||
706 | # CONFIG_MTD_INTEL_VR_NOR is not set | ||
707 | # CONFIG_MTD_PLATRAM is not set | ||
708 | |||
709 | # | ||
710 | # Self-contained MTD device drivers | ||
711 | # | ||
712 | # CONFIG_MTD_PMC551 is not set | ||
713 | # CONFIG_MTD_SLRAM is not set | ||
714 | # CONFIG_MTD_PHRAM is not set | ||
715 | # CONFIG_MTD_MTDRAM is not set | ||
716 | # CONFIG_MTD_BLOCK2MTD is not set | ||
717 | |||
718 | # | ||
719 | # Disk-On-Chip Device Drivers | ||
720 | # | ||
721 | # CONFIG_MTD_DOC2000 is not set | ||
722 | # CONFIG_MTD_DOC2001 is not set | ||
723 | # CONFIG_MTD_DOC2001PLUS is not set | ||
724 | # CONFIG_MTD_NAND is not set | ||
725 | # CONFIG_MTD_ONENAND is not set | ||
726 | |||
727 | # | ||
728 | # UBI - Unsorted block images | ||
729 | # | ||
730 | # CONFIG_MTD_UBI is not set | ||
731 | CONFIG_OF_DEVICE=y | ||
732 | CONFIG_OF_I2C=m | ||
733 | # CONFIG_PARPORT is not set | ||
734 | CONFIG_BLK_DEV=y | ||
735 | # CONFIG_BLK_DEV_FD is not set | ||
736 | # CONFIG_BLK_CPQ_DA is not set | ||
737 | # CONFIG_BLK_CPQ_CISS_DA is not set | ||
738 | # CONFIG_BLK_DEV_DAC960 is not set | ||
739 | # CONFIG_BLK_DEV_UMEM is not set | ||
740 | # CONFIG_BLK_DEV_COW_COMMON is not set | ||
741 | CONFIG_BLK_DEV_LOOP=m | ||
742 | CONFIG_BLK_DEV_CRYPTOLOOP=m | ||
743 | CONFIG_BLK_DEV_NBD=m | ||
744 | # CONFIG_BLK_DEV_SX8 is not set | ||
745 | # CONFIG_BLK_DEV_UB is not set | ||
746 | CONFIG_BLK_DEV_RAM=y | ||
747 | CONFIG_BLK_DEV_RAM_COUNT=16 | ||
748 | CONFIG_BLK_DEV_RAM_SIZE=16384 | ||
749 | # CONFIG_BLK_DEV_XIP is not set | ||
750 | # CONFIG_CDROM_PKTCDVD is not set | ||
751 | # CONFIG_ATA_OVER_ETH is not set | ||
752 | # CONFIG_MISC_DEVICES is not set | ||
753 | CONFIG_HAVE_IDE=y | ||
754 | # CONFIG_IDE is not set | ||
755 | |||
756 | # | ||
757 | # SCSI device support | ||
758 | # | ||
759 | # CONFIG_RAID_ATTRS is not set | ||
760 | CONFIG_SCSI=m | ||
761 | CONFIG_SCSI_DMA=y | ||
762 | # CONFIG_SCSI_TGT is not set | ||
763 | CONFIG_SCSI_NETLINK=y | ||
764 | CONFIG_SCSI_PROC_FS=y | ||
765 | |||
766 | # | ||
767 | # SCSI support type (disk, tape, CD-ROM) | ||
768 | # | ||
769 | CONFIG_BLK_DEV_SD=m | ||
770 | CONFIG_CHR_DEV_ST=m | ||
771 | CONFIG_CHR_DEV_OSST=m | ||
772 | CONFIG_BLK_DEV_SR=m | ||
773 | CONFIG_BLK_DEV_SR_VENDOR=y | ||
774 | CONFIG_CHR_DEV_SG=m | ||
775 | # CONFIG_CHR_DEV_SCH is not set | ||
776 | |||
777 | # | ||
778 | # Some SCSI devices (e.g. CD jukebox) support multiple LUNs | ||
779 | # | ||
780 | # CONFIG_SCSI_MULTI_LUN is not set | ||
781 | CONFIG_SCSI_CONSTANTS=y | ||
782 | CONFIG_SCSI_LOGGING=y | ||
783 | # CONFIG_SCSI_SCAN_ASYNC is not set | ||
784 | CONFIG_SCSI_WAIT_SCAN=m | ||
785 | |||
786 | # | ||
787 | # SCSI Transports | ||
788 | # | ||
789 | CONFIG_SCSI_SPI_ATTRS=m | ||
790 | CONFIG_SCSI_FC_ATTRS=m | ||
791 | CONFIG_SCSI_ISCSI_ATTRS=m | ||
792 | # CONFIG_SCSI_SAS_LIBSAS is not set | ||
793 | CONFIG_SCSI_SRP_ATTRS=m | ||
794 | CONFIG_SCSI_LOWLEVEL=y | ||
795 | # CONFIG_ISCSI_TCP is not set | ||
796 | CONFIG_BLK_DEV_3W_XXXX_RAID=m | ||
797 | CONFIG_SCSI_3W_9XXX=m | ||
798 | CONFIG_SCSI_ACARD=m | ||
799 | CONFIG_SCSI_AACRAID=m | ||
800 | CONFIG_SCSI_AIC7XXX=m | ||
801 | CONFIG_AIC7XXX_CMDS_PER_DEVICE=4 | ||
802 | CONFIG_AIC7XXX_RESET_DELAY_MS=15000 | ||
803 | # CONFIG_AIC7XXX_DEBUG_ENABLE is not set | ||
804 | CONFIG_AIC7XXX_DEBUG_MASK=0 | ||
805 | # CONFIG_AIC7XXX_REG_PRETTY_PRINT is not set | ||
806 | CONFIG_SCSI_AIC7XXX_OLD=m | ||
807 | CONFIG_SCSI_AIC79XX=m | ||
808 | CONFIG_AIC79XX_CMDS_PER_DEVICE=4 | ||
809 | CONFIG_AIC79XX_RESET_DELAY_MS=15000 | ||
810 | # CONFIG_AIC79XX_DEBUG_ENABLE is not set | ||
811 | CONFIG_AIC79XX_DEBUG_MASK=0 | ||
812 | # CONFIG_AIC79XX_REG_PRETTY_PRINT is not set | ||
813 | # CONFIG_SCSI_AIC94XX is not set | ||
814 | # CONFIG_SCSI_DPT_I2O is not set | ||
815 | # CONFIG_SCSI_ADVANSYS is not set | ||
816 | CONFIG_SCSI_ARCMSR=m | ||
817 | CONFIG_MEGARAID_NEWGEN=y | ||
818 | CONFIG_MEGARAID_MM=m | ||
819 | CONFIG_MEGARAID_MAILBOX=m | ||
820 | # CONFIG_MEGARAID_LEGACY is not set | ||
821 | CONFIG_MEGARAID_SAS=m | ||
822 | # CONFIG_SCSI_HPTIOP is not set | ||
823 | # CONFIG_SCSI_BUSLOGIC is not set | ||
824 | # CONFIG_SCSI_DMX3191D is not set | ||
825 | # CONFIG_SCSI_EATA is not set | ||
826 | CONFIG_SCSI_FUTURE_DOMAIN=m | ||
827 | CONFIG_SCSI_GDTH=m | ||
828 | CONFIG_SCSI_IPS=m | ||
829 | CONFIG_SCSI_INITIO=m | ||
830 | # CONFIG_SCSI_INIA100 is not set | ||
831 | # CONFIG_SCSI_MVSAS is not set | ||
832 | # CONFIG_SCSI_STEX is not set | ||
833 | CONFIG_SCSI_SYM53C8XX_2=m | ||
834 | CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=1 | ||
835 | CONFIG_SCSI_SYM53C8XX_DEFAULT_TAGS=16 | ||
836 | CONFIG_SCSI_SYM53C8XX_MAX_TAGS=64 | ||
837 | CONFIG_SCSI_SYM53C8XX_MMIO=y | ||
838 | CONFIG_SCSI_QLOGIC_1280=m | ||
839 | # CONFIG_SCSI_QLA_FC is not set | ||
840 | # CONFIG_SCSI_QLA_ISCSI is not set | ||
841 | CONFIG_SCSI_LPFC=m | ||
842 | # CONFIG_SCSI_DC395x is not set | ||
843 | # CONFIG_SCSI_DC390T is not set | ||
844 | # CONFIG_SCSI_NSP32 is not set | ||
845 | # CONFIG_SCSI_DEBUG is not set | ||
846 | # CONFIG_SCSI_SRP is not set | ||
847 | # CONFIG_ATA is not set | ||
848 | # CONFIG_MD is not set | ||
849 | # CONFIG_FUSION is not set | ||
850 | |||
851 | # | ||
852 | # IEEE 1394 (FireWire) support | ||
853 | # | ||
854 | # CONFIG_FIREWIRE is not set | ||
855 | # CONFIG_IEEE1394 is not set | ||
856 | # CONFIG_I2O is not set | ||
857 | # CONFIG_MACINTOSH_DRIVERS is not set | ||
858 | CONFIG_NETDEVICES=y | ||
859 | # CONFIG_NETDEVICES_MULTIQUEUE is not set | ||
860 | CONFIG_DUMMY=m | ||
861 | CONFIG_BONDING=m | ||
862 | # CONFIG_MACVLAN is not set | ||
863 | # CONFIG_EQUALIZER is not set | ||
864 | CONFIG_TUN=m | ||
865 | # CONFIG_VETH is not set | ||
866 | # CONFIG_ARCNET is not set | ||
867 | CONFIG_PHYLIB=y | ||
868 | |||
869 | # | ||
870 | # MII PHY device drivers | ||
871 | # | ||
872 | # CONFIG_MARVELL_PHY is not set | ||
873 | # CONFIG_DAVICOM_PHY is not set | ||
874 | # CONFIG_QSEMI_PHY is not set | ||
875 | # CONFIG_LXT_PHY is not set | ||
876 | # CONFIG_CICADA_PHY is not set | ||
877 | CONFIG_VITESSE_PHY=y | ||
878 | # CONFIG_SMSC_PHY is not set | ||
879 | # CONFIG_BROADCOM_PHY is not set | ||
880 | # CONFIG_ICPLUS_PHY is not set | ||
881 | # CONFIG_REALTEK_PHY is not set | ||
882 | # CONFIG_FIXED_PHY is not set | ||
883 | # CONFIG_MDIO_BITBANG is not set | ||
884 | CONFIG_NET_ETHERNET=y | ||
885 | CONFIG_MII=y | ||
886 | # CONFIG_HAPPYMEAL is not set | ||
887 | # CONFIG_SUNGEM is not set | ||
888 | # CONFIG_CASSINI is not set | ||
889 | # CONFIG_NET_VENDOR_3COM is not set | ||
890 | # CONFIG_NET_TULIP is not set | ||
891 | # CONFIG_HP100 is not set | ||
892 | # CONFIG_IBM_NEW_EMAC_ZMII is not set | ||
893 | # CONFIG_IBM_NEW_EMAC_RGMII is not set | ||
894 | # CONFIG_IBM_NEW_EMAC_TAH is not set | ||
895 | # CONFIG_IBM_NEW_EMAC_EMAC4 is not set | ||
896 | # CONFIG_NET_PCI is not set | ||
897 | # CONFIG_B44 is not set | ||
898 | CONFIG_NETDEV_1000=y | ||
899 | # CONFIG_ACENIC is not set | ||
900 | # CONFIG_DL2K is not set | ||
901 | # CONFIG_E1000 is not set | ||
902 | # CONFIG_E1000E is not set | ||
903 | # CONFIG_E1000E_ENABLED is not set | ||
904 | # CONFIG_IP1000 is not set | ||
905 | # CONFIG_IGB is not set | ||
906 | # CONFIG_NS83820 is not set | ||
907 | # CONFIG_HAMACHI is not set | ||
908 | # CONFIG_YELLOWFIN is not set | ||
909 | # CONFIG_R8169 is not set | ||
910 | # CONFIG_SIS190 is not set | ||
911 | # CONFIG_SKGE is not set | ||
912 | # CONFIG_SKY2 is not set | ||
913 | # CONFIG_VIA_VELOCITY is not set | ||
914 | # CONFIG_TIGON3 is not set | ||
915 | # CONFIG_BNX2 is not set | ||
916 | CONFIG_MV643XX_ETH=y | ||
917 | # CONFIG_QLA3XXX is not set | ||
918 | # CONFIG_ATL1 is not set | ||
919 | # CONFIG_NETDEV_10000 is not set | ||
920 | # CONFIG_TR is not set | ||
921 | |||
922 | # | ||
923 | # Wireless LAN | ||
924 | # | ||
925 | # CONFIG_WLAN_PRE80211 is not set | ||
926 | # CONFIG_WLAN_80211 is not set | ||
927 | # CONFIG_IWLWIFI_LEDS is not set | ||
928 | |||
929 | # | ||
930 | # USB Network Adapters | ||
931 | # | ||
932 | # CONFIG_USB_CATC is not set | ||
933 | # CONFIG_USB_KAWETH is not set | ||
934 | # CONFIG_USB_PEGASUS is not set | ||
935 | # CONFIG_USB_RTL8150 is not set | ||
936 | # CONFIG_USB_USBNET is not set | ||
937 | # CONFIG_WAN is not set | ||
938 | # CONFIG_ATM_DRIVERS is not set | ||
939 | # CONFIG_FDDI is not set | ||
940 | # CONFIG_HIPPI is not set | ||
941 | # CONFIG_PPP is not set | ||
942 | # CONFIG_SLIP is not set | ||
943 | CONFIG_SLHC=m | ||
944 | # CONFIG_NET_FC is not set | ||
945 | CONFIG_NETCONSOLE=m | ||
946 | # CONFIG_NETCONSOLE_DYNAMIC is not set | ||
947 | CONFIG_NETPOLL=y | ||
948 | CONFIG_NETPOLL_TRAP=y | ||
949 | CONFIG_NET_POLL_CONTROLLER=y | ||
950 | CONFIG_ISDN=m | ||
951 | CONFIG_ISDN_I4L=m | ||
952 | CONFIG_ISDN_PPP=y | ||
953 | CONFIG_ISDN_PPP_VJ=y | ||
954 | CONFIG_ISDN_MPP=y | ||
955 | CONFIG_IPPP_FILTER=y | ||
956 | # CONFIG_ISDN_PPP_BSDCOMP is not set | ||
957 | CONFIG_ISDN_AUDIO=y | ||
958 | CONFIG_ISDN_TTY_FAX=y | ||
959 | |||
960 | # | ||
961 | # ISDN feature submodules | ||
962 | # | ||
963 | CONFIG_ISDN_DRV_LOOP=m | ||
964 | # CONFIG_ISDN_DIVERSION is not set | ||
965 | |||
966 | # | ||
967 | # ISDN4Linux hardware drivers | ||
968 | # | ||
969 | |||
970 | # | ||
971 | # Passive cards | ||
972 | # | ||
973 | CONFIG_ISDN_DRV_HISAX=m | ||
974 | |||
975 | # | ||
976 | # D-channel protocol features | ||
977 | # | ||
978 | CONFIG_HISAX_EURO=y | ||
979 | CONFIG_DE_AOC=y | ||
980 | CONFIG_HISAX_NO_SENDCOMPLETE=y | ||
981 | CONFIG_HISAX_NO_LLC=y | ||
982 | CONFIG_HISAX_NO_KEYPAD=y | ||
983 | CONFIG_HISAX_1TR6=y | ||
984 | CONFIG_HISAX_NI1=y | ||
985 | CONFIG_HISAX_MAX_CARDS=8 | ||
986 | |||
987 | # | ||
988 | # HiSax supported cards | ||
989 | # | ||
990 | CONFIG_HISAX_16_3=y | ||
991 | CONFIG_HISAX_S0BOX=y | ||
992 | CONFIG_HISAX_FRITZPCI=y | ||
993 | CONFIG_HISAX_AVM_A1_PCMCIA=y | ||
994 | CONFIG_HISAX_ELSA=y | ||
995 | CONFIG_HISAX_DIEHLDIVA=y | ||
996 | CONFIG_HISAX_SEDLBAUER=y | ||
997 | CONFIG_HISAX_NICCY=y | ||
998 | CONFIG_HISAX_BKM_A4T=y | ||
999 | CONFIG_HISAX_SCT_QUADRO=y | ||
1000 | CONFIG_HISAX_GAZEL=y | ||
1001 | CONFIG_HISAX_W6692=y | ||
1002 | CONFIG_HISAX_HFC_SX=y | ||
1003 | # CONFIG_HISAX_DEBUG is not set | ||
1004 | |||
1005 | # | ||
1006 | # HiSax PCMCIA card service modules | ||
1007 | # | ||
1008 | |||
1009 | # | ||
1010 | # HiSax sub driver modules | ||
1011 | # | ||
1012 | CONFIG_HISAX_ST5481=m | ||
1013 | CONFIG_HISAX_HFCUSB=m | ||
1014 | # CONFIG_HISAX_HFC4S8S is not set | ||
1015 | CONFIG_HISAX_FRITZ_PCIPNP=m | ||
1016 | CONFIG_HISAX_HDLC=y | ||
1017 | |||
1018 | # | ||
1019 | # Active cards | ||
1020 | # | ||
1021 | CONFIG_HYSDN=m | ||
1022 | CONFIG_HYSDN_CAPI=y | ||
1023 | # CONFIG_ISDN_DRV_GIGASET is not set | ||
1024 | CONFIG_ISDN_CAPI=m | ||
1025 | CONFIG_ISDN_DRV_AVMB1_VERBOSE_REASON=y | ||
1026 | CONFIG_CAPI_TRACE=y | ||
1027 | CONFIG_ISDN_CAPI_MIDDLEWARE=y | ||
1028 | CONFIG_ISDN_CAPI_CAPI20=m | ||
1029 | CONFIG_ISDN_CAPI_CAPIFS_BOOL=y | ||
1030 | CONFIG_ISDN_CAPI_CAPIFS=m | ||
1031 | CONFIG_ISDN_CAPI_CAPIDRV=m | ||
1032 | |||
1033 | # | ||
1034 | # CAPI hardware drivers | ||
1035 | # | ||
1036 | CONFIG_CAPI_AVM=y | ||
1037 | CONFIG_ISDN_DRV_AVMB1_B1PCI=m | ||
1038 | CONFIG_ISDN_DRV_AVMB1_B1PCIV4=y | ||
1039 | CONFIG_ISDN_DRV_AVMB1_B1PCMCIA=m | ||
1040 | CONFIG_ISDN_DRV_AVMB1_T1PCI=m | ||
1041 | CONFIG_ISDN_DRV_AVMB1_C4=m | ||
1042 | CONFIG_CAPI_EICON=y | ||
1043 | CONFIG_ISDN_DIVAS=m | ||
1044 | CONFIG_ISDN_DIVAS_BRIPCI=y | ||
1045 | CONFIG_ISDN_DIVAS_PRIPCI=y | ||
1046 | CONFIG_ISDN_DIVAS_DIVACAPI=m | ||
1047 | CONFIG_ISDN_DIVAS_USERIDI=m | ||
1048 | CONFIG_ISDN_DIVAS_MAINT=m | ||
1049 | # CONFIG_PHONE is not set | ||
1050 | |||
1051 | # | ||
1052 | # Input device support | ||
1053 | # | ||
1054 | CONFIG_INPUT=y | ||
1055 | # CONFIG_INPUT_FF_MEMLESS is not set | ||
1056 | # CONFIG_INPUT_POLLDEV is not set | ||
1057 | |||
1058 | # | ||
1059 | # Userland interfaces | ||
1060 | # | ||
1061 | CONFIG_INPUT_MOUSEDEV=y | ||
1062 | # CONFIG_INPUT_MOUSEDEV_PSAUX is not set | ||
1063 | CONFIG_INPUT_MOUSEDEV_SCREEN_X=1024 | ||
1064 | CONFIG_INPUT_MOUSEDEV_SCREEN_Y=768 | ||
1065 | # CONFIG_INPUT_JOYDEV is not set | ||
1066 | CONFIG_INPUT_EVDEV=y | ||
1067 | # CONFIG_INPUT_EVBUG is not set | ||
1068 | |||
1069 | # | ||
1070 | # Input Device Drivers | ||
1071 | # | ||
1072 | # CONFIG_INPUT_KEYBOARD is not set | ||
1073 | # CONFIG_INPUT_MOUSE is not set | ||
1074 | # CONFIG_INPUT_JOYSTICK is not set | ||
1075 | # CONFIG_INPUT_TABLET is not set | ||
1076 | # CONFIG_INPUT_TOUCHSCREEN is not set | ||
1077 | CONFIG_INPUT_MISC=y | ||
1078 | # CONFIG_INPUT_ATI_REMOTE is not set | ||
1079 | # CONFIG_INPUT_ATI_REMOTE2 is not set | ||
1080 | # CONFIG_INPUT_KEYSPAN_REMOTE is not set | ||
1081 | # CONFIG_INPUT_POWERMATE is not set | ||
1082 | # CONFIG_INPUT_YEALINK is not set | ||
1083 | CONFIG_INPUT_UINPUT=m | ||
1084 | |||
1085 | # | ||
1086 | # Hardware I/O ports | ||
1087 | # | ||
1088 | # CONFIG_SERIO is not set | ||
1089 | # CONFIG_GAMEPORT is not set | ||
1090 | |||
1091 | # | ||
1092 | # Character devices | ||
1093 | # | ||
1094 | CONFIG_VT=y | ||
1095 | CONFIG_VT_CONSOLE=y | ||
1096 | CONFIG_HW_CONSOLE=y | ||
1097 | # CONFIG_VT_HW_CONSOLE_BINDING is not set | ||
1098 | CONFIG_DEVKMEM=y | ||
1099 | CONFIG_SERIAL_NONSTANDARD=y | ||
1100 | # CONFIG_COMPUTONE is not set | ||
1101 | # CONFIG_ROCKETPORT is not set | ||
1102 | # CONFIG_CYCLADES is not set | ||
1103 | # CONFIG_DIGIEPCA is not set | ||
1104 | # CONFIG_MOXA_INTELLIO is not set | ||
1105 | # CONFIG_MOXA_SMARTIO is not set | ||
1106 | # CONFIG_ISI is not set | ||
1107 | # CONFIG_SYNCLINK is not set | ||
1108 | # CONFIG_SYNCLINKMP is not set | ||
1109 | # CONFIG_SYNCLINK_GT is not set | ||
1110 | # CONFIG_N_HDLC is not set | ||
1111 | # CONFIG_RISCOM8 is not set | ||
1112 | # CONFIG_SPECIALIX is not set | ||
1113 | # CONFIG_SX is not set | ||
1114 | # CONFIG_RIO is not set | ||
1115 | # CONFIG_STALDRV is not set | ||
1116 | # CONFIG_NOZOMI is not set | ||
1117 | |||
1118 | # | ||
1119 | # Serial drivers | ||
1120 | # | ||
1121 | # CONFIG_SERIAL_8250 is not set | ||
1122 | |||
1123 | # | ||
1124 | # Non-8250 serial port support | ||
1125 | # | ||
1126 | CONFIG_SERIAL_MPSC=y | ||
1127 | CONFIG_SERIAL_MPSC_CONSOLE=y | ||
1128 | # CONFIG_SERIAL_UARTLITE is not set | ||
1129 | CONFIG_SERIAL_CORE=y | ||
1130 | CONFIG_SERIAL_CORE_CONSOLE=y | ||
1131 | # CONFIG_SERIAL_JSM is not set | ||
1132 | CONFIG_UNIX98_PTYS=y | ||
1133 | # CONFIG_LEGACY_PTYS is not set | ||
1134 | # CONFIG_IPMI_HANDLER is not set | ||
1135 | CONFIG_HW_RANDOM=m | ||
1136 | CONFIG_NVRAM=m | ||
1137 | CONFIG_GEN_RTC=m | ||
1138 | # CONFIG_GEN_RTC_X is not set | ||
1139 | # CONFIG_R3964 is not set | ||
1140 | # CONFIG_APPLICOM is not set | ||
1141 | CONFIG_RAW_DRIVER=y | ||
1142 | CONFIG_MAX_RAW_DEVS=8192 | ||
1143 | # CONFIG_TCG_TPM is not set | ||
1144 | CONFIG_DEVPORT=y | ||
1145 | CONFIG_I2C=m | ||
1146 | CONFIG_I2C_BOARDINFO=y | ||
1147 | CONFIG_I2C_CHARDEV=m | ||
1148 | |||
1149 | # | ||
1150 | # I2C Hardware Bus support | ||
1151 | # | ||
1152 | # CONFIG_I2C_ALI1535 is not set | ||
1153 | # CONFIG_I2C_ALI1563 is not set | ||
1154 | # CONFIG_I2C_ALI15X3 is not set | ||
1155 | # CONFIG_I2C_AMD756 is not set | ||
1156 | # CONFIG_I2C_AMD8111 is not set | ||
1157 | # CONFIG_I2C_I801 is not set | ||
1158 | # CONFIG_I2C_I810 is not set | ||
1159 | # CONFIG_I2C_PIIX4 is not set | ||
1160 | # CONFIG_I2C_MPC is not set | ||
1161 | # CONFIG_I2C_NFORCE2 is not set | ||
1162 | # CONFIG_I2C_OCORES is not set | ||
1163 | # CONFIG_I2C_PARPORT_LIGHT is not set | ||
1164 | # CONFIG_I2C_PROSAVAGE is not set | ||
1165 | # CONFIG_I2C_SAVAGE4 is not set | ||
1166 | # CONFIG_I2C_SIMTEC is not set | ||
1167 | # CONFIG_I2C_SIS5595 is not set | ||
1168 | # CONFIG_I2C_SIS630 is not set | ||
1169 | # CONFIG_I2C_SIS96X is not set | ||
1170 | # CONFIG_I2C_TAOS_EVM is not set | ||
1171 | # CONFIG_I2C_STUB is not set | ||
1172 | # CONFIG_I2C_TINY_USB is not set | ||
1173 | # CONFIG_I2C_VIA is not set | ||
1174 | # CONFIG_I2C_VIAPRO is not set | ||
1175 | # CONFIG_I2C_VOODOO3 is not set | ||
1176 | # CONFIG_I2C_PCA_PLATFORM is not set | ||
1177 | CONFIG_I2C_MV64XXX=m | ||
1178 | |||
1179 | # | ||
1180 | # Miscellaneous I2C Chip support | ||
1181 | # | ||
1182 | # CONFIG_DS1682 is not set | ||
1183 | CONFIG_SENSORS_EEPROM=m | ||
1184 | CONFIG_SENSORS_PCF8574=m | ||
1185 | # CONFIG_PCF8575 is not set | ||
1186 | CONFIG_SENSORS_PCF8591=m | ||
1187 | # CONFIG_SENSORS_MAX6875 is not set | ||
1188 | # CONFIG_SENSORS_TSL2550 is not set | ||
1189 | # CONFIG_I2C_DEBUG_CORE is not set | ||
1190 | # CONFIG_I2C_DEBUG_ALGO is not set | ||
1191 | # CONFIG_I2C_DEBUG_BUS is not set | ||
1192 | # CONFIG_I2C_DEBUG_CHIP is not set | ||
1193 | # CONFIG_SPI is not set | ||
1194 | # CONFIG_W1 is not set | ||
1195 | # CONFIG_POWER_SUPPLY is not set | ||
1196 | CONFIG_HWMON=m | ||
1197 | CONFIG_HWMON_VID=m | ||
1198 | # CONFIG_SENSORS_AD7418 is not set | ||
1199 | CONFIG_SENSORS_ADM1021=m | ||
1200 | CONFIG_SENSORS_ADM1025=m | ||
1201 | CONFIG_SENSORS_ADM1026=m | ||
1202 | # CONFIG_SENSORS_ADM1029 is not set | ||
1203 | CONFIG_SENSORS_ADM1031=m | ||
1204 | # CONFIG_SENSORS_ADM9240 is not set | ||
1205 | # CONFIG_SENSORS_ADT7470 is not set | ||
1206 | # CONFIG_SENSORS_ADT7473 is not set | ||
1207 | # CONFIG_SENSORS_ATXP1 is not set | ||
1208 | CONFIG_SENSORS_DS1621=m | ||
1209 | # CONFIG_SENSORS_I5K_AMB is not set | ||
1210 | # CONFIG_SENSORS_F71805F is not set | ||
1211 | # CONFIG_SENSORS_F71882FG is not set | ||
1212 | # CONFIG_SENSORS_F75375S is not set | ||
1213 | CONFIG_SENSORS_GL518SM=m | ||
1214 | # CONFIG_SENSORS_GL520SM is not set | ||
1215 | CONFIG_SENSORS_IT87=m | ||
1216 | # CONFIG_SENSORS_LM63 is not set | ||
1217 | CONFIG_SENSORS_LM75=m | ||
1218 | CONFIG_SENSORS_LM77=m | ||
1219 | CONFIG_SENSORS_LM78=m | ||
1220 | CONFIG_SENSORS_LM80=m | ||
1221 | CONFIG_SENSORS_LM83=m | ||
1222 | CONFIG_SENSORS_LM85=m | ||
1223 | CONFIG_SENSORS_LM87=m | ||
1224 | CONFIG_SENSORS_LM90=m | ||
1225 | # CONFIG_SENSORS_LM92 is not set | ||
1226 | # CONFIG_SENSORS_LM93 is not set | ||
1227 | CONFIG_SENSORS_MAX1619=m | ||
1228 | # CONFIG_SENSORS_MAX6650 is not set | ||
1229 | # CONFIG_SENSORS_PC87360 is not set | ||
1230 | # CONFIG_SENSORS_PC87427 is not set | ||
1231 | # CONFIG_SENSORS_SIS5595 is not set | ||
1232 | # CONFIG_SENSORS_DME1737 is not set | ||
1233 | CONFIG_SENSORS_SMSC47M1=m | ||
1234 | # CONFIG_SENSORS_SMSC47M192 is not set | ||
1235 | CONFIG_SENSORS_SMSC47B397=m | ||
1236 | # CONFIG_SENSORS_ADS7828 is not set | ||
1237 | # CONFIG_SENSORS_THMC50 is not set | ||
1238 | CONFIG_SENSORS_VIA686A=m | ||
1239 | # CONFIG_SENSORS_VT1211 is not set | ||
1240 | # CONFIG_SENSORS_VT8231 is not set | ||
1241 | CONFIG_SENSORS_W83781D=m | ||
1242 | # CONFIG_SENSORS_W83791D is not set | ||
1243 | # CONFIG_SENSORS_W83792D is not set | ||
1244 | # CONFIG_SENSORS_W83793 is not set | ||
1245 | CONFIG_SENSORS_W83L785TS=m | ||
1246 | # CONFIG_SENSORS_W83L786NG is not set | ||
1247 | CONFIG_SENSORS_W83627HF=m | ||
1248 | # CONFIG_SENSORS_W83627EHF is not set | ||
1249 | # CONFIG_HWMON_DEBUG_CHIP is not set | ||
1250 | # CONFIG_THERMAL is not set | ||
1251 | CONFIG_WATCHDOG=y | ||
1252 | # CONFIG_WATCHDOG_NOWAYOUT is not set | ||
1253 | |||
1254 | # | ||
1255 | # Watchdog Device Drivers | ||
1256 | # | ||
1257 | CONFIG_SOFT_WATCHDOG=m | ||
1258 | # CONFIG_MV64X60_WDT is not set | ||
1259 | |||
1260 | # | ||
1261 | # PCI-based Watchdog Cards | ||
1262 | # | ||
1263 | CONFIG_PCIPCWATCHDOG=m | ||
1264 | CONFIG_WDTPCI=m | ||
1265 | CONFIG_WDT_501_PCI=y | ||
1266 | |||
1267 | # | ||
1268 | # USB-based Watchdog Cards | ||
1269 | # | ||
1270 | CONFIG_USBPCWATCHDOG=m | ||
1271 | |||
1272 | # | ||
1273 | # Sonics Silicon Backplane | ||
1274 | # | ||
1275 | CONFIG_SSB_POSSIBLE=y | ||
1276 | # CONFIG_SSB is not set | ||
1277 | |||
1278 | # | ||
1279 | # Multifunction device drivers | ||
1280 | # | ||
1281 | # CONFIG_MFD_SM501 is not set | ||
1282 | # CONFIG_HTC_PASIC3 is not set | ||
1283 | |||
1284 | # | ||
1285 | # Multimedia devices | ||
1286 | # | ||
1287 | |||
1288 | # | ||
1289 | # Multimedia core support | ||
1290 | # | ||
1291 | # CONFIG_VIDEO_DEV is not set | ||
1292 | # CONFIG_DVB_CORE is not set | ||
1293 | |||
1294 | # | ||
1295 | # Multimedia drivers | ||
1296 | # | ||
1297 | # CONFIG_DAB is not set | ||
1298 | |||
1299 | # | ||
1300 | # Graphics support | ||
1301 | # | ||
1302 | # CONFIG_AGP is not set | ||
1303 | # CONFIG_DRM is not set | ||
1304 | # CONFIG_VGASTATE is not set | ||
1305 | # CONFIG_VIDEO_OUTPUT_CONTROL is not set | ||
1306 | # CONFIG_FB is not set | ||
1307 | # CONFIG_BACKLIGHT_LCD_SUPPORT is not set | ||
1308 | |||
1309 | # | ||
1310 | # Display device support | ||
1311 | # | ||
1312 | # CONFIG_DISPLAY_SUPPORT is not set | ||
1313 | |||
1314 | # | ||
1315 | # Console display driver support | ||
1316 | # | ||
1317 | # CONFIG_VGA_CONSOLE is not set | ||
1318 | CONFIG_DUMMY_CONSOLE=y | ||
1319 | |||
1320 | # | ||
1321 | # Sound | ||
1322 | # | ||
1323 | # CONFIG_SOUND is not set | ||
1324 | # CONFIG_HID_SUPPORT is not set | ||
1325 | CONFIG_HID=m | ||
1326 | CONFIG_USB_SUPPORT=y | ||
1327 | CONFIG_USB_ARCH_HAS_HCD=y | ||
1328 | CONFIG_USB_ARCH_HAS_OHCI=y | ||
1329 | CONFIG_USB_ARCH_HAS_EHCI=y | ||
1330 | CONFIG_USB=m | ||
1331 | # CONFIG_USB_DEBUG is not set | ||
1332 | # CONFIG_USB_ANNOUNCE_NEW_DEVICES is not set | ||
1333 | |||
1334 | # | ||
1335 | # Miscellaneous USB options | ||
1336 | # | ||
1337 | CONFIG_USB_DEVICEFS=y | ||
1338 | # CONFIG_USB_DEVICE_CLASS is not set | ||
1339 | # CONFIG_USB_DYNAMIC_MINORS is not set | ||
1340 | CONFIG_USB_SUSPEND=y | ||
1341 | # CONFIG_USB_OTG is not set | ||
1342 | |||
1343 | # | ||
1344 | # USB Host Controller Drivers | ||
1345 | # | ||
1346 | # CONFIG_USB_C67X00_HCD is not set | ||
1347 | CONFIG_USB_EHCI_HCD=m | ||
1348 | CONFIG_USB_EHCI_ROOT_HUB_TT=y | ||
1349 | # CONFIG_USB_EHCI_TT_NEWSCHED is not set | ||
1350 | CONFIG_USB_EHCI_HCD_PPC_OF=y | ||
1351 | # CONFIG_USB_ISP116X_HCD is not set | ||
1352 | # CONFIG_USB_ISP1760_HCD is not set | ||
1353 | CONFIG_USB_OHCI_HCD=m | ||
1354 | CONFIG_USB_OHCI_HCD_PPC_OF=y | ||
1355 | CONFIG_USB_OHCI_HCD_PPC_OF_BE=y | ||
1356 | # CONFIG_USB_OHCI_HCD_PPC_OF_LE is not set | ||
1357 | CONFIG_USB_OHCI_HCD_PCI=y | ||
1358 | CONFIG_USB_OHCI_BIG_ENDIAN_DESC=y | ||
1359 | CONFIG_USB_OHCI_BIG_ENDIAN_MMIO=y | ||
1360 | CONFIG_USB_OHCI_LITTLE_ENDIAN=y | ||
1361 | CONFIG_USB_UHCI_HCD=m | ||
1362 | # CONFIG_USB_SL811_HCD is not set | ||
1363 | # CONFIG_USB_R8A66597_HCD is not set | ||
1364 | |||
1365 | # | ||
1366 | # USB Device Class drivers | ||
1367 | # | ||
1368 | CONFIG_USB_ACM=m | ||
1369 | CONFIG_USB_PRINTER=m | ||
1370 | |||
1371 | # | ||
1372 | # NOTE: USB_STORAGE enables SCSI, and 'SCSI disk support' | ||
1373 | # | ||
1374 | |||
1375 | # | ||
1376 | # may also be needed; see USB_STORAGE Help for more information | ||
1377 | # | ||
1378 | CONFIG_USB_STORAGE=m | ||
1379 | # CONFIG_USB_STORAGE_DEBUG is not set | ||
1380 | CONFIG_USB_STORAGE_DATAFAB=y | ||
1381 | CONFIG_USB_STORAGE_FREECOM=y | ||
1382 | CONFIG_USB_STORAGE_ISD200=y | ||
1383 | CONFIG_USB_STORAGE_DPCM=y | ||
1384 | # CONFIG_USB_STORAGE_USBAT is not set | ||
1385 | CONFIG_USB_STORAGE_SDDR09=y | ||
1386 | CONFIG_USB_STORAGE_SDDR55=y | ||
1387 | CONFIG_USB_STORAGE_JUMPSHOT=y | ||
1388 | # CONFIG_USB_STORAGE_ALAUDA is not set | ||
1389 | # CONFIG_USB_STORAGE_ONETOUCH is not set | ||
1390 | # CONFIG_USB_STORAGE_KARMA is not set | ||
1391 | # CONFIG_USB_STORAGE_CYPRESS_ATACB is not set | ||
1392 | # CONFIG_USB_LIBUSUAL is not set | ||
1393 | |||
1394 | # | ||
1395 | # USB Imaging devices | ||
1396 | # | ||
1397 | CONFIG_USB_MDC800=m | ||
1398 | CONFIG_USB_MICROTEK=m | ||
1399 | CONFIG_USB_MON=y | ||
1400 | |||
1401 | # | ||
1402 | # USB port drivers | ||
1403 | # | ||
1404 | CONFIG_USB_SERIAL=m | ||
1405 | CONFIG_USB_EZUSB=y | ||
1406 | CONFIG_USB_SERIAL_GENERIC=y | ||
1407 | # CONFIG_USB_SERIAL_AIRCABLE is not set | ||
1408 | # CONFIG_USB_SERIAL_AIRPRIME is not set | ||
1409 | # CONFIG_USB_SERIAL_ARK3116 is not set | ||
1410 | CONFIG_USB_SERIAL_BELKIN=m | ||
1411 | # CONFIG_USB_SERIAL_CH341 is not set | ||
1412 | CONFIG_USB_SERIAL_WHITEHEAT=m | ||
1413 | CONFIG_USB_SERIAL_DIGI_ACCELEPORT=m | ||
1414 | # CONFIG_USB_SERIAL_CP2101 is not set | ||
1415 | # CONFIG_USB_SERIAL_CYPRESS_M8 is not set | ||
1416 | CONFIG_USB_SERIAL_EMPEG=m | ||
1417 | CONFIG_USB_SERIAL_FTDI_SIO=m | ||
1418 | # CONFIG_USB_SERIAL_FUNSOFT is not set | ||
1419 | CONFIG_USB_SERIAL_VISOR=m | ||
1420 | CONFIG_USB_SERIAL_IPAQ=m | ||
1421 | CONFIG_USB_SERIAL_IR=m | ||
1422 | CONFIG_USB_SERIAL_EDGEPORT=m | ||
1423 | CONFIG_USB_SERIAL_EDGEPORT_TI=m | ||
1424 | # CONFIG_USB_SERIAL_GARMIN is not set | ||
1425 | # CONFIG_USB_SERIAL_IPW is not set | ||
1426 | # CONFIG_USB_SERIAL_IUU is not set | ||
1427 | CONFIG_USB_SERIAL_KEYSPAN_PDA=m | ||
1428 | CONFIG_USB_SERIAL_KEYSPAN=m | ||
1429 | CONFIG_USB_SERIAL_KEYSPAN_MPR=y | ||
1430 | CONFIG_USB_SERIAL_KEYSPAN_USA28=y | ||
1431 | CONFIG_USB_SERIAL_KEYSPAN_USA28X=y | ||
1432 | CONFIG_USB_SERIAL_KEYSPAN_USA28XA=y | ||
1433 | CONFIG_USB_SERIAL_KEYSPAN_USA28XB=y | ||
1434 | CONFIG_USB_SERIAL_KEYSPAN_USA19=y | ||
1435 | CONFIG_USB_SERIAL_KEYSPAN_USA18X=y | ||
1436 | CONFIG_USB_SERIAL_KEYSPAN_USA19W=y | ||
1437 | CONFIG_USB_SERIAL_KEYSPAN_USA19QW=y | ||
1438 | CONFIG_USB_SERIAL_KEYSPAN_USA19QI=y | ||
1439 | CONFIG_USB_SERIAL_KEYSPAN_USA49W=y | ||
1440 | CONFIG_USB_SERIAL_KEYSPAN_USA49WLC=y | ||
1441 | CONFIG_USB_SERIAL_KLSI=m | ||
1442 | CONFIG_USB_SERIAL_KOBIL_SCT=m | ||
1443 | CONFIG_USB_SERIAL_MCT_U232=m | ||
1444 | # CONFIG_USB_SERIAL_MOS7720 is not set | ||
1445 | # CONFIG_USB_SERIAL_MOS7840 is not set | ||
1446 | # CONFIG_USB_SERIAL_NAVMAN is not set | ||
1447 | CONFIG_USB_SERIAL_PL2303=m | ||
1448 | # CONFIG_USB_SERIAL_OTI6858 is not set | ||
1449 | # CONFIG_USB_SERIAL_SPCP8X5 is not set | ||
1450 | # CONFIG_USB_SERIAL_HP4X is not set | ||
1451 | CONFIG_USB_SERIAL_SAFE=m | ||
1452 | CONFIG_USB_SERIAL_SAFE_PADDED=y | ||
1453 | # CONFIG_USB_SERIAL_SIERRAWIRELESS is not set | ||
1454 | # CONFIG_USB_SERIAL_TI is not set | ||
1455 | CONFIG_USB_SERIAL_CYBERJACK=m | ||
1456 | CONFIG_USB_SERIAL_XIRCOM=m | ||
1457 | # CONFIG_USB_SERIAL_OPTION is not set | ||
1458 | CONFIG_USB_SERIAL_OMNINET=m | ||
1459 | # CONFIG_USB_SERIAL_DEBUG is not set | ||
1460 | |||
1461 | # | ||
1462 | # USB Miscellaneous drivers | ||
1463 | # | ||
1464 | CONFIG_USB_EMI62=m | ||
1465 | # CONFIG_USB_EMI26 is not set | ||
1466 | # CONFIG_USB_ADUTUX is not set | ||
1467 | CONFIG_USB_AUERSWALD=m | ||
1468 | CONFIG_USB_RIO500=m | ||
1469 | CONFIG_USB_LEGOTOWER=m | ||
1470 | CONFIG_USB_LCD=m | ||
1471 | # CONFIG_USB_BERRY_CHARGE is not set | ||
1472 | CONFIG_USB_LED=m | ||
1473 | # CONFIG_USB_CYPRESS_CY7C63 is not set | ||
1474 | # CONFIG_USB_CYTHERM is not set | ||
1475 | # CONFIG_USB_PHIDGET is not set | ||
1476 | # CONFIG_USB_IDMOUSE is not set | ||
1477 | # CONFIG_USB_FTDI_ELAN is not set | ||
1478 | # CONFIG_USB_APPLEDISPLAY is not set | ||
1479 | # CONFIG_USB_SISUSBVGA is not set | ||
1480 | # CONFIG_USB_LD is not set | ||
1481 | # CONFIG_USB_TRANCEVIBRATOR is not set | ||
1482 | # CONFIG_USB_IOWARRIOR is not set | ||
1483 | CONFIG_USB_TEST=m | ||
1484 | CONFIG_USB_ATM=m | ||
1485 | CONFIG_USB_SPEEDTOUCH=m | ||
1486 | # CONFIG_USB_CXACRU is not set | ||
1487 | # CONFIG_USB_UEAGLEATM is not set | ||
1488 | # CONFIG_USB_XUSBATM is not set | ||
1489 | # CONFIG_USB_GADGET is not set | ||
1490 | # CONFIG_MMC is not set | ||
1491 | # CONFIG_MEMSTICK is not set | ||
1492 | # CONFIG_NEW_LEDS is not set | ||
1493 | # CONFIG_ACCESSIBILITY is not set | ||
1494 | CONFIG_INFINIBAND=m | ||
1495 | CONFIG_INFINIBAND_USER_MAD=m | ||
1496 | CONFIG_INFINIBAND_USER_ACCESS=m | ||
1497 | CONFIG_INFINIBAND_USER_MEM=y | ||
1498 | CONFIG_INFINIBAND_ADDR_TRANS=y | ||
1499 | CONFIG_INFINIBAND_MTHCA=m | ||
1500 | CONFIG_INFINIBAND_MTHCA_DEBUG=y | ||
1501 | CONFIG_INFINIBAND_AMSO1100=m | ||
1502 | # CONFIG_INFINIBAND_AMSO1100_DEBUG is not set | ||
1503 | # CONFIG_MLX4_INFINIBAND is not set | ||
1504 | # CONFIG_INFINIBAND_NES is not set | ||
1505 | CONFIG_INFINIBAND_IPOIB=m | ||
1506 | CONFIG_INFINIBAND_IPOIB_CM=y | ||
1507 | CONFIG_INFINIBAND_IPOIB_DEBUG=y | ||
1508 | # CONFIG_INFINIBAND_IPOIB_DEBUG_DATA is not set | ||
1509 | CONFIG_INFINIBAND_SRP=m | ||
1510 | # CONFIG_INFINIBAND_ISER is not set | ||
1511 | # CONFIG_EDAC is not set | ||
1512 | # CONFIG_RTC_CLASS is not set | ||
1513 | CONFIG_DMADEVICES=y | ||
1514 | |||
1515 | # | ||
1516 | # DMA Devices | ||
1517 | # | ||
1518 | # CONFIG_FSL_DMA is not set | ||
1519 | # CONFIG_UIO is not set | ||
1520 | |||
1521 | # | ||
1522 | # File systems | ||
1523 | # | ||
1524 | # CONFIG_EXT2_FS is not set | ||
1525 | CONFIG_EXT3_FS=m | ||
1526 | CONFIG_EXT3_FS_XATTR=y | ||
1527 | CONFIG_EXT3_FS_POSIX_ACL=y | ||
1528 | CONFIG_EXT3_FS_SECURITY=y | ||
1529 | # CONFIG_EXT4DEV_FS is not set | ||
1530 | CONFIG_JBD=m | ||
1531 | CONFIG_FS_MBCACHE=m | ||
1532 | # CONFIG_REISERFS_FS is not set | ||
1533 | # CONFIG_JFS_FS is not set | ||
1534 | CONFIG_FS_POSIX_ACL=y | ||
1535 | # CONFIG_XFS_FS is not set | ||
1536 | # CONFIG_OCFS2_FS is not set | ||
1537 | CONFIG_DNOTIFY=y | ||
1538 | CONFIG_INOTIFY=y | ||
1539 | CONFIG_INOTIFY_USER=y | ||
1540 | CONFIG_QUOTA=y | ||
1541 | # CONFIG_QUOTA_NETLINK_INTERFACE is not set | ||
1542 | CONFIG_PRINT_QUOTA_WARNING=y | ||
1543 | # CONFIG_QFMT_V1 is not set | ||
1544 | CONFIG_QFMT_V2=y | ||
1545 | CONFIG_QUOTACTL=y | ||
1546 | # CONFIG_AUTOFS_FS is not set | ||
1547 | CONFIG_AUTOFS4_FS=m | ||
1548 | # CONFIG_FUSE_FS is not set | ||
1549 | |||
1550 | # | ||
1551 | # CD-ROM/DVD Filesystems | ||
1552 | # | ||
1553 | # CONFIG_ISO9660_FS is not set | ||
1554 | CONFIG_UDF_FS=m | ||
1555 | CONFIG_UDF_NLS=y | ||
1556 | |||
1557 | # | ||
1558 | # DOS/FAT/NT Filesystems | ||
1559 | # | ||
1560 | CONFIG_FAT_FS=m | ||
1561 | CONFIG_MSDOS_FS=m | ||
1562 | CONFIG_VFAT_FS=m | ||
1563 | CONFIG_FAT_DEFAULT_CODEPAGE=437 | ||
1564 | CONFIG_FAT_DEFAULT_IOCHARSET="ascii" | ||
1565 | # CONFIG_NTFS_FS is not set | ||
1566 | |||
1567 | # | ||
1568 | # Pseudo filesystems | ||
1569 | # | ||
1570 | CONFIG_PROC_FS=y | ||
1571 | CONFIG_PROC_KCORE=y | ||
1572 | CONFIG_PROC_SYSCTL=y | ||
1573 | CONFIG_SYSFS=y | ||
1574 | CONFIG_TMPFS=y | ||
1575 | # CONFIG_TMPFS_POSIX_ACL is not set | ||
1576 | # CONFIG_HUGETLB_PAGE is not set | ||
1577 | # CONFIG_CONFIGFS_FS is not set | ||
1578 | |||
1579 | # | ||
1580 | # Miscellaneous filesystems | ||
1581 | # | ||
1582 | # CONFIG_ADFS_FS is not set | ||
1583 | # CONFIG_AFFS_FS is not set | ||
1584 | # CONFIG_ECRYPT_FS is not set | ||
1585 | CONFIG_HFS_FS=m | ||
1586 | CONFIG_HFSPLUS_FS=m | ||
1587 | # CONFIG_BEFS_FS is not set | ||
1588 | # CONFIG_BFS_FS is not set | ||
1589 | # CONFIG_EFS_FS is not set | ||
1590 | CONFIG_JFFS2_FS=y | ||
1591 | CONFIG_JFFS2_FS_DEBUG=0 | ||
1592 | CONFIG_JFFS2_FS_WRITEBUFFER=y | ||
1593 | # CONFIG_JFFS2_FS_WBUF_VERIFY is not set | ||
1594 | # CONFIG_JFFS2_SUMMARY is not set | ||
1595 | # CONFIG_JFFS2_FS_XATTR is not set | ||
1596 | # CONFIG_JFFS2_COMPRESSION_OPTIONS is not set | ||
1597 | CONFIG_JFFS2_ZLIB=y | ||
1598 | # CONFIG_JFFS2_LZO is not set | ||
1599 | CONFIG_JFFS2_RTIME=y | ||
1600 | # CONFIG_JFFS2_RUBIN is not set | ||
1601 | CONFIG_CRAMFS=m | ||
1602 | CONFIG_VXFS_FS=m | ||
1603 | # CONFIG_MINIX_FS is not set | ||
1604 | # CONFIG_HPFS_FS is not set | ||
1605 | # CONFIG_QNX4FS_FS is not set | ||
1606 | # CONFIG_ROMFS_FS is not set | ||
1607 | # CONFIG_SYSV_FS is not set | ||
1608 | # CONFIG_UFS_FS is not set | ||
1609 | CONFIG_NETWORK_FILESYSTEMS=y | ||
1610 | CONFIG_NFS_FS=y | ||
1611 | CONFIG_NFS_V3=y | ||
1612 | CONFIG_NFS_V3_ACL=y | ||
1613 | CONFIG_NFS_V4=y | ||
1614 | # CONFIG_NFSD is not set | ||
1615 | CONFIG_ROOT_NFS=y | ||
1616 | CONFIG_LOCKD=y | ||
1617 | CONFIG_LOCKD_V4=y | ||
1618 | CONFIG_NFS_ACL_SUPPORT=y | ||
1619 | CONFIG_NFS_COMMON=y | ||
1620 | CONFIG_SUNRPC=y | ||
1621 | CONFIG_SUNRPC_GSS=y | ||
1622 | CONFIG_SUNRPC_XPRT_RDMA=m | ||
1623 | # CONFIG_SUNRPC_BIND34 is not set | ||
1624 | CONFIG_RPCSEC_GSS_KRB5=y | ||
1625 | CONFIG_RPCSEC_GSS_SPKM3=m | ||
1626 | # CONFIG_SMB_FS is not set | ||
1627 | CONFIG_CIFS=m | ||
1628 | # CONFIG_CIFS_STATS is not set | ||
1629 | # CONFIG_CIFS_WEAK_PW_HASH is not set | ||
1630 | CONFIG_CIFS_XATTR=y | ||
1631 | CONFIG_CIFS_POSIX=y | ||
1632 | # CONFIG_CIFS_DEBUG2 is not set | ||
1633 | # CONFIG_CIFS_EXPERIMENTAL is not set | ||
1634 | # CONFIG_NCP_FS is not set | ||
1635 | # CONFIG_CODA_FS is not set | ||
1636 | # CONFIG_AFS_FS is not set | ||
1637 | |||
1638 | # | ||
1639 | # Partition Types | ||
1640 | # | ||
1641 | CONFIG_PARTITION_ADVANCED=y | ||
1642 | # CONFIG_ACORN_PARTITION is not set | ||
1643 | CONFIG_OSF_PARTITION=y | ||
1644 | # CONFIG_AMIGA_PARTITION is not set | ||
1645 | # CONFIG_ATARI_PARTITION is not set | ||
1646 | CONFIG_MAC_PARTITION=y | ||
1647 | CONFIG_MSDOS_PARTITION=y | ||
1648 | CONFIG_BSD_DISKLABEL=y | ||
1649 | CONFIG_MINIX_SUBPARTITION=y | ||
1650 | CONFIG_SOLARIS_X86_PARTITION=y | ||
1651 | CONFIG_UNIXWARE_DISKLABEL=y | ||
1652 | # CONFIG_LDM_PARTITION is not set | ||
1653 | CONFIG_SGI_PARTITION=y | ||
1654 | # CONFIG_ULTRIX_PARTITION is not set | ||
1655 | CONFIG_SUN_PARTITION=y | ||
1656 | # CONFIG_KARMA_PARTITION is not set | ||
1657 | CONFIG_EFI_PARTITION=y | ||
1658 | # CONFIG_SYSV68_PARTITION is not set | ||
1659 | CONFIG_NLS=y | ||
1660 | CONFIG_NLS_DEFAULT="utf8" | ||
1661 | CONFIG_NLS_CODEPAGE_437=y | ||
1662 | CONFIG_NLS_CODEPAGE_737=m | ||
1663 | CONFIG_NLS_CODEPAGE_775=m | ||
1664 | CONFIG_NLS_CODEPAGE_850=m | ||
1665 | CONFIG_NLS_CODEPAGE_852=m | ||
1666 | CONFIG_NLS_CODEPAGE_855=m | ||
1667 | CONFIG_NLS_CODEPAGE_857=m | ||
1668 | CONFIG_NLS_CODEPAGE_860=m | ||
1669 | CONFIG_NLS_CODEPAGE_861=m | ||
1670 | CONFIG_NLS_CODEPAGE_862=m | ||
1671 | CONFIG_NLS_CODEPAGE_863=m | ||
1672 | CONFIG_NLS_CODEPAGE_864=m | ||
1673 | CONFIG_NLS_CODEPAGE_865=m | ||
1674 | CONFIG_NLS_CODEPAGE_866=m | ||
1675 | CONFIG_NLS_CODEPAGE_869=m | ||
1676 | CONFIG_NLS_CODEPAGE_936=m | ||
1677 | CONFIG_NLS_CODEPAGE_950=m | ||
1678 | CONFIG_NLS_CODEPAGE_932=m | ||
1679 | CONFIG_NLS_CODEPAGE_949=m | ||
1680 | CONFIG_NLS_CODEPAGE_874=m | ||
1681 | CONFIG_NLS_ISO8859_8=m | ||
1682 | CONFIG_NLS_CODEPAGE_1250=m | ||
1683 | CONFIG_NLS_CODEPAGE_1251=m | ||
1684 | CONFIG_NLS_ASCII=y | ||
1685 | CONFIG_NLS_ISO8859_1=m | ||
1686 | CONFIG_NLS_ISO8859_2=m | ||
1687 | CONFIG_NLS_ISO8859_3=m | ||
1688 | CONFIG_NLS_ISO8859_4=m | ||
1689 | CONFIG_NLS_ISO8859_5=m | ||
1690 | CONFIG_NLS_ISO8859_6=m | ||
1691 | CONFIG_NLS_ISO8859_7=m | ||
1692 | CONFIG_NLS_ISO8859_9=m | ||
1693 | CONFIG_NLS_ISO8859_13=m | ||
1694 | CONFIG_NLS_ISO8859_14=m | ||
1695 | CONFIG_NLS_ISO8859_15=m | ||
1696 | CONFIG_NLS_KOI8_R=m | ||
1697 | CONFIG_NLS_KOI8_U=m | ||
1698 | CONFIG_NLS_UTF8=m | ||
1699 | # CONFIG_DLM is not set | ||
1700 | |||
1701 | # | ||
1702 | # Library routines | ||
1703 | # | ||
1704 | CONFIG_BITREVERSE=y | ||
1705 | # CONFIG_GENERIC_FIND_FIRST_BIT is not set | ||
1706 | CONFIG_CRC_CCITT=m | ||
1707 | # CONFIG_CRC16 is not set | ||
1708 | CONFIG_CRC_ITU_T=m | ||
1709 | CONFIG_CRC32=y | ||
1710 | # CONFIG_CRC7 is not set | ||
1711 | CONFIG_LIBCRC32C=m | ||
1712 | CONFIG_ZLIB_INFLATE=y | ||
1713 | CONFIG_ZLIB_DEFLATE=y | ||
1714 | CONFIG_PLIST=y | ||
1715 | CONFIG_HAS_IOMEM=y | ||
1716 | CONFIG_HAS_IOPORT=y | ||
1717 | CONFIG_HAS_DMA=y | ||
1718 | CONFIG_CHECK_SIGNATURE=y | ||
1719 | CONFIG_HAVE_LMB=y | ||
1720 | |||
1721 | # | ||
1722 | # Kernel hacking | ||
1723 | # | ||
1724 | # CONFIG_PRINTK_TIME is not set | ||
1725 | CONFIG_ENABLE_WARN_DEPRECATED=y | ||
1726 | CONFIG_ENABLE_MUST_CHECK=y | ||
1727 | CONFIG_FRAME_WARN=1024 | ||
1728 | CONFIG_MAGIC_SYSRQ=y | ||
1729 | # CONFIG_UNUSED_SYMBOLS is not set | ||
1730 | # CONFIG_DEBUG_FS is not set | ||
1731 | # CONFIG_HEADERS_CHECK is not set | ||
1732 | CONFIG_DEBUG_KERNEL=y | ||
1733 | # CONFIG_DEBUG_SHIRQ is not set | ||
1734 | CONFIG_DETECT_SOFTLOCKUP=y | ||
1735 | CONFIG_SCHED_DEBUG=y | ||
1736 | # CONFIG_SCHEDSTATS is not set | ||
1737 | # CONFIG_TIMER_STATS is not set | ||
1738 | # CONFIG_DEBUG_OBJECTS is not set | ||
1739 | # CONFIG_SLUB_DEBUG_ON is not set | ||
1740 | # CONFIG_SLUB_STATS is not set | ||
1741 | # CONFIG_DEBUG_RT_MUTEXES is not set | ||
1742 | # CONFIG_RT_MUTEX_TESTER is not set | ||
1743 | CONFIG_DEBUG_SPINLOCK=y | ||
1744 | # CONFIG_DEBUG_MUTEXES is not set | ||
1745 | CONFIG_DEBUG_SPINLOCK_SLEEP=y | ||
1746 | # CONFIG_DEBUG_LOCKING_API_SELFTESTS is not set | ||
1747 | # CONFIG_DEBUG_KOBJECT is not set | ||
1748 | CONFIG_DEBUG_HIGHMEM=y | ||
1749 | CONFIG_DEBUG_BUGVERBOSE=y | ||
1750 | CONFIG_DEBUG_INFO=y | ||
1751 | # CONFIG_DEBUG_VM is not set | ||
1752 | # CONFIG_DEBUG_WRITECOUNT is not set | ||
1753 | # CONFIG_DEBUG_LIST is not set | ||
1754 | # CONFIG_DEBUG_SG is not set | ||
1755 | # CONFIG_BOOT_PRINTK_DELAY is not set | ||
1756 | # CONFIG_RCU_TORTURE_TEST is not set | ||
1757 | # CONFIG_KPROBES_SANITY_TEST is not set | ||
1758 | # CONFIG_BACKTRACE_SELF_TEST is not set | ||
1759 | # CONFIG_LKDTM is not set | ||
1760 | # CONFIG_FAULT_INJECTION is not set | ||
1761 | # CONFIG_SAMPLES is not set | ||
1762 | CONFIG_DEBUG_STACKOVERFLOW=y | ||
1763 | CONFIG_DEBUG_STACK_USAGE=y | ||
1764 | # CONFIG_DEBUG_PAGEALLOC is not set | ||
1765 | # CONFIG_DEBUGGER is not set | ||
1766 | # CONFIG_IRQSTACKS is not set | ||
1767 | # CONFIG_BDI_SWITCH is not set | ||
1768 | CONFIG_BOOTX_TEXT=y | ||
1769 | # CONFIG_PPC_EARLY_DEBUG is not set | ||
1770 | |||
1771 | # | ||
1772 | # Security options | ||
1773 | # | ||
1774 | CONFIG_KEYS=y | ||
1775 | CONFIG_KEYS_DEBUG_PROC_KEYS=y | ||
1776 | CONFIG_SECURITY=y | ||
1777 | CONFIG_SECURITY_NETWORK=y | ||
1778 | # CONFIG_SECURITY_NETWORK_XFRM is not set | ||
1779 | CONFIG_SECURITY_CAPABILITIES=y | ||
1780 | # CONFIG_SECURITY_FILE_CAPABILITIES is not set | ||
1781 | CONFIG_SECURITY_DEFAULT_MMAP_MIN_ADDR=0 | ||
1782 | CONFIG_SECURITY_SELINUX=y | ||
1783 | CONFIG_SECURITY_SELINUX_BOOTPARAM=y | ||
1784 | CONFIG_SECURITY_SELINUX_BOOTPARAM_VALUE=1 | ||
1785 | CONFIG_SECURITY_SELINUX_DISABLE=y | ||
1786 | CONFIG_SECURITY_SELINUX_DEVELOP=y | ||
1787 | CONFIG_SECURITY_SELINUX_AVC_STATS=y | ||
1788 | CONFIG_SECURITY_SELINUX_CHECKREQPROT_VALUE=1 | ||
1789 | # CONFIG_SECURITY_SELINUX_ENABLE_SECMARK_DEFAULT is not set | ||
1790 | # CONFIG_SECURITY_SELINUX_POLICYDB_VERSION_MAX is not set | ||
1791 | CONFIG_CRYPTO=y | ||
1792 | |||
1793 | # | ||
1794 | # Crypto core or helper | ||
1795 | # | ||
1796 | CONFIG_CRYPTO_ALGAPI=y | ||
1797 | CONFIG_CRYPTO_AEAD=m | ||
1798 | CONFIG_CRYPTO_BLKCIPHER=y | ||
1799 | CONFIG_CRYPTO_HASH=y | ||
1800 | CONFIG_CRYPTO_MANAGER=y | ||
1801 | # CONFIG_CRYPTO_GF128MUL is not set | ||
1802 | CONFIG_CRYPTO_NULL=m | ||
1803 | # CONFIG_CRYPTO_CRYPTD is not set | ||
1804 | CONFIG_CRYPTO_AUTHENC=m | ||
1805 | # CONFIG_CRYPTO_TEST is not set | ||
1806 | |||
1807 | # | ||
1808 | # Authenticated Encryption with Associated Data | ||
1809 | # | ||
1810 | # CONFIG_CRYPTO_CCM is not set | ||
1811 | # CONFIG_CRYPTO_GCM is not set | ||
1812 | # CONFIG_CRYPTO_SEQIV is not set | ||
1813 | |||
1814 | # | ||
1815 | # Block modes | ||
1816 | # | ||
1817 | CONFIG_CRYPTO_CBC=y | ||
1818 | # CONFIG_CRYPTO_CTR is not set | ||
1819 | # CONFIG_CRYPTO_CTS is not set | ||
1820 | CONFIG_CRYPTO_ECB=m | ||
1821 | # CONFIG_CRYPTO_LRW is not set | ||
1822 | # CONFIG_CRYPTO_PCBC is not set | ||
1823 | # CONFIG_CRYPTO_XTS is not set | ||
1824 | |||
1825 | # | ||
1826 | # Hash modes | ||
1827 | # | ||
1828 | CONFIG_CRYPTO_HMAC=y | ||
1829 | # CONFIG_CRYPTO_XCBC is not set | ||
1830 | |||
1831 | # | ||
1832 | # Digest | ||
1833 | # | ||
1834 | CONFIG_CRYPTO_CRC32C=m | ||
1835 | CONFIG_CRYPTO_MD4=m | ||
1836 | CONFIG_CRYPTO_MD5=y | ||
1837 | CONFIG_CRYPTO_MICHAEL_MIC=m | ||
1838 | CONFIG_CRYPTO_SHA1=y | ||
1839 | CONFIG_CRYPTO_SHA256=m | ||
1840 | CONFIG_CRYPTO_SHA512=m | ||
1841 | # CONFIG_CRYPTO_TGR192 is not set | ||
1842 | CONFIG_CRYPTO_WP512=m | ||
1843 | |||
1844 | # | ||
1845 | # Ciphers | ||
1846 | # | ||
1847 | CONFIG_CRYPTO_AES=m | ||
1848 | # CONFIG_CRYPTO_ANUBIS is not set | ||
1849 | CONFIG_CRYPTO_ARC4=m | ||
1850 | CONFIG_CRYPTO_BLOWFISH=m | ||
1851 | # CONFIG_CRYPTO_CAMELLIA is not set | ||
1852 | CONFIG_CRYPTO_CAST5=m | ||
1853 | CONFIG_CRYPTO_CAST6=m | ||
1854 | CONFIG_CRYPTO_DES=y | ||
1855 | # CONFIG_CRYPTO_FCRYPT is not set | ||
1856 | CONFIG_CRYPTO_KHAZAD=m | ||
1857 | # CONFIG_CRYPTO_SALSA20 is not set | ||
1858 | # CONFIG_CRYPTO_SEED is not set | ||
1859 | CONFIG_CRYPTO_SERPENT=m | ||
1860 | CONFIG_CRYPTO_TEA=m | ||
1861 | CONFIG_CRYPTO_TWOFISH=m | ||
1862 | CONFIG_CRYPTO_TWOFISH_COMMON=m | ||
1863 | |||
1864 | # | ||
1865 | # Compression | ||
1866 | # | ||
1867 | CONFIG_CRYPTO_DEFLATE=m | ||
1868 | # CONFIG_CRYPTO_LZO is not set | ||
1869 | CONFIG_CRYPTO_HW=y | ||
1870 | # CONFIG_CRYPTO_DEV_HIFN_795X is not set | ||
1871 | # CONFIG_PPC_CLOCK is not set | ||
1872 | # CONFIG_VIRTUALIZATION is not set | ||
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile index 2346d271fbfd..0e8f928fef70 100644 --- a/arch/powerpc/kernel/Makefile +++ b/arch/powerpc/kernel/Makefile | |||
@@ -38,6 +38,7 @@ obj-$(CONFIG_IBMVIO) += vio.o | |||
38 | obj-$(CONFIG_IBMEBUS) += ibmebus.o | 38 | obj-$(CONFIG_IBMEBUS) += ibmebus.o |
39 | obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o | 39 | obj-$(CONFIG_GENERIC_TBSYNC) += smp-tbsync.o |
40 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o | 40 | obj-$(CONFIG_CRASH_DUMP) += crash_dump.o |
41 | obj-$(CONFIG_E500) += idle_e500.o | ||
41 | obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o | 42 | obj-$(CONFIG_6xx) += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o |
42 | obj-$(CONFIG_TAU) += tau_6xx.o | 43 | obj-$(CONFIG_TAU) += tau_6xx.o |
43 | obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ | 44 | obj-$(CONFIG_HIBERNATION) += swsusp.o suspend.o \ |
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c index ec9228d687b0..8655c7670350 100644 --- a/arch/powerpc/kernel/asm-offsets.c +++ b/arch/powerpc/kernel/asm-offsets.c | |||
@@ -52,6 +52,10 @@ | |||
52 | #include <asm/iseries/alpaca.h> | 52 | #include <asm/iseries/alpaca.h> |
53 | #endif | 53 | #endif |
54 | 54 | ||
55 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
56 | #include "head_booke.h" | ||
57 | #endif | ||
58 | |||
55 | int main(void) | 59 | int main(void) |
56 | { | 60 | { |
57 | DEFINE(THREAD, offsetof(struct task_struct, thread)); | 61 | DEFINE(THREAD, offsetof(struct task_struct, thread)); |
@@ -242,6 +246,25 @@ int main(void) | |||
242 | DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); | 246 | DEFINE(_SRR1, STACK_FRAME_OVERHEAD+sizeof(struct pt_regs)+8); |
243 | #endif /* CONFIG_PPC64 */ | 247 | #endif /* CONFIG_PPC64 */ |
244 | 248 | ||
249 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
250 | DEFINE(EXC_LVL_SIZE, STACK_EXC_LVL_FRAME_SIZE); | ||
251 | DEFINE(MAS0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); | ||
252 | /* we overload MMUCR for 44x on MAS0 since they are mutually exclusive */ | ||
253 | DEFINE(MMUCR, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas0)); | ||
254 | DEFINE(MAS1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas1)); | ||
255 | DEFINE(MAS2, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas2)); | ||
256 | DEFINE(MAS3, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas3)); | ||
257 | DEFINE(MAS6, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas6)); | ||
258 | DEFINE(MAS7, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, mas7)); | ||
259 | DEFINE(_SRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr0)); | ||
260 | DEFINE(_SRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, srr1)); | ||
261 | DEFINE(_CSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr0)); | ||
262 | DEFINE(_CSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, csrr1)); | ||
263 | DEFINE(_DSRR0, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr0)); | ||
264 | DEFINE(_DSRR1, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, dsrr1)); | ||
265 | DEFINE(SAVED_KSP_LIMIT, STACK_INT_FRAME_SIZE+offsetof(struct exception_regs, saved_ksp_limit)); | ||
266 | #endif | ||
267 | |||
245 | DEFINE(CLONE_VM, CLONE_VM); | 268 | DEFINE(CLONE_VM, CLONE_VM); |
246 | DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); | 269 | DEFINE(CLONE_UNTRACED, CLONE_UNTRACED); |
247 | 270 | ||
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S index e3623e3e3451..5465e8de0e61 100644 --- a/arch/powerpc/kernel/cpu_setup_44x.S +++ b/arch/powerpc/kernel/cpu_setup_44x.S | |||
@@ -33,6 +33,7 @@ _GLOBAL(__setup_cpu_440grx) | |||
33 | mtlr r4 | 33 | mtlr r4 |
34 | blr | 34 | blr |
35 | _GLOBAL(__setup_cpu_460ex) | 35 | _GLOBAL(__setup_cpu_460ex) |
36 | _GLOBAL(__setup_cpu_460gt) | ||
36 | b __init_fpu_44x | 37 | b __init_fpu_44x |
37 | _GLOBAL(__setup_cpu_440gx) | 38 | _GLOBAL(__setup_cpu_440gx) |
38 | _GLOBAL(__setup_cpu_440spe) | 39 | _GLOBAL(__setup_cpu_440spe) |
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c index e44d5530f0a6..f247fc6ad12d 100644 --- a/arch/powerpc/kernel/cputable.c +++ b/arch/powerpc/kernel/cputable.c | |||
@@ -37,6 +37,7 @@ extern void __setup_cpu_440gx(unsigned long offset, struct cpu_spec* spec); | |||
37 | extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); | 37 | extern void __setup_cpu_440grx(unsigned long offset, struct cpu_spec* spec); |
38 | extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); | 38 | extern void __setup_cpu_440spe(unsigned long offset, struct cpu_spec* spec); |
39 | extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); | 39 | extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec); |
40 | extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec); | ||
40 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); | 41 | extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec); |
41 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); | 42 | extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec); |
42 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); | 43 | extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec); |
@@ -1427,9 +1428,10 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1427 | .pvr_value = 0x13020000, | 1428 | .pvr_value = 0x13020000, |
1428 | .cpu_name = "460GT", | 1429 | .cpu_name = "460GT", |
1429 | .cpu_features = CPU_FTRS_44X, | 1430 | .cpu_features = CPU_FTRS_44X, |
1430 | .cpu_user_features = COMMON_USER_BOOKE, | 1431 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, |
1431 | .icache_bsize = 32, | 1432 | .icache_bsize = 32, |
1432 | .dcache_bsize = 32, | 1433 | .dcache_bsize = 32, |
1434 | .cpu_setup = __setup_cpu_460gt, | ||
1433 | .machine_check = machine_check_440A, | 1435 | .machine_check = machine_check_440A, |
1434 | .platform = "ppc440", | 1436 | .platform = "ppc440", |
1435 | }, | 1437 | }, |
@@ -1491,7 +1493,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1491 | .pvr_mask = 0xffff0000, | 1493 | .pvr_mask = 0xffff0000, |
1492 | .pvr_value = 0x80200000, | 1494 | .pvr_value = 0x80200000, |
1493 | .cpu_name = "e500", | 1495 | .cpu_name = "e500", |
1494 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | ||
1495 | .cpu_features = CPU_FTRS_E500, | 1496 | .cpu_features = CPU_FTRS_E500, |
1496 | .cpu_user_features = COMMON_USER_BOOKE | | 1497 | .cpu_user_features = COMMON_USER_BOOKE | |
1497 | PPC_FEATURE_HAS_SPE_COMP | | 1498 | PPC_FEATURE_HAS_SPE_COMP | |
@@ -1508,7 +1509,6 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1508 | .pvr_mask = 0xffff0000, | 1509 | .pvr_mask = 0xffff0000, |
1509 | .pvr_value = 0x80210000, | 1510 | .pvr_value = 0x80210000, |
1510 | .cpu_name = "e500v2", | 1511 | .cpu_name = "e500v2", |
1511 | /* xxx - galak: add CPU_FTR_MAYBE_CAN_DOZE */ | ||
1512 | .cpu_features = CPU_FTRS_E500_2, | 1512 | .cpu_features = CPU_FTRS_E500_2, |
1513 | .cpu_user_features = COMMON_USER_BOOKE | | 1513 | .cpu_user_features = COMMON_USER_BOOKE | |
1514 | PPC_FEATURE_HAS_SPE_COMP | | 1514 | PPC_FEATURE_HAS_SPE_COMP | |
@@ -1522,6 +1522,20 @@ static struct cpu_spec __initdata cpu_specs[] = { | |||
1522 | .machine_check = machine_check_e500, | 1522 | .machine_check = machine_check_e500, |
1523 | .platform = "ppc8548", | 1523 | .platform = "ppc8548", |
1524 | }, | 1524 | }, |
1525 | { /* e500mc */ | ||
1526 | .pvr_mask = 0xffff0000, | ||
1527 | .pvr_value = 0x80230000, | ||
1528 | .cpu_name = "e500mc", | ||
1529 | .cpu_features = CPU_FTRS_E500MC, | ||
1530 | .cpu_user_features = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU, | ||
1531 | .icache_bsize = 64, | ||
1532 | .dcache_bsize = 64, | ||
1533 | .num_pmcs = 4, | ||
1534 | .oprofile_cpu_type = "ppc/e500", /* xxx - galak, e500mc? */ | ||
1535 | .oprofile_type = PPC_OPROFILE_FSL_EMB, | ||
1536 | .machine_check = machine_check_e500, | ||
1537 | .platform = "ppce500mc", | ||
1538 | }, | ||
1525 | { /* default match */ | 1539 | { /* default match */ |
1526 | .pvr_mask = 0x00000000, | 1540 | .pvr_mask = 0x00000000, |
1527 | .pvr_value = 0x00000000, | 1541 | .pvr_value = 0x00000000, |
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S index 0c8614d9875c..ab2d62f70b14 100644 --- a/arch/powerpc/kernel/entry_32.S +++ b/arch/powerpc/kernel/entry_32.S | |||
@@ -44,29 +44,54 @@ | |||
44 | #endif | 44 | #endif |
45 | 45 | ||
46 | #ifdef CONFIG_BOOKE | 46 | #ifdef CONFIG_BOOKE |
47 | #include "head_booke.h" | ||
48 | #define TRANSFER_TO_HANDLER_EXC_LEVEL(exc_level) \ | ||
49 | mtspr exc_level##_SPRG,r8; \ | ||
50 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level); \ | ||
51 | lwz r0,GPR10-INT_FRAME_SIZE(r8); \ | ||
52 | stw r0,GPR10(r11); \ | ||
53 | lwz r0,GPR11-INT_FRAME_SIZE(r8); \ | ||
54 | stw r0,GPR11(r11); \ | ||
55 | mfspr r8,exc_level##_SPRG | ||
56 | |||
57 | .globl mcheck_transfer_to_handler | 47 | .globl mcheck_transfer_to_handler |
58 | mcheck_transfer_to_handler: | 48 | mcheck_transfer_to_handler: |
59 | TRANSFER_TO_HANDLER_EXC_LEVEL(MCHECK) | 49 | mfspr r0,SPRN_DSRR0 |
60 | b transfer_to_handler_full | 50 | stw r0,_DSRR0(r11) |
51 | mfspr r0,SPRN_DSRR1 | ||
52 | stw r0,_DSRR1(r11) | ||
53 | /* fall through */ | ||
61 | 54 | ||
62 | .globl debug_transfer_to_handler | 55 | .globl debug_transfer_to_handler |
63 | debug_transfer_to_handler: | 56 | debug_transfer_to_handler: |
64 | TRANSFER_TO_HANDLER_EXC_LEVEL(DEBUG) | 57 | mfspr r0,SPRN_CSRR0 |
65 | b transfer_to_handler_full | 58 | stw r0,_CSRR0(r11) |
59 | mfspr r0,SPRN_CSRR1 | ||
60 | stw r0,_CSRR1(r11) | ||
61 | /* fall through */ | ||
66 | 62 | ||
67 | .globl crit_transfer_to_handler | 63 | .globl crit_transfer_to_handler |
68 | crit_transfer_to_handler: | 64 | crit_transfer_to_handler: |
69 | TRANSFER_TO_HANDLER_EXC_LEVEL(CRIT) | 65 | #ifdef CONFIG_FSL_BOOKE |
66 | mfspr r0,SPRN_MAS0 | ||
67 | stw r0,MAS0(r11) | ||
68 | mfspr r0,SPRN_MAS1 | ||
69 | stw r0,MAS1(r11) | ||
70 | mfspr r0,SPRN_MAS2 | ||
71 | stw r0,MAS2(r11) | ||
72 | mfspr r0,SPRN_MAS3 | ||
73 | stw r0,MAS3(r11) | ||
74 | mfspr r0,SPRN_MAS6 | ||
75 | stw r0,MAS6(r11) | ||
76 | #ifdef CONFIG_PHYS_64BIT | ||
77 | mfspr r0,SPRN_MAS7 | ||
78 | stw r0,MAS7(r11) | ||
79 | #endif /* CONFIG_PHYS_64BIT */ | ||
80 | #endif /* CONFIG_FSL_BOOKE */ | ||
81 | #ifdef CONFIG_44x | ||
82 | mfspr r0,SPRN_MMUCR | ||
83 | stw r0,MMUCR(r11) | ||
84 | #endif | ||
85 | mfspr r0,SPRN_SRR0 | ||
86 | stw r0,_SRR0(r11) | ||
87 | mfspr r0,SPRN_SRR1 | ||
88 | stw r0,_SRR1(r11) | ||
89 | |||
90 | mfspr r8,SPRN_SPRG3 | ||
91 | lwz r0,KSP_LIMIT(r8) | ||
92 | stw r0,SAVED_KSP_LIMIT(r11) | ||
93 | rlwimi r0,r1,0,0,(31-THREAD_SHIFT) | ||
94 | stw r0,KSP_LIMIT(r8) | ||
70 | /* fall through */ | 95 | /* fall through */ |
71 | #endif | 96 | #endif |
72 | 97 | ||
@@ -77,6 +102,16 @@ crit_transfer_to_handler: | |||
77 | stw r0,GPR10(r11) | 102 | stw r0,GPR10(r11) |
78 | lwz r0,crit_r11@l(0) | 103 | lwz r0,crit_r11@l(0) |
79 | stw r0,GPR11(r11) | 104 | stw r0,GPR11(r11) |
105 | mfspr r0,SPRN_SRR0 | ||
106 | stw r0,crit_srr0@l(0) | ||
107 | mfspr r0,SPRN_SRR1 | ||
108 | stw r0,crit_srr1@l(0) | ||
109 | |||
110 | mfspr r8,SPRN_SPRG3 | ||
111 | lwz r0,KSP_LIMIT(r8) | ||
112 | stw r0,saved_ksp_limit@l(0) | ||
113 | rlwimi r0,r1,0,0,(31-THREAD_SHIFT) | ||
114 | stw r0,KSP_LIMIT(r8) | ||
80 | /* fall through */ | 115 | /* fall through */ |
81 | #endif | 116 | #endif |
82 | 117 | ||
@@ -141,13 +176,14 @@ transfer_to_handler: | |||
141 | cmplw r1,r9 /* if r1 <= ksp_limit */ | 176 | cmplw r1,r9 /* if r1 <= ksp_limit */ |
142 | ble- stack_ovf /* then the kernel stack overflowed */ | 177 | ble- stack_ovf /* then the kernel stack overflowed */ |
143 | 5: | 178 | 5: |
144 | #ifdef CONFIG_6xx | 179 | #if defined(CONFIG_6xx) || defined(CONFIG_E500) |
145 | rlwinm r9,r1,0,0,31-THREAD_SHIFT | 180 | rlwinm r9,r1,0,0,31-THREAD_SHIFT |
146 | tophys(r9,r9) /* check local flags */ | 181 | tophys(r9,r9) /* check local flags */ |
147 | lwz r12,TI_LOCAL_FLAGS(r9) | 182 | lwz r12,TI_LOCAL_FLAGS(r9) |
148 | mtcrf 0x01,r12 | 183 | mtcrf 0x01,r12 |
149 | bt- 31-TLF_NAPPING,4f | 184 | bt- 31-TLF_NAPPING,4f |
150 | #endif /* CONFIG_6xx */ | 185 | bt- 31-TLF_SLEEPING,7f |
186 | #endif /* CONFIG_6xx || CONFIG_E500 */ | ||
151 | .globl transfer_to_handler_cont | 187 | .globl transfer_to_handler_cont |
152 | transfer_to_handler_cont: | 188 | transfer_to_handler_cont: |
153 | 3: | 189 | 3: |
@@ -160,10 +196,17 @@ transfer_to_handler_cont: | |||
160 | SYNC | 196 | SYNC |
161 | RFI /* jump to handler, enable MMU */ | 197 | RFI /* jump to handler, enable MMU */ |
162 | 198 | ||
163 | #ifdef CONFIG_6xx | 199 | #if defined (CONFIG_6xx) || defined(CONFIG_E500) |
164 | 4: rlwinm r12,r12,0,~_TLF_NAPPING | 200 | 4: rlwinm r12,r12,0,~_TLF_NAPPING |
165 | stw r12,TI_LOCAL_FLAGS(r9) | 201 | stw r12,TI_LOCAL_FLAGS(r9) |
166 | b power_save_6xx_restore | 202 | b power_save_ppc32_restore |
203 | |||
204 | 7: rlwinm r12,r12,0,~_TLF_SLEEPING | ||
205 | stw r12,TI_LOCAL_FLAGS(r9) | ||
206 | lwz r9,_MSR(r11) /* if sleeping, clear MSR.EE */ | ||
207 | rlwinm r9,r9,0,~MSR_EE | ||
208 | lwz r12,_LINK(r11) /* and return to address in LR */ | ||
209 | b fast_exception_return | ||
167 | #endif | 210 | #endif |
168 | 211 | ||
169 | /* | 212 | /* |
@@ -668,7 +711,7 @@ user_exc_return: /* r10 contains MSR_KERNEL here */ | |||
668 | /* Check current_thread_info()->flags */ | 711 | /* Check current_thread_info()->flags */ |
669 | rlwinm r9,r1,0,0,(31-THREAD_SHIFT) | 712 | rlwinm r9,r1,0,0,(31-THREAD_SHIFT) |
670 | lwz r9,TI_FLAGS(r9) | 713 | lwz r9,TI_FLAGS(r9) |
671 | andi. r0,r9,(_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK|_TIF_NEED_RESCHED) | 714 | andi. r0,r9,_TIF_USER_WORK_MASK |
672 | bne do_work | 715 | bne do_work |
673 | 716 | ||
674 | restore_user: | 717 | restore_user: |
@@ -859,17 +902,90 @@ exc_exit_restart_end: | |||
859 | exc_lvl_rfi; \ | 902 | exc_lvl_rfi; \ |
860 | b .; /* prevent prefetch past exc_lvl_rfi */ | 903 | b .; /* prevent prefetch past exc_lvl_rfi */ |
861 | 904 | ||
905 | #define RESTORE_xSRR(exc_lvl_srr0, exc_lvl_srr1) \ | ||
906 | lwz r9,_##exc_lvl_srr0(r1); \ | ||
907 | lwz r10,_##exc_lvl_srr1(r1); \ | ||
908 | mtspr SPRN_##exc_lvl_srr0,r9; \ | ||
909 | mtspr SPRN_##exc_lvl_srr1,r10; | ||
910 | |||
911 | #if defined(CONFIG_FSL_BOOKE) | ||
912 | #ifdef CONFIG_PHYS_64BIT | ||
913 | #define RESTORE_MAS7 \ | ||
914 | lwz r11,MAS7(r1); \ | ||
915 | mtspr SPRN_MAS7,r11; | ||
916 | #else | ||
917 | #define RESTORE_MAS7 | ||
918 | #endif /* CONFIG_PHYS_64BIT */ | ||
919 | #define RESTORE_MMU_REGS \ | ||
920 | lwz r9,MAS0(r1); \ | ||
921 | lwz r10,MAS1(r1); \ | ||
922 | lwz r11,MAS2(r1); \ | ||
923 | mtspr SPRN_MAS0,r9; \ | ||
924 | lwz r9,MAS3(r1); \ | ||
925 | mtspr SPRN_MAS1,r10; \ | ||
926 | lwz r10,MAS6(r1); \ | ||
927 | mtspr SPRN_MAS2,r11; \ | ||
928 | mtspr SPRN_MAS3,r9; \ | ||
929 | mtspr SPRN_MAS6,r10; \ | ||
930 | RESTORE_MAS7; | ||
931 | #elif defined(CONFIG_44x) | ||
932 | #define RESTORE_MMU_REGS \ | ||
933 | lwz r9,MMUCR(r1); \ | ||
934 | mtspr SPRN_MMUCR,r9; | ||
935 | #else | ||
936 | #define RESTORE_MMU_REGS | ||
937 | #endif | ||
938 | |||
939 | #ifdef CONFIG_40x | ||
862 | .globl ret_from_crit_exc | 940 | .globl ret_from_crit_exc |
863 | ret_from_crit_exc: | 941 | ret_from_crit_exc: |
942 | mfspr r9,SPRN_SPRG3 | ||
943 | lis r10,saved_ksp_limit@ha; | ||
944 | lwz r10,saved_ksp_limit@l(r10); | ||
945 | tovirt(r9,r9); | ||
946 | stw r10,KSP_LIMIT(r9) | ||
947 | lis r9,crit_srr0@ha; | ||
948 | lwz r9,crit_srr0@l(r9); | ||
949 | lis r10,crit_srr1@ha; | ||
950 | lwz r10,crit_srr1@l(r10); | ||
951 | mtspr SPRN_SRR0,r9; | ||
952 | mtspr SPRN_SRR1,r10; | ||
864 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | 953 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) |
954 | #endif /* CONFIG_40x */ | ||
865 | 955 | ||
866 | #ifdef CONFIG_BOOKE | 956 | #ifdef CONFIG_BOOKE |
957 | .globl ret_from_crit_exc | ||
958 | ret_from_crit_exc: | ||
959 | mfspr r9,SPRN_SPRG3 | ||
960 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
961 | stw r10,KSP_LIMIT(r9) | ||
962 | RESTORE_xSRR(SRR0,SRR1); | ||
963 | RESTORE_MMU_REGS; | ||
964 | RET_FROM_EXC_LEVEL(SPRN_CSRR0, SPRN_CSRR1, RFCI) | ||
965 | |||
867 | .globl ret_from_debug_exc | 966 | .globl ret_from_debug_exc |
868 | ret_from_debug_exc: | 967 | ret_from_debug_exc: |
968 | mfspr r9,SPRN_SPRG3 | ||
969 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
970 | stw r10,KSP_LIMIT(r9) | ||
971 | lwz r9,THREAD_INFO-THREAD(r9) | ||
972 | rlwinm r10,r1,0,0,(31-THREAD_SHIFT) | ||
973 | lwz r10,TI_PREEMPT(r10) | ||
974 | stw r10,TI_PREEMPT(r9) | ||
975 | RESTORE_xSRR(SRR0,SRR1); | ||
976 | RESTORE_xSRR(CSRR0,CSRR1); | ||
977 | RESTORE_MMU_REGS; | ||
869 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) | 978 | RET_FROM_EXC_LEVEL(SPRN_DSRR0, SPRN_DSRR1, RFDI) |
870 | 979 | ||
871 | .globl ret_from_mcheck_exc | 980 | .globl ret_from_mcheck_exc |
872 | ret_from_mcheck_exc: | 981 | ret_from_mcheck_exc: |
982 | mfspr r9,SPRN_SPRG3 | ||
983 | lwz r10,SAVED_KSP_LIMIT(r1) | ||
984 | stw r10,KSP_LIMIT(r9) | ||
985 | RESTORE_xSRR(SRR0,SRR1); | ||
986 | RESTORE_xSRR(CSRR0,CSRR1); | ||
987 | RESTORE_xSRR(DSRR0,DSRR1); | ||
988 | RESTORE_MMU_REGS; | ||
873 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) | 989 | RET_FROM_EXC_LEVEL(SPRN_MCSRR0, SPRN_MCSRR1, RFMCI) |
874 | #endif /* CONFIG_BOOKE */ | 990 | #endif /* CONFIG_BOOKE */ |
875 | 991 | ||
@@ -925,7 +1041,7 @@ recheck: | |||
925 | lwz r9,TI_FLAGS(r9) | 1041 | lwz r9,TI_FLAGS(r9) |
926 | andi. r0,r9,_TIF_NEED_RESCHED | 1042 | andi. r0,r9,_TIF_NEED_RESCHED |
927 | bne- do_resched | 1043 | bne- do_resched |
928 | andi. r0,r9,_TIF_SIGPENDING|_TIF_RESTORE_SIGMASK | 1044 | andi. r0,r9,_TIF_USER_WORK_MASK |
929 | beq restore_user | 1045 | beq restore_user |
930 | do_user_signal: /* r10 contains MSR_KERNEL here */ | 1046 | do_user_signal: /* r10 contains MSR_KERNEL here */ |
931 | ori r10,r10,MSR_EE | 1047 | ori r10,r10,MSR_EE |
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S index 8552e67e3a8b..56d8e5d90c5b 100644 --- a/arch/powerpc/kernel/head_40x.S +++ b/arch/powerpc/kernel/head_40x.S | |||
@@ -93,6 +93,12 @@ _ENTRY(crit_r10) | |||
93 | .space 4 | 93 | .space 4 |
94 | _ENTRY(crit_r11) | 94 | _ENTRY(crit_r11) |
95 | .space 4 | 95 | .space 4 |
96 | _ENTRY(crit_srr0) | ||
97 | .space 4 | ||
98 | _ENTRY(crit_srr1) | ||
99 | .space 4 | ||
100 | _ENTRY(saved_ksp_limit) | ||
101 | .space 4 | ||
96 | 102 | ||
97 | /* | 103 | /* |
98 | * Exception vector entry code. This code runs with address translation | 104 | * Exception vector entry code. This code runs with address translation |
@@ -148,14 +154,14 @@ _ENTRY(crit_r11) | |||
148 | mfcr r10; /* save CR in r10 for now */\ | 154 | mfcr r10; /* save CR in r10 for now */\ |
149 | mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ | 155 | mfspr r11,SPRN_SRR3; /* check whether user or kernel */\ |
150 | andi. r11,r11,MSR_PR; \ | 156 | andi. r11,r11,MSR_PR; \ |
151 | lis r11,critical_stack_top@h; \ | 157 | lis r11,critirq_ctx@ha; \ |
152 | ori r11,r11,critical_stack_top@l; \ | 158 | tophys(r11,r11); \ |
159 | lwz r11,critirq_ctx@l(r11); \ | ||
153 | beq 1f; \ | 160 | beq 1f; \ |
154 | /* COMING FROM USER MODE */ \ | 161 | /* COMING FROM USER MODE */ \ |
155 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ | 162 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ |
156 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ | 163 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ |
157 | addi r11,r11,THREAD_SIZE; \ | 164 | 1: addi r11,r11,THREAD_SIZE-INT_FRAME_SIZE; /* Alloc an excpt frm */\ |
158 | 1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ | ||
159 | tophys(r11,r11); \ | 165 | tophys(r11,r11); \ |
160 | stw r10,_CCR(r11); /* save various registers */\ | 166 | stw r10,_CCR(r11); /* save various registers */\ |
161 | stw r12,GPR12(r11); \ | 167 | stw r12,GPR12(r11); \ |
@@ -996,16 +1002,6 @@ empty_zero_page: | |||
996 | swapper_pg_dir: | 1002 | swapper_pg_dir: |
997 | .space PGD_TABLE_SIZE | 1003 | .space PGD_TABLE_SIZE |
998 | 1004 | ||
999 | |||
1000 | /* Stack for handling critical exceptions from kernel mode */ | ||
1001 | .section .bss | ||
1002 | .align 12 | ||
1003 | exception_stack_bottom: | ||
1004 | .space 4096 | ||
1005 | critical_stack_top: | ||
1006 | .globl exception_stack_top | ||
1007 | exception_stack_top: | ||
1008 | |||
1009 | /* Room for two PTE pointers, usually the kernel and current user pointers | 1005 | /* Room for two PTE pointers, usually the kernel and current user pointers |
1010 | * to their respective root page table. | 1006 | * to their respective root page table. |
1011 | */ | 1007 | */ |
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S index 22b5d2c459a3..2944529e8bf9 100644 --- a/arch/powerpc/kernel/head_44x.S +++ b/arch/powerpc/kernel/head_44x.S | |||
@@ -742,15 +742,6 @@ empty_zero_page: | |||
742 | swapper_pg_dir: | 742 | swapper_pg_dir: |
743 | .space PGD_TABLE_SIZE | 743 | .space PGD_TABLE_SIZE |
744 | 744 | ||
745 | /* Reserved 4k for the critical exception stack & 4k for the machine | ||
746 | * check stack per CPU for kernel mode exceptions */ | ||
747 | .section .bss | ||
748 | .align 12 | ||
749 | exception_stack_bottom: | ||
750 | .space BOOKE_EXCEPTION_STACK_SIZE | ||
751 | .globl exception_stack_top | ||
752 | exception_stack_top: | ||
753 | |||
754 | /* | 745 | /* |
755 | * Room for two PTE pointers, usually the kernel and current user pointers | 746 | * Room for two PTE pointers, usually the kernel and current user pointers |
756 | * to their respective root page table. | 747 | * to their respective root page table. |
diff --git a/arch/powerpc/kernel/head_booke.h b/arch/powerpc/kernel/head_booke.h index aefafc6330c9..505494f1ee7c 100644 --- a/arch/powerpc/kernel/head_booke.h +++ b/arch/powerpc/kernel/head_booke.h | |||
@@ -43,9 +43,7 @@ | |||
43 | SAVE_2GPRS(7, r11) | 43 | SAVE_2GPRS(7, r11) |
44 | 44 | ||
45 | /* To handle the additional exception priority levels on 40x and Book-E | 45 | /* To handle the additional exception priority levels on 40x and Book-E |
46 | * processors we allocate a 4k stack per additional priority level. The various | 46 | * processors we allocate a stack per additional priority level. |
47 | * head_xxx.S files allocate space (exception_stack_top) for each priority's | ||
48 | * stack times the number of CPUs | ||
49 | * | 47 | * |
50 | * On 40x critical is the only additional level | 48 | * On 40x critical is the only additional level |
51 | * On 44x/e500 we have critical and machine check | 49 | * On 44x/e500 we have critical and machine check |
@@ -61,36 +59,37 @@ | |||
61 | * going to critical or their own debug level we aren't currently | 59 | * going to critical or their own debug level we aren't currently |
62 | * providing configurations that micro-optimize space usage. | 60 | * providing configurations that micro-optimize space usage. |
63 | */ | 61 | */ |
64 | #ifdef CONFIG_44x | ||
65 | #define NUM_EXCEPTION_LVLS 2 | ||
66 | #else | ||
67 | #define NUM_EXCEPTION_LVLS 3 | ||
68 | #endif | ||
69 | #define BOOKE_EXCEPTION_STACK_SIZE (4096 * NUM_EXCEPTION_LVLS) | ||
70 | 62 | ||
71 | /* CRIT_SPRG only used in critical exception handling */ | 63 | /* CRIT_SPRG only used in critical exception handling */ |
72 | #define CRIT_SPRG SPRN_SPRG2 | 64 | #define CRIT_SPRG SPRN_SPRG2 |
73 | /* MCHECK_SPRG only used in machine check exception handling */ | 65 | /* MCHECK_SPRG only used in machine check exception handling */ |
74 | #define MCHECK_SPRG SPRN_SPRG6W | 66 | #define MCHECK_SPRG SPRN_SPRG6W |
75 | 67 | ||
76 | #define MCHECK_STACK_TOP (exception_stack_top - 4096) | 68 | #define MCHECK_STACK_BASE mcheckirq_ctx |
77 | #define CRIT_STACK_TOP (exception_stack_top) | 69 | #define CRIT_STACK_BASE critirq_ctx |
78 | 70 | ||
79 | /* only on e200 for now */ | 71 | /* only on e500mc/e200 */ |
80 | #define DEBUG_STACK_TOP (exception_stack_top - 8192) | 72 | #define DEBUG_STACK_BASE dbgirq_ctx |
73 | #ifdef CONFIG_PPC_E500MC | ||
74 | #define DEBUG_SPRG SPRN_SPRG9 | ||
75 | #else | ||
81 | #define DEBUG_SPRG SPRN_SPRG6W | 76 | #define DEBUG_SPRG SPRN_SPRG6W |
77 | #endif | ||
78 | |||
79 | #define EXC_LVL_FRAME_OVERHEAD (THREAD_SIZE - INT_FRAME_SIZE - EXC_LVL_SIZE) | ||
82 | 80 | ||
83 | #ifdef CONFIG_SMP | 81 | #ifdef CONFIG_SMP |
84 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ | 82 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ |
85 | mfspr r8,SPRN_PIR; \ | 83 | mfspr r8,SPRN_PIR; \ |
86 | mulli r8,r8,BOOKE_EXCEPTION_STACK_SIZE; \ | 84 | slwi r8,r8,2; \ |
87 | neg r8,r8; \ | 85 | addis r8,r8,level##_STACK_BASE@ha; \ |
88 | addis r8,r8,level##_STACK_TOP@ha; \ | 86 | lwz r8,level##_STACK_BASE@l(r8); \ |
89 | addi r8,r8,level##_STACK_TOP@l | 87 | addi r8,r8,EXC_LVL_FRAME_OVERHEAD; |
90 | #else | 88 | #else |
91 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ | 89 | #define BOOKE_LOAD_EXC_LEVEL_STACK(level) \ |
92 | lis r8,level##_STACK_TOP@h; \ | 90 | lis r8,level##_STACK_BASE@ha; \ |
93 | ori r8,r8,level##_STACK_TOP@l | 91 | lwz r8,level##_STACK_BASE@l(r8); \ |
92 | addi r8,r8,EXC_LVL_FRAME_OVERHEAD; | ||
94 | #endif | 93 | #endif |
95 | 94 | ||
96 | /* | 95 | /* |
@@ -104,22 +103,36 @@ | |||
104 | #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ | 103 | #define EXC_LEVEL_EXCEPTION_PROLOG(exc_level, exc_level_srr0, exc_level_srr1) \ |
105 | mtspr exc_level##_SPRG,r8; \ | 104 | mtspr exc_level##_SPRG,r8; \ |
106 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ | 105 | BOOKE_LOAD_EXC_LEVEL_STACK(exc_level);/* r8 points to the exc_level stack*/ \ |
107 | stw r10,GPR10-INT_FRAME_SIZE(r8); \ | 106 | stw r9,GPR9(r8); /* save various registers */\ |
108 | stw r11,GPR11-INT_FRAME_SIZE(r8); \ | 107 | mfcr r9; /* save CR in r9 for now */\ |
109 | mfcr r10; /* save CR in r10 for now */\ | 108 | stw r10,GPR10(r8); \ |
110 | mfspr r11,exc_level_srr1; /* check whether user or kernel */\ | 109 | stw r11,GPR11(r8); \ |
111 | andi. r11,r11,MSR_PR; \ | 110 | stw r9,_CCR(r8); /* save CR on stack */\ |
112 | mr r11,r8; \ | 111 | mfspr r10,exc_level_srr1; /* check whether user or kernel */\ |
113 | mfspr r8,exc_level##_SPRG; \ | 112 | andi. r10,r10,MSR_PR; \ |
114 | beq 1f; \ | ||
115 | /* COMING FROM USER MODE */ \ | ||
116 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ | 113 | mfspr r11,SPRN_SPRG3; /* if from user, start at top of */\ |
117 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ | 114 | lwz r11,THREAD_INFO-THREAD(r11); /* this thread's kernel stack */\ |
118 | addi r11,r11,THREAD_SIZE; \ | 115 | addi r11,r11,EXC_LVL_FRAME_OVERHEAD; /* allocate stack frame */\ |
119 | 1: subi r11,r11,INT_FRAME_SIZE; /* Allocate an exception frame */\ | 116 | beq 1f; \ |
120 | stw r10,_CCR(r11); /* save various registers */\ | 117 | /* COMING FROM USER MODE */ \ |
121 | stw r12,GPR12(r11); \ | 118 | stw r9,_CCR(r11); /* save CR */\ |
119 | lwz r10,GPR10(r8); /* copy regs from exception stack */\ | ||
120 | lwz r9,GPR9(r8); \ | ||
121 | stw r10,GPR10(r11); \ | ||
122 | lwz r10,GPR11(r8); \ | ||
122 | stw r9,GPR9(r11); \ | 123 | stw r9,GPR9(r11); \ |
124 | stw r10,GPR11(r11); \ | ||
125 | b 2f; \ | ||
126 | /* COMING FROM PRIV MODE */ \ | ||
127 | 1: lwz r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
128 | lwz r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
129 | stw r9,TI_FLAGS-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
130 | stw r10,TI_PREEMPT-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
131 | lwz r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r11); \ | ||
132 | stw r9,TI_TASK-EXC_LVL_FRAME_OVERHEAD(r8); \ | ||
133 | mr r11,r8; \ | ||
134 | 2: mfspr r8,exc_level##_SPRG; \ | ||
135 | stw r12,GPR12(r11); /* save various registers */\ | ||
123 | mflr r10; \ | 136 | mflr r10; \ |
124 | stw r10,_LINK(r11); \ | 137 | stw r10,_LINK(r11); \ |
125 | mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ | 138 | mfspr r12,SPRN_DEAR; /* save DEAR and ESR in the frame */\ |
@@ -231,7 +244,7 @@ label: | |||
231 | * the code where the exception occurred (since exception entry \ | 244 | * the code where the exception occurred (since exception entry \ |
232 | * doesn't turn off DE automatically). We simulate the effect \ | 245 | * doesn't turn off DE automatically). We simulate the effect \ |
233 | * of turning off DE on entry to an exception handler by turning \ | 246 | * of turning off DE on entry to an exception handler by turning \ |
234 | * off DE in the CSRR1 value and clearing the debug status. \ | 247 | * off DE in the DSRR1 value and clearing the debug status. \ |
235 | */ \ | 248 | */ \ |
236 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ | 249 | mfspr r10,SPRN_DBSR; /* check single-step/branch taken */ \ |
237 | andis. r10,r10,DBSR_IC@h; \ | 250 | andis. r10,r10,DBSR_IC@h; \ |
@@ -262,17 +275,17 @@ label: | |||
262 | lwz r12,GPR12(r11); \ | 275 | lwz r12,GPR12(r11); \ |
263 | mtspr DEBUG_SPRG,r8; \ | 276 | mtspr DEBUG_SPRG,r8; \ |
264 | BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ | 277 | BOOKE_LOAD_EXC_LEVEL_STACK(DEBUG); /* r8 points to the debug stack */ \ |
265 | lwz r10,GPR10-INT_FRAME_SIZE(r8); \ | 278 | lwz r10,GPR10(r8); \ |
266 | lwz r11,GPR11-INT_FRAME_SIZE(r8); \ | 279 | lwz r11,GPR11(r8); \ |
267 | mfspr r8,DEBUG_SPRG; \ | 280 | mfspr r8,DEBUG_SPRG; \ |
268 | \ | 281 | \ |
269 | RFDI; \ | 282 | RFDI; \ |
270 | b .; \ | 283 | b .; \ |
271 | \ | 284 | \ |
272 | /* continue normal handling for a critical exception... */ \ | 285 | /* continue normal handling for a debug exception... */ \ |
273 | 2: mfspr r4,SPRN_DBSR; \ | 286 | 2: mfspr r4,SPRN_DBSR; \ |
274 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 287 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
275 | EXC_XFER_TEMPLATE(DebugException, 0x2002, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) | 288 | EXC_XFER_TEMPLATE(DebugException, 0x2008, (MSR_KERNEL & ~(MSR_ME|MSR_DE|MSR_CE)), NOCOPY, debug_transfer_to_handler, ret_from_debug_exc) |
276 | 289 | ||
277 | #define DEBUG_CRIT_EXCEPTION \ | 290 | #define DEBUG_CRIT_EXCEPTION \ |
278 | START_EXCEPTION(DebugCrit); \ | 291 | START_EXCEPTION(DebugCrit); \ |
@@ -315,8 +328,8 @@ label: | |||
315 | lwz r12,GPR12(r11); \ | 328 | lwz r12,GPR12(r11); \ |
316 | mtspr CRIT_SPRG,r8; \ | 329 | mtspr CRIT_SPRG,r8; \ |
317 | BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ | 330 | BOOKE_LOAD_EXC_LEVEL_STACK(CRIT); /* r8 points to the debug stack */ \ |
318 | lwz r10,GPR10-INT_FRAME_SIZE(r8); \ | 331 | lwz r10,GPR10(r8); \ |
319 | lwz r11,GPR11-INT_FRAME_SIZE(r8); \ | 332 | lwz r11,GPR11(r8); \ |
320 | mfspr r8,CRIT_SPRG; \ | 333 | mfspr r8,CRIT_SPRG; \ |
321 | \ | 334 | \ |
322 | rfci; \ | 335 | rfci; \ |
@@ -367,4 +380,25 @@ label: | |||
367 | addi r3,r1,STACK_FRAME_OVERHEAD; \ | 380 | addi r3,r1,STACK_FRAME_OVERHEAD; \ |
368 | EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) | 381 | EXC_XFER_EE_LITE(0x800, kernel_fp_unavailable_exception) |
369 | 382 | ||
383 | #ifndef __ASSEMBLY__ | ||
384 | struct exception_regs { | ||
385 | unsigned long mas0; | ||
386 | unsigned long mas1; | ||
387 | unsigned long mas2; | ||
388 | unsigned long mas3; | ||
389 | unsigned long mas6; | ||
390 | unsigned long mas7; | ||
391 | unsigned long srr0; | ||
392 | unsigned long srr1; | ||
393 | unsigned long csrr0; | ||
394 | unsigned long csrr1; | ||
395 | unsigned long dsrr0; | ||
396 | unsigned long dsrr1; | ||
397 | unsigned long saved_ksp_limit; | ||
398 | }; | ||
399 | |||
400 | /* ensure this structure is always sized to a multiple of the stack alignment */ | ||
401 | #define STACK_EXC_LVL_FRAME_SIZE _ALIGN_UP(sizeof (struct exception_regs), 16) | ||
402 | |||
403 | #endif /* __ASSEMBLY__ */ | ||
370 | #endif /* __HEAD_BOOKE_H__ */ | 404 | #endif /* __HEAD_BOOKE_H__ */ |
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S index e581524d85bc..c4268500e856 100644 --- a/arch/powerpc/kernel/head_fsl_booke.S +++ b/arch/powerpc/kernel/head_fsl_booke.S | |||
@@ -39,6 +39,7 @@ | |||
39 | #include <asm/thread_info.h> | 39 | #include <asm/thread_info.h> |
40 | #include <asm/ppc_asm.h> | 40 | #include <asm/ppc_asm.h> |
41 | #include <asm/asm-offsets.h> | 41 | #include <asm/asm-offsets.h> |
42 | #include <asm/cache.h> | ||
42 | #include "head_booke.h" | 43 | #include "head_booke.h" |
43 | 44 | ||
44 | /* As with the other PowerPC ports, it is expected that when code | 45 | /* As with the other PowerPC ports, it is expected that when code |
@@ -304,7 +305,7 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
304 | SET_IVOR(13, DataTLBError); | 305 | SET_IVOR(13, DataTLBError); |
305 | SET_IVOR(14, InstructionTLBError); | 306 | SET_IVOR(14, InstructionTLBError); |
306 | SET_IVOR(15, DebugDebug); | 307 | SET_IVOR(15, DebugDebug); |
307 | #if defined(CONFIG_E500) | 308 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) |
308 | SET_IVOR(15, DebugCrit); | 309 | SET_IVOR(15, DebugCrit); |
309 | #endif | 310 | #endif |
310 | SET_IVOR(32, SPEUnavailable); | 311 | SET_IVOR(32, SPEUnavailable); |
@@ -313,6 +314,9 @@ skpinv: addi r6,r6,1 /* Increment */ | |||
313 | #ifndef CONFIG_E200 | 314 | #ifndef CONFIG_E200 |
314 | SET_IVOR(35, PerformanceMonitor); | 315 | SET_IVOR(35, PerformanceMonitor); |
315 | #endif | 316 | #endif |
317 | #ifdef CONFIG_PPC_E500MC | ||
318 | SET_IVOR(36, Doorbell); | ||
319 | #endif | ||
316 | 320 | ||
317 | /* Establish the interrupt vector base */ | 321 | /* Establish the interrupt vector base */ |
318 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ | 322 | lis r4,interrupt_base@h /* IVPR only uses the high 16-bits */ |
@@ -750,10 +754,13 @@ interrupt_base: | |||
750 | /* Performance Monitor */ | 754 | /* Performance Monitor */ |
751 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) | 755 | EXCEPTION(0x2060, PerformanceMonitor, performance_monitor_exception, EXC_XFER_STD) |
752 | 756 | ||
757 | #ifdef CONFIG_PPC_E500MC | ||
758 | EXCEPTION(0x2070, Doorbell, unknown_exception, EXC_XFER_EE) | ||
759 | #endif | ||
753 | 760 | ||
754 | /* Debug Interrupt */ | 761 | /* Debug Interrupt */ |
755 | DEBUG_DEBUG_EXCEPTION | 762 | DEBUG_DEBUG_EXCEPTION |
756 | #if defined(CONFIG_E500) | 763 | #if defined(CONFIG_E500) && !defined(CONFIG_PPC_E500MC) |
757 | DEBUG_CRIT_EXCEPTION | 764 | DEBUG_CRIT_EXCEPTION |
758 | #endif | 765 | #endif |
759 | 766 | ||
@@ -1065,6 +1072,52 @@ _GLOBAL(set_context) | |||
1065 | isync /* Force context change */ | 1072 | isync /* Force context change */ |
1066 | blr | 1073 | blr |
1067 | 1074 | ||
1075 | _GLOBAL(flush_dcache_L1) | ||
1076 | mfspr r3,SPRN_L1CFG0 | ||
1077 | |||
1078 | rlwinm r5,r3,9,3 /* Extract cache block size */ | ||
1079 | twlgti r5,1 /* Only 32 and 64 byte cache blocks | ||
1080 | * are currently defined. | ||
1081 | */ | ||
1082 | li r4,32 | ||
1083 | subfic r6,r5,2 /* r6 = log2(1KiB / cache block size) - | ||
1084 | * log2(number of ways) | ||
1085 | */ | ||
1086 | slw r5,r4,r5 /* r5 = cache block size */ | ||
1087 | |||
1088 | rlwinm r7,r3,0,0xff /* Extract number of KiB in the cache */ | ||
1089 | mulli r7,r7,13 /* An 8-way cache will require 13 | ||
1090 | * loads per set. | ||
1091 | */ | ||
1092 | slw r7,r7,r6 | ||
1093 | |||
1094 | /* save off HID0 and set DCFA */ | ||
1095 | mfspr r8,SPRN_HID0 | ||
1096 | ori r9,r8,HID0_DCFA@l | ||
1097 | mtspr SPRN_HID0,r9 | ||
1098 | isync | ||
1099 | |||
1100 | lis r4,KERNELBASE@h | ||
1101 | mtctr r7 | ||
1102 | |||
1103 | 1: lwz r3,0(r4) /* Load... */ | ||
1104 | add r4,r4,r5 | ||
1105 | bdnz 1b | ||
1106 | |||
1107 | msync | ||
1108 | lis r4,KERNELBASE@h | ||
1109 | mtctr r7 | ||
1110 | |||
1111 | 1: dcbf 0,r4 /* ...and flush. */ | ||
1112 | add r4,r4,r5 | ||
1113 | bdnz 1b | ||
1114 | |||
1115 | /* restore HID0 */ | ||
1116 | mtspr SPRN_HID0,r8 | ||
1117 | isync | ||
1118 | |||
1119 | blr | ||
1120 | |||
1068 | /* | 1121 | /* |
1069 | * We put a few things here that have to be page-aligned. This stuff | 1122 | * We put a few things here that have to be page-aligned. This stuff |
1070 | * goes at the beginning of the data segment, which is page-aligned. | 1123 | * goes at the beginning of the data segment, which is page-aligned. |
@@ -1080,15 +1133,6 @@ empty_zero_page: | |||
1080 | swapper_pg_dir: | 1133 | swapper_pg_dir: |
1081 | .space PGD_TABLE_SIZE | 1134 | .space PGD_TABLE_SIZE |
1082 | 1135 | ||
1083 | /* Reserved 4k for the critical exception stack & 4k for the machine | ||
1084 | * check stack per CPU for kernel mode exceptions */ | ||
1085 | .section .bss | ||
1086 | .align 12 | ||
1087 | exception_stack_bottom: | ||
1088 | .space BOOKE_EXCEPTION_STACK_SIZE * NR_CPUS | ||
1089 | .globl exception_stack_top | ||
1090 | exception_stack_top: | ||
1091 | |||
1092 | /* | 1136 | /* |
1093 | * Room for two PTE pointers, usually the kernel and current user pointers | 1137 | * Room for two PTE pointers, usually the kernel and current user pointers |
1094 | * to their respective root page table. | 1138 | * to their respective root page table. |
diff --git a/arch/powerpc/kernel/idle_6xx.S b/arch/powerpc/kernel/idle_6xx.S index 01bcd52bbf8e..019b02d8844f 100644 --- a/arch/powerpc/kernel/idle_6xx.S +++ b/arch/powerpc/kernel/idle_6xx.S | |||
@@ -153,7 +153,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC) | |||
153 | * address of current. R11 points to the exception frame (physical | 153 | * address of current. R11 points to the exception frame (physical |
154 | * address). We have to preserve r10. | 154 | * address). We have to preserve r10. |
155 | */ | 155 | */ |
156 | _GLOBAL(power_save_6xx_restore) | 156 | _GLOBAL(power_save_ppc32_restore) |
157 | lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */ | 157 | lwz r9,_LINK(r11) /* interrupted in ppc6xx_idle: */ |
158 | stw r9,_NIP(r11) /* make it do a blr */ | 158 | stw r9,_NIP(r11) /* make it do a blr */ |
159 | 159 | ||
diff --git a/arch/powerpc/kernel/idle_e500.S b/arch/powerpc/kernel/idle_e500.S new file mode 100644 index 000000000000..06304034b393 --- /dev/null +++ b/arch/powerpc/kernel/idle_e500.S | |||
@@ -0,0 +1,93 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * Dave Liu <daveliu@freescale.com> | ||
4 | * copy from idle_6xx.S and modify for e500 based processor, | ||
5 | * implement the power_save function in idle. | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; either version | ||
10 | * 2 of the License, or (at your option) any later version. | ||
11 | */ | ||
12 | |||
13 | #include <linux/threads.h> | ||
14 | #include <asm/reg.h> | ||
15 | #include <asm/page.h> | ||
16 | #include <asm/cputable.h> | ||
17 | #include <asm/thread_info.h> | ||
18 | #include <asm/ppc_asm.h> | ||
19 | #include <asm/asm-offsets.h> | ||
20 | |||
21 | .text | ||
22 | |||
23 | _GLOBAL(e500_idle) | ||
24 | rlwinm r3,r1,0,0,31-THREAD_SHIFT /* current thread_info */ | ||
25 | lwz r4,TI_LOCAL_FLAGS(r3) /* set napping bit */ | ||
26 | ori r4,r4,_TLF_NAPPING /* so when we take an exception */ | ||
27 | stw r4,TI_LOCAL_FLAGS(r3) /* it will return to our caller */ | ||
28 | |||
29 | /* Check if we can nap or doze, put HID0 mask in r3 */ | ||
30 | lis r3,0 | ||
31 | BEGIN_FTR_SECTION | ||
32 | lis r3,HID0_DOZE@h | ||
33 | END_FTR_SECTION_IFSET(CPU_FTR_CAN_DOZE) | ||
34 | |||
35 | BEGIN_FTR_SECTION | ||
36 | /* Now check if user enabled NAP mode */ | ||
37 | lis r4,powersave_nap@ha | ||
38 | lwz r4,powersave_nap@l(r4) | ||
39 | cmpwi 0,r4,0 | ||
40 | beq 1f | ||
41 | stwu r1,-16(r1) | ||
42 | mflr r0 | ||
43 | stw r0,20(r1) | ||
44 | bl flush_dcache_L1 | ||
45 | lwz r0,20(r1) | ||
46 | addi r1,r1,16 | ||
47 | mtlr r0 | ||
48 | lis r3,HID0_NAP@h | ||
49 | END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP) | ||
50 | BEGIN_FTR_SECTION | ||
51 | msync | ||
52 | li r7,L2CSR0_L2FL@l | ||
53 | mtspr SPRN_L2CSR0,r7 | ||
54 | 2: | ||
55 | mfspr r7,SPRN_L2CSR0 | ||
56 | andi. r4,r7,L2CSR0_L2FL@l | ||
57 | bne 2b | ||
58 | END_FTR_SECTION_IFSET(CPU_FTR_L2CSR|CPU_FTR_CAN_NAP) | ||
59 | 1: | ||
60 | /* Go to NAP or DOZE now */ | ||
61 | mfspr r4,SPRN_HID0 | ||
62 | rlwinm r4,r4,0,~(HID0_DOZE|HID0_NAP|HID0_SLEEP) | ||
63 | or r4,r4,r3 | ||
64 | isync | ||
65 | mtspr SPRN_HID0,r4 | ||
66 | isync | ||
67 | |||
68 | mfmsr r7 | ||
69 | oris r7,r7,MSR_WE@h | ||
70 | ori r7,r7,MSR_EE | ||
71 | msync | ||
72 | mtmsr r7 | ||
73 | isync | ||
74 | 2: b 2b | ||
75 | |||
76 | /* | ||
77 | * Return from NAP/DOZE mode, restore some CPU specific registers, | ||
78 | * r2 containing physical address of current. | ||
79 | * r11 points to the exception frame (physical address). | ||
80 | * We have to preserve r10. | ||
81 | */ | ||
82 | _GLOBAL(power_save_ppc32_restore) | ||
83 | lwz r9,_LINK(r11) /* interrupted in e500_idle */ | ||
84 | stw r9,_NIP(r11) /* make it do a blr */ | ||
85 | |||
86 | #ifdef CONFIG_SMP | ||
87 | mfspr r12,SPRN_SPRG3 | ||
88 | lwz r11,TI_CPU(r12) /* get cpu number * 4 */ | ||
89 | slwi r11,r11,2 | ||
90 | #else | ||
91 | li r11,0 | ||
92 | #endif | ||
93 | b transfer_to_handler_cont | ||
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c index bcc249d90c4d..d6df018bb584 100644 --- a/arch/powerpc/kernel/irq.c +++ b/arch/powerpc/kernel/irq.c | |||
@@ -356,9 +356,42 @@ void __init init_IRQ(void) | |||
356 | { | 356 | { |
357 | if (ppc_md.init_IRQ) | 357 | if (ppc_md.init_IRQ) |
358 | ppc_md.init_IRQ(); | 358 | ppc_md.init_IRQ(); |
359 | |||
360 | exc_lvl_ctx_init(); | ||
361 | |||
359 | irq_ctx_init(); | 362 | irq_ctx_init(); |
360 | } | 363 | } |
361 | 364 | ||
365 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
366 | struct thread_info *critirq_ctx[NR_CPUS] __read_mostly; | ||
367 | struct thread_info *dbgirq_ctx[NR_CPUS] __read_mostly; | ||
368 | struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly; | ||
369 | |||
370 | void exc_lvl_ctx_init(void) | ||
371 | { | ||
372 | struct thread_info *tp; | ||
373 | int i; | ||
374 | |||
375 | for_each_possible_cpu(i) { | ||
376 | memset((void *)critirq_ctx[i], 0, THREAD_SIZE); | ||
377 | tp = critirq_ctx[i]; | ||
378 | tp->cpu = i; | ||
379 | tp->preempt_count = 0; | ||
380 | |||
381 | #ifdef CONFIG_BOOKE | ||
382 | memset((void *)dbgirq_ctx[i], 0, THREAD_SIZE); | ||
383 | tp = dbgirq_ctx[i]; | ||
384 | tp->cpu = i; | ||
385 | tp->preempt_count = 0; | ||
386 | |||
387 | memset((void *)mcheckirq_ctx[i], 0, THREAD_SIZE); | ||
388 | tp = mcheckirq_ctx[i]; | ||
389 | tp->cpu = i; | ||
390 | tp->preempt_count = HARDIRQ_OFFSET; | ||
391 | #endif | ||
392 | } | ||
393 | } | ||
394 | #endif | ||
362 | 395 | ||
363 | #ifdef CONFIG_IRQSTACKS | 396 | #ifdef CONFIG_IRQSTACKS |
364 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; | 397 | struct thread_info *softirq_ctx[NR_CPUS] __read_mostly; |
@@ -465,7 +498,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node, | |||
465 | host->revmap_type = revmap_type; | 498 | host->revmap_type = revmap_type; |
466 | host->inval_irq = inval_irq; | 499 | host->inval_irq = inval_irq; |
467 | host->ops = ops; | 500 | host->ops = ops; |
468 | host->of_node = of_node; | 501 | host->of_node = of_node_get(of_node); |
469 | 502 | ||
470 | if (host->ops->match == NULL) | 503 | if (host->ops->match == NULL) |
471 | host->ops->match = default_irq_host_match; | 504 | host->ops->match = default_irq_host_match; |
diff --git a/arch/powerpc/kernel/kprobes.c b/arch/powerpc/kernel/kprobes.c index c176c513566b..4ba2af125450 100644 --- a/arch/powerpc/kernel/kprobes.c +++ b/arch/powerpc/kernel/kprobes.c | |||
@@ -34,6 +34,13 @@ | |||
34 | #include <asm/cacheflush.h> | 34 | #include <asm/cacheflush.h> |
35 | #include <asm/sstep.h> | 35 | #include <asm/sstep.h> |
36 | #include <asm/uaccess.h> | 36 | #include <asm/uaccess.h> |
37 | #include <asm/system.h> | ||
38 | |||
39 | #ifdef CONFIG_BOOKE | ||
40 | #define MSR_SINGLESTEP (MSR_DE) | ||
41 | #else | ||
42 | #define MSR_SINGLESTEP (MSR_SE) | ||
43 | #endif | ||
37 | 44 | ||
38 | DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; | 45 | DEFINE_PER_CPU(struct kprobe *, current_kprobe) = NULL; |
39 | DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); | 46 | DEFINE_PER_CPU(struct kprobe_ctlblk, kprobe_ctlblk); |
@@ -53,7 +60,8 @@ int __kprobes arch_prepare_kprobe(struct kprobe *p) | |||
53 | ret = -EINVAL; | 60 | ret = -EINVAL; |
54 | } | 61 | } |
55 | 62 | ||
56 | /* insn must be on a special executable page on ppc64 */ | 63 | /* insn must be on a special executable page on ppc64. This is |
64 | * not explicitly required on ppc32 (right now), but it doesn't hurt */ | ||
57 | if (!ret) { | 65 | if (!ret) { |
58 | p->ainsn.insn = get_insn_slot(); | 66 | p->ainsn.insn = get_insn_slot(); |
59 | if (!p->ainsn.insn) | 67 | if (!p->ainsn.insn) |
@@ -95,7 +103,16 @@ void __kprobes arch_remove_kprobe(struct kprobe *p) | |||
95 | 103 | ||
96 | static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) | 104 | static void __kprobes prepare_singlestep(struct kprobe *p, struct pt_regs *regs) |
97 | { | 105 | { |
98 | regs->msr |= MSR_SE; | 106 | /* We turn off async exceptions to ensure that the single step will |
107 | * be for the instruction we have the kprobe on, if we dont its | ||
108 | * possible we'd get the single step reported for an exception handler | ||
109 | * like Decrementer or External Interrupt */ | ||
110 | regs->msr &= ~MSR_EE; | ||
111 | regs->msr |= MSR_SINGLESTEP; | ||
112 | #ifdef CONFIG_BOOKE | ||
113 | regs->msr &= ~MSR_CE; | ||
114 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) | DBCR0_IC | DBCR0_IDM); | ||
115 | #endif | ||
99 | 116 | ||
100 | /* | 117 | /* |
101 | * On powerpc we should single step on the original | 118 | * On powerpc we should single step on the original |
@@ -158,7 +175,8 @@ static int __kprobes kprobe_handler(struct pt_regs *regs) | |||
158 | kprobe_opcode_t insn = *p->ainsn.insn; | 175 | kprobe_opcode_t insn = *p->ainsn.insn; |
159 | if (kcb->kprobe_status == KPROBE_HIT_SS && | 176 | if (kcb->kprobe_status == KPROBE_HIT_SS && |
160 | is_trap(insn)) { | 177 | is_trap(insn)) { |
161 | regs->msr &= ~MSR_SE; | 178 | /* Turn off 'trace' bits */ |
179 | regs->msr &= ~MSR_SINGLESTEP; | ||
162 | regs->msr |= kcb->kprobe_saved_msr; | 180 | regs->msr |= kcb->kprobe_saved_msr; |
163 | goto no_kprobe; | 181 | goto no_kprobe; |
164 | } | 182 | } |
@@ -376,6 +394,10 @@ static int __kprobes post_kprobe_handler(struct pt_regs *regs) | |||
376 | if (!cur) | 394 | if (!cur) |
377 | return 0; | 395 | return 0; |
378 | 396 | ||
397 | /* make sure we got here for instruction we have a kprobe on */ | ||
398 | if (((unsigned long)cur->ainsn.insn + 4) != regs->nip) | ||
399 | return 0; | ||
400 | |||
379 | if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) { | 401 | if ((kcb->kprobe_status != KPROBE_REENTER) && cur->post_handler) { |
380 | kcb->kprobe_status = KPROBE_HIT_SSDONE; | 402 | kcb->kprobe_status = KPROBE_HIT_SSDONE; |
381 | cur->post_handler(cur, regs, 0); | 403 | cur->post_handler(cur, regs, 0); |
@@ -395,10 +417,10 @@ out: | |||
395 | 417 | ||
396 | /* | 418 | /* |
397 | * if somebody else is singlestepping across a probe point, msr | 419 | * if somebody else is singlestepping across a probe point, msr |
398 | * will have SE set, in which case, continue the remaining processing | 420 | * will have DE/SE set, in which case, continue the remaining processing |
399 | * of do_debug, as if this is not a probe hit. | 421 | * of do_debug, as if this is not a probe hit. |
400 | */ | 422 | */ |
401 | if (regs->msr & MSR_SE) | 423 | if (regs->msr & MSR_SINGLESTEP) |
402 | return 0; | 424 | return 0; |
403 | 425 | ||
404 | return 1; | 426 | return 1; |
@@ -421,7 +443,7 @@ int __kprobes kprobe_fault_handler(struct pt_regs *regs, int trapnr) | |||
421 | * normal page fault. | 443 | * normal page fault. |
422 | */ | 444 | */ |
423 | regs->nip = (unsigned long)cur->addr; | 445 | regs->nip = (unsigned long)cur->addr; |
424 | regs->msr &= ~MSR_SE; | 446 | regs->msr &= ~MSR_SINGLESTEP; /* Turn off 'trace' bits */ |
425 | regs->msr |= kcb->kprobe_saved_msr; | 447 | regs->msr |= kcb->kprobe_saved_msr; |
426 | if (kcb->kprobe_status == KPROBE_REENTER) | 448 | if (kcb->kprobe_status == KPROBE_REENTER) |
427 | restore_previous_kprobe(kcb); | 449 | restore_previous_kprobe(kcb); |
@@ -498,7 +520,7 @@ int __kprobes kprobe_exceptions_notify(struct notifier_block *self, | |||
498 | #ifdef CONFIG_PPC64 | 520 | #ifdef CONFIG_PPC64 |
499 | unsigned long arch_deref_entry_point(void *entry) | 521 | unsigned long arch_deref_entry_point(void *entry) |
500 | { | 522 | { |
501 | return (unsigned long)(((func_descr_t *)entry)->entry); | 523 | return ((func_descr_t *)entry)->entry; |
502 | } | 524 | } |
503 | #endif | 525 | #endif |
504 | 526 | ||
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c index 1e656b43ad7f..827a5726a035 100644 --- a/arch/powerpc/kernel/lparcfg.c +++ b/arch/powerpc/kernel/lparcfg.c | |||
@@ -573,7 +573,7 @@ static int lparcfg_open(struct inode *inode, struct file *file) | |||
573 | return single_open(file, lparcfg_data, NULL); | 573 | return single_open(file, lparcfg_data, NULL); |
574 | } | 574 | } |
575 | 575 | ||
576 | const struct file_operations lparcfg_fops = { | 576 | static const struct file_operations lparcfg_fops = { |
577 | .owner = THIS_MODULE, | 577 | .owner = THIS_MODULE, |
578 | .read = seq_read, | 578 | .read = seq_read, |
579 | .write = lparcfg_write, | 579 | .write = lparcfg_write, |
@@ -581,7 +581,7 @@ const struct file_operations lparcfg_fops = { | |||
581 | .release = single_release, | 581 | .release = single_release, |
582 | }; | 582 | }; |
583 | 583 | ||
584 | int __init lparcfg_init(void) | 584 | static int __init lparcfg_init(void) |
585 | { | 585 | { |
586 | struct proc_dir_entry *ent; | 586 | struct proc_dir_entry *ent; |
587 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; | 587 | mode_t mode = S_IRUSR | S_IRGRP | S_IROTH; |
@@ -601,7 +601,7 @@ int __init lparcfg_init(void) | |||
601 | return 0; | 601 | return 0; |
602 | } | 602 | } |
603 | 603 | ||
604 | void __exit lparcfg_cleanup(void) | 604 | static void __exit lparcfg_cleanup(void) |
605 | { | 605 | { |
606 | if (proc_ppc64_lparcfg) | 606 | if (proc_ppc64_lparcfg) |
607 | remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); | 607 | remove_proc_entry("lparcfg", proc_ppc64_lparcfg->parent); |
diff --git a/arch/powerpc/kernel/machine_kexec_64.c b/arch/powerpc/kernel/machine_kexec_64.c index 704375bda73a..631dfd614b21 100644 --- a/arch/powerpc/kernel/machine_kexec_64.c +++ b/arch/powerpc/kernel/machine_kexec_64.c | |||
@@ -158,7 +158,7 @@ void kexec_copy_flush(struct kimage *image) | |||
158 | * on calling the interrupts, but we would like to call it off irq level | 158 | * on calling the interrupts, but we would like to call it off irq level |
159 | * so that the interrupt controller is clean. | 159 | * so that the interrupt controller is clean. |
160 | */ | 160 | */ |
161 | void kexec_smp_down(void *arg) | 161 | static void kexec_smp_down(void *arg) |
162 | { | 162 | { |
163 | if (ppc_md.kexec_cpu_down) | 163 | if (ppc_md.kexec_cpu_down) |
164 | ppc_md.kexec_cpu_down(0, 1); | 164 | ppc_md.kexec_cpu_down(0, 1); |
@@ -249,7 +249,7 @@ static void kexec_prepare_cpus(void) | |||
249 | * We could use a smaller stack if we don't care about anything using | 249 | * We could use a smaller stack if we don't care about anything using |
250 | * current, but that audit has not been performed. | 250 | * current, but that audit has not been performed. |
251 | */ | 251 | */ |
252 | union thread_union kexec_stack | 252 | static union thread_union kexec_stack |
253 | __attribute__((__section__(".data.init_task"))) = { }; | 253 | __attribute__((__section__(".data.init_task"))) = { }; |
254 | 254 | ||
255 | /* Our assembly helper, in kexec_stub.S */ | 255 | /* Our assembly helper, in kexec_stub.S */ |
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S index 89aaaa6f3561..6321ae36f729 100644 --- a/arch/powerpc/kernel/misc_32.S +++ b/arch/powerpc/kernel/misc_32.S | |||
@@ -489,7 +489,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_UNIFIED_ID_CACHE) | |||
489 | * | 489 | * |
490 | * flush_icache_range(unsigned long start, unsigned long stop) | 490 | * flush_icache_range(unsigned long start, unsigned long stop) |
491 | */ | 491 | */ |
492 | _GLOBAL(__flush_icache_range) | 492 | _KPROBE(__flush_icache_range) |
493 | BEGIN_FTR_SECTION | 493 | BEGIN_FTR_SECTION |
494 | blr /* for 601, do nothing */ | 494 | blr /* for 601, do nothing */ |
495 | END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) | 495 | END_FTR_SECTION_IFSET(CPU_FTR_COHERENT_ICACHE) |
diff --git a/arch/powerpc/kernel/msi.c b/arch/powerpc/kernel/msi.c index c62d1012c013..3bb7d3dd28be 100644 --- a/arch/powerpc/kernel/msi.c +++ b/arch/powerpc/kernel/msi.c | |||
@@ -34,5 +34,5 @@ int arch_setup_msi_irqs(struct pci_dev *dev, int nvec, int type) | |||
34 | 34 | ||
35 | void arch_teardown_msi_irqs(struct pci_dev *dev) | 35 | void arch_teardown_msi_irqs(struct pci_dev *dev) |
36 | { | 36 | { |
37 | return ppc_md.teardown_msi_irqs(dev); | 37 | ppc_md.teardown_msi_irqs(dev); |
38 | } | 38 | } |
diff --git a/arch/powerpc/kernel/of_device.c b/arch/powerpc/kernel/of_device.c index 5748ddb47d9f..e9be908f199b 100644 --- a/arch/powerpc/kernel/of_device.c +++ b/arch/powerpc/kernel/of_device.c | |||
@@ -89,54 +89,6 @@ struct of_device *of_device_alloc(struct device_node *np, | |||
89 | } | 89 | } |
90 | EXPORT_SYMBOL(of_device_alloc); | 90 | EXPORT_SYMBOL(of_device_alloc); |
91 | 91 | ||
92 | ssize_t of_device_get_modalias(struct of_device *ofdev, | ||
93 | char *str, ssize_t len) | ||
94 | { | ||
95 | const char *compat; | ||
96 | int cplen, i; | ||
97 | ssize_t tsize, csize, repend; | ||
98 | |||
99 | /* Name & Type */ | ||
100 | csize = snprintf(str, len, "of:N%sT%s", | ||
101 | ofdev->node->name, ofdev->node->type); | ||
102 | |||
103 | /* Get compatible property if any */ | ||
104 | compat = of_get_property(ofdev->node, "compatible", &cplen); | ||
105 | if (!compat) | ||
106 | return csize; | ||
107 | |||
108 | /* Find true end (we tolerate multiple \0 at the end */ | ||
109 | for (i=(cplen-1); i>=0 && !compat[i]; i--) | ||
110 | cplen--; | ||
111 | if (!cplen) | ||
112 | return csize; | ||
113 | cplen++; | ||
114 | |||
115 | /* Check space (need cplen+1 chars including final \0) */ | ||
116 | tsize = csize + cplen; | ||
117 | repend = tsize; | ||
118 | |||
119 | if (csize>=len) /* @ the limit, all is already filled */ | ||
120 | return tsize; | ||
121 | |||
122 | if (tsize>=len) { /* limit compat list */ | ||
123 | cplen = len-csize-1; | ||
124 | repend = len; | ||
125 | } | ||
126 | |||
127 | /* Copy and do char replacement */ | ||
128 | memcpy(&str[csize+1], compat, cplen); | ||
129 | for (i=csize; i<repend; i++) { | ||
130 | char c = str[i]; | ||
131 | if (c=='\0') | ||
132 | str[i] = 'C'; | ||
133 | else if (c==' ') | ||
134 | str[i] = '_'; | ||
135 | } | ||
136 | |||
137 | return tsize; | ||
138 | } | ||
139 | |||
140 | int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) | 92 | int of_device_uevent(struct device *dev, struct kobj_uevent_env *env) |
141 | { | 93 | { |
142 | struct of_device *ofdev; | 94 | struct of_device *ofdev; |
diff --git a/arch/powerpc/kernel/rtas-proc.c b/arch/powerpc/kernel/rtas-proc.c index f9c6abc84a94..1be9fe38bcb5 100644 --- a/arch/powerpc/kernel/rtas-proc.c +++ b/arch/powerpc/kernel/rtas-proc.c | |||
@@ -160,7 +160,7 @@ static int sensors_open(struct inode *inode, struct file *file) | |||
160 | return single_open(file, ppc_rtas_sensors_show, NULL); | 160 | return single_open(file, ppc_rtas_sensors_show, NULL); |
161 | } | 161 | } |
162 | 162 | ||
163 | const struct file_operations ppc_rtas_sensors_operations = { | 163 | static const struct file_operations ppc_rtas_sensors_operations = { |
164 | .open = sensors_open, | 164 | .open = sensors_open, |
165 | .read = seq_read, | 165 | .read = seq_read, |
166 | .llseek = seq_lseek, | 166 | .llseek = seq_lseek, |
@@ -172,7 +172,7 @@ static int poweron_open(struct inode *inode, struct file *file) | |||
172 | return single_open(file, ppc_rtas_poweron_show, NULL); | 172 | return single_open(file, ppc_rtas_poweron_show, NULL); |
173 | } | 173 | } |
174 | 174 | ||
175 | const struct file_operations ppc_rtas_poweron_operations = { | 175 | static const struct file_operations ppc_rtas_poweron_operations = { |
176 | .open = poweron_open, | 176 | .open = poweron_open, |
177 | .read = seq_read, | 177 | .read = seq_read, |
178 | .llseek = seq_lseek, | 178 | .llseek = seq_lseek, |
@@ -185,7 +185,7 @@ static int progress_open(struct inode *inode, struct file *file) | |||
185 | return single_open(file, ppc_rtas_progress_show, NULL); | 185 | return single_open(file, ppc_rtas_progress_show, NULL); |
186 | } | 186 | } |
187 | 187 | ||
188 | const struct file_operations ppc_rtas_progress_operations = { | 188 | static const struct file_operations ppc_rtas_progress_operations = { |
189 | .open = progress_open, | 189 | .open = progress_open, |
190 | .read = seq_read, | 190 | .read = seq_read, |
191 | .llseek = seq_lseek, | 191 | .llseek = seq_lseek, |
@@ -198,7 +198,7 @@ static int clock_open(struct inode *inode, struct file *file) | |||
198 | return single_open(file, ppc_rtas_clock_show, NULL); | 198 | return single_open(file, ppc_rtas_clock_show, NULL); |
199 | } | 199 | } |
200 | 200 | ||
201 | const struct file_operations ppc_rtas_clock_operations = { | 201 | static const struct file_operations ppc_rtas_clock_operations = { |
202 | .open = clock_open, | 202 | .open = clock_open, |
203 | .read = seq_read, | 203 | .read = seq_read, |
204 | .llseek = seq_lseek, | 204 | .llseek = seq_lseek, |
@@ -211,7 +211,7 @@ static int tone_freq_open(struct inode *inode, struct file *file) | |||
211 | return single_open(file, ppc_rtas_tone_freq_show, NULL); | 211 | return single_open(file, ppc_rtas_tone_freq_show, NULL); |
212 | } | 212 | } |
213 | 213 | ||
214 | const struct file_operations ppc_rtas_tone_freq_operations = { | 214 | static const struct file_operations ppc_rtas_tone_freq_operations = { |
215 | .open = tone_freq_open, | 215 | .open = tone_freq_open, |
216 | .read = seq_read, | 216 | .read = seq_read, |
217 | .llseek = seq_lseek, | 217 | .llseek = seq_lseek, |
@@ -224,7 +224,7 @@ static int tone_volume_open(struct inode *inode, struct file *file) | |||
224 | return single_open(file, ppc_rtas_tone_volume_show, NULL); | 224 | return single_open(file, ppc_rtas_tone_volume_show, NULL); |
225 | } | 225 | } |
226 | 226 | ||
227 | const struct file_operations ppc_rtas_tone_volume_operations = { | 227 | static const struct file_operations ppc_rtas_tone_volume_operations = { |
228 | .open = tone_volume_open, | 228 | .open = tone_volume_open, |
229 | .read = seq_read, | 229 | .read = seq_read, |
230 | .llseek = seq_lseek, | 230 | .llseek = seq_lseek, |
@@ -237,7 +237,7 @@ static int rmo_buf_open(struct inode *inode, struct file *file) | |||
237 | return single_open(file, ppc_rtas_rmo_buf_show, NULL); | 237 | return single_open(file, ppc_rtas_rmo_buf_show, NULL); |
238 | } | 238 | } |
239 | 239 | ||
240 | const struct file_operations ppc_rtas_rmo_buf_ops = { | 240 | static const struct file_operations ppc_rtas_rmo_buf_ops = { |
241 | .open = rmo_buf_open, | 241 | .open = rmo_buf_open, |
242 | .read = seq_read, | 242 | .read = seq_read, |
243 | .llseek = seq_lseek, | 243 | .llseek = seq_lseek, |
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c index 34843c318419..2a60bd3e3afa 100644 --- a/arch/powerpc/kernel/rtas.c +++ b/arch/powerpc/kernel/rtas.c | |||
@@ -340,8 +340,8 @@ int rtas_get_error_log_max(void) | |||
340 | EXPORT_SYMBOL(rtas_get_error_log_max); | 340 | EXPORT_SYMBOL(rtas_get_error_log_max); |
341 | 341 | ||
342 | 342 | ||
343 | char rtas_err_buf[RTAS_ERROR_LOG_MAX]; | 343 | static char rtas_err_buf[RTAS_ERROR_LOG_MAX]; |
344 | int rtas_last_error_token; | 344 | static int rtas_last_error_token; |
345 | 345 | ||
346 | /** Return a copy of the detailed error text associated with the | 346 | /** Return a copy of the detailed error text associated with the |
347 | * most recent failed call to rtas. Because the error text | 347 | * most recent failed call to rtas. Because the error text |
@@ -484,7 +484,7 @@ unsigned int rtas_busy_delay(int status) | |||
484 | } | 484 | } |
485 | EXPORT_SYMBOL(rtas_busy_delay); | 485 | EXPORT_SYMBOL(rtas_busy_delay); |
486 | 486 | ||
487 | int rtas_error_rc(int rtas_rc) | 487 | static int rtas_error_rc(int rtas_rc) |
488 | { | 488 | { |
489 | int rc; | 489 | int rc; |
490 | 490 | ||
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c index 0a5e22b22729..09ded5c424a9 100644 --- a/arch/powerpc/kernel/rtas_flash.c +++ b/arch/powerpc/kernel/rtas_flash.c | |||
@@ -731,7 +731,7 @@ static const struct file_operations validate_flash_operations = { | |||
731 | .release = validate_flash_release, | 731 | .release = validate_flash_release, |
732 | }; | 732 | }; |
733 | 733 | ||
734 | int __init rtas_flash_init(void) | 734 | static int __init rtas_flash_init(void) |
735 | { | 735 | { |
736 | int rc; | 736 | int rc; |
737 | 737 | ||
@@ -817,7 +817,7 @@ cleanup: | |||
817 | return rc; | 817 | return rc; |
818 | } | 818 | } |
819 | 819 | ||
820 | void __exit rtas_flash_cleanup(void) | 820 | static void __exit rtas_flash_cleanup(void) |
821 | { | 821 | { |
822 | rtas_flash_term_hook = NULL; | 822 | rtas_flash_term_hook = NULL; |
823 | 823 | ||
diff --git a/arch/powerpc/kernel/rtas_pci.c b/arch/powerpc/kernel/rtas_pci.c index 3ab88a9dc70d..589a2797eac2 100644 --- a/arch/powerpc/kernel/rtas_pci.c +++ b/arch/powerpc/kernel/rtas_pci.c | |||
@@ -155,12 +155,12 @@ static int rtas_pci_write_config(struct pci_bus *bus, | |||
155 | return PCIBIOS_DEVICE_NOT_FOUND; | 155 | return PCIBIOS_DEVICE_NOT_FOUND; |
156 | } | 156 | } |
157 | 157 | ||
158 | struct pci_ops rtas_pci_ops = { | 158 | static struct pci_ops rtas_pci_ops = { |
159 | .read = rtas_pci_read_config, | 159 | .read = rtas_pci_read_config, |
160 | .write = rtas_pci_write_config, | 160 | .write = rtas_pci_write_config, |
161 | }; | 161 | }; |
162 | 162 | ||
163 | int is_python(struct device_node *dev) | 163 | static int is_python(struct device_node *dev) |
164 | { | 164 | { |
165 | const char *model = of_get_property(dev, "model", NULL); | 165 | const char *model = of_get_property(dev, "model", NULL); |
166 | 166 | ||
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c index db540eab09f4..61a3f4132087 100644 --- a/arch/powerpc/kernel/setup-common.c +++ b/arch/powerpc/kernel/setup-common.c | |||
@@ -500,6 +500,7 @@ void __init smp_setup_cpu_sibling_map(void) | |||
500 | } | 500 | } |
501 | #endif /* CONFIG_SMP */ | 501 | #endif /* CONFIG_SMP */ |
502 | 502 | ||
503 | #ifdef CONFIG_PCSPKR_PLATFORM | ||
503 | static __init int add_pcspkr(void) | 504 | static __init int add_pcspkr(void) |
504 | { | 505 | { |
505 | struct device_node *np; | 506 | struct device_node *np; |
@@ -522,6 +523,7 @@ static __init int add_pcspkr(void) | |||
522 | return ret; | 523 | return ret; |
523 | } | 524 | } |
524 | device_initcall(add_pcspkr); | 525 | device_initcall(add_pcspkr); |
526 | #endif /* CONFIG_PCSPKR_PLATFORM */ | ||
525 | 527 | ||
526 | void probe_machine(void) | 528 | void probe_machine(void) |
527 | { | 529 | { |
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c index 5112a4aa801d..9e83add54290 100644 --- a/arch/powerpc/kernel/setup_32.c +++ b/arch/powerpc/kernel/setup_32.c | |||
@@ -127,6 +127,11 @@ void __init machine_init(unsigned long dt_ptr, unsigned long phys) | |||
127 | ppc_md.power_save = ppc6xx_idle; | 127 | ppc_md.power_save = ppc6xx_idle; |
128 | #endif | 128 | #endif |
129 | 129 | ||
130 | #ifdef CONFIG_E500 | ||
131 | if (cpu_has_feature(CPU_FTR_CAN_DOZE) || | ||
132 | cpu_has_feature(CPU_FTR_CAN_NAP)) | ||
133 | ppc_md.power_save = e500_idle; | ||
134 | #endif | ||
130 | if (ppc_md.progress) | 135 | if (ppc_md.progress) |
131 | ppc_md.progress("id mach(): done", 0x200); | 136 | ppc_md.progress("id mach(): done", 0x200); |
132 | } | 137 | } |
@@ -248,6 +253,28 @@ static void __init irqstack_early_init(void) | |||
248 | #define irqstack_early_init() | 253 | #define irqstack_early_init() |
249 | #endif | 254 | #endif |
250 | 255 | ||
256 | #if defined(CONFIG_BOOKE) || defined(CONFIG_40x) | ||
257 | static void __init exc_lvl_early_init(void) | ||
258 | { | ||
259 | unsigned int i; | ||
260 | |||
261 | /* interrupt stacks must be in lowmem, we get that for free on ppc32 | ||
262 | * as the lmb is limited to lowmem by LMB_REAL_LIMIT */ | ||
263 | for_each_possible_cpu(i) { | ||
264 | critirq_ctx[i] = (struct thread_info *) | ||
265 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
266 | #ifdef CONFIG_BOOKE | ||
267 | dbgirq_ctx[i] = (struct thread_info *) | ||
268 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
269 | mcheckirq_ctx[i] = (struct thread_info *) | ||
270 | __va(lmb_alloc(THREAD_SIZE, THREAD_SIZE)); | ||
271 | #endif | ||
272 | } | ||
273 | } | ||
274 | #else | ||
275 | #define exc_lvl_early_init() | ||
276 | #endif | ||
277 | |||
251 | /* Warning, IO base is not yet inited */ | 278 | /* Warning, IO base is not yet inited */ |
252 | void __init setup_arch(char **cmdline_p) | 279 | void __init setup_arch(char **cmdline_p) |
253 | { | 280 | { |
@@ -305,6 +332,8 @@ void __init setup_arch(char **cmdline_p) | |||
305 | init_mm.end_data = (unsigned long) _edata; | 332 | init_mm.end_data = (unsigned long) _edata; |
306 | init_mm.brk = klimit; | 333 | init_mm.brk = klimit; |
307 | 334 | ||
335 | exc_lvl_early_init(); | ||
336 | |||
308 | irqstack_early_init(); | 337 | irqstack_early_init(); |
309 | 338 | ||
310 | /* set up the bootmem stuff with available memory */ | 339 | /* set up the bootmem stuff with available memory */ |
diff --git a/arch/powerpc/kernel/signal.c b/arch/powerpc/kernel/signal.c index a65a44fbe523..ad55488939c3 100644 --- a/arch/powerpc/kernel/signal.c +++ b/arch/powerpc/kernel/signal.c | |||
@@ -120,7 +120,7 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
120 | int ret; | 120 | int ret; |
121 | int is32 = is_32bit_task(); | 121 | int is32 = is_32bit_task(); |
122 | 122 | ||
123 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | 123 | if (current_thread_info()->local_flags & _TLF_RESTORE_SIGMASK) |
124 | oldset = ¤t->saved_sigmask; | 124 | oldset = ¤t->saved_sigmask; |
125 | else if (!oldset) | 125 | else if (!oldset) |
126 | oldset = ¤t->blocked; | 126 | oldset = ¤t->blocked; |
@@ -131,9 +131,10 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
131 | check_syscall_restart(regs, &ka, signr > 0); | 131 | check_syscall_restart(regs, &ka, signr > 0); |
132 | 132 | ||
133 | if (signr <= 0) { | 133 | if (signr <= 0) { |
134 | struct thread_info *ti = current_thread_info(); | ||
134 | /* No signal to deliver -- put the saved sigmask back */ | 135 | /* No signal to deliver -- put the saved sigmask back */ |
135 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) { | 136 | if (ti->local_flags & _TLF_RESTORE_SIGMASK) { |
136 | clear_thread_flag(TIF_RESTORE_SIGMASK); | 137 | ti->local_flags &= ~_TLF_RESTORE_SIGMASK; |
137 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); | 138 | sigprocmask(SIG_SETMASK, ¤t->saved_sigmask, NULL); |
138 | } | 139 | } |
139 | return 0; /* no signals delivered */ | 140 | return 0; /* no signals delivered */ |
@@ -169,10 +170,9 @@ int do_signal(sigset_t *oldset, struct pt_regs *regs) | |||
169 | 170 | ||
170 | /* | 171 | /* |
171 | * A signal was successfully delivered; the saved sigmask is in | 172 | * A signal was successfully delivered; the saved sigmask is in |
172 | * its frame, and we can clear the TIF_RESTORE_SIGMASK flag. | 173 | * its frame, and we can clear the TLF_RESTORE_SIGMASK flag. |
173 | */ | 174 | */ |
174 | if (test_thread_flag(TIF_RESTORE_SIGMASK)) | 175 | current_thread_info()->local_flags &= ~_TLF_RESTORE_SIGMASK; |
175 | clear_thread_flag(TIF_RESTORE_SIGMASK); | ||
176 | } | 176 | } |
177 | 177 | ||
178 | return ret; | 178 | return ret; |
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c index ad6943468ee9..4ae16d179803 100644 --- a/arch/powerpc/kernel/signal_32.c +++ b/arch/powerpc/kernel/signal_32.c | |||
@@ -243,7 +243,7 @@ long sys_sigsuspend(old_sigset_t mask) | |||
243 | 243 | ||
244 | current->state = TASK_INTERRUPTIBLE; | 244 | current->state = TASK_INTERRUPTIBLE; |
245 | schedule(); | 245 | schedule(); |
246 | set_thread_flag(TIF_RESTORE_SIGMASK); | 246 | set_restore_sigmask(); |
247 | return -ERESTARTNOHAND; | 247 | return -ERESTARTNOHAND; |
248 | } | 248 | } |
249 | 249 | ||
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c index 1457aa0a08f1..ba7989ffaeee 100644 --- a/arch/powerpc/kernel/smp.c +++ b/arch/powerpc/kernel/smp.c | |||
@@ -365,12 +365,8 @@ void smp_call_function_interrupt(void) | |||
365 | } | 365 | } |
366 | } | 366 | } |
367 | 367 | ||
368 | extern struct gettimeofday_struct do_gtod; | ||
369 | |||
370 | struct thread_info *current_set[NR_CPUS]; | 368 | struct thread_info *current_set[NR_CPUS]; |
371 | 369 | ||
372 | DECLARE_PER_CPU(unsigned int, pvr); | ||
373 | |||
374 | static void __devinit smp_store_cpu_info(int id) | 370 | static void __devinit smp_store_cpu_info(int id) |
375 | { | 371 | { |
376 | per_cpu(pvr, id) = mfspr(SPRN_PVR); | 372 | per_cpu(pvr, id) = mfspr(SPRN_PVR); |
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c index 73401e83739a..c73fc33aa817 100644 --- a/arch/powerpc/kernel/time.c +++ b/arch/powerpc/kernel/time.c | |||
@@ -129,7 +129,7 @@ static unsigned long __initdata iSeries_recal_titan; | |||
129 | static signed long __initdata iSeries_recal_tb; | 129 | static signed long __initdata iSeries_recal_tb; |
130 | 130 | ||
131 | /* Forward declaration is only needed for iSereis compiles */ | 131 | /* Forward declaration is only needed for iSereis compiles */ |
132 | void __init clocksource_init(void); | 132 | static void __init clocksource_init(void); |
133 | #endif | 133 | #endif |
134 | 134 | ||
135 | #define XSEC_PER_SEC (1024*1024) | 135 | #define XSEC_PER_SEC (1024*1024) |
@@ -150,8 +150,8 @@ u64 tb_to_xs; | |||
150 | unsigned tb_to_us; | 150 | unsigned tb_to_us; |
151 | 151 | ||
152 | #define TICKLEN_SCALE NTP_SCALE_SHIFT | 152 | #define TICKLEN_SCALE NTP_SCALE_SHIFT |
153 | u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ | 153 | static u64 last_tick_len; /* units are ns / 2^TICKLEN_SCALE */ |
154 | u64 ticklen_to_xs; /* 0.64 fraction */ | 154 | static u64 ticklen_to_xs; /* 0.64 fraction */ |
155 | 155 | ||
156 | /* If last_tick_len corresponds to about 1/HZ seconds, then | 156 | /* If last_tick_len corresponds to about 1/HZ seconds, then |
157 | last_tick_len << TICKLEN_SHIFT will be about 2^63. */ | 157 | last_tick_len << TICKLEN_SHIFT will be about 2^63. */ |
@@ -164,7 +164,7 @@ static u64 tb_to_ns_scale __read_mostly; | |||
164 | static unsigned tb_to_ns_shift __read_mostly; | 164 | static unsigned tb_to_ns_shift __read_mostly; |
165 | static unsigned long boot_tb __read_mostly; | 165 | static unsigned long boot_tb __read_mostly; |
166 | 166 | ||
167 | struct gettimeofday_struct do_gtod; | 167 | static struct gettimeofday_struct do_gtod; |
168 | 168 | ||
169 | extern struct timezone sys_tz; | 169 | extern struct timezone sys_tz; |
170 | static long timezone_offset; | 170 | static long timezone_offset; |
@@ -832,7 +832,7 @@ void update_vsyscall_tz(void) | |||
832 | ++vdso_data->tb_update_count; | 832 | ++vdso_data->tb_update_count; |
833 | } | 833 | } |
834 | 834 | ||
835 | void __init clocksource_init(void) | 835 | static void __init clocksource_init(void) |
836 | { | 836 | { |
837 | struct clocksource *clock; | 837 | struct clocksource *clock; |
838 | 838 | ||
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c index 4b5b7ff4f78b..b463d48145a4 100644 --- a/arch/powerpc/kernel/traps.c +++ b/arch/powerpc/kernel/traps.c | |||
@@ -1030,21 +1030,29 @@ void SoftwareEmulation(struct pt_regs *regs) | |||
1030 | 1030 | ||
1031 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) | 1031 | #if defined(CONFIG_40x) || defined(CONFIG_BOOKE) |
1032 | 1032 | ||
1033 | void DebugException(struct pt_regs *regs, unsigned long debug_status) | 1033 | void __kprobes DebugException(struct pt_regs *regs, unsigned long debug_status) |
1034 | { | 1034 | { |
1035 | if (debug_status & DBSR_IC) { /* instruction completion */ | 1035 | if (debug_status & DBSR_IC) { /* instruction completion */ |
1036 | regs->msr &= ~MSR_DE; | 1036 | regs->msr &= ~MSR_DE; |
1037 | |||
1038 | /* Disable instruction completion */ | ||
1039 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); | ||
1040 | /* Clear the instruction completion event */ | ||
1041 | mtspr(SPRN_DBSR, DBSR_IC); | ||
1042 | |||
1043 | if (notify_die(DIE_SSTEP, "single_step", regs, 5, | ||
1044 | 5, SIGTRAP) == NOTIFY_STOP) { | ||
1045 | return; | ||
1046 | } | ||
1047 | |||
1048 | if (debugger_sstep(regs)) | ||
1049 | return; | ||
1050 | |||
1037 | if (user_mode(regs)) { | 1051 | if (user_mode(regs)) { |
1038 | current->thread.dbcr0 &= ~DBCR0_IC; | 1052 | current->thread.dbcr0 &= ~DBCR0_IC; |
1039 | } else { | ||
1040 | /* Disable instruction completion */ | ||
1041 | mtspr(SPRN_DBCR0, mfspr(SPRN_DBCR0) & ~DBCR0_IC); | ||
1042 | /* Clear the instruction completion event */ | ||
1043 | mtspr(SPRN_DBSR, DBSR_IC); | ||
1044 | if (debugger_sstep(regs)) | ||
1045 | return; | ||
1046 | } | 1053 | } |
1047 | _exception(SIGTRAP, regs, TRAP_TRACE, 0); | 1054 | |
1055 | _exception(SIGTRAP, regs, TRAP_TRACE, regs->nip); | ||
1048 | } | 1056 | } |
1049 | } | 1057 | } |
1050 | #endif /* CONFIG_4xx || CONFIG_BOOKE */ | 1058 | #endif /* CONFIG_4xx || CONFIG_BOOKE */ |
diff --git a/arch/powerpc/kernel/vdso64/vdso64.lds.S b/arch/powerpc/kernel/vdso64/vdso64.lds.S index 932b3fdb34b9..7d6585f90277 100644 --- a/arch/powerpc/kernel/vdso64/vdso64.lds.S +++ b/arch/powerpc/kernel/vdso64/vdso64.lds.S | |||
@@ -43,15 +43,15 @@ SECTIONS | |||
43 | .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } | 43 | .rodata : { *(.rodata .rodata.* .gnu.linkonce.r.*) } |
44 | .rodata1 : { *(.rodata1) } | 44 | .rodata1 : { *(.rodata1) } |
45 | 45 | ||
46 | .dynamic : { *(.dynamic) } :text :dynamic | ||
47 | |||
46 | .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr | 48 | .eh_frame_hdr : { *(.eh_frame_hdr) } :text :eh_frame_hdr |
47 | .eh_frame : { KEEP (*(.eh_frame)) } :text | 49 | .eh_frame : { KEEP (*(.eh_frame)) } :text |
48 | .gcc_except_table : { *(.gcc_except_table) } | 50 | .gcc_except_table : { *(.gcc_except_table) } |
51 | .rela.dyn ALIGN(8) : { *(.rela.dyn) } | ||
49 | 52 | ||
50 | .opd ALIGN(8) : { KEEP (*(.opd)) } | 53 | .opd ALIGN(8) : { KEEP (*(.opd)) } |
51 | .got ALIGN(8) : { *(.got .toc) } | 54 | .got ALIGN(8) : { *(.got .toc) } |
52 | .rela.dyn ALIGN(8) : { *(.rela.dyn) } | ||
53 | |||
54 | .dynamic : { *(.dynamic) } :text :dynamic | ||
55 | 55 | ||
56 | _end = .; | 56 | _end = .; |
57 | PROVIDE(end = .); | 57 | PROVIDE(end = .); |
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c index 0f2d239d94c4..bf5b6d7ed30f 100644 --- a/arch/powerpc/mm/hash_utils_64.c +++ b/arch/powerpc/mm/hash_utils_64.c | |||
@@ -120,7 +120,7 @@ static DEFINE_SPINLOCK(linear_map_hash_lock); | |||
120 | 120 | ||
121 | /* Pre-POWER4 CPUs (4k pages only) | 121 | /* Pre-POWER4 CPUs (4k pages only) |
122 | */ | 122 | */ |
123 | struct mmu_psize_def mmu_psize_defaults_old[] = { | 123 | static struct mmu_psize_def mmu_psize_defaults_old[] = { |
124 | [MMU_PAGE_4K] = { | 124 | [MMU_PAGE_4K] = { |
125 | .shift = 12, | 125 | .shift = 12, |
126 | .sllp = 0, | 126 | .sllp = 0, |
@@ -134,7 +134,7 @@ struct mmu_psize_def mmu_psize_defaults_old[] = { | |||
134 | * | 134 | * |
135 | * Support for 16Mb large pages | 135 | * Support for 16Mb large pages |
136 | */ | 136 | */ |
137 | struct mmu_psize_def mmu_psize_defaults_gp[] = { | 137 | static struct mmu_psize_def mmu_psize_defaults_gp[] = { |
138 | [MMU_PAGE_4K] = { | 138 | [MMU_PAGE_4K] = { |
139 | .shift = 12, | 139 | .shift = 12, |
140 | .sllp = 0, | 140 | .sllp = 0, |
@@ -533,8 +533,6 @@ void __init htab_initialize(void) | |||
533 | unsigned long base = 0, size = 0, limit; | 533 | unsigned long base = 0, size = 0, limit; |
534 | int i; | 534 | int i; |
535 | 535 | ||
536 | extern unsigned long tce_alloc_start, tce_alloc_end; | ||
537 | |||
538 | DBG(" -> htab_initialize()\n"); | 536 | DBG(" -> htab_initialize()\n"); |
539 | 537 | ||
540 | /* Initialize segment sizes */ | 538 | /* Initialize segment sizes */ |
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c index 1952b4d3fa7f..45418590b6a9 100644 --- a/arch/powerpc/mm/init_32.c +++ b/arch/powerpc/mm/init_32.c | |||
@@ -43,6 +43,7 @@ | |||
43 | #include <asm/btext.h> | 43 | #include <asm/btext.h> |
44 | #include <asm/tlb.h> | 44 | #include <asm/tlb.h> |
45 | #include <asm/sections.h> | 45 | #include <asm/sections.h> |
46 | #include <asm/system.h> | ||
46 | 47 | ||
47 | #include "mmu_decl.h" | 48 | #include "mmu_decl.h" |
48 | 49 | ||
@@ -76,8 +77,6 @@ void MMU_init(void); | |||
76 | /* XXX should be in current.h -- paulus */ | 77 | /* XXX should be in current.h -- paulus */ |
77 | extern struct task_struct *current_set[NR_CPUS]; | 78 | extern struct task_struct *current_set[NR_CPUS]; |
78 | 79 | ||
79 | extern int init_bootmem_done; | ||
80 | |||
81 | /* | 80 | /* |
82 | * this tells the system to map all of ram with the segregs | 81 | * this tells the system to map all of ram with the segregs |
83 | * (i.e. page tables) instead of the bats. | 82 | * (i.e. page tables) instead of the bats. |
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c index 6aa65375abf5..6ef63caca682 100644 --- a/arch/powerpc/mm/init_64.c +++ b/arch/powerpc/mm/init_64.c | |||
@@ -185,7 +185,7 @@ void pgtable_cache_init(void) | |||
185 | * do this by hand as the proffered address may not be correctly aligned. | 185 | * do this by hand as the proffered address may not be correctly aligned. |
186 | * Subtraction of non-aligned pointers produces undefined results. | 186 | * Subtraction of non-aligned pointers produces undefined results. |
187 | */ | 187 | */ |
188 | unsigned long __meminit vmemmap_section_start(unsigned long page) | 188 | static unsigned long __meminit vmemmap_section_start(unsigned long page) |
189 | { | 189 | { |
190 | unsigned long offset = page - ((unsigned long)(vmemmap)); | 190 | unsigned long offset = page - ((unsigned long)(vmemmap)); |
191 | 191 | ||
@@ -198,7 +198,7 @@ unsigned long __meminit vmemmap_section_start(unsigned long page) | |||
198 | * which overlaps this vmemmap page is initialised then this page is | 198 | * which overlaps this vmemmap page is initialised then this page is |
199 | * initialised already. | 199 | * initialised already. |
200 | */ | 200 | */ |
201 | int __meminit vmemmap_populated(unsigned long start, int page_size) | 201 | static int __meminit vmemmap_populated(unsigned long start, int page_size) |
202 | { | 202 | { |
203 | unsigned long end = start + page_size; | 203 | unsigned long end = start + page_size; |
204 | 204 | ||
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c index efbbd13d93e5..60e6032a8088 100644 --- a/arch/powerpc/mm/stab.c +++ b/arch/powerpc/mm/stab.c | |||
@@ -30,8 +30,8 @@ struct stab_entry { | |||
30 | }; | 30 | }; |
31 | 31 | ||
32 | #define NR_STAB_CACHE_ENTRIES 8 | 32 | #define NR_STAB_CACHE_ENTRIES 8 |
33 | DEFINE_PER_CPU(long, stab_cache_ptr); | 33 | static DEFINE_PER_CPU(long, stab_cache_ptr); |
34 | DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); | 34 | static DEFINE_PER_CPU(long, stab_cache[NR_STAB_CACHE_ENTRIES]); |
35 | 35 | ||
36 | /* | 36 | /* |
37 | * Create a segment table entry for the given esid/vsid pair. | 37 | * Create a segment table entry for the given esid/vsid pair. |
diff --git a/arch/powerpc/mm/tlb_64.c b/arch/powerpc/mm/tlb_64.c index e2d867ce1c7e..509bc560159b 100644 --- a/arch/powerpc/mm/tlb_64.c +++ b/arch/powerpc/mm/tlb_64.c | |||
@@ -37,8 +37,8 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch); | |||
37 | * include/asm-powerpc/tlb.h file -- tgall | 37 | * include/asm-powerpc/tlb.h file -- tgall |
38 | */ | 38 | */ |
39 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); | 39 | DEFINE_PER_CPU(struct mmu_gather, mmu_gathers); |
40 | DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); | 40 | static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); |
41 | unsigned long pte_freelist_forced_free; | 41 | static unsigned long pte_freelist_forced_free; |
42 | 42 | ||
43 | struct pte_freelist_batch | 43 | struct pte_freelist_batch |
44 | { | 44 | { |
@@ -47,9 +47,6 @@ struct pte_freelist_batch | |||
47 | pgtable_free_t tables[0]; | 47 | pgtable_free_t tables[0]; |
48 | }; | 48 | }; |
49 | 49 | ||
50 | DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur); | ||
51 | unsigned long pte_freelist_forced_free; | ||
52 | |||
53 | #define PTE_FREELIST_SIZE \ | 50 | #define PTE_FREELIST_SIZE \ |
54 | ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ | 51 | ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \ |
55 | / sizeof(pgtable_free_t)) | 52 | / sizeof(pgtable_free_t)) |
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig index 6abe91357eee..bee49ca704ef 100644 --- a/arch/powerpc/platforms/44x/Kconfig +++ b/arch/powerpc/platforms/44x/Kconfig | |||
@@ -17,6 +17,15 @@ config EBONY | |||
17 | help | 17 | help |
18 | This option enables support for the IBM PPC440GP evaluation board. | 18 | This option enables support for the IBM PPC440GP evaluation board. |
19 | 19 | ||
20 | config SAM440EP | ||
21 | bool "Sam440ep" | ||
22 | depends on 44x | ||
23 | default n | ||
24 | select 440EP | ||
25 | select PCI | ||
26 | help | ||
27 | This option enables support for the ACube Sam440ep board. | ||
28 | |||
20 | config SEQUOIA | 29 | config SEQUOIA |
21 | bool "Sequoia" | 30 | bool "Sequoia" |
22 | depends on 44x | 31 | depends on 44x |
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile index 774165f9acdd..4e71e77f9a23 100644 --- a/arch/powerpc/platforms/44x/Makefile +++ b/arch/powerpc/platforms/44x/Makefile | |||
@@ -3,6 +3,7 @@ obj-$(CONFIG_EBONY) += ebony.o | |||
3 | obj-$(CONFIG_TAISHAN) += taishan.o | 3 | obj-$(CONFIG_TAISHAN) += taishan.o |
4 | obj-$(CONFIG_BAMBOO) += bamboo.o | 4 | obj-$(CONFIG_BAMBOO) += bamboo.o |
5 | obj-$(CONFIG_YOSEMITE) += bamboo.o | 5 | obj-$(CONFIG_YOSEMITE) += bamboo.o |
6 | obj-$(CONFIG_SAM440EP) += sam440ep.o | ||
6 | obj-$(CONFIG_SEQUOIA) += sequoia.o | 7 | obj-$(CONFIG_SEQUOIA) += sequoia.o |
7 | obj-$(CONFIG_KATMAI) += katmai.o | 8 | obj-$(CONFIG_KATMAI) += katmai.o |
8 | obj-$(CONFIG_RAINIER) += rainier.o | 9 | obj-$(CONFIG_RAINIER) += rainier.o |
diff --git a/arch/powerpc/platforms/44x/sam440ep.c b/arch/powerpc/platforms/44x/sam440ep.c new file mode 100644 index 000000000000..47f10e647735 --- /dev/null +++ b/arch/powerpc/platforms/44x/sam440ep.c | |||
@@ -0,0 +1,79 @@ | |||
1 | /* | ||
2 | * Sam440ep board specific routines based off bamboo.c code | ||
3 | * original copyrights below | ||
4 | * | ||
5 | * Wade Farnsworth <wfarnsworth@mvista.com> | ||
6 | * Copyright 2004 MontaVista Software Inc. | ||
7 | * | ||
8 | * Rewritten and ported to the merged powerpc tree: | ||
9 | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | ||
10 | * Copyright 2007 IBM Corporation | ||
11 | * | ||
12 | * Modified from bamboo.c for sam440ep: | ||
13 | * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> | ||
14 | * | ||
15 | * This program is free software; you can redistribute it and/or modify it | ||
16 | * under the terms of the GNU General Public License as published by the | ||
17 | * Free Software Foundation; either version 2 of the License, or (at your | ||
18 | * option) any later version. | ||
19 | */ | ||
20 | #include <linux/init.h> | ||
21 | #include <linux/of_platform.h> | ||
22 | |||
23 | #include <asm/machdep.h> | ||
24 | #include <asm/prom.h> | ||
25 | #include <asm/udbg.h> | ||
26 | #include <asm/time.h> | ||
27 | #include <asm/uic.h> | ||
28 | #include <asm/pci-bridge.h> | ||
29 | #include <asm/ppc4xx.h> | ||
30 | #include <linux/i2c.h> | ||
31 | |||
32 | static __initdata struct of_device_id sam440ep_of_bus[] = { | ||
33 | { .compatible = "ibm,plb4", }, | ||
34 | { .compatible = "ibm,opb", }, | ||
35 | { .compatible = "ibm,ebc", }, | ||
36 | {}, | ||
37 | }; | ||
38 | |||
39 | static int __init sam440ep_device_probe(void) | ||
40 | { | ||
41 | of_platform_bus_probe(NULL, sam440ep_of_bus, NULL); | ||
42 | |||
43 | return 0; | ||
44 | } | ||
45 | machine_device_initcall(sam440ep, sam440ep_device_probe); | ||
46 | |||
47 | static int __init sam440ep_probe(void) | ||
48 | { | ||
49 | unsigned long root = of_get_flat_dt_root(); | ||
50 | |||
51 | if (!of_flat_dt_is_compatible(root, "acube,sam440ep")) | ||
52 | return 0; | ||
53 | |||
54 | ppc_pci_flags = PPC_PCI_REASSIGN_ALL_RSRC; | ||
55 | |||
56 | return 1; | ||
57 | } | ||
58 | |||
59 | define_machine(sam440ep) { | ||
60 | .name = "Sam440ep", | ||
61 | .probe = sam440ep_probe, | ||
62 | .progress = udbg_progress, | ||
63 | .init_IRQ = uic_init_tree, | ||
64 | .get_irq = uic_get_irq, | ||
65 | .restart = ppc4xx_reset_system, | ||
66 | .calibrate_decr = generic_calibrate_decr, | ||
67 | }; | ||
68 | |||
69 | static struct i2c_board_info sam440ep_rtc_info = { | ||
70 | .type = "m41st85", | ||
71 | .addr = 0x68, | ||
72 | .irq = -1, | ||
73 | }; | ||
74 | |||
75 | static int sam440ep_setup_rtc(void) | ||
76 | { | ||
77 | return i2c_register_board_info(0, &sam440ep_rtc_info, 1); | ||
78 | } | ||
79 | machine_device_initcall(sam440ep, sam440ep_setup_rtc); | ||
diff --git a/arch/powerpc/platforms/44x/warp-nand.c b/arch/powerpc/platforms/44x/warp-nand.c index 9150318cfc56..7bec2815771a 100644 --- a/arch/powerpc/platforms/44x/warp-nand.c +++ b/arch/powerpc/platforms/44x/warp-nand.c | |||
@@ -11,8 +11,10 @@ | |||
11 | #include <linux/mtd/partitions.h> | 11 | #include <linux/mtd/partitions.h> |
12 | #include <linux/mtd/nand.h> | 12 | #include <linux/mtd/nand.h> |
13 | #include <linux/mtd/ndfc.h> | 13 | #include <linux/mtd/ndfc.h> |
14 | #include <linux/of.h> | ||
14 | #include <asm/machdep.h> | 15 | #include <asm/machdep.h> |
15 | 16 | ||
17 | |||
16 | #ifdef CONFIG_MTD_NAND_NDFC | 18 | #ifdef CONFIG_MTD_NAND_NDFC |
17 | 19 | ||
18 | #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ | 20 | #define CS_NAND_0 1 /* use chip select 1 for NAND device 0 */ |
@@ -35,13 +37,23 @@ static struct mtd_partition nand_parts[] = { | |||
35 | { | 37 | { |
36 | .name = "root", | 38 | .name = "root", |
37 | .offset = 0x0200000, | 39 | .offset = 0x0200000, |
38 | .size = 0x3400000 | 40 | .size = 0x3E00000 |
41 | }, | ||
42 | { | ||
43 | .name = "persistent", | ||
44 | .offset = 0x4000000, | ||
45 | .size = 0x4000000 | ||
39 | }, | 46 | }, |
40 | { | 47 | { |
41 | .name = "user", | 48 | .name = "persistent1", |
42 | .offset = 0x3600000, | 49 | .offset = 0x8000000, |
43 | .size = 0x0A00000 | 50 | .size = 0x4000000 |
44 | }, | 51 | }, |
52 | { | ||
53 | .name = "persistent2", | ||
54 | .offset = 0xC000000, | ||
55 | .size = 0x4000000 | ||
56 | } | ||
45 | }; | 57 | }; |
46 | 58 | ||
47 | struct ndfc_controller_settings warp_ndfc_settings = { | 59 | struct ndfc_controller_settings warp_ndfc_settings = { |
@@ -67,27 +79,22 @@ static struct platform_device warp_ndfc_device = { | |||
67 | .resource = &warp_ndfc, | 79 | .resource = &warp_ndfc, |
68 | }; | 80 | }; |
69 | 81 | ||
70 | static struct nand_ecclayout nand_oob_16 = { | 82 | /* Do NOT set the ecclayout: let it default so it is correct for both |
71 | .eccbytes = 3, | 83 | * 64M and 256M flash chips. |
72 | .eccpos = { 0, 1, 2, 3, 6, 7 }, | 84 | */ |
73 | .oobfree = { {.offset = 8, .length = 16} } | ||
74 | }; | ||
75 | |||
76 | static struct platform_nand_chip warp_nand_chip0 = { | 85 | static struct platform_nand_chip warp_nand_chip0 = { |
77 | .nr_chips = 1, | 86 | .nr_chips = 1, |
78 | .chip_offset = CS_NAND_0, | 87 | .chip_offset = CS_NAND_0, |
79 | .nr_partitions = ARRAY_SIZE(nand_parts), | 88 | .nr_partitions = ARRAY_SIZE(nand_parts), |
80 | .partitions = nand_parts, | 89 | .partitions = nand_parts, |
81 | .chip_delay = 50, | 90 | .chip_delay = 20, |
82 | .ecclayout = &nand_oob_16, | ||
83 | .priv = &warp_chip0_settings, | 91 | .priv = &warp_chip0_settings, |
84 | }; | 92 | }; |
85 | 93 | ||
86 | static struct platform_device warp_nand_device = { | 94 | static struct platform_device warp_nand_device = { |
87 | .name = "ndfc-chip", | 95 | .name = "ndfc-chip", |
88 | .id = 0, | 96 | .id = 0, |
89 | .num_resources = 1, | 97 | .num_resources = 0, |
90 | .resource = &warp_ndfc, | ||
91 | .dev = { | 98 | .dev = { |
92 | .platform_data = &warp_nand_chip0, | 99 | .platform_data = &warp_nand_chip0, |
93 | .parent = &warp_ndfc_device.dev, | 100 | .parent = &warp_ndfc_device.dev, |
@@ -96,6 +103,23 @@ static struct platform_device warp_nand_device = { | |||
96 | 103 | ||
97 | static int warp_setup_nand_flash(void) | 104 | static int warp_setup_nand_flash(void) |
98 | { | 105 | { |
106 | struct device_node *np; | ||
107 | |||
108 | /* Try to detect a rev A based on NOR size. */ | ||
109 | np = of_find_compatible_node(NULL, NULL, "cfi-flash"); | ||
110 | if (np) { | ||
111 | struct property *pp; | ||
112 | |||
113 | pp = of_find_property(np, "reg", NULL); | ||
114 | if (pp && (pp->length == 12)) { | ||
115 | u32 *v = pp->value; | ||
116 | if (v[2] == 0x4000000) | ||
117 | /* Rev A = 64M NAND */ | ||
118 | warp_nand_chip0.nr_partitions = 2; | ||
119 | } | ||
120 | of_node_put(np); | ||
121 | } | ||
122 | |||
99 | platform_device_register(&warp_ndfc_device); | 123 | platform_device_register(&warp_ndfc_device); |
100 | platform_device_register(&warp_nand_device); | 124 | platform_device_register(&warp_nand_device); |
101 | 125 | ||
diff --git a/arch/powerpc/platforms/44x/warp.c b/arch/powerpc/platforms/44x/warp.c index 39cf6150a72b..9565995cba7f 100644 --- a/arch/powerpc/platforms/44x/warp.c +++ b/arch/powerpc/platforms/44x/warp.c | |||
@@ -12,6 +12,9 @@ | |||
12 | #include <linux/init.h> | 12 | #include <linux/init.h> |
13 | #include <linux/of_platform.h> | 13 | #include <linux/of_platform.h> |
14 | #include <linux/kthread.h> | 14 | #include <linux/kthread.h> |
15 | #include <linux/i2c.h> | ||
16 | #include <linux/interrupt.h> | ||
17 | #include <linux/delay.h> | ||
15 | 18 | ||
16 | #include <asm/machdep.h> | 19 | #include <asm/machdep.h> |
17 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
@@ -27,6 +30,18 @@ static __initdata struct of_device_id warp_of_bus[] = { | |||
27 | {}, | 30 | {}, |
28 | }; | 31 | }; |
29 | 32 | ||
33 | static __initdata struct i2c_board_info warp_i2c_info[] = { | ||
34 | { I2C_BOARD_INFO("ad7414", 0x4a) } | ||
35 | }; | ||
36 | |||
37 | static int __init warp_arch_init(void) | ||
38 | { | ||
39 | /* This should go away once support is moved to the dts. */ | ||
40 | i2c_register_board_info(0, warp_i2c_info, ARRAY_SIZE(warp_i2c_info)); | ||
41 | return 0; | ||
42 | } | ||
43 | machine_arch_initcall(warp, warp_arch_init); | ||
44 | |||
30 | static int __init warp_device_probe(void) | 45 | static int __init warp_device_probe(void) |
31 | { | 46 | { |
32 | of_platform_bus_probe(NULL, warp_of_bus, NULL); | 47 | of_platform_bus_probe(NULL, warp_of_bus, NULL); |
@@ -52,61 +67,232 @@ define_machine(warp) { | |||
52 | }; | 67 | }; |
53 | 68 | ||
54 | 69 | ||
55 | #define LED_GREEN (0x80000000 >> 0) | 70 | /* I am not sure this is the best place for this... */ |
56 | #define LED_RED (0x80000000 >> 1) | 71 | static int __init warp_post_info(void) |
72 | { | ||
73 | struct device_node *np; | ||
74 | void __iomem *fpga; | ||
75 | u32 post1, post2; | ||
76 | |||
77 | /* Sighhhh... POST information is in the sd area. */ | ||
78 | np = of_find_compatible_node(NULL, NULL, "pika,fpga-sd"); | ||
79 | if (np == NULL) | ||
80 | return -ENOENT; | ||
81 | |||
82 | fpga = of_iomap(np, 0); | ||
83 | of_node_put(np); | ||
84 | if (fpga == NULL) | ||
85 | return -ENOENT; | ||
86 | |||
87 | post1 = in_be32(fpga + 0x40); | ||
88 | post2 = in_be32(fpga + 0x44); | ||
89 | |||
90 | iounmap(fpga); | ||
91 | |||
92 | if (post1 || post2) | ||
93 | printk(KERN_INFO "Warp POST %08x %08x\n", post1, post2); | ||
94 | else | ||
95 | printk(KERN_INFO "Warp POST OK\n"); | ||
96 | |||
97 | return 0; | ||
98 | } | ||
99 | machine_late_initcall(warp, warp_post_info); | ||
100 | |||
101 | |||
102 | #ifdef CONFIG_SENSORS_AD7414 | ||
103 | |||
104 | static LIST_HEAD(dtm_shutdown_list); | ||
105 | static void __iomem *dtm_fpga; | ||
106 | static void __iomem *gpio_base; | ||
107 | |||
108 | |||
109 | struct dtm_shutdown { | ||
110 | struct list_head list; | ||
111 | void (*func)(void *arg); | ||
112 | void *arg; | ||
113 | }; | ||
57 | 114 | ||
58 | 115 | ||
59 | /* This is for the power LEDs 1 = on, 0 = off, -1 = leave alone */ | 116 | int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) |
60 | void warp_set_power_leds(int green, int red) | ||
61 | { | 117 | { |
62 | static void __iomem *gpio_base = NULL; | 118 | struct dtm_shutdown *shutdown; |
63 | unsigned leds; | 119 | |
64 | 120 | shutdown = kmalloc(sizeof(struct dtm_shutdown), GFP_KERNEL); | |
65 | if (gpio_base == NULL) { | 121 | if (shutdown == NULL) |
66 | struct device_node *np; | 122 | return -ENOMEM; |
67 | 123 | ||
68 | /* Power LEDS are on the second GPIO controller */ | 124 | shutdown->func = func; |
69 | np = of_find_compatible_node(NULL, NULL, "ibm,gpio-440EP"); | 125 | shutdown->arg = arg; |
70 | if (np) | 126 | |
71 | np = of_find_compatible_node(np, NULL, "ibm,gpio-440EP"); | 127 | list_add(&shutdown->list, &dtm_shutdown_list); |
72 | if (np == NULL) { | 128 | |
73 | printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); | 129 | return 0; |
74 | return; | 130 | } |
131 | |||
132 | int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | ||
133 | { | ||
134 | struct dtm_shutdown *shutdown; | ||
135 | |||
136 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) | ||
137 | if (shutdown->func == func && shutdown->arg == arg) { | ||
138 | list_del(&shutdown->list); | ||
139 | kfree(shutdown); | ||
140 | return 0; | ||
141 | } | ||
142 | |||
143 | return -EINVAL; | ||
144 | } | ||
145 | |||
146 | static irqreturn_t temp_isr(int irq, void *context) | ||
147 | { | ||
148 | struct dtm_shutdown *shutdown; | ||
149 | |||
150 | local_irq_disable(); | ||
151 | |||
152 | /* Run through the shutdown list. */ | ||
153 | list_for_each_entry(shutdown, &dtm_shutdown_list, list) | ||
154 | shutdown->func(shutdown->arg); | ||
155 | |||
156 | printk(KERN_EMERG "\n\nCritical Temperature Shutdown\n"); | ||
157 | |||
158 | while (1) { | ||
159 | if (dtm_fpga) { | ||
160 | unsigned reset = in_be32(dtm_fpga + 0x14); | ||
161 | out_be32(dtm_fpga + 0x14, reset); | ||
75 | } | 162 | } |
76 | 163 | ||
77 | gpio_base = of_iomap(np, 0); | 164 | if (gpio_base) { |
78 | of_node_put(np); | 165 | unsigned leds = in_be32(gpio_base); |
79 | if (gpio_base == NULL) { | 166 | |
80 | printk(KERN_ERR __FILE__ ": Unable to map gpio"); | 167 | /* green off, red toggle */ |
81 | return; | 168 | leds &= ~0x80000000; |
169 | leds ^= 0x40000000; | ||
170 | |||
171 | out_be32(gpio_base, leds); | ||
82 | } | 172 | } |
173 | |||
174 | mdelay(500); | ||
175 | } | ||
176 | } | ||
177 | |||
178 | static int pika_setup_leds(void) | ||
179 | { | ||
180 | struct device_node *np; | ||
181 | const u32 *gpios; | ||
182 | int len; | ||
183 | |||
184 | np = of_find_compatible_node(NULL, NULL, "linux,gpio-led"); | ||
185 | if (!np) { | ||
186 | printk(KERN_ERR __FILE__ ": Unable to find gpio-led\n"); | ||
187 | return -ENOENT; | ||
83 | } | 188 | } |
84 | 189 | ||
85 | leds = in_be32(gpio_base); | 190 | gpios = of_get_property(np, "gpios", &len); |
191 | of_node_put(np); | ||
192 | if (!gpios || len < 4) { | ||
193 | printk(KERN_ERR __FILE__ | ||
194 | ": Unable to get gpios property (%d)\n", len); | ||
195 | return -ENOENT; | ||
196 | } | ||
86 | 197 | ||
87 | switch (green) { | 198 | np = of_find_node_by_phandle(gpios[0]); |
88 | case 0: leds &= ~LED_GREEN; break; | 199 | if (!np) { |
89 | case 1: leds |= LED_GREEN; break; | 200 | printk(KERN_ERR __FILE__ ": Unable to find gpio\n"); |
201 | return -ENOENT; | ||
90 | } | 202 | } |
91 | switch (red) { | 203 | |
92 | case 0: leds &= ~LED_RED; break; | 204 | gpio_base = of_iomap(np, 0); |
93 | case 1: leds |= LED_RED; break; | 205 | of_node_put(np); |
206 | if (!gpio_base) { | ||
207 | printk(KERN_ERR __FILE__ ": Unable to map gpio"); | ||
208 | return -ENOMEM; | ||
94 | } | 209 | } |
95 | 210 | ||
96 | out_be32(gpio_base, leds); | 211 | return 0; |
97 | } | 212 | } |
98 | EXPORT_SYMBOL(warp_set_power_leds); | ||
99 | 213 | ||
214 | static void pika_setup_critical_temp(struct i2c_client *client) | ||
215 | { | ||
216 | struct device_node *np; | ||
217 | int irq, rc; | ||
218 | |||
219 | /* Do this before enabling critical temp interrupt since we | ||
220 | * may immediately interrupt. | ||
221 | */ | ||
222 | pika_setup_leds(); | ||
223 | |||
224 | /* These registers are in 1 degree increments. */ | ||
225 | i2c_smbus_write_byte_data(client, 2, 65); /* Thigh */ | ||
226 | i2c_smbus_write_byte_data(client, 3, 55); /* Tlow */ | ||
227 | |||
228 | np = of_find_compatible_node(NULL, NULL, "adi,ad7414"); | ||
229 | if (np == NULL) { | ||
230 | printk(KERN_ERR __FILE__ ": Unable to find ad7414\n"); | ||
231 | return; | ||
232 | } | ||
233 | |||
234 | irq = irq_of_parse_and_map(np, 0); | ||
235 | of_node_put(np); | ||
236 | if (irq == NO_IRQ) { | ||
237 | printk(KERN_ERR __FILE__ ": Unable to get ad7414 irq\n"); | ||
238 | return; | ||
239 | } | ||
240 | |||
241 | rc = request_irq(irq, temp_isr, 0, "ad7414", NULL); | ||
242 | if (rc) { | ||
243 | printk(KERN_ERR __FILE__ | ||
244 | ": Unable to request ad7414 irq %d = %d\n", irq, rc); | ||
245 | return; | ||
246 | } | ||
247 | } | ||
248 | |||
249 | static inline void pika_dtm_check_fan(void __iomem *fpga) | ||
250 | { | ||
251 | static int fan_state; | ||
252 | u32 fan = in_be32(fpga + 0x34) & (1 << 14); | ||
253 | |||
254 | if (fan_state != fan) { | ||
255 | fan_state = fan; | ||
256 | if (fan) | ||
257 | printk(KERN_WARNING "Fan rotation error detected." | ||
258 | " Please check hardware.\n"); | ||
259 | } | ||
260 | } | ||
100 | 261 | ||
101 | #ifdef CONFIG_SENSORS_AD7414 | ||
102 | static int pika_dtm_thread(void __iomem *fpga) | 262 | static int pika_dtm_thread(void __iomem *fpga) |
103 | { | 263 | { |
104 | extern int ad7414_get_temp(int index); | 264 | struct i2c_adapter *adap; |
265 | struct i2c_client *client; | ||
266 | |||
267 | /* We loop in case either driver was compiled as a module and | ||
268 | * has not been insmoded yet. | ||
269 | */ | ||
270 | while (!(adap = i2c_get_adapter(0))) { | ||
271 | set_current_state(TASK_INTERRUPTIBLE); | ||
272 | schedule_timeout(HZ); | ||
273 | } | ||
274 | |||
275 | while (1) { | ||
276 | list_for_each_entry(client, &adap->clients, list) | ||
277 | if (client->addr == 0x4a) | ||
278 | goto found_it; | ||
279 | |||
280 | set_current_state(TASK_INTERRUPTIBLE); | ||
281 | schedule_timeout(HZ); | ||
282 | } | ||
283 | |||
284 | found_it: | ||
285 | i2c_put_adapter(adap); | ||
286 | |||
287 | pika_setup_critical_temp(client); | ||
288 | |||
289 | printk(KERN_INFO "PIKA DTM thread running.\n"); | ||
105 | 290 | ||
106 | while (!kthread_should_stop()) { | 291 | while (!kthread_should_stop()) { |
107 | int temp = ad7414_get_temp(0); | 292 | u16 temp = swab16(i2c_smbus_read_word_data(client, 0)); |
293 | out_be32(fpga + 0x20, temp); | ||
108 | 294 | ||
109 | out_be32(fpga, temp); | 295 | pika_dtm_check_fan(fpga); |
110 | 296 | ||
111 | set_current_state(TASK_INTERRUPTIBLE); | 297 | set_current_state(TASK_INTERRUPTIBLE); |
112 | schedule_timeout(HZ); | 298 | schedule_timeout(HZ); |
@@ -115,37 +301,44 @@ static int pika_dtm_thread(void __iomem *fpga) | |||
115 | return 0; | 301 | return 0; |
116 | } | 302 | } |
117 | 303 | ||
304 | |||
118 | static int __init pika_dtm_start(void) | 305 | static int __init pika_dtm_start(void) |
119 | { | 306 | { |
120 | struct task_struct *dtm_thread; | 307 | struct task_struct *dtm_thread; |
121 | struct device_node *np; | 308 | struct device_node *np; |
122 | struct resource res; | ||
123 | void __iomem *fpga; | ||
124 | 309 | ||
125 | np = of_find_compatible_node(NULL, NULL, "pika,fpga"); | 310 | np = of_find_compatible_node(NULL, NULL, "pika,fpga"); |
126 | if (np == NULL) | 311 | if (np == NULL) |
127 | return -ENOENT; | 312 | return -ENOENT; |
128 | 313 | ||
129 | /* We do not call of_iomap here since it would map in the entire | 314 | dtm_fpga = of_iomap(np, 0); |
130 | * fpga space, which is over 8k. | ||
131 | */ | ||
132 | if (of_address_to_resource(np, 0, &res)) { | ||
133 | of_node_put(np); | ||
134 | return -ENOENT; | ||
135 | } | ||
136 | of_node_put(np); | 315 | of_node_put(np); |
137 | 316 | if (dtm_fpga == NULL) | |
138 | fpga = ioremap(res.start, 0x24); | ||
139 | if (fpga == NULL) | ||
140 | return -ENOENT; | 317 | return -ENOENT; |
141 | 318 | ||
142 | dtm_thread = kthread_run(pika_dtm_thread, fpga + 0x20, "pika-dtm"); | 319 | dtm_thread = kthread_run(pika_dtm_thread, dtm_fpga, "pika-dtm"); |
143 | if (IS_ERR(dtm_thread)) { | 320 | if (IS_ERR(dtm_thread)) { |
144 | iounmap(fpga); | 321 | iounmap(dtm_fpga); |
145 | return PTR_ERR(dtm_thread); | 322 | return PTR_ERR(dtm_thread); |
146 | } | 323 | } |
147 | 324 | ||
148 | return 0; | 325 | return 0; |
149 | } | 326 | } |
150 | device_initcall(pika_dtm_start); | 327 | machine_late_initcall(warp, pika_dtm_start); |
328 | |||
329 | #else /* !CONFIG_SENSORS_AD7414 */ | ||
330 | |||
331 | int pika_dtm_register_shutdown(void (*func)(void *arg), void *arg) | ||
332 | { | ||
333 | return 0; | ||
334 | } | ||
335 | |||
336 | int pika_dtm_unregister_shutdown(void (*func)(void *arg), void *arg) | ||
337 | { | ||
338 | return 0; | ||
339 | } | ||
340 | |||
151 | #endif | 341 | #endif |
342 | |||
343 | EXPORT_SYMBOL(pika_dtm_register_shutdown); | ||
344 | EXPORT_SYMBOL(pika_dtm_unregister_shutdown); | ||
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig index 13587e2e8680..fe75b2ac3c9f 100644 --- a/arch/powerpc/platforms/83xx/Kconfig +++ b/arch/powerpc/platforms/83xx/Kconfig | |||
@@ -58,6 +58,17 @@ config MPC836x_MDS | |||
58 | help | 58 | help |
59 | This option enables support for the MPC836x MDS Processor Board. | 59 | This option enables support for the MPC836x MDS Processor Board. |
60 | 60 | ||
61 | config MPC836x_RDK | ||
62 | bool "Freescale/Logic MPC836x RDK" | ||
63 | select DEFAULT_UIMAGE | ||
64 | select QUICC_ENGINE | ||
65 | select QE_GPIO | ||
66 | select FSL_GTM | ||
67 | select FSL_LBC | ||
68 | help | ||
69 | This option enables support for the MPC836x RDK Processor Board, | ||
70 | also known as ZOOM PowerQUICC Kit. | ||
71 | |||
61 | config MPC837x_MDS | 72 | config MPC837x_MDS |
62 | bool "Freescale MPC837x MDS" | 73 | bool "Freescale MPC837x MDS" |
63 | select DEFAULT_UIMAGE | 74 | select DEFAULT_UIMAGE |
@@ -79,6 +90,15 @@ config SBC834x | |||
79 | help | 90 | help |
80 | This option enables support for the Wind River SBC834x board. | 91 | This option enables support for the Wind River SBC834x board. |
81 | 92 | ||
93 | config ASP834x | ||
94 | bool "Analogue & Micro ASP 834x" | ||
95 | select PPC_MPC834x | ||
96 | select REDBOOT | ||
97 | help | ||
98 | This enables support for the Analogue & Micro ASP 83xx | ||
99 | board. | ||
100 | |||
101 | |||
82 | endif | 102 | endif |
83 | 103 | ||
84 | # used for usb | 104 | # used for usb |
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile index 7e6dd3e259d8..f331fd7dd836 100644 --- a/arch/powerpc/platforms/83xx/Makefile +++ b/arch/powerpc/platforms/83xx/Makefile | |||
@@ -8,7 +8,9 @@ obj-$(CONFIG_MPC832x_RDB) += mpc832x_rdb.o | |||
8 | obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o | 8 | obj-$(CONFIG_MPC834x_MDS) += mpc834x_mds.o |
9 | obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o | 9 | obj-$(CONFIG_MPC834x_ITX) += mpc834x_itx.o |
10 | obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o | 10 | obj-$(CONFIG_MPC836x_MDS) += mpc836x_mds.o |
11 | obj-$(CONFIG_MPC836x_RDK) += mpc836x_rdk.o | ||
11 | obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o | 12 | obj-$(CONFIG_MPC832x_MDS) += mpc832x_mds.o |
12 | obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o | 13 | obj-$(CONFIG_MPC837x_MDS) += mpc837x_mds.o |
13 | obj-$(CONFIG_SBC834x) += sbc834x.o | 14 | obj-$(CONFIG_SBC834x) += sbc834x.o |
14 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o | 15 | obj-$(CONFIG_MPC837x_RDB) += mpc837x_rdb.o |
16 | obj-$(CONFIG_ASP834x) += asp834x.o | ||
diff --git a/arch/powerpc/platforms/83xx/asp834x.c b/arch/powerpc/platforms/83xx/asp834x.c new file mode 100644 index 000000000000..bb30d67ad0a2 --- /dev/null +++ b/arch/powerpc/platforms/83xx/asp834x.c | |||
@@ -0,0 +1,90 @@ | |||
1 | /* | ||
2 | * arch/powerpc/platforms/83xx/asp834x.c | ||
3 | * | ||
4 | * Analogue & Micro ASP8347 board specific routines | ||
5 | * clone of mpc834x_itx | ||
6 | * | ||
7 | * Copyright 2008 Codehermit | ||
8 | * | ||
9 | * Maintainer: Bryan O'Donoghue <bodonoghue@codhermit.ie> | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License as published by the | ||
13 | * Free Software Foundation; either version 2 of the License, or (at your | ||
14 | * option) any later version. | ||
15 | */ | ||
16 | |||
17 | #include <linux/pci.h> | ||
18 | #include <linux/of_platform.h> | ||
19 | |||
20 | #include <asm/time.h> | ||
21 | #include <asm/ipic.h> | ||
22 | #include <asm/udbg.h> | ||
23 | |||
24 | #include "mpc83xx.h" | ||
25 | |||
26 | /* ************************************************************************ | ||
27 | * | ||
28 | * Setup the architecture | ||
29 | * | ||
30 | */ | ||
31 | static void __init asp834x_setup_arch(void) | ||
32 | { | ||
33 | if (ppc_md.progress) | ||
34 | ppc_md.progress("asp834x_setup_arch()", 0); | ||
35 | |||
36 | mpc834x_usb_cfg(); | ||
37 | } | ||
38 | |||
39 | static void __init asp834x_init_IRQ(void) | ||
40 | { | ||
41 | struct device_node *np; | ||
42 | |||
43 | np = of_find_node_by_type(NULL, "ipic"); | ||
44 | if (!np) | ||
45 | return; | ||
46 | |||
47 | ipic_init(np, 0); | ||
48 | |||
49 | of_node_put(np); | ||
50 | |||
51 | /* Initialize the default interrupt mapping priorities, | ||
52 | * in case the boot rom changed something on us. | ||
53 | */ | ||
54 | ipic_set_default_priority(); | ||
55 | } | ||
56 | |||
57 | static struct __initdata of_device_id asp8347_ids[] = { | ||
58 | { .type = "soc", }, | ||
59 | { .compatible = "soc", }, | ||
60 | { .compatible = "simple-bus", }, | ||
61 | {}, | ||
62 | }; | ||
63 | |||
64 | static int __init asp8347_declare_of_platform_devices(void) | ||
65 | { | ||
66 | of_platform_bus_probe(NULL, asp8347_ids, NULL); | ||
67 | return 0; | ||
68 | } | ||
69 | machine_device_initcall(asp834x, asp8347_declare_of_platform_devices); | ||
70 | |||
71 | /* | ||
72 | * Called very early, MMU is off, device-tree isn't unflattened | ||
73 | */ | ||
74 | static int __init asp834x_probe(void) | ||
75 | { | ||
76 | unsigned long root = of_get_flat_dt_root(); | ||
77 | return of_flat_dt_is_compatible(root, "analogue-and-micro,asp8347e"); | ||
78 | } | ||
79 | |||
80 | define_machine(asp834x) { | ||
81 | .name = "ASP8347E", | ||
82 | .probe = asp834x_probe, | ||
83 | .setup_arch = asp834x_setup_arch, | ||
84 | .init_IRQ = asp834x_init_IRQ, | ||
85 | .get_irq = ipic_get_irq, | ||
86 | .restart = mpc83xx_restart, | ||
87 | .time_init = mpc83xx_time_init, | ||
88 | .calibrate_decr = generic_calibrate_decr, | ||
89 | .progress = udbg_progress, | ||
90 | }; | ||
diff --git a/arch/powerpc/platforms/83xx/mpc836x_rdk.c b/arch/powerpc/platforms/83xx/mpc836x_rdk.c new file mode 100644 index 000000000000..c10dec4bf178 --- /dev/null +++ b/arch/powerpc/platforms/83xx/mpc836x_rdk.c | |||
@@ -0,0 +1,102 @@ | |||
1 | /* | ||
2 | * MPC8360E-RDK board file. | ||
3 | * | ||
4 | * Copyright (c) 2006 Freescale Semicondutor, Inc. | ||
5 | * Copyright (c) 2007-2008 MontaVista Software, Inc. | ||
6 | * | ||
7 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License as published by the | ||
11 | * Free Software Foundation; either version 2 of the License, or (at your | ||
12 | * option) any later version. | ||
13 | */ | ||
14 | |||
15 | #include <linux/kernel.h> | ||
16 | #include <linux/pci.h> | ||
17 | #include <linux/of_platform.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <asm/prom.h> | ||
20 | #include <asm/time.h> | ||
21 | #include <asm/ipic.h> | ||
22 | #include <asm/udbg.h> | ||
23 | #include <asm/qe.h> | ||
24 | #include <asm/qe_ic.h> | ||
25 | #include <sysdev/fsl_soc.h> | ||
26 | |||
27 | #include "mpc83xx.h" | ||
28 | |||
29 | static struct of_device_id __initdata mpc836x_rdk_ids[] = { | ||
30 | { .compatible = "simple-bus", }, | ||
31 | {}, | ||
32 | }; | ||
33 | |||
34 | static int __init mpc836x_rdk_declare_of_platform_devices(void) | ||
35 | { | ||
36 | return of_platform_bus_probe(NULL, mpc836x_rdk_ids, NULL); | ||
37 | } | ||
38 | machine_device_initcall(mpc836x_rdk, mpc836x_rdk_declare_of_platform_devices); | ||
39 | |||
40 | static void __init mpc836x_rdk_setup_arch(void) | ||
41 | { | ||
42 | #ifdef CONFIG_PCI | ||
43 | struct device_node *np; | ||
44 | #endif | ||
45 | |||
46 | if (ppc_md.progress) | ||
47 | ppc_md.progress("mpc836x_rdk_setup_arch()", 0); | ||
48 | |||
49 | #ifdef CONFIG_PCI | ||
50 | for_each_compatible_node(np, "pci", "fsl,mpc8349-pci") | ||
51 | mpc83xx_add_bridge(np); | ||
52 | #endif | ||
53 | |||
54 | qe_reset(); | ||
55 | } | ||
56 | |||
57 | static void __init mpc836x_rdk_init_IRQ(void) | ||
58 | { | ||
59 | struct device_node *np; | ||
60 | |||
61 | np = of_find_compatible_node(NULL, NULL, "fsl,ipic"); | ||
62 | if (!np) | ||
63 | return; | ||
64 | |||
65 | ipic_init(np, 0); | ||
66 | |||
67 | /* | ||
68 | * Initialize the default interrupt mapping priorities, | ||
69 | * in case the boot rom changed something on us. | ||
70 | */ | ||
71 | ipic_set_default_priority(); | ||
72 | of_node_put(np); | ||
73 | |||
74 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-ic"); | ||
75 | if (!np) | ||
76 | return; | ||
77 | |||
78 | qe_ic_init(np, 0, qe_ic_cascade_low_ipic, qe_ic_cascade_high_ipic); | ||
79 | of_node_put(np); | ||
80 | } | ||
81 | |||
82 | /* | ||
83 | * Called very early, MMU is off, device-tree isn't unflattened. | ||
84 | */ | ||
85 | static int __init mpc836x_rdk_probe(void) | ||
86 | { | ||
87 | unsigned long root = of_get_flat_dt_root(); | ||
88 | |||
89 | return of_flat_dt_is_compatible(root, "fsl,mpc8360rdk"); | ||
90 | } | ||
91 | |||
92 | define_machine(mpc836x_rdk) { | ||
93 | .name = "MPC836x RDK", | ||
94 | .probe = mpc836x_rdk_probe, | ||
95 | .setup_arch = mpc836x_rdk_setup_arch, | ||
96 | .init_IRQ = mpc836x_rdk_init_IRQ, | ||
97 | .get_irq = ipic_get_irq, | ||
98 | .restart = mpc83xx_restart, | ||
99 | .time_init = mpc83xx_time_init, | ||
100 | .calibrate_decr = generic_calibrate_decr, | ||
101 | .progress = udbg_progress, | ||
102 | }; | ||
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig index ecbe580c3f32..9cb8e29987a3 100644 --- a/arch/powerpc/platforms/85xx/Kconfig +++ b/arch/powerpc/platforms/85xx/Kconfig | |||
@@ -75,6 +75,14 @@ config TQM8541 | |||
75 | select TQM85xx | 75 | select TQM85xx |
76 | select CPM2 | 76 | select CPM2 |
77 | 77 | ||
78 | config TQM8548 | ||
79 | bool "TQ Components TQM8548" | ||
80 | help | ||
81 | This option enables support for the TQ Components TQM8548 board. | ||
82 | select DEFAULT_UIMAGE | ||
83 | select PPC_CPM_NEW_BINDING | ||
84 | select TQM85xx | ||
85 | |||
78 | config TQM8555 | 86 | config TQM8555 |
79 | bool "TQ Components TQM8555" | 87 | bool "TQ Components TQM8555" |
80 | help | 88 | help |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c index 3582c841844b..ba498d6f2d02 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c | |||
@@ -119,6 +119,8 @@ static const struct cpm_pin mpc8560_ads_pins[] = { | |||
119 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 119 | {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
120 | 120 | ||
121 | /* SCC2 */ | 121 | /* SCC2 */ |
122 | {2, 12, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
123 | {2, 13, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | ||
122 | {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 124 | {3, 26, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
123 | {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 125 | {3, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
124 | {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 126 | {3, 28, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
@@ -145,7 +147,6 @@ static const struct cpm_pin mpc8560_ads_pins[] = { | |||
145 | {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 147 | {1, 4, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
146 | {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 148 | {1, 5, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
147 | {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 149 | {1, 6, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
148 | {1, 7, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
149 | {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 150 | {1, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
150 | {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 151 | {1, 9, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
151 | {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 152 | {1, 10, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
@@ -156,8 +157,9 @@ static const struct cpm_pin mpc8560_ads_pins[] = { | |||
156 | {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | 157 | {1, 15, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, |
157 | {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 158 | {1, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
158 | {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, | 159 | {1, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, |
159 | {2, 16, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK16 */ | 160 | {2, 16, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK16 */ |
160 | {2, 17, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* CLK15 */ | 161 | {2, 17, CPM_PIN_INPUT | CPM_PIN_PRIMARY}, /* CLK15 */ |
162 | {2, 27, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, | ||
161 | }; | 163 | }; |
162 | 164 | ||
163 | static void __init init_ioports(void) | 165 | static void __init init_ioports(void) |
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c index dfd8b4ad9b28..b010dc9dec65 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c | |||
@@ -78,7 +78,8 @@ void __init mpc85xx_ds_pic_init(void) | |||
78 | } | 78 | } |
79 | 79 | ||
80 | mpic = mpic_alloc(np, r.start, | 80 | mpic = mpic_alloc(np, r.start, |
81 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 81 | MPIC_PRIMARY | MPIC_WANTS_RESET | |
82 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
82 | 0, 256, " OpenPIC "); | 83 | 0, 256, " OpenPIC "); |
83 | BUG_ON(mpic == NULL); | 84 | BUG_ON(mpic == NULL); |
84 | 85 | ||
@@ -195,6 +196,7 @@ static int __init mpc85xxds_publish_devices(void) | |||
195 | return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); | 196 | return of_platform_bus_probe(NULL, mpc85xxds_ids, NULL); |
196 | } | 197 | } |
197 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); | 198 | machine_device_initcall(mpc8544_ds, mpc85xxds_publish_devices); |
199 | machine_device_initcall(mpc8572_ds, mpc85xxds_publish_devices); | ||
198 | 200 | ||
199 | /* | 201 | /* |
200 | * Called very early, device-tree isn't unflattened | 202 | * Called very early, device-tree isn't unflattened |
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c index 77681acf1bae..d850880d6964 100644 --- a/arch/powerpc/platforms/85xx/tqm85xx.c +++ b/arch/powerpc/platforms/85xx/tqm85xx.c | |||
@@ -120,8 +120,18 @@ static void __init tqm85xx_setup_arch(void) | |||
120 | #endif | 120 | #endif |
121 | 121 | ||
122 | #ifdef CONFIG_PCI | 122 | #ifdef CONFIG_PCI |
123 | for_each_compatible_node(np, "pci", "fsl,mpc8540-pci") | 123 | for_each_node_by_type(np, "pci") { |
124 | fsl_add_bridge(np, 1); | 124 | if (of_device_is_compatible(np, "fsl,mpc8540-pci") || |
125 | of_device_is_compatible(np, "fsl,mpc8548-pcie")) { | ||
126 | struct resource rsrc; | ||
127 | if (!of_address_to_resource(np, 0, &rsrc)) { | ||
128 | if ((rsrc.start & 0xfffff) == 0x8000) | ||
129 | fsl_add_bridge(np, 1); | ||
130 | else | ||
131 | fsl_add_bridge(np, 0); | ||
132 | } | ||
133 | } | ||
134 | } | ||
125 | #endif | 135 | #endif |
126 | } | 136 | } |
127 | 137 | ||
@@ -165,10 +175,11 @@ static int __init tqm85xx_probe(void) | |||
165 | { | 175 | { |
166 | unsigned long root = of_get_flat_dt_root(); | 176 | unsigned long root = of_get_flat_dt_root(); |
167 | 177 | ||
168 | if ((of_flat_dt_is_compatible(root, "tqm,8540")) || | 178 | if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) || |
169 | (of_flat_dt_is_compatible(root, "tqm,8541")) || | 179 | (of_flat_dt_is_compatible(root, "tqc,tqm8541")) || |
170 | (of_flat_dt_is_compatible(root, "tqm,8555")) || | 180 | (of_flat_dt_is_compatible(root, "tqc,tqm8548")) || |
171 | (of_flat_dt_is_compatible(root, "tqm,8560"))) | 181 | (of_flat_dt_is_compatible(root, "tqc,tqm8555")) || |
182 | (of_flat_dt_is_compatible(root, "tqc,tqm8560"))) | ||
172 | return 1; | 183 | return 1; |
173 | 184 | ||
174 | return 0; | 185 | return 0; |
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c index dea13208bf64..eb16208b29d9 100644 --- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c +++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c | |||
@@ -70,7 +70,8 @@ static void __init mpc86xx_hpcd_init_irq(void) | |||
70 | 70 | ||
71 | /* Alloc mpic structure and per isu has 16 INT entries. */ | 71 | /* Alloc mpic structure and per isu has 16 INT entries. */ |
72 | mpic1 = mpic_alloc(np, res.start, | 72 | mpic1 = mpic_alloc(np, res.start, |
73 | MPIC_PRIMARY | MPIC_WANTS_RESET | MPIC_BIG_ENDIAN, | 73 | MPIC_PRIMARY | MPIC_WANTS_RESET | |
74 | MPIC_BIG_ENDIAN | MPIC_BROKEN_FRR_NIRQS, | ||
74 | 0, 256, " MPIC "); | 75 | 0, 256, " MPIC "); |
75 | BUG_ON(mpic1 == NULL); | 76 | BUG_ON(mpic1 == NULL); |
76 | 77 | ||
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype index f7efaa925a13..1a1ccfbb9232 100644 --- a/arch/powerpc/platforms/Kconfig.cputype +++ b/arch/powerpc/platforms/Kconfig.cputype | |||
@@ -95,6 +95,11 @@ config E500 | |||
95 | select FSL_EMB_PERFMON | 95 | select FSL_EMB_PERFMON |
96 | bool | 96 | bool |
97 | 97 | ||
98 | config PPC_E500MC | ||
99 | bool "e500mc Support" | ||
100 | select PPC_FPU | ||
101 | depends on E500 | ||
102 | |||
98 | config PPC_FPU | 103 | config PPC_FPU |
99 | bool | 104 | bool |
100 | default y if PPC64 | 105 | default y if PPC64 |
@@ -157,7 +162,7 @@ config ALTIVEC | |||
157 | 162 | ||
158 | config SPE | 163 | config SPE |
159 | bool "SPE Support" | 164 | bool "SPE Support" |
160 | depends on E200 || E500 | 165 | depends on E200 || (E500 && !PPC_E500MC) |
161 | default y | 166 | default y |
162 | ---help--- | 167 | ---help--- |
163 | This option enables kernel support for the Signal Processing | 168 | This option enables kernel support for the Signal Processing |
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c index c39f5c225f2e..896548ba1ca1 100644 --- a/arch/powerpc/platforms/cell/axon_msi.c +++ b/arch/powerpc/platforms/cell/axon_msi.c | |||
@@ -14,6 +14,7 @@ | |||
14 | #include <linux/pci.h> | 14 | #include <linux/pci.h> |
15 | #include <linux/msi.h> | 15 | #include <linux/msi.h> |
16 | #include <linux/of_platform.h> | 16 | #include <linux/of_platform.h> |
17 | #include <linux/debugfs.h> | ||
17 | 18 | ||
18 | #include <asm/dcr.h> | 19 | #include <asm/dcr.h> |
19 | #include <asm/machdep.h> | 20 | #include <asm/machdep.h> |
@@ -69,8 +70,19 @@ struct axon_msic { | |||
69 | dma_addr_t fifo_phys; | 70 | dma_addr_t fifo_phys; |
70 | dcr_host_t dcr_host; | 71 | dcr_host_t dcr_host; |
71 | u32 read_offset; | 72 | u32 read_offset; |
73 | #ifdef DEBUG | ||
74 | u32 __iomem *trigger; | ||
75 | #endif | ||
72 | }; | 76 | }; |
73 | 77 | ||
78 | #ifdef DEBUG | ||
79 | void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic); | ||
80 | #else | ||
81 | static inline void axon_msi_debug_setup(struct device_node *dn, | ||
82 | struct axon_msic *msic) { } | ||
83 | #endif | ||
84 | |||
85 | |||
74 | static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) | 86 | static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val) |
75 | { | 87 | { |
76 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); | 88 | pr_debug("axon_msi: dcr_write(0x%x, 0x%x)\n", val, dcr_n); |
@@ -346,7 +358,14 @@ static int axon_msi_probe(struct of_device *device, | |||
346 | goto out_free_msic; | 358 | goto out_free_msic; |
347 | } | 359 | } |
348 | 360 | ||
349 | msic->irq_host = irq_alloc_host(of_node_get(dn), IRQ_HOST_MAP_NOMAP, | 361 | virq = irq_of_parse_and_map(dn, 0); |
362 | if (virq == NO_IRQ) { | ||
363 | printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n", | ||
364 | dn->full_name); | ||
365 | goto out_free_fifo; | ||
366 | } | ||
367 | |||
368 | msic->irq_host = irq_alloc_host(dn, IRQ_HOST_MAP_NOMAP, | ||
350 | NR_IRQS, &msic_host_ops, 0); | 369 | NR_IRQS, &msic_host_ops, 0); |
351 | if (!msic->irq_host) { | 370 | if (!msic->irq_host) { |
352 | printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n", | 371 | printk(KERN_ERR "axon_msi: couldn't allocate irq_host for %s\n", |
@@ -356,13 +375,6 @@ static int axon_msi_probe(struct of_device *device, | |||
356 | 375 | ||
357 | msic->irq_host->host_data = msic; | 376 | msic->irq_host->host_data = msic; |
358 | 377 | ||
359 | virq = irq_of_parse_and_map(dn, 0); | ||
360 | if (virq == NO_IRQ) { | ||
361 | printk(KERN_ERR "axon_msi: irq parse and map failed for %s\n", | ||
362 | dn->full_name); | ||
363 | goto out_free_host; | ||
364 | } | ||
365 | |||
366 | set_irq_data(virq, msic); | 378 | set_irq_data(virq, msic); |
367 | set_irq_chained_handler(virq, axon_msi_cascade); | 379 | set_irq_chained_handler(virq, axon_msi_cascade); |
368 | pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq); | 380 | pr_debug("axon_msi: irq 0x%x setup for axon_msi\n", virq); |
@@ -381,12 +393,12 @@ static int axon_msi_probe(struct of_device *device, | |||
381 | ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; | 393 | ppc_md.teardown_msi_irqs = axon_msi_teardown_msi_irqs; |
382 | ppc_md.msi_check_device = axon_msi_check_device; | 394 | ppc_md.msi_check_device = axon_msi_check_device; |
383 | 395 | ||
396 | axon_msi_debug_setup(dn, msic); | ||
397 | |||
384 | printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); | 398 | printk(KERN_DEBUG "axon_msi: setup MSIC on %s\n", dn->full_name); |
385 | 399 | ||
386 | return 0; | 400 | return 0; |
387 | 401 | ||
388 | out_free_host: | ||
389 | kfree(msic->irq_host); | ||
390 | out_free_fifo: | 402 | out_free_fifo: |
391 | dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt, | 403 | dma_free_coherent(&device->dev, MSIC_FIFO_SIZE_BYTES, msic->fifo_virt, |
392 | msic->fifo_phys); | 404 | msic->fifo_phys); |
@@ -418,3 +430,47 @@ static int __init axon_msi_init(void) | |||
418 | return of_register_platform_driver(&axon_msi_driver); | 430 | return of_register_platform_driver(&axon_msi_driver); |
419 | } | 431 | } |
420 | subsys_initcall(axon_msi_init); | 432 | subsys_initcall(axon_msi_init); |
433 | |||
434 | |||
435 | #ifdef DEBUG | ||
436 | static int msic_set(void *data, u64 val) | ||
437 | { | ||
438 | struct axon_msic *msic = data; | ||
439 | out_le32(msic->trigger, val); | ||
440 | return 0; | ||
441 | } | ||
442 | |||
443 | static int msic_get(void *data, u64 *val) | ||
444 | { | ||
445 | *val = 0; | ||
446 | return 0; | ||
447 | } | ||
448 | |||
449 | DEFINE_SIMPLE_ATTRIBUTE(fops_msic, msic_get, msic_set, "%llu\n"); | ||
450 | |||
451 | void axon_msi_debug_setup(struct device_node *dn, struct axon_msic *msic) | ||
452 | { | ||
453 | char name[8]; | ||
454 | u64 addr; | ||
455 | |||
456 | addr = of_translate_address(dn, of_get_property(dn, "reg", NULL)); | ||
457 | if (addr == OF_BAD_ADDR) { | ||
458 | pr_debug("axon_msi: couldn't translate reg property\n"); | ||
459 | return; | ||
460 | } | ||
461 | |||
462 | msic->trigger = ioremap(addr, 0x4); | ||
463 | if (!msic->trigger) { | ||
464 | pr_debug("axon_msi: ioremap failed\n"); | ||
465 | return; | ||
466 | } | ||
467 | |||
468 | snprintf(name, sizeof(name), "msic_%d", of_node_to_nid(dn)); | ||
469 | |||
470 | if (!debugfs_create_file(name, 0600, powerpc_debugfs_root, | ||
471 | msic, &fops_msic)) { | ||
472 | pr_debug("axon_msi: debugfs_create_file failed!\n"); | ||
473 | return; | ||
474 | } | ||
475 | } | ||
476 | #endif /* DEBUG */ | ||
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c index 3f4b4aef756d..4e5655624ae8 100644 --- a/arch/powerpc/platforms/cell/spider-pic.c +++ b/arch/powerpc/platforms/cell/spider-pic.c | |||
@@ -300,7 +300,7 @@ static void __init spider_init_one(struct device_node *of_node, int chip, | |||
300 | panic("spider_pic: can't map registers !"); | 300 | panic("spider_pic: can't map registers !"); |
301 | 301 | ||
302 | /* Allocate a host */ | 302 | /* Allocate a host */ |
303 | pic->host = irq_alloc_host(of_node_get(of_node), IRQ_HOST_MAP_LINEAR, | 303 | pic->host = irq_alloc_host(of_node, IRQ_HOST_MAP_LINEAR, |
304 | SPIDER_SRC_COUNT, &spider_host_ops, | 304 | SPIDER_SRC_COUNT, &spider_host_ops, |
305 | SPIDER_IRQ_INVALID); | 305 | SPIDER_IRQ_INVALID); |
306 | if (pic->host == NULL) | 306 | if (pic->host == NULL) |
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c index 116babbaaf81..1ba7ce5aafae 100644 --- a/arch/powerpc/platforms/chrp/setup.c +++ b/arch/powerpc/platforms/chrp/setup.c | |||
@@ -63,13 +63,6 @@ static struct mpic *chrp_mpic; | |||
63 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); | 63 | DEFINE_PER_CPU(struct timer_list, heartbeat_timer); |
64 | unsigned long event_scan_interval; | 64 | unsigned long event_scan_interval; |
65 | 65 | ||
66 | /* | ||
67 | * XXX this should be in xmon.h, but putting it there means xmon.h | ||
68 | * has to include <linux/interrupt.h> (to get irqreturn_t), which | ||
69 | * causes all sorts of problems. -- paulus | ||
70 | */ | ||
71 | extern irqreturn_t xmon_irq(int, void *); | ||
72 | |||
73 | extern unsigned long loops_per_jiffy; | 66 | extern unsigned long loops_per_jiffy; |
74 | 67 | ||
75 | /* To be replaced by RTAS when available */ | 68 | /* To be replaced by RTAS when available */ |
diff --git a/arch/powerpc/platforms/embedded6xx/Kconfig b/arch/powerpc/platforms/embedded6xx/Kconfig index 429088967813..4f9f8184d164 100644 --- a/arch/powerpc/platforms/embedded6xx/Kconfig +++ b/arch/powerpc/platforms/embedded6xx/Kconfig | |||
@@ -59,6 +59,16 @@ config PPC_PRPMC2800 | |||
59 | help | 59 | help |
60 | This option enables support for the Motorola PrPMC2800 board | 60 | This option enables support for the Motorola PrPMC2800 board |
61 | 61 | ||
62 | config PPC_C2K | ||
63 | bool "SBS/GEFanuc C2K board" | ||
64 | depends on EMBEDDED6xx | ||
65 | select MV64X60 | ||
66 | select NOT_COHERENT_CACHE | ||
67 | select MTD_CFI_I4 | ||
68 | help | ||
69 | This option enables support for the GE Fanuc C2K board (formerly | ||
70 | an SBS board). | ||
71 | |||
62 | config TSI108_BRIDGE | 72 | config TSI108_BRIDGE |
63 | bool | 73 | bool |
64 | select PCI | 74 | select PCI |
diff --git a/arch/powerpc/platforms/embedded6xx/Makefile b/arch/powerpc/platforms/embedded6xx/Makefile index 06524d3ffd2e..0773c08bd444 100644 --- a/arch/powerpc/platforms/embedded6xx/Makefile +++ b/arch/powerpc/platforms/embedded6xx/Makefile | |||
@@ -6,3 +6,4 @@ obj-$(CONFIG_LINKSTATION) += linkstation.o ls_uart.o | |||
6 | obj-$(CONFIG_STORCENTER) += storcenter.o | 6 | obj-$(CONFIG_STORCENTER) += storcenter.o |
7 | obj-$(CONFIG_PPC_HOLLY) += holly.o | 7 | obj-$(CONFIG_PPC_HOLLY) += holly.o |
8 | obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o | 8 | obj-$(CONFIG_PPC_PRPMC2800) += prpmc2800.o |
9 | obj-$(CONFIG_PPC_C2K) += c2k.o | ||
diff --git a/arch/powerpc/platforms/embedded6xx/c2k.c b/arch/powerpc/platforms/embedded6xx/c2k.c new file mode 100644 index 000000000000..d0b25b8c39d1 --- /dev/null +++ b/arch/powerpc/platforms/embedded6xx/c2k.c | |||
@@ -0,0 +1,158 @@ | |||
1 | /* | ||
2 | * Board setup routines for the GEFanuc C2K board | ||
3 | * | ||
4 | * Author: Remi Machet <rmachet@slac.stanford.edu> | ||
5 | * | ||
6 | * Originated from prpmc2800.c | ||
7 | * | ||
8 | * 2008 (c) Stanford University | ||
9 | * 2007 (c) MontaVista, Software, Inc. | ||
10 | * | ||
11 | * This program is free software; you can redistribute it and/or modify it | ||
12 | * under the terms of the GNU General Public License version 2 as published | ||
13 | * by the Free Software Foundation. | ||
14 | */ | ||
15 | |||
16 | #include <linux/stddef.h> | ||
17 | #include <linux/kernel.h> | ||
18 | #include <linux/delay.h> | ||
19 | #include <linux/interrupt.h> | ||
20 | #include <linux/seq_file.h> | ||
21 | #include <linux/time.h> | ||
22 | #include <linux/of.h> | ||
23 | #include <linux/kexec.h> | ||
24 | |||
25 | #include <asm/machdep.h> | ||
26 | #include <asm/prom.h> | ||
27 | #include <asm/system.h> | ||
28 | #include <asm/time.h> | ||
29 | |||
30 | #include <mm/mmu_decl.h> | ||
31 | |||
32 | #include <sysdev/mv64x60.h> | ||
33 | |||
34 | #define MV64x60_MPP_CNTL_0 0x0000 | ||
35 | #define MV64x60_MPP_CNTL_2 0x0008 | ||
36 | |||
37 | #define MV64x60_GPP_IO_CNTL 0x0000 | ||
38 | #define MV64x60_GPP_LEVEL_CNTL 0x0010 | ||
39 | #define MV64x60_GPP_VALUE_SET 0x0018 | ||
40 | |||
41 | static void __iomem *mv64x60_mpp_reg_base; | ||
42 | static void __iomem *mv64x60_gpp_reg_base; | ||
43 | |||
44 | static void __init c2k_setup_arch(void) | ||
45 | { | ||
46 | struct device_node *np; | ||
47 | phys_addr_t paddr; | ||
48 | const unsigned int *reg; | ||
49 | |||
50 | /* | ||
51 | * ioremap mpp and gpp registers in case they are later | ||
52 | * needed by c2k_reset_board(). | ||
53 | */ | ||
54 | np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-mpp"); | ||
55 | reg = of_get_property(np, "reg", NULL); | ||
56 | paddr = of_translate_address(np, reg); | ||
57 | of_node_put(np); | ||
58 | mv64x60_mpp_reg_base = ioremap(paddr, reg[1]); | ||
59 | |||
60 | np = of_find_compatible_node(NULL, NULL, "marvell,mv64360-gpp"); | ||
61 | reg = of_get_property(np, "reg", NULL); | ||
62 | paddr = of_translate_address(np, reg); | ||
63 | of_node_put(np); | ||
64 | mv64x60_gpp_reg_base = ioremap(paddr, reg[1]); | ||
65 | |||
66 | #ifdef CONFIG_PCI | ||
67 | mv64x60_pci_init(); | ||
68 | #endif | ||
69 | } | ||
70 | |||
71 | static void c2k_reset_board(void) | ||
72 | { | ||
73 | u32 temp; | ||
74 | |||
75 | local_irq_disable(); | ||
76 | |||
77 | temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0); | ||
78 | temp &= 0xFFFF0FFF; | ||
79 | out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_0, temp); | ||
80 | |||
81 | temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); | ||
82 | temp |= 0x00000004; | ||
83 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); | ||
84 | |||
85 | temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); | ||
86 | temp |= 0x00000004; | ||
87 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); | ||
88 | |||
89 | temp = in_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2); | ||
90 | temp &= 0xFFFF0FFF; | ||
91 | out_le32(mv64x60_mpp_reg_base + MV64x60_MPP_CNTL_2, temp); | ||
92 | |||
93 | temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL); | ||
94 | temp |= 0x00080000; | ||
95 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_LEVEL_CNTL, temp); | ||
96 | |||
97 | temp = in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL); | ||
98 | temp |= 0x00080000; | ||
99 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_IO_CNTL, temp); | ||
100 | |||
101 | out_le32(mv64x60_gpp_reg_base + MV64x60_GPP_VALUE_SET, 0x00080004); | ||
102 | } | ||
103 | |||
104 | static void c2k_restart(char *cmd) | ||
105 | { | ||
106 | c2k_reset_board(); | ||
107 | msleep(100); | ||
108 | panic("restart failed\n"); | ||
109 | } | ||
110 | |||
111 | #ifdef CONFIG_NOT_COHERENT_CACHE | ||
112 | #define COHERENCY_SETTING "off" | ||
113 | #else | ||
114 | #define COHERENCY_SETTING "on" | ||
115 | #endif | ||
116 | |||
117 | void c2k_show_cpuinfo(struct seq_file *m) | ||
118 | { | ||
119 | uint memsize = total_memory; | ||
120 | |||
121 | seq_printf(m, "Vendor\t\t: GEFanuc\n"); | ||
122 | seq_printf(m, "Memory\t\t: %d MB\n", memsize / (1024 * 1024)); | ||
123 | seq_printf(m, "coherency\t: %s\n", COHERENCY_SETTING); | ||
124 | } | ||
125 | |||
126 | /* | ||
127 | * Called very early, device-tree isn't unflattened | ||
128 | */ | ||
129 | static int __init c2k_probe(void) | ||
130 | { | ||
131 | unsigned long root = of_get_flat_dt_root(); | ||
132 | |||
133 | if (!of_flat_dt_is_compatible(root, "GEFanuc,C2K")) | ||
134 | return 0; | ||
135 | |||
136 | printk(KERN_INFO "Detected a GEFanuc C2K board\n"); | ||
137 | |||
138 | _set_L2CR(0); | ||
139 | _set_L2CR(L2CR_L2E | L2CR_L2PE | L2CR_L2I); | ||
140 | return 1; | ||
141 | } | ||
142 | |||
143 | define_machine(c2k) { | ||
144 | .name = "C2K", | ||
145 | .probe = c2k_probe, | ||
146 | .setup_arch = c2k_setup_arch, | ||
147 | .init_early = mv64x60_init_early, | ||
148 | .show_cpuinfo = c2k_show_cpuinfo, | ||
149 | .init_IRQ = mv64x60_init_irq, | ||
150 | .get_irq = mv64x60_get_irq, | ||
151 | .restart = c2k_restart, | ||
152 | .calibrate_decr = generic_calibrate_decr, | ||
153 | #ifdef CONFIG_KEXEC | ||
154 | .machine_kexec = default_machine_kexec, | ||
155 | .machine_kexec_prepare = default_machine_kexec_prepare, | ||
156 | .machine_crash_shutdown = default_machine_crash_shutdown, | ||
157 | #endif | ||
158 | }; | ||
diff --git a/arch/powerpc/platforms/maple/time.c b/arch/powerpc/platforms/maple/time.c index 9f7579b38c72..53bca132fb48 100644 --- a/arch/powerpc/platforms/maple/time.c +++ b/arch/powerpc/platforms/maple/time.c | |||
@@ -41,8 +41,6 @@ | |||
41 | #define DBG(x...) | 41 | #define DBG(x...) |
42 | #endif | 42 | #endif |
43 | 43 | ||
44 | extern void GregorianDay(struct rtc_time * tm); | ||
45 | |||
46 | static int maple_rtc_addr; | 44 | static int maple_rtc_addr; |
47 | 45 | ||
48 | static int maple_clock_read(int addr) | 46 | static int maple_clock_read(int addr) |
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c index 829b8b02527b..6d149ae8ffa7 100644 --- a/arch/powerpc/platforms/powermac/pic.c +++ b/arch/powerpc/platforms/powermac/pic.c | |||
@@ -34,16 +34,10 @@ | |||
34 | #include <asm/time.h> | 34 | #include <asm/time.h> |
35 | #include <asm/pmac_feature.h> | 35 | #include <asm/pmac_feature.h> |
36 | #include <asm/mpic.h> | 36 | #include <asm/mpic.h> |
37 | #include <asm/xmon.h> | ||
37 | 38 | ||
38 | #include "pmac.h" | 39 | #include "pmac.h" |
39 | 40 | ||
40 | /* | ||
41 | * XXX this should be in xmon.h, but putting it there means xmon.h | ||
42 | * has to include <linux/interrupt.h> (to get irqreturn_t), which | ||
43 | * causes all sorts of problems. -- paulus | ||
44 | */ | ||
45 | extern irqreturn_t xmon_irq(int, void *); | ||
46 | |||
47 | #ifdef CONFIG_PPC32 | 41 | #ifdef CONFIG_PPC32 |
48 | struct pmac_irq_hw { | 42 | struct pmac_irq_hw { |
49 | unsigned int event; | 43 | unsigned int event; |
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c index 9d3a40f45974..5a707da3f5c2 100644 --- a/arch/powerpc/platforms/pseries/firmware.c +++ b/arch/powerpc/platforms/pseries/firmware.c | |||
@@ -26,6 +26,7 @@ | |||
26 | #include <asm/prom.h> | 26 | #include <asm/prom.h> |
27 | #include <asm/udbg.h> | 27 | #include <asm/udbg.h> |
28 | 28 | ||
29 | #include "pseries.h" | ||
29 | 30 | ||
30 | typedef struct { | 31 | typedef struct { |
31 | unsigned long val; | 32 | unsigned long val; |
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c index 176f1f39d2d5..9a12908510fb 100644 --- a/arch/powerpc/platforms/pseries/iommu.c +++ b/arch/powerpc/platforms/pseries/iommu.c | |||
@@ -135,9 +135,10 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, | |||
135 | u64 rpn; | 135 | u64 rpn; |
136 | long l, limit; | 136 | long l, limit; |
137 | 137 | ||
138 | if (npages == 1) | 138 | if (npages == 1) { |
139 | return tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, | 139 | tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, direction); |
140 | direction); | 140 | return; |
141 | } | ||
141 | 142 | ||
142 | tcep = __get_cpu_var(tce_page); | 143 | tcep = __get_cpu_var(tce_page); |
143 | 144 | ||
@@ -147,9 +148,11 @@ static void tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum, | |||
147 | if (!tcep) { | 148 | if (!tcep) { |
148 | tcep = (u64 *)__get_free_page(GFP_ATOMIC); | 149 | tcep = (u64 *)__get_free_page(GFP_ATOMIC); |
149 | /* If allocation fails, fall back to the loop implementation */ | 150 | /* If allocation fails, fall back to the loop implementation */ |
150 | if (!tcep) | 151 | if (!tcep) { |
151 | return tce_build_pSeriesLP(tbl, tcenum, npages, | 152 | tce_build_pSeriesLP(tbl, tcenum, npages, uaddr, |
152 | uaddr, direction); | 153 | direction); |
154 | return; | ||
155 | } | ||
153 | __get_cpu_var(tce_page) = tcep; | 156 | __get_cpu_var(tce_page) = tcep; |
154 | } | 157 | } |
155 | 158 | ||
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c index 2cbaedb17f3e..3b4651b6ee05 100644 --- a/arch/powerpc/platforms/pseries/lpar.c +++ b/arch/powerpc/platforms/pseries/lpar.c | |||
@@ -52,7 +52,7 @@ EXPORT_SYMBOL(plpar_hcall_norets); | |||
52 | extern void pSeries_find_serial_port(void); | 52 | extern void pSeries_find_serial_port(void); |
53 | 53 | ||
54 | 54 | ||
55 | int vtermno; /* virtual terminal# for udbg */ | 55 | static int vtermno; /* virtual terminal# for udbg */ |
56 | 56 | ||
57 | #define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) | 57 | #define __ALIGNED__ __attribute__((__aligned__(sizeof(long)))) |
58 | static void udbg_hvsi_putc(char c) | 58 | static void udbg_hvsi_putc(char c) |
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c index 2b548afd1003..d20b96e22c2e 100644 --- a/arch/powerpc/platforms/pseries/ras.c +++ b/arch/powerpc/platforms/pseries/ras.c | |||
@@ -55,7 +55,7 @@ | |||
55 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; | 55 | static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX]; |
56 | static DEFINE_SPINLOCK(ras_log_buf_lock); | 56 | static DEFINE_SPINLOCK(ras_log_buf_lock); |
57 | 57 | ||
58 | char mce_data_buf[RTAS_ERROR_LOG_MAX]; | 58 | static char mce_data_buf[RTAS_ERROR_LOG_MAX]; |
59 | 59 | ||
60 | static int ras_get_sensor_state_token; | 60 | static int ras_get_sensor_state_token; |
61 | static int ras_check_exception_token; | 61 | static int ras_check_exception_token; |
diff --git a/arch/powerpc/platforms/pseries/rtasd.c b/arch/powerpc/platforms/pseries/rtasd.c index 7d3e2b0bd4d2..c9ffd8c225f1 100644 --- a/arch/powerpc/platforms/pseries/rtasd.c +++ b/arch/powerpc/platforms/pseries/rtasd.c | |||
@@ -32,7 +32,7 @@ | |||
32 | 32 | ||
33 | static DEFINE_SPINLOCK(rtasd_log_lock); | 33 | static DEFINE_SPINLOCK(rtasd_log_lock); |
34 | 34 | ||
35 | DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); | 35 | static DECLARE_WAIT_QUEUE_HEAD(rtas_log_wait); |
36 | 36 | ||
37 | static char *rtas_log_buf; | 37 | static char *rtas_log_buf; |
38 | static unsigned long rtas_log_start; | 38 | static unsigned long rtas_log_start; |
@@ -329,7 +329,7 @@ static unsigned int rtas_log_poll(struct file *file, poll_table * wait) | |||
329 | return 0; | 329 | return 0; |
330 | } | 330 | } |
331 | 331 | ||
332 | const struct file_operations proc_rtas_log_operations = { | 332 | static const struct file_operations proc_rtas_log_operations = { |
333 | .read = rtas_log_read, | 333 | .read = rtas_log_read, |
334 | .poll = rtas_log_poll, | 334 | .poll = rtas_log_poll, |
335 | .open = rtas_log_open, | 335 | .open = rtas_log_open, |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index f5d29f5b13c1..90beb444e1dd 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -109,7 +109,7 @@ static void __init fwnmi_init(void) | |||
109 | fwnmi_active = 1; | 109 | fwnmi_active = 1; |
110 | } | 110 | } |
111 | 111 | ||
112 | void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) | 112 | static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc) |
113 | { | 113 | { |
114 | unsigned int cascade_irq = i8259_irq(); | 114 | unsigned int cascade_irq = i8259_irq(); |
115 | if (cascade_irq != NO_IRQ) | 115 | if (cascade_irq != NO_IRQ) |
@@ -482,7 +482,7 @@ static int pSeries_pci_probe_mode(struct pci_bus *bus) | |||
482 | * possible with power button press. If ibm,power-off-ups token is used | 482 | * possible with power button press. If ibm,power-off-ups token is used |
483 | * it will allow auto poweron after power is restored. | 483 | * it will allow auto poweron after power is restored. |
484 | */ | 484 | */ |
485 | void pSeries_power_off(void) | 485 | static void pSeries_power_off(void) |
486 | { | 486 | { |
487 | int rc; | 487 | int rc; |
488 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); | 488 | int rtas_poweroff_ups_token = rtas_token("ibm,power-off-ups"); |
diff --git a/arch/powerpc/sysdev/6xx-suspend.S b/arch/powerpc/sysdev/6xx-suspend.S new file mode 100644 index 000000000000..21cda085d926 --- /dev/null +++ b/arch/powerpc/sysdev/6xx-suspend.S | |||
@@ -0,0 +1,52 @@ | |||
1 | /* | ||
2 | * Enter and leave sleep state on chips with 6xx-style HID0 | ||
3 | * power management bits, which don't leave sleep state via reset. | ||
4 | * | ||
5 | * Author: Scott Wood <scottwood@freescale.com> | ||
6 | * | ||
7 | * Copyright (c) 2006-2007 Freescale Semiconductor, Inc. | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or modify it | ||
10 | * under the terms of the GNU General Public License version 2 as published | ||
11 | * by the Free Software Foundation. | ||
12 | */ | ||
13 | |||
14 | #include <asm/ppc_asm.h> | ||
15 | #include <asm/reg.h> | ||
16 | #include <asm/thread_info.h> | ||
17 | #include <asm/asm-offsets.h> | ||
18 | |||
19 | _GLOBAL(mpc6xx_enter_standby) | ||
20 | mflr r4 | ||
21 | |||
22 | mfspr r5, SPRN_HID0 | ||
23 | rlwinm r5, r5, 0, ~(HID0_DOZE | HID0_NAP) | ||
24 | oris r5, r5, HID0_SLEEP@h | ||
25 | mtspr SPRN_HID0, r5 | ||
26 | isync | ||
27 | |||
28 | lis r5, ret_from_standby@h | ||
29 | ori r5, r5, ret_from_standby@l | ||
30 | mtlr r5 | ||
31 | |||
32 | rlwinm r5, r1, 0, 0, 31-THREAD_SHIFT | ||
33 | lwz r6, TI_LOCAL_FLAGS(r5) | ||
34 | ori r6, r6, _TLF_SLEEPING | ||
35 | stw r6, TI_LOCAL_FLAGS(r5) | ||
36 | |||
37 | mfmsr r5 | ||
38 | ori r5, r5, MSR_EE | ||
39 | oris r5, r5, MSR_POW@h | ||
40 | sync | ||
41 | mtmsr r5 | ||
42 | isync | ||
43 | |||
44 | 1: b 1b | ||
45 | |||
46 | ret_from_standby: | ||
47 | mfspr r5, SPRN_HID0 | ||
48 | rlwinm r5, r5, 0, ~HID0_SLEEP | ||
49 | mtspr SPRN_HID0, r5 | ||
50 | |||
51 | mtlr r4 | ||
52 | blr | ||
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile index 6d386d0071a0..16a0ed28eb00 100644 --- a/arch/powerpc/sysdev/Makefile +++ b/arch/powerpc/sysdev/Makefile | |||
@@ -4,6 +4,7 @@ endif | |||
4 | 4 | ||
5 | mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o | 5 | mpic-msi-obj-$(CONFIG_PCI_MSI) += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o |
6 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) | 6 | obj-$(CONFIG_MPIC) += mpic.o $(mpic-msi-obj-y) |
7 | fsl-msi-obj-$(CONFIG_PCI_MSI) += fsl_msi.o | ||
7 | 8 | ||
8 | obj-$(CONFIG_PPC_MPC106) += grackle.o | 9 | obj-$(CONFIG_PPC_MPC106) += grackle.o |
9 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o | 10 | obj-$(CONFIG_PPC_DCR_NATIVE) += dcr-low.o |
@@ -11,8 +12,9 @@ obj-$(CONFIG_PPC_PMI) += pmi.o | |||
11 | obj-$(CONFIG_U3_DART) += dart_iommu.o | 12 | obj-$(CONFIG_U3_DART) += dart_iommu.o |
12 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o | 13 | obj-$(CONFIG_MMIO_NVRAM) += mmio_nvram.o |
13 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o | 14 | obj-$(CONFIG_FSL_SOC) += fsl_soc.o |
14 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o | 15 | obj-$(CONFIG_FSL_PCI) += fsl_pci.o $(fsl-msi-obj-y) |
15 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o | 16 | obj-$(CONFIG_FSL_LBC) += fsl_lbc.o |
17 | obj-$(CONFIG_FSL_GTM) += fsl_gtm.o | ||
16 | obj-$(CONFIG_RAPIDIO) += fsl_rio.o | 18 | obj-$(CONFIG_RAPIDIO) += fsl_rio.o |
17 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o | 19 | obj-$(CONFIG_TSI108_BRIDGE) += tsi108_pci.o tsi108_dev.o |
18 | obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ | 20 | obj-$(CONFIG_QUICC_ENGINE) += qe_lib/ |
@@ -40,7 +42,12 @@ endif | |||
40 | ifeq ($(ARCH),powerpc) | 42 | ifeq ($(ARCH),powerpc) |
41 | obj-$(CONFIG_CPM) += cpm_common.o | 43 | obj-$(CONFIG_CPM) += cpm_common.o |
42 | obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o | 44 | obj-$(CONFIG_CPM2) += cpm2.o cpm2_pic.o |
45 | obj-$(CONFIG_QUICC_ENGINE) += cpm_common.o | ||
43 | obj-$(CONFIG_PPC_DCR) += dcr.o | 46 | obj-$(CONFIG_PPC_DCR) += dcr.o |
44 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o | 47 | obj-$(CONFIG_8xx) += mpc8xx_pic.o cpm1.o |
45 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o | 48 | obj-$(CONFIG_UCODE_PATCH) += micropatch.o |
46 | endif | 49 | endif |
50 | |||
51 | ifeq ($(CONFIG_SUSPEND),y) | ||
52 | obj-$(CONFIG_6xx) += 6xx-suspend.o | ||
53 | endif | ||
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c index 58292a086c16..661df42830b9 100644 --- a/arch/powerpc/sysdev/cpm1.c +++ b/arch/powerpc/sysdev/cpm1.c | |||
@@ -159,7 +159,7 @@ unsigned int cpm_pic_init(void) | |||
159 | 159 | ||
160 | out_be32(&cpic_reg->cpic_cimr, 0); | 160 | out_be32(&cpic_reg->cpic_cimr, 0); |
161 | 161 | ||
162 | cpm_pic_host = irq_alloc_host(of_node_get(np), IRQ_HOST_MAP_LINEAR, | 162 | cpm_pic_host = irq_alloc_host(np, IRQ_HOST_MAP_LINEAR, |
163 | 64, &cpm_pic_host_ops, 64); | 163 | 64, &cpm_pic_host_ops, 64); |
164 | if (cpm_pic_host == NULL) { | 164 | if (cpm_pic_host == NULL) { |
165 | printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); | 165 | printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); |
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c index 5fe65b2f8f3a..b16ca3ed65d2 100644 --- a/arch/powerpc/sysdev/cpm2_pic.c +++ b/arch/powerpc/sysdev/cpm2_pic.c | |||
@@ -266,7 +266,7 @@ void cpm2_pic_init(struct device_node *node) | |||
266 | out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); | 266 | out_be32(&cpm2_intctl->ic_scprrl, 0x05309770); |
267 | 267 | ||
268 | /* create a legacy host */ | 268 | /* create a legacy host */ |
269 | cpm2_pic_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, | 269 | cpm2_pic_host = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, |
270 | 64, &cpm2_pic_host_ops, 64); | 270 | 64, &cpm2_pic_host_ops, 64); |
271 | if (cpm2_pic_host == NULL) { | 271 | if (cpm2_pic_host == NULL) { |
272 | printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); | 272 | printk(KERN_ERR "CPM2 PIC: failed to allocate irq host!\n"); |
diff --git a/arch/powerpc/sysdev/cpm_common.c b/arch/powerpc/sysdev/cpm_common.c index cb7df2dce44f..9b75d164bdf9 100644 --- a/arch/powerpc/sysdev/cpm_common.c +++ b/arch/powerpc/sysdev/cpm_common.c | |||
@@ -85,9 +85,13 @@ int __init cpm_muram_init(void) | |||
85 | 85 | ||
86 | np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); | 86 | np = of_find_compatible_node(NULL, NULL, "fsl,cpm-muram-data"); |
87 | if (!np) { | 87 | if (!np) { |
88 | printk(KERN_ERR "Cannot find CPM muram data node"); | 88 | /* try legacy bindings */ |
89 | ret = -ENODEV; | 89 | np = of_find_node_by_name(NULL, "data-only"); |
90 | goto out; | 90 | if (!np) { |
91 | printk(KERN_ERR "Cannot find CPM muram data node"); | ||
92 | ret = -ENODEV; | ||
93 | goto out; | ||
94 | } | ||
91 | } | 95 | } |
92 | 96 | ||
93 | muram_pbase = of_translate_address(np, zero); | 97 | muram_pbase = of_translate_address(np, zero); |
@@ -189,6 +193,12 @@ void __iomem *cpm_muram_addr(unsigned long offset) | |||
189 | } | 193 | } |
190 | EXPORT_SYMBOL(cpm_muram_addr); | 194 | EXPORT_SYMBOL(cpm_muram_addr); |
191 | 195 | ||
196 | unsigned long cpm_muram_offset(void __iomem *addr) | ||
197 | { | ||
198 | return addr - (void __iomem *)muram_vbase; | ||
199 | } | ||
200 | EXPORT_SYMBOL(cpm_muram_offset); | ||
201 | |||
192 | /** | 202 | /** |
193 | * cpm_muram_dma - turn a muram virtual address into a DMA address | 203 | * cpm_muram_dma - turn a muram virtual address into a DMA address |
194 | * @offset: virtual address from cpm_muram_addr() to convert | 204 | * @offset: virtual address from cpm_muram_addr() to convert |
diff --git a/arch/powerpc/sysdev/dcr.c b/arch/powerpc/sysdev/dcr.c index 437e48d3ae33..a8ba9983dd5a 100644 --- a/arch/powerpc/sysdev/dcr.c +++ b/arch/powerpc/sysdev/dcr.c | |||
@@ -23,6 +23,107 @@ | |||
23 | #include <asm/prom.h> | 23 | #include <asm/prom.h> |
24 | #include <asm/dcr.h> | 24 | #include <asm/dcr.h> |
25 | 25 | ||
26 | #ifdef CONFIG_PPC_DCR_MMIO | ||
27 | static struct device_node *find_dcr_parent(struct device_node *node) | ||
28 | { | ||
29 | struct device_node *par, *tmp; | ||
30 | const u32 *p; | ||
31 | |||
32 | for (par = of_node_get(node); par;) { | ||
33 | if (of_get_property(par, "dcr-controller", NULL)) | ||
34 | break; | ||
35 | p = of_get_property(par, "dcr-parent", NULL); | ||
36 | tmp = par; | ||
37 | if (p == NULL) | ||
38 | par = of_get_parent(par); | ||
39 | else | ||
40 | par = of_find_node_by_phandle(*p); | ||
41 | of_node_put(tmp); | ||
42 | } | ||
43 | return par; | ||
44 | } | ||
45 | #endif | ||
46 | |||
47 | #if defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) | ||
48 | |||
49 | bool dcr_map_ok_generic(dcr_host_t host) | ||
50 | { | ||
51 | if (host.type == DCR_HOST_NATIVE) | ||
52 | return dcr_map_ok_native(host.host.native); | ||
53 | else if (host.type == DCR_HOST_MMIO) | ||
54 | return dcr_map_ok_mmio(host.host.mmio); | ||
55 | else | ||
56 | return 0; | ||
57 | } | ||
58 | EXPORT_SYMBOL_GPL(dcr_map_ok_generic); | ||
59 | |||
60 | dcr_host_t dcr_map_generic(struct device_node *dev, | ||
61 | unsigned int dcr_n, | ||
62 | unsigned int dcr_c) | ||
63 | { | ||
64 | dcr_host_t host; | ||
65 | struct device_node *dp; | ||
66 | const char *prop; | ||
67 | |||
68 | host.type = DCR_HOST_INVALID; | ||
69 | |||
70 | dp = find_dcr_parent(dev); | ||
71 | if (dp == NULL) | ||
72 | return host; | ||
73 | |||
74 | prop = of_get_property(dp, "dcr-access-method", NULL); | ||
75 | |||
76 | pr_debug("dcr_map_generic(dcr-access-method = %s)\n", prop); | ||
77 | |||
78 | if (!strcmp(prop, "native")) { | ||
79 | host.type = DCR_HOST_NATIVE; | ||
80 | host.host.native = dcr_map_native(dev, dcr_n, dcr_c); | ||
81 | } else if (!strcmp(prop, "mmio")) { | ||
82 | host.type = DCR_HOST_MMIO; | ||
83 | host.host.mmio = dcr_map_mmio(dev, dcr_n, dcr_c); | ||
84 | } | ||
85 | |||
86 | of_node_put(dp); | ||
87 | return host; | ||
88 | } | ||
89 | EXPORT_SYMBOL_GPL(dcr_map_generic); | ||
90 | |||
91 | void dcr_unmap_generic(dcr_host_t host, unsigned int dcr_c) | ||
92 | { | ||
93 | if (host.type == DCR_HOST_NATIVE) | ||
94 | dcr_unmap_native(host.host.native, dcr_c); | ||
95 | else if (host.type == DCR_HOST_MMIO) | ||
96 | dcr_unmap_mmio(host.host.mmio, dcr_c); | ||
97 | else /* host.type == DCR_HOST_INVALID */ | ||
98 | WARN_ON(true); | ||
99 | } | ||
100 | EXPORT_SYMBOL_GPL(dcr_unmap_generic); | ||
101 | |||
102 | u32 dcr_read_generic(dcr_host_t host, unsigned int dcr_n) | ||
103 | { | ||
104 | if (host.type == DCR_HOST_NATIVE) | ||
105 | return dcr_read_native(host.host.native, dcr_n); | ||
106 | else if (host.type == DCR_HOST_MMIO) | ||
107 | return dcr_read_mmio(host.host.mmio, dcr_n); | ||
108 | else /* host.type == DCR_HOST_INVALID */ | ||
109 | WARN_ON(true); | ||
110 | return 0; | ||
111 | } | ||
112 | EXPORT_SYMBOL_GPL(dcr_read_generic); | ||
113 | |||
114 | void dcr_write_generic(dcr_host_t host, unsigned int dcr_n, u32 value) | ||
115 | { | ||
116 | if (host.type == DCR_HOST_NATIVE) | ||
117 | dcr_write_native(host.host.native, dcr_n, value); | ||
118 | else if (host.type == DCR_HOST_MMIO) | ||
119 | dcr_write_mmio(host.host.mmio, dcr_n, value); | ||
120 | else /* host.type == DCR_HOST_INVALID */ | ||
121 | WARN_ON(true); | ||
122 | } | ||
123 | EXPORT_SYMBOL_GPL(dcr_write_generic); | ||
124 | |||
125 | #endif /* defined(CONFIG_PPC_DCR_NATIVE) && defined(CONFIG_PPC_DCR_MMIO) */ | ||
126 | |||
26 | unsigned int dcr_resource_start(struct device_node *np, unsigned int index) | 127 | unsigned int dcr_resource_start(struct device_node *np, unsigned int index) |
27 | { | 128 | { |
28 | unsigned int ds; | 129 | unsigned int ds; |
@@ -47,26 +148,7 @@ unsigned int dcr_resource_len(struct device_node *np, unsigned int index) | |||
47 | } | 148 | } |
48 | EXPORT_SYMBOL_GPL(dcr_resource_len); | 149 | EXPORT_SYMBOL_GPL(dcr_resource_len); |
49 | 150 | ||
50 | #ifndef CONFIG_PPC_DCR_NATIVE | 151 | #ifdef CONFIG_PPC_DCR_MMIO |
51 | |||
52 | static struct device_node * find_dcr_parent(struct device_node * node) | ||
53 | { | ||
54 | struct device_node *par, *tmp; | ||
55 | const u32 *p; | ||
56 | |||
57 | for (par = of_node_get(node); par;) { | ||
58 | if (of_get_property(par, "dcr-controller", NULL)) | ||
59 | break; | ||
60 | p = of_get_property(par, "dcr-parent", NULL); | ||
61 | tmp = par; | ||
62 | if (p == NULL) | ||
63 | par = of_get_parent(par); | ||
64 | else | ||
65 | par = of_find_node_by_phandle(*p); | ||
66 | of_node_put(tmp); | ||
67 | } | ||
68 | return par; | ||
69 | } | ||
70 | 152 | ||
71 | u64 of_translate_dcr_address(struct device_node *dev, | 153 | u64 of_translate_dcr_address(struct device_node *dev, |
72 | unsigned int dcr_n, | 154 | unsigned int dcr_n, |
@@ -75,7 +157,7 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
75 | struct device_node *dp; | 157 | struct device_node *dp; |
76 | const u32 *p; | 158 | const u32 *p; |
77 | unsigned int stride; | 159 | unsigned int stride; |
78 | u64 ret; | 160 | u64 ret = OF_BAD_ADDR; |
79 | 161 | ||
80 | dp = find_dcr_parent(dev); | 162 | dp = find_dcr_parent(dev); |
81 | if (dp == NULL) | 163 | if (dp == NULL) |
@@ -90,7 +172,7 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
90 | if (p == NULL) | 172 | if (p == NULL) |
91 | p = of_get_property(dp, "dcr-mmio-space", NULL); | 173 | p = of_get_property(dp, "dcr-mmio-space", NULL); |
92 | if (p == NULL) | 174 | if (p == NULL) |
93 | return OF_BAD_ADDR; | 175 | goto done; |
94 | 176 | ||
95 | /* Maybe could do some better range checking here */ | 177 | /* Maybe could do some better range checking here */ |
96 | ret = of_translate_address(dp, p); | 178 | ret = of_translate_address(dp, p); |
@@ -98,21 +180,25 @@ u64 of_translate_dcr_address(struct device_node *dev, | |||
98 | ret += (u64)(stride) * (u64)dcr_n; | 180 | ret += (u64)(stride) * (u64)dcr_n; |
99 | if (out_stride) | 181 | if (out_stride) |
100 | *out_stride = stride; | 182 | *out_stride = stride; |
183 | |||
184 | done: | ||
185 | of_node_put(dp); | ||
101 | return ret; | 186 | return ret; |
102 | } | 187 | } |
103 | 188 | ||
104 | dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, | 189 | dcr_host_mmio_t dcr_map_mmio(struct device_node *dev, |
105 | unsigned int dcr_c) | 190 | unsigned int dcr_n, |
191 | unsigned int dcr_c) | ||
106 | { | 192 | { |
107 | dcr_host_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; | 193 | dcr_host_mmio_t ret = { .token = NULL, .stride = 0, .base = dcr_n }; |
108 | u64 addr; | 194 | u64 addr; |
109 | 195 | ||
110 | pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", | 196 | pr_debug("dcr_map(%s, 0x%x, 0x%x)\n", |
111 | dev->full_name, dcr_n, dcr_c); | 197 | dev->full_name, dcr_n, dcr_c); |
112 | 198 | ||
113 | addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); | 199 | addr = of_translate_dcr_address(dev, dcr_n, &ret.stride); |
114 | pr_debug("translates to addr: 0x%lx, stride: 0x%x\n", | 200 | pr_debug("translates to addr: 0x%llx, stride: 0x%x\n", |
115 | addr, ret.stride); | 201 | (unsigned long long) addr, ret.stride); |
116 | if (addr == OF_BAD_ADDR) | 202 | if (addr == OF_BAD_ADDR) |
117 | return ret; | 203 | return ret; |
118 | pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); | 204 | pr_debug("mapping 0x%x bytes\n", dcr_c * ret.stride); |
@@ -124,11 +210,11 @@ dcr_host_t dcr_map(struct device_node *dev, unsigned int dcr_n, | |||
124 | ret.token -= dcr_n * ret.stride; | 210 | ret.token -= dcr_n * ret.stride; |
125 | return ret; | 211 | return ret; |
126 | } | 212 | } |
127 | EXPORT_SYMBOL_GPL(dcr_map); | 213 | EXPORT_SYMBOL_GPL(dcr_map_mmio); |
128 | 214 | ||
129 | void dcr_unmap(dcr_host_t host, unsigned int dcr_c) | 215 | void dcr_unmap_mmio(dcr_host_mmio_t host, unsigned int dcr_c) |
130 | { | 216 | { |
131 | dcr_host_t h = host; | 217 | dcr_host_mmio_t h = host; |
132 | 218 | ||
133 | if (h.token == NULL) | 219 | if (h.token == NULL) |
134 | return; | 220 | return; |
@@ -136,7 +222,11 @@ void dcr_unmap(dcr_host_t host, unsigned int dcr_c) | |||
136 | iounmap(h.token); | 222 | iounmap(h.token); |
137 | h.token = NULL; | 223 | h.token = NULL; |
138 | } | 224 | } |
139 | EXPORT_SYMBOL_GPL(dcr_unmap); | 225 | EXPORT_SYMBOL_GPL(dcr_unmap_mmio); |
140 | #else /* defined(CONFIG_PPC_DCR_NATIVE) */ | 226 | |
227 | #endif /* defined(CONFIG_PPC_DCR_MMIO) */ | ||
228 | |||
229 | #ifdef CONFIG_PPC_DCR_NATIVE | ||
141 | DEFINE_SPINLOCK(dcr_ind_lock); | 230 | DEFINE_SPINLOCK(dcr_ind_lock); |
142 | #endif /* !defined(CONFIG_PPC_DCR_NATIVE) */ | 231 | #endif /* defined(CONFIG_PPC_DCR_NATIVE) */ |
232 | |||
diff --git a/arch/powerpc/sysdev/fsl_gtm.c b/arch/powerpc/sysdev/fsl_gtm.c new file mode 100644 index 000000000000..714ec02fed2e --- /dev/null +++ b/arch/powerpc/sysdev/fsl_gtm.c | |||
@@ -0,0 +1,434 @@ | |||
1 | /* | ||
2 | * Freescale General-purpose Timers Module | ||
3 | * | ||
4 | * Copyright (c) Freescale Semicondutor, Inc. 2006. | ||
5 | * Shlomi Gridish <gridish@freescale.com> | ||
6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | ||
7 | * Copyright (c) MontaVista Software, Inc. 2008. | ||
8 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/list.h> | ||
19 | #include <linux/io.h> | ||
20 | #include <linux/of.h> | ||
21 | #include <linux/spinlock.h> | ||
22 | #include <linux/bitops.h> | ||
23 | #include <asm/fsl_gtm.h> | ||
24 | |||
25 | #define GTCFR_STP(x) ((x) & 1 ? 1 << 5 : 1 << 1) | ||
26 | #define GTCFR_RST(x) ((x) & 1 ? 1 << 4 : 1 << 0) | ||
27 | |||
28 | #define GTMDR_ICLK_MASK (3 << 1) | ||
29 | #define GTMDR_ICLK_ICAS (0 << 1) | ||
30 | #define GTMDR_ICLK_ICLK (1 << 1) | ||
31 | #define GTMDR_ICLK_SLGO (2 << 1) | ||
32 | #define GTMDR_FRR (1 << 3) | ||
33 | #define GTMDR_ORI (1 << 4) | ||
34 | #define GTMDR_SPS(x) ((x) << 8) | ||
35 | |||
36 | struct gtm_timers_regs { | ||
37 | u8 gtcfr1; /* Timer 1, Timer 2 global config register */ | ||
38 | u8 res0[0x3]; | ||
39 | u8 gtcfr2; /* Timer 3, timer 4 global config register */ | ||
40 | u8 res1[0xB]; | ||
41 | __be16 gtmdr1; /* Timer 1 mode register */ | ||
42 | __be16 gtmdr2; /* Timer 2 mode register */ | ||
43 | __be16 gtrfr1; /* Timer 1 reference register */ | ||
44 | __be16 gtrfr2; /* Timer 2 reference register */ | ||
45 | __be16 gtcpr1; /* Timer 1 capture register */ | ||
46 | __be16 gtcpr2; /* Timer 2 capture register */ | ||
47 | __be16 gtcnr1; /* Timer 1 counter */ | ||
48 | __be16 gtcnr2; /* Timer 2 counter */ | ||
49 | __be16 gtmdr3; /* Timer 3 mode register */ | ||
50 | __be16 gtmdr4; /* Timer 4 mode register */ | ||
51 | __be16 gtrfr3; /* Timer 3 reference register */ | ||
52 | __be16 gtrfr4; /* Timer 4 reference register */ | ||
53 | __be16 gtcpr3; /* Timer 3 capture register */ | ||
54 | __be16 gtcpr4; /* Timer 4 capture register */ | ||
55 | __be16 gtcnr3; /* Timer 3 counter */ | ||
56 | __be16 gtcnr4; /* Timer 4 counter */ | ||
57 | __be16 gtevr1; /* Timer 1 event register */ | ||
58 | __be16 gtevr2; /* Timer 2 event register */ | ||
59 | __be16 gtevr3; /* Timer 3 event register */ | ||
60 | __be16 gtevr4; /* Timer 4 event register */ | ||
61 | __be16 gtpsr1; /* Timer 1 prescale register */ | ||
62 | __be16 gtpsr2; /* Timer 2 prescale register */ | ||
63 | __be16 gtpsr3; /* Timer 3 prescale register */ | ||
64 | __be16 gtpsr4; /* Timer 4 prescale register */ | ||
65 | u8 res2[0x40]; | ||
66 | } __attribute__ ((packed)); | ||
67 | |||
68 | struct gtm { | ||
69 | unsigned int clock; | ||
70 | struct gtm_timers_regs __iomem *regs; | ||
71 | struct gtm_timer timers[4]; | ||
72 | spinlock_t lock; | ||
73 | struct list_head list_node; | ||
74 | }; | ||
75 | |||
76 | static LIST_HEAD(gtms); | ||
77 | |||
78 | /** | ||
79 | * gtm_get_timer - request GTM timer to use it with the rest of GTM API | ||
80 | * Context: non-IRQ | ||
81 | * | ||
82 | * This function reserves GTM timer for later use. It returns gtm_timer | ||
83 | * structure to use with the rest of GTM API, you should use timer->irq | ||
84 | * to manage timer interrupt. | ||
85 | */ | ||
86 | struct gtm_timer *gtm_get_timer16(void) | ||
87 | { | ||
88 | struct gtm *gtm = NULL; | ||
89 | int i; | ||
90 | |||
91 | list_for_each_entry(gtm, >ms, list_node) { | ||
92 | spin_lock_irq(>m->lock); | ||
93 | |||
94 | for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { | ||
95 | if (!gtm->timers[i].requested) { | ||
96 | gtm->timers[i].requested = true; | ||
97 | spin_unlock_irq(>m->lock); | ||
98 | return >m->timers[i]; | ||
99 | } | ||
100 | } | ||
101 | |||
102 | spin_unlock_irq(>m->lock); | ||
103 | } | ||
104 | |||
105 | if (gtm) | ||
106 | return ERR_PTR(-EBUSY); | ||
107 | return ERR_PTR(-ENODEV); | ||
108 | } | ||
109 | EXPORT_SYMBOL(gtm_get_timer16); | ||
110 | |||
111 | /** | ||
112 | * gtm_get_specific_timer - request specific GTM timer | ||
113 | * @gtm: specific GTM, pass here GTM's device_node->data | ||
114 | * @timer: specific timer number, Timer1 is 0. | ||
115 | * Context: non-IRQ | ||
116 | * | ||
117 | * This function reserves GTM timer for later use. It returns gtm_timer | ||
118 | * structure to use with the rest of GTM API, you should use timer->irq | ||
119 | * to manage timer interrupt. | ||
120 | */ | ||
121 | struct gtm_timer *gtm_get_specific_timer16(struct gtm *gtm, | ||
122 | unsigned int timer) | ||
123 | { | ||
124 | struct gtm_timer *ret = ERR_PTR(-EBUSY); | ||
125 | |||
126 | if (timer > 3) | ||
127 | return ERR_PTR(-EINVAL); | ||
128 | |||
129 | spin_lock_irq(>m->lock); | ||
130 | |||
131 | if (gtm->timers[timer].requested) | ||
132 | goto out; | ||
133 | |||
134 | ret = >m->timers[timer]; | ||
135 | ret->requested = true; | ||
136 | |||
137 | out: | ||
138 | spin_unlock_irq(>m->lock); | ||
139 | return ret; | ||
140 | } | ||
141 | EXPORT_SYMBOL(gtm_get_specific_timer16); | ||
142 | |||
143 | /** | ||
144 | * gtm_put_timer16 - release 16 bits GTM timer | ||
145 | * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer | ||
146 | * Context: any | ||
147 | * | ||
148 | * This function releases GTM timer so others may request it. | ||
149 | */ | ||
150 | void gtm_put_timer16(struct gtm_timer *tmr) | ||
151 | { | ||
152 | gtm_stop_timer16(tmr); | ||
153 | |||
154 | spin_lock_irq(&tmr->gtm->lock); | ||
155 | tmr->requested = false; | ||
156 | spin_unlock_irq(&tmr->gtm->lock); | ||
157 | } | ||
158 | EXPORT_SYMBOL(gtm_put_timer16); | ||
159 | |||
160 | /* | ||
161 | * This is back-end for the exported functions, it's used to reset single | ||
162 | * timer in reference mode. | ||
163 | */ | ||
164 | static int gtm_set_ref_timer16(struct gtm_timer *tmr, int frequency, | ||
165 | int reference_value, bool free_run) | ||
166 | { | ||
167 | struct gtm *gtm = tmr->gtm; | ||
168 | int num = tmr - >m->timers[0]; | ||
169 | unsigned int prescaler; | ||
170 | u8 iclk = GTMDR_ICLK_ICLK; | ||
171 | u8 psr; | ||
172 | u8 sps; | ||
173 | unsigned long flags; | ||
174 | int max_prescaler = 256 * 256 * 16; | ||
175 | |||
176 | /* CPM2 doesn't have primary prescaler */ | ||
177 | if (!tmr->gtpsr) | ||
178 | max_prescaler /= 256; | ||
179 | |||
180 | prescaler = gtm->clock / frequency; | ||
181 | /* | ||
182 | * We have two 8 bit prescalers -- primary and secondary (psr, sps), | ||
183 | * plus "slow go" mode (clk / 16). So, total prescale value is | ||
184 | * 16 * (psr + 1) * (sps + 1). Though, for CPM2 GTMs we losing psr. | ||
185 | */ | ||
186 | if (prescaler > max_prescaler) | ||
187 | return -EINVAL; | ||
188 | |||
189 | if (prescaler > max_prescaler / 16) { | ||
190 | iclk = GTMDR_ICLK_SLGO; | ||
191 | prescaler /= 16; | ||
192 | } | ||
193 | |||
194 | if (prescaler <= 256) { | ||
195 | psr = 0; | ||
196 | sps = prescaler - 1; | ||
197 | } else { | ||
198 | psr = 256 - 1; | ||
199 | sps = prescaler / 256 - 1; | ||
200 | } | ||
201 | |||
202 | spin_lock_irqsave(>m->lock, flags); | ||
203 | |||
204 | /* | ||
205 | * Properly reset timers: stop, reset, set up prescalers, reference | ||
206 | * value and clear event register. | ||
207 | */ | ||
208 | clrsetbits_8(tmr->gtcfr, ~(GTCFR_STP(num) | GTCFR_RST(num)), | ||
209 | GTCFR_STP(num) | GTCFR_RST(num)); | ||
210 | |||
211 | setbits8(tmr->gtcfr, GTCFR_STP(num)); | ||
212 | |||
213 | if (tmr->gtpsr) | ||
214 | out_be16(tmr->gtpsr, psr); | ||
215 | clrsetbits_be16(tmr->gtmdr, 0xFFFF, iclk | GTMDR_SPS(sps) | | ||
216 | GTMDR_ORI | (free_run ? GTMDR_FRR : 0)); | ||
217 | out_be16(tmr->gtcnr, 0); | ||
218 | out_be16(tmr->gtrfr, reference_value); | ||
219 | out_be16(tmr->gtevr, 0xFFFF); | ||
220 | |||
221 | /* Let it be. */ | ||
222 | clrbits8(tmr->gtcfr, GTCFR_STP(num)); | ||
223 | |||
224 | spin_unlock_irqrestore(>m->lock, flags); | ||
225 | |||
226 | return 0; | ||
227 | } | ||
228 | |||
229 | /** | ||
230 | * gtm_set_timer16 - (re)set 16 bit timer with arbitrary precision | ||
231 | * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer | ||
232 | * @usec: timer interval in microseconds | ||
233 | * @reload: if set, the timer will reset upon expiry rather than | ||
234 | * continue running free. | ||
235 | * Context: any | ||
236 | * | ||
237 | * This function (re)sets the GTM timer so that it counts up to the requested | ||
238 | * interval value, and fires the interrupt when the value is reached. This | ||
239 | * function will reduce the precision of the timer as needed in order for the | ||
240 | * requested timeout to fit in a 16-bit register. | ||
241 | */ | ||
242 | int gtm_set_timer16(struct gtm_timer *tmr, unsigned long usec, bool reload) | ||
243 | { | ||
244 | /* quite obvious, frequency which is enough for µSec precision */ | ||
245 | int freq = 1000000; | ||
246 | unsigned int bit; | ||
247 | |||
248 | bit = fls_long(usec); | ||
249 | if (bit > 15) { | ||
250 | freq >>= bit - 15; | ||
251 | usec >>= bit - 15; | ||
252 | } | ||
253 | |||
254 | if (!freq) | ||
255 | return -EINVAL; | ||
256 | |||
257 | return gtm_set_ref_timer16(tmr, freq, usec, reload); | ||
258 | } | ||
259 | EXPORT_SYMBOL(gtm_set_timer16); | ||
260 | |||
261 | /** | ||
262 | * gtm_set_exact_utimer16 - (re)set 16 bits timer | ||
263 | * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer | ||
264 | * @usec: timer interval in microseconds | ||
265 | * @reload: if set, the timer will reset upon expiry rather than | ||
266 | * continue running free. | ||
267 | * Context: any | ||
268 | * | ||
269 | * This function (re)sets GTM timer so that it counts up to the requested | ||
270 | * interval value, and fires the interrupt when the value is reached. If reload | ||
271 | * flag was set, timer will also reset itself upon reference value, otherwise | ||
272 | * it continues to increment. | ||
273 | * | ||
274 | * The _exact_ bit in the function name states that this function will not | ||
275 | * crop precision of the "usec" argument, thus usec is limited to 16 bits | ||
276 | * (single timer width). | ||
277 | */ | ||
278 | int gtm_set_exact_timer16(struct gtm_timer *tmr, u16 usec, bool reload) | ||
279 | { | ||
280 | /* quite obvious, frequency which is enough for µSec precision */ | ||
281 | const int freq = 1000000; | ||
282 | |||
283 | /* | ||
284 | * We can lower the frequency (and probably power consumption) by | ||
285 | * dividing both frequency and usec by 2 until there is no remainder. | ||
286 | * But we won't bother with this unless savings are measured, so just | ||
287 | * run the timer as is. | ||
288 | */ | ||
289 | |||
290 | return gtm_set_ref_timer16(tmr, freq, usec, reload); | ||
291 | } | ||
292 | EXPORT_SYMBOL(gtm_set_exact_timer16); | ||
293 | |||
294 | /** | ||
295 | * gtm_stop_timer16 - stop single timer | ||
296 | * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer | ||
297 | * Context: any | ||
298 | * | ||
299 | * This function simply stops the GTM timer. | ||
300 | */ | ||
301 | void gtm_stop_timer16(struct gtm_timer *tmr) | ||
302 | { | ||
303 | struct gtm *gtm = tmr->gtm; | ||
304 | int num = tmr - >m->timers[0]; | ||
305 | unsigned long flags; | ||
306 | |||
307 | spin_lock_irqsave(>m->lock, flags); | ||
308 | |||
309 | setbits8(tmr->gtcfr, GTCFR_STP(num)); | ||
310 | out_be16(tmr->gtevr, 0xFFFF); | ||
311 | |||
312 | spin_unlock_irqrestore(>m->lock, flags); | ||
313 | } | ||
314 | EXPORT_SYMBOL(gtm_stop_timer16); | ||
315 | |||
316 | /** | ||
317 | * gtm_ack_timer16 - acknowledge timer event (free-run timers only) | ||
318 | * @tmr: pointer to the gtm_timer structure obtained from gtm_get_timer | ||
319 | * @events: events mask to ack | ||
320 | * Context: any | ||
321 | * | ||
322 | * Thus function used to acknowledge timer interrupt event, use it inside the | ||
323 | * interrupt handler. | ||
324 | */ | ||
325 | void gtm_ack_timer16(struct gtm_timer *tmr, u16 events) | ||
326 | { | ||
327 | out_be16(tmr->gtevr, events); | ||
328 | } | ||
329 | EXPORT_SYMBOL(gtm_ack_timer16); | ||
330 | |||
331 | static void __init gtm_set_shortcuts(struct device_node *np, | ||
332 | struct gtm_timer *timers, | ||
333 | struct gtm_timers_regs __iomem *regs) | ||
334 | { | ||
335 | /* | ||
336 | * Yeah, I don't like this either, but timers' registers a bit messed, | ||
337 | * so we have to provide shortcuts to write timer independent code. | ||
338 | * Alternative option is to create gt*() accessors, but that will be | ||
339 | * even uglier and cryptic. | ||
340 | */ | ||
341 | timers[0].gtcfr = ®s->gtcfr1; | ||
342 | timers[0].gtmdr = ®s->gtmdr1; | ||
343 | timers[0].gtcnr = ®s->gtcnr1; | ||
344 | timers[0].gtrfr = ®s->gtrfr1; | ||
345 | timers[0].gtevr = ®s->gtevr1; | ||
346 | |||
347 | timers[1].gtcfr = ®s->gtcfr1; | ||
348 | timers[1].gtmdr = ®s->gtmdr2; | ||
349 | timers[1].gtcnr = ®s->gtcnr2; | ||
350 | timers[1].gtrfr = ®s->gtrfr2; | ||
351 | timers[1].gtevr = ®s->gtevr2; | ||
352 | |||
353 | timers[2].gtcfr = ®s->gtcfr2; | ||
354 | timers[2].gtmdr = ®s->gtmdr3; | ||
355 | timers[2].gtcnr = ®s->gtcnr3; | ||
356 | timers[2].gtrfr = ®s->gtrfr3; | ||
357 | timers[2].gtevr = ®s->gtevr3; | ||
358 | |||
359 | timers[3].gtcfr = ®s->gtcfr2; | ||
360 | timers[3].gtmdr = ®s->gtmdr4; | ||
361 | timers[3].gtcnr = ®s->gtcnr4; | ||
362 | timers[3].gtrfr = ®s->gtrfr4; | ||
363 | timers[3].gtevr = ®s->gtevr4; | ||
364 | |||
365 | /* CPM2 doesn't have primary prescaler */ | ||
366 | if (!of_device_is_compatible(np, "fsl,cpm2-gtm")) { | ||
367 | timers[0].gtpsr = ®s->gtpsr1; | ||
368 | timers[1].gtpsr = ®s->gtpsr2; | ||
369 | timers[2].gtpsr = ®s->gtpsr3; | ||
370 | timers[3].gtpsr = ®s->gtpsr4; | ||
371 | } | ||
372 | } | ||
373 | |||
374 | static int __init fsl_gtm_init(void) | ||
375 | { | ||
376 | struct device_node *np; | ||
377 | |||
378 | for_each_compatible_node(np, NULL, "fsl,gtm") { | ||
379 | int i; | ||
380 | struct gtm *gtm; | ||
381 | const u32 *clock; | ||
382 | int size; | ||
383 | |||
384 | gtm = kzalloc(sizeof(*gtm), GFP_KERNEL); | ||
385 | if (!gtm) { | ||
386 | pr_err("%s: unable to allocate memory\n", | ||
387 | np->full_name); | ||
388 | continue; | ||
389 | } | ||
390 | |||
391 | spin_lock_init(>m->lock); | ||
392 | |||
393 | clock = of_get_property(np, "clock-frequency", &size); | ||
394 | if (!clock || size != sizeof(*clock)) { | ||
395 | pr_err("%s: no clock-frequency\n", np->full_name); | ||
396 | goto err; | ||
397 | } | ||
398 | gtm->clock = *clock; | ||
399 | |||
400 | for (i = 0; i < ARRAY_SIZE(gtm->timers); i++) { | ||
401 | int ret; | ||
402 | struct resource irq; | ||
403 | |||
404 | ret = of_irq_to_resource(np, i, &irq); | ||
405 | if (ret == NO_IRQ) { | ||
406 | pr_err("%s: not enough interrupts specified\n", | ||
407 | np->full_name); | ||
408 | goto err; | ||
409 | } | ||
410 | gtm->timers[i].irq = irq.start; | ||
411 | gtm->timers[i].gtm = gtm; | ||
412 | } | ||
413 | |||
414 | gtm->regs = of_iomap(np, 0); | ||
415 | if (!gtm->regs) { | ||
416 | pr_err("%s: unable to iomap registers\n", | ||
417 | np->full_name); | ||
418 | goto err; | ||
419 | } | ||
420 | |||
421 | gtm_set_shortcuts(np, gtm->timers, gtm->regs); | ||
422 | list_add(>m->list_node, >ms); | ||
423 | |||
424 | /* We don't want to lose the node and its ->data */ | ||
425 | np->data = gtm; | ||
426 | of_node_get(np); | ||
427 | |||
428 | continue; | ||
429 | err: | ||
430 | kfree(gtm); | ||
431 | } | ||
432 | return 0; | ||
433 | } | ||
434 | arch_initcall(fsl_gtm_init); | ||
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c new file mode 100644 index 000000000000..2c5187cc8a24 --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.c | |||
@@ -0,0 +1,429 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Tony Li <tony.li@freescale.com> | ||
5 | * Jason Jin <Jason.jin@freescale.com> | ||
6 | * | ||
7 | * The hwirq alloc and free code reuse from sysdev/mpic_msi.c | ||
8 | * | ||
9 | * This program is free software; you can redistribute it and/or | ||
10 | * modify it under the terms of the GNU General Public License | ||
11 | * as published by the Free Software Foundation; version 2 of the | ||
12 | * License. | ||
13 | * | ||
14 | */ | ||
15 | #include <linux/irq.h> | ||
16 | #include <linux/bootmem.h> | ||
17 | #include <linux/bitmap.h> | ||
18 | #include <linux/msi.h> | ||
19 | #include <linux/pci.h> | ||
20 | #include <linux/of_platform.h> | ||
21 | #include <sysdev/fsl_soc.h> | ||
22 | #include <asm/prom.h> | ||
23 | #include <asm/hw_irq.h> | ||
24 | #include <asm/ppc-pci.h> | ||
25 | #include "fsl_msi.h" | ||
26 | |||
27 | struct fsl_msi_feature { | ||
28 | u32 fsl_pic_ip; | ||
29 | u32 msiir_offset; | ||
30 | }; | ||
31 | |||
32 | static struct fsl_msi *fsl_msi; | ||
33 | |||
34 | static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg) | ||
35 | { | ||
36 | return in_be32(base + (reg >> 2)); | ||
37 | } | ||
38 | |||
39 | /* | ||
40 | * We do not need this actually. The MSIR register has been read once | ||
41 | * in the cascade interrupt. So, this MSI interrupt has been acked | ||
42 | */ | ||
43 | static void fsl_msi_end_irq(unsigned int virq) | ||
44 | { | ||
45 | } | ||
46 | |||
47 | static struct irq_chip fsl_msi_chip = { | ||
48 | .mask = mask_msi_irq, | ||
49 | .unmask = unmask_msi_irq, | ||
50 | .ack = fsl_msi_end_irq, | ||
51 | .typename = " FSL-MSI ", | ||
52 | }; | ||
53 | |||
54 | static int fsl_msi_host_map(struct irq_host *h, unsigned int virq, | ||
55 | irq_hw_number_t hw) | ||
56 | { | ||
57 | struct irq_chip *chip = &fsl_msi_chip; | ||
58 | |||
59 | get_irq_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING; | ||
60 | |||
61 | set_irq_chip_and_handler(virq, chip, handle_edge_irq); | ||
62 | |||
63 | return 0; | ||
64 | } | ||
65 | |||
66 | static struct irq_host_ops fsl_msi_host_ops = { | ||
67 | .map = fsl_msi_host_map, | ||
68 | }; | ||
69 | |||
70 | static irq_hw_number_t fsl_msi_alloc_hwirqs(struct fsl_msi *msi, int num) | ||
71 | { | ||
72 | unsigned long flags; | ||
73 | int order = get_count_order(num); | ||
74 | int offset; | ||
75 | |||
76 | spin_lock_irqsave(&msi->bitmap_lock, flags); | ||
77 | |||
78 | offset = bitmap_find_free_region(msi->fsl_msi_bitmap, | ||
79 | NR_MSI_IRQS, order); | ||
80 | |||
81 | spin_unlock_irqrestore(&msi->bitmap_lock, flags); | ||
82 | |||
83 | pr_debug("%s: allocated 0x%x (2^%d) at offset 0x%x\n", | ||
84 | __func__, num, order, offset); | ||
85 | |||
86 | return offset; | ||
87 | } | ||
88 | |||
89 | static void fsl_msi_free_hwirqs(struct fsl_msi *msi, int offset, int num) | ||
90 | { | ||
91 | unsigned long flags; | ||
92 | int order = get_count_order(num); | ||
93 | |||
94 | pr_debug("%s: freeing 0x%x (2^%d) at offset 0x%x\n", | ||
95 | __func__, num, order, offset); | ||
96 | |||
97 | spin_lock_irqsave(&msi->bitmap_lock, flags); | ||
98 | bitmap_release_region(msi->fsl_msi_bitmap, offset, order); | ||
99 | spin_unlock_irqrestore(&msi->bitmap_lock, flags); | ||
100 | } | ||
101 | |||
102 | static int fsl_msi_free_dt_hwirqs(struct fsl_msi *msi) | ||
103 | { | ||
104 | int i; | ||
105 | int len; | ||
106 | const u32 *p; | ||
107 | |||
108 | bitmap_allocate_region(msi->fsl_msi_bitmap, 0, | ||
109 | get_count_order(NR_MSI_IRQS)); | ||
110 | |||
111 | p = of_get_property(msi->of_node, "msi-available-ranges", &len); | ||
112 | |||
113 | if (!p) { | ||
114 | /* No msi-available-ranges property, | ||
115 | * All the 256 MSI interrupts can be used | ||
116 | */ | ||
117 | fsl_msi_free_hwirqs(msi, 0, 0x100); | ||
118 | return 0; | ||
119 | } | ||
120 | |||
121 | if ((len % (2 * sizeof(u32))) != 0) { | ||
122 | printk(KERN_WARNING "fsl_msi: Malformed msi-available-ranges " | ||
123 | "property on %s\n", msi->of_node->full_name); | ||
124 | return -EINVAL; | ||
125 | } | ||
126 | |||
127 | /* Format is: (<u32 start> <u32 count>)+ */ | ||
128 | len /= 2 * sizeof(u32); | ||
129 | for (i = 0; i < len; i++, p += 2) | ||
130 | fsl_msi_free_hwirqs(msi, *p, *(p + 1)); | ||
131 | |||
132 | return 0; | ||
133 | } | ||
134 | |||
135 | static int fsl_msi_init_allocator(struct fsl_msi *msi_data) | ||
136 | { | ||
137 | int rc; | ||
138 | int size = BITS_TO_LONGS(NR_MSI_IRQS) * sizeof(u32); | ||
139 | |||
140 | msi_data->fsl_msi_bitmap = kzalloc(size, GFP_KERNEL); | ||
141 | |||
142 | if (msi_data->fsl_msi_bitmap == NULL) { | ||
143 | pr_debug("%s: ENOMEM allocating allocator bitmap!\n", | ||
144 | __func__); | ||
145 | return -ENOMEM; | ||
146 | } | ||
147 | |||
148 | rc = fsl_msi_free_dt_hwirqs(msi_data); | ||
149 | if (rc) | ||
150 | goto out_free; | ||
151 | |||
152 | return 0; | ||
153 | out_free: | ||
154 | kfree(msi_data->fsl_msi_bitmap); | ||
155 | |||
156 | msi_data->fsl_msi_bitmap = NULL; | ||
157 | return rc; | ||
158 | |||
159 | } | ||
160 | |||
161 | static int fsl_msi_check_device(struct pci_dev *pdev, int nvec, int type) | ||
162 | { | ||
163 | if (type == PCI_CAP_ID_MSIX) | ||
164 | pr_debug("fslmsi: MSI-X untested, trying anyway.\n"); | ||
165 | |||
166 | return 0; | ||
167 | } | ||
168 | |||
169 | static void fsl_teardown_msi_irqs(struct pci_dev *pdev) | ||
170 | { | ||
171 | struct msi_desc *entry; | ||
172 | struct fsl_msi *msi_data = fsl_msi; | ||
173 | |||
174 | list_for_each_entry(entry, &pdev->msi_list, list) { | ||
175 | if (entry->irq == NO_IRQ) | ||
176 | continue; | ||
177 | set_irq_msi(entry->irq, NULL); | ||
178 | fsl_msi_free_hwirqs(msi_data, virq_to_hw(entry->irq), 1); | ||
179 | irq_dispose_mapping(entry->irq); | ||
180 | } | ||
181 | |||
182 | return; | ||
183 | } | ||
184 | |||
185 | static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq, | ||
186 | struct msi_msg *msg) | ||
187 | { | ||
188 | struct fsl_msi *msi_data = fsl_msi; | ||
189 | |||
190 | msg->address_lo = msi_data->msi_addr_lo; | ||
191 | msg->address_hi = msi_data->msi_addr_hi; | ||
192 | msg->data = hwirq; | ||
193 | |||
194 | pr_debug("%s: allocated srs: %d, ibs: %d\n", | ||
195 | __func__, hwirq / IRQS_PER_MSI_REG, hwirq % IRQS_PER_MSI_REG); | ||
196 | } | ||
197 | |||
198 | static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | ||
199 | { | ||
200 | irq_hw_number_t hwirq; | ||
201 | int rc; | ||
202 | unsigned int virq; | ||
203 | struct msi_desc *entry; | ||
204 | struct msi_msg msg; | ||
205 | struct fsl_msi *msi_data = fsl_msi; | ||
206 | |||
207 | list_for_each_entry(entry, &pdev->msi_list, list) { | ||
208 | hwirq = fsl_msi_alloc_hwirqs(msi_data, 1); | ||
209 | if (hwirq < 0) { | ||
210 | rc = hwirq; | ||
211 | pr_debug("%s: fail allocating msi interrupt\n", | ||
212 | __func__); | ||
213 | goto out_free; | ||
214 | } | ||
215 | |||
216 | virq = irq_create_mapping(msi_data->irqhost, hwirq); | ||
217 | |||
218 | if (virq == NO_IRQ) { | ||
219 | pr_debug("%s: fail mapping hwirq 0x%lx\n", | ||
220 | __func__, hwirq); | ||
221 | fsl_msi_free_hwirqs(msi_data, hwirq, 1); | ||
222 | rc = -ENOSPC; | ||
223 | goto out_free; | ||
224 | } | ||
225 | set_irq_msi(virq, entry); | ||
226 | |||
227 | fsl_compose_msi_msg(pdev, hwirq, &msg); | ||
228 | write_msi_msg(virq, &msg); | ||
229 | } | ||
230 | return 0; | ||
231 | |||
232 | out_free: | ||
233 | return rc; | ||
234 | } | ||
235 | |||
236 | static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc) | ||
237 | { | ||
238 | unsigned int cascade_irq; | ||
239 | struct fsl_msi *msi_data = fsl_msi; | ||
240 | int msir_index = -1; | ||
241 | u32 msir_value = 0; | ||
242 | u32 intr_index; | ||
243 | u32 have_shift = 0; | ||
244 | |||
245 | spin_lock(&desc->lock); | ||
246 | if ((msi_data->feature & FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) { | ||
247 | if (desc->chip->mask_ack) | ||
248 | desc->chip->mask_ack(irq); | ||
249 | else { | ||
250 | desc->chip->mask(irq); | ||
251 | desc->chip->ack(irq); | ||
252 | } | ||
253 | } | ||
254 | |||
255 | if (unlikely(desc->status & IRQ_INPROGRESS)) | ||
256 | goto unlock; | ||
257 | |||
258 | msir_index = (int)desc->handler_data; | ||
259 | |||
260 | if (msir_index >= NR_MSI_REG) | ||
261 | cascade_irq = NO_IRQ; | ||
262 | |||
263 | desc->status |= IRQ_INPROGRESS; | ||
264 | switch (fsl_msi->feature & FSL_PIC_IP_MASK) { | ||
265 | case FSL_PIC_IP_MPIC: | ||
266 | msir_value = fsl_msi_read(msi_data->msi_regs, | ||
267 | msir_index * 0x10); | ||
268 | break; | ||
269 | case FSL_PIC_IP_IPIC: | ||
270 | msir_value = fsl_msi_read(msi_data->msi_regs, msir_index * 0x4); | ||
271 | break; | ||
272 | } | ||
273 | |||
274 | while (msir_value) { | ||
275 | intr_index = ffs(msir_value) - 1; | ||
276 | |||
277 | cascade_irq = irq_linear_revmap(msi_data->irqhost, | ||
278 | msir_index * IRQS_PER_MSI_REG + | ||
279 | intr_index + have_shift); | ||
280 | if (cascade_irq != NO_IRQ) | ||
281 | generic_handle_irq(cascade_irq); | ||
282 | have_shift += intr_index + 1; | ||
283 | msir_value = msir_value >> (intr_index + 1); | ||
284 | } | ||
285 | desc->status &= ~IRQ_INPROGRESS; | ||
286 | |||
287 | switch (msi_data->feature & FSL_PIC_IP_MASK) { | ||
288 | case FSL_PIC_IP_MPIC: | ||
289 | desc->chip->eoi(irq); | ||
290 | break; | ||
291 | case FSL_PIC_IP_IPIC: | ||
292 | if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask) | ||
293 | desc->chip->unmask(irq); | ||
294 | break; | ||
295 | } | ||
296 | unlock: | ||
297 | spin_unlock(&desc->lock); | ||
298 | } | ||
299 | |||
300 | static int __devinit fsl_of_msi_probe(struct of_device *dev, | ||
301 | const struct of_device_id *match) | ||
302 | { | ||
303 | struct fsl_msi *msi; | ||
304 | struct resource res; | ||
305 | int err, i, count; | ||
306 | int rc; | ||
307 | int virt_msir; | ||
308 | const u32 *p; | ||
309 | struct fsl_msi_feature *features = match->data; | ||
310 | |||
311 | printk(KERN_DEBUG "Setting up Freescale MSI support\n"); | ||
312 | |||
313 | msi = kzalloc(sizeof(struct fsl_msi), GFP_KERNEL); | ||
314 | if (!msi) { | ||
315 | dev_err(&dev->dev, "No memory for MSI structure\n"); | ||
316 | err = -ENOMEM; | ||
317 | goto error_out; | ||
318 | } | ||
319 | |||
320 | msi->of_node = of_node_get(dev->node); | ||
321 | |||
322 | msi->irqhost = irq_alloc_host(of_node_get(dev->node), | ||
323 | IRQ_HOST_MAP_LINEAR, | ||
324 | NR_MSI_IRQS, &fsl_msi_host_ops, 0); | ||
325 | if (msi->irqhost == NULL) { | ||
326 | dev_err(&dev->dev, "No memory for MSI irqhost\n"); | ||
327 | of_node_put(dev->node); | ||
328 | err = -ENOMEM; | ||
329 | goto error_out; | ||
330 | } | ||
331 | |||
332 | /* Get the MSI reg base */ | ||
333 | err = of_address_to_resource(dev->node, 0, &res); | ||
334 | if (err) { | ||
335 | dev_err(&dev->dev, "%s resource error!\n", | ||
336 | dev->node->full_name); | ||
337 | goto error_out; | ||
338 | } | ||
339 | |||
340 | msi->msi_regs = ioremap(res.start, res.end - res.start + 1); | ||
341 | if (!msi->msi_regs) { | ||
342 | dev_err(&dev->dev, "ioremap problem failed\n"); | ||
343 | goto error_out; | ||
344 | } | ||
345 | |||
346 | msi->feature = features->fsl_pic_ip; | ||
347 | |||
348 | msi->irqhost->host_data = msi; | ||
349 | |||
350 | msi->msi_addr_hi = 0x0; | ||
351 | msi->msi_addr_lo = res.start + features->msiir_offset; | ||
352 | |||
353 | rc = fsl_msi_init_allocator(msi); | ||
354 | if (rc) { | ||
355 | dev_err(&dev->dev, "Error allocating MSI bitmap\n"); | ||
356 | goto error_out; | ||
357 | } | ||
358 | |||
359 | p = of_get_property(dev->node, "interrupts", &count); | ||
360 | if (!p) { | ||
361 | dev_err(&dev->dev, "no interrupts property found on %s\n", | ||
362 | dev->node->full_name); | ||
363 | err = -ENODEV; | ||
364 | goto error_out; | ||
365 | } | ||
366 | if (count % 8 != 0) { | ||
367 | dev_err(&dev->dev, "Malformed interrupts property on %s\n", | ||
368 | dev->node->full_name); | ||
369 | err = -EINVAL; | ||
370 | goto error_out; | ||
371 | } | ||
372 | |||
373 | count /= sizeof(u32); | ||
374 | for (i = 0; i < count / 2; i++) { | ||
375 | if (i > NR_MSI_REG) | ||
376 | break; | ||
377 | virt_msir = irq_of_parse_and_map(dev->node, i); | ||
378 | if (virt_msir != NO_IRQ) { | ||
379 | set_irq_data(virt_msir, (void *)i); | ||
380 | set_irq_chained_handler(virt_msir, fsl_msi_cascade); | ||
381 | } | ||
382 | } | ||
383 | |||
384 | fsl_msi = msi; | ||
385 | |||
386 | WARN_ON(ppc_md.setup_msi_irqs); | ||
387 | ppc_md.setup_msi_irqs = fsl_setup_msi_irqs; | ||
388 | ppc_md.teardown_msi_irqs = fsl_teardown_msi_irqs; | ||
389 | ppc_md.msi_check_device = fsl_msi_check_device; | ||
390 | return 0; | ||
391 | error_out: | ||
392 | kfree(msi); | ||
393 | return err; | ||
394 | } | ||
395 | |||
396 | static const struct fsl_msi_feature mpic_msi_feature = { | ||
397 | .fsl_pic_ip = FSL_PIC_IP_MPIC, | ||
398 | .msiir_offset = 0x140, | ||
399 | }; | ||
400 | |||
401 | static const struct fsl_msi_feature ipic_msi_feature = { | ||
402 | .fsl_pic_ip = FSL_PIC_IP_IPIC, | ||
403 | .msiir_offset = 0x38, | ||
404 | }; | ||
405 | |||
406 | static const struct of_device_id fsl_of_msi_ids[] = { | ||
407 | { | ||
408 | .compatible = "fsl,mpic-msi", | ||
409 | .data = (void *)&mpic_msi_feature, | ||
410 | }, | ||
411 | { | ||
412 | .compatible = "fsl,ipic-msi", | ||
413 | .data = (void *)&ipic_msi_feature, | ||
414 | }, | ||
415 | {} | ||
416 | }; | ||
417 | |||
418 | static struct of_platform_driver fsl_of_msi_driver = { | ||
419 | .name = "fsl-msi", | ||
420 | .match_table = fsl_of_msi_ids, | ||
421 | .probe = fsl_of_msi_probe, | ||
422 | }; | ||
423 | |||
424 | static __init int fsl_of_msi_init(void) | ||
425 | { | ||
426 | return of_register_platform_driver(&fsl_of_msi_driver); | ||
427 | } | ||
428 | |||
429 | subsys_initcall(fsl_of_msi_init); | ||
diff --git a/arch/powerpc/sysdev/fsl_msi.h b/arch/powerpc/sysdev/fsl_msi.h new file mode 100644 index 000000000000..a653468521fa --- /dev/null +++ b/arch/powerpc/sysdev/fsl_msi.h | |||
@@ -0,0 +1,42 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007-2008 Freescale Semiconductor, Inc. All rights reserved. | ||
3 | * | ||
4 | * Author: Tony Li <tony.li@freescale.com> | ||
5 | * Jason Jin <Jason.jin@freescale.com> | ||
6 | * | ||
7 | * This program is free software; you can redistribute it and/or | ||
8 | * modify it under the terms of the GNU General Public License | ||
9 | * as published by the Free Software Foundation; version 2 of the | ||
10 | * License. | ||
11 | * | ||
12 | */ | ||
13 | #ifndef _POWERPC_SYSDEV_FSL_MSI_H | ||
14 | #define _POWERPC_SYSDEV_FSL_MSI_H | ||
15 | |||
16 | #define NR_MSI_REG 8 | ||
17 | #define IRQS_PER_MSI_REG 32 | ||
18 | #define NR_MSI_IRQS (NR_MSI_REG * IRQS_PER_MSI_REG) | ||
19 | |||
20 | #define FSL_PIC_IP_MASK 0x0000000F | ||
21 | #define FSL_PIC_IP_MPIC 0x00000001 | ||
22 | #define FSL_PIC_IP_IPIC 0x00000002 | ||
23 | |||
24 | struct fsl_msi { | ||
25 | /* Device node of the MSI interrupt*/ | ||
26 | struct device_node *of_node; | ||
27 | |||
28 | struct irq_host *irqhost; | ||
29 | |||
30 | unsigned long cascade_irq; | ||
31 | |||
32 | u32 msi_addr_lo; | ||
33 | u32 msi_addr_hi; | ||
34 | void __iomem *msi_regs; | ||
35 | u32 feature; | ||
36 | |||
37 | unsigned long *fsl_msi_bitmap; | ||
38 | spinlock_t bitmap_lock; | ||
39 | }; | ||
40 | |||
41 | #endif /* _POWERPC_SYSDEV_FSL_MSI_H */ | ||
42 | |||
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c index bf13c2174a4e..489ca5a397b1 100644 --- a/arch/powerpc/sysdev/fsl_pci.c +++ b/arch/powerpc/sysdev/fsl_pci.c | |||
@@ -106,6 +106,16 @@ void __init setup_pci_cmd(struct pci_controller *hose) | |||
106 | } | 106 | } |
107 | } | 107 | } |
108 | 108 | ||
109 | static void __init setup_pci_pcsrbar(struct pci_controller *hose) | ||
110 | { | ||
111 | #ifdef CONFIG_PCI_MSI | ||
112 | phys_addr_t immr_base; | ||
113 | |||
114 | immr_base = get_immrbase(); | ||
115 | early_write_config_dword(hose, 0, 0, PCI_BASE_ADDRESS_0, immr_base); | ||
116 | #endif | ||
117 | } | ||
118 | |||
109 | static int fsl_pcie_bus_fixup; | 119 | static int fsl_pcie_bus_fixup; |
110 | 120 | ||
111 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) | 121 | static void __init quirk_fsl_pcie_header(struct pci_dev *dev) |
@@ -211,6 +221,8 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary) | |||
211 | /* Setup PEX window registers */ | 221 | /* Setup PEX window registers */ |
212 | setup_pci_atmu(hose, &rsrc); | 222 | setup_pci_atmu(hose, &rsrc); |
213 | 223 | ||
224 | /* Setup PEXCSRBAR */ | ||
225 | setup_pci_pcsrbar(hose); | ||
214 | return 0; | 226 | return 0; |
215 | } | 227 | } |
216 | 228 | ||
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c index 019657c110b6..ca54563d5c7e 100644 --- a/arch/powerpc/sysdev/fsl_soc.c +++ b/arch/powerpc/sysdev/fsl_soc.c | |||
@@ -433,6 +433,7 @@ static struct i2c_driver_device i2c_devices[] __initdata = { | |||
433 | {"dallas,ds1340", "ds1340"}, | 433 | {"dallas,ds1340", "ds1340"}, |
434 | {"stm,m41t00", "m41t00"}, | 434 | {"stm,m41t00", "m41t00"}, |
435 | {"dallas,ds1374", "ds1374"}, | 435 | {"dallas,ds1374", "ds1374"}, |
436 | {"cirrus,cs4270", "cs4270"}, | ||
436 | }; | 437 | }; |
437 | 438 | ||
438 | static int __init of_find_i2c_driver(struct device_node *node, | 439 | static int __init of_find_i2c_driver(struct device_node *node, |
@@ -448,6 +449,10 @@ static int __init of_find_i2c_driver(struct device_node *node, | |||
448 | return -ENOMEM; | 449 | return -ENOMEM; |
449 | return 0; | 450 | return 0; |
450 | } | 451 | } |
452 | |||
453 | pr_warning("fsl_soc.c: unrecognized i2c node %s\n", | ||
454 | (const char *) of_get_property(node, "compatible", NULL)); | ||
455 | |||
451 | return -ENODEV; | 456 | return -ENODEV; |
452 | } | 457 | } |
453 | 458 | ||
@@ -491,6 +496,8 @@ static int __init fsl_i2c_of_init(void) | |||
491 | struct resource r[2]; | 496 | struct resource r[2]; |
492 | struct fsl_i2c_platform_data i2c_data; | 497 | struct fsl_i2c_platform_data i2c_data; |
493 | const unsigned char *flags = NULL; | 498 | const unsigned char *flags = NULL; |
499 | int idx; | ||
500 | const u32 *iprop; | ||
494 | 501 | ||
495 | memset(&r, 0, sizeof(r)); | 502 | memset(&r, 0, sizeof(r)); |
496 | memset(&i2c_data, 0, sizeof(i2c_data)); | 503 | memset(&i2c_data, 0, sizeof(i2c_data)); |
@@ -501,7 +508,10 @@ static int __init fsl_i2c_of_init(void) | |||
501 | 508 | ||
502 | of_irq_to_resource(np, 0, &r[1]); | 509 | of_irq_to_resource(np, 0, &r[1]); |
503 | 510 | ||
504 | i2c_dev = platform_device_register_simple("fsl-i2c", i, r, 2); | 511 | iprop = of_get_property(np, "cell-index", NULL); |
512 | idx = iprop ? *iprop : i; | ||
513 | |||
514 | i2c_dev = platform_device_register_simple("fsl-i2c", idx, r, 2); | ||
505 | if (IS_ERR(i2c_dev)) { | 515 | if (IS_ERR(i2c_dev)) { |
506 | ret = PTR_ERR(i2c_dev); | 516 | ret = PTR_ERR(i2c_dev); |
507 | goto err; | 517 | goto err; |
@@ -523,7 +533,8 @@ static int __init fsl_i2c_of_init(void) | |||
523 | if (ret) | 533 | if (ret) |
524 | goto unreg; | 534 | goto unreg; |
525 | 535 | ||
526 | of_register_i2c_devices(np, i++); | 536 | of_register_i2c_devices(np, idx); |
537 | i++; | ||
527 | } | 538 | } |
528 | 539 | ||
529 | return 0; | 540 | return 0; |
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c index 216c0f5680d2..a96584ab33dd 100644 --- a/arch/powerpc/sysdev/i8259.c +++ b/arch/powerpc/sysdev/i8259.c | |||
@@ -276,7 +276,7 @@ void i8259_init(struct device_node *node, unsigned long intack_addr) | |||
276 | spin_unlock_irqrestore(&i8259_lock, flags); | 276 | spin_unlock_irqrestore(&i8259_lock, flags); |
277 | 277 | ||
278 | /* create a legacy host */ | 278 | /* create a legacy host */ |
279 | i8259_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, | 279 | i8259_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, |
280 | 0, &i8259_host_ops, 0); | 280 | 0, &i8259_host_ops, 0); |
281 | if (i8259_host == NULL) { | 281 | if (i8259_host == NULL) { |
282 | printk(KERN_ERR "i8259: failed to allocate irq host !\n"); | 282 | printk(KERN_ERR "i8259: failed to allocate irq host !\n"); |
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c index cfbd2aae93e8..7fd49c97501a 100644 --- a/arch/powerpc/sysdev/indirect_pci.c +++ b/arch/powerpc/sysdev/indirect_pci.c | |||
@@ -123,6 +123,12 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset, | |||
123 | (bus->number == hose->first_busno)) | 123 | (bus->number == hose->first_busno)) |
124 | val &= 0xffffff00; | 124 | val &= 0xffffff00; |
125 | 125 | ||
126 | /* Workaround for PCI_28 Errata in 440EPx/GRx */ | ||
127 | if ((hose->indirect_type & PPC_INDIRECT_TYPE_BROKEN_MRM) && | ||
128 | offset == PCI_CACHE_LINE_SIZE) { | ||
129 | val = 0; | ||
130 | } | ||
131 | |||
126 | /* | 132 | /* |
127 | * Note: the caller has already checked that offset is | 133 | * Note: the caller has already checked that offset is |
128 | * suitably aligned and that len is 1, 2 or 4. | 134 | * suitably aligned and that len is 1, 2 or 4. |
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c index 0f2dfb0aaa6a..caba1c0be5a7 100644 --- a/arch/powerpc/sysdev/ipic.c +++ b/arch/powerpc/sysdev/ipic.c | |||
@@ -725,25 +725,21 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags) | |||
725 | struct resource res; | 725 | struct resource res; |
726 | u32 temp = 0, ret; | 726 | u32 temp = 0, ret; |
727 | 727 | ||
728 | ret = of_address_to_resource(node, 0, &res); | ||
729 | if (ret) | ||
730 | return NULL; | ||
731 | |||
728 | ipic = alloc_bootmem(sizeof(struct ipic)); | 732 | ipic = alloc_bootmem(sizeof(struct ipic)); |
729 | if (ipic == NULL) | 733 | if (ipic == NULL) |
730 | return NULL; | 734 | return NULL; |
731 | 735 | ||
732 | memset(ipic, 0, sizeof(struct ipic)); | 736 | memset(ipic, 0, sizeof(struct ipic)); |
733 | 737 | ||
734 | ipic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, | 738 | ipic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, |
735 | NR_IPIC_INTS, | 739 | NR_IPIC_INTS, |
736 | &ipic_host_ops, 0); | 740 | &ipic_host_ops, 0); |
737 | if (ipic->irqhost == NULL) { | 741 | if (ipic->irqhost == NULL) |
738 | of_node_put(node); | ||
739 | return NULL; | ||
740 | } | ||
741 | |||
742 | ret = of_address_to_resource(node, 0, &res); | ||
743 | if (ret) { | ||
744 | of_node_put(node); | ||
745 | return NULL; | 742 | return NULL; |
746 | } | ||
747 | 743 | ||
748 | ipic->regs = ioremap(res.start, res.end - res.start + 1); | 744 | ipic->regs = ioremap(res.start, res.end - res.start + 1); |
749 | 745 | ||
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c index 7680001676a6..5788a6ab1254 100644 --- a/arch/powerpc/sysdev/mpic.c +++ b/arch/powerpc/sysdev/mpic.c | |||
@@ -1016,13 +1016,11 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
1016 | memset(mpic, 0, sizeof(struct mpic)); | 1016 | memset(mpic, 0, sizeof(struct mpic)); |
1017 | mpic->name = name; | 1017 | mpic->name = name; |
1018 | 1018 | ||
1019 | mpic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, | 1019 | mpic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, |
1020 | isu_size, &mpic_host_ops, | 1020 | isu_size, &mpic_host_ops, |
1021 | flags & MPIC_LARGE_VECTORS ? 2048 : 256); | 1021 | flags & MPIC_LARGE_VECTORS ? 2048 : 256); |
1022 | if (mpic->irqhost == NULL) { | 1022 | if (mpic->irqhost == NULL) |
1023 | of_node_put(node); | ||
1024 | return NULL; | 1023 | return NULL; |
1025 | } | ||
1026 | 1024 | ||
1027 | mpic->irqhost->host_data = mpic; | 1025 | mpic->irqhost->host_data = mpic; |
1028 | mpic->hc_irq = mpic_irq_chip; | 1026 | mpic->hc_irq = mpic_irq_chip; |
@@ -1143,10 +1141,14 @@ struct mpic * __init mpic_alloc(struct device_node *node, | |||
1143 | greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); | 1141 | greg_feature = mpic_read(mpic->gregs, MPIC_INFO(GREG_FEATURE_0)); |
1144 | mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) | 1142 | mpic->num_cpus = ((greg_feature & MPIC_GREG_FEATURE_LAST_CPU_MASK) |
1145 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; | 1143 | >> MPIC_GREG_FEATURE_LAST_CPU_SHIFT) + 1; |
1146 | if (isu_size == 0) | 1144 | if (isu_size == 0) { |
1147 | mpic->num_sources = | 1145 | if (flags & MPIC_BROKEN_FRR_NIRQS) |
1148 | ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) | 1146 | mpic->num_sources = mpic->irq_count; |
1149 | >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; | 1147 | else |
1148 | mpic->num_sources = | ||
1149 | ((greg_feature & MPIC_GREG_FEATURE_LAST_SRC_MASK) | ||
1150 | >> MPIC_GREG_FEATURE_LAST_SRC_SHIFT) + 1; | ||
1151 | } | ||
1150 | 1152 | ||
1151 | /* Map the per-CPU registers */ | 1153 | /* Map the per-CPU registers */ |
1152 | for (i = 0; i < mpic->num_cpus; i++) { | 1154 | for (i = 0; i < mpic->num_cpus; i++) { |
diff --git a/arch/powerpc/sysdev/mpic_msi.c b/arch/powerpc/sysdev/mpic_msi.c index d272a52ecd24..de3e5e8bc324 100644 --- a/arch/powerpc/sysdev/mpic_msi.c +++ b/arch/powerpc/sysdev/mpic_msi.c | |||
@@ -16,6 +16,7 @@ | |||
16 | #include <asm/hw_irq.h> | 16 | #include <asm/hw_irq.h> |
17 | #include <asm/ppc-pci.h> | 17 | #include <asm/ppc-pci.h> |
18 | 18 | ||
19 | #include <sysdev/mpic.h> | ||
19 | 20 | ||
20 | static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) | 21 | static void __mpic_msi_reserve_hwirq(struct mpic *mpic, irq_hw_number_t hwirq) |
21 | { | 22 | { |
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c index 33cbfb22ce3e..68aff6076675 100644 --- a/arch/powerpc/sysdev/mpic_pasemi_msi.c +++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c | |||
@@ -95,6 +95,7 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
95 | unsigned int virq; | 95 | unsigned int virq; |
96 | struct msi_desc *entry; | 96 | struct msi_desc *entry; |
97 | struct msi_msg msg; | 97 | struct msi_msg msg; |
98 | int ret; | ||
98 | 99 | ||
99 | pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", | 100 | pr_debug("pasemi_msi_setup_msi_irqs, pdev %p nvec %d type %d\n", |
100 | pdev, nvec, type); | 101 | pdev, nvec, type); |
@@ -108,8 +109,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
108 | * few MSIs for someone, but restrictions will apply to how the | 109 | * few MSIs for someone, but restrictions will apply to how the |
109 | * sources can be changed independently. | 110 | * sources can be changed independently. |
110 | */ | 111 | */ |
111 | hwirq = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); | 112 | ret = mpic_msi_alloc_hwirqs(msi_mpic, ALLOC_CHUNK); |
112 | if (hwirq < 0) { | 113 | hwirq = ret; |
114 | if (ret < 0) { | ||
113 | pr_debug("pasemi_msi: failed allocating hwirq\n"); | 115 | pr_debug("pasemi_msi: failed allocating hwirq\n"); |
114 | return hwirq; | 116 | return hwirq; |
115 | } | 117 | } |
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c index 1d5a40899b74..6e2f8686fdfc 100644 --- a/arch/powerpc/sysdev/mpic_u3msi.c +++ b/arch/powerpc/sysdev/mpic_u3msi.c | |||
@@ -115,17 +115,19 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type) | |||
115 | struct msi_desc *entry; | 115 | struct msi_desc *entry; |
116 | struct msi_msg msg; | 116 | struct msi_msg msg; |
117 | u64 addr; | 117 | u64 addr; |
118 | int ret; | ||
118 | 119 | ||
119 | addr = find_ht_magic_addr(pdev); | 120 | addr = find_ht_magic_addr(pdev); |
120 | msg.address_lo = addr & 0xFFFFFFFF; | 121 | msg.address_lo = addr & 0xFFFFFFFF; |
121 | msg.address_hi = addr >> 32; | 122 | msg.address_hi = addr >> 32; |
122 | 123 | ||
123 | list_for_each_entry(entry, &pdev->msi_list, list) { | 124 | list_for_each_entry(entry, &pdev->msi_list, list) { |
124 | hwirq = mpic_msi_alloc_hwirqs(msi_mpic, 1); | 125 | ret = mpic_msi_alloc_hwirqs(msi_mpic, 1); |
125 | if (hwirq < 0) { | 126 | if (ret < 0) { |
126 | pr_debug("u3msi: failed allocating hwirq\n"); | 127 | pr_debug("u3msi: failed allocating hwirq\n"); |
127 | return hwirq; | 128 | return ret; |
128 | } | 129 | } |
130 | hwirq = ret; | ||
129 | 131 | ||
130 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); | 132 | virq = irq_create_mapping(msi_mpic->irqhost, hwirq); |
131 | if (virq == NO_IRQ) { | 133 | if (virq == NO_IRQ) { |
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c index a132e0de8ca5..32e0ad0ebea8 100644 --- a/arch/powerpc/sysdev/mv64x60_dev.c +++ b/arch/powerpc/sysdev/mv64x60_dev.c | |||
@@ -15,6 +15,7 @@ | |||
15 | #include <linux/console.h> | 15 | #include <linux/console.h> |
16 | #include <linux/mv643xx.h> | 16 | #include <linux/mv643xx.h> |
17 | #include <linux/platform_device.h> | 17 | #include <linux/platform_device.h> |
18 | #include <linux/of_platform.h> | ||
18 | 19 | ||
19 | #include <asm/prom.h> | 20 | #include <asm/prom.h> |
20 | 21 | ||
@@ -25,6 +26,11 @@ | |||
25 | * PowerPC of_platform_bus_type. They support platform_bus_type instead. | 26 | * PowerPC of_platform_bus_type. They support platform_bus_type instead. |
26 | */ | 27 | */ |
27 | 28 | ||
29 | static struct of_device_id __initdata of_mv64x60_devices[] = { | ||
30 | { .compatible = "marvell,mv64306-devctrl", }, | ||
31 | {} | ||
32 | }; | ||
33 | |||
28 | /* | 34 | /* |
29 | * Create MPSC platform devices | 35 | * Create MPSC platform devices |
30 | */ | 36 | */ |
@@ -484,6 +490,10 @@ static int __init mv64x60_device_setup(void) | |||
484 | of_node_put(np); | 490 | of_node_put(np); |
485 | } | 491 | } |
486 | 492 | ||
493 | /* Now add every node that is on the device bus */ | ||
494 | for_each_compatible_node(np, NULL, "marvell,mv64360") | ||
495 | of_platform_bus_probe(np, of_mv64x60_devices, NULL); | ||
496 | |||
487 | return 0; | 497 | return 0; |
488 | } | 498 | } |
489 | arch_initcall(mv64x60_device_setup); | 499 | arch_initcall(mv64x60_device_setup); |
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.c b/arch/powerpc/sysdev/ppc4xx_pci.c index b4a54c52e880..fb368dfde5d4 100644 --- a/arch/powerpc/sysdev/ppc4xx_pci.c +++ b/arch/powerpc/sysdev/ppc4xx_pci.c | |||
@@ -75,6 +75,11 @@ static void fixup_ppc4xx_pci_bridge(struct pci_dev *dev) | |||
75 | !of_device_is_compatible(hose->dn, "ibm,plb-pci")) | 75 | !of_device_is_compatible(hose->dn, "ibm,plb-pci")) |
76 | return; | 76 | return; |
77 | 77 | ||
78 | if (of_device_is_compatible(hose->dn, "ibm,plb440epx-pci") || | ||
79 | of_device_is_compatible(hose->dn, "ibm,plb440grx-pci")) { | ||
80 | hose->indirect_type |= PPC_INDIRECT_TYPE_BROKEN_MRM; | ||
81 | } | ||
82 | |||
78 | /* Hide the PCI host BARs from the kernel as their content doesn't | 83 | /* Hide the PCI host BARs from the kernel as their content doesn't |
79 | * fit well in the resource management | 84 | * fit well in the resource management |
80 | */ | 85 | */ |
@@ -1634,6 +1639,15 @@ static void __init ppc4xx_probe_pciex_bridge(struct device_node *np) | |||
1634 | } | 1639 | } |
1635 | port = &ppc4xx_pciex_ports[portno]; | 1640 | port = &ppc4xx_pciex_ports[portno]; |
1636 | port->index = portno; | 1641 | port->index = portno; |
1642 | |||
1643 | /* | ||
1644 | * Check if device is enabled | ||
1645 | */ | ||
1646 | if (!of_device_is_available(np)) { | ||
1647 | printk(KERN_INFO "PCIE%d: Port disabled via device-tree\n", port->index); | ||
1648 | return; | ||
1649 | } | ||
1650 | |||
1637 | port->node = of_node_get(np); | 1651 | port->node = of_node_get(np); |
1638 | pval = of_get_property(np, "sdr-base", NULL); | 1652 | pval = of_get_property(np, "sdr-base", NULL); |
1639 | if (pval == NULL) { | 1653 | if (pval == NULL) { |
diff --git a/arch/powerpc/sysdev/qe_lib/Kconfig b/arch/powerpc/sysdev/qe_lib/Kconfig index adc66212a419..4bb18f57901e 100644 --- a/arch/powerpc/sysdev/qe_lib/Kconfig +++ b/arch/powerpc/sysdev/qe_lib/Kconfig | |||
@@ -20,3 +20,16 @@ config UCC | |||
20 | bool | 20 | bool |
21 | default y if UCC_FAST || UCC_SLOW | 21 | default y if UCC_FAST || UCC_SLOW |
22 | 22 | ||
23 | config QE_USB | ||
24 | bool | ||
25 | help | ||
26 | QE USB Host Controller support | ||
27 | |||
28 | config QE_GPIO | ||
29 | bool "QE GPIO support" | ||
30 | depends on QUICC_ENGINE | ||
31 | select GENERIC_GPIO | ||
32 | select HAVE_GPIO_LIB | ||
33 | help | ||
34 | Say Y here if you're going to use hardware that connects to the | ||
35 | QE GPIOs. | ||
diff --git a/arch/powerpc/sysdev/qe_lib/Makefile b/arch/powerpc/sysdev/qe_lib/Makefile index 874fe1a5b1cf..f1855c185291 100644 --- a/arch/powerpc/sysdev/qe_lib/Makefile +++ b/arch/powerpc/sysdev/qe_lib/Makefile | |||
@@ -6,3 +6,5 @@ obj-$(CONFIG_QUICC_ENGINE)+= qe.o qe_ic.o qe_io.o | |||
6 | obj-$(CONFIG_UCC) += ucc.o | 6 | obj-$(CONFIG_UCC) += ucc.o |
7 | obj-$(CONFIG_UCC_SLOW) += ucc_slow.o | 7 | obj-$(CONFIG_UCC_SLOW) += ucc_slow.o |
8 | obj-$(CONFIG_UCC_FAST) += ucc_fast.o | 8 | obj-$(CONFIG_UCC_FAST) += ucc_fast.o |
9 | obj-$(CONFIG_QE_USB) += usb.o | ||
10 | obj-$(CONFIG_QE_GPIO) += gpio.o | ||
diff --git a/arch/powerpc/sysdev/qe_lib/gpio.c b/arch/powerpc/sysdev/qe_lib/gpio.c new file mode 100644 index 000000000000..8e5a0bc36d0b --- /dev/null +++ b/arch/powerpc/sysdev/qe_lib/gpio.c | |||
@@ -0,0 +1,149 @@ | |||
1 | /* | ||
2 | * QUICC Engine GPIOs | ||
3 | * | ||
4 | * Copyright (c) MontaVista Software, Inc. 2008. | ||
5 | * | ||
6 | * Author: Anton Vorontsov <avorontsov@ru.mvista.com> | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify it | ||
9 | * under the terms of the GNU General Public License as published by the | ||
10 | * Free Software Foundation; either version 2 of the License, or (at your | ||
11 | * option) any later version. | ||
12 | */ | ||
13 | |||
14 | #include <linux/kernel.h> | ||
15 | #include <linux/init.h> | ||
16 | #include <linux/spinlock.h> | ||
17 | #include <linux/io.h> | ||
18 | #include <linux/of.h> | ||
19 | #include <linux/of_gpio.h> | ||
20 | #include <linux/gpio.h> | ||
21 | #include <asm/qe.h> | ||
22 | |||
23 | struct qe_gpio_chip { | ||
24 | struct of_mm_gpio_chip mm_gc; | ||
25 | spinlock_t lock; | ||
26 | |||
27 | /* shadowed data register to clear/set bits safely */ | ||
28 | u32 cpdata; | ||
29 | }; | ||
30 | |||
31 | static inline struct qe_gpio_chip * | ||
32 | to_qe_gpio_chip(struct of_mm_gpio_chip *mm_gc) | ||
33 | { | ||
34 | return container_of(mm_gc, struct qe_gpio_chip, mm_gc); | ||
35 | } | ||
36 | |||
37 | static void qe_gpio_save_regs(struct of_mm_gpio_chip *mm_gc) | ||
38 | { | ||
39 | struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); | ||
40 | struct qe_pio_regs __iomem *regs = mm_gc->regs; | ||
41 | |||
42 | qe_gc->cpdata = in_be32(®s->cpdata); | ||
43 | } | ||
44 | |||
45 | static int qe_gpio_get(struct gpio_chip *gc, unsigned int gpio) | ||
46 | { | ||
47 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
48 | struct qe_pio_regs __iomem *regs = mm_gc->regs; | ||
49 | u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); | ||
50 | |||
51 | return in_be32(®s->cpdata) & pin_mask; | ||
52 | } | ||
53 | |||
54 | static void qe_gpio_set(struct gpio_chip *gc, unsigned int gpio, int val) | ||
55 | { | ||
56 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
57 | struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); | ||
58 | struct qe_pio_regs __iomem *regs = mm_gc->regs; | ||
59 | unsigned long flags; | ||
60 | u32 pin_mask = 1 << (QE_PIO_PINS - 1 - gpio); | ||
61 | |||
62 | spin_lock_irqsave(&qe_gc->lock, flags); | ||
63 | |||
64 | if (val) | ||
65 | qe_gc->cpdata |= pin_mask; | ||
66 | else | ||
67 | qe_gc->cpdata &= ~pin_mask; | ||
68 | |||
69 | out_be32(®s->cpdata, qe_gc->cpdata); | ||
70 | |||
71 | spin_unlock_irqrestore(&qe_gc->lock, flags); | ||
72 | } | ||
73 | |||
74 | static int qe_gpio_dir_in(struct gpio_chip *gc, unsigned int gpio) | ||
75 | { | ||
76 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
77 | struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); | ||
78 | unsigned long flags; | ||
79 | |||
80 | spin_lock_irqsave(&qe_gc->lock, flags); | ||
81 | |||
82 | __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_IN, 0, 0, 0); | ||
83 | |||
84 | spin_unlock_irqrestore(&qe_gc->lock, flags); | ||
85 | |||
86 | return 0; | ||
87 | } | ||
88 | |||
89 | static int qe_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val) | ||
90 | { | ||
91 | struct of_mm_gpio_chip *mm_gc = to_of_mm_gpio_chip(gc); | ||
92 | struct qe_gpio_chip *qe_gc = to_qe_gpio_chip(mm_gc); | ||
93 | unsigned long flags; | ||
94 | |||
95 | spin_lock_irqsave(&qe_gc->lock, flags); | ||
96 | |||
97 | __par_io_config_pin(mm_gc->regs, gpio, QE_PIO_DIR_OUT, 0, 0, 0); | ||
98 | |||
99 | spin_unlock_irqrestore(&qe_gc->lock, flags); | ||
100 | |||
101 | qe_gpio_set(gc, gpio, val); | ||
102 | |||
103 | return 0; | ||
104 | } | ||
105 | |||
106 | static int __init qe_add_gpiochips(void) | ||
107 | { | ||
108 | struct device_node *np; | ||
109 | |||
110 | for_each_compatible_node(np, NULL, "fsl,mpc8323-qe-pario-bank") { | ||
111 | int ret; | ||
112 | struct qe_gpio_chip *qe_gc; | ||
113 | struct of_mm_gpio_chip *mm_gc; | ||
114 | struct of_gpio_chip *of_gc; | ||
115 | struct gpio_chip *gc; | ||
116 | |||
117 | qe_gc = kzalloc(sizeof(*qe_gc), GFP_KERNEL); | ||
118 | if (!qe_gc) { | ||
119 | ret = -ENOMEM; | ||
120 | goto err; | ||
121 | } | ||
122 | |||
123 | spin_lock_init(&qe_gc->lock); | ||
124 | |||
125 | mm_gc = &qe_gc->mm_gc; | ||
126 | of_gc = &mm_gc->of_gc; | ||
127 | gc = &of_gc->gc; | ||
128 | |||
129 | mm_gc->save_regs = qe_gpio_save_regs; | ||
130 | of_gc->gpio_cells = 2; | ||
131 | gc->ngpio = QE_PIO_PINS; | ||
132 | gc->direction_input = qe_gpio_dir_in; | ||
133 | gc->direction_output = qe_gpio_dir_out; | ||
134 | gc->get = qe_gpio_get; | ||
135 | gc->set = qe_gpio_set; | ||
136 | |||
137 | ret = of_mm_gpiochip_add(np, mm_gc); | ||
138 | if (ret) | ||
139 | goto err; | ||
140 | continue; | ||
141 | err: | ||
142 | pr_err("%s: registration failed with status %d\n", | ||
143 | np->full_name, ret); | ||
144 | kfree(qe_gc); | ||
145 | /* try others anyway */ | ||
146 | } | ||
147 | return 0; | ||
148 | } | ||
149 | arch_initcall(qe_add_gpiochips); | ||
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c index cff550eec7e8..9e82d7e725a5 100644 --- a/arch/powerpc/sysdev/qe_lib/qe.c +++ b/arch/powerpc/sysdev/qe_lib/qe.c | |||
@@ -35,7 +35,6 @@ | |||
35 | #include <asm/rheap.h> | 35 | #include <asm/rheap.h> |
36 | 36 | ||
37 | static void qe_snums_init(void); | 37 | static void qe_snums_init(void); |
38 | static void qe_muram_init(void); | ||
39 | static int qe_sdma_init(void); | 38 | static int qe_sdma_init(void); |
40 | 39 | ||
41 | static DEFINE_SPINLOCK(qe_lock); | 40 | static DEFINE_SPINLOCK(qe_lock); |
@@ -88,7 +87,7 @@ phys_addr_t get_qe_base(void) | |||
88 | 87 | ||
89 | EXPORT_SYMBOL(get_qe_base); | 88 | EXPORT_SYMBOL(get_qe_base); |
90 | 89 | ||
91 | void qe_reset(void) | 90 | void __init qe_reset(void) |
92 | { | 91 | { |
93 | if (qe_immr == NULL) | 92 | if (qe_immr == NULL) |
94 | qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); | 93 | qe_immr = ioremap(get_qe_base(), QE_IMMAP_SIZE); |
@@ -325,97 +324,6 @@ static int qe_sdma_init(void) | |||
325 | return 0; | 324 | return 0; |
326 | } | 325 | } |
327 | 326 | ||
328 | /* | ||
329 | * muram_alloc / muram_free bits. | ||
330 | */ | ||
331 | static DEFINE_SPINLOCK(qe_muram_lock); | ||
332 | |||
333 | /* 16 blocks should be enough to satisfy all requests | ||
334 | * until the memory subsystem goes up... */ | ||
335 | static rh_block_t qe_boot_muram_rh_block[16]; | ||
336 | static rh_info_t qe_muram_info; | ||
337 | |||
338 | static void qe_muram_init(void) | ||
339 | { | ||
340 | struct device_node *np; | ||
341 | const u32 *address; | ||
342 | u64 size; | ||
343 | unsigned int flags; | ||
344 | |||
345 | /* initialize the info header */ | ||
346 | rh_init(&qe_muram_info, 1, | ||
347 | sizeof(qe_boot_muram_rh_block) / | ||
348 | sizeof(qe_boot_muram_rh_block[0]), qe_boot_muram_rh_block); | ||
349 | |||
350 | /* Attach the usable muram area */ | ||
351 | /* XXX: This is a subset of the available muram. It | ||
352 | * varies with the processor and the microcode patches activated. | ||
353 | */ | ||
354 | np = of_find_compatible_node(NULL, NULL, "fsl,qe-muram-data"); | ||
355 | if (!np) { | ||
356 | np = of_find_node_by_name(NULL, "data-only"); | ||
357 | if (!np) { | ||
358 | WARN_ON(1); | ||
359 | return; | ||
360 | } | ||
361 | } | ||
362 | |||
363 | address = of_get_address(np, 0, &size, &flags); | ||
364 | WARN_ON(!address); | ||
365 | |||
366 | of_node_put(np); | ||
367 | if (address) | ||
368 | rh_attach_region(&qe_muram_info, *address, (int)size); | ||
369 | } | ||
370 | |||
371 | /* This function returns an index into the MURAM area. | ||
372 | */ | ||
373 | unsigned long qe_muram_alloc(int size, int align) | ||
374 | { | ||
375 | unsigned long start; | ||
376 | unsigned long flags; | ||
377 | |||
378 | spin_lock_irqsave(&qe_muram_lock, flags); | ||
379 | start = rh_alloc_align(&qe_muram_info, size, align, "QE"); | ||
380 | spin_unlock_irqrestore(&qe_muram_lock, flags); | ||
381 | |||
382 | return start; | ||
383 | } | ||
384 | EXPORT_SYMBOL(qe_muram_alloc); | ||
385 | |||
386 | int qe_muram_free(unsigned long offset) | ||
387 | { | ||
388 | int ret; | ||
389 | unsigned long flags; | ||
390 | |||
391 | spin_lock_irqsave(&qe_muram_lock, flags); | ||
392 | ret = rh_free(&qe_muram_info, offset); | ||
393 | spin_unlock_irqrestore(&qe_muram_lock, flags); | ||
394 | |||
395 | return ret; | ||
396 | } | ||
397 | EXPORT_SYMBOL(qe_muram_free); | ||
398 | |||
399 | /* not sure if this is ever needed */ | ||
400 | unsigned long qe_muram_alloc_fixed(unsigned long offset, int size) | ||
401 | { | ||
402 | unsigned long start; | ||
403 | unsigned long flags; | ||
404 | |||
405 | spin_lock_irqsave(&qe_muram_lock, flags); | ||
406 | start = rh_alloc_fixed(&qe_muram_info, offset, size, "commproc"); | ||
407 | spin_unlock_irqrestore(&qe_muram_lock, flags); | ||
408 | |||
409 | return start; | ||
410 | } | ||
411 | EXPORT_SYMBOL(qe_muram_alloc_fixed); | ||
412 | |||
413 | void qe_muram_dump(void) | ||
414 | { | ||
415 | rh_dump(&qe_muram_info); | ||
416 | } | ||
417 | EXPORT_SYMBOL(qe_muram_dump); | ||
418 | |||
419 | /* The maximum number of RISCs we support */ | 327 | /* The maximum number of RISCs we support */ |
420 | #define MAX_QE_RISC 2 | 328 | #define MAX_QE_RISC 2 |
421 | 329 | ||
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c index f59444d3be75..63cdf9887f36 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_ic.c +++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c | |||
@@ -329,21 +329,19 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags, | |||
329 | struct resource res; | 329 | struct resource res; |
330 | u32 temp = 0, ret, high_active = 0; | 330 | u32 temp = 0, ret, high_active = 0; |
331 | 331 | ||
332 | ret = of_address_to_resource(node, 0, &res); | ||
333 | if (ret) | ||
334 | return; | ||
335 | |||
332 | qe_ic = alloc_bootmem(sizeof(struct qe_ic)); | 336 | qe_ic = alloc_bootmem(sizeof(struct qe_ic)); |
333 | if (qe_ic == NULL) | 337 | if (qe_ic == NULL) |
334 | return; | 338 | return; |
335 | 339 | ||
336 | memset(qe_ic, 0, sizeof(struct qe_ic)); | 340 | memset(qe_ic, 0, sizeof(struct qe_ic)); |
337 | 341 | ||
338 | qe_ic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, | 342 | qe_ic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, |
339 | NR_QE_IC_INTS, &qe_ic_host_ops, 0); | 343 | NR_QE_IC_INTS, &qe_ic_host_ops, 0); |
340 | if (qe_ic->irqhost == NULL) { | 344 | if (qe_ic->irqhost == NULL) |
341 | of_node_put(node); | ||
342 | return; | ||
343 | } | ||
344 | |||
345 | ret = of_address_to_resource(node, 0, &res); | ||
346 | if (ret) | ||
347 | return; | 345 | return; |
348 | 346 | ||
349 | qe_ic->regs = ioremap(res.start, res.end - res.start + 1); | 347 | qe_ic->regs = ioremap(res.start, res.end - res.start + 1); |
diff --git a/arch/powerpc/sysdev/qe_lib/qe_io.c b/arch/powerpc/sysdev/qe_lib/qe_io.c index 93916a48afec..7c87460179ef 100644 --- a/arch/powerpc/sysdev/qe_lib/qe_io.c +++ b/arch/powerpc/sysdev/qe_lib/qe_io.c | |||
@@ -28,21 +28,7 @@ | |||
28 | 28 | ||
29 | #undef DEBUG | 29 | #undef DEBUG |
30 | 30 | ||
31 | #define NUM_OF_PINS 32 | 31 | static struct qe_pio_regs __iomem *par_io; |
32 | |||
33 | struct port_regs { | ||
34 | __be32 cpodr; /* Open drain register */ | ||
35 | __be32 cpdata; /* Data register */ | ||
36 | __be32 cpdir1; /* Direction register */ | ||
37 | __be32 cpdir2; /* Direction register */ | ||
38 | __be32 cppar1; /* Pin assignment register */ | ||
39 | __be32 cppar2; /* Pin assignment register */ | ||
40 | #ifdef CONFIG_PPC_85xx | ||
41 | u8 pad[8]; | ||
42 | #endif | ||
43 | }; | ||
44 | |||
45 | static struct port_regs __iomem *par_io; | ||
46 | static int num_par_io_ports = 0; | 32 | static int num_par_io_ports = 0; |
47 | 33 | ||
48 | int par_io_init(struct device_node *np) | 34 | int par_io_init(struct device_node *np) |
@@ -64,69 +50,79 @@ int par_io_init(struct device_node *np) | |||
64 | return 0; | 50 | return 0; |
65 | } | 51 | } |
66 | 52 | ||
67 | int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, | 53 | void __par_io_config_pin(struct qe_pio_regs __iomem *par_io, u8 pin, int dir, |
68 | int assignment, int has_irq) | 54 | int open_drain, int assignment, int has_irq) |
69 | { | 55 | { |
70 | u32 pin_mask1bit, pin_mask2bits, new_mask2bits, tmp_val; | 56 | u32 pin_mask1bit; |
71 | 57 | u32 pin_mask2bits; | |
72 | if (!par_io) | 58 | u32 new_mask2bits; |
73 | return -1; | 59 | u32 tmp_val; |
74 | 60 | ||
75 | /* calculate pin location for single and 2 bits information */ | 61 | /* calculate pin location for single and 2 bits information */ |
76 | pin_mask1bit = (u32) (1 << (NUM_OF_PINS - (pin + 1))); | 62 | pin_mask1bit = (u32) (1 << (QE_PIO_PINS - (pin + 1))); |
77 | 63 | ||
78 | /* Set open drain, if required */ | 64 | /* Set open drain, if required */ |
79 | tmp_val = in_be32(&par_io[port].cpodr); | 65 | tmp_val = in_be32(&par_io->cpodr); |
80 | if (open_drain) | 66 | if (open_drain) |
81 | out_be32(&par_io[port].cpodr, pin_mask1bit | tmp_val); | 67 | out_be32(&par_io->cpodr, pin_mask1bit | tmp_val); |
82 | else | 68 | else |
83 | out_be32(&par_io[port].cpodr, ~pin_mask1bit & tmp_val); | 69 | out_be32(&par_io->cpodr, ~pin_mask1bit & tmp_val); |
84 | 70 | ||
85 | /* define direction */ | 71 | /* define direction */ |
86 | tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? | 72 | tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ? |
87 | in_be32(&par_io[port].cpdir2) : | 73 | in_be32(&par_io->cpdir2) : |
88 | in_be32(&par_io[port].cpdir1); | 74 | in_be32(&par_io->cpdir1); |
89 | 75 | ||
90 | /* get all bits mask for 2 bit per port */ | 76 | /* get all bits mask for 2 bit per port */ |
91 | pin_mask2bits = (u32) (0x3 << (NUM_OF_PINS - | 77 | pin_mask2bits = (u32) (0x3 << (QE_PIO_PINS - |
92 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | 78 | (pin % (QE_PIO_PINS / 2) + 1) * 2)); |
93 | 79 | ||
94 | /* Get the final mask we need for the right definition */ | 80 | /* Get the final mask we need for the right definition */ |
95 | new_mask2bits = (u32) (dir << (NUM_OF_PINS - | 81 | new_mask2bits = (u32) (dir << (QE_PIO_PINS - |
96 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | 82 | (pin % (QE_PIO_PINS / 2) + 1) * 2)); |
97 | 83 | ||
98 | /* clear and set 2 bits mask */ | 84 | /* clear and set 2 bits mask */ |
99 | if (pin > (NUM_OF_PINS / 2) - 1) { | 85 | if (pin > (QE_PIO_PINS / 2) - 1) { |
100 | out_be32(&par_io[port].cpdir2, | 86 | out_be32(&par_io->cpdir2, |
101 | ~pin_mask2bits & tmp_val); | 87 | ~pin_mask2bits & tmp_val); |
102 | tmp_val &= ~pin_mask2bits; | 88 | tmp_val &= ~pin_mask2bits; |
103 | out_be32(&par_io[port].cpdir2, new_mask2bits | tmp_val); | 89 | out_be32(&par_io->cpdir2, new_mask2bits | tmp_val); |
104 | } else { | 90 | } else { |
105 | out_be32(&par_io[port].cpdir1, | 91 | out_be32(&par_io->cpdir1, |
106 | ~pin_mask2bits & tmp_val); | 92 | ~pin_mask2bits & tmp_val); |
107 | tmp_val &= ~pin_mask2bits; | 93 | tmp_val &= ~pin_mask2bits; |
108 | out_be32(&par_io[port].cpdir1, new_mask2bits | tmp_val); | 94 | out_be32(&par_io->cpdir1, new_mask2bits | tmp_val); |
109 | } | 95 | } |
110 | /* define pin assignment */ | 96 | /* define pin assignment */ |
111 | tmp_val = (pin > (NUM_OF_PINS / 2) - 1) ? | 97 | tmp_val = (pin > (QE_PIO_PINS / 2) - 1) ? |
112 | in_be32(&par_io[port].cppar2) : | 98 | in_be32(&par_io->cppar2) : |
113 | in_be32(&par_io[port].cppar1); | 99 | in_be32(&par_io->cppar1); |
114 | 100 | ||
115 | new_mask2bits = (u32) (assignment << (NUM_OF_PINS - | 101 | new_mask2bits = (u32) (assignment << (QE_PIO_PINS - |
116 | (pin % (NUM_OF_PINS / 2) + 1) * 2)); | 102 | (pin % (QE_PIO_PINS / 2) + 1) * 2)); |
117 | /* clear and set 2 bits mask */ | 103 | /* clear and set 2 bits mask */ |
118 | if (pin > (NUM_OF_PINS / 2) - 1) { | 104 | if (pin > (QE_PIO_PINS / 2) - 1) { |
119 | out_be32(&par_io[port].cppar2, | 105 | out_be32(&par_io->cppar2, |
120 | ~pin_mask2bits & tmp_val); | 106 | ~pin_mask2bits & tmp_val); |
121 | tmp_val &= ~pin_mask2bits; | 107 | tmp_val &= ~pin_mask2bits; |
122 | out_be32(&par_io[port].cppar2, new_mask2bits | tmp_val); | 108 | out_be32(&par_io->cppar2, new_mask2bits | tmp_val); |
123 | } else { | 109 | } else { |
124 | out_be32(&par_io[port].cppar1, | 110 | out_be32(&par_io->cppar1, |
125 | ~pin_mask2bits & tmp_val); | 111 | ~pin_mask2bits & tmp_val); |
126 | tmp_val &= ~pin_mask2bits; | 112 | tmp_val &= ~pin_mask2bits; |
127 | out_be32(&par_io[port].cppar1, new_mask2bits | tmp_val); | 113 | out_be32(&par_io->cppar1, new_mask2bits | tmp_val); |
128 | } | 114 | } |
115 | } | ||
116 | EXPORT_SYMBOL(__par_io_config_pin); | ||
117 | |||
118 | int par_io_config_pin(u8 port, u8 pin, int dir, int open_drain, | ||
119 | int assignment, int has_irq) | ||
120 | { | ||
121 | if (!par_io || port >= num_par_io_ports) | ||
122 | return -EINVAL; | ||
129 | 123 | ||
124 | __par_io_config_pin(&par_io[port], pin, dir, open_drain, assignment, | ||
125 | has_irq); | ||
130 | return 0; | 126 | return 0; |
131 | } | 127 | } |
132 | EXPORT_SYMBOL(par_io_config_pin); | 128 | EXPORT_SYMBOL(par_io_config_pin); |
@@ -137,10 +133,10 @@ int par_io_data_set(u8 port, u8 pin, u8 val) | |||
137 | 133 | ||
138 | if (port >= num_par_io_ports) | 134 | if (port >= num_par_io_ports) |
139 | return -EINVAL; | 135 | return -EINVAL; |
140 | if (pin >= NUM_OF_PINS) | 136 | if (pin >= QE_PIO_PINS) |
141 | return -EINVAL; | 137 | return -EINVAL; |
142 | /* calculate pin location */ | 138 | /* calculate pin location */ |
143 | pin_mask = (u32) (1 << (NUM_OF_PINS - 1 - pin)); | 139 | pin_mask = (u32) (1 << (QE_PIO_PINS - 1 - pin)); |
144 | 140 | ||
145 | tmp_val = in_be32(&par_io[port].cpdata); | 141 | tmp_val = in_be32(&par_io[port].cpdata); |
146 | 142 | ||
diff --git a/arch/powerpc/sysdev/qe_lib/ucc.c b/arch/powerpc/sysdev/qe_lib/ucc.c index 0e348d9af8a6..d3c7f5af9bc8 100644 --- a/arch/powerpc/sysdev/qe_lib/ucc.c +++ b/arch/powerpc/sysdev/qe_lib/ucc.c | |||
@@ -26,7 +26,8 @@ | |||
26 | #include <asm/qe.h> | 26 | #include <asm/qe.h> |
27 | #include <asm/ucc.h> | 27 | #include <asm/ucc.h> |
28 | 28 | ||
29 | static DEFINE_SPINLOCK(ucc_lock); | 29 | DEFINE_SPINLOCK(cmxgcr_lock); |
30 | EXPORT_SYMBOL(cmxgcr_lock); | ||
30 | 31 | ||
31 | int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) | 32 | int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) |
32 | { | 33 | { |
@@ -35,10 +36,10 @@ int ucc_set_qe_mux_mii_mng(unsigned int ucc_num) | |||
35 | if (ucc_num > UCC_MAX_NUM - 1) | 36 | if (ucc_num > UCC_MAX_NUM - 1) |
36 | return -EINVAL; | 37 | return -EINVAL; |
37 | 38 | ||
38 | spin_lock_irqsave(&ucc_lock, flags); | 39 | spin_lock_irqsave(&cmxgcr_lock, flags); |
39 | clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, | 40 | clrsetbits_be32(&qe_immr->qmx.cmxgcr, QE_CMXGCR_MII_ENET_MNG, |
40 | ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT); | 41 | ucc_num << QE_CMXGCR_MII_ENET_MNG_SHIFT); |
41 | spin_unlock_irqrestore(&ucc_lock, flags); | 42 | spin_unlock_irqrestore(&cmxgcr_lock, flags); |
42 | 43 | ||
43 | return 0; | 44 | return 0; |
44 | } | 45 | } |
diff --git a/arch/powerpc/sysdev/qe_lib/usb.c b/arch/powerpc/sysdev/qe_lib/usb.c new file mode 100644 index 000000000000..8105462078eb --- /dev/null +++ b/arch/powerpc/sysdev/qe_lib/usb.c | |||
@@ -0,0 +1,55 @@ | |||
1 | /* | ||
2 | * QE USB routines | ||
3 | * | ||
4 | * Copyright (c) Freescale Semicondutor, Inc. 2006. | ||
5 | * Shlomi Gridish <gridish@freescale.com> | ||
6 | * Jerry Huang <Chang-Ming.Huang@freescale.com> | ||
7 | * Copyright (c) MontaVista Software, Inc. 2008. | ||
8 | * Anton Vorontsov <avorontsov@ru.mvista.com> | ||
9 | * | ||
10 | * This program is free software; you can redistribute it and/or modify it | ||
11 | * under the terms of the GNU General Public License as published by the | ||
12 | * Free Software Foundation; either version 2 of the License, or (at your | ||
13 | * option) any later version. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/errno.h> | ||
18 | #include <linux/io.h> | ||
19 | #include <asm/immap_qe.h> | ||
20 | #include <asm/qe.h> | ||
21 | |||
22 | int qe_usb_clock_set(enum qe_clock clk, int rate) | ||
23 | { | ||
24 | struct qe_mux __iomem *mux = &qe_immr->qmx; | ||
25 | unsigned long flags; | ||
26 | u32 val; | ||
27 | |||
28 | switch (clk) { | ||
29 | case QE_CLK3: val = QE_CMXGCR_USBCS_CLK3; break; | ||
30 | case QE_CLK5: val = QE_CMXGCR_USBCS_CLK5; break; | ||
31 | case QE_CLK7: val = QE_CMXGCR_USBCS_CLK7; break; | ||
32 | case QE_CLK9: val = QE_CMXGCR_USBCS_CLK9; break; | ||
33 | case QE_CLK13: val = QE_CMXGCR_USBCS_CLK13; break; | ||
34 | case QE_CLK17: val = QE_CMXGCR_USBCS_CLK17; break; | ||
35 | case QE_CLK19: val = QE_CMXGCR_USBCS_CLK19; break; | ||
36 | case QE_CLK21: val = QE_CMXGCR_USBCS_CLK21; break; | ||
37 | case QE_BRG9: val = QE_CMXGCR_USBCS_BRG9; break; | ||
38 | case QE_BRG10: val = QE_CMXGCR_USBCS_BRG10; break; | ||
39 | default: | ||
40 | pr_err("%s: requested unknown clock %d\n", __func__, clk); | ||
41 | return -EINVAL; | ||
42 | } | ||
43 | |||
44 | if (qe_clock_is_brg(clk)) | ||
45 | qe_setbrg(clk, rate, 1); | ||
46 | |||
47 | spin_lock_irqsave(&cmxgcr_lock, flags); | ||
48 | |||
49 | clrsetbits_be32(&mux->cmxgcr, QE_CMXGCR_USBCS, val); | ||
50 | |||
51 | spin_unlock_irqrestore(&cmxgcr_lock, flags); | ||
52 | |||
53 | return 0; | ||
54 | } | ||
55 | EXPORT_SYMBOL(qe_usb_clock_set); | ||
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c index ac1a72dc21e5..24e1f5a197ae 100644 --- a/arch/powerpc/sysdev/tsi108_pci.c +++ b/arch/powerpc/sysdev/tsi108_pci.c | |||
@@ -426,11 +426,10 @@ void __init tsi108_pci_int_init(struct device_node *node) | |||
426 | { | 426 | { |
427 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); | 427 | DBG("Tsi108_pci_int_init: initializing PCI interrupts\n"); |
428 | 428 | ||
429 | pci_irq_host = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LEGACY, | 429 | pci_irq_host = irq_alloc_host(node, IRQ_HOST_MAP_LEGACY, |
430 | 0, &pci_irq_host_ops, 0); | 430 | 0, &pci_irq_host_ops, 0); |
431 | if (pci_irq_host == NULL) { | 431 | if (pci_irq_host == NULL) { |
432 | printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n"); | 432 | printk(KERN_ERR "pci_irq_host: failed to allocate irq host !\n"); |
433 | of_node_put(node); | ||
434 | return; | 433 | return; |
435 | } | 434 | } |
436 | 435 | ||
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c index 625b275c3795..d35405c59434 100644 --- a/arch/powerpc/sysdev/uic.c +++ b/arch/powerpc/sysdev/uic.c | |||
@@ -280,12 +280,10 @@ static struct uic * __init uic_init_one(struct device_node *node) | |||
280 | } | 280 | } |
281 | uic->dcrbase = *dcrreg; | 281 | uic->dcrbase = *dcrreg; |
282 | 282 | ||
283 | uic->irqhost = irq_alloc_host(of_node_get(node), IRQ_HOST_MAP_LINEAR, | 283 | uic->irqhost = irq_alloc_host(node, IRQ_HOST_MAP_LINEAR, |
284 | NR_UIC_INTS, &uic_host_ops, -1); | 284 | NR_UIC_INTS, &uic_host_ops, -1); |
285 | if (! uic->irqhost) { | 285 | if (! uic->irqhost) |
286 | of_node_put(node); | ||
287 | return NULL; /* FIXME: panic? */ | 286 | return NULL; /* FIXME: panic? */ |
288 | } | ||
289 | 287 | ||
290 | uic->irqhost->host_data = uic; | 288 | uic->irqhost->host_data = uic; |
291 | 289 | ||
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c index bfcf70ee8959..34c3d0688fe0 100644 --- a/arch/powerpc/xmon/xmon.c +++ b/arch/powerpc/xmon/xmon.c | |||
@@ -54,7 +54,7 @@ | |||
54 | #define skipbl xmon_skipbl | 54 | #define skipbl xmon_skipbl |
55 | 55 | ||
56 | #ifdef CONFIG_SMP | 56 | #ifdef CONFIG_SMP |
57 | cpumask_t cpus_in_xmon = CPU_MASK_NONE; | 57 | static cpumask_t cpus_in_xmon = CPU_MASK_NONE; |
58 | static unsigned long xmon_taken = 1; | 58 | static unsigned long xmon_taken = 1; |
59 | static int xmon_owner; | 59 | static int xmon_owner; |
60 | static int xmon_gate; | 60 | static int xmon_gate; |
@@ -154,7 +154,7 @@ static int do_spu_cmd(void); | |||
154 | static void dump_tlb_44x(void); | 154 | static void dump_tlb_44x(void); |
155 | #endif | 155 | #endif |
156 | 156 | ||
157 | int xmon_no_auto_backtrace; | 157 | static int xmon_no_auto_backtrace; |
158 | 158 | ||
159 | extern void xmon_enter(void); | 159 | extern void xmon_enter(void); |
160 | extern void xmon_leave(void); | 160 | extern void xmon_leave(void); |
@@ -327,6 +327,11 @@ static void release_output_lock(void) | |||
327 | { | 327 | { |
328 | xmon_speaker = 0; | 328 | xmon_speaker = 0; |
329 | } | 329 | } |
330 | |||
331 | int cpus_are_in_xmon(void) | ||
332 | { | ||
333 | return !cpus_empty(cpus_in_xmon); | ||
334 | } | ||
330 | #endif | 335 | #endif |
331 | 336 | ||
332 | static int xmon_core(struct pt_regs *regs, int fromipi) | 337 | static int xmon_core(struct pt_regs *regs, int fromipi) |
@@ -593,7 +598,7 @@ static int xmon_iabr_match(struct pt_regs *regs) | |||
593 | { | 598 | { |
594 | if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) | 599 | if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF)) |
595 | return 0; | 600 | return 0; |
596 | if (iabr == 0) | 601 | if (iabr == NULL) |
597 | return 0; | 602 | return 0; |
598 | xmon_core(regs, 0); | 603 | xmon_core(regs, 0); |
599 | return 1; | 604 | return 1; |
@@ -1142,7 +1147,7 @@ bpt_cmds(void) | |||
1142 | } else { | 1147 | } else { |
1143 | /* assume a breakpoint address */ | 1148 | /* assume a breakpoint address */ |
1144 | bp = at_breakpoint(a); | 1149 | bp = at_breakpoint(a); |
1145 | if (bp == 0) { | 1150 | if (bp == NULL) { |
1146 | printf("No breakpoint at %x\n", a); | 1151 | printf("No breakpoint at %x\n", a); |
1147 | break; | 1152 | break; |
1148 | } | 1153 | } |
@@ -1370,7 +1375,7 @@ static void print_bug_trap(struct pt_regs *regs) | |||
1370 | #endif | 1375 | #endif |
1371 | } | 1376 | } |
1372 | 1377 | ||
1373 | void excprint(struct pt_regs *fp) | 1378 | static void excprint(struct pt_regs *fp) |
1374 | { | 1379 | { |
1375 | unsigned long trap; | 1380 | unsigned long trap; |
1376 | 1381 | ||
@@ -1408,7 +1413,7 @@ void excprint(struct pt_regs *fp) | |||
1408 | print_bug_trap(fp); | 1413 | print_bug_trap(fp); |
1409 | } | 1414 | } |
1410 | 1415 | ||
1411 | void prregs(struct pt_regs *fp) | 1416 | static void prregs(struct pt_regs *fp) |
1412 | { | 1417 | { |
1413 | int n, trap; | 1418 | int n, trap; |
1414 | unsigned long base; | 1419 | unsigned long base; |
@@ -1463,7 +1468,7 @@ void prregs(struct pt_regs *fp) | |||
1463 | printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); | 1468 | printf("dar = "REG" dsisr = %.8lx\n", fp->dar, fp->dsisr); |
1464 | } | 1469 | } |
1465 | 1470 | ||
1466 | void cacheflush(void) | 1471 | static void cacheflush(void) |
1467 | { | 1472 | { |
1468 | int cmd; | 1473 | int cmd; |
1469 | unsigned long nflush; | 1474 | unsigned long nflush; |
@@ -1495,7 +1500,7 @@ void cacheflush(void) | |||
1495 | catch_memory_errors = 0; | 1500 | catch_memory_errors = 0; |
1496 | } | 1501 | } |
1497 | 1502 | ||
1498 | unsigned long | 1503 | static unsigned long |
1499 | read_spr(int n) | 1504 | read_spr(int n) |
1500 | { | 1505 | { |
1501 | unsigned int instrs[2]; | 1506 | unsigned int instrs[2]; |
@@ -1533,7 +1538,7 @@ read_spr(int n) | |||
1533 | return ret; | 1538 | return ret; |
1534 | } | 1539 | } |
1535 | 1540 | ||
1536 | void | 1541 | static void |
1537 | write_spr(int n, unsigned long val) | 1542 | write_spr(int n, unsigned long val) |
1538 | { | 1543 | { |
1539 | unsigned int instrs[2]; | 1544 | unsigned int instrs[2]; |
@@ -1571,7 +1576,7 @@ static unsigned long regno; | |||
1571 | extern char exc_prolog; | 1576 | extern char exc_prolog; |
1572 | extern char dec_exc; | 1577 | extern char dec_exc; |
1573 | 1578 | ||
1574 | void super_regs(void) | 1579 | static void super_regs(void) |
1575 | { | 1580 | { |
1576 | int cmd; | 1581 | int cmd; |
1577 | unsigned long val; | 1582 | unsigned long val; |
@@ -1629,7 +1634,7 @@ void super_regs(void) | |||
1629 | /* | 1634 | /* |
1630 | * Stuff for reading and writing memory safely | 1635 | * Stuff for reading and writing memory safely |
1631 | */ | 1636 | */ |
1632 | int | 1637 | static int |
1633 | mread(unsigned long adrs, void *buf, int size) | 1638 | mread(unsigned long adrs, void *buf, int size) |
1634 | { | 1639 | { |
1635 | volatile int n; | 1640 | volatile int n; |
@@ -1666,7 +1671,7 @@ mread(unsigned long adrs, void *buf, int size) | |||
1666 | return n; | 1671 | return n; |
1667 | } | 1672 | } |
1668 | 1673 | ||
1669 | int | 1674 | static int |
1670 | mwrite(unsigned long adrs, void *buf, int size) | 1675 | mwrite(unsigned long adrs, void *buf, int size) |
1671 | { | 1676 | { |
1672 | volatile int n; | 1677 | volatile int n; |
@@ -1731,7 +1736,7 @@ static int handle_fault(struct pt_regs *regs) | |||
1731 | 1736 | ||
1732 | #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) | 1737 | #define SWAP(a, b, t) ((t) = (a), (a) = (b), (b) = (t)) |
1733 | 1738 | ||
1734 | void | 1739 | static void |
1735 | byterev(unsigned char *val, int size) | 1740 | byterev(unsigned char *val, int size) |
1736 | { | 1741 | { |
1737 | int t; | 1742 | int t; |
@@ -1793,7 +1798,7 @@ static char *memex_subcmd_help_string = | |||
1793 | " x exit this mode\n" | 1798 | " x exit this mode\n" |
1794 | ""; | 1799 | ""; |
1795 | 1800 | ||
1796 | void | 1801 | static void |
1797 | memex(void) | 1802 | memex(void) |
1798 | { | 1803 | { |
1799 | int cmd, inc, i, nslash; | 1804 | int cmd, inc, i, nslash; |
@@ -1944,7 +1949,7 @@ memex(void) | |||
1944 | } | 1949 | } |
1945 | } | 1950 | } |
1946 | 1951 | ||
1947 | int | 1952 | static int |
1948 | bsesc(void) | 1953 | bsesc(void) |
1949 | { | 1954 | { |
1950 | int c; | 1955 | int c; |
@@ -1984,7 +1989,7 @@ static void xmon_rawdump (unsigned long adrs, long ndump) | |||
1984 | #define isxdigit(c) (('0' <= (c) && (c) <= '9') \ | 1989 | #define isxdigit(c) (('0' <= (c) && (c) <= '9') \ |
1985 | || ('a' <= (c) && (c) <= 'f') \ | 1990 | || ('a' <= (c) && (c) <= 'f') \ |
1986 | || ('A' <= (c) && (c) <= 'F')) | 1991 | || ('A' <= (c) && (c) <= 'F')) |
1987 | void | 1992 | static void |
1988 | dump(void) | 1993 | dump(void) |
1989 | { | 1994 | { |
1990 | int c; | 1995 | int c; |
@@ -2022,7 +2027,7 @@ dump(void) | |||
2022 | } | 2027 | } |
2023 | } | 2028 | } |
2024 | 2029 | ||
2025 | void | 2030 | static void |
2026 | prdump(unsigned long adrs, long ndump) | 2031 | prdump(unsigned long adrs, long ndump) |
2027 | { | 2032 | { |
2028 | long n, m, c, r, nr; | 2033 | long n, m, c, r, nr; |
@@ -2066,7 +2071,7 @@ prdump(unsigned long adrs, long ndump) | |||
2066 | 2071 | ||
2067 | typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); | 2072 | typedef int (*instruction_dump_func)(unsigned long inst, unsigned long addr); |
2068 | 2073 | ||
2069 | int | 2074 | static int |
2070 | generic_inst_dump(unsigned long adr, long count, int praddr, | 2075 | generic_inst_dump(unsigned long adr, long count, int praddr, |
2071 | instruction_dump_func dump_func) | 2076 | instruction_dump_func dump_func) |
2072 | { | 2077 | { |
@@ -2104,7 +2109,7 @@ generic_inst_dump(unsigned long adr, long count, int praddr, | |||
2104 | return adr - first_adr; | 2109 | return adr - first_adr; |
2105 | } | 2110 | } |
2106 | 2111 | ||
2107 | int | 2112 | static int |
2108 | ppc_inst_dump(unsigned long adr, long count, int praddr) | 2113 | ppc_inst_dump(unsigned long adr, long count, int praddr) |
2109 | { | 2114 | { |
2110 | return generic_inst_dump(adr, count, praddr, print_insn_powerpc); | 2115 | return generic_inst_dump(adr, count, praddr, print_insn_powerpc); |
@@ -2126,7 +2131,7 @@ static unsigned long mval; /* byte value to set memory to */ | |||
2126 | static unsigned long mcount; /* # bytes to affect */ | 2131 | static unsigned long mcount; /* # bytes to affect */ |
2127 | static unsigned long mdiffs; /* max # differences to print */ | 2132 | static unsigned long mdiffs; /* max # differences to print */ |
2128 | 2133 | ||
2129 | void | 2134 | static void |
2130 | memops(int cmd) | 2135 | memops(int cmd) |
2131 | { | 2136 | { |
2132 | scanhex((void *)&mdest); | 2137 | scanhex((void *)&mdest); |
@@ -2152,7 +2157,7 @@ memops(int cmd) | |||
2152 | } | 2157 | } |
2153 | } | 2158 | } |
2154 | 2159 | ||
2155 | void | 2160 | static void |
2156 | memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) | 2161 | memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) |
2157 | { | 2162 | { |
2158 | unsigned n, prt; | 2163 | unsigned n, prt; |
@@ -2170,7 +2175,7 @@ memdiffs(unsigned char *p1, unsigned char *p2, unsigned nb, unsigned maxpr) | |||
2170 | static unsigned mend; | 2175 | static unsigned mend; |
2171 | static unsigned mask; | 2176 | static unsigned mask; |
2172 | 2177 | ||
2173 | void | 2178 | static void |
2174 | memlocate(void) | 2179 | memlocate(void) |
2175 | { | 2180 | { |
2176 | unsigned a, n; | 2181 | unsigned a, n; |
@@ -2203,7 +2208,7 @@ memlocate(void) | |||
2203 | static unsigned long mskip = 0x1000; | 2208 | static unsigned long mskip = 0x1000; |
2204 | static unsigned long mlim = 0xffffffff; | 2209 | static unsigned long mlim = 0xffffffff; |
2205 | 2210 | ||
2206 | void | 2211 | static void |
2207 | memzcan(void) | 2212 | memzcan(void) |
2208 | { | 2213 | { |
2209 | unsigned char v; | 2214 | unsigned char v; |
@@ -2230,7 +2235,7 @@ memzcan(void) | |||
2230 | printf("%.8x\n", a - mskip); | 2235 | printf("%.8x\n", a - mskip); |
2231 | } | 2236 | } |
2232 | 2237 | ||
2233 | void proccall(void) | 2238 | static void proccall(void) |
2234 | { | 2239 | { |
2235 | unsigned long args[8]; | 2240 | unsigned long args[8]; |
2236 | unsigned long ret; | 2241 | unsigned long ret; |
@@ -2388,7 +2393,7 @@ scanhex(unsigned long *vp) | |||
2388 | return 1; | 2393 | return 1; |
2389 | } | 2394 | } |
2390 | 2395 | ||
2391 | void | 2396 | static void |
2392 | scannl(void) | 2397 | scannl(void) |
2393 | { | 2398 | { |
2394 | int c; | 2399 | int c; |
@@ -2399,7 +2404,7 @@ scannl(void) | |||
2399 | c = inchar(); | 2404 | c = inchar(); |
2400 | } | 2405 | } |
2401 | 2406 | ||
2402 | int hexdigit(int c) | 2407 | static int hexdigit(int c) |
2403 | { | 2408 | { |
2404 | if( '0' <= c && c <= '9' ) | 2409 | if( '0' <= c && c <= '9' ) |
2405 | return c - '0'; | 2410 | return c - '0'; |
@@ -2430,13 +2435,13 @@ getstring(char *s, int size) | |||
2430 | static char line[256]; | 2435 | static char line[256]; |
2431 | static char *lineptr; | 2436 | static char *lineptr; |
2432 | 2437 | ||
2433 | void | 2438 | static void |
2434 | flush_input(void) | 2439 | flush_input(void) |
2435 | { | 2440 | { |
2436 | lineptr = NULL; | 2441 | lineptr = NULL; |
2437 | } | 2442 | } |
2438 | 2443 | ||
2439 | int | 2444 | static int |
2440 | inchar(void) | 2445 | inchar(void) |
2441 | { | 2446 | { |
2442 | if (lineptr == NULL || *lineptr == 0) { | 2447 | if (lineptr == NULL || *lineptr == 0) { |
@@ -2449,7 +2454,7 @@ inchar(void) | |||
2449 | return *lineptr++; | 2454 | return *lineptr++; |
2450 | } | 2455 | } |
2451 | 2456 | ||
2452 | void | 2457 | static void |
2453 | take_input(char *str) | 2458 | take_input(char *str) |
2454 | { | 2459 | { |
2455 | lineptr = str; | 2460 | lineptr = str; |
@@ -2618,7 +2623,8 @@ static void dump_tlb_44x(void) | |||
2618 | } | 2623 | } |
2619 | } | 2624 | } |
2620 | #endif /* CONFIG_44x */ | 2625 | #endif /* CONFIG_44x */ |
2621 | void xmon_init(int enable) | 2626 | |
2627 | static void xmon_init(int enable) | ||
2622 | { | 2628 | { |
2623 | #ifdef CONFIG_PPC_ISERIES | 2629 | #ifdef CONFIG_PPC_ISERIES |
2624 | if (firmware_has_feature(FW_FEATURE_ISERIES)) | 2630 | if (firmware_has_feature(FW_FEATURE_ISERIES)) |