638 files changed, 23565 insertions, 11467 deletions
diff --git a/arch/powerpc/Kconfig b/arch/powerpc/Kconfig
index 631e5a0fb6ab..2729c6663d8a 100644
--- a/arch/powerpc/Kconfig
+++ b/arch/powerpc/Kconfig
@@ -1,15 +1,13 @@
-# For a description of the syntax of this configuration file,
-# see Documentation/kbuild/kconfig-language.txt.
-#
-mainmenu "Linux/PowerPC Kernel Configuration"
 source "arch/powerpc/platforms/Kconfig.cputype"
 config PPC32
        bool
        default y if !PPC64
+config 32BIT
+        bool
+        default y if PPC32
 config 64BIT
        bool
        default y if PPC64
@@ -22,6 +20,9 @@ config WORD_SIZE
 config ARCH_PHYS_ADDR_T_64BIT
       def_bool PPC64 || PHYS_64BIT
+config ARCH_DMA_ADDR_T_64BIT
+        def_bool ARCH_PHYS_ADDR_T_64BIT
 config MMU
        bool
        default y
@@ -35,24 +36,12 @@ config GENERIC_TIME_VSYSCALL
 config GENERIC_CLOCKEVENTS
        def_bool y
-config GENERIC_HARDIRQS
-        bool
-        default y
-config GENERIC_HARDIRQS_NO__DO_IRQ
-        bool
-        default y
 config HAVE_SETUP_PER_CPU_AREA
        def_bool PPC64
 config NEED_PER_CPU_EMBED_FIRST_CHUNK
        def_bool PPC64
-config IRQ_PER_CPU
-        bool
-        default y
 config NR_IRQS
        int "Number of virtual interrupt numbers"
        range 32 32768
@@ -102,10 +91,6 @@ config GENERIC_HWEIGHT
        bool
        default y
-config GENERIC_FIND_NEXT_BIT
-        bool
-        default y
 config GENERIC_GPIO
        bool
        help
@@ -118,7 +103,7 @@ config PPC
        bool
        default y
        select OF
-        select OF_FLATTREE
+        select OF_EARLY_FLATTREE
        select HAVE_FTRACE_MCOUNT_RECORD
        select HAVE_DYNAMIC_FTRACE
        select HAVE_FUNCTION_TRACER
@@ -138,9 +123,17 @@ config PPC
        select HAVE_OPROFILE
        select HAVE_SYSCALL_WRAPPERS if PPC64
        select GENERIC_ATOMIC64 if PPC32
+        select HAVE_IRQ_WORK
        select HAVE_PERF_EVENTS
        select HAVE_REGS_AND_STACK_ACCESS_API
        select HAVE_HW_BREAKPOINT if PERF_EVENTS && PPC_BOOK3S_64
+        select HAVE_GENERIC_HARDIRQS
+        select HAVE_SPARSE_IRQ
+        select IRQ_PER_CPU
+        select GENERIC_IRQ_SHOW
+        select GENERIC_IRQ_SHOW_LEVEL
+        select HAVE_RCU_TABLE_FREE if SMP
+        select HAVE_SYSCALL_TRACEPOINTS
 config EARLY_PRINTK
        bool
@@ -194,6 +187,12 @@ config SYS_SUPPORTS_APM_EMULATION
        default y if PMAC_APM_EMU
        bool
+config EPAPR_BOOT
+        bool
+        help
+          Used to allow a board to specify it wants an ePAPR compliant wrapper.
+        default n
 config DEFAULT_UIMAGE
        bool
        help
@@ -210,7 +209,7 @@ config ARCH_HIBERNATION_POSSIBLE
 config ARCH_SUSPEND_POSSIBLE
        def_bool y
        depends on ADB_PMU || PPC_EFIKA || PPC_LITE5200 || PPC_83xx || \
-                   PPC_85xx || PPC_86xx || PPC_PSERIES
+                   (PPC_85xx && !SMP) || PPC_86xx || PPC_PSERIES || 44x || 40x
 config PPC_DCR_NATIVE
        bool
@@ -390,19 +389,6 @@ config IRQ_ALL_CPUS
          CPU.  Generally saying Y is safe, although some problems have been
          reported with SMP Power Macintoshes with this option enabled.
-config SPARSE_IRQ
-        bool "Support sparse irq numbering"
-        default n
-        help
-          This enables support for sparse irqs. This is useful for distro
-          kernels that want to define a high CONFIG_NR_CPUS value but still
-          want to have low kernel memory footprint on smaller machines.
-          ( Sparse IRQs can also be beneficial on NUMA boxes, as they spread
-            out the irq_desc[] array in a more NUMA-friendly way. )
-          If you don't know what to do here, say N.
 config NUMA
        bool "NUMA support"
        depends on PPC64
@@ -596,13 +582,11 @@ config EXTRA_TARGETS
          If unsure, leave blank
-if !44x || BROKEN
 config ARCH_WANTS_FREEZER_CONTROL
        def_bool y
        depends on ADB_PMU
 source kernel/power/Kconfig
-endif
 config SECCOMP
        bool "Enable seccomp to safely compute untrusted bytecode"
@@ -683,13 +667,25 @@ config FSL_PMC
          Freescale MPC85xx/MPC86xx power management controller support
          (suspend/resume). For MPC83xx see platforms/83xx/suspend.c
+config PPC4xx_CPM
+        bool
+        default y
+        depends on SUSPEND && (44x || 40x)
+        help
+          PPC4xx Clock Power Management (CPM) support (suspend/resume).
+          It also enables support for two different idle states (idle-wait
+          and idle-doze).
 config 4xx_SOC
        bool
 config FSL_LBC
-        bool
+        bool "Freescale Local Bus support"
+        depends on FSL_SOC
        help
-          Freescale Localbus support
+          Enables reporting of errors from the Freescale local bus
+          controller.  Also contains some common code used by
+          drivers for specific local bus peripherals.
 config FSL_GTM
        bool
@@ -777,11 +773,19 @@ config HAS_RAPIDIO
 config RAPIDIO
        bool "RapidIO support"
-        depends on HAS_RAPIDIO
+        depends on HAS_RAPIDIO || PCI
        help
          If you say Y here, the kernel will include drivers and
          infrastructure code to support RapidIO interconnect devices.
+config FSL_RIO
+        bool "Freescale Embedded SRIO Controller support"
+        depends on RAPIDIO && HAS_RAPIDIO
+        default "n"
+        ---help---
+          Include support for RapidIO controller on Freescale embedded
+          processors (MPC8548, MPC8641, etc).
 source "drivers/rapidio/Kconfig"
 endmenu
diff --git a/arch/powerpc/Kconfig.debug b/arch/powerpc/Kconfig.debug
index 2d38a50e66ba..e72dcf6a421d 100644
--- a/arch/powerpc/Kconfig.debug
+++ b/arch/powerpc/Kconfig.debug
@@ -35,27 +35,6 @@ config DEBUG_STACKOVERFLOW
          This option will cause messages to be printed if free stack space
          drops below a certain limit.
-config DEBUG_STACK_USAGE
-        bool "Stack utilization instrumentation"
-        depends on DEBUG_KERNEL
-        help
-          Enables the display of the minimum amount of free stack which each
-          task has ever had available in the sysrq-T and sysrq-P debug output.
-          This option will slow down process creation somewhat.
-config DEBUG_PER_CPU_MAPS
-        bool "Debug access to per_cpu maps"
-        depends on DEBUG_KERNEL
-        depends on SMP
-        default n
-        ---help---
-          Say Y to verify that the per_cpu map being accessed has
-          been setup.  Adds a fair amount of code to kernel memory
-          and decreases performance.
-          Say N if unsure.
 config HCALL_STATS
        bool "Hypervisor call instrumentation"
        depends on PPC_PSERIES && DEBUG_FS && TRACEPOINTS
@@ -267,6 +246,11 @@ config PPC_EARLY_DEBUG_USBGECKO
          Select this to enable early debugging for Nintendo GameCube/Wii
          consoles via an external USB Gecko adapter.
+config PPC_EARLY_DEBUG_WSP
+        bool "Early debugging via WSP's internal UART"
+        depends on PPC_WSP
+        select PPC_UDBG_16550
 endchoice
 config PPC_EARLY_DEBUG_44x_PHYSLOW
diff --git a/arch/powerpc/boot/.gitignore b/arch/powerpc/boot/.gitignore
index 3d80c3e9cf60..12da77ec0228 100644
--- a/arch/powerpc/boot/.gitignore
+++ b/arch/powerpc/boot/.gitignore
@@ -1,5 +1,4 @@
 addnote
-dtc
 empty.c
 hack-coff
 infblock.c
diff --git a/arch/powerpc/boot/Makefile b/arch/powerpc/boot/Makefile
index fae8192c8fcc..c26200b40a47 100644
--- a/arch/powerpc/boot/Makefile
+++ b/arch/powerpc/boot/Makefile
@@ -35,7 +35,7 @@ endif
 BOOTCFLAGS      += -I$(obj) -I$(srctree)/$(obj)
-DTS_FLAGS       ?= -p 1024
+DTC_FLAGS       ?= -p 1024
 $(obj)/4xx.o: BOOTCFLAGS += -mcpu=405
 $(obj)/ebony.o: BOOTCFLAGS += -mcpu=405
@@ -69,7 +69,8 @@ src-wlib := string.S crt0.S crtsavres.S stdio.c main.c \
                cpm-serial.c stdlib.c mpc52xx-psc.c planetcore.c uartlite.c \
                fsl-soc.c mpc8xx.c pq2.c ugecon.c
 src-plat := of.c cuboot-52xx.c cuboot-824x.c cuboot-83xx.c cuboot-85xx.c holly.c \
-                cuboot-ebony.c cuboot-hotfoot.c treeboot-ebony.c prpmc2800.c \
+                cuboot-ebony.c cuboot-hotfoot.c epapr.c treeboot-ebony.c \
+                prpmc2800.c \
                ps3-head.S ps3-hvcall.S ps3.c treeboot-bamboo.c cuboot-8xx.c \
                cuboot-pq2.c cuboot-sequoia.c treeboot-walnut.c \
                cuboot-bamboo.c cuboot-mpc7448hpc2.c cuboot-taishan.c \
@@ -127,7 +128,7 @@ quiet_cmd_bootas = BOOTAS  $@
      cmd_bootas = $(CROSS32CC) -Wp,-MD,$(depfile) $(BOOTAFLAGS) -c -o $@ $<
 quiet_cmd_bootar = BOOTAR  $@
-      cmd_bootar = $(CROSS32AR) -cr $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@
+      cmd_bootar = $(CROSS32AR) -cr$(KBUILD_ARFLAGS) $@.$$$$ $(filter-out FORCE,$^); mv $@.$$$$ $@
 $(obj-libfdt): $(obj)/%.o: $(srctree)/scripts/dtc/libfdt/%.c FORCE
        $(call if_changed_dep,bootcc)
@@ -182,6 +183,7 @@ image-$(CONFIG_PPC_HOLLY)		+= dtbImage.holly
 image-$(CONFIG_PPC_PRPMC2800)           += dtbImage.prpmc2800
 image-$(CONFIG_PPC_ISERIES)             += zImage.iseries
 image-$(CONFIG_DEFAULT_UIMAGE)          += uImage
+image-$(CONFIG_EPAPR_BOOT)              += zImage.epapr
 #
 # Targets which embed a device tree blob
@@ -332,10 +334,8 @@ $(obj)/treeImage.%: vmlinux $(obj)/%.dtb $(wrapperbits)
        $(call if_changed,wrap,treeboot-$*,,$(obj)/$*.dtb)
 # Rule to build device tree blobs
-DTC = $(objtree)/scripts/dtc/dtc
+$(obj)/%.dtb: $(src)/dts/%.dts
+        $(call cmd,dtc)
-$(obj)/%.dtb: $(dtstree)/%.dts
-        $(DTC) -O dtb -o $(obj)/$*.dtb -b 0 $(DTS_FLAGS) $(dtstree)/$*.dts
 # If there isn't a platform selected then just strip the vmlinux.
 ifeq (,$(image-y))
@@ -370,7 +370,7 @@ INSTALL := install
 extra-installed         := $(patsubst $(obj)/%, $(DESTDIR)$(WRAPPER_OBJDIR)/%, $(extra-y))
 hostprogs-installed     := $(patsubst %, $(DESTDIR)$(WRAPPER_BINDIR)/%, $(hostprogs-y))
 wrapper-installed       := $(DESTDIR)$(WRAPPER_BINDIR)/wrapper
-dts-installed           := $(patsubst $(obj)/dts/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(obj)/dts/*.dts))
+dts-installed           := $(patsubst $(dtstree)/%, $(DESTDIR)$(WRAPPER_DTSDIR)/%, $(wildcard $(dtstree)/*.dts))
 all-installed           := $(extra-installed) $(hostprogs-installed) $(wrapper-installed) $(dts-installed)
diff --git a/arch/powerpc/boot/addnote.c b/arch/powerpc/boot/addnote.c
index b1e5611b2ab1..349b5530d2c4 100644
--- a/arch/powerpc/boot/addnote.c
+++ b/arch/powerpc/boot/addnote.c
@@ -20,7 +20,7 @@
 #include <string.h>
 /* CHRP note section */
-char arch[] = "PowerPC";
+static const char arch[] = "PowerPC";
 #define N_DESCR 6
 unsigned int descr[N_DESCR] = {
@@ -33,7 +33,7 @@ unsigned int descr[N_DESCR] = {
 };
 /* RPA note section */
-char rpaname[] = "IBM,RPA-Client-Config";
+static const char rpaname[] = "IBM,RPA-Client-Config";
 /*
 * Note: setting ignore_my_client_config *should* mean that OF ignores
diff --git a/arch/powerpc/boot/crt0.S b/arch/powerpc/boot/crt0.S
index f1c4dfc635be..0f7428a37efb 100644
--- a/arch/powerpc/boot/crt0.S
+++ b/arch/powerpc/boot/crt0.S
@@ -6,16 +6,28 @@
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 *
- * NOTE: this code runs in 32 bit mode and is packaged as ELF32.
+ * NOTE: this code runs in 32 bit mode, is position-independent,
+ * and is packaged as ELF32.
 */
 #include "ppc_asm.h"
        .text
-        /* a procedure descriptor used when booting this as a COFF file */
+        /* A procedure descriptor used when booting this as a COFF file.
+         * When making COFF, this comes first in the link and we're
+         * linked at 0x500000.
+         */
        .globl  _zimage_start_opd
 _zimage_start_opd:
-        .long   _zimage_start, 0, 0, 0
+        .long   0x500000, 0, 0, 0
+p_start:        .long   _start
+p_etext:        .long   _etext
+p_bss_start:    .long   __bss_start
+p_end:          .long   _end
+        .weak   _platform_stack_top
+p_pstack:       .long   _platform_stack_top
        .weak   _zimage_start
        .globl  _zimage_start
@@ -24,37 +36,65 @@ _zimage_start:
 _zimage_start_lib:
        /* Work out the offset between the address we were linked at
           and the address where we're running. */
-        bl      1f
+        bl      .+4
-1:      mflr    r0
+p_base: mflr    r10             /* r10 now points to runtime addr of p_base */
-        lis     r9,1b@ha
+        /* grab the link address of the dynamic section in r11 */
-        addi    r9,r9,1b@l
+        addis   r11,r10,(_GLOBAL_OFFSET_TABLE_-p_base)@ha
-        subf.   r0,r9,r0
+        lwz     r11,(_GLOBAL_OFFSET_TABLE_-p_base)@l(r11)
-        beq     3f              /* if running at same address as linked */
+        cmpwi   r11,0
+        beq     3f              /* if not linked -pie */
+        /* get the runtime address of the dynamic section in r12 */
+        .weak   __dynamic_start
+        addis   r12,r10,(__dynamic_start-p_base)@ha
+        addi    r12,r12,(__dynamic_start-p_base)@l
+        subf    r11,r11,r12     /* runtime - linktime offset */
+        /* The dynamic section contains a series of tagged entries.
+         * We need the RELA and RELACOUNT entries. */
+RELA = 7
+RELACOUNT = 0x6ffffff9
+        li      r9,0
+        li      r0,0
+9:      lwz     r8,0(r12)       /* get tag */
+        cmpwi   r8,0
+        beq     10f             /* end of list */
+        cmpwi   r8,RELA
+        bne     11f
+        lwz     r9,4(r12)       /* get RELA pointer in r9 */
+        b       12f
+11:     addis   r8,r8,(-RELACOUNT)@ha
+        cmpwi   r8,RELACOUNT@l
+        bne     12f
+        lwz     r0,4(r12)       /* get RELACOUNT value in r0 */
+12:     addi    r12,r12,8
+        b       9b
-        /* The .got2 section contains a list of addresses, so add
+        /* The relocation section contains a list of relocations.
-           the address offset onto each entry. */
+         * We now do the R_PPC_RELATIVE ones, which point to words
-        lis     r9,__got2_start@ha
+         * which need to be initialized with addend + offset.
-        addi    r9,r9,__got2_start@l
+         * The R_PPC_RELATIVE ones come first and there are RELACOUNT
-        lis     r8,__got2_end@ha
+         * of them. */
-        addi    r8,r8,__got2_end@l
+10:     /* skip relocation if we don't have both */
-        subf.   r8,r9,r8
+        cmpwi   r0,0
        beq     3f
-        srwi.   r8,r8,2
+        cmpwi   r9,0
-        mtctr   r8
+        beq     3f
-        add     r9,r0,r9
-2:      lwz     r8,0(r9)
+        add     r9,r9,r11       /* Relocate RELA pointer */
-        add     r8,r8,r0
+        mtctr   r0
-        stw     r8,0(r9)
+2:      lbz     r0,4+3(r9)      /* ELF32_R_INFO(reloc->r_info) */
-        addi    r9,r9,4
+        cmpwi   r0,22           /* R_PPC_RELATIVE */
+        bne     3f
+        lwz     r12,0(r9)       /* reloc->r_offset */
+        lwz     r0,8(r9)        /* reloc->r_addend */
+        add     r0,r0,r11
+        stwx    r0,r11,r12
+        addi    r9,r9,12
        bdnz    2b
        /* Do a cache flush for our text, in case the loader didn't */
-3:      lis     r9,_start@ha
+3:      lwz     r9,p_start-p_base(r10)  /* note: these are relocated now */
-        addi    r9,r9,_start@l
+        lwz     r8,p_etext-p_base(r10)
-        add     r9,r0,r9
-        lis     r8,_etext@ha
-        addi    r8,r8,_etext@l
-        add     r8,r0,r8
 4:      dcbf    r0,r9
        icbi    r0,r9
        addi    r9,r9,0x20
@@ -64,27 +104,19 @@ _zimage_start_lib:
        isync
        /* Clear the BSS */
-        lis     r9,__bss_start@ha
+        lwz     r9,p_bss_start-p_base(r10)
-        addi    r9,r9,__bss_start@l
+        lwz     r8,p_end-p_base(r10)
-        add     r9,r0,r9
+        li      r0,0
-        lis     r8,_end@ha
+5:      stw     r0,0(r9)
-        addi    r8,r8,_end@l
-        add     r8,r0,r8
-        li      r10,0
-5:      stw     r10,0(r9)
        addi    r9,r9,4
        cmplw   cr0,r9,r8
        blt     5b
        /* Possibly set up a custom stack */
-.weak   _platform_stack_top
+        lwz     r8,p_pstack-p_base(r10)
-        lis     r8,_platform_stack_top@ha
-        addi    r8,r8,_platform_stack_top@l
        cmpwi   r8,0
        beq     6f
-        add     r8,r0,r8
        lwz     r1,0(r8)
-        add     r1,r0,r1
        li      r0,0
        stwu    r0,-16(r1)      /* establish a stack frame */
 6:
diff --git a/arch/powerpc/boot/div64.S b/arch/powerpc/boot/div64.S
index 722f360a32a9..d271ab542673 100644
--- a/arch/powerpc/boot/div64.S
+++ b/arch/powerpc/boot/div64.S
@@ -33,9 +33,10 @@ __div64_32:
        cntlzw  r0,r5           # we are shifting the dividend right
        li      r10,-1          # to make it < 2^32, and shifting
        srw     r10,r10,r0      # the divisor right the same amount,
-        add     r9,r4,r10       # rounding up (so the estimate cannot
+        addc    r9,r4,r10       # rounding up (so the estimate cannot
        andc    r11,r6,r10      # ever be too large, only too small)
        andc    r9,r9,r10
+        addze   r9,r9
        or      r11,r5,r11
        rotlw   r9,r9,r0
        rotlw   r11,r11,r0
diff --git a/arch/powerpc/boot/dtc-src/.gitignore b/arch/powerpc/boot/dtc-src/.gitignore
deleted file mode 100644
index a7c3f94e5e75..000000000000
--- a/arch/powerpc/boot/dtc-src/.gitignore
+++ /dev/null
@@ -1,3 +0,0 @@
-dtc-lexer.lex.c
-dtc-parser.tab.c
-dtc-parser.tab.h
diff --git a/arch/powerpc/boot/dts/bluestone.dts b/arch/powerpc/boot/dts/bluestone.dts
new file mode 100644
index 000000000000..2a56a0dbd1f7
--- /dev/null
+++ b/arch/powerpc/boot/dts/bluestone.dts
@@ -0,0 +1,254 @@
+/*
+ * Device Tree for Bluestone (APM821xx) board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Tirumala R Marri <tmarri@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+/dts-v1/;
+/ {
+        #address-cells = <2>;
+        #size-cells = <1>;
+        model = "apm,bluestone";
+        compatible = "apm,bluestone";
+        dcr-parent = <&{/cpus/cpu@0}>;
+        aliases {
+                ethernet0 = &EMAC0;
+                serial0 = &UART0;
+                //serial1 = &UART1; --gcl missing UART1 label
+        };
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                cpu@0 {
+                        device_type = "cpu";
+                        model = "PowerPC,apm821xx";
+                        reg = <0x00000000>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+                        timebase-frequency = <0>; /* Filled in by U-Boot */
+                        i-cache-line-size = <32>;
+                        d-cache-line-size = <32>;
+                        i-cache-size = <32768>;
+                        d-cache-size = <32768>;
+                        dcr-controller;
+                        dcr-access-method = "native";
+                        //next-level-cache = <&L2C0>; --gcl missing L2C0 label
+                };
+        };
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x00000000 0x00000000>; /* Filled in by U-Boot */
+        };
+        UIC0: interrupt-controller0 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <0>;
+                dcr-reg = <0x0c0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+        };
+        UIC1: interrupt-controller1 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <1>;
+                dcr-reg = <0x0d0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x1e 0x4 0x1f 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+        UIC2: interrupt-controller2 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <2>;
+                dcr-reg = <0x0e0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0xa 0x4 0xb 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+        UIC3: interrupt-controller3 {
+                compatible = "ibm,uic";
+                interrupt-controller;
+                cell-index = <3>;
+                dcr-reg = <0x0f0 0x009>;
+                #address-cells = <0>;
+                #size-cells = <0>;
+                #interrupt-cells = <2>;
+                interrupts = <0x10 0x4 0x11 0x4>; /* cascade */
+                interrupt-parent = <&UIC0>;
+        };
+        SDR0: sdr {
+                compatible = "ibm,sdr-apm821xx";
+                dcr-reg = <0x00e 0x002>;
+        };
+        CPR0: cpr {
+                compatible = "ibm,cpr-apm821xx";
+                dcr-reg = <0x00c 0x002>;
+        };
+        plb {
+                compatible = "ibm,plb4";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges;
+                clock-frequency = <0>; /* Filled in by U-Boot */
+                SDRAM0: sdram {
+                        compatible = "ibm,sdram-apm821xx";
+                        dcr-reg = <0x010 0x002>;
+                };
+                MAL0: mcmal {
+                        compatible = "ibm,mcmal2";
+                        descriptor-memory = "ocm";
+                        dcr-reg = <0x180 0x062>;
+                        num-tx-chans = <1>;
+                        num-rx-chans = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-parent = <&UIC2>;
+                        interrupts = <  /*TXEOB*/ 0x6 0x4
+                                        /*RXEOB*/ 0x7 0x4
+                                        /*SERR*/  0x3 0x4
+                                        /*TXDE*/  0x4 0x4
+                                        /*RXDE*/  0x5 0x4>;
+                };
+                POB0: opb {
+                        compatible = "ibm,opb";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0xb0000000 0x00000004 0xb0000000 0x50000000>;
+                        clock-frequency = <0>; /* Filled in by U-Boot */
+                        EBC0: ebc {
+                                compatible = "ibm,ebc";
+                                dcr-reg = <0x012 0x002>;
+                                #address-cells = <2>;
+                                #size-cells = <1>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                /* ranges property is supplied by U-Boot */
+                                ranges = < 0x00000003 0x00000000 0xe0000000 0x8000000>;
+                                interrupts = <0x6 0x4>;
+                                interrupt-parent = <&UIC1>;
+                                nor_flash@0,0 {
+                                        compatible = "amd,s29gl512n", "cfi-flash";
+                                        bank-width = <2>;
+                                        reg = <0x00000000 0x00000000 0x00400000>;
+                                        #address-cells = <1>;
+                                        #size-cells = <1>;
+                                        partition@0 {
+                                                label = "kernel";
+                                                reg = <0x00000000 0x00180000>;
+                                        };
+                                        partition@180000 {
+                                                label = "env";
+                                                reg = <0x00180000 0x00020000>;
+                                        };
+                                        partition@1a0000 {
+                                                label = "u-boot";
+                                                reg = <0x001a0000 0x00060000>;
+                                        };
+                                };
+                        };
+                        UART0: serial@ef600300 {
+                                device_type = "serial";
+                                compatible = "ns16550";
+                                reg = <0xef600300 0x00000008>;
+                                virtual-reg = <0xef600300>;
+                                clock-frequency = <0>; /* Filled in by U-Boot */
+                                current-speed = <0>; /* Filled in by U-Boot */
+                                interrupt-parent = <&UIC1>;
+                                interrupts = <0x1 0x4>;
+                        };
+                        IIC0: i2c@ef600700 {
+                                compatible = "ibm,iic";
+                                reg = <0xef600700 0x00000014>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x2 0x4>;
+                        };
+                        IIC1: i2c@ef600800 {
+                                compatible = "ibm,iic";
+                                reg = <0xef600800 0x00000014>;
+                                interrupt-parent = <&UIC0>;
+                                interrupts = <0x3 0x4>;
+                        };
+                        RGMII0: emac-rgmii@ef601500 {
+                                compatible = "ibm,rgmii";
+                                reg = <0xef601500 0x00000008>;
+                                has-mdio;
+                        };
+                        TAH0: emac-tah@ef601350 {
+                                compatible = "ibm,tah";
+                                reg = <0xef601350 0x00000030>;
+                        };
+                        EMAC0: ethernet@ef600c00 {
+                                device_type = "network";
+                                compatible = "ibm,emac4sync";
+                                interrupt-parent = <&EMAC0>;
+                                interrupts = <0x0 0x1>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = </*Status*/ 0x0 &UIC2 0x10 0x4
+                                                 /*Wake*/   0x1 &UIC2 0x14 0x4>;
+                                reg = <0xef600c00 0x000000c4>;
+                                local-mac-address = [000000000000]; /* Filled in by U-Boot */
+                                mal-device = <&MAL0>;
+                                mal-tx-channel = <0>;
+                                mal-rx-channel = <0>;
+                                cell-index = <0>;
+                                max-frame-size = <9000>;
+                                rx-fifo-size = <16384>;
+                                tx-fifo-size = <2048>;
+                                phy-mode = "rgmii";
+                                phy-map = <0x00000000>;
+                                rgmii-device = <&RGMII0>;
+                                rgmii-channel = <0>;
+                                tah-device = <&TAH0>;
+                                tah-channel = <0>;
+                                has-inverted-stacr-oc;
+                                has-new-stacr-staopc;
+                        };
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/canyonlands.dts b/arch/powerpc/boot/dts/canyonlands.dts
index a30370396250..22dd6ae84da0 100644
--- a/arch/powerpc/boot/dts/canyonlands.dts
+++ b/arch/powerpc/boot/dts/canyonlands.dts
@@ -105,6 +105,15 @@
                dcr-reg = <0x00c 0x002>;
        };
+        CPM0: cpm {
+                compatible = "ibm,cpm";
+                dcr-access-method = "native";
+                dcr-reg = <0x160 0x003>;
+                unused-units = <0x00000100>;
+                idle-doze = <0x02000000>;
+                standby = <0xfeff791d>;
+        };
        L2C0: l2c {
                compatible = "ibm,l2-cache-460ex", "ibm,l2-cache";
                dcr-reg = <0x020 0x008          /* Internal SRAM DCR's */
@@ -163,6 +172,19 @@
                        interrupts = <0x1e 4>;
                };
+                USBOTG0: usbotg@bff80000 {
+                        compatible = "amcc,dwc-otg";
+                        reg = <0x4 0xbff80000 0x10000>;
+                        interrupt-parent = <&USBOTG0>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupts = <0x0 0x1 0x2>;
+                        interrupt-map = </* USB-OTG */ 0x0 &UIC2 0x1c 0x4
+                                         /* HIGH-POWER */ 0x1 &UIC1 0x1a 0x8
+                                         /* DMA */ 0x2 &UIC0 0xc 0x4>;
+                };
                SATA0: sata@bffd1000 {
                        compatible = "amcc,sata-460ex";
                        reg = <4 0xbffd1000 0x800 4 0xbffd0800 0x400>;
@@ -224,6 +246,11 @@
                                        };
                                };
+                                cpld@2,0 {
+                                        compatible = "amcc,ppc460ex-bcsr";
+                                        reg = <2 0x0 0x9>;
+                                };
                                ndfc@3,0 {
                                        compatible = "ibm,ndfc";
                                        reg = <0x00000003 0x00000000 0x00002000>;
@@ -270,28 +297,6 @@
                                interrupts = <0x1 0x4>;
                        };
-                        UART2: serial@ef600500 {
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0xef600500 0x00000008>;
-                                virtual-reg = <0xef600500>;
-                                clock-frequency = <0>; /* Filled in by U-Boot */
-                                current-speed = <0>; /* Filled in by U-Boot */
-                                interrupt-parent = <&UIC1>;
-                                interrupts = <28 0x4>;
-                        };
-                        UART3: serial@ef600600 {
-                                device_type = "serial";
-                                compatible = "ns16550";
-                                reg = <0xef600600 0x00000008>;
-                                virtual-reg = <0xef600600>;
-                                clock-frequency = <0>; /* Filled in by U-Boot */
-                                current-speed = <0>; /* Filled in by U-Boot */
-                                interrupt-parent = <&UIC1>;
-                                interrupts = <29 0x4>;
-                        };
                        IIC0: i2c@ef600700 {
                                compatible = "ibm,iic-460ex", "ibm,iic";
                                reg = <0xef600700 0x00000014>;
@@ -320,6 +325,12 @@
                                interrupts = <0x3 0x4>;
                        };
+                        GPIO0: gpio@ef600b00 {
+                                compatible = "ibm,ppc4xx-gpio";
+                                reg = <0xef600b00 0x00000048>;
+                                gpio-controller;
+                        };
                        ZMII0: emac-zmii@ef600d00 {
                                compatible = "ibm,zmii-460ex", "ibm,zmii";
                                reg = <0xef600d00 0x0000000c>;
@@ -519,5 +530,23 @@
                                0x0 0x0 0x0 0x3 &UIC3 0x12 0x4 /* swizzled int C */
                                0x0 0x0 0x0 0x4 &UIC3 0x13 0x4 /* swizzled int D */>;
                };
+                MSI: ppc4xx-msi@C10000000 {
+                        compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+                        reg = < 0xC 0x10000000 0x100>;
+                        sdr-base = <0x36C>;
+                        msi-data = <0x00000000>;
+                        msi-mask = <0x44440000>;
+                        interrupt-count = <3>;
+                        interrupts = <0 1 2 3>;
+                        interrupt-parent = <&UIC3>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0 &UIC3 0x18 1
+                                        1 &UIC3 0x19 1
+                                        2 &UIC3 0x1A 1
+                                        3 &UIC3 0x1B 1>;
+                };
        };
 };
diff --git a/arch/powerpc/boot/dts/cm5200.dts b/arch/powerpc/boot/dts/cm5200.dts
index dd3860846f15..ad3a4f4a2b04 100644
--- a/arch/powerpc/boot/dts/cm5200.dts
+++ b/arch/powerpc/boot/dts/cm5200.dts
@@ -10,220 +10,74 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "schindler,cm5200";
        compatible = "schindler,cm5200";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;                // L1, 16K
-                        i-cache-size = <0x4000>;                // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x04000000>;  // 64MB
-        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
+                can@900 {
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        status = "disabled";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
-                timer@620 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
-                };
-                timer@630 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
-                };
-                timer@640 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
-                };
-                timer@650 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
-                };
-                timer@660 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
-                };
-                timer@670 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
                };
-                rtc@800 {       // Real time clock
+                can@980 {
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
+                        status = "disabled";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
                };
-                gpio_simple: gpio@b00 {
+                psc@2000 {              // PSC1
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                gpio_wkup: gpio@c00 {
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                spi@f00 {
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
-                };
-                usb@1000 {
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
-                        reg = <0x1000 0xff>;
-                        interrupts = <2 6 0>;
-                };
-                dma-controller@1200 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                };
-                xlb@1f00 {
+                psc@2200 {              // PSC2
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2000 {           // PSC1
+                psc@2400 {              // PSC3
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
-                serial@2200 {           // PSC2
+                psc@2600 {              // PSC4
-                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        status = "disabled";
-                        reg = <0x2200 0x100>;
-                        interrupts = <2 2 0>;
                };
-                serial@2400 {           // PSC3
+                psc@2800 {              // PSC5
-                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        status = "disabled";
-                        reg = <0x2400 0x100>;
-                        interrupts = <2 3 0>;
                };
-                serial@2c00 {           // PSC6
+                psc@2c00 {              // PSC6
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                i2c@3d40 {
+                ata@3a00 {
-                        #address-cells = <1>;
+                        status = "disabled";
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                };
-                sram@8000 {
+                i2c@3d00 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        status = "disabled";
-                        reg = <0x8000 0x4000>;
                };
        };
-        localbus {
+        pci@f0000d00 {
-                compatible = "fsl,mpc5200b-lpb","simple-bus";
+                status = "disabled";
-                #address-cells = <2>;
+        };
-                #size-cells = <1>;
-                ranges = <0 0 0xfc000000 0x2000000>;
+        localbus {
                // 16-bit flash device at LocalPlus Bus CS0
                flash@0,0 {
                        compatible = "cfi-flash";
diff --git a/arch/powerpc/boot/dts/digsy_mtc.dts b/arch/powerpc/boot/dts/digsy_mtc.dts
index 8e9be6bfe23e..27bd267d631c 100644
--- a/arch/powerpc/boot/dts/digsy_mtc.dts
+++ b/arch/powerpc/boot/dts/digsy_mtc.dts
@@ -11,195 +11,68 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "intercontrol,digsy-mtc";
        compatible = "intercontrol,digsy-mtc";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;                // L1, 16K
-                        i-cache-size = <0x4000>;                // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
        memory {
-                device_type = "memory";
                reg = <0x00000000 0x02000000>;  // 32MB
        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
+                rtc@800 {
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        status = "disabled";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
-                timer@620 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
-                };
-                timer@630 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
-                };
-                timer@640 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
-                };
-                timer@650 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
                };
-                timer@660 {     // General Purpose Timer
+                can@900 {
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        status = "disabled";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
                };
-                timer@670 {     // General Purpose Timer
+                can@980 {
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        status = "disabled";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
                };
-                gpio_simple: gpio@b00 {
+                psc@2000 {              // PSC1
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        status = "disabled";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                psc@2200 {              // PSC2
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        status = "disabled";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                spi@f00 {
+                psc@2400 {              // PSC3
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        status = "disabled";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
                };
-                usb@1000 {
+                psc@2600 {              // PSC4
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x1000 0xff>;
-                        interrupts = <2 6 0>;
-                };
-                dma-controller@1200 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
-                };
-                xlb@1f00 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2600 {           // PSC4
+                psc@2800 {              // PSC5
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2600 0x100>;
-                        interrupts = <2 11 0>;
                };
-                serial@2800 {           // PSC5
+                psc@2c00 {              // PSC6
-                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        status = "disabled";
-                        reg = <0x2800 0x100>;
-                        interrupts = <2 12 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                ata@3a00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
-                };
                i2c@3d00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d00 0x40>;
-                        interrupts = <2 15 0>;
                        rtc@50 {
                                compatible = "at,24c08";
                                reg = <0x50>;
@@ -211,16 +84,16 @@
                        };
                };
-                sram@8000 {
+                i2c@3d40 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        status = "disabled";
-                        reg = <0x8000 0x4000>;
                };
        };
-        lpb {
+        pci@f0000d00 {
-                compatible = "fsl,mpc5200b-lpb","simple-bus";
+                status = "disabled";
-                #address-cells = <2>;
+        };
-                #size-cells = <1>;
+        localbus {
                ranges = <0 0 0xff000000 0x1000000>;
                // 16-bit flash device at LocalPlus Bus CS0
diff --git a/arch/powerpc/boot/dts/hotfoot.dts b/arch/powerpc/boot/dts/hotfoot.dts
index cad9c3840afc..71d3bb4931dc 100644
--- a/arch/powerpc/boot/dts/hotfoot.dts
+++ b/arch/powerpc/boot/dts/hotfoot.dts
@@ -117,6 +117,8 @@
                        };
                        IIC: i2c@ef600500 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
                                compatible = "ibm,iic-405ep", "ibm,iic";
                                reg = <0xef600500 0x00000011>;
                                interrupt-parent = <&UIC0>;
diff --git a/arch/powerpc/boot/dts/katmai.dts b/arch/powerpc/boot/dts/katmai.dts
index 7c3be5e45748..f913dbe25d35 100644
--- a/arch/powerpc/boot/dts/katmai.dts
+++ b/arch/powerpc/boot/dts/katmai.dts
@@ -442,6 +442,24 @@
                                0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
                };
+                MSI: ppc4xx-msi@400300000 {
+                                compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+                                reg = < 0x4 0x00300000 0x100>;
+                                sdr-base = <0x3B0>;
+                                msi-data = <0x00000000>;
+                                msi-mask = <0x44440000>;
+                                interrupt-count = <3>;
+                                interrupts =<0 1 2 3>;
+                                interrupt-parent = <&UIC0>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = <0 &UIC0 0xC 1
+                                        1 &UIC0 0x0D 1
+                                        2 &UIC0 0x0E 1
+                                        3 &UIC0 0x0F 1>;
+                };
                I2O: i2o@400100000 {
                        compatible = "ibm,i2o-440spe";
                        reg = <0x00000004 0x00100000 0x100>;
diff --git a/arch/powerpc/boot/dts/kilauea.dts b/arch/powerpc/boot/dts/kilauea.dts
index 083e68eeaca4..1613d6e4049e 100644
--- a/arch/powerpc/boot/dts/kilauea.dts
+++ b/arch/powerpc/boot/dts/kilauea.dts
@@ -82,6 +82,15 @@
                interrupt-parent = <&UIC0>;
        };
+        CPM0: cpm {
+                compatible = "ibm,cpm";
+                dcr-access-method = "native";
+                dcr-reg = <0x0b0 0x003>;
+                unused-units = <0x00000000>;
+                idle-doze = <0x02000000>;
+                standby = <0xe3e74800>;
+        };
        plb {
                compatible = "ibm,plb-405ex", "ibm,plb4";
                #address-cells = <1>;
@@ -394,5 +403,33 @@
                                0x0 0x0 0x0 0x3 &UIC2 0xd 0x4 /* swizzled int C */
                                0x0 0x0 0x0 0x4 &UIC2 0xe 0x4 /* swizzled int D */>;
                };
+                MSI: ppc4xx-msi@C10000000 {
+                        compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+                        reg = < 0x0 0xEF620000 0x100>;
+                        sdr-base = <0x4B0>;
+                        msi-data = <0x00000000>;
+                        msi-mask = <0x44440000>;
+                        interrupt-count = <12>;
+                        interrupts = <0 1 2 3 4 5 6 7 8 9 0xA 0xB 0xC 0xD>;
+                        interrupt-parent = <&UIC2>;
+                        #interrupt-cells = <1>;
+                        #address-cells = <0>;
+                        #size-cells = <0>;
+                        interrupt-map = <0 &UIC2 0x10 1
+                                        1 &UIC2 0x11 1
+                                        2 &UIC2 0x12 1
+                                        2 &UIC2 0x13 1
+                                        2 &UIC2 0x14 1
+                                        2 &UIC2 0x15 1
+                                        2 &UIC2 0x16 1
+                                        2 &UIC2 0x17 1
+                                        2 &UIC2 0x18 1
+                                        2 &UIC2 0x19 1
+                                        2 &UIC2 0x1A 1
+                                        2 &UIC2 0x1B 1
+                                        2 &UIC2 0x1C 1
+                                        3 &UIC2 0x1D 1>;
+                };
        };
 };
diff --git a/arch/powerpc/boot/dts/kmeter1.dts b/arch/powerpc/boot/dts/kmeter1.dts
index d8b5d12fb663..d16bae1230f7 100644
--- a/arch/powerpc/boot/dts/kmeter1.dts
+++ b/arch/powerpc/boot/dts/kmeter1.dts
@@ -1,7 +1,7 @@
 /*
 * Keymile KMETER1 Device Tree Source
 *
- * 2008 DENX Software Engineering GmbH
+ * 2008-2011 DENX Software Engineering GmbH
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -70,11 +70,11 @@
                        #address-cells = <1>;
                        #size-cells = <0>;
                        cell-index = <0>;
-                        compatible = "fsl-i2c";
+                        compatible = "fsl,mpc8313-i2c","fsl-i2c";
                        reg = <0x3000 0x100>;
                        interrupts = <14 0x8>;
                        interrupt-parent = <&ipic>;
-                        dfsrr;
+                        clock-frequency = <400000>;
                };
                serial0: serial@4500 {
@@ -137,6 +137,13 @@
                        compatible = "fsl,mpc8360-par_io";
                        num-ports = <7>;
+                        qe_pio_c: gpio-controller@30 {
+                                #gpio-cells = <2>;
+                                compatible = "fsl,mpc8360-qe-pario-bank",
+                                             "fsl,mpc8323-qe-pario-bank";
+                                reg = <0x1430 0x18>;
+                                gpio-controller;
+                        };
                        pio_ucc1: ucc_pin@0 {
                                reg = <0>;
@@ -472,7 +479,17 @@
                                #address-cells = <0>;
                                #interrupt-cells = <1>;
                                reg = <0x80 0x80>;
-                                interrupts = <32 8 33 8>;
+                                big-endian;
+                                interrupts = <
+                                        32 0x8
+                                        33 0x8
+                                        34 0x8
+                                        35 0x8
+                                        40 0x8
+                                        41 0x8
+                                        42 0x8
+                                        43 0x8
+                                >;
                                interrupt-parent = <&ipic>;
                        };
                };
@@ -484,43 +501,31 @@
                compatible = "fsl,mpc8360-localbus", "fsl,pq2pro-localbus",
                             "simple-bus";
                reg = <0xe0005000 0xd8>;
-                ranges = <0 0 0xf0000000 0x04000000>;   /* Filled in by U-Boot */
+                ranges = <0 0 0xf0000000 0x04000000     /* LB 0 */
+                          1 0 0xe8000000 0x01000000     /* LB 1 */
+                          3 0 0xa0000000 0x10000000>;   /* LB 3 */
-                flash@f0000000,0 {
+                flash@0,0 {
                        compatible = "cfi-flash";
-                        /*
+                        reg = <0 0 0x04000000>;
-                         * The Intel P30 chip has 2 non-identical chips on
-                         * one die, so we need to define 2 separate regions
-                         * that are scanned by physmap_of independantly.
-                         */
-                        reg = <0 0x00000000 0x02000000
-                               0 0x02000000 0x02000000>;        /* Filled in by U-Boot */
-                        bank-width = <2>;
                        #address-cells = <1>;
                        #size-cells = <1>;
-                        partition@0 {
+                        bank-width = <2>;
+                        partition@0 { /* 768KB */
                                label = "u-boot";
-                                reg = <0 0x40000>;
+                                reg = <0 0xC0000>;
                        };
-                        partition@40000 {
+                        partition@c0000 { /* 128KB */
                                label = "env";
-                                reg = <0x40000 0x40000>;
+                                reg = <0xC0000 0x20000>;
-                        };
-                        partition@80000 {
-                                label = "dtb";
-                                reg = <0x80000 0x20000>;
-                        };
-                        partition@a0000 {
-                                label = "kernel";
-                                reg = <0xa0000 0x300000>;
                        };
-                        partition@3a0000 {
+                        partition@e0000 { /* 128KB */
-                                label = "ramdisk";
+                                label = "envred";
-                                reg = <0x3a0000 0x800000>;
+                                reg = <0xE0000 0x20000>;
                        };
-                        partition@ba0000 {
+                        partition@100000 { /* 64512KB */
-                                label = "user";
+                                label = "ubi0";
-                                reg = <0xba0000 0x3460000>;
+                                reg = <0x100000 0x3F00000>;
                        };
                };
        };
diff --git a/arch/powerpc/boot/dts/lite5200b.dts b/arch/powerpc/boot/dts/lite5200b.dts
index 59702ace900f..fb288bb882b6 100644
--- a/arch/powerpc/boot/dts/lite5200b.dts
+++ b/arch/powerpc/boot/dts/lite5200b.dts
@@ -10,256 +10,75 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "fsl,lite5200b";
        compatible = "fsl,lite5200b";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
        memory {
-                device_type = "memory";
                reg = <0x00000000 0x10000000>;  // 256MB
        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
+                psc@2000 {              // PSC1
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x610 0x10>;
+                        cell-index = <0>;
-                        interrupts = <1 10 0>;
-                };
-                timer@620 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
-                };
-                timer@630 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
-                };
-                timer@640 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
-                };
-                timer@650 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
-                };
-                timer@660 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
-                };
-                timer@670 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
-                };
-                rtc@800 {       // Real time clock
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
-                };
-                can@900 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 17 0>;
-                        reg = <0x900 0x80>;
-                };
-                can@980 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 18 0>;
-                        reg = <0x980 0x80>;
-                };
-                gpio_simple: gpio@b00 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                gpio_wkup: gpio@c00 {
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                spi@f00 {
+                psc@2200 {              // PSC2
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        status = "disabled";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
                };
-                usb@1000 {
+                psc@2400 {              // PSC3
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        status = "disabled";
-                        reg = <0x1000 0xff>;
-                        interrupts = <2 6 0>;
                };
-                dma-controller@1200 {
+                psc@2600 {              // PSC4
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        status = "disabled";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                };
-                xlb@1f00 {
+                psc@2800 {              // PSC5
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        status = "disabled";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2000 {           // PSC1
+                psc@2c00 {              // PSC6
-                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
+                        status = "disabled";
-                        cell-index = <0>;
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
                // PSC2 in ac97 mode example
                //ac97@2200 {           // PSC2
                //      compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
                //      cell-index = <1>;
-                //      reg = <0x2200 0x100>;
-                //      interrupts = <2 2 0>;
                //};
                // PSC3 in CODEC mode example
                //i2s@2400 {            // PSC3
                //      compatible = "fsl,mpc5200b-psc-i2s"; //not 5200 compatible
                //      cell-index = <2>;
-                //      reg = <0x2400 0x100>;
-                //      interrupts = <2 3 0>;
-                //};
-                // PSC4 in uart mode example
-                //serial@2600 {         // PSC4
-                //      compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                //      cell-index = <3>;
-                //      reg = <0x2600 0x100>;
-                //      interrupts = <2 11 0>;
-                //};
-                // PSC5 in uart mode example
-                //serial@2800 {         // PSC5
-                //      compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                //      cell-index = <4>;
-                //      reg = <0x2800 0x100>;
-                //      interrupts = <2 12 0>;
                //};
                // PSC6 in spi mode example
                //spi@2c00 {            // PSC6
                //      compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
                //      cell-index = <5>;
-                //      reg = <0x2c00 0x100>;
-                //      interrupts = <2 4 0>;
                //};
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                ata@3a00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
-                };
-                i2c@3d00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d00 0x40>;
-                        interrupts = <2 15 0>;
-                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        eeprom@50 {
                                compatible = "atmel,24c02";
                                reg = <0x50>;
@@ -273,12 +92,6 @@
        };
        pci@f0000d00 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
-                reg = <0xf0000d00 0x100>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
                                 0xc000 0 0 2 &mpc5200_pic 1 1 3
@@ -298,11 +111,6 @@
        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = <0 0 0xfe000000 0x02000000>;
                flash@0,0 {
diff --git a/arch/powerpc/boot/dts/media5200.dts b/arch/powerpc/boot/dts/media5200.dts
index 0c3902bc5b6a..48d72f38e5ed 100644
--- a/arch/powerpc/boot/dts/media5200.dts
+++ b/arch/powerpc/boot/dts/media5200.dts
@@ -11,14 +11,11 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "fsl,media5200";
        compatible = "fsl,media5200";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
        aliases {
                console = &console;
@@ -30,16 +27,7 @@
        };
        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;                // L1, 16K
-                        i-cache-size = <0x4000>;                // L1, 16K
                        timebase-frequency = <33000000>;        // 33 MHz, these were configured by U-Boot
                        bus-frequency = <132000000>;            // 132 MHz
                        clock-frequency = <396000000>;          // 396 MHz
@@ -47,205 +35,57 @@
        };
        memory {
-                device_type = "memory";
                reg = <0x00000000 0x08000000>;  // 128MB RAM
        };
-        soc@f0000000 {
+        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
                bus-frequency = <132000000>;// 132 MHz
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
+                psc@2000 {      // PSC1
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        status = "disabled";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
-                timer@620 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
-                };
-                timer@630 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
-                };
-                timer@640 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
-                };
-                timer@650 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
-                };
-                timer@660 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
-                };
-                timer@670 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
-                };
-                rtc@800 {       // Real time clock
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
-                };
-                can@900 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 17 0>;
-                        reg = <0x900 0x80>;
                };
-                can@980 {
+                psc@2200 {      // PSC2
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        status = "disabled";
-                        interrupts = <2 18 0>;
-                        reg = <0x980 0x80>;
                };
-                gpio_simple: gpio@b00 {
+                psc@2400 {      // PSC3
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        status = "disabled";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                psc@2600 {      // PSC4
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        status = "disabled";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                spi@f00 {
+                psc@2800 {      // PSC5
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        status = "disabled";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
-                };
-                usb@1000 {
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
-                        reg = <0x1000 0x100>;
-                        interrupts = <2 6 0>;
-                };
-                dma-controller@1200 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
-                };
-                xlb@1f00 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
-                        reg = <0x1f00 0x100>;
                };
                // PSC6 in uart mode
-                console: serial@2c00 {          // PSC6
+                console: psc@2c00 {             // PSC6
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        cell-index = <5>;
-                        port-number = <0>;  // Logical port assignment
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
-                eth0: ethernet@3000 {
+                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                ata@3a00 {
+                usb@1000 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        reg = <0x1000 0x100>;
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
-                };
-                i2c@3d00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d00 0x40>;
-                        interrupts = <2 15 0>;
-                };
-                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
-                };
-                sram@8000 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
-                        reg = <0x8000 0x4000>;
                };
        };
        pci@f0000d00 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
-                reg = <0xf0000d00 0x100>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <0xc000 0 0 1 &media5200_fpga 0 2 // 1st slot
                                 0xc000 0 0 2 &media5200_fpga 0 3
@@ -262,37 +102,29 @@
                                 0xe000 0 0 1 &media5200_fpga 0 5 // CoralIP
                                >;
-                clock-frequency = <0>; // From boot loader
-                interrupts = <2 8 0 2 9 0 2 10 0>;
-                interrupt-parent = <&mpc5200_pic>;
-                bus-range = <0 0>;
                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
+                interrupt-parent = <&mpc5200_pic>;
        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = < 0 0 0xfc000000 0x02000000
                           1 0 0xfe000000 0x02000000
                           2 0 0xf0010000 0x00010000
                           3 0 0xf0020000 0x00010000 >;
                flash@0,0 {
                        compatible = "amd,am29lv28ml", "cfi-flash";
-                        reg = <0 0x0 0x2000000>;                // 32 MB
+                        reg = <0 0x0 0x2000000>;                // 32 MB
-                        bank-width = <4>;                       // Width in bytes of the flash bank
+                        bank-width = <4>;                       // Width in bytes of the flash bank
-                        device-width = <2>;                     // Two devices on each bank
+                        device-width = <2>;                     // Two devices on each bank
                };
                flash@1,0 {
                        compatible = "amd,am29lv28ml", "cfi-flash";
-                        reg = <1 0 0x2000000>;                  // 32 MB
+                        reg = <1 0 0x2000000>;                  // 32 MB
-                        bank-width = <4>;                       // Width in bytes of the flash bank
+                        bank-width = <4>;                       // Width in bytes of the flash bank
-                        device-width = <2>;                     // Two devices on each bank
+                        device-width = <2>;                     // Two devices on each bank
                };
                media5200_fpga: fpga@2,0 {
diff --git a/arch/powerpc/boot/dts/mgcoge.dts b/arch/powerpc/boot/dts/mgcoge.dts
index 0ce96644176d..1360d2f69024 100644
--- a/arch/powerpc/boot/dts/mgcoge.dts
+++ b/arch/powerpc/boot/dts/mgcoge.dts
@@ -13,7 +13,7 @@
 /dts-v1/;
 / {
        model = "MGCOGE";
-        compatible = "keymile,mgcoge";
+        compatible = "keymile,km82xx";
        #address-cells = <1>;
        #size-cells = <1>;
@@ -48,8 +48,10 @@
                reg = <0xf0010100 0x40>;
                ranges = <0 0 0xfe000000 0x00400000
-                          5 0 0x50000000 0x20000000
+                          1 0 0x30000000 0x00010000
-                        >; /* Filled in by U-Boot */
+                          2 0 0x40000000 0x00010000
+                          5 0 0x50000000 0x04000000
+                        >;
                flash@0,0 {
                        compatible = "cfi-flash";
@@ -60,36 +62,32 @@
                        device-width = <1>;
                        partition@0 {
                                label = "u-boot";
-                                reg = <0 0x40000>;
+                                reg = <0x00000 0xC0000>;
                        };
-                        partition@40000 {
+                        partition@1 {
                                label = "env";
-                                reg = <0x40000 0x20000>;
+                                reg = <0xC0000 0x20000>;
                        };
-                        partition@60000 {
+                        partition@2 {
-                                label = "kernel";
+                                label = "envred";
-                                reg = <0x60000 0x220000>;
+                                reg = <0xE0000 0x20000>;
                        };
-                        partition@280000 {
+                        partition@3 {
-                                label = "dtb";
+                                label = "free";
-                                reg = <0x280000 0x20000>;
+                                reg = <0x100000 0x300000>;
                        };
                };
                flash@5,0 {
                        compatible = "cfi-flash";
-                        reg = <5 0x0 0x2000000>;
+                        reg = <5 0x00000000 0x02000000
+                               5 0x02000000 0x02000000>;
                        #address-cells = <1>;
                        #size-cells = <1>;
                        bank-width = <2>;
-                        device-width = <2>;
+                        partition@app { /* 64 MBytes */
-                        partition@0 {
+                                label = "ubi0";
-                                label = "ramdisk";
+                                reg = <0x00000000 0x04000000>;
-                                reg = <0 0x7a0000>;
-                        };
-                        partition@7a0000 {
-                                label = "user";
-                                reg = <0x7a0000 0x1860000>;
                        };
                };
        };
@@ -217,6 +215,13 @@
                        };
                };
+                cpm2_pio_c: gpio-controller@10d40 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,cpm2-pario-bank";
+                        reg = <0x10d40 0x14>;
+                        gpio-controller;
+                };
                PIC: interrupt-controller@10c00 {
                        #interrupt-cells = <2>;
                        interrupt-controller;
diff --git a/arch/powerpc/boot/dts/mgsuvd.dts b/arch/powerpc/boot/dts/mgsuvd.dts
deleted file mode 100644
index e4fc53ab42bd..000000000000
--- a/arch/powerpc/boot/dts/mgsuvd.dts
+++ /dev/null
@@ -1,163 +0,0 @@
-/*
- * MGSUVD Device Tree Source
- *
- * Copyright 2008 DENX Software Engineering GmbH
- * Heiko Schocher <hs@denx.de>
- *
- * This program is free software; you can redistribute  it and/or modify it
- * under  the terms of  the GNU General  Public License as published by the
- * Free Software Foundation;  either version 2 of the  License, or (at your
- * option) any later version.
- */
-/dts-v1/;
-/ {
-        model = "MGSUVD";
-        compatible = "keymile,mgsuvd";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,852@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <16>;
-                        i-cache-line-size = <16>;
-                        d-cache-size = <8192>;
-                        i-cache-size = <8192>;
-                        timebase-frequency = <0>;       /* Filled in by u-boot */
-                        bus-frequency = <0>;            /* Filled in by u-boot */
-                        clock-frequency = <0>;          /* Filled in by u-boot */
-                        interrupts = <15 2>;            /* decrementer interrupt */
-                        interrupt-parent = <&PIC>;
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <00000000 0x4000000>;  /* Filled in by u-boot */
-        };
-        localbus@fff00100 {
-                compatible = "fsl,mpc852-localbus", "fsl,pq1-localbus", "simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
-                reg = <0xfff00100 0x40>;
-                ranges = <0 0 0xf0000000 0x01000000>;  /* Filled in by u-boot */
-                flash@0,0 {
-                        compatible = "cfi-flash";
-                        reg = <0 0 0x1000000>;
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        bank-width = <1>;
-                        device-width = <1>;
-                        partition@0 {
-                                label = "u-boot";
-                                reg = <0 0x80000>;
-                        };
-                        partition@80000 {
-                                label = "env";
-                                reg = <0x80000 0x20000>;
-                        };
-                        partition@a0000 {
-                                label = "kernel";
-                                reg = <0xa0000 0x1e0000>;
-                        };
-                        partition@280000 {
-                                label = "dtb";
-                                reg = <0x280000 0x20000>;
-                        };
-                        partition@2a0000 {
-                                label = "root";
-                                reg = <0x2a0000 0x500000>;
-                        };
-                        partition@7a0000 {
-                                label = "user";
-                                reg = <0x7a0000 0x860000>;
-                        };
-                };
-        };
-        soc@fff00000 {
-                compatible = "fsl,mpc852", "fsl,pq1-soc", "simple-bus";
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                ranges = <0 0xfff00000 0x00004000>;
-                PIC: interrupt-controller@0 {
-                        interrupt-controller;
-                        #interrupt-cells = <2>;
-                        reg = <0 24>;
-                        compatible = "fsl,mpc852-pic", "fsl,pq1-pic";
-                };
-                cpm@9c0 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,mpc852-cpm", "fsl,cpm1", "simple-bus";
-                        interrupts = <0>;       /* cpm error interrupt */
-                        interrupt-parent = <&CPM_PIC>;
-                        reg = <0x9c0 10>;
-                        ranges;
-                        muram@2000 {
-                                compatible = "fsl,cpm-muram";
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                ranges = <0 0x2000 0x2000>;
-                                data@0 {
-                                        compatible = "fsl,cpm-muram-data";
-                                        reg = <0x800 0x1800>;
-                                };
-                        };
-                        brg@9f0 {
-                                compatible = "fsl,mpc852-brg",
-                                             "fsl,cpm1-brg",
-                                             "fsl,cpm-brg";
-                                reg = <0x9f0 0x10>;
-                                clock-frequency = <0>; /* Filled in by u-boot */
-                        };
-                        CPM_PIC: interrupt-controller@930 {
-                                interrupt-controller;
-                                #interrupt-cells = <1>;
-                                interrupts = <5 2 0 2>;
-                                interrupt-parent = <&PIC>;
-                                reg = <0x930 0x20>;
-                                compatible = "fsl,cpm1-pic";
-                        };
-                        /* MON-1 */
-                        serial@a80 {
-                                device_type = "serial";
-                                compatible = "fsl,cpm1-smc-uart";
-                                reg = <0xa80 0x10 0x3fc0 0x40>;
-                                interrupts = <4>;
-                                interrupt-parent = <&CPM_PIC>;
-                                fsl,cpm-brg = <1>;
-                                fsl,cpm-command = <0x0090>;
-                                current-speed = <0>; /* Filled in by u-boot */
-                        };
-                        ethernet@a40 {
-                                device_type = "network";
-                                compatible  = "fsl,mpc866-scc-enet",
-                                              "fsl,cpm1-scc-enet";
-                                reg = <0xa40 0x18 0x3e00 0x100>;
-                                local-mac-address = [ 00 00 00 00 00 00 ];  /* Filled in by u-boot */
-                                interrupts = <28>;
-                                interrupt-parent = <&CPM_PIC>;
-                                fsl,cpm-command = <0x80>;
-                                fixed-link = <0 0 10 0 0>;
-                        };
-                };
-        };
-};
diff --git a/arch/powerpc/boot/dts/motionpro.dts b/arch/powerpc/boot/dts/motionpro.dts
index 6ca4fc144a33..0b78e89ac69b 100644
--- a/arch/powerpc/boot/dts/motionpro.dts
+++ b/arch/powerpc/boot/dts/motionpro.dts
@@ -10,219 +10,73 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "promess,motionpro";
        compatible = "promess,motionpro";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x04000000>;  // 64MB
-        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
+                timer@660 {     // Motion-PRO status LED
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
-                timer@620 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
-                };
-                timer@630 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
-                };
-                timer@640 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
-                };
-                timer@650 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
-                };
-                motionpro-led@660 {     // Motion-PRO status LED
                        compatible = "promess,motionpro-led";
                        label = "motionpro-statusled";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
                        blink-delay = <100>; // 100 msec
                };
-                motionpro-led@670 {     // Motion-PRO ready LED
+                timer@670 {     // Motion-PRO ready LED
                        compatible = "promess,motionpro-led";
                        label = "motionpro-readyled";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
-                };
-                rtc@800 {       // Real time clock
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
-                };
-                can@980 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 18 0>;
-                        reg = <0x980 0x80>;
                };
-                gpio_simple: gpio@b00 {
+                can@900 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        status = "disabled";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                psc@2000 {              // PSC1
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                spi@f00 {
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
                };
-                usb@1000 {
+                // PSC2 in spi master mode 
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                psc@2200 {              // PSC2
-                        reg = <0x1000 0xff>;
+                        compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
-                        interrupts = <2 6 0>;
+                        cell-index = <1>;
                };
-                dma-controller@1200 {
+                psc@2400 {              // PSC3
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        status = "disabled";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                };
-                xlb@1f00 {
+                psc@2600 {              // PSC4
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        status = "disabled";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2000 {           // PSC1
+                psc@2800 {              // PSC5
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
-                };
-                // PSC2 in spi master mode 
-                spi@2200 {              // PSC2
-                        compatible = "fsl,mpc5200b-psc-spi","fsl,mpc5200-psc-spi";
-                        cell-index = <1>;
-                        reg = <0x2200 0x100>;
-                        interrupts = <2 2 0>;
                };
-                // PSC5 in uart mode
+                psc@2c00 {              // PSC6
-                serial@2800 {           // PSC5
+                        status = "disabled";
-                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2800 0x100>;
-                        interrupts = <2 12 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;       // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@2 {
                                reg = <2>;
                        };
                };
-                ata@3a00 {
+                i2c@3d00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        status = "disabled";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        rtc@68 {
                                compatible = "dallas,ds1339";
                                reg = <0x68>;
@@ -235,10 +89,11 @@
                };
        };
+        pci@f0000d00 {
+                status = "disabled";
+        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = <0 0 0xff000000 0x01000000
                          1 0 0x50000000 0x00010000
                          2 0 0x50010000 0x00010000
@@ -280,5 +135,6 @@
                        #size-cells = <1>;
                        #address-cells = <1>;
                };
        };
 };
diff --git a/arch/powerpc/boot/dts/mpc5200b.dtsi b/arch/powerpc/boot/dts/mpc5200b.dtsi
new file mode 100644
index 000000000000..bc27548e895d
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc5200b.dtsi
@@ -0,0 +1,275 @@
+/*
+ * base MPC5200b Device Tree Source
+ *
+ * Copyright (C) 2010 SecretLab
+ * Grant Likely <grant@secretlab.ca>
+ * John Bonesio <bones@secretlab.ca>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/ {
+        model = "fsl,mpc5200b";
+        compatible = "fsl,mpc5200b";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        interrupt-parent = <&mpc5200_pic>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                powerpc: PowerPC,5200@0 {
+                        device_type = "cpu";
+                        reg = <0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <0x4000>;        // L1, 16K
+                        i-cache-size = <0x4000>;        // L1, 16K
+                        timebase-frequency = <0>;       // from bootloader
+                        bus-frequency = <0>;            // from bootloader
+                        clock-frequency = <0>;          // from bootloader
+                };
+        };
+        memory: memory {
+                device_type = "memory";
+                reg = <0x00000000 0x04000000>;  // 64MB
+        };
+        soc: soc5200@f0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc5200b-immr";
+                ranges = <0 0xf0000000 0x0000c000>;
+                reg = <0xf0000000 0x00000100>;
+                bus-frequency = <0>;            // from bootloader
+                system-frequency = <0>;         // from bootloader
+                cdm@200 {
+                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
+                        reg = <0x200 0x38>;
+                };
+                mpc5200_pic: interrupt-controller@500 {
+                        // 5200 interrupts are encoded into two levels;
+                        interrupt-controller;
+                        #interrupt-cells = <3>;
+                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
+                        reg = <0x500 0x80>;
+                };
+                timer@600 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x600 0x10>;
+                        interrupts = <1 9 0>;
+                };
+                timer@610 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x610 0x10>;
+                        interrupts = <1 10 0>;
+                };
+                timer@620 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x620 0x10>;
+                        interrupts = <1 11 0>;
+                };
+                timer@630 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x630 0x10>;
+                        interrupts = <1 12 0>;
+                };
+                timer@640 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x640 0x10>;
+                        interrupts = <1 13 0>;
+                };
+                timer@650 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x650 0x10>;
+                        interrupts = <1 14 0>;
+                };
+                timer@660 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x660 0x10>;
+                        interrupts = <1 15 0>;
+                };
+                timer@670 {     // General Purpose Timer
+                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
+                        reg = <0x670 0x10>;
+                        interrupts = <1 16 0>;
+                };
+                rtc@800 {       // Real time clock
+                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
+                        reg = <0x800 0x100>;
+                        interrupts = <1 5 0 1 6 0>;
+                };
+                can@900 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 17 0>;
+                        reg = <0x900 0x80>;
+                };
+                can@980 {
+                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
+                        interrupts = <2 18 0>;
+                        reg = <0x980 0x80>;
+                };
+                gpio_simple: gpio@b00 {
+                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        reg = <0xb00 0x40>;
+                        interrupts = <1 7 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+                gpio_wkup: gpio@c00 {
+                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        reg = <0xc00 0x40>;
+                        interrupts = <1 8 0 0 3 0>;
+                        gpio-controller;
+                        #gpio-cells = <2>;
+                };
+                spi@f00 {
+                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
+                        reg = <0xf00 0x20>;
+                        interrupts = <2 13 0 2 14 0>;
+                };
+                usb: usb@1000 {
+                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
+                        reg = <0x1000 0xff>;
+                        interrupts = <2 6 0>;
+                };
+                dma-controller@1200 {
+                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        reg = <0x1200 0x80>;
+                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
+                                      3 4 0  3 5 0  3 6 0  3 7 0
+                                      3 8 0  3 9 0  3 10 0  3 11 0
+                                      3 12 0  3 13 0  3 14 0  3 15 0>;
+                };
+                xlb@1f00 {
+                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        reg = <0x1f00 0x100>;
+                };
+                psc1: psc@2000 {                // PSC1
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2000 0x100>;
+                        interrupts = <2 1 0>;
+                };
+                psc2: psc@2200 {                // PSC2
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2200 0x100>;
+                        interrupts = <2 2 0>;
+                };
+                psc3: psc@2400 {                // PSC3
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2400 0x100>;
+                        interrupts = <2 3 0>;
+                };
+                psc4: psc@2600 {                // PSC4
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2600 0x100>;
+                        interrupts = <2 11 0>;
+                };
+                psc5: psc@2800 {                // PSC5
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2800 0x100>;
+                        interrupts = <2 12 0>;
+                };
+                psc6: psc@2c00 {                // PSC6
+                        compatible = "fsl,mpc5200b-psc","fsl,mpc5200-psc";
+                        reg = <0x2c00 0x100>;
+                        interrupts = <2 4 0>;
+                };
+                eth0: ethernet@3000 {
+                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
+                        reg = <0x3000 0x400>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <2 5 0>;
+                };
+                mdio@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
+                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
+                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
+                };
+                ata@3a00 {
+                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        reg = <0x3a00 0x100>;
+                        interrupts = <2 7 0>;
+                };
+                i2c@3d00 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d00 0x40>;
+                        interrupts = <2 15 0>;
+                };
+                i2c@3d40 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
+                        reg = <0x3d40 0x40>;
+                        interrupts = <2 16 0>;
+                };
+                sram@8000 {
+                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                        reg = <0x8000 0x4000>;
+                };
+        };
+        pci: pci@f0000d00 {
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                device_type = "pci";
+                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
+                reg = <0xf0000d00 0x100>;
+                // interrupt-map-mask = need to add
+                // interrupt-map = need to add
+                clock-frequency = <0>; // From boot loader
+                interrupts = <2 8 0 2 9 0 2 10 0>;
+                bus-range = <0 0>;
+                // ranges = need to add
+        };
+        localbus: localbus {
+                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
+                #address-cells = <2>;
+                #size-cells = <1>;
+                ranges = <0 0 0xfc000000 0x2000000>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8308_p1m.dts b/arch/powerpc/boot/dts/mpc8308_p1m.dts
new file mode 100644
index 000000000000..697b3f6b78bf
--- /dev/null
+++ b/arch/powerpc/boot/dts/mpc8308_p1m.dts
@@ -0,0 +1,340 @@
+/*
+ * mpc8308_p1m Device Tree Source
+ *
+ * Copyright 2010 Ilya Yanok, Emcraft Systems, yanok@emcraft.com
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/ {
+        compatible = "denx,mpc8308_p1m";
+        #address-cells = <1>;
+        #size-cells = <1>;
+        aliases {
+                ethernet0 = &enet0;
+                ethernet1 = &enet1;
+                serial0 = &serial0;
+                serial1 = &serial1;
+                pci0 = &pci0;
+        };
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                PowerPC,8308@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        d-cache-line-size = <32>;
+                        i-cache-line-size = <32>;
+                        d-cache-size = <16384>;
+                        i-cache-size = <16384>;
+                        timebase-frequency = <0>;       // from bootloader
+                        bus-frequency = <0>;            // from bootloader
+                        clock-frequency = <0>;          // from bootloader
+                };
+        };
+        memory {
+                device_type = "memory";
+                reg = <0x00000000 0x08000000>;  // 128MB at 0
+        };
+        localbus@e0005000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,mpc8315-elbc", "fsl,elbc", "simple-bus";
+                reg = <0xe0005000 0x1000>;
+                interrupts = <77 0x8>;
+                interrupt-parent = <&ipic>;
+                ranges = <0x0 0x0 0xfc000000 0x04000000
+                          0x1 0x0 0xfbff0000 0x00008000
+                          0x2 0x0 0xfbff8000 0x00008000>;
+                flash@0,0 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "cfi-flash";
+                        reg = <0x0 0x0 0x4000000>;
+                        bank-width = <2>;
+                        device-width = <1>;
+                        u-boot@0 {
+                                reg = <0x0 0x60000>;
+                                read-only;
+                        };
+                        env@60000 {
+                                reg = <0x60000 0x20000>;
+                        };
+                        env1@80000 {
+                                reg = <0x80000 0x20000>;
+                        };
+                        kernel@a0000 {
+                                reg = <0xa0000 0x200000>;
+                        };
+                        dtb@2a0000 {
+                                reg = <0x2a0000 0x20000>;
+                        };
+                        ramdisk@2c0000 {
+                                reg = <0x2c0000 0x640000>;
+                        };
+                        user@700000 {
+                                reg = <0x700000 0x3900000>;
+                        };
+                };
+                can@1,0 {
+                        compatible = "nxp,sja1000";
+                        reg = <0x1 0x0 0x80>;
+                        interrupts = <18 0x8>;
+                        interrups-parent = <&ipic>;
+                };
+                cpld@2,0 {
+                        compatible = "denx,mpc8308_p1m-cpld";
+                        reg = <0x2 0x0 0x8>;
+                        interrupts = <48 0x8>;
+                        interrups-parent = <&ipic>;
+                };
+        };
+        immr@e0000000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,mpc8308-immr", "simple-bus";
+                ranges = <0 0xe0000000 0x00100000>;
+                reg = <0xe0000000 0x00000200>;
+                bus-frequency = <0>;
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <14 0x8>;
+                        interrupt-parent = <&ipic>;
+                        dfsrr;
+                        fram@50 {
+                                compatible = "ramtron,24c64";
+                                reg = <0x50>;
+                        };
+                };
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <15 0x8>;
+                        interrupt-parent = <&ipic>;
+                        dfsrr;
+                        pwm@28 {
+                                compatible = "maxim,ds1050";
+                                reg = <0x28>;
+                        };
+                        sensor@48 {
+                                compatible = "maxim,max6625";
+                                reg = <0x48>;
+                        };
+                        sensor@49 {
+                                compatible = "maxim,max6625";
+                                reg = <0x49>;
+                        };
+                        sensor@4b {
+                                compatible = "maxim,max6625";
+                                reg = <0x4b>;
+                        };
+                };
+                usb@23000 {
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x23000 0x1000>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        interrupt-parent = <&ipic>;
+                        interrupts = <38 0x8>;
+                        dr_mode = "peripheral";
+                        phy_type = "ulpi";
+                };
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <32 0x8 33 0x8 34 0x8>;
+                        interrupt-parent = <&ipic>;
+                        phy-handle = < &phy1 >;
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-mdio";
+                                reg = <0x520 0x20>;
+                                phy1: ethernet-phy@1 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <17 0x8>;
+                                        reg = <0x1>;
+                                        device_type = "ethernet-phy";
+                                };
+                                phy2: ethernet-phy@2 {
+                                        interrupt-parent = <&ipic>;
+                                        interrupts = <19 0x8>;
+                                        reg = <0x2>;
+                                        device_type = "ethernet-phy";
+                                };
+                                tbi0: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 0x8 36 0x8 37 0x8>;
+                        interrupt-parent = <&ipic>;
+                        phy-handle = < &phy2 >;
+                        mdio@520 {
+                                #address-cells = <1>;
+                                #size-cells = <0>;
+                                compatible = "fsl,gianfar-tbi";
+                                reg = <0x520 0x20>;
+                                tbi1: tbi-phy@11 {
+                                        reg = <0x11>;
+                                        device_type = "tbi-phy";
+                                };
+                        };
+                };
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <133333333>;
+                        interrupts = <9 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <133333333>;
+                        interrupts = <10 0x8>;
+                        interrupt-parent = <&ipic>;
+                };
+                gpio@c00 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8308-gpio", "fsl,mpc8349-gpio";
+                        reg = <0xc00 0x18>;
+                        interrupts = <74 0x8>;
+                        interrupt-parent = <&ipic>;
+                        gpio-controller;
+                };
+                timer@500 {
+                        compatible = "fsl,mpc8308-gtm", "fsl,gtm";
+                        reg = <0x500 0x100>;
+                        interrupts = <90 8 78 8 84 8 72 8>;
+                        interrupt-parent = <&ipic>;
+                        clock-frequency = <133333333>;
+                };
+                /* IPIC
+                 * interrupts cell = <intr #, sense>
+                 * sense values match linux IORESOURCE_IRQ_* defines:
+                 * sense == 8: Level, low assertion
+                 * sense == 2: Edge, high-to-low change
+                 */
+                ipic: interrupt-controller@700 {
+                        compatible = "fsl,ipic";
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x700 0x100>;
+                        device_type = "ipic";
+                };
+                ipic-msi@7c0 {
+                        compatible = "fsl,ipic-msi";
+                        reg = <0x7c0 0x40>;
+                        msi-available-ranges = <0x0 0x100>;
+                        interrupts = < 0x43 0x8
+                                        0x4  0x8
+                                        0x51 0x8
+                                        0x52 0x8
+                                        0x56 0x8
+                                        0x57 0x8
+                                        0x58 0x8
+                                        0x59 0x8 >;
+                        interrupt-parent = < &ipic >;
+                };
+                dma@2c000 {
+                        compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma";
+                        reg = <0x2c000 0x1800>;
+                        interrupts = <3 0x8
+                                        94 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
+        };
+        pci0: pcie@e0009000 {
+                #address-cells = <3>;
+                #size-cells = <2>;
+                #interrupt-cells = <1>;
+                device_type = "pci";
+                compatible = "fsl,mpc8308-pcie", "fsl,mpc8314-pcie";
+                reg = <0xe0009000 0x00001000
+                        0xb0000000 0x01000000>;
+                ranges = <0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
+                          0x01000000 0 0x00000000 0xb1000000 0 0x00800000>;
+                bus-range = <0 0>;
+                interrupt-map-mask = <0 0 0 0>;
+                interrupt-map = <0 0 0 0 &ipic 1 8>;
+                interrupts = <0x1 0x8>;
+                interrupt-parent = <&ipic>;
+                clock-frequency = <0>;
+                pcie@0 {
+                        #address-cells = <3>;
+                        #size-cells = <2>;
+                        device_type = "pci";
+                        reg = <0 0 0 0 0>;
+                        ranges = <0x02000000 0 0xa0000000
+                                  0x02000000 0 0xa0000000
+                                  0 0x10000000
+                                  0x01000000 0 0x00000000
+                                  0x01000000 0 0x00000000
+                                  0 0x00800000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/mpc8308rdb.dts b/arch/powerpc/boot/dts/mpc8308rdb.dts
index a97eb2db5a18..a0bd1881081e 100644
--- a/arch/powerpc/boot/dts/mpc8308rdb.dts
+++ b/arch/powerpc/boot/dts/mpc8308rdb.dts
@@ -109,7 +109,7 @@
                #address-cells = <1>;
                #size-cells = <1>;
                device_type = "soc";
-                compatible = "fsl,mpc8315-immr", "simple-bus";
+                compatible = "fsl,mpc8308-immr", "simple-bus";
                ranges = <0 0xe0000000 0x00100000>;
                reg = <0xe0000000 0x00000200>;
                bus-frequency = <0>;
@@ -265,6 +265,14 @@
                        interrupt-parent = < &ipic >;
                };
+                dma@2c000 {
+                        compatible = "fsl,mpc8308-dma", "fsl,mpc5121-dma";
+                        reg = <0x2c000 0x1800>;
+                        interrupts = <3 0x8
+                                        94 0x8>;
+                        interrupt-parent = < &ipic >;
+                };
        };
        pci0: pcie@e0009000 {
diff --git a/arch/powerpc/boot/dts/mpc8313erdb.dts b/arch/powerpc/boot/dts/mpc8313erdb.dts
index 761faa7b6964..ac1eb320c7b4 100644
--- a/arch/powerpc/boot/dts/mpc8313erdb.dts
+++ b/arch/powerpc/boot/dts/mpc8313erdb.dts
@@ -176,6 +176,19 @@
                        sleep = <&pmc 0x00300000>;
                };
+                ptp_clock@24E00 {
+                        compatible = "fsl,etsec-ptp";
+                        reg = <0x24E00 0xB0>;
+                        interrupts = <12 0x8 13 0x8>;
+                        interrupt-parent = < &ipic >;
+                        fsl,tclk-period = <10>;
+                        fsl,tmr-prsc    = <100>;
+                        fsl,tmr-add     = <0x999999A4>;
+                        fsl,tmr-fiper1  = <0x3B9AC9F6>;
+                        fsl,tmr-fiper2  = <0x00018696>;
+                        fsl,max-adj     = <659999998>;
+                };
                enet0: ethernet@24000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8536ds.dts b/arch/powerpc/boot/dts/mpc8536ds.dts
index 815cebb2e3e5..a75c10eed269 100644
--- a/arch/powerpc/boot/dts/mpc8536ds.dts
+++ b/arch/powerpc/boot/dts/mpc8536ds.dts
@@ -108,6 +108,58 @@
                        };
                };
+                spi@7000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,mpc8536-espi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <59 0x2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,espi-num-chipselects = <4>;
+                        flash@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "spansion,s25sl12801";
+                                reg = <0>;
+                                spi-max-frequency = <40000000>;
+                                partition@u-boot {
+                                        label = "u-boot";
+                                        reg = <0x00000000 0x00100000>;
+                                        read-only;
+                                };
+                                partition@kernel {
+                                        label = "kernel";
+                                        reg = <0x00100000 0x00500000>;
+                                        read-only;
+                                };
+                                partition@dtb {
+                                        label = "dtb";
+                                        reg = <0x00600000 0x00100000>;
+                                        read-only;
+                                };
+                                partition@fs {
+                                        label = "file system";
+                                        reg = <0x00700000 0x00900000>;
+                                };
+                        };
+                        flash@1 {
+                                compatible = "spansion,s25sl12801";
+                                reg = <1>;
+                                spi-max-frequency = <40000000>;
+                        };
+                        flash@2 {
+                                compatible = "spansion,s25sl12801";
+                                reg = <2>;
+                                spi-max-frequency = <40000000>;
+                        };
+                        flash@3 {
+                                compatible = "spansion,s25sl12801";
+                                reg = <3>;
+                                spi-max-frequency = <40000000>;
+                        };
+                };
                dma@21300 {
                        #address-cells = <1>;
                        #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8572ds.dts b/arch/powerpc/boot/dts/mpc8572ds.dts
index cafc1285c140..f6c04d25e916 100644
--- a/arch/powerpc/boot/dts/mpc8572ds.dts
+++ b/arch/powerpc/boot/dts/mpc8572ds.dts
@@ -324,6 +324,19 @@
                        };
                };
+                ptp_clock@24E00 {
+                        compatible = "fsl,etsec-ptp";
+                        reg = <0x24E00 0xB0>;
+                        interrupts = <68 2 69 2 70 2 71 2>;
+                        interrupt-parent = < &mpic >;
+                        fsl,tclk-period = <5>;
+                        fsl,tmr-prsc = <200>;
+                        fsl,tmr-add = <0xAAAAAAAB>;
+                        fsl,tmr-fiper1 = <0x3B9AC9FB>;
+                        fsl,tmr-fiper2 = <0x3B9AC9FB>;
+                        fsl,max-adj = <499999999>;
+                };
                enet0: ethernet@24000 {
                        #address-cells = <1>;
                        #size-cells = <1>;
diff --git a/arch/powerpc/boot/dts/mpc8610_hpcd.dts b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
index 9535ce68caae..83c3218cb4da 100644
--- a/arch/powerpc/boot/dts/mpc8610_hpcd.dts
+++ b/arch/powerpc/boot/dts/mpc8610_hpcd.dts
@@ -286,6 +286,7 @@
                ssi@16100 {
                        compatible = "fsl,mpc8610-ssi";
+                        status = "disabled";
                        cell-index = <1>;
                        reg = <0x16100 0x100>;
                        interrupt-parent = <&mpic>;
diff --git a/arch/powerpc/boot/dts/mucmc52.dts b/arch/powerpc/boot/dts/mucmc52.dts
index b72a7581d798..21d34720fcc9 100644
--- a/arch/powerpc/boot/dts/mucmc52.dts
+++ b/arch/powerpc/boot/dts/mucmc52.dts
@@ -11,172 +11,109 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "manroland,mucmc52";
        compatible = "manroland,mucmc52";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x04000000>;  // 64MB
-        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                gpt0: timer@600 {       // GPT 0 in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt1: timer@610 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt3: timer@630 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
-                gpio_simple: gpio@b00 {
+                timer@640 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        status = "disabled";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                timer@650 {
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        status = "disabled";
-                        reg = <0xc00 0x40>;
+                };
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
+                timer@660 {
-                        #gpio-cells = <2>;
+                        status = "disabled";
+                };
+                timer@670 {
+                        status = "disabled";
                };
-                dma-controller@1200 {
+                rtc@800 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        status = "disabled";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                };
-                xlb@1f00 {
+                can@900 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        status = "disabled";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2000 { /* PSC1 in UART mode */
+                can@980 {
+                        status = "disabled";
+                };
+                spi@f00 {
+                        status = "disabled";
+                };
+                usb@1000 {
+                        status = "disabled";
+                };
+                psc@2000 {              // PSC1
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
-                serial@2200 { /* PSC2 in UART mode */
+                psc@2200 {              // PSC2
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2200 0x100>;
-                        interrupts = <2 2 0>;
                };
-                serial@2c00 { /* PSC6 in UART mode */
+                psc@2400 {              // PSC3
+                        status = "disabled";
+                };
+                psc@2600 {              // PSC4
+                        status = "disabled";
+                };
+                psc@2800 {              // PSC5
+                        status = "disabled";
+                };
+                psc@2c00 {              // PSC6
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                compatible = "intel,lxt971";
                                reg = <0>;
                        };
                };
-                ata@3a00 {
+                i2c@3d00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        status = "disabled";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        hwmon@2c {
                                compatible = "ad,adm9240";
                                reg = <0x2c>;
@@ -186,20 +123,9 @@
                                reg = <0x51>;
                        };
                };
-                sram@8000 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
-                        reg = <0x8000 0x4000>;
-                };
        };
        pci@f0000d00 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
-                reg = <0xf0000d00 0x100>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <
                                /* IDSEL 0x10 */
@@ -208,20 +134,12 @@
                                0x8000 0 0 3 &mpc5200_pic 0 2 3
                                0x8000 0 0 4 &mpc5200_pic 0 1 3
                                >;
-                clock-frequency = <0>; // From boot loader
-                interrupts = <2 8 0 2 9 0 2 10 0>;
-                bus-range = <0 0>;
                ranges = <0x42000000 0 0x60000000 0x60000000 0 0x10000000
                          0x02000000 0 0x90000000 0x90000000 0 0x10000000
                          0x01000000 0 0x00000000 0xa0000000 0 0x01000000>;
        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = <0 0 0xff800000 0x00800000
                          1 0 0x80000000 0x00800000
                          3 0 0x80000000 0x00800000>;
diff --git a/arch/powerpc/boot/dts/p1020rdb.dts b/arch/powerpc/boot/dts/p1020rdb.dts
index 22f64b62d7f6..d6a8ae458137 100644
--- a/arch/powerpc/boot/dts/p1020rdb.dts
+++ b/arch/powerpc/boot/dts/p1020rdb.dts
@@ -1,7 +1,7 @@
 /*
 * P1020 RDB Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -9,12 +9,11 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "p1020si.dtsi"
 / {
-        model = "fsl,P1020";
+        model = "fsl,P1020RDB";
        compatible = "fsl,P1020RDB";
-        #address-cells = <2>;
-        #size-cells = <2>;
        aliases {
                serial0 = &serial0;
@@ -26,34 +25,11 @@
                pci1 = &pci1;
        };
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,P1020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-                PowerPC,P1020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
        memory {
                device_type = "memory";
        };
        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
                /* NOR, NAND Flashes and Vitesse 5 port L2 switch */
                ranges = <0x0 0x0 0x0 0xef000000 0x01000000
@@ -165,88 +141,14 @@
        };
        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p1020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-                ecm@1000 {
-                        compatible = "fsl,p1020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                memory-controller@2000 {
-                        compatible = "fsl,p1020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
                        rtc@68 {
                                compatible = "dallas,ds1339";
                                reg = <0x68>;
                        };
                };
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
                spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        mode = "cpu";
                        fsl_m25p80@0 {
                                #address-cells = <1>;
@@ -294,66 +196,7 @@
                        };
                };
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p1020-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x40000>; // L2,256K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
                mdio@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-mdio";
-                        reg = <0x24000 0x1000 0xb0030 0x4>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
@@ -369,10 +212,6 @@
                };
                mdio@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,etsec2-tbi";
-                        reg = <0x25000 0x1000 0xb1030 0x4>;
                        tbi0: tbi-phy@11 {
                                reg = <0x11>;
@@ -381,97 +220,25 @@
                };
                enet0: ethernet@b0000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
                        fixed-link = <1 1 1000 0 0>;
                        phy-connection-type = "rgmii-id";
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb0000 0x1000>;
-                                interrupts = <29 2 30 2 34 2>;
-                        };
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb4000 0x1000>;
-                                interrupts = <17 2 18 2 24 2>;
-                        };
                };
                enet1: ethernet@b1000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy0>;
                        tbi-handle = <&tbi0>;
                        phy-connection-type = "sgmii";
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb1000 0x1000>;
-                                interrupts = <35 2 36 2 40 2>;
-                        };
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb5000 0x1000>;
-                                interrupts = <51 2 52 2 67 2>;
-                        };
                };
                enet2: ethernet@b2000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "fsl,etsec2";
-                        fsl,num_rx_queues = <0x8>;
-                        fsl,num_tx_queues = <0x8>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                        phy-connection-type = "rgmii-id";
-                        queue-group@0 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb2000 0x1000>;
-                                interrupts = <31 2 32 2 33 2>;
-                        };
-                        queue-group@1 {
-                                #address-cells = <1>;
-                                #size-cells = <1>;
-                                reg = <0xb6000 0x1000>;
-                                interrupts = <25 2 26 2 27 2>;
-                        };
                };
                usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
                        phy_type = "ulpi";
                };
@@ -481,82 +248,23 @@
                   it enables USB2. OTOH, U-Boot does create a new node
                   when there isn't any. So, just comment it out.
                usb@23000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x23000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <46 0x2>;
                        phy_type = "ulpi";
                };
                */
-                sdhci@2e000 {
-                        compatible = "fsl,p1020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-                msi@41600 {
-                        compatible = "fsl,p1020-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p1020-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
        };
        pci0: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-parent = <&mpic>;
+                interrupt-map = <
-                interrupts = <16 2>;
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
@@ -573,25 +281,23 @@
        };
        pci1: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                device_type = "pci";
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                #interrupt-cells = <1>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                #size-cells = <2>;
+                interrupt-map = <
-                #address-cells = <3>;
+                        /* IDSEL 0x0 */
-                reg = <0 0xffe0a000 0 0x1000>;
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                bus-range = <0 255>;
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                clock-frequency = <33333333>;
+                        >;
-                interrupt-parent = <&mpic>;
-                interrupts = <16 2>;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
new file mode 100644
index 000000000000..f0bf7f42f097
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb_camp_core0.dts
@@ -0,0 +1,213 @@
+/*
+ * P1020 RDB  Core0 Device Tree Source in CAMP mode.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts file allows core0 to have memory, l2, i2c, spi, gpio, tdm, dma, usb,
+ * eth1, eth2, sdhc, crypto, global-util, message, pci0, pci1, msi.
+ *
+ * Please note to add "-b 0" for core0's dts compiling.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/include/ "p1020si.dtsi"
+/ {
+        model = "fsl,P1020RDB";
+        compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
+        aliases {
+                ethernet1 = &enet1;
+                ethernet2 = &enet2;
+                serial0 = &serial0;
+                pci0 = &pci0;
+                pci1 = &pci1;
+        };
+        cpus {
+                PowerPC,P1020@1 {
+                status = "disabled";
+                };
+        };
+        memory {
+                device_type = "memory";
+        };
+        localbus@ffe05000 {
+                status = "disabled";
+        };
+        soc@ffe00000 {
+                i2c@3000 {
+                        rtc@68 {
+                                compatible = "dallas,ds1339";
+                                reg = <0x68>;
+                        };
+                };
+                serial1: serial@4600 {
+                        status = "disabled";
+                };
+                spi@7000 {
+                        fsl_m25p80@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                compatible = "fsl,espi-flash";
+                                reg = <0>;
+                                linux,modalias = "fsl_m25p80";
+                                spi-max-frequency = <40000000>;
+                                partition@0 {
+                                        /* 512KB for u-boot Bootloader Image */
+                                        reg = <0x0 0x00080000>;
+                                        label = "SPI (RO) U-Boot Image";
+                                        read-only;
+                                };
+                                partition@80000 {
+                                        /* 512KB for DTB Image */
+                                        reg = <0x00080000 0x00080000>;
+                                        label = "SPI (RO) DTB Image";
+                                        read-only;
+                                };
+                                partition@100000 {
+                                        /* 4MB for Linux Kernel Image */
+                                        reg = <0x00100000 0x00400000>;
+                                        label = "SPI (RO) Linux Kernel Image";
+                                        read-only;
+                                };
+                                partition@500000 {
+                                        /* 4MB for Compressed RFS Image */
+                                        reg = <0x00500000 0x00400000>;
+                                        label = "SPI (RO) Compressed RFS Image";
+                                        read-only;
+                                };
+                                partition@900000 {
+                                        /* 7MB for JFFS2 based RFS */
+                                        reg = <0x00900000 0x00700000>;
+                                        label = "SPI (RW) JFFS2 RFS";
+                                };
+                        };
+                };
+                mdio@24000 {
+                        phy0: ethernet-phy@0 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <3 1>;
+                                reg = <0x0>;
+                        };
+                        phy1: ethernet-phy@1 {
+                                interrupt-parent = <&mpic>;
+                                interrupts = <2 1>;
+                                reg = <0x1>;
+                        };
+                };
+                mdio@25000 {
+                        tbi0: tbi-phy@11 {
+                                reg = <0x11>;
+                                device_type = "tbi-phy";
+                        };
+                };
+                enet0: ethernet@b0000 {
+                        status = "disabled";
+                };
+                enet1: ethernet@b1000 {
+                        phy-handle = <&phy0>;
+                        tbi-handle = <&tbi0>;
+                        phy-connection-type = "sgmii";
+                };
+                enet2: ethernet@b2000 {
+                        phy-handle = <&phy1>;
+                        phy-connection-type = "rgmii-id";
+                };
+                usb@22000 {
+                        phy_type = "ulpi";
+                };
+                /* USB2 is shared with localbus, so it must be disabled
+                   by default. We can't put 'status = "disabled";' here
+                   since U-Boot doesn't clear the status property when
+                   it enables USB2. OTOH, U-Boot does create a new node
+                   when there isn't any. So, just comment it out.
+                usb@23000 {
+                        phy_type = "ulpi";
+                };
+                */
+                mpic: pic@40000 {
+                        protected-sources = <
+                        42 29 30 34     /* serial1, enet0-queue-group0 */
+                        17 18 24 45     /* enet0-queue-group1, crypto */
+                        >;
+                };
+        };
+        pci0: pcie@ffe09000 {
+                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0xa0000000
+                                  0x2000000 0x0 0xa0000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+        pci1: pcie@ffe0a000 {
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
+                pcie@0 {
+                        reg = <0x0 0x0 0x0 0x0 0x0>;
+                        #size-cells = <2>;
+                        #address-cells = <3>;
+                        device_type = "pci";
+                        ranges = <0x2000000 0x0 0x80000000
+                                  0x2000000 0x0 0x80000000
+                                  0x0 0x20000000
+                                  0x1000000 0x0 0x0
+                                  0x1000000 0x0 0x0
+                                  0x0 0x100000>;
+                };
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
new file mode 100644
index 000000000000..6ec02204a44e
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020rdb_camp_core1.dts
@@ -0,0 +1,148 @@
+/*
+ * P1020 RDB Core1 Device Tree Source in CAMP mode.
+ *
+ * In CAMP mode, each core needs to have its own dts. Only mpic and L2 cache
+ * can be shared, all the other devices must be assigned to one core only.
+ * This dts allows core1 to have l2, eth0, crypto.
+ *
+ * Please note to add "-b 1" for core1's dts compiling.
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/include/ "p1020si.dtsi"
+/ {
+        model = "fsl,P1020RDB";
+        compatible = "fsl,P1020RDB", "fsl,MPC85XXRDB-CAMP";
+        aliases {
+                ethernet0 = &enet0;
+                serial0 = &serial1;
+                };
+        cpus {
+                PowerPC,P1020@0 {
+                status = "disabled";
+                };
+        };
+        memory {
+                device_type = "memory";
+        };
+        localbus@ffe05000 {
+                status = "disabled";
+        };
+        soc@ffe00000 {
+                ecm-law@0 {
+                        status = "disabled";
+                };
+                ecm@1000 {
+                        status = "disabled";
+                };
+                memory-controller@2000 {
+                        status = "disabled";
+                };
+                i2c@3000 {
+                        status = "disabled";
+                };
+                i2c@3100 {
+                        status = "disabled";
+                };
+                serial0: serial@4500 {
+                        status = "disabled";
+                };
+                spi@7000 {
+                        status = "disabled";
+                };
+                gpio: gpio-controller@f000 {
+                        status = "disabled";
+                };
+                dma@21300 {
+                        status = "disabled";
+                };
+                mdio@24000 {
+                        status = "disabled";
+                };
+                mdio@25000 {
+                        status = "disabled";
+                };
+                enet0: ethernet@b0000 {
+                        fixed-link = <1 1 1000 0 0>;
+                        phy-connection-type = "rgmii-id";
+                };
+                enet1: ethernet@b1000 {
+                        status = "disabled";
+                };
+                enet2: ethernet@b2000 {
+                        status = "disabled";
+                };
+                usb@22000 {
+                        status = "disabled";
+                };
+                sdhci@2e000 {
+                        status = "disabled";
+                };
+                mpic: pic@40000 {
+                        protected-sources = <
+                        16              /* ecm, mem, L2, pci0, pci1 */
+                        43 42 59        /* i2c, serial0, spi */
+                        47 63 62        /* gpio, tdm */
+                        20 21 22 23     /* dma */
+                        03 02           /* mdio */
+                        35 36 40        /* enet1-queue-group0 */
+                        51 52 67        /* enet1-queue-group1 */
+                        31 32 33        /* enet2-queue-group0 */
+                        25 26 27        /* enet2-queue-group1 */
+                        28 72 58        /* usb, sdhci, crypto */
+                        0xb0 0xb1 0xb2  /* message */
+                        0xb3 0xb4 0xb5
+                        0xb6 0xb7
+                        0xe0 0xe1 0xe2  /* msi */
+                        0xe3 0xe4 0xe5
+                        0xe6 0xe7               /* sdhci, crypto , pci */
+                        >;
+                };
+                msi@41600 {
+                        status = "disabled";
+                };
+                global-utilities@e0000 {        //global utilities block
+                        status = "disabled";
+                };
+        };
+        pci0: pcie@ffe09000 {
+                status = "disabled";
+        };
+        pci1: pcie@ffe0a000 {
+                status = "disabled";
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1020si.dtsi b/arch/powerpc/boot/dts/p1020si.dtsi
new file mode 100644
index 000000000000..5c5acb66c3fc
--- /dev/null
+++ b/arch/powerpc/boot/dts/p1020si.dtsi
@@ -0,0 +1,377 @@
+/*
+ * P1020si Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/ {
+        compatible = "fsl,P1020";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                PowerPC,P1020@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+                PowerPC,P1020@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+        localbus@ffe05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,p1020-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xffe05000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+        };
+        soc@ffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,p1020-immr", "simple-bus";
+                ranges = <0x0  0x0 0xffe00000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+                ecm@1000 {
+                        compatible = "fsl,p1020-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <16 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                memory-controller@2000 {
+                        compatible = "fsl,p1020-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                spi@7000 {
+                        cell-index = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,espi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <59 0x2>;
+                        interrupt-parent = <&mpic>;
+                        mode = "cpu";
+                };
+                gpio: gpio-controller@f000 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x100>;
+                        interrupts = <47 0x2>;
+                        interrupt-parent = <&mpic>;
+                        gpio-controller;
+                };
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,p1020-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x40000>; // L2,256K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+                mdio@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,etsec2-mdio";
+                        reg = <0x24000 0x1000 0xb0030 0x4>;
+                };
+                mdio@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,etsec2-tbi";
+                        reg = <0x25000 0x1000 0xb1030 0x4>;
+                };
+                enet0: ethernet@b0000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb0000 0x1000>;
+                                interrupts = <29 2 30 2 34 2>;
+                        };
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb4000 0x1000>;
+                                interrupts = <17 2 18 2 24 2>;
+                        };
+                };
+                enet1: ethernet@b1000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb1000 0x1000>;
+                                interrupts = <35 2 36 2 40 2>;
+                        };
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb5000 0x1000>;
+                                interrupts = <51 2 52 2 67 2>;
+                        };
+                };
+                enet2: ethernet@b2000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "fsl,etsec2";
+                        fsl,num_rx_queues = <0x8>;
+                        fsl,num_tx_queues = <0x8>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupt-parent = <&mpic>;
+                        queue-group@0 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb2000 0x1000>;
+                                interrupts = <31 2 32 2 33 2>;
+                        };
+                        queue-group@1 {
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0xb6000 0x1000>;
+                                interrupts = <25 2 26 2 27 2>;
+                        };
+                };
+                usb@22000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x22000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <28 0x2>;
+                };
+                /* USB2 is shared with localbus, so it must be disabled
+                   by default. We can't put 'status = "disabled";' here
+                   since U-Boot doesn't clear the status property when
+                   it enables USB2. OTOH, U-Boot does create a new node
+                   when there isn't any. So, just comment it out.
+                usb@23000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x23000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <46 0x2>;
+                        phy_type = "ulpi";
+                };
+                */
+                sdhci@2e000 {
+                        compatible = "fsl,p1020-esdhc", "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <72 0x2>;
+                        interrupt-parent = <&mpic>;
+                        /* Filled in by U-Boot */
+                        clock-frequency = <0>;
+                };
+                crypto@30000 {
+                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
+                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0xbfe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+                msi@41600 {
+                        compatible = "fsl,p1020-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,p1020-guts","fsl,p2020-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+        };
+        pci0: pcie@ffe09000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xffe09000 0 0x1000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <16 2>;
+        };
+        pci1: pcie@ffe0a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xffe0a000 0 0x1000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <16 2>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/p1022ds.dts b/arch/powerpc/boot/dts/p1022ds.dts
index 8bcb10b92677..98d9426d4b85 100644
--- a/arch/powerpc/boot/dts/p1022ds.dts
+++ b/arch/powerpc/boot/dts/p1022ds.dts
@@ -52,7 +52,7 @@
                #size-cells = <1>;
                compatible = "fsl,p1022-elbc", "fsl,elbc", "simple-bus";
                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
+                interrupts = <19 2 0 0>;
                ranges = <0x0 0x0 0xf 0xe8000000 0x08000000
                          0x1 0x0 0xf 0xe0000000 0x08000000
@@ -148,6 +148,17 @@
                                label = "reserved-nand";
                        };
                };
+                board-control@3,0 {
+                        compatible = "fsl,p1022ds-pixis";
+                        reg = <3 0 0x30>;
+                        interrupt-parent = <&mpic>;
+                        /*
+                         * IRQ8 is generated if the "EVENT" switch is pressed
+                         * and PX_CTL[EVESEL] is set to 00.
+                         */
+                        interrupts = <8 8 0 0>;
+                };
        };
        soc@fffe00000 {
@@ -167,13 +178,13 @@
                ecm@1000 {
                        compatible = "fsl,p1022-ecm", "fsl,ecm";
                        reg = <0x1000 0x1000>;
-                        interrupts = <16 2>;
+                        interrupts = <16 2 0 0>;
                };
                memory-controller@2000 {
                        compatible = "fsl,p1022-memory-controller";
                        reg = <0x2000 0x1000>;
-                        interrupts = <16 2>;
+                        interrupts = <16 2 0 0>;
                };
                i2c@3000 {
@@ -182,7 +193,7 @@
                        cell-index = <0>;
                        compatible = "fsl-i2c";
                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
+                        interrupts = <43 2 0 0>;
                        dfsrr;
                };
@@ -192,14 +203,16 @@
                        cell-index = <1>;
                        compatible = "fsl-i2c";
                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
+                        interrupts = <43 2 0 0>;
                        dfsrr;
                        wm8776:codec@1a {
                                compatible = "wlf,wm8776";
                                reg = <0x1a>;
-                                /* MCLK source is a stand-alone oscillator */
+                                /*
-                                clock-frequency = <12288000>;
+                                 * clock-frequency will be set by U-Boot if
+                                 * the clock is enabled.
+                                 */
                        };
                };
@@ -209,7 +222,7 @@
                        compatible = "ns16550";
                        reg = <0x4500 0x100>;
                        clock-frequency = <0>;
-                        interrupts = <42 2>;
+                        interrupts = <42 2 0 0>;
                };
                serial1: serial@4600 {
@@ -218,7 +231,7 @@
                        compatible = "ns16550";
                        reg = <0x4600 0x100>;
                        clock-frequency = <0>;
-                        interrupts = <42 2>;
+                        interrupts = <42 2 0 0>;
                };
                spi@7000 {
@@ -227,7 +240,7 @@
                        #size-cells = <0>;
                        compatible = "fsl,espi";
                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
+                        interrupts = <59 0x2 0 0>;
                        espi,num-ss-bits = <4>;
                        mode = "cpu";
@@ -264,12 +277,13 @@
                        compatible = "fsl,mpc8610-ssi";
                        cell-index = <0>;
                        reg = <0x15000 0x100>;
-                        interrupts = <75 2>;
+                        interrupts = <75 2 0 0>;
                        fsl,mode = "i2s-slave";
                        codec-handle = <&wm8776>;
                        fsl,playback-dma = <&dma00>;
                        fsl,capture-dma = <&dma01>;
-                        fsl,fifo-depth = <16>;
+                        fsl,fifo-depth = <15>;
+                        fsl,ssi-asynchronous;
                };
                dma@c300 {
@@ -280,28 +294,28 @@
                        ranges = <0x0 0xc100 0x200>;
                        cell-index = <1>;
                        dma00: dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                reg = <0x0 0x80>;
                                cell-index = <0>;
-                                interrupts = <76 2>;
+                                interrupts = <76 2 0 0>;
                        };
                        dma01: dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                compatible = "fsl,ssi-dma-channel";
                                reg = <0x80 0x80>;
                                cell-index = <1>;
-                                interrupts = <77 2>;
+                                interrupts = <77 2 0 0>;
                        };
                        dma-channel@100 {
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x100 0x80>;
                                cell-index = <2>;
-                                interrupts = <78 2>;
+                                interrupts = <78 2 0 0>;
                        };
                        dma-channel@180 {
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x180 0x80>;
                                cell-index = <3>;
-                                interrupts = <79 2>;
+                                interrupts = <79 2 0 0>;
                        };
                };
@@ -309,7 +323,7 @@
                        #gpio-cells = <2>;
                        compatible = "fsl,mpc8572-gpio";
                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
+                        interrupts = <47 0x2 0 0>;
                        gpio-controller;
                };
@@ -318,7 +332,7 @@
                        reg = <0x20000 0x1000>;
                        cache-line-size = <32>; // 32 bytes
                        cache-size = <0x40000>; // L2, 256K
-                        interrupts = <16 2>;
+                        interrupts = <16 2 0 0>;
                };
                dma@21300 {
@@ -332,25 +346,25 @@
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x0 0x80>;
                                cell-index = <0>;
-                                interrupts = <20 2>;
+                                interrupts = <20 2 0 0>;
                        };
                        dma-channel@80 {
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x80 0x80>;
                                cell-index = <1>;
-                                interrupts = <21 2>;
+                                interrupts = <21 2 0 0>;
                        };
                        dma-channel@100 {
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x100 0x80>;
                                cell-index = <2>;
-                                interrupts = <22 2>;
+                                interrupts = <22 2 0 0>;
                        };
                        dma-channel@180 {
                                compatible = "fsl,eloplus-dma-channel";
                                reg = <0x180 0x80>;
                                cell-index = <3>;
-                                interrupts = <23 2>;
+                                interrupts = <23 2 0 0>;
                        };
                };
@@ -359,7 +373,7 @@
                        #size-cells = <0>;
                        compatible = "fsl-usb2-dr";
                        reg = <0x22000 0x1000>;
-                        interrupts = <28 0x2>;
+                        interrupts = <28 0x2 0 0>;
                        phy_type = "ulpi";
                };
@@ -370,11 +384,11 @@
                        reg = <0x24000 0x1000 0xb0030 0x4>;
                        phy0: ethernet-phy@0 {
-                                interrupts = <3 1>;
+                                interrupts = <3 1 0 0>;
                                reg = <0x1>;
                        };
                        phy1: ethernet-phy@1 {
-                                interrupts = <9 1>;
+                                interrupts = <9 1 0 0>;
                                reg = <0x2>;
                        };
                };
@@ -405,13 +419,13 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0xB0000 0x1000>;
-                                interrupts = <29 2 30 2 34 2>;
+                                interrupts = <29 2 0 0 30 2 0 0 34 2 0 0>;
                        };
                        queue-group@1{
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0xB4000 0x1000>;
-                                interrupts = <17 2 18 2 24 2>;
+                                interrupts = <17 2 0 0 18 2 0 0 24 2 0 0>;
                        };
                };
@@ -432,20 +446,20 @@
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0xB1000 0x1000>;
-                                interrupts = <35 2 36 2 40 2>;
+                                interrupts = <35 2 0 0 36 2 0 0 40 2 0 0>;
                        };
                        queue-group@1{
                                #address-cells = <1>;
                                #size-cells = <1>;
                                reg = <0xB5000 0x1000>;
-                                interrupts = <51 2 52 2 67 2>;
+                                interrupts = <51 2 0 0 52 2 0 0 67 2 0 0>;
                        };
                };
                sdhci@2e000 {
                        compatible = "fsl,p1022-esdhc", "fsl,esdhc";
                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
+                        interrupts = <72 0x2 0 0>;
                        fsl,sdhci-auto-cmd12;
                        /* Filled in by U-Boot */
                        clock-frequency = <0>;
@@ -456,7 +470,7 @@
                                     "fsl,sec2.4", "fsl,sec2.2", "fsl,sec2.1",
                                     "fsl,sec2.0";
                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
+                        interrupts = <45 2 0 0 58 2 0 0>;
                        fsl,num-channels = <4>;
                        fsl,channel-fifo-len = <24>;
                        fsl,exec-units-mask = <0x97c>;
@@ -464,17 +478,17 @@
                };
                sata@18000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                        compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
                        reg = <0x18000 0x1000>;
                        cell-index = <1>;
-                        interrupts = <74 0x2>;
+                        interrupts = <74 0x2 0 0>;
                };
                sata@19000 {
-                        compatible = "fsl,mpc8536-sata", "fsl,pq-sata";
+                        compatible = "fsl,p1022-sata", "fsl,pq-sata-v2";
                        reg = <0x19000 0x1000>;
                        cell-index = <2>;
-                        interrupts = <41 0x2>;
+                        interrupts = <41 0x2 0 0>;
                };
                power@e0070{
@@ -485,21 +499,33 @@
                display@10000 {
                        compatible = "fsl,diu", "fsl,p1022-diu";
                        reg = <0x10000 1000>;
-                        interrupts = <64 2>;
+                        interrupts = <64 2 0 0>;
                };
                timer@41100 {
                        compatible = "fsl,mpic-global-timer";
-                        reg = <0x41100 0x204>;
+                        reg = <0x41100 0x100 0x41300 4>;
-                        interrupts = <0xf7 0x2>;
+                        interrupts = <0 0 3 0
+                                      1 0 3 0
+                                      2 0 3 0
+                                      3 0 3 0>;
+                };
+                timer@42100 {
+                        compatible = "fsl,mpic-global-timer";
+                        reg = <0x42100 0x100 0x42300 4>;
+                        interrupts = <4 0 3 0
+                                      5 0 3 0
+                                      6 0 3 0
+                                      7 0 3 0>;
                };
                mpic: pic@40000 {
                        interrupt-controller;
                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
+                        #interrupt-cells = <4>;
                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
+                        compatible = "fsl,mpic";
                        device_type = "open-pic";
                };
@@ -508,14 +534,14 @@
                        reg = <0x41600 0x80>;
                        msi-available-ranges = <0 0x100>;
                        interrupts = <
-                                0xe0 0
+                                0xe0 0 0 0
-                                0xe1 0
+                                0xe1 0 0 0
-                                0xe2 0
+                                0xe2 0 0 0
-                                0xe3 0
+                                0xe3 0 0 0
-                                0xe4 0
+                                0xe4 0 0 0
-                                0xe5 0
+                                0xe5 0 0 0
-                                0xe6 0
+                                0xe6 0 0 0
-                                0xe7 0>;
+                                0xe7 0 0 0>;
                };
                global-utilities@e0000 {        //global utilities block
@@ -536,7 +562,7 @@
                ranges = <0x2000000 0x0 0xa0000000 0xc 0x20000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0xf 0xffc10000 0x0 0x10000>;
                clock-frequency = <33333333>;
-                interrupts = <16 2>;
+                interrupts = <16 2 0 0>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <
                        /* IDSEL 0x0 */
@@ -571,7 +597,7 @@
                ranges = <0x2000000 0x0 0xc0000000 0xc 0x40000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0xf 0xffc20000 0x0 0x10000>;
                clock-frequency = <33333333>;
-                interrupts = <16 2>;
+                interrupts = <16 2 0 0>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <
                        /* IDSEL 0x0 */
@@ -607,7 +633,7 @@
                ranges = <0x2000000 0x0 0x80000000 0xc 0x00000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0xf 0xffc00000 0x0 0x10000>;
                clock-frequency = <33333333>;
-                interrupts = <16 2>;
+                interrupts = <16 2 0 0>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <
                        /* IDSEL 0x0 */
diff --git a/arch/powerpc/boot/dts/p2020ds.dts b/arch/powerpc/boot/dts/p2020ds.dts
index 11019142813c..dae403100f2f 100644
--- a/arch/powerpc/boot/dts/p2020ds.dts
+++ b/arch/powerpc/boot/dts/p2020ds.dts
@@ -1,7 +1,7 @@
 /*
 * P2020 DS Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -9,12 +9,11 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "p2020si.dtsi"
 / {
-        model = "fsl,P2020";
+        model = "fsl,P2020DS";
        compatible = "fsl,P2020DS";
-        #address-cells = <2>;
-        #size-cells = <2>;
        aliases {
                ethernet0 = &enet0;
@@ -27,35 +26,13 @@
                pci2 = &pci2;
        };
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,P2020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-                PowerPC,P2020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
        memory {
                device_type = "memory";
        };
        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
                compatible = "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
                ranges = <0x0 0x0 0x0 0xe8000000 0x08000000
                          0x1 0x0 0x0 0xe0000000 0x08000000
                          0x2 0x0 0x0 0xffa00000 0x00040000
@@ -158,352 +135,90 @@
        };
        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p2020-immr", "simple-bus";
-                ranges = <0x0 0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-                ecm@1000 {
-                        compatible = "fsl,p2020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                memory-controller@2000 {
-                        compatible = "fsl,p2020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
-                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                i2c@3100 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                serial0: serial@4500 {
+                usb@22000 {
-                        cell-index = <0>;
+                        phy_type = "ulpi";
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                spi@7000 {
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
                };
-                dma@c300 {
+                mdio@24520 {
-                        #address-cells = <1>;
+                        phy0: ethernet-phy@0 {
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
-                        ranges = <0x0 0xc100 0x200>;
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
+                                interrupts = <3 1>;
+                                reg = <0x0>;
                        };
-                        dma-channel@80 {
+                        phy1: ethernet-phy@1 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
+                                interrupts = <3 1>;
+                                reg = <0x1>;
                        };
-                        dma-channel@100 {
+                        phy2: ethernet-phy@2 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
+                                interrupts = <3 1>;
+                                reg = <0x2>;
                        };
-                        dma-channel@180 {
+                        tbi0: tbi-phy@11 {
-                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x11>;
-                                reg = <0x180 0x80>;
+                                device_type = "tbi-phy";
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
                        };
-                };
-                gpio: gpio-controller@f000 {
-                        #gpio-cells = <2>;
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
                };
-                L2: l2-cache-controller@20000 {
+                mdio@25520 {
-                        compatible = "fsl,p2020-l2-cache-controller";
+                        tbi1: tbi-phy@11 {
-                        reg = <0x20000 0x1000>;
+                                reg = <0x11>;
-                        cache-line-size = <32>; // 32 bytes
+                                device_type = "tbi-phy";
-                        cache-size = <0x80000>; // L2, 512k
+                        };
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
                };
-                dma@21300 {
+                mdio@26520 {
-                        #address-cells = <1>;
+                        tbi2: tbi-phy@11 {
-                        #size-cells = <1>;
+                                reg = <0x11>;
-                        compatible = "fsl,eloplus-dma";
+                                device_type = "tbi-phy";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
                        };
                };
-                usb@22000 {
+                ptp_clock@24E00 {
-                        #address-cells = <1>;
+                        compatible = "fsl,etsec-ptp";
-                        #size-cells = <0>;
+                        reg = <0x24E00 0xB0>;
-                        compatible = "fsl-usb2-dr";
+                        interrupts = <68 2 69 2 70 2>;
-                        reg = <0x22000 0x1000>;
+                        interrupt-parent = < &mpic >;
-                        interrupt-parent = <&mpic>;
+                        fsl,tclk-period = <5>;
-                        interrupts = <28 0x2>;
+                        fsl,tmr-prsc = <200>;
-                        phy_type = "ulpi";
+                        fsl,tmr-add = <0xCCCCCCCD>;
+                        fsl,tmr-fiper1 = <0x3B9AC9FB>;
+                        fsl,tmr-fiper2 = <0x0001869B>;
+                        fsl,max-adj = <249999999>;
                };
                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy0>;
                        phy-connection-type = "rgmii-id";
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <3 1>;
-                                        reg = <0x0>;
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <3 1>;
-                                        reg = <0x1>;
-                                };
-                                phy2: ethernet-phy@2 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <3 1>;
-                                        reg = <0x2>;
-                                };
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
                };
                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
                        tbi-handle = <&tbi1>;
                        phy-handle = <&phy1>;
                        phy-connection-type = "rgmii-id";
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-                                tbi1: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
                };
                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
                        tbi-handle = <&tbi2>;
                        phy-handle = <&phy2>;
                        phy-connection-type = "rgmii-id";
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-                                tbi2: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
-                };
-                sdhci@2e000 {
-                        compatible = "fsl,p2020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
                };
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
                msi@41600 {
                        compatible = "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-                global-utilities@e0000 {        //global utilities block
-                        compatible = "fsl,p2020-guts";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
                };
        };
        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe08000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <24 2>;
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <
                        /* IDSEL 0x0 */
@@ -528,18 +243,8 @@
        };
        pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <25 2>;
                interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
                interrupt-map = <
@@ -667,18 +372,8 @@
        };
        pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe0a000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
-                clock-frequency = <33333333>;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
                interrupt-map = <
                        /* IDSEL 0x0 */
diff --git a/arch/powerpc/boot/dts/p2020rdb.dts b/arch/powerpc/boot/dts/p2020rdb.dts
index da4cb0d8d215..1d7a05f3021e 100644
--- a/arch/powerpc/boot/dts/p2020rdb.dts
+++ b/arch/powerpc/boot/dts/p2020rdb.dts
@@ -1,7 +1,7 @@
 /*
 * P2020 RDB Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -9,12 +9,11 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "p2020si.dtsi"
 / {
-        model = "fsl,P2020";
+        model = "fsl,P2020RDB";
        compatible = "fsl,P2020RDB";
-        #address-cells = <2>;
-        #size-cells = <2>;
        aliases {
                ethernet0 = &enet0;
@@ -26,34 +25,11 @@
                pci1 = &pci1;
        };
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,P2020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
-                };
-                PowerPC,P2020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
-                };
-        };
        memory {
                device_type = "memory";
        };
        localbus@ffe05000 {
-                #address-cells = <2>;
-                #size-cells = <1>;
-                compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
-                reg = <0 0xffe05000 0 0x1000>;
-                interrupts = <19 2>;
-                interrupt-parent = <&mpic>;
                /* NOR and NAND Flashes */
                ranges = <0x0 0x0 0x0 0xef000000 0x01000000
@@ -165,90 +141,16 @@
        };
        soc@ffe00000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                device_type = "soc";
-                compatible = "fsl,p2020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-                ecm@1000 {
-                        compatible = "fsl,p2020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                memory-controller@2000 {
-                        compatible = "fsl,p2020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
                        rtc@68 {
                                compatible = "dallas,ds1339";
                                reg = <0x68>;
                        };
                };
-                i2c@3100 {
+        spi@7000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                serial1: serial@4600 {
-                        cell-index = <1>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
-                        interrupts = <42 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                spi@7000 {
+                fsl_m25p80@0 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        mode = "cpu";
-                        fsl_m25p80@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
                                compatible = "fsl,espi-flash";
@@ -294,254 +196,81 @@
                        };
                };
-                dma@c300 {
+                usb@22000 {
-                        #address-cells = <1>;
+                        phy_type = "ulpi";
-                        #size-cells = <1>;
+                };
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0xc300 0x4>;
+                mdio@24520 {
-                        ranges = <0x0 0xc100 0x200>;
+                        phy0: ethernet-phy@0 {
-                        cell-index = <1>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <76 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <77 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
                                interrupt-parent = <&mpic>;
-                                interrupts = <78 2>;
+                                interrupts = <3 1>;
-                        };
+                                reg = <0x0>;
-                        dma-channel@180 {
+                                };
-                                compatible = "fsl,eloplus-dma-channel";
+                        phy1: ethernet-phy@1 {
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
                                interrupt-parent = <&mpic>;
-                                interrupts = <79 2>;
+                                interrupts = <3 1>;
-                        };
+                                reg = <0x1>;
+                                };
                };
-                gpio: gpio-controller@f000 {
+                mdio@25520 {
-                        #gpio-cells = <2>;
+                        tbi0: tbi-phy@11 {
-                        compatible = "fsl,mpc8572-gpio";
+                                reg = <0x11>;
-                        reg = <0xf000 0x100>;
+                                device_type = "tbi-phy";
-                        interrupts = <47 0x2>;
+                        };
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
                };
-                L2: l2-cache-controller@20000 {
+                mdio@26520 {
-                        compatible = "fsl,p2020-l2-cache-controller";
+                        status = "disabled";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2,512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
                };
-                dma@21300 {
+                ptp_clock@24E00 {
-                        #address-cells = <1>;
+                        compatible = "fsl,etsec-ptp";
-                        #size-cells = <1>;
+                        reg = <0x24E00 0xB0>;
-                        compatible = "fsl,eloplus-dma";
+                        interrupts = <68 2 69 2 70 2>;
-                        reg = <0x21300 0x4>;
+                        interrupt-parent = < &mpic >;
-                        ranges = <0x0 0x21100 0x200>;
+                        fsl,tclk-period = <5>;
-                        cell-index = <0>;
+                        fsl,tmr-prsc = <200>;
-                        dma-channel@0 {
+                        fsl,tmr-add = <0xCCCCCCCD>;
-                                compatible = "fsl,eloplus-dma-channel";
+                        fsl,tmr-fiper1 = <0x3B9AC9FB>;
-                                reg = <0x0 0x80>;
+                        fsl,tmr-fiper2 = <0x0001869B>;
-                                cell-index = <0>;
+                        fsl,max-adj = <249999999>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
-                };
-                usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
-                        phy_type = "ulpi";
                };
                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
                        fixed-link = <1 1 1000 0 0>;
                        phy-connection-type = "rgmii-id";
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-mdio";
-                                reg = <0x520 0x20>;
-                                phy0: ethernet-phy@0 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <3 1>;
-                                        reg = <0x0>;
-                                };
-                                phy1: ethernet-phy@1 {
-                                        interrupt-parent = <&mpic>;
-                                        interrupts = <3 1>;
-                                        reg = <0x1>;
-                                };
-                        };
                };
                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy0>;
                        phy-connection-type = "sgmii";
-                        mdio@520 {
-                                #address-cells = <1>;
-                                #size-cells = <0>;
-                                compatible = "fsl,gianfar-tbi";
-                                reg = <0x520 0x20>;
-                                tbi0: tbi-phy@11 {
-                                        reg = <0x11>;
-                                        device_type = "tbi-phy";
-                                };
-                        };
                };
                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                        phy-connection-type = "rgmii-id";
                };
-                sdhci@2e000 {
+        };
-                        compatible = "fsl,p2020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
-                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
-                };
-                msi@41600 {
-                        compatible = "fsl,p2020-msi", "fsl,mpic-msi";
-                        reg = <0x41600 0x80>;
-                        msi-available-ranges = <0 0x100>;
-                        interrupts = <
-                                0xe0 0
-                                0xe1 0
-                                0xe2 0
-                                0xe3 0
-                                0xe4 0
-                                0xe5 0
-                                0xe6 0
-                                0xe7 0>;
-                        interrupt-parent = <&mpic>;
-                };
-                global-utilities@e0000 {        //global utilities block
+        pci0: pcie@ffe08000 {
-                        compatible = "fsl,p2020-guts";
+                status = "disabled";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
-                };
        };
-        pci0: pcie@ffe09000 {
+        pci1: pcie@ffe09000 {
-                compatible = "fsl,mpc8548-pcie";
-                device_type = "pci";
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-parent = <&mpic>;
+                interrupt-map = <
-                interrupts = <25 2>;
+                        /* IDSEL 0x0 */
-                pcie@0 {
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
+                        pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
                        #address-cells = <3>;
@@ -556,26 +285,24 @@
                };
        };
-        pci1: pcie@ffe0a000 {
+        pci2: pcie@ffe0a000 {
-                compatible = "fsl,mpc8548-pcie";
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                device_type = "pci";
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                #interrupt-cells = <1>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                #size-cells = <2>;
+                interrupt-map = <
-                #address-cells = <3>;
+                        /* IDSEL 0x0 */
-                reg = <0 0xffe0a000 0 0x1000>;
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
-                bus-range = <0 255>;
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
-                clock-frequency = <33333333>;
+                        >;
-                interrupt-parent = <&mpic>;
-                interrupts = <26 2>;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
index 0fe93d0c8b2e..fc8ddddfccb6 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core0.dts
@@ -6,7 +6,7 @@
 * This dts file allows core0 to have memory, l2, i2c, spi, gpio, dma1, usb,
 * eth1, eth2, sdhc, crypto, global-util, pci0.
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -14,12 +14,11 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "p2020si.dtsi"
 / {
-        model = "fsl,P2020";
+        model = "fsl,P2020RDB";
        compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
-        #address-cells = <2>;
-        #size-cells = <2>;
        aliases {
                ethernet1 = &enet1;
@@ -29,91 +28,33 @@
        };
        cpus {
-                #address-cells = <1>;
+                PowerPC,P2020@1 {
-                #size-cells = <0>;
+                status = "disabled";
-                PowerPC,P2020@0 {
-                        device_type = "cpu";
-                        reg = <0x0>;
-                        next-level-cache = <&L2>;
                };
        };
        memory {
                device_type = "memory";
        };
-        soc@ffe00000 {
+        localbus@ffe05000 {
-                #address-cells = <1>;
+                status = "disabled";
-                #size-cells = <1>;
+        };
-                device_type = "soc";
-                compatible = "fsl,p2020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
-                bus-frequency = <0>;            // Filled out by uboot.
-                ecm-law@0 {
-                        compatible = "fsl,ecm-law";
-                        reg = <0x0 0x1000>;
-                        fsl,num-laws = <12>;
-                };
-                ecm@1000 {
-                        compatible = "fsl,p2020-ecm", "fsl,ecm";
-                        reg = <0x1000 0x1000>;
-                        interrupts = <17 2>;
-                        interrupt-parent = <&mpic>;
-                };
-                memory-controller@2000 {
-                        compatible = "fsl,p2020-memory-controller";
-                        reg = <0x2000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <18 2>;
-                };
+        soc@ffe00000 {
                i2c@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        cell-index = <0>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3000 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
                        rtc@68 {
                                compatible = "dallas,ds1339";
                                reg = <0x68>;
                        };
                };
-                i2c@3100 {
+                serial1: serial@4600 {
-                        #address-cells = <1>;
+                        status = "disabled";
-                        #size-cells = <0>;
-                        cell-index = <1>;
-                        compatible = "fsl-i2c";
-                        reg = <0x3100 0x100>;
-                        interrupts = <43 2>;
-                        interrupt-parent = <&mpic>;
-                        dfsrr;
-                };
-                serial0: serial@4500 {
-                        cell-index = <0>;
-                        device_type = "serial";
-                        compatible = "ns16550";
-                        reg = <0x4500 0x100>;
-                        clock-frequency = <0>;
                };
                spi@7000 {
-                        cell-index = <0>;
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,espi";
-                        reg = <0x7000 0x1000>;
-                        interrupts = <59 0x2>;
-                        interrupt-parent = <&mpic>;
-                        mode = "cpu";
                        fsl_m25p80@0 {
                                #address-cells = <1>;
@@ -161,76 +102,15 @@
                        };
                };
-                gpio: gpio-controller@f000 {
+                dma@c300 {
-                        #gpio-cells = <2>;
+                        status = "disabled";
-                        compatible = "fsl,mpc8572-gpio";
-                        reg = <0xf000 0x100>;
-                        interrupts = <47 0x2>;
-                        interrupt-parent = <&mpic>;
-                        gpio-controller;
-                };
-                L2: l2-cache-controller@20000 {
-                        compatible = "fsl,p2020-l2-cache-controller";
-                        reg = <0x20000 0x1000>;
-                        cache-line-size = <32>; // 32 bytes
-                        cache-size = <0x80000>; // L2,512K
-                        interrupt-parent = <&mpic>;
-                        interrupts = <16 2>;
-                };
-                dma@21300 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        compatible = "fsl,eloplus-dma";
-                        reg = <0x21300 0x4>;
-                        ranges = <0x0 0x21100 0x200>;
-                        cell-index = <0>;
-                        dma-channel@0 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x0 0x80>;
-                                cell-index = <0>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <20 2>;
-                        };
-                        dma-channel@80 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x80 0x80>;
-                                cell-index = <1>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <21 2>;
-                        };
-                        dma-channel@100 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x100 0x80>;
-                                cell-index = <2>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <22 2>;
-                        };
-                        dma-channel@180 {
-                                compatible = "fsl,eloplus-dma-channel";
-                                reg = <0x180 0x80>;
-                                cell-index = <3>;
-                                interrupt-parent = <&mpic>;
-                                interrupts = <23 2>;
-                        };
                };
                usb@22000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl-usb2-dr";
-                        reg = <0x22000 0x1000>;
-                        interrupt-parent = <&mpic>;
-                        interrupts = <28 0x2>;
                        phy_type = "ulpi";
                };
                mdio@24520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-mdio";
-                        reg = <0x24520 0x20>;
                        phy0: ethernet-phy@0 {
                                interrupt-parent = <&mpic>;
@@ -245,29 +125,21 @@
                };
                mdio@25520 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,gianfar-tbi";
-                        reg = <0x26520 0x20>;
                        tbi0: tbi-phy@11 {
                                reg = <0x11>;
                                device_type = "tbi-phy";
                        };
                };
+                mdio@26520 {
+                        status = "disabled";
+                };
+                enet0: ethernet@24000 {
+                        status = "disabled";
+                };
                enet1: ethernet@25000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <1>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x25000 0x1000>;
-                        ranges = <0x0 0x25000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <35 2 36 2 40 2>;
-                        interrupt-parent = <&mpic>;
                        tbi-handle = <&tbi0>;
                        phy-handle = <&phy0>;
                        phy-connection-type = "sgmii";
@@ -275,49 +147,12 @@
                };
                enet2: ethernet@26000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <2>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x26000 0x1000>;
-                        ranges = <0x0 0x26000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <31 2 32 2 33 2>;
-                        interrupt-parent = <&mpic>;
                        phy-handle = <&phy1>;
                        phy-connection-type = "rgmii-id";
                };
-                sdhci@2e000 {
-                        compatible = "fsl,p2020-esdhc", "fsl,esdhc";
-                        reg = <0x2e000 0x1000>;
-                        interrupts = <72 0x2>;
-                        interrupt-parent = <&mpic>;
-                        /* Filled in by U-Boot */
-                        clock-frequency = <0>;
-                };
-                crypto@30000 {
-                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
-                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
-                        reg = <0x30000 0x10000>;
-                        interrupts = <45 2 58 2>;
-                        interrupt-parent = <&mpic>;
-                        fsl,num-channels = <4>;
-                        fsl,channel-fifo-len = <24>;
-                        fsl,exec-units-mask = <0xbfe>;
-                        fsl,descriptor-types-mask = <0x3ab0ebf>;
-                };
                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
                        protected-sources = <
                        42 76 77 78 79 /* serial1 , dma2 */
                        29 30 34 26 /* enet0, pci1 */
@@ -326,26 +161,28 @@
                        >;
                };
-                global-utilities@e0000 {
+                msi@41600 {
-                        compatible = "fsl,p2020-guts";
+                        status = "disabled";
-                        reg = <0xe0000 0x1000>;
-                        fsl,has-rstcr;
                };
        };
-        pci0: pcie@ffe09000 {
+        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
+                status = "disabled";
-                device_type = "pci";
+        };
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
+        pci1: pcie@ffe09000 {
-                #address-cells = <3>;
-                reg = <0 0xffe09000 0 0x1000>;
-                bus-range = <0 255>;
                ranges = <0x2000000 0x0 0xa0000000 0 0xa0000000 0x0 0x20000000
-                          0x1000000 0x0 0x00000000 0 0xffc30000 0x0 0x10000>;
+                          0x1000000 0x0 0x00000000 0 0xffc10000 0x0 0x10000>;
-                clock-frequency = <33333333>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupt-parent = <&mpic>;
+                interrupt-map = <
-                interrupts = <25 2>;
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x4 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x5 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x6 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x7 0x1
+                        >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
@@ -360,4 +197,8 @@
                                  0x0 0x100000>;
                };
        };
+        pci2: pcie@ffe0a000 {
+                status = "disabled";
+        };
 };
diff --git a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
index e95a51285328..261c34ba45ec 100644
--- a/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
+++ b/arch/powerpc/boot/dts/p2020rdb_camp_core1.dts
@@ -7,7 +7,7 @@
 *
 * Please note to add "-b 1" for core1's dts compiling.
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -15,27 +15,21 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "p2020si.dtsi"
 / {
-        model = "fsl,P2020";
+        model = "fsl,P2020RDB";
        compatible = "fsl,P2020RDB", "fsl,MPC85XXRDB-CAMP";
-        #address-cells = <2>;
-        #size-cells = <2>;
        aliases {
                ethernet0 = &enet0;
-                serial0 = &serial0;
+                serial0 = &serial1;
                pci1 = &pci1;
        };
        cpus {
-                #address-cells = <1>;
+                PowerPC,P2020@0 {
-                #size-cells = <0>;
+                status = "disabled";
-                PowerPC,P2020@1 {
-                        device_type = "cpu";
-                        reg = <0x1>;
-                        next-level-cache = <&L2>;
                };
        };
@@ -43,20 +37,37 @@
                device_type = "memory";
        };
+        localbus@ffe05000 {
+                status = "disabled";
+        };
        soc@ffe00000 {
-                #address-cells = <1>;
+                ecm-law@0 {
-                #size-cells = <1>;
+                        status = "disabled";
-                device_type = "soc";
+                };
-                compatible = "fsl,p2020-immr", "simple-bus";
-                ranges = <0x0  0x0 0xffe00000 0x100000>;
+                ecm@1000 {
-                bus-frequency = <0>;            // Filled out by uboot.
+                        status = "disabled";
+                };
-                serial0: serial@4600 {
-                        cell-index = <1>;
+                memory-controller@2000 {
-                        device_type = "serial";
+                        status = "disabled";
-                        compatible = "ns16550";
+                };
-                        reg = <0x4600 0x100>;
-                        clock-frequency = <0>;
+                i2c@3000 {
+                        status = "disabled";
+                };
+                i2c@3100 {
+                        status = "disabled";
+                };
+                serial0: serial@4500 {
+                        status = "disabled";
+                };
+                spi@7000 {
+                        status = "disabled";
                };
                dma@c300 {
@@ -96,6 +107,10 @@
                        };
                };
+                gpio: gpio-controller@f000 {
+                        status = "disabled";
+                };
                L2: l2-cache-controller@20000 {
                        compatible = "fsl,p2020-l2-cache-controller";
                        reg = <0x20000 0x1000>;
@@ -104,31 +119,49 @@
                        interrupt-parent = <&mpic>;
                };
+                dma@21300 {
+                        status = "disabled";
+                };
+                usb@22000 {
+                        status = "disabled";
+                };
+                mdio@24520 {
+                        status = "disabled";
+                };
+                mdio@25520 {
+                        status = "disabled";
+                };
+                mdio@26520 {
+                        status = "disabled";
+                };
                enet0: ethernet@24000 {
-                        #address-cells = <1>;
-                        #size-cells = <1>;
-                        cell-index = <0>;
-                        device_type = "network";
-                        model = "eTSEC";
-                        compatible = "gianfar";
-                        reg = <0x24000 0x1000>;
-                        ranges = <0x0 0x24000 0x1000>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <29 2 30 2 34 2>;
-                        interrupt-parent = <&mpic>;
                        fixed-link = <1 1 1000 0 0>;
                        phy-connection-type = "rgmii-id";
                };
+                enet1: ethernet@25000 {
+                        status = "disabled";
+                };
+                enet2: ethernet@26000 {
+                        status = "disabled";
+                };
+                sdhci@2e000 {
+                        status = "disabled";
+                };
+                crypto@30000 {
+                        status = "disabled";
+                };
                mpic: pic@40000 {
-                        interrupt-controller;
-                        #address-cells = <0>;
-                        #interrupt-cells = <2>;
-                        reg = <0x40000 0x40000>;
-                        compatible = "chrp,open-pic";
-                        device_type = "open-pic";
                        protected-sources = <
                        17 18 43 42 59 47 /*ecm, mem, i2c, serial0, spi,gpio */
                        16 20 21 22 23 28       /* L2, dma1, USB */
@@ -152,28 +185,39 @@
                                0xe7 0>;
                        interrupt-parent = <&mpic>;
                };
+                global-utilities@e0000 {        //global utilities block
+                        status = "disabled";
+                };
        };
-        pci1: pcie@ffe0a000 {
+        pci0: pcie@ffe08000 {
-                compatible = "fsl,mpc8548-pcie";
+                status = "disabled";
-                device_type = "pci";
+        };
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
+        pci1: pcie@ffe09000 {
-                #address-cells = <3>;
+                status = "disabled";
-                reg = <0 0xffe0a000 0 0x1000>;
+        };
-                bus-range = <0 255>;
-                ranges = <0x2000000 0x0 0xc0000000 0 0xc0000000 0x0 0x20000000
+        pci2: pcie@ffe0a000 {
-                          0x1000000 0x0 0x00000000 0 0xffc20000 0x0 0x10000>;
+                ranges = <0x2000000 0x0 0x80000000 0 0x80000000 0x0 0x20000000
-                clock-frequency = <33333333>;
+                          0x1000000 0x0 0x00000000 0 0xffc00000 0x0 0x10000>;
-                interrupt-parent = <&mpic>;
+                interrupt-map-mask = <0xf800 0x0 0x0 0x7>;
-                interrupts = <26 2>;
+                interrupt-map = <
+                        /* IDSEL 0x0 */
+                        0000 0x0 0x0 0x1 &mpic 0x0 0x1
+                        0000 0x0 0x0 0x2 &mpic 0x1 0x1
+                        0000 0x0 0x0 0x3 &mpic 0x2 0x1
+                        0000 0x0 0x0 0x4 &mpic 0x3 0x1
+                        >;
                pcie@0 {
                        reg = <0x0 0x0 0x0 0x0 0x0>;
                        #size-cells = <2>;
                        #address-cells = <3>;
                        device_type = "pci";
-                        ranges = <0x2000000 0x0 0xc0000000
+                        ranges = <0x2000000 0x0 0x80000000
-                                  0x2000000 0x0 0xc0000000
+                                  0x2000000 0x0 0x80000000
                                  0x0 0x20000000
                                  0x1000000 0x0 0x0
diff --git a/arch/powerpc/boot/dts/p2020si.dtsi b/arch/powerpc/boot/dts/p2020si.dtsi
new file mode 100644
index 000000000000..6def17f265d3
--- /dev/null
+++ b/arch/powerpc/boot/dts/p2020si.dtsi
@@ -0,0 +1,382 @@
+/*
+ * P2020 Device Tree Source
+ *
+ * Copyright 2011 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+/dts-v1/;
+/ {
+        compatible = "fsl,P2020";
+        #address-cells = <2>;
+        #size-cells = <2>;
+        cpus {
+                #address-cells = <1>;
+                #size-cells = <0>;
+                PowerPC,P2020@0 {
+                        device_type = "cpu";
+                        reg = <0x0>;
+                        next-level-cache = <&L2>;
+                };
+                PowerPC,P2020@1 {
+                        device_type = "cpu";
+                        reg = <0x1>;
+                        next-level-cache = <&L2>;
+                };
+        };
+        localbus@ffe05000 {
+                #address-cells = <2>;
+                #size-cells = <1>;
+                compatible = "fsl,p2020-elbc", "fsl,elbc", "simple-bus";
+                reg = <0 0xffe05000 0 0x1000>;
+                interrupts = <19 2>;
+                interrupt-parent = <&mpic>;
+        };
+        soc@ffe00000 {
+                #address-cells = <1>;
+                #size-cells = <1>;
+                device_type = "soc";
+                compatible = "fsl,p2020-immr", "simple-bus";
+                ranges = <0x0  0x0 0xffe00000 0x100000>;
+                bus-frequency = <0>;            // Filled out by uboot.
+                ecm-law@0 {
+                        compatible = "fsl,ecm-law";
+                        reg = <0x0 0x1000>;
+                        fsl,num-laws = <12>;
+                };
+                ecm@1000 {
+                        compatible = "fsl,p2020-ecm", "fsl,ecm";
+                        reg = <0x1000 0x1000>;
+                        interrupts = <17 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                memory-controller@2000 {
+                        compatible = "fsl,p2020-memory-controller";
+                        reg = <0x2000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <18 2>;
+                };
+                i2c@3000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <0>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3000 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+                i2c@3100 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        cell-index = <1>;
+                        compatible = "fsl-i2c";
+                        reg = <0x3100 0x100>;
+                        interrupts = <43 2>;
+                        interrupt-parent = <&mpic>;
+                        dfsrr;
+                };
+                serial0: serial@4500 {
+                        cell-index = <0>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4500 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                serial1: serial@4600 {
+                        cell-index = <1>;
+                        device_type = "serial";
+                        compatible = "ns16550";
+                        reg = <0x4600 0x100>;
+                        clock-frequency = <0>;
+                        interrupts = <42 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                spi@7000 {
+                        cell-index = <0>;
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,espi";
+                        reg = <0x7000 0x1000>;
+                        interrupts = <59 0x2>;
+                        interrupt-parent = <&mpic>;
+                        mode = "cpu";
+                };
+                dma@c300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,eloplus-dma";
+                        reg = <0xc300 0x4>;
+                        ranges = <0x0 0xc100 0x200>;
+                        cell-index = <1>;
+                        dma-channel@0 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <76 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <77 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <78 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <79 2>;
+                        };
+                };
+                gpio: gpio-controller@f000 {
+                        #gpio-cells = <2>;
+                        compatible = "fsl,mpc8572-gpio";
+                        reg = <0xf000 0x100>;
+                        interrupts = <47 0x2>;
+                        interrupt-parent = <&mpic>;
+                        gpio-controller;
+                };
+                L2: l2-cache-controller@20000 {
+                        compatible = "fsl,p2020-l2-cache-controller";
+                        reg = <0x20000 0x1000>;
+                        cache-line-size = <32>; // 32 bytes
+                        cache-size = <0x80000>; // L2,512K
+                        interrupt-parent = <&mpic>;
+                        interrupts = <16 2>;
+                };
+                dma@21300 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        compatible = "fsl,eloplus-dma";
+                        reg = <0x21300 0x4>;
+                        ranges = <0x0 0x21100 0x200>;
+                        cell-index = <0>;
+                        dma-channel@0 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x0 0x80>;
+                                cell-index = <0>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <20 2>;
+                        };
+                        dma-channel@80 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x80 0x80>;
+                                cell-index = <1>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <21 2>;
+                        };
+                        dma-channel@100 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x100 0x80>;
+                                cell-index = <2>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <22 2>;
+                        };
+                        dma-channel@180 {
+                                compatible = "fsl,eloplus-dma-channel";
+                                reg = <0x180 0x80>;
+                                cell-index = <3>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <23 2>;
+                        };
+                };
+                usb@22000 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl-usb2-dr";
+                        reg = <0x22000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <28 0x2>;
+                };
+                mdio@24520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-mdio";
+                        reg = <0x24520 0x20>;
+                };
+                mdio@25520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x26520 0x20>;
+                };
+                mdio@26520 {
+                        #address-cells = <1>;
+                        #size-cells = <0>;
+                        compatible = "fsl,gianfar-tbi";
+                        reg = <0x520 0x20>;
+                };
+                enet0: ethernet@24000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <0>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x24000 0x1000>;
+                        ranges = <0x0 0x24000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <29 2 30 2 34 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                enet1: ethernet@25000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <1>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x25000 0x1000>;
+                        ranges = <0x0 0x25000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <35 2 36 2 40 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                enet2: ethernet@26000 {
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        cell-index = <2>;
+                        device_type = "network";
+                        model = "eTSEC";
+                        compatible = "gianfar";
+                        reg = <0x26000 0x1000>;
+                        ranges = <0x0 0x26000 0x1000>;
+                        local-mac-address = [ 00 00 00 00 00 00 ];
+                        interrupts = <31 2 32 2 33 2>;
+                        interrupt-parent = <&mpic>;
+                };
+                sdhci@2e000 {
+                        compatible = "fsl,p2020-esdhc", "fsl,esdhc";
+                        reg = <0x2e000 0x1000>;
+                        interrupts = <72 0x2>;
+                        interrupt-parent = <&mpic>;
+                        /* Filled in by U-Boot */
+                        clock-frequency = <0>;
+                };
+                crypto@30000 {
+                        compatible = "fsl,sec3.1", "fsl,sec3.0", "fsl,sec2.4",
+                                     "fsl,sec2.2", "fsl,sec2.1", "fsl,sec2.0";
+                        reg = <0x30000 0x10000>;
+                        interrupts = <45 2 58 2>;
+                        interrupt-parent = <&mpic>;
+                        fsl,num-channels = <4>;
+                        fsl,channel-fifo-len = <24>;
+                        fsl,exec-units-mask = <0xbfe>;
+                        fsl,descriptor-types-mask = <0x3ab0ebf>;
+                };
+                mpic: pic@40000 {
+                        interrupt-controller;
+                        #address-cells = <0>;
+                        #interrupt-cells = <2>;
+                        reg = <0x40000 0x40000>;
+                        compatible = "chrp,open-pic";
+                        device_type = "open-pic";
+                };
+                msi@41600 {
+                        compatible = "fsl,p2020-msi", "fsl,mpic-msi";
+                        reg = <0x41600 0x80>;
+                        msi-available-ranges = <0 0x100>;
+                        interrupts = <
+                                0xe0 0
+                                0xe1 0
+                                0xe2 0
+                                0xe3 0
+                                0xe4 0
+                                0xe5 0
+                                0xe6 0
+                                0xe7 0>;
+                        interrupt-parent = <&mpic>;
+                };
+                global-utilities@e0000 {        //global utilities block
+                        compatible = "fsl,p2020-guts";
+                        reg = <0xe0000 0x1000>;
+                        fsl,has-rstcr;
+                };
+        };
+        pci0: pcie@ffe08000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xffe08000 0 0x1000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <24 2>;
+        };
+        pci1: pcie@ffe09000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xffe09000 0 0x1000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <25 2>;
+        };
+        pci2: pcie@ffe0a000 {
+                compatible = "fsl,mpc8548-pcie";
+                device_type = "pci";
+                #interrupt-cells = <1>;
+                #size-cells = <2>;
+                #address-cells = <3>;
+                reg = <0 0xffe0a000 0 0x1000>;
+                bus-range = <0 255>;
+                clock-frequency = <33333333>;
+                interrupt-parent = <&mpic>;
+                interrupts = <26 2>;
+        };
+};
diff --git a/arch/powerpc/boot/dts/p4080ds.dts b/arch/powerpc/boot/dts/p4080ds.dts
index 2f0de24e3822..927f94d16e9b 100644
--- a/arch/powerpc/boot/dts/p4080ds.dts
+++ b/arch/powerpc/boot/dts/p4080ds.dts
@@ -1,7 +1,7 @@
 /*
 * P4080DS Device Tree Source
 *
- * Copyright 2009 Freescale Semiconductor Inc.
+ * Copyright 2009-2011 Freescale Semiconductor Inc.
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -33,6 +33,17 @@
                dma1 = &dma1;
                sdhc = &sdhc;
+                crypto = &crypto;
+                sec_jr0 = &sec_jr0;
+                sec_jr1 = &sec_jr1;
+                sec_jr2 = &sec_jr2;
+                sec_jr3 = &sec_jr3;
+                rtic_a = &rtic_a;
+                rtic_b = &rtic_b;
+                rtic_c = &rtic_c;
+                rtic_d = &rtic_d;
+                sec_mon = &sec_mon;
                rio0 = &rapidio0;
        };
@@ -236,22 +247,19 @@
                };
                spi@110000 {
-                        cell-index = <0>;
                        #address-cells = <1>;
                        #size-cells = <0>;
-                        compatible = "fsl,espi";
+                        compatible = "fsl,p4080-espi", "fsl,mpc8536-espi";
                        reg = <0x110000 0x1000>;
                        interrupts = <53 0x2>;
                        interrupt-parent = <&mpic>;
-                        espi,num-ss-bits = <4>;
+                        fsl,espi-num-chipselects = <4>;
-                        mode = "cpu";
-                        fsl_m25p80@0 {
+                        flash@0 {
                                #address-cells = <1>;
                                #size-cells = <1>;
-                                compatible = "fsl,espi-flash";
+                                compatible = "spansion,s25sl12801";
                                reg = <0>;
-                                linux,modalias = "fsl_m25p80";
                                spi-max-frequency = <40000000>; /* input clock */
                                partition@u-boot {
                                        label = "u-boot";
@@ -413,6 +421,79 @@
                        dr_mode = "host";
                        phy_type = "ulpi";
                };
+                crypto: crypto@300000 {
+                        compatible = "fsl,sec-v4.0";
+                        #address-cells = <1>;
+                        #size-cells = <1>;
+                        reg = <0x300000 0x10000>;
+                        ranges = <0 0x300000 0x10000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <92 2>;
+                        sec_jr0: jr@1000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x1000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <88 2>;
+                        };
+                        sec_jr1: jr@2000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x2000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <89 2>;
+                        };
+                        sec_jr2: jr@3000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x3000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <90 2>;
+                        };
+                        sec_jr3: jr@4000 {
+                                compatible = "fsl,sec-v4.0-job-ring";
+                                reg = <0x4000 0x1000>;
+                                interrupt-parent = <&mpic>;
+                                interrupts = <91 2>;
+                        };
+                        rtic@6000 {
+                                compatible = "fsl,sec-v4.0-rtic";
+                                #address-cells = <1>;
+                                #size-cells = <1>;
+                                reg = <0x6000 0x100>;
+                                ranges = <0x0 0x6100 0xe00>;
+                                rtic_a: rtic-a@0 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x00 0x20 0x100 0x80>;
+                                };
+                                rtic_b: rtic-b@20 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x20 0x20 0x200 0x80>;
+                                };
+                                rtic_c: rtic-c@40 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x40 0x20 0x300 0x80>;
+                                };
+                                rtic_d: rtic-d@60 {
+                                        compatible = "fsl,sec-v4.0-rtic-memory";
+                                        reg = <0x60 0x20 0x500 0x80>;
+                                };
+                        };
+                };
+                sec_mon: sec_mon@314000 {
+                        compatible = "fsl,sec-v4.0-mon";
+                        reg = <0x314000 0x1000>;
+                        interrupt-parent = <&mpic>;
+                        interrupts = <93 2>;
+                };
        };
        rapidio0: rapidio@ffe0c0000 {
diff --git a/arch/powerpc/boot/dts/pcm030.dts b/arch/powerpc/boot/dts/pcm030.dts
index 8a4ec30b21ae..9e354997eb7e 100644
--- a/arch/powerpc/boot/dts/pcm030.dts
+++ b/arch/powerpc/boot/dts/pcm030.dts
@@ -12,246 +12,92 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "phytec,pcm030";
        compatible = "phytec,pcm030";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x04000000>;  // 64MB
-        };
        soc5200@f0000000 {
-                #address-cells = <1>;
+                timer@600 {             // General Purpose Timer
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
-                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt3: timer@630 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt4: timer@640 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt5: timer@650 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt6: timer@660 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt7: timer@670 {       // General Purpose Timer in GPIO mode
                        compatible = "fsl,mpc5200b-gpt-gpio","fsl,mpc5200-gpt-gpio";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                rtc@800 {       // Real time clock
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
-                };
-                can@900 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 17 0>;
-                        reg = <0x900 0x80>;
-                };
-                can@980 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 18 0>;
-                        reg = <0x980 0x80>;
-                };
-                gpio_simple: gpio@b00 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                psc@2000 { /* PSC1 in ac97 mode */
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                spi@f00 {
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
-                };
-                usb@1000 {
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
-                        reg = <0x1000 0xff>;
-                        interrupts = <2 6 0>;
-                };
-                dma-controller@1200 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
-                };
-                xlb@1f00 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
-                        reg = <0x1f00 0x100>;
-                };
-                ac97@2000 { /* PSC1 in ac97 mode */
                        compatible = "mpc5200b-psc-ac97","fsl,mpc5200b-psc-ac97";
                        cell-index = <0>;
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
                /* PSC2 port is used by CAN1/2 */
+                psc@2200 {
+                        status = "disabled";
+                };
-                serial@2400 { /* PSC3 in UART mode */
+                psc@2400 { /* PSC3 in UART mode */
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        cell-index = <2>;
-                        reg = <0x2400 0x100>;
-                        interrupts = <2 3 0>;
                };
                /* PSC4 is ??? */
+                psc@2600 {
+                        status = "disabled";
+                };
                /* PSC5 is ??? */
+                psc@2800 {
+                        status = "disabled";
+                };
-                serial@2c00 { /* PSC6 in UART mode */
+                psc@2c00 { /* PSC6 in UART mode */
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        cell-index = <5>;
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                ata@3a00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
-                };
-                i2c@3d00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d00 0x40>;
-                        interrupts = <2 15 0>;
-                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        rtc@51 {
                                compatible = "nxp,pcf8563";
                                reg = <0x51>;
@@ -259,6 +105,7 @@
                        eeprom@52 {
                                compatible = "catalyst,24c32";
                                reg = <0x52>;
+                                pagesize = <32>;
                        };
                };
@@ -269,12 +116,6 @@
        };
        pci@f0000d00 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
-                reg = <0xf0000d00 0x100>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
                                 0xc000 0 0 2 &mpc5200_pic 1 1 3
@@ -285,11 +126,12 @@
                                 0xc800 0 0 2 &mpc5200_pic 1 2 3
                                 0xc800 0 0 3 &mpc5200_pic 1 3 3
                                 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
-                clock-frequency = <0>; // From boot loader
-                interrupts = <2 8 0 2 9 0 2 10 0>;
-                bus-range = <0 0>;
                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
        };
+        localbus {
+                status = "disabled";
+        };
 };
diff --git a/arch/powerpc/boot/dts/pcm032.dts b/arch/powerpc/boot/dts/pcm032.dts
index 85d857a5d46e..1dd478bfff96 100644
--- a/arch/powerpc/boot/dts/pcm032.dts
+++ b/arch/powerpc/boot/dts/pcm032.dts
@@ -12,99 +12,37 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "phytec,pcm032";
        compatible = "phytec,pcm032";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
        memory {
-                device_type = "memory";
                reg = <0x00000000 0x08000000>;  // 128MB
        };
        soc5200@f0000000 {
-                #address-cells = <1>;
+                timer@600 {             // General Purpose Timer
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
-                timer@600 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        fsl,has-wdt;
                };
-                timer@610 {     // General Purpose Timer
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
-                };
                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt3: timer@630 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x630 0x10>;
-                        interrupts = <1 12 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt4: timer@640 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt5: timer@650 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
@@ -118,163 +56,62 @@
                };
                gpt7: timer@670 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
-                rtc@800 {       // Real time clock
+                psc@2000 {      /* PSC1 is ac97 */
-                        compatible = "fsl,mpc5200b-rtc","fsl,mpc5200-rtc";
-                        reg = <0x800 0x100>;
-                        interrupts = <1 5 0 1 6 0>;
-                };
-                can@900 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 17 0>;
-                        reg = <0x900 0x80>;
-                };
-                can@980 {
-                        compatible = "fsl,mpc5200b-mscan","fsl,mpc5200-mscan";
-                        interrupts = <2 18 0>;
-                        reg = <0x980 0x80>;
-                };
-                gpio_simple: gpio@b00 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                gpio_wkup: gpio@c00 {
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
-                        reg = <0xc00 0x40>;
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
-                };
-                spi@f00 {
-                        compatible = "fsl,mpc5200b-spi","fsl,mpc5200-spi";
-                        reg = <0xf00 0x20>;
-                        interrupts = <2 13 0 2 14 0>;
-                };
-                usb@1000 {
-                        compatible = "fsl,mpc5200b-ohci","fsl,mpc5200-ohci","ohci-be";
-                        reg = <0x1000 0xff>;
-                        interrupts = <2 6 0>;
-                };
-                dma-controller@1200 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
-                };
-                xlb@1f00 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
-                        reg = <0x1f00 0x100>;
-                };
-                ac97@2000 {     /* PSC1 is ac97 */
                        compatible = "fsl,mpc5200b-psc-ac97","fsl,mpc5200-psc-ac97";
                        cell-index = <0>;
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
                /* PSC2 port is used by CAN1/2 */
+                psc@2200 {
+                        status = "disabled";
+                };
-                serial@2400 { /* PSC3 in UART mode */
+                psc@2400 { /* PSC3 in UART mode */
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        cell-index = <2>;
-                        reg = <0x2400 0x100>;
-                        interrupts = <2 3 0>;
                };
                /* PSC4 is ??? */
+                psc@2600 {
+                        status = "disabled";
+                };
                /* PSC5 is ??? */
+                psc@2800 {
+                        status = "disabled";
+                };
-                serial@2c00 { /* PSC6 in UART mode */
+                psc@2c00 { /* PSC6 in UART mode */
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        cell-index = <5>;
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                reg = <0>;
                        };
                };
-                ata@3a00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
-                };
-                i2c@3d00 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d00 0x40>;
-                        interrupts = <2 15 0>;
-                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        rtc@51 {
                                compatible = "nxp,pcf8563";
                                reg = <0x51>;
                        };
                        eeprom@52 {
-                                compatible = "at24,24c32";
+                                compatible = "catalyst,24c32";
                                reg = <0x52>;
+                                pagesize = <32>;
                        };
                };
-                sram@8000 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
-                        reg = <0x8000 0x4000>;
-                };
        };
        pci@f0000d00 {
-                #interrupt-cells = <1>;
-                #size-cells = <2>;
-                #address-cells = <3>;
-                device_type = "pci";
-                compatible = "fsl,mpc5200b-pci","fsl,mpc5200-pci";
-                reg = <0xf0000d00 0x100>;
                interrupt-map-mask = <0xf800 0 0 7>;
                interrupt-map = <0xc000 0 0 1 &mpc5200_pic 0 0 3 // 1st slot
                                 0xc000 0 0 2 &mpc5200_pic 1 1 3
@@ -285,20 +122,12 @@
                                 0xc800 0 0 2 &mpc5200_pic 1 2 3
                                 0xc800 0 0 3 &mpc5200_pic 1 3 3
                                 0xc800 0 0 4 &mpc5200_pic 0 0 3>;
-                clock-frequency = <0>; // From boot loader
-                interrupts = <2 8 0 2 9 0 2 10 0>;
-                bus-range = <0 0>;
                ranges = <0x42000000 0 0x80000000 0x80000000 0 0x20000000
                          0x02000000 0 0xa0000000 0xa0000000 0 0x10000000
                          0x01000000 0 0x00000000 0xb0000000 0 0x01000000>;
        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = <0 0 0xfe000000 0x02000000
                          1 0 0xfc000000 0x02000000
                          2 0 0xfbe00000 0x00200000
@@ -351,40 +180,39 @@
                        bank-width = <2>;
                };
-                /*
+                /*
                 * example snippets for FPGA
                 *
                 * fpga@3,0 {
-                 *         compatible = "fpga_driver";
+                 *       compatible = "fpga_driver";
-                 *         reg = <3 0 0x02000000>;
+                 *       reg = <3 0 0x02000000>;
-                 *         bank-width = <4>;
+                 *       bank-width = <4>;
                 * };
                 *
                 * fpga@4,0 {
-                 *         compatible = "fpga_driver";
+                 *       compatible = "fpga_driver";
-                 *         reg = <4 0 0x02000000>;
+                 *       reg = <4 0 0x02000000>;
-                 *         bank-width = <4>;
+                 *       bank-width = <4>;
                 * };
-                 */
+                 */
-                /*
+                /*
                 * example snippets for free chipselects
-                 *
+                 *
                 * device@5,0 {
-                 *         compatible = "custom_driver";
+                 *       compatible = "custom_driver";
-                 *         reg = <5 0 0x02000000>;
+                 *       reg = <5 0 0x02000000>;
                 * };
-                 *
+                 *
                 * device@6,0 {
-                 *         compatible = "custom_driver";
+                 *       compatible = "custom_driver";
-                 *         reg = <6 0 0x02000000>;
+                 *       reg = <6 0 0x02000000>;
                 * };
-                 *
+                 *
                 * device@7,0 {
-                 *         compatible = "custom_driver";
+                 *       compatible = "custom_driver";
-                 *         reg = <7 0 0x02000000>;
+                 *       reg = <7 0 0x02000000>;
                 * };
-                 */
+                 */
        };
 };
diff --git a/arch/powerpc/boot/dts/redwood.dts b/arch/powerpc/boot/dts/redwood.dts
index 81636c01d906..d86a3a498118 100644
--- a/arch/powerpc/boot/dts/redwood.dts
+++ b/arch/powerpc/boot/dts/redwood.dts
@@ -358,8 +358,28 @@
                                0x0 0x0 0x0 0x4 &UIC3 0xb 0x4 /* swizzled int D */>;
                };
+                MSI: ppc4xx-msi@400300000 {
+                                compatible = "amcc,ppc4xx-msi", "ppc4xx-msi";
+                                reg = < 0x4 0x00300000 0x100
+                                        0x4 0x00300000 0x100>;
+                                sdr-base = <0x3B0>;
+                                msi-data = <0x00000000>;
+                                msi-mask = <0x44440000>;
+                                interrupt-count = <3>;
+                                interrupts =<0 1 2 3>;
+                                interrupt-parent = <&UIC0>;
+                                #interrupt-cells = <1>;
+                                #address-cells = <0>;
+                                #size-cells = <0>;
+                                interrupt-map = <0 &UIC0 0xC 1
+                                        1 &UIC0 0x0D 1
+                                        2 &UIC0 0x0E 1
+                                        3 &UIC0 0x0F 1>;
+                };
        };
        chosen {
                linux,stdout-path = "/plb/opb/serial@ef600200";
        };
diff --git a/arch/powerpc/boot/dts/uc101.dts b/arch/powerpc/boot/dts/uc101.dts
index 019264c62904..ba83d5488ec6 100644
--- a/arch/powerpc/boot/dts/uc101.dts
+++ b/arch/powerpc/boot/dts/uc101.dts
@@ -11,79 +11,24 @@
 * option) any later version.
 */
-/dts-v1/;
+/include/ "mpc5200b.dtsi"
 / {
        model = "manroland,uc101";
        compatible = "manroland,uc101";
-        #address-cells = <1>;
-        #size-cells = <1>;
-        interrupt-parent = <&mpc5200_pic>;
-        cpus {
-                #address-cells = <1>;
-                #size-cells = <0>;
-                PowerPC,5200@0 {
-                        device_type = "cpu";
-                        reg = <0>;
-                        d-cache-line-size = <32>;
-                        i-cache-line-size = <32>;
-                        d-cache-size = <0x4000>;        // L1, 16K
-                        i-cache-size = <0x4000>;        // L1, 16K
-                        timebase-frequency = <0>;       // from bootloader
-                        bus-frequency = <0>;            // from bootloader
-                        clock-frequency = <0>;          // from bootloader
-                };
-        };
-        memory {
-                device_type = "memory";
-                reg = <0x00000000 0x04000000>;  // 64MB
-        };
        soc5200@f0000000 {
-                #address-cells = <1>;
-                #size-cells = <1>;
-                compatible = "fsl,mpc5200b-immr";
-                ranges = <0 0xf0000000 0x0000c000>;
-                reg = <0xf0000000 0x00000100>;
-                bus-frequency = <0>;            // from bootloader
-                system-frequency = <0>;         // from bootloader
-                cdm@200 {
-                        compatible = "fsl,mpc5200b-cdm","fsl,mpc5200-cdm";
-                        reg = <0x200 0x38>;
-                };
-                mpc5200_pic: interrupt-controller@500 {
-                        // 5200 interrupts are encoded into two levels;
-                        interrupt-controller;
-                        #interrupt-cells = <3>;
-                        compatible = "fsl,mpc5200b-pic","fsl,mpc5200-pic";
-                        reg = <0x500 0x80>;
-                };
                gpt0: timer@600 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x600 0x10>;
-                        interrupts = <1 9 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt1: timer@610 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x610 0x10>;
-                        interrupts = <1 10 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt2: timer@620 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x620 0x10>;
-                        interrupts = <1 11 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
@@ -97,118 +42,85 @@
                };
                gpt4: timer@640 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x640 0x10>;
-                        interrupts = <1 13 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt5: timer@650 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x650 0x10>;
-                        interrupts = <1 14 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt6: timer@660 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x660 0x10>;
-                        interrupts = <1 15 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
                gpt7: timer@670 {       // General Purpose Timer in GPIO mode
-                        compatible = "fsl,mpc5200b-gpt","fsl,mpc5200-gpt";
-                        reg = <0x670 0x10>;
-                        interrupts = <1 16 0>;
                        gpio-controller;
                        #gpio-cells = <2>;
                };
-                gpio_simple: gpio@b00 {
+                rtc@800 {
-                        compatible = "fsl,mpc5200b-gpio","fsl,mpc5200-gpio";
+                        status = "disabled";
-                        reg = <0xb00 0x40>;
-                        interrupts = <1 7 0>;
-                        gpio-controller;
-                        #gpio-cells = <2>;
                };
-                gpio_wkup: gpio@c00 {
+                can@900 {
-                        compatible = "fsl,mpc5200b-gpio-wkup","fsl,mpc5200-gpio-wkup";
+                        status = "disabled";
-                        reg = <0xc00 0x40>;
+                };
-                        interrupts = <1 8 0 0 3 0>;
-                        gpio-controller;
+                can@980 {
-                        #gpio-cells = <2>;
+                        status = "disabled";
                };
-                dma-controller@1200 {
+                spi@f00 {
-                        compatible = "fsl,mpc5200b-bestcomm","fsl,mpc5200-bestcomm";
+                        status = "disabled";
-                        reg = <0x1200 0x80>;
-                        interrupts = <3 0 0  3 1 0  3 2 0  3 3 0
-                                      3 4 0  3 5 0  3 6 0  3 7 0
-                                      3 8 0  3 9 0  3 10 0  3 11 0
-                                      3 12 0  3 13 0  3 14 0  3 15 0>;
                };
-                xlb@1f00 {
+                usb@1000 {
-                        compatible = "fsl,mpc5200b-xlb","fsl,mpc5200-xlb";
+                        status = "disabled";
-                        reg = <0x1f00 0x100>;
                };
-                serial@2000 { /* PSC1 in UART mode */
+                psc@2000 {      // PSC1
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2000 0x100>;
-                        interrupts = <2 1 0>;
                };
-                serial@2200 { /* PSC2 in UART mode */
+                psc@2200 {      // PSC2
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2200 0x100>;
-                        interrupts = <2 2 0>;
                };
-                serial@2c00 {           /* PSC6 in UART mode */
+                psc@2400 {      // PSC3
+                        status = "disabled";
+                };
+                psc@2600 {      // PSC4
+                        status = "disabled";
+                };
+                psc@2800 {      // PSC5
+                        status = "disabled";
+                };
+                psc@2c00 {      // PSC6
                        compatible = "fsl,mpc5200b-psc-uart","fsl,mpc5200-psc-uart";
-                        reg = <0x2c00 0x100>;
-                        interrupts = <2 4 0>;
                };
                ethernet@3000 {
-                        compatible = "fsl,mpc5200b-fec","fsl,mpc5200-fec";
-                        reg = <0x3000 0x400>;
-                        local-mac-address = [ 00 00 00 00 00 00 ];
-                        interrupts = <2 5 0>;
                        phy-handle = <&phy0>;
                };
                mdio@3000 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-mdio","fsl,mpc5200-mdio";
-                        reg = <0x3000 0x400>;   // fec range, since we need to setup fec interrupts
-                        interrupts = <2 5 0>;   // these are for "mii command finished", not link changes & co.
                        phy0: ethernet-phy@0 {
                                compatible = "intel,lxt971";
                                reg = <0>;
                        };
                };
-                ata@3a00 {
+                i2c@3d00 {
-                        compatible = "fsl,mpc5200b-ata","fsl,mpc5200-ata";
+                        status = "disabled";
-                        reg = <0x3a00 0x100>;
-                        interrupts = <2 7 0>;
                };
                i2c@3d40 {
-                        #address-cells = <1>;
-                        #size-cells = <0>;
-                        compatible = "fsl,mpc5200b-i2c","fsl,mpc5200-i2c","fsl-i2c";
-                        reg = <0x3d40 0x40>;
-                        interrupts = <2 16 0>;
                        fsl,preserve-clocking;
                        clock-frequency = <400000>;
@@ -221,19 +133,13 @@
                                reg = <0x51>;
                        };
                };
+        };
-                sram@8000 {
+        pci@f0000d00 {
-                        compatible = "fsl,mpc5200b-sram","fsl,mpc5200-sram";
+                status = "disabled";
-                        reg = <0x8000 0x4000>;
-                };
        };
        localbus {
-                compatible = "fsl,mpc5200b-lpb","fsl,mpc5200-lpb","simple-bus";
-                #address-cells = <2>;
-                #size-cells = <1>;
                ranges = <0 0 0xff800000 0x00800000
                          1 0 0x80000000 0x00800000
                          3 0 0x80000000 0x00800000>;
diff --git a/arch/powerpc/boot/epapr.c b/arch/powerpc/boot/epapr.c
new file mode 100644
index 000000000000..06c1961bd124
--- /dev/null
+++ b/arch/powerpc/boot/epapr.c
@@ -0,0 +1,66 @@
+/*
+ * Bootwrapper for ePAPR compliant firmwares
+ *
+ * Copyright 2010 David Gibson <david@gibson.dropbear.id.au>, IBM Corporation.
+ *
+ * Based on earlier bootwrappers by:
+ * (c) Benjamin Herrenschmidt <benh@kernel.crashing.org>, IBM Corp,\
+ *   and
+ * Scott Wood <scottwood@freescale.com>
+ * Copyright (c) 2007 Freescale Semiconductor, Inc.
+ *
+ * This program is free software; you can redistribute it and/or modify it
+ * under the terms of the GNU General Public License version 2 as published
+ * by the Free Software Foundation.
+ */
+#include "ops.h"
+#include "stdio.h"
+#include "io.h"
+#include <libfdt.h>
+BSS_STACK(4096);
+#define EPAPR_SMAGIC    0x65504150
+#define EPAPR_EMAGIC    0x45504150
+static unsigned epapr_magic;
+static unsigned long ima_size;
+static unsigned long fdt_addr;
+static void platform_fixups(void)
+{
+        if ((epapr_magic != EPAPR_EMAGIC)
+            && (epapr_magic != EPAPR_SMAGIC))
+                fatal("r6 contained 0x%08x instead of ePAPR magic number\n",
+                      epapr_magic);
+        if (ima_size < (unsigned long)_end)
+                printf("WARNING: Image loaded outside IMA!"
+                       " (_end=%p, ima_size=0x%lx)\n", _end, ima_size);
+        if (ima_size < fdt_addr)
+                printf("WARNING: Device tree address is outside IMA!"
+                       "(fdt_addr=0x%lx, ima_size=0x%lx)\n", fdt_addr,
+                       ima_size);
+        if (ima_size < fdt_addr + fdt_totalsize((void *)fdt_addr))
+                printf("WARNING: Device tree extends outside IMA!"
+                       " (fdt_addr=0x%lx, size=0x%x, ima_size=0x%lx\n",
+                       fdt_addr, fdt_totalsize((void *)fdt_addr), ima_size);
+}
+void platform_init(unsigned long r3, unsigned long r4, unsigned long r5,
+                   unsigned long r6, unsigned long r7)
+{
+        epapr_magic = r6;
+        ima_size = r7;
+        fdt_addr = r3;
+        /* FIXME: we should process reserve entries */
+        simple_alloc_init(_end, ima_size - (unsigned long)_end, 32, 64);
+        fdt_init((void *)fdt_addr);
+        serial_console_init();
+        platform_ops.fixups = platform_fixups;
+}
diff --git a/arch/powerpc/boot/wrapper b/arch/powerpc/boot/wrapper
index cb97e7511d7e..c74531af72c0 100755
--- a/arch/powerpc/boot/wrapper
+++ b/arch/powerpc/boot/wrapper
@@ -39,6 +39,7 @@ dts=
 cacheit=
 binary=
 gzip=.gz
+pie=
 # cross-compilation prefix
 CROSS=
@@ -157,9 +158,10 @@ pmac|chrp)
    platformo=$object/of.o
    ;;
 coff)
-    platformo=$object/of.o
+    platformo="$object/crt0.o $object/of.o"
    lds=$object/zImage.coff.lds
    link_address='0x500000'
+    pie=
    ;;
 miboot|uboot)
    # miboot and U-boot want just the bare bits, not an ELF binary
@@ -208,6 +210,7 @@ ps3)
    ksection=.kernel:vmlinux.bin
    isection=.kernel:initrd
    link_address=''
+    pie=
    ;;
 ep88xc|ep405|ep8248e)
    platformo="$object/fixed-head.o $object/$platform.o"
@@ -244,6 +247,10 @@ gamecube|wii)
 treeboot-iss4xx-mpic)
    platformo="$object/treeboot-iss4xx.o"
    ;;
+epapr)
+    link_address='0x20000000'
+    pie=-pie
+    ;;
 esac
 vmz="$tmpdir/`basename \"$kernel\"`.$ext"
@@ -251,7 +258,7 @@ if [ -z "$cacheit" -o ! -f "$vmz$gzip" -o "$vmz$gzip" -ot "$kernel" ]; then
    ${CROSS}objcopy $objflags "$kernel" "$vmz.$$"
    if [ -n "$gzip" ]; then
-        gzip -f -9 "$vmz.$$"
+        gzip -n -f -9 "$vmz.$$"
    fi
    if [ -n "$cacheit" ]; then
@@ -310,9 +317,9 @@ fi
 if [ "$platform" != "miboot" ]; then
    if [ -n "$link_address" ] ; then
-        text_start="-Ttext $link_address --defsym _start=$link_address"
+        text_start="-Ttext $link_address"
    fi
-    ${CROSS}ld -m elf32ppc -T $lds $text_start -o "$ofile" \
+    ${CROSS}ld -m elf32ppc -T $lds $text_start $pie -o "$ofile" \
        $platformo $tmp $object/wrapper.a
    rm $tmp
 fi
@@ -336,7 +343,7 @@ coff)
    $objbin/hack-coff "$ofile"
    ;;
 cuboot*)
-    gzip -f -9 "$ofile"
+    gzip -n -f -9 "$ofile"
    ${MKIMAGE} -A ppc -O linux -T kernel -C gzip -a "$base" -e "$entry" \
            $uboot_version -d "$ofile".gz "$ofile"
    ;;
@@ -383,6 +390,6 @@ ps3)
    odir="$(dirname "$ofile.bin")"
    rm -f "$odir/otheros.bld"
-    gzip --force -9 --stdout "$ofile.bin" > "$odir/otheros.bld"
+    gzip -n --force -9 --stdout "$ofile.bin" > "$odir/otheros.bld"
    ;;
 esac
diff --git a/arch/powerpc/boot/zImage.coff.lds.S b/arch/powerpc/boot/zImage.coff.lds.S
index 856dc78b14ef..de4c9e3c9344 100644
--- a/arch/powerpc/boot/zImage.coff.lds.S
+++ b/arch/powerpc/boot/zImage.coff.lds.S
@@ -3,13 +3,13 @@ ENTRY(_zimage_start_opd)
 EXTERN(_zimage_start_opd)
 SECTIONS
 {
-  _start = .;
  .text      :
  {
+    _start = .;
    *(.text)
    *(.fixup)
+    _etext = .;
  }
-  _etext = .;
  . = ALIGN(4096);
  .data    :
  {
@@ -17,9 +17,7 @@ SECTIONS
    *(.data*)
    *(__builtin_*)
    *(.sdata*)
-    __got2_start = .;
    *(.got2)
-    __got2_end = .;
    _dtb_start = .;
    *(.kernel:dtb)
diff --git a/arch/powerpc/boot/zImage.lds.S b/arch/powerpc/boot/zImage.lds.S
index 0962d62bdb50..2bd8731f1365 100644
--- a/arch/powerpc/boot/zImage.lds.S
+++ b/arch/powerpc/boot/zImage.lds.S
@@ -3,49 +3,64 @@ ENTRY(_zimage_start)
 EXTERN(_zimage_start)
 SECTIONS
 {
-  _start = .;
  .text      :
  {
+    _start = .;
    *(.text)
    *(.fixup)
+    _etext = .;
  }
-  _etext = .;
  . = ALIGN(4096);
  .data    :
  {
    *(.rodata*)
    *(.data*)
    *(.sdata*)
-    __got2_start = .;
    *(.got2)
-    __got2_end = .;
  }
+  .dynsym : { *(.dynsym) }
+  .dynstr : { *(.dynstr) }
+  .dynamic :
+  {
+    __dynamic_start = .;
+    *(.dynamic)
+  }
+  .hash : { *(.hash) }
+  .interp : { *(.interp) }
+  .rela.dyn : { *(.rela*) }
  . = ALIGN(8);
-  _dtb_start = .;
+  .kernel:dtb :
-  .kernel:dtb : { *(.kernel:dtb) }
+  {
-  _dtb_end = .;
+    _dtb_start = .;
+    *(.kernel:dtb)
-  . = ALIGN(4096);
+    _dtb_end = .;
-  _vmlinux_start =  .;
+  }
-  .kernel:vmlinux.strip : { *(.kernel:vmlinux.strip) }
-  _vmlinux_end =  .;
  . = ALIGN(4096);
-  _initrd_start =  .;
+  .kernel:vmlinux.strip :
-  .kernel:initrd : { *(.kernel:initrd) }
+  {
-  _initrd_end =  .;
+    _vmlinux_start =  .;
+    *(.kernel:vmlinux.strip)
+    _vmlinux_end =  .;
+  }
  . = ALIGN(4096);
-  _edata  =  .;
+  .kernel:initrd :
+  {
+    _initrd_start =  .;
+    *(.kernel:initrd)
+    _initrd_end =  .;
+  }
  . = ALIGN(4096);
-  __bss_start = .;
  .bss       :
  {
-   *(.sbss)
+    _edata  =  .;
-   *(.bss)
+    __bss_start = .;
+    *(.sbss)
+    *(.bss)
+    *(COMMON)
+    _end = . ;
  }
-  . = ALIGN(4096);
-  _end = . ;
 }
diff --git a/arch/powerpc/configs/40x/acadia_defconfig b/arch/powerpc/configs/40x/acadia_defconfig
index 97fedceaa30b..4182c772340b 100644
--- a/arch/powerpc/configs/40x/acadia_defconfig
+++ b/arch/powerpc/configs/40x/acadia_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/ep405_defconfig b/arch/powerpc/configs/40x/ep405_defconfig
index 33b3c24f4edd..2dbb293163f5 100644
--- a/arch/powerpc/configs/40x/ep405_defconfig
+++ b/arch/powerpc/configs/40x/ep405_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/hcu4_defconfig b/arch/powerpc/configs/40x/hcu4_defconfig
index 4613079a0ab1..ebeb4accad65 100644
--- a/arch/powerpc/configs/40x/hcu4_defconfig
+++ b/arch/powerpc/configs/40x/hcu4_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/kilauea_defconfig b/arch/powerpc/configs/40x/kilauea_defconfig
index 4e19ee7ce4ee..532ea9d93a15 100644
--- a/arch/powerpc/configs/40x/kilauea_defconfig
+++ b/arch/powerpc/configs/40x/kilauea_defconfig
@@ -5,13 +5,15 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_KILAUEA=y
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
 # CONFIG_WALNUT is not set
 CONFIG_SPARSE_IRQ=y
 CONFIG_PCI=y
@@ -42,6 +44,9 @@ CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_NDFC=y
 CONFIG_PROC_DEVICETREE=y
+CONFIG_PM=y
+CONFIG_SUSPEND=y
+CONFIG_PPC4xx_CPM=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=35000
 # CONFIG_MISC_DEVICES is not set
diff --git a/arch/powerpc/configs/40x/makalu_defconfig b/arch/powerpc/configs/40x/makalu_defconfig
index 651be09136fa..3c142ac1b344 100644
--- a/arch/powerpc/configs/40x/makalu_defconfig
+++ b/arch/powerpc/configs/40x/makalu_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/40x/walnut_defconfig b/arch/powerpc/configs/40x/walnut_defconfig
index ded455e18339..ff57d4828ffc 100644
--- a/arch/powerpc/configs/40x/walnut_defconfig
+++ b/arch/powerpc/configs/40x/walnut_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/44x/arches_defconfig b/arch/powerpc/configs/44x/arches_defconfig
index 63746a041d6b..3ed16d5c909d 100644
--- a/arch/powerpc/configs/44x/arches_defconfig
+++ b/arch/powerpc/configs/44x/arches_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/bamboo_defconfig b/arch/powerpc/configs/44x/bamboo_defconfig
index f5f2a4e3e21b..b1b7d2c5c059 100644
--- a/arch/powerpc/configs/44x/bamboo_defconfig
+++ b/arch/powerpc/configs/44x/bamboo_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/bluestone_defconfig b/arch/powerpc/configs/44x/bluestone_defconfig
new file mode 100644
index 000000000000..30a0a8e08fdd
--- /dev/null
+++ b/arch/powerpc/configs/44x/bluestone_defconfig
@@ -0,0 +1,68 @@
+CONFIG_44x=y
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_POSIX_MQUEUE=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+CONFIG_EXPERT=y
+# CONFIG_VM_EVENT_COUNTERS is not set
+# CONFIG_PCI_QUIRKS is not set
+# CONFIG_COMPAT_BRK is not set
+CONFIG_BLUESTONE=y
+# CONFIG_EBONY is not set
+# CONFIG_KVM_GUEST is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_CMDLINE_BOOL=y
+CONFIG_CMDLINE=""
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_INET=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_CONNECTOR=y
+CONFIG_MTD=y
+CONFIG_MTD_PARTITIONS=y
+CONFIG_MTD_CMDLINE_PARTS=y
+CONFIG_MTD_OF_PARTS=y
+CONFIG_MTD_CHAR=y
+CONFIG_MTD_BLOCK=y
+CONFIG_MTD_CFI=y
+CONFIG_MTD_CFI_AMDSTD=y
+CONFIG_MTD_PHYSMAP_OF=y
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=35000
+CONFIG_NETDEVICES=y
+CONFIG_NET_ETHERNET=y
+CONFIG_IBM_NEW_EMAC=y
+CONFIG_IBM_NEW_EMAC_RXB=256
+CONFIG_IBM_NEW_EMAC_TXB=256
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_NR_UARTS=2
+CONFIG_SERIAL_8250_RUNTIME_UARTS=2
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_SHARE_IRQ=y
+CONFIG_SERIAL_OF_PLATFORM=y
+CONFIG_I2C=y
+CONFIG_I2C_CHARDEV=y
+CONFIG_I2C_IBM_IIC=y
+CONFIG_SENSORS_AD7414=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_RTC_CLASS=y
+CONFIG_RTC_DRV_M41T80=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+CONFIG_CRAMFS=y
+CONFIG_NFS_FS=y
+CONFIG_NFS_V3=y
+CONFIG_ROOT_NFS=y
+CONFIG_NLS=y
diff --git a/arch/powerpc/configs/44x/canyonlands_defconfig b/arch/powerpc/configs/44x/canyonlands_defconfig
index 45c64d818b2a..a46942aac695 100644
--- a/arch/powerpc/configs/44x/canyonlands_defconfig
+++ b/arch/powerpc/configs/44x/canyonlands_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
@@ -42,6 +42,9 @@ CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_MTD_NAND=y
 CONFIG_MTD_NAND_NDFC=y
 CONFIG_PROC_DEVICETREE=y
+CONFIG_PM=y
+CONFIG_SUSPEND=y
+CONFIG_PPC4xx_CPM=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=35000
 # CONFIG_MISC_DEVICES is not set
diff --git a/arch/powerpc/configs/44x/ebony_defconfig b/arch/powerpc/configs/44x/ebony_defconfig
index fedd03fdf5d5..07d77e51f1ba 100644
--- a/arch/powerpc/configs/44x/ebony_defconfig
+++ b/arch/powerpc/configs/44x/ebony_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/44x/eiger_defconfig b/arch/powerpc/configs/44x/eiger_defconfig
index ebff7011282e..2ce7e9aff09e 100644
--- a/arch/powerpc/configs/44x/eiger_defconfig
+++ b/arch/powerpc/configs/44x/eiger_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/icon_defconfig b/arch/powerpc/configs/44x/icon_defconfig
index 865e93fb41fd..18730ff9de7c 100644
--- a/arch/powerpc/configs/44x/icon_defconfig
+++ b/arch/powerpc/configs/44x/icon_defconfig
@@ -6,7 +6,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/iss476-smp_defconfig b/arch/powerpc/configs/44x/iss476-smp_defconfig
index 8ece4c774415..92f863ac8443 100644
--- a/arch/powerpc/configs/44x/iss476-smp_defconfig
+++ b/arch/powerpc/configs/44x/iss476-smp_defconfig
@@ -7,7 +7,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_PROFILING=y
diff --git a/arch/powerpc/configs/44x/katmai_defconfig b/arch/powerpc/configs/44x/katmai_defconfig
index 4ca9b4873c51..34c09144a699 100644
--- a/arch/powerpc/configs/44x/katmai_defconfig
+++ b/arch/powerpc/configs/44x/katmai_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/rainier_defconfig b/arch/powerpc/configs/44x/rainier_defconfig
index e3b65d24207e..21c33faf61a2 100644
--- a/arch/powerpc/configs/44x/rainier_defconfig
+++ b/arch/powerpc/configs/44x/rainier_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/redwood_defconfig b/arch/powerpc/configs/44x/redwood_defconfig
index 64cd0f3421a9..01cc2b1a7f9a 100644
--- a/arch/powerpc/configs/44x/redwood_defconfig
+++ b/arch/powerpc/configs/44x/redwood_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/sam440ep_defconfig b/arch/powerpc/configs/44x/sam440ep_defconfig
index 01d03367917e..dfcffede16ad 100644
--- a/arch/powerpc/configs/44x/sam440ep_defconfig
+++ b/arch/powerpc/configs/44x/sam440ep_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/sequoia_defconfig b/arch/powerpc/configs/44x/sequoia_defconfig
index 89b2f9626137..47e399f2892f 100644
--- a/arch/powerpc/configs/44x/sequoia_defconfig
+++ b/arch/powerpc/configs/44x/sequoia_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/taishan_defconfig b/arch/powerpc/configs/44x/taishan_defconfig
index e3386cf6f5b7..a6a002ed5681 100644
--- a/arch/powerpc/configs/44x/taishan_defconfig
+++ b/arch/powerpc/configs/44x/taishan_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/44x/warp_defconfig b/arch/powerpc/configs/44x/warp_defconfig
index 9c13b9dffafa..abf74dc1f79c 100644
--- a/arch/powerpc/configs/44x/warp_defconfig
+++ b/arch/powerpc/configs/44x/warp_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
@@ -47,6 +47,7 @@ CONFIG_MTD_NAND_NDFC=y
 CONFIG_MTD_UBI=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_RAM=y
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_SCSI=y
 CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/52xx/cm5200_defconfig b/arch/powerpc/configs/52xx/cm5200_defconfig
index f234c4d0b15c..69b57daf402e 100644
--- a/arch/powerpc/configs/52xx/cm5200_defconfig
+++ b/arch/powerpc/configs/52xx/cm5200_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/52xx/lite5200b_defconfig b/arch/powerpc/configs/52xx/lite5200b_defconfig
index a4a795c80740..f3638ae0a627 100644
--- a/arch/powerpc/configs/52xx/lite5200b_defconfig
+++ b/arch/powerpc/configs/52xx/lite5200b_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/52xx/motionpro_defconfig b/arch/powerpc/configs/52xx/motionpro_defconfig
index 20d53a1aa7e4..0c7de9620ea6 100644
--- a/arch/powerpc/configs/52xx/motionpro_defconfig
+++ b/arch/powerpc/configs/52xx/motionpro_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
@@ -43,6 +43,7 @@ CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_SCSI_TGT=y
 CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/52xx/pcm030_defconfig b/arch/powerpc/configs/52xx/pcm030_defconfig
index 6bd58338bf1a..22e719575c60 100644
--- a/arch/powerpc/configs/52xx/pcm030_defconfig
+++ b/arch/powerpc/configs/52xx/pcm030_defconfig
@@ -8,7 +8,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_VM_EVENT_COUNTERS is not set
 CONFIG_SLAB=y
@@ -85,7 +85,7 @@ CONFIG_USB_OHCI_HCD=m
 CONFIG_USB_OHCI_HCD_PPC_OF_BE=y
 # CONFIG_USB_OHCI_HCD_PCI is not set
 CONFIG_USB_STORAGE=m
-CONFIG_RTC_CLASS=m
+CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PCF8563=m
 CONFIG_EXT2_FS=m
 CONFIG_EXT3_FS=m
diff --git a/arch/powerpc/configs/52xx/tqm5200_defconfig b/arch/powerpc/configs/52xx/tqm5200_defconfig
index 3a1f70292d9d..959cd2cfc275 100644
--- a/arch/powerpc/configs/52xx/tqm5200_defconfig
+++ b/arch/powerpc/configs/52xx/tqm5200_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_KALLSYMS is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/83xx/asp8347_defconfig b/arch/powerpc/configs/83xx/asp8347_defconfig
index eed42d8919e8..d2762d9dcb8e 100644
--- a/arch/powerpc/configs/83xx/asp8347_defconfig
+++ b/arch/powerpc/configs/83xx/asp8347_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/kmeter1_defconfig b/arch/powerpc/configs/83xx/kmeter1_defconfig
index e43ecb27dfd7..07e1bbadebfe 100644
--- a/arch/powerpc/configs/83xx/kmeter1_defconfig
+++ b/arch/powerpc/configs/83xx/kmeter1_defconfig
@@ -2,8 +2,9 @@ CONFIG_EXPERIMENTAL=y
 # CONFIG_SWAP is not set
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
+CONFIG_SPARSE_IRQ=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_HOTPLUG is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
@@ -18,7 +19,6 @@ CONFIG_KMETER1=y
 CONFIG_NO_HZ=y
 CONFIG_HIGH_RES_TIMERS=y
 CONFIG_PREEMPT=y
-CONFIG_SPARSE_IRQ=y
 # CONFIG_SECCOMP is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -37,7 +37,6 @@ CONFIG_MTD=y
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLOCK=y
 CONFIG_MTD_CFI=y
@@ -49,13 +48,12 @@ CONFIG_MTD_UBI=y
 CONFIG_MTD_UBI_GLUEBI=y
 CONFIG_MTD_UBI_DEBUG=y
 CONFIG_PROC_DEVICETREE=y
-# CONFIG_MISC_DEVICES is not set
 CONFIG_NETDEVICES=y
 CONFIG_DUMMY=y
 CONFIG_TUN=y
+CONFIG_MII=y
 CONFIG_MARVELL_PHY=y
 CONFIG_NET_ETHERNET=y
-CONFIG_MII=y
 CONFIG_UCC_GETH=y
 # CONFIG_NETDEV_10000 is not set
 CONFIG_WAN=y
@@ -77,7 +75,6 @@ CONFIG_I2C_MPC=y
 # CONFIG_USB_SUPPORT is not set
 CONFIG_UIO=y
 # CONFIG_DNOTIFY is not set
-CONFIG_INOTIFY=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_NFS_FS=y
diff --git a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
index c2e6ab51d335..126ef1b08a01 100644
--- a/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8313_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -104,7 +104,6 @@ CONFIG_ROOT_NFS=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_CRYPTO_PCBC=m
diff --git a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
index 1d3b20065913..abcf00ad939e 100644
--- a/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc8315_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -101,7 +101,6 @@ CONFIG_ROOT_NFS=y
 CONFIG_PARTITION_ADVANCED=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_CRYPTO_PCBC=m
diff --git a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
index 91fe73bd5ad2..a5699a1f7d0a 100644
--- a/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
index 6d300f205604..b4da1a7e6449 100644
--- a/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc832x_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
index b236a67e01fe..291f8221d5a6 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
index 001dead3cde9..f8b228aaa03a 100644
--- a/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_itxgp_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
index 9dccefca00c3..99660c062191 100644
--- a/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc834x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
index d4b165d7d294..10b5c4cd0e72 100644
--- a/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
index 89ba67274bda..45925d701d2a 100644
--- a/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
+++ b/arch/powerpc/configs/83xx/mpc836x_rdk_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
index 2ea6b405046a..f367985be6f7 100644
--- a/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_mds_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
index bffe3c775030..414eda381591 100644
--- a/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
+++ b/arch/powerpc/configs/83xx/mpc837x_rdb_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/83xx/sbc834x_defconfig b/arch/powerpc/configs/83xx/sbc834x_defconfig
index fa5c9eefc9ad..6d6463fe06fc 100644
--- a/arch/powerpc/configs/83xx/sbc834x_defconfig
+++ b/arch/powerpc/configs/83xx/sbc834x_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_SLAB=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/85xx/ksi8560_defconfig b/arch/powerpc/configs/85xx/ksi8560_defconfig
index 385b1af37d75..8f7c1061891a 100644
--- a/arch/powerpc/configs/85xx/ksi8560_defconfig
+++ b/arch/powerpc/configs/85xx/ksi8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_KSI8560=y
 CONFIG_CPM2=y
diff --git a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
index 222b704c1f4b..11662c217ac0 100644
--- a/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8540_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC8540_ADS=y
 CONFIG_NO_HZ=y
@@ -58,7 +58,6 @@ CONFIG_PARTITION_ADVANCED=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
index 619702de9477..ebe9b30b0721 100644
--- a/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
+++ b/arch/powerpc/configs/85xx/mpc8560_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC8560_ADS=y
 CONFIG_BINFMT_MISC=y
@@ -59,7 +59,6 @@ CONFIG_PARTITION_ADVANCED=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
index 6bf56e83f957..eb25229b387a 100644
--- a/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
+++ b/arch/powerpc/configs/85xx/mpc85xx_cds_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_MPC85xx_CDS=y
 CONFIG_NO_HZ=y
@@ -63,7 +63,6 @@ CONFIG_PARTITION_ADVANCED=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 CONFIG_DEBUG_MUTEXES=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/85xx/sbc8548_defconfig b/arch/powerpc/configs/85xx/sbc8548_defconfig
index a9a17d055766..5b2b651dfb98 100644
--- a/arch/powerpc/configs/85xx/sbc8548_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8548_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_SBC8548=y
diff --git a/arch/powerpc/configs/85xx/sbc8560_defconfig b/arch/powerpc/configs/85xx/sbc8560_defconfig
index 820e32d8c42b..f7fdb0318e4c 100644
--- a/arch/powerpc/configs/85xx/sbc8560_defconfig
+++ b/arch/powerpc/configs/85xx/sbc8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_SBC8560=y
diff --git a/arch/powerpc/configs/85xx/socrates_defconfig b/arch/powerpc/configs/85xx/socrates_defconfig
index b6db3f47af99..77506b5d5a41 100644
--- a/arch/powerpc/configs/85xx/socrates_defconfig
+++ b/arch/powerpc/configs/85xx/socrates_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=16
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/stx_gp3_defconfig b/arch/powerpc/configs/85xx/stx_gp3_defconfig
index 333a41bd2a68..5d4db154bf59 100644
--- a/arch/powerpc/configs/85xx/stx_gp3_defconfig
+++ b/arch/powerpc/configs/85xx/stx_gp3_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODVERSIONS=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/85xx/tqm8540_defconfig b/arch/powerpc/configs/85xx/tqm8540_defconfig
index 33db352f847e..ddcb9f37fa1f 100644
--- a/arch/powerpc/configs/85xx/tqm8540_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8540_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8541_defconfig b/arch/powerpc/configs/85xx/tqm8541_defconfig
index f0c20dfbd4d3..981abd6d4b57 100644
--- a/arch/powerpc/configs/85xx/tqm8541_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8541_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8548_defconfig b/arch/powerpc/configs/85xx/tqm8548_defconfig
index a883450dcdfa..37b3d7227cdd 100644
--- a/arch/powerpc/configs/85xx/tqm8548_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8548_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
diff --git a/arch/powerpc/configs/85xx/tqm8555_defconfig b/arch/powerpc/configs/85xx/tqm8555_defconfig
index ff95f90dc171..3593b320c97c 100644
--- a/arch/powerpc/configs/85xx/tqm8555_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8555_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/tqm8560_defconfig b/arch/powerpc/configs/85xx/tqm8560_defconfig
index 8d6c90ea4783..de413acc34d6 100644
--- a/arch/powerpc/configs/85xx/tqm8560_defconfig
+++ b/arch/powerpc/configs/85xx/tqm8560_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_EPOLL is not set
diff --git a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
index f53efe4a0e0c..5ea3124518fd 100644
--- a/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
+++ b/arch/powerpc/configs/85xx/xes_mpc85xx_defconfig
@@ -11,7 +11,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
index 432ebc28d25c..d41857a5152d 100644
--- a/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
+++ b/arch/powerpc/configs/86xx/gef_ppc9a_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -85,6 +85,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_DS1682=y
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc310_defconfig b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
index ce5e919d9b55..38303ec11bcd 100644
--- a/arch/powerpc/configs/86xx/gef_sbc310_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc310_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -85,6 +85,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_DS1682=y
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECS=y
diff --git a/arch/powerpc/configs/86xx/gef_sbc610_defconfig b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
index 589e71e6dc1c..98533973d20f 100644
--- a/arch/powerpc/configs/86xx/gef_sbc610_defconfig
+++ b/arch/powerpc/configs/86xx/gef_sbc610_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
@@ -138,6 +138,7 @@ CONFIG_BLK_DEV_CRYPTOLOOP=m
 CONFIG_BLK_DEV_NBD=m
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_DS1682=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
diff --git a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
index 321fb47096d9..036bfb2d18cd 100644
--- a/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8610_hpcd_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_ELF_CORE is not set
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
index b5e46399374e..f51c7ebc181e 100644
--- a/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
+++ b/arch/powerpc/configs/86xx/mpc8641_hpcn_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
@@ -63,6 +63,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -167,7 +168,6 @@ CONFIG_MAC_PARTITION=y
 CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/86xx/sbc8641d_defconfig b/arch/powerpc/configs/86xx/sbc8641d_defconfig
index 71145c3a64db..0a92ca045641 100644
--- a/arch/powerpc/configs/86xx/sbc8641d_defconfig
+++ b/arch/powerpc/configs/86xx/sbc8641d_defconfig
@@ -11,7 +11,7 @@ CONFIG_LOG_BUF_SHIFT=14
 CONFIG_RELAY=y
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/adder875_defconfig b/arch/powerpc/configs/adder875_defconfig
index ca84c7fc24d5..69128740c14d 100644
--- a/arch/powerpc/configs/adder875_defconfig
+++ b/arch/powerpc/configs/adder875_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/c2k_defconfig b/arch/powerpc/configs/c2k_defconfig
index f9e6a3ea5a64..2a84fd7f631c 100644
--- a/arch/powerpc/configs/c2k_defconfig
+++ b/arch/powerpc/configs/c2k_defconfig
@@ -132,8 +132,8 @@ CONFIG_NET_CLS_RSVP=m
 CONFIG_NET_CLS_RSVP6=m
 CONFIG_NET_CLS_IND=y
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
+CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=m
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
diff --git a/arch/powerpc/configs/e55xx_smp_defconfig b/arch/powerpc/configs/e55xx_smp_defconfig
new file mode 100644
index 000000000000..d32283555b53
--- /dev/null
+++ b/arch/powerpc/configs/e55xx_smp_defconfig
@@ -0,0 +1,104 @@
+CONFIG_PPC64=y
+CONFIG_PPC_BOOK3E_64=y
+# CONFIG_VIRT_CPU_ACCOUNTING is not set
+CONFIG_SMP=y
+CONFIG_NR_CPUS=2
+CONFIG_EXPERIMENTAL=y
+CONFIG_SYSVIPC=y
+CONFIG_BSD_PROCESS_ACCT=y
+CONFIG_SPARSE_IRQ=y
+CONFIG_IKCONFIG=y
+CONFIG_IKCONFIG_PROC=y
+CONFIG_LOG_BUF_SHIFT=14
+CONFIG_BLK_DEV_INITRD=y
+# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
+CONFIG_EXPERT=y
+CONFIG_KALLSYMS_ALL=y
+CONFIG_KALLSYMS_EXTRA_PASS=y
+CONFIG_MODULES=y
+CONFIG_MODULE_UNLOAD=y
+CONFIG_MODULE_FORCE_UNLOAD=y
+CONFIG_MODVERSIONS=y
+# CONFIG_BLK_DEV_BSG is not set
+CONFIG_P5020_DS=y
+# CONFIG_PPC_OF_BOOT_TRAMPOLINE is not set
+CONFIG_NO_HZ=y
+CONFIG_HIGH_RES_TIMERS=y
+CONFIG_BINFMT_MISC=m
+# CONFIG_PCI is not set
+CONFIG_NET=y
+CONFIG_PACKET=y
+CONFIG_UNIX=y
+CONFIG_XFRM_USER=y
+CONFIG_NET_KEY=y
+CONFIG_INET=y
+CONFIG_IP_MULTICAST=y
+CONFIG_IP_ADVANCED_ROUTER=y
+CONFIG_IP_MULTIPLE_TABLES=y
+CONFIG_IP_ROUTE_MULTIPATH=y
+CONFIG_IP_ROUTE_VERBOSE=y
+CONFIG_IP_PNP=y
+CONFIG_IP_PNP_DHCP=y
+CONFIG_IP_PNP_BOOTP=y
+CONFIG_IP_PNP_RARP=y
+CONFIG_NET_IPIP=y
+CONFIG_IP_MROUTE=y
+CONFIG_IP_PIMSM_V1=y
+CONFIG_IP_PIMSM_V2=y
+CONFIG_ARPD=y
+CONFIG_INET_ESP=y
+# CONFIG_INET_XFRM_MODE_BEET is not set
+# CONFIG_INET_LRO is not set
+CONFIG_IPV6=y
+CONFIG_IP_SCTP=m
+CONFIG_UEVENT_HELPER_PATH="/sbin/hotplug"
+CONFIG_PROC_DEVICETREE=y
+CONFIG_BLK_DEV_LOOP=y
+CONFIG_BLK_DEV_RAM=y
+CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
+CONFIG_EEPROM_LEGACY=y
+CONFIG_NETDEVICES=y
+CONFIG_DUMMY=y
+CONFIG_NET_ETHERNET=y
+CONFIG_INPUT_FF_MEMLESS=m
+# CONFIG_INPUT_MOUSEDEV is not set
+# CONFIG_INPUT_KEYBOARD is not set
+# CONFIG_INPUT_MOUSE is not set
+CONFIG_SERIO_LIBPS2=y
+CONFIG_SERIAL_8250=y
+CONFIG_SERIAL_8250_CONSOLE=y
+CONFIG_SERIAL_8250_EXTENDED=y
+CONFIG_SERIAL_8250_MANY_PORTS=y
+CONFIG_SERIAL_8250_DETECT_IRQ=y
+CONFIG_SERIAL_8250_RSA=y
+CONFIG_I2C=y
+# CONFIG_HWMON is not set
+CONFIG_VIDEO_OUTPUT_CONTROL=y
+# CONFIG_HID_SUPPORT is not set
+# CONFIG_USB_SUPPORT is not set
+CONFIG_DMADEVICES=y
+CONFIG_FSL_DMA=y
+CONFIG_EXT2_FS=y
+CONFIG_EXT3_FS=y
+# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
+CONFIG_PROC_KCORE=y
+CONFIG_TMPFS=y
+# CONFIG_MISC_FILESYSTEMS is not set
+CONFIG_PARTITION_ADVANCED=y
+CONFIG_MAC_PARTITION=y
+CONFIG_NLS=y
+CONFIG_NLS_UTF8=m
+CONFIG_CRC_T10DIF=y
+CONFIG_CRC_ITU_T=m
+CONFIG_FRAME_WARN=1024
+CONFIG_DEBUG_FS=y
+CONFIG_DEBUG_KERNEL=y
+CONFIG_DETECT_HUNG_TASK=y
+CONFIG_DEBUG_INFO=y
+# CONFIG_RCU_CPU_STALL_DETECTOR is not set
+CONFIG_SYSCTL_SYSCALL_CHECK=y
+CONFIG_VIRQ_DEBUG=y
+CONFIG_CRYPTO_PCBC=m
+# CONFIG_CRYPTO_ANSI_CPRNG is not set
+CONFIG_CRYPTO_DEV_TALITOS=y
diff --git a/arch/powerpc/configs/ep8248e_defconfig b/arch/powerpc/configs/ep8248e_defconfig
index 2677b08199e7..fceffb3cffbe 100644
--- a/arch/powerpc/configs/ep8248e_defconfig
+++ b/arch/powerpc/configs/ep8248e_defconfig
@@ -2,7 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
diff --git a/arch/powerpc/configs/ep88xc_defconfig b/arch/powerpc/configs/ep88xc_defconfig
index f9a3112e5442..219fd470ed22 100644
--- a/arch/powerpc/configs/ep88xc_defconfig
+++ b/arch/powerpc/configs/ep88xc_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/gamecube_defconfig b/arch/powerpc/configs/gamecube_defconfig
index fcf0a398cd66..e74d3a483705 100644
--- a/arch/powerpc/configs/gamecube_defconfig
+++ b/arch/powerpc/configs/gamecube_defconfig
@@ -6,7 +6,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 CONFIG_PERF_COUNTERS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/powerpc/configs/holly_defconfig b/arch/powerpc/configs/holly_defconfig
index b9b63a609525..94ebfee188db 100644
--- a/arch/powerpc/configs/holly_defconfig
+++ b/arch/powerpc/configs/holly_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_MODULES=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_PPC_CHRP is not set
diff --git a/arch/powerpc/configs/linkstation_defconfig b/arch/powerpc/configs/linkstation_defconfig
index f39d0cf876dd..8a874b999867 100644
--- a/arch/powerpc/configs/linkstation_defconfig
+++ b/arch/powerpc/configs/linkstation_defconfig
@@ -78,6 +78,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=2
 CONFIG_BLK_DEV_RAM_SIZE=8192
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=m
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_SG=y
diff --git a/arch/powerpc/configs/mgcoge_defconfig b/arch/powerpc/configs/mgcoge_defconfig
index c4ed255af18b..6cb588a7d425 100644
--- a/arch/powerpc/configs/mgcoge_defconfig
+++ b/arch/powerpc/configs/mgcoge_defconfig
@@ -1,16 +1,16 @@
 CONFIG_SYSVIPC=y
+CONFIG_SPARSE_IRQ=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_SLAB=y
 # CONFIG_IOSCHED_CFQ is not set
 CONFIG_PPC_82xx=y
 CONFIG_MGCOGE=y
 CONFIG_BINFMT_MISC=y
-CONFIG_SPARSE_IRQ=y
 # CONFIG_SECCOMP is not set
 CONFIG_NET=y
 CONFIG_PACKET=y
@@ -30,7 +30,6 @@ CONFIG_MTD=y
 CONFIG_MTD_CONCAT=y
 CONFIG_MTD_PARTITIONS=y
 CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_OF_PARTS=y
 CONFIG_MTD_CHAR=y
 CONFIG_MTD_BLKDEVS=y
 CONFIG_MTD_CFI=y
@@ -43,7 +42,6 @@ CONFIG_MTD_PHYSMAP_OF=y
 CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
 # CONFIG_MACINTOSH_DRIVERS is not set
 CONFIG_NETDEVICES=y
 CONFIG_FIXED_PHY=y
@@ -67,7 +65,6 @@ CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=y
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
 # CONFIG_EXT3_FS_XATTR is not set
-CONFIG_INOTIFY=y
 CONFIG_AUTOFS4_FS=y
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
@@ -88,13 +85,9 @@ CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 # CONFIG_SCHED_DEBUG is not set
 CONFIG_DEBUG_INFO=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
 CONFIG_BDI_SWITCH=y
-CONFIG_CRYPTO_CBC=y
 CONFIG_CRYPTO_ECB=y
 CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_DES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
diff --git a/arch/powerpc/configs/mgsuvd_defconfig b/arch/powerpc/configs/mgsuvd_defconfig
deleted file mode 100644
index f276c7cf555b..000000000000
--- a/arch/powerpc/configs/mgsuvd_defconfig
+++ /dev/null
@@ -1,81 +0,0 @@
-CONFIG_PPC_8xx=y
-CONFIG_EXPERIMENTAL=y
-# CONFIG_SWAP is not set
-CONFIG_SYSVIPC=y
-CONFIG_BLK_DEV_INITRD=y
-# CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
-# CONFIG_SYSCTL_SYSCALL is not set
-# CONFIG_HOTPLUG is not set
-# CONFIG_BUG is not set
-# CONFIG_BASE_FULL is not set
-# CONFIG_EPOLL is not set
-# CONFIG_VM_EVENT_COUNTERS is not set
-CONFIG_SLAB=y
-# CONFIG_BLK_DEV_BSG is not set
-CONFIG_PPC_MGSUVD=y
-CONFIG_8xx_COPYBACK=y
-CONFIG_8xx_CPU6=y
-CONFIG_I2C_SPI_SMC1_UCODE_PATCH=y
-CONFIG_HZ_1000=y
-CONFIG_MATH_EMULATION=y
-CONFIG_SPARSE_IRQ=y
-# CONFIG_SECCOMP is not set
-CONFIG_NET=y
-CONFIG_PACKET=y
-CONFIG_UNIX=y
-CONFIG_INET=y
-CONFIG_IP_MULTICAST=y
-CONFIG_IP_PNP=y
-CONFIG_SYN_COOKIES=y
-# CONFIG_INET_LRO is not set
-# CONFIG_IPV6 is not set
-CONFIG_MTD=y
-CONFIG_MTD_PARTITIONS=y
-CONFIG_MTD_CMDLINE_PARTS=y
-CONFIG_MTD_OF_PARTS=y
-CONFIG_MTD_CHAR=y
-CONFIG_MTD_BLOCK=y
-CONFIG_MTD_CFI=y
-CONFIG_MTD_CFI_ADV_OPTIONS=y
-CONFIG_MTD_CFI_GEOMETRY=y
-# CONFIG_MTD_MAP_BANK_WIDTH_4 is not set
-CONFIG_MTD_CFI_INTELEXT=y
-CONFIG_MTD_CFI_AMDSTD=y
-CONFIG_MTD_CFI_STAA=y
-CONFIG_MTD_PHYSMAP_OF=y
-CONFIG_BLK_DEV_LOOP=y
-CONFIG_BLK_DEV_RAM=y
-# CONFIG_MISC_DEVICES is not set
-CONFIG_NETDEVICES=y
-CONFIG_FIXED_PHY=y
-CONFIG_NET_ETHERNET=y
-CONFIG_FS_ENET=y
-# CONFIG_FS_ENET_HAS_FEC is not set
-# CONFIG_NETDEV_1000 is not set
-# CONFIG_NETDEV_10000 is not set
-# CONFIG_INPUT is not set
-# CONFIG_SERIO is not set
-# CONFIG_VT is not set
-CONFIG_SERIAL_CPM=y
-CONFIG_SERIAL_CPM_CONSOLE=y
-# CONFIG_LEGACY_PTYS is not set
-CONFIG_GEN_RTC=y
-# CONFIG_HWMON is not set
-# CONFIG_USB_SUPPORT is not set
-CONFIG_EXT2_FS=y
-CONFIG_EXT2_FS_XATTR=y
-CONFIG_EXT3_FS=y
-# CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_INOTIFY=y
-CONFIG_TMPFS=y
-CONFIG_JFFS2_FS=y
-CONFIG_CRAMFS=y
-CONFIG_NFS_FS=y
-CONFIG_NFS_V3=y
-CONFIG_ROOT_NFS=y
-CONFIG_PARTITION_ADVANCED=y
-CONFIG_CRC_CCITT=y
-CONFIG_DEBUG_FS=y
-# CONFIG_RCU_CPU_STALL_DETECTOR is not set
-# CONFIG_CRYPTO_ANSI_CPRNG is not set
diff --git a/arch/powerpc/configs/mpc512x_defconfig b/arch/powerpc/configs/mpc512x_defconfig
index 62db8a3df162..c02bbb2fddf8 100644
--- a/arch/powerpc/configs/mpc512x_defconfig
+++ b/arch/powerpc/configs/mpc512x_defconfig
@@ -61,6 +61,7 @@ CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_COUNT=1
 CONFIG_BLK_DEV_RAM_SIZE=8192
 CONFIG_BLK_DEV_XIP=y
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_SCSI=y
 # CONFIG_SCSI_PROC_FS is not set
diff --git a/arch/powerpc/configs/mpc5200_defconfig b/arch/powerpc/configs/mpc5200_defconfig
index 7376e27b8ed4..e63f537b854a 100644
--- a/arch/powerpc/configs/mpc5200_defconfig
+++ b/arch/powerpc/configs/mpc5200_defconfig
@@ -52,6 +52,7 @@ CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=32768
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_AT24=y
 CONFIG_SCSI_TGT=y
 CONFIG_BLK_DEV_SD=y
diff --git a/arch/powerpc/configs/mpc7448_hpc2_defconfig b/arch/powerpc/configs/mpc7448_hpc2_defconfig
index 3b9470883de5..75f0bbf0f6e8 100644
--- a/arch/powerpc/configs/mpc7448_hpc2_defconfig
+++ b/arch/powerpc/configs/mpc7448_hpc2_defconfig
@@ -4,7 +4,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_BLK_DEV_BSG is not set
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/mpc8272_ads_defconfig b/arch/powerpc/configs/mpc8272_ads_defconfig
index c7d68ff1a736..6a22400f73c1 100644
--- a/arch/powerpc/configs/mpc8272_ads_defconfig
+++ b/arch/powerpc/configs/mpc8272_ads_defconfig
@@ -2,7 +2,7 @@ CONFIG_SYSVIPC=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/mpc83xx_defconfig b/arch/powerpc/configs/mpc83xx_defconfig
index 5b1b10fd9740..5aac9a8bc53b 100644
--- a/arch/powerpc/configs/mpc83xx_defconfig
+++ b/arch/powerpc/configs/mpc83xx_defconfig
@@ -3,7 +3,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_SLAB=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/mpc85xx_defconfig b/arch/powerpc/configs/mpc85xx_defconfig
index c3b113b2ca31..96b89df7752a 100644
--- a/arch/powerpc/configs/mpc85xx_defconfig
+++ b/arch/powerpc/configs/mpc85xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
@@ -82,6 +82,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -124,6 +125,9 @@ CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+CONFIG_FB_FSL_DIU=y
+# CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 # CONFIG_SND_SUPPORT_OLD_API is not set
@@ -200,7 +204,6 @@ CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/mpc85xx_smp_defconfig b/arch/powerpc/configs/mpc85xx_smp_defconfig
index a075da2ea3fb..de65841aa04e 100644
--- a/arch/powerpc/configs/mpc85xx_smp_defconfig
+++ b/arch/powerpc/configs/mpc85xx_smp_defconfig
@@ -12,7 +12,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
@@ -84,6 +84,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -126,6 +127,9 @@ CONFIG_I2C_CPM=m
 CONFIG_I2C_MPC=y
 # CONFIG_HWMON is not set
 CONFIG_VIDEO_OUTPUT_CONTROL=y
+CONFIG_FB=y
+CONFIG_FB_FSL_DIU=y
+# CONFIG_VGA_CONSOLE is not set
 CONFIG_SOUND=y
 CONFIG_SND=y
 # CONFIG_SND_SUPPORT_OLD_API is not set
@@ -202,7 +206,6 @@ CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_FS=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/mpc866_ads_defconfig b/arch/powerpc/configs/mpc866_ads_defconfig
index 668215cae890..5c258823e694 100644
--- a/arch/powerpc/configs/mpc866_ads_defconfig
+++ b/arch/powerpc/configs/mpc866_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_HOTPLUG is not set
 # CONFIG_BUG is not set
diff --git a/arch/powerpc/configs/mpc86xx_defconfig b/arch/powerpc/configs/mpc86xx_defconfig
index 63b90d477889..a1cc8179e9fd 100644
--- a/arch/powerpc/configs/mpc86xx_defconfig
+++ b/arch/powerpc/configs/mpc86xx_defconfig
@@ -10,7 +10,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
@@ -66,6 +66,7 @@ CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_NBD=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=131072
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_BLK_DEV_SD=y
 CONFIG_CHR_DEV_ST=y
@@ -170,7 +171,6 @@ CONFIG_MAC_PARTITION=y
 CONFIG_CRC_T10DIF=y
 CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
-# CONFIG_DEBUG_BUGVERBOSE is not set
 CONFIG_DEBUG_INFO=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
diff --git a/arch/powerpc/configs/mpc885_ads_defconfig b/arch/powerpc/configs/mpc885_ads_defconfig
index f9b83481b00e..9e146cdf63de 100644
--- a/arch/powerpc/configs/mpc885_ads_defconfig
+++ b/arch/powerpc/configs/mpc885_ads_defconfig
@@ -4,7 +4,7 @@ CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/pasemi_defconfig b/arch/powerpc/configs/pasemi_defconfig
index edd2d54c8196..f4deb0b78cf0 100644
--- a/arch/powerpc/configs/pasemi_defconfig
+++ b/arch/powerpc/configs/pasemi_defconfig
@@ -59,6 +59,7 @@ CONFIG_PROC_DEVICETREE=y
 CONFIG_BLK_DEV_LOOP=y
 CONFIG_BLK_DEV_RAM=y
 CONFIG_BLK_DEV_RAM_SIZE=16384
+CONFIG_MISC_DEVICES=y
 CONFIG_EEPROM_LEGACY=y
 CONFIG_IDE=y
 CONFIG_BLK_DEV_IDECD=y
diff --git a/arch/powerpc/configs/pmac32_defconfig b/arch/powerpc/configs/pmac32_defconfig
index ac4fc41035f6..f8b394a76ac3 100644
--- a/arch/powerpc/configs/pmac32_defconfig
+++ b/arch/powerpc/configs/pmac32_defconfig
@@ -112,8 +112,8 @@ CONFIG_IRDA_CACHE_LAST_LSAP=y
 CONFIG_IRDA_FAST_RR=y
 CONFIG_IRTTY_SIR=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
+CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=m
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
diff --git a/arch/powerpc/configs/ppc40x_defconfig b/arch/powerpc/configs/ppc40x_defconfig
index 93d7425ce6cd..bfd634b5ada7 100644
--- a/arch/powerpc/configs/ppc40x_defconfig
+++ b/arch/powerpc/configs/ppc40x_defconfig
@@ -5,7 +5,7 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
diff --git a/arch/powerpc/configs/ppc44x_defconfig b/arch/powerpc/configs/ppc44x_defconfig
index cd446fba3fae..47133202a625 100644
--- a/arch/powerpc/configs/ppc44x_defconfig
+++ b/arch/powerpc/configs/ppc44x_defconfig
@@ -5,13 +5,14 @@ CONFIG_POSIX_MQUEUE=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 # CONFIG_BLK_DEV_BSG is not set
 CONFIG_BAMBOO=y
+CONFIG_BLUESTONE=y
 CONFIG_SAM440EP=y
 CONFIG_SEQUOIA=y
 CONFIG_TAISHAN=y
@@ -97,14 +98,17 @@ CONFIG_USB_STORAGE=m
 CONFIG_EXT2_FS=y
 CONFIG_EXT3_FS=m
 # CONFIG_EXT3_DEFAULTS_TO_ORDERED is not set
-CONFIG_INOTIFY=y
 CONFIG_VFAT_FS=m
 CONFIG_PROC_KCORE=y
 CONFIG_TMPFS=y
 CONFIG_JFFS2_FS=y
 CONFIG_UBIFS_FS=m
 CONFIG_UBIFS_FS_XATTR=y
+CONFIG_LOGFS=m
 CONFIG_CRAMFS=y
+CONFIG_SQUASHFS=m
+CONFIG_SQUASHFS_XATTR=y
+CONFIG_SQUASHFS_LZO=y
 CONFIG_NFS_FS=y
 CONFIG_NFS_V3=y
 CONFIG_ROOT_NFS=y
@@ -116,11 +120,8 @@ CONFIG_DEBUG_KERNEL=y
 CONFIG_DETECT_HUNG_TASK=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_CRYPTO_CBC=y
 CONFIG_CRYPTO_ECB=y
 CONFIG_CRYPTO_PCBC=y
-CONFIG_CRYPTO_MD5=y
-CONFIG_CRYPTO_DES=y
 # CONFIG_CRYPTO_ANSI_CPRNG is not set
 # CONFIG_CRYPTO_HW is not set
 CONFIG_VIRTUALIZATION=y
diff --git a/arch/powerpc/configs/ppc64e_defconfig b/arch/powerpc/configs/ppc64e_defconfig
index 04ae0740b6d0..7bd1763877ba 100644
--- a/arch/powerpc/configs/ppc64e_defconfig
+++ b/arch/powerpc/configs/ppc64e_defconfig
@@ -18,6 +18,7 @@ CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
 CONFIG_MODVERSIONS=y
 CONFIG_MODULE_SRCVERSION_ALL=y
+CONFIG_P5020_DS=y
 CONFIG_CPU_FREQ=y
 CONFIG_CPU_FREQ_GOV_POWERSAVE=y
 CONFIG_CPU_FREQ_GOV_USERSPACE=y
@@ -256,7 +257,6 @@ CONFIG_HID_ZEROPLUS=y
 CONFIG_USB=y
 CONFIG_USB_DEVICEFS=y
 CONFIG_USB_EHCI_HCD=y
-CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
 CONFIG_USB_OHCI_HCD=y
 CONFIG_USB_STORAGE=m
@@ -290,7 +290,6 @@ CONFIG_JFS_POSIX_ACL=y
 CONFIG_JFS_SECURITY=y
 CONFIG_XFS_FS=m
 CONFIG_XFS_POSIX_ACL=y
-CONFIG_INOTIFY=y
 CONFIG_AUTOFS4_FS=m
 CONFIG_ISO9660_FS=y
 CONFIG_UDF_FS=m
@@ -384,7 +383,6 @@ CONFIG_CRYPTO_TGR192=m
 CONFIG_CRYPTO_WP512=m
 CONFIG_CRYPTO_AES=m
 CONFIG_CRYPTO_ANUBIS=m
-CONFIG_CRYPTO_ARC4=m
 CONFIG_CRYPTO_BLOWFISH=m
 CONFIG_CRYPTO_CAST6=m
 CONFIG_CRYPTO_KHAZAD=m
diff --git a/arch/powerpc/configs/ppc6xx_defconfig b/arch/powerpc/configs/ppc6xx_defconfig
index 9d64a6822d86..04360f9b0109 100644
--- a/arch/powerpc/configs/ppc6xx_defconfig
+++ b/arch/powerpc/configs/ppc6xx_defconfig
@@ -10,7 +10,6 @@ CONFIG_TASK_XACCT=y
 CONFIG_TASK_IO_ACCOUNTING=y
 CONFIG_AUDIT=y
 CONFIG_CGROUPS=y
-CONFIG_CGROUP_NS=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CGROUP_CPUACCT=y
 CONFIG_RESOURCE_COUNTERS=y
@@ -351,8 +350,8 @@ CONFIG_VLSI_FIR=m
 CONFIG_VIA_FIR=m
 CONFIG_MCS_FIR=m
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
+CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=m
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -398,6 +397,7 @@ CONFIG_BLK_DEV_RAM_SIZE=16384
 CONFIG_CDROM_PKTCDVD=m
 CONFIG_VIRTIO_BLK=m
 CONFIG_BLK_DEV_HD=y
+CONFIG_MISC_DEVICES=y
 CONFIG_ENCLOSURE_SERVICES=m
 CONFIG_SENSORS_TSL2550=m
 CONFIG_EEPROM_AT24=m
diff --git a/arch/powerpc/configs/pq2fads_defconfig b/arch/powerpc/configs/pq2fads_defconfig
index a4353bef31c5..baad8db21b61 100644
--- a/arch/powerpc/configs/pq2fads_defconfig
+++ b/arch/powerpc/configs/pq2fads_defconfig
@@ -3,7 +3,7 @@ CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_ALL=y
 # CONFIG_PPC_CHRP is not set
 # CONFIG_PPC_PMAC is not set
diff --git a/arch/powerpc/configs/ps3_defconfig b/arch/powerpc/configs/ps3_defconfig
index 49cffe003657..185c292b0f1c 100644
--- a/arch/powerpc/configs/ps3_defconfig
+++ b/arch/powerpc/configs/ps3_defconfig
@@ -8,7 +8,7 @@ CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
 CONFIG_NAMESPACES=y
 CONFIG_BLK_DEV_INITRD=y
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 CONFIG_KALLSYMS_EXTRA_PASS=y
 # CONFIG_PERF_EVENTS is not set
 # CONFIG_COMPAT_BRK is not set
@@ -52,8 +52,8 @@ CONFIG_IP_PNP_DHCP=y
 # CONFIG_INET_DIAG is not set
 CONFIG_IPV6=y
 CONFIG_BT=m
-CONFIG_BT_L2CAP=m
+CONFIG_BT_L2CAP=y
-CONFIG_BT_SCO=m
+CONFIG_BT_SCO=y
 CONFIG_BT_RFCOMM=m
 CONFIG_BT_RFCOMM_TTY=y
 CONFIG_BT_BNEP=m
@@ -141,7 +141,7 @@ CONFIG_USB_EHCI_TT_NEWSCHED=y
 # CONFIG_USB_EHCI_HCD_PPC_OF is not set
 CONFIG_USB_OHCI_HCD=m
 CONFIG_USB_STORAGE=m
-CONFIG_RTC_CLASS=m
+CONFIG_RTC_CLASS=y
 CONFIG_RTC_DRV_PS3=m
 CONFIG_EXT2_FS=m
 CONFIG_EXT3_FS=m
diff --git a/arch/powerpc/configs/pseries_defconfig b/arch/powerpc/configs/pseries_defconfig
index f87f0e15cfa7..80bc5de7ee1d 100644
--- a/arch/powerpc/configs/pseries_defconfig
+++ b/arch/powerpc/configs/pseries_defconfig
@@ -2,7 +2,7 @@ CONFIG_PPC64=y
 CONFIG_ALTIVEC=y
 CONFIG_VSX=y
 CONFIG_SMP=y
-CONFIG_NR_CPUS=128
+CONFIG_NR_CPUS=1024
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_POSIX_MQUEUE=y
@@ -15,7 +15,6 @@ CONFIG_AUDITSYSCALL=y
 CONFIG_IKCONFIG=y
 CONFIG_IKCONFIG_PROC=y
 CONFIG_CGROUPS=y
-CONFIG_CGROUP_NS=y
 CONFIG_CGROUP_FREEZER=y
 CONFIG_CGROUP_DEVICE=y
 CONFIG_CPUSETS=y
@@ -45,6 +44,8 @@ CONFIG_KEXEC=y
 CONFIG_IRQ_ALL_CPUS=y
 CONFIG_MEMORY_HOTPLUG=y
 CONFIG_MEMORY_HOTREMOVE=y
+CONFIG_PPC_64K_PAGES=y
+CONFIG_PPC_SUBPAGE_PROT=y
 CONFIG_SCHED_SMT=y
 CONFIG_HOTPLUG_PCI=m
 CONFIG_HOTPLUG_PCI_RPA=m
@@ -144,12 +145,17 @@ CONFIG_SCSI_MULTI_LUN=y
 CONFIG_SCSI_CONSTANTS=y
 CONFIG_SCSI_FC_ATTRS=y
 CONFIG_SCSI_SAS_ATTRS=m
+CONFIG_SCSI_CXGB3_ISCSI=m
+CONFIG_SCSI_CXGB4_ISCSI=m
+CONFIG_SCSI_BNX2_ISCSI=m
+CONFIG_BE2ISCSI=m
 CONFIG_SCSI_IBMVSCSI=y
 CONFIG_SCSI_IBMVFC=m
 CONFIG_SCSI_SYM53C8XX_2=y
 CONFIG_SCSI_SYM53C8XX_DMA_ADDRESSING_MODE=0
 CONFIG_SCSI_IPR=y
 CONFIG_SCSI_QLA_FC=m
+CONFIG_SCSI_QLA_ISCSI=m
 CONFIG_SCSI_LPFC=m
 CONFIG_ATA=y
 # CONFIG_ATA_SFF is not set
@@ -184,8 +190,10 @@ CONFIG_ACENIC_OMIT_TIGON_I=y
 CONFIG_E1000=y
 CONFIG_E1000E=y
 CONFIG_TIGON3=y
+CONFIG_BNX2=m
 CONFIG_CHELSIO_T1=m
 CONFIG_CHELSIO_T3=m
+CONFIG_CHELSIO_T4=m
 CONFIG_EHEA=y
 CONFIG_IXGBE=m
 CONFIG_IXGB=m
@@ -193,6 +201,8 @@ CONFIG_S2IO=m
 CONFIG_MYRI10GE=m
 CONFIG_NETXEN_NIC=m
 CONFIG_MLX4_EN=m
+CONFIG_QLGE=m
+CONFIG_BE2NET=m
 CONFIG_PPP=m
 CONFIG_PPP_ASYNC=m
 CONFIG_PPP_SYNC_TTY=m
@@ -252,6 +262,8 @@ CONFIG_INFINIBAND_USER_MAD=m
 CONFIG_INFINIBAND_USER_ACCESS=m
 CONFIG_INFINIBAND_MTHCA=m
 CONFIG_INFINIBAND_EHCA=m
+CONFIG_INFINIBAND_CXGB3=m
+CONFIG_INFINIBAND_CXGB4=m
 CONFIG_MLX4_INFINIBAND=m
 CONFIG_INFINIBAND_IPOIB=m
 CONFIG_INFINIBAND_IPOIB_CM=y
@@ -311,9 +323,7 @@ CONFIG_DEBUG_KERNEL=y
 # CONFIG_RCU_CPU_STALL_DETECTOR is not set
 CONFIG_LATENCYTOP=y
 CONFIG_SYSCTL_SYSCALL_CHECK=y
-CONFIG_IRQSOFF_TRACER=y
 CONFIG_SCHED_TRACER=y
-CONFIG_STACK_TRACER=y
 CONFIG_BLK_DEV_IO_TRACE=y
 CONFIG_DEBUG_STACKOVERFLOW=y
 CONFIG_DEBUG_STACK_USAGE=y
diff --git a/arch/powerpc/configs/storcenter_defconfig b/arch/powerpc/configs/storcenter_defconfig
index 4f0c10a62b9d..ebb2a66c99d3 100644
--- a/arch/powerpc/configs/storcenter_defconfig
+++ b/arch/powerpc/configs/storcenter_defconfig
@@ -1,7 +1,7 @@
 CONFIG_EXPERIMENTAL=y
 CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_KALLSYMS is not set
 CONFIG_MODULES=y
 CONFIG_MODULE_UNLOAD=y
diff --git a/arch/powerpc/configs/tqm8xx_defconfig b/arch/powerpc/configs/tqm8xx_defconfig
index d0a5b6763880..8616fde0896f 100644
--- a/arch/powerpc/configs/tqm8xx_defconfig
+++ b/arch/powerpc/configs/tqm8xx_defconfig
@@ -5,7 +5,7 @@ CONFIG_SYSVIPC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_SYSFS_DEPRECATED_V2=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_SYSCTL_SYSCALL is not set
 # CONFIG_ELF_CORE is not set
 # CONFIG_BASE_FULL is not set
diff --git a/arch/powerpc/configs/wii_defconfig b/arch/powerpc/configs/wii_defconfig
index bb8ba75b7c68..175295fbf4f3 100644
--- a/arch/powerpc/configs/wii_defconfig
+++ b/arch/powerpc/configs/wii_defconfig
@@ -7,7 +7,7 @@ CONFIG_IKCONFIG_PROC=y
 CONFIG_LOG_BUF_SHIFT=14
 CONFIG_BLK_DEV_INITRD=y
 # CONFIG_CC_OPTIMIZE_FOR_SIZE is not set
-CONFIG_EMBEDDED=y
+CONFIG_EXPERT=y
 # CONFIG_ELF_CORE is not set
 CONFIG_PERF_COUNTERS=y
 # CONFIG_VM_EVENT_COUNTERS is not set
diff --git a/arch/powerpc/include/asm/8xx_immap.h b/arch/powerpc/include/asm/8xx_immap.h
index 4b0e15206006..bdf0563ba423 100644
--- a/arch/powerpc/include/asm/8xx_immap.h
+++ b/arch/powerpc/include/asm/8xx_immap.h
@@ -93,7 +93,7 @@ typedef struct	mem_ctlr {
 } memctl8xx_t;
 /*-----------------------------------------------------------------------
- * BR - Memory Controler: Base Register                                 16-9
+ * BR - Memory Controller: Base Register                                        16-9
 */
 #define BR_BA_MSK       0xffff8000      /* Base Address Mask                    */
 #define BR_AT_MSK       0x00007000      /* Address Type Mask                    */
@@ -110,7 +110,7 @@ typedef struct	mem_ctlr {
 #define BR_V            0x00000001      /* Bank Valid                           */
 /*-----------------------------------------------------------------------
- * OR - Memory Controler: Option Register                               16-11
+ * OR - Memory Controller: Option Register                              16-11
 */
 #define OR_AM_MSK       0xffff8000      /* Address Mask Mask                    */
 #define OR_ATM_MSK      0x00007000      /* Address Type Mask Mask               */
@@ -393,8 +393,8 @@ typedef struct fec {
        uint    fec_addr_low;           /* lower 32 bits of station address     */
        ushort  fec_addr_high;          /* upper 16 bits of station address     */
        ushort  res1;                   /* reserved                             */
-        uint    fec_hash_table_high;    /* upper 32-bits of hash table          */
+        uint    fec_grp_hash_table_high;        /* upper 32-bits of hash table          */
-        uint    fec_hash_table_low;     /* lower 32-bits of hash table          */
+        uint    fec_grp_hash_table_low; /* lower 32-bits of hash table          */
        uint    fec_r_des_start;        /* beginning of Rx descriptor ring      */
        uint    fec_x_des_start;        /* beginning of Tx descriptor ring      */
        uint    fec_r_buff_size;        /* Rx buffer size                       */
diff --git a/arch/powerpc/include/asm/bitops.h b/arch/powerpc/include/asm/bitops.h
index 30964ae2d096..f18c6d9b9510 100644
--- a/arch/powerpc/include/asm/bitops.h
+++ b/arch/powerpc/include/asm/bitops.h
@@ -209,8 +209,8 @@ static __inline__ unsigned long ffz(unsigned long x)
                return BITS_PER_LONG;
        /*
-         * Calculate the bit position of the least signficant '1' bit in x
+         * Calculate the bit position of the least significant '1' bit in x
-         * (since x has been changed this will actually be the least signficant
+         * (since x has been changed this will actually be the least significant
         * '0' bit in * the original x).  Note: (x & -x) gives us a mask that
         * is the least significant * (RIGHT-most) 1-bit of the value in x.
         */
@@ -267,73 +267,70 @@ static __inline__ int fls64(__u64 x)
 #include <asm-generic/bitops/fls64.h>
 #endif /* __powerpc64__ */
+#ifdef CONFIG_PPC64
+unsigned int __arch_hweight8(unsigned int w);
+unsigned int __arch_hweight16(unsigned int w);
+unsigned int __arch_hweight32(unsigned int w);
+unsigned long __arch_hweight64(__u64 w);
+#include <asm-generic/bitops/const_hweight.h>
+#else
 #include <asm-generic/bitops/hweight.h>
+#endif
 #include <asm-generic/bitops/find.h>
 /* Little-endian versions */
-static __inline__ int test_le_bit(unsigned long nr,
+static __inline__ int test_bit_le(unsigned long nr,
-                                  __const__ unsigned long *addr)
+                                  __const__ void *addr)
 {
        __const__ unsigned char *tmp = (__const__ unsigned char *) addr;
        return (tmp[nr >> 3] >> (nr & 7)) & 1;
 }
-#define __set_le_bit(nr, addr) \
+static inline void __set_bit_le(int nr, void *addr)
-        __set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+{
-#define __clear_le_bit(nr, addr) \
+        __set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
-        __clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+}
-#define test_and_set_le_bit(nr, addr) \
+static inline void __clear_bit_le(int nr, void *addr)
-        test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+{
-#define test_and_clear_le_bit(nr, addr) \
+        __clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
-        test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+}
-#define __test_and_set_le_bit(nr, addr) \
+static inline int test_and_set_bit_le(int nr, void *addr)
-        __test_and_set_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+{
-#define __test_and_clear_le_bit(nr, addr) \
+        return test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
-        __test_and_clear_bit((nr) ^ BITOP_LE_SWIZZLE, (addr))
+}
-#define find_first_zero_le_bit(addr, size) generic_find_next_zero_le_bit((addr), (size), 0)
+static inline int test_and_clear_bit_le(int nr, void *addr)
-unsigned long generic_find_next_zero_le_bit(const unsigned long *addr,
+{
+        return test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
+}
+static inline int __test_and_set_bit_le(int nr, void *addr)
+{
+        return __test_and_set_bit(nr ^ BITOP_LE_SWIZZLE, addr);
+}
+static inline int __test_and_clear_bit_le(int nr, void *addr)
+{
+        return __test_and_clear_bit(nr ^ BITOP_LE_SWIZZLE, addr);
+}
+#define find_first_zero_bit_le(addr, size) \
+        find_next_zero_bit_le((addr), (size), 0)
+unsigned long find_next_zero_bit_le(const void *addr,
                                    unsigned long size, unsigned long offset);
-unsigned long generic_find_next_le_bit(const unsigned long *addr,
+unsigned long find_next_bit_le(const void *addr,
                                    unsigned long size, unsigned long offset);
 /* Bitmap functions for the ext2 filesystem */
-#define ext2_set_bit(nr,addr) \
-        __test_and_set_le_bit((nr), (unsigned long*)addr)
-#define ext2_clear_bit(nr, addr) \
-        __test_and_clear_le_bit((nr), (unsigned long*)addr)
 #define ext2_set_bit_atomic(lock, nr, addr) \
-        test_and_set_le_bit((nr), (unsigned long*)addr)
+        test_and_set_bit_le((nr), (unsigned long*)addr)
 #define ext2_clear_bit_atomic(lock, nr, addr) \
-        test_and_clear_le_bit((nr), (unsigned long*)addr)
+        test_and_clear_bit_le((nr), (unsigned long*)addr)
-#define ext2_test_bit(nr, addr)      test_le_bit((nr),(unsigned long*)addr)
-#define ext2_find_first_zero_bit(addr, size) \
-        find_first_zero_le_bit((unsigned long*)addr, size)
-#define ext2_find_next_zero_bit(addr, size, off) \
-        generic_find_next_zero_le_bit((unsigned long*)addr, size, off)
-#define ext2_find_next_bit(addr, size, off) \
-        generic_find_next_le_bit((unsigned long *)addr, size, off)
-/* Bitmap functions for the minix filesystem.  */
-#define minix_test_and_set_bit(nr,addr) \
-        __test_and_set_le_bit(nr, (unsigned long *)addr)
-#define minix_set_bit(nr,addr) \
-        __set_le_bit(nr, (unsigned long *)addr)
-#define minix_test_and_clear_bit(nr,addr) \
-        __test_and_clear_le_bit(nr, (unsigned long *)addr)
-#define minix_test_bit(nr,addr) \
-        test_le_bit(nr, (unsigned long *)addr)
-#define minix_find_first_zero_bit(addr,size) \
-        find_first_zero_le_bit((unsigned long *)addr, size)
 #include <asm-generic/bitops/sched.h>
diff --git a/arch/powerpc/include/asm/checksum.h b/arch/powerpc/include/asm/checksum.h
index 7cdf358337cf..ce0c28495f9a 100644
--- a/arch/powerpc/include/asm/checksum.h
+++ b/arch/powerpc/include/asm/checksum.h
@@ -52,12 +52,22 @@ extern __wsum csum_partial(const void *buff, int len, __wsum sum);
 extern __wsum csum_partial_copy_generic(const void *src, void *dst,
                                              int len, __wsum sum,
                                              int *src_err, int *dst_err);
+#ifdef __powerpc64__
+#define _HAVE_ARCH_COPY_AND_CSUM_FROM_USER
+extern __wsum csum_and_copy_from_user(const void __user *src, void *dst,
+                                      int len, __wsum sum, int *err_ptr);
+#define HAVE_CSUM_COPY_USER
+extern __wsum csum_and_copy_to_user(const void *src, void __user *dst,
+                                    int len, __wsum sum, int *err_ptr);
+#else
 /*
 * the same as csum_partial, but copies from src to dst while it
 * checksums.
 */
 #define csum_partial_copy_from_user(src, dst, len, sum, errp)   \
        csum_partial_copy_generic((__force const void *)(src), (dst), (len), (sum), (errp), NULL)
+#endif
 #define csum_partial_copy_nocheck(src, dst, len, sum)   \
        csum_partial_copy_generic((src), (dst), (len), (sum), NULL, NULL)
diff --git a/arch/powerpc/include/asm/compat.h b/arch/powerpc/include/asm/compat.h
index a11d4eac4f97..91010e8f8479 100644
--- a/arch/powerpc/include/asm/compat.h
+++ b/arch/powerpc/include/asm/compat.h
@@ -140,10 +140,10 @@ static inline void __user *arch_compat_alloc_user_space(long len)
        unsigned long usp = regs->gpr[1];
        /*
-         * We cant access below the stack pointer in the 32bit ABI and
+         * We can't access below the stack pointer in the 32bit ABI and
         * can access 288 bytes in the 64bit ABI
         */
-        if (!(test_thread_flag(TIF_32BIT)))
+        if (!is_32bit_task())
                usp -= 288;
        return (void __user *) (usp - len);
@@ -213,7 +213,7 @@ struct compat_shmid64_ds {
 static inline int is_compat_task(void)
 {
-        return test_thread_flag(TIF_32BIT);
+        return is_32bit_task();
 }
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/cpm.h b/arch/powerpc/include/asm/cpm.h
index e50323fe941f..4398a6cdcf53 100644
--- a/arch/powerpc/include/asm/cpm.h
+++ b/arch/powerpc/include/asm/cpm.h
@@ -98,7 +98,7 @@ typedef struct cpm_buf_desc {
 #define BD_SC_INTRPT    (0x1000)        /* Interrupt on change */
 #define BD_SC_LAST      (0x0800)        /* Last buffer in frame */
 #define BD_SC_TC        (0x0400)        /* Transmit CRC */
-#define BD_SC_CM        (0x0200)        /* Continous mode */
+#define BD_SC_CM        (0x0200)        /* Continuous mode */
 #define BD_SC_ID        (0x0100)        /* Rec'd too many idles */
 #define BD_SC_P         (0x0100)        /* xmt preamble */
 #define BD_SC_BR        (0x0020)        /* Break received */
diff --git a/arch/powerpc/include/asm/cpm1.h b/arch/powerpc/include/asm/cpm1.h
index bd07650dca56..8ee4211ca0c6 100644
--- a/arch/powerpc/include/asm/cpm1.h
+++ b/arch/powerpc/include/asm/cpm1.h
@@ -4,7 +4,7 @@
 *
 * This file contains structures and information for the communication
 * processor channels.  Some CPM control and status is available
- * throught the MPC8xx internal memory map.  See immap.h for details.
+ * through the MPC8xx internal memory map.  See immap.h for details.
 * This file only contains what I need for the moment, not the total
 * CPM capabilities.  I (or someone else) will add definitions as they
 * are needed.  -- Dan
diff --git a/arch/powerpc/include/asm/cputable.h b/arch/powerpc/include/asm/cputable.h
index 3a40a992e594..c0d842cfd012 100644
--- a/arch/powerpc/include/asm/cputable.h
+++ b/arch/powerpc/include/asm/cputable.h
@@ -154,8 +154,10 @@ extern const char *powerpc_base_platform;
 #define CPU_FTR_NAP_DISABLE_L2_PR       ASM_CONST(0x0000000000002000)
 #define CPU_FTR_DUAL_PLL_750FX          ASM_CONST(0x0000000000004000)
 #define CPU_FTR_NO_DPM                  ASM_CONST(0x0000000000008000)
+#define CPU_FTR_476_DD2                 ASM_CONST(0x0000000000010000)
 #define CPU_FTR_NEED_COHERENT           ASM_CONST(0x0000000000020000)
 #define CPU_FTR_NO_BTIC                 ASM_CONST(0x0000000000040000)
+#define CPU_FTR_DEBUG_LVL_EXC           ASM_CONST(0x0000000000080000)
 #define CPU_FTR_NODSISRALIGN            ASM_CONST(0x0000000000100000)
 #define CPU_FTR_PPC_LE                  ASM_CONST(0x0000000000200000)
 #define CPU_FTR_REAL_LE                 ASM_CONST(0x0000000000400000)
@@ -177,33 +179,34 @@ extern const char *powerpc_base_platform;
 #define LONG_ASM_CONST(x)               0
 #endif
-#define CPU_FTR_SLB                     LONG_ASM_CONST(0x0000000100000000)
-#define CPU_FTR_16M_PAGE                LONG_ASM_CONST(0x0000000200000000)
+#define CPU_FTR_HVMODE_206              LONG_ASM_CONST(0x0000000800000000)
-#define CPU_FTR_TLBIEL                  LONG_ASM_CONST(0x0000000400000000)
+#define CPU_FTR_CFAR                    LONG_ASM_CONST(0x0000001000000000)
 #define CPU_FTR_IABR                    LONG_ASM_CONST(0x0000002000000000)
 #define CPU_FTR_MMCRA                   LONG_ASM_CONST(0x0000004000000000)
 #define CPU_FTR_CTRL                    LONG_ASM_CONST(0x0000008000000000)
 #define CPU_FTR_SMT                     LONG_ASM_CONST(0x0000010000000000)
-#define CPU_FTR_LOCKLESS_TLBIE          LONG_ASM_CONST(0x0000040000000000)
-#define CPU_FTR_CI_LARGE_PAGE           LONG_ASM_CONST(0x0000100000000000)
 #define CPU_FTR_PAUSE_ZERO              LONG_ASM_CONST(0x0000200000000000)
 #define CPU_FTR_PURR                    LONG_ASM_CONST(0x0000400000000000)
 #define CPU_FTR_CELL_TB_BUG             LONG_ASM_CONST(0x0000800000000000)
 #define CPU_FTR_SPURR                   LONG_ASM_CONST(0x0001000000000000)
 #define CPU_FTR_DSCR                    LONG_ASM_CONST(0x0002000000000000)
-#define CPU_FTR_1T_SEGMENT              LONG_ASM_CONST(0x0004000000000000)
-#define CPU_FTR_NO_SLBIE_B              LONG_ASM_CONST(0x0008000000000000)
 #define CPU_FTR_VSX                     LONG_ASM_CONST(0x0010000000000000)
 #define CPU_FTR_SAO                     LONG_ASM_CONST(0x0020000000000000)
 #define CPU_FTR_CP_USE_DCBTZ            LONG_ASM_CONST(0x0040000000000000)
 #define CPU_FTR_UNALIGNED_LD_STD        LONG_ASM_CONST(0x0080000000000000)
 #define CPU_FTR_ASYM_SMT                LONG_ASM_CONST(0x0100000000000000)
+#define CPU_FTR_STCX_CHECKS_ADDRESS     LONG_ASM_CONST(0x0200000000000000)
+#define CPU_FTR_POPCNTB                 LONG_ASM_CONST(0x0400000000000000)
+#define CPU_FTR_POPCNTD                 LONG_ASM_CONST(0x0800000000000000)
+#define CPU_FTR_ICSWX                   LONG_ASM_CONST(0x1000000000000000)
 #ifndef __ASSEMBLY__
-#define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_SLB | \
+#define CPU_FTR_PPCAS_ARCH_V2   (CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
-                                 CPU_FTR_TLBIEL | CPU_FTR_NOEXECUTE | \
-                                 CPU_FTR_NODSISRALIGN | CPU_FTR_16M_PAGE)
+#define MMU_FTR_PPCAS_ARCH_V2   (MMU_FTR_SLB | MMU_FTR_TLBIEL | \
+                                 MMU_FTR_16M_PAGE)
 /* We only set the altivec features if the kernel was compiled with altivec
 * support
@@ -378,10 +381,13 @@ extern const char *powerpc_base_platform;
 #define CPU_FTRS_E500_2 (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
            CPU_FTR_SPE_COMP | CPU_FTR_MAYBE_CAN_NAP | \
            CPU_FTR_NODSISRALIGN | CPU_FTR_NOEXECUTE)
-#define CPU_FTRS_E500MC (CPU_FTR_MAYBE_CAN_DOZE | CPU_FTR_USE_TB | \
+#define CPU_FTRS_E500MC (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
-            CPU_FTR_MAYBE_CAN_NAP | CPU_FTR_NODSISRALIGN | \
            CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
            CPU_FTR_DBELL)
+#define CPU_FTRS_E5500  (CPU_FTR_USE_TB | CPU_FTR_NODSISRALIGN | \
+            CPU_FTR_L2CSR | CPU_FTR_LWSYNC | CPU_FTR_NOEXECUTE | \
+            CPU_FTR_DBELL | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
+            CPU_FTR_DEBUG_LVL_EXC)
 #define CPU_FTRS_GENERIC_32     (CPU_FTR_COMMON | CPU_FTR_NODSISRALIGN)
 /* 64-bit CPUs */
@@ -392,46 +398,55 @@ extern const char *powerpc_base_platform;
            CPU_FTR_MMCRA | CPU_FTR_CTRL)
 #define CPU_FTRS_POWER4 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
-            CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ)
+            CPU_FTR_MMCRA | CPU_FTR_CP_USE_DCBTZ | \
+            CPU_FTR_STCX_CHECKS_ADDRESS)
 #define CPU_FTRS_PPC970 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_ALTIVEC_COMP | CPU_FTR_CAN_NAP | CPU_FTR_MMCRA | \
-            CPU_FTR_CP_USE_DCBTZ)
+            CPU_FTR_CP_USE_DCBTZ | CPU_FTR_STCX_CHECKS_ADDRESS)
 #define CPU_FTRS_POWER5 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_MMCRA | CPU_FTR_SMT | \
-            CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
+            CPU_FTR_COHERENT_ICACHE | CPU_FTR_PURR | \
-            CPU_FTR_PURR)
+            CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB)
 #define CPU_FTRS_POWER6 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_MMCRA | CPU_FTR_SMT | \
-            CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
+            CPU_FTR_COHERENT_ICACHE | \
            CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
-            CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD)
+            CPU_FTR_DSCR | CPU_FTR_UNALIGNED_LD_STD | \
+            CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_CFAR)
 #define CPU_FTRS_POWER7 (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | CPU_FTR_HVMODE_206 |\
            CPU_FTR_MMCRA | CPU_FTR_SMT | \
-            CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE | \
+            CPU_FTR_COHERENT_ICACHE | \
            CPU_FTR_PURR | CPU_FTR_SPURR | CPU_FTR_REAL_LE | \
-            CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT)
+            CPU_FTR_DSCR | CPU_FTR_SAO  | CPU_FTR_ASYM_SMT | \
+            CPU_FTR_STCX_CHECKS_ADDRESS | CPU_FTR_POPCNTB | CPU_FTR_POPCNTD | \
+            CPU_FTR_ICSWX | CPU_FTR_CFAR)
 #define CPU_FTRS_CELL   (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_CTRL | \
            CPU_FTR_ALTIVEC_COMP | CPU_FTR_MMCRA | CPU_FTR_SMT | \
-            CPU_FTR_PAUSE_ZERO | CPU_FTR_CI_LARGE_PAGE | \
+            CPU_FTR_PAUSE_ZERO  | CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
-            CPU_FTR_CELL_TB_BUG | CPU_FTR_CP_USE_DCBTZ | \
            CPU_FTR_UNALIGNED_LD_STD)
 #define CPU_FTRS_PA6T (CPU_FTR_USE_TB | CPU_FTR_LWSYNC | \
-            CPU_FTR_PPCAS_ARCH_V2 | \
+            CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP | \
-            CPU_FTR_ALTIVEC_COMP | CPU_FTR_CI_LARGE_PAGE | \
+            CPU_FTR_PURR | CPU_FTR_REAL_LE)
-            CPU_FTR_PURR | CPU_FTR_REAL_LE | CPU_FTR_NO_SLBIE_B)
 #define CPU_FTRS_COMPATIBLE     (CPU_FTR_USE_TB | CPU_FTR_PPCAS_ARCH_V2)
+#define CPU_FTRS_A2 (CPU_FTR_USE_TB | CPU_FTR_SMT | CPU_FTR_DBELL | \
+                     CPU_FTR_NOEXECUTE | CPU_FTR_NODSISRALIGN)
 #ifdef __powerpc64__
+#ifdef CONFIG_PPC_BOOK3E
+#define CPU_FTRS_POSSIBLE       (CPU_FTRS_E5500 | CPU_FTRS_A2)
+#else
 #define CPU_FTRS_POSSIBLE       \
            (CPU_FTRS_POWER3 | CPU_FTRS_RS64 | CPU_FTRS_POWER4 |        \
            CPU_FTRS_PPC970 | CPU_FTRS_POWER5 | CPU_FTRS_POWER6 |       \
            CPU_FTRS_POWER7 | CPU_FTRS_CELL | CPU_FTRS_PA6T |           \
-            CPU_FTR_1T_SEGMENT | CPU_FTR_VSX)
+            CPU_FTR_VSX)
+#endif
 #else
 enum {
        CPU_FTRS_POSSIBLE =
@@ -458,23 +473,28 @@ enum {
            CPU_FTRS_44X | CPU_FTRS_440x6 |
 #endif
 #ifdef CONFIG_PPC_47x
-            CPU_FTRS_47X |
+            CPU_FTRS_47X | CPU_FTR_476_DD2 |
 #endif
 #ifdef CONFIG_E200
            CPU_FTRS_E200 |
 #endif
 #ifdef CONFIG_E500
            CPU_FTRS_E500 | CPU_FTRS_E500_2 | CPU_FTRS_E500MC |
+            CPU_FTRS_E5500 |
 #endif
            0,
 };
 #endif /* __powerpc64__ */
 #ifdef __powerpc64__
+#ifdef CONFIG_PPC_BOOK3E
+#define CPU_FTRS_ALWAYS         (CPU_FTRS_E5500 & CPU_FTRS_A2)
+#else
 #define CPU_FTRS_ALWAYS         \
            (CPU_FTRS_POWER3 & CPU_FTRS_RS64 & CPU_FTRS_POWER4 &        \
            CPU_FTRS_PPC970 & CPU_FTRS_POWER5 & CPU_FTRS_POWER6 &       \
            CPU_FTRS_POWER7 & CPU_FTRS_CELL & CPU_FTRS_PA6T & CPU_FTRS_POSSIBLE)
+#endif
 #else
 enum {
        CPU_FTRS_ALWAYS =
@@ -505,6 +525,7 @@ enum {
 #endif
 #ifdef CONFIG_E500
            CPU_FTRS_E500 & CPU_FTRS_E500_2 & CPU_FTRS_E500MC &
+            CPU_FTRS_E5500 &
 #endif
            CPU_FTRS_POSSIBLE,
 };
diff --git a/arch/powerpc/include/asm/cputhreads.h b/arch/powerpc/include/asm/cputhreads.h
index a8e18447c62b..ce516e5eb0d3 100644
--- a/arch/powerpc/include/asm/cputhreads.h
+++ b/arch/powerpc/include/asm/cputhreads.h
@@ -37,16 +37,16 @@ extern cpumask_t threads_core_mask;
 * This can typically be used for things like IPI for tlb invalidations
 * since those need to be done only once per core/TLB
 */
-static inline cpumask_t cpu_thread_mask_to_cores(cpumask_t threads)
+static inline cpumask_t cpu_thread_mask_to_cores(const struct cpumask *threads)
 {
        cpumask_t       tmp, res;
        int             i;
-        res = CPU_MASK_NONE;
+        cpumask_clear(&res);
        for (i = 0; i < NR_CPUS; i += threads_per_core) {
-                cpus_shift_left(tmp, threads_core_mask, i);
+                cpumask_shift_left(&tmp, &threads_core_mask, i);
-                if (cpus_intersects(threads, tmp))
+                if (cpumask_intersects(threads, &tmp))
-                        cpu_set(i, res);
+                        cpumask_set_cpu(i, &res);
        }
        return res;
 }
@@ -58,25 +58,28 @@ static inline int cpu_nr_cores(void)
 static inline cpumask_t cpu_online_cores_map(void)
 {
-        return cpu_thread_mask_to_cores(cpu_online_map);
+        return cpu_thread_mask_to_cores(cpu_online_mask);
 }
-static inline int cpu_thread_to_core(int cpu)
+#ifdef CONFIG_SMP
-{
+int cpu_core_index_of_thread(int cpu);
-        return cpu >> threads_shift;
+int cpu_first_thread_of_core(int core);
-}
+#else
+static inline int cpu_core_index_of_thread(int cpu) { return cpu; }
+static inline int cpu_first_thread_of_core(int core) { return core; }
+#endif
 static inline int cpu_thread_in_core(int cpu)
 {
        return cpu & (threads_per_core - 1);
 }
-static inline int cpu_first_thread_in_core(int cpu)
+static inline int cpu_first_thread_sibling(int cpu)
 {
        return cpu & ~(threads_per_core - 1);
 }
-static inline int cpu_last_thread_in_core(int cpu)
+static inline int cpu_last_thread_sibling(int cpu)
 {
        return cpu | (threads_per_core - 1);
 }
diff --git a/arch/powerpc/include/asm/cputime.h b/arch/powerpc/include/asm/cputime.h
index 8bdc6a9e5773..1cf20bdfbeca 100644
--- a/arch/powerpc/include/asm/cputime.h
+++ b/arch/powerpc/include/asm/cputime.h
@@ -124,23 +124,23 @@ static inline u64 cputime64_to_jiffies64(const cputime_t ct)
 }
 /*
- * Convert cputime <-> milliseconds
+ * Convert cputime <-> microseconds
 */
 extern u64 __cputime_msec_factor;
-static inline unsigned long cputime_to_msecs(const cputime_t ct)
+static inline unsigned long cputime_to_usecs(const cputime_t ct)
 {
-        return mulhdu(ct, __cputime_msec_factor);
+        return mulhdu(ct, __cputime_msec_factor) * USEC_PER_MSEC;
 }
-static inline cputime_t msecs_to_cputime(const unsigned long ms)
+static inline cputime_t usecs_to_cputime(const unsigned long us)
 {
        cputime_t ct;
        unsigned long sec;
        /* have to be a little careful about overflow */
-        ct = ms % 1000;
+        ct = us % 1000000;
-        sec = ms / 1000;
+        sec = us / 1000000;
        if (ct) {
                ct *= tb_ticks_per_sec;
                do_div(ct, 1000);
diff --git a/arch/powerpc/include/asm/dbell.h b/arch/powerpc/include/asm/dbell.h
index 0893ab9343a6..9c70d0ca96d4 100644
--- a/arch/powerpc/include/asm/dbell.h
+++ b/arch/powerpc/include/asm/dbell.h
@@ -27,9 +27,8 @@ enum ppc_dbell {
        PPC_G_DBELL_MC = 4,     /* guest mcheck doorbell */
 };
-extern void doorbell_message_pass(int target, int msg);
+extern void doorbell_cause_ipi(int cpu, unsigned long data);
 extern void doorbell_exception(struct pt_regs *regs);
-extern void doorbell_check_self(void);
 extern void doorbell_setup_this_cpu(void);
 static inline void ppc_msgsnd(enum ppc_dbell type, u32 flags, u32 tag)
diff --git a/arch/powerpc/include/asm/device.h b/arch/powerpc/include/asm/device.h
index a3954e4fcbe2..16d25c0974be 100644
--- a/arch/powerpc/include/asm/device.h
+++ b/arch/powerpc/include/asm/device.h
@@ -9,6 +9,12 @@
 struct dma_map_ops;
 struct device_node;
+/*
+ * Arch extensions to struct device.
+ *
+ * When adding fields, consider macio_add_one_device in
+ * drivers/macintosh/macio_asic.c
+ */
 struct dev_archdata {
        /* DMA operations on that device */
        struct dma_map_ops      *dma_ops;
diff --git a/arch/powerpc/include/asm/dma-mapping.h b/arch/powerpc/include/asm/dma-mapping.h
index 8c9c6ad2004e..dd70fac57ec8 100644
--- a/arch/powerpc/include/asm/dma-mapping.h
+++ b/arch/powerpc/include/asm/dma-mapping.h
@@ -42,6 +42,7 @@ extern void __dma_free_coherent(size_t size, void *vaddr);
 extern void __dma_sync(void *vaddr, size_t size, int direction);
 extern void __dma_sync_page(struct page *page, unsigned long offset,
                                 size_t size, int direction);
+extern unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr);
 #else /* ! CONFIG_NOT_COHERENT_CACHE */
 /*
@@ -127,19 +128,7 @@ static inline int dma_supported(struct device *dev, u64 mask)
        return dma_ops->dma_supported(dev, mask);
 }
-static inline int dma_set_mask(struct device *dev, u64 dma_mask)
+extern int dma_set_mask(struct device *dev, u64 dma_mask);
-{
-        struct dma_map_ops *dma_ops = get_dma_ops(dev);
-        if (unlikely(dma_ops == NULL))
-                return -EIO;
-        if (dma_ops->set_dma_mask != NULL)
-                return dma_ops->set_dma_mask(dev, dma_mask);
-        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
-                return -EIO;
-        *dev->dma_mask = dma_mask;
-        return 0;
-}
 static inline void *dma_alloc_coherent(struct device *dev, size_t size,
                                       dma_addr_t *dma_handle, gfp_t flag)
@@ -210,6 +199,11 @@ static inline phys_addr_t dma_to_phys(struct device *dev, dma_addr_t daddr)
 #define dma_alloc_noncoherent(d, s, h, f) dma_alloc_coherent(d, s, h, f)
 #define dma_free_noncoherent(d, s, v, h) dma_free_coherent(d, s, v, h)
+extern int dma_mmap_coherent(struct device *, struct vm_area_struct *,
+                             void *, dma_addr_t, size_t);
+#define ARCH_HAS_DMA_MMAP_COHERENT
 static inline void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
                enum dma_data_direction direction)
 {
diff --git a/arch/powerpc/include/asm/elf.h b/arch/powerpc/include/asm/elf.h
index c376eda15313..2b917c69ed15 100644
--- a/arch/powerpc/include/asm/elf.h
+++ b/arch/powerpc/include/asm/elf.h
@@ -250,7 +250,7 @@ do {								\
 * the 64bit ABI has never had these issues dont enable the workaround
 * even if we have an executable stack.
 */
-# define elf_read_implies_exec(ex, exec_stk) (test_thread_flag(TIF_32BIT) ? \
+# define elf_read_implies_exec(ex, exec_stk) (is_32bit_task() ? \
                (exec_stk == EXSTACK_DEFAULT) : 0)
 #else 
 # define SET_PERSONALITY(ex) \
diff --git a/arch/powerpc/include/asm/emulated_ops.h b/arch/powerpc/include/asm/emulated_ops.h
index f0fb4fc1f6e6..45921672b97a 100644
--- a/arch/powerpc/include/asm/emulated_ops.h
+++ b/arch/powerpc/include/asm/emulated_ops.h
@@ -52,6 +52,10 @@ extern struct ppc_emulated {
 #ifdef CONFIG_VSX
        struct ppc_emulated_entry vsx;
 #endif
+#ifdef CONFIG_PPC64
+        struct ppc_emulated_entry mfdscr;
+        struct ppc_emulated_entry mtdscr;
+#endif
 } ppc_emulated;
 extern u32 ppc_warn_emulated;
diff --git a/arch/powerpc/include/asm/exception-64s.h b/arch/powerpc/include/asm/exception-64s.h
index 57c400071995..f5dfe3411f64 100644
--- a/arch/powerpc/include/asm/exception-64s.h
+++ b/arch/powerpc/include/asm/exception-64s.h
@@ -46,6 +46,7 @@
 #define EX_CCR          60
 #define EX_R3           64
 #define EX_LR           72
+#define EX_CFAR         80
 /*
 * We're short on space and time in the exception prolog, so we can't
@@ -56,30 +57,40 @@
 #define LOAD_HANDLER(reg, label)                                        \
        addi    reg,reg,(label)-_stext; /* virt addr of handler ... */
-#define EXCEPTION_PROLOG_1(area)                                \
+/* Exception register prefixes */
-        mfspr   r13,SPRN_SPRG_PACA;     /* get paca address into r13 */ \
+#define EXC_HV  H
+#define EXC_STD
+#define EXCEPTION_PROLOG_1(area)                                        \
+        GET_PACA(r13);                                                  \
        std     r9,area+EX_R9(r13);     /* save r9 - r12 */             \
        std     r10,area+EX_R10(r13);                                   \
        std     r11,area+EX_R11(r13);                                   \
        std     r12,area+EX_R12(r13);                                   \
-        mfspr   r9,SPRN_SPRG_SCRATCH0;                                  \
+        BEGIN_FTR_SECTION_NESTED(66);                                   \
+        mfspr   r10,SPRN_CFAR;                                          \
+        std     r10,area+EX_CFAR(r13);                                  \
+        END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);         \
+        GET_SCRATCH0(r9);                                               \
        std     r9,area+EX_R13(r13);                                    \
        mfcr    r9
-#define EXCEPTION_PROLOG_PSERIES_1(label)                               \
+#define __EXCEPTION_PROLOG_PSERIES_1(label, h)                          \
        ld      r12,PACAKBASE(r13);     /* get high part of &label */   \
        ld      r10,PACAKMSR(r13);      /* get MSR value for kernel */  \
-        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
        LOAD_HANDLER(r12,label)                                         \
-        mtspr   SPRN_SRR0,r12;                                          \
+        mtspr   SPRN_##h##SRR0,r12;                                     \
-        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mfspr   r12,SPRN_##h##SRR1;     /* and SRR1 */                  \
-        mtspr   SPRN_SRR1,r10;                                          \
+        mtspr   SPRN_##h##SRR1,r10;                                     \
-        rfid;                                                           \
+        h##rfid;                                                        \
        b       .       /* prevent speculative execution */
+#define EXCEPTION_PROLOG_PSERIES_1(label, h) \
+        __EXCEPTION_PROLOG_PSERIES_1(label, h)
-#define EXCEPTION_PROLOG_PSERIES(area, label)                           \
+#define EXCEPTION_PROLOG_PSERIES(area, label, h)                        \
        EXCEPTION_PROLOG_1(area);                                       \
-        EXCEPTION_PROLOG_PSERIES_1(label);
+        EXCEPTION_PROLOG_PSERIES_1(label, h);
 /*
 * The common exception prolog is used for all except a few exceptions
@@ -98,10 +109,11 @@
        beq-    1f;                                                        \
        ld      r1,PACAKSAVE(r13);      /* kernel stack to use          */ \
 1:      cmpdi   cr1,r1,0;               /* check if r1 is in userspace  */ \
-        bge-    cr1,2f;                 /* abort if it is               */ \
+        blt+    cr1,3f;                 /* abort if it is               */ \
-        b       3f;                                                        \
+        li      r1,(n);                 /* will be reloaded later       */ \
-2:      li      r1,(n);                 /* will be reloaded later       */ \
        sth     r1,PACA_TRAP_SAVE(r13);                                    \
+        std     r3,area+EX_R3(r13);                                        \
+        addi    r3,r13,area;            /* r3 -> where regs are saved*/    \
        b       bad_stack;                                                 \
 3:      std     r9,_CCR(r1);            /* save CR in stackframe        */ \
        std     r11,_NIP(r1);           /* save SRR0 in stackframe      */ \
@@ -123,6 +135,10 @@
        std     r9,GPR11(r1);                                              \
        std     r10,GPR12(r1);                                             \
        std     r11,GPR13(r1);                                             \
+        BEGIN_FTR_SECTION_NESTED(66);                                      \
+        ld      r10,area+EX_CFAR(r13);                                     \
+        std     r10,ORIG_GPR3(r1);                                         \
+        END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66);            \
        ld      r2,PACATOC(r13);        /* get kernel TOC into r2       */ \
        mflr    r9;                     /* save LR in stackframe        */ \
        std     r9,_LINK(r1);                                              \
@@ -137,62 +153,68 @@
        li      r10,0;                                                     \
        ld      r11,exception_marker@toc(r2);                              \
        std     r10,RESULT(r1);         /* clear regs->result           */ \
-        std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */
+        std     r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame      */ \
+        ACCOUNT_STOLEN_TIME
 /*
 * Exception vectors.
 */
-#define STD_EXCEPTION_PSERIES(n, label)                 \
+#define STD_EXCEPTION_PSERIES(loc, vec, label)          \
-        . = n;                                          \
+        . = loc;                                        \
        .globl label##_pSeries;                         \
 label##_pSeries:                                        \
        HMT_MEDIUM;                                     \
-        DO_KVM  n;                                      \
+        DO_KVM  vec;                                    \
-        mtspr   SPRN_SPRG_SCRATCH0,r13;         /* save r13 */  \
+        SET_SCRATCH0(r13);              /* save r13 */          \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_STD)
-#define HSTD_EXCEPTION_PSERIES(n, label)                \
+#define STD_EXCEPTION_HV(loc, vec, label)               \
-        . = n;                                          \
+        . = loc;                                        \
-        .globl label##_pSeries;                         \
+        .globl label##_hv;                              \
-label##_pSeries:                                        \
+label##_hv:                                             \
        HMT_MEDIUM;                                     \
-        mtspr   SPRN_SPRG_SCRATCH0,r20; /* save r20 */  \
+        DO_KVM  vec;                                    \
-        mfspr   r20,SPRN_HSRR0;         /* copy HSRR0 to SRR0 */ \
+        SET_SCRATCH0(r13);      /* save r13 */          \
-        mtspr   SPRN_SRR0,r20;                          \
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common, EXC_HV)
-        mfspr   r20,SPRN_HSRR1;         /* copy HSRR0 to SRR0 */ \
-        mtspr   SPRN_SRR1,r20;                          \
-        mfspr   r20,SPRN_SPRG_SCRATCH0; /* restore r20 */ \
-        mtspr   SPRN_SPRG_SCRATCH0,r13;         /* save r13 */  \
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label##_common)
+#define __MASKABLE_EXCEPTION_PSERIES(vec, label, h)                     \
-#define MASKABLE_EXCEPTION_PSERIES(n, label)                            \
-        . = n;                                                          \
-        .globl label##_pSeries;                                         \
-label##_pSeries:                                                        \
        HMT_MEDIUM;                                                     \
-        DO_KVM  n;                                                      \
+        DO_KVM  vec;                                                    \
-        mtspr   SPRN_SPRG_SCRATCH0,r13; /* save r13 */                  \
+        SET_SCRATCH0(r13);    /* save r13 */                            \
-        mfspr   r13,SPRN_SPRG_PACA;     /* get paca address into r13 */ \
+        GET_PACA(r13);                                                  \
        std     r9,PACA_EXGEN+EX_R9(r13);       /* save r9, r10 */      \
        std     r10,PACA_EXGEN+EX_R10(r13);                             \
        lbz     r10,PACASOFTIRQEN(r13);                                 \
        mfcr    r9;                                                     \
        cmpwi   r10,0;                                                  \
-        beq     masked_interrupt;                                       \
+        beq     masked_##h##interrupt;                                  \
-        mfspr   r10,SPRN_SPRG_SCRATCH0;                                 \
+        GET_SCRATCH0(r10);                                              \
        std     r10,PACA_EXGEN+EX_R13(r13);                             \
        std     r11,PACA_EXGEN+EX_R11(r13);                             \
        std     r12,PACA_EXGEN+EX_R12(r13);                             \
        ld      r12,PACAKBASE(r13);     /* get high part of &label */   \
        ld      r10,PACAKMSR(r13);      /* get MSR value for kernel */  \
-        mfspr   r11,SPRN_SRR0;          /* save SRR0 */                 \
+        mfspr   r11,SPRN_##h##SRR0;     /* save SRR0 */                 \
        LOAD_HANDLER(r12,label##_common)                                \
-        mtspr   SPRN_SRR0,r12;                                          \
+        mtspr   SPRN_##h##SRR0,r12;                                     \
-        mfspr   r12,SPRN_SRR1;          /* and SRR1 */                  \
+        mfspr   r12,SPRN_##h##SRR1;     /* and SRR1 */                  \
-        mtspr   SPRN_SRR1,r10;                                          \
+        mtspr   SPRN_##h##SRR1,r10;                                     \
-        rfid;                                                           \
+        h##rfid;                                                        \
        b       .       /* prevent speculative execution */
+#define _MASKABLE_EXCEPTION_PSERIES(vec, label, h)                      \
+        __MASKABLE_EXCEPTION_PSERIES(vec, label, h)
+#define MASKABLE_EXCEPTION_PSERIES(loc, vec, label)                     \
+        . = loc;                                                        \
+        .globl label##_pSeries;                                         \
+label##_pSeries:                                                        \
+        _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_STD)
+#define MASKABLE_EXCEPTION_HV(loc, vec, label)                          \
+        . = loc;                                                        \
+        .globl label##_hv;                                              \
+label##_hv:                                                             \
+        _MASKABLE_EXCEPTION_PSERIES(vec, label, EXC_HV)
 #ifdef CONFIG_PPC_ISERIES
 #define DISABLE_INTS                            \
diff --git a/arch/powerpc/include/asm/feature-fixups.h b/arch/powerpc/include/asm/feature-fixups.h
index 96a7d067fbb2..9a67a38bf7b9 100644
--- a/arch/powerpc/include/asm/feature-fixups.h
+++ b/arch/powerpc/include/asm/feature-fixups.h
@@ -37,18 +37,21 @@ label##2:						\
        .align 2;                                       \
 label##3:
-#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect)   \
+#define MAKE_FTR_SECTION_ENTRY(msk, val, label, sect)           \
-label##4:                                               \
+label##4:                                                       \
-        .popsection;                                    \
+        .popsection;                                            \
-        .pushsection sect,"a";                          \
+        .pushsection sect,"a";                                  \
-        .align 3;                                       \
+        .align 3;                                               \
-label##5:                                               \
+label##5:                                                       \
-        FTR_ENTRY_LONG msk;                             \
+        FTR_ENTRY_LONG msk;                                     \
-        FTR_ENTRY_LONG val;                             \
+        FTR_ENTRY_LONG val;                                     \
-        FTR_ENTRY_OFFSET label##1b-label##5b;           \
+        FTR_ENTRY_OFFSET label##1b-label##5b;                   \
-        FTR_ENTRY_OFFSET label##2b-label##5b;           \
+        FTR_ENTRY_OFFSET label##2b-label##5b;                   \
-        FTR_ENTRY_OFFSET label##3b-label##5b;           \
+        FTR_ENTRY_OFFSET label##3b-label##5b;                   \
-        FTR_ENTRY_OFFSET label##4b-label##5b;           \
+        FTR_ENTRY_OFFSET label##4b-label##5b;                   \
+        .ifgt (label##4b- label##3b)-(label##2b- label##1b);    \
+        .error "Feature section else case larger than body";    \
+        .endif;                                                 \
        .popsection;
@@ -143,6 +146,19 @@ label##5:					       	\
 #ifndef __ASSEMBLY__
+#define ASM_FTR_IF(section_if, section_else, msk, val)  \
+        stringify_in_c(BEGIN_FTR_SECTION)                       \
+        section_if "; "                                         \
+        stringify_in_c(FTR_SECTION_ELSE)                        \
+        section_else "; "                                       \
+        stringify_in_c(ALT_FTR_SECTION_END((msk), (val)))
+#define ASM_FTR_IFSET(section_if, section_else, msk)    \
+        ASM_FTR_IF(section_if, section_else, (msk), (msk))
+#define ASM_FTR_IFCLR(section_if, section_else, msk)    \
+        ASM_FTR_IF(section_if, section_else, (msk), 0)
 #define ASM_MMU_FTR_IF(section_if, section_else, msk, val)      \
        stringify_in_c(BEGIN_MMU_FTR_SECTION)                   \
        section_if "; "                                         \
diff --git a/arch/powerpc/include/asm/firmware.h b/arch/powerpc/include/asm/firmware.h
index 20778a405d7a..3a6c586c4e40 100644
--- a/arch/powerpc/include/asm/firmware.h
+++ b/arch/powerpc/include/asm/firmware.h
@@ -46,6 +46,8 @@
 #define FW_FEATURE_PS3_LV1      ASM_CONST(0x0000000000800000)
 #define FW_FEATURE_BEAT         ASM_CONST(0x0000000001000000)
 #define FW_FEATURE_CMO          ASM_CONST(0x0000000002000000)
+#define FW_FEATURE_VPHN         ASM_CONST(0x0000000004000000)
+#define FW_FEATURE_XCMO         ASM_CONST(0x0000000008000000)
 #ifndef __ASSEMBLY__
@@ -59,7 +61,7 @@ enum {
                FW_FEATURE_VIO | FW_FEATURE_RDMA | FW_FEATURE_LLAN |
                FW_FEATURE_BULK_REMOVE | FW_FEATURE_XDABR |
                FW_FEATURE_MULTITCE | FW_FEATURE_SPLPAR | FW_FEATURE_LPAR |
-                FW_FEATURE_CMO,
+                FW_FEATURE_CMO | FW_FEATURE_VPHN | FW_FEATURE_XCMO,
        FW_FEATURE_PSERIES_ALWAYS = 0,
        FW_FEATURE_ISERIES_POSSIBLE = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
        FW_FEATURE_ISERIES_ALWAYS = FW_FEATURE_ISERIES | FW_FEATURE_LPAR,
diff --git a/arch/powerpc/include/asm/fsl_85xx_cache_sram.h b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
new file mode 100644
index 000000000000..2af2bdc37b2e
--- /dev/null
+++ b/arch/powerpc/include/asm/fsl_85xx_cache_sram.h
@@ -0,0 +1,48 @@
+/*
+ * Copyright 2009 Freescale Semiconductor, Inc.
+ *
+ * Cache SRAM handling for QorIQ platform
+ *
+ * Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+ * This file is derived from the original work done
+ * by Sylvain Munaut for the Bestcomm SRAM allocator.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
+#define __ASM_POWERPC_FSL_85XX_CACHE_SRAM_H__
+#include <asm/rheap.h>
+#include <linux/spinlock.h>
+/*
+ * Cache-SRAM
+ */
+struct mpc85xx_cache_sram {
+        phys_addr_t base_phys;
+        void *base_virt;
+        unsigned int size;
+        rh_info_t *rh;
+        spinlock_t lock;
+};
+extern void mpc85xx_cache_sram_free(void *ptr);
+extern void *mpc85xx_cache_sram_alloc(unsigned int size,
+                                  phys_addr_t *phys, unsigned int align);
+#endif /* __AMS_POWERPC_FSL_85XX_CACHE_SRAM_H__ */
diff --git a/arch/powerpc/include/asm/immap_86xx.h b/arch/powerpc/include/asm/fsl_guts.h
index 0f165e59c326..bebd12463ec9 100644
--- a/arch/powerpc/include/asm/immap_86xx.h
+++ b/arch/powerpc/include/asm/fsl_guts.h
@@ -1,5 +1,5 @@
 /**
- * MPC86xx Internal Memory Map
+ * Freecale 85xx and 86xx Global Utilties register set
 *
 * Authors: Jeff Brown
 *          Timur Tabi <timur@freescale.com>
@@ -10,73 +10,112 @@
 * under  the terms of  the GNU General  Public License as published by the
 * Free Software Foundation;  either version 2 of the  License, or (at your
 * option) any later version.
- *
- * This header file defines structures for various 86xx SOC devices that are
- * used by multiple source files.
 */
-#ifndef __ASM_POWERPC_IMMAP_86XX_H__
+#ifndef __ASM_POWERPC_FSL_GUTS_H__
-#define __ASM_POWERPC_IMMAP_86XX_H__
+#define __ASM_POWERPC_FSL_GUTS_H__
 #ifdef __KERNEL__
-/* Global Utility Registers */
+/*
-struct ccsr_guts {
+ * These #ifdefs are safe because it's not possible to build a kernel that
+ * runs on e500 and e600 cores.
+ */
+#if !defined(CONFIG_PPC_85xx) && !defined(CONFIG_PPC_86xx)
+#error Only 85xx and 86xx SOCs are supported
+#endif
+/**
+ * Global Utility Registers.
+ *
+ * Not all registers defined in this structure are available on all chips, so
+ * you are expected to know whether a given register actually exists on your
+ * chip before you access it.
+ *
+ * Also, some registers are similar on different chips but have slightly
+ * different names.  In these cases, one name is chosen to avoid extraneous
+ * #ifdefs.
+ */
+#ifdef CONFIG_PPC_85xx
+struct ccsr_guts_85xx {
+#else
+struct ccsr_guts_86xx {
+#endif
        __be32  porpllsr;       /* 0x.0000 - POR PLL Ratio Status Register */
        __be32  porbmsr;        /* 0x.0004 - POR Boot Mode Status Register */
        __be32  porimpscr;      /* 0x.0008 - POR I/O Impedance Status and Control Register */
        __be32  pordevsr;       /* 0x.000c - POR I/O Device Status Register */
        __be32  pordbgmsr;      /* 0x.0010 - POR Debug Mode Status Register */
-        u8      res1[0x20 - 0x14];
+        __be32  pordevsr2;      /* 0x.0014 - POR device status register 2 */
+        u8      res018[0x20 - 0x18];
        __be32  porcir;         /* 0x.0020 - POR Configuration Information Register */
-        u8      res2[0x30 - 0x24];
+        u8      res024[0x30 - 0x24];
        __be32  gpiocr;         /* 0x.0030 - GPIO Control Register */
-        u8      res3[0x40 - 0x34];
+        u8      res034[0x40 - 0x34];
        __be32  gpoutdr;        /* 0x.0040 - General-Purpose Output Data Register */
-        u8      res4[0x50 - 0x44];
+        u8      res044[0x50 - 0x44];
        __be32  gpindr;         /* 0x.0050 - General-Purpose Input Data Register */
-        u8      res5[0x60 - 0x54];
+        u8      res054[0x60 - 0x54];
        __be32  pmuxcr;         /* 0x.0060 - Alternate Function Signal Multiplex Control */
-        u8      res6[0x70 - 0x64];
+        __be32  pmuxcr2;        /* 0x.0064 - Alternate function signal multiplex control 2 */
+        __be32  dmuxcr;         /* 0x.0068 - DMA Mux Control Register */
+        u8      res06c[0x70 - 0x6c];
        __be32  devdisr;        /* 0x.0070 - Device Disable Control */
        __be32  devdisr2;       /* 0x.0074 - Device Disable Control 2 */
-        u8      res7[0x80 - 0x78];
+        u8      res078[0x7c - 0x78];
+        __be32  pmjcr;          /* 0x.007c - 4 Power Management Jog Control Register */
        __be32  powmgtcsr;      /* 0x.0080 - Power Management Status and Control Register */
-        u8      res8[0x90 - 0x84];
+        __be32  pmrccr;         /* 0x.0084 - Power Management Reset Counter Configuration Register */
+        __be32  pmpdccr;        /* 0x.0088 - Power Management Power Down Counter Configuration Register */
+        __be32  pmcdr;          /* 0x.008c - 4Power management clock disable register */
        __be32  mcpsumr;        /* 0x.0090 - Machine Check Summary Register */
        __be32  rstrscr;        /* 0x.0094 - Reset Request Status and Control Register */
-        u8      res9[0xA0 - 0x98];
+        __be32  ectrstcr;       /* 0x.0098 - Exception reset control register */
+        __be32  autorstsr;      /* 0x.009c - Automatic reset status register */
        __be32  pvr;            /* 0x.00a0 - Processor Version Register */
        __be32  svr;            /* 0x.00a4 - System Version Register */
-        u8      res10[0xB0 - 0xA8];
+        u8      res0a8[0xb0 - 0xa8];
        __be32  rstcr;          /* 0x.00b0 - Reset Control Register */
-        u8      res11[0xC0 - 0xB4];
+        u8      res0b4[0xc0 - 0xb4];
+#ifdef CONFIG_PPC_85xx
+        __be32  iovselsr;       /* 0x.00c0 - I/O voltage select status register */
+#else
        __be32  elbcvselcr;     /* 0x.00c0 - eLBC Voltage Select Ctrl Reg */
-        u8      res12[0x800 - 0xC4];
+#endif
+        u8      res0c4[0x224 - 0xc4];
+        __be32  iodelay1;       /* 0x.0224 - IO delay control register 1 */
+        __be32  iodelay2;       /* 0x.0228 - IO delay control register 2 */
+        u8      res22c[0x800 - 0x22c];
        __be32  clkdvdr;        /* 0x.0800 - Clock Divide Register */
-        u8      res13[0x900 - 0x804];
+        u8      res804[0x900 - 0x804];
        __be32  ircr;           /* 0x.0900 - Infrared Control Register */
-        u8      res14[0x908 - 0x904];
+        u8      res904[0x908 - 0x904];
        __be32  dmacr;          /* 0x.0908 - DMA Control Register */
-        u8      res15[0x914 - 0x90C];
+        u8      res90c[0x914 - 0x90c];
        __be32  elbccr;         /* 0x.0914 - eLBC Control Register */
-        u8      res16[0xB20 - 0x918];
+        u8      res918[0xb20 - 0x918];
        __be32  ddr1clkdr;      /* 0x.0b20 - DDR1 Clock Disable Register */
        __be32  ddr2clkdr;      /* 0x.0b24 - DDR2 Clock Disable Register */
        __be32  ddrclkdr;       /* 0x.0b28 - DDR Clock Disable Register */
-        u8      res17[0xE00 - 0xB2C];
+        u8      resb2c[0xe00 - 0xb2c];
        __be32  clkocr;         /* 0x.0e00 - Clock Out Select Register */
-        u8      res18[0xE10 - 0xE04];
+        u8      rese04[0xe10 - 0xe04];
        __be32  ddrdllcr;       /* 0x.0e10 - DDR DLL Control Register */
-        u8      res19[0xE20 - 0xE14];
+        u8      rese14[0xe20 - 0xe14];
        __be32  lbcdllcr;       /* 0x.0e20 - LBC DLL Control Register */
-        u8      res20[0xF04 - 0xE24];
+        __be32  cpfor;          /* 0x.0e24 - L2 charge pump fuse override register */
+        u8      rese28[0xf04 - 0xe28];
        __be32  srds1cr0;       /* 0x.0f04 - SerDes1 Control Register 0 */
        __be32  srds1cr1;       /* 0x.0f08 - SerDes1 Control Register 0 */
-        u8      res21[0xF40 - 0xF0C];
+        u8      resf0c[0xf2c - 0xf0c];
-        __be32  srds2cr0;       /* 0x.0f40 - SerDes1 Control Register 0 */
+        __be32  itcr;           /* 0x.0f2c - Internal transaction control register */
-        __be32  srds2cr1;       /* 0x.0f44 - SerDes1 Control Register 0 */
+        u8      resf30[0xf40 - 0xf30];
+        __be32  srds2cr0;       /* 0x.0f40 - SerDes2 Control Register 0 */
+        __be32  srds2cr1;       /* 0x.0f44 - SerDes2 Control Register 0 */
 } __attribute__ ((packed));
+#ifdef CONFIG_PPC_86xx
 #define CCSR_GUTS_DMACR_DEV_SSI 0       /* DMA controller/channel set to SSI */
 #define CCSR_GUTS_DMACR_DEV_IR  1       /* DMA controller/channel set to IR */
@@ -93,7 +132,7 @@ struct ccsr_guts {
 * ch: The channel on the DMA controller (0, 1, 2, or 3)
 * device: The device to set as the source (CCSR_GUTS_DMACR_DEV_xx)
 */
-static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
+static inline void guts_set_dmacr(struct ccsr_guts_86xx __iomem *guts,
        unsigned int co, unsigned int ch, unsigned int device)
 {
        unsigned int shift = 16 + (8 * (1 - co) + 2 * (3 - ch));
@@ -129,7 +168,7 @@ static inline void guts_set_dmacr(struct ccsr_guts __iomem *guts,
 * ch: The channel on the DMA controller (0, 1, 2, or 3)
 * value: the new value for the bit (0 or 1)
 */
-static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
+static inline void guts_set_pmuxcr_dma(struct ccsr_guts_86xx __iomem *guts,
        unsigned int co, unsigned int ch, unsigned int value)
 {
        if ((ch == 0) || (ch == 3)) {
@@ -152,5 +191,7 @@ static inline void guts_set_pmuxcr_dma(struct ccsr_guts __iomem *guts,
 #define CCSR_GUTS_CLKDVDR_SSICLK_MASK   0x000000FF
 #define CCSR_GUTS_CLKDVDR_SSICLK(x) ((x) & CCSR_GUTS_CLKDVDR_SSICLK_MASK)
-#endif /* __ASM_POWERPC_IMMAP_86XX_H__ */
+#endif
-#endif /* __KERNEL__ */
+#endif
+#endif
diff --git a/arch/powerpc/include/asm/fsl_lbc.h b/arch/powerpc/include/asm/fsl_lbc.h
index 1b5a21041f9b..8a0b5ece8f76 100644
--- a/arch/powerpc/include/asm/fsl_lbc.h
+++ b/arch/powerpc/include/asm/fsl_lbc.h
@@ -1,9 +1,10 @@
 /* Freescale Local Bus Controller
 *
- * Copyright (c) 2006-2007 Freescale Semiconductor
+ * Copyright © 2006-2007, 2010 Freescale Semiconductor
 *
 * Authors: Nick Spence <nick.spence@freescale.com>,
 *          Scott Wood <scottwood@freescale.com>
+ *          Jack Lan <jack.lan@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
@@ -26,6 +27,8 @@
 #include <linux/compiler.h>
 #include <linux/types.h>
 #include <linux/io.h>
+#include <linux/device.h>
+#include <linux/spinlock.h>
 struct fsl_lbc_bank {
        __be32 br;             /**< Base Register  */
@@ -125,13 +128,23 @@ struct fsl_lbc_regs {
 #define LTESR_ATMW 0x00800000
 #define LTESR_ATMR 0x00400000
 #define LTESR_CS   0x00080000
+#define LTESR_UPM  0x00000002
 #define LTESR_CC   0x00000001
 #define LTESR_NAND_MASK (LTESR_FCT | LTESR_PAR | LTESR_CC)
+#define LTESR_MASK      (LTESR_BM | LTESR_FCT | LTESR_PAR | LTESR_WP \
+                         | LTESR_ATMW | LTESR_ATMR | LTESR_CS | LTESR_UPM \
+                         | LTESR_CC)
+#define LTESR_CLEAR     0xFFFFFFFF
+#define LTECCR_CLEAR    0xFFFFFFFF
+#define LTESR_STATUS    LTESR_MASK
+#define LTEIR_ENABLE    LTESR_MASK
+#define LTEDR_ENABLE    0x00000000
        __be32 ltedr;           /**< Transfer Error Disable Register */
        __be32 lteir;           /**< Transfer Error Interrupt Register */
        __be32 lteatr;          /**< Transfer Error Attributes Register */
        __be32 ltear;           /**< Transfer Error Address Register */
-        u8 res6[0xC];
+        __be32 lteccr;          /**< Transfer Error ECC Register */
+        u8 res6[0x8];
        __be32 lbcr;            /**< Configuration Register */
 #define LBCR_LDIS  0x80000000
 #define LBCR_LDIS_SHIFT    31
@@ -144,6 +157,8 @@ struct fsl_lbc_regs {
 #define LBCR_EPAR_SHIFT    16
 #define LBCR_BMT   0x0000FF00
 #define LBCR_BMT_SHIFT      8
+#define LBCR_BMTPS 0x0000000F
+#define LBCR_BMTPS_SHIFT    0
 #define LBCR_INIT  0x00040000
        __be32 lcrr;            /**< Clock Ratio Register */
 #define LCRR_DBYP    0x80000000
@@ -235,6 +250,7 @@ struct fsl_upm {
        int width;
 };
+extern u32 fsl_lbc_addr(phys_addr_t addr_base);
 extern int fsl_lbc_find(phys_addr_t addr_base);
 extern int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm);
@@ -265,7 +281,23 @@ static inline void fsl_upm_end_pattern(struct fsl_upm *upm)
                cpu_relax();
 }
+/* overview of the fsl lbc controller */
+struct fsl_lbc_ctrl {
+        /* device info */
+        struct device                   *dev;
+        struct fsl_lbc_regs __iomem     *regs;
+        int                             irq;
+        wait_queue_head_t               irq_wait;
+        spinlock_t                      lock;
+        void                            *nand;
+        /* status read from LTESR by irq handler */
+        unsigned int                    irq_status;
+};
 extern int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base,
                               u32 mar);
+extern struct fsl_lbc_ctrl *fsl_lbc_ctrl_dev;
 #endif /* __ASM_FSL_LBC_H */
diff --git a/arch/powerpc/include/asm/fsldma.h b/arch/powerpc/include/asm/fsldma.h
deleted file mode 100644
index debc5ed96d6e..000000000000
--- a/arch/powerpc/include/asm/fsldma.h
+++ /dev/null
@@ -1,137 +0,0 @@
-/*
- * Freescale MPC83XX / MPC85XX DMA Controller
- *
- * Copyright (c) 2009 Ira W. Snyder <iws@ovro.caltech.edu>
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#ifndef __ARCH_POWERPC_ASM_FSLDMA_H__
-#define __ARCH_POWERPC_ASM_FSLDMA_H__
-#include <linux/slab.h>
-#include <linux/dmaengine.h>
-/*
- * Definitions for the Freescale DMA controller's DMA_SLAVE implemention
- *
- * The Freescale DMA_SLAVE implementation was designed to handle many-to-many
- * transfers. An example usage would be an accelerated copy between two
- * scatterlists. Another example use would be an accelerated copy from
- * multiple non-contiguous device buffers into a single scatterlist.
- *
- * A DMA_SLAVE transaction is defined by a struct fsl_dma_slave. This
- * structure contains a list of hardware addresses that should be copied
- * to/from the scatterlist passed into device_prep_slave_sg(). The structure
- * also has some fields to enable hardware-specific features.
- */
-/**
- * struct fsl_dma_hw_addr
- * @entry: linked list entry
- * @address: the hardware address
- * @length: length to transfer
- *
- * Holds a single physical hardware address / length pair for use
- * with the DMAEngine DMA_SLAVE API.
- */
-struct fsl_dma_hw_addr {
-        struct list_head entry;
-        dma_addr_t address;
-        size_t length;
-};
-/**
- * struct fsl_dma_slave
- * @addresses: a linked list of struct fsl_dma_hw_addr structures
- * @request_count: value for DMA request count
- * @src_loop_size: setup and enable constant source-address DMA transfers
- * @dst_loop_size: setup and enable constant destination address DMA transfers
- * @external_start: enable externally started DMA transfers
- * @external_pause: enable externally paused DMA transfers
- *
- * Holds a list of address / length pairs for use with the DMAEngine
- * DMA_SLAVE API implementation for the Freescale DMA controller.
- */
-struct fsl_dma_slave {
-        /* List of hardware address/length pairs */
-        struct list_head addresses;
-        /* Support for extra controller features */
-        unsigned int request_count;
-        unsigned int src_loop_size;
-        unsigned int dst_loop_size;
-        bool external_start;
-        bool external_pause;
-};
-/**
- * fsl_dma_slave_append - add an address/length pair to a struct fsl_dma_slave
- * @slave: the &struct fsl_dma_slave to add to
- * @address: the hardware address to add
- * @length: the length of bytes to transfer from @address
- *
- * Add a hardware address/length pair to a struct fsl_dma_slave. Returns 0 on
- * success, -ERRNO otherwise.
- */
-static inline int fsl_dma_slave_append(struct fsl_dma_slave *slave,
-                                       dma_addr_t address, size_t length)
-{
-        struct fsl_dma_hw_addr *addr;
-        addr = kzalloc(sizeof(*addr), GFP_ATOMIC);
-        if (!addr)
-                return -ENOMEM;
-        INIT_LIST_HEAD(&addr->entry);
-        addr->address = address;
-        addr->length = length;
-        list_add_tail(&addr->entry, &slave->addresses);
-        return 0;
-}
-/**
- * fsl_dma_slave_free - free a struct fsl_dma_slave
- * @slave: the struct fsl_dma_slave to free
- *
- * Free a struct fsl_dma_slave and all associated address/length pairs
- */
-static inline void fsl_dma_slave_free(struct fsl_dma_slave *slave)
-{
-        struct fsl_dma_hw_addr *addr, *tmp;
-        if (slave) {
-                list_for_each_entry_safe(addr, tmp, &slave->addresses, entry) {
-                        list_del(&addr->entry);
-                        kfree(addr);
-                }
-                kfree(slave);
-        }
-}
-/**
- * fsl_dma_slave_alloc - allocate a struct fsl_dma_slave
- * @gfp: the flags to pass to kmalloc when allocating this structure
- *
- * Allocate a struct fsl_dma_slave for use by the DMA_SLAVE API. Returns a new
- * struct fsl_dma_slave on success, or NULL on failure.
- */
-static inline struct fsl_dma_slave *fsl_dma_slave_alloc(gfp_t gfp)
-{
-        struct fsl_dma_slave *slave;
-        slave = kzalloc(sizeof(*slave), gfp);
-        if (!slave)
-                return NULL;
-        INIT_LIST_HEAD(&slave->addresses);
-        return slave;
-}
-#endif /* __ARCH_POWERPC_ASM_FSLDMA_H__ */
diff --git a/arch/powerpc/include/asm/ftrace.h b/arch/powerpc/include/asm/ftrace.h
index dde1296b8b41..169d039ed402 100644
--- a/arch/powerpc/include/asm/ftrace.h
+++ b/arch/powerpc/include/asm/ftrace.h
@@ -60,4 +60,18 @@ struct dyn_arch_ftrace {
 #endif
+#if defined(CONFIG_FTRACE_SYSCALLS) && defined(CONFIG_PPC64) && !defined(__ASSEMBLY__)
+#define ARCH_HAS_SYSCALL_MATCH_SYM_NAME
+static inline bool arch_syscall_match_sym_name(const char *sym, const char *name)
+{
+        /*
+         * Compare the symbol name with the system call name. Skip the .sys or .SyS
+         * prefix from the symbol name and the sys prefix from the system call name and
+         * just match the rest. This is only needed on ppc64 since symbol names on
+         * 32bit do not start with a period so the generic function will work.
+         */
+        return !strcmp(sym + 4, name + 3);
+}
+#endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 && !__ASSEMBLY__ */
 #endif /* _ASM_POWERPC_FTRACE */
diff --git a/arch/powerpc/include/asm/futex.h b/arch/powerpc/include/asm/futex.h
index 7c589ef81fb0..c94e4a3fe2ef 100644
--- a/arch/powerpc/include/asm/futex.h
+++ b/arch/powerpc/include/asm/futex.h
@@ -30,7 +30,7 @@
        : "b" (uaddr), "i" (-EFAULT), "r" (oparg) \
        : "cr0", "memory")
-static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
+static inline int futex_atomic_op_inuser (int encoded_op, u32 __user *uaddr)
 {
        int op = (encoded_op >> 28) & 7;
        int cmp = (encoded_op >> 24) & 15;
@@ -40,7 +40,7 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
        if (encoded_op & (FUTEX_OP_OPARG_SHIFT << 28))
                oparg = 1 << oparg;
-        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(int)))
+        if (! access_ok (VERIFY_WRITE, uaddr, sizeof(u32)))
                return -EFAULT;
        pagefault_disable();
@@ -82,35 +82,38 @@ static inline int futex_atomic_op_inuser (int encoded_op, int __user *uaddr)
 }
 static inline int
-futex_atomic_cmpxchg_inatomic(int __user *uaddr, int oldval, int newval)
+futex_atomic_cmpxchg_inatomic(u32 *uval, u32 __user *uaddr,
+                              u32 oldval, u32 newval)
 {
-        int prev;
+        int ret = 0;
+        u32 prev;
-        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(int)))
+        if (!access_ok(VERIFY_WRITE, uaddr, sizeof(u32)))
                return -EFAULT;
        __asm__ __volatile__ (
        PPC_RELEASE_BARRIER
-"1:     lwarx   %0,0,%2         # futex_atomic_cmpxchg_inatomic\n\
+"1:     lwarx   %1,0,%3         # futex_atomic_cmpxchg_inatomic\n\
-        cmpw    0,%0,%3\n\
+        cmpw    0,%1,%4\n\
        bne-    3f\n"
-        PPC405_ERR77(0,%2)
+        PPC405_ERR77(0,%3)
-"2:     stwcx.  %4,0,%2\n\
+"2:     stwcx.  %5,0,%3\n\
        bne-    1b\n"
        PPC_ACQUIRE_BARRIER
 "3:     .section .fixup,\"ax\"\n\
-4:      li      %0,%5\n\
+4:      li      %0,%6\n\
        b       3b\n\
        .previous\n\
        .section __ex_table,\"a\"\n\
        .align 3\n\
        " PPC_LONG "1b,4b,2b,4b\n\
        .previous" \
-        : "=&r" (prev), "+m" (*uaddr)
+        : "+r" (ret), "=&r" (prev), "+m" (*uaddr)
        : "r" (uaddr), "r" (oldval), "r" (newval), "i" (-EFAULT)
        : "cc", "memory");
-        return prev;
+        *uval = prev;
+        return ret;
 }
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/highmem.h b/arch/powerpc/include/asm/highmem.h
index d10d64a4be38..dbc264010d0b 100644
--- a/arch/powerpc/include/asm/highmem.h
+++ b/arch/powerpc/include/asm/highmem.h
@@ -60,9 +60,8 @@ extern pte_t *pkmap_page_table;
 extern void *kmap_high(struct page *page);
 extern void kunmap_high(struct page *page);
-extern void *kmap_atomic_prot(struct page *page, enum km_type type,
+extern void *kmap_atomic_prot(struct page *page, pgprot_t prot);
-                              pgprot_t prot);
+extern void __kunmap_atomic(void *kvaddr);
-extern void kunmap_atomic_notypecheck(void *kvaddr, enum km_type type);
 static inline void *kmap(struct page *page)
 {
@@ -80,9 +79,9 @@ static inline void kunmap(struct page *page)
        kunmap_high(page);
 }
-static inline void *kmap_atomic(struct page *page, enum km_type type)
+static inline void *__kmap_atomic(struct page *page)
 {
-        return kmap_atomic_prot(page, type, kmap_prot);
+        return kmap_atomic_prot(page, kmap_prot);
 }
 static inline struct page *kmap_atomic_to_page(void *ptr)
diff --git a/arch/powerpc/include/asm/hvcall.h b/arch/powerpc/include/asm/hvcall.h
index de03ca58db5d..fd8201dddd4b 100644
--- a/arch/powerpc/include/asm/hvcall.h
+++ b/arch/powerpc/include/asm/hvcall.h
@@ -102,6 +102,7 @@
 #define H_ANDCOND               (1UL<<(63-33))
 #define H_ICACHE_INVALIDATE     (1UL<<(63-40))  /* icbi, etc.  (ignored for IO pages) */
 #define H_ICACHE_SYNCHRONIZE    (1UL<<(63-41))  /* dcbst, icbi, etc (ignored for IO pages */
+#define H_COALESCE_CAND (1UL<<(63-42))  /* page is a good candidate for coalescing */
 #define H_ZERO_PAGE             (1UL<<(63-48))  /* zero the page before mapping (ignored for IO pages) */
 #define H_COPY_PAGE             (1UL<<(63-49))
 #define H_N                     (1UL<<(63-61))
@@ -122,7 +123,7 @@
 #define H_DABRX_KERNEL          (1UL<<(63-62))
 #define H_DABRX_USER            (1UL<<(63-63))
-/* Each control block has to be on a 4K bondary */
+/* Each control block has to be on a 4K boundary */
 #define H_CB_ALIGNMENT          4096
 /* pSeries hypervisor opcodes */
@@ -232,7 +233,10 @@
 #define H_GET_EM_PARMS          0x2B8
 #define H_SET_MPP               0x2D0
 #define H_GET_MPP               0x2D4
-#define MAX_HCALL_OPCODE        H_GET_MPP
+#define H_HOME_NODE_ASSOCIATIVITY 0x2EC
+#define H_BEST_ENERGY           0x2F4
+#define H_GET_MPP_X             0x314
+#define MAX_HCALL_OPCODE        H_GET_MPP_X
 #ifndef __ASSEMBLY__
@@ -310,6 +314,16 @@ struct hvcall_mpp_data {
 int h_get_mpp(struct hvcall_mpp_data *);
+struct hvcall_mpp_x_data {
+        unsigned long coalesced_bytes;
+        unsigned long pool_coalesced_bytes;
+        unsigned long pool_purr_cycles;
+        unsigned long pool_spurr_cycles;
+        unsigned long reserved[3];
+};
+int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data);
 #ifdef CONFIG_PPC_PSERIES
 extern int CMO_PrPSP;
 extern int CMO_SecPSP;
diff --git a/arch/powerpc/include/asm/hw_irq.h b/arch/powerpc/include/asm/hw_irq.h
index bd100fcf40d0..bb712c9488b3 100644
--- a/arch/powerpc/include/asm/hw_irq.h
+++ b/arch/powerpc/include/asm/hw_irq.h
@@ -16,42 +16,57 @@ extern void timer_interrupt(struct pt_regs *);
 #ifdef CONFIG_PPC64
 #include <asm/paca.h>
-static inline unsigned long local_get_flags(void)
+static inline unsigned long arch_local_save_flags(void)
 {
        unsigned long flags;
-        __asm__ __volatile__("lbz %0,%1(13)"
+        asm volatile(
-        : "=r" (flags)
+                "lbz %0,%1(13)"
-        : "i" (offsetof(struct paca_struct, soft_enabled)));
+                : "=r" (flags)
+                : "i" (offsetof(struct paca_struct, soft_enabled)));
        return flags;
 }
-static inline unsigned long raw_local_irq_disable(void)
+static inline unsigned long arch_local_irq_disable(void)
 {
        unsigned long flags, zero;
-        __asm__ __volatile__("li %1,0; lbz %0,%2(13); stb %1,%2(13)"
+        asm volatile(
-        : "=r" (flags), "=&r" (zero)
+                "li %1,0; lbz %0,%2(13); stb %1,%2(13)"
-        : "i" (offsetof(struct paca_struct, soft_enabled))
+                : "=r" (flags), "=&r" (zero)
-        : "memory");
+                : "i" (offsetof(struct paca_struct, soft_enabled))
+                : "memory");
        return flags;
 }
-extern void raw_local_irq_restore(unsigned long);
+extern void arch_local_irq_restore(unsigned long);
 extern void iseries_handle_interrupts(void);
-#define raw_local_irq_enable()          raw_local_irq_restore(1)
+static inline void arch_local_irq_enable(void)
-#define raw_local_save_flags(flags)     ((flags) = local_get_flags())
+{
-#define raw_local_irq_save(flags)       ((flags) = raw_local_irq_disable())
+        arch_local_irq_restore(1);
+}
+static inline unsigned long arch_local_irq_save(void)
+{
+        return arch_local_irq_disable();
+}
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
+{
+        return flags == 0;
+}
-#define raw_irqs_disabled()             (local_get_flags() == 0)
+static inline bool arch_irqs_disabled(void)
-#define raw_irqs_disabled_flags(flags)  ((flags) == 0)
+{
+        return arch_irqs_disabled_flags(arch_local_save_flags());
+}
 #ifdef CONFIG_PPC_BOOK3E
-#define __hard_irq_enable()     __asm__ __volatile__("wrteei 1": : :"memory");
+#define __hard_irq_enable()     asm volatile("wrteei 1" : : : "memory");
-#define __hard_irq_disable()    __asm__ __volatile__("wrteei 0": : :"memory");
+#define __hard_irq_disable()    asm volatile("wrteei 0" : : : "memory");
 #else
 #define __hard_irq_enable()     __mtmsrd(mfmsr() | MSR_EE, 1)
 #define __hard_irq_disable()    __mtmsrd(mfmsr() & ~MSR_EE, 1)
@@ -64,66 +79,70 @@ extern void iseries_handle_interrupts(void);
                get_paca()->hard_enabled = 0;   \
        } while(0)
-#else
+#else /* CONFIG_PPC64 */
-#if defined(CONFIG_BOOKE)
 #define SET_MSR_EE(x)   mtmsr(x)
-#define raw_local_irq_restore(flags)    __asm__ __volatile__("wrtee %0" : : "r" (flags) : "memory")
+static inline unsigned long arch_local_save_flags(void)
+{
+        return mfmsr();
+}
+static inline void arch_local_irq_restore(unsigned long flags)
+{
+#if defined(CONFIG_BOOKE)
+        asm volatile("wrtee %0" : : "r" (flags) : "memory");
 #else
-#define SET_MSR_EE(x)   mtmsr(x)
+        mtmsr(flags);
-#define raw_local_irq_restore(flags)    mtmsr(flags)
 #endif
+}
-static inline void raw_local_irq_disable(void)
+static inline unsigned long arch_local_irq_save(void)
 {
+        unsigned long flags = arch_local_save_flags();
 #ifdef CONFIG_BOOKE
-        __asm__ __volatile__("wrteei 0": : :"memory");
+        asm volatile("wrteei 0" : : : "memory");
 #else
-        unsigned long msr;
+        SET_MSR_EE(flags & ~MSR_EE);
-        msr = mfmsr();
-        SET_MSR_EE(msr & ~MSR_EE);
 #endif
+        return flags;
 }
-static inline void raw_local_irq_enable(void)
+static inline void arch_local_irq_disable(void)
 {
 #ifdef CONFIG_BOOKE
-        __asm__ __volatile__("wrteei 1": : :"memory");
+        asm volatile("wrteei 0" : : : "memory");
 #else
-        unsigned long msr;
+        arch_local_irq_save();
-        msr = mfmsr();
-        SET_MSR_EE(msr | MSR_EE);
 #endif
 }
-static inline void raw_local_irq_save_ptr(unsigned long *flags)
+static inline void arch_local_irq_enable(void)
 {
-        unsigned long msr;
-        msr = mfmsr();
-        *flags = msr;
 #ifdef CONFIG_BOOKE
-        __asm__ __volatile__("wrteei 0": : :"memory");
+        asm volatile("wrteei 1" : : : "memory");
 #else
-        SET_MSR_EE(msr & ~MSR_EE);
+        unsigned long msr = mfmsr();
+        SET_MSR_EE(msr | MSR_EE);
 #endif
 }
-#define raw_local_save_flags(flags)     ((flags) = mfmsr())
+static inline bool arch_irqs_disabled_flags(unsigned long flags)
-#define raw_local_irq_save(flags)       raw_local_irq_save_ptr(&flags)
-#define raw_irqs_disabled()             ((mfmsr() & MSR_EE) == 0)
-#define raw_irqs_disabled_flags(flags)  (((flags) & MSR_EE) == 0)
-#define hard_irq_disable()              raw_local_irq_disable()
-static inline int irqs_disabled_flags(unsigned long flags)
 {
        return (flags & MSR_EE) == 0;
 }
+static inline bool arch_irqs_disabled(void)
+{
+        return arch_irqs_disabled_flags(arch_local_save_flags());
+}
+#define hard_irq_disable()              arch_local_irq_disable()
 #endif /* CONFIG_PPC64 */
+#define ARCH_IRQ_INIT_FLAGS     IRQ_NOREQUEST
 /*
 * interrupt-retrigger: should we handle this via lost interrupts and IPIs
 * or should we not care like we do now ? --BenH.
diff --git a/arch/powerpc/include/asm/hydra.h b/arch/powerpc/include/asm/hydra.h
index 1ad4eed07fbe..5b0c98bd46ab 100644
--- a/arch/powerpc/include/asm/hydra.h
+++ b/arch/powerpc/include/asm/hydra.h
@@ -10,7 +10,7 @@
 *
 *      © Copyright 1995 Apple Computer, Inc. All rights reserved.
 *
- *  It's available online from http://chrp.apple.com/MacTech.pdf.
+ *  It's available online from http://www.cpu.lu/~mlan/ftp/MacTech.pdf
 *  You can obtain paper copies of this book from computer bookstores or by
 *  writing Morgan Kaufmann Publishers, Inc., 340 Pine Street, Sixth Floor, San
 *  Francisco, CA 94104. Reference ISBN 1-55860-393-X.
diff --git a/arch/powerpc/include/asm/immap_qe.h b/arch/powerpc/include/asm/immap_qe.h
index 4e10f508570a..0edb6842b13d 100644
--- a/arch/powerpc/include/asm/immap_qe.h
+++ b/arch/powerpc/include/asm/immap_qe.h
@@ -467,13 +467,22 @@ struct qe_immap {
 extern struct qe_immap __iomem *qe_immr;
 extern phys_addr_t get_qe_base(void);
-static inline unsigned long immrbar_virt_to_phys(void *address)
+/*
+ * Returns the offset within the QE address space of the given pointer.
+ *
+ * Note that the QE does not support 36-bit physical addresses, so if
+ * get_qe_base() returns a number above 4GB, the caller will probably fail.
+ */
+static inline phys_addr_t immrbar_virt_to_phys(void *address)
 {
-        if ( ((u32)address >= (u32)qe_immr) &&
+        void *q = (void *)qe_immr;
-                        ((u32)address < ((u32)qe_immr + QE_IMMAP_SIZE)) )
-                return (unsigned long)(address - (u32)qe_immr +
+        /* Is it a MURAM address? */
-                                (u32)get_qe_base());
+        if ((address >= q) && (address < (q + QE_IMMAP_SIZE)))
-        return (unsigned long)virt_to_phys(address);
+                return get_qe_base() + (address - q);
+        /* It's an address returned by kmalloc */
+        return virt_to_phys(address);
 }
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/platforms/cell/io-workarounds.h b/arch/powerpc/include/asm/io-workarounds.h
index 6efc7782ebf2..fbae49286926 100644
--- a/arch/powerpc/platforms/cell/io-workarounds.h
+++ b/arch/powerpc/include/asm/io-workarounds.h
@@ -31,7 +31,6 @@ struct iowa_bus {
        void   *private;
 };
-void __devinit io_workaround_init(void);
 void __devinit iowa_register_bus(struct pci_controller *, struct ppc_pci_io *,
                                 int (*)(struct iowa_bus *, void *), void *);
 struct iowa_bus *iowa_mem_find_bus(const PCI_IO_ADDR);
diff --git a/arch/powerpc/include/asm/io.h b/arch/powerpc/include/asm/io.h
index 001f2f11c19b..45698d55cd6a 100644
--- a/arch/powerpc/include/asm/io.h
+++ b/arch/powerpc/include/asm/io.h
@@ -2,6 +2,8 @@
 #define _ASM_POWERPC_IO_H
 #ifdef __KERNEL__
+#define ARCH_HAS_IOREMAP_WC
 /*
 * This program is free software; you can redistribute it and/or
 * modify it under the terms of the GNU General Public License
@@ -481,10 +483,16 @@ __do_out_asm(_rec_outl, "stwbrx")
                                _memcpy_fromio(dst,PCI_FIX_ADDR(src),n)
 #endif /* !CONFIG_EEH */
-#ifdef CONFIG_PPC_INDIRECT_IO
+#ifdef CONFIG_PPC_INDIRECT_PIO
-#define DEF_PCI_HOOK(x)         x
+#define DEF_PCI_HOOK_pio(x)     x
+#else
+#define DEF_PCI_HOOK_pio(x)     NULL
+#endif
+#ifdef CONFIG_PPC_INDIRECT_MMIO
+#define DEF_PCI_HOOK_mem(x)     x
 #else
-#define DEF_PCI_HOOK(x)         NULL
+#define DEF_PCI_HOOK_mem(x)     NULL
 #endif
 /* Structure containing all the hooks */
@@ -504,7 +512,7 @@ extern struct ppc_pci_io {
 #define DEF_PCI_AC_RET(name, ret, at, al, space, aa)            \
 static inline ret name at                                       \
 {                                                               \
-        if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL)              \
+        if (DEF_PCI_HOOK_##space(ppc_pci_io.name) != NULL)      \
                return ppc_pci_io.name al;                      \
        return __do_##name al;                                  \
 }
@@ -512,7 +520,7 @@ static inline ret name at					\
 #define DEF_PCI_AC_NORET(name, at, al, space, aa)               \
 static inline void name at                                      \
 {                                                               \
-        if (DEF_PCI_HOOK(ppc_pci_io.name) != NULL)              \
+        if (DEF_PCI_HOOK_##space(ppc_pci_io.name) != NULL)              \
                ppc_pci_io.name al;                             \
        else                                                    \
                __do_##name al;                                 \
@@ -616,12 +624,13 @@ static inline void iosync(void)
 * * ioremap is the standard one and provides non-cacheable guarded mappings
 *   and can be hooked by the platform via ppc_md
 *
- * * ioremap_flags allows to specify the page flags as an argument and can
+ * * ioremap_prot allows to specify the page flags as an argument and can
- *   also be hooked by the platform via ppc_md. ioremap_prot is the exact
+ *   also be hooked by the platform via ppc_md.
- *   same thing as ioremap_flags.
 *
 * * ioremap_nocache is identical to ioremap
 *
+ * * ioremap_wc enables write combining
+ *
 * * iounmap undoes such a mapping and can be hooked
 *
 * * __ioremap_at (and the pending __iounmap_at) are low level functions to
@@ -629,7 +638,7 @@ static inline void iosync(void)
 *   currently be hooked. Must be page aligned.
 *
 * * __ioremap is the low level implementation used by ioremap and
- *   ioremap_flags and cannot be hooked (but can be used by a hook on one
+ *   ioremap_prot and cannot be hooked (but can be used by a hook on one
 *   of the previous ones)
 *
 * * __ioremap_caller is the same as above but takes an explicit caller
@@ -640,10 +649,10 @@ static inline void iosync(void)
 *
 */
 extern void __iomem *ioremap(phys_addr_t address, unsigned long size);
-extern void __iomem *ioremap_flags(phys_addr_t address, unsigned long size,
+extern void __iomem *ioremap_prot(phys_addr_t address, unsigned long size,
-                                   unsigned long flags);
+                                  unsigned long flags);
+extern void __iomem *ioremap_wc(phys_addr_t address, unsigned long size);
 #define ioremap_nocache(addr, size)     ioremap((addr), (size))
-#define ioremap_prot(addr, size, prot)  ioremap_flags((addr), (size), (prot))
 extern void iounmap(volatile void __iomem *addr);
diff --git a/arch/powerpc/include/asm/io_event_irq.h b/arch/powerpc/include/asm/io_event_irq.h
new file mode 100644
index 000000000000..b1a9a1be3c21
--- /dev/null
+++ b/arch/powerpc/include/asm/io_event_irq.h
@@ -0,0 +1,54 @@
+/*
+ * Copyright 2010, 2011 Mark Nelson and Tseng-Hui (Frank) Lin, IBM Corporation
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#ifndef _ASM_POWERPC_IO_EVENT_IRQ_H
+#define _ASM_POWERPC_IO_EVENT_IRQ_H
+#include <linux/types.h>
+#include <linux/notifier.h>
+#define PSERIES_IOEI_RPC_MAX_LEN 216
+#define PSERIES_IOEI_TYPE_ERR_DETECTED          0x01
+#define PSERIES_IOEI_TYPE_ERR_RECOVERED         0x02
+#define PSERIES_IOEI_TYPE_EVENT                 0x03
+#define PSERIES_IOEI_TYPE_RPC_PASS_THRU         0x04
+#define PSERIES_IOEI_SUBTYPE_NOT_APP            0x00
+#define PSERIES_IOEI_SUBTYPE_REBALANCE_REQ      0x01
+#define PSERIES_IOEI_SUBTYPE_NODE_ONLINE        0x03
+#define PSERIES_IOEI_SUBTYPE_NODE_OFFLINE       0x04
+#define PSERIES_IOEI_SUBTYPE_DUMP_SIZE_CHANGE   0x05
+#define PSERIES_IOEI_SUBTYPE_TORRENT_IRV_UPDATE 0x06
+#define PSERIES_IOEI_SUBTYPE_TORRENT_HFI_CFGED  0x07
+#define PSERIES_IOEI_SCOPE_NOT_APP              0x00
+#define PSERIES_IOEI_SCOPE_RIO_HUB              0x36
+#define PSERIES_IOEI_SCOPE_RIO_BRIDGE           0x37
+#define PSERIES_IOEI_SCOPE_PHB                  0x38
+#define PSERIES_IOEI_SCOPE_EADS_GLOBAL          0x39
+#define PSERIES_IOEI_SCOPE_EADS_SLOT            0x3A
+#define PSERIES_IOEI_SCOPE_TORRENT_HUB          0x3B
+#define PSERIES_IOEI_SCOPE_SERVICE_PROC         0x51
+/* Platform Event Log Format, Version 6, data portition of IO event section */
+struct pseries_io_event {
+        uint8_t event_type;             /* 0x00 IO-Event Type           */
+        uint8_t rpc_data_len;           /* 0x01 RPC data length         */
+        uint8_t scope;                  /* 0x02 Error/Event Scope       */
+        uint8_t event_subtype;          /* 0x03 I/O-Event Sub-Type      */
+        uint32_t drc_index;             /* 0x04 DRC Index               */
+        uint8_t rpc_data[PSERIES_IOEI_RPC_MAX_LEN];
+                                        /* 0x08 RPC Data (0-216 bytes,  */
+                                        /* padded to 4 bytes alignment) */
+};
+extern struct atomic_notifier_head pseries_ioei_notifier_list;
+#endif /* _ASM_POWERPC_IO_EVENT_IRQ_H */
diff --git a/arch/powerpc/include/asm/ioctls.h b/arch/powerpc/include/asm/ioctls.h
index 851920052e08..e9b78870aaab 100644
--- a/arch/powerpc/include/asm/ioctls.h
+++ b/arch/powerpc/include/asm/ioctls.h
@@ -94,7 +94,9 @@
 #define TIOCSRS485      0x542f
 #define TIOCGPTN        _IOR('T',0x30, unsigned int) /* Get Pty Number (of pty-mux device) */
 #define TIOCSPTLCK      _IOW('T',0x31, int)  /* Lock/unlock Pty */
+#define TIOCGDEV        _IOR('T',0x32, unsigned int) /* Get primary device node of /dev/console */
 #define TIOCSIG         _IOW('T',0x36, int)  /* Generate signal on Pty slave */
+#define TIOCVHANGUP     0x5437
 #define TIOCSERCONFIG   0x5453
 #define TIOCSERGWILD    0x5454
diff --git a/arch/powerpc/include/asm/irq.h b/arch/powerpc/include/asm/irq.h
index 67ab5fb7d153..1bff591f7f72 100644
--- a/arch/powerpc/include/asm/irq.h
+++ b/arch/powerpc/include/asm/irq.h
@@ -88,9 +88,6 @@ struct irq_host_ops {
        /* Dispose of such a mapping */
        void (*unmap)(struct irq_host *h, unsigned int virq);
-        /* Update of such a mapping  */
-        void (*remap)(struct irq_host *h, unsigned int virq, irq_hw_number_t hw);
        /* Translate device-tree interrupt specifier from raw format coming
         * from the firmware to a irq_hw_number_t (interrupt line number) and
         * type (sense) that can be passed to set_irq_type(). In the absence
@@ -128,19 +125,10 @@ struct irq_host {
        struct device_node      *of_node;
 };
-/* The main irq map itself is an array of NR_IRQ entries containing the
+struct irq_data;
- * associate host and irq number. An entry with a host of NULL is free.
+extern irq_hw_number_t irqd_to_hwirq(struct irq_data *d);
- * An entry can be allocated if it's free, the allocator always then sets
- * hwirq first to the host's invalid irq number and then fills ops.
- */
-struct irq_map_entry {
-        irq_hw_number_t hwirq;
-        struct irq_host *host;
-};
-extern struct irq_map_entry irq_map[NR_IRQS];
 extern irq_hw_number_t virq_to_hw(unsigned int virq);
+extern bool virq_is_host(unsigned int virq, struct irq_host *host);
 /**
 * irq_alloc_host - Allocate a new irq_host data structure
diff --git a/arch/powerpc/include/asm/irqflags.h b/arch/powerpc/include/asm/irqflags.h
index 5f68ecfdf516..b0b06d85788d 100644
--- a/arch/powerpc/include/asm/irqflags.h
+++ b/arch/powerpc/include/asm/irqflags.h
@@ -6,30 +6,50 @@
 #ifndef __ASSEMBLY__
 /*
- * Get definitions for raw_local_save_flags(x), etc.
+ * Get definitions for arch_local_save_flags(x), etc.
 */
 #include <asm/hw_irq.h>
 #else
 #ifdef CONFIG_TRACE_IRQFLAGS
+#ifdef CONFIG_IRQSOFF_TRACER
+/*
+ * Since the ftrace irqsoff latency trace checks CALLER_ADDR1,
+ * which is the stack frame here, we need to force a stack frame
+ * in case we came from user space.
+ */
+#define TRACE_WITH_FRAME_BUFFER(func)           \
+        mflr    r0;                             \
+        stdu    r1, -32(r1);                    \
+        std     r0, 16(r1);                     \
+        stdu    r1, -32(r1);                    \
+        bl func;                                \
+        ld      r1, 0(r1);                      \
+        ld      r1, 0(r1);
+#else
+#define TRACE_WITH_FRAME_BUFFER(func)           \
+        bl func;
+#endif
 /*
 * Most of the CPU's IRQ-state tracing is done from assembly code; we
 * have to call a C function so call a wrapper that saves all the
 * C-clobbered registers.
 */
-#define TRACE_ENABLE_INTS       bl .trace_hardirqs_on
+#define TRACE_ENABLE_INTS       TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)
-#define TRACE_DISABLE_INTS      bl .trace_hardirqs_off
+#define TRACE_DISABLE_INTS      TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)
-#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)  \
-        cmpdi   en,0;                           \
+#define TRACE_AND_RESTORE_IRQ_PARTIAL(en,skip)          \
-        bne     95f;                            \
+        cmpdi   en,0;                                   \
-        stb     en,PACASOFTIRQEN(r13);          \
+        bne     95f;                                    \
-        bl      .trace_hardirqs_off;            \
+        stb     en,PACASOFTIRQEN(r13);                  \
-        b       skip;                           \
+        TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_off)    \
-95:     bl      .trace_hardirqs_on;             \
+        b       skip;                                   \
+95:     TRACE_WITH_FRAME_BUFFER(.trace_hardirqs_on)     \
        li      en,1;
 #define TRACE_AND_RESTORE_IRQ(en)               \
        TRACE_AND_RESTORE_IRQ_PARTIAL(en,96f);  \
-        stb     en,PACASOFTIRQEN(r13);          \
+        stb     en,PACASOFTIRQEN(r13);          \
 96:
 #else
 #define TRACE_ENABLE_INTS
diff --git a/arch/powerpc/include/asm/kexec.h b/arch/powerpc/include/asm/kexec.h
index 076327f2eff7..8a33698c61bd 100644
--- a/arch/powerpc/include/asm/kexec.h
+++ b/arch/powerpc/include/asm/kexec.h
@@ -76,7 +76,7 @@ extern void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *));
 extern cpumask_t cpus_in_sr;
 static inline int kexec_sr_activated(int cpu)
 {
-        return cpu_isset(cpu,cpus_in_sr);
+        return cpumask_test_cpu(cpu, &cpus_in_sr);
 }
 struct kimage;
@@ -91,6 +91,7 @@ extern void machine_kexec_simple(struct kimage *image);
 extern void crash_kexec_secondary(struct pt_regs *regs);
 extern int overlaps_crashkernel(unsigned long start, unsigned long size);
 extern void reserve_crashkernel(void);
+extern void machine_kexec_mask_interrupts(void);
 #else /* !CONFIG_KEXEC */
 static inline int kexec_sr_activated(int cpu) { return 0; }
diff --git a/arch/powerpc/include/asm/kgdb.h b/arch/powerpc/include/asm/kgdb.h
index edd217006d27..9db24e77b9f4 100644
--- a/arch/powerpc/include/asm/kgdb.h
+++ b/arch/powerpc/include/asm/kgdb.h
@@ -31,6 +31,7 @@ static inline void arch_kgdb_breakpoint(void)
        asm(".long 0x7d821008"); /* twge r2, r2 */
 }
 #define CACHE_FLUSH_IS_SAFE     1
+#define DBG_MAX_REG_NUM     70
 /* The number bytes of registers we have to save depends on a few
 * things.  For 64bit we default to not including vector registers and
diff --git a/arch/powerpc/include/asm/kprobes.h b/arch/powerpc/include/asm/kprobes.h
index d0e7701fa1f6..be0171afdc0f 100644
--- a/arch/powerpc/include/asm/kprobes.h
+++ b/arch/powerpc/include/asm/kprobes.h
@@ -50,7 +50,7 @@ typedef unsigned int kprobe_opcode_t;
 * Handle cases where:
 *              - User passes a <.symbol> or <module:.symbol>
 *              - User passes a <symbol> or <module:symbol>
- *              - User passes a non-existant symbol, kallsyms_lookup_name
+ *              - User passes a non-existent symbol, kallsyms_lookup_name
 *                returns 0. Don't deref the NULL pointer in that case
 */
 #define kprobe_lookup_name(name, addr)                                  \
diff --git a/arch/powerpc/include/asm/kvm.h b/arch/powerpc/include/asm/kvm.h
index 6c5547d82bbe..d2ca5ed3877b 100644
--- a/arch/powerpc/include/asm/kvm.h
+++ b/arch/powerpc/include/asm/kvm.h
@@ -45,6 +45,114 @@ struct kvm_regs {
        __u64 gpr[32];
 };
+#define KVM_SREGS_E_IMPL_NONE   0
+#define KVM_SREGS_E_IMPL_FSL    1
+#define KVM_SREGS_E_FSL_PIDn    (1 << 0) /* PID1/PID2 */
+/*
+ * Feature bits indicate which sections of the sregs struct are valid,
+ * both in KVM_GET_SREGS and KVM_SET_SREGS.  On KVM_SET_SREGS, registers
+ * corresponding to unset feature bits will not be modified.  This allows
+ * restoring a checkpoint made without that feature, while keeping the
+ * default values of the new registers.
+ *
+ * KVM_SREGS_E_BASE contains:
+ * CSRR0/1 (refers to SRR2/3 on 40x)
+ * ESR
+ * DEAR
+ * MCSR
+ * TSR
+ * TCR
+ * DEC
+ * TB
+ * VRSAVE (USPRG0)
+ */
+#define KVM_SREGS_E_BASE                (1 << 0)
+/*
+ * KVM_SREGS_E_ARCH206 contains:
+ *
+ * PIR
+ * MCSRR0/1
+ * DECAR
+ * IVPR
+ */
+#define KVM_SREGS_E_ARCH206             (1 << 1)
+/*
+ * Contains EPCR, plus the upper half of 64-bit registers
+ * that are 32-bit on 32-bit implementations.
+ */
+#define KVM_SREGS_E_64                  (1 << 2)
+#define KVM_SREGS_E_SPRG8               (1 << 3)
+#define KVM_SREGS_E_MCIVPR              (1 << 4)
+/*
+ * IVORs are used -- contains IVOR0-15, plus additional IVORs
+ * in combination with an appropriate feature bit.
+ */
+#define KVM_SREGS_E_IVOR                (1 << 5)
+/*
+ * Contains MAS0-4, MAS6-7, TLBnCFG, MMUCFG.
+ * Also TLBnPS if MMUCFG[MAVN] = 1.
+ */
+#define KVM_SREGS_E_ARCH206_MMU         (1 << 6)
+/* DBSR, DBCR, IAC, DAC, DVC */
+#define KVM_SREGS_E_DEBUG               (1 << 7)
+/* Enhanced debug -- DSRR0/1, SPRG9 */
+#define KVM_SREGS_E_ED                  (1 << 8)
+/* Embedded Floating Point (SPE) -- IVOR32-34 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_SPE                 (1 << 9)
+/* External Proxy (EXP) -- EPR */
+#define KVM_SREGS_EXP                   (1 << 10)
+/* External PID (E.PD) -- EPSC/EPLC */
+#define KVM_SREGS_E_PD                  (1 << 11)
+/* Processor Control (E.PC) -- IVOR36-37 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_PC                  (1 << 12)
+/* Page table (E.PT) -- EPTCFG */
+#define KVM_SREGS_E_PT                  (1 << 13)
+/* Embedded Performance Monitor (E.PM) -- IVOR35 if KVM_SREGS_E_IVOR */
+#define KVM_SREGS_E_PM                  (1 << 14)
+/*
+ * Special updates:
+ *
+ * Some registers may change even while a vcpu is not running.
+ * To avoid losing these changes, by default these registers are
+ * not updated by KVM_SET_SREGS.  To force an update, set the bit
+ * in u.e.update_special corresponding to the register to be updated.
+ *
+ * The update_special field is zero on return from KVM_GET_SREGS.
+ *
+ * When restoring a checkpoint, the caller can set update_special
+ * to 0xffffffff to ensure that everything is restored, even new features
+ * that the caller doesn't know about.
+ */
+#define KVM_SREGS_E_UPDATE_MCSR         (1 << 0)
+#define KVM_SREGS_E_UPDATE_TSR          (1 << 1)
+#define KVM_SREGS_E_UPDATE_DEC          (1 << 2)
+#define KVM_SREGS_E_UPDATE_DBSR         (1 << 3)
+/*
+ * In KVM_SET_SREGS, reserved/pad fields must be left untouched from a
+ * previous KVM_GET_REGS.
+ *
+ * Unless otherwise indicated, setting any register with KVM_SET_SREGS
+ * directly sets its value.  It does not trigger any special semantics such
+ * as write-one-to-clear.  Calling KVM_SET_SREGS on an unmodified struct
+ * just received from KVM_GET_SREGS is always a no-op.
+ */
 struct kvm_sregs {
        __u32 pvr;
        union {
@@ -62,6 +170,82 @@ struct kvm_sregs {
                                __u64 dbat[8]; 
                        } ppc32;
                } s;
+                struct {
+                        union {
+                                struct { /* KVM_SREGS_E_IMPL_FSL */
+                                        __u32 features; /* KVM_SREGS_E_FSL_ */
+                                        __u32 svr;
+                                        __u64 mcar;
+                                        __u32 hid0;
+                                        /* KVM_SREGS_E_FSL_PIDn */
+                                        __u32 pid1, pid2;
+                                } fsl;
+                                __u8 pad[256];
+                        } impl;
+                        __u32 features; /* KVM_SREGS_E_ */
+                        __u32 impl_id;  /* KVM_SREGS_E_IMPL_ */
+                        __u32 update_special; /* KVM_SREGS_E_UPDATE_ */
+                        __u32 pir;      /* read-only */
+                        __u64 sprg8;
+                        __u64 sprg9;    /* E.ED */
+                        __u64 csrr0;
+                        __u64 dsrr0;    /* E.ED */
+                        __u64 mcsrr0;
+                        __u32 csrr1;
+                        __u32 dsrr1;    /* E.ED */
+                        __u32 mcsrr1;
+                        __u32 esr;
+                        __u64 dear;
+                        __u64 ivpr;
+                        __u64 mcivpr;
+                        __u64 mcsr;     /* KVM_SREGS_E_UPDATE_MCSR */
+                        __u32 tsr;      /* KVM_SREGS_E_UPDATE_TSR */
+                        __u32 tcr;
+                        __u32 decar;
+                        __u32 dec;      /* KVM_SREGS_E_UPDATE_DEC */
+                        /*
+                         * Userspace can read TB directly, but the
+                         * value reported here is consistent with "dec".
+                         *
+                         * Read-only.
+                         */
+                        __u64 tb;
+                        __u32 dbsr;     /* KVM_SREGS_E_UPDATE_DBSR */
+                        __u32 dbcr[3];
+                        __u32 iac[4];
+                        __u32 dac[2];
+                        __u32 dvc[2];
+                        __u8 num_iac;   /* read-only */
+                        __u8 num_dac;   /* read-only */
+                        __u8 num_dvc;   /* read-only */
+                        __u8 pad;
+                        __u32 epr;      /* EXP */
+                        __u32 vrsave;   /* a.k.a. USPRG0 */
+                        __u32 epcr;     /* KVM_SREGS_E_64 */
+                        __u32 mas0;
+                        __u32 mas1;
+                        __u64 mas2;
+                        __u64 mas7_3;
+                        __u32 mas4;
+                        __u32 mas6;
+                        __u32 ivor_low[16]; /* IVOR0-15 */
+                        __u32 ivor_high[18]; /* IVOR32+, plus room to expand */
+                        __u32 mmucfg;   /* read-only */
+                        __u32 eptcfg;   /* E.PT, read-only */
+                        __u32 tlbcfg[4];/* read-only */
+                        __u32 tlbps[4]; /* read-only */
+                        __u32 eplc, epsc; /* E.PD */
+                } e;
                __u8 pad[1020];
        } u;
 };
@@ -86,5 +270,6 @@ struct kvm_guest_debug_arch {
 #define KVM_INTERRUPT_SET       -1U
 #define KVM_INTERRUPT_UNSET     -2U
+#define KVM_INTERRUPT_SET_LEVEL -3U
 #endif /* __LINUX_KVM_POWERPC_H */
diff --git a/arch/powerpc/include/asm/kvm_44x.h b/arch/powerpc/include/asm/kvm_44x.h
index d22d39942a92..a0e57618ff33 100644
--- a/arch/powerpc/include/asm/kvm_44x.h
+++ b/arch/powerpc/include/asm/kvm_44x.h
@@ -61,7 +61,6 @@ static inline struct kvmppc_vcpu_44x *to_44x(struct kvm_vcpu *vcpu)
        return container_of(vcpu, struct kvmppc_vcpu_44x, vcpu);
 }
-void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 new_pid);
 void kvmppc_44x_tlb_put(struct kvm_vcpu *vcpu);
 void kvmppc_44x_tlb_load(struct kvm_vcpu *vcpu);
diff --git a/arch/powerpc/include/asm/kvm_asm.h b/arch/powerpc/include/asm/kvm_asm.h
index c5ea4cda34b3..0951b17f4eb5 100644
--- a/arch/powerpc/include/asm/kvm_asm.h
+++ b/arch/powerpc/include/asm/kvm_asm.h
@@ -58,6 +58,8 @@
 #define BOOK3S_INTERRUPT_INST_STORAGE   0x400
 #define BOOK3S_INTERRUPT_INST_SEGMENT   0x480
 #define BOOK3S_INTERRUPT_EXTERNAL       0x500
+#define BOOK3S_INTERRUPT_EXTERNAL_LEVEL 0x501
+#define BOOK3S_INTERRUPT_EXTERNAL_HV    0x502
 #define BOOK3S_INTERRUPT_ALIGNMENT      0x600
 #define BOOK3S_INTERRUPT_PROGRAM        0x700
 #define BOOK3S_INTERRUPT_FP_UNAVAIL     0x800
@@ -84,7 +86,8 @@
 #define BOOK3S_IRQPRIO_EXTERNAL                 13
 #define BOOK3S_IRQPRIO_DECREMENTER              14
 #define BOOK3S_IRQPRIO_PERFORMANCE_MONITOR      15
-#define BOOK3S_IRQPRIO_MAX                      16
+#define BOOK3S_IRQPRIO_EXTERNAL_LEVEL           16
+#define BOOK3S_IRQPRIO_MAX                      17
 #define BOOK3S_HFLAG_DCBZ32                     0x1
 #define BOOK3S_HFLAG_SLB                        0x2
diff --git a/arch/powerpc/include/asm/kvm_book3s.h b/arch/powerpc/include/asm/kvm_book3s.h
index 8274a2d43925..d62e703f1214 100644
--- a/arch/powerpc/include/asm/kvm_book3s.h
+++ b/arch/powerpc/include/asm/kvm_book3s.h
@@ -38,15 +38,6 @@ struct kvmppc_slb {
        bool class      : 1;
 };
-struct kvmppc_sr {
-        u32 raw;
-        u32 vsid;
-        bool Ks         : 1;
-        bool Kp         : 1;
-        bool nx         : 1;
-        bool valid      : 1;
-};
 struct kvmppc_bat {
        u64 raw;
        u32 bepi;
@@ -69,6 +60,13 @@ struct kvmppc_sid_map {
 #define SID_MAP_NUM     (1 << SID_MAP_BITS)
 #define SID_MAP_MASK    (SID_MAP_NUM - 1)
+#ifdef CONFIG_PPC_BOOK3S_64
+#define SID_CONTEXTS    1
+#else
+#define SID_CONTEXTS    128
+#define VSID_POOL_SIZE  (SID_CONTEXTS * 16)
+#endif
 struct kvmppc_vcpu_book3s {
        struct kvm_vcpu vcpu;
        struct kvmppc_book3s_shadow_vcpu *shadow_vcpu;
@@ -79,20 +77,22 @@ struct kvmppc_vcpu_book3s {
                u64 vsid;
        } slb_shadow[64];
        u8 slb_shadow_max;
-        struct kvmppc_sr sr[16];
        struct kvmppc_bat ibat[8];
        struct kvmppc_bat dbat[8];
        u64 hid[6];
        u64 gqr[8];
        int slb_nr;
-        u32 dsisr;
        u64 sdr1;
        u64 hior;
        u64 msr_mask;
-        u64 vsid_first;
        u64 vsid_next;
+#ifdef CONFIG_PPC_BOOK3S_32
+        u32 vsid_pool[VSID_POOL_SIZE];
+#else
+        u64 vsid_first;
        u64 vsid_max;
-        int context_id;
+#endif
+        int context_id[SID_CONTEXTS];
        ulong prog_flags; /* flags to inject when giving a 700 trap */
 };
@@ -131,9 +131,10 @@ extern void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat,
                           bool upper, u32 val);
 extern void kvmppc_giveup_ext(struct kvm_vcpu *vcpu, ulong msr);
 extern int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu);
+extern pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn);
-extern u32 kvmppc_trampoline_lowmem;
+extern ulong kvmppc_trampoline_lowmem;
-extern u32 kvmppc_trampoline_enter;
+extern ulong kvmppc_trampoline_enter;
 extern void kvmppc_rmcall(ulong srr0, ulong srr1);
 extern void kvmppc_load_up_fpu(void);
 extern void kvmppc_load_up_altivec(void);
diff --git a/arch/powerpc/include/asm/kvm_book3s_asm.h b/arch/powerpc/include/asm/kvm_book3s_asm.h
index 36fdb3aff30b..d5a8a3861635 100644
--- a/arch/powerpc/include/asm/kvm_book3s_asm.h
+++ b/arch/powerpc/include/asm/kvm_book3s_asm.h
@@ -34,6 +34,7 @@
            (\intno == BOOK3S_INTERRUPT_DATA_SEGMENT) || \
            (\intno == BOOK3S_INTERRUPT_INST_SEGMENT) || \
            (\intno == BOOK3S_INTERRUPT_EXTERNAL) || \
+            (\intno == BOOK3S_INTERRUPT_EXTERNAL_HV) || \
            (\intno == BOOK3S_INTERRUPT_ALIGNMENT) || \
            (\intno == BOOK3S_INTERRUPT_PROGRAM) || \
            (\intno == BOOK3S_INTERRUPT_FP_UNAVAIL) || \
diff --git a/arch/powerpc/include/asm/kvm_e500.h b/arch/powerpc/include/asm/kvm_e500.h
index 7fea26fffb25..7a2a565f88c4 100644
--- a/arch/powerpc/include/asm/kvm_e500.h
+++ b/arch/powerpc/include/asm/kvm_e500.h
@@ -43,6 +43,7 @@ struct kvmppc_vcpu_e500 {
        u32 host_pid[E500_PID_NUM];
        u32 pid[E500_PID_NUM];
+        u32 svr;
        u32 mas0;
        u32 mas1;
@@ -58,6 +59,7 @@ struct kvmppc_vcpu_e500 {
        u32 hid1;
        u32 tlb0cfg;
        u32 tlb1cfg;
+        u64 mcar;
        struct kvm_vcpu vcpu;
 };
diff --git a/arch/powerpc/include/asm/kvm_fpu.h b/arch/powerpc/include/asm/kvm_fpu.h
index c3d4f0518a67..92daae132492 100644
--- a/arch/powerpc/include/asm/kvm_fpu.h
+++ b/arch/powerpc/include/asm/kvm_fpu.h
@@ -82,7 +82,7 @@ FPD_THREE_IN(fmadd)
 FPD_THREE_IN(fnmsub)
 FPD_THREE_IN(fnmadd)
-extern void kvm_cvt_fd(u32 *from, u64 *to, u64 *fpscr);
+extern void kvm_cvt_fd(u32 *from, u64 *to);
-extern void kvm_cvt_df(u64 *from, u32 *to, u64 *fpscr);
+extern void kvm_cvt_df(u64 *from, u32 *to);
 #endif
diff --git a/arch/powerpc/include/asm/kvm_host.h b/arch/powerpc/include/asm/kvm_host.h
index b0b23c007d6e..186f150b9b89 100644
--- a/arch/powerpc/include/asm/kvm_host.h
+++ b/arch/powerpc/include/asm/kvm_host.h
@@ -25,6 +25,7 @@
 #include <linux/interrupt.h>
 #include <linux/types.h>
 #include <linux/kvm_types.h>
+#include <linux/kvm_para.h>
 #include <asm/kvm_asm.h>
 #define KVM_MAX_VCPUS 1
@@ -41,12 +42,17 @@
 #define HPTEG_CACHE_NUM                 (1 << 15)
 #define HPTEG_HASH_BITS_PTE             13
+#define HPTEG_HASH_BITS_PTE_LONG        12
 #define HPTEG_HASH_BITS_VPTE            13
 #define HPTEG_HASH_BITS_VPTE_LONG       5
 #define HPTEG_HASH_NUM_PTE              (1 << HPTEG_HASH_BITS_PTE)
+#define HPTEG_HASH_NUM_PTE_LONG         (1 << HPTEG_HASH_BITS_PTE_LONG)
 #define HPTEG_HASH_NUM_VPTE             (1 << HPTEG_HASH_BITS_VPTE)
 #define HPTEG_HASH_NUM_VPTE_LONG        (1 << HPTEG_HASH_BITS_VPTE_LONG)
+/* Physical Address Mask - allowed range of real mode RAM access */
+#define KVM_PAM                 0x0fffffffffffffffULL
 struct kvm;
 struct kvm_run;
 struct kvm_vcpu;
@@ -159,8 +165,10 @@ struct kvmppc_mmu {
 struct hpte_cache {
        struct hlist_node list_pte;
+        struct hlist_node list_pte_long;
        struct hlist_node list_vpte;
        struct hlist_node list_vpte_long;
+        struct rcu_head rcu_head;
        u64 host_va;
        u64 pfn;
        ulong slot;
@@ -210,28 +218,24 @@ struct kvm_vcpu_arch {
        u32 cr;
 #endif
-        ulong msr;
 #ifdef CONFIG_PPC_BOOK3S
        ulong shadow_msr;
        ulong hflags;
        ulong guest_owned_ext;
 #endif
+        u32 vrsave; /* also USPRG0 */
        u32 mmucr;
-        ulong sprg0;
-        ulong sprg1;
-        ulong sprg2;
-        ulong sprg3;
        ulong sprg4;
        ulong sprg5;
        ulong sprg6;
        ulong sprg7;
-        ulong srr0;
-        ulong srr1;
        ulong csrr0;
        ulong csrr1;
        ulong dsrr0;
        ulong dsrr1;
-        ulong dear;
+        ulong mcsrr0;
+        ulong mcsrr1;
+        ulong mcsr;
        ulong esr;
        u32 dec;
        u32 decar;
@@ -255,6 +259,7 @@ struct kvm_vcpu_arch {
        u32 dbsr;
 #ifdef CONFIG_KVM_EXIT_TIMING
+        struct mutex exit_timing_lock;
        struct kvmppc_exit_timing timing_exit;
        struct kvmppc_exit_timing timing_last_enter;
        u32 last_exit_type;
@@ -290,12 +295,17 @@ struct kvm_vcpu_arch {
        struct tasklet_struct tasklet;
        u64 dec_jiffies;
        unsigned long pending_exceptions;
+        struct kvm_vcpu_arch_shared *shared;
+        unsigned long magic_page_pa; /* phys addr to map the magic page to */
+        unsigned long magic_page_ea; /* effect. addr to map the magic page to */
 #ifdef CONFIG_PPC_BOOK3S
        struct hlist_head hpte_hash_pte[HPTEG_HASH_NUM_PTE];
+        struct hlist_head hpte_hash_pte_long[HPTEG_HASH_NUM_PTE_LONG];
        struct hlist_head hpte_hash_vpte[HPTEG_HASH_NUM_VPTE];
        struct hlist_head hpte_hash_vpte_long[HPTEG_HASH_NUM_VPTE_LONG];
        int hpte_cache_count;
+        spinlock_t mmu_lock;
 #endif
 };
diff --git a/arch/powerpc/include/asm/kvm_para.h b/arch/powerpc/include/asm/kvm_para.h
index 2d48f6a63d0b..50533f9adf40 100644
--- a/arch/powerpc/include/asm/kvm_para.h
+++ b/arch/powerpc/include/asm/kvm_para.h
@@ -20,16 +20,153 @@
 #ifndef __POWERPC_KVM_PARA_H__
 #define __POWERPC_KVM_PARA_H__
+#include <linux/types.h>
+struct kvm_vcpu_arch_shared {
+        __u64 scratch1;
+        __u64 scratch2;
+        __u64 scratch3;
+        __u64 critical;         /* Guest may not get interrupts if == r1 */
+        __u64 sprg0;
+        __u64 sprg1;
+        __u64 sprg2;
+        __u64 sprg3;
+        __u64 srr0;
+        __u64 srr1;
+        __u64 dar;
+        __u64 msr;
+        __u32 dsisr;
+        __u32 int_pending;      /* Tells the guest if we have an interrupt */
+        __u32 sr[16];
+};
+#define KVM_SC_MAGIC_R0         0x4b564d21 /* "KVM!" */
+#define HC_VENDOR_KVM           (42 << 16)
+#define HC_EV_SUCCESS           0
+#define HC_EV_UNIMPLEMENTED     12
+#define KVM_FEATURE_MAGIC_PAGE  1
+#define KVM_MAGIC_FEAT_SR       (1 << 0)
 #ifdef __KERNEL__
+#ifdef CONFIG_KVM_GUEST
+#include <linux/of.h>
+static inline int kvm_para_available(void)
+{
+        struct device_node *hyper_node;
+        hyper_node = of_find_node_by_path("/hypervisor");
+        if (!hyper_node)
+                return 0;
+        if (!of_device_is_compatible(hyper_node, "linux,kvm"))
+                return 0;
+        return 1;
+}
+extern unsigned long kvm_hypercall(unsigned long *in,
+                                   unsigned long *out,
+                                   unsigned long nr);
+#else
 static inline int kvm_para_available(void)
 {
        return 0;
 }
+static unsigned long kvm_hypercall(unsigned long *in,
+                                   unsigned long *out,
+                                   unsigned long nr)
+{
+        return HC_EV_UNIMPLEMENTED;
+}
+#endif
+static inline long kvm_hypercall0_1(unsigned int nr, unsigned long *r2)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        unsigned long r;
+        r = kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+        *r2 = out[0];
+        return r;
+}
+static inline long kvm_hypercall0(unsigned int nr)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        return kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+}
+static inline long kvm_hypercall1(unsigned int nr, unsigned long p1)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        in[0] = p1;
+        return kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+}
+static inline long kvm_hypercall2(unsigned int nr, unsigned long p1,
+                                  unsigned long p2)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        in[0] = p1;
+        in[1] = p2;
+        return kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+}
+static inline long kvm_hypercall3(unsigned int nr, unsigned long p1,
+                                  unsigned long p2, unsigned long p3)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        in[0] = p1;
+        in[1] = p2;
+        in[2] = p3;
+        return kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+}
+static inline long kvm_hypercall4(unsigned int nr, unsigned long p1,
+                                  unsigned long p2, unsigned long p3,
+                                  unsigned long p4)
+{
+        unsigned long in[8];
+        unsigned long out[8];
+        in[0] = p1;
+        in[1] = p2;
+        in[2] = p3;
+        in[3] = p4;
+        return kvm_hypercall(in, out, nr | HC_VENDOR_KVM);
+}
 static inline unsigned int kvm_arch_para_features(void)
 {
-        return 0;
+        unsigned long r;
+        if (!kvm_para_available())
+                return 0;
+        if(kvm_hypercall0_1(KVM_HC_FEATURES, &r))
+                return 0;
+        return r;
 }
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/kvm_ppc.h b/arch/powerpc/include/asm/kvm_ppc.h
index 18d139ec2d22..9345238edecf 100644
--- a/arch/powerpc/include/asm/kvm_ppc.h
+++ b/arch/powerpc/include/asm/kvm_ppc.h
@@ -61,6 +61,7 @@ extern int kvmppc_emulate_instruction(struct kvm_run *run,
                                      struct kvm_vcpu *vcpu);
 extern int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu);
 extern void kvmppc_emulate_dec(struct kvm_vcpu *vcpu);
+extern u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb);
 /* Core-specific hooks */
@@ -107,6 +108,7 @@ extern int kvmppc_booke_init(void);
 extern void kvmppc_booke_exit(void);
 extern void kvmppc_core_destroy_mmu(struct kvm_vcpu *vcpu);
+extern int kvmppc_kvm_pv(struct kvm_vcpu *vcpu);
 /*
 * Cuts out inst bits with ordering according to spec.
@@ -141,4 +143,12 @@ static inline u32 kvmppc_set_field(u64 inst, int msb, int lsb, int value)
        return r;
 }
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs);
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid);
 #endif /* __POWERPC_KVM_PPC_H__ */
diff --git a/arch/powerpc/include/asm/lppaca.h b/arch/powerpc/include/asm/lppaca.h
index 14b592dfb4e8..e0298d26ce5d 100644
--- a/arch/powerpc/include/asm/lppaca.h
+++ b/arch/powerpc/include/asm/lppaca.h
@@ -33,9 +33,25 @@
 //
 //----------------------------------------------------------------------------
 #include <linux/cache.h>
+#include <linux/threads.h>
 #include <asm/types.h>
 #include <asm/mmu.h>
+/*
+ * We only have to have statically allocated lppaca structs on
+ * legacy iSeries, which supports at most 64 cpus.
+ */
+#ifdef CONFIG_PPC_ISERIES
+#if NR_CPUS < 64
+#define NR_LPPACAS      NR_CPUS
+#else
+#define NR_LPPACAS      64
+#endif
+#else /* not iSeries */
+#define NR_LPPACAS      1
+#endif
 /* The Hypervisor barfs if the lppaca crosses a page boundary.  A 1k
 * alignment is sufficient to prevent this */
 struct lppaca {
@@ -62,7 +78,10 @@ struct lppaca {
        volatile u32 dyn_pir;           // Dynamic ProcIdReg value      x20-x23
        u32     dsei_data;              // DSEI data                    x24-x27
        u64     sprg3;                  // SPRG3 value                  x28-x2F
-        u8      reserved3[80];          // Reserved                     x30-x7F
+        u8      reserved3[40];          // Reserved                     x30-x57
+        volatile u8 vphn_assoc_counts[8]; // Virtual processor home node
+                                        // associativity change counters x58-x5F
+        u8      reserved4[32];          // Reserved                     x60-x7F
 //=============================================================================
 // CACHE_LINE_2 0x0080 - 0x00FF Contains local read-write data
@@ -86,7 +105,7 @@ struct lppaca {
        // processing of external interrupts.  Note that PLIC will store the
        // XIRR directly into the xXirrValue field so that another XIRR will
        // not be presented until this one clears.  The layout of the low
-        // 4-bytes of this Dword is upto SLIC - PLIC just checks whether the
+        // 4-bytes of this Dword is up to SLIC - PLIC just checks whether the
        // entire Dword is zero or not.  A non-zero value in the low order
        // 2-bytes will result in SLIC being granted the highest thread
        // priority upon return.  A 0 will return to SLIC as medium priority.
@@ -153,6 +172,8 @@ struct lppaca {
 extern struct lppaca lppaca[];
+#define lppaca_of(cpu)  (*paca[cpu].lppaca_ptr)
 /*
 * SLB shadow buffer structure as defined in the PAPR.  The save_area
 * contains adjacent ESID and VSID pairs for each shadowed SLB.  The
@@ -170,6 +191,35 @@ struct slb_shadow {
 extern struct slb_shadow slb_shadow[];
+/*
+ * Layout of entries in the hypervisor's dispatch trace log buffer.
+ */
+struct dtl_entry {
+        u8      dispatch_reason;
+        u8      preempt_reason;
+        u16     processor_id;
+        u32     enqueue_to_dispatch_time;
+        u32     ready_to_enqueue_time;
+        u32     waiting_to_ready_time;
+        u64     timebase;
+        u64     fault_addr;
+        u64     srr0;
+        u64     srr1;
+};
+#define DISPATCH_LOG_BYTES      4096    /* bytes per cpu */
+#define N_DISPATCH_LOG          (DISPATCH_LOG_BYTES / sizeof(struct dtl_entry))
+extern struct kmem_cache *dtl_cache;
+/*
+ * When CONFIG_VIRT_CPU_ACCOUNTING = y, the cpu accounting code controls
+ * reading from the dispatch trace log.  If other code wants to consume
+ * DTL entries, it can set this pointer to a function that will get
+ * called once for each DTL entry that gets processed.
+ */
+extern void (*dtl_consumer)(struct dtl_entry *entry, u64 index);
 #endif /* CONFIG_PPC_BOOK3S */
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_LPPACA_H */
diff --git a/arch/powerpc/include/asm/machdep.h b/arch/powerpc/include/asm/machdep.h
index adc8e6cdf339..47cacddb14cf 100644
--- a/arch/powerpc/include/asm/machdep.h
+++ b/arch/powerpc/include/asm/machdep.h
@@ -27,24 +27,7 @@ struct iommu_table;
 struct rtc_time;
 struct file;
 struct pci_controller;
-#ifdef CONFIG_KEXEC
 struct kimage;
-#endif
-#ifdef CONFIG_SMP
-struct smp_ops_t {
-        void  (*message_pass)(int target, int msg);
-        int   (*probe)(void);
-        void  (*kick_cpu)(int nr);
-        void  (*setup_cpu)(int nr);
-        void  (*take_timebase)(void);
-        void  (*give_timebase)(void);
-        int   (*cpu_enable)(unsigned int nr);
-        int   (*cpu_disable)(void);
-        void  (*cpu_die)(unsigned int nr);
-        int   (*cpu_bootable)(unsigned int nr);
-};
-#endif
 struct machdep_calls {
        char            *name;
@@ -72,7 +55,7 @@ struct machdep_calls {
                                             int psize, int ssize);
        void            (*flush_hash_range)(unsigned long number, int local);
-        /* special for kexec, to be called in real mode, linar mapping is
+        /* special for kexec, to be called in real mode, linear mapping is
         * destroyed as well */
        void            (*hpte_clear_all)(void);
@@ -102,6 +85,9 @@ struct machdep_calls {
        void            (*pci_dma_dev_setup)(struct pci_dev *dev);
        void            (*pci_dma_bus_setup)(struct pci_bus *bus);
+        /* Platform set_dma_mask override */
+        int             (*dma_set_mask)(struct device *dev, u64 dma_mask);
        int             (*probe)(void);
        void            (*setup_arch)(void); /* Optional, may be NULL */
        void            (*init_early)(void);
@@ -115,9 +101,6 @@ struct machdep_calls {
         * If for some reason there is no irq, but the interrupt
         * shouldn't be counted as spurious, return NO_IRQ_IGNORE. */
        unsigned int    (*get_irq)(void);
-#ifdef CONFIG_KEXEC
-        void            (*kexec_cpu_down)(int crash_shutdown, int secondary);
-#endif
        /* PCI stuff */
        /* Called after scanning the bus, before allocating resources */
@@ -234,11 +217,7 @@ struct machdep_calls {
        void (*machine_shutdown)(void);
 #ifdef CONFIG_KEXEC
-        /* Called to do the minimal shutdown needed to run a kexec'd kernel
+        void (*kexec_cpu_down)(int crash_shutdown, int secondary);
-         * to run successfully.
-         * XXX Should we move this one out of kexec scope?
-         */
-        void (*machine_crash_shutdown)(struct pt_regs *regs);
        /* Called to do what every setup is needed on image and the
         * reboot code buffer. Returns 0 on success.
@@ -247,9 +226,6 @@ struct machdep_calls {
         */
        int (*machine_kexec_prepare)(struct kimage *image);
-        /* Called to handle any machine specific cleanup on image */
-        void (*machine_kexec_cleanup)(struct kimage *image);
        /* Called to perform the _real_ kexec.
         * Do NOT allocate memory or fail here. We are past the point of
         * no return.
@@ -276,7 +252,7 @@ struct machdep_calls {
 extern void e500_idle(void);
 extern void power4_idle(void);
-extern void power4_cpu_offline_powersave(void);
+extern void power7_idle(void);
 extern void ppc6xx_idle(void);
 extern void book3e_idle(void);
@@ -321,14 +297,6 @@ extern sys_ctrler_t sys_ctrler;
 #endif /* CONFIG_PPC_PMAC */
-extern void setup_pci_ptrs(void);
-#ifdef CONFIG_SMP
-/* Poor default implementations */
-extern void __devinit smp_generic_give_timebase(void);
-extern void __devinit smp_generic_take_timebase(void);
-#endif /* CONFIG_SMP */
 /* Functions to produce codes on the leds.
 * The SRC code should be unique for the message category and should
diff --git a/arch/powerpc/include/asm/memblock.h b/arch/powerpc/include/asm/memblock.h
index 3c29728b56b1..43efc345065e 100644
--- a/arch/powerpc/include/asm/memblock.h
+++ b/arch/powerpc/include/asm/memblock.h
@@ -5,11 +5,4 @@
 #define MEMBLOCK_DBG(fmt...) udbg_printf(fmt)
-#ifdef CONFIG_PPC32
-extern phys_addr_t lowmem_end_addr;
-#define MEMBLOCK_REAL_LIMIT     lowmem_end_addr
-#else
-#define MEMBLOCK_REAL_LIMIT     0
-#endif
 #endif /* _ASM_POWERPC_MEMBLOCK_H */
diff --git a/arch/powerpc/include/asm/mmu-book3e.h b/arch/powerpc/include/asm/mmu-book3e.h
index 87a1d787c5b6..3ea0f9a259d8 100644
--- a/arch/powerpc/include/asm/mmu-book3e.h
+++ b/arch/powerpc/include/asm/mmu-book3e.h
@@ -40,9 +40,10 @@
 /* MAS registers bit definitions */
-#define MAS0_TLBSEL(x)          ((x << 28) & 0x30000000)
+#define MAS0_TLBSEL(x)          (((x) << 28) & 0x30000000)
-#define MAS0_ESEL(x)            ((x << 16) & 0x0FFF0000)
+#define MAS0_ESEL(x)            (((x) << 16) & 0x0FFF0000)
 #define MAS0_NV(x)              ((x) & 0x00000FFF)
+#define MAS0_ESEL_MASK          0x0FFF0000
 #define MAS0_HES                0x00004000
 #define MAS0_WQ_ALLWAYS         0x00000000
 #define MAS0_WQ_COND            0x00001000
@@ -50,12 +51,12 @@
 #define MAS1_VALID              0x80000000
 #define MAS1_IPROT              0x40000000
-#define MAS1_TID(x)             ((x << 16) & 0x3FFF0000)
+#define MAS1_TID(x)             (((x) << 16) & 0x3FFF0000)
 #define MAS1_IND                0x00002000
 #define MAS1_TS                 0x00001000
 #define MAS1_TSIZE_MASK         0x00000f80
 #define MAS1_TSIZE_SHIFT        7
-#define MAS1_TSIZE(x)           ((x << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
+#define MAS1_TSIZE(x)           (((x) << MAS1_TSIZE_SHIFT) & MAS1_TSIZE_MASK)
 #define MAS2_EPN                0xFFFFF000
 #define MAS2_X0                 0x00000040
@@ -114,6 +115,17 @@
 #define MAS7_RPN                0xFFFFFFFF
+/* Bit definitions for MMUCFG */
+#define MMUCFG_MAVN     0x00000003      /* MMU Architecture Version Number */
+#define MMUCFG_MAVN_V1  0x00000000      /* v1.0 */
+#define MMUCFG_MAVN_V2  0x00000001      /* v2.0 */
+#define MMUCFG_NTLBS    0x0000000c      /* Number of TLBs */
+#define MMUCFG_PIDSIZE  0x000007c0      /* PID Reg Size */
+#define MMUCFG_TWC      0x00008000      /* TLB Write Conditional (v2.0) */
+#define MMUCFG_LRAT     0x00010000      /* LRAT Supported (v2.0) */
+#define MMUCFG_RASIZE   0x00fe0000      /* Real Addr Size */
+#define MMUCFG_LPIDSIZE 0x0f000000      /* LPID Reg Size */
 /* Bit definitions for MMUCSR0 */
 #define MMUCSR0_TLB1FI  0x00000002      /* TLB1 Flash invalidate */
 #define MMUCSR0_TLB0FI  0x00000004      /* TLB0 Flash invalidate */
@@ -126,6 +138,21 @@
 #define MMUCSR0_TLB2PS  0x00078000      /* TLB2 Page Size */
 #define MMUCSR0_TLB3PS  0x00780000      /* TLB3 Page Size */
+/* MMUCFG bits */
+#define MMUCFG_MAVN_NASK        0x00000003
+#define MMUCFG_MAVN_V1_0        0x00000000
+#define MMUCFG_MAVN_V2_0        0x00000001
+#define MMUCFG_NTLB_MASK        0x0000000c
+#define MMUCFG_NTLB_SHIFT       2
+#define MMUCFG_PIDSIZE_MASK     0x000007c0
+#define MMUCFG_PIDSIZE_SHIFT    6
+#define MMUCFG_TWC              0x00008000
+#define MMUCFG_LRAT             0x00010000
+#define MMUCFG_RASIZE_MASK      0x00fe0000
+#define MMUCFG_RASIZE_SHIFT     17
+#define MMUCFG_LPIDSIZE_MASK    0x0f000000
+#define MMUCFG_LPIDSIZE_SHIFT   24
 /* TLBnCFG encoding */
 #define TLBnCFG_N_ENTRY         0x00000fff      /* number of entries */
 #define TLBnCFG_HES             0x00002000      /* HW select supported */
@@ -133,6 +160,10 @@
 #define TLBnCFG_GTWE            0x00010000      /* Guest can write */
 #define TLBnCFG_IND             0x00020000      /* IND entries supported */
 #define TLBnCFG_PT              0x00040000      /* Can load from page table */
+#define TLBnCFG_MINSIZE         0x00f00000      /* Minimum Page Size (v1.0) */
+#define TLBnCFG_MINSIZE_SHIFT   20
+#define TLBnCFG_MAXSIZE         0x000f0000      /* Maximum Page Size (v1.0) */
+#define TLBnCFG_MAXSIZE_SHIFT   16
 #define TLBnCFG_ASSOC           0xff000000      /* Associativity */
 /* TLBnPS encoding */
@@ -214,6 +245,10 @@ extern struct mmu_psize_def mmu_psize_defs[MMU_PAGE_COUNT];
 extern int mmu_linear_psize;
 extern int mmu_vmemmap_psize;
+#ifdef CONFIG_PPC64
+extern unsigned long linear_map_top;
+#endif
 #endif /* !__ASSEMBLY__ */
 #endif /* _ASM_POWERPC_MMU_BOOK3E_H_ */
diff --git a/arch/powerpc/include/asm/mmu-hash64.h b/arch/powerpc/include/asm/mmu-hash64.h
index acac35d5b382..d865bd909c7d 100644
--- a/arch/powerpc/include/asm/mmu-hash64.h
+++ b/arch/powerpc/include/asm/mmu-hash64.h
@@ -27,7 +27,7 @@
 #define STE_VSID_SHIFT  12
 /* Location of cpu0's segment table */
-#define STAB0_PAGE      0x6
+#define STAB0_PAGE      0x8
 #define STAB0_OFFSET    (STAB0_PAGE << 12)
 #define STAB0_PHYS_ADDR (STAB0_OFFSET + PHYSICAL_START)
@@ -408,6 +408,7 @@ static inline void subpage_prot_init_new_context(struct mm_struct *mm) { }
 #endif /* CONFIG_PPC_SUBPAGE_PROT */
 typedef unsigned long mm_context_id_t;
+struct spinlock;
 typedef struct {
        mm_context_id_t id;
@@ -423,6 +424,11 @@ typedef struct {
 #ifdef CONFIG_PPC_SUBPAGE_PROT
        struct subpage_prot_table spt;
 #endif /* CONFIG_PPC_SUBPAGE_PROT */
+#ifdef CONFIG_PPC_ICSWX
+        struct spinlock *cop_lockp; /* guard acop and cop_pid */
+        unsigned long acop;     /* mask of enabled coprocessor types */
+        unsigned int cop_pid;   /* pid value used with coprocessors */
+#endif /* CONFIG_PPC_ICSWX */
 } mm_context_t;
diff --git a/arch/powerpc/include/asm/mmu.h b/arch/powerpc/include/asm/mmu.h
index 7ebf42ed84a2..4138b21ae80a 100644
--- a/arch/powerpc/include/asm/mmu.h
+++ b/arch/powerpc/include/asm/mmu.h
@@ -2,6 +2,8 @@
 #define _ASM_POWERPC_MMU_H_
 #ifdef __KERNEL__
+#include <linux/types.h>
 #include <asm/asm-compat.h>
 #include <asm/feature-fixups.h>
@@ -54,11 +56,6 @@
 */
 #define MMU_FTR_NEED_DTLB_SW_LRU        ASM_CONST(0x00200000)
-/* This indicates that the processor uses the ISA 2.06 server tlbie
- * mnemonics
- */
-#define MMU_FTR_TLBIE_206               ASM_CONST(0x00400000)
 /* Enable use of TLB reservation.  Processor should support tlbsrx.
 * instruction and MAS0[WQ].
 */
@@ -68,6 +65,53 @@
 */
 #define MMU_FTR_USE_PAIRED_MAS          ASM_CONST(0x01000000)
+/* MMU is SLB-based
+ */
+#define MMU_FTR_SLB                     ASM_CONST(0x02000000)
+/* Support 16M large pages
+ */
+#define MMU_FTR_16M_PAGE                ASM_CONST(0x04000000)
+/* Supports TLBIEL variant
+ */
+#define MMU_FTR_TLBIEL                  ASM_CONST(0x08000000)
+/* Supports tlbies w/o locking
+ */
+#define MMU_FTR_LOCKLESS_TLBIE          ASM_CONST(0x10000000)
+/* Large pages can be marked CI
+ */
+#define MMU_FTR_CI_LARGE_PAGE           ASM_CONST(0x20000000)
+/* 1T segments available
+ */
+#define MMU_FTR_1T_SEGMENT              ASM_CONST(0x40000000)
+/* Doesn't support the B bit (1T segment) in SLBIE
+ */
+#define MMU_FTR_NO_SLBIE_B              ASM_CONST(0x80000000)
+/* MMU feature bit sets for various CPUs */
+#define MMU_FTRS_DEFAULT_HPTE_ARCH_V2   \
+        MMU_FTR_HPTE_TABLE | MMU_FTR_PPCAS_ARCH_V2
+#define MMU_FTRS_POWER4         MMU_FTRS_DEFAULT_HPTE_ARCH_V2
+#define MMU_FTRS_PPC970         MMU_FTRS_POWER4
+#define MMU_FTRS_POWER5         MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
+#define MMU_FTRS_POWER6         MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
+#define MMU_FTRS_POWER7         MMU_FTRS_POWER4 | MMU_FTR_LOCKLESS_TLBIE
+#define MMU_FTRS_CELL           MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
+                                MMU_FTR_CI_LARGE_PAGE
+#define MMU_FTRS_PA6T           MMU_FTRS_DEFAULT_HPTE_ARCH_V2 | \
+                                MMU_FTR_CI_LARGE_PAGE | MMU_FTR_NO_SLBIE_B
+#define MMU_FTRS_A2             MMU_FTR_TYPE_3E | MMU_FTR_USE_TLBILX | \
+                                MMU_FTR_USE_TLBIVAX_BCAST | \
+                                MMU_FTR_LOCK_BCAST_INVAL | \
+                                MMU_FTR_USE_TLBRSRV | \
+                                MMU_FTR_USE_PAIRED_MAS | \
+                                MMU_FTR_TLBIEL | \
+                                MMU_FTR_16M_PAGE
 #ifndef __ASSEMBLY__
 #include <asm/cputable.h>
@@ -82,6 +126,16 @@ extern unsigned int __start___mmu_ftr_fixup, __stop___mmu_ftr_fixup;
 extern void early_init_mmu(void);
 extern void early_init_mmu_secondary(void);
+extern void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                       phys_addr_t first_memblock_size);
+#ifdef CONFIG_PPC64
+/* This is our real memory area size on ppc64 server, on embedded, we
+ * make it match the size our of bolted TLB area
+ */
+extern u64 ppc64_rma_size;
+#endif /* CONFIG_PPC64 */
 #endif /* !__ASSEMBLY__ */
 /* The kernel use the constants below to index in the page sizes array.
diff --git a/arch/powerpc/include/asm/mmu_context.h b/arch/powerpc/include/asm/mmu_context.h
index 81fb41289d6c..a73668a5f30d 100644
--- a/arch/powerpc/include/asm/mmu_context.h
+++ b/arch/powerpc/include/asm/mmu_context.h
@@ -32,6 +32,10 @@ extern void __destroy_context(unsigned long context_id);
 extern void mmu_context_init(void);
 #endif
+extern void switch_cop(struct mm_struct *next);
+extern int use_cop(unsigned long acop, struct mm_struct *mm);
+extern void drop_cop(unsigned long acop, struct mm_struct *mm);
 /*
 * switch_mm is the entry point called from the architecture independent
 * code in kernel/sched.c
@@ -55,6 +59,12 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
        if (prev == next)
                return;
+#ifdef CONFIG_PPC_ICSWX
+        /* Switch coprocessor context only if prev or next uses a coprocessor */
+        if (prev->context.acop || next->context.acop)
+                switch_cop(next);
+#endif /* CONFIG_PPC_ICSWX */
        /* We must stop all altivec streams before changing the HW
         * context
         */
@@ -67,7 +77,7 @@ static inline void switch_mm(struct mm_struct *prev, struct mm_struct *next,
         * sub architectures.
         */
 #ifdef CONFIG_PPC_STD_MMU_64
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                switch_slb(tsk, next);
        else
                switch_stab(tsk, next);
diff --git a/arch/powerpc/include/asm/mmzone.h b/arch/powerpc/include/asm/mmzone.h
index aac87cbceb57..7b589178be46 100644
--- a/arch/powerpc/include/asm/mmzone.h
+++ b/arch/powerpc/include/asm/mmzone.h
@@ -33,15 +33,13 @@ extern int numa_cpu_lookup_table[];
 extern cpumask_var_t node_to_cpumask_map[];
 #ifdef CONFIG_MEMORY_HOTPLUG
 extern unsigned long max_pfn;
+u64 memory_hotplug_max(void);
+#else
+#define memory_hotplug_max() memblock_end_of_DRAM()
 #endif
-/*
+#else
- * Following are macros that each numa implmentation must define.
+#define memory_hotplug_max() memblock_end_of_DRAM()
- */
-#define node_start_pfn(nid)     (NODE_DATA(nid)->node_start_pfn)
-#define node_end_pfn(nid)       (NODE_DATA(nid)->node_end_pfn)
 #endif /* CONFIG_NEED_MULTIPLE_NODES */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/mpic.h b/arch/powerpc/include/asm/mpic.h
index e000cce8f6dd..df18989e78d4 100644
--- a/arch/powerpc/include/asm/mpic.h
+++ b/arch/powerpc/include/asm/mpic.h
@@ -3,7 +3,6 @@
 #ifdef __KERNEL__
 #include <linux/irq.h>
-#include <linux/sysdev.h>
 #include <asm/dcr.h>
 #include <asm/msi_bitmap.h>
@@ -263,6 +262,7 @@ struct mpic
 #ifdef CONFIG_SMP
        struct irq_chip         hc_ipi;
 #endif
+        struct irq_chip         hc_tm;
        const char              *name;
        /* Flags */
        unsigned int            flags;
@@ -281,7 +281,7 @@ struct mpic
        /* vector numbers used for internal sources (ipi/timers) */
        unsigned int            ipi_vecs[4];
-        unsigned int            timer_vecs[4];
+        unsigned int            timer_vecs[8];
        /* Spurious vector to program into unused sources */
        unsigned int            spurious_vec;
@@ -320,8 +320,6 @@ struct mpic
        /* link */
        struct mpic             *next;
-        struct sys_device       sysdev;
 #ifdef CONFIG_PM
        struct mpic_irq_save    *save_data;
 #endif
@@ -367,6 +365,12 @@ struct mpic
 #define MPIC_SINGLE_DEST_CPU            0x00001000
 /* Enable CoreInt delivery of interrupts */
 #define MPIC_ENABLE_COREINT             0x00002000
+/* Disable resetting of the MPIC.
+ * NOTE: This flag trumps MPIC_WANTS_RESET.
+ */
+#define MPIC_NO_RESET                   0x00004000
+/* Freescale MPIC (compatible includes "fsl,mpic") */
+#define MPIC_FSL                        0x00008000
 /* MPIC HW modification ID */
 #define MPIC_REGSET_MASK                0xf0000000
@@ -467,11 +471,11 @@ extern void mpic_request_ipis(void);
 void smp_mpic_message_pass(int target, int msg);
 /* Unmask a specific virq */
-extern void mpic_unmask_irq(unsigned int irq);
+extern void mpic_unmask_irq(struct irq_data *d);
 /* Mask a specific virq */
-extern void mpic_mask_irq(unsigned int irq);
+extern void mpic_mask_irq(struct irq_data *d);
 /* EOI a specific virq */
-extern void mpic_end_irq(unsigned int irq);
+extern void mpic_end_irq(struct irq_data *d);
 /* Fetch interrupt from a given mpic */
 extern unsigned int mpic_get_one_irq(struct mpic *mpic);
diff --git a/arch/powerpc/include/asm/nvram.h b/arch/powerpc/include/asm/nvram.h
index 850b72f27445..9d1aafe607c7 100644
--- a/arch/powerpc/include/asm/nvram.h
+++ b/arch/powerpc/include/asm/nvram.h
@@ -10,31 +10,7 @@
 #ifndef _ASM_POWERPC_NVRAM_H
 #define _ASM_POWERPC_NVRAM_H
-#include <linux/errno.h>
+/* Signatures for nvram partitions */
-#define NVRW_CNT 0x20
-#define NVRAM_HEADER_LEN 16 /* sizeof(struct nvram_header) */
-#define NVRAM_BLOCK_LEN 16
-#define NVRAM_MAX_REQ (2080/NVRAM_BLOCK_LEN)
-#define NVRAM_MIN_REQ (1056/NVRAM_BLOCK_LEN)
-#define NVRAM_AS0  0x74
-#define NVRAM_AS1  0x75
-#define NVRAM_DATA 0x77
-/* RTC Offsets */
-#define MOTO_RTC_SECONDS        0x1FF9
-#define MOTO_RTC_MINUTES        0x1FFA
-#define MOTO_RTC_HOURS          0x1FFB
-#define MOTO_RTC_DAY_OF_WEEK    0x1FFC
-#define MOTO_RTC_DAY_OF_MONTH   0x1FFD
-#define MOTO_RTC_MONTH          0x1FFE
-#define MOTO_RTC_YEAR           0x1FFF
-#define MOTO_RTC_CONTROLA       0x1FF8
-#define MOTO_RTC_CONTROLB       0x1FF9
 #define NVRAM_SIG_SP    0x02    /* support processor */
 #define NVRAM_SIG_OF    0x50    /* open firmware config */
 #define NVRAM_SIG_FW    0x51    /* general firmware */
@@ -49,32 +25,19 @@
 #define NVRAM_SIG_OS    0xa0    /* OS defined */
 #define NVRAM_SIG_PANIC 0xa1    /* Apple OSX "panic" */
-/* If change this size, then change the size of NVNAME_LEN */
-struct nvram_header {
-        unsigned char signature;
-        unsigned char checksum;
-        unsigned short length;
-        char name[12];
-};
 #ifdef __KERNEL__
+#include <linux/errno.h>
 #include <linux/list.h>
-struct nvram_partition {
+#ifdef CONFIG_PPC_PSERIES
-        struct list_head partition;
-        struct nvram_header header;
-        unsigned int index;
-};
 extern int nvram_write_error_log(char * buff, int length,
                                         unsigned int err_type, unsigned int err_seq);
 extern int nvram_read_error_log(char * buff, int length,
                                         unsigned int * err_type, unsigned int *err_seq);
 extern int nvram_clear_error_log(void);
 extern int pSeries_nvram_init(void);
+#endif /* CONFIG_PPC_PSERIES */
 #ifdef CONFIG_MMIO_NVRAM
 extern int mmio_nvram_init(void);
@@ -85,6 +48,14 @@ static inline int mmio_nvram_init(void)
 }
 #endif
+extern int __init nvram_scan_partitions(void);
+extern loff_t nvram_create_partition(const char *name, int sig,
+                                     int req_size, int min_size);
+extern int nvram_remove_partition(const char *name, int sig,
+                                        const char *exceptions[]);
+extern int nvram_get_partition_size(loff_t data_index);
+extern loff_t nvram_find_partition(const char *name, int sig, int *out_size);
 #endif /* __KERNEL__ */
 /* PowerMac specific nvram stuffs */
diff --git a/arch/powerpc/include/asm/pSeries_reconfig.h b/arch/powerpc/include/asm/pSeries_reconfig.h
index d4b4bfa26fb3..89d2f99c1bf4 100644
--- a/arch/powerpc/include/asm/pSeries_reconfig.h
+++ b/arch/powerpc/include/asm/pSeries_reconfig.h
@@ -18,13 +18,18 @@
 extern int pSeries_reconfig_notifier_register(struct notifier_block *);
 extern void pSeries_reconfig_notifier_unregister(struct notifier_block *);
 extern struct blocking_notifier_head pSeries_reconfig_chain;
+/* Not the best place to put this, will be fixed when we move some
+ * of the rtas suspend-me stuff to pseries */
+extern void pSeries_coalesce_init(void);
 #else /* !CONFIG_PPC_PSERIES */
 static inline int pSeries_reconfig_notifier_register(struct notifier_block *nb)
 {
        return 0;
 }
 static inline void pSeries_reconfig_notifier_unregister(struct notifier_block *nb) { }
+static inline void pSeries_coalesce_init(void) { }
 #endif /* CONFIG_PPC_PSERIES */
 #endif /* __KERNEL__ */
 #endif /* _PPC64_PSERIES_RECONFIG_H */
diff --git a/arch/powerpc/include/asm/paca.h b/arch/powerpc/include/asm/paca.h
index 1ff6662f7faf..74126765106a 100644
--- a/arch/powerpc/include/asm/paca.h
+++ b/arch/powerpc/include/asm/paca.h
@@ -85,14 +85,16 @@ struct paca_struct {
        u8 kexec_state;         /* set when kexec down has irqs off */
 #ifdef CONFIG_PPC_STD_MMU_64
        struct slb_shadow *slb_shadow_ptr;
+        struct dtl_entry *dispatch_log;
+        struct dtl_entry *dispatch_log_end;
        /*
         * Now, starting in cacheline 2, the exception save areas
         */
        /* used for most interrupts/exceptions */
-        u64 exgen[10] __attribute__((aligned(0x80)));
+        u64 exgen[11] __attribute__((aligned(0x80)));
-        u64 exmc[10];           /* used for machine checks */
+        u64 exmc[11];           /* used for machine checks */
-        u64 exslb[10];          /* used for SLB/segment table misses
+        u64 exslb[11];          /* used for SLB/segment table misses
                                 * on the linear mapping */
        /* SLB related definitions */
        u16 vmalloc_sllp;
@@ -104,7 +106,8 @@ struct paca_struct {
        pgd_t *pgd;                     /* Current PGD */
        pgd_t *kernel_pgd;              /* Kernel PGD */
        u64 exgen[8] __attribute__((aligned(0x80)));
-        u64 extlb[EX_TLB_SIZE*3] __attribute__((aligned(0x80)));
+        /* We can have up to 3 levels of reentrancy in the TLB miss handler */
+        u64 extlb[3][EX_TLB_SIZE / sizeof(u64)] __attribute__((aligned(0x80)));
        u64 exmc[8];            /* used for machine checks */
        u64 excrit[8];          /* used for crit interrupts */
        u64 exdbg[8];           /* used for debug interrupts */
@@ -123,19 +126,25 @@ struct paca_struct {
        struct task_struct *__current;  /* Pointer to current */
        u64 kstack;                     /* Saved Kernel stack addr */
        u64 stab_rr;                    /* stab/slb round-robin counter */
-        u64 saved_r1;                   /* r1 save for RTAS calls */
+        u64 saved_r1;                   /* r1 save for RTAS calls or PM */
        u64 saved_msr;                  /* MSR saved here by enter_rtas */
        u16 trap_save;                  /* Used when bad stack is encountered */
        u8 soft_enabled;                /* irq soft-enable flag */
        u8 hard_enabled;                /* set if irqs are enabled in MSR */
        u8 io_sync;                     /* writel() needs spin_unlock sync */
-        u8 perf_event_pending;          /* PM interrupt while soft-disabled */
+        u8 irq_work_pending;            /* IRQ_WORK interrupt while soft-disable */
        /* Stuff for accurate time accounting */
        u64 user_time;                  /* accumulated usermode TB ticks */
        u64 system_time;                /* accumulated system TB ticks */
-        u64 startpurr;                  /* PURR/TB value snapshot */
+        u64 user_time_scaled;           /* accumulated usermode SPURR ticks */
+        u64 starttime;                  /* TB value snapshot */
+        u64 starttime_user;             /* TB value on exit to usermode */
        u64 startspurr;                 /* SPURR value snapshot */
+        u64 utime_sspurr;               /* ->user_time when ->startspurr set */
+        u64 stolen_time;                /* TB ticks taken by hypervisor */
+        u64 dtl_ridx;                   /* read index in dispatch log */
+        struct dtl_entry *dtl_curr;     /* pointer corresponding to dtl_ridx */
 #ifdef CONFIG_KVM_BOOK3S_HANDLER
        /* We use this to store guest state in */
diff --git a/arch/powerpc/include/asm/page.h b/arch/powerpc/include/asm/page.h
index 53b64be40eb2..2cd664ef0a5e 100644
--- a/arch/powerpc/include/asm/page.h
+++ b/arch/powerpc/include/asm/page.h
@@ -100,8 +100,8 @@ extern phys_addr_t kernstart_addr;
 #endif
 #ifdef CONFIG_FLATMEM
-#define ARCH_PFN_OFFSET         (MEMORY_START >> PAGE_SHIFT)
+#define ARCH_PFN_OFFSET         ((unsigned long)(MEMORY_START >> PAGE_SHIFT))
-#define pfn_valid(pfn)          ((pfn) >= ARCH_PFN_OFFSET && (pfn) < (ARCH_PFN_OFFSET + max_mapnr))
+#define pfn_valid(pfn)          ((pfn) >= ARCH_PFN_OFFSET && (pfn) < max_mapnr)
 #endif
 #define virt_to_page(kaddr)     pfn_to_page(__pa(kaddr) >> PAGE_SHIFT)
diff --git a/arch/powerpc/include/asm/page_64.h b/arch/powerpc/include/asm/page_64.h
index 358ff14ea25e..9356262fd3cc 100644
--- a/arch/powerpc/include/asm/page_64.h
+++ b/arch/powerpc/include/asm/page_64.h
@@ -59,24 +59,7 @@ static __inline__ void clear_page(void *addr)
        : "ctr", "memory");
 }
-extern void copy_4K_page(void *to, void *from);
+extern void copy_page(void *to, void *from);
-#ifdef CONFIG_PPC_64K_PAGES
-static inline void copy_page(void *to, void *from)
-{
-        unsigned int i;
-        for (i=0; i < (1 << (PAGE_SHIFT - 12)); i++) {
-                copy_4K_page(to, from);
-                to += 4096;
-                from += 4096;
-        }
-}
-#else /* CONFIG_PPC_64K_PAGES */
-static inline void copy_page(void *to, void *from)
-{
-        copy_4K_page(to, from);
-}
-#endif /* CONFIG_PPC_64K_PAGES */
 /* Log 2 of page table size */
 extern u64 ppc64_pft_size;
@@ -130,7 +113,7 @@ extern void slice_set_user_psize(struct mm_struct *mm, unsigned int psize);
 extern void slice_set_range_psize(struct mm_struct *mm, unsigned long start,
                                  unsigned long len, unsigned int psize);
-#define slice_mm_new_context(mm)        ((mm)->context.id == 0)
+#define slice_mm_new_context(mm)        ((mm)->context.id == MMU_NO_CONTEXT)
 #endif /* __ASSEMBLY__ */
 #else
@@ -163,13 +146,13 @@ do {						\
 #endif /* !CONFIG_HUGETLB_PAGE */
 #define VM_DATA_DEFAULT_FLAGS \
-        (test_thread_flag(TIF_32BIT) ? \
+        (is_32bit_task() ? \
         VM_DATA_DEFAULT_FLAGS32 : VM_DATA_DEFAULT_FLAGS64)
 /*
 * This is the default if a program doesn't have a PT_GNU_STACK
 * program header entry. The PPC64 ELF ABI has a non executable stack
- * stack by default, so in the absense of a PT_GNU_STACK program header
+ * stack by default, so in the absence of a PT_GNU_STACK program header
 * we turn execute permission off.
 */
 #define VM_STACK_DEFAULT_FLAGS32        (VM_READ | VM_WRITE | VM_EXEC | \
@@ -179,7 +162,7 @@ do {						\
                                         VM_MAYREAD | VM_MAYWRITE | VM_MAYEXEC)
 #define VM_STACK_DEFAULT_FLAGS \
-        (test_thread_flag(TIF_32BIT) ? \
+        (is_32bit_task() ? \
         VM_STACK_DEFAULT_FLAGS32 : VM_STACK_DEFAULT_FLAGS64)
 #include <asm-generic/getorder.h>
diff --git a/arch/powerpc/include/asm/pasemi_dma.h b/arch/powerpc/include/asm/pasemi_dma.h
index 19fd7933e2d9..eafa5a5f56de 100644
--- a/arch/powerpc/include/asm/pasemi_dma.h
+++ b/arch/powerpc/include/asm/pasemi_dma.h
@@ -522,7 +522,7 @@ extern void *pasemi_dma_alloc_buf(struct pasemi_dmachan *chan, int size,
 extern void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size,
                                dma_addr_t *handle);
-/* Routines to allocate flags (events) for channel syncronization */
+/* Routines to allocate flags (events) for channel synchronization */
 extern int  pasemi_dma_alloc_flag(void);
 extern void pasemi_dma_free_flag(int flag);
 extern void pasemi_dma_set_flag(int flag);
diff --git a/arch/powerpc/include/asm/pci-bridge.h b/arch/powerpc/include/asm/pci-bridge.h
index 51e9e6f90d12..b90dbf8e5cd9 100644
--- a/arch/powerpc/include/asm/pci-bridge.h
+++ b/arch/powerpc/include/asm/pci-bridge.h
@@ -106,7 +106,7 @@ struct pci_controller {
         * Used for variants of PCI indirect handling and possible quirks:
         *  SET_CFG_TYPE - used on 4xx or any PHB that does explicit type0/1
         *  EXT_REG - provides access to PCI-e extended registers
-         *  SURPRESS_PRIMARY_BUS - we surpress the setting of PCI_PRIMARY_BUS
+         *  SURPRESS_PRIMARY_BUS - we suppress the setting of PCI_PRIMARY_BUS
         *   on Freescale PCI-e controllers since they used the PCI_PRIMARY_BUS
         *   to determine which bus number to match on when generating type0
         *   config cycles
@@ -164,13 +164,23 @@ extern void setup_indirect_pci(struct pci_controller* hose,
                               resource_size_t cfg_addr,
                               resource_size_t cfg_data, u32 flags);
-#ifndef CONFIG_PPC64
 static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
 {
        return bus->sysdata;
 }
+#ifndef CONFIG_PPC64
+static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
+{
+        struct pci_controller *host;
+        if (bus->self)
+                return pci_device_to_OF_node(bus->self);
+        host = pci_bus_to_host(bus);
+        return host ? host->dn : NULL;
+}
 static inline int isa_vaddr_is_ioport(void __iomem *address)
 {
        /* No specific ISA handling on ppc32 at this stage, it
@@ -218,19 +228,10 @@ extern void * update_dn_pci_info(struct device_node *dn, void *data);
 /* Get a device_node from a pci_dev.  This code must be fast except
 * in the case where the sysdata is incorrect and needs to be fixed
- * up (this will only happen once).
+ * up (this will only happen once). */
- * In this case the sysdata will have been inherited from a PCI host
- * bridge or a PCI-PCI bridge further up the tree, so it will point
- * to a valid struct pci_dn, just not the one we want.
- */
 static inline struct device_node *pci_device_to_OF_node(struct pci_dev *dev)
 {
-        struct device_node *dn = dev->sysdata;
+        return dev->dev.of_node ? dev->dev.of_node : fetch_dev_dn(dev);
-        struct pci_dn *pdn = dn->data;
-        if (pdn && pdn->devfn == dev->devfn && pdn->busno == dev->bus->number)
-                return dn;      /* fast path.  sysdata is good */
-        return fetch_dev_dn(dev);
 }
 static inline int pci_device_from_OF_node(struct device_node *np,
@@ -248,7 +249,7 @@ static inline struct device_node *pci_bus_to_OF_node(struct pci_bus *bus)
        if (bus->self)
                return pci_device_to_OF_node(bus->self);
        else
-                return bus->sysdata; /* Must be root bus (PHB) */
+                return bus->dev.of_node; /* Must be root bus (PHB) */
 }
 /** Find the bus corresponding to the indicated device node */
@@ -260,14 +261,6 @@ extern void pcibios_remove_pci_devices(struct pci_bus *bus);
 /** Discover new pci devices under this bus, and add them */
 extern void pcibios_add_pci_devices(struct pci_bus *bus);
-static inline struct pci_controller *pci_bus_to_host(const struct pci_bus *bus)
-{
-        struct device_node *busdn = bus->sysdata;
-        BUG_ON(busdn == NULL);
-        return PCI_DN(busdn)->phb;
-}
 extern void isa_bridge_find_early(struct pci_controller *hose);
diff --git a/arch/powerpc/include/asm/pci.h b/arch/powerpc/include/asm/pci.h
index a20a9ad2258b..7d7790954e02 100644
--- a/arch/powerpc/include/asm/pci.h
+++ b/arch/powerpc/include/asm/pci.h
@@ -201,7 +201,7 @@ extern void pci_resource_to_user(const struct pci_dev *dev, int bar,
 extern void pcibios_setup_bus_devices(struct pci_bus *bus);
 extern void pcibios_setup_bus_self(struct pci_bus *bus);
 extern void pcibios_setup_phb_io_space(struct pci_controller *hose);
-extern void pcibios_scan_phb(struct pci_controller *hose, void *sysdata);
+extern void pcibios_scan_phb(struct pci_controller *hose);
 #endif  /* __KERNEL__ */
 #endif /* __ASM_POWERPC_PCI_H */
diff --git a/arch/powerpc/include/asm/pgalloc.h b/arch/powerpc/include/asm/pgalloc.h
index abe8532bd14e..bf301ac62f35 100644
--- a/arch/powerpc/include/asm/pgalloc.h
+++ b/arch/powerpc/include/asm/pgalloc.h
@@ -31,14 +31,29 @@ static inline void pte_free(struct mm_struct *mm, pgtable_t ptepage)
 #endif
 #ifdef CONFIG_SMP
-extern void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift);
+struct mmu_gather;
-extern void pte_free_finish(void);
+extern void tlb_remove_table(struct mmu_gather *, void *);
+static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, int shift)
+{
+        unsigned long pgf = (unsigned long)table;
+        BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
+        pgf |= shift;
+        tlb_remove_table(tlb, (void *)pgf);
+}
+static inline void __tlb_remove_table(void *_table)
+{
+        void *table = (void *)((unsigned long)_table & ~MAX_PGTABLE_INDEX_SIZE);
+        unsigned shift = (unsigned long)_table & MAX_PGTABLE_INDEX_SIZE;
+        pgtable_free(table, shift);
+}
 #else /* CONFIG_SMP */
 static inline void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift)
 {
        pgtable_free(table, shift);
 }
-static inline void pte_free_finish(void) { }
 #endif /* !CONFIG_SMP */
 static inline void __pte_free_tlb(struct mmu_gather *tlb, struct page *ptepage,
diff --git a/arch/powerpc/include/asm/pgtable-ppc32.h b/arch/powerpc/include/asm/pgtable-ppc32.h
index a7db96f2b5c3..47edde8c3556 100644
--- a/arch/powerpc/include/asm/pgtable-ppc32.h
+++ b/arch/powerpc/include/asm/pgtable-ppc32.h
@@ -308,12 +308,8 @@ static inline void __ptep_set_access_flags(pte_t *ptep, pte_t entry)
 #define pte_offset_kernel(dir, addr)    \
        ((pte_t *) pmd_page_vaddr(*(dir)) + pte_index(addr))
 #define pte_offset_map(dir, addr)               \
-        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE0) + pte_index(addr))
+        ((pte_t *) kmap_atomic(pmd_page(*(dir))) + pte_index(addr))
-#define pte_offset_map_nested(dir, addr)        \
+#define pte_unmap(pte)          kunmap_atomic(pte)
-        ((pte_t *) kmap_atomic(pmd_page(*(dir)), KM_PTE1) + pte_index(addr))
-#define pte_unmap(pte)          kunmap_atomic(pte, KM_PTE0)
-#define pte_unmap_nested(pte)   kunmap_atomic(pte, KM_PTE1)
 /*
 * Encode and decode a swap entry.
diff --git a/arch/powerpc/include/asm/pgtable-ppc64.h b/arch/powerpc/include/asm/pgtable-ppc64.h
index 49865045d56f..81576ee0cfb1 100644
--- a/arch/powerpc/include/asm/pgtable-ppc64.h
+++ b/arch/powerpc/include/asm/pgtable-ppc64.h
@@ -193,9 +193,7 @@
  (((pte_t *) pmd_page_vaddr(*(dir))) + (((addr) >> PAGE_SHIFT) & (PTRS_PER_PTE - 1)))
 #define pte_offset_map(dir,addr)        pte_offset_kernel((dir), (addr))
-#define pte_offset_map_nested(dir,addr) pte_offset_kernel((dir), (addr))
 #define pte_unmap(pte)                  do { } while(0)
-#define pte_unmap_nested(pte)           do { } while(0)
 /* to find an entry in a kernel page-table-directory */
 /* This now only contains the vmalloc pages */
@@ -259,21 +257,20 @@ static inline int __ptep_test_and_clear_young(struct mm_struct *mm,
 static inline void ptep_set_wrprotect(struct mm_struct *mm, unsigned long addr,
                                      pte_t *ptep)
 {
-        unsigned long old;
-        if ((pte_val(*ptep) & _PAGE_RW) == 0)
+        if ((pte_val(*ptep) & _PAGE_RW) == 0)
-                return;
+                return;
-        old = pte_update(mm, addr, ptep, _PAGE_RW, 0);
+        pte_update(mm, addr, ptep, _PAGE_RW, 0);
 }
 static inline void huge_ptep_set_wrprotect(struct mm_struct *mm,
                                           unsigned long addr, pte_t *ptep)
 {
-        unsigned long old;
        if ((pte_val(*ptep) & _PAGE_RW) == 0)
                return;
-        old = pte_update(mm, addr, ptep, _PAGE_RW, 1);
+        pte_update(mm, addr, ptep, _PAGE_RW, 1);
 }
 /*
diff --git a/arch/powerpc/include/asm/pgtable.h b/arch/powerpc/include/asm/pgtable.h
index 89f158731ce3..88b0bd925a8b 100644
--- a/arch/powerpc/include/asm/pgtable.h
+++ b/arch/powerpc/include/asm/pgtable.h
@@ -170,6 +170,7 @@ extern int ptep_set_access_flags(struct vm_area_struct *vma, unsigned long addre
 #define pgprot_cached_wthru(prot) (__pgprot((pgprot_val(prot) & ~_PAGE_CACHE_CTL) | \
                                            _PAGE_COHERENT | _PAGE_WRITETHRU))
+#define pgprot_writecombine pgprot_noncached_wc
 struct file;
 extern pgprot_t phys_mem_access_prot(struct file *file, unsigned long pfn,
diff --git a/arch/powerpc/include/asm/pmac_feature.h b/arch/powerpc/include/asm/pmac_feature.h
index 00eedc5a4e61..10902c9375d0 100644
--- a/arch/powerpc/include/asm/pmac_feature.h
+++ b/arch/powerpc/include/asm/pmac_feature.h
@@ -53,8 +53,8 @@
 /* Here is the infamous serie of OHare based machines
 */
-#define PMAC_TYPE_COMET                 0x20    /* Beleived to be PowerBook 2400 */
+#define PMAC_TYPE_COMET                 0x20    /* Believed to be PowerBook 2400 */
-#define PMAC_TYPE_HOOPER                0x21    /* Beleived to be PowerBook 3400 */
+#define PMAC_TYPE_HOOPER                0x21    /* Believed to be PowerBook 3400 */
 #define PMAC_TYPE_KANGA                 0x22    /* PowerBook 3500 (first G3) */
 #define PMAC_TYPE_ALCHEMY               0x23    /* Alchemy motherboard base */
 #define PMAC_TYPE_GAZELLE               0x24    /* Spartacus, some 5xxx/6xxx */
diff --git a/arch/powerpc/include/asm/ppc-opcode.h b/arch/powerpc/include/asm/ppc-opcode.h
index 43adc8b819ed..e472659d906c 100644
--- a/arch/powerpc/include/asm/ppc-opcode.h
+++ b/arch/powerpc/include/asm/ppc-opcode.h
@@ -36,9 +36,15 @@
 #define PPC_INST_NOP                    0x60000000
 #define PPC_INST_POPCNTB                0x7c0000f4
 #define PPC_INST_POPCNTB_MASK           0xfc0007fe
+#define PPC_INST_POPCNTD                0x7c0003f4
+#define PPC_INST_POPCNTW                0x7c0002f4
 #define PPC_INST_RFCI                   0x4c000066
 #define PPC_INST_RFDI                   0x4c00004e
 #define PPC_INST_RFMCI                  0x4c00004c
+#define PPC_INST_MFSPR_DSCR             0x7c1102a6
+#define PPC_INST_MFSPR_DSCR_MASK        0xfc1fffff
+#define PPC_INST_MTSPR_DSCR             0x7c1103a6
+#define PPC_INST_MTSPR_DSCR_MASK        0xfc1fffff
 #define PPC_INST_STRING                 0x7c00042a
 #define PPC_INST_STRING_MASK            0xfc0007fe
@@ -54,6 +60,17 @@
 #define PPC_INST_TLBSRX_DOT             0x7c0006a5
 #define PPC_INST_XXLOR                  0xf0000510
+#define PPC_INST_NAP                    0x4c000364
+#define PPC_INST_SLEEP                  0x4c0003a4
+/* A2 specific instructions */
+#define PPC_INST_ERATWE                 0x7c0001a6
+#define PPC_INST_ERATRE                 0x7c000166
+#define PPC_INST_ERATILX                0x7c000066
+#define PPC_INST_ERATIVAX               0x7c000666
+#define PPC_INST_ERATSX                 0x7c000126
+#define PPC_INST_ERATSX_DOT             0x7c000127
 /* macros to insert fields into opcodes */
 #define __PPC_RA(a)     (((a) & 0x1f) << 16)
 #define __PPC_RB(b)     (((b) & 0x1f) << 11)
@@ -65,6 +82,8 @@
 #define __PPC_XT(s)     __PPC_XS(s)
 #define __PPC_T_TLB(t)  (((t) & 0x3) << 21)
 #define __PPC_WC(w)     (((w) & 0x3) << 21)
+#define __PPC_WS(w)     (((w) & 0x1f) << 11)
 /*
 * Only use the larx hint bit on 64bit CPUs. e500v1/v2 based CPUs will treat a
 * larx with EH set as an illegal instruction.
@@ -88,6 +107,12 @@
                                        __PPC_RB(b) | __PPC_EH(eh))
 #define PPC_MSGSND(b)           stringify_in_c(.long PPC_INST_MSGSND | \
                                        __PPC_RB(b))
+#define PPC_POPCNTB(a, s)       stringify_in_c(.long PPC_INST_POPCNTB | \
+                                        __PPC_RA(a) | __PPC_RS(s))
+#define PPC_POPCNTD(a, s)       stringify_in_c(.long PPC_INST_POPCNTD | \
+                                        __PPC_RA(a) | __PPC_RS(s))
+#define PPC_POPCNTW(a, s)       stringify_in_c(.long PPC_INST_POPCNTW | \
+                                        __PPC_RA(a) | __PPC_RS(s))
 #define PPC_RFCI                stringify_in_c(.long PPC_INST_RFCI)
 #define PPC_RFDI                stringify_in_c(.long PPC_INST_RFDI)
 #define PPC_RFMCI               stringify_in_c(.long PPC_INST_RFMCI)
@@ -105,6 +130,21 @@
 #define PPC_TLBIVAX(a,b)        stringify_in_c(.long PPC_INST_TLBIVAX | \
                                        __PPC_RA(a) | __PPC_RB(b))
+#define PPC_ERATWE(s, a, w)     stringify_in_c(.long PPC_INST_ERATWE | \
+                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
+#define PPC_ERATRE(s, a, w)     stringify_in_c(.long PPC_INST_ERATRE | \
+                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_WS(w))
+#define PPC_ERATILX(t, a, b)    stringify_in_c(.long PPC_INST_ERATILX | \
+                                        __PPC_T_TLB(t) | __PPC_RA(a) | \
+                                        __PPC_RB(b))
+#define PPC_ERATIVAX(s, a, b)   stringify_in_c(.long PPC_INST_ERATIVAX | \
+                                        __PPC_RS(s) | __PPC_RA(a) | __PPC_RB(b))
+#define PPC_ERATSX(t, a, w)     stringify_in_c(.long PPC_INST_ERATSX | \
+                                        __PPC_RS(t) | __PPC_RA(a) | __PPC_RB(b))
+#define PPC_ERATSX_DOT(t, a, w) stringify_in_c(.long PPC_INST_ERATSX_DOT | \
+                                        __PPC_RS(t) | __PPC_RA(a) | __PPC_RB(b))
 /*
 * Define what the VSX XX1 form instructions will look like, then add
 * the 128 bit load store instructions based on that.
@@ -118,4 +158,7 @@
 #define XXLOR(t, a, b)          stringify_in_c(.long PPC_INST_XXLOR | \
                                               VSX_XX3((t), (a), (b)))
+#define PPC_NAP                 stringify_in_c(.long PPC_INST_NAP)
+#define PPC_SLEEP               stringify_in_c(.long PPC_INST_SLEEP)
 #endif /* _ASM_POWERPC_PPC_OPCODE_H */
diff --git a/arch/powerpc/include/asm/ppc-pci.h b/arch/powerpc/include/asm/ppc-pci.h
index 42fdff0e4b32..43268f15004e 100644
--- a/arch/powerpc/include/asm/ppc-pci.h
+++ b/arch/powerpc/include/asm/ppc-pci.h
@@ -28,8 +28,8 @@ extern void find_and_init_phbs(void);
 extern struct pci_dev *isa_bridge_pcidev;       /* may be NULL if no ISA bus */
 /** Bus Unit ID macros; get low and hi 32-bits of the 64-bit BUID */
-#define BUID_HI(buid) ((buid) >> 32)
+#define BUID_HI(buid) upper_32_bits(buid)
-#define BUID_LO(buid) ((buid) & 0xffffffff)
+#define BUID_LO(buid) lower_32_bits(buid)
 /* PCI device_node operations */
 struct device_node;
diff --git a/arch/powerpc/include/asm/ppc_asm.h b/arch/powerpc/include/asm/ppc_asm.h
index 498fe09263d3..1b422381fc16 100644
--- a/arch/powerpc/include/asm/ppc_asm.h
+++ b/arch/powerpc/include/asm/ppc_asm.h
@@ -9,6 +9,7 @@
 #include <asm/asm-compat.h>
 #include <asm/processor.h>
 #include <asm/ppc-opcode.h>
+#include <asm/firmware.h>
 #ifndef __ASSEMBLY__
 #error __FILE__ should only be used in assembler files
@@ -26,17 +27,13 @@
 #ifndef CONFIG_VIRT_CPU_ACCOUNTING
 #define ACCOUNT_CPU_USER_ENTRY(ra, rb)
 #define ACCOUNT_CPU_USER_EXIT(ra, rb)
+#define ACCOUNT_STOLEN_TIME
 #else
 #define ACCOUNT_CPU_USER_ENTRY(ra, rb)                                  \
        beq     2f;                     /* if from kernel mode */       \
-BEGIN_FTR_SECTION;                                                      \
+        MFTB(ra);                       /* get timebase */              \
-        mfspr   ra,SPRN_PURR;           /* get processor util. reg */   \
+        ld      rb,PACA_STARTTIME_USER(r13);                            \
-END_FTR_SECTION_IFSET(CPU_FTR_PURR);                                    \
+        std     ra,PACA_STARTTIME(r13);                                 \
-BEGIN_FTR_SECTION;                                                      \
-        MFTB(ra);                       /* or get TB if no PURR */      \
-END_FTR_SECTION_IFCLR(CPU_FTR_PURR);                                    \
-        ld      rb,PACA_STARTPURR(r13);                                 \
-        std     ra,PACA_STARTPURR(r13);                                 \
        subf    rb,rb,ra;               /* subtract start value */      \
        ld      ra,PACA_USER_TIME(r13);                                 \
        add     ra,ra,rb;               /* add on to user time */       \
@@ -44,19 +41,34 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);					\
 2:
 #define ACCOUNT_CPU_USER_EXIT(ra, rb)                                   \
-BEGIN_FTR_SECTION;                                                      \
+        MFTB(ra);                       /* get timebase */              \
-        mfspr   ra,SPRN_PURR;           /* get processor util. reg */   \
+        ld      rb,PACA_STARTTIME(r13);                                 \
-END_FTR_SECTION_IFSET(CPU_FTR_PURR);                                    \
+        std     ra,PACA_STARTTIME_USER(r13);                            \
-BEGIN_FTR_SECTION;                                                      \
-        MFTB(ra);                       /* or get TB if no PURR */      \
-END_FTR_SECTION_IFCLR(CPU_FTR_PURR);                                    \
-        ld      rb,PACA_STARTPURR(r13);                                 \
-        std     ra,PACA_STARTPURR(r13);                                 \
        subf    rb,rb,ra;               /* subtract start value */      \
        ld      ra,PACA_SYSTEM_TIME(r13);                               \
-        add     ra,ra,rb;               /* add on to user time */       \
+        add     ra,ra,rb;               /* add on to system time */     \
-        std     ra,PACA_SYSTEM_TIME(r13);
+        std     ra,PACA_SYSTEM_TIME(r13)
-#endif
+#ifdef CONFIG_PPC_SPLPAR
+#define ACCOUNT_STOLEN_TIME                                             \
+BEGIN_FW_FTR_SECTION;                                                   \
+        beq     33f;                                                    \
+        /* from user - see if there are any DTL entries to process */   \
+        ld      r10,PACALPPACAPTR(r13); /* get ptr to VPA */            \
+        ld      r11,PACA_DTL_RIDX(r13); /* get log read index */        \
+        ld      r10,LPPACA_DTLIDX(r10); /* get log write index */       \
+        cmpd    cr1,r11,r10;                                            \
+        beq+    cr1,33f;                                                \
+        bl      .accumulate_stolen_time;                                \
+33:                                                                     \
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
+#else  /* CONFIG_PPC_SPLPAR */
+#define ACCOUNT_STOLEN_TIME
+#endif /* CONFIG_PPC_SPLPAR */
+#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
 /*
 * Macros for storing registers into and loading registers from
@@ -158,6 +170,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_PURR);					\
 #define HMT_MEDIUM      or      2,2,2
 #define HMT_MEDIUM_HIGH or      5,5,5           # medium high priority
 #define HMT_HIGH        or      3,3,3
+#define HMT_EXTRA_HIGH  or      7,7,7           # power7 only
 #ifdef __KERNEL__
 #ifdef CONFIG_PPC64
diff --git a/arch/powerpc/include/asm/processor.h b/arch/powerpc/include/asm/processor.h
index 19c05b0f74be..d50c2b6d9bc3 100644
--- a/arch/powerpc/include/asm/processor.h
+++ b/arch/powerpc/include/asm/processor.h
@@ -118,17 +118,16 @@ extern struct task_struct *last_task_used_spe;
 #define TASK_UNMAPPED_BASE_USER32 (PAGE_ALIGN(TASK_SIZE_USER32 / 4))
 #define TASK_UNMAPPED_BASE_USER64 (PAGE_ALIGN(TASK_SIZE_USER64 / 4))
-#define TASK_UNMAPPED_BASE ((test_thread_flag(TIF_32BIT)) ? \
+#define TASK_UNMAPPED_BASE ((is_32bit_task()) ? \
                TASK_UNMAPPED_BASE_USER32 : TASK_UNMAPPED_BASE_USER64 )
 #endif
-#ifdef __KERNEL__
 #ifdef __powerpc64__
 #define STACK_TOP_USER64 TASK_SIZE_USER64
 #define STACK_TOP_USER32 TASK_SIZE_USER32
-#define STACK_TOP (test_thread_flag(TIF_32BIT) ? \
+#define STACK_TOP (is_32bit_task() ? \
                   STACK_TOP_USER32 : STACK_TOP_USER64)
 #define STACK_TOP_MAX STACK_TOP_USER64
@@ -139,7 +138,6 @@ extern struct task_struct *last_task_used_spe;
 #define STACK_TOP_MAX   STACK_TOP
 #endif /* __powerpc64__ */
-#endif /* __KERNEL__ */
 typedef struct {
        unsigned long seg;
@@ -240,6 +238,10 @@ struct thread_struct {
 #ifdef CONFIG_KVM_BOOK3S_32_HANDLER
        void*           kvm_shadow_vcpu; /* KVM internal data */
 #endif /* CONFIG_KVM_BOOK3S_32_HANDLER */
+#ifdef CONFIG_PPC64
+        unsigned long   dscr;
+        int             dscr_inherit;
+#endif
 };
 #define ARCH_MIN_TASKALIGN 16
diff --git a/arch/powerpc/include/asm/prom.h b/arch/powerpc/include/asm/prom.h
index ae26f2efd089..c189aa5fe1f4 100644
--- a/arch/powerpc/include/asm/prom.h
+++ b/arch/powerpc/include/asm/prom.h
@@ -42,7 +42,7 @@ extern void pci_create_OF_bus_map(void);
 /* Translate a DMA address from device space to CPU space */
 extern u64 of_translate_dma_address(struct device_node *dev,
-                                    const u32 *in_addr);
+                                    const __be32 *in_addr);
 #ifdef CONFIG_PCI
 extern unsigned long pci_address_to_pio(phys_addr_t address);
@@ -63,9 +63,6 @@ struct device_node *of_get_cpu_node(int cpu, unsigned int *thread);
 /* cache lookup */
 struct device_node *of_find_next_cache_node(struct device_node *np);
-/* Get the MAC address */
-extern const void *of_get_mac_address(struct device_node *np);
 #ifdef CONFIG_NUMA
 extern int of_node_to_nid(struct device_node *device);
 #else
@@ -73,21 +70,6 @@ static inline int of_node_to_nid(struct device_node *device) { return 0; }
 #endif
 #define of_node_to_nid of_node_to_nid
-/**
- * of_irq_map_pci - Resolve the interrupt for a PCI device
- * @pdev:       the device whose interrupt is to be resolved
- * @out_irq:    structure of_irq filled by this function
- *
- * This function resolves the PCI interrupt for a given PCI device. If a
- * device-node exists for a given pci_dev, it will use normal OF tree
- * walking. If not, it will implement standard swizzling and walk up the
- * PCI tree until an device-node is found, at which point it will finish
- * resolving using the OF tree walking.
- */
-struct pci_dev;
-struct of_irq;
-extern int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq);
 extern void of_instantiate_rtc(void);
 /* These includes are put at the bottom because they may contain things
diff --git a/arch/powerpc/include/asm/pte-common.h b/arch/powerpc/include/asm/pte-common.h
index f2b370180a09..8d1569c29042 100644
--- a/arch/powerpc/include/asm/pte-common.h
+++ b/arch/powerpc/include/asm/pte-common.h
@@ -86,7 +86,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
 #define PTE_RPN_MASK    (~((1UL<<PTE_RPN_SHIFT)-1))
 #endif
-/* _PAGE_CHG_MASK masks of bits that are to be preserved accross
+/* _PAGE_CHG_MASK masks of bits that are to be preserved across
 * pgprot changes
 */
 #define _PAGE_CHG_MASK  (PTE_RPN_MASK | _PAGE_HPTEFLAGS | _PAGE_DIRTY | \
@@ -162,7 +162,7 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
 * on platforms where such control is possible.
 */
 #if defined(CONFIG_KGDB) || defined(CONFIG_XMON) || defined(CONFIG_BDI_SWITCH) ||\
-        defined(CONFIG_KPROBES)
+        defined(CONFIG_KPROBES) || defined(CONFIG_DYNAMIC_FTRACE)
 #define PAGE_KERNEL_TEXT        PAGE_KERNEL_X
 #else
 #define PAGE_KERNEL_TEXT        PAGE_KERNEL_ROX
@@ -171,6 +171,13 @@ extern unsigned long bad_call_to_PMD_PAGE_SIZE(void);
 /* Make modules code happy. We don't set RO yet */
 #define PAGE_KERNEL_EXEC        PAGE_KERNEL_X
+/*
+ * Don't just check for any non zero bits in __PAGE_USER, since for book3e
+ * and PTE_64BIT, PAGE_KERNEL_X contains _PAGE_BAP_SR which is also in
+ * _PAGE_USER.  Need to explicitly match _PAGE_BAP_UR bit in that case too.
+ */
+#define pte_user(val)           ((val & _PAGE_USER) == _PAGE_USER)
 /* Advertise special mapping type for AGP */
 #define PAGE_AGP                (PAGE_KERNEL_NC)
 #define HAVE_PAGE_AGP
diff --git a/arch/powerpc/include/asm/pte-hash64-64k.h b/arch/powerpc/include/asm/pte-hash64-64k.h
index c4490f9c67c4..59247e816ac5 100644
--- a/arch/powerpc/include/asm/pte-hash64-64k.h
+++ b/arch/powerpc/include/asm/pte-hash64-64k.h
@@ -22,7 +22,7 @@
 #define _PAGE_HASHPTE   _PAGE_HPTE_SUB
 /* Note the full page bits must be in the same location as for normal
- * 4k pages as the same asssembly will be used to insert 64K pages
+ * 4k pages as the same assembly will be used to insert 64K pages
 * wether the kernel has CONFIG_PPC_64K_PAGES or not
 */
 #define _PAGE_F_SECOND  0x00008000 /* full page: hidx bits */
diff --git a/arch/powerpc/include/asm/ptrace.h b/arch/powerpc/include/asm/ptrace.h
index 0175a676b34b..48223f9b8728 100644
--- a/arch/powerpc/include/asm/ptrace.h
+++ b/arch/powerpc/include/asm/ptrace.h
@@ -125,8 +125,10 @@ extern int ptrace_put_reg(struct task_struct *task, int regno,
 #endif /* ! __powerpc64__ */
 #define TRAP(regs)              ((regs)->trap & ~0xF)
 #ifdef __powerpc64__
+#define NV_REG_POISON           0xdeadbeefdeadbeefUL
 #define CHECK_FULL_REGS(regs)   BUG_ON(regs->trap & 1)
 #else
+#define NV_REG_POISON           0xdeadbeef
 #define CHECK_FULL_REGS(regs)                                                 \
 do {                                                                          \
        if ((regs)->trap & 1)                                                 \
diff --git a/arch/powerpc/include/asm/qe_ic.h b/arch/powerpc/include/asm/qe_ic.h
index cf519663a791..f706164b0bd0 100644
--- a/arch/powerpc/include/asm/qe_ic.h
+++ b/arch/powerpc/include/asm/qe_ic.h
@@ -81,7 +81,7 @@ int qe_ic_set_high_priority(unsigned int virq, unsigned int priority, int high);
 static inline void qe_ic_cascade_low_ipic(unsigned int irq,
                                          struct irq_desc *desc)
 {
-        struct qe_ic *qe_ic = desc->handler_data;
+        struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
        if (cascade_irq != NO_IRQ)
@@ -91,7 +91,7 @@ static inline void qe_ic_cascade_low_ipic(unsigned int irq,
 static inline void qe_ic_cascade_high_ipic(unsigned int irq,
                                           struct irq_desc *desc)
 {
-        struct qe_ic *qe_ic = desc->handler_data;
+        struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
        if (cascade_irq != NO_IRQ)
@@ -101,32 +101,35 @@ static inline void qe_ic_cascade_high_ipic(unsigned int irq,
 static inline void qe_ic_cascade_low_mpic(unsigned int irq,
                                          struct irq_desc *desc)
 {
-        struct qe_ic *qe_ic = desc->handler_data;
+        struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq = qe_ic_get_low_irq(qe_ic);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static inline void qe_ic_cascade_high_mpic(unsigned int irq,
                                           struct irq_desc *desc)
 {
-        struct qe_ic *qe_ic = desc->handler_data;
+        struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq = qe_ic_get_high_irq(qe_ic);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
                                            struct irq_desc *desc)
 {
-        struct qe_ic *qe_ic = desc->handler_data;
+        struct qe_ic *qe_ic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq;
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        cascade_irq = qe_ic_get_high_irq(qe_ic);
        if (cascade_irq == NO_IRQ)
@@ -135,7 +138,7 @@ static inline void qe_ic_cascade_muxed_mpic(unsigned int irq,
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif /* _ASM_POWERPC_QE_IC_H */
diff --git a/arch/powerpc/include/asm/reg.h b/arch/powerpc/include/asm/reg.h
index ff0005eec7dd..c5cae0dd176c 100644
--- a/arch/powerpc/include/asm/reg.h
+++ b/arch/powerpc/include/asm/reg.h
@@ -99,17 +99,23 @@
 #define MSR_LE          __MASK(MSR_LE_LG)       /* Little Endian */
 #if defined(CONFIG_PPC_BOOK3S_64)
+#define MSR_64BIT       MSR_SF
 /* Server variant */
 #define MSR_            MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_ISF |MSR_HV
-#define MSR_KERNEL      MSR_ | MSR_SF
+#define MSR_KERNEL      MSR_ | MSR_64BIT
 #define MSR_USER32      MSR_ | MSR_PR | MSR_EE
-#define MSR_USER64      MSR_USER32 | MSR_SF
+#define MSR_USER64      MSR_USER32 | MSR_64BIT
 #elif defined(CONFIG_PPC_BOOK3S_32) || defined(CONFIG_8xx)
 /* Default MSR for kernel mode. */
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR)
 #define MSR_USER        (MSR_KERNEL|MSR_PR|MSR_EE)
 #endif
+#ifndef MSR_64BIT
+#define MSR_64BIT       0
+#endif
 /* Floating Point Status and Control Register (FPSCR) Fields */
 #define FPSCR_FX        0x80000000      /* FPU exception summary */
 #define FPSCR_FEX       0x40000000      /* FPU enabled exception summary */
@@ -170,8 +176,20 @@
 #define SPEFSCR_FRMC    0x00000003      /* Embedded FP rounding mode control */
 /* Special Purpose Registers (SPRNs)*/
+#ifdef CONFIG_40x
+#define SPRN_PID        0x3B1   /* Process ID */
+#else
+#define SPRN_PID        0x030   /* Process ID */
+#ifdef CONFIG_BOOKE
+#define SPRN_PID0       SPRN_PID/* Process ID Register 0 */
+#endif
+#endif
 #define SPRN_CTR        0x009   /* Count Register */
 #define SPRN_DSCR       0x11
+#define SPRN_CFAR       0x1c    /* Come From Address Register */
+#define SPRN_ACOP       0x1F    /* Available Coprocessor Register */
 #define SPRN_CTRLF      0x088
 #define SPRN_CTRLT      0x098
 #define   CTRL_CT       0xc0000000      /* current thread */
@@ -200,8 +218,43 @@
 #define SPRN_TBWL       0x11C   /* Time Base Lower Register (super, R/W) */
 #define SPRN_TBWU       0x11D   /* Time Base Upper Register (super, R/W) */
 #define SPRN_SPURR      0x134   /* Scaled PURR */
+#define SPRN_HSPRG0     0x130   /* Hypervisor Scratch 0 */
+#define SPRN_HSPRG1     0x131   /* Hypervisor Scratch 1 */
+#define SPRN_HDSISR     0x132
+#define SPRN_HDAR       0x133
+#define SPRN_HDEC       0x136   /* Hypervisor Decrementer */
 #define SPRN_HIOR       0x137   /* 970 Hypervisor interrupt offset */
+#define SPRN_RMOR       0x138   /* Real mode offset register */
+#define SPRN_HRMOR      0x139   /* Real mode offset register */
+#define SPRN_HSRR0      0x13A   /* Hypervisor Save/Restore 0 */
+#define SPRN_HSRR1      0x13B   /* Hypervisor Save/Restore 1 */
 #define SPRN_LPCR       0x13E   /* LPAR Control Register */
+#define   LPCR_VPM0     (1ul << (63-0))
+#define   LPCR_VPM1     (1ul << (63-1))
+#define   LPCR_ISL      (1ul << (63-2))
+#define   LPCR_DPFD_SH  (63-11)
+#define   LPCR_VRMA_L   (1ul << (63-12))
+#define   LPCR_VRMA_LP0 (1ul << (63-15))
+#define   LPCR_VRMA_LP1 (1ul << (63-16))
+#define   LPCR_RMLS    0x1C000000      /* impl dependent rmo limit sel */
+#define   LPCR_ILE     0x02000000      /* !HV irqs set MSR:LE */
+#define   LPCR_PECE     0x00007000      /* powersave exit cause enable */
+#define     LPCR_PECE0  0x00004000      /* ext. exceptions can cause exit */
+#define     LPCR_PECE1  0x00002000      /* decrementer can cause exit */
+#define     LPCR_PECE2  0x00001000      /* machine check etc can cause exit */
+#define   LPCR_MER      0x00000800      /* Mediated External Exception */
+#define   LPCR_LPES0   0x00000008      /* LPAR Env selector 0 */
+#define   LPCR_LPES1   0x00000004      /* LPAR Env selector 1 */
+#define   LPCR_RMI     0x00000002      /* real mode is cache inhibit */
+#define   LPCR_HDICE   0x00000001      /* Hyp Decr enable (HV,PR,EE) */
+#define SPRN_LPID       0x13F   /* Logical Partition Identifier */
+#define SPRN_HMER       0x150   /* Hardware m? error recovery */
+#define SPRN_HMEER      0x151   /* Hardware m? enable error recovery */
+#define SPRN_HEIR       0x153   /* Hypervisor Emulated Instruction Register */
+#define SPRN_TLBINDEXR  0x154   /* P7 TLB control register */
+#define SPRN_TLBVPNR    0x155   /* P7 TLB control register */
+#define SPRN_TLBRPNR    0x156   /* P7 TLB control register */
+#define SPRN_TLBLPIDR   0x157   /* P7 TLB control register */
 #define SPRN_DBAT0L     0x219   /* Data BAT 0 Lower Register */
 #define SPRN_DBAT0U     0x218   /* Data BAT 0 Upper Register */
 #define SPRN_DBAT1L     0x21B   /* Data BAT 1 Lower Register */
@@ -283,6 +336,7 @@
 #define HID0_NOPTI      (1<<0)          /* No-op dcbt and dcbst instr. */
 #define SPRN_HID1       0x3F1           /* Hardware Implementation Register 1 */
+#ifdef CONFIG_6xx
 #define HID1_EMCP       (1<<31)         /* 7450 Machine Check Pin Enable */
 #define HID1_DFS        (1<<22)         /* 7447A Dynamic Frequency Scaling */
 #define HID1_PC0        (1<<16)         /* 7450 PLL_CFG[0] */
@@ -292,6 +346,7 @@
 #define HID1_SYNCBE     (1<<11)         /* 7450 ABE for sync, eieio */
 #define HID1_ABE        (1<<10)         /* 7450 Address Broadcast Enable */
 #define HID1_PS         (1<<16)         /* 750FX PLL selection */
+#endif
 #define SPRN_HID2       0x3F8           /* Hardware Implementation Register 2 */
 #define SPRN_HID2_GEKKO 0x398           /* Gekko HID2 Register */
 #define SPRN_IABR       0x3F2   /* Instruction Address Breakpoint Register */
@@ -422,16 +477,23 @@
 #define SPRN_SRR0       0x01A   /* Save/Restore Register 0 */
 #define SPRN_SRR1       0x01B   /* Save/Restore Register 1 */
 #define   SRR1_WAKEMASK         0x00380000 /* reason for wakeup */
-#define   SRR1_WAKERESET        0x00380000 /* System reset */
 #define   SRR1_WAKESYSERR       0x00300000 /* System error */
 #define   SRR1_WAKEEE           0x00200000 /* External interrupt */
 #define   SRR1_WAKEMT           0x00280000 /* mtctrl */
+#define   SRR1_WAKEHMI          0x00280000 /* Hypervisor maintenance */
 #define   SRR1_WAKEDEC          0x00180000 /* Decrementer interrupt */
 #define   SRR1_WAKETHERM        0x00100000 /* Thermal management interrupt */
+#define   SRR1_WAKERESET        0x00100000 /* System reset */
+#define   SRR1_WAKESTATE        0x00030000 /* Powersave exit mask [46:47] */
+#define   SRR1_WS_DEEPEST       0x00030000 /* Some resources not maintained,
+                                          * may not be recoverable */
+#define   SRR1_WS_DEEPER        0x00020000 /* Some resources not maintained */
+#define   SRR1_WS_DEEP          0x00010000 /* All resources maintained */
 #define   SRR1_PROGFPE          0x00100000 /* Floating Point Enabled */
 #define   SRR1_PROGPRIV         0x00040000 /* Privileged instruction */
 #define   SRR1_PROGTRAP         0x00020000 /* Trap */
 #define   SRR1_PROGADDR         0x00010000 /* SRR0 contains subsequent addr */
 #define SPRN_HSRR0      0x13A   /* Save/Restore Register 0 */
 #define SPRN_HSRR1      0x13B   /* Save/Restore Register 1 */
@@ -661,12 +723,15 @@
 * SPRG usage:
 *
 * All 64-bit:
- *      - SPRG1 stores PACA pointer
+ *      - SPRG1 stores PACA pointer except 64-bit server in
+ *        HV mode in which case it is HSPRG0
 *
 * 64-bit server:
 *      - SPRG0 unused (reserved for HV on Power4)
 *      - SPRG2 scratch for exception vectors
 *      - SPRG3 unused (user visible)
+ *      - HSPRG0 stores PACA in HV mode
+ *      - HSPRG1 scratch for "HV" exceptions
 *
 * 64-bit embedded
 *      - SPRG0 generic exception scratch
@@ -729,6 +794,41 @@
 #ifdef CONFIG_PPC_BOOK3S_64
 #define SPRN_SPRG_SCRATCH0      SPRN_SPRG2
+#define SPRN_SPRG_HPACA         SPRN_HSPRG0
+#define SPRN_SPRG_HSCRATCH0     SPRN_HSPRG1
+#define GET_PACA(rX)                                    \
+        BEGIN_FTR_SECTION_NESTED(66);                   \
+        mfspr   rX,SPRN_SPRG_PACA;                      \
+        FTR_SECTION_ELSE_NESTED(66);                    \
+        mfspr   rX,SPRN_SPRG_HPACA;                     \
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+#define SET_PACA(rX)                                    \
+        BEGIN_FTR_SECTION_NESTED(66);                   \
+        mtspr   SPRN_SPRG_PACA,rX;                      \
+        FTR_SECTION_ELSE_NESTED(66);                    \
+        mtspr   SPRN_SPRG_HPACA,rX;                     \
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+#define GET_SCRATCH0(rX)                                \
+        BEGIN_FTR_SECTION_NESTED(66);                   \
+        mfspr   rX,SPRN_SPRG_SCRATCH0;                  \
+        FTR_SECTION_ELSE_NESTED(66);                    \
+        mfspr   rX,SPRN_SPRG_HSCRATCH0;                 \
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+#define SET_SCRATCH0(rX)                                \
+        BEGIN_FTR_SECTION_NESTED(66);                   \
+        mtspr   SPRN_SPRG_SCRATCH0,rX;                  \
+        FTR_SECTION_ELSE_NESTED(66);                    \
+        mtspr   SPRN_SPRG_HSCRATCH0,rX;                 \
+        ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_HVMODE_206, 66)
+#else /* CONFIG_PPC_BOOK3S_64 */
+#define GET_SCRATCH0(rX)        mfspr   rX,SPRN_SPRG_SCRATCH0
+#define SET_SCRATCH0(rX)        mtspr   SPRN_SPRG_SCRATCH0,rX
 #endif
 #ifdef CONFIG_PPC_BOOK3E_64
@@ -738,6 +838,10 @@
 #define SPRN_SPRG_TLB_EXFRAME   SPRN_SPRG2
 #define SPRN_SPRG_TLB_SCRATCH   SPRN_SPRG6
 #define SPRN_SPRG_GEN_SCRATCH   SPRN_SPRG0
+#define SET_PACA(rX)    mtspr   SPRN_SPRG_PACA,rX
+#define GET_PACA(rX)    mfspr   rX,SPRN_SPRG_PACA
 #endif
 #ifdef CONFIG_PPC_BOOK3S_32
@@ -788,6 +892,8 @@
 #define SPRN_SPRG_SCRATCH1      SPRN_SPRG1
 #endif
 /*
 * An mtfsf instruction with the L bit set. On CPUs that support this a
 * full 64bits of FPSCR is restored and on other CPUs the L bit is ignored.
@@ -850,6 +956,8 @@
 #define PVR_7450        0x80000000
 #define PVR_8540        0x80200000
 #define PVR_8560        0x80200000
+#define PVR_VER_E500V1  0x8020
+#define PVR_VER_E500V2  0x8021
 /*
 * For the 8xx processors, all of them report the same PVR family for
 * the PowerPC core. The various versions of these processors must be
@@ -878,7 +986,10 @@
 #define PV_970          0x0039
 #define PV_POWER5       0x003A
 #define PV_POWER5p      0x003B
+#define PV_POWER7       0x003F
 #define PV_970FX        0x003C
+#define PV_POWER6       0x003E
+#define PV_POWER7       0x003F
 #define PV_630          0x0040
 #define PV_630p 0x0041
 #define PV_970MP        0x0044
diff --git a/arch/powerpc/include/asm/reg_a2.h b/arch/powerpc/include/asm/reg_a2.h
new file mode 100644
index 000000000000..3d52a1132f3d
--- /dev/null
+++ b/arch/powerpc/include/asm/reg_a2.h
@@ -0,0 +1,165 @@
+/*
+ *  Register definitions specific to the A2 core
+ *
+ *  Copyright (C) 2008 Ben. Herrenschmidt (benh@kernel.crashing.org), IBM Corp.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_POWERPC_REG_A2_H__
+#define __ASM_POWERPC_REG_A2_H__
+#define SPRN_TENSR      0x1b5
+#define SPRN_TENS       0x1b6   /* Thread ENable Set */
+#define SPRN_TENC       0x1b7   /* Thread ENable Clear */
+#define SPRN_A2_CCR0    0x3f0   /* Core Configuration Register 0 */
+#define SPRN_A2_CCR1    0x3f1   /* Core Configuration Register 1 */
+#define SPRN_A2_CCR2    0x3f2   /* Core Configuration Register 2 */
+#define SPRN_MMUCR0     0x3fc   /* MMU Control Register 0 */
+#define SPRN_MMUCR1     0x3fd   /* MMU Control Register 1 */
+#define SPRN_MMUCR2     0x3fe   /* MMU Control Register 2 */
+#define SPRN_MMUCR3     0x3ff   /* MMU Control Register 3 */
+#define SPRN_IAR        0x372
+#define SPRN_IUCR0      0x3f3
+#define IUCR0_ICBI_ACK  0x1000
+#define SPRN_XUCR0      0x3f6   /* Execution Unit Config Register 0 */
+#define A2_IERAT_SIZE   16
+#define A2_DERAT_SIZE   32
+/* A2 MMUCR0 bits */
+#define MMUCR0_ECL      0x80000000      /* Extended Class for TLB fills */
+#define MMUCR0_TID_NZ   0x40000000      /* TID is non-zero */
+#define MMUCR0_TS       0x10000000      /* Translation space for TLB fills */
+#define MMUCR0_TGS      0x20000000      /* Guest space for TLB fills */
+#define MMUCR0_TLBSEL   0x0c000000      /* TLB or ERAT target for TLB fills */
+#define MMUCR0_TLBSEL_U 0x00000000      /*  TLBSEL = UTLB */
+#define MMUCR0_TLBSEL_I 0x08000000      /*  TLBSEL = I-ERAT */
+#define MMUCR0_TLBSEL_D 0x0c000000      /*  TLBSEL = D-ERAT */
+#define MMUCR0_LOCKSRSH 0x02000000      /* Use TLB lock on tlbsx. */
+#define MMUCR0_TID_MASK 0x000000ff      /* TID field */
+/* A2 MMUCR1 bits */
+#define MMUCR1_IRRE             0x80000000      /* I-ERAT round robin enable */
+#define MMUCR1_DRRE             0x40000000      /* D-ERAT round robin enable */
+#define MMUCR1_REE              0x20000000      /* Reference Exception Enable*/
+#define MMUCR1_CEE              0x10000000      /* Change exception enable */
+#define MMUCR1_CSINV_ALL        0x00000000      /* Inval ERAT on all CS evts */
+#define MMUCR1_CSINV_NISYNC     0x04000000      /* Inval ERAT on all ex isync*/
+#define MMUCR1_CSINV_NEVER      0x0c000000      /* Don't inval ERAT on CS */
+#define MMUCR1_ICTID            0x00080000      /* IERAT class field as TID */
+#define MMUCR1_ITTID            0x00040000      /* IERAT thdid field as TID */
+#define MMUCR1_DCTID            0x00020000      /* DERAT class field as TID */
+#define MMUCR1_DTTID            0x00010000      /* DERAT thdid field as TID */
+#define MMUCR1_DCCD             0x00008000      /* DERAT class ignore */
+#define MMUCR1_TLBWE_BINV       0x00004000      /* back invalidate on tlbwe */
+/* A2 MMUCR2 bits */
+#define MMUCR2_PSSEL_SHIFT      4
+/* A2 MMUCR3 bits */
+#define MMUCR3_THID             0x0000000f      /* Thread ID */
+/* *** ERAT TLB bits definitions */
+#define TLB0_EPN_MASK           ASM_CONST(0xfffffffffffff000)
+#define TLB0_CLASS_MASK         ASM_CONST(0x0000000000000c00)
+#define TLB0_CLASS_00           ASM_CONST(0x0000000000000000)
+#define TLB0_CLASS_01           ASM_CONST(0x0000000000000400)
+#define TLB0_CLASS_10           ASM_CONST(0x0000000000000800)
+#define TLB0_CLASS_11           ASM_CONST(0x0000000000000c00)
+#define TLB0_V                  ASM_CONST(0x0000000000000200)
+#define TLB0_X                  ASM_CONST(0x0000000000000100)
+#define TLB0_SIZE_MASK          ASM_CONST(0x00000000000000f0)
+#define TLB0_SIZE_4K            ASM_CONST(0x0000000000000010)
+#define TLB0_SIZE_64K           ASM_CONST(0x0000000000000030)
+#define TLB0_SIZE_1M            ASM_CONST(0x0000000000000050)
+#define TLB0_SIZE_16M           ASM_CONST(0x0000000000000070)
+#define TLB0_SIZE_1G            ASM_CONST(0x00000000000000a0)
+#define TLB0_THDID_MASK         ASM_CONST(0x000000000000000f)
+#define TLB0_THDID_0            ASM_CONST(0x0000000000000001)
+#define TLB0_THDID_1            ASM_CONST(0x0000000000000002)
+#define TLB0_THDID_2            ASM_CONST(0x0000000000000004)
+#define TLB0_THDID_3            ASM_CONST(0x0000000000000008)
+#define TLB0_THDID_ALL          ASM_CONST(0x000000000000000f)
+#define TLB1_RESVATTR           ASM_CONST(0x00f0000000000000)
+#define TLB1_U0                 ASM_CONST(0x0008000000000000)
+#define TLB1_U1                 ASM_CONST(0x0004000000000000)
+#define TLB1_U2                 ASM_CONST(0x0002000000000000)
+#define TLB1_U3                 ASM_CONST(0x0001000000000000)
+#define TLB1_R                  ASM_CONST(0x0000800000000000)
+#define TLB1_C                  ASM_CONST(0x0000400000000000)
+#define TLB1_RPN_MASK           ASM_CONST(0x000003fffffff000)
+#define TLB1_W                  ASM_CONST(0x0000000000000800)
+#define TLB1_I                  ASM_CONST(0x0000000000000400)
+#define TLB1_M                  ASM_CONST(0x0000000000000200)
+#define TLB1_G                  ASM_CONST(0x0000000000000100)
+#define TLB1_E                  ASM_CONST(0x0000000000000080)
+#define TLB1_VF                 ASM_CONST(0x0000000000000040)
+#define TLB1_UX                 ASM_CONST(0x0000000000000020)
+#define TLB1_SX                 ASM_CONST(0x0000000000000010)
+#define TLB1_UW                 ASM_CONST(0x0000000000000008)
+#define TLB1_SW                 ASM_CONST(0x0000000000000004)
+#define TLB1_UR                 ASM_CONST(0x0000000000000002)
+#define TLB1_SR                 ASM_CONST(0x0000000000000001)
+#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
+#define WSP_UART_PHYS   0xffc000c000
+/* This needs to be careful chosen to hit a !0 congruence class
+ * in the TLB since we bolt it in way 3, which is already occupied
+ * by our linear mapping primary bolted entry in CC 0.
+ */
+#define WSP_UART_VIRT   0xf000000000001000
+#endif
+/* A2 erativax attributes definitions */
+#define ERATIVAX_RS_IS_ALL              0x000
+#define ERATIVAX_RS_IS_TID              0x040
+#define ERATIVAX_RS_IS_CLASS            0x080
+#define ERATIVAX_RS_IS_FULLMATCH        0x0c0
+#define ERATIVAX_CLASS_00               0x000
+#define ERATIVAX_CLASS_01               0x010
+#define ERATIVAX_CLASS_10               0x020
+#define ERATIVAX_CLASS_11               0x030
+#define ERATIVAX_PSIZE_4K               (TLB_PSIZE_4K >> 1)
+#define ERATIVAX_PSIZE_64K              (TLB_PSIZE_64K >> 1)
+#define ERATIVAX_PSIZE_1M               (TLB_PSIZE_1M >> 1)
+#define ERATIVAX_PSIZE_16M              (TLB_PSIZE_16M >> 1)
+#define ERATIVAX_PSIZE_1G               (TLB_PSIZE_1G >> 1)
+/* A2 eratilx attributes definitions */
+#define ERATILX_T_ALL                   0
+#define ERATILX_T_TID                   1
+#define ERATILX_T_TGS                   2
+#define ERATILX_T_FULLMATCH             3
+#define ERATILX_T_CLASS0                4
+#define ERATILX_T_CLASS1                5
+#define ERATILX_T_CLASS2                6
+#define ERATILX_T_CLASS3                7
+/* XUCR0 bits */
+#define XUCR0_TRACE_UM_T0               0x40000000      /* Thread 0 */
+#define XUCR0_TRACE_UM_T1               0x20000000      /* Thread 1 */
+#define XUCR0_TRACE_UM_T2               0x10000000      /* Thread 2 */
+#define XUCR0_TRACE_UM_T3               0x08000000      /* Thread 3 */
+/* A2 CCR0 register */
+#define A2_CCR0_PME_DISABLED            0x00000000
+#define A2_CCR0_PME_SLEEP               0x40000000
+#define A2_CCR0_PME_RVW                 0x80000000
+#define A2_CCR0_PME_DISABLED2           0xc0000000
+/* A2 CCR2 register */
+#define A2_CCR2_ERAT_ONLY_MODE          0x00000001
+#define A2_CCR2_ENABLE_ICSWX            0x00000002
+#define A2_CCR2_ENABLE_PC               0x20000000
+#define A2_CCR2_ENABLE_TRACE            0x40000000
+#endif /* __ASM_POWERPC_REG_A2_H__ */
diff --git a/arch/powerpc/include/asm/reg_booke.h b/arch/powerpc/include/asm/reg_booke.h
index 667a498eaee1..0f0ad9fa01c1 100644
--- a/arch/powerpc/include/asm/reg_booke.h
+++ b/arch/powerpc/include/asm/reg_booke.h
@@ -2,7 +2,7 @@
 * Contains register definitions common to the Book E PowerPC
 * specification.  Notice that while the IBM-40x series of CPUs
 * are not true Book E PowerPCs, they borrowed a number of features
- * before Book E was finalized, and are included here as well.  Unfortunatly,
+ * before Book E was finalized, and are included here as well.  Unfortunately,
 * they sometimes used different locations than true Book E CPUs did.
 *
 * This program is free software; you can redistribute it and/or
@@ -27,10 +27,12 @@
 #define MSR_CM          (1<<31) /* Computation Mode (0=32-bit, 1=64-bit) */
 #if defined(CONFIG_PPC_BOOK3E_64)
+#define MSR_64BIT       MSR_CM
 #define MSR_            MSR_ME | MSR_CE
-#define MSR_KERNEL      MSR_ | MSR_CM
+#define MSR_KERNEL      MSR_ | MSR_64BIT
 #define MSR_USER32      MSR_ | MSR_PR | MSR_EE | MSR_DE
-#define MSR_USER64      MSR_USER32 | MSR_CM | MSR_DE
+#define MSR_USER64      MSR_USER32 | MSR_64BIT
 #elif defined (CONFIG_40x)
 #define MSR_KERNEL      (MSR_ME|MSR_RI|MSR_IR|MSR_DR|MSR_CE)
 #define MSR_USER        (MSR_KERNEL|MSR_PR|MSR_EE)
@@ -81,6 +83,10 @@
 #define SPRN_IVOR13     0x19D   /* Interrupt Vector Offset Register 13 */
 #define SPRN_IVOR14     0x19E   /* Interrupt Vector Offset Register 14 */
 #define SPRN_IVOR15     0x19F   /* Interrupt Vector Offset Register 15 */
+#define SPRN_IVOR38     0x1B0   /* Interrupt Vector Offset Register 38 */
+#define SPRN_IVOR39     0x1B1   /* Interrupt Vector Offset Register 39 */
+#define SPRN_IVOR40     0x1B2   /* Interrupt Vector Offset Register 40 */
+#define SPRN_IVOR41     0x1B3   /* Interrupt Vector Offset Register 41 */
 #define SPRN_SPEFSCR    0x200   /* SPE & Embedded FP Status & Control */
 #define SPRN_BBEAR      0x201   /* Branch Buffer Entry Address Register */
 #define SPRN_BBTAR      0x202   /* Branch Buffer Target Address Register */
@@ -110,7 +116,7 @@
 #define SPRN_MAS2       0x272   /* MMU Assist Register 2 */
 #define SPRN_MAS3       0x273   /* MMU Assist Register 3 */
 #define SPRN_MAS4       0x274   /* MMU Assist Register 4 */
-#define SPRN_MAS5       0x275   /* MMU Assist Register 5 */
+#define SPRN_MAS5       0x153   /* MMU Assist Register 5 */
 #define SPRN_MAS6       0x276   /* MMU Assist Register 6 */
 #define SPRN_PID1       0x279   /* Process ID Register 1 */
 #define SPRN_PID2       0x27A   /* Process ID Register 2 */
@@ -150,8 +156,6 @@
 * or IBM 40x.
 */
 #ifdef CONFIG_BOOKE
-#define SPRN_PID        0x030   /* Process ID */
-#define SPRN_PID0       SPRN_PID/* Process ID Register 0 */
 #define SPRN_CSRR0      0x03A   /* Critical Save and Restore Register 0 */
 #define SPRN_CSRR1      0x03B   /* Critical Save and Restore Register 1 */
 #define SPRN_DEAR       0x03D   /* Data Error Address Register */
@@ -168,7 +172,6 @@
 #define SPRN_TCR        0x154   /* Timer Control Register */
 #endif /* Book E */
 #ifdef CONFIG_40x
-#define SPRN_PID        0x3B1   /* Process ID */
 #define SPRN_DBCR1      0x3BD   /* Debug Control Register 1 */          
 #define SPRN_ESR        0x3D4   /* Exception Syndrome Register */
 #define SPRN_DEAR       0x3D5   /* Data Error Address Register */
@@ -246,6 +249,20 @@
                                        store or cache line push */
 #endif
+/* Bit definitions for the HID1 */
+#ifdef CONFIG_E500
+/* e500v1/v2 */
+#define HID1_PLL_CFG_MASK 0xfc000000    /* PLL_CFG input pins */
+#define HID1_RFXE       0x00020000      /* Read fault exception enable */
+#define HID1_R1DPE      0x00008000      /* R1 data bus parity enable */
+#define HID1_R2DPE      0x00004000      /* R2 data bus parity enable */
+#define HID1_ASTME      0x00002000      /* Address bus streaming mode enable */
+#define HID1_ABE        0x00001000      /* Address broadcast enable */
+#define HID1_MPXTT      0x00000400      /* MPX re-map transfer type */
+#define HID1_ATS        0x00000080      /* Atomic status */
+#define HID1_MID_MASK   0x0000000f      /* MID input pins */
+#endif
 /* Bit definitions for the DBSR. */
 /*
 * DBSR bits which have conflicting definitions on true Book E versus IBM 40x.
diff --git a/arch/powerpc/include/asm/rio.h b/arch/powerpc/include/asm/rio.h
index 0018bf80cb25..b1d2deceeedb 100644
--- a/arch/powerpc/include/asm/rio.h
+++ b/arch/powerpc/include/asm/rio.h
@@ -14,5 +14,10 @@
 #define ASM_PPC_RIO_H
 extern void platform_rio_init(void);
+#ifdef CONFIG_FSL_RIO
+extern int fsl_rio_mcheck_exception(struct pt_regs *);
+#else
+static inline int fsl_rio_mcheck_exception(struct pt_regs *regs) {return 0; }
+#endif
 #endif                          /* ASM_PPC_RIO_H */
diff --git a/arch/powerpc/include/asm/rtas.h b/arch/powerpc/include/asm/rtas.h
index 3d35f8ae377e..58625d1e7802 100644
--- a/arch/powerpc/include/asm/rtas.h
+++ b/arch/powerpc/include/asm/rtas.h
@@ -158,7 +158,50 @@ struct rtas_error_log {
        unsigned long target:4;                 /* Target of failed operation */
        unsigned long type:8;                   /* General event or error*/
        unsigned long extended_log_length:32;   /* length in bytes */
-        unsigned char buffer[1];
+        unsigned char buffer[1];                /* Start of extended log */
+                                                /* Variable length.      */
+};
+#define RTAS_V6EXT_LOG_FORMAT_EVENT_LOG 14
+#define RTAS_V6EXT_COMPANY_ID_IBM       (('I' << 24) | ('B' << 16) | ('M' << 8))
+/* RTAS general extended event log, Version 6. The extended log starts
+ * from "buffer" field of struct rtas_error_log defined above.
+ */
+struct rtas_ext_event_log_v6 {
+        /* Byte 0 */
+        uint32_t log_valid:1;           /* 1:Log valid */
+        uint32_t unrecoverable_error:1; /* 1:Unrecoverable error */
+        uint32_t recoverable_error:1;   /* 1:recoverable (correctable   */
+                                        /*   or successfully retried)   */
+        uint32_t degraded_operation:1;  /* 1:Unrecoverable err, bypassed*/
+                                        /*   - degraded operation (e.g. */
+                                        /*   CPU or mem taken off-line) */
+        uint32_t predictive_error:1;
+        uint32_t new_log:1;             /* 1:"New" log (Always 1 for    */
+                                        /*   data returned from RTAS    */
+        uint32_t big_endian:1;          /* 1: Big endian */
+        uint32_t :1;                    /* reserved */
+        /* Byte 1 */
+        uint32_t :8;                    /* reserved */
+        /* Byte 2 */
+        uint32_t powerpc_format:1;      /* Set to 1 (indicating log is  */
+                                        /* in PowerPC format            */
+        uint32_t :3;                    /* reserved */
+        uint32_t log_format:4;          /* Log format indicator. Define */
+                                        /* format used for byte 12-2047 */
+        /* Byte 3 */
+        uint32_t :8;                    /* reserved */
+        /* Byte 4-11 */
+        uint8_t reserved[8];            /* reserved */
+        /* Byte 12-15 */
+        uint32_t company_id;            /* Company ID of the company    */
+                                        /* that defines the format for  */
+                                        /* the vendor specific log type */
+        /* Byte 16-end of log */
+        uint8_t vendor_log[1];          /* Start of vendor specific log */
+                                        /* Variable length.             */
 };
 /*
@@ -187,6 +230,7 @@ extern void rtas_progress(char *s, unsigned short hex);
 extern void rtas_initialize(void);
 extern int rtas_suspend_cpu(struct rtas_suspend_me_data *data);
 extern int rtas_suspend_last_cpu(struct rtas_suspend_me_data *data);
+extern int rtas_ibm_suspend_me(struct rtas_args *);
 struct rtc_time;
 extern unsigned long rtas_get_boot_time(void);
diff --git a/arch/powerpc/include/asm/rwsem.h b/arch/powerpc/include/asm/rwsem.h
index 8447d89fbe72..bb1e2cdeb9bf 100644
--- a/arch/powerpc/include/asm/rwsem.h
+++ b/arch/powerpc/include/asm/rwsem.h
@@ -13,11 +13,6 @@
 * by Paul Mackerras <paulus@samba.org>.
 */
-#include <linux/list.h>
-#include <linux/spinlock.h>
-#include <asm/atomic.h>
-#include <asm/system.h>
 /*
 * the semaphore definition
 */
@@ -33,47 +28,6 @@
 #define RWSEM_ACTIVE_READ_BIAS          RWSEM_ACTIVE_BIAS
 #define RWSEM_ACTIVE_WRITE_BIAS         (RWSEM_WAITING_BIAS + RWSEM_ACTIVE_BIAS)
-struct rw_semaphore {
-        long                    count;
-        spinlock_t              wait_lock;
-        struct list_head        wait_list;
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-        struct lockdep_map      dep_map;
-#endif
-};
-#ifdef CONFIG_DEBUG_LOCK_ALLOC
-# define __RWSEM_DEP_MAP_INIT(lockname) , .dep_map = { .name = #lockname }
-#else
-# define __RWSEM_DEP_MAP_INIT(lockname)
-#endif
-#define __RWSEM_INITIALIZER(name)                               \
-{                                                               \
-        RWSEM_UNLOCKED_VALUE,                                   \
-        __SPIN_LOCK_UNLOCKED((name).wait_lock),                 \
-        LIST_HEAD_INIT((name).wait_list)                        \
-        __RWSEM_DEP_MAP_INIT(name)                              \
-}
-#define DECLARE_RWSEM(name)             \
-        struct rw_semaphore name = __RWSEM_INITIALIZER(name)
-extern struct rw_semaphore *rwsem_down_read_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_down_write_failed(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_wake(struct rw_semaphore *sem);
-extern struct rw_semaphore *rwsem_downgrade_wake(struct rw_semaphore *sem);
-extern void __init_rwsem(struct rw_semaphore *sem, const char *name,
-                         struct lock_class_key *key);
-#define init_rwsem(sem)                                 \
-        do {                                            \
-                static struct lock_class_key __key;     \
-                                                        \
-                __init_rwsem((sem), #sem, &__key);      \
-        } while (0)
 /*
 * lock for reading
 */
@@ -174,10 +128,5 @@ static inline long rwsem_atomic_update(long delta, struct rw_semaphore *sem)
        return atomic_long_add_return(delta, (atomic_long_t *)&sem->count);
 }
-static inline int rwsem_is_locked(struct rw_semaphore *sem)
-{
-        return sem->count != 0;
-}
 #endif  /* __KERNEL__ */
 #endif  /* _ASM_POWERPC_RWSEM_H */
diff --git a/arch/powerpc/include/asm/scom.h b/arch/powerpc/include/asm/scom.h
new file mode 100644
index 000000000000..0cabfd7bc2d1
--- /dev/null
+++ b/arch/powerpc/include/asm/scom.h
@@ -0,0 +1,156 @@
+/*
+ * Copyright 2010 Benjamin Herrenschmidt, IBM Corp
+ *                <benh@kernel.crashing.org>
+ *     and        David Gibson, IBM Corporation.
+ *
+ *   This program is free software;  you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY;  without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ *   the GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program;  if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#ifndef _ASM_POWERPC_SCOM_H
+#define _ASM_POWERPC_SCOM_H
+#ifdef __KERNEL__
+#ifndef __ASSEMBLY__
+#ifdef CONFIG_PPC_SCOM
+/*
+ * The SCOM bus is a sideband bus used for accessing various internal
+ * registers of the processor or the chipset. The implementation details
+ * differ between processors and platforms, and the access method as
+ * well.
+ *
+ * This API allows to "map" ranges of SCOM register numbers associated
+ * with a given SCOM controller. The later must be represented by a
+ * device node, though some implementations might support NULL if there
+ * is no possible ambiguity
+ *
+ * Then, scom_read/scom_write can be used to accesses registers inside
+ * that range. The argument passed is a register number relative to
+ * the beginning of the range mapped.
+ */
+typedef void *scom_map_t;
+/* Value for an invalid SCOM map */
+#define SCOM_MAP_INVALID        (NULL)
+/* The scom_controller data structure is what the platform passes
+ * to the core code in scom_init, it provides the actual implementation
+ * of all the SCOM functions
+ */
+struct scom_controller {
+        scom_map_t (*map)(struct device_node *ctrl_dev, u64 reg, u64 count);
+        void (*unmap)(scom_map_t map);
+        u64 (*read)(scom_map_t map, u32 reg);
+        void (*write)(scom_map_t map, u32 reg, u64 value);
+};
+extern const struct scom_controller *scom_controller;
+/**
+ * scom_init - Initialize the SCOM backend, called by the platform
+ * @controller: The platform SCOM controller
+ */
+static inline void scom_init(const struct scom_controller *controller)
+{
+        scom_controller = controller;
+}
+/**
+ * scom_map_ok - Test is a SCOM mapping is successful
+ * @map: The result of scom_map to test
+ */
+static inline int scom_map_ok(scom_map_t map)
+{
+        return map != SCOM_MAP_INVALID;
+}
+/**
+ * scom_map - Map a block of SCOM registers
+ * @ctrl_dev: Device node of the SCOM controller
+ *            some implementations allow NULL here
+ * @reg: first SCOM register to map
+ * @count: Number of SCOM registers to map
+ */
+static inline scom_map_t scom_map(struct device_node *ctrl_dev,
+                                  u64 reg, u64 count)
+{
+        return scom_controller->map(ctrl_dev, reg, count);
+}
+/**
+ * scom_find_parent - Find the SCOM controller for a device
+ * @dev: OF node of the device
+ *
+ * This is not meant for general usage, but in combination with
+ * scom_map() allows to map registers not represented by the
+ * device own scom-reg property. Useful for applying HW workarounds
+ * on things not properly represented in the device-tree for example.
+ */
+struct device_node *scom_find_parent(struct device_node *dev);
+/**
+ * scom_map_device - Map a device's block of SCOM registers
+ * @dev: OF node of the device
+ * @index: Register bank index (index in "scom-reg" property)
+ *
+ * This function will use the device-tree binding for SCOM which
+ * is to follow "scom-parent" properties until it finds a node with
+ * a "scom-controller" property to find the controller. It will then
+ * use the "scom-reg" property which is made of reg/count pairs,
+ * each of them having a size defined by the controller's #scom-cells
+ * property
+ */
+extern scom_map_t scom_map_device(struct device_node *dev, int index);
+/**
+ * scom_unmap - Unmap a block of SCOM registers
+ * @map: Result of scom_map is to be unmapped
+ */
+static inline void scom_unmap(scom_map_t map)
+{
+        if (scom_map_ok(map))
+                scom_controller->unmap(map);
+}
+/**
+ * scom_read - Read a SCOM register
+ * @map: Result of scom_map
+ * @reg: Register index within that map
+ */
+static inline u64 scom_read(scom_map_t map, u32 reg)
+{
+        return scom_controller->read(map, reg);
+}
+/**
+ * scom_write - Write to a SCOM register
+ * @map: Result of scom_map
+ * @reg: Register index within that map
+ * @value: Value to write
+ */
+static inline void scom_write(scom_map_t map, u32 reg, u64 value)
+{
+        scom_controller->write(map, reg, value);
+}
+#endif /* CONFIG_PPC_SCOM */
+#endif /* __ASSEMBLY__ */
+#endif /* __KERNEL__ */
+#endif /* _ASM_POWERPC_SCOM_H */
diff --git a/arch/powerpc/include/asm/smp.h b/arch/powerpc/include/asm/smp.h
index 66e237bbe15f..11eb404b5606 100644
--- a/arch/powerpc/include/asm/smp.h
+++ b/arch/powerpc/include/asm/smp.h
@@ -20,6 +20,7 @@
 #include <linux/threads.h>
 #include <linux/cpumask.h>
 #include <linux/kernel.h>
+#include <linux/irqreturn.h>
 #ifndef __ASSEMBLY__
@@ -29,22 +30,41 @@
 #include <asm/percpu.h>
 extern int boot_cpuid;
+extern int boot_cpu_count;
 extern void cpu_die(void);
 #ifdef CONFIG_SMP
-extern void smp_send_debugger_break(int cpu);
+struct smp_ops_t {
-extern void smp_message_recv(int);
+        void  (*message_pass)(int cpu, int msg);
+#ifdef CONFIG_PPC_SMP_MUXED_IPI
+        void  (*cause_ipi)(int cpu, unsigned long data);
+#endif
+        int   (*probe)(void);
+        int   (*kick_cpu)(int nr);
+        void  (*setup_cpu)(int nr);
+        void  (*bringup_done)(void);
+        void  (*take_timebase)(void);
+        void  (*give_timebase)(void);
+        int   (*cpu_disable)(void);
+        void  (*cpu_die)(unsigned int nr);
+        int   (*cpu_bootable)(unsigned int nr);
+};
+extern void smp_send_debugger_break(void);
+extern void start_secondary_resume(void);
+extern void __devinit smp_generic_give_timebase(void);
+extern void __devinit smp_generic_take_timebase(void);
 DECLARE_PER_CPU(unsigned int, cpu_pvr);
 #ifdef CONFIG_HOTPLUG_CPU
-extern void fixup_irqs(const struct cpumask *map);
+extern void migrate_irqs(void);
 int generic_cpu_disable(void);
-int generic_cpu_enable(unsigned int cpu);
 void generic_cpu_die(unsigned int cpu);
 void generic_mach_cpu_die(void);
+void generic_set_cpu_dead(unsigned int cpu);
 #endif
 #ifdef CONFIG_PPC64
@@ -92,13 +112,16 @@ extern int cpu_to_core_id(int cpu);
 #define PPC_MSG_CALL_FUNC_SINGLE        2
 #define PPC_MSG_DEBUGGER_BREAK  3
-/*
+/* for irq controllers that have dedicated ipis per message (4) */
- * irq controllers that have dedicated ipis per message and don't
- * need additional code in the action handler may use this
- */
 extern int smp_request_message_ipi(int virq, int message);
 extern const char *smp_ipi_name[];
+/* for irq controllers with only a single ipi */
+extern void smp_muxed_ipi_set_data(int cpu, unsigned long data);
+extern void smp_muxed_ipi_message_pass(int cpu, int msg);
+extern void smp_muxed_ipi_resend(void);
+extern irqreturn_t smp_ipi_demux(void);
 void smp_init_iSeries(void);
 void smp_init_pSeries(void);
 void smp_init_cell(void);
@@ -148,7 +171,7 @@ extern int smt_enabled_at_boot;
 extern int smp_mpic_probe(void);
 extern void smp_mpic_setup_cpu(int cpu);
-extern void smp_generic_kick_cpu(int nr);
+extern int smp_generic_kick_cpu(int nr);
 extern void smp_generic_give_timebase(void);
 extern void smp_generic_take_timebase(void);
diff --git a/arch/powerpc/include/asm/spu.h b/arch/powerpc/include/asm/spu.h
index 0ab8d869e3d6..0c8b35d75232 100644
--- a/arch/powerpc/include/asm/spu.h
+++ b/arch/powerpc/include/asm/spu.h
@@ -203,14 +203,6 @@ void spu_irq_setaffinity(struct spu *spu, int cpu);
 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
                void *code, int code_size);
-#ifdef CONFIG_KEXEC
-void crash_register_spus(struct list_head *list);
-#else
-static inline void crash_register_spus(struct list_head *list)
-{
-}
-#endif
 extern void spu_invalidate_slbs(struct spu *spu);
 extern void spu_associate_mm(struct spu *spu, struct mm_struct *mm);
 int spu_64k_pages_available(void);
diff --git a/arch/powerpc/include/asm/spu_priv1.h b/arch/powerpc/include/asm/spu_priv1.h
index 25020a34ce7f..d8f5c60f61c1 100644
--- a/arch/powerpc/include/asm/spu_priv1.h
+++ b/arch/powerpc/include/asm/spu_priv1.h
@@ -223,7 +223,7 @@ spu_disable_spu (struct spu_context *ctx)
 }
 /*
- * The declarations folowing are put here for convenience
+ * The declarations following are put here for convenience
 * and only intended to be used by the platform setup code.
 */
diff --git a/arch/powerpc/include/asm/suspend.h b/arch/powerpc/include/asm/suspend.h
deleted file mode 100644
index c6efc3466aa6..000000000000
--- a/arch/powerpc/include/asm/suspend.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef __ASM_POWERPC_SUSPEND_H
-#define __ASM_POWERPC_SUSPEND_H
-static inline int arch_prepare_suspend(void) { return 0; }
-#endif /* __ASM_POWERPC_SUSPEND_H */
diff --git a/arch/powerpc/include/asm/syscall.h b/arch/powerpc/include/asm/syscall.h
index 23913e902fc3..b54b2add07be 100644
--- a/arch/powerpc/include/asm/syscall.h
+++ b/arch/powerpc/include/asm/syscall.h
@@ -15,6 +15,11 @@
 #include <linux/sched.h>
+/* ftrace syscalls requires exporting the sys_call_table */
+#ifdef CONFIG_FTRACE_SYSCALLS
+extern const unsigned long *sys_call_table;
+#endif /* CONFIG_FTRACE_SYSCALLS */
 static inline long syscall_get_nr(struct task_struct *task,
                                  struct pt_regs *regs)
 {
diff --git a/arch/powerpc/include/asm/systbl.h b/arch/powerpc/include/asm/systbl.h
index 3d212669a130..f6736b7da463 100644
--- a/arch/powerpc/include/asm/systbl.h
+++ b/arch/powerpc/include/asm/systbl.h
@@ -329,3 +329,28 @@ COMPAT_SYS(rt_tgsigqueueinfo)
 SYSCALL(fanotify_init)
 COMPAT_SYS(fanotify_mark)
 SYSCALL_SPU(prlimit64)
+SYSCALL_SPU(socket)
+SYSCALL_SPU(bind)
+SYSCALL_SPU(connect)
+SYSCALL_SPU(listen)
+SYSCALL_SPU(accept)
+SYSCALL_SPU(getsockname)
+SYSCALL_SPU(getpeername)
+SYSCALL_SPU(socketpair)
+SYSCALL_SPU(send)
+SYSCALL_SPU(sendto)
+COMPAT_SYS_SPU(recv)
+COMPAT_SYS_SPU(recvfrom)
+SYSCALL_SPU(shutdown)
+COMPAT_SYS_SPU(setsockopt)
+COMPAT_SYS_SPU(getsockopt)
+COMPAT_SYS_SPU(sendmsg)
+COMPAT_SYS_SPU(recvmsg)
+COMPAT_SYS_SPU(recvmmsg)
+SYSCALL_SPU(accept4)
+SYSCALL_SPU(name_to_handle_at)
+COMPAT_SYS_SPU(open_by_handle_at)
+COMPAT_SYS_SPU(clock_adjtime)
+SYSCALL_SPU(syncfs)
+COMPAT_SYS_SPU(sendmmsg)
+SYSCALL_SPU(setns)
diff --git a/arch/powerpc/include/asm/system.h b/arch/powerpc/include/asm/system.h
index 6c294acac848..2dc595dda03b 100644
--- a/arch/powerpc/include/asm/system.h
+++ b/arch/powerpc/include/asm/system.h
@@ -154,8 +154,8 @@ extern void enable_kernel_spe(void);
 extern void giveup_spe(struct task_struct *);
 extern void load_up_spe(struct task_struct *);
 extern int fix_alignment(struct pt_regs *);
-extern void cvt_fd(float *from, double *to, struct thread_struct *thread);
+extern void cvt_fd(float *from, double *to);
-extern void cvt_df(double *from, float *to, struct thread_struct *thread);
+extern void cvt_df(double *from, float *to);
 #ifndef CONFIG_SMP
 extern void discard_lazy_cpu_state(void);
@@ -219,8 +219,6 @@ extern int mem_init_done;	/* set on boot once kmalloc can be called */
 extern int init_bootmem_done;   /* set once bootmem is available */
 extern phys_addr_t memory_limit;
 extern unsigned long klimit;
-extern void *alloc_maybe_bootmem(size_t size, gfp_t mask);
 extern void *zalloc_maybe_bootmem(size_t size, gfp_t mask);
 extern int powersave_nap;       /* set if nap mode can be used in idle loop */
@@ -542,10 +540,6 @@ extern void reloc_got2(unsigned long);
 #define PTRRELOC(x)     ((typeof(x)) add_reloc_offset((unsigned long)(x)))
-#ifdef CONFIG_VIRT_CPU_ACCOUNTING
-extern void account_system_vtime(struct task_struct *);
-#endif
 extern struct dentry *powerpc_debugfs_root;
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/include/asm/thread_info.h b/arch/powerpc/include/asm/thread_info.h
index 65eb85976a03..836f231ec1f0 100644
--- a/arch/powerpc/include/asm/thread_info.h
+++ b/arch/powerpc/include/asm/thread_info.h
@@ -72,7 +72,7 @@ struct thread_info {
 #define __HAVE_ARCH_THREAD_INFO_ALLOCATOR
-extern struct thread_info *alloc_thread_info(struct task_struct *tsk);
+extern struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node);
 extern void free_thread_info(struct thread_info *ti);
 #endif /* THREAD_SHIFT < PAGE_SHIFT */
@@ -110,7 +110,8 @@ static inline struct thread_info *current_thread_info(void)
 #define TIF_NOERROR             12      /* Force successful syscall return */
 #define TIF_NOTIFY_RESUME       13      /* callback before returning to user */
 #define TIF_FREEZE              14      /* Freezing for suspend */
-#define TIF_RUNLATCH            15      /* Is the runlatch enabled? */
+#define TIF_SYSCALL_TRACEPOINT  15      /* syscall tracepoint instrumentation */
+#define TIF_RUNLATCH            16      /* Is the runlatch enabled? */
 /* as above, but as bit values */
 #define _TIF_SYSCALL_TRACE      (1<<TIF_SYSCALL_TRACE)
@@ -127,8 +128,10 @@ static inline struct thread_info *current_thread_info(void)
 #define _TIF_NOERROR            (1<<TIF_NOERROR)
 #define _TIF_NOTIFY_RESUME      (1<<TIF_NOTIFY_RESUME)
 #define _TIF_FREEZE             (1<<TIF_FREEZE)
+#define _TIF_SYSCALL_TRACEPOINT (1<<TIF_SYSCALL_TRACEPOINT)
 #define _TIF_RUNLATCH           (1<<TIF_RUNLATCH)
-#define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE|_TIF_SYSCALL_AUDIT|_TIF_SECCOMP)
+#define _TIF_SYSCALL_T_OR_A     (_TIF_SYSCALL_TRACE | _TIF_SYSCALL_AUDIT | \
+                                 _TIF_SECCOMP | _TIF_SYSCALL_TRACEPOINT)
 #define _TIF_USER_WORK_MASK     (_TIF_SIGPENDING | _TIF_NEED_RESCHED | \
                                 _TIF_NOTIFY_RESUME)
@@ -139,10 +142,12 @@ static inline struct thread_info *current_thread_info(void)
 #define TLF_NAPPING             0       /* idle thread enabled NAP mode */
 #define TLF_SLEEPING            1       /* suspend code enabled SLEEP mode */
 #define TLF_RESTORE_SIGMASK     2       /* Restore signal mask in do_signal */
+#define TLF_LAZY_MMU            3       /* tlb_batch is active */
 #define _TLF_NAPPING            (1 << TLF_NAPPING)
 #define _TLF_SLEEPING           (1 << TLF_SLEEPING)
 #define _TLF_RESTORE_SIGMASK    (1 << TLF_RESTORE_SIGMASK)
+#define _TLF_LAZY_MMU           (1 << TLF_LAZY_MMU)
 #ifndef __ASSEMBLY__
 #define HAVE_SET_RESTORE_SIGMASK        1
diff --git a/arch/powerpc/include/asm/time.h b/arch/powerpc/include/asm/time.h
index dc779dfcf258..fe6f7c2c9c68 100644
--- a/arch/powerpc/include/asm/time.h
+++ b/arch/powerpc/include/asm/time.h
@@ -34,7 +34,6 @@ extern void to_tm(int tim, struct rtc_time * tm);
 extern void GregorianDay(struct rtc_time *tm);
 extern void generic_calibrate_decr(void);
-extern void snapshot_timebase(void);
 extern void set_dec_cpu6(unsigned int val);
@@ -212,12 +211,8 @@ struct cpu_usage {
 DECLARE_PER_CPU(struct cpu_usage, cpu_usage_array);
 #if defined(CONFIG_VIRT_CPU_ACCOUNTING)
-extern void calculate_steal_time(void);
-extern void snapshot_timebases(void);
 #define account_process_vtime(tsk)              account_process_tick(tsk, 0)
 #else
-#define calculate_steal_time()                  do { } while (0)
-#define snapshot_timebases()                    do { } while (0)
 #define account_process_vtime(tsk)              do { } while (0)
 #endif
diff --git a/arch/powerpc/include/asm/tlbflush.h b/arch/powerpc/include/asm/tlbflush.h
index d50a380b2b6f..81143fcbd113 100644
--- a/arch/powerpc/include/asm/tlbflush.h
+++ b/arch/powerpc/include/asm/tlbflush.h
@@ -79,6 +79,8 @@ static inline void local_flush_tlb_mm(struct mm_struct *mm)
 #elif defined(CONFIG_PPC_STD_MMU_64)
+#define MMU_NO_CONTEXT          0
 /*
 * TLB flushing for 64-bit hash-MMU CPUs
 */
diff --git a/arch/powerpc/include/asm/topology.h b/arch/powerpc/include/asm/topology.h
index afe4aaa65c3b..7ef0d90defc8 100644
--- a/arch/powerpc/include/asm/topology.h
+++ b/arch/powerpc/include/asm/topology.h
@@ -106,9 +106,22 @@ static inline void sysfs_remove_device_from_node(struct sys_device *dev,
                                                int nid)
 {
 }
 #endif /* CONFIG_NUMA */
+#if defined(CONFIG_NUMA) && defined(CONFIG_PPC_SPLPAR)
+extern int start_topology_update(void);
+extern int stop_topology_update(void);
+#else
+static inline int start_topology_update(void)
+{
+        return 0;
+}
+static inline int stop_topology_update(void)
+{
+        return 0;
+}
+#endif /* CONFIG_NUMA && CONFIG_PPC_SPLPAR */
 #include <asm-generic/topology.h>
 #ifdef CONFIG_SMP
diff --git a/arch/powerpc/include/asm/types.h b/arch/powerpc/include/asm/types.h
index a5aea0ca34e9..8947b9827bc4 100644
--- a/arch/powerpc/include/asm/types.h
+++ b/arch/powerpc/include/asm/types.h
@@ -44,13 +44,6 @@ typedef struct {
 typedef __vector128 vector128;
-#if defined(__powerpc64__) || defined(CONFIG_PHYS_64BIT)
-typedef u64 dma_addr_t;
-#else
-typedef u32 dma_addr_t;
-#endif
-typedef u64 dma64_addr_t;
 typedef struct {
        unsigned long entry;
        unsigned long toc;
diff --git a/arch/powerpc/include/asm/udbg.h b/arch/powerpc/include/asm/udbg.h
index 11ae699135ba..58580e94a2bb 100644
--- a/arch/powerpc/include/asm/udbg.h
+++ b/arch/powerpc/include/asm/udbg.h
@@ -52,6 +52,7 @@ extern void __init udbg_init_44x_as1(void);
 extern void __init udbg_init_40x_realmode(void);
 extern void __init udbg_init_cpm(void);
 extern void __init udbg_init_usbgecko(void);
+extern void __init udbg_init_wsp(void);
 #endif /* __KERNEL__ */
 #endif /* _ASM_POWERPC_UDBG_H */
diff --git a/arch/powerpc/include/asm/uninorth.h b/arch/powerpc/include/asm/uninorth.h
index f737732c3861..d12b11d7641e 100644
--- a/arch/powerpc/include/asm/uninorth.h
+++ b/arch/powerpc/include/asm/uninorth.h
@@ -60,7 +60,7 @@
 *
 * Obviously, the GART is not cache coherent and so any change to it
 * must be flushed to memory (or maybe just make the GART space non
- * cachable). AGP memory itself doens't seem to be cache coherent neither.
+ * cachable). AGP memory itself doesn't seem to be cache coherent neither.
 *
 * In order to invalidate the GART (which is probably necessary to inval
 * the bridge internal TLBs), the following sequence has to be written,
diff --git a/arch/powerpc/include/asm/unistd.h b/arch/powerpc/include/asm/unistd.h
index 597e6f9d094a..b8b3f599362b 100644
--- a/arch/powerpc/include/asm/unistd.h
+++ b/arch/powerpc/include/asm/unistd.h
@@ -348,10 +348,35 @@
 #define __NR_fanotify_init      323
 #define __NR_fanotify_mark      324
 #define __NR_prlimit64          325
+#define __NR_socket             326
+#define __NR_bind               327
+#define __NR_connect            328
+#define __NR_listen             329
+#define __NR_accept             330
+#define __NR_getsockname        331
+#define __NR_getpeername        332
+#define __NR_socketpair         333
+#define __NR_send               334
+#define __NR_sendto             335
+#define __NR_recv               336
+#define __NR_recvfrom           337
+#define __NR_shutdown           338
+#define __NR_setsockopt         339
+#define __NR_getsockopt         340
+#define __NR_sendmsg            341
+#define __NR_recvmsg            342
+#define __NR_recvmmsg           343
+#define __NR_accept4            344
+#define __NR_name_to_handle_at  345
+#define __NR_open_by_handle_at  346
+#define __NR_clock_adjtime      347
+#define __NR_syncfs             348
+#define __NR_sendmmsg           349
+#define __NR_setns              350
 #ifdef __KERNEL__
-#define __NR_syscalls           326
+#define __NR_syscalls           351
 #define __NR__exit __NR_exit
 #define NR_syscalls     __NR_syscalls
diff --git a/arch/powerpc/include/asm/vdso_datapage.h b/arch/powerpc/include/asm/vdso_datapage.h
index 08679c5319b8..b73a8199f161 100644
--- a/arch/powerpc/include/asm/vdso_datapage.h
+++ b/arch/powerpc/include/asm/vdso_datapage.h
@@ -57,7 +57,7 @@ struct vdso_data {
        } version;
        /* Note about the platform flags: it now only contains the lpar
-         * bit. The actual platform number is dead and burried
+         * bit. The actual platform number is dead and buried
         */
        __u32 platform;                 /* Platform flags               0x18 */
        __u32 processor;                /* Processor type               0x1C */
@@ -116,9 +116,7 @@ struct vdso_data {
 #endif /* CONFIG_PPC64 */
-#ifdef __KERNEL__
 extern struct vdso_data *vdso_data;
-#endif
 #endif /* __ASSEMBLY__ */
diff --git a/arch/powerpc/include/asm/wsp.h b/arch/powerpc/include/asm/wsp.h
new file mode 100644
index 000000000000..c7dc83088a33
--- /dev/null
+++ b/arch/powerpc/include/asm/wsp.h
@@ -0,0 +1,14 @@
+/*
+ *  Copyright 2011 Michael Ellerman, IBM Corp.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#ifndef __ASM_POWERPC_WSP_H
+#define __ASM_POWERPC_WSP_H
+extern int wsp_get_chip_id(struct device_node *dn);
+#endif /* __ASM_POWERPC_WSP_H */
diff --git a/arch/powerpc/include/asm/xics.h b/arch/powerpc/include/asm/xics.h
new file mode 100644
index 000000000000..b183a4062011
--- /dev/null
+++ b/arch/powerpc/include/asm/xics.h
@@ -0,0 +1,142 @@
+/*
+ * Common definitions accross all variants of ICP and ICS interrupt
+ * controllers.
+ */
+#ifndef _XICS_H
+#define _XICS_H
+#include <linux/interrupt.h>
+#define XICS_IPI                2
+#define XICS_IRQ_SPURIOUS       0
+/* Want a priority other than 0.  Various HW issues require this. */
+#define DEFAULT_PRIORITY        5
+/*
+ * Mark IPIs as higher priority so we can take them inside interrupts that
+ * arent marked IRQF_DISABLED
+ */
+#define IPI_PRIORITY            4
+/* The least favored priority */
+#define LOWEST_PRIORITY         0xFF
+/* The number of priorities defined above */
+#define MAX_NUM_PRIORITIES      3
+/* Native ICP */
+extern int icp_native_init(void);
+/* PAPR ICP */
+extern int icp_hv_init(void);
+/* ICP ops */
+struct icp_ops {
+        unsigned int (*get_irq)(void);
+        void (*eoi)(struct irq_data *d);
+        void (*set_priority)(unsigned char prio);
+        void (*teardown_cpu)(void);
+        void (*flush_ipi)(void);
+#ifdef CONFIG_SMP
+        void (*cause_ipi)(int cpu, unsigned long data);
+        irq_handler_t ipi_action;
+#endif
+};
+extern const struct icp_ops *icp_ops;
+/* Native ICS */
+extern int ics_native_init(void);
+/* RTAS ICS */
+extern int ics_rtas_init(void);
+/* ICS instance, hooked up to chip_data of an irq */
+struct ics {
+        struct list_head link;
+        int (*map)(struct ics *ics, unsigned int virq);
+        void (*mask_unknown)(struct ics *ics, unsigned long vec);
+        long (*get_server)(struct ics *ics, unsigned long vec);
+        int (*host_match)(struct ics *ics, struct device_node *node);
+        char data[];
+};
+/* Commons */
+extern unsigned int xics_default_server;
+extern unsigned int xics_default_distrib_server;
+extern unsigned int xics_interrupt_server_size;
+extern struct irq_host *xics_host;
+struct xics_cppr {
+        unsigned char stack[MAX_NUM_PRIORITIES];
+        int index;
+};
+DECLARE_PER_CPU(struct xics_cppr, xics_cppr);
+static inline void xics_push_cppr(unsigned int vec)
+{
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
+                return;
+        if (vec == XICS_IPI)
+                os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
+        else
+                os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
+}
+static inline unsigned char xics_pop_cppr(void)
+{
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        if (WARN_ON(os_cppr->index < 1))
+                return LOWEST_PRIORITY;
+        return os_cppr->stack[--os_cppr->index];
+}
+static inline void xics_set_base_cppr(unsigned char cppr)
+{
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        /* we only really want to set the priority when there's
+         * just one cppr value on the stack
+         */
+        WARN_ON(os_cppr->index != 0);
+        os_cppr->stack[0] = cppr;
+}
+static inline unsigned char xics_cppr_top(void)
+{
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        
+        return os_cppr->stack[os_cppr->index];
+}
+DECLARE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
+extern void xics_init(void);
+extern void xics_setup_cpu(void);
+extern void xics_update_irq_servers(void);
+extern void xics_set_cpu_giq(unsigned int gserver, unsigned int join);
+extern void xics_mask_unknown_vec(unsigned int vec);
+extern irqreturn_t xics_ipi_dispatch(int cpu);
+extern int xics_smp_probe(void);
+extern void xics_register_ics(struct ics *ics);
+extern void xics_teardown_cpu(void);
+extern void xics_kexec_teardown_cpu(int secondary);
+extern void xics_migrate_irqs_away(void);
+#ifdef CONFIG_SMP
+extern int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
+                               unsigned int strict_check);
+#else
+#define xics_get_irq_server(virq, cpumask, strict_check) (xics_default_server)
+#endif
+#endif /* _XICS_H */
diff --git a/arch/powerpc/kernel/Makefile b/arch/powerpc/kernel/Makefile
index 1dda70129141..e8b981897d44 100644
--- a/arch/powerpc/kernel/Makefile
+++ b/arch/powerpc/kernel/Makefile
@@ -29,18 +29,23 @@ endif
 obj-y                           := cputable.o ptrace.o syscalls.o \
                                   irq.o align.o signal_32.o pmc.o vdso.o \
                                   init_task.o process.o systbl.o idle.o \
-                                   signal.o sysfs.o cacheinfo.o
+                                   signal.o sysfs.o cacheinfo.o time.o \
-obj-y                           += vdso32/
+                                   prom.o traps.o setup-common.o \
+                                   udbg.o misc.o io.o dma.o \
+                                   misc_$(CONFIG_WORD_SIZE).o vdso32/
 obj-$(CONFIG_PPC64)             += setup_64.o sys_ppc32.o \
                                   signal_64.o ptrace32.o \
                                   paca.o nvram_64.o firmware.o
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += hw_breakpoint.o
 obj-$(CONFIG_PPC_BOOK3S_64)     += cpu_setup_ppc970.o cpu_setup_pa6t.o
+obj-$(CONFIG_PPC_BOOK3S_64)     += cpu_setup_power7.o
 obj64-$(CONFIG_RELOCATABLE)     += reloc_64.o
 obj-$(CONFIG_PPC_BOOK3E_64)     += exceptions-64e.o idle_book3e.o
+obj-$(CONFIG_PPC_A2)            += cpu_setup_a2.o
 obj-$(CONFIG_PPC64)             += vdso64/
 obj-$(CONFIG_ALTIVEC)           += vecemu.o
 obj-$(CONFIG_PPC_970_NAP)       += idle_power4.o
+obj-$(CONFIG_PPC_P7_NAP)        += idle_power7.o
 obj-$(CONFIG_PPC_OF)            += of_platform.o prom_parse.o
 obj-$(CONFIG_PPC_CLOCK)         += clock.o
 procfs-y                        := proc_powerpc.o
@@ -55,7 +60,9 @@ obj-$(CONFIG_IBMVIO)		+= vio.o
 obj-$(CONFIG_IBMEBUS)           += ibmebus.o
 obj-$(CONFIG_GENERIC_TBSYNC)    += smp-tbsync.o
 obj-$(CONFIG_CRASH_DUMP)        += crash_dump.o
+ifeq ($(CONFIG_PPC32),y)
 obj-$(CONFIG_E500)              += idle_e500.o
+endif
 obj-$(CONFIG_6xx)               += idle_6xx.o l2cr_6xx.o cpu_setup_6xx.o
 obj-$(CONFIG_TAU)               += tau_6xx.o
 obj-$(CONFIG_HIBERNATION)       += swsusp.o suspend.o
@@ -67,20 +74,16 @@ endif
 obj64-$(CONFIG_HIBERNATION)     += swsusp_asm64.o
 obj-$(CONFIG_MODULES)           += module.o module_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_44x)               += cpu_setup_44x.o
-obj-$(CONFIG_FSL_BOOKE)         += cpu_setup_fsl_booke.o dbell.o
+obj-$(CONFIG_PPC_FSL_BOOK3E)    += cpu_setup_fsl_booke.o dbell.o
 obj-$(CONFIG_PPC_BOOK3E_64)     += dbell.o
 extra-y                         := head_$(CONFIG_WORD_SIZE).o
-extra-$(CONFIG_PPC_BOOK3E_32)   := head_new_booke.o
 extra-$(CONFIG_40x)             := head_40x.o
 extra-$(CONFIG_44x)             := head_44x.o
 extra-$(CONFIG_FSL_BOOKE)       := head_fsl_booke.o
 extra-$(CONFIG_8xx)             := head_8xx.o
 extra-y                         += vmlinux.lds
-obj-y                           += time.o prom.o traps.o setup-common.o \
-                                   udbg.o misc.o io.o dma.o \
-                                   misc_$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_PPC32)             += entry_32.o setup_32.o
 obj-$(CONFIG_PPC64)             += dma-iommu.o iommu.o
 obj-$(CONFIG_KGDB)              += kgdb.o
@@ -102,8 +105,11 @@ obj-$(CONFIG_KEXEC)		+= machine_kexec.o crash.o \
 obj-$(CONFIG_AUDIT)             += audit.o
 obj64-$(CONFIG_AUDIT)           += compat_audit.o
+obj-$(CONFIG_PPC_IO_WORKAROUNDS)        += io-workarounds.o
 obj-$(CONFIG_DYNAMIC_FTRACE)    += ftrace.o
 obj-$(CONFIG_FUNCTION_GRAPH_TRACER)     += ftrace.o
+obj-$(CONFIG_FTRACE_SYSCALLS)   += ftrace.o
 obj-$(CONFIG_PERF_EVENTS)       += perf_callchain.o
 obj-$(CONFIG_PPC_PERF_CTRS)     += perf_event.o
@@ -127,6 +133,8 @@ ifneq ($(CONFIG_XMON)$(CONFIG_KEXEC),)
 obj-y                           += ppc_save_regs.o
 endif
+obj-$(CONFIG_KVM_GUEST)         += kvm.o kvm_emul.o
 # Disable GCOV in odd or sensitive code
 GCOV_PROFILE_prom_init.o := n
 GCOV_PROFILE_ftrace.o := n
diff --git a/arch/powerpc/kernel/align.c b/arch/powerpc/kernel/align.c
index b876e989220b..8184ee97e484 100644
--- a/arch/powerpc/kernel/align.c
+++ b/arch/powerpc/kernel/align.c
@@ -889,7 +889,7 @@ int fix_alignment(struct pt_regs *regs)
 #ifdef CONFIG_PPC_FPU
                        preempt_disable();
                        enable_kernel_fp();
-                        cvt_df(&data.dd, (float *)&data.v[4], &current->thread);
+                        cvt_df(&data.dd, (float *)&data.v[4]);
                        preempt_enable();
 #else
                        return 0;
@@ -933,7 +933,7 @@ int fix_alignment(struct pt_regs *regs)
 #ifdef CONFIG_PPC_FPU
                preempt_disable();
                enable_kernel_fp();
-                cvt_fd((float *)&data.v[4], &data.dd, &current->thread);
+                cvt_fd((float *)&data.v[4], &data.dd);
                preempt_enable();
 #else
                return 0;
diff --git a/arch/powerpc/kernel/asm-offsets.c b/arch/powerpc/kernel/asm-offsets.c
index 1c0607ddccc0..36e1c8a29be8 100644
--- a/arch/powerpc/kernel/asm-offsets.c
+++ b/arch/powerpc/kernel/asm-offsets.c
@@ -48,11 +48,11 @@
 #ifdef CONFIG_PPC_ISERIES
 #include <asm/iseries/alpaca.h>
 #endif
-#ifdef CONFIG_KVM
+#if defined(CONFIG_KVM) || defined(CONFIG_KVM_GUEST)
 #include <linux/kvm_host.h>
-#ifndef CONFIG_BOOKE
-#include <asm/kvm_book3s.h>
 #endif
+#if defined(CONFIG_KVM) && defined(CONFIG_PPC_BOOK3S)
+#include <asm/kvm_book3s.h>
 #endif
 #ifdef CONFIG_PPC32
@@ -61,7 +61,7 @@
 #endif
 #endif
-#if defined(CONFIG_FSL_BOOKE)
+#if defined(CONFIG_PPC_FSL_BOOK3E)
 #include "../mm/mmu_decl.h"
 #endif
@@ -74,6 +74,7 @@ int main(void)
        DEFINE(AUDITCONTEXT, offsetof(struct task_struct, audit_context));
        DEFINE(SIGSEGV, SIGSEGV);
        DEFINE(NMI_MASK, NMI_MASK);
+        DEFINE(THREAD_DSCR, offsetof(struct thread_struct, dscr));
 #else
        DEFINE(THREAD_INFO, offsetof(struct task_struct, stack));
 #endif /* CONFIG_PPC64 */
@@ -181,17 +182,19 @@ int main(void)
               offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].vsid));
        DEFINE(SLBSHADOW_STACKESID,
               offsetof(struct slb_shadow, save_area[SLB_NUM_BOLTED - 1].esid));
+        DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
        DEFINE(LPPACASRR0, offsetof(struct lppaca, saved_srr0));
        DEFINE(LPPACASRR1, offsetof(struct lppaca, saved_srr1));
        DEFINE(LPPACAANYINT, offsetof(struct lppaca, int_dword.any_int));
        DEFINE(LPPACADECRINT, offsetof(struct lppaca, int_dword.fields.decr_int));
-        DEFINE(SLBSHADOW_SAVEAREA, offsetof(struct slb_shadow, save_area));
+        DEFINE(LPPACA_DTLIDX, offsetof(struct lppaca, dtl_idx));
+        DEFINE(PACA_DTL_RIDX, offsetof(struct paca_struct, dtl_ridx));
 #endif /* CONFIG_PPC_STD_MMU_64 */
        DEFINE(PACAEMERGSP, offsetof(struct paca_struct, emergency_sp));
        DEFINE(PACAHWCPUID, offsetof(struct paca_struct, hw_cpu_id));
        DEFINE(PACAKEXECSTATE, offsetof(struct paca_struct, kexec_state));
-        DEFINE(PACA_STARTPURR, offsetof(struct paca_struct, startpurr));
+        DEFINE(PACA_STARTTIME, offsetof(struct paca_struct, starttime));
-        DEFINE(PACA_STARTSPURR, offsetof(struct paca_struct, startspurr));
+        DEFINE(PACA_STARTTIME_USER, offsetof(struct paca_struct, starttime_user));
        DEFINE(PACA_USER_TIME, offsetof(struct paca_struct, user_time));
        DEFINE(PACA_SYSTEM_TIME, offsetof(struct paca_struct, system_time));
        DEFINE(PACA_TRAP_SAVE, offsetof(struct paca_struct, trap_save));
@@ -207,7 +210,6 @@ int main(void)
        DEFINE(RTASENTRY, offsetof(struct rtas_t, entry));
        /* Interrupt register frame */
-        DEFINE(STACK_FRAME_OVERHEAD, STACK_FRAME_OVERHEAD);
        DEFINE(INT_FRAME_SIZE, STACK_INT_FRAME_SIZE);
        DEFINE(SWITCH_FRAME_SIZE, STACK_FRAME_OVERHEAD + sizeof(struct pt_regs));
 #ifdef CONFIG_PPC64
@@ -394,12 +396,14 @@ int main(void)
        DEFINE(VCPU_HOST_STACK, offsetof(struct kvm_vcpu, arch.host_stack));
        DEFINE(VCPU_HOST_PID, offsetof(struct kvm_vcpu, arch.host_pid));
        DEFINE(VCPU_GPRS, offsetof(struct kvm_vcpu, arch.gpr));
-        DEFINE(VCPU_MSR, offsetof(struct kvm_vcpu, arch.msr));
+        DEFINE(VCPU_VRSAVE, offsetof(struct kvm_vcpu, arch.vrsave));
        DEFINE(VCPU_SPRG4, offsetof(struct kvm_vcpu, arch.sprg4));
        DEFINE(VCPU_SPRG5, offsetof(struct kvm_vcpu, arch.sprg5));
        DEFINE(VCPU_SPRG6, offsetof(struct kvm_vcpu, arch.sprg6));
        DEFINE(VCPU_SPRG7, offsetof(struct kvm_vcpu, arch.sprg7));
        DEFINE(VCPU_SHADOW_PID, offsetof(struct kvm_vcpu, arch.shadow_pid));
+        DEFINE(VCPU_SHARED, offsetof(struct kvm_vcpu, arch.shared));
+        DEFINE(VCPU_SHARED_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
        /* book3s */
 #ifdef CONFIG_PPC_BOOK3S
@@ -464,11 +468,27 @@ int main(void)
        DEFINE(VCPU_FAULT_ESR, offsetof(struct kvm_vcpu, arch.fault_esr));
 #endif /* CONFIG_PPC_BOOK3S */
 #endif
+#ifdef CONFIG_KVM_GUEST
+        DEFINE(KVM_MAGIC_SCRATCH1, offsetof(struct kvm_vcpu_arch_shared,
+                                            scratch1));
+        DEFINE(KVM_MAGIC_SCRATCH2, offsetof(struct kvm_vcpu_arch_shared,
+                                            scratch2));
+        DEFINE(KVM_MAGIC_SCRATCH3, offsetof(struct kvm_vcpu_arch_shared,
+                                            scratch3));
+        DEFINE(KVM_MAGIC_INT, offsetof(struct kvm_vcpu_arch_shared,
+                                       int_pending));
+        DEFINE(KVM_MAGIC_MSR, offsetof(struct kvm_vcpu_arch_shared, msr));
+        DEFINE(KVM_MAGIC_CRITICAL, offsetof(struct kvm_vcpu_arch_shared,
+                                            critical));
+        DEFINE(KVM_MAGIC_SR, offsetof(struct kvm_vcpu_arch_shared, sr));
+#endif
 #ifdef CONFIG_44x
        DEFINE(PGD_T_LOG2, PGD_T_LOG2);
        DEFINE(PTE_T_LOG2, PTE_T_LOG2);
 #endif
-#ifdef CONFIG_FSL_BOOKE
+#ifdef CONFIG_PPC_FSL_BOOK3E
        DEFINE(TLBCAM_SIZE, sizeof(struct tlbcam));
        DEFINE(TLBCAM_MAS0, offsetof(struct tlbcam, MAS0));
        DEFINE(TLBCAM_MAS1, offsetof(struct tlbcam, MAS1));
diff --git a/arch/powerpc/kernel/btext.c b/arch/powerpc/kernel/btext.c
index 625942ae5585..60b3e377b1e4 100644
--- a/arch/powerpc/kernel/btext.c
+++ b/arch/powerpc/kernel/btext.c
@@ -99,7 +99,7 @@ void __init btext_prepare_BAT(void)
 /* This function can be used to enable the early boot text when doing
 * OF booting or within bootx init. It must be followed by a btext_unmap()
- * call before the logical address becomes unuseable
+ * call before the logical address becomes unusable
 */
 void __init btext_setup_display(int width, int height, int depth, int pitch,
                                unsigned long address)
diff --git a/arch/powerpc/kernel/cpu_setup_44x.S b/arch/powerpc/kernel/cpu_setup_44x.S
index 7d606f89a839..e32b4a9a2c22 100644
--- a/arch/powerpc/kernel/cpu_setup_44x.S
+++ b/arch/powerpc/kernel/cpu_setup_44x.S
@@ -35,6 +35,7 @@ _GLOBAL(__setup_cpu_440grx)
 _GLOBAL(__setup_cpu_460ex)
 _GLOBAL(__setup_cpu_460gt)
 _GLOBAL(__setup_cpu_460sx)
+_GLOBAL(__setup_cpu_apm821xx)
        mflr    r4
        bl      __init_fpu_44x
        bl      __fixup_440A_mcheck
diff --git a/arch/powerpc/kernel/cpu_setup_6xx.S b/arch/powerpc/kernel/cpu_setup_6xx.S
index 55cba4a8a959..f8cd9fba4d35 100644
--- a/arch/powerpc/kernel/cpu_setup_6xx.S
+++ b/arch/powerpc/kernel/cpu_setup_6xx.S
@@ -18,7 +18,7 @@
 #include <asm/mmu.h>
 _GLOBAL(__setup_cpu_603)
-        mflr    r4
+        mflr    r5
 BEGIN_MMU_FTR_SECTION
        li      r10,0
        mtspr   SPRN_SPRG_603_LRU,r10           /* init SW LRU tracking */
@@ -27,60 +27,60 @@ BEGIN_FTR_SECTION
        bl      __init_fpu_registers
 END_FTR_SECTION_IFCLR(CPU_FTR_FPU_UNAVAILABLE)
        bl      setup_common_caches
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_604)
-        mflr    r4
+        mflr    r5
        bl      setup_common_caches
        bl      setup_604_hid0
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_750)
-        mflr    r4
+        mflr    r5
        bl      __init_fpu_registers
        bl      setup_common_caches
        bl      setup_750_7400_hid0
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_750cx)
-        mflr    r4
+        mflr    r5
        bl      __init_fpu_registers
        bl      setup_common_caches
        bl      setup_750_7400_hid0
        bl      setup_750cx
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_750fx)
-        mflr    r4
+        mflr    r5
        bl      __init_fpu_registers
        bl      setup_common_caches
        bl      setup_750_7400_hid0
        bl      setup_750fx
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_7400)
-        mflr    r4
+        mflr    r5
        bl      __init_fpu_registers
        bl      setup_7400_workarounds
        bl      setup_common_caches
        bl      setup_750_7400_hid0
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_7410)
-        mflr    r4
+        mflr    r5
        bl      __init_fpu_registers
        bl      setup_7410_workarounds
        bl      setup_common_caches
        bl      setup_750_7400_hid0
        li      r3,0
        mtspr   SPRN_L2CR2,r3
-        mtlr    r4
+        mtlr    r5
        blr
 _GLOBAL(__setup_cpu_745x)
-        mflr    r4
+        mflr    r5
        bl      setup_common_caches
        bl      setup_745x_specifics
-        mtlr    r4
+        mtlr    r5
        blr
 /* Enable caches for 603's, 604, 750 & 7400 */
@@ -194,10 +194,10 @@ setup_750cx:
        cror    4*cr0+eq,4*cr0+eq,4*cr1+eq
        cror    4*cr0+eq,4*cr0+eq,4*cr2+eq
        bnelr
-        lwz     r6,CPU_SPEC_FEATURES(r5)
+        lwz     r6,CPU_SPEC_FEATURES(r4)
        li      r7,CPU_FTR_CAN_NAP
        andc    r6,r6,r7
-        stw     r6,CPU_SPEC_FEATURES(r5)
+        stw     r6,CPU_SPEC_FEATURES(r4)
        blr
 /* 750fx specific
@@ -225,12 +225,12 @@ BEGIN_FTR_SECTION
        andis.  r11,r11,L3CR_L3E@h
        beq     1f
 END_FTR_SECTION_IFSET(CPU_FTR_L3CR)
-        lwz     r6,CPU_SPEC_FEATURES(r5)
+        lwz     r6,CPU_SPEC_FEATURES(r4)
        andi.   r0,r6,CPU_FTR_L3_DISABLE_NAP
        beq     1f
        li      r7,CPU_FTR_CAN_NAP
        andc    r6,r6,r7
-        stw     r6,CPU_SPEC_FEATURES(r5)
+        stw     r6,CPU_SPEC_FEATURES(r4)
 1:
        mfspr   r11,SPRN_HID0
diff --git a/arch/powerpc/kernel/cpu_setup_a2.S b/arch/powerpc/kernel/cpu_setup_a2.S
new file mode 100644
index 000000000000..7f818feaa7a5
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_a2.S
@@ -0,0 +1,114 @@
+/*
+ *  A2 specific assembly support code
+ *
+ *  Copyright 2009 Ben Herrenschmidt, IBM Corp.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <asm/asm-offsets.h>
+#include <asm/ppc_asm.h>
+#include <asm/ppc-opcode.h>
+#include <asm/processor.h>
+#include <asm/reg_a2.h>
+#include <asm/reg.h>
+#include <asm/thread_info.h>
+/*
+ * Disable thdid and class fields in ERATs to bump PID to full 14 bits capacity.
+ * This also prevents external LPID accesses but that isn't a problem when not a
+ * guest. Under PV, this setting will be ignored and MMUCR will return the right
+ * number of PID bits we can use.
+ */
+#define MMUCR1_EXTEND_PID \
+        (MMUCR1_ICTID | MMUCR1_ITTID | MMUCR1_DCTID | \
+         MMUCR1_DTTID | MMUCR1_DCCD)
+/*
+ * Use extended PIDs if enabled.
+ * Don't clear the ERATs on context sync events and enable I & D LRU.
+ * Enable ERAT back invalidate when tlbwe overwrites an entry.
+ */
+#define INITIAL_MMUCR1 \
+        (MMUCR1_EXTEND_PID | MMUCR1_CSINV_NEVER | MMUCR1_IRRE | \
+         MMUCR1_DRRE | MMUCR1_TLBWE_BINV)
+_GLOBAL(__setup_cpu_a2)
+        /* Some of these are actually thread local and some are
+         * core local but doing it always won't hurt
+         */
+#ifdef CONFIG_PPC_WSP_COPRO
+        /* Make sure ACOP starts out as zero */
+        li      r3,0
+        mtspr   SPRN_ACOP,r3
+        /* Enable icswx instruction */
+        mfspr   r3,SPRN_A2_CCR2
+        ori     r3,r3,A2_CCR2_ENABLE_ICSWX
+        mtspr   SPRN_A2_CCR2,r3
+        /* Unmask all CTs in HACOP */
+        li      r3,-1
+        mtspr   SPRN_HACOP,r3
+#endif /* CONFIG_PPC_WSP_COPRO */
+        /* Enable doorbell */
+        mfspr   r3,SPRN_A2_CCR2
+        oris     r3,r3,A2_CCR2_ENABLE_PC@h
+        mtspr   SPRN_A2_CCR2,r3
+        isync
+        /* Setup CCR0 to disable power saving for now as it's busted
+         * in the current implementations. Setup CCR1 to wake on
+         * interrupts normally (we write the default value but who
+         * knows what FW may have clobbered...)
+         */
+        li      r3,0
+        mtspr   SPRN_A2_CCR0, r3
+        LOAD_REG_IMMEDIATE(r3,0x0f0f0f0f)
+        mtspr   SPRN_A2_CCR1, r3
+        /* Initialise MMUCR1 */
+        lis     r3,INITIAL_MMUCR1@h
+        ori     r3,r3,INITIAL_MMUCR1@l
+        mtspr   SPRN_MMUCR1,r3
+        /* Set MMUCR2 to enable 4K, 64K, 1M, 16M and 1G pages */
+        LOAD_REG_IMMEDIATE(r3, 0x000a7531)
+        mtspr   SPRN_MMUCR2,r3
+        /* Set MMUCR3 to write all thids bit to the TLB */
+        LOAD_REG_IMMEDIATE(r3, 0x0000000f)
+        mtspr   SPRN_MMUCR3,r3
+        /* Don't do ERAT stuff if running guest mode */
+        mfmsr   r3
+        andis.  r0,r3,MSR_GS@h
+        bne     1f
+        /* Now set the I-ERAT watermark to 15 */
+        lis     r4,(MMUCR0_TLBSEL_I|MMUCR0_ECL)@h
+        mtspr   SPRN_MMUCR0, r4
+        li      r4,A2_IERAT_SIZE-1
+        PPC_ERATWE(r4,r4,3)
+        /* Now set the D-ERAT watermark to 31 */
+        lis     r4,(MMUCR0_TLBSEL_D|MMUCR0_ECL)@h
+        mtspr   SPRN_MMUCR0, r4
+        li      r4,A2_DERAT_SIZE-1
+        PPC_ERATWE(r4,r4,3)
+        /* And invalidate the beast just in case. That won't get rid of
+         * a bolted entry though it will be in LRU and so will go away eventually
+         * but let's not bother for now
+         */
+        PPC_ERATILX(0,0,0)
+1:
+        blr
+_GLOBAL(__restore_cpu_a2)
+        b       __setup_cpu_a2
diff --git a/arch/powerpc/kernel/cpu_setup_fsl_booke.S b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
index 0adb50ad8031..8053db02b85e 100644
--- a/arch/powerpc/kernel/cpu_setup_fsl_booke.S
+++ b/arch/powerpc/kernel/cpu_setup_fsl_booke.S
@@ -51,6 +51,7 @@ _GLOBAL(__e500_dcache_setup)
        isync
        blr
+#ifdef CONFIG_PPC32
 _GLOBAL(__setup_cpu_e200)
        /* enable dedicated debug exception handling resources (Debug APU) */
        mfspr   r3,SPRN_HID0
@@ -63,6 +64,12 @@ _GLOBAL(__setup_cpu_e500v2)
        bl      __e500_icache_setup
        bl      __e500_dcache_setup
        bl      __setup_e500_ivors
+#ifdef CONFIG_FSL_RIO
+        /* Ensure that RFXE is set */
+        mfspr   r3,SPRN_HID1
+        oris    r3,r3,HID1_RFXE@h
+        mtspr   SPRN_HID1,r3
+#endif
        mtlr    r4
        blr
 _GLOBAL(__setup_cpu_e500mc)
@@ -72,3 +79,20 @@ _GLOBAL(__setup_cpu_e500mc)
        bl      __setup_e500mc_ivors
        mtlr    r4
        blr
+#endif
+/* Right now, restore and setup are the same thing */
+_GLOBAL(__restore_cpu_e5500)
+_GLOBAL(__setup_cpu_e5500)
+        mflr    r4
+        bl      __e500_icache_setup
+        bl      __e500_dcache_setup
+#ifdef CONFIG_PPC_BOOK3E_64
+        bl      .__setup_base_ivors
+        bl      .setup_perfmon_ivor
+        bl      .setup_doorbell_ivors
+        bl      .setup_ehv_ivors
+#else
+        bl      __setup_e500mc_ivors
+#endif
+        mtlr    r4
+        blr
diff --git a/arch/powerpc/kernel/cpu_setup_power7.S b/arch/powerpc/kernel/cpu_setup_power7.S
new file mode 100644
index 000000000000..4f9a93fcfe07
--- /dev/null
+++ b/arch/powerpc/kernel/cpu_setup_power7.S
@@ -0,0 +1,91 @@
+/*
+ * This file contains low level CPU setup functions.
+ *    Copyright (C) 2003 Benjamin Herrenschmidt (benh@kernel.crashing.org)
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ *
+ */
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/cache.h>
+/* Entry: r3 = crap, r4 = ptr to cputable entry
+ *
+ * Note that we can be called twice for pseudo-PVRs
+ */
+_GLOBAL(__setup_cpu_power7)
+        mflr    r11
+        bl      __init_hvmode_206
+        mtlr    r11
+        beqlr
+        li      r0,0
+        mtspr   SPRN_LPID,r0
+        bl      __init_LPCR
+        bl      __init_TLB
+        mtlr    r11
+        blr
+_GLOBAL(__restore_cpu_power7)
+        mflr    r11
+        mfmsr   r3
+        rldicl. r0,r3,4,63
+        beqlr
+        li      r0,0
+        mtspr   SPRN_LPID,r0
+        bl      __init_LPCR
+        bl      __init_TLB
+        mtlr    r11
+        blr
+__init_hvmode_206:
+        /* Disable CPU_FTR_HVMODE_206 and exit if MSR:HV is not set */
+        mfmsr   r3
+        rldicl. r0,r3,4,63
+        bnelr
+        ld      r5,CPU_SPEC_FEATURES(r4)
+        LOAD_REG_IMMEDIATE(r6,CPU_FTR_HVMODE_206)
+        xor     r5,r5,r6
+        std     r5,CPU_SPEC_FEATURES(r4)
+        blr
+__init_LPCR:
+        /* Setup a sane LPCR:
+         *
+         *   LPES = 0b01 (HSRR0/1 used for 0x500)
+         *   PECE = 0b111
+         *   DPFD = 4
+         *
+         * Other bits untouched for now
+         */
+        mfspr   r3,SPRN_LPCR
+        ori     r3,r3,(LPCR_LPES0|LPCR_LPES1)
+        xori    r3,r3, LPCR_LPES0
+        ori     r3,r3,(LPCR_PECE0|LPCR_PECE1|LPCR_PECE2)
+        li      r5,7
+        sldi    r5,r5,LPCR_DPFD_SH
+        andc    r3,r3,r5
+        li      r5,4
+        sldi    r5,r5,LPCR_DPFD_SH
+        or      r3,r3,r5
+        mtspr   SPRN_LPCR,r3
+        isync
+        blr
+__init_TLB:
+        /* Clear the TLB */
+        li      r6,128
+        mtctr   r6
+        li      r7,0xc00        /* IS field = 0b11 */
+        ptesync
+2:      tlbiel  r7
+        addi    r7,r7,0x1000
+        bdnz    2b
+        ptesync
+1:      blr
diff --git a/arch/powerpc/kernel/cputable.c b/arch/powerpc/kernel/cputable.c
index 1f9123f412ec..9fb933248ab6 100644
--- a/arch/powerpc/kernel/cputable.c
+++ b/arch/powerpc/kernel/cputable.c
@@ -48,6 +48,7 @@ extern void __setup_cpu_440x5(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_460ex(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_460gt(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_460sx(unsigned long offset, struct cpu_spec *spec);
+extern void __setup_cpu_apm821xx(unsigned long offset, struct cpu_spec *spec);
 extern void __setup_cpu_603(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_604(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_750(unsigned long offset, struct cpu_spec* spec);
@@ -61,11 +62,17 @@ extern void __setup_cpu_745x(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_ppc970MP(unsigned long offset, struct cpu_spec* spec);
 extern void __setup_cpu_pa6t(unsigned long offset, struct cpu_spec* spec);
+extern void __setup_cpu_a2(unsigned long offset, struct cpu_spec* spec);
 extern void __restore_cpu_pa6t(void);
 extern void __restore_cpu_ppc970(void);
 extern void __setup_cpu_power7(unsigned long offset, struct cpu_spec* spec);
 extern void __restore_cpu_power7(void);
+extern void __restore_cpu_a2(void);
 #endif /* CONFIG_PPC64 */
+#if defined(CONFIG_E500)
+extern void __setup_cpu_e5500(unsigned long offset, struct cpu_spec* spec);
+extern void __restore_cpu_e5500(void);
+#endif /* CONFIG_E500 */
 /* This table only contains "desktop" CPUs, it need to be filled with embedded
 * ones as well...
@@ -111,7 +118,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/power3",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "power3",
        },
        {       /* Power3+ */
@@ -127,7 +133,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/power3",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "power3",
        },
        {       /* Northstar */
@@ -143,7 +148,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/rs64",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "rs64",
        },
        {       /* Pulsar */
@@ -159,7 +163,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/rs64",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "rs64",
        },
        {       /* I-star */
@@ -175,7 +178,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/rs64",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "rs64",
        },
        {       /* S-star */
@@ -191,7 +193,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/rs64",
                .oprofile_type          = PPC_OPROFILE_RS64,
-                .machine_check          = machine_check_generic,
                .platform               = "rs64",
        },
        {       /* Power4 */
@@ -200,14 +201,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER4 (gp)",
                .cpu_features           = CPU_FTRS_POWER4,
                .cpu_user_features      = COMMON_USER_POWER4,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER4,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/power4",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "power4",
        },
        {       /* Power4+ */
@@ -216,14 +216,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER4+ (gq)",
                .cpu_features           = CPU_FTRS_POWER4,
                .cpu_user_features      = COMMON_USER_POWER4,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER4,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/power4",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "power4",
        },
        {       /* PPC970 */
@@ -233,7 +232,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_PPC970,
                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -242,7 +241,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_restore            = __restore_cpu_ppc970,
                .oprofile_cpu_type      = "ppc64/970",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc970",
        },
        {       /* PPC970FX */
@@ -252,7 +250,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_PPC970,
                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -261,7 +259,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_restore            = __restore_cpu_ppc970,
                .oprofile_cpu_type      = "ppc64/970",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc970",
        },
        {       /* PPC970MP DD1.0 - no DEEPNAP, use regular 970 init */
@@ -280,7 +277,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_restore            = __restore_cpu_ppc970,
                .oprofile_cpu_type      = "ppc64/970MP",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc970",
        },
        {       /* PPC970MP */
@@ -290,7 +286,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_PPC970,
                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -299,7 +295,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_restore            = __restore_cpu_ppc970,
                .oprofile_cpu_type      = "ppc64/970MP",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc970",
        },
        {       /* PPC970GX */
@@ -309,7 +304,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_PPC970,
                .cpu_user_features      = COMMON_USER_POWER4 |
                        PPC_FEATURE_HAS_ALTIVEC_COMP,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PPC970,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 8,
@@ -317,7 +312,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_setup              = __setup_cpu_ppc970,
                .oprofile_cpu_type      = "ppc64/970",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc970",
        },
        {       /* Power5 GR */
@@ -326,7 +320,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER5 (gr)",
                .cpu_features           = CPU_FTRS_POWER5,
                .cpu_user_features      = COMMON_USER_POWER5,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -338,7 +332,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                 */
                .oprofile_mmcra_sihv    = MMCRA_SIHV,
                .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                .platform               = "power5",
        },
        {       /* Power5++ */
@@ -347,7 +340,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER5+ (gs)",
                .cpu_features           = CPU_FTRS_POWER5,
                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -355,7 +348,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .oprofile_mmcra_sihv    = MMCRA_SIHV,
                .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                .platform               = "power5+",
        },
        {       /* Power5 GS */
@@ -364,7 +356,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER5+ (gs)",
                .cpu_features           = CPU_FTRS_POWER5,
                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -373,7 +365,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .oprofile_mmcra_sihv    = MMCRA_SIHV,
                .oprofile_mmcra_sipr    = MMCRA_SIPR,
-                .machine_check          = machine_check_generic,
                .platform               = "power5+",
        },
        {       /* POWER6 in P5+ mode; 2.04-compliant processor */
@@ -382,10 +373,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER5+",
                .cpu_features           = CPU_FTRS_POWER5,
                .cpu_user_features      = COMMON_USER_POWER5_PLUS,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER5,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .platform               = "power5+",
@@ -397,7 +387,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_features           = CPU_FTRS_POWER6,
                .cpu_user_features      = COMMON_USER_POWER6 |
                        PPC_FEATURE_POWER6_EXT,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER6,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
@@ -408,7 +398,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
                .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
                        POWER6_MMCRA_OTHER,
-                .machine_check          = machine_check_generic,
                .platform               = "power6x",
        },
        {       /* 2.05-compliant processor, i.e. Power6 "architected" mode */
@@ -417,10 +406,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER6 (architected)",
                .cpu_features           = CPU_FTRS_POWER6,
                .cpu_user_features      = COMMON_USER_POWER6,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_POWER6,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .platform               = "power6",
@@ -431,13 +419,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER7 (architected)",
                .cpu_features           = CPU_FTRS_POWER7,
                .cpu_user_features      = COMMON_USER_POWER7,
-                .mmu_features           = MMU_FTR_HPTE_TABLE |
+                .mmu_features           = MMU_FTRS_POWER7,
-                        MMU_FTR_TLBIE_206,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
-                .machine_check          = machine_check_generic,
                .oprofile_type          = PPC_OPROFILE_POWER4,
                .oprofile_cpu_type      = "ppc64/ibm-compat-v1",
+                .cpu_setup              = __setup_cpu_power7,
+                .cpu_restore            = __restore_cpu_power7,
                .platform               = "power7",
        },
        {       /* Power7 */
@@ -446,21 +434,33 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER7 (raw)",
                .cpu_features           = CPU_FTRS_POWER7,
                .cpu_user_features      = COMMON_USER_POWER7,
-                .mmu_features           = MMU_FTR_HPTE_TABLE |
+                .mmu_features           = MMU_FTRS_POWER7,
-                        MMU_FTR_TLBIE_206,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
                .pmc_type               = PPC_PMC_IBM,
+                .oprofile_cpu_type      = "ppc64/power7",
+                .oprofile_type          = PPC_OPROFILE_POWER4,
                .cpu_setup              = __setup_cpu_power7,
                .cpu_restore            = __restore_cpu_power7,
+                .platform               = "power7",
+        },
+        {       /* Power7+ */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x004A0000,
+                .cpu_name               = "POWER7+ (raw)",
+                .cpu_features           = CPU_FTRS_POWER7,
+                .cpu_user_features      = COMMON_USER_POWER7,
+                .mmu_features           = MMU_FTRS_POWER7,
+                .icache_bsize           = 128,
+                .dcache_bsize           = 128,
+                .num_pmcs               = 6,
+                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/power7",
                .oprofile_type          = PPC_OPROFILE_POWER4,
-                .oprofile_mmcra_sihv    = POWER6_MMCRA_SIHV,
+                .cpu_setup              = __setup_cpu_power7,
-                .oprofile_mmcra_sipr    = POWER6_MMCRA_SIPR,
+                .cpu_restore            = __restore_cpu_power7,
-                .oprofile_mmcra_clear   = POWER6_MMCRA_THRM |
+                .platform               = "power7+",
-                        POWER6_MMCRA_OTHER,
-                .platform               = "power7",
        },
        {       /* Cell Broadband Engine */
                .pvr_mask               = 0xffff0000,
@@ -470,14 +470,13 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_user_features      = COMMON_USER_PPC64 |
                        PPC_FEATURE_CELL | PPC_FEATURE_HAS_ALTIVEC_COMP |
                        PPC_FEATURE_SMT,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_CELL,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 4,
                .pmc_type               = PPC_PMC_IBM,
                .oprofile_cpu_type      = "ppc64/cell-be",
                .oprofile_type          = PPC_OPROFILE_CELL,
-                .machine_check          = machine_check_generic,
                .platform               = "ppc-cell-be",
        },
        {       /* PA Semi PA6T */
@@ -486,7 +485,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "PA6T",
                .cpu_features           = CPU_FTRS_PA6T,
                .cpu_user_features      = COMMON_USER_PA6T,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_PA6T,
                .icache_bsize           = 64,
                .dcache_bsize           = 64,
                .num_pmcs               = 6,
@@ -495,7 +494,6 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_restore            = __restore_cpu_pa6t,
                .oprofile_cpu_type      = "ppc64/pa6t",
                .oprofile_type          = PPC_OPROFILE_PA6T,
-                .machine_check          = machine_check_generic,
                .platform               = "pa6t",
        },
        {       /* default match */
@@ -504,12 +502,11 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .cpu_name               = "POWER4 (compatible)",
                .cpu_features           = CPU_FTRS_COMPATIBLE,
                .cpu_user_features      = COMMON_USER_PPC64,
-                .mmu_features           = MMU_FTR_HPTE_TABLE,
+                .mmu_features           = MMU_FTRS_DEFAULT_HPTE_ARCH_V2,
                .icache_bsize           = 128,
                .dcache_bsize           = 128,
                .num_pmcs               = 6,
                .pmc_type               = PPC_PMC_IBM,
-                .machine_check          = machine_check_generic,
                .platform               = "power4",
        }
 #endif  /* CONFIG_PPC_BOOK3S_64 */
@@ -1805,11 +1802,25 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_440A,
                .platform               = "ppc440",
        },
-        { /* 476 core */
+        { /* 464 in APM821xx */
-                .pvr_mask               = 0xffff0000,
+                .pvr_mask               = 0xffffff00,
-                .pvr_value              = 0x11a50000,
+                .pvr_value              = 0x12C41C80,
+                .cpu_name               = "APM821XX",
+                .cpu_features           = CPU_FTRS_44X,
+                .cpu_user_features      = COMMON_USER_BOOKE |
+                        PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_44x,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 32,
+                .cpu_setup              = __setup_cpu_apm821xx,
+                .machine_check          = machine_check_440A,
+                .platform               = "ppc440",
+        },
+        { /* 476 DD2 core */
+                .pvr_mask               = 0xffffffff,
+                .pvr_value              = 0x11a52080,
                .cpu_name               = "476",
-                .cpu_features           = CPU_FTRS_47X,
+                .cpu_features           = CPU_FTRS_47X | CPU_FTR_476_DD2,
                .cpu_user_features      = COMMON_USER_BOOKE |
                        PPC_FEATURE_HAS_FPU,
                .mmu_features           = MMU_FTR_TYPE_47x |
@@ -1833,6 +1844,20 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_47x,
                .platform               = "ppc470",
        },
+        { /* 476 others */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x11a50000,
+                .cpu_name               = "476",
+                .cpu_features           = CPU_FTRS_47X,
+                .cpu_user_features      = COMMON_USER_BOOKE |
+                        PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_47x |
+                        MMU_FTR_USE_TLBIVAX_BCAST | MMU_FTR_LOCK_BCAST_INVAL,
+                .icache_bsize           = 32,
+                .dcache_bsize           = 128,
+                .machine_check          = machine_check_47x,
+                .platform               = "ppc470",
+        },
        {       /* default match */
                .pvr_mask               = 0x00000000,
                .pvr_value              = 0x00000000,
@@ -1891,7 +1916,9 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .platform               = "ppc5554",
        }
 #endif /* CONFIG_E200 */
+#endif /* CONFIG_PPC32 */
 #ifdef CONFIG_E500
+#ifdef CONFIG_PPC32
        {       /* e500 */
                .pvr_mask               = 0xffff0000,
                .pvr_value              = 0x80200000,
@@ -1946,6 +1973,26 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_e500mc,
                .platform               = "ppce500mc",
        },
+#endif /* CONFIG_PPC32 */
+        {       /* e5500 */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x80240000,
+                .cpu_name               = "e5500",
+                .cpu_features           = CPU_FTRS_E5500,
+                .cpu_user_features      = COMMON_USER_BOOKE | PPC_FEATURE_HAS_FPU,
+                .mmu_features           = MMU_FTR_TYPE_FSL_E | MMU_FTR_BIG_PHYS |
+                        MMU_FTR_USE_TLBILX,
+                .icache_bsize           = 64,
+                .dcache_bsize           = 64,
+                .num_pmcs               = 4,
+                .oprofile_cpu_type      = "ppc/e500mc",
+                .oprofile_type          = PPC_OPROFILE_FSL_EMB,
+                .cpu_setup              = __setup_cpu_e5500,
+                .cpu_restore            = __restore_cpu_e5500,
+                .machine_check          = machine_check_e500mc,
+                .platform               = "ppce5500",
+        },
+#ifdef CONFIG_PPC32
        {       /* default match */
                .pvr_mask               = 0x00000000,
                .pvr_value              = 0x00000000,
@@ -1960,10 +2007,25 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_e500,
                .platform               = "powerpc",
        }
-#endif /* CONFIG_E500 */
 #endif /* CONFIG_PPC32 */
+#endif /* CONFIG_E500 */
-#ifdef CONFIG_PPC_BOOK3E_64
+#ifdef CONFIG_PPC_A2
+        {       /* Standard A2 (>= DD2) + FPU core */
+                .pvr_mask               = 0xffff0000,
+                .pvr_value              = 0x00480000,
+                .cpu_name               = "A2 (>= DD2)",
+                .cpu_features           = CPU_FTRS_A2,
+                .cpu_user_features      = COMMON_USER_PPC64,
+                .mmu_features           = MMU_FTRS_A2,
+                .icache_bsize           = 64,
+                .dcache_bsize           = 64,
+                .num_pmcs               = 0,
+                .cpu_setup              = __setup_cpu_a2,
+                .cpu_restore            = __restore_cpu_a2,
+                .machine_check          = machine_check_generic,
+                .platform               = "ppca2",
+        },
        {       /* This is a default entry to get going, to be replaced by
                 * a real one at some stage
                 */
@@ -1984,7 +2046,7 @@ static struct cpu_spec __initdata cpu_specs[] = {
                .machine_check          = machine_check_generic,
                .platform               = "power6",
        },
-#endif
+#endif /* CONFIG_PPC_A2 */
 };
 static struct cpu_spec the_cpu_spec;
@@ -2048,8 +2110,8 @@ static void __init setup_cpu_spec(unsigned long offset, struct cpu_spec *s)
         * pointer on ppc64 and booke as we are running at 0 in real mode
         * on ppc64 and reloc_offset is always 0 on booke.
         */
-        if (s->cpu_setup) {
+        if (t->cpu_setup) {
-                s->cpu_setup(offset, s);
+                t->cpu_setup(offset, t);
        }
 #endif /* CONFIG_PPC64 || CONFIG_BOOKE */
 }
diff --git a/arch/powerpc/kernel/crash.c b/arch/powerpc/kernel/crash.c
index 4457382f8667..4e6ee944495a 100644
--- a/arch/powerpc/kernel/crash.c
+++ b/arch/powerpc/kernel/crash.c
@@ -48,7 +48,7 @@ int crashing_cpu = -1;
 static cpumask_t cpus_in_crash = CPU_MASK_NONE;
 cpumask_t cpus_in_sr = CPU_MASK_NONE;
-#define CRASH_HANDLER_MAX 2
+#define CRASH_HANDLER_MAX 3
 /* NULL terminated list of shutdown handles */
 static crash_shutdown_t crash_shutdown_handles[CRASH_HANDLER_MAX+1];
 static DEFINE_SPINLOCK(crash_handlers_lock);
@@ -64,9 +64,9 @@ void crash_ipi_callback(struct pt_regs *regs)
                return;
        hard_irq_disable();
-        if (!cpu_isset(cpu, cpus_in_crash))
+        if (!cpumask_test_cpu(cpu, &cpus_in_crash))
                crash_save_cpu(regs, cpu);
-        cpu_set(cpu, cpus_in_crash);
+        cpumask_set_cpu(cpu, &cpus_in_crash);
        /*
         * Entered via soft-reset - could be the kdump
@@ -77,8 +77,8 @@ void crash_ipi_callback(struct pt_regs *regs)
         * Tell the kexec CPU that entered via soft-reset and ready
         * to go down.
         */
-        if (cpu_isset(cpu, cpus_in_sr)) {
+        if (cpumask_test_cpu(cpu, &cpus_in_sr)) {
-                cpu_clear(cpu, cpus_in_sr);
+                cpumask_clear_cpu(cpu, &cpus_in_sr);
                atomic_inc(&enter_on_soft_reset);
        }
@@ -87,7 +87,7 @@ void crash_ipi_callback(struct pt_regs *regs)
         * This barrier is needed to make sure that all CPUs are stopped.
         * If not, soft-reset will be invoked to bring other CPUs.
         */
-        while (!cpu_isset(crashing_cpu, cpus_in_crash))
+        while (!cpumask_test_cpu(crashing_cpu, &cpus_in_crash))
                cpu_relax();
        if (ppc_md.kexec_cpu_down)
@@ -109,7 +109,7 @@ static void crash_soft_reset_check(int cpu)
 {
        unsigned int ncpus = num_online_cpus() - 1;/* Excluding the panic cpu */
-        cpu_clear(cpu, cpus_in_sr);
+        cpumask_clear_cpu(cpu, &cpus_in_sr);
        while (atomic_read(&enter_on_soft_reset) != ncpus)
                cpu_relax();
 }
@@ -125,14 +125,14 @@ static void crash_kexec_prepare_cpus(int cpu)
        smp_wmb();
        /*
-         * FIXME: Until we will have the way to stop other CPUSs reliabally,
+         * FIXME: Until we will have the way to stop other CPUs reliably,
         * the crash CPU will send an IPI and wait for other CPUs to
         * respond.
         * Delay of at least 10 seconds.
         */
        printk(KERN_EMERG "Sending IPI to other cpus...\n");
        msecs = 10000;
-        while ((cpus_weight(cpus_in_crash) < ncpus) && (--msecs > 0)) {
+        while ((cpumask_weight(&cpus_in_crash) < ncpus) && (--msecs > 0)) {
                cpu_relax();
                mdelay(1);
        }
@@ -144,52 +144,24 @@ static void crash_kexec_prepare_cpus(int cpu)
         * user to do soft reset such that we get all.
         * Soft-reset will be used until better mechanism is implemented.
         */
-        if (cpus_weight(cpus_in_crash) < ncpus) {
+        if (cpumask_weight(&cpus_in_crash) < ncpus) {
                printk(KERN_EMERG "done waiting: %d cpu(s) not responding\n",
-                        ncpus - cpus_weight(cpus_in_crash));
+                        ncpus - cpumask_weight(&cpus_in_crash));
                printk(KERN_EMERG "Activate soft-reset to stop other cpu(s)\n");
-                cpus_in_sr = CPU_MASK_NONE;
+                cpumask_clear(&cpus_in_sr);
                atomic_set(&enter_on_soft_reset, 0);
-                while (cpus_weight(cpus_in_crash) < ncpus)
+                while (cpumask_weight(&cpus_in_crash) < ncpus)
                        cpu_relax();
        }
        /*
         * Make sure all CPUs are entered via soft-reset if the kdump is
         * invoked using soft-reset.
         */
-        if (cpu_isset(cpu, cpus_in_sr))
+        if (cpumask_test_cpu(cpu, &cpus_in_sr))
                crash_soft_reset_check(cpu);
        /* Leave the IPI callback set */
 }
-/* wait for all the CPUs to hit real mode but timeout if they don't come in */
-#ifdef CONFIG_PPC_STD_MMU_64
-static void crash_kexec_wait_realmode(int cpu)
-{
-        unsigned int msecs;
-        int i;
-        msecs = 10000;
-        for (i=0; i < NR_CPUS && msecs > 0; i++) {
-                if (i == cpu)
-                        continue;
-                while (paca[i].kexec_state < KEXEC_STATE_REAL_MODE) {
-                        barrier();
-                        if (!cpu_possible(i)) {
-                                break;
-                        }
-                        if (!cpu_online(i)) {
-                                break;
-                        }
-                        msecs--;
-                        mdelay(1);
-                }
-        }
-        mb();
-}
-#endif
 /*
 * This function will be called by secondary cpus or by kexec cpu
 * if soft-reset is activated to stop some CPUs.
@@ -210,7 +182,7 @@ void crash_kexec_secondary(struct pt_regs *regs)
                         * exited using 'x'(exit and recover) or
                         * kexec_should_crash() failed for all running tasks.
                         */
-                        cpu_clear(cpu, cpus_in_sr);
+                        cpumask_clear_cpu(cpu, &cpus_in_sr);
                        local_irq_restore(flags);
                        return;
                }
@@ -224,7 +196,7 @@ void crash_kexec_secondary(struct pt_regs *regs)
                 * then start kexec boot.
                 */
                crash_soft_reset_check(cpu);
-                cpu_set(crashing_cpu, cpus_in_crash);
+                cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
                if (ppc_md.kexec_cpu_down)
                        ppc_md.kexec_cpu_down(1, 0);
                machine_kexec(kexec_crash_image);
@@ -233,7 +205,8 @@ void crash_kexec_secondary(struct pt_regs *regs)
        crash_ipi_callback(regs);
 }
-#else
+#else   /* ! CONFIG_SMP */
 static void crash_kexec_prepare_cpus(int cpu)
 {
        /*
@@ -251,75 +224,39 @@ static void crash_kexec_prepare_cpus(int cpu)
 void crash_kexec_secondary(struct pt_regs *regs)
 {
-        cpus_in_sr = CPU_MASK_NONE;
+        cpumask_clear(&cpus_in_sr);
 }
-#endif
+#endif  /* CONFIG_SMP */
-#ifdef CONFIG_SPU_BASE
-#include <asm/spu.h>
-#include <asm/spu_priv1.h>
-struct crash_spu_info {
-        struct spu *spu;
-        u32 saved_spu_runcntl_RW;
-        u32 saved_spu_status_R;
-        u32 saved_spu_npc_RW;
-        u64 saved_mfc_sr1_RW;
-        u64 saved_mfc_dar;
-        u64 saved_mfc_dsisr;
-};
-#define CRASH_NUM_SPUS  16      /* Enough for current hardware */
+/* wait for all the CPUs to hit real mode but timeout if they don't come in */
-static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
+#if defined(CONFIG_SMP) && defined(CONFIG_PPC_STD_MMU_64)
+static void crash_kexec_wait_realmode(int cpu)
-static void crash_kexec_stop_spus(void)
 {
-        struct spu *spu;
+        unsigned int msecs;
        int i;
-        u64 tmp;
-        for (i = 0; i < CRASH_NUM_SPUS; i++) {
+        msecs = 10000;
-                if (!crash_spu_info[i].spu)
+        for (i=0; i < nr_cpu_ids && msecs > 0; i++) {
-                        continue;
+                if (i == cpu)
-                spu = crash_spu_info[i].spu;
-                crash_spu_info[i].saved_spu_runcntl_RW =
-                        in_be32(&spu->problem->spu_runcntl_RW);
-                crash_spu_info[i].saved_spu_status_R =
-                        in_be32(&spu->problem->spu_status_R);
-                crash_spu_info[i].saved_spu_npc_RW =
-                        in_be32(&spu->problem->spu_npc_RW);
-                crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
-                crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
-                tmp = spu_mfc_sr1_get(spu);
-                crash_spu_info[i].saved_mfc_sr1_RW = tmp;
-                tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
-                spu_mfc_sr1_set(spu, tmp);
-                __delay(200);
-        }
-}
-void crash_register_spus(struct list_head *list)
-{
-        struct spu *spu;
-        list_for_each_entry(spu, list, full_list) {
-                if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
                        continue;
-                crash_spu_info[spu->number].spu = spu;
+                while (paca[i].kexec_state < KEXEC_STATE_REAL_MODE) {
+                        barrier();
+                        if (!cpu_possible(i)) {
+                                break;
+                        }
+                        if (!cpu_online(i)) {
+                                break;
+                        }
+                        msecs--;
+                        mdelay(1);
+                }
        }
+        mb();
 }
 #else
-static inline void crash_kexec_stop_spus(void)
+static inline void crash_kexec_wait_realmode(int cpu) {}
-{
+#endif  /* CONFIG_SMP && CONFIG_PPC_STD_MMU_64 */
-}
-#endif /* CONFIG_SPU_BASE */
 /*
 * Register a function to be called on shutdown.  Only use this if you
@@ -409,23 +346,10 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
        crashing_cpu = smp_processor_id();
        crash_save_cpu(regs, crashing_cpu);
        crash_kexec_prepare_cpus(crashing_cpu);
-        cpu_set(crashing_cpu, cpus_in_crash);
+        cpumask_set_cpu(crashing_cpu, &cpus_in_crash);
-#if defined(CONFIG_PPC_STD_MMU_64) && defined(CONFIG_SMP)
        crash_kexec_wait_realmode(crashing_cpu);
-#endif
-        for_each_irq(i) {
-                struct irq_desc *desc = irq_to_desc(i);
-                if (!desc || !desc->chip || !desc->chip->eoi)
-                        continue;
-                if (desc->status & IRQ_INPROGRESS)
-                        desc->chip->eoi(i);
-                if (!(desc->status & IRQ_DISABLED))
+        machine_kexec_mask_interrupts();
-                        desc->chip->shutdown(i);
-        }
        /*
         * Call registered shutdown routines savely.  Swap out
@@ -450,8 +374,6 @@ void default_machine_crash_shutdown(struct pt_regs *regs)
        crash_shutdown_cpu = -1;
        __debugger_fault_handler = old_handler;
-        crash_kexec_stop_spus();
        if (ppc_md.kexec_cpu_down)
                ppc_md.kexec_cpu_down(1, 0);
 }
diff --git a/arch/powerpc/kernel/crash_dump.c b/arch/powerpc/kernel/crash_dump.c
index 8e05c16344e4..424afb6b8fba 100644
--- a/arch/powerpc/kernel/crash_dump.c
+++ b/arch/powerpc/kernel/crash_dump.c
@@ -19,6 +19,7 @@
 #include <asm/prom.h>
 #include <asm/firmware.h>
 #include <asm/uaccess.h>
+#include <asm/rtas.h>
 #ifdef DEBUG
 #include <asm/udbg.h>
@@ -27,9 +28,6 @@
 #define DBG(fmt...)
 #endif
-/* Stores the physical address of elf header of crash image. */
-unsigned long long elfcorehdr_addr = ELFCORE_ADDR_MAX;
 #ifndef CONFIG_RELOCATABLE
 void __init reserve_kdump_trampoline(void)
 {
@@ -71,20 +69,6 @@ void __init setup_kdump_trampoline(void)
 }
 #endif /* CONFIG_RELOCATABLE */
-/*
- * Note: elfcorehdr_addr is not just limited to vmcore. It is also used by
- * is_kdump_kernel() to determine if we are booting after a panic. Hence
- * ifdef it under CONFIG_CRASH_DUMP and not CONFIG_PROC_VMCORE.
- */
-static int __init parse_elfcorehdr(char *p)
-{
-        if (p)
-                elfcorehdr_addr = memparse(p, &p);
-        return 1;
-}
-__setup("elfcorehdr=", parse_elfcorehdr);
 static int __init parse_savemaxmem(char *p)
 {
        if (p)
@@ -141,3 +125,35 @@ ssize_t copy_oldmem_page(unsigned long pfn, char *buf,
        return csize;
 }
+#ifdef CONFIG_PPC_RTAS
+/*
+ * The crashkernel region will almost always overlap the RTAS region, so
+ * we have to be careful when shrinking the crashkernel region.
+ */
+void crash_free_reserved_phys_range(unsigned long begin, unsigned long end)
+{
+        unsigned long addr;
+        const u32 *basep, *sizep;
+        unsigned int rtas_start = 0, rtas_end = 0;
+        basep = of_get_property(rtas.dev, "linux,rtas-base", NULL);
+        sizep = of_get_property(rtas.dev, "rtas-size", NULL);
+        if (basep && sizep) {
+                rtas_start = *basep;
+                rtas_end = *basep + *sizep;
+        }
+        for (addr = begin; addr < end; addr += PAGE_SIZE) {
+                /* Does this page overlap with the RTAS region? */
+                if (addr <= rtas_end && ((addr + PAGE_SIZE) > rtas_start))
+                        continue;
+                ClearPageReserved(pfn_to_page(addr >> PAGE_SHIFT));
+                init_page_count(pfn_to_page(addr >> PAGE_SHIFT));
+                free_page((unsigned long)__va(addr));
+                totalram_pages++;
+        }
+}
+#endif
diff --git a/arch/powerpc/kernel/dbell.c b/arch/powerpc/kernel/dbell.c
index 3307a52d797f..2cc451aaaca7 100644
--- a/arch/powerpc/kernel/dbell.c
+++ b/arch/powerpc/kernel/dbell.c
@@ -13,84 +13,35 @@
 #include <linux/kernel.h>
 #include <linux/smp.h>
 #include <linux/threads.h>
-#include <linux/percpu.h>
+#include <linux/hardirq.h>
 #include <asm/dbell.h>
 #include <asm/irq_regs.h>
 #ifdef CONFIG_SMP
-struct doorbell_cpu_info {
-        unsigned long   messages;       /* current messages bits */
-        unsigned int    tag;            /* tag value */
-};
-static DEFINE_PER_CPU(struct doorbell_cpu_info, doorbell_cpu_info);
 void doorbell_setup_this_cpu(void)
 {
-        struct doorbell_cpu_info *info = &__get_cpu_var(doorbell_cpu_info);
+        unsigned long tag = mfspr(SPRN_PIR) & 0x3fff;
-        info->messages = 0;
+        smp_muxed_ipi_set_data(smp_processor_id(), tag);
-        info->tag = mfspr(SPRN_PIR) & 0x3fff;
 }
-void doorbell_message_pass(int target, int msg)
+void doorbell_cause_ipi(int cpu, unsigned long data)
 {
-        struct doorbell_cpu_info *info;
+        ppc_msgsnd(PPC_DBELL, 0, data);
-        int i;
-        if (target < NR_CPUS) {
-                info = &per_cpu(doorbell_cpu_info, target);
-                set_bit(msg, &info->messages);
-                ppc_msgsnd(PPC_DBELL, 0, info->tag);
-        }
-        else if (target == MSG_ALL_BUT_SELF) {
-                for_each_online_cpu(i) {
-                        if (i == smp_processor_id())
-                                continue;
-                        info = &per_cpu(doorbell_cpu_info, i);
-                        set_bit(msg, &info->messages);
-                        ppc_msgsnd(PPC_DBELL, 0, info->tag);
-                }
-        }
-        else { /* target == MSG_ALL */
-                for_each_online_cpu(i) {
-                        info = &per_cpu(doorbell_cpu_info, i);
-                        set_bit(msg, &info->messages);
-                }
-                ppc_msgsnd(PPC_DBELL, PPC_DBELL_MSG_BRDCAST, 0);
-        }
 }
 void doorbell_exception(struct pt_regs *regs)
 {
        struct pt_regs *old_regs = set_irq_regs(regs);
-        struct doorbell_cpu_info *info = &__get_cpu_var(doorbell_cpu_info);
-        int msg;
-        /* Warning: regs can be NULL when called from irq enable */
+        irq_enter();
-        if (!info->messages || (num_online_cpus() < 2))
+        smp_ipi_demux();
-                goto out;
-        for (msg = 0; msg < 4; msg++)
+        irq_exit();
-                if (test_and_clear_bit(msg, &info->messages))
-                        smp_message_recv(msg);
-out:
        set_irq_regs(old_regs);
 }
-void doorbell_check_self(void)
-{
-        struct doorbell_cpu_info *info = &__get_cpu_var(doorbell_cpu_info);
-        if (!info->messages)
-                return;
-        ppc_msgsnd(PPC_DBELL, 0, info->tag);
-}
 #else /* CONFIG_SMP */
 void doorbell_exception(struct pt_regs *regs)
 {
diff --git a/arch/powerpc/kernel/dma-iommu.c b/arch/powerpc/kernel/dma-iommu.c
index 37771a518119..e7554154a6de 100644
--- a/arch/powerpc/kernel/dma-iommu.c
+++ b/arch/powerpc/kernel/dma-iommu.c
@@ -19,7 +19,7 @@ static void *dma_iommu_alloc_coherent(struct device *dev, size_t size,
                                      dma_addr_t *dma_handle, gfp_t flag)
 {
        return iommu_alloc_coherent(dev, get_iommu_table_base(dev), size,
-                                    dma_handle, device_to_mask(dev), flag,
+                                    dma_handle, dev->coherent_dma_mask, flag,
                                    dev_to_node(dev));
 }
@@ -74,16 +74,17 @@ static int dma_iommu_dma_supported(struct device *dev, u64 mask)
 {
        struct iommu_table *tbl = get_iommu_table_base(dev);
-        if (!tbl || tbl->it_offset > mask) {
+        if (!tbl) {
-                printk(KERN_INFO
+                dev_info(dev, "Warning: IOMMU dma not supported: mask 0x%08llx"
-                       "Warning: IOMMU offset too big for device mask\n");
+                        ", table unavailable\n", mask);
-                if (tbl)
+                return 0;
-                        printk(KERN_INFO
+        }
-                               "mask: 0x%08llx, table offset: 0x%08lx\n",
-                                mask, tbl->it_offset);
+        if ((tbl->it_offset + tbl->it_size) > (mask >> IOMMU_PAGE_SHIFT)) {
-                else
+                dev_info(dev, "Warning: IOMMU window too big for device mask\n");
-                        printk(KERN_INFO "mask: 0x%08llx, table unavailable\n",
+                dev_info(dev, "mask: 0x%08llx, table end: 0x%08lx\n",
-                                mask);
+                                mask, (tbl->it_offset + tbl->it_size) <<
+                                IOMMU_PAGE_SHIFT);
                return 0;
        } else
                return 1;
diff --git a/arch/powerpc/kernel/dma.c b/arch/powerpc/kernel/dma.c
index 84d6367ec003..d238c082c3c5 100644
--- a/arch/powerpc/kernel/dma.c
+++ b/arch/powerpc/kernel/dma.c
@@ -12,6 +12,7 @@
 #include <linux/memblock.h>
 #include <asm/bug.h>
 #include <asm/abs_addr.h>
+#include <asm/machdep.h>
 /*
 * Generic direct DMA implementation
@@ -89,7 +90,7 @@ static int dma_direct_dma_supported(struct device *dev, u64 mask)
        /* Could be improved so platforms can set the limit in case
         * they have limited DMA windows
         */
-        return mask >= (memblock_end_of_DRAM() - 1);
+        return mask >= get_dma_offset(dev) + (memblock_end_of_DRAM() - 1);
 #else
        return 1;
 #endif
@@ -154,6 +155,23 @@ EXPORT_SYMBOL(dma_direct_ops);
 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
+int dma_set_mask(struct device *dev, u64 dma_mask)
+{
+        struct dma_map_ops *dma_ops = get_dma_ops(dev);
+        if (ppc_md.dma_set_mask)
+                return ppc_md.dma_set_mask(dev, dma_mask);
+        if (unlikely(dma_ops == NULL))
+                return -EIO;
+        if (dma_ops->set_dma_mask != NULL)
+                return dma_ops->set_dma_mask(dev, dma_mask);
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
+EXPORT_SYMBOL(dma_set_mask);
 static int __init dma_init(void)
 {
       dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
@@ -161,3 +179,21 @@ static int __init dma_init(void)
       return 0;
 }
 fs_initcall(dma_init);
+int dma_mmap_coherent(struct device *dev, struct vm_area_struct *vma,
+                      void *cpu_addr, dma_addr_t handle, size_t size)
+{
+        unsigned long pfn;
+#ifdef CONFIG_NOT_COHERENT_CACHE
+        vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
+        pfn = __dma_get_coherent_pfn((unsigned long)cpu_addr);
+#else
+        pfn = page_to_pfn(virt_to_page(cpu_addr));
+#endif
+        return remap_pfn_range(vma, vma->vm_start,
+                               pfn + vma->vm_pgoff,
+                               vma->vm_end - vma->vm_start,
+                               vma->vm_page_prot);
+}
+EXPORT_SYMBOL_GPL(dma_mmap_coherent);
diff --git a/arch/powerpc/kernel/e500-pmu.c b/arch/powerpc/kernel/e500-pmu.c
index 7c07de0d8943..b150b510510f 100644
--- a/arch/powerpc/kernel/e500-pmu.c
+++ b/arch/powerpc/kernel/e500-pmu.c
@@ -126,4 +126,4 @@ static int init_e500_pmu(void)
        return register_fsl_emb_pmu(&e500_pmu);
 }
-arch_initcall(init_e500_pmu);
+early_initcall(init_e500_pmu);
diff --git a/arch/powerpc/kernel/entry_32.S b/arch/powerpc/kernel/entry_32.S
index ed4aeb96398b..56212bc0ab08 100644
--- a/arch/powerpc/kernel/entry_32.S
+++ b/arch/powerpc/kernel/entry_32.S
@@ -31,6 +31,7 @@
 #include <asm/asm-offsets.h>
 #include <asm/unistd.h>
 #include <asm/ftrace.h>
+#include <asm/ptrace.h>
 #undef SHOW_SYSCALLS
 #undef SHOW_SYSCALLS_TASK
@@ -879,7 +880,18 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
         */
        andi.   r10,r9,MSR_EE
        beq     1f
+        /*
+         * Since the ftrace irqsoff latency trace checks CALLER_ADDR1,
+         * which is the stack frame here, we need to force a stack frame
+         * in case we came from user space.
+         */
+        stwu    r1,-32(r1)
+        mflr    r0
+        stw     r0,4(r1)
+        stwu    r1,-32(r1)
        bl      trace_hardirqs_on
+        lwz     r1,0(r1)
+        lwz     r1,0(r1)
        lwz     r9,_MSR(r1)
 1:
 #endif /* CONFIG_TRACE_IRQFLAGS */
diff --git a/arch/powerpc/kernel/entry_64.S b/arch/powerpc/kernel/entry_64.S
index 42e9d908914a..d834425186ae 100644
--- a/arch/powerpc/kernel/entry_64.S
+++ b/arch/powerpc/kernel/entry_64.S
@@ -97,6 +97,24 @@ system_call_common:
        addi    r9,r1,STACK_FRAME_OVERHEAD
        ld      r11,exception_marker@toc(r2)
        std     r11,-16(r9)             /* "regshere" marker */
+#if defined(CONFIG_VIRT_CPU_ACCOUNTING) && defined(CONFIG_PPC_SPLPAR)
+BEGIN_FW_FTR_SECTION
+        beq     33f
+        /* if from user, see if there are any DTL entries to process */
+        ld      r10,PACALPPACAPTR(r13)  /* get ptr to VPA */
+        ld      r11,PACA_DTL_RIDX(r13)  /* get log read index */
+        ld      r10,LPPACA_DTLIDX(r10)  /* get log write index */
+        cmpd    cr1,r11,r10
+        beq+    cr1,33f
+        bl      .accumulate_stolen_time
+        REST_GPR(0,r1)
+        REST_4GPRS(3,r1)
+        REST_2GPRS(7,r1)
+        addi    r9,r1,STACK_FRAME_OVERHEAD
+33:
+END_FW_FTR_SECTION_IFSET(FW_FEATURE_SPLPAR)
+#endif /* CONFIG_VIRT_CPU_ACCOUNTING && CONFIG_PPC_SPLPAR */
 #ifdef CONFIG_TRACE_IRQFLAGS
        bl      .trace_hardirqs_on
        REST_GPR(0,r1)
@@ -202,7 +220,9 @@ syscall_exit:
        bge-    syscall_error
 syscall_error_cont:
        ld      r7,_NIP(r1)
+BEGIN_FTR_SECTION
        stdcx.  r0,0,r1                 /* to clear the reservation */
+END_FTR_SECTION_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
        andi.   r6,r8,MSR_PR
        ld      r4,_LINK(r1)
        /*
@@ -401,6 +421,12 @@ BEGIN_FTR_SECTION
        std     r24,THREAD_VRSAVE(r3)
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_PPC64
+BEGIN_FTR_SECTION
+        mfspr   r25,SPRN_DSCR
+        std     r25,THREAD_DSCR(r3)
+END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
+#endif
        and.    r0,r0,r22
        beq+    1f
        andc    r22,r22,r0
@@ -419,6 +445,17 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        sync
 #endif /* CONFIG_SMP */
+        /*
+         * If we optimise away the clear of the reservation in system
+         * calls because we know the CPU tracks the address of the
+         * reservation, then we need to clear it here to cover the
+         * case that the kernel context switch path has no larx
+         * instructions.
+         */
+BEGIN_FTR_SECTION
+        ldarx   r6,0,r1
+END_FTR_SECTION_IFSET(CPU_FTR_STCX_CHECKS_ADDRESS)
        addi    r6,r4,-THREAD   /* Convert THREAD to 'current' */
        std     r6,PACACURRENT(r13)     /* Set new 'current' */
@@ -431,10 +468,10 @@ BEGIN_FTR_SECTION
  FTR_SECTION_ELSE_NESTED(95)
        clrrdi  r6,r8,40        /* get its 1T ESID */
        clrrdi  r9,r1,40        /* get current sp 1T ESID */
-  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_1T_SEGMENT, 95)
+  ALT_MMU_FTR_SECTION_END_NESTED_IFCLR(MMU_FTR_1T_SEGMENT, 95)
 FTR_SECTION_ELSE
        b       2f
-ALT_FTR_SECTION_END_IFSET(CPU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFSET(MMU_FTR_SLB)
        clrldi. r0,r6,2         /* is new ESID c00000000? */
        cmpd    cr1,r6,r9       /* or is new ESID the same as current ESID? */
        cror    eq,4*cr1+eq,eq
@@ -448,7 +485,7 @@ BEGIN_FTR_SECTION
        li      r9,MMU_SEGSIZE_1T       /* insert B field */
        oris    r6,r6,(MMU_SEGSIZE_1T << SLBIE_SSIZE_SHIFT)@h
        rldimi  r7,r9,SLB_VSID_SSIZE_SHIFT,0
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        /* Update the last bolted SLB.  No write barriers are needed
         * here, provided we only update the current CPU's SLB shadow
@@ -460,7 +497,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
        std     r7,SLBSHADOW_STACKVSID(r9)  /* Save VSID */
        std     r0,SLBSHADOW_STACKESID(r9)  /* Save ESID */
-        /* No need to check for CPU_FTR_NO_SLBIE_B here, since when
+        /* No need to check for MMU_FTR_NO_SLBIE_B here, since when
         * we have 1TB segments, the only CPUs known to have the errata
         * only support less than 1TB of system memory and we'll never
         * actually hit this code path.
@@ -491,6 +528,15 @@ BEGIN_FTR_SECTION
        mtspr   SPRN_VRSAVE,r0          /* if G4, restore VRSAVE reg */
 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
 #endif /* CONFIG_ALTIVEC */
+#ifdef CONFIG_PPC64
+BEGIN_FTR_SECTION
+        ld      r0,THREAD_DSCR(r4)
+        cmpd    r0,r25
+        beq     1f
+        mtspr   SPRN_DSCR,r0
+1:      
+END_FTR_SECTION_IFSET(CPU_FTR_DSCR)
+#endif
        /* r3-r13 are destroyed -- Cort */
        REST_8GPRS(14, r1)
@@ -576,7 +622,16 @@ ALT_FW_FTR_SECTION_END_IFCLR(FW_FEATURE_ISERIES)
        andi.   r0,r3,MSR_RI
        beq-    unrecov_restore
+        /*
+         * Clear the reservation. If we know the CPU tracks the address of
+         * the reservation then we can potentially save some cycles and use
+         * a larx. On POWER6 and POWER7 this is significantly faster.
+         */
+BEGIN_FTR_SECTION
        stdcx.  r0,0,r1         /* to clear the reservation */
+FTR_SECTION_ELSE
+        ldarx   r4,0,r1
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_STCX_CHECKS_ADDRESS)
        /*
         * Clear RI before restoring r13.  If we are returning to
@@ -798,7 +853,7 @@ _GLOBAL(enter_rtas)
 _STATIC(rtas_return_loc)
        /* relocation is off at this point */
-        mfspr   r4,SPRN_SPRG_PACA       /* Get PACA */
+        GET_PACA(r4)
        clrldi  r4,r4,2                 /* convert to realmode address */
        bcl     20,31,$+4
@@ -829,7 +884,7 @@ _STATIC(rtas_restore_regs)
        REST_8GPRS(14, r1)              /* Restore the non-volatiles */
        REST_10GPRS(22, r1)             /* ditto */
-        mfspr   r13,SPRN_SPRG_PACA
+        GET_PACA(r13)
        ld      r4,_CCR(r1)
        mtcr    r4
diff --git a/arch/powerpc/kernel/exceptions-64e.S b/arch/powerpc/kernel/exceptions-64e.S
index 5c43063d2506..d24d4400cc79 100644
--- a/arch/powerpc/kernel/exceptions-64e.S
+++ b/arch/powerpc/kernel/exceptions-64e.S
@@ -17,6 +17,7 @@
 #include <asm/cputable.h>
 #include <asm/setup.h>
 #include <asm/thread_info.h>
+#include <asm/reg_a2.h>
 #include <asm/exception-64e.h>
 #include <asm/bug.h>
 #include <asm/irqflags.h>
@@ -252,9 +253,6 @@ exception_marker:
        .balign 0x1000
        .globl interrupt_base_book3e
 interrupt_base_book3e:                                  /* fake trap */
-        /* Note: If real debug exceptions are supported by the HW, the vector
-         * below will have to be patched up to point to an appropriate handler
-         */
        EXCEPTION_STUB(0x000, machine_check)            /* 0x0200 */
        EXCEPTION_STUB(0x020, critical_input)           /* 0x0580 */
        EXCEPTION_STUB(0x040, debug_crit)               /* 0x0d00 */
@@ -271,8 +269,13 @@ interrupt_base_book3e:					/* fake trap */
        EXCEPTION_STUB(0x1a0, watchdog)                 /* 0x09f0 */
        EXCEPTION_STUB(0x1c0, data_tlb_miss)
        EXCEPTION_STUB(0x1e0, instruction_tlb_miss)
+        EXCEPTION_STUB(0x260, perfmon)
        EXCEPTION_STUB(0x280, doorbell)
        EXCEPTION_STUB(0x2a0, doorbell_crit)
+        EXCEPTION_STUB(0x2c0, guest_doorbell)
+        EXCEPTION_STUB(0x2e0, guest_doorbell_crit)
+        EXCEPTION_STUB(0x300, hypercall)
+        EXCEPTION_STUB(0x320, ehpriv)
        .globl interrupt_end_book3e
 interrupt_end_book3e:
@@ -379,7 +382,7 @@ interrupt_end_book3e:
        mfspr   r13,SPRN_SPRG_PACA      /* get our PACA */
        b       system_call_common
-/* Auxillary Processor Unavailable Interrupt */
+/* Auxiliary Processor Unavailable Interrupt */
        START_EXCEPTION(ap_unavailable);
        NORMAL_EXCEPTION_PROLOG(0xf20, PROLOG_ADDITION_NONE)
        EXCEPTION_COMMON(0xf20, PACA_EXGEN, INTS_KEEP)
@@ -454,6 +457,70 @@ interrupt_end_book3e:
 kernel_dbg_exc:
        b       .       /* NYI */
+/* Debug exception as a debug interrupt*/
+        START_EXCEPTION(debug_debug);
+        DBG_EXCEPTION_PROLOG(0xd00, PROLOG_ADDITION_2REGS)
+        /*
+         * If there is a single step or branch-taken exception in an
+         * exception entry sequence, it was probably meant to apply to
+         * the code where the exception occurred (since exception entry
+         * doesn't turn off DE automatically).  We simulate the effect
+         * of turning off DE on entry to an exception handler by turning
+         * off DE in the DSRR1 value and clearing the debug status.
+         */
+        mfspr   r14,SPRN_DBSR           /* check single-step/branch taken */
+        andis.  r15,r14,DBSR_IC@h
+        beq+    1f
+        LOAD_REG_IMMEDIATE(r14,interrupt_base_book3e)
+        LOAD_REG_IMMEDIATE(r15,interrupt_end_book3e)
+        cmpld   cr0,r10,r14
+        cmpld   cr1,r10,r15
+        blt+    cr0,1f
+        bge+    cr1,1f
+        /* here it looks like we got an inappropriate debug exception. */
+        lis     r14,DBSR_IC@h           /* clear the IC event */
+        rlwinm  r11,r11,0,~MSR_DE       /* clear DE in the DSRR1 value */
+        mtspr   SPRN_DBSR,r14
+        mtspr   SPRN_DSRR1,r11
+        lwz     r10,PACA_EXDBG+EX_CR(r13)       /* restore registers */
+        ld      r1,PACA_EXDBG+EX_R1(r13)
+        ld      r14,PACA_EXDBG+EX_R14(r13)
+        ld      r15,PACA_EXDBG+EX_R15(r13)
+        mtcr    r10
+        ld      r10,PACA_EXDBG+EX_R10(r13)      /* restore registers */
+        ld      r11,PACA_EXDBG+EX_R11(r13)
+        mfspr   r13,SPRN_SPRG_DBG_SCRATCH
+        rfdi
+        /* Normal debug exception */
+        /* XXX We only handle coming from userspace for now since we can't
+         *     quite save properly an interrupted kernel state yet
+         */
+1:      andi.   r14,r11,MSR_PR;         /* check for userspace again */
+        beq     kernel_dbg_exc;         /* if from kernel mode */
+        /* Now we mash up things to make it look like we are coming on a
+         * normal exception
+         */
+        mfspr   r15,SPRN_SPRG_DBG_SCRATCH
+        mtspr   SPRN_SPRG_GEN_SCRATCH,r15
+        mfspr   r14,SPRN_DBSR
+        EXCEPTION_COMMON(0xd00, PACA_EXDBG, INTS_DISABLE_ALL)
+        std     r14,_DSISR(r1)
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        mr      r4,r14
+        ld      r14,PACA_EXDBG+EX_R14(r13)
+        ld      r15,PACA_EXDBG+EX_R15(r13)
+        bl      .save_nvgprs
+        bl      .DebugException
+        b       .ret_from_except
+        MASKABLE_EXCEPTION(0x260, perfmon, .performance_monitor_exception, ACK_NONE)
 /* Doorbell interrupt */
        MASKABLE_EXCEPTION(0x2070, doorbell, .doorbell_exception, ACK_NONE)
@@ -468,6 +535,11 @@ kernel_dbg_exc:
 //      b       ret_from_crit_except
        b       .
+        MASKABLE_EXCEPTION(0x2c0, guest_doorbell, .unknown_exception, ACK_NONE)
+        MASKABLE_EXCEPTION(0x2e0, guest_doorbell_crit, .unknown_exception, ACK_NONE)
+        MASKABLE_EXCEPTION(0x310, hypercall, .unknown_exception, ACK_NONE)
+        MASKABLE_EXCEPTION(0x320, ehpriv, .unknown_exception, ACK_NONE)
 /*
 * An interrupt came in while soft-disabled; clear EE in SRR1,
@@ -587,7 +659,12 @@ fast_exception_return:
 BAD_STACK_TRAMPOLINE(0x000)
 BAD_STACK_TRAMPOLINE(0x100)
 BAD_STACK_TRAMPOLINE(0x200)
+BAD_STACK_TRAMPOLINE(0x260)
+BAD_STACK_TRAMPOLINE(0x2c0)
+BAD_STACK_TRAMPOLINE(0x2e0)
 BAD_STACK_TRAMPOLINE(0x300)
+BAD_STACK_TRAMPOLINE(0x310)
+BAD_STACK_TRAMPOLINE(0x320)
 BAD_STACK_TRAMPOLINE(0x400)
 BAD_STACK_TRAMPOLINE(0x500)
 BAD_STACK_TRAMPOLINE(0x600)
@@ -864,8 +941,23 @@ have_hes:
         * that will have to be made dependent on whether we are running under
         * a hypervisor I suppose.
         */
-        ori     r3,r3,MAS0_HES | MAS0_WQ_ALLWAYS
-        mtspr   SPRN_MAS0,r3
+        /* BEWARE, MAGIC
+         * This code is called as an ordinary function on the boot CPU. But to
+         * avoid duplication, this code is also used in SCOM bringup of
+         * secondary CPUs. We read the code between the initial_tlb_code_start
+         * and initial_tlb_code_end labels one instruction at a time and RAM it
+         * into the new core via SCOM. That doesn't process branches, so there
+         * must be none between those two labels. It also means if this code
+         * ever takes any parameters, the SCOM code must also be updated to
+         * provide them.
+         */
+        .globl a2_tlbinit_code_start
+a2_tlbinit_code_start:
+        ori     r11,r3,MAS0_WQ_ALLWAYS
+        oris    r11,r11,MAS0_ESEL(3)@h /* Use way 3: workaround A2 erratum 376 */
+        mtspr   SPRN_MAS0,r11
        lis     r3,(MAS1_VALID | MAS1_IPROT)@h
        ori     r3,r3,BOOK3E_PAGESZ_1GB << MAS1_TSIZE_SHIFT
        mtspr   SPRN_MAS1,r3
@@ -879,18 +971,86 @@ have_hes:
        /* Write the TLB entry */
        tlbwe
+        .globl a2_tlbinit_after_linear_map
+a2_tlbinit_after_linear_map:
        /* Now we branch the new virtual address mapped by this entry */
        LOAD_REG_IMMEDIATE(r3,1f)
        mtctr   r3
        bctr
 1:      /* We are now running at PAGE_OFFSET, clean the TLB of everything
-         * else (XXX we should scan for bolted crap from the firmware too)
+         * else (including IPROTed things left by firmware)
+         * r4 = TLBnCFG
+         * r3 = current address (more or less)
         */
+        li      r5,0
+        mtspr   SPRN_MAS6,r5
+        tlbsx   0,r3
+        rlwinm  r9,r4,0,TLBnCFG_N_ENTRY
+        rlwinm  r10,r4,8,0xff
+        addi    r10,r10,-1      /* Get inner loop mask */
+        li      r3,1
+        mfspr   r5,SPRN_MAS1
+        rlwinm  r5,r5,0,(~(MAS1_VALID|MAS1_IPROT))
+        mfspr   r6,SPRN_MAS2
+        rldicr  r6,r6,0,51              /* Extract EPN */
+        mfspr   r7,SPRN_MAS0
+        rlwinm  r7,r7,0,0xffff0fff      /* Clear HES and WQ */
+        rlwinm  r8,r7,16,0xfff          /* Extract ESEL */
+2:      add     r4,r3,r8
+        and     r4,r4,r10
+        rlwimi  r7,r4,16,MAS0_ESEL_MASK
+        mtspr   SPRN_MAS0,r7
+        mtspr   SPRN_MAS1,r5
+        mtspr   SPRN_MAS2,r6
+        tlbwe
+        addi    r3,r3,1
+        and.    r4,r3,r10
+        bne     3f
+        addis   r6,r6,(1<<30)@h
+3:
+        cmpw    r3,r9
+        blt     2b
+        .globl  a2_tlbinit_after_iprot_flush
+a2_tlbinit_after_iprot_flush:
+#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
+        /* Now establish early debug mappings if applicable */
+        /* Restore the MAS0 we used for linear mapping load */
+        mtspr   SPRN_MAS0,r11
+        lis     r3,(MAS1_VALID | MAS1_IPROT)@h
+        ori     r3,r3,(BOOK3E_PAGESZ_4K << MAS1_TSIZE_SHIFT)
+        mtspr   SPRN_MAS1,r3
+        LOAD_REG_IMMEDIATE(r3, WSP_UART_VIRT | MAS2_I | MAS2_G)
+        mtspr   SPRN_MAS2,r3
+        LOAD_REG_IMMEDIATE(r3, WSP_UART_PHYS | MAS3_SR | MAS3_SW)
+        mtspr   SPRN_MAS7_MAS3,r3
+        /* re-use the MAS8 value from the linear mapping */
+        tlbwe
+#endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
        PPC_TLBILX(0,0,0)
        sync
        isync
+        .globl a2_tlbinit_code_end
+a2_tlbinit_code_end:
        /* We translate LR and return */
        mflr    r3
        tovirt(r3,r3)
@@ -1040,3 +1200,33 @@ _GLOBAL(__setup_base_ivors)
        sync
        blr
+_GLOBAL(setup_perfmon_ivor)
+        SET_IVOR(35, 0x260) /* Performance Monitor */
+        blr
+_GLOBAL(setup_doorbell_ivors)
+        SET_IVOR(36, 0x280) /* Processor Doorbell */
+        SET_IVOR(37, 0x2a0) /* Processor Doorbell Crit */
+        /* Check MMUCFG[LPIDSIZE] to determine if we have category E.HV */
+        mfspr   r10,SPRN_MMUCFG
+        rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+        beqlr
+        SET_IVOR(38, 0x2c0) /* Guest Processor Doorbell */
+        SET_IVOR(39, 0x2e0) /* Guest Processor Doorbell Crit/MC */
+        blr
+_GLOBAL(setup_ehv_ivors)
+        /*
+         * We may be running as a guest and lack E.HV even on a chip
+         * that normally has it.
+         */
+        mfspr   r10,SPRN_MMUCFG
+        rlwinm. r10,r10,0,MMUCFG_LPIDSIZE
+        beqlr
+        SET_IVOR(40, 0x300) /* Embedded Hypervisor System Call */
+        SET_IVOR(41, 0x320) /* Embedded Hypervisor Privilege */
+        blr
diff --git a/arch/powerpc/kernel/exceptions-64s.S b/arch/powerpc/kernel/exceptions-64s.S
index f53029a01554..a85f4874cba7 100644
--- a/arch/powerpc/kernel/exceptions-64s.S
+++ b/arch/powerpc/kernel/exceptions-64s.S
@@ -5,7 +5,7 @@
 * handling and other fixed offset specific things.
 *
 * This file is meant to be #included from head_64.S due to
- * position dependant assembly.
+ * position dependent assembly.
 *
 * Most of this originates from head_64.S and thus has the same
 * copyright history.
@@ -13,6 +13,7 @@
 */
 #include <asm/exception-64s.h>
+#include <asm/ptrace.h>
 /*
 * We layout physical memory as follows:
@@ -36,23 +37,51 @@
        .globl __start_interrupts
 __start_interrupts:
-        STD_EXCEPTION_PSERIES(0x100, system_reset)
+        .globl system_reset_pSeries;
+system_reset_pSeries:
+        HMT_MEDIUM;
+        DO_KVM  0x100;
+        SET_SCRATCH0(r13)
+#ifdef CONFIG_PPC_P7_NAP
+BEGIN_FTR_SECTION
+        /* Running native on arch 2.06 or later, check if we are
+         * waking up from nap. We only handle no state loss and
+         * supervisor state loss. We do -not- handle hypervisor
+         * state loss at this time.
+         */
+        mfspr   r13,SPRN_SRR1
+        rlwinm  r13,r13,47-31,30,31
+        cmpwi   cr0,r13,1
+        bne     1f
+        b       .power7_wakeup_noloss
+1:      cmpwi   cr0,r13,2
+        bne     1f
+        b       .power7_wakeup_loss
+        /* Total loss of HV state is fatal, we could try to use the
+         * PIR to locate a PACA, then use an emergency stack etc...
+         * but for now, let's just stay stuck here
+         */
+1:      cmpwi   cr0,r13,3
+        beq     .
+END_FTR_SECTION_IFSET(CPU_FTR_HVMODE_206)
+#endif /* CONFIG_PPC_P7_NAP */
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD)
        . = 0x200
 _machine_check_pSeries:
        HMT_MEDIUM
        DO_KVM  0x200
-        mtspr   SPRN_SPRG_SCRATCH0,r13          /* save r13 */
+        SET_SCRATCH0(r13)
-        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, EXC_STD)
        . = 0x300
        .globl data_access_pSeries
 data_access_pSeries:
        HMT_MEDIUM
        DO_KVM  0x300
-        mtspr   SPRN_SPRG_SCRATCH0,r13
+        SET_SCRATCH0(r13)
 BEGIN_FTR_SECTION
-        mfspr   r13,SPRN_SPRG_PACA
+        GET_PACA(r13)
        std     r9,PACA_EXSLB+EX_R9(r13)
        std     r10,PACA_EXSLB+EX_R10(r13)
        mfspr   r10,SPRN_DAR
@@ -66,22 +95,22 @@ BEGIN_FTR_SECTION
        std     r11,PACA_EXGEN+EX_R11(r13)
        ld      r11,PACA_EXSLB+EX_R9(r13)
        std     r12,PACA_EXGEN+EX_R12(r13)
-        mfspr   r12,SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r12)
        std     r10,PACA_EXGEN+EX_R10(r13)
        std     r11,PACA_EXGEN+EX_R9(r13)
        std     r12,PACA_EXGEN+EX_R13(r13)
-        EXCEPTION_PROLOG_PSERIES_1(data_access_common)
+        EXCEPTION_PROLOG_PSERIES_1(data_access_common, EXC_STD)
 FTR_SECTION_ELSE
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD)
-ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_SLB)
        . = 0x380
        .globl data_access_slb_pSeries
 data_access_slb_pSeries:
        HMT_MEDIUM
        DO_KVM  0x380
-        mtspr   SPRN_SPRG_SCRATCH0,r13
+        SET_SCRATCH0(r13)
-        mfspr   r13,SPRN_SPRG_PACA              /* get paca address into r13 */
+        GET_PACA(r13)
        std     r3,PACA_EXSLB+EX_R3(r13)
        mfspr   r3,SPRN_DAR
        std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
@@ -94,7 +123,7 @@ data_access_slb_pSeries:
        std     r10,PACA_EXSLB+EX_R10(r13)
        std     r11,PACA_EXSLB+EX_R11(r13)
        std     r12,PACA_EXSLB+EX_R12(r13)
-        mfspr   r10,SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r10)
        std     r10,PACA_EXSLB+EX_R13(r13)
        mfspr   r12,SPRN_SRR1           /* and SRR1 */
 #ifndef CONFIG_RELOCATABLE
@@ -112,15 +141,15 @@ data_access_slb_pSeries:
        bctr
 #endif
-        STD_EXCEPTION_PSERIES(0x400, instruction_access)
+        STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
        . = 0x480
        .globl instruction_access_slb_pSeries
 instruction_access_slb_pSeries:
        HMT_MEDIUM
        DO_KVM  0x480
-        mtspr   SPRN_SPRG_SCRATCH0,r13
+        SET_SCRATCH0(r13)
-        mfspr   r13,SPRN_SPRG_PACA              /* get paca address into r13 */
+        GET_PACA(r13)
        std     r3,PACA_EXSLB+EX_R3(r13)
        mfspr   r3,SPRN_SRR0            /* SRR0 is faulting address */
        std     r9,PACA_EXSLB+EX_R9(r13)        /* save r9 - r12 */
@@ -133,7 +162,7 @@ instruction_access_slb_pSeries:
        std     r10,PACA_EXSLB+EX_R10(r13)
        std     r11,PACA_EXSLB+EX_R11(r13)
        std     r12,PACA_EXSLB+EX_R12(r13)
-        mfspr   r10,SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r10)
        std     r10,PACA_EXSLB+EX_R13(r13)
        mfspr   r12,SPRN_SRR1           /* and SRR1 */
 #ifndef CONFIG_RELOCATABLE
@@ -146,13 +175,29 @@ instruction_access_slb_pSeries:
        bctr
 #endif
-        MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt)
+        /* We open code these as we can't have a ". = x" (even with
-        STD_EXCEPTION_PSERIES(0x600, alignment)
+         * x = "." within a feature section
-        STD_EXCEPTION_PSERIES(0x700, program_check)
+         */
-        STD_EXCEPTION_PSERIES(0x800, fp_unavailable)
+        . = 0x500;
-        MASKABLE_EXCEPTION_PSERIES(0x900, decrementer)
+        .globl hardware_interrupt_pSeries;
-        STD_EXCEPTION_PSERIES(0xa00, trap_0a)
+        .globl hardware_interrupt_hv;
-        STD_EXCEPTION_PSERIES(0xb00, trap_0b)
+hardware_interrupt_pSeries:
+hardware_interrupt_hv:
+        BEGIN_FTR_SECTION
+                _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD)
+        FTR_SECTION_ELSE
+                _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV)
+        ALT_FTR_SECTION_END_IFCLR(CPU_FTR_HVMODE_206)
+        STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
+        STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
+        STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
+        MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
+        MASKABLE_EXCEPTION_HV(0x980, 0x980, decrementer)
+        STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
+        STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
        . = 0xc00
        .globl  system_call_pSeries
@@ -164,13 +209,13 @@ BEGIN_FTR_SECTION
        beq-    1f
 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
        mr      r9,r13
-        mfspr   r13,SPRN_SPRG_PACA
+        GET_PACA(r13)
        mfspr   r11,SPRN_SRR0
-        ld      r12,PACAKBASE(r13)
-        ld      r10,PACAKMSR(r13)
-        LOAD_HANDLER(r12, system_call_entry)
-        mtspr   SPRN_SRR0,r12
        mfspr   r12,SPRN_SRR1
+        ld      r10,PACAKBASE(r13)
+        LOAD_HANDLER(r10, system_call_entry)
+        mtspr   SPRN_SRR0,r10
+        ld      r10,PACAKMSR(r13)
        mtspr   SPRN_SRR1,r10
        rfid
        b       .       /* prevent speculative execution */
@@ -182,8 +227,21 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
        rfid            /* return to userspace */
        b       .
-        STD_EXCEPTION_PSERIES(0xd00, single_step)
+        STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
-        STD_EXCEPTION_PSERIES(0xe00, trap_0e)
+        /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
+         * out of line to handle them
+         */
+        . = 0xe00
+        b       h_data_storage_hv
+        . = 0xe20
+        b       h_instr_storage_hv
+        . = 0xe40
+        b       emulation_assist_hv
+        . = 0xe50
+        b       hmi_exception_hv
+        . = 0xe60
+        b       hmi_exception_hv
        /* We need to deal with the Altivec unavailable exception
         * here which is at 0xf20, thus in the middle of the
@@ -192,39 +250,42 @@ END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE)
         */
 performance_monitor_pSeries_1:
        . = 0xf00
-        DO_KVM  0xf00
        b       performance_monitor_pSeries
 altivec_unavailable_pSeries_1:
        . = 0xf20
-        DO_KVM  0xf20
        b       altivec_unavailable_pSeries
 vsx_unavailable_pSeries_1:
        . = 0xf40
-        DO_KVM  0xf40
        b       vsx_unavailable_pSeries
 #ifdef CONFIG_CBE_RAS
-        HSTD_EXCEPTION_PSERIES(0x1200, cbe_system_error)
+        STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
 #endif /* CONFIG_CBE_RAS */
-        STD_EXCEPTION_PSERIES(0x1300, instruction_breakpoint)
+        STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
 #ifdef CONFIG_CBE_RAS
-        HSTD_EXCEPTION_PSERIES(0x1600, cbe_maintenance)
+        STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
 #endif /* CONFIG_CBE_RAS */
-        STD_EXCEPTION_PSERIES(0x1700, altivec_assist)
+        STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
 #ifdef CONFIG_CBE_RAS
-        HSTD_EXCEPTION_PSERIES(0x1800, cbe_thermal)
+        STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
 #endif /* CONFIG_CBE_RAS */
        . = 0x3000
-/*** pSeries interrupt support ***/
+/*** Out of line interrupts support ***/
+        /* moved from 0xe00 */
+        STD_EXCEPTION_HV(., 0xe00, h_data_storage)
+        STD_EXCEPTION_HV(., 0xe20, h_instr_storage)
+        STD_EXCEPTION_HV(., 0xe40, emulation_assist)
+        STD_EXCEPTION_HV(., 0xe60, hmi_exception) /* need to flush cache ? */
        /* moved from 0xf00 */
-        STD_EXCEPTION_PSERIES(., performance_monitor)
+        STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
-        STD_EXCEPTION_PSERIES(., altivec_unavailable)
+        STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
-        STD_EXCEPTION_PSERIES(., vsx_unavailable)
+        STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
 /*
 * An interrupt came in while soft-disabled; clear EE in SRR1,
@@ -239,17 +300,30 @@ masked_interrupt:
        rotldi  r10,r10,16
        mtspr   SPRN_SRR1,r10
        ld      r10,PACA_EXGEN+EX_R10(r13)
-        mfspr   r13,SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r13)
        rfid
        b       .
+masked_Hinterrupt:
+        stb     r10,PACAHARDIRQEN(r13)
+        mtcrf   0x80,r9
+        ld      r9,PACA_EXGEN+EX_R9(r13)
+        mfspr   r10,SPRN_HSRR1
+        rldicl  r10,r10,48,1            /* clear MSR_EE */
+        rotldi  r10,r10,16
+        mtspr   SPRN_HSRR1,r10
+        ld      r10,PACA_EXGEN+EX_R10(r13)
+        GET_SCRATCH0(r13)
+        hrfid
+        b       .
        .align  7
 do_stab_bolted_pSeries:
        std     r11,PACA_EXSLB+EX_R11(r13)
        std     r12,PACA_EXSLB+EX_R12(r13)
-        mfspr   r10,SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r10)
        std     r10,PACA_EXSLB+EX_R13(r13)
-        EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted)
+        EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
 #ifdef CONFIG_PPC_PSERIES
 /*
@@ -259,15 +333,15 @@ do_stab_bolted_pSeries:
      .align 7
 system_reset_fwnmi:
        HMT_MEDIUM
-        mtspr   SPRN_SPRG_SCRATCH0,r13          /* save r13 */
+        SET_SCRATCH0(r13)               /* save r13 */
-        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD)
        .globl machine_check_fwnmi
      .align 7
 machine_check_fwnmi:
        HMT_MEDIUM
-        mtspr   SPRN_SPRG_SCRATCH0,r13          /* save r13 */
+        SET_SCRATCH0(r13)               /* save r13 */
-        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common)
+        EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common, EXC_STD)
 #endif /* CONFIG_PPC_PSERIES */
@@ -281,7 +355,7 @@ slb_miss_user_pseries:
        std     r10,PACA_EXGEN+EX_R10(r13)
        std     r11,PACA_EXGEN+EX_R11(r13)
        std     r12,PACA_EXGEN+EX_R12(r13)
-        mfspr   r10,SPRG_SCRATCH0
+        GET_SCRATCH0(r10)
        ld      r11,PACA_EXSLB+EX_R9(r13)
        ld      r12,PACA_EXSLB+EX_R3(r13)
        std     r10,PACA_EXGEN+EX_R13(r13)
@@ -299,6 +373,12 @@ slb_miss_user_pseries:
        b       .                               /* prevent spec. execution */
 #endif /* __DISABLED__ */
+/* KVM's trampoline code needs to be close to the interrupt handlers */
+#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
+#include "../kvm/book3s_rmhandlers.S"
+#endif
        .align  7
        .globl  __end_interrupts
 __end_interrupts:
@@ -335,6 +415,8 @@ machine_check_common:
        STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
        STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
        STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
+        STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
+        STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
        STD_EXCEPTION_COMMON_IDLE(0xf00, performance_monitor, .performance_monitor_exception)
        STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
 #ifdef CONFIG_ALTIVEC
@@ -379,9 +461,24 @@ bad_stack:
        std     r12,_XER(r1)
        SAVE_GPR(0,r1)
        SAVE_GPR(2,r1)
-        SAVE_4GPRS(3,r1)
+        ld      r10,EX_R3(r3)
-        SAVE_2GPRS(7,r1)
+        std     r10,GPR3(r1)
-        SAVE_10GPRS(12,r1)
+        SAVE_GPR(4,r1)
+        SAVE_4GPRS(5,r1)
+        ld      r9,EX_R9(r3)
+        ld      r10,EX_R10(r3)
+        SAVE_2GPRS(9,r1)
+        ld      r9,EX_R11(r3)
+        ld      r10,EX_R12(r3)
+        ld      r11,EX_R13(r3)
+        std     r9,GPR11(r1)
+        std     r10,GPR12(r1)
+        std     r11,GPR13(r1)
+BEGIN_FTR_SECTION
+        ld      r10,EX_CFAR(r3)
+        std     r10,ORIG_GPR3(r1)
+END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
+        SAVE_8GPRS(14,r1)
        SAVE_10GPRS(22,r1)
        lhz     r12,PACA_TRAP_SAVE(r13)
        std     r12,_TRAP(r1)
@@ -390,6 +487,9 @@ bad_stack:
        li      r12,0
        std     r12,0(r11)
        ld      r2,PACATOC(r13)
+        ld      r11,exception_marker@toc(r2)
+        std     r12,RESULT(r1)
+        std     r11,STACK_FRAME_OVERHEAD-16(r1)
 1:      addi    r3,r1,STACK_FRAME_OVERHEAD
        bl      .kernel_bad_stack
        b       1b
@@ -412,6 +512,19 @@ data_access_common:
        li      r5,0x300
        b       .do_hash_page           /* Try to handle as hpte fault */
+        .align  7
+        .globl  h_data_storage_common
+h_data_storage_common:
+        mfspr   r10,SPRN_HDAR
+        std     r10,PACA_EXGEN+EX_DAR(r13)
+        mfspr   r10,SPRN_HDSISR
+        stw     r10,PACA_EXGEN+EX_DSISR(r13)
+        EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
+        bl      .save_nvgprs
+        addi    r3,r1,STACK_FRAME_OVERHEAD
+        bl      .unknown_exception
+        b       .ret_from_except
        .align  7
        .globl instruction_access_common
 instruction_access_common:
@@ -421,6 +534,8 @@ instruction_access_common:
        li      r5,0x400
        b       .do_hash_page           /* Try to handle as hpte fault */
+        STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
 /*
 * Here is the common SLB miss user that is used when going to virtual
 * mode for SLB misses, that is currently not used
@@ -743,7 +858,7 @@ _STATIC(do_hash_page)
 BEGIN_FTR_SECTION
        andis.  r0,r4,0x0020            /* Is it a segment table fault? */
        bne-    do_ste_alloc            /* If so handle it */
-END_FTR_SECTION_IFCLR(CPU_FTR_SLB)
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
        clrrdi  r11,r1,THREAD_SHIFT
        lwz     r0,TI_PREEMPT(r11)      /* If we're in an "NMI" */
@@ -818,12 +933,12 @@ END_FW_FTR_SECTION_IFCLR(FW_FEATURE_ISERIES)
        /*
         * hash_page couldn't handle it, set soft interrupt enable back
-         * to what it was before the trap.  Note that .raw_local_irq_restore
+         * to what it was before the trap.  Note that .arch_local_irq_restore
         * handles any interrupts pending at this point.
         */
        ld      r3,SOFTE(r1)
        TRACE_AND_RESTORE_IRQ_PARTIAL(r3, 11f)
-        bl      .raw_local_irq_restore
+        bl      .arch_local_irq_restore
        b       11f
 /* We have a data breakpoint exception - handle it */
@@ -970,20 +1085,6 @@ _GLOBAL(do_stab_bolted)
        rfid
        b       .       /* prevent speculative execution */
-/*
- * Space for CPU0's segment table.
- *
- * On iSeries, the hypervisor must fill in at least one entry before
- * we get control (with relocate on).  The address is given to the hv
- * as a page number (see xLparMap below), so this must be at a
- * fixed address (the linker can't compute (u64)&initial_stab >>
- * PAGE_SHIFT).
- */
-        . = STAB0_OFFSET        /* 0x6000 */
-        .globl initial_stab
-initial_stab:
-        .space  4096
 #ifdef CONFIG_PPC_PSERIES
 /*
 * Data area reserved for FWNMI option.
@@ -1020,3 +1121,17 @@ xLparMap:
 #ifdef CONFIG_PPC_PSERIES
        . = 0x8000
 #endif /* CONFIG_PPC_PSERIES */
+/*
+ * Space for CPU0's segment table.
+ *
+ * On iSeries, the hypervisor must fill in at least one entry before
+ * we get control (with relocate on).  The address is given to the hv
+ * as a page number (see xLparMap above), so this must be at a
+ * fixed address (the linker can't compute (u64)&initial_stab >>
+ * PAGE_SHIFT).
+ */
+        . = STAB0_OFFSET        /* 0x8000 */
+        .globl initial_stab
+initial_stab:
+        .space  4096
diff --git a/arch/powerpc/kernel/fpu.S b/arch/powerpc/kernel/fpu.S
index fc8f5b14019c..de369558bf0a 100644
--- a/arch/powerpc/kernel/fpu.S
+++ b/arch/powerpc/kernel/fpu.S
@@ -23,6 +23,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 #ifdef CONFIG_VSX
 #define REST_32FPVSRS(n,c,base)                                         \
@@ -163,24 +164,14 @@ END_FTR_SECTION_IFSET(CPU_FTR_VSX)
 /*
 * These are used in the alignment trap handler when emulating
 * single-precision loads and stores.
- * We restore and save the fpscr so the task gets the same result
- * and exceptions as if the cpu had performed the load or store.
 */
 _GLOBAL(cvt_fd)
-        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
-        MTFSF_L(0)
        lfs     0,0(r3)
        stfd    0,0(r4)
-        mffs    0
-        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
        blr
 _GLOBAL(cvt_df)
-        lfd     0,THREAD_FPSCR(r5)      /* load up fpscr value */
-        MTFSF_L(0)
        lfd     0,0(r3)
        stfs    0,0(r4)
-        mffs    0
-        stfd    0,THREAD_FPSCR(r5)      /* save new fpscr value */
        blr
diff --git a/arch/powerpc/kernel/ftrace.c b/arch/powerpc/kernel/ftrace.c
index ce1f3e44c24f..bf99cfa6bbfe 100644
--- a/arch/powerpc/kernel/ftrace.c
+++ b/arch/powerpc/kernel/ftrace.c
@@ -22,6 +22,7 @@
 #include <asm/cacheflush.h>
 #include <asm/code-patching.h>
 #include <asm/ftrace.h>
+#include <asm/syscall.h>
 #ifdef CONFIG_DYNAMIC_FTRACE
@@ -600,3 +601,10 @@ void prepare_ftrace_return(unsigned long *parent, unsigned long self_addr)
        }
 }
 #endif /* CONFIG_FUNCTION_GRAPH_TRACER */
+#if defined(CONFIG_FTRACE_SYSCALLS) && defined(CONFIG_PPC64)
+unsigned long __init arch_syscall_addr(int nr)
+{
+        return sys_call_table[nr*2];
+}
+#endif /* CONFIG_FTRACE_SYSCALLS && CONFIG_PPC64 */
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index 98c4b29a56f4..ba250d505e07 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -805,19 +805,6 @@ _ENTRY(copy_and_flush)
        blr
 #ifdef CONFIG_SMP
-#ifdef CONFIG_GEMINI
-        .globl  __secondary_start_gemini
-__secondary_start_gemini:
-        mfspr   r4,SPRN_HID0
-        ori     r4,r4,HID0_ICFI
-        li      r3,0
-        ori     r3,r3,HID0_ICE
-        andc    r4,r4,r3
-        mtspr   SPRN_HID0,r4
-        sync
-        b       __secondary_start
-#endif /* CONFIG_GEMINI */
        .globl __secondary_start_mpc86xx
 __secondary_start_mpc86xx:
        mfspr   r3, SPRN_PIR
diff --git a/arch/powerpc/kernel/head_40x.S b/arch/powerpc/kernel/head_40x.S
index a90625f9b485..a91626d87fc9 100644
--- a/arch/powerpc/kernel/head_40x.S
+++ b/arch/powerpc/kernel/head_40x.S
@@ -40,6 +40,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 /* As with the other PowerPC ports, it is expected that when code
 * execution begins here, the following registers contain valid, yet
@@ -765,7 +766,7 @@ DataAccess:
         * miss get to this point to load the TLB.
         *      r10 - TLB_TAG value
         *      r11 - Linux PTE
-         *      r12, r9 - avilable to use
+         *      r12, r9 - available to use
         *      PID - loaded with proper value when we get here
         *      Upon exit, we reload everything and RFI.
         * Actually, it will fit now, but oh well.....a common place
@@ -923,11 +924,7 @@ initial_mmu:
        mtspr   SPRN_PID,r0
        sync
-        /* Configure and load two entries into TLB slots 62 and 63.
+        /* Configure and load one entry into TLB slots 63 */
-         * In case we are pinning TLBs, these are reserved in by the
-         * other TLB functions.  If not reserving, then it doesn't
-         * matter where they are loaded.
-         */
        clrrwi  r4,r4,10                /* Mask off the real page number */
        ori     r4,r4,(TLB_WR | TLB_EX) /* Set the write and execute bits */
diff --git a/arch/powerpc/kernel/head_44x.S b/arch/powerpc/kernel/head_44x.S
index 562305b40a8e..5e12b741ba5f 100644
--- a/arch/powerpc/kernel/head_44x.S
+++ b/arch/powerpc/kernel/head_44x.S
@@ -37,6 +37,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 #include <asm/synch.h>
 #include "head_booke.h"
@@ -177,7 +178,7 @@ interrupt_base:
        NORMAL_EXCEPTION_PROLOG
        EXC_XFER_EE_LITE(0x0c00, DoSyscall)
-        /* Auxillary Processor Unavailable Interrupt */
+        /* Auxiliary Processor Unavailable Interrupt */
        EXCEPTION(0x2020, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
        /* Decrementer Interrupt */
diff --git a/arch/powerpc/kernel/head_64.S b/arch/powerpc/kernel/head_64.S
index c571cd3c1453..ba504099844a 100644
--- a/arch/powerpc/kernel/head_64.S
+++ b/arch/powerpc/kernel/head_64.S
@@ -38,8 +38,9 @@
 #include <asm/page_64.h>
 #include <asm/irqflags.h>
 #include <asm/kvm_book3s_asm.h>
+#include <asm/ptrace.h>
-/* The physical memory is layed out such that the secondary processor
+/* The physical memory is laid out such that the secondary processor
 * spin code sits at 0x0000...0x00ff. On server, the vectors follow
 * using the layout described in exceptions-64s.S
 */
@@ -96,7 +97,7 @@ __secondary_hold_acknowledge:
        .llong hvReleaseData-KERNELBASE
 #endif /* CONFIG_PPC_ISERIES */
-#ifdef CONFIG_CRASH_DUMP
+#ifdef CONFIG_RELOCATABLE
        /* This flag is set to 1 by a loader if the kernel should run
         * at the loaded address instead of the linked address.  This
         * is used by kexec-tools to keep the the kdump kernel in the
@@ -146,6 +147,8 @@ __secondary_hold:
        mtctr   r4
        mr      r3,r24
        li      r4,0
+        /* Make sure that patched code is visible */
+        isync
        bctr
 #else
        BUG_OPCODE
@@ -166,12 +169,6 @@ exception_marker:
 #include "exceptions-64s.S"
 #endif
-/* KVM trampoline code needs to be close to the interrupt handlers */
-#ifdef CONFIG_KVM_BOOK3S_64_HANDLER
-#include "../kvm/book3s_rmhandlers.S"
-#endif
 _GLOBAL(generic_secondary_thread_init)
        mr      r24,r3
@@ -221,19 +218,25 @@ generic_secondary_common_init:
         */
        LOAD_REG_ADDR(r13, paca)        /* Load paca pointer             */
        ld      r13,0(r13)              /* Get base vaddr of paca array  */
+#ifndef CONFIG_SMP
+        addi    r13,r13,PACA_SIZE       /* know r13 if used accidentally */
+        b       .kexec_wait             /* wait for next kernel if !SMP  */
+#else
+        LOAD_REG_ADDR(r7, nr_cpu_ids)   /* Load nr_cpu_ids address       */
+        lwz     r7,0(r7)                /* also the max paca allocated   */
        li      r5,0                    /* logical cpu id                */
 1:      lhz     r6,PACAHWCPUID(r13)     /* Load HW procid from paca      */
        cmpw    r6,r24                  /* Compare to our id             */
        beq     2f
        addi    r13,r13,PACA_SIZE       /* Loop to next PACA on miss     */
        addi    r5,r5,1
-        cmpwi   r5,NR_CPUS
+        cmpw    r5,r7                   /* Check if more pacas exist     */
        blt     1b
        mr      r3,r24                  /* not found, copy phys to r3    */
        b       .kexec_wait             /* next kernel might do better   */
-2:      mtspr   SPRN_SPRG_PACA,r13      /* Save vaddr of paca in an SPRG */
+2:      SET_PACA(r13)
 #ifdef CONFIG_PPC_BOOK3E
        addi    r12,r13,PACA_EXTLB      /* and TLB exc frame in another  */
        mtspr   SPRN_SPRG_TLB_EXFRAME,r12
@@ -241,34 +244,39 @@ generic_secondary_common_init:
        /* From now on, r24 is expected to be logical cpuid */
        mr      r24,r5
-3:      HMT_LOW
-        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
-                                        /* start.                        */
-#ifndef CONFIG_SMP
-        b       3b                      /* Never go on non-SMP           */
-#else
-        cmpwi   0,r23,0
-        beq     3b                      /* Loop until told to go         */
-        sync                            /* order paca.run and cur_cpu_spec */
        /* See if we need to call a cpu state restore handler */
        LOAD_REG_ADDR(r23, cur_cpu_spec)
        ld      r23,0(r23)
        ld      r23,CPU_SPEC_RESTORE(r23)
        cmpdi   0,r23,0
-        beq     4f
+        beq     3f
        ld      r23,0(r23)
        mtctr   r23
        bctrl
-4:      /* Create a temp kernel stack for use before relocation is on.  */
+3:      LOAD_REG_ADDR(r3, boot_cpu_count) /* Decrement boot_cpu_count */
+        lwarx   r4,0,r3
+        subi    r4,r4,1
+        stwcx.  r4,0,r3
+        bne     3b
+        isync
+4:      HMT_LOW
+        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor should */
+                                        /* start.                        */
+        cmpwi   0,r23,0
+        beq     4b                      /* Loop until told to go         */
+        sync                            /* order paca.run and cur_cpu_spec */
+        isync                           /* In case code patching happened */
+        /* Create a temp kernel stack for use before relocation is on.  */
        ld      r1,PACAEMERGSP(r13)
        subi    r1,r1,STACK_FRAME_OVERHEAD
        b       __secondary_start
-#endif
+#endif /* SMP */
 /*
 * Turn the MMU off.
@@ -390,12 +398,10 @@ _STATIC(__after_prom_start)
        /* process relocations for the final address of the kernel */
        lis     r25,PAGE_OFFSET@highest /* compute virtual base of kernel */
        sldi    r25,r25,32
-#ifdef CONFIG_CRASH_DUMP
        lwz     r7,__run_at_load-_stext(r26)
-        cmplwi  cr0,r7,1        /* kdump kernel ? - stay where we are */
+        cmplwi  cr0,r7,1        /* flagged to stay where we are ? */
        bne     1f
        add     r25,r25,r26
-#endif
 1:      mr      r3,r25
        bl      .relocate
 #endif
@@ -541,7 +547,14 @@ _GLOBAL(pmac_secondary_start)
        ld      r4,0(r4)                /* Get base vaddr of paca array */
        mulli   r13,r24,PACA_SIZE       /* Calculate vaddr of right paca */
        add     r13,r13,r4              /* for this processor.          */
-        mtspr   SPRN_SPRG_PACA,r13      /* Save vaddr of paca in an SPRG*/
+        SET_PACA(r13)                   /* Save vaddr of paca in an SPRG*/
+        /* Mark interrupts soft and hard disabled (they might be enabled
+         * in the PACA when doing hotplug)
+         */
+        li      r0,0
+        stb     r0,PACASOFTIRQEN(r13)
+        stb     r0,PACAHARDIRQEN(r13)
        /* Create a temp kernel stack for use before relocation is on.  */
        ld      r1,PACAEMERGSP(r13)
@@ -645,7 +658,7 @@ _GLOBAL(enable_64b_mode)
        oris    r11,r11,0x8000          /* CM bit set, we'll set ICM later */
        mtmsr   r11
 #else /* CONFIG_PPC_BOOK3E */
-        li      r12,(MSR_SF | MSR_ISF)@highest
+        li      r12,(MSR_64BIT | MSR_ISF)@highest
        sldi    r12,r12,48
        or      r11,r11,r12
        mtmsrd  r11
diff --git a/arch/powerpc/kernel/head_8xx.S b/arch/powerpc/kernel/head_8xx.S
index 1f1a04b5c2a4..1cbf64e6b416 100644
--- a/arch/powerpc/kernel/head_8xx.S
+++ b/arch/powerpc/kernel/head_8xx.S
@@ -29,6 +29,7 @@
 #include <asm/thread_info.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 /* Macro to make the code more readable. */
 #ifdef CONFIG_8xx_CPU6
diff --git a/arch/powerpc/kernel/head_fsl_booke.S b/arch/powerpc/kernel/head_fsl_booke.S
index 4faeba247854..5ecf54cfa7d4 100644
--- a/arch/powerpc/kernel/head_fsl_booke.S
+++ b/arch/powerpc/kernel/head_fsl_booke.S
@@ -41,6 +41,7 @@
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
 #include <asm/cache.h>
+#include <asm/ptrace.h>
 #include "head_booke.h"
 /* As with the other PowerPC ports, it is expected that when code
@@ -152,8 +153,11 @@ _ENTRY(__early_start)
        /* Check to see if we're the second processor, and jump
         * to the secondary_start code if so
         */
-        mfspr   r24,SPRN_PIR
+        lis     r24, boot_cpuid@h
-        cmpwi   r24,0
+        ori     r24, r24, boot_cpuid@l
+        lwz     r24, 0(r24)
+        cmpwi   r24, -1
+        mfspr   r24,SPRN_PIR
        bne     __secondary_start
 #endif
@@ -175,6 +179,9 @@ _ENTRY(__early_start)
        li      r0,0
        stwu    r0,THREAD_SIZE-STACK_FRAME_OVERHEAD(r1)
+        rlwinm  r22,r1,0,0,31-THREAD_SHIFT      /* current thread_info */
+        stw     r24, TI_CPU(r22)
        bl      early_init
 #ifdef CONFIG_RELOCATABLE
@@ -319,7 +326,7 @@ interrupt_base:
        NORMAL_EXCEPTION_PROLOG
        EXC_XFER_EE_LITE(0x0c00, DoSyscall)
-        /* Auxillary Processor Unavailable Interrupt */
+        /* Auxiliary Processor Unavailable Interrupt */
        EXCEPTION(0x2900, AuxillaryProcessorUnavailable, unknown_exception, EXC_XFER_EE)
        /* Decrementer Interrupt */
diff --git a/arch/powerpc/kernel/ibmebus.c b/arch/powerpc/kernel/ibmebus.c
index 9b626cfffce1..28581f1ad2c0 100644
--- a/arch/powerpc/kernel/ibmebus.c
+++ b/arch/powerpc/kernel/ibmebus.c
@@ -162,13 +162,10 @@ static int ibmebus_create_device(struct device_node *dn)
        dev->dev.bus = &ibmebus_bus_type;
        dev->dev.archdata.dma_ops = &ibmebus_dma_ops;
-        ret = of_device_register(dev);
+        ret = of_device_add(dev);
-        if (ret) {
+        if (ret)
-                of_device_free(dev);
+                platform_device_put(dev);
-                return ret;
+        return ret;
-        }
-        return 0;
 }
 static int ibmebus_create_devices(const struct of_device_id *matches)
@@ -204,13 +201,14 @@ int ibmebus_register_driver(struct of_platform_driver *drv)
        /* If the driver uses devices that ibmebus doesn't know, add them */
        ibmebus_create_devices(drv->driver.of_match_table);
-        return of_register_driver(drv, &ibmebus_bus_type);
+        drv->driver.bus = &ibmebus_bus_type;
+        return driver_register(&drv->driver);
 }
 EXPORT_SYMBOL(ibmebus_register_driver);
 void ibmebus_unregister_driver(struct of_platform_driver *drv)
 {
-        of_unregister_driver(drv);
+        driver_unregister(&drv->driver);
 }
 EXPORT_SYMBOL(ibmebus_unregister_driver);
@@ -311,15 +309,410 @@ static ssize_t ibmebus_store_remove(struct bus_type *bus,
        }
 }
 static struct bus_attribute ibmebus_bus_attrs[] = {
        __ATTR(probe, S_IWUSR, NULL, ibmebus_store_probe),
        __ATTR(remove, S_IWUSR, NULL, ibmebus_store_remove),
        __ATTR_NULL
 };
+static int ibmebus_bus_bus_match(struct device *dev, struct device_driver *drv)
+{
+        const struct of_device_id *matches = drv->of_match_table;
+        if (!matches)
+                return 0;
+        return of_match_device(matches, dev) != NULL;
+}
+static int ibmebus_bus_device_probe(struct device *dev)
+{
+        int error = -ENODEV;
+        struct of_platform_driver *drv;
+        struct platform_device *of_dev;
+        const struct of_device_id *match;
+        drv = to_of_platform_driver(dev->driver);
+        of_dev = to_platform_device(dev);
+        if (!drv->probe)
+                return error;
+        of_dev_get(of_dev);
+        match = of_match_device(drv->driver.of_match_table, dev);
+        if (match)
+                error = drv->probe(of_dev, match);
+        if (error)
+                of_dev_put(of_dev);
+        return error;
+}
+static int ibmebus_bus_device_remove(struct device *dev)
+{
+        struct platform_device *of_dev = to_platform_device(dev);
+        struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
+        if (dev->driver && drv->remove)
+                drv->remove(of_dev);
+        return 0;
+}
+static void ibmebus_bus_device_shutdown(struct device *dev)
+{
+        struct platform_device *of_dev = to_platform_device(dev);
+        struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
+        if (dev->driver && drv->shutdown)
+                drv->shutdown(of_dev);
+}
+/*
+ * ibmebus_bus_device_attrs
+ */
+static ssize_t devspec_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
+{
+        struct platform_device *ofdev;
+        ofdev = to_platform_device(dev);
+        return sprintf(buf, "%s\n", ofdev->dev.of_node->full_name);
+}
+static ssize_t name_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
+{
+        struct platform_device *ofdev;
+        ofdev = to_platform_device(dev);
+        return sprintf(buf, "%s\n", ofdev->dev.of_node->name);
+}
+static ssize_t modalias_show(struct device *dev,
+                                struct device_attribute *attr, char *buf)
+{
+        ssize_t len = of_device_get_modalias(dev, buf, PAGE_SIZE - 2);
+        buf[len] = '\n';
+        buf[len+1] = 0;
+        return len+1;
+}
+struct device_attribute ibmebus_bus_device_attrs[] = {
+        __ATTR_RO(devspec),
+        __ATTR_RO(name),
+        __ATTR_RO(modalias),
+        __ATTR_NULL
+};
+#ifdef CONFIG_PM_SLEEP
+static int ibmebus_bus_legacy_suspend(struct device *dev, pm_message_t mesg)
+{
+        struct platform_device *of_dev = to_platform_device(dev);
+        struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
+        int ret = 0;
+        if (dev->driver && drv->suspend)
+                ret = drv->suspend(of_dev, mesg);
+        return ret;
+}
+static int ibmebus_bus_legacy_resume(struct device *dev)
+{
+        struct platform_device *of_dev = to_platform_device(dev);
+        struct of_platform_driver *drv = to_of_platform_driver(dev->driver);
+        int ret = 0;
+        if (dev->driver && drv->resume)
+                ret = drv->resume(of_dev);
+        return ret;
+}
+static int ibmebus_bus_pm_prepare(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (drv && drv->pm && drv->pm->prepare)
+                ret = drv->pm->prepare(dev);
+        return ret;
+}
+static void ibmebus_bus_pm_complete(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        if (drv && drv->pm && drv->pm->complete)
+                drv->pm->complete(dev);
+}
+#ifdef CONFIG_SUSPEND
+static int ibmebus_bus_pm_suspend(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->suspend)
+                        ret = drv->pm->suspend(dev);
+        } else {
+                ret = ibmebus_bus_legacy_suspend(dev, PMSG_SUSPEND);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_suspend_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->suspend_noirq)
+                        ret = drv->pm->suspend_noirq(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_resume(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->resume)
+                        ret = drv->pm->resume(dev);
+        } else {
+                ret = ibmebus_bus_legacy_resume(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_resume_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->resume_noirq)
+                        ret = drv->pm->resume_noirq(dev);
+        }
+        return ret;
+}
+#else /* !CONFIG_SUSPEND */
+#define ibmebus_bus_pm_suspend          NULL
+#define ibmebus_bus_pm_resume           NULL
+#define ibmebus_bus_pm_suspend_noirq    NULL
+#define ibmebus_bus_pm_resume_noirq     NULL
+#endif /* !CONFIG_SUSPEND */
+#ifdef CONFIG_HIBERNATE_CALLBACKS
+static int ibmebus_bus_pm_freeze(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->freeze)
+                        ret = drv->pm->freeze(dev);
+        } else {
+                ret = ibmebus_bus_legacy_suspend(dev, PMSG_FREEZE);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_freeze_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->freeze_noirq)
+                        ret = drv->pm->freeze_noirq(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_thaw(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->thaw)
+                        ret = drv->pm->thaw(dev);
+        } else {
+                ret = ibmebus_bus_legacy_resume(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_thaw_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->thaw_noirq)
+                        ret = drv->pm->thaw_noirq(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_poweroff(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->poweroff)
+                        ret = drv->pm->poweroff(dev);
+        } else {
+                ret = ibmebus_bus_legacy_suspend(dev, PMSG_HIBERNATE);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_poweroff_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->poweroff_noirq)
+                        ret = drv->pm->poweroff_noirq(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_restore(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->restore)
+                        ret = drv->pm->restore(dev);
+        } else {
+                ret = ibmebus_bus_legacy_resume(dev);
+        }
+        return ret;
+}
+static int ibmebus_bus_pm_restore_noirq(struct device *dev)
+{
+        struct device_driver *drv = dev->driver;
+        int ret = 0;
+        if (!drv)
+                return 0;
+        if (drv->pm) {
+                if (drv->pm->restore_noirq)
+                        ret = drv->pm->restore_noirq(dev);
+        }
+        return ret;
+}
+#else /* !CONFIG_HIBERNATE_CALLBACKS */
+#define ibmebus_bus_pm_freeze           NULL
+#define ibmebus_bus_pm_thaw             NULL
+#define ibmebus_bus_pm_poweroff         NULL
+#define ibmebus_bus_pm_restore          NULL
+#define ibmebus_bus_pm_freeze_noirq     NULL
+#define ibmebus_bus_pm_thaw_noirq               NULL
+#define ibmebus_bus_pm_poweroff_noirq   NULL
+#define ibmebus_bus_pm_restore_noirq    NULL
+#endif /* !CONFIG_HIBERNATE_CALLBACKS */
+static struct dev_pm_ops ibmebus_bus_dev_pm_ops = {
+        .prepare = ibmebus_bus_pm_prepare,
+        .complete = ibmebus_bus_pm_complete,
+        .suspend = ibmebus_bus_pm_suspend,
+        .resume = ibmebus_bus_pm_resume,
+        .freeze = ibmebus_bus_pm_freeze,
+        .thaw = ibmebus_bus_pm_thaw,
+        .poweroff = ibmebus_bus_pm_poweroff,
+        .restore = ibmebus_bus_pm_restore,
+        .suspend_noirq = ibmebus_bus_pm_suspend_noirq,
+        .resume_noirq = ibmebus_bus_pm_resume_noirq,
+        .freeze_noirq = ibmebus_bus_pm_freeze_noirq,
+        .thaw_noirq = ibmebus_bus_pm_thaw_noirq,
+        .poweroff_noirq = ibmebus_bus_pm_poweroff_noirq,
+        .restore_noirq = ibmebus_bus_pm_restore_noirq,
+};
+#define IBMEBUS_BUS_PM_OPS_PTR  (&ibmebus_bus_dev_pm_ops)
+#else /* !CONFIG_PM_SLEEP */
+#define IBMEBUS_BUS_PM_OPS_PTR  NULL
+#endif /* !CONFIG_PM_SLEEP */
 struct bus_type ibmebus_bus_type = {
+        .name      = "ibmebus",
        .uevent    = of_device_uevent,
-        .bus_attrs = ibmebus_bus_attrs
+        .bus_attrs = ibmebus_bus_attrs,
+        .match     = ibmebus_bus_bus_match,
+        .probe     = ibmebus_bus_device_probe,
+        .remove    = ibmebus_bus_device_remove,
+        .shutdown  = ibmebus_bus_device_shutdown,
+        .dev_attrs = ibmebus_bus_device_attrs,
+        .pm        = IBMEBUS_BUS_PM_OPS_PTR,
 };
 EXPORT_SYMBOL(ibmebus_bus_type);
@@ -329,7 +722,7 @@ static int __init ibmebus_bus_init(void)
        printk(KERN_INFO "IBM eBus Device Driver\n");
-        err = of_bus_type_init(&ibmebus_bus_type, "ibmebus");
+        err = bus_register(&ibmebus_bus_type);
        if (err) {
                printk(KERN_ERR "%s: failed to register IBM eBus.\n",
                       __func__);
diff --git a/arch/powerpc/kernel/idle_power4.S b/arch/powerpc/kernel/idle_power4.S
index 5328709eeedc..ba3195478600 100644
--- a/arch/powerpc/kernel/idle_power4.S
+++ b/arch/powerpc/kernel/idle_power4.S
@@ -53,24 +53,3 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        isync
        b       1b
-_GLOBAL(power4_cpu_offline_powersave)
-        /* Go to NAP now */
-        mfmsr   r7
-        rldicl  r0,r7,48,1
-        rotldi  r0,r0,16
-        mtmsrd  r0,1                    /* hard-disable interrupts */
-        li      r0,1
-        li      r6,0
-        stb     r0,PACAHARDIRQEN(r13)   /* we'll hard-enable shortly */
-        stb     r6,PACASOFTIRQEN(r13)   /* soft-disable irqs */
-BEGIN_FTR_SECTION
-        DSSALL
-        sync
-END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
-        ori     r7,r7,MSR_EE
-        oris    r7,r7,MSR_POW@h
-        sync
-        isync
-        mtmsrd  r7
-        isync
-        blr
diff --git a/arch/powerpc/kernel/idle_power7.S b/arch/powerpc/kernel/idle_power7.S
new file mode 100644
index 000000000000..f8f0bc7f1d4f
--- /dev/null
+++ b/arch/powerpc/kernel/idle_power7.S
@@ -0,0 +1,97 @@
+/*
+ *  This file contains the power_save function for 970-family CPUs.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/threads.h>
+#include <asm/processor.h>
+#include <asm/page.h>
+#include <asm/cputable.h>
+#include <asm/thread_info.h>
+#include <asm/ppc_asm.h>
+#include <asm/asm-offsets.h>
+#include <asm/ppc-opcode.h>
+#undef DEBUG
+        .text
+_GLOBAL(power7_idle)
+        /* Now check if user or arch enabled NAP mode */
+        LOAD_REG_ADDRBASE(r3,powersave_nap)
+        lwz     r4,ADDROFF(powersave_nap)(r3)
+        cmpwi   0,r4,0
+        beqlr
+        /* NAP is a state loss, we create a regs frame on the
+         * stack, fill it up with the state we care about and
+         * stick a pointer to it in PACAR1. We really only
+         * need to save PC, some CR bits and the NV GPRs,
+         * but for now an interrupt frame will do.
+         */
+        mflr    r0
+        std     r0,16(r1)
+        stdu    r1,-INT_FRAME_SIZE(r1)
+        std     r0,_LINK(r1)
+        std     r0,_NIP(r1)
+#ifndef CONFIG_SMP
+        /* Make sure FPU, VSX etc... are flushed as we may lose
+         * state when going to nap mode
+         */
+        bl      .discard_lazy_cpu_state
+#endif /* CONFIG_SMP */
+        /* Hard disable interrupts */
+        mfmsr   r9
+        rldicl  r9,r9,48,1
+        rotldi  r9,r9,16
+        mtmsrd  r9,1                    /* hard-disable interrupts */
+        li      r0,0
+        stb     r0,PACASOFTIRQEN(r13)   /* we'll hard-enable shortly */
+        stb     r0,PACAHARDIRQEN(r13)
+        /* Continue saving state */
+        SAVE_GPR(2, r1)
+        SAVE_NVGPRS(r1)
+        mfcr    r3
+        std     r3,_CCR(r1)
+        std     r9,_MSR(r1)
+        std     r1,PACAR1(r13)
+        /* Magic NAP mode enter sequence */
+        std     r0,0(r1)
+        ptesync
+        ld      r0,0(r1)
+1:      cmp     cr0,r0,r0
+        bne     1b
+        PPC_NAP
+        b       .
+_GLOBAL(power7_wakeup_loss)
+        GET_PACA(r13)
+        ld      r1,PACAR1(r13)
+        REST_NVGPRS(r1)
+        REST_GPR(2, r1)
+        ld      r3,_CCR(r1)
+        ld      r4,_MSR(r1)
+        ld      r5,_NIP(r1)
+        addi    r1,r1,INT_FRAME_SIZE
+        mtcr    r3
+        mtspr   SPRN_SRR1,r4
+        mtspr   SPRN_SRR0,r5
+        rfid
+_GLOBAL(power7_wakeup_noloss)
+        GET_PACA(r13)
+        ld      r1,PACAR1(r13)
+        ld      r4,_MSR(r1)
+        ld      r5,_NIP(r1)
+        addi    r1,r1,INT_FRAME_SIZE
+        mtspr   SPRN_SRR1,r4
+        mtspr   SPRN_SRR0,r5
+        rfid
diff --git a/arch/powerpc/platforms/cell/io-workarounds.c b/arch/powerpc/kernel/io-workarounds.c
index 5c1118e31940..ffafaea3d261 100644
--- a/arch/powerpc/platforms/cell/io-workarounds.c
+++ b/arch/powerpc/kernel/io-workarounds.c
@@ -17,8 +17,7 @@
 #include <asm/machdep.h>
 #include <asm/pgtable.h>
 #include <asm/ppc-pci.h>
+#include <asm/io-workarounds.h>
-#include "io-workarounds.h"
 #define IOWA_MAX_BUS    8
@@ -145,7 +144,19 @@ static void __iomem *iowa_ioremap(phys_addr_t addr, unsigned long size,
        return res;
 }
-/* Regist new bus to support workaround */
+/* Enable IO workaround */
+static void __devinit io_workaround_init(void)
+{
+        static int io_workaround_inited;
+        if (io_workaround_inited)
+                return;
+        ppc_pci_io = iowa_pci_io;
+        ppc_md.ioremap = iowa_ioremap;
+        io_workaround_inited = 1;
+}
+/* Register new bus to support workaround */
 void __devinit iowa_register_bus(struct pci_controller *phb,
                        struct ppc_pci_io *ops,
                        int (*initfunc)(struct iowa_bus *, void *), void *data)
@@ -153,6 +164,8 @@ void __devinit iowa_register_bus(struct pci_controller *phb,
        struct iowa_bus *bus;
        struct device_node *np = phb->dn;
+        io_workaround_init();
        if (iowa_bus_count >= IOWA_MAX_BUS) {
                pr_err("IOWA:Too many pci bridges, "
                       "workarounds disabled for %s\n", np->full_name);
@@ -162,6 +175,7 @@ void __devinit iowa_register_bus(struct pci_controller *phb,
        bus = &iowa_busses[iowa_bus_count];
        bus->phb = phb;
        bus->ops = ops;
+        bus->private = data;
        if (initfunc)
                if ((*initfunc)(bus, data))
@@ -172,14 +186,3 @@ void __devinit iowa_register_bus(struct pci_controller *phb,
        pr_debug("IOWA:[%d]Add bus, %s.\n", iowa_bus_count-1, np->full_name);
 }
-/* enable IO workaround */
-void __devinit io_workaround_init(void)
-{
-        static int io_workaround_inited;
-        if (io_workaround_inited)
-                return;
-        ppc_pci_io = iowa_pci_io;
-        ppc_md.ioremap = iowa_ioremap;
-        io_workaround_inited = 1;
-}
diff --git a/arch/powerpc/kernel/iommu.c b/arch/powerpc/kernel/iommu.c
index d5839179ec77..961bb03413f3 100644
--- a/arch/powerpc/kernel/iommu.c
+++ b/arch/powerpc/kernel/iommu.c
@@ -311,8 +311,9 @@ int iommu_map_sg(struct device *dev, struct iommu_table *tbl,
                /* Handle failure */
                if (unlikely(entry == DMA_ERROR_CODE)) {
                        if (printk_ratelimit())
-                                printk(KERN_INFO "iommu_alloc failed, tbl %p vaddr %lx"
+                                dev_info(dev, "iommu_alloc failed, tbl %p "
-                                       " npages %lx\n", tbl, vaddr, npages);
+                                         "vaddr %lx npages %lu\n", tbl, vaddr,
+                                         npages);
                        goto failure;
                }
@@ -579,9 +580,9 @@ dma_addr_t iommu_map_page(struct device *dev, struct iommu_table *tbl,
                                         attrs);
                if (dma_handle == DMA_ERROR_CODE) {
                        if (printk_ratelimit())  {
-                                printk(KERN_INFO "iommu_alloc failed, "
+                                dev_info(dev, "iommu_alloc failed, tbl %p "
-                                                "tbl %p vaddr %p npages %d\n",
+                                         "vaddr %p npages %d\n", tbl, vaddr,
-                                                tbl, vaddr, npages);
+                                         npages);
                        }
                } else
                        dma_handle |= (uaddr & ~IOMMU_PAGE_MASK);
@@ -627,7 +628,8 @@ void *iommu_alloc_coherent(struct device *dev, struct iommu_table *tbl,
         * the tce tables.
         */
        if (order >= IOMAP_MAX_ORDER) {
-                printk("iommu_alloc_consistent size too large: 0x%lx\n", size);
+                dev_info(dev, "iommu_alloc_consistent size too large: 0x%lx\n",
+                         size);
                return NULL;
        }
diff --git a/arch/powerpc/kernel/irq.c b/arch/powerpc/kernel/irq.c
index 4a65386995d7..5b428e308666 100644
--- a/arch/powerpc/kernel/irq.c
+++ b/arch/powerpc/kernel/irq.c
@@ -66,7 +66,6 @@
 #include <asm/ptrace.h>
 #include <asm/machdep.h>
 #include <asm/udbg.h>
-#include <asm/dbell.h>
 #include <asm/smp.h>
 #ifdef CONFIG_PPC64
@@ -116,7 +115,7 @@ static inline notrace void set_soft_enabled(unsigned long enable)
        : : "r" (enable), "i" (offsetof(struct paca_struct, soft_enabled)));
 }
-notrace void raw_local_irq_restore(unsigned long en)
+notrace void arch_local_irq_restore(unsigned long en)
 {
        /*
         * get_paca()->soft_enabled = en;
@@ -160,7 +159,8 @@ notrace void raw_local_irq_restore(unsigned long en)
 #if defined(CONFIG_BOOKE) && defined(CONFIG_SMP)
        /* Check for pending doorbell interrupts and resend to ourself */
-        doorbell_check_self();
+        if (cpu_has_feature(CPU_FTR_DBELL))
+                smp_muxed_ipi_resend();
 #endif
        /*
@@ -192,10 +192,10 @@ notrace void raw_local_irq_restore(unsigned long en)
        __hard_irq_enable();
 }
-EXPORT_SYMBOL(raw_local_irq_restore);
+EXPORT_SYMBOL(arch_local_irq_restore);
 #endif /* CONFIG_PPC64 */
-static int show_other_interrupts(struct seq_file *p, int prec)
+int arch_show_interrupts(struct seq_file *p, int prec)
 {
        int j;
@@ -231,63 +231,6 @@ static int show_other_interrupts(struct seq_file *p, int prec)
        return 0;
 }
-int show_interrupts(struct seq_file *p, void *v)
-{
-        unsigned long flags, any_count = 0;
-        int i = *(loff_t *) v, j, prec;
-        struct irqaction *action;
-        struct irq_desc *desc;
-        if (i > nr_irqs)
-                return 0;
-        for (prec = 3, j = 1000; prec < 10 && j <= nr_irqs; ++prec)
-                j *= 10;
-        if (i == nr_irqs)
-                return show_other_interrupts(p, prec);
-        /* print header */
-        if (i == 0) {
-                seq_printf(p, "%*s", prec + 8, "");
-                for_each_online_cpu(j)
-                        seq_printf(p, "CPU%-8d", j);
-                seq_putc(p, '\n');
-        }
-        desc = irq_to_desc(i);
-        if (!desc)
-                return 0;
-        raw_spin_lock_irqsave(&desc->lock, flags);
-        for_each_online_cpu(j)
-                any_count |= kstat_irqs_cpu(i, j);
-        action = desc->action;
-        if (!action && !any_count)
-                goto out;
-        seq_printf(p, "%*d: ", prec, i);
-        for_each_online_cpu(j)
-                seq_printf(p, "%10u ", kstat_irqs_cpu(i, j));
-        if (desc->chip)
-                seq_printf(p, "  %-16s", desc->chip->name);
-        else
-                seq_printf(p, "  %-16s", "None");
-        seq_printf(p, " %-8s", (desc->status & IRQ_LEVEL) ? "Level" : "Edge");
-        if (action) {
-                seq_printf(p, "     %s", action->name);
-                while ((action = action->next) != NULL)
-                        seq_printf(p, ", %s", action->name);
-        }
-        seq_putc(p, '\n');
-out:
-        raw_spin_unlock_irqrestore(&desc->lock, flags);
-        return 0;
-}
 /*
 * /proc/stat helpers
 */
@@ -303,30 +246,37 @@ u64 arch_irq_stat_cpu(unsigned int cpu)
 }
 #ifdef CONFIG_HOTPLUG_CPU
-void fixup_irqs(const struct cpumask *map)
+void migrate_irqs(void)
 {
        struct irq_desc *desc;
        unsigned int irq;
        static int warned;
        cpumask_var_t mask;
+        const struct cpumask *map = cpu_online_mask;
        alloc_cpumask_var(&mask, GFP_KERNEL);
        for_each_irq(irq) {
+                struct irq_data *data;
+                struct irq_chip *chip;
                desc = irq_to_desc(irq);
                if (!desc)
                        continue;
-                if (desc->status & IRQ_PER_CPU)
+                data = irq_desc_get_irq_data(desc);
+                if (irqd_is_per_cpu(data))
                        continue;
-                cpumask_and(mask, desc->affinity, map);
+                chip = irq_data_get_irq_chip(data);
+                cpumask_and(mask, data->affinity, map);
                if (cpumask_any(mask) >= nr_cpu_ids) {
                        printk("Breaking affinity for irq %i\n", irq);
                        cpumask_copy(mask, map);
                }
-                if (desc->chip->set_affinity)
+                if (chip->irq_set_affinity)
-                        desc->chip->set_affinity(irq, mask);
+                        chip->irq_set_affinity(data, mask, true);
                else if (desc->action && !(warned++))
                        printk("Cannot set affinity for irq %i\n", irq);
        }
@@ -345,17 +295,20 @@ static inline void handle_one_irq(unsigned int irq)
        unsigned long saved_sp_limit;
        struct irq_desc *desc;
+        desc = irq_to_desc(irq);
+        if (!desc)
+                return;
        /* Switch to the irq stack to handle this */
        curtp = current_thread_info();
        irqtp = hardirq_ctx[smp_processor_id()];
        if (curtp == irqtp) {
                /* We're already on the irq stack, just handle it */
-                generic_handle_irq(irq);
+                desc->handle_irq(irq, desc);
                return;
        }
-        desc = irq_to_desc(irq);
        saved_sp_limit = current->thread.ksp_limit;
        irqtp->task = curtp->task;
@@ -447,24 +400,28 @@ struct thread_info *mcheckirq_ctx[NR_CPUS] __read_mostly;
 void exc_lvl_ctx_init(void)
 {
        struct thread_info *tp;
-        int i, hw_cpu;
+        int i, cpu_nr;
        for_each_possible_cpu(i) {
-                hw_cpu = get_hard_smp_processor_id(i);
+#ifdef CONFIG_PPC64
-                memset((void *)critirq_ctx[hw_cpu], 0, THREAD_SIZE);
+                cpu_nr = i;
-                tp = critirq_ctx[hw_cpu];
+#else
-                tp->cpu = i;
+                cpu_nr = get_hard_smp_processor_id(i);
+#endif
+                memset((void *)critirq_ctx[cpu_nr], 0, THREAD_SIZE);
+                tp = critirq_ctx[cpu_nr];
+                tp->cpu = cpu_nr;
                tp->preempt_count = 0;
 #ifdef CONFIG_BOOKE
-                memset((void *)dbgirq_ctx[hw_cpu], 0, THREAD_SIZE);
+                memset((void *)dbgirq_ctx[cpu_nr], 0, THREAD_SIZE);
-                tp = dbgirq_ctx[hw_cpu];
+                tp = dbgirq_ctx[cpu_nr];
-                tp->cpu = i;
+                tp->cpu = cpu_nr;
                tp->preempt_count = 0;
-                memset((void *)mcheckirq_ctx[hw_cpu], 0, THREAD_SIZE);
+                memset((void *)mcheckirq_ctx[cpu_nr], 0, THREAD_SIZE);
-                tp = mcheckirq_ctx[hw_cpu];
+                tp = mcheckirq_ctx[cpu_nr];
-                tp->cpu = i;
+                tp->cpu = cpu_nr;
                tp->preempt_count = HARDIRQ_OFFSET;
 #endif
        }
@@ -527,20 +484,41 @@ void do_softirq(void)
 * IRQ controller and virtual interrupts
 */
+/* The main irq map itself is an array of NR_IRQ entries containing the
+ * associate host and irq number. An entry with a host of NULL is free.
+ * An entry can be allocated if it's free, the allocator always then sets
+ * hwirq first to the host's invalid irq number and then fills ops.
+ */
+struct irq_map_entry {
+        irq_hw_number_t hwirq;
+        struct irq_host *host;
+};
 static LIST_HEAD(irq_hosts);
 static DEFINE_RAW_SPINLOCK(irq_big_lock);
-static unsigned int revmap_trees_allocated;
 static DEFINE_MUTEX(revmap_trees_mutex);
-struct irq_map_entry irq_map[NR_IRQS];
+static struct irq_map_entry irq_map[NR_IRQS];
 static unsigned int irq_virq_count = NR_IRQS;
 static struct irq_host *irq_default_host;
+irq_hw_number_t irqd_to_hwirq(struct irq_data *d)
+{
+        return irq_map[d->irq].hwirq;
+}
+EXPORT_SYMBOL_GPL(irqd_to_hwirq);
 irq_hw_number_t virq_to_hw(unsigned int virq)
 {
        return irq_map[virq].hwirq;
 }
 EXPORT_SYMBOL_GPL(virq_to_hw);
+bool virq_is_host(unsigned int virq, struct irq_host *host)
+{
+        return irq_map[virq].host == host;
+}
+EXPORT_SYMBOL_GPL(virq_is_host);
 static int default_irq_host_match(struct irq_host *h, struct device_node *np)
 {
        return h->of_node != NULL && h->of_node == np;
@@ -561,7 +539,7 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
        /* Allocate structure and revmap table if using linear mapping */
        if (revmap_type == IRQ_HOST_MAP_LINEAR)
                size += revmap_arg * sizeof(unsigned int);
-        host = zalloc_maybe_bootmem(size, GFP_KERNEL);
+        host = kzalloc(size, GFP_KERNEL);
        if (host == NULL)
                return NULL;
@@ -582,13 +560,8 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
        if (revmap_type == IRQ_HOST_MAP_LEGACY) {
                if (irq_map[0].host != NULL) {
                        raw_spin_unlock_irqrestore(&irq_big_lock, flags);
-                        /* If we are early boot, we can't free the structure,
+                        of_node_put(host->of_node);
-                         * too bad...
+                        kfree(host);
-                         * this will be fixed once slab is made available early
-                         * instead of the current cruft
-                         */
-                        if (mem_init_done)
-                                kfree(host);
                        return NULL;
                }
                irq_map[0].host = host;
@@ -609,14 +582,14 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
                        irq_map[i].host = host;
                        smp_wmb();
-                        /* Clear norequest flags */
-                        irq_to_desc(i)->status &= ~IRQ_NOREQUEST;
                        /* Legacy flags are left to default at this point,
                         * one can then use irq_create_mapping() to
                         * explicitly change them
                         */
                        ops->map(host, i, i);
+                        /* Clear norequest flags */
+                        irq_clear_status_flags(i, IRQ_NOREQUEST);
                }
                break;
        case IRQ_HOST_MAP_LINEAR:
@@ -627,6 +600,9 @@ struct irq_host *irq_alloc_host(struct device_node *of_node,
                smp_wmb();
                host->revmap_data.linear.revmap = rmap;
                break;
+        case IRQ_HOST_MAP_TREE:
+                INIT_RADIX_TREE(&host->revmap_data.tree, GFP_KERNEL);
+                break;
        default:
                break;
        }
@@ -676,17 +652,14 @@ void irq_set_virq_count(unsigned int count)
 static int irq_setup_virq(struct irq_host *host, unsigned int virq,
                            irq_hw_number_t hwirq)
 {
-        struct irq_desc *desc;
+        int res;
-        desc = irq_to_desc_alloc_node(virq, 0);
+        res = irq_alloc_desc_at(virq, 0);
-        if (!desc) {
+        if (res != virq) {
                pr_debug("irq: -> allocating desc failed\n");
                goto error;
        }
-        /* Clear IRQ_NOREQUEST flag */
-        desc->status &= ~IRQ_NOREQUEST;
        /* map it */
        smp_wmb();
        irq_map[virq].hwirq = hwirq;
@@ -694,11 +667,15 @@ static int irq_setup_virq(struct irq_host *host, unsigned int virq,
        if (host->ops->map(host, virq, hwirq)) {
                pr_debug("irq: -> mapping failed, freeing\n");
-                goto error;
+                goto errdesc;
        }
+        irq_clear_status_flags(virq, IRQ_NOREQUEST);
        return 0;
+errdesc:
+        irq_free_descs(virq, 1);
 error:
        irq_free_virt(virq, 1);
        return -1;
@@ -746,13 +723,9 @@ unsigned int irq_create_mapping(struct irq_host *host,
        }
        pr_debug("irq: -> using host @%p\n", host);
-        /* Check if mapping already exist, if it does, call
+        /* Check if mapping already exists */
-         * host->ops->map() to update the flags
-         */
        virq = irq_find_mapping(host, hwirq);
        if (virq != NO_IRQ) {
-                if (host->ops->remap)
-                        host->ops->remap(host, virq, hwirq);
                pr_debug("irq: -> existing mapping on virq %d\n", virq);
                return virq;
        }
@@ -818,8 +791,8 @@ unsigned int irq_create_of_mapping(struct device_node *controller,
        /* Set type if specified and different than the current one */
        if (type != IRQ_TYPE_NONE &&
-            type != (irq_to_desc(virq)->status & IRQF_TRIGGER_MASK))
+            type != (irqd_get_trigger_type(irq_get_irq_data(virq))))
-                set_irq_type(virq, type);
+                irq_set_irq_type(virq, type);
        return virq;
 }
 EXPORT_SYMBOL_GPL(irq_create_of_mapping);
@@ -833,16 +806,17 @@ void irq_dispose_mapping(unsigned int virq)
                return;
        host = irq_map[virq].host;
-        WARN_ON (host == NULL);
+        if (WARN_ON(host == NULL))
-        if (host == NULL)
                return;
        /* Never unmap legacy interrupts */
        if (host->revmap_type == IRQ_HOST_MAP_LEGACY)
                return;
+        irq_set_status_flags(virq, IRQ_NOREQUEST);
        /* remove chip and handler */
-        set_irq_chip_and_handler(virq, NULL, NULL);
+        irq_set_chip_and_handler(virq, NULL, NULL);
        /* Make sure it's completed */
        synchronize_irq(virq);
@@ -860,13 +834,6 @@ void irq_dispose_mapping(unsigned int virq)
                        host->revmap_data.linear.revmap[hwirq] = NO_IRQ;
                break;
        case IRQ_HOST_MAP_TREE:
-                /*
-                 * Check if radix tree allocated yet, if not then nothing to
-                 * remove.
-                 */
-                smp_rmb();
-                if (revmap_trees_allocated < 1)
-                        break;
                mutex_lock(&revmap_trees_mutex);
                radix_tree_delete(&host->revmap_data.tree, hwirq);
                mutex_unlock(&revmap_trees_mutex);
@@ -877,9 +844,7 @@ void irq_dispose_mapping(unsigned int virq)
        smp_mb();
        irq_map[virq].hwirq = host->inval_irq;
-        /* Set some flags */
+        irq_free_descs(virq, 1);
-        irq_to_desc(virq)->status |= IRQ_NOREQUEST;
        /* Free it */
        irq_free_virt(virq, 1);
 }
@@ -924,21 +889,17 @@ unsigned int irq_radix_revmap_lookup(struct irq_host *host,
        struct irq_map_entry *ptr;
        unsigned int virq;
-        WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
+        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_TREE))
-        /*
-         * Check if the radix tree exists and has bee initialized.
-         * If not, we fallback to slow mode
-         */
-        if (revmap_trees_allocated < 2)
                return irq_find_mapping(host, hwirq);
-        /* Now try to resolve */
        /*
-         * No rcu_read_lock(ing) needed, the ptr returned can't go under us
+         * The ptr returned references the static global irq_map.
-         * as it's referencing an entry in the static irq_map table.
+         * but freeing an irq can delete nodes along the path to
+         * do the lookup via call_rcu.
         */
+        rcu_read_lock();
        ptr = radix_tree_lookup(&host->revmap_data.tree, hwirq);
+        rcu_read_unlock();
        /*
         * If found in radix tree, then fine.
@@ -956,16 +917,7 @@ unsigned int irq_radix_revmap_lookup(struct irq_host *host,
 void irq_radix_revmap_insert(struct irq_host *host, unsigned int virq,
                             irq_hw_number_t hwirq)
 {
+        if (WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE))
-        WARN_ON(host->revmap_type != IRQ_HOST_MAP_TREE);
-        /*
-         * Check if the radix tree exists yet.
-         * If not, then the irq will be inserted into the tree when it gets
-         * initialized.
-         */
-        smp_rmb();
-        if (revmap_trees_allocated < 1)
                return;
        if (virq != NO_IRQ) {
@@ -981,7 +933,8 @@ unsigned int irq_linear_revmap(struct irq_host *host,
 {
        unsigned int *revmap;
-        WARN_ON(host->revmap_type != IRQ_HOST_MAP_LINEAR);
+        if (WARN_ON_ONCE(host->revmap_type != IRQ_HOST_MAP_LINEAR))
+                return irq_find_mapping(host, hwirq);
        /* Check revmap bounds */
        if (unlikely(hwirq >= host->revmap_data.linear.size))
@@ -1054,14 +1007,23 @@ void irq_free_virt(unsigned int virq, unsigned int count)
        WARN_ON (virq < NUM_ISA_INTERRUPTS);
        WARN_ON (count == 0 || (virq + count) > irq_virq_count);
+        if (virq < NUM_ISA_INTERRUPTS) {
+                if (virq + count < NUM_ISA_INTERRUPTS)
+                        return;
+                count  =- NUM_ISA_INTERRUPTS - virq;
+                virq = NUM_ISA_INTERRUPTS;
+        }
+        if (count > irq_virq_count || virq > irq_virq_count - count) {
+                if (virq > irq_virq_count)
+                        return;
+                count = irq_virq_count - virq;
+        }
        raw_spin_lock_irqsave(&irq_big_lock, flags);
        for (i = virq; i < (virq + count); i++) {
                struct irq_host *host;
-                if (i < NUM_ISA_INTERRUPTS ||
-                    (virq + count) > irq_virq_count)
-                        continue;
                host = irq_map[i].host;
                irq_map[i].hwirq = host->inval_irq;
                smp_wmb();
@@ -1072,82 +1034,21 @@ void irq_free_virt(unsigned int virq, unsigned int count)
 int arch_early_irq_init(void)
 {
-        struct irq_desc *desc;
-        int i;
-        for (i = 0; i < NR_IRQS; i++) {
-                desc = irq_to_desc(i);
-                if (desc)
-                        desc->status |= IRQ_NOREQUEST;
-        }
-        return 0;
-}
-int arch_init_chip_data(struct irq_desc *desc, int node)
-{
-        desc->status |= IRQ_NOREQUEST;
        return 0;
 }
-/* We need to create the radix trees late */
-static int irq_late_init(void)
-{
-        struct irq_host *h;
-        unsigned int i;
-        /*
-         * No mutual exclusion with respect to accessors of the tree is needed
-         * here as the synchronization is done via the state variable
-         * revmap_trees_allocated.
-         */
-        list_for_each_entry(h, &irq_hosts, link) {
-                if (h->revmap_type == IRQ_HOST_MAP_TREE)
-                        INIT_RADIX_TREE(&h->revmap_data.tree, GFP_KERNEL);
-        }
-        /*
-         * Make sure the radix trees inits are visible before setting
-         * the flag
-         */
-        smp_wmb();
-        revmap_trees_allocated = 1;
-        /*
-         * Insert the reverse mapping for those interrupts already present
-         * in irq_map[].
-         */
-        mutex_lock(&revmap_trees_mutex);
-        for (i = 0; i < irq_virq_count; i++) {
-                if (irq_map[i].host &&
-                    (irq_map[i].host->revmap_type == IRQ_HOST_MAP_TREE))
-                        radix_tree_insert(&irq_map[i].host->revmap_data.tree,
-                                          irq_map[i].hwirq, &irq_map[i]);
-        }
-        mutex_unlock(&revmap_trees_mutex);
-        /*
-         * Make sure the radix trees insertions are visible before setting
-         * the flag
-         */
-        smp_wmb();
-        revmap_trees_allocated = 2;
-        return 0;
-}
-arch_initcall(irq_late_init);
 #ifdef CONFIG_VIRQ_DEBUG
 static int virq_debug_show(struct seq_file *m, void *private)
 {
        unsigned long flags;
        struct irq_desc *desc;
        const char *p;
-        char none[] = "none";
+        static const char none[] = "none";
+        void *data;
        int i;
-        seq_printf(m, "%-5s  %-7s  %-15s  %s\n", "virq", "hwirq",
+        seq_printf(m, "%-5s  %-7s  %-15s  %-18s  %s\n", "virq", "hwirq",
-                      "chip name", "host name");
+                      "chip name", "chip data", "host name");
        for (i = 1; i < nr_irqs; i++) {
                desc = irq_to_desc(i);
@@ -1157,15 +1058,21 @@ static int virq_debug_show(struct seq_file *m, void *private)
                raw_spin_lock_irqsave(&desc->lock, flags);
                if (desc->action && desc->action->handler) {
+                        struct irq_chip *chip;
                        seq_printf(m, "%5d  ", i);
-                        seq_printf(m, "0x%05lx  ", virq_to_hw(i));
+                        seq_printf(m, "0x%05lx  ", irq_map[i].hwirq);
-                        if (desc->chip && desc->chip->name)
+                        chip = irq_desc_get_chip(desc);
-                                p = desc->chip->name;
+                        if (chip && chip->name)
+                                p = chip->name;
                        else
                                p = none;
                        seq_printf(m, "%-15s  ", p);
+                        data = irq_desc_get_chip_data(desc);
+                        seq_printf(m, "0x%16p  ", data);
                        if (irq_map[i].host && irq_map[i].host->of_node)
                                p = irq_map[i].host->of_node->full_name;
                        else
diff --git a/arch/powerpc/kernel/kgdb.c b/arch/powerpc/kernel/kgdb.c
index 7f61a3ac787c..76a6e40a6f7c 100644
--- a/arch/powerpc/kernel/kgdb.c
+++ b/arch/powerpc/kernel/kgdb.c
@@ -109,7 +109,7 @@ static int kgdb_call_nmi_hook(struct pt_regs *regs)
 #ifdef CONFIG_SMP
 void kgdb_roundup_cpus(unsigned long flags)
 {
-        smp_send_debugger_break(MSG_ALL_BUT_SELF);
+        smp_send_debugger_break();
 }
 #endif
@@ -142,7 +142,7 @@ static int kgdb_singlestep(struct pt_regs *regs)
                return 0;
        /*
-         * On Book E and perhaps other processsors, singlestep is handled on
+         * On Book E and perhaps other processors, singlestep is handled on
         * the critical exception stack.  This causes current_thread_info()
         * to fail, since it it locates the thread_info by masking off
         * the low bits of the current stack pointer.  We work around
@@ -194,40 +194,6 @@ static int kgdb_dabr_match(struct pt_regs *regs)
        ptr = (unsigned long *)ptr32; \
        } while (0)
-void pt_regs_to_gdb_regs(unsigned long *gdb_regs, struct pt_regs *regs)
-{
-        unsigned long *ptr = gdb_regs;
-        int reg;
-        memset(gdb_regs, 0, NUMREGBYTES);
-        for (reg = 0; reg < 32; reg++)
-                PACK64(ptr, regs->gpr[reg]);
-#ifdef CONFIG_FSL_BOOKE
-#ifdef CONFIG_SPE
-        for (reg = 0; reg < 32; reg++)
-                PACK64(ptr, current->thread.evr[reg]);
-#else
-        ptr += 32;
-#endif
-#else
-        /* fp registers not used by kernel, leave zero */
-        ptr += 32 * 8 / sizeof(long);
-#endif
-        PACK64(ptr, regs->nip);
-        PACK64(ptr, regs->msr);
-        PACK32(ptr, regs->ccr);
-        PACK64(ptr, regs->link);
-        PACK64(ptr, regs->ctr);
-        PACK32(ptr, regs->xer);
-        BUG_ON((unsigned long)ptr >
-               (unsigned long)(((void *)gdb_regs) + NUMREGBYTES));
-}
 void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
 {
        struct pt_regs *regs = (struct pt_regs *)(p->thread.ksp +
@@ -271,44 +237,140 @@ void sleeping_thread_to_gdb_regs(unsigned long *gdb_regs, struct task_struct *p)
               (unsigned long)(((void *)gdb_regs) + NUMREGBYTES));
 }
-#define UNPACK64(dest, ptr) do { dest = *(ptr++); } while (0)
+#define GDB_SIZEOF_REG sizeof(unsigned long)
+#define GDB_SIZEOF_REG_U32 sizeof(u32)
-#define UNPACK32(dest, ptr) do {       \
+#ifdef CONFIG_FSL_BOOKE
-        u32 *ptr32;                   \
+#define GDB_SIZEOF_FLOAT_REG sizeof(unsigned long)
-        ptr32 = (u32 *)ptr;           \
+#else
-        dest = *(ptr32++);            \
+#define GDB_SIZEOF_FLOAT_REG sizeof(u64)
-        ptr = (unsigned long *)ptr32; \
+#endif
-        } while (0)
-void gdb_regs_to_pt_regs(unsigned long *gdb_regs, struct pt_regs *regs)
+struct dbg_reg_def_t dbg_reg_def[DBG_MAX_REG_NUM] =
 {
-        unsigned long *ptr = gdb_regs;
+        { "r0", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[0]) },
-        int reg;
+        { "r1", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[1]) },
+        { "r2", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[2]) },
-        for (reg = 0; reg < 32; reg++)
+        { "r3", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[3]) },
-                UNPACK64(regs->gpr[reg], ptr);
+        { "r4", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[4]) },
+        { "r5", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[5]) },
+        { "r6", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[6]) },
+        { "r7", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[7]) },
+        { "r8", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[8]) },
+        { "r9", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[9]) },
+        { "r10", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[10]) },
+        { "r11", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[11]) },
+        { "r12", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[12]) },
+        { "r13", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[13]) },
+        { "r14", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[14]) },
+        { "r15", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[15]) },
+        { "r16", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[16]) },
+        { "r17", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[17]) },
+        { "r18", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[18]) },
+        { "r19", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[19]) },
+        { "r20", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[20]) },
+        { "r21", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[21]) },
+        { "r22", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[22]) },
+        { "r23", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[23]) },
+        { "r24", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[24]) },
+        { "r25", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[25]) },
+        { "r26", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[26]) },
+        { "r27", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[27]) },
+        { "r28", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[28]) },
+        { "r29", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[29]) },
+        { "r30", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[30]) },
+        { "r31", GDB_SIZEOF_REG, offsetof(struct pt_regs, gpr[31]) },
+        { "f0", GDB_SIZEOF_FLOAT_REG, 0 },
+        { "f1", GDB_SIZEOF_FLOAT_REG, 1 },
+        { "f2", GDB_SIZEOF_FLOAT_REG, 2 },
+        { "f3", GDB_SIZEOF_FLOAT_REG, 3 },
+        { "f4", GDB_SIZEOF_FLOAT_REG, 4 },
+        { "f5", GDB_SIZEOF_FLOAT_REG, 5 },
+        { "f6", GDB_SIZEOF_FLOAT_REG, 6 },
+        { "f7", GDB_SIZEOF_FLOAT_REG, 7 },
+        { "f8", GDB_SIZEOF_FLOAT_REG, 8 },
+        { "f9", GDB_SIZEOF_FLOAT_REG, 9 },
+        { "f10", GDB_SIZEOF_FLOAT_REG, 10 },
+        { "f11", GDB_SIZEOF_FLOAT_REG, 11 },
+        { "f12", GDB_SIZEOF_FLOAT_REG, 12 },
+        { "f13", GDB_SIZEOF_FLOAT_REG, 13 },
+        { "f14", GDB_SIZEOF_FLOAT_REG, 14 },
+        { "f15", GDB_SIZEOF_FLOAT_REG, 15 },
+        { "f16", GDB_SIZEOF_FLOAT_REG, 16 },
+        { "f17", GDB_SIZEOF_FLOAT_REG, 17 },
+        { "f18", GDB_SIZEOF_FLOAT_REG, 18 },
+        { "f19", GDB_SIZEOF_FLOAT_REG, 19 },
+        { "f20", GDB_SIZEOF_FLOAT_REG, 20 },
+        { "f21", GDB_SIZEOF_FLOAT_REG, 21 },
+        { "f22", GDB_SIZEOF_FLOAT_REG, 22 },
+        { "f23", GDB_SIZEOF_FLOAT_REG, 23 },
+        { "f24", GDB_SIZEOF_FLOAT_REG, 24 },
+        { "f25", GDB_SIZEOF_FLOAT_REG, 25 },
+        { "f26", GDB_SIZEOF_FLOAT_REG, 26 },
+        { "f27", GDB_SIZEOF_FLOAT_REG, 27 },
+        { "f28", GDB_SIZEOF_FLOAT_REG, 28 },
+        { "f29", GDB_SIZEOF_FLOAT_REG, 29 },
+        { "f30", GDB_SIZEOF_FLOAT_REG, 30 },
+        { "f31", GDB_SIZEOF_FLOAT_REG, 31 },
+        { "pc", GDB_SIZEOF_REG, offsetof(struct pt_regs, nip) },
+        { "msr", GDB_SIZEOF_REG, offsetof(struct pt_regs, msr) },
+        { "cr", GDB_SIZEOF_REG_U32, offsetof(struct pt_regs, ccr) },
+        { "lr", GDB_SIZEOF_REG, offsetof(struct pt_regs, link) },
+        { "ctr", GDB_SIZEOF_REG_U32, offsetof(struct pt_regs, ctr) },
+        { "xer", GDB_SIZEOF_REG, offsetof(struct pt_regs, xer) },
+};
-#ifdef CONFIG_FSL_BOOKE
+char *dbg_get_reg(int regno, void *mem, struct pt_regs *regs)
-#ifdef CONFIG_SPE
+{
-        for (reg = 0; reg < 32; reg++)
+        if (regno >= DBG_MAX_REG_NUM || regno < 0)
-                UNPACK64(current->thread.evr[reg], ptr);
+                return NULL;
+        if (regno < 32 || regno >= 64)
+                /* First 0 -> 31 gpr registers*/
+                /* pc, msr, ls... registers 64 -> 69 */
+                memcpy(mem, (void *)regs + dbg_reg_def[regno].offset,
+                                dbg_reg_def[regno].size);
+        if (regno >= 32 && regno < 64) {
+                /* FP registers 32 -> 63 */
+#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_SPE)
+                if (current)
+                        memcpy(mem, &current->thread.evr[regno-32],
+                                        dbg_reg_def[regno].size);
 #else
-        ptr += 32;
+                /* fp registers not used by kernel, leave zero */
+                memset(mem, 0, dbg_reg_def[regno].size);
 #endif
+        }
+        return dbg_reg_def[regno].name;
+}
+int dbg_set_reg(int regno, void *mem, struct pt_regs *regs)
+{
+        if (regno >= DBG_MAX_REG_NUM || regno < 0)
+                return -EINVAL;
+        if (regno < 32 || regno >= 64)
+                /* First 0 -> 31 gpr registers*/
+                /* pc, msr, ls... registers 64 -> 69 */
+                memcpy((void *)regs + dbg_reg_def[regno].offset, mem,
+                                dbg_reg_def[regno].size);
+        if (regno >= 32 && regno < 64) {
+                /* FP registers 32 -> 63 */
+#if defined(CONFIG_FSL_BOOKE) && defined(CONFIG_SPE)
+                memcpy(&current->thread.evr[regno-32], mem,
+                                dbg_reg_def[regno].size);
 #else
-        /* fp registers not used by kernel, leave zero */
+                /* fp registers not used by kernel, leave zero */
-        ptr += 32 * 8 / sizeof(int);
+                return 0;
 #endif
+        }
-        UNPACK64(regs->nip, ptr);
+        return 0;
-        UNPACK64(regs->msr, ptr);
-        UNPACK32(regs->ccr, ptr);
-        UNPACK64(regs->link, ptr);
-        UNPACK64(regs->ctr, ptr);
-        UNPACK32(regs->xer, ptr);
-        BUG_ON((unsigned long)ptr >
-               (unsigned long)(((void *)gdb_regs) + NUMREGBYTES));
 }
 void kgdb_arch_set_pc(struct pt_regs *regs, unsigned long pc)
diff --git a/arch/powerpc/kernel/kvm.c b/arch/powerpc/kernel/kvm.c
new file mode 100644
index 000000000000..b06bdae04064
--- /dev/null
+++ b/arch/powerpc/kernel/kvm.c
@@ -0,0 +1,596 @@
+/*
+ * Copyright (C) 2010 SUSE Linux Products GmbH. All rights reserved.
+ *
+ * Authors:
+ *     Alexander Graf <agraf@suse.de>
+ *
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ */
+#include <linux/kvm_host.h>
+#include <linux/init.h>
+#include <linux/kvm_para.h>
+#include <linux/slab.h>
+#include <linux/of.h>
+#include <asm/reg.h>
+#include <asm/sections.h>
+#include <asm/cacheflush.h>
+#include <asm/disassemble.h>
+#define KVM_MAGIC_PAGE          (-4096L)
+#define magic_var(x) KVM_MAGIC_PAGE + offsetof(struct kvm_vcpu_arch_shared, x)
+#define KVM_INST_LWZ            0x80000000
+#define KVM_INST_STW            0x90000000
+#define KVM_INST_LD             0xe8000000
+#define KVM_INST_STD            0xf8000000
+#define KVM_INST_NOP            0x60000000
+#define KVM_INST_B              0x48000000
+#define KVM_INST_B_MASK         0x03ffffff
+#define KVM_INST_B_MAX          0x01ffffff
+#define KVM_MASK_RT             0x03e00000
+#define KVM_RT_30               0x03c00000
+#define KVM_MASK_RB             0x0000f800
+#define KVM_INST_MFMSR          0x7c0000a6
+#define KVM_INST_MFSPR_SPRG0    0x7c1042a6
+#define KVM_INST_MFSPR_SPRG1    0x7c1142a6
+#define KVM_INST_MFSPR_SPRG2    0x7c1242a6
+#define KVM_INST_MFSPR_SPRG3    0x7c1342a6
+#define KVM_INST_MFSPR_SRR0     0x7c1a02a6
+#define KVM_INST_MFSPR_SRR1     0x7c1b02a6
+#define KVM_INST_MFSPR_DAR      0x7c1302a6
+#define KVM_INST_MFSPR_DSISR    0x7c1202a6
+#define KVM_INST_MTSPR_SPRG0    0x7c1043a6
+#define KVM_INST_MTSPR_SPRG1    0x7c1143a6
+#define KVM_INST_MTSPR_SPRG2    0x7c1243a6
+#define KVM_INST_MTSPR_SPRG3    0x7c1343a6
+#define KVM_INST_MTSPR_SRR0     0x7c1a03a6
+#define KVM_INST_MTSPR_SRR1     0x7c1b03a6
+#define KVM_INST_MTSPR_DAR      0x7c1303a6
+#define KVM_INST_MTSPR_DSISR    0x7c1203a6
+#define KVM_INST_TLBSYNC        0x7c00046c
+#define KVM_INST_MTMSRD_L0      0x7c000164
+#define KVM_INST_MTMSRD_L1      0x7c010164
+#define KVM_INST_MTMSR          0x7c000124
+#define KVM_INST_WRTEEI_0       0x7c000146
+#define KVM_INST_WRTEEI_1       0x7c008146
+#define KVM_INST_MTSRIN         0x7c0001e4
+static bool kvm_patching_worked = true;
+static char kvm_tmp[1024 * 1024];
+static int kvm_tmp_index;
+static inline void kvm_patch_ins(u32 *inst, u32 new_inst)
+{
+        *inst = new_inst;
+        flush_icache_range((ulong)inst, (ulong)inst + 4);
+}
+static void kvm_patch_ins_ll(u32 *inst, long addr, u32 rt)
+{
+#ifdef CONFIG_64BIT
+        kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc));
+#else
+        kvm_patch_ins(inst, KVM_INST_LWZ | rt | (addr & 0x0000fffc));
+#endif
+}
+static void kvm_patch_ins_ld(u32 *inst, long addr, u32 rt)
+{
+#ifdef CONFIG_64BIT
+        kvm_patch_ins(inst, KVM_INST_LD | rt | (addr & 0x0000fffc));
+#else
+        kvm_patch_ins(inst, KVM_INST_LWZ | rt | ((addr + 4) & 0x0000fffc));
+#endif
+}
+static void kvm_patch_ins_lwz(u32 *inst, long addr, u32 rt)
+{
+        kvm_patch_ins(inst, KVM_INST_LWZ | rt | (addr & 0x0000ffff));
+}
+static void kvm_patch_ins_std(u32 *inst, long addr, u32 rt)
+{
+#ifdef CONFIG_64BIT
+        kvm_patch_ins(inst, KVM_INST_STD | rt | (addr & 0x0000fffc));
+#else
+        kvm_patch_ins(inst, KVM_INST_STW | rt | ((addr + 4) & 0x0000fffc));
+#endif
+}
+static void kvm_patch_ins_stw(u32 *inst, long addr, u32 rt)
+{
+        kvm_patch_ins(inst, KVM_INST_STW | rt | (addr & 0x0000fffc));
+}
+static void kvm_patch_ins_nop(u32 *inst)
+{
+        kvm_patch_ins(inst, KVM_INST_NOP);
+}
+static void kvm_patch_ins_b(u32 *inst, int addr)
+{
+#if defined(CONFIG_RELOCATABLE) && defined(CONFIG_PPC_BOOK3S)
+        /* On relocatable kernels interrupts handlers and our code
+           can be in different regions, so we don't patch them */
+        extern u32 __end_interrupts;
+        if ((ulong)inst < (ulong)&__end_interrupts)
+                return;
+#endif
+        kvm_patch_ins(inst, KVM_INST_B | (addr & KVM_INST_B_MASK));
+}
+static u32 *kvm_alloc(int len)
+{
+        u32 *p;
+        if ((kvm_tmp_index + len) > ARRAY_SIZE(kvm_tmp)) {
+                printk(KERN_ERR "KVM: No more space (%d + %d)\n",
+                                kvm_tmp_index, len);
+                kvm_patching_worked = false;
+                return NULL;
+        }
+        p = (void*)&kvm_tmp[kvm_tmp_index];
+        kvm_tmp_index += len;
+        return p;
+}
+extern u32 kvm_emulate_mtmsrd_branch_offs;
+extern u32 kvm_emulate_mtmsrd_reg_offs;
+extern u32 kvm_emulate_mtmsrd_orig_ins_offs;
+extern u32 kvm_emulate_mtmsrd_len;
+extern u32 kvm_emulate_mtmsrd[];
+static void kvm_patch_ins_mtmsrd(u32 *inst, u32 rt)
+{
+        u32 *p;
+        int distance_start;
+        int distance_end;
+        ulong next_inst;
+        p = kvm_alloc(kvm_emulate_mtmsrd_len * 4);
+        if (!p)
+                return;
+        /* Find out where we are and put everything there */
+        distance_start = (ulong)p - (ulong)inst;
+        next_inst = ((ulong)inst + 4);
+        distance_end = next_inst - (ulong)&p[kvm_emulate_mtmsrd_branch_offs];
+        /* Make sure we only write valid b instructions */
+        if (distance_start > KVM_INST_B_MAX) {
+                kvm_patching_worked = false;
+                return;
+        }
+        /* Modify the chunk to fit the invocation */
+        memcpy(p, kvm_emulate_mtmsrd, kvm_emulate_mtmsrd_len * 4);
+        p[kvm_emulate_mtmsrd_branch_offs] |= distance_end & KVM_INST_B_MASK;
+        switch (get_rt(rt)) {
+        case 30:
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
+                                 magic_var(scratch2), KVM_RT_30);
+                break;
+        case 31:
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsrd_reg_offs],
+                                 magic_var(scratch1), KVM_RT_30);
+                break;
+        default:
+                p[kvm_emulate_mtmsrd_reg_offs] |= rt;
+                break;
+        }
+        p[kvm_emulate_mtmsrd_orig_ins_offs] = *inst;
+        flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsrd_len * 4);
+        /* Patch the invocation */
+        kvm_patch_ins_b(inst, distance_start);
+}
+extern u32 kvm_emulate_mtmsr_branch_offs;
+extern u32 kvm_emulate_mtmsr_reg1_offs;
+extern u32 kvm_emulate_mtmsr_reg2_offs;
+extern u32 kvm_emulate_mtmsr_orig_ins_offs;
+extern u32 kvm_emulate_mtmsr_len;
+extern u32 kvm_emulate_mtmsr[];
+static void kvm_patch_ins_mtmsr(u32 *inst, u32 rt)
+{
+        u32 *p;
+        int distance_start;
+        int distance_end;
+        ulong next_inst;
+        p = kvm_alloc(kvm_emulate_mtmsr_len * 4);
+        if (!p)
+                return;
+        /* Find out where we are and put everything there */
+        distance_start = (ulong)p - (ulong)inst;
+        next_inst = ((ulong)inst + 4);
+        distance_end = next_inst - (ulong)&p[kvm_emulate_mtmsr_branch_offs];
+        /* Make sure we only write valid b instructions */
+        if (distance_start > KVM_INST_B_MAX) {
+                kvm_patching_worked = false;
+                return;
+        }
+        /* Modify the chunk to fit the invocation */
+        memcpy(p, kvm_emulate_mtmsr, kvm_emulate_mtmsr_len * 4);
+        p[kvm_emulate_mtmsr_branch_offs] |= distance_end & KVM_INST_B_MASK;
+        /* Make clobbered registers work too */
+        switch (get_rt(rt)) {
+        case 30:
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg1_offs],
+                                 magic_var(scratch2), KVM_RT_30);
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg2_offs],
+                                 magic_var(scratch2), KVM_RT_30);
+                break;
+        case 31:
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg1_offs],
+                                 magic_var(scratch1), KVM_RT_30);
+                kvm_patch_ins_ll(&p[kvm_emulate_mtmsr_reg2_offs],
+                                 magic_var(scratch1), KVM_RT_30);
+                break;
+        default:
+                p[kvm_emulate_mtmsr_reg1_offs] |= rt;
+                p[kvm_emulate_mtmsr_reg2_offs] |= rt;
+                break;
+        }
+        p[kvm_emulate_mtmsr_orig_ins_offs] = *inst;
+        flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtmsr_len * 4);
+        /* Patch the invocation */
+        kvm_patch_ins_b(inst, distance_start);
+}
+#ifdef CONFIG_BOOKE
+extern u32 kvm_emulate_wrteei_branch_offs;
+extern u32 kvm_emulate_wrteei_ee_offs;
+extern u32 kvm_emulate_wrteei_len;
+extern u32 kvm_emulate_wrteei[];
+static void kvm_patch_ins_wrteei(u32 *inst)
+{
+        u32 *p;
+        int distance_start;
+        int distance_end;
+        ulong next_inst;
+        p = kvm_alloc(kvm_emulate_wrteei_len * 4);
+        if (!p)
+                return;
+        /* Find out where we are and put everything there */
+        distance_start = (ulong)p - (ulong)inst;
+        next_inst = ((ulong)inst + 4);
+        distance_end = next_inst - (ulong)&p[kvm_emulate_wrteei_branch_offs];
+        /* Make sure we only write valid b instructions */
+        if (distance_start > KVM_INST_B_MAX) {
+                kvm_patching_worked = false;
+                return;
+        }
+        /* Modify the chunk to fit the invocation */
+        memcpy(p, kvm_emulate_wrteei, kvm_emulate_wrteei_len * 4);
+        p[kvm_emulate_wrteei_branch_offs] |= distance_end & KVM_INST_B_MASK;
+        p[kvm_emulate_wrteei_ee_offs] |= (*inst & MSR_EE);
+        flush_icache_range((ulong)p, (ulong)p + kvm_emulate_wrteei_len * 4);
+        /* Patch the invocation */
+        kvm_patch_ins_b(inst, distance_start);
+}
+#endif
+#ifdef CONFIG_PPC_BOOK3S_32
+extern u32 kvm_emulate_mtsrin_branch_offs;
+extern u32 kvm_emulate_mtsrin_reg1_offs;
+extern u32 kvm_emulate_mtsrin_reg2_offs;
+extern u32 kvm_emulate_mtsrin_orig_ins_offs;
+extern u32 kvm_emulate_mtsrin_len;
+extern u32 kvm_emulate_mtsrin[];
+static void kvm_patch_ins_mtsrin(u32 *inst, u32 rt, u32 rb)
+{
+        u32 *p;
+        int distance_start;
+        int distance_end;
+        ulong next_inst;
+        p = kvm_alloc(kvm_emulate_mtsrin_len * 4);
+        if (!p)
+                return;
+        /* Find out where we are and put everything there */
+        distance_start = (ulong)p - (ulong)inst;
+        next_inst = ((ulong)inst + 4);
+        distance_end = next_inst - (ulong)&p[kvm_emulate_mtsrin_branch_offs];
+        /* Make sure we only write valid b instructions */
+        if (distance_start > KVM_INST_B_MAX) {
+                kvm_patching_worked = false;
+                return;
+        }
+        /* Modify the chunk to fit the invocation */
+        memcpy(p, kvm_emulate_mtsrin, kvm_emulate_mtsrin_len * 4);
+        p[kvm_emulate_mtsrin_branch_offs] |= distance_end & KVM_INST_B_MASK;
+        p[kvm_emulate_mtsrin_reg1_offs] |= (rb << 10);
+        p[kvm_emulate_mtsrin_reg2_offs] |= rt;
+        p[kvm_emulate_mtsrin_orig_ins_offs] = *inst;
+        flush_icache_range((ulong)p, (ulong)p + kvm_emulate_mtsrin_len * 4);
+        /* Patch the invocation */
+        kvm_patch_ins_b(inst, distance_start);
+}
+#endif
+static void kvm_map_magic_page(void *data)
+{
+        u32 *features = data;
+        ulong in[8];
+        ulong out[8];
+        in[0] = KVM_MAGIC_PAGE;
+        in[1] = KVM_MAGIC_PAGE;
+        kvm_hypercall(in, out, HC_VENDOR_KVM | KVM_HC_PPC_MAP_MAGIC_PAGE);
+        *features = out[0];
+}
+static void kvm_check_ins(u32 *inst, u32 features)
+{
+        u32 _inst = *inst;
+        u32 inst_no_rt = _inst & ~KVM_MASK_RT;
+        u32 inst_rt = _inst & KVM_MASK_RT;
+        switch (inst_no_rt) {
+        /* Loads */
+        case KVM_INST_MFMSR:
+                kvm_patch_ins_ld(inst, magic_var(msr), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SPRG0:
+                kvm_patch_ins_ld(inst, magic_var(sprg0), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SPRG1:
+                kvm_patch_ins_ld(inst, magic_var(sprg1), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SPRG2:
+                kvm_patch_ins_ld(inst, magic_var(sprg2), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SPRG3:
+                kvm_patch_ins_ld(inst, magic_var(sprg3), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SRR0:
+                kvm_patch_ins_ld(inst, magic_var(srr0), inst_rt);
+                break;
+        case KVM_INST_MFSPR_SRR1:
+                kvm_patch_ins_ld(inst, magic_var(srr1), inst_rt);
+                break;
+        case KVM_INST_MFSPR_DAR:
+                kvm_patch_ins_ld(inst, magic_var(dar), inst_rt);
+                break;
+        case KVM_INST_MFSPR_DSISR:
+                kvm_patch_ins_lwz(inst, magic_var(dsisr), inst_rt);
+                break;
+        /* Stores */
+        case KVM_INST_MTSPR_SPRG0:
+                kvm_patch_ins_std(inst, magic_var(sprg0), inst_rt);
+                break;
+        case KVM_INST_MTSPR_SPRG1:
+                kvm_patch_ins_std(inst, magic_var(sprg1), inst_rt);
+                break;
+        case KVM_INST_MTSPR_SPRG2:
+                kvm_patch_ins_std(inst, magic_var(sprg2), inst_rt);
+                break;
+        case KVM_INST_MTSPR_SPRG3:
+                kvm_patch_ins_std(inst, magic_var(sprg3), inst_rt);
+                break;
+        case KVM_INST_MTSPR_SRR0:
+                kvm_patch_ins_std(inst, magic_var(srr0), inst_rt);
+                break;
+        case KVM_INST_MTSPR_SRR1:
+                kvm_patch_ins_std(inst, magic_var(srr1), inst_rt);
+                break;
+        case KVM_INST_MTSPR_DAR:
+                kvm_patch_ins_std(inst, magic_var(dar), inst_rt);
+                break;
+        case KVM_INST_MTSPR_DSISR:
+                kvm_patch_ins_stw(inst, magic_var(dsisr), inst_rt);
+                break;
+        /* Nops */
+        case KVM_INST_TLBSYNC:
+                kvm_patch_ins_nop(inst);
+                break;
+        /* Rewrites */
+        case KVM_INST_MTMSRD_L1:
+                kvm_patch_ins_mtmsrd(inst, inst_rt);
+                break;
+        case KVM_INST_MTMSR:
+        case KVM_INST_MTMSRD_L0:
+                kvm_patch_ins_mtmsr(inst, inst_rt);
+                break;
+        }
+        switch (inst_no_rt & ~KVM_MASK_RB) {
+#ifdef CONFIG_PPC_BOOK3S_32
+        case KVM_INST_MTSRIN:
+                if (features & KVM_MAGIC_FEAT_SR) {
+                        u32 inst_rb = _inst & KVM_MASK_RB;
+                        kvm_patch_ins_mtsrin(inst, inst_rt, inst_rb);
+                }
+                break;
+                break;
+#endif
+        }
+        switch (_inst) {
+#ifdef CONFIG_BOOKE
+        case KVM_INST_WRTEEI_0:
+        case KVM_INST_WRTEEI_1:
+                kvm_patch_ins_wrteei(inst);
+                break;
+#endif
+        }
+}
+static void kvm_use_magic_page(void)
+{
+        u32 *p;
+        u32 *start, *end;
+        u32 tmp;
+        u32 features;
+        /* Tell the host to map the magic page to -4096 on all CPUs */
+        on_each_cpu(kvm_map_magic_page, &features, 1);
+        /* Quick self-test to see if the mapping works */
+        if (__get_user(tmp, (u32*)KVM_MAGIC_PAGE)) {
+                kvm_patching_worked = false;
+                return;
+        }
+        /* Now loop through all code and find instructions */
+        start = (void*)_stext;
+        end = (void*)_etext;
+        for (p = start; p < end; p++)
+                kvm_check_ins(p, features);
+        printk(KERN_INFO "KVM: Live patching for a fast VM %s\n",
+                         kvm_patching_worked ? "worked" : "failed");
+}
+unsigned long kvm_hypercall(unsigned long *in,
+                            unsigned long *out,
+                            unsigned long nr)
+{
+        unsigned long register r0 asm("r0");
+        unsigned long register r3 asm("r3") = in[0];
+        unsigned long register r4 asm("r4") = in[1];
+        unsigned long register r5 asm("r5") = in[2];
+        unsigned long register r6 asm("r6") = in[3];
+        unsigned long register r7 asm("r7") = in[4];
+        unsigned long register r8 asm("r8") = in[5];
+        unsigned long register r9 asm("r9") = in[6];
+        unsigned long register r10 asm("r10") = in[7];
+        unsigned long register r11 asm("r11") = nr;
+        unsigned long register r12 asm("r12");
+        asm volatile("bl        kvm_hypercall_start"
+                     : "=r"(r0), "=r"(r3), "=r"(r4), "=r"(r5), "=r"(r6),
+                       "=r"(r7), "=r"(r8), "=r"(r9), "=r"(r10), "=r"(r11),
+                       "=r"(r12)
+                     : "r"(r3), "r"(r4), "r"(r5), "r"(r6), "r"(r7), "r"(r8),
+                       "r"(r9), "r"(r10), "r"(r11)
+                     : "memory", "cc", "xer", "ctr", "lr");
+        out[0] = r4;
+        out[1] = r5;
+        out[2] = r6;
+        out[3] = r7;
+        out[4] = r8;
+        out[5] = r9;
+        out[6] = r10;
+        out[7] = r11;
+        return r3;
+}
+EXPORT_SYMBOL_GPL(kvm_hypercall);
+static int kvm_para_setup(void)
+{
+        extern u32 kvm_hypercall_start;
+        struct device_node *hyper_node;
+        u32 *insts;
+        int len, i;
+        hyper_node = of_find_node_by_path("/hypervisor");
+        if (!hyper_node)
+                return -1;
+        insts = (u32*)of_get_property(hyper_node, "hcall-instructions", &len);
+        if (len % 4)
+                return -1;
+        if (len > (4 * 4))
+                return -1;
+        for (i = 0; i < (len / 4); i++)
+                kvm_patch_ins(&(&kvm_hypercall_start)[i], insts[i]);
+        return 0;
+}
+static __init void kvm_free_tmp(void)
+{
+        unsigned long start, end;
+        start = (ulong)&kvm_tmp[kvm_tmp_index + (PAGE_SIZE - 1)] & PAGE_MASK;
+        end = (ulong)&kvm_tmp[ARRAY_SIZE(kvm_tmp)] & PAGE_MASK;
+        /* Free the tmp space we don't need */
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                init_page_count(virt_to_page(start));
+                free_page(start);
+                totalram_pages++;
+        }
+}
+static int __init kvm_guest_init(void)
+{
+        if (!kvm_para_available())
+                goto free_tmp;
+        if (kvm_para_setup())
+                goto free_tmp;
+        if (kvm_para_has_feature(KVM_FEATURE_MAGIC_PAGE))
+                kvm_use_magic_page();
+#ifdef CONFIG_PPC_BOOK3S_64
+        /* Enable napping */
+        powersave_nap = 1;
+#endif
+free_tmp:
+        kvm_free_tmp();
+        return 0;
+}
+postcore_initcall(kvm_guest_init);
diff --git a/arch/powerpc/kernel/kvm_emul.S b/arch/powerpc/kernel/kvm_emul.S
new file mode 100644
index 000000000000..f2b1b2523e61
--- /dev/null
+++ b/arch/powerpc/kernel/kvm_emul.S
@@ -0,0 +1,302 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License, version 2, as
+ * published by the Free Software Foundation.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
+ *
+ * Copyright SUSE Linux Products GmbH 2010
+ *
+ * Authors: Alexander Graf <agraf@suse.de>
+ */
+#include <asm/ppc_asm.h>
+#include <asm/kvm_asm.h>
+#include <asm/reg.h>
+#include <asm/page.h>
+#include <asm/asm-offsets.h>
+/* Hypercall entry point. Will be patched with device tree instructions. */
+.global kvm_hypercall_start
+kvm_hypercall_start:
+        li      r3, -1
+        nop
+        nop
+        nop
+        blr
+#define KVM_MAGIC_PAGE          (-4096)
+#ifdef CONFIG_64BIT
+#define LL64(reg, offs, reg2)   ld      reg, (offs)(reg2)
+#define STL64(reg, offs, reg2)  std     reg, (offs)(reg2)
+#else
+#define LL64(reg, offs, reg2)   lwz     reg, (offs + 4)(reg2)
+#define STL64(reg, offs, reg2)  stw     reg, (offs + 4)(reg2)
+#endif
+#define SCRATCH_SAVE                                                    \
+        /* Enable critical section. We are critical if                  \
+           shared->critical == r1 */                                    \
+        STL64(r1, KVM_MAGIC_PAGE + KVM_MAGIC_CRITICAL, 0);              \
+                                                                        \
+        /* Save state */                                                \
+        PPC_STL r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH1)(0);          \
+        PPC_STL r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0);          \
+        mfcr    r31;                                                    \
+        stw     r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH3)(0);
+#define SCRATCH_RESTORE                                                 \
+        /* Restore state */                                             \
+        PPC_LL  r31, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH1)(0);          \
+        lwz     r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH3)(0);          \
+        mtcr    r30;                                                    \
+        PPC_LL  r30, (KVM_MAGIC_PAGE + KVM_MAGIC_SCRATCH2)(0);          \
+                                                                        \
+        /* Disable critical section. We are critical if                 \
+           shared->critical == r1 and r2 is always != r1 */             \
+        STL64(r2, KVM_MAGIC_PAGE + KVM_MAGIC_CRITICAL, 0);
+.global kvm_emulate_mtmsrd
+kvm_emulate_mtmsrd:
+        SCRATCH_SAVE
+        /* Put MSR & ~(MSR_EE|MSR_RI) in r31 */
+        LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        lis     r30, (~(MSR_EE | MSR_RI))@h
+        ori     r30, r30, (~(MSR_EE | MSR_RI))@l
+        and     r31, r31, r30
+        /* OR the register's (MSR_EE|MSR_RI) on MSR */
+kvm_emulate_mtmsrd_reg:
+        ori     r30, r0, 0
+        andi.   r30, r30, (MSR_EE|MSR_RI)
+        or      r31, r31, r30
+        /* Put MSR back into magic page */
+        STL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        /* Check if we have to fetch an interrupt */
+        lwz     r31, (KVM_MAGIC_PAGE + KVM_MAGIC_INT)(0)
+        cmpwi   r31, 0
+        beq+    no_check
+        /* Check if we may trigger an interrupt */
+        andi.   r30, r30, MSR_EE
+        beq     no_check
+        SCRATCH_RESTORE
+        /* Nag hypervisor */
+kvm_emulate_mtmsrd_orig_ins:
+        tlbsync
+        b       kvm_emulate_mtmsrd_branch
+no_check:
+        SCRATCH_RESTORE
+        /* Go back to caller */
+kvm_emulate_mtmsrd_branch:
+        b       .
+kvm_emulate_mtmsrd_end:
+.global kvm_emulate_mtmsrd_branch_offs
+kvm_emulate_mtmsrd_branch_offs:
+        .long (kvm_emulate_mtmsrd_branch - kvm_emulate_mtmsrd) / 4
+.global kvm_emulate_mtmsrd_reg_offs
+kvm_emulate_mtmsrd_reg_offs:
+        .long (kvm_emulate_mtmsrd_reg - kvm_emulate_mtmsrd) / 4
+.global kvm_emulate_mtmsrd_orig_ins_offs
+kvm_emulate_mtmsrd_orig_ins_offs:
+        .long (kvm_emulate_mtmsrd_orig_ins - kvm_emulate_mtmsrd) / 4
+.global kvm_emulate_mtmsrd_len
+kvm_emulate_mtmsrd_len:
+        .long (kvm_emulate_mtmsrd_end - kvm_emulate_mtmsrd) / 4
+#define MSR_SAFE_BITS (MSR_EE | MSR_CE | MSR_ME | MSR_RI)
+#define MSR_CRITICAL_BITS ~MSR_SAFE_BITS
+.global kvm_emulate_mtmsr
+kvm_emulate_mtmsr:
+        SCRATCH_SAVE
+        /* Fetch old MSR in r31 */
+        LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        /* Find the changed bits between old and new MSR */
+kvm_emulate_mtmsr_reg1:
+        ori     r30, r0, 0
+        xor     r31, r30, r31
+        /* Check if we need to really do mtmsr */
+        LOAD_REG_IMMEDIATE(r30, MSR_CRITICAL_BITS)
+        and.    r31, r31, r30
+        /* No critical bits changed? Maybe we can stay in the guest. */
+        beq     maybe_stay_in_guest
+do_mtmsr:
+        SCRATCH_RESTORE
+        /* Just fire off the mtmsr if it's critical */
+kvm_emulate_mtmsr_orig_ins:
+        mtmsr   r0
+        b       kvm_emulate_mtmsr_branch
+maybe_stay_in_guest:
+        /* Get the target register in r30 */
+kvm_emulate_mtmsr_reg2:
+        ori     r30, r0, 0
+        /* Check if we have to fetch an interrupt */
+        lwz     r31, (KVM_MAGIC_PAGE + KVM_MAGIC_INT)(0)
+        cmpwi   r31, 0
+        beq+    no_mtmsr
+        /* Check if we may trigger an interrupt */
+        andi.   r31, r30, MSR_EE
+        beq     no_mtmsr
+        b       do_mtmsr
+no_mtmsr:
+        /* Put MSR into magic page because we don't call mtmsr */
+        STL64(r30, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        SCRATCH_RESTORE
+        /* Go back to caller */
+kvm_emulate_mtmsr_branch:
+        b       .
+kvm_emulate_mtmsr_end:
+.global kvm_emulate_mtmsr_branch_offs
+kvm_emulate_mtmsr_branch_offs:
+        .long (kvm_emulate_mtmsr_branch - kvm_emulate_mtmsr) / 4
+.global kvm_emulate_mtmsr_reg1_offs
+kvm_emulate_mtmsr_reg1_offs:
+        .long (kvm_emulate_mtmsr_reg1 - kvm_emulate_mtmsr) / 4
+.global kvm_emulate_mtmsr_reg2_offs
+kvm_emulate_mtmsr_reg2_offs:
+        .long (kvm_emulate_mtmsr_reg2 - kvm_emulate_mtmsr) / 4
+.global kvm_emulate_mtmsr_orig_ins_offs
+kvm_emulate_mtmsr_orig_ins_offs:
+        .long (kvm_emulate_mtmsr_orig_ins - kvm_emulate_mtmsr) / 4
+.global kvm_emulate_mtmsr_len
+kvm_emulate_mtmsr_len:
+        .long (kvm_emulate_mtmsr_end - kvm_emulate_mtmsr) / 4
+.global kvm_emulate_wrteei
+kvm_emulate_wrteei:
+        SCRATCH_SAVE
+        /* Fetch old MSR in r31 */
+        LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        /* Remove MSR_EE from old MSR */
+        li      r30, 0
+        ori     r30, r30, MSR_EE
+        andc    r31, r31, r30
+        /* OR new MSR_EE onto the old MSR */
+kvm_emulate_wrteei_ee:
+        ori     r31, r31, 0
+        /* Write new MSR value back */
+        STL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        SCRATCH_RESTORE
+        /* Go back to caller */
+kvm_emulate_wrteei_branch:
+        b       .
+kvm_emulate_wrteei_end:
+.global kvm_emulate_wrteei_branch_offs
+kvm_emulate_wrteei_branch_offs:
+        .long (kvm_emulate_wrteei_branch - kvm_emulate_wrteei) / 4
+.global kvm_emulate_wrteei_ee_offs
+kvm_emulate_wrteei_ee_offs:
+        .long (kvm_emulate_wrteei_ee - kvm_emulate_wrteei) / 4
+.global kvm_emulate_wrteei_len
+kvm_emulate_wrteei_len:
+        .long (kvm_emulate_wrteei_end - kvm_emulate_wrteei) / 4
+.global kvm_emulate_mtsrin
+kvm_emulate_mtsrin:
+        SCRATCH_SAVE
+        LL64(r31, KVM_MAGIC_PAGE + KVM_MAGIC_MSR, 0)
+        andi.   r31, r31, MSR_DR | MSR_IR
+        beq     kvm_emulate_mtsrin_reg1
+        SCRATCH_RESTORE
+kvm_emulate_mtsrin_orig_ins:
+        nop
+        b       kvm_emulate_mtsrin_branch
+kvm_emulate_mtsrin_reg1:
+        /* rX >> 26 */
+        rlwinm  r30,r0,6,26,29
+kvm_emulate_mtsrin_reg2:
+        stw     r0, (KVM_MAGIC_PAGE + KVM_MAGIC_SR)(r30)
+        SCRATCH_RESTORE
+        /* Go back to caller */
+kvm_emulate_mtsrin_branch:
+        b       .
+kvm_emulate_mtsrin_end:
+.global kvm_emulate_mtsrin_branch_offs
+kvm_emulate_mtsrin_branch_offs:
+        .long (kvm_emulate_mtsrin_branch - kvm_emulate_mtsrin) / 4
+.global kvm_emulate_mtsrin_reg1_offs
+kvm_emulate_mtsrin_reg1_offs:
+        .long (kvm_emulate_mtsrin_reg1 - kvm_emulate_mtsrin) / 4
+.global kvm_emulate_mtsrin_reg2_offs
+kvm_emulate_mtsrin_reg2_offs:
+        .long (kvm_emulate_mtsrin_reg2 - kvm_emulate_mtsrin) / 4
+.global kvm_emulate_mtsrin_orig_ins_offs
+kvm_emulate_mtsrin_orig_ins_offs:
+        .long (kvm_emulate_mtsrin_orig_ins - kvm_emulate_mtsrin) / 4
+.global kvm_emulate_mtsrin_len
+kvm_emulate_mtsrin_len:
+        .long (kvm_emulate_mtsrin_end - kvm_emulate_mtsrin) / 4
diff --git a/arch/powerpc/kernel/l2cr_6xx.S b/arch/powerpc/kernel/l2cr_6xx.S
index 2a2f3c3f6d80..97ec8557f974 100644
--- a/arch/powerpc/kernel/l2cr_6xx.S
+++ b/arch/powerpc/kernel/l2cr_6xx.S
@@ -151,7 +151,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
         /**** Might be a good idea to set L2DO here - to prevent instructions
               from getting into the cache.  But since we invalidate
               the next time we enable the cache it doesn't really matter.
-               Don't do this unless you accomodate all processor variations.
+               Don't do this unless you accommodate all processor variations.
               The bit moved on the 7450.....
          ****/
diff --git a/arch/powerpc/kernel/legacy_serial.c b/arch/powerpc/kernel/legacy_serial.c
index c1fd0f9658fd..2b97b80d6d7d 100644
--- a/arch/powerpc/kernel/legacy_serial.c
+++ b/arch/powerpc/kernel/legacy_serial.c
@@ -52,14 +52,14 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
                                  phys_addr_t taddr, unsigned long irq,
                                  upf_t flags, int irq_check_parent)
 {
-        const u32 *clk, *spd;
+        const __be32 *clk, *spd;
        u32 clock = BASE_BAUD * 16;
        int index;
        /* get clock freq. if present */
        clk = of_get_property(np, "clock-frequency", NULL);
        if (clk && *clk)
-                clock = *clk;
+                clock = be32_to_cpup(clk);
        /* get default speed if present */
        spd = of_get_property(np, "current-speed", NULL);
@@ -109,7 +109,7 @@ static int __init add_legacy_port(struct device_node *np, int want_index,
        legacy_serial_infos[index].taddr = taddr;
        legacy_serial_infos[index].np = of_node_get(np);
        legacy_serial_infos[index].clock = clock;
-        legacy_serial_infos[index].speed = spd ? *spd : 0;
+        legacy_serial_infos[index].speed = spd ? be32_to_cpup(spd) : 0;
        legacy_serial_infos[index].irq_check_parent = irq_check_parent;
        printk(KERN_DEBUG "Found legacy serial port %d for %s\n",
@@ -168,7 +168,7 @@ static int __init add_legacy_soc_port(struct device_node *np,
 static int __init add_legacy_isa_port(struct device_node *np,
                                      struct device_node *isa_brg)
 {
-        const u32 *reg;
+        const __be32 *reg;
        const char *typep;
        int index = -1;
        u64 taddr;
@@ -181,7 +181,7 @@ static int __init add_legacy_isa_port(struct device_node *np,
                return -1;
        /* Verify it's an IO port, we don't support anything else */
-        if (!(reg[0] & 0x00000001))
+        if (!(be32_to_cpu(reg[0]) & 0x00000001))
                return -1;
        /* Now look for an "ibm,aix-loc" property that gives us ordering
@@ -202,7 +202,7 @@ static int __init add_legacy_isa_port(struct device_node *np,
                taddr = 0;
        /* Add port, irq will be dealt with later */
-        return add_legacy_port(np, index, UPIO_PORT, reg[1], taddr,
+        return add_legacy_port(np, index, UPIO_PORT, be32_to_cpu(reg[1]), taddr,
                               NO_IRQ, UPF_BOOT_AUTOCONF, 0);
 }
@@ -251,9 +251,9 @@ static int __init add_legacy_pci_port(struct device_node *np,
         * we get to their "reg" property
         */
        if (np != pci_dev) {
-                const u32 *reg = of_get_property(np, "reg", NULL);
+                const __be32 *reg = of_get_property(np, "reg", NULL);
-                if (reg && (*reg < 4))
+                if (reg && (be32_to_cpup(reg) < 4))
-                        index = lindex = *reg;
+                        index = lindex = be32_to_cpup(reg);
        }
        /* Local index means it's the Nth port in the PCI chip. Unfortunately
@@ -330,9 +330,11 @@ void __init find_legacy_serial_ports(void)
                if (!parent)
                        continue;
                if (of_match_node(legacy_serial_parents, parent) != NULL) {
-                        index = add_legacy_soc_port(np, np);
+                        if (of_device_is_available(np)) {
-                        if (index >= 0 && np == stdout)
+                                index = add_legacy_soc_port(np, np);
-                                legacy_serial_console = index;
+                                if (index >= 0 && np == stdout)
+                                        legacy_serial_console = index;
+                        }
                }
                of_node_put(parent);
        }
@@ -507,7 +509,7 @@ static int __init check_legacy_serial_console(void)
        struct device_node *prom_stdout = NULL;
        int i, speed = 0, offset = 0;
        const char *name;
-        const u32 *spd;
+        const __be32 *spd;
        DBG(" -> check_legacy_serial_console()\n");
@@ -547,7 +549,7 @@ static int __init check_legacy_serial_console(void)
        }
        spd = of_get_property(prom_stdout, "current-speed", NULL);
        if (spd)
-                speed = *spd;
+                speed = be32_to_cpup(spd);
        if (strcmp(name, "serial") != 0)
                goto not_found;
diff --git a/arch/powerpc/kernel/lparcfg.c b/arch/powerpc/kernel/lparcfg.c
index 50362b6ef6e9..84daabe2fcba 100644
--- a/arch/powerpc/kernel/lparcfg.c
+++ b/arch/powerpc/kernel/lparcfg.c
@@ -56,7 +56,7 @@ static unsigned long get_purr(void)
        for_each_possible_cpu(cpu) {
                if (firmware_has_feature(FW_FEATURE_ISERIES))
-                        sum_purr += lppaca[cpu].emulated_time_base;
+                        sum_purr += lppaca_of(cpu).emulated_time_base;
                else {
                        struct cpu_usage *cu;
@@ -132,34 +132,6 @@ static int iseries_lparcfg_data(struct seq_file *m, void *v)
 /*
 * Methods used to fetch LPAR data when running on a pSeries platform.
 */
-/**
- * h_get_mpp
- * H_GET_MPP hcall returns info in 7 parms
- */
-int h_get_mpp(struct hvcall_mpp_data *mpp_data)
-{
-        int rc;
-        unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
-        rc = plpar_hcall9(H_GET_MPP, retbuf);
-        mpp_data->entitled_mem = retbuf[0];
-        mpp_data->mapped_mem = retbuf[1];
-        mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
-        mpp_data->pool_num = retbuf[2] & 0xffff;
-        mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
-        mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
-        mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffff;
-        mpp_data->pool_size = retbuf[4];
-        mpp_data->loan_request = retbuf[5];
-        mpp_data->backing_mem = retbuf[6];
-        return rc;
-}
-EXPORT_SYMBOL(h_get_mpp);
 struct hvcall_ppp_data {
        u64     entitlement;
@@ -262,8 +234,8 @@ static void parse_ppp_data(struct seq_file *m)
        seq_printf(m, "system_active_processors=%d\n",
                   ppp_data.active_system_procs);
-        /* pool related entries are apropriate for shared configs */
+        /* pool related entries are appropriate for shared configs */
-        if (lppaca[0].shared_proc) {
+        if (lppaca_of(0).shared_proc) {
                unsigned long pool_idle_time, pool_procs;
                seq_printf(m, "pool=%d\n", ppp_data.pool_num);
@@ -345,6 +317,30 @@ static void parse_mpp_data(struct seq_file *m)
        seq_printf(m, "backing_memory=%ld bytes\n", mpp_data.backing_mem);
 }
+/**
+ * parse_mpp_x_data
+ * Parse out data returned from h_get_mpp_x
+ */
+static void parse_mpp_x_data(struct seq_file *m)
+{
+        struct hvcall_mpp_x_data mpp_x_data;
+        if (!firmware_has_feature(FW_FEATURE_XCMO))
+                return;
+        if (h_get_mpp_x(&mpp_x_data))
+                return;
+        seq_printf(m, "coalesced_bytes=%ld\n", mpp_x_data.coalesced_bytes);
+        if (mpp_x_data.pool_coalesced_bytes)
+                seq_printf(m, "pool_coalesced_bytes=%ld\n",
+                           mpp_x_data.pool_coalesced_bytes);
+        if (mpp_x_data.pool_purr_cycles)
+                seq_printf(m, "coalesce_pool_purr=%ld\n", mpp_x_data.pool_purr_cycles);
+        if (mpp_x_data.pool_spurr_cycles)
+                seq_printf(m, "coalesce_pool_spurr=%ld\n", mpp_x_data.pool_spurr_cycles);
+}
 #define SPLPAR_CHARACTERISTICS_TOKEN 20
 #define SPLPAR_MAXLENGTH 1026*(sizeof(char))
@@ -460,8 +456,8 @@ static void pseries_cmo_data(struct seq_file *m)
                return;
        for_each_possible_cpu(cpu) {
-                cmo_faults += lppaca[cpu].cmo_faults;
+                cmo_faults += lppaca_of(cpu).cmo_faults;
-                cmo_fault_time += lppaca[cpu].cmo_fault_time;
+                cmo_fault_time += lppaca_of(cpu).cmo_fault_time;
        }
        seq_printf(m, "cmo_faults=%lu\n", cmo_faults);
@@ -479,8 +475,8 @@ static void splpar_dispatch_data(struct seq_file *m)
        unsigned long dispatch_dispersions = 0;
        for_each_possible_cpu(cpu) {
-                dispatches += lppaca[cpu].yield_count;
+                dispatches += lppaca_of(cpu).yield_count;
-                dispatch_dispersions += lppaca[cpu].dispersion_count;
+                dispatch_dispersions += lppaca_of(cpu).dispersion_count;
        }
        seq_printf(m, "dispatches=%lu\n", dispatches);
@@ -520,6 +516,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
                parse_system_parameter_string(m);
                parse_ppp_data(m);
                parse_mpp_data(m);
+                parse_mpp_x_data(m);
                pseries_cmo_data(m);
                splpar_dispatch_data(m);
@@ -545,7 +542,7 @@ static int pseries_lparcfg_data(struct seq_file *m, void *v)
        seq_printf(m, "partition_potential_processors=%d\n",
                   partition_potential_processors);
-        seq_printf(m, "shared_processor_mode=%d\n", lppaca[0].shared_proc);
+        seq_printf(m, "shared_processor_mode=%d\n", lppaca_of(0).shared_proc);
        seq_printf(m, "slb_size=%d\n", mmu_slb_size);
@@ -780,6 +777,7 @@ static const struct file_operations lparcfg_fops = {
        .write          = lparcfg_write,
        .open           = lparcfg_open,
        .release        = single_release,
+        .llseek         = seq_lseek,
 };
 static int __init lparcfg_init(void)
diff --git a/arch/powerpc/kernel/machine_kexec.c b/arch/powerpc/kernel/machine_kexec.c
index dd6c141f1662..7ee50f0547cb 100644
--- a/arch/powerpc/kernel/machine_kexec.c
+++ b/arch/powerpc/kernel/machine_kexec.c
@@ -14,16 +14,41 @@
 #include <linux/threads.h>
 #include <linux/memblock.h>
 #include <linux/of.h>
+#include <linux/irq.h>
+#include <linux/ftrace.h>
 #include <asm/machdep.h>
 #include <asm/prom.h>
 #include <asm/sections.h>
+void machine_kexec_mask_interrupts(void) {
+        unsigned int i;
+        for_each_irq(i) {
+                struct irq_desc *desc = irq_to_desc(i);
+                struct irq_chip *chip;
+                if (!desc)
+                        continue;
+                chip = irq_desc_get_chip(desc);
+                if (!chip)
+                        continue;
+                if (chip->irq_eoi && irqd_irq_inprogress(&desc->irq_data))
+                        chip->irq_eoi(&desc->irq_data);
+                if (chip->irq_mask)
+                        chip->irq_mask(&desc->irq_data);
+                if (chip->irq_disable && !irqd_irq_disabled(&desc->irq_data))
+                        chip->irq_disable(&desc->irq_data);
+        }
+}
 void machine_crash_shutdown(struct pt_regs *regs)
 {
-        if (ppc_md.machine_crash_shutdown)
+        default_machine_crash_shutdown(regs);
-                ppc_md.machine_crash_shutdown(regs);
-        else
-                default_machine_crash_shutdown(regs);
 }
 /*
@@ -41,8 +66,6 @@ int machine_kexec_prepare(struct kimage *image)
 void machine_kexec_cleanup(struct kimage *image)
 {
-        if (ppc_md.machine_kexec_cleanup)
-                ppc_md.machine_kexec_cleanup(image);
 }
 void arch_crash_save_vmcoreinfo(void)
@@ -63,11 +86,17 @@ void arch_crash_save_vmcoreinfo(void)
 */
 void machine_kexec(struct kimage *image)
 {
+        int save_ftrace_enabled;
+        save_ftrace_enabled = __ftrace_enabled_save();
        if (ppc_md.machine_kexec)
                ppc_md.machine_kexec(image);
        else
                default_machine_kexec(image);
+        __ftrace_enabled_restore(save_ftrace_enabled);
        /* Fall back to normal restart if we're still alive. */
        machine_restart(NULL);
        for(;;);
diff --git a/arch/powerpc/kernel/machine_kexec_32.c b/arch/powerpc/kernel/machine_kexec_32.c
index ae63a964b858..e63f2e7d2efb 100644
--- a/arch/powerpc/kernel/machine_kexec_32.c
+++ b/arch/powerpc/kernel/machine_kexec_32.c
@@ -39,6 +39,10 @@ void default_machine_kexec(struct kimage *image)
        /* Interrupts aren't acceptable while we reboot */
        local_irq_disable();
+        /* mask each interrupt so we are in a more sane state for the
+         * kexec kernel */
+        machine_kexec_mask_interrupts();
        page_list = image->head;
        /* we need both effective and real address here */
diff --git a/arch/powerpc/kernel/misc.S b/arch/powerpc/kernel/misc.S
index 2d29752cbe16..b69463ec2010 100644
--- a/arch/powerpc/kernel/misc.S
+++ b/arch/powerpc/kernel/misc.S
@@ -122,8 +122,3 @@ _GLOBAL(longjmp)
        mtlr    r0
        mr      r3,r4
        blr
-_GLOBAL(__setup_cpu_power7)
-_GLOBAL(__restore_cpu_power7)
-        /* place holder */
-        blr
diff --git a/arch/powerpc/kernel/misc_32.S b/arch/powerpc/kernel/misc_32.S
index a7a570dcdd57..998a10028608 100644
--- a/arch/powerpc/kernel/misc_32.S
+++ b/arch/powerpc/kernel/misc_32.S
@@ -30,6 +30,7 @@
 #include <asm/processor.h>
 #include <asm/kexec.h>
 #include <asm/bug.h>
+#include <asm/ptrace.h>
        .text
@@ -693,6 +694,17 @@ _GLOBAL(kernel_thread)
        addi    r1,r1,16
        blr
+#ifdef CONFIG_SMP
+_GLOBAL(start_secondary_resume)
+        /* Reset stack */
+        rlwinm  r1,r1,0,0,(31-THREAD_SHIFT)     /* current_thread_info() */
+        addi    r1,r1,THREAD_SIZE-STACK_FRAME_OVERHEAD
+        li      r3,0
+        stw     r3,0(r1)                /* Zero the stack frame pointer */
+        bl      start_secondary
+        b       .
+#endif /* CONFIG_SMP */
+        
 /*
 * This routine is just here to keep GCC happy - sigh...
 */
diff --git a/arch/powerpc/kernel/misc_64.S b/arch/powerpc/kernel/misc_64.S
index e5144906a56d..e89df59cdc5a 100644
--- a/arch/powerpc/kernel/misc_64.S
+++ b/arch/powerpc/kernel/misc_64.S
@@ -25,6 +25,7 @@
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
 #include <asm/kexec.h>
+#include <asm/ptrace.h>
        .text
@@ -461,7 +462,8 @@ _GLOBAL(disable_kernel_fp)
 * wait for the flag to change, indicating this kernel is going away but
 * the slave code for the next one is at addresses 0 to 100.
 *
- * This is used by all slaves.
+ * This is used by all slaves, even those that did not find a matching
+ * paca in the secondary startup code.
 *
 * Physical (hardware) cpu id should be in r3.
 */
@@ -470,10 +472,6 @@ _GLOBAL(kexec_wait)
 1:      mflr    r5
        addi    r5,r5,kexec_flag-1b
-        li      r4,KEXEC_STATE_REAL_MODE
-        stb     r4,PACAKEXECSTATE(r13)
-        SYNC
 99:     HMT_LOW
 #ifdef CONFIG_KEXEC             /* use no memory without kexec */
        lwz     r4,0(r5)
@@ -498,11 +496,17 @@ kexec_flag:
 *
 * get phys id from paca
 * switch to real mode
+ * mark the paca as no longer used
 * join other cpus in kexec_wait(phys_id)
 */
 _GLOBAL(kexec_smp_wait)
        lhz     r3,PACAHWCPUID(r13)
        bl      real_mode
+        li      r4,KEXEC_STATE_REAL_MODE
+        stb     r4,PACAKEXECSTATE(r13)
+        SYNC
        b       .kexec_wait
 /*
diff --git a/arch/powerpc/kernel/mpc7450-pmu.c b/arch/powerpc/kernel/mpc7450-pmu.c
index 09d72028f317..2cc5e0301d0b 100644
--- a/arch/powerpc/kernel/mpc7450-pmu.c
+++ b/arch/powerpc/kernel/mpc7450-pmu.c
@@ -414,4 +414,4 @@ static int init_mpc7450_pmu(void)
        return register_power_pmu(&mpc7450_pmu);
 }
-arch_initcall(init_mpc7450_pmu);
+early_initcall(init_mpc7450_pmu);
diff --git a/arch/powerpc/kernel/nvram_64.c b/arch/powerpc/kernel/nvram_64.c
index 9cf197f01e94..bec1e930ed73 100644
--- a/arch/powerpc/kernel/nvram_64.c
+++ b/arch/powerpc/kernel/nvram_64.c
@@ -34,15 +34,26 @@
 #undef DEBUG_NVRAM
-static struct nvram_partition * nvram_part;
+#define NVRAM_HEADER_LEN        sizeof(struct nvram_header)
-static long nvram_error_log_index = -1;
+#define NVRAM_BLOCK_LEN         NVRAM_HEADER_LEN
-static long nvram_error_log_size = 0;
+/* If change this size, then change the size of NVNAME_LEN */
+struct nvram_header {
+        unsigned char signature;
+        unsigned char checksum;
+        unsigned short length;
+        /* Terminating null required only for names < 12 chars. */
+        char name[12];
+};
-struct err_log_info {
+struct nvram_partition {
-        int error_type;
+        struct list_head partition;
-        unsigned int seq_num;
+        struct nvram_header header;
+        unsigned int index;
 };
+static LIST_HEAD(nvram_partitions);
 static loff_t dev_nvram_llseek(struct file *file, loff_t offset, int origin)
 {
        int size;
@@ -186,14 +197,12 @@ static struct miscdevice nvram_dev = {
 #ifdef DEBUG_NVRAM
 static void __init nvram_print_partitions(char * label)
 {
-        struct list_head * p;
        struct nvram_partition * tmp_part;
        
        printk(KERN_WARNING "--------%s---------\n", label);
        printk(KERN_WARNING "indx\t\tsig\tchks\tlen\tname\n");
-        list_for_each(p, &nvram_part->partition) {
+        list_for_each_entry(tmp_part, &nvram_partitions, partition) {
-                tmp_part = list_entry(p, struct nvram_partition, partition);
+                printk(KERN_WARNING "%4d    \t%02x\t%02x\t%d\t%12s\n",
-                printk(KERN_WARNING "%4d    \t%02x\t%02x\t%d\t%s\n",
                       tmp_part->index, tmp_part->header.signature,
                       tmp_part->header.checksum, tmp_part->header.length,
                       tmp_part->header.name);
@@ -228,95 +237,136 @@ static unsigned char __init nvram_checksum(struct nvram_header *p)
        return c_sum;
 }
-static int __init nvram_remove_os_partition(void)
+/*
+ * Per the criteria passed via nvram_remove_partition(), should this
+ * partition be removed?  1=remove, 0=keep
+ */
+static int nvram_can_remove_partition(struct nvram_partition *part,
+                const char *name, int sig, const char *exceptions[])
+{
+        if (part->header.signature != sig)
+                return 0;
+        if (name) {
+                if (strncmp(name, part->header.name, 12))
+                        return 0;
+        } else if (exceptions) {
+                const char **except;
+                for (except = exceptions; *except; except++) {
+                        if (!strncmp(*except, part->header.name, 12))
+                                return 0;
+                }
+        }
+        return 1;
+}
+/**
+ * nvram_remove_partition - Remove one or more partitions in nvram
+ * @name: name of the partition to remove, or NULL for a
+ *        signature only match
+ * @sig: signature of the partition(s) to remove
+ * @exceptions: When removing all partitions with a matching signature,
+ *        leave these alone.
+ */
+int __init nvram_remove_partition(const char *name, int sig,
+                                                const char *exceptions[])
 {
-        struct list_head *i;
+        struct nvram_partition *part, *prev, *tmp;
-        struct list_head *j;
-        struct nvram_partition * part;
-        struct nvram_partition * cur_part;
        int rc;
-        list_for_each(i, &nvram_part->partition) {
+        list_for_each_entry(part, &nvram_partitions, partition) {
-                part = list_entry(i, struct nvram_partition, partition);
+                if (!nvram_can_remove_partition(part, name, sig, exceptions))
-                if (part->header.signature != NVRAM_SIG_OS)
                        continue;
-                
-                /* Make os partition a free partition */
+                /* Make partition a free partition */
                part->header.signature = NVRAM_SIG_FREE;
-                sprintf(part->header.name, "wwwwwwwwwwww");
+                strncpy(part->header.name, "wwwwwwwwwwww", 12);
                part->header.checksum = nvram_checksum(&part->header);
-                /* Merge contiguous free partitions backwards */
-                list_for_each_prev(j, &part->partition) {
-                        cur_part = list_entry(j, struct nvram_partition, partition);
-                        if (cur_part == nvram_part || cur_part->header.signature != NVRAM_SIG_FREE) {
-                                break;
-                        }
-                        
-                        part->header.length += cur_part->header.length;
-                        part->header.checksum = nvram_checksum(&part->header);
-                        part->index = cur_part->index;
-                        list_del(&cur_part->partition);
-                        kfree(cur_part);
-                        j = &part->partition; /* fixup our loop */
-                }
-                
-                /* Merge contiguous free partitions forwards */
-                list_for_each(j, &part->partition) {
-                        cur_part = list_entry(j, struct nvram_partition, partition);
-                        if (cur_part == nvram_part || cur_part->header.signature != NVRAM_SIG_FREE) {
-                                break;
-                        }
-                        part->header.length += cur_part->header.length;
-                        part->header.checksum = nvram_checksum(&part->header);
-                        list_del(&cur_part->partition);
-                        kfree(cur_part);
-                        j = &part->partition; /* fixup our loop */
-                }
-                
                rc = nvram_write_header(part);
                if (rc <= 0) {
-                        printk(KERN_ERR "nvram_remove_os_partition: nvram_write failed (%d)\n", rc);
+                        printk(KERN_ERR "nvram_remove_partition: nvram_write failed (%d)\n", rc);
                        return rc;
                }
+        }
+        /* Merge contiguous ones */
+        prev = NULL;
+        list_for_each_entry_safe(part, tmp, &nvram_partitions, partition) {
+                if (part->header.signature != NVRAM_SIG_FREE) {
+                        prev = NULL;
+                        continue;
+                }
+                if (prev) {
+                        prev->header.length += part->header.length;
+                        prev->header.checksum = nvram_checksum(&part->header);
+                        rc = nvram_write_header(part);
+                        if (rc <= 0) {
+                                printk(KERN_ERR "nvram_remove_partition: nvram_write failed (%d)\n", rc);
+                                return rc;
+                        }
+                        list_del(&part->partition);
+                        kfree(part);
+                } else
+                        prev = part;
        }
        
        return 0;
 }
-/* nvram_create_os_partition
+/**
+ * nvram_create_partition - Create a partition in nvram
+ * @name: name of the partition to create
+ * @sig: signature of the partition to create
+ * @req_size: size of data to allocate in bytes
+ * @min_size: minimum acceptable size (0 means req_size)
 *
- * Create a OS linux partition to buffer error logs.
+ * Returns a negative error code or a positive nvram index
- * Will create a partition starting at the first free
+ * of the beginning of the data area of the newly created
- * space found if space has enough room.
+ * partition. If you provided a min_size smaller than req_size
+ * you need to query for the actual size yourself after the
+ * call using nvram_partition_get_size().
 */
-static int __init nvram_create_os_partition(void)
+loff_t __init nvram_create_partition(const char *name, int sig,
+                                     int req_size, int min_size)
 {
        struct nvram_partition *part;
        struct nvram_partition *new_part;
        struct nvram_partition *free_part = NULL;
-        int seq_init[2] = { 0, 0 };
+        static char nv_init_vals[16];
        loff_t tmp_index;
        long size = 0;
        int rc;
-        
+        /* Convert sizes from bytes to blocks */
+        req_size = _ALIGN_UP(req_size, NVRAM_BLOCK_LEN) / NVRAM_BLOCK_LEN;
+        min_size = _ALIGN_UP(min_size, NVRAM_BLOCK_LEN) / NVRAM_BLOCK_LEN;
+        /* If no minimum size specified, make it the same as the
+         * requested size
+         */
+        if (min_size == 0)
+                min_size = req_size;
+        if (min_size > req_size)
+                return -EINVAL;
+        /* Now add one block to each for the header */
+        req_size += 1;
+        min_size += 1;
        /* Find a free partition that will give us the maximum needed size 
           If can't find one that will give us the minimum size needed */
-        list_for_each_entry(part, &nvram_part->partition, partition) {
+        list_for_each_entry(part, &nvram_partitions, partition) {
                if (part->header.signature != NVRAM_SIG_FREE)
                        continue;
-                if (part->header.length >= NVRAM_MAX_REQ) {
+                if (part->header.length >= req_size) {
-                        size = NVRAM_MAX_REQ;
+                        size = req_size;
                        free_part = part;
                        break;
                }
-                if (!size && part->header.length >= NVRAM_MIN_REQ) {
+                if (part->header.length > size &&
-                        size = NVRAM_MIN_REQ;
+                    part->header.length >= min_size) {
+                        size = part->header.length;
                        free_part = part;
                }
        }
@@ -326,136 +376,95 @@ static int __init nvram_create_os_partition(void)
        /* Create our OS partition */
        new_part = kmalloc(sizeof(*new_part), GFP_KERNEL);
        if (!new_part) {
-                printk(KERN_ERR "nvram_create_os_partition: kmalloc failed\n");
+                pr_err("nvram_create_os_partition: kmalloc failed\n");
                return -ENOMEM;
        }
        new_part->index = free_part->index;
-        new_part->header.signature = NVRAM_SIG_OS;
+        new_part->header.signature = sig;
        new_part->header.length = size;
-        strcpy(new_part->header.name, "ppc64,linux");
+        strncpy(new_part->header.name, name, 12);
        new_part->header.checksum = nvram_checksum(&new_part->header);
        rc = nvram_write_header(new_part);
        if (rc <= 0) {
-                printk(KERN_ERR "nvram_create_os_partition: nvram_write_header "
+                pr_err("nvram_create_os_partition: nvram_write_header "
-                                "failed (%d)\n", rc);
-                return rc;
-        }
-        /* make sure and initialize to zero the sequence number and the error
-           type logged */
-        tmp_index = new_part->index + NVRAM_HEADER_LEN;
-        rc = ppc_md.nvram_write((char *)&seq_init, sizeof(seq_init), &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_create_os_partition: nvram_write "
                       "failed (%d)\n", rc);
                return rc;
        }
-        
-        nvram_error_log_index = new_part->index + NVRAM_HEADER_LEN;
-        nvram_error_log_size = ((part->header.length - 1) *
-                                NVRAM_BLOCK_LEN) - sizeof(struct err_log_info);
-        
        list_add_tail(&new_part->partition, &free_part->partition);
-        if (free_part->header.length <= size) {
+        /* Adjust or remove the partition we stole the space from */
+        if (free_part->header.length > size) {
+                free_part->index += size * NVRAM_BLOCK_LEN;
+                free_part->header.length -= size;
+                free_part->header.checksum = nvram_checksum(&free_part->header);
+                rc = nvram_write_header(free_part);
+                if (rc <= 0) {
+                        pr_err("nvram_create_os_partition: nvram_write_header "
+                               "failed (%d)\n", rc);
+                        return rc;
+                }
+        } else {
                list_del(&free_part->partition);
                kfree(free_part);
-                return 0;
        } 
-        /* Adjust the partition we stole the space from */
+        /* Clear the new partition */
-        free_part->index += size * NVRAM_BLOCK_LEN;
+        for (tmp_index = new_part->index + NVRAM_HEADER_LEN;
-        free_part->header.length -= size;
+             tmp_index <  ((size - 1) * NVRAM_BLOCK_LEN);
-        free_part->header.checksum = nvram_checksum(&free_part->header);
+             tmp_index += NVRAM_BLOCK_LEN) {
-        
+                rc = ppc_md.nvram_write(nv_init_vals, NVRAM_BLOCK_LEN, &tmp_index);
-        rc = nvram_write_header(free_part);
+                if (rc <= 0) {
-        if (rc <= 0) {
+                        pr_err("nvram_create_partition: nvram_write failed (%d)\n", rc);
-                printk(KERN_ERR "nvram_create_os_partition: nvram_write_header "
+                        return rc;
-                       "failed (%d)\n", rc);
+                }
-                return rc;
        }
+        
-        return 0;
+        return new_part->index + NVRAM_HEADER_LEN;
 }
+/**
-/* nvram_setup_partition
+ * nvram_get_partition_size - Get the data size of an nvram partition
- *
+ * @data_index: This is the offset of the start of the data of
- * This will setup the partition we need for buffering the
+ *              the partition. The same value that is returned by
- * error logs and cleanup partitions if needed.
+ *              nvram_create_partition().
- *
- * The general strategy is the following:
- * 1.) If there is ppc64,linux partition large enough then use it.
- * 2.) If there is not a ppc64,linux partition large enough, search
- * for a free partition that is large enough.
- * 3.) If there is not a free partition large enough remove 
- * _all_ OS partitions and consolidate the space.
- * 4.) Will first try getting a chunk that will satisfy the maximum
- * error log size (NVRAM_MAX_REQ).
- * 5.) If the max chunk cannot be allocated then try finding a chunk
- * that will satisfy the minum needed (NVRAM_MIN_REQ).
 */
-static int __init nvram_setup_partition(void)
+int nvram_get_partition_size(loff_t data_index)
 {
-        struct list_head * p;
+        struct nvram_partition *part;
-        struct nvram_partition * part;
+        
-        int rc;
+        list_for_each_entry(part, &nvram_partitions, partition) {
+                if (part->index + NVRAM_HEADER_LEN == data_index)
-        /* For now, we don't do any of this on pmac, until I
+                        return (part->header.length - 1) * NVRAM_BLOCK_LEN;
-         * have figured out if it's worth killing some unused stuffs
+        }
-         * in our nvram, as Apple defined partitions use pretty much
+        return -1;
-         * all of the space
+}
-         */
-        if (machine_is(powermac))
-                return -ENOSPC;
-        /* see if we have an OS partition that meets our needs.
-           will try getting the max we need.  If not we'll delete
-           partitions and try again. */
-        list_for_each(p, &nvram_part->partition) {
-                part = list_entry(p, struct nvram_partition, partition);
-                if (part->header.signature != NVRAM_SIG_OS)
-                        continue;
-                if (strcmp(part->header.name, "ppc64,linux"))
-                        continue;
-                if (part->header.length >= NVRAM_MIN_REQ) {
+/**
-                        /* found our partition */
+ * nvram_find_partition - Find an nvram partition by signature and name
-                        nvram_error_log_index = part->index + NVRAM_HEADER_LEN;
+ * @name: Name of the partition or NULL for any name
-                        nvram_error_log_size = ((part->header.length - 1) *
+ * @sig: Signature to test against
-                                                NVRAM_BLOCK_LEN) - sizeof(struct err_log_info);
+ * @out_size: if non-NULL, returns the size of the data part of the partition
-                        return 0;
+ */
+loff_t nvram_find_partition(const char *name, int sig, int *out_size)
+{
+        struct nvram_partition *p;
+        list_for_each_entry(p, &nvram_partitions, partition) {
+                if (p->header.signature == sig &&
+                    (!name || !strncmp(p->header.name, name, 12))) {
+                        if (out_size)
+                                *out_size = (p->header.length - 1) *
+                                        NVRAM_BLOCK_LEN;
+                        return p->index + NVRAM_HEADER_LEN;
                }
        }
-        
-        /* try creating a partition with the free space we have */
-        rc = nvram_create_os_partition();
-        if (!rc) {
-                return 0;
-        }
-                
-        /* need to free up some space */
-        rc = nvram_remove_os_partition();
-        if (rc) {
-                return rc;
-        }
-        
-        /* create a partition in this new space */
-        rc = nvram_create_os_partition();
-        if (rc) {
-                printk(KERN_ERR "nvram_create_os_partition: Could not find a "
-                       "NVRAM partition large enough\n");
-                return rc;
-        }
-        
        return 0;
 }
+int __init nvram_scan_partitions(void)
-static int __init nvram_scan_partitions(void)
 {
        loff_t cur_index = 0;
        struct nvram_header phead;
@@ -465,7 +474,7 @@ static int __init nvram_scan_partitions(void)
        int total_size;
        int err;
-        if (ppc_md.nvram_size == NULL)
+        if (ppc_md.nvram_size == NULL || ppc_md.nvram_size() <= 0)
                return -ENODEV;
        total_size = ppc_md.nvram_size();
        
@@ -512,12 +521,16 @@ static int __init nvram_scan_partitions(void)
                
                memcpy(&tmp_part->header, &phead, NVRAM_HEADER_LEN);
                tmp_part->index = cur_index;
-                list_add_tail(&tmp_part->partition, &nvram_part->partition);
+                list_add_tail(&tmp_part->partition, &nvram_partitions);
                
                cur_index += phead.length * NVRAM_BLOCK_LEN;
        }
        err = 0;
+#ifdef DEBUG_NVRAM
+        nvram_print_partitions("NVRAM Partitions");
+#endif
 out:
        kfree(header);
        return err;
@@ -525,9 +538,10 @@ static int __init nvram_scan_partitions(void)
 static int __init nvram_init(void)
 {
-        int error;
        int rc;
        
+        BUILD_BUG_ON(NVRAM_BLOCK_LEN != 16);
        if (ppc_md.nvram_size == NULL || ppc_md.nvram_size() <= 0)
                return  -ENODEV;
@@ -537,29 +551,6 @@ static int __init nvram_init(void)
                return rc;
        }
        
-        /* initialize our anchor for the nvram partition list */
-        nvram_part = kmalloc(sizeof(struct nvram_partition), GFP_KERNEL);
-        if (!nvram_part) {
-                printk(KERN_ERR "nvram_init: Failed kmalloc\n");
-                return -ENOMEM;
-        }
-        INIT_LIST_HEAD(&nvram_part->partition);
-  
-        /* Get all the NVRAM partitions */
-        error = nvram_scan_partitions();
-        if (error) {
-                printk(KERN_ERR "nvram_init: Failed nvram_scan_partitions\n");
-                return error;
-        }
-                
-        if(nvram_setup_partition()) 
-                printk(KERN_WARNING "nvram_init: Could not find nvram partition"
-                       " for nvram buffered error logging.\n");
-  
-#ifdef DEBUG_NVRAM
-        nvram_print_partitions("NVRAM Partitions");
-#endif
        return rc;
 }
@@ -568,135 +559,6 @@ void __exit nvram_cleanup(void)
        misc_deregister( &nvram_dev );
 }
-#ifdef CONFIG_PPC_PSERIES
-/* nvram_write_error_log
- *
- * We need to buffer the error logs into nvram to ensure that we have
- * the failure information to decode.  If we have a severe error there
- * is no way to guarantee that the OS or the machine is in a state to
- * get back to user land and write the error to disk.  For example if
- * the SCSI device driver causes a Machine Check by writing to a bad
- * IO address, there is no way of guaranteeing that the device driver
- * is in any state that is would also be able to write the error data
- * captured to disk, thus we buffer it in NVRAM for analysis on the
- * next boot.
- *
- * In NVRAM the partition containing the error log buffer will looks like:
- * Header (in bytes):
- * +-----------+----------+--------+------------+------------------+
- * | signature | checksum | length | name       | data             |
- * |0          |1         |2      3|4         15|16        length-1|
- * +-----------+----------+--------+------------+------------------+
- *
- * The 'data' section would look like (in bytes):
- * +--------------+------------+-----------------------------------+
- * | event_logged | sequence # | error log                         |
- * |0            3|4          7|8            nvram_error_log_size-1|
- * +--------------+------------+-----------------------------------+
- *
- * event_logged: 0 if event has not been logged to syslog, 1 if it has
- * sequence #: The unique sequence # for each event. (until it wraps)
- * error log: The error log from event_scan
- */
-int nvram_write_error_log(char * buff, int length,
-                          unsigned int err_type, unsigned int error_log_cnt)
-{
-        int rc;
-        loff_t tmp_index;
-        struct err_log_info info;
-        
-        if (nvram_error_log_index == -1) {
-                return -ESPIPE;
-        }
-        if (length > nvram_error_log_size) {
-                length = nvram_error_log_size;
-        }
-        info.error_type = err_type;
-        info.seq_num = error_log_cnt;
-        tmp_index = nvram_error_log_index;
-        rc = ppc_md.nvram_write((char *)&info, sizeof(struct err_log_info), &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_write_error_log: Failed nvram_write (%d)\n", rc);
-                return rc;
-        }
-        rc = ppc_md.nvram_write(buff, length, &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_write_error_log: Failed nvram_write (%d)\n", rc);
-                return rc;
-        }
-        
-        return 0;
-}
-/* nvram_read_error_log
- *
- * Reads nvram for error log for at most 'length'
- */
-int nvram_read_error_log(char * buff, int length,
-                         unsigned int * err_type, unsigned int * error_log_cnt)
-{
-        int rc;
-        loff_t tmp_index;
-        struct err_log_info info;
-        
-        if (nvram_error_log_index == -1)
-                return -1;
-        if (length > nvram_error_log_size)
-                length = nvram_error_log_size;
-        tmp_index = nvram_error_log_index;
-        rc = ppc_md.nvram_read((char *)&info, sizeof(struct err_log_info), &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_read_error_log: Failed nvram_read (%d)\n", rc);
-                return rc;
-        }
-        rc = ppc_md.nvram_read(buff, length, &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_read_error_log: Failed nvram_read (%d)\n", rc);
-                return rc;
-        }
-        *error_log_cnt = info.seq_num;
-        *err_type = info.error_type;
-        return 0;
-}
-/* This doesn't actually zero anything, but it sets the event_logged
- * word to tell that this event is safely in syslog.
- */
-int nvram_clear_error_log(void)
-{
-        loff_t tmp_index;
-        int clear_word = ERR_FLAG_ALREADY_LOGGED;
-        int rc;
-        if (nvram_error_log_index == -1)
-                return -1;
-        tmp_index = nvram_error_log_index;
-        
-        rc = ppc_md.nvram_write((char *)&clear_word, sizeof(int), &tmp_index);
-        if (rc <= 0) {
-                printk(KERN_ERR "nvram_clear_error_log: Failed nvram_write (%d)\n", rc);
-                return rc;
-        }
-        return 0;
-}
-#endif /* CONFIG_PPC_PSERIES */
 module_init(nvram_init);
 module_exit(nvram_cleanup);
 MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/kernel/of_platform.c b/arch/powerpc/kernel/of_platform.c
index b2c363ef38ad..24582181b6ec 100644
--- a/arch/powerpc/kernel/of_platform.c
+++ b/arch/powerpc/kernel/of_platform.c
@@ -36,8 +36,7 @@
 * lacking some bits needed here.
 */
-static int __devinit of_pci_phb_probe(struct platform_device *dev,
+static int __devinit of_pci_phb_probe(struct platform_device *dev)
-                                      const struct of_device_id *match)
 {
        struct pci_controller *phb;
@@ -74,7 +73,7 @@ static int __devinit of_pci_phb_probe(struct platform_device *dev,
 #endif /* CONFIG_EEH */
        /* Scan the bus */
-        pcibios_scan_phb(phb, dev->dev.of_node);
+        pcibios_scan_phb(phb);
        if (phb->bus == NULL)
                return -ENXIO;
@@ -104,7 +103,7 @@ static struct of_device_id of_pci_phb_ids[] = {
        {}
 };
-static struct of_platform_driver of_pci_phb_driver = {
+static struct platform_driver of_pci_phb_driver = {
        .probe = of_pci_phb_probe,
        .driver = {
                .name = "of-pci",
@@ -115,7 +114,7 @@ static struct of_platform_driver of_pci_phb_driver = {
 static __init int of_pci_phb_init(void)
 {
-        return of_register_platform_driver(&of_pci_phb_driver);
+        return platform_driver_register(&of_pci_phb_driver);
 }
 device_initcall(of_pci_phb_init);
diff --git a/arch/powerpc/kernel/paca.c b/arch/powerpc/kernel/paca.c
index d0a26f1770fe..efeb88184182 100644
--- a/arch/powerpc/kernel/paca.c
+++ b/arch/powerpc/kernel/paca.c
@@ -7,7 +7,7 @@
 *      2 of the License, or (at your option) any later version.
 */
-#include <linux/threads.h>
+#include <linux/smp.h>
 #include <linux/module.h>
 #include <linux/memblock.h>
@@ -36,7 +36,7 @@ extern unsigned long __toc_start;
 * will suffice to ensure that it doesn't cross a page boundary.
 */
 struct lppaca lppaca[] = {
-        [0 ... (NR_CPUS-1)] = {
+        [0 ... (NR_LPPACAS-1)] = {
                .desc = 0xd397d781,     /* "LpPa" */
                .size = sizeof(struct lppaca),
                .dyn_proc_status = 2,
@@ -49,6 +49,54 @@ struct lppaca lppaca[] = {
        },
 };
+static struct lppaca *extra_lppacas;
+static long __initdata lppaca_size;
+static void allocate_lppacas(int nr_cpus, unsigned long limit)
+{
+        if (nr_cpus <= NR_LPPACAS)
+                return;
+        lppaca_size = PAGE_ALIGN(sizeof(struct lppaca) *
+                                 (nr_cpus - NR_LPPACAS));
+        extra_lppacas = __va(memblock_alloc_base(lppaca_size,
+                                                 PAGE_SIZE, limit));
+}
+static struct lppaca *new_lppaca(int cpu)
+{
+        struct lppaca *lp;
+        if (cpu < NR_LPPACAS)
+                return &lppaca[cpu];
+        lp = extra_lppacas + (cpu - NR_LPPACAS);
+        *lp = lppaca[0];
+        return lp;
+}
+static void free_lppacas(void)
+{
+        long new_size = 0, nr;
+        if (!lppaca_size)
+                return;
+        nr = num_possible_cpus() - NR_LPPACAS;
+        if (nr > 0)
+                new_size = PAGE_ALIGN(nr * sizeof(struct lppaca));
+        if (new_size >= lppaca_size)
+                return;
+        memblock_free(__pa(extra_lppacas) + new_size, lppaca_size - new_size);
+        lppaca_size = new_size;
+}
+#else
+static inline void allocate_lppacas(int nr_cpus, unsigned long limit) { }
+static inline void free_lppacas(void) { }
 #endif /* CONFIG_PPC_BOOK3S */
 #ifdef CONFIG_PPC_STD_MMU_64
@@ -88,7 +136,7 @@ void __init initialise_paca(struct paca_struct *new_paca, int cpu)
        unsigned long kernel_toc = (unsigned long)(&__toc_start) + 0x8000UL;
 #ifdef CONFIG_PPC_BOOK3S
-        new_paca->lppaca_ptr = &lppaca[cpu];
+        new_paca->lppaca_ptr = new_lppaca(cpu);
 #else
        new_paca->kernel_pgd = swapper_pg_dir;
 #endif
@@ -108,18 +156,29 @@ void __init initialise_paca(struct paca_struct *new_paca, int cpu)
 /* Put the paca pointer into r13 and SPRG_PACA */
 void setup_paca(struct paca_struct *new_paca)
 {
+        /* Setup r13 */
        local_paca = new_paca;
-        mtspr(SPRN_SPRG_PACA, local_paca);
 #ifdef CONFIG_PPC_BOOK3E
+        /* On Book3E, initialize the TLB miss exception frames */
        mtspr(SPRN_SPRG_TLB_EXFRAME, local_paca->extlb);
+#else
+        /* In HV mode, we setup both HPACA and PACA to avoid problems
+         * if we do a GET_PACA() before the feature fixups have been
+         * applied
+         */
+        if (cpu_has_feature(CPU_FTR_HVMODE_206))
+                mtspr(SPRN_SPRG_HPACA, local_paca);
 #endif
+        mtspr(SPRN_SPRG_PACA, local_paca);
 }
 static int __initdata paca_size;
 void __init allocate_pacas(void)
 {
-        int nr_cpus, cpu, limit;
+        int cpu, limit;
        /*
         * We can't take SLB misses on the paca, and we want to access them
@@ -127,25 +186,22 @@ void __init allocate_pacas(void)
         * the first segment. On iSeries they must be within the area mapped
         * by the HV, which is HvPagesToMap * HVPAGESIZE bytes.
         */
-        limit = min(0x10000000ULL, memblock.rmo_size);
+        limit = min(0x10000000ULL, ppc64_rma_size);
        if (firmware_has_feature(FW_FEATURE_ISERIES))
                limit = min(limit, HvPagesToMap * HVPAGESIZE);
-        nr_cpus = NR_CPUS;
+        paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
-        /* On iSeries we know we can never have more than 64 cpus */
-        if (firmware_has_feature(FW_FEATURE_ISERIES))
-                nr_cpus = min(64, nr_cpus);
-        paca_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpus);
        paca = __va(memblock_alloc_base(paca_size, PAGE_SIZE, limit));
        memset(paca, 0, paca_size);
        printk(KERN_DEBUG "Allocated %u bytes for %d pacas at %p\n",
-                paca_size, nr_cpus, paca);
+                paca_size, nr_cpu_ids, paca);
+        allocate_lppacas(nr_cpu_ids, limit);
        /* Can't use for_each_*_cpu, as they aren't functional yet */
-        for (cpu = 0; cpu < nr_cpus; cpu++)
+        for (cpu = 0; cpu < nr_cpu_ids; cpu++)
                initialise_paca(&paca[cpu], cpu);
 }
@@ -153,7 +209,7 @@ void __init free_unused_pacas(void)
 {
        int new_size;
-        new_size = PAGE_ALIGN(sizeof(struct paca_struct) * num_possible_cpus());
+        new_size = PAGE_ALIGN(sizeof(struct paca_struct) * nr_cpu_ids);
        if (new_size >= paca_size)
                return;
@@ -164,4 +220,6 @@ void __init free_unused_pacas(void)
                paca_size - new_size);
        paca_size = new_size;
+        free_lppacas();
 }
diff --git a/arch/powerpc/kernel/pci-common.c b/arch/powerpc/kernel/pci-common.c
index 9021c4ad4bbd..893af2a9cd03 100644
--- a/arch/powerpc/kernel/pci-common.c
+++ b/arch/powerpc/kernel/pci-common.c
@@ -22,6 +22,7 @@
 #include <linux/init.h>
 #include <linux/bootmem.h>
 #include <linux/of_address.h>
+#include <linux/of_pci.h>
 #include <linux/mm.h>
 #include <linux/list.h>
 #include <linux/syscalls.h>
@@ -260,7 +261,7 @@ int pci_read_irq_line(struct pci_dev *pci_dev)
                virq = irq_create_mapping(NULL, line);
                if (virq != NO_IRQ)
-                        set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
        } else {
                pr_debug(" Got one, spec %d cells (0x%08x 0x%08x...) on %s\n",
                         oirq.size, oirq.specifier[0], oirq.specifier[1],
@@ -1090,8 +1091,6 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
                 bus->number, bus->self ? pci_name(bus->self) : "PHB");
        list_for_each_entry(dev, &bus->devices, bus_list) {
-                struct dev_archdata *sd = &dev->dev.archdata;
                /* Cardbus can call us to add new devices to a bus, so ignore
                 * those who are already fully discovered
                 */
@@ -1107,7 +1106,7 @@ void __devinit pcibios_setup_bus_devices(struct pci_bus *bus)
                set_dev_node(&dev->dev, pcibus_to_node(dev->bus));
                /* Hook up default DMA ops */
-                sd->dma_ops = pci_dma_ops;
+                set_dma_ops(&dev->dev, pci_dma_ops);
                set_dma_offset(&dev->dev, PCI_DRAM_OFFSET);
                /* Additional platform DMA/iommu setup */
@@ -1689,13 +1688,8 @@ int early_find_capability(struct pci_controller *hose, int bus, int devfn,
 /**
 * pci_scan_phb - Given a pci_controller, setup and scan the PCI bus
 * @hose: Pointer to the PCI host controller instance structure
- * @sysdata: value to use for sysdata pointer.  ppc32 and ppc64 differ here
- *
- * Note: the 'data' pointer is a temporary measure.  As 32 and 64 bit
- * pci code gets merged, this parameter should become unnecessary because
- * both will use the same value.
 */
-void __devinit pcibios_scan_phb(struct pci_controller *hose, void *sysdata)
+void __devinit pcibios_scan_phb(struct pci_controller *hose)
 {
        struct pci_bus *bus;
        struct device_node *node = hose->dn;
@@ -1705,13 +1699,13 @@ void __devinit pcibios_scan_phb(struct pci_controller *hose, void *sysdata)
                 node ? node->full_name : "<NO NAME>");
        /* Create an empty bus for the toplevel */
-        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops,
+        bus = pci_create_bus(hose->parent, hose->first_busno, hose->ops, hose);
-                             sysdata);
        if (bus == NULL) {
                pr_err("Failed to create bus for PCI domain %04x\n",
                        hose->global_number);
                return;
        }
+        bus->dev.of_node = of_node_get(node);
        bus->secondary = hose->first_busno;
        hose->bus = bus;
diff --git a/arch/powerpc/kernel/pci_32.c b/arch/powerpc/kernel/pci_32.c
index e7db5b48004a..bedb370459f2 100644
--- a/arch/powerpc/kernel/pci_32.c
+++ b/arch/powerpc/kernel/pci_32.c
@@ -381,7 +381,7 @@ static int __init pcibios_init(void)
                if (pci_assign_all_buses)
                        hose->first_busno = next_busno;
                hose->last_busno = 0xff;
-                pcibios_scan_phb(hose, hose);
+                pcibios_scan_phb(hose);
                pci_bus_add_devices(hose->bus);
                if (pci_assign_all_buses || next_busno <= hose->last_busno)
                        next_busno = hose->last_busno + pcibios_assign_bus_offset;
diff --git a/arch/powerpc/kernel/pci_64.c b/arch/powerpc/kernel/pci_64.c
index d43fc65749c1..fc6452b6be9f 100644
--- a/arch/powerpc/kernel/pci_64.c
+++ b/arch/powerpc/kernel/pci_64.c
@@ -64,7 +64,7 @@ static int __init pcibios_init(void)
        /* Scan all of the recorded PCI controllers.  */
        list_for_each_entry_safe(hose, tmp, &hose_list, list_node) {
-                pcibios_scan_phb(hose, hose->dn);
+                pcibios_scan_phb(hose);
                pci_bus_add_devices(hose->bus);
        }
@@ -193,8 +193,7 @@ int __devinit pcibios_map_io_space(struct pci_bus *bus)
        hose->io_resource.start += io_virt_offset;
        hose->io_resource.end += io_virt_offset;
-        pr_debug("  hose->io_resource=0x%016llx...0x%016llx\n",
+        pr_debug("  hose->io_resource=%pR\n", &hose->io_resource);
-                 hose->io_resource.start, hose->io_resource.end);
        return 0;
 }
@@ -243,10 +242,10 @@ long sys_pciconfig_iobase(long which, unsigned long in_bus,
                        break;
                bus = NULL;
        }
-        if (bus == NULL || bus->sysdata == NULL)
+        if (bus == NULL || bus->dev.of_node == NULL)
                return -ENODEV;
-        hose_node = (struct device_node *)bus->sysdata;
+        hose_node = bus->dev.of_node;
        hose = PCI_DN(hose_node)->phb;
        switch (which) {
diff --git a/arch/powerpc/kernel/pci_dn.c b/arch/powerpc/kernel/pci_dn.c
index d56b35ee7f74..6baabc13306a 100644
--- a/arch/powerpc/kernel/pci_dn.c
+++ b/arch/powerpc/kernel/pci_dn.c
@@ -43,10 +43,9 @@ void * __devinit update_dn_pci_info(struct device_node *dn, void *data)
        const u32 *regs;
        struct pci_dn *pdn;
-        pdn = alloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL);
+        pdn = zalloc_maybe_bootmem(sizeof(*pdn), GFP_KERNEL);
        if (pdn == NULL)
                return NULL;
-        memset(pdn, 0, sizeof(*pdn));
        dn->data = pdn;
        pdn->node = dn;
        pdn->phb = phb;
@@ -161,7 +160,7 @@ static void *is_devfn_node(struct device_node *dn, void *data)
 /*
 * This is the "slow" path for looking up a device_node from a
 * pci_dev.  It will hunt for the device under its parent's
- * phb and then update sysdata for a future fastpath.
+ * phb and then update of_node pointer.
 *
 * It may also do fixups on the actual device since this happens
 * on the first read/write.
@@ -170,16 +169,22 @@ static void *is_devfn_node(struct device_node *dn, void *data)
 * In this case it may probe for real hardware ("just in case")
 * and add a device_node to the device tree if necessary.
 *
+ * Is this function necessary anymore now that dev->dev.of_node is
+ * used to store the node pointer?
+ *
 */
 struct device_node *fetch_dev_dn(struct pci_dev *dev)
 {
-        struct device_node *orig_dn = dev->sysdata;
+        struct pci_controller *phb = dev->sysdata;
        struct device_node *dn;
        unsigned long searchval = (dev->bus->number << 8) | dev->devfn;
-        dn = traverse_pci_devices(orig_dn, is_devfn_node, (void *)searchval);
+        if (WARN_ON(!phb))
+                return NULL;
+        dn = traverse_pci_devices(phb->dn, is_devfn_node, (void *)searchval);
        if (dn)
-                dev->sysdata = dn;
+                dev->dev.of_node = dn;
        return dn;
 }
 EXPORT_SYMBOL(fetch_dev_dn);
diff --git a/arch/powerpc/kernel/pci_of_scan.c b/arch/powerpc/kernel/pci_of_scan.c
index e751506323b4..1e89a72fd030 100644
--- a/arch/powerpc/kernel/pci_of_scan.c
+++ b/arch/powerpc/kernel/pci_of_scan.c
@@ -135,7 +135,7 @@ struct pci_dev *of_create_pci_dev(struct device_node *node,
        pr_debug("    create device, devfn: %x, type: %s\n", devfn, type);
        dev->bus = bus;
-        dev->sysdata = node;
+        dev->dev.of_node = of_node_get(node);
        dev->dev.parent = bus->bridge;
        dev->dev.bus = &pci_bus_type;
        dev->devfn = devfn;
@@ -238,7 +238,7 @@ void __devinit of_scan_pci_bridge(struct device_node *node,
        bus->primary = dev->bus->number;
        bus->subordinate = busrange[1];
        bus->bridge_ctl = 0;
-        bus->sysdata = node;
+        bus->dev.of_node = of_node_get(node);
        /* parse ranges property */
        /* PCI #address-cells == 3 and #size-cells == 2 always */
diff --git a/arch/powerpc/kernel/perf_callchain.c b/arch/powerpc/kernel/perf_callchain.c
index 95ad9dad298e..d05ae4204bbf 100644
--- a/arch/powerpc/kernel/perf_callchain.c
+++ b/arch/powerpc/kernel/perf_callchain.c
@@ -23,18 +23,6 @@
 #include "ppc32.h"
 #endif
-/*
- * Store another value in a callchain_entry.
- */
-static inline void callchain_store(struct perf_callchain_entry *entry, u64 ip)
-{
-        unsigned int nr = entry->nr;
-        if (nr < PERF_MAX_STACK_DEPTH) {
-                entry->ip[nr] = ip;
-                entry->nr = nr + 1;
-        }
-}
 /*
 * Is sp valid as the address of the next kernel stack frame after prev_sp?
@@ -58,8 +46,8 @@ static int valid_next_sp(unsigned long sp, unsigned long prev_sp)
        return 0;
 }
-static void perf_callchain_kernel(struct pt_regs *regs,
+void
-                                  struct perf_callchain_entry *entry)
+perf_callchain_kernel(struct perf_callchain_entry *entry, struct pt_regs *regs)
 {
        unsigned long sp, next_sp;
        unsigned long next_ip;
@@ -69,8 +57,7 @@ static void perf_callchain_kernel(struct pt_regs *regs,
        lr = regs->link;
        sp = regs->gpr[1];
-        callchain_store(entry, PERF_CONTEXT_KERNEL);
+        perf_callchain_store(entry, regs->nip);
-        callchain_store(entry, regs->nip);
        if (!validate_sp(sp, current, STACK_FRAME_OVERHEAD))
                return;
@@ -89,7 +76,7 @@ static void perf_callchain_kernel(struct pt_regs *regs,
                        next_ip = regs->nip;
                        lr = regs->link;
                        level = 0;
-                        callchain_store(entry, PERF_CONTEXT_KERNEL);
+                        perf_callchain_store(entry, PERF_CONTEXT_KERNEL);
                } else {
                        if (level == 0)
@@ -111,7 +98,7 @@ static void perf_callchain_kernel(struct pt_regs *regs,
                        ++level;
                }
-                callchain_store(entry, next_ip);
+                perf_callchain_store(entry, next_ip);
                if (!valid_next_sp(next_sp, sp))
                        return;
                sp = next_sp;
@@ -233,8 +220,8 @@ static int sane_signal_64_frame(unsigned long sp)
                puc == (unsigned long) &sf->uc;
 }
-static void perf_callchain_user_64(struct pt_regs *regs,
+static void perf_callchain_user_64(struct perf_callchain_entry *entry,
-                                   struct perf_callchain_entry *entry)
+                                   struct pt_regs *regs)
 {
        unsigned long sp, next_sp;
        unsigned long next_ip;
@@ -246,8 +233,7 @@ static void perf_callchain_user_64(struct pt_regs *regs,
        next_ip = regs->nip;
        lr = regs->link;
        sp = regs->gpr[1];
-        callchain_store(entry, PERF_CONTEXT_USER);
+        perf_callchain_store(entry, next_ip);
-        callchain_store(entry, next_ip);
        for (;;) {
                fp = (unsigned long __user *) sp;
@@ -276,14 +262,14 @@ static void perf_callchain_user_64(struct pt_regs *regs,
                            read_user_stack_64(&uregs[PT_R1], &sp))
                                return;
                        level = 0;
-                        callchain_store(entry, PERF_CONTEXT_USER);
+                        perf_callchain_store(entry, PERF_CONTEXT_USER);
-                        callchain_store(entry, next_ip);
+                        perf_callchain_store(entry, next_ip);
                        continue;
                }
                if (level == 0)
                        next_ip = lr;
-                callchain_store(entry, next_ip);
+                perf_callchain_store(entry, next_ip);
                ++level;
                sp = next_sp;
        }
@@ -315,8 +301,8 @@ static int read_user_stack_32(unsigned int __user *ptr, unsigned int *ret)
        return __get_user_inatomic(*ret, ptr);
 }
-static inline void perf_callchain_user_64(struct pt_regs *regs,
+static inline void perf_callchain_user_64(struct perf_callchain_entry *entry,
-                                          struct perf_callchain_entry *entry)
+                                          struct pt_regs *regs)
 {
 }
@@ -435,8 +421,8 @@ static unsigned int __user *signal_frame_32_regs(unsigned int sp,
        return mctx->mc_gregs;
 }
-static void perf_callchain_user_32(struct pt_regs *regs,
+static void perf_callchain_user_32(struct perf_callchain_entry *entry,
-                                   struct perf_callchain_entry *entry)
+                                   struct pt_regs *regs)
 {
        unsigned int sp, next_sp;
        unsigned int next_ip;
@@ -447,8 +433,7 @@ static void perf_callchain_user_32(struct pt_regs *regs,
        next_ip = regs->nip;
        lr = regs->link;
        sp = regs->gpr[1];
-        callchain_store(entry, PERF_CONTEXT_USER);
+        perf_callchain_store(entry, next_ip);
-        callchain_store(entry, next_ip);
        while (entry->nr < PERF_MAX_STACK_DEPTH) {
                fp = (unsigned int __user *) (unsigned long) sp;
@@ -470,45 +455,24 @@ static void perf_callchain_user_32(struct pt_regs *regs,
                            read_user_stack_32(&uregs[PT_R1], &sp))
                                return;
                        level = 0;
-                        callchain_store(entry, PERF_CONTEXT_USER);
+                        perf_callchain_store(entry, PERF_CONTEXT_USER);
-                        callchain_store(entry, next_ip);
+                        perf_callchain_store(entry, next_ip);
                        continue;
                }
                if (level == 0)
                        next_ip = lr;
-                callchain_store(entry, next_ip);
+                perf_callchain_store(entry, next_ip);
                ++level;
                sp = next_sp;
        }
 }
-/*
+void
- * Since we can't get PMU interrupts inside a PMU interrupt handler,
+perf_callchain_user(struct perf_callchain_entry *entry, struct pt_regs *regs)
- * we don't need separate irq and nmi entries here.
- */
-static DEFINE_PER_CPU(struct perf_callchain_entry, cpu_perf_callchain);
-struct perf_callchain_entry *perf_callchain(struct pt_regs *regs)
 {
-        struct perf_callchain_entry *entry = &__get_cpu_var(cpu_perf_callchain);
+        if (current_is_64bit())
+                perf_callchain_user_64(entry, regs);
-        entry->nr = 0;
+        else
+                perf_callchain_user_32(entry, regs);
-        if (!user_mode(regs)) {
-                perf_callchain_kernel(regs, entry);
-                if (current->mm)
-                        regs = task_pt_regs(current);
-                else
-                        regs = NULL;
-        }
-        if (regs) {
-                if (current_is_64bit())
-                        perf_callchain_user_64(regs, entry);
-                else
-                        perf_callchain_user_32(regs, entry);
-        }
-        return entry;
 }
diff --git a/arch/powerpc/kernel/perf_event.c b/arch/powerpc/kernel/perf_event.c
index d301a30445e0..822f63008ae1 100644
--- a/arch/powerpc/kernel/perf_event.c
+++ b/arch/powerpc/kernel/perf_event.c
@@ -398,10 +398,32 @@ static int check_excludes(struct perf_event **ctrs, unsigned int cflags[],
        return 0;
 }
+static u64 check_and_compute_delta(u64 prev, u64 val)
+{
+        u64 delta = (val - prev) & 0xfffffffful;
+        /*
+         * POWER7 can roll back counter values, if the new value is smaller
+         * than the previous value it will cause the delta and the counter to
+         * have bogus values unless we rolled a counter over.  If a coutner is
+         * rolled back, it will be smaller, but within 256, which is the maximum
+         * number of events to rollback at once.  If we dectect a rollback
+         * return 0.  This can lead to a small lack of precision in the
+         * counters.
+         */
+        if (prev > val && (prev - val) < 256)
+                delta = 0;
+        return delta;
+}
 static void power_pmu_read(struct perf_event *event)
 {
        s64 val, delta, prev;
+        if (event->hw.state & PERF_HES_STOPPED)
+                return;
        if (!event->hw.idx)
                return;
        /*
@@ -413,10 +435,11 @@ static void power_pmu_read(struct perf_event *event)
                prev = local64_read(&event->hw.prev_count);
                barrier();
                val = read_pmc(event->hw.idx);
+                delta = check_and_compute_delta(prev, val);
+                if (!delta)
+                        return;
        } while (local64_cmpxchg(&event->hw.prev_count, prev, val) != prev);
-        /* The counters are only 32 bits wide */
-        delta = (val - prev) & 0xfffffffful;
        local64_add(delta, &event->count);
        local64_sub(delta, &event->hw.period_left);
 }
@@ -446,8 +469,9 @@ static void freeze_limited_counters(struct cpu_hw_events *cpuhw,
                val = (event->hw.idx == 5) ? pmc5 : pmc6;
                prev = local64_read(&event->hw.prev_count);
                event->hw.idx = 0;
-                delta = (val - prev) & 0xfffffffful;
+                delta = check_and_compute_delta(prev, val);
-                local64_add(delta, &event->count);
+                if (delta)
+                        local64_add(delta, &event->count);
        }
 }
@@ -455,14 +479,16 @@ static void thaw_limited_counters(struct cpu_hw_events *cpuhw,
                                  unsigned long pmc5, unsigned long pmc6)
 {
        struct perf_event *event;
-        u64 val;
+        u64 val, prev;
        int i;
        for (i = 0; i < cpuhw->n_limited; ++i) {
                event = cpuhw->limited_counter[i];
                event->hw.idx = cpuhw->limited_hwidx[i];
                val = (event->hw.idx == 5) ? pmc5 : pmc6;
-                local64_set(&event->hw.prev_count, val);
+                prev = local64_read(&event->hw.prev_count);
+                if (check_and_compute_delta(prev, val))
+                        local64_set(&event->hw.prev_count, val);
                perf_event_update_userpage(event);
        }
 }
@@ -517,7 +543,7 @@ static void write_mmcr0(struct cpu_hw_events *cpuhw, unsigned long mmcr0)
 * Disable all events to prevent PMU interrupts and to allow
 * events to be added or removed.
 */
-void hw_perf_disable(void)
+static void power_pmu_disable(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw;
        unsigned long flags;
@@ -565,7 +591,7 @@ void hw_perf_disable(void)
 * If we were previously disabled and events were added, then
 * put the new config on the PMU.
 */
-void hw_perf_enable(void)
+static void power_pmu_enable(struct pmu *pmu)
 {
        struct perf_event *event;
        struct cpu_hw_events *cpuhw;
@@ -672,6 +698,8 @@ void hw_perf_enable(void)
                }
                local64_set(&event->hw.prev_count, val);
                event->hw.idx = idx;
+                if (event->hw.state & PERF_HES_STOPPED)
+                        val = 0;
                write_pmc(idx, val);
                perf_event_update_userpage(event);
        }
@@ -727,7 +755,7 @@ static int collect_events(struct perf_event *group, int max_count,
 * re-enable the PMU in order to get hw_perf_enable to do the
 * actual work of reconfiguring the PMU.
 */
-static int power_pmu_enable(struct perf_event *event)
+static int power_pmu_add(struct perf_event *event, int ef_flags)
 {
        struct cpu_hw_events *cpuhw;
        unsigned long flags;
@@ -735,7 +763,7 @@ static int power_pmu_enable(struct perf_event *event)
        int ret = -EAGAIN;
        local_irq_save(flags);
-        perf_disable();
+        perf_pmu_disable(event->pmu);
        /*
         * Add the event to the list (if there is room)
@@ -749,9 +777,12 @@ static int power_pmu_enable(struct perf_event *event)
        cpuhw->events[n0] = event->hw.config;
        cpuhw->flags[n0] = event->hw.event_base;
+        if (!(ef_flags & PERF_EF_START))
+                event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
        /*
         * If group events scheduling transaction was started,
-         * skip the schedulability test here, it will be peformed
+         * skip the schedulability test here, it will be performed
         * at commit time(->commit_txn) as a whole
         */
        if (cpuhw->group_flag & PERF_EVENT_TXN)
@@ -769,7 +800,7 @@ nocheck:
        ret = 0;
 out:
-        perf_enable();
+        perf_pmu_enable(event->pmu);
        local_irq_restore(flags);
        return ret;
 }
@@ -777,14 +808,14 @@ nocheck:
 /*
 * Remove a event from the PMU.
 */
-static void power_pmu_disable(struct perf_event *event)
+static void power_pmu_del(struct perf_event *event, int ef_flags)
 {
        struct cpu_hw_events *cpuhw;
        long i;
        unsigned long flags;
        local_irq_save(flags);
-        perf_disable();
+        perf_pmu_disable(event->pmu);
        power_pmu_read(event);
@@ -821,34 +852,60 @@ static void power_pmu_disable(struct perf_event *event)
                cpuhw->mmcr[0] &= ~(MMCR0_PMXE | MMCR0_FCECE);
        }
-        perf_enable();
+        perf_pmu_enable(event->pmu);
        local_irq_restore(flags);
 }
 /*
- * Re-enable interrupts on a event after they were throttled
+ * POWER-PMU does not support disabling individual counters, hence
- * because they were coming too fast.
+ * program their cycle counter to their max value and ignore the interrupts.
 */
-static void power_pmu_unthrottle(struct perf_event *event)
+static void power_pmu_start(struct perf_event *event, int ef_flags)
+{
+        unsigned long flags;
+        s64 left;
+        if (!event->hw.idx || !event->hw.sample_period)
+                return;
+        if (!(event->hw.state & PERF_HES_STOPPED))
+                return;
+        if (ef_flags & PERF_EF_RELOAD)
+                WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE));
+        local_irq_save(flags);
+        perf_pmu_disable(event->pmu);
+        event->hw.state = 0;
+        left = local64_read(&event->hw.period_left);
+        write_pmc(event->hw.idx, left);
+        perf_event_update_userpage(event);
+        perf_pmu_enable(event->pmu);
+        local_irq_restore(flags);
+}
+static void power_pmu_stop(struct perf_event *event, int ef_flags)
 {
-        s64 val, left;
        unsigned long flags;
        if (!event->hw.idx || !event->hw.sample_period)
                return;
+        if (event->hw.state & PERF_HES_STOPPED)
+                return;
        local_irq_save(flags);
-        perf_disable();
+        perf_pmu_disable(event->pmu);
        power_pmu_read(event);
-        left = event->hw.sample_period;
+        event->hw.state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
-        event->hw.last_period = left;
+        write_pmc(event->hw.idx, 0);
-        val = 0;
-        if (left < 0x80000000L)
-                val = 0x80000000L - left;
-        write_pmc(event->hw.idx, val);
-        local64_set(&event->hw.prev_count, val);
-        local64_set(&event->hw.period_left, left);
        perf_event_update_userpage(event);
-        perf_enable();
+        perf_pmu_enable(event->pmu);
        local_irq_restore(flags);
 }
@@ -857,10 +914,11 @@ static void power_pmu_unthrottle(struct perf_event *event)
 * Set the flag to make pmu::enable() not perform the
 * schedulability test, it will be performed at commit time
 */
-void power_pmu_start_txn(const struct pmu *pmu)
+void power_pmu_start_txn(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
+        perf_pmu_disable(pmu);
        cpuhw->group_flag |= PERF_EVENT_TXN;
        cpuhw->n_txn_start = cpuhw->n_events;
 }
@@ -870,11 +928,12 @@ void power_pmu_start_txn(const struct pmu *pmu)
 * Clear the flag and pmu::enable() will perform the
 * schedulability test.
 */
-void power_pmu_cancel_txn(const struct pmu *pmu)
+void power_pmu_cancel_txn(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw = &__get_cpu_var(cpu_hw_events);
        cpuhw->group_flag &= ~PERF_EVENT_TXN;
+        perf_pmu_enable(pmu);
 }
 /*
@@ -882,7 +941,7 @@ void power_pmu_cancel_txn(const struct pmu *pmu)
 * Perform the group schedulability test as a whole
 * Return 0 if success
 */
-int power_pmu_commit_txn(const struct pmu *pmu)
+int power_pmu_commit_txn(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw;
        long i, n;
@@ -901,19 +960,10 @@ int power_pmu_commit_txn(const struct pmu *pmu)
                cpuhw->event[i]->hw.config = cpuhw->events[i];
        cpuhw->group_flag &= ~PERF_EVENT_TXN;
+        perf_pmu_enable(pmu);
        return 0;
 }
-struct pmu power_pmu = {
-        .enable         = power_pmu_enable,
-        .disable        = power_pmu_disable,
-        .read           = power_pmu_read,
-        .unthrottle     = power_pmu_unthrottle,
-        .start_txn      = power_pmu_start_txn,
-        .cancel_txn     = power_pmu_cancel_txn,
-        .commit_txn     = power_pmu_commit_txn,
-};
 /*
 * Return 1 if we might be able to put event on a limited PMC,
 * or 0 if not.
@@ -1014,7 +1064,7 @@ static int hw_perf_cache_event(u64 config, u64 *eventp)
        return 0;
 }
-const struct pmu *hw_perf_event_init(struct perf_event *event)
+static int power_pmu_event_init(struct perf_event *event)
 {
        u64 ev;
        unsigned long flags;
@@ -1026,25 +1076,27 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
        struct cpu_hw_events *cpuhw;
        if (!ppmu)
-                return ERR_PTR(-ENXIO);
+                return -ENOENT;
        switch (event->attr.type) {
        case PERF_TYPE_HARDWARE:
                ev = event->attr.config;
                if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
-                        return ERR_PTR(-EOPNOTSUPP);
+                        return -EOPNOTSUPP;
                ev = ppmu->generic_events[ev];
                break;
        case PERF_TYPE_HW_CACHE:
                err = hw_perf_cache_event(event->attr.config, &ev);
                if (err)
-                        return ERR_PTR(err);
+                        return err;
                break;
        case PERF_TYPE_RAW:
                ev = event->attr.config;
                break;
        default:
-                return ERR_PTR(-EINVAL);
+                return -ENOENT;
        }
        event->hw.config_base = ev;
        event->hw.idx = 0;
@@ -1063,7 +1115,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
         * XXX we should check if the task is an idle task.
         */
        flags = 0;
-        if (event->ctx->task)
+        if (event->attach_state & PERF_ATTACH_TASK)
                flags |= PPMU_ONLY_COUNT_RUN;
        /*
@@ -1081,7 +1133,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
                         */
                        ev = normal_pmc_alternative(ev, flags);
                        if (!ev)
-                                return ERR_PTR(-EINVAL);
+                                return -EINVAL;
                }
        }
@@ -1095,19 +1147,19 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
                n = collect_events(event->group_leader, ppmu->n_counter - 1,
                                   ctrs, events, cflags);
                if (n < 0)
-                        return ERR_PTR(-EINVAL);
+                        return -EINVAL;
        }
        events[n] = ev;
        ctrs[n] = event;
        cflags[n] = flags;
        if (check_excludes(ctrs, cflags, n, 1))
-                return ERR_PTR(-EINVAL);
+                return -EINVAL;
        cpuhw = &get_cpu_var(cpu_hw_events);
        err = power_check_constraints(cpuhw, events, cflags, n + 1);
        put_cpu_var(cpu_hw_events);
        if (err)
-                return ERR_PTR(-EINVAL);
+                return -EINVAL;
        event->hw.config = events[n];
        event->hw.event_base = cflags[n];
@@ -1132,11 +1184,23 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
        }
        event->destroy = hw_perf_event_destroy;
-        if (err)
+        return err;
-                return ERR_PTR(err);
-        return &power_pmu;
 }
+struct pmu power_pmu = {
+        .pmu_enable     = power_pmu_enable,
+        .pmu_disable    = power_pmu_disable,
+        .event_init     = power_pmu_event_init,
+        .add            = power_pmu_add,
+        .del            = power_pmu_del,
+        .start          = power_pmu_start,
+        .stop           = power_pmu_stop,
+        .read           = power_pmu_read,
+        .start_txn      = power_pmu_start_txn,
+        .cancel_txn     = power_pmu_cancel_txn,
+        .commit_txn     = power_pmu_commit_txn,
+};
 /*
 * A counter has overflowed; update its count and record
 * things if requested.  Note that interrupts are hard-disabled
@@ -1149,9 +1213,14 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
        s64 prev, delta, left;
        int record = 0;
+        if (event->hw.state & PERF_HES_STOPPED) {
+                write_pmc(event->hw.idx, 0);
+                return;
+        }
        /* we don't have to worry about interrupts here */
        prev = local64_read(&event->hw.prev_count);
-        delta = (val - prev) & 0xfffffffful;
+        delta = check_and_compute_delta(prev, val);
        local64_add(delta, &event->count);
        /*
@@ -1166,11 +1235,17 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                        if (left <= 0)
                                left = period;
                        record = 1;
+                        event->hw.last_period = event->hw.sample_period;
                }
                if (left < 0x80000000LL)
                        val = 0x80000000LL - left;
        }
+        write_pmc(event->hw.idx, val);
+        local64_set(&event->hw.prev_count, val);
+        local64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
        /*
         * Finally record data if requested.
         */
@@ -1183,23 +1258,9 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                if (event->attr.sample_type & PERF_SAMPLE_ADDR)
                        perf_get_data_addr(regs, &data.addr);
-                if (perf_event_overflow(event, nmi, &data, regs)) {
+                if (perf_event_overflow(event, nmi, &data, regs))
-                        /*
+                        power_pmu_stop(event, 0);
-                         * Interrupts are coming too fast - throttle them
-                         * by setting the event to 0, so it will be
-                         * at least 2^30 cycles until the next interrupt
-                         * (assuming each event counts at most 2 counts
-                         * per cycle).
-                         */
-                        val = 0;
-                        left = ~0ULL >> 1;
-                }
        }
-        write_pmc(event->hw.idx, val);
-        local64_set(&event->hw.prev_count, val);
-        local64_set(&event->hw.period_left, left);
-        perf_event_update_userpage(event);
 }
 /*
@@ -1231,6 +1292,28 @@ unsigned long perf_instruction_pointer(struct pt_regs *regs)
        return ip;
 }
+static bool pmc_overflow(unsigned long val)
+{
+        if ((int)val < 0)
+                return true;
+        /*
+         * Events on POWER7 can roll back if a speculative event doesn't
+         * eventually complete. Unfortunately in some rare cases they will
+         * raise a performance monitor exception. We need to catch this to
+         * ensure we reset the PMC. In all cases the PMC will be 256 or less
+         * cycles from overflow.
+         *
+         * We only do this if the first pass fails to find any overflowing
+         * PMCs because a user might set a period of less than 256 and we
+         * don't want to mistakenly reset them.
+         */
+        if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256))
+                return true;
+        return false;
+}
 /*
 * Performance monitor interrupt stuff
 */
@@ -1278,7 +1361,7 @@ static void perf_event_interrupt(struct pt_regs *regs)
                        if (is_limited_pmc(i + 1))
                                continue;
                        val = read_pmc(i + 1);
-                        if ((int)val < 0)
+                        if (pmc_overflow(val))
                                write_pmc(i + 1, 0);
                }
        }
@@ -1342,6 +1425,7 @@ int register_power_pmu(struct power_pmu *pmu)
                freeze_events_kernel = MMCR0_FCHV;
 #endif /* CONFIG_PPC64 */
+        perf_pmu_register(&power_pmu, "cpu", PERF_TYPE_RAW);
        perf_cpu_notifier(power_pmu_notifier);
        return 0;
diff --git a/arch/powerpc/kernel/perf_event_fsl_emb.c b/arch/powerpc/kernel/perf_event_fsl_emb.c
index 1ba45471ae43..b0dc8f7069cd 100644
--- a/arch/powerpc/kernel/perf_event_fsl_emb.c
+++ b/arch/powerpc/kernel/perf_event_fsl_emb.c
@@ -156,6 +156,9 @@ static void fsl_emb_pmu_read(struct perf_event *event)
 {
        s64 val, delta, prev;
+        if (event->hw.state & PERF_HES_STOPPED)
+                return;
        /*
         * Performance monitor interrupts come even when interrupts
         * are soft-disabled, as long as interrupts are hard-enabled.
@@ -177,7 +180,7 @@ static void fsl_emb_pmu_read(struct perf_event *event)
 * Disable all events to prevent PMU interrupts and to allow
 * events to be added or removed.
 */
-void hw_perf_disable(void)
+static void fsl_emb_pmu_disable(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw;
        unsigned long flags;
@@ -216,7 +219,7 @@ void hw_perf_disable(void)
 * If we were previously disabled and events were added, then
 * put the new config on the PMU.
 */
-void hw_perf_enable(void)
+static void fsl_emb_pmu_enable(struct pmu *pmu)
 {
        struct cpu_hw_events *cpuhw;
        unsigned long flags;
@@ -262,8 +265,8 @@ static int collect_events(struct perf_event *group, int max_count,
        return n;
 }
-/* perf must be disabled, context locked on entry */
+/* context locked on entry */
-static int fsl_emb_pmu_enable(struct perf_event *event)
+static int fsl_emb_pmu_add(struct perf_event *event, int flags)
 {
        struct cpu_hw_events *cpuhw;
        int ret = -EAGAIN;
@@ -271,6 +274,7 @@ static int fsl_emb_pmu_enable(struct perf_event *event)
        u64 val;
        int i;
+        perf_pmu_disable(event->pmu);
        cpuhw = &get_cpu_var(cpu_hw_events);
        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED)
@@ -301,6 +305,12 @@ static int fsl_emb_pmu_enable(struct perf_event *event)
                        val = 0x80000000L - left;
        }
        local64_set(&event->hw.prev_count, val);
+        if (!(flags & PERF_EF_START)) {
+                event->hw.state = PERF_HES_STOPPED | PERF_HES_UPTODATE;
+                val = 0;
+        }
        write_pmc(i, val);
        perf_event_update_userpage(event);
@@ -310,15 +320,17 @@ static int fsl_emb_pmu_enable(struct perf_event *event)
        ret = 0;
 out:
        put_cpu_var(cpu_hw_events);
+        perf_pmu_enable(event->pmu);
        return ret;
 }
-/* perf must be disabled, context locked on entry */
+/* context locked on entry */
-static void fsl_emb_pmu_disable(struct perf_event *event)
+static void fsl_emb_pmu_del(struct perf_event *event, int flags)
 {
        struct cpu_hw_events *cpuhw;
        int i = event->hw.idx;
+        perf_pmu_disable(event->pmu);
        if (i < 0)
                goto out;
@@ -346,44 +358,57 @@ static void fsl_emb_pmu_disable(struct perf_event *event)
        cpuhw->n_events--;
 out:
+        perf_pmu_enable(event->pmu);
        put_cpu_var(cpu_hw_events);
 }
-/*
+static void fsl_emb_pmu_start(struct perf_event *event, int ef_flags)
- * Re-enable interrupts on a event after they were throttled
- * because they were coming too fast.
- *
- * Context is locked on entry, but perf is not disabled.
- */
-static void fsl_emb_pmu_unthrottle(struct perf_event *event)
 {
-        s64 val, left;
        unsigned long flags;
+        s64 left;
        if (event->hw.idx < 0 || !event->hw.sample_period)
                return;
+        if (!(event->hw.state & PERF_HES_STOPPED))
+                return;
+        if (ef_flags & PERF_EF_RELOAD)
+                WARN_ON_ONCE(!(event->hw.state & PERF_HES_UPTODATE));
        local_irq_save(flags);
-        perf_disable();
+        perf_pmu_disable(event->pmu);
-        fsl_emb_pmu_read(event);
-        left = event->hw.sample_period;
+        event->hw.state = 0;
-        event->hw.last_period = left;
+        left = local64_read(&event->hw.period_left);
-        val = 0;
+        write_pmc(event->hw.idx, left);
-        if (left < 0x80000000L)
-                val = 0x80000000L - left;
-        write_pmc(event->hw.idx, val);
-        local64_set(&event->hw.prev_count, val);
-        local64_set(&event->hw.period_left, left);
        perf_event_update_userpage(event);
-        perf_enable();
+        perf_pmu_enable(event->pmu);
        local_irq_restore(flags);
 }
-static struct pmu fsl_emb_pmu = {
+static void fsl_emb_pmu_stop(struct perf_event *event, int ef_flags)
-        .enable         = fsl_emb_pmu_enable,
+{
-        .disable        = fsl_emb_pmu_disable,
+        unsigned long flags;
-        .read           = fsl_emb_pmu_read,
-        .unthrottle     = fsl_emb_pmu_unthrottle,
+        if (event->hw.idx < 0 || !event->hw.sample_period)
-};
+                return;
+        if (event->hw.state & PERF_HES_STOPPED)
+                return;
+        local_irq_save(flags);
+        perf_pmu_disable(event->pmu);
+        fsl_emb_pmu_read(event);
+        event->hw.state |= PERF_HES_STOPPED | PERF_HES_UPTODATE;
+        write_pmc(event->hw.idx, 0);
+        perf_event_update_userpage(event);
+        perf_pmu_enable(event->pmu);
+        local_irq_restore(flags);
+}
 /*
 * Release the PMU if this is the last perf_event.
@@ -428,7 +453,7 @@ static int hw_perf_cache_event(u64 config, u64 *eventp)
        return 0;
 }
-const struct pmu *hw_perf_event_init(struct perf_event *event)
+static int fsl_emb_pmu_event_init(struct perf_event *event)
 {
        u64 ev;
        struct perf_event *events[MAX_HWEVENTS];
@@ -441,14 +466,14 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
        case PERF_TYPE_HARDWARE:
                ev = event->attr.config;
                if (ev >= ppmu->n_generic || ppmu->generic_events[ev] == 0)
-                        return ERR_PTR(-EOPNOTSUPP);
+                        return -EOPNOTSUPP;
                ev = ppmu->generic_events[ev];
                break;
        case PERF_TYPE_HW_CACHE:
                err = hw_perf_cache_event(event->attr.config, &ev);
                if (err)
-                        return ERR_PTR(err);
+                        return err;
                break;
        case PERF_TYPE_RAW:
@@ -456,12 +481,12 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
                break;
        default:
-                return ERR_PTR(-EINVAL);
+                return -ENOENT;
        }
        event->hw.config = ppmu->xlate_event(ev);
        if (!(event->hw.config & FSL_EMB_EVENT_VALID))
-                return ERR_PTR(-EINVAL);
+                return -EINVAL;
        /*
         * If this is in a group, check if it can go on with all the
@@ -473,7 +498,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
                n = collect_events(event->group_leader,
                                   ppmu->n_counter - 1, events);
                if (n < 0)
-                        return ERR_PTR(-EINVAL);
+                        return -EINVAL;
        }
        if (event->hw.config & FSL_EMB_EVENT_RESTRICTED) {
@@ -484,7 +509,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
                }
                if (num_restricted >= ppmu->n_restricted)
-                        return ERR_PTR(-EINVAL);
+                        return -EINVAL;
        }
        event->hw.idx = -1;
@@ -497,7 +522,7 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
        if (event->attr.exclude_kernel)
                event->hw.config_base |= PMLCA_FCS;
        if (event->attr.exclude_idle)
-                return ERR_PTR(-ENOTSUPP);
+                return -ENOTSUPP;
        event->hw.last_period = event->hw.sample_period;
        local64_set(&event->hw.period_left, event->hw.last_period);
@@ -523,11 +548,20 @@ const struct pmu *hw_perf_event_init(struct perf_event *event)
        }
        event->destroy = hw_perf_event_destroy;
-        if (err)
+        return err;
-                return ERR_PTR(err);
-        return &fsl_emb_pmu;
 }
+static struct pmu fsl_emb_pmu = {
+        .pmu_enable     = fsl_emb_pmu_enable,
+        .pmu_disable    = fsl_emb_pmu_disable,
+        .event_init     = fsl_emb_pmu_event_init,
+        .add            = fsl_emb_pmu_add,
+        .del            = fsl_emb_pmu_del,
+        .start          = fsl_emb_pmu_start,
+        .stop           = fsl_emb_pmu_stop,
+        .read           = fsl_emb_pmu_read,
+};
 /*
 * A counter has overflowed; update its count and record
 * things if requested.  Note that interrupts are hard-disabled
@@ -540,6 +574,11 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
        s64 prev, delta, left;
        int record = 0;
+        if (event->hw.state & PERF_HES_STOPPED) {
+                write_pmc(event->hw.idx, 0);
+                return;
+        }
        /* we don't have to worry about interrupts here */
        prev = local64_read(&event->hw.prev_count);
        delta = (val - prev) & 0xfffffffful;
@@ -557,11 +596,17 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                        if (left <= 0)
                                left = period;
                        record = 1;
+                        event->hw.last_period = event->hw.sample_period;
                }
                if (left < 0x80000000LL)
                        val = 0x80000000LL - left;
        }
+        write_pmc(event->hw.idx, val);
+        local64_set(&event->hw.prev_count, val);
+        local64_set(&event->hw.period_left, left);
+        perf_event_update_userpage(event);
        /*
         * Finally record data if requested.
         */
@@ -571,23 +616,9 @@ static void record_and_restart(struct perf_event *event, unsigned long val,
                perf_sample_data_init(&data, 0);
                data.period = event->hw.last_period;
-                if (perf_event_overflow(event, nmi, &data, regs)) {
+                if (perf_event_overflow(event, nmi, &data, regs))
-                        /*
+                        fsl_emb_pmu_stop(event, 0);
-                         * Interrupts are coming too fast - throttle them
-                         * by setting the event to 0, so it will be
-                         * at least 2^30 cycles until the next interrupt
-                         * (assuming each event counts at most 2 counts
-                         * per cycle).
-                         */
-                        val = 0;
-                        left = ~0ULL >> 1;
-                }
        }
-        write_pmc(event->hw.idx, val);
-        local64_set(&event->hw.prev_count, val);
-        local64_set(&event->hw.period_left, left);
-        perf_event_update_userpage(event);
 }
 static void perf_event_interrupt(struct pt_regs *regs)
@@ -651,5 +682,7 @@ int register_fsl_emb_pmu(struct fsl_emb_pmu *pmu)
        pr_info("%s performance monitor hardware support registered\n",
                pmu->name);
+        perf_pmu_register(&fsl_emb_pmu, "cpu", PERF_TYPE_RAW);
        return 0;
 }
diff --git a/arch/powerpc/kernel/power4-pmu.c b/arch/powerpc/kernel/power4-pmu.c
index 2a361cdda635..ead8b3c2649e 100644
--- a/arch/powerpc/kernel/power4-pmu.c
+++ b/arch/powerpc/kernel/power4-pmu.c
@@ -613,4 +613,4 @@ static int init_power4_pmu(void)
        return register_power_pmu(&power4_pmu);
 }
-arch_initcall(init_power4_pmu);
+early_initcall(init_power4_pmu);
diff --git a/arch/powerpc/kernel/power5+-pmu.c b/arch/powerpc/kernel/power5+-pmu.c
index 199de527d411..eca0ac595cb6 100644
--- a/arch/powerpc/kernel/power5+-pmu.c
+++ b/arch/powerpc/kernel/power5+-pmu.c
@@ -682,4 +682,4 @@ static int init_power5p_pmu(void)
        return register_power_pmu(&power5p_pmu);
 }
-arch_initcall(init_power5p_pmu);
+early_initcall(init_power5p_pmu);
diff --git a/arch/powerpc/kernel/power5-pmu.c b/arch/powerpc/kernel/power5-pmu.c
index 98b6a729a9dd..d5ff0f64a5e6 100644
--- a/arch/powerpc/kernel/power5-pmu.c
+++ b/arch/powerpc/kernel/power5-pmu.c
@@ -621,4 +621,4 @@ static int init_power5_pmu(void)
        return register_power_pmu(&power5_pmu);
 }
-arch_initcall(init_power5_pmu);
+early_initcall(init_power5_pmu);
diff --git a/arch/powerpc/kernel/power6-pmu.c b/arch/powerpc/kernel/power6-pmu.c
index 84a607bda8fb..31603927e376 100644
--- a/arch/powerpc/kernel/power6-pmu.c
+++ b/arch/powerpc/kernel/power6-pmu.c
@@ -544,4 +544,4 @@ static int init_power6_pmu(void)
        return register_power_pmu(&power6_pmu);
 }
-arch_initcall(init_power6_pmu);
+early_initcall(init_power6_pmu);
diff --git a/arch/powerpc/kernel/power7-pmu.c b/arch/powerpc/kernel/power7-pmu.c
index 852f7b7f6b40..593740fcb799 100644
--- a/arch/powerpc/kernel/power7-pmu.c
+++ b/arch/powerpc/kernel/power7-pmu.c
@@ -369,4 +369,4 @@ static int init_power7_pmu(void)
        return register_power_pmu(&power7_pmu);
 }
-arch_initcall(init_power7_pmu);
+early_initcall(init_power7_pmu);
diff --git a/arch/powerpc/kernel/ppc970-pmu.c b/arch/powerpc/kernel/ppc970-pmu.c
index 8eff48e20dba..9a6e093858fe 100644
--- a/arch/powerpc/kernel/ppc970-pmu.c
+++ b/arch/powerpc/kernel/ppc970-pmu.c
@@ -169,9 +169,11 @@ static int p970_marked_instr_event(u64 event)
        switch (unit) {
        case PM_VPU:
                mask = 0x4c;            /* byte 0 bits 2,3,6 */
+                break;
        case PM_LSU0:
                /* byte 2 bits 0,2,3,4,6; all of byte 1 */
                mask = 0x085dff00;
+                break;
        case PM_LSU1L:
                mask = 0x50 << 24;      /* byte 3 bits 4,6 */
                break;
@@ -492,4 +494,4 @@ static int init_ppc970_pmu(void)
        return register_power_pmu(&ppc970_pmu);
 }
-arch_initcall(init_ppc970_pmu);
+early_initcall(init_ppc970_pmu);
diff --git a/arch/powerpc/kernel/ppc_ksyms.c b/arch/powerpc/kernel/ppc_ksyms.c
index ab3e392ac63c..7d28f540200c 100644
--- a/arch/powerpc/kernel/ppc_ksyms.c
+++ b/arch/powerpc/kernel/ppc_ksyms.c
@@ -54,7 +54,6 @@ extern void single_step_exception(struct pt_regs *regs);
 extern int sys_sigreturn(struct pt_regs *regs);
 EXPORT_SYMBOL(clear_pages);
-EXPORT_SYMBOL(copy_page);
 EXPORT_SYMBOL(ISA_DMA_THRESHOLD);
 EXPORT_SYMBOL(DMA_MODE_READ);
 EXPORT_SYMBOL(DMA_MODE_WRITE);
@@ -88,9 +87,7 @@ EXPORT_SYMBOL(__copy_tofrom_user);
 EXPORT_SYMBOL(__clear_user);
 EXPORT_SYMBOL(__strncpy_from_user);
 EXPORT_SYMBOL(__strnlen_user);
-#ifdef CONFIG_PPC64
+EXPORT_SYMBOL(copy_page);
-EXPORT_SYMBOL(copy_4K_page);
-#endif
 #if defined(CONFIG_PCI) && defined(CONFIG_PPC32)
 EXPORT_SYMBOL(isa_io_base);
@@ -186,3 +183,10 @@ EXPORT_SYMBOL(__mtdcr);
 EXPORT_SYMBOL(__mfdcr);
 #endif
 EXPORT_SYMBOL(empty_zero_page);
+#ifdef CONFIG_PPC64
+EXPORT_SYMBOL(__arch_hweight8);
+EXPORT_SYMBOL(__arch_hweight16);
+EXPORT_SYMBOL(__arch_hweight32);
+EXPORT_SYMBOL(__arch_hweight64);
+#endif
diff --git a/arch/powerpc/kernel/ppc_save_regs.S b/arch/powerpc/kernel/ppc_save_regs.S
index 5113bd2285e1..1b1787d52896 100644
--- a/arch/powerpc/kernel/ppc_save_regs.S
+++ b/arch/powerpc/kernel/ppc_save_regs.S
@@ -11,10 +11,11 @@
 #include <asm/processor.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
 /*
 * Grab the register values as they are now.
- * This won't do a particularily good job because we really
+ * This won't do a particularly good job because we really
 * want our caller's caller's registers, and our caller has
 * already executed its prologue.
 * ToDo: We could reach back into the caller's save area to do
diff --git a/arch/powerpc/kernel/process.c b/arch/powerpc/kernel/process.c
index b1c648a36b03..91e52df3d81d 100644
--- a/arch/powerpc/kernel/process.c
+++ b/arch/powerpc/kernel/process.c
@@ -353,6 +353,7 @@ static void switch_booke_debug_regs(struct thread_struct *new_thread)
                        prime_debug_regs(new_thread);
 }
 #else   /* !CONFIG_PPC_ADV_DEBUG_REGS */
+#ifndef CONFIG_HAVE_HW_BREAKPOINT
 static void set_debug_reg_defaults(struct thread_struct *thread)
 {
        if (thread->dabr) {
@@ -360,6 +361,7 @@ static void set_debug_reg_defaults(struct thread_struct *thread)
                set_dabr(0);
        }
 }
+#endif /* !CONFIG_HAVE_HW_BREAKPOINT */
 #endif  /* CONFIG_PPC_ADV_DEBUG_REGS */
 int set_dabr(unsigned long dabr)
@@ -393,6 +395,9 @@ struct task_struct *__switch_to(struct task_struct *prev,
        struct thread_struct *new_thread, *old_thread;
        unsigned long flags;
        struct task_struct *last;
+#ifdef CONFIG_PPC_BOOK3S_64
+        struct ppc64_tlb_batch *batch;
+#endif
 #ifdef CONFIG_SMP
        /* avoid complexity of lazy save/restore of fpu
@@ -511,13 +516,22 @@ struct task_struct *__switch_to(struct task_struct *prev,
                old_thread->accum_tb += (current_tb - start_tb);
                new_thread->start_tb = current_tb;
        }
-#endif
+#endif /* CONFIG_PPC64 */
+#ifdef CONFIG_PPC_BOOK3S_64
+        batch = &__get_cpu_var(ppc64_tlb_batch);
+        if (batch->active) {
+                current_thread_info()->local_flags |= _TLF_LAZY_MMU;
+                if (batch->index)
+                        __flush_tlb_pending(batch);
+                batch->active = 0;
+        }
+#endif /* CONFIG_PPC_BOOK3S_64 */
        local_irq_save(flags);
        account_system_vtime(current);
        account_process_vtime(current);
-        calculate_steal_time();
        /*
         * We can't take a PMU exception inside _switch() since there is a
@@ -527,6 +541,14 @@ struct task_struct *__switch_to(struct task_struct *prev,
        hard_irq_disable();
        last = _switch(old_thread, new_thread);
+#ifdef CONFIG_PPC_BOOK3S_64
+        if (current_thread_info()->local_flags & _TLF_LAZY_MMU) {
+                current_thread_info()->local_flags &= ~_TLF_LAZY_MMU;
+                batch = &__get_cpu_var(ppc64_tlb_batch);
+                batch->active = 1;
+        }
+#endif /* CONFIG_PPC_BOOK3S_64 */
        local_irq_restore(flags);
        return last;
@@ -632,7 +654,7 @@ void show_regs(struct pt_regs * regs)
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
                printk("DEAR: "REG", ESR: "REG"\n", regs->dar, regs->dsisr);
 #else
-                printk("DAR: "REG", DSISR: "REG"\n", regs->dar, regs->dsisr);
+                printk("DAR: "REG", DSISR: %08lx\n", regs->dar, regs->dsisr);
 #endif
        printk("TASK = %p[%d] '%s' THREAD: %p",
               current, task_pid_nr(current), current->comm, task_thread_info(current));
@@ -671,11 +693,11 @@ void flush_thread(void)
 {
        discard_lazy_cpu_state();
-#ifdef CONFIG_HAVE_HW_BREAKPOINTS
+#ifdef CONFIG_HAVE_HW_BREAKPOINT
        flush_ptrace_hw_breakpoint(current);
-#else /* CONFIG_HAVE_HW_BREAKPOINTS */
+#else /* CONFIG_HAVE_HW_BREAKPOINT */
        set_debug_reg_defaults(&current->thread);
-#endif /* CONFIG_HAVE_HW_BREAKPOINTS */
+#endif /* CONFIG_HAVE_HW_BREAKPOINT */
 }
 void
@@ -701,6 +723,8 @@ void prepare_to_copy(struct task_struct *tsk)
 /*
 * Copy a thread..
 */
+extern unsigned long dscr_default; /* defined in arch/powerpc/kernel/sysfs.c */
 int copy_thread(unsigned long clone_flags, unsigned long usp,
                unsigned long unused, struct task_struct *p,
                struct pt_regs *regs)
@@ -754,11 +778,11 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
                                _ALIGN_UP(sizeof(struct thread_info), 16);
 #ifdef CONFIG_PPC_STD_MMU_64
-        if (cpu_has_feature(CPU_FTR_SLB)) {
+        if (mmu_has_feature(MMU_FTR_SLB)) {
                unsigned long sp_vsid;
                unsigned long llp = mmu_psize_defs[mmu_linear_psize].sllp;
-                if (cpu_has_feature(CPU_FTR_1T_SEGMENT))
+                if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
                        sp_vsid = get_kernel_vsid(sp, MMU_SEGSIZE_1T)
                                << SLB_VSID_SHIFT_1T;
                else
@@ -768,6 +792,20 @@ int copy_thread(unsigned long clone_flags, unsigned long usp,
                p->thread.ksp_vsid = sp_vsid;
        }
 #endif /* CONFIG_PPC_STD_MMU_64 */
+#ifdef CONFIG_PPC64 
+        if (cpu_has_feature(CPU_FTR_DSCR)) {
+                if (current->thread.dscr_inherit) {
+                        p->thread.dscr_inherit = 1;
+                        p->thread.dscr = current->thread.dscr;
+                } else if (0 != dscr_default) {
+                        p->thread.dscr_inherit = 1;
+                        p->thread.dscr = dscr_default;
+                } else {
+                        p->thread.dscr_inherit = 0;
+                        p->thread.dscr = 0;
+                }
+        }
+#endif
        /*
         * The PPC64 ABI makes use of a TOC to contain function 
@@ -1217,11 +1255,11 @@ void __ppc64_runlatch_off(void)
 static struct kmem_cache *thread_info_cache;
-struct thread_info *alloc_thread_info(struct task_struct *tsk)
+struct thread_info *alloc_thread_info_node(struct task_struct *tsk, int node)
 {
        struct thread_info *ti;
-        ti = kmem_cache_alloc(thread_info_cache, GFP_KERNEL);
+        ti = kmem_cache_alloc_node(thread_info_cache, GFP_KERNEL, node);
        if (unlikely(ti == NULL))
                return NULL;
 #ifdef CONFIG_DEBUG_STACK_USAGE
@@ -1298,14 +1336,3 @@ unsigned long randomize_et_dyn(unsigned long base)
        return ret;
 }
-#ifdef CONFIG_SMP
-int arch_sd_sibling_asym_packing(void)
-{
-        if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
-                printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
-                return SD_ASYM_PACKING;
-        }
-        return 0;
-}
-#endif
diff --git a/arch/powerpc/kernel/prom.c b/arch/powerpc/kernel/prom.c
index fed9bf6187d1..8c3112a57cf2 100644
--- a/arch/powerpc/kernel/prom.c
+++ b/arch/powerpc/kernel/prom.c
@@ -66,7 +66,9 @@
 int __initdata iommu_is_off;
 int __initdata iommu_force_on;
 unsigned long tce_alloc_start, tce_alloc_end;
+u64 ppc64_rma_size;
 #endif
+static phys_addr_t first_memblock_size;
 static int __init early_parse_mem(char *p)
 {
@@ -80,11 +82,29 @@ static int __init early_parse_mem(char *p)
 }
 early_param("mem", early_parse_mem);
+/*
+ * overlaps_initrd - check for overlap with page aligned extension of
+ * initrd.
+ */
+static inline int overlaps_initrd(unsigned long start, unsigned long size)
+{
+#ifdef CONFIG_BLK_DEV_INITRD
+        if (!initrd_start)
+                return 0;
+        return  (start + size) > _ALIGN_DOWN(initrd_start, PAGE_SIZE) &&
+                        start <= _ALIGN_UP(initrd_end, PAGE_SIZE);
+#else
+        return 0;
+#endif
+}
 /**
 * move_device_tree - move tree to an unused area, if needed.
 *
 * The device tree may be allocated beyond our memory limit, or inside the
- * crash kernel region for kdump. If so, move it out of the way.
+ * crash kernel region for kdump, or within the page aligned range of initrd.
+ * If so, move it out of the way.
 */
 static void __init move_device_tree(void)
 {
@@ -96,9 +116,10 @@ static void __init move_device_tree(void)
        start = __pa(initial_boot_params);
        size = be32_to_cpu(initial_boot_params->totalsize);
-        if ((memory_limit && (start + size) > memory_limit) ||
+        if ((memory_limit && (start + size) > PHYSICAL_START + memory_limit) ||
-                        overlaps_crashkernel(start, size)) {
+                        overlaps_crashkernel(start, size) ||
-                p = __va(memblock_alloc_base(size, PAGE_SIZE, memblock.rmo_size));
+                        overlaps_initrd(start, size)) {
+                p = __va(memblock_alloc(size, PAGE_SIZE));
                memcpy(p, initial_boot_params, size);
                initial_boot_params = (struct boot_param_header *)p;
                DBG("Moved device tree to 0x%p\n", p);
@@ -122,18 +143,19 @@ static void __init move_device_tree(void)
 */
 static struct ibm_pa_feature {
        unsigned long   cpu_features;   /* CPU_FTR_xxx bit */
+        unsigned long   mmu_features;   /* MMU_FTR_xxx bit */
        unsigned int    cpu_user_ftrs;  /* PPC_FEATURE_xxx bit */
        unsigned char   pabyte;         /* byte number in ibm,pa-features */
        unsigned char   pabit;          /* bit number (big-endian) */
        unsigned char   invert;         /* if 1, pa bit set => clear feature */
 } ibm_pa_features[] __initdata = {
-        {0, PPC_FEATURE_HAS_MMU,        0, 0, 0},
+        {0, 0, PPC_FEATURE_HAS_MMU,     0, 0, 0},
-        {0, PPC_FEATURE_HAS_FPU,        0, 1, 0},
+        {0, 0, PPC_FEATURE_HAS_FPU,     0, 1, 0},
-        {CPU_FTR_SLB, 0,                0, 2, 0},
+        {0, MMU_FTR_SLB, 0,             0, 2, 0},
-        {CPU_FTR_CTRL, 0,               0, 3, 0},
+        {CPU_FTR_CTRL, 0, 0,            0, 3, 0},
-        {CPU_FTR_NOEXECUTE, 0,          0, 6, 0},
+        {CPU_FTR_NOEXECUTE, 0, 0,       0, 6, 0},
-        {CPU_FTR_NODSISRALIGN, 0,       1, 1, 1},
+        {CPU_FTR_NODSISRALIGN, 0, 0,    1, 1, 1},
-        {CPU_FTR_CI_LARGE_PAGE, 0,      1, 2, 0},
+        {0, MMU_FTR_CI_LARGE_PAGE, 0,   1, 2, 0},
        {CPU_FTR_REAL_LE, PPC_FEATURE_TRUE_LE, 5, 0, 0},
 };
@@ -165,9 +187,11 @@ static void __init scan_features(unsigned long node, unsigned char *ftrs,
                if (bit ^ fp->invert) {
                        cur_cpu_spec->cpu_features |= fp->cpu_features;
                        cur_cpu_spec->cpu_user_features |= fp->cpu_user_ftrs;
+                        cur_cpu_spec->mmu_features |= fp->mmu_features;
                } else {
                        cur_cpu_spec->cpu_features &= ~fp->cpu_features;
                        cur_cpu_spec->cpu_user_features &= ~fp->cpu_user_ftrs;
+                        cur_cpu_spec->mmu_features &= ~fp->mmu_features;
                }
        }
 }
@@ -267,13 +291,13 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                                          const char *uname, int depth,
                                          void *data)
 {
-        static int logical_cpuid = 0;
        char *type = of_get_flat_dt_prop(node, "device_type", NULL);
        const u32 *prop;
        const u32 *intserv;
        int i, nthreads;
        unsigned long len;
-        int found = 0;
+        int found = -1;
+        int found_thread = 0;
        /* We are scanning "cpu" nodes only */
        if (type == NULL || strcmp(type, "cpu") != 0)
@@ -297,11 +321,10 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                 * version 2 of the kexec param format adds the phys cpuid of
                 * booted proc.
                 */
-                if (initial_boot_params && initial_boot_params->version >= 2) {
+                if (initial_boot_params->version >= 2) {
-                        if (intserv[i] ==
+                        if (intserv[i] == initial_boot_params->boot_cpuid_phys) {
-                                        initial_boot_params->boot_cpuid_phys) {
+                                found = boot_cpu_count;
-                                found = 1;
+                                found_thread = i;
-                                break;
                        }
                } else {
                        /*
@@ -310,23 +333,20 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
                         * off secondary threads.
                         */
                        if (of_get_flat_dt_prop(node,
-                                        "linux,boot-cpu", NULL) != NULL) {
+                                        "linux,boot-cpu", NULL) != NULL)
-                                found = 1;
+                                found = boot_cpu_count;
-                                break;
-                        }
                }
 #ifdef CONFIG_SMP
                /* logical cpu id is always 0 on UP kernels */
-                logical_cpuid++;
+                boot_cpu_count++;
 #endif
        }
-        if (found) {
+        if (found >= 0) {
-                DBG("boot cpu: logical %d physical %d\n", logical_cpuid,
+                DBG("boot cpu: logical %d physical %d\n", found,
-                        intserv[i]);
+                        intserv[found_thread]);
-                boot_cpuid = logical_cpuid;
+                boot_cpuid = found;
-                set_hard_smp_processor_id(boot_cpuid, intserv[i]);
+                set_hard_smp_processor_id(found, intserv[found_thread]);
                /*
                 * PAPR defines "logical" PVR values for cpus that
@@ -363,10 +383,15 @@ static int __init early_init_dt_scan_cpus(unsigned long node,
        return 0;
 }
-void __init early_init_dt_scan_chosen_arch(unsigned long node)
+int __init early_init_dt_scan_chosen_ppc(unsigned long node, const char *uname,
+                                         int depth, void *data)
 {
        unsigned long *lprop;
+        /* Use common scan routine to determine if this is the chosen node */
+        if (early_init_dt_scan_chosen(node, uname, depth, data) == 0)
+                return 0;
 #ifdef CONFIG_PPC64
        /* check if iommu is forced on or off */
        if (of_get_flat_dt_prop(node, "linux,iommu-off", NULL) != NULL)
@@ -398,6 +423,9 @@ void __init early_init_dt_scan_chosen_arch(unsigned long node)
        if (lprop)
                crashk_res.end = crashk_res.start + *lprop - 1;
 #endif
+        /* break now */
+        return 1;
 }
 #ifdef CONFIG_PPC_PSERIES
@@ -492,7 +520,7 @@ static int __init early_init_dt_scan_memory_ppc(unsigned long node,
 void __init early_init_dt_add_memory_arch(u64 base, u64 size)
 {
-#if defined(CONFIG_PPC64)
+#ifdef CONFIG_PPC64
        if (iommu_is_off) {
                if (base >= 0x80000000ul)
                        return;
@@ -500,15 +528,22 @@ void __init early_init_dt_add_memory_arch(u64 base, u64 size)
                        size = 0x80000000ul - base;
        }
 #endif
+        /* Keep track of the beginning of memory -and- the size of
+         * the very first block in the device-tree as it represents
+         * the RMA on ppc64 server
+         */
+        if (base < memstart_addr) {
+                memstart_addr = base;
+                first_memblock_size = size;
+        }
+        /* Add the chunk to the MEMBLOCK list */
        memblock_add(base, size);
-        memstart_addr = min((u64)memstart_addr, base);
 }
-u64 __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
+void * __init early_init_dt_alloc_memory_arch(u64 size, u64 align)
 {
-        return memblock_alloc(size, align);
+        return __va(memblock_alloc(size, align));
 }
 #ifdef CONFIG_BLK_DEV_INITRD
@@ -539,7 +574,9 @@ static void __init early_reserve_mem(void)
 #ifdef CONFIG_BLK_DEV_INITRD
        /* then reserve the initrd, if any */
        if (initrd_start && (initrd_end > initrd_start))
-                memblock_reserve(__pa(initrd_start), initrd_end - initrd_start);
+                memblock_reserve(_ALIGN_DOWN(__pa(initrd_start), PAGE_SIZE),
+                        _ALIGN_UP(initrd_end, PAGE_SIZE) -
+                        _ALIGN_DOWN(initrd_start, PAGE_SIZE));
 #endif /* CONFIG_BLK_DEV_INITRD */
 #ifdef CONFIG_PPC32
@@ -655,7 +692,6 @@ static void __init phyp_dump_reserve_mem(void)
 static inline void __init phyp_dump_reserve_mem(void) {}
 #endif /* CONFIG_PHYP_DUMP  && CONFIG_PPC_RTAS */
 void __init early_init_devtree(void *params)
 {
        phys_addr_t limit;
@@ -671,7 +707,7 @@ void __init early_init_devtree(void *params)
 #endif
 #ifdef CONFIG_PHYP_DUMP
-        /* scan tree to see if dump occured during last boot */
+        /* scan tree to see if dump occurred during last boot */
        of_scan_flat_dt(early_init_dt_scan_phyp_dump, NULL);
 #endif
@@ -679,12 +715,14 @@ void __init early_init_devtree(void *params)
         * device-tree, including the platform type, initrd location and
         * size, TCE reserve, and more ...
         */
-        of_scan_flat_dt(early_init_dt_scan_chosen, NULL);
+        of_scan_flat_dt(early_init_dt_scan_chosen_ppc, cmd_line);
        /* Scan memory nodes and rebuild MEMBLOCKs */
        memblock_init();
        of_scan_flat_dt(early_init_dt_scan_root, NULL);
        of_scan_flat_dt(early_init_dt_scan_memory_ppc, NULL);
+        setup_initial_memory_limit(memstart_addr, first_memblock_size);
        /* Save command line for /proc/cmdline and then parse parameters */
        strlcpy(boot_command_line, cmd_line, COMMAND_LINE_SIZE);
@@ -726,7 +764,7 @@ void __init early_init_devtree(void *params)
        DBG("Scanning CPUs ...\n");
-        /* Retreive CPU related informations from the flat tree
+        /* Retrieve CPU related informations from the flat tree
         * (altivec support, boot CPU ID, ...)
         */
        of_scan_flat_dt(early_init_dt_scan_cpus, NULL);
diff --git a/arch/powerpc/kernel/prom_init.c b/arch/powerpc/kernel/prom_init.c
index 941ff4dbc567..c016033ba78d 100644
--- a/arch/powerpc/kernel/prom_init.c
+++ b/arch/powerpc/kernel/prom_init.c
@@ -335,6 +335,7 @@ static void __init prom_printf(const char *format, ...)
        const char *p, *q, *s;
        va_list args;
        unsigned long v;
+        long vs;
        struct prom_t *_prom = &RELOC(prom);
        va_start(args, format);
@@ -368,12 +369,35 @@ static void __init prom_printf(const char *format, ...)
                        v = va_arg(args, unsigned long);
                        prom_print_hex(v);
                        break;
+                case 'd':
+                        ++q;
+                        vs = va_arg(args, int);
+                        if (vs < 0) {
+                                prom_print(RELOC("-"));
+                                vs = -vs;
+                        }
+                        prom_print_dec(vs);
+                        break;
                case 'l':
                        ++q;
-                        if (*q == 'u') { /* '%lu' */
+                        if (*q == 0)
+                                break;
+                        else if (*q == 'x') {
+                                ++q;
+                                v = va_arg(args, unsigned long);
+                                prom_print_hex(v);
+                        } else if (*q == 'u') { /* '%lu' */
                                ++q;
                                v = va_arg(args, unsigned long);
                                prom_print_dec(v);
+                        } else if (*q == 'd') { /* %ld */
+                                ++q;
+                                vs = va_arg(args, long);
+                                if (vs < 0) {
+                                        prom_print(RELOC("-"));
+                                        vs = -vs;
+                                }
+                                prom_print_dec(vs);
                        }
                        break;
                }
@@ -676,8 +700,10 @@ static void __init early_cmdline_parse(void)
 #endif /* CONFIG_PCI_MSI */
 #ifdef CONFIG_PPC_SMLPAR
 #define OV5_CMO                 0x80    /* Cooperative Memory Overcommitment */
+#define OV5_XCMO                        0x40    /* Page Coalescing */
 #else
 #define OV5_CMO                 0x00
+#define OV5_XCMO                        0x00
 #endif
 #define OV5_TYPE1_AFFINITY      0x80    /* Type 1 NUMA affinity */
@@ -732,7 +758,7 @@ static unsigned char ibm_architecture_vec[] = {
        OV5_LPAR | OV5_SPLPAR | OV5_LARGE_PAGES | OV5_DRCONF_MEMORY |
        OV5_DONATE_DEDICATE_CPU | OV5_MSI,
        0,
-        OV5_CMO,
+        OV5_CMO | OV5_XCMO,
        OV5_TYPE1_AFFINITY,
        0,
        0,
diff --git a/arch/powerpc/kernel/prom_parse.c b/arch/powerpc/kernel/prom_parse.c
index 88334af038e5..47187cc2cf00 100644
--- a/arch/powerpc/kernel/prom_parse.c
+++ b/arch/powerpc/kernel/prom_parse.c
@@ -2,95 +2,11 @@
 #include <linux/kernel.h>
 #include <linux/string.h>
-#include <linux/pci_regs.h>
 #include <linux/module.h>
 #include <linux/ioport.h>
 #include <linux/etherdevice.h>
 #include <linux/of_address.h>
 #include <asm/prom.h>
-#include <asm/pci-bridge.h>
-#ifdef CONFIG_PCI
-int of_irq_map_pci(struct pci_dev *pdev, struct of_irq *out_irq)
-{
-        struct device_node *dn, *ppnode;
-        struct pci_dev *ppdev;
-        u32 lspec;
-        u32 laddr[3];
-        u8 pin;
-        int rc;
-        /* Check if we have a device node, if yes, fallback to standard OF
-         * parsing
-         */
-        dn = pci_device_to_OF_node(pdev);
-        if (dn) {
-                rc = of_irq_map_one(dn, 0, out_irq);
-                if (!rc)
-                        return rc;
-        }
-        /* Ok, we don't, time to have fun. Let's start by building up an
-         * interrupt spec.  we assume #interrupt-cells is 1, which is standard
-         * for PCI. If you do different, then don't use that routine.
-         */
-        rc = pci_read_config_byte(pdev, PCI_INTERRUPT_PIN, &pin);
-        if (rc != 0)
-                return rc;
-        /* No pin, exit */
-        if (pin == 0)
-                return -ENODEV;
-        /* Now we walk up the PCI tree */
-        lspec = pin;
-        for (;;) {
-                /* Get the pci_dev of our parent */
-                ppdev = pdev->bus->self;
-                /* Ouch, it's a host bridge... */
-                if (ppdev == NULL) {
-#ifdef CONFIG_PPC64
-                        ppnode = pci_bus_to_OF_node(pdev->bus);
-#else
-                        struct pci_controller *host;
-                        host = pci_bus_to_host(pdev->bus);
-                        ppnode = host ? host->dn : NULL;
-#endif
-                        /* No node for host bridge ? give up */
-                        if (ppnode == NULL)
-                                return -EINVAL;
-                } else
-                        /* We found a P2P bridge, check if it has a node */
-                        ppnode = pci_device_to_OF_node(ppdev);
-                /* Ok, we have found a parent with a device-node, hand over to
-                 * the OF parsing code.
-                 * We build a unit address from the linux device to be used for
-                 * resolution. Note that we use the linux bus number which may
-                 * not match your firmware bus numbering.
-                 * Fortunately, in most cases, interrupt-map-mask doesn't include
-                 * the bus number as part of the matching.
-                 * You should still be careful about that though if you intend
-                 * to rely on this function (you ship  a firmware that doesn't
-                 * create device nodes for all PCI devices).
-                 */
-                if (ppnode)
-                        break;
-                /* We can only get here if we hit a P2P bridge with no node,
-                 * let's do standard swizzling and try again
-                 */
-                lspec = pci_swizzle_interrupt_pin(pdev, lspec);
-                pdev = ppdev;
-        }
-        laddr[0] = (pdev->bus->number << 16)
-                | (pdev->devfn << 8);
-        laddr[1]  = laddr[2] = 0;
-        return of_irq_map_raw(ppnode, &lspec, 1, laddr, out_irq);
-}
-EXPORT_SYMBOL_GPL(of_irq_map_pci);
-#endif /* CONFIG_PCI */
 void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
                unsigned long *busno, unsigned long *phys, unsigned long *size)
@@ -117,41 +33,3 @@ void of_parse_dma_window(struct device_node *dn, const void *dma_window_prop,
        cells = prop ? *(u32 *)prop : of_n_size_cells(dn);
        *size = of_read_number(dma_window, cells);
 }
-/**
- * Search the device tree for the best MAC address to use.  'mac-address' is
- * checked first, because that is supposed to contain to "most recent" MAC
- * address. If that isn't set, then 'local-mac-address' is checked next,
- * because that is the default address.  If that isn't set, then the obsolete
- * 'address' is checked, just in case we're using an old device tree.
- *
- * Note that the 'address' property is supposed to contain a virtual address of
- * the register set, but some DTS files have redefined that property to be the
- * MAC address.
- *
- * All-zero MAC addresses are rejected, because those could be properties that
- * exist in the device tree, but were not set by U-Boot.  For example, the
- * DTS could define 'mac-address' and 'local-mac-address', with zero MAC
- * addresses.  Some older U-Boots only initialized 'local-mac-address'.  In
- * this case, the real MAC is in 'local-mac-address', and 'mac-address' exists
- * but is all zeros.
-*/
-const void *of_get_mac_address(struct device_node *np)
-{
-        struct property *pp;
-        pp = of_find_property(np, "mac-address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-        pp = of_find_property(np, "local-mac-address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-        pp = of_find_property(np, "address", NULL);
-        if (pp && (pp->length == 6) && is_valid_ether_addr(pp->value))
-                return pp->value;
-        return NULL;
-}
-EXPORT_SYMBOL(of_get_mac_address);
diff --git a/arch/powerpc/kernel/ptrace.c b/arch/powerpc/kernel/ptrace.c
index 11f3cd9c832f..cb22024f2b42 100644
--- a/arch/powerpc/kernel/ptrace.c
+++ b/arch/powerpc/kernel/ptrace.c
@@ -29,6 +29,7 @@
 #include <linux/signal.h>
 #include <linux/seccomp.h>
 #include <linux/audit.h>
+#include <trace/syscall.h>
 #ifdef CONFIG_PPC32
 #include <linux/module.h>
 #endif
@@ -40,6 +41,9 @@
 #include <asm/pgtable.h>
 #include <asm/system.h>
+#define CREATE_TRACE_POINTS
+#include <trace/events/syscalls.h>
 /*
 * The parameter save area on the stack is used to store arguments being passed
 * to callee function and is located at fixed offset from stack pointer.
@@ -229,12 +233,16 @@ static int gpr_get(struct task_struct *target, const struct user_regset *regset,
                   unsigned int pos, unsigned int count,
                   void *kbuf, void __user *ubuf)
 {
-        int ret;
+        int i, ret;
        if (target->thread.regs == NULL)
                return -EIO;
-        CHECK_FULL_REGS(target->thread.regs);
+        if (!FULL_REGS(target->thread.regs)) {
+                /* We have a partial register set.  Fill 14-31 with bogus values */
+                for (i = 14; i < 32; i++)
+                        target->thread.regs->gpr[i] = NV_REG_POISON;
+        }
        ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf,
                                  target->thread.regs,
@@ -459,7 +467,7 @@ static int vr_set(struct task_struct *target, const struct user_regset *regset,
 #ifdef CONFIG_VSX
 /*
 * Currently to set and and get all the vsx state, you need to call
- * the fp and VMX calls aswell.  This only get/sets the lower 32
+ * the fp and VMX calls as well.  This only get/sets the lower 32
 * 128bit VSX registers.
 */
@@ -641,11 +649,16 @@ static int gpr32_get(struct task_struct *target,
        compat_ulong_t *k = kbuf;
        compat_ulong_t __user *u = ubuf;
        compat_ulong_t reg;
+        int i;
        if (target->thread.regs == NULL)
                return -EIO;
-        CHECK_FULL_REGS(target->thread.regs);
+        if (!FULL_REGS(target->thread.regs)) {
+                /* We have a partial register set.  Fill 14-31 with bogus values */
+                for (i = 14; i < 32; i++)
+                        target->thread.regs->gpr[i] = NV_REG_POISON; 
+        }
        pos /= sizeof(reg);
        count /= sizeof(reg);
@@ -924,12 +937,16 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
        if (data && !(data & DABR_TRANSLATION))
                return -EIO;
 #ifdef CONFIG_HAVE_HW_BREAKPOINT
+        if (ptrace_get_breakpoints(task) < 0)
+                return -ESRCH;
        bp = thread->ptrace_bps[0];
        if ((!data) || !(data & (DABR_DATA_WRITE | DABR_DATA_READ))) {
                if (bp) {
                        unregister_hw_breakpoint(bp);
                        thread->ptrace_bps[0] = NULL;
                }
+                ptrace_put_breakpoints(task);
                return 0;
        }
        if (bp) {
@@ -939,9 +956,12 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
                                        (DABR_DATA_WRITE | DABR_DATA_READ),
                                                        &attr.bp_type);
                ret =  modify_user_hw_breakpoint(bp, &attr);
-                if (ret)
+                if (ret) {
+                        ptrace_put_breakpoints(task);
                        return ret;
+                }
                thread->ptrace_bps[0] = bp;
+                ptrace_put_breakpoints(task);
                thread->dabr = data;
                return 0;
        }
@@ -956,9 +976,12 @@ int ptrace_set_debugreg(struct task_struct *task, unsigned long addr,
                                                        ptrace_triggered, task);
        if (IS_ERR(bp)) {
                thread->ptrace_bps[0] = NULL;
+                ptrace_put_breakpoints(task);
                return PTR_ERR(bp);
        }
+        ptrace_put_breakpoints(task);
 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
        /* Move contents to the DABR register */
@@ -1316,6 +1339,10 @@ static int set_dac_range(struct task_struct *child,
 static long ppc_set_hwdebug(struct task_struct *child,
                     struct ppc_hw_breakpoint *bp_info)
 {
+#ifndef CONFIG_PPC_ADV_DEBUG_REGS
+        unsigned long dabr;
+#endif
        if (bp_info->version != 1)
                return -ENOTSUPP;
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
@@ -1353,11 +1380,10 @@ static long ppc_set_hwdebug(struct task_struct *child,
        /*
         * We only support one data breakpoint
         */
-        if (((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0) ||
+        if ((bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_RW) == 0 ||
-            ((bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0) ||
+            (bp_info->trigger_type & ~PPC_BREAKPOINT_TRIGGER_RW) != 0 ||
-            (bp_info->trigger_type != PPC_BREAKPOINT_TRIGGER_WRITE) ||
+            bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT ||
-            (bp_info->addr_mode != PPC_BREAKPOINT_MODE_EXACT) ||
+            bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE)
-            (bp_info->condition_mode != PPC_BREAKPOINT_CONDITION_NONE))
                return -EINVAL;
        if (child->thread.dabr)
@@ -1366,7 +1392,14 @@ static long ppc_set_hwdebug(struct task_struct *child,
        if ((unsigned long)bp_info->addr >= TASK_SIZE)
                return -EIO;
-        child->thread.dabr = (unsigned long)bp_info->addr;
+        dabr = (unsigned long)bp_info->addr & ~7UL;
+        dabr |= DABR_TRANSLATION;
+        if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_READ)
+                dabr |= DABR_DATA_READ;
+        if (bp_info->trigger_type & PPC_BREAKPOINT_TRIGGER_WRITE)
+                dabr |= DABR_DATA_WRITE;
+        child->thread.dabr = dabr;
        return 1;
 #endif /* !CONFIG_PPC_ADV_DEBUG_DVCS */
@@ -1406,37 +1439,42 @@ static long ppc_del_hwdebug(struct task_struct *child, long addr, long data)
 * Here are the old "legacy" powerpc specific getregs/setregs ptrace calls,
 * we mark them as obsolete now, they will be removed in a future version
 */
-static long arch_ptrace_old(struct task_struct *child, long request, long addr,
+static long arch_ptrace_old(struct task_struct *child, long request,
-                            long data)
+                            unsigned long addr, unsigned long data)
 {
+        void __user *datavp = (void __user *) data;
        switch (request) {
        case PPC_PTRACE_GETREGS:        /* Get GPRs 0 - 31. */
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_GPR, 0, 32 * sizeof(long),
-                                           (void __user *) data);
+                                           datavp);
        case PPC_PTRACE_SETREGS:        /* Set GPRs 0 - 31. */
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_GPR, 0, 32 * sizeof(long),
-                                             (const void __user *) data);
+                                             datavp);
        case PPC_PTRACE_GETFPREGS:      /* Get FPRs 0 - 31. */
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_FPR, 0, 32 * sizeof(double),
-                                           (void __user *) data);
+                                           datavp);
        case PPC_PTRACE_SETFPREGS:      /* Set FPRs 0 - 31. */
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_FPR, 0, 32 * sizeof(double),
-                                             (const void __user *) data);
+                                             datavp);
        }
        return -EPERM;
 }
-long arch_ptrace(struct task_struct *child, long request, long addr, long data)
+long arch_ptrace(struct task_struct *child, long request,
+                 unsigned long addr, unsigned long data)
 {
        int ret = -EPERM;
+        void __user *datavp = (void __user *) data;
+        unsigned long __user *datalp = datavp;
        switch (request) {
        /* read the word at location addr in the USER area. */
@@ -1446,11 +1484,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                ret = -EIO;
                /* convert to index and check */
 #ifdef CONFIG_PPC32
-                index = (unsigned long) addr >> 2;
+                index = addr >> 2;
                if ((addr & 3) || (index > PT_FPSCR)
                    || (child->thread.regs == NULL))
 #else
-                index = (unsigned long) addr >> 3;
+                index = addr >> 3;
                if ((addr & 7) || (index > PT_FPSCR))
 #endif
                        break;
@@ -1463,7 +1501,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                        tmp = ((unsigned long *)child->thread.fpr)
                                [TS_FPRWIDTH * (index - PT_FPR0)];
                }
-                ret = put_user(tmp,(unsigned long __user *) data);
+                ret = put_user(tmp, datalp);
                break;
        }
@@ -1474,11 +1512,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                ret = -EIO;
                /* convert to index and check */
 #ifdef CONFIG_PPC32
-                index = (unsigned long) addr >> 2;
+                index = addr >> 2;
                if ((addr & 3) || (index > PT_FPSCR)
                    || (child->thread.regs == NULL))
 #else
-                index = (unsigned long) addr >> 3;
+                index = addr >> 3;
                if ((addr & 7) || (index > PT_FPSCR))
 #endif
                        break;
@@ -1525,11 +1563,11 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                dbginfo.features = 0;
 #endif /* CONFIG_PPC_ADV_DEBUG_REGS */
-                if (!access_ok(VERIFY_WRITE, data,
+                if (!access_ok(VERIFY_WRITE, datavp,
                               sizeof(struct ppc_debug_info)))
                        return -EFAULT;
-                ret = __copy_to_user((struct ppc_debug_info __user *)data,
+                ret = __copy_to_user(datavp, &dbginfo,
-                                     &dbginfo, sizeof(struct ppc_debug_info)) ?
+                                     sizeof(struct ppc_debug_info)) ?
                      -EFAULT : 0;
                break;
        }
@@ -1537,11 +1575,10 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
        case PPC_PTRACE_SETHWDEBUG: {
                struct ppc_hw_breakpoint bp_info;
-                if (!access_ok(VERIFY_READ, data,
+                if (!access_ok(VERIFY_READ, datavp,
                               sizeof(struct ppc_hw_breakpoint)))
                        return -EFAULT;
-                ret = __copy_from_user(&bp_info,
+                ret = __copy_from_user(&bp_info, datavp,
-                                       (struct ppc_hw_breakpoint __user *)data,
                                       sizeof(struct ppc_hw_breakpoint)) ?
                      -EFAULT : 0;
                if (!ret)
@@ -1560,11 +1597,9 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                if (addr > 0)
                        break;
 #ifdef CONFIG_PPC_ADV_DEBUG_REGS
-                ret = put_user(child->thread.dac1,
+                ret = put_user(child->thread.dac1, datalp);
-                               (unsigned long __user *)data);
 #else
-                ret = put_user(child->thread.dabr,
+                ret = put_user(child->thread.dabr, datalp);
-                               (unsigned long __user *)data);
 #endif
                break;
        }
@@ -1580,7 +1615,7 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_GPR,
                                           0, sizeof(struct pt_regs),
-                                           (void __user *) data);
+                                           datavp);
 #ifdef CONFIG_PPC64
        case PTRACE_SETREGS64:
@@ -1589,19 +1624,19 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_GPR,
                                             0, sizeof(struct pt_regs),
-                                             (const void __user *) data);
+                                             datavp);
        case PTRACE_GETFPREGS: /* Get the child FPU state (FPR0...31 + FPSCR) */
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_FPR,
                                           0, sizeof(elf_fpregset_t),
-                                           (void __user *) data);
+                                           datavp);
        case PTRACE_SETFPREGS: /* Set the child FPU state (FPR0...31 + FPSCR) */
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_FPR,
                                             0, sizeof(elf_fpregset_t),
-                                             (const void __user *) data);
+                                             datavp);
 #ifdef CONFIG_ALTIVEC
        case PTRACE_GETVRREGS:
@@ -1609,40 +1644,40 @@ long arch_ptrace(struct task_struct *child, long request, long addr, long data)
                                           REGSET_VMX,
                                           0, (33 * sizeof(vector128) +
                                               sizeof(u32)),
-                                           (void __user *) data);
+                                           datavp);
        case PTRACE_SETVRREGS:
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_VMX,
                                             0, (33 * sizeof(vector128) +
                                                 sizeof(u32)),
-                                             (const void __user *) data);
+                                             datavp);
 #endif
 #ifdef CONFIG_VSX
        case PTRACE_GETVSRREGS:
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_VSX,
                                           0, 32 * sizeof(double),
-                                           (void __user *) data);
+                                           datavp);
        case PTRACE_SETVSRREGS:
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_VSX,
                                             0, 32 * sizeof(double),
-                                             (const void __user *) data);
+                                             datavp);
 #endif
 #ifdef CONFIG_SPE
        case PTRACE_GETEVRREGS:
                /* Get the child spe register state. */
                return copy_regset_to_user(child, &user_ppc_native_view,
                                           REGSET_SPE, 0, 35 * sizeof(u32),
-                                           (void __user *) data);
+                                           datavp);
        case PTRACE_SETEVRREGS:
                /* Set the child spe register state. */
                return copy_regset_from_user(child, &user_ppc_native_view,
                                             REGSET_SPE, 0, 35 * sizeof(u32),
-                                             (const void __user *) data);
+                                             datavp);
 #endif
        /* Old reverse args ptrace callss */
@@ -1679,9 +1714,12 @@ long do_syscall_trace_enter(struct pt_regs *regs)
                 */
                ret = -1L;
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_enter(regs, regs->gpr[0]);
        if (unlikely(current->audit_context)) {
 #ifdef CONFIG_PPC64
-                if (!test_thread_flag(TIF_32BIT))
+                if (!is_32bit_task())
                        audit_syscall_entry(AUDIT_ARCH_PPC64,
                                            regs->gpr[0],
                                            regs->gpr[3], regs->gpr[4],
@@ -1707,6 +1745,9 @@ void do_syscall_trace_leave(struct pt_regs *regs)
                audit_syscall_exit((regs->ccr&0x10000000)?AUDITSC_FAILURE:AUDITSC_SUCCESS,
                                   regs->result);
+        if (unlikely(test_thread_flag(TIF_SYSCALL_TRACEPOINT)))
+                trace_sys_exit(regs, regs->result);
        step = test_thread_flag(TIF_SINGLESTEP);
        if (step || test_thread_flag(TIF_SYSCALL_TRACE))
                tracehook_report_syscall_exit(regs, step);
diff --git a/arch/powerpc/kernel/ptrace32.c b/arch/powerpc/kernel/ptrace32.c
index 8a6daf4129f6..69c4be917d07 100644
--- a/arch/powerpc/kernel/ptrace32.c
+++ b/arch/powerpc/kernel/ptrace32.c
@@ -280,7 +280,11 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
                /* We only support one DABR and no IABRS at the moment */
                if (addr > 0)
                        break;
+#ifdef CONFIG_PPC_ADV_DEBUG_REGS
+                ret = put_user(child->thread.dac1, (u32 __user *)data);
+#else
                ret = put_user(child->thread.dabr, (u32 __user *)data);
+#endif
                break;
        }
@@ -312,6 +316,9 @@ long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
        case PTRACE_SET_DEBUGREG:
        case PTRACE_SYSCALL:
        case PTRACE_CONT:
+        case PPC_PTRACE_GETHWDBGINFO:
+        case PPC_PTRACE_SETHWDEBUG:
+        case PPC_PTRACE_DELHWDEBUG:
                ret = arch_ptrace(child, request, addr, data);
                break;
diff --git a/arch/powerpc/kernel/rtas-rtc.c b/arch/powerpc/kernel/rtas-rtc.c
index 77578c093dda..c57c19358a26 100644
--- a/arch/powerpc/kernel/rtas-rtc.c
+++ b/arch/powerpc/kernel/rtas-rtc.c
@@ -4,6 +4,7 @@
 #include <linux/init.h>
 #include <linux/rtc.h>
 #include <linux/delay.h>
+#include <linux/ratelimit.h>
 #include <asm/prom.h>
 #include <asm/rtas.h>
 #include <asm/time.h>
@@ -29,9 +30,10 @@ unsigned long __init rtas_get_boot_time(void)
                }
        } while (wait_time && (get_tb() < max_wait_tb));
-        if (error != 0 && printk_ratelimit()) {
+        if (error != 0) {
-                printk(KERN_WARNING "error: reading the clock failed (%d)\n",
+                printk_ratelimited(KERN_WARNING
-                        error);
+                                   "error: reading the clock failed (%d)\n",
+                                   error);
                return 0;
        }
@@ -55,19 +57,21 @@ void rtas_get_rtc_time(struct rtc_time *rtc_tm)
                wait_time = rtas_busy_delay_time(error);
                if (wait_time) {
-                        if (in_interrupt() && printk_ratelimit()) {
+                        if (in_interrupt()) {
                                memset(rtc_tm, 0, sizeof(struct rtc_time));
-                                printk(KERN_WARNING "error: reading clock"
+                                printk_ratelimited(KERN_WARNING
-                                       " would delay interrupt\n");
+                                                   "error: reading clock "
+                                                   "would delay interrupt\n");
                                return; /* delay not allowed */
                        }
                        msleep(wait_time);
                }
        } while (wait_time && (get_tb() < max_wait_tb));
-        if (error != 0 && printk_ratelimit()) {
+        if (error != 0) {
-                printk(KERN_WARNING "error: reading the clock failed (%d)\n",
+                printk_ratelimited(KERN_WARNING
-                       error);
+                                   "error: reading the clock failed (%d)\n",
+                                   error);
                return;
        }
@@ -99,9 +103,10 @@ int rtas_set_rtc_time(struct rtc_time *tm)
                }
        } while (wait_time && (get_tb() < max_wait_tb));
-        if (error != 0 && printk_ratelimit())
+        if (error != 0)
-                printk(KERN_WARNING "error: setting the clock failed (%d)\n",
+                printk_ratelimited(KERN_WARNING
-                       error);
+                                   "error: setting the clock failed (%d)\n",
+                                   error);
        return 0;
 }
diff --git a/arch/powerpc/kernel/rtas.c b/arch/powerpc/kernel/rtas.c
index 41048de3c6c3..271ff6318eda 100644
--- a/arch/powerpc/kernel/rtas.c
+++ b/arch/powerpc/kernel/rtas.c
@@ -41,6 +41,8 @@
 #include <asm/atomic.h>
 #include <asm/time.h>
 #include <asm/mmu.h>
+#include <asm/topology.h>
+#include <asm/pSeries_reconfig.h>
 struct rtas_t rtas = {
        .lock = __ARCH_SPIN_LOCK_UNLOCKED
@@ -493,7 +495,7 @@ unsigned int rtas_busy_delay(int status)
        might_sleep();
        ms = rtas_busy_delay_time(status);
-        if (ms)
+        if (ms && need_resched())
                msleep(ms);
        return ms;
@@ -713,6 +715,7 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
        int cpu;
        slb_set_size(SLB_MIN_SIZE);
+        stop_topology_update();
        printk(KERN_DEBUG "calling ibm,suspend-me on cpu %i\n", smp_processor_id());
        while (rc == H_MULTI_THREADS_ACTIVE && !atomic_read(&data->done) &&
@@ -728,6 +731,8 @@ static int __rtas_suspend_last_cpu(struct rtas_suspend_me_data *data, int wake_w
                rc = atomic_read(&data->error);
        atomic_set(&data->error, rc);
+        start_topology_update();
+        pSeries_coalesce_init();
        if (wake_when_done) {
                atomic_set(&data->done, 1);
@@ -805,7 +810,7 @@ static void rtas_percpu_suspend_me(void *info)
        __rtas_suspend_cpu((struct rtas_suspend_me_data *)info, 1);
 }
-static int rtas_ibm_suspend_me(struct rtas_args *args)
+int rtas_ibm_suspend_me(struct rtas_args *args)
 {
        long state;
        long rc;
@@ -855,7 +860,7 @@ static int rtas_ibm_suspend_me(struct rtas_args *args)
        return atomic_read(&data.error);
 }
 #else /* CONFIG_PPC_PSERIES */
-static int rtas_ibm_suspend_me(struct rtas_args *args)
+int rtas_ibm_suspend_me(struct rtas_args *args)
 {
        return -ENOSYS;
 }
@@ -969,7 +974,7 @@ void __init rtas_initialize(void)
         */
 #ifdef CONFIG_PPC64
        if (machine_is(pseries) && firmware_has_feature(FW_FEATURE_LPAR)) {
-                rtas_region = min(memblock.rmo_size, RTAS_INSTANTIATE_MAX);
+                rtas_region = min(ppc64_rma_size, RTAS_INSTANTIATE_MAX);
                ibm_suspend_me_token = rtas_token("ibm,suspend-me");
        }
 #endif
diff --git a/arch/powerpc/kernel/rtas_flash.c b/arch/powerpc/kernel/rtas_flash.c
index 67a84d8f118d..bf5f5ce3a7bd 100644
--- a/arch/powerpc/kernel/rtas_flash.c
+++ b/arch/powerpc/kernel/rtas_flash.c
@@ -256,31 +256,16 @@ static ssize_t rtas_flash_read(struct file *file, char __user *buf,
        struct proc_dir_entry *dp = PDE(file->f_path.dentry->d_inode);
        struct rtas_update_flash_t *uf;
        char msg[RTAS_MSG_MAXLEN];
-        int msglen;
-        uf = (struct rtas_update_flash_t *) dp->data;
+        uf = dp->data;
        if (!strcmp(dp->name, FIRMWARE_FLASH_NAME)) {
                get_flash_status_msg(uf->status, msg);
        } else {           /* FIRMWARE_UPDATE_NAME */
                sprintf(msg, "%d\n", uf->status);
        }
-        msglen = strlen(msg);
-        if (msglen > count)
-                msglen = count;
-        if (ppos && *ppos != 0)
-                return 0;       /* be cheap */
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
-        if (copy_to_user(buf, msg, msglen))
+        return simple_read_from_buffer(buf, count, ppos, msg, strlen(msg));
-                return -EFAULT;
-        if (ppos)
-                *ppos = msglen;
-        return msglen;
 }
 /* constructor for flash_block_cache */
@@ -394,26 +379,13 @@ static ssize_t manage_flash_read(struct file *file, char __user *buf,
        char msg[RTAS_MSG_MAXLEN];
        int msglen;
-        args_buf = (struct rtas_manage_flash_t *) dp->data;
+        args_buf = dp->data;
        if (args_buf == NULL)
                return 0;
        msglen = sprintf(msg, "%d\n", args_buf->status);
-        if (msglen > count)
-                msglen = count;
-        if (ppos && *ppos != 0)
+        return simple_read_from_buffer(buf, count, ppos, msg, msglen);
-                return 0;       /* be cheap */
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
-        if (copy_to_user(buf, msg, msglen))
-                return -EFAULT;
-        if (ppos)
-                *ppos = msglen;
-        return msglen;
 }
 static ssize_t manage_flash_write(struct file *file, const char __user *buf,
@@ -495,24 +467,11 @@ static ssize_t validate_flash_read(struct file *file, char __user *buf,
        char msg[RTAS_MSG_MAXLEN];
        int msglen;
-        args_buf = (struct rtas_validate_flash_t *) dp->data;
+        args_buf = dp->data;
-        if (ppos && *ppos != 0)
-                return 0;       /* be cheap */
-        
        msglen = get_validate_flash_msg(args_buf, msg);
-        if (msglen > count)
-                msglen = count;
-        if (!access_ok(VERIFY_WRITE, buf, msglen))
-                return -EINVAL;
-        if (copy_to_user(buf, msg, msglen))
-                return -EFAULT;
-        if (ppos)
+        return simple_read_from_buffer(buf, count, ppos, msg, msglen);
-                *ppos = msglen;
-        return msglen;
 }
 static ssize_t validate_flash_write(struct file *file, const char __user *buf,
@@ -716,6 +675,7 @@ static const struct file_operations rtas_flash_operations = {
        .write          = rtas_flash_write,
        .open           = rtas_excl_open,
        .release        = rtas_flash_release,
+        .llseek         = default_llseek,
 };
 static const struct file_operations manage_flash_operations = {
@@ -724,6 +684,7 @@ static const struct file_operations manage_flash_operations = {
        .write          = manage_flash_write,
        .open           = rtas_excl_open,
        .release        = rtas_excl_release,
+        .llseek         = default_llseek,
 };
 static const struct file_operations validate_flash_operations = {
@@ -732,6 +693,7 @@ static const struct file_operations validate_flash_operations = {
        .write          = validate_flash_write,
        .open           = rtas_excl_open,
        .release        = validate_flash_release,
+        .llseek         = default_llseek,
 };
 static int __init rtas_flash_init(void)
diff --git a/arch/powerpc/kernel/rtasd.c b/arch/powerpc/kernel/rtasd.c
index 638883e23e3a..67f6c3b51357 100644
--- a/arch/powerpc/kernel/rtasd.c
+++ b/arch/powerpc/kernel/rtasd.c
@@ -160,7 +160,7 @@ static int log_rtas_len(char * buf)
        /* rtas fixed header */
        len = 8;
        err = (struct rtas_error_log *)buf;
-        if (err->extended_log_length) {
+        if (err->extended && err->extended_log_length) {
                /* extended header */
                len += err->extended_log_length;
@@ -354,6 +354,7 @@ static const struct file_operations proc_rtas_log_operations = {
        .poll =         rtas_log_poll,
        .open =         rtas_log_open,
        .release =      rtas_log_release,
+        .llseek =       noop_llseek,
 };
 static int enable_surveillance(int timeout)
@@ -411,7 +412,8 @@ static void rtas_event_scan(struct work_struct *w)
        get_online_cpus();
-        cpu = cpumask_next(smp_processor_id(), cpu_online_mask);
+        /* raw_ OK because just using CPU as starting point. */
+        cpu = cpumask_next(raw_smp_processor_id(), cpu_online_mask);
        if (cpu >= nr_cpu_ids) {
                cpu = cpumask_first(cpu_online_mask);
@@ -463,7 +465,7 @@ static void start_event_scan(void)
        pr_debug("rtasd: will sleep for %d milliseconds\n",
                 (30000 / rtas_event_scan_rate));
-        /* Retreive errors from nvram if any */
+        /* Retrieve errors from nvram if any */
        retreive_nvram_error_log();
        schedule_delayed_work_on(cpumask_first(cpu_online_mask),
diff --git a/arch/powerpc/kernel/setup-common.c b/arch/powerpc/kernel/setup-common.c
index 9d4882a46647..79fca2651b65 100644
--- a/arch/powerpc/kernel/setup-common.c
+++ b/arch/powerpc/kernel/setup-common.c
@@ -381,7 +381,7 @@ static void __init cpu_init_thread_core_maps(int tpc)
        int i;
        threads_per_core = tpc;
-        threads_core_mask = CPU_MASK_NONE;
+        cpumask_clear(&threads_core_mask);
        /* This implementation only supports power of 2 number of threads
         * for simplicity and performance
@@ -390,7 +390,7 @@ static void __init cpu_init_thread_core_maps(int tpc)
        BUG_ON(tpc != (1 << threads_shift));
        for (i = 0; i < tpc; i++)
-                cpu_set(i, threads_core_mask);
+                cpumask_set_cpu(i, &threads_core_mask);
        printk(KERN_INFO "CPU maps initialized for %d thread%s per core\n",
               tpc, tpc > 1 ? "s" : "");
@@ -404,7 +404,7 @@ static void __init cpu_init_thread_core_maps(int tpc)
 *                  cpu_present_mask
 *
 * Having the possible map set up early allows us to restrict allocations
- * of things like irqstacks to num_possible_cpus() rather than NR_CPUS.
+ * of things like irqstacks to nr_cpu_ids rather than NR_CPUS.
 *
 * We do not initialize the online map here; cpus set their own bits in
 * cpu_online_mask as they come up.
@@ -424,7 +424,7 @@ void __init smp_setup_cpu_maps(void)
        DBG("smp_setup_cpu_maps()\n");
-        while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < NR_CPUS) {
+        while ((dn = of_find_node_by_type(dn, "cpu")) && cpu < nr_cpu_ids) {
                const int *intserv;
                int j, len;
@@ -443,7 +443,7 @@ void __init smp_setup_cpu_maps(void)
                                intserv = &cpu; /* assume logical == phys */
                }
-                for (j = 0; j < nthreads && cpu < NR_CPUS; j++) {
+                for (j = 0; j < nthreads && cpu < nr_cpu_ids; j++) {
                        DBG("    thread %d -> cpu %d (hard id %d)\n",
                            j, cpu, intserv[j]);
                        set_cpu_present(cpu, true);
@@ -483,12 +483,12 @@ void __init smp_setup_cpu_maps(void)
                if (cpu_has_feature(CPU_FTR_SMT))
                        maxcpus *= nthreads;
-                if (maxcpus > NR_CPUS) {
+                if (maxcpus > nr_cpu_ids) {
                        printk(KERN_WARNING
                               "Partition configured for %d cpus, "
                               "operating system maximum is %d.\n",
-                               maxcpus, NR_CPUS);
+                               maxcpus, nr_cpu_ids);
-                        maxcpus = NR_CPUS;
+                        maxcpus = nr_cpu_ids;
                } else
                        printk(KERN_INFO "Partition configured for %d cpus.\n",
                               maxcpus);
@@ -509,6 +509,9 @@ void __init smp_setup_cpu_maps(void)
         */
        cpu_init_thread_core_maps(nthreads);
+        /* Now that possible cpus are set, set nr_cpu_ids for later use */
+        setup_nr_cpu_ids();
        free_unused_pacas();
 }
 #endif /* CONFIG_SMP */
@@ -599,6 +602,10 @@ int check_legacy_ioport(unsigned long base_port)
                 * name instead */
                if (!np)
                        np = of_find_node_by_name(NULL, "8042");
+                if (np) {
+                        of_i8042_kbd_irq = 1;
+                        of_i8042_aux_irq = 12;
+                }
                break;
        case FDC_BASE: /* FDC1 */
                np = of_find_node_by_type(NULL, "fdc");
diff --git a/arch/powerpc/kernel/setup_32.c b/arch/powerpc/kernel/setup_32.c
index 93666f9cabf1..620d792b52e4 100644
--- a/arch/powerpc/kernel/setup_32.c
+++ b/arch/powerpc/kernel/setup_32.c
@@ -46,8 +46,9 @@
 extern void bootx_init(unsigned long r4, unsigned long phys);
-int boot_cpuid;
+int boot_cpuid = -1;
 EXPORT_SYMBOL_GPL(boot_cpuid);
+int __initdata boot_cpu_count;
 int boot_cpuid_phys;
 int smp_hw_index[NR_CPUS];
@@ -246,7 +247,7 @@ static void __init irqstack_early_init(void)
        unsigned int i;
        /* interrupt stacks must be in lowmem, we get that for free on ppc32
-         * as the memblock is limited to lowmem by MEMBLOCK_REAL_LIMIT */
+         * as the memblock is limited to lowmem by default */
        for_each_possible_cpu(i) {
                softirq_ctx[i] = (struct thread_info *)
                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
diff --git a/arch/powerpc/kernel/setup_64.c b/arch/powerpc/kernel/setup_64.c
index e72690ec9b87..a88bf2713d41 100644
--- a/arch/powerpc/kernel/setup_64.c
+++ b/arch/powerpc/kernel/setup_64.c
@@ -62,6 +62,7 @@
 #include <asm/udbg.h>
 #include <asm/kexec.h>
 #include <asm/mmu_context.h>
+#include <asm/code-patching.h>
 #include "setup.h"
@@ -72,6 +73,7 @@
 #endif
 int boot_cpuid = 0;
+int __initdata boot_cpu_count;
 u64 ppc64_pft_size;
 /* Pick defaults since we might want to patch instructions
@@ -233,6 +235,7 @@ void early_setup_secondary(void)
 void smp_release_cpus(void)
 {
        unsigned long *ptr;
+        int i;
        DBG(" -> smp_release_cpus()\n");
@@ -245,7 +248,16 @@ void smp_release_cpus(void)
        ptr  = (unsigned long *)((unsigned long)&__secondary_hold_spinloop
                        - PHYSICAL_START);
        *ptr = __pa(generic_secondary_smp_init);
-        mb();
+        /* And wait a bit for them to catch up */
+        for (i = 0; i < 100000; i++) {
+                mb();
+                HMT_low();
+                if (boot_cpu_count == 0)
+                        break;
+                udelay(1);
+        }
+        DBG("boot_cpu_count = %d\n", boot_cpu_count);
        DBG(" <- smp_release_cpus()\n");
 }
@@ -423,22 +435,35 @@ void __init setup_system(void)
        DBG(" <- setup_system()\n");
 }
-static u64 slb0_limit(void)
+/* This returns the limit below which memory accesses to the linear
+ * mapping are guarnateed not to cause a TLB or SLB miss. This is
+ * used to allocate interrupt or emergency stacks for which our
+ * exception entry path doesn't deal with being interrupted.
+ */
+static u64 safe_stack_limit(void)
 {
-        if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
+#ifdef CONFIG_PPC_BOOK3E
+        /* Freescale BookE bolts the entire linear mapping */
+        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E))
+                return linear_map_top;
+        /* Other BookE, we assume the first GB is bolted */
+        return 1ul << 30;
+#else
+        /* BookS, the first segment is bolted */
+        if (mmu_has_feature(MMU_FTR_1T_SEGMENT))
                return 1UL << SID_SHIFT_1T;
-        }
        return 1UL << SID_SHIFT;
+#endif
 }
 static void __init irqstack_early_init(void)
 {
-        u64 limit = slb0_limit();
+        u64 limit = safe_stack_limit();
        unsigned int i;
        /*
-         * interrupt stacks must be under 256MB, we cannot afford to take
+         * Interrupt stacks must be in the first segment since we
-         * SLB misses on them.
+         * cannot afford to take SLB misses on them.
         */
        for_each_possible_cpu(i) {
                softirq_ctx[i] = (struct thread_info *)
@@ -453,6 +478,9 @@ static void __init irqstack_early_init(void)
 #ifdef CONFIG_PPC_BOOK3E
 static void __init exc_lvl_early_init(void)
 {
+        extern unsigned int interrupt_base_book3e;
+        extern unsigned int exc_debug_debug_book3e;
        unsigned int i;
        for_each_possible_cpu(i) {
@@ -463,6 +491,10 @@ static void __init exc_lvl_early_init(void)
                mcheckirq_ctx[i] = (struct thread_info *)
                        __va(memblock_alloc(THREAD_SIZE, THREAD_SIZE));
        }
+        if (cpu_has_feature(CPU_FTR_DEBUG_LVL_EXC))
+                patch_branch(&interrupt_base_book3e + (0x040 / 4) + 1,
+                             (unsigned long)&exc_debug_debug_book3e, 0);
 }
 #else
 #define exc_lvl_early_init()
@@ -486,7 +518,7 @@ static void __init emergency_stack_init(void)
         * bringup, we need to get at them in real mode. This means they
         * must also be within the RMO region.
         */
-        limit = min(slb0_limit(), memblock.rmo_size);
+        limit = min(safe_stack_limit(), ppc64_rma_size);
        for_each_possible_cpu(i) {
                unsigned long sp;
@@ -497,9 +529,8 @@ static void __init emergency_stack_init(void)
 }
 /*
- * Called into from start_kernel, after lock_kernel has been called.
+ * Called into from start_kernel this initializes bootmem, which is used
- * Initializes bootmem, which is unsed to manage page allocation until
+ * to manage page allocation until mem_init is called.
- * mem_init is called.
 */
 void __init setup_arch(char **cmdline_p)
 {
diff --git a/arch/powerpc/kernel/signal_32.c b/arch/powerpc/kernel/signal_32.c
index b96a3a010c26..78b76dc54dfb 100644
--- a/arch/powerpc/kernel/signal_32.c
+++ b/arch/powerpc/kernel/signal_32.c
@@ -25,6 +25,7 @@
 #include <linux/errno.h>
 #include <linux/elf.h>
 #include <linux/ptrace.h>
+#include <linux/ratelimit.h>
 #ifdef CONFIG_PPC64
 #include <linux/syscalls.h>
 #include <linux/compat.h>
@@ -892,11 +893,12 @@ badframe:
        printk("badframe in handle_rt_signal, regs=%p frame=%p newsp=%lx\n",
               regs, frame, newsp);
 #endif
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(KERN_INFO "%s[%d]: bad frame in handle_rt_signal32: "
+                printk_ratelimited(KERN_INFO
-                        "%p nip %08lx lr %08lx\n",
+                                   "%s[%d]: bad frame in handle_rt_signal32: "
-                        current->comm, current->pid,
+                                   "%p nip %08lx lr %08lx\n",
-                        addr, regs->nip, regs->link);
+                                   current->comm, current->pid,
+                                   addr, regs->nip, regs->link);
        force_sigsegv(sig, current);
        return 0;
@@ -1058,11 +1060,12 @@ long sys_rt_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
        return 0;
 bad:
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(KERN_INFO "%s[%d]: bad frame in sys_rt_sigreturn: "
+                printk_ratelimited(KERN_INFO
-                        "%p nip %08lx lr %08lx\n",
+                                   "%s[%d]: bad frame in sys_rt_sigreturn: "
-                        current->comm, current->pid,
+                                   "%p nip %08lx lr %08lx\n",
-                        rt_sf, regs->nip, regs->link);
+                                   current->comm, current->pid,
+                                   rt_sf, regs->nip, regs->link);
        force_sig(SIGSEGV, current);
        return 0;
@@ -1149,12 +1152,12 @@ int sys_debug_setcontext(struct ucontext __user *ctx,
         * We kill the task with a SIGSEGV in this situation.
         */
        if (do_setcontext(ctx, regs, 1)) {
-                if (show_unhandled_signals && printk_ratelimit())
+                if (show_unhandled_signals)
-                        printk(KERN_INFO "%s[%d]: bad frame in "
+                        printk_ratelimited(KERN_INFO "%s[%d]: bad frame in "
-                                "sys_debug_setcontext: %p nip %08lx "
+                                           "sys_debug_setcontext: %p nip %08lx "
-                                "lr %08lx\n",
+                                           "lr %08lx\n",
-                                current->comm, current->pid,
+                                           current->comm, current->pid,
-                                ctx, regs->nip, regs->link);
+                                           ctx, regs->nip, regs->link);
                force_sig(SIGSEGV, current);
                goto out;
@@ -1236,11 +1239,12 @@ badframe:
        printk("badframe in handle_signal, regs=%p frame=%p newsp=%lx\n",
               regs, frame, newsp);
 #endif
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(KERN_INFO "%s[%d]: bad frame in handle_signal32: "
+                printk_ratelimited(KERN_INFO
-                        "%p nip %08lx lr %08lx\n",
+                                   "%s[%d]: bad frame in handle_signal32: "
-                        current->comm, current->pid,
+                                   "%p nip %08lx lr %08lx\n",
-                        frame, regs->nip, regs->link);
+                                   current->comm, current->pid,
+                                   frame, regs->nip, regs->link);
        force_sigsegv(sig, current);
        return 0;
@@ -1288,11 +1292,12 @@ long sys_sigreturn(int r3, int r4, int r5, int r6, int r7, int r8,
        return 0;
 badframe:
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(KERN_INFO "%s[%d]: bad frame in sys_sigreturn: "
+                printk_ratelimited(KERN_INFO
-                        "%p nip %08lx lr %08lx\n",
+                                   "%s[%d]: bad frame in sys_sigreturn: "
-                        current->comm, current->pid,
+                                   "%p nip %08lx lr %08lx\n",
-                        addr, regs->nip, regs->link);
+                                   current->comm, current->pid,
+                                   addr, regs->nip, regs->link);
        force_sig(SIGSEGV, current);
        return 0;
diff --git a/arch/powerpc/kernel/signal_64.c b/arch/powerpc/kernel/signal_64.c
index 27c4a4584f80..e91c736cc842 100644
--- a/arch/powerpc/kernel/signal_64.c
+++ b/arch/powerpc/kernel/signal_64.c
@@ -24,6 +24,7 @@
 #include <linux/elf.h>
 #include <linux/ptrace.h>
 #include <linux/module.h>
+#include <linux/ratelimit.h>
 #include <asm/sigcontext.h>
 #include <asm/ucontext.h>
@@ -380,10 +381,10 @@ badframe:
        printk("badframe in sys_rt_sigreturn, regs=%p uc=%p &uc->uc_mcontext=%p\n",
               regs, uc, &uc->uc_mcontext);
 #endif
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(regs->msr & MSR_SF ? fmt64 : fmt32,
+                printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
-                        current->comm, current->pid, "rt_sigreturn",
+                                   current->comm, current->pid, "rt_sigreturn",
-                        (long)uc, regs->nip, regs->link);
+                                   (long)uc, regs->nip, regs->link);
        force_sig(SIGSEGV, current);
        return 0;
@@ -468,10 +469,10 @@ badframe:
        printk("badframe in setup_rt_frame, regs=%p frame=%p newsp=%lx\n",
               regs, frame, newsp);
 #endif
-        if (show_unhandled_signals && printk_ratelimit())
+        if (show_unhandled_signals)
-                printk(regs->msr & MSR_SF ? fmt64 : fmt32,
+                printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
-                        current->comm, current->pid, "setup_rt_frame",
+                                   current->comm, current->pid, "setup_rt_frame",
-                        (long)frame, regs->nip, regs->link);
+                                   (long)frame, regs->nip, regs->link);
        force_sigsegv(signr, current);
        return 0;
diff --git a/arch/powerpc/kernel/smp.c b/arch/powerpc/kernel/smp.c
index 0008bc58e826..8ebc6700b98d 100644
--- a/arch/powerpc/kernel/smp.c
+++ b/arch/powerpc/kernel/smp.c
@@ -57,6 +57,25 @@
 #define DBG(fmt...)
 #endif
+/* Store all idle threads, this can be reused instead of creating
+* a new thread. Also avoids complicated thread destroy functionality
+* for idle threads.
+*/
+#ifdef CONFIG_HOTPLUG_CPU
+/*
+ * Needed only for CONFIG_HOTPLUG_CPU because __cpuinitdata is
+ * removed after init for !CONFIG_HOTPLUG_CPU.
+ */
+static DEFINE_PER_CPU(struct task_struct *, idle_thread_array);
+#define get_idle_for_cpu(x)      (per_cpu(idle_thread_array, x))
+#define set_idle_for_cpu(x, p)   (per_cpu(idle_thread_array, x) = (p))
+#else
+static struct task_struct *idle_thread_array[NR_CPUS] __cpuinitdata ;
+#define get_idle_for_cpu(x)      (idle_thread_array[(x)])
+#define set_idle_for_cpu(x, p)   (idle_thread_array[(x)] = (p))
+#endif
 struct thread_info *secondary_ti;
 DEFINE_PER_CPU(cpumask_var_t, cpu_sibling_map);
@@ -76,7 +95,7 @@ int smt_enabled_at_boot = 1;
 static void (*crash_ipi_function_ptr)(struct pt_regs *) = NULL;
 #ifdef CONFIG_PPC64
-void __devinit smp_generic_kick_cpu(int nr)
+int __devinit smp_generic_kick_cpu(int nr)
 {
        BUG_ON(nr < 0 || nr >= NR_CPUS);
@@ -87,37 +106,10 @@ void __devinit smp_generic_kick_cpu(int nr)
         */
        paca[nr].cpu_start = 1;
        smp_mb();
-}
-#endif
-void smp_message_recv(int msg)
+        return 0;
-{
-        switch(msg) {
-        case PPC_MSG_CALL_FUNCTION:
-                generic_smp_call_function_interrupt();
-                break;
-        case PPC_MSG_RESCHEDULE:
-                /* we notice need_resched on exit */
-                break;
-        case PPC_MSG_CALL_FUNC_SINGLE:
-                generic_smp_call_function_single_interrupt();
-                break;
-        case PPC_MSG_DEBUGGER_BREAK:
-                if (crash_ipi_function_ptr) {
-                        crash_ipi_function_ptr(get_irq_regs());
-                        break;
-                }
-#ifdef CONFIG_DEBUGGER
-                debugger_ipi(get_irq_regs());
-                break;
-#endif /* CONFIG_DEBUGGER */
-                /* FALLTHROUGH */
-        default:
-                printk("SMP %d: smp_message_recv(): unknown msg %d\n",
-                       smp_processor_id(), msg);
-                break;
-        }
 }
+#endif
 static irqreturn_t call_function_action(int irq, void *data)
 {
@@ -127,7 +119,7 @@ static irqreturn_t call_function_action(int irq, void *data)
 static irqreturn_t reschedule_action(int irq, void *data)
 {
-        /* we just need the return path side effect of checking need_resched */
+        scheduler_ipi();
        return IRQ_HANDLED;
 }
@@ -139,7 +131,15 @@ static irqreturn_t call_function_single_action(int irq, void *data)
 static irqreturn_t debug_ipi_action(int irq, void *data)
 {
-        smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
+        if (crash_ipi_function_ptr) {
+                crash_ipi_function_ptr(get_irq_regs());
+                return IRQ_HANDLED;
+        }
+#ifdef CONFIG_DEBUGGER
+        debugger_ipi(get_irq_regs());
+#endif /* CONFIG_DEBUGGER */
        return IRQ_HANDLED;
 }
@@ -178,6 +178,66 @@ int smp_request_message_ipi(int virq, int msg)
        return err;
 }
+#ifdef CONFIG_PPC_SMP_MUXED_IPI
+struct cpu_messages {
+        int messages;                   /* current messages */
+        unsigned long data;             /* data for cause ipi */
+};
+static DEFINE_PER_CPU_SHARED_ALIGNED(struct cpu_messages, ipi_message);
+void smp_muxed_ipi_set_data(int cpu, unsigned long data)
+{
+        struct cpu_messages *info = &per_cpu(ipi_message, cpu);
+        info->data = data;
+}
+void smp_muxed_ipi_message_pass(int cpu, int msg)
+{
+        struct cpu_messages *info = &per_cpu(ipi_message, cpu);
+        char *message = (char *)&info->messages;
+        message[msg] = 1;
+        mb();
+        smp_ops->cause_ipi(cpu, info->data);
+}
+void smp_muxed_ipi_resend(void)
+{
+        struct cpu_messages *info = &__get_cpu_var(ipi_message);
+        if (info->messages)
+                smp_ops->cause_ipi(smp_processor_id(), info->data);
+}
+irqreturn_t smp_ipi_demux(void)
+{
+        struct cpu_messages *info = &__get_cpu_var(ipi_message);
+        unsigned int all;
+        mb();   /* order any irq clear */
+        do {
+                all = xchg_local(&info->messages, 0);
+#ifdef __BIG_ENDIAN
+                if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNCTION)))
+                        generic_smp_call_function_interrupt();
+                if (all & (1 << (24 - 8 * PPC_MSG_RESCHEDULE)))
+                        scheduler_ipi();
+                if (all & (1 << (24 - 8 * PPC_MSG_CALL_FUNC_SINGLE)))
+                        generic_smp_call_function_single_interrupt();
+                if (all & (1 << (24 - 8 * PPC_MSG_DEBUGGER_BREAK)))
+                        debug_ipi_action(0, NULL);
+#else
+#error Unsupported ENDIAN
+#endif
+        } while (info->messages);
+        return IRQ_HANDLED;
+}
+#endif /* CONFIG_PPC_SMP_MUXED_IPI */
 void smp_send_reschedule(int cpu)
 {
        if (likely(smp_ops))
@@ -197,11 +257,18 @@ void arch_send_call_function_ipi_mask(const struct cpumask *mask)
                smp_ops->message_pass(cpu, PPC_MSG_CALL_FUNCTION);
 }
-#ifdef CONFIG_DEBUGGER
+#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
-void smp_send_debugger_break(int cpu)
+void smp_send_debugger_break(void)
 {
-        if (likely(smp_ops))
+        int cpu;
-                smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK);
+        int me = raw_smp_processor_id();
+        if (unlikely(!smp_ops))
+                return;
+        for_each_online_cpu(cpu)
+                if (cpu != me)
+                        smp_ops->message_pass(cpu, PPC_MSG_DEBUGGER_BREAK);
 }
 #endif
@@ -209,9 +276,9 @@ void smp_send_debugger_break(int cpu)
 void crash_send_ipi(void (*crash_ipi_callback)(struct pt_regs *))
 {
        crash_ipi_function_ptr = crash_ipi_callback;
-        if (crash_ipi_callback && smp_ops) {
+        if (crash_ipi_callback) {
                mb();
-                smp_ops->message_pass(MSG_ALL_BUT_SELF, PPC_MSG_DEBUGGER_BREAK);
+                smp_send_debugger_break();
        }
 }
 #endif
@@ -238,23 +305,6 @@ static void __devinit smp_store_cpu_info(int id)
        per_cpu(cpu_pvr, id) = mfspr(SPRN_PVR);
 }
-static void __init smp_create_idle(unsigned int cpu)
-{
-        struct task_struct *p;
-        /* create a process for the processor */
-        p = fork_idle(cpu);
-        if (IS_ERR(p))
-                panic("failed fork for CPU %u: %li", cpu, PTR_ERR(p));
-#ifdef CONFIG_PPC64
-        paca[cpu].__current = p;
-        paca[cpu].kstack = (unsigned long) task_thread_info(p)
-                + THREAD_SIZE - STACK_FRAME_OVERHEAD;
-#endif
-        current_set[cpu] = task_thread_info(p);
-        task_thread_info(p)->cpu = cpu;
-}
 void __init smp_prepare_cpus(unsigned int max_cpus)
 {
        unsigned int cpu;
@@ -288,10 +338,6 @@ void __init smp_prepare_cpus(unsigned int max_cpus)
                        max_cpus = NR_CPUS;
        else
                max_cpus = 1;
-        for_each_possible_cpu(cpu)
-                if (cpu != boot_cpuid)
-                        smp_create_idle(cpu);
 }
 void __devinit smp_prepare_boot_cpu(void)
@@ -305,7 +351,7 @@ void __devinit smp_prepare_boot_cpu(void)
 #ifdef CONFIG_HOTPLUG_CPU
 /* State of each CPU during hotplug phases */
-DEFINE_PER_CPU(int, cpu_state) = { 0 };
+static DEFINE_PER_CPU(int, cpu_state) = { 0 };
 int generic_cpu_disable(void)
 {
@@ -317,30 +363,8 @@ int generic_cpu_disable(void)
        set_cpu_online(cpu, false);
 #ifdef CONFIG_PPC64
        vdso_data->processorCount--;
-        fixup_irqs(cpu_online_mask);
-#endif
-        return 0;
-}
-int generic_cpu_enable(unsigned int cpu)
-{
-        /* Do the normal bootup if we haven't
-         * already bootstrapped. */
-        if (system_state != SYSTEM_RUNNING)
-                return -ENOSYS;
-        /* get the target out of it's holding state */
-        per_cpu(cpu_state, cpu) = CPU_UP_PREPARE;
-        smp_wmb();
-        while (!cpu_online(cpu))
-                cpu_relax();
-#ifdef CONFIG_PPC64
-        fixup_irqs(cpu_online_mask);
-        /* counter the irq disable in fixup_irqs */
-        local_irq_enable();
 #endif
+        migrate_irqs();
        return 0;
 }
@@ -362,37 +386,89 @@ void generic_mach_cpu_die(void)
        unsigned int cpu;
        local_irq_disable();
+        idle_task_exit();
        cpu = smp_processor_id();
        printk(KERN_DEBUG "CPU%d offline\n", cpu);
        __get_cpu_var(cpu_state) = CPU_DEAD;
        smp_wmb();
        while (__get_cpu_var(cpu_state) != CPU_UP_PREPARE)
                cpu_relax();
-        set_cpu_online(cpu, true);
+}
-        local_irq_enable();
+void generic_set_cpu_dead(unsigned int cpu)
+{
+        per_cpu(cpu_state, cpu) = CPU_DEAD;
 }
 #endif
-static int __devinit cpu_enable(unsigned int cpu)
+struct create_idle {
+        struct work_struct work;
+        struct task_struct *idle;
+        struct completion done;
+        int cpu;
+};
+static void __cpuinit do_fork_idle(struct work_struct *work)
 {
-        if (smp_ops && smp_ops->cpu_enable)
+        struct create_idle *c_idle =
-                return smp_ops->cpu_enable(cpu);
+                container_of(work, struct create_idle, work);
-        return -ENOSYS;
+        c_idle->idle = fork_idle(c_idle->cpu);
+        complete(&c_idle->done);
 }
-int __cpuinit __cpu_up(unsigned int cpu)
+static int __cpuinit create_idle(unsigned int cpu)
 {
-        int c;
+        struct thread_info *ti;
+        struct create_idle c_idle = {
+                .cpu    = cpu,
+                .done   = COMPLETION_INITIALIZER_ONSTACK(c_idle.done),
+        };
+        INIT_WORK_ONSTACK(&c_idle.work, do_fork_idle);
-        secondary_ti = current_set[cpu];
+        c_idle.idle = get_idle_for_cpu(cpu);
-        if (!cpu_enable(cpu))
-                return 0;
+        /* We can't use kernel_thread since we must avoid to
+         * reschedule the child. We use a workqueue because
+         * we want to fork from a kernel thread, not whatever
+         * userspace process happens to be trying to online us.
+         */
+        if (!c_idle.idle) {
+                schedule_work(&c_idle.work);
+                wait_for_completion(&c_idle.done);
+        } else
+                init_idle(c_idle.idle, cpu);
+        if (IS_ERR(c_idle.idle)) {              
+                pr_err("Failed fork for CPU %u: %li", cpu, PTR_ERR(c_idle.idle));
+                return PTR_ERR(c_idle.idle);
+        }
+        ti = task_thread_info(c_idle.idle);
+#ifdef CONFIG_PPC64
+        paca[cpu].__current = c_idle.idle;
+        paca[cpu].kstack = (unsigned long)ti + THREAD_SIZE - STACK_FRAME_OVERHEAD;
+#endif
+        ti->cpu = cpu;
+        current_set[cpu] = ti;
+        return 0;
+}
+int __cpuinit __cpu_up(unsigned int cpu)
+{
+        int rc, c;
        if (smp_ops == NULL ||
            (smp_ops->cpu_bootable && !smp_ops->cpu_bootable(cpu)))
                return -EINVAL;
+        /* Make sure we have an idle thread */
+        rc = create_idle(cpu);
+        if (rc)
+                return rc;
+        secondary_ti = current_set[cpu];
        /* Make sure callin-map entry is 0 (can be leftover a CPU
         * hotplug
         */
@@ -406,7 +482,11 @@ int __cpuinit __cpu_up(unsigned int cpu)
        /* wake up cpus */
        DBG("smp: kicking cpu %d\n", cpu);
-        smp_ops->kick_cpu(cpu);
+        rc = smp_ops->kick_cpu(cpu);
+        if (rc) {
+                pr_err("smp: failed starting cpu %d (rc %d)\n", cpu, rc);
+                return rc;
+        }
        /*
         * wait to see if the cpu made a callin (is actually up).
@@ -466,6 +546,19 @@ out:
        return id;
 }
+/* Helper routines for cpu to core mapping */
+int cpu_core_index_of_thread(int cpu)
+{
+        return cpu >> threads_shift;
+}
+EXPORT_SYMBOL_GPL(cpu_core_index_of_thread);
+int cpu_first_thread_of_core(int core)
+{
+        return core << threads_shift;
+}
+EXPORT_SYMBOL_GPL(cpu_first_thread_of_core);
 /* Must be called when no change can occur to cpu_present_mask,
 * i.e. during cpu online or offline.
 */
@@ -489,7 +582,7 @@ static struct device_node *cpu_to_l2cache(int cpu)
 }
 /* Activate a secondary processor. */
-int __devinit start_secondary(void *unused)
+void __devinit start_secondary(void *unused)
 {
        unsigned int cpu = smp_processor_id();
        struct device_node *l2_cache;
@@ -508,16 +601,17 @@ int __devinit start_secondary(void *unused)
        if (smp_ops->take_timebase)
                smp_ops->take_timebase();
-        if (system_state > SYSTEM_BOOTING)
-                snapshot_timebase();
        secondary_cpu_time_init();
+#ifdef CONFIG_PPC64
+        if (system_state == SYSTEM_RUNNING)
+                vdso_data->processorCount++;
+#endif
        ipi_call_lock();
        notify_cpu_starting(cpu);
        set_cpu_online(cpu, true);
        /* Update sibling maps */
-        base = cpu_first_thread_in_core(cpu);
+        base = cpu_first_thread_sibling(cpu);
        for (i = 0; i < threads_per_core; i++) {
                if (cpu_is_offline(base + i))
                        continue;
@@ -548,7 +642,8 @@ int __devinit start_secondary(void *unused)
        local_irq_enable();
        cpu_idle();
-        return 0;
+        BUG();
 }
 int setup_profiling_timer(unsigned int multiplier)
@@ -565,7 +660,7 @@ void __init smp_cpus_done(unsigned int max_cpus)
         * se we pin us down to CPU 0 for a short while
         */
        alloc_cpumask_var(&old_mask, GFP_NOWAIT);
-        cpumask_copy(old_mask, &current->cpus_allowed);
+        cpumask_copy(old_mask, tsk_cpus_allowed(current));
        set_cpus_allowed_ptr(current, cpumask_of(boot_cpuid));
        
        if (smp_ops && smp_ops->setup_cpu)
@@ -575,9 +670,20 @@ void __init smp_cpus_done(unsigned int max_cpus)
        free_cpumask_var(old_mask);
-        snapshot_timebases();
+        if (smp_ops && smp_ops->bringup_done)
+                smp_ops->bringup_done();
        dump_numa_cpu_topology();
+}
+int arch_sd_sibling_asym_packing(void)
+{
+        if (cpu_has_feature(CPU_FTR_ASYM_SMT)) {
+                printk_once(KERN_INFO "Enabling Asymmetric SMT scheduling\n");
+                return SD_ASYM_PACKING;
+        }
+        return 0;
 }
 #ifdef CONFIG_HOTPLUG_CPU
@@ -596,7 +702,7 @@ int __cpu_disable(void)
                return err;
        /* Update sibling maps */
-        base = cpu_first_thread_in_core(cpu);
+        base = cpu_first_thread_sibling(cpu);
        for (i = 0; i < threads_per_core; i++) {
                cpumask_clear_cpu(cpu, cpu_sibling_mask(base + i));
                cpumask_clear_cpu(base + i, cpu_sibling_mask(cpu));
@@ -643,5 +749,9 @@ void cpu_die(void)
 {
        if (ppc_md.cpu_die)
                ppc_md.cpu_die();
+        /* If we return, we re-enter start_secondary */
+        start_secondary_resume();
 }
 #endif
diff --git a/arch/powerpc/kernel/swsusp.c b/arch/powerpc/kernel/swsusp.c
index 560c96119501..aa17b76dd427 100644
--- a/arch/powerpc/kernel/swsusp.c
+++ b/arch/powerpc/kernel/swsusp.c
@@ -10,7 +10,6 @@
 */
 #include <linux/sched.h>
-#include <asm/suspend.h>
 #include <asm/system.h>
 #include <asm/current.h>
 #include <asm/mmu_context.h>
diff --git a/arch/powerpc/kernel/swsusp_32.S b/arch/powerpc/kernel/swsusp_32.S
index b0754e237438..ba4dee3d233f 100644
--- a/arch/powerpc/kernel/swsusp_32.S
+++ b/arch/powerpc/kernel/swsusp_32.S
@@ -143,7 +143,7 @@ END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
        /* Disable MSR:DR to make sure we don't take a TLB or
         * hash miss during the copy, as our hash table will
-         * for a while be unuseable. For .text, we assume we are
+         * for a while be unusable. For .text, we assume we are
         * covered by a BAT. This works only for non-G5 at this
         * point. G5 will need a better approach, possibly using
         * a small temporary hash table filled with large mappings,
diff --git a/arch/powerpc/kernel/sys_ppc32.c b/arch/powerpc/kernel/sys_ppc32.c
index b1b6043a56c4..4e5bf1edc0f2 100644
--- a/arch/powerpc/kernel/sys_ppc32.c
+++ b/arch/powerpc/kernel/sys_ppc32.c
@@ -23,7 +23,6 @@
 #include <linux/resource.h>
 #include <linux/times.h>
 #include <linux/smp.h>
-#include <linux/smp_lock.h>
 #include <linux/sem.h>
 #include <linux/msg.h>
 #include <linux/shm.h>
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c
index c0d8c2006bf4..f0f2199e64e1 100644
--- a/arch/powerpc/kernel/sysfs.c
+++ b/arch/powerpc/kernel/sysfs.c
@@ -182,6 +182,41 @@ static SYSDEV_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
 static SYSDEV_ATTR(spurr, 0600, show_spurr, NULL);
 static SYSDEV_ATTR(dscr, 0600, show_dscr, store_dscr);
 static SYSDEV_ATTR(purr, 0600, show_purr, store_purr);
+unsigned long dscr_default = 0;
+EXPORT_SYMBOL(dscr_default);
+static ssize_t show_dscr_default(struct sysdev_class *class,
+                struct sysdev_class_attribute *attr, char *buf)
+{
+        return sprintf(buf, "%lx\n", dscr_default);
+}
+static ssize_t __used store_dscr_default(struct sysdev_class *class,
+                struct sysdev_class_attribute *attr, const char *buf,
+                size_t count)
+{
+        unsigned long val;
+        int ret = 0;
+        
+        ret = sscanf(buf, "%lx", &val);
+        if (ret != 1)
+                return -EINVAL;
+        dscr_default = val;
+        return count;
+}
+static SYSDEV_CLASS_ATTR(dscr_default, 0600,
+                show_dscr_default, store_dscr_default);
+static void sysfs_create_dscr_default(void)
+{
+        int err = 0;
+        if (cpu_has_feature(CPU_FTR_DSCR))
+                err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
+                        &attr_dscr_default.attr);
+}
 #endif /* CONFIG_PPC64 */
 #ifdef HAS_PPC_PMC_PA6T
@@ -617,6 +652,9 @@ static int __init topology_init(void)
                if (cpu_online(cpu))
                        register_cpu_online(cpu);
        }
+#ifdef CONFIG_PPC64
+        sysfs_create_dscr_default();
+#endif /* CONFIG_PPC64 */
        return 0;
 }
diff --git a/arch/powerpc/kernel/time.c b/arch/powerpc/kernel/time.c
index 8533b3b83f5d..f33acfd872ad 100644
--- a/arch/powerpc/kernel/time.c
+++ b/arch/powerpc/kernel/time.c
@@ -53,7 +53,7 @@
 #include <linux/posix-timers.h>
 #include <linux/irq.h>
 #include <linux/delay.h>
-#include <linux/perf_event.h>
+#include <linux/irq_work.h>
 #include <asm/trace.h>
 #include <asm/io.h>
@@ -155,16 +155,15 @@ EXPORT_SYMBOL_GPL(rtc_lock);
 static u64 tb_to_ns_scale __read_mostly;
 static unsigned tb_to_ns_shift __read_mostly;
-static unsigned long boot_tb __read_mostly;
+static u64 boot_tb __read_mostly;
 extern struct timezone sys_tz;
 static long timezone_offset;
 unsigned long ppc_proc_freq;
-EXPORT_SYMBOL(ppc_proc_freq);
+EXPORT_SYMBOL_GPL(ppc_proc_freq);
 unsigned long ppc_tb_freq;
+EXPORT_SYMBOL_GPL(ppc_tb_freq);
-static DEFINE_PER_CPU(u64, last_jiffy);
 #ifdef CONFIG_VIRT_CPU_ACCOUNTING
 /*
@@ -185,6 +184,8 @@ DEFINE_PER_CPU(unsigned long, cputime_scaled_last_delta);
 cputime_t cputime_one_jiffy;
+void (*dtl_consumer)(struct dtl_entry *, u64);
 static void calc_cputime_factors(void)
 {
        struct div_result res;
@@ -200,62 +201,171 @@ static void calc_cputime_factors(void)
 }
 /*
- * Read the PURR on systems that have it, otherwise the timebase.
+ * Read the SPURR on systems that have it, otherwise the PURR,
+ * or if that doesn't exist return the timebase value passed in.
 */
-static u64 read_purr(void)
+static u64 read_spurr(u64 tb)
 {
+        if (cpu_has_feature(CPU_FTR_SPURR))
+                return mfspr(SPRN_SPURR);
        if (cpu_has_feature(CPU_FTR_PURR))
                return mfspr(SPRN_PURR);
-        return mftb();
+        return tb;
 }
+#ifdef CONFIG_PPC_SPLPAR
 /*
- * Read the SPURR on systems that have it, otherwise the purr
+ * Scan the dispatch trace log and count up the stolen time.
+ * Should be called with interrupts disabled.
 */
-static u64 read_spurr(u64 purr)
+static u64 scan_dispatch_log(u64 stop_tb)
 {
-        /*
+        u64 i = local_paca->dtl_ridx;
-         * cpus without PURR won't have a SPURR
+        struct dtl_entry *dtl = local_paca->dtl_curr;
-         * We already know the former when we use this, so tell gcc
+        struct dtl_entry *dtl_end = local_paca->dispatch_log_end;
+        struct lppaca *vpa = local_paca->lppaca_ptr;
+        u64 tb_delta;
+        u64 stolen = 0;
+        u64 dtb;
+        if (!dtl)
+                return 0;
+        if (i == vpa->dtl_idx)
+                return 0;
+        while (i < vpa->dtl_idx) {
+                if (dtl_consumer)
+                        dtl_consumer(dtl, i);
+                dtb = dtl->timebase;
+                tb_delta = dtl->enqueue_to_dispatch_time +
+                        dtl->ready_to_enqueue_time;
+                barrier();
+                if (i + N_DISPATCH_LOG < vpa->dtl_idx) {
+                        /* buffer has overflowed */
+                        i = vpa->dtl_idx - N_DISPATCH_LOG;
+                        dtl = local_paca->dispatch_log + (i % N_DISPATCH_LOG);
+                        continue;
+                }
+                if (dtb > stop_tb)
+                        break;
+                stolen += tb_delta;
+                ++i;
+                ++dtl;
+                if (dtl == dtl_end)
+                        dtl = local_paca->dispatch_log;
+        }
+        local_paca->dtl_ridx = i;
+        local_paca->dtl_curr = dtl;
+        return stolen;
+}
+/*
+ * Accumulate stolen time by scanning the dispatch trace log.
+ * Called on entry from user mode.
+ */
+void accumulate_stolen_time(void)
+{
+        u64 sst, ust;
+        u8 save_soft_enabled = local_paca->soft_enabled;
+        u8 save_hard_enabled = local_paca->hard_enabled;
+        /* We are called early in the exception entry, before
+         * soft/hard_enabled are sync'ed to the expected state
+         * for the exception. We are hard disabled but the PACA
+         * needs to reflect that so various debug stuff doesn't
+         * complain
         */
-        if (cpu_has_feature(CPU_FTR_PURR) && cpu_has_feature(CPU_FTR_SPURR))
+        local_paca->soft_enabled = 0;
-                return mfspr(SPRN_SPURR);
+        local_paca->hard_enabled = 0;
-        return purr;
+        sst = scan_dispatch_log(local_paca->starttime_user);
+        ust = scan_dispatch_log(local_paca->starttime);
+        local_paca->system_time -= sst;
+        local_paca->user_time -= ust;
+        local_paca->stolen_time += ust + sst;
+        local_paca->soft_enabled = save_soft_enabled;
+        local_paca->hard_enabled = save_hard_enabled;
+}
+static inline u64 calculate_stolen_time(u64 stop_tb)
+{
+        u64 stolen = 0;
+        if (get_paca()->dtl_ridx != get_paca()->lppaca_ptr->dtl_idx) {
+                stolen = scan_dispatch_log(stop_tb);
+                get_paca()->system_time -= stolen;
+        }
+        stolen += get_paca()->stolen_time;
+        get_paca()->stolen_time = 0;
+        return stolen;
 }
+#else /* CONFIG_PPC_SPLPAR */
+static inline u64 calculate_stolen_time(u64 stop_tb)
+{
+        return 0;
+}
+#endif /* CONFIG_PPC_SPLPAR */
 /*
 * Account time for a transition between system, hard irq
 * or soft irq state.
 */
 void account_system_vtime(struct task_struct *tsk)
 {
-        u64 now, nowscaled, delta, deltascaled, sys_time;
+        u64 now, nowscaled, delta, deltascaled;
        unsigned long flags;
+        u64 stolen, udelta, sys_scaled, user_scaled;
        local_irq_save(flags);
-        now = read_purr();
+        now = mftb();
        nowscaled = read_spurr(now);
-        delta = now - get_paca()->startpurr;
+        get_paca()->system_time += now - get_paca()->starttime;
+        get_paca()->starttime = now;
        deltascaled = nowscaled - get_paca()->startspurr;
-        get_paca()->startpurr = now;
        get_paca()->startspurr = nowscaled;
-        if (!in_interrupt()) {
-                /* deltascaled includes both user and system time.
+        stolen = calculate_stolen_time(now);
-                 * Hence scale it based on the purr ratio to estimate
-                 * the system time */
+        delta = get_paca()->system_time;
-                sys_time = get_paca()->system_time;
+        get_paca()->system_time = 0;
-                if (get_paca()->user_time)
+        udelta = get_paca()->user_time - get_paca()->utime_sspurr;
-                        deltascaled = deltascaled * sys_time /
+        get_paca()->utime_sspurr = get_paca()->user_time;
-                             (sys_time + get_paca()->user_time);
-                delta += sys_time;
+        /*
-                get_paca()->system_time = 0;
+         * Because we don't read the SPURR on every kernel entry/exit,
+         * deltascaled includes both user and system SPURR ticks.
+         * Apportion these ticks to system SPURR ticks and user
+         * SPURR ticks in the same ratio as the system time (delta)
+         * and user time (udelta) values obtained from the timebase
+         * over the same interval.  The system ticks get accounted here;
+         * the user ticks get saved up in paca->user_time_scaled to be
+         * used by account_process_tick.
+         */
+        sys_scaled = delta;
+        user_scaled = udelta;
+        if (deltascaled != delta + udelta) {
+                if (udelta) {
+                        sys_scaled = deltascaled * delta / (delta + udelta);
+                        user_scaled = deltascaled - sys_scaled;
+                } else {
+                        sys_scaled = deltascaled;
+                }
+        }
+        get_paca()->user_time_scaled += user_scaled;
+        if (in_interrupt() || idle_task(smp_processor_id()) != tsk) {
+                account_system_time(tsk, 0, delta, sys_scaled);
+                if (stolen)
+                        account_steal_time(stolen);
+        } else {
+                account_idle_time(delta + stolen);
        }
-        if (in_irq() || idle_task(smp_processor_id()) != tsk)
-                account_system_time(tsk, 0, delta, deltascaled);
-        else
-                account_idle_time(delta);
-        __get_cpu_var(cputime_last_delta) = delta;
-        __get_cpu_var(cputime_scaled_last_delta) = deltascaled;
        local_irq_restore(flags);
 }
 EXPORT_SYMBOL_GPL(account_system_vtime);
@@ -265,125 +375,26 @@ EXPORT_SYMBOL_GPL(account_system_vtime);
 * by the exception entry and exit code to the generic process
 * user and system time records.
 * Must be called with interrupts disabled.
+ * Assumes that account_system_vtime() has been called recently
+ * (i.e. since the last entry from usermode) so that
+ * get_paca()->user_time_scaled is up to date.
 */
 void account_process_tick(struct task_struct *tsk, int user_tick)
 {
        cputime_t utime, utimescaled;
        utime = get_paca()->user_time;
+        utimescaled = get_paca()->user_time_scaled;
        get_paca()->user_time = 0;
-        utimescaled = cputime_to_scaled(utime);
+        get_paca()->user_time_scaled = 0;
+        get_paca()->utime_sspurr = 0;
        account_user_time(tsk, utime, utimescaled);
 }
-/*
- * Stuff for accounting stolen time.
- */
-struct cpu_purr_data {
-        int     initialized;                    /* thread is running */
-        u64     tb;                     /* last TB value read */
-        u64     purr;                   /* last PURR value read */
-        u64     spurr;                  /* last SPURR value read */
-};
-/*
- * Each entry in the cpu_purr_data array is manipulated only by its
- * "owner" cpu -- usually in the timer interrupt but also occasionally
- * in process context for cpu online.  As long as cpus do not touch
- * each others' cpu_purr_data, disabling local interrupts is
- * sufficient to serialize accesses.
- */
-static DEFINE_PER_CPU(struct cpu_purr_data, cpu_purr_data);
-static void snapshot_tb_and_purr(void *data)
-{
-        unsigned long flags;
-        struct cpu_purr_data *p = &__get_cpu_var(cpu_purr_data);
-        local_irq_save(flags);
-        p->tb = get_tb_or_rtc();
-        p->purr = mfspr(SPRN_PURR);
-        wmb();
-        p->initialized = 1;
-        local_irq_restore(flags);
-}
-/*
- * Called during boot when all cpus have come up.
- */
-void snapshot_timebases(void)
-{
-        if (!cpu_has_feature(CPU_FTR_PURR))
-                return;
-        on_each_cpu(snapshot_tb_and_purr, NULL, 1);
-}
-/*
- * Must be called with interrupts disabled.
- */
-void calculate_steal_time(void)
-{
-        u64 tb, purr;
-        s64 stolen;
-        struct cpu_purr_data *pme;
-        pme = &__get_cpu_var(cpu_purr_data);
-        if (!pme->initialized)
-                return;         /* !CPU_FTR_PURR or early in early boot */
-        tb = mftb();
-        purr = mfspr(SPRN_PURR);
-        stolen = (tb - pme->tb) - (purr - pme->purr);
-        if (stolen > 0) {
-                if (idle_task(smp_processor_id()) != current)
-                        account_steal_time(stolen);
-                else
-                        account_idle_time(stolen);
-        }
-        pme->tb = tb;
-        pme->purr = purr;
-}
-#ifdef CONFIG_PPC_SPLPAR
-/*
- * Must be called before the cpu is added to the online map when
- * a cpu is being brought up at runtime.
- */
-static void snapshot_purr(void)
-{
-        struct cpu_purr_data *pme;
-        unsigned long flags;
-        if (!cpu_has_feature(CPU_FTR_PURR))
-                return;
-        local_irq_save(flags);
-        pme = &__get_cpu_var(cpu_purr_data);
-        pme->tb = mftb();
-        pme->purr = mfspr(SPRN_PURR);
-        pme->initialized = 1;
-        local_irq_restore(flags);
-}
-#endif /* CONFIG_PPC_SPLPAR */
 #else /* ! CONFIG_VIRT_CPU_ACCOUNTING */
 #define calc_cputime_factors()
-#define calculate_steal_time()          do { } while (0)
-#endif
-#if !(defined(CONFIG_VIRT_CPU_ACCOUNTING) && defined(CONFIG_PPC_SPLPAR))
-#define snapshot_purr()                 do { } while (0)
 #endif
-/*
- * Called when a cpu comes up after the system has finished booting,
- * i.e. as a result of a hotplug cpu action.
- */
-void snapshot_timebase(void)
-{
-        __get_cpu_var(last_jiffy) = get_tb_or_rtc();
-        snapshot_purr();
-}
 void __delay(unsigned long loops)
 {
        unsigned long start;
@@ -493,60 +504,60 @@ void __init iSeries_time_init_early(void)
 }
 #endif /* CONFIG_PPC_ISERIES */
-#ifdef CONFIG_PERF_EVENTS
+#ifdef CONFIG_IRQ_WORK
 /*
 * 64-bit uses a byte in the PACA, 32-bit uses a per-cpu variable...
 */
 #ifdef CONFIG_PPC64
-static inline unsigned long test_perf_event_pending(void)
+static inline unsigned long test_irq_work_pending(void)
 {
        unsigned long x;
        asm volatile("lbz %0,%1(13)"
                : "=r" (x)
-                : "i" (offsetof(struct paca_struct, perf_event_pending)));
+                : "i" (offsetof(struct paca_struct, irq_work_pending)));
        return x;
 }
-static inline void set_perf_event_pending_flag(void)
+static inline void set_irq_work_pending_flag(void)
 {
        asm volatile("stb %0,%1(13)" : :
                "r" (1),
-                "i" (offsetof(struct paca_struct, perf_event_pending)));
+                "i" (offsetof(struct paca_struct, irq_work_pending)));
 }
-static inline void clear_perf_event_pending(void)
+static inline void clear_irq_work_pending(void)
 {
        asm volatile("stb %0,%1(13)" : :
                "r" (0),
-                "i" (offsetof(struct paca_struct, perf_event_pending)));
+                "i" (offsetof(struct paca_struct, irq_work_pending)));
 }
 #else /* 32-bit */
-DEFINE_PER_CPU(u8, perf_event_pending);
+DEFINE_PER_CPU(u8, irq_work_pending);
-#define set_perf_event_pending_flag()   __get_cpu_var(perf_event_pending) = 1
+#define set_irq_work_pending_flag()     __get_cpu_var(irq_work_pending) = 1
-#define test_perf_event_pending()       __get_cpu_var(perf_event_pending)
+#define test_irq_work_pending()         __get_cpu_var(irq_work_pending)
-#define clear_perf_event_pending()      __get_cpu_var(perf_event_pending) = 0
+#define clear_irq_work_pending()        __get_cpu_var(irq_work_pending) = 0
 #endif /* 32 vs 64 bit */
-void set_perf_event_pending(void)
+void set_irq_work_pending(void)
 {
        preempt_disable();
-        set_perf_event_pending_flag();
+        set_irq_work_pending_flag();
        set_dec(1);
        preempt_enable();
 }
-#else  /* CONFIG_PERF_EVENTS */
+#else  /* CONFIG_IRQ_WORK */
-#define test_perf_event_pending()       0
+#define test_irq_work_pending() 0
-#define clear_perf_event_pending()
+#define clear_irq_work_pending()
-#endif /* CONFIG_PERF_EVENTS */
+#endif /* CONFIG_IRQ_WORK */
 /*
 * For iSeries shared processors, we have to let the hypervisor
@@ -569,14 +580,21 @@ void timer_interrupt(struct pt_regs * regs)
        struct clock_event_device *evt = &decrementer->event;
        u64 now;
+        /* Ensure a positive value is written to the decrementer, or else
+         * some CPUs will continue to take decrementer exceptions.
+         */
+        set_dec(DECREMENTER_MAX);
+        /* Some implementations of hotplug will get timer interrupts while
+         * offline, just ignore these
+         */
+        if (!cpu_online(smp_processor_id()))
+                return;
        trace_timer_interrupt_entry(regs);
        __get_cpu_var(irq_stat).timer_irqs++;
-        /* Ensure a positive value is written to the decrementer, or else
-         * some CPUs will continuue to take decrementer exceptions */
-        set_dec(DECREMENTER_MAX);
 #if defined(CONFIG_PPC32) && defined(CONFIG_PMAC)
        if (atomic_read(&ppc_n_lost_interrupts) != 0)
                do_IRQ(regs);
@@ -585,11 +603,9 @@ void timer_interrupt(struct pt_regs * regs)
        old_regs = set_irq_regs(regs);
        irq_enter();
-        calculate_steal_time();
+        if (test_irq_work_pending()) {
+                clear_irq_work_pending();
-        if (test_perf_event_pending()) {
+                irq_work_run();
-                clear_perf_event_pending();
-                perf_event_do_pending();
        }
 #ifdef CONFIG_PPC_ISERIES
diff --git a/arch/powerpc/kernel/traps.c b/arch/powerpc/kernel/traps.c
index a45a63c3a0c7..1a0141426cda 100644
--- a/arch/powerpc/kernel/traps.c
+++ b/arch/powerpc/kernel/traps.c
@@ -34,6 +34,7 @@
 #include <linux/bug.h>
 #include <linux/kdebug.h>
 #include <linux/debugfs.h>
+#include <linux/ratelimit.h>
 #include <asm/emulated_ops.h>
 #include <asm/pgtable.h>
@@ -55,6 +56,7 @@
 #endif
 #include <asm/kexec.h>
 #include <asm/ppc-opcode.h>
+#include <asm/rio.h>
 #if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
 int (*__debugger)(struct pt_regs *regs) __read_mostly;
@@ -143,7 +145,6 @@ int die(const char *str, struct pt_regs *regs, long err)
 #endif
                printk("%s\n", ppc_md.name ? ppc_md.name : "");
-                sysfs_printk_last_file();
                if (notify_die(DIE_OOPS, str, regs, err, 255,
                               SIGSEGV) == NOTIFY_STOP)
                        return 1;
@@ -197,12 +198,11 @@ void _exception(int signr, struct pt_regs *regs, int code, unsigned long addr)
                if (die("Exception in kernel mode", regs, signr))
                        return;
        } else if (show_unhandled_signals &&
-                    unhandled_signal(current, signr) &&
+                   unhandled_signal(current, signr)) {
-                    printk_ratelimit()) {
+                printk_ratelimited(regs->msr & MSR_64BIT ? fmt64 : fmt32,
-                        printk(regs->msr & MSR_SF ? fmt64 : fmt32,
+                                   current->comm, current->pid, signr,
-                                current->comm, current->pid, signr,
+                                   addr, regs->nip, regs->link, code);
-                                addr, regs->nip, regs->link, code);
+        }
-                }
        memset(&info, 0, sizeof(info));
        info.si_signo = signr;
@@ -221,7 +221,7 @@ void system_reset_exception(struct pt_regs *regs)
        }
 #ifdef CONFIG_KEXEC
-        cpu_set(smp_processor_id(), cpus_in_sr);
+        cpumask_set_cpu(smp_processor_id(), &cpus_in_sr);
 #endif
        die("System Reset", regs, SIGABRT);
@@ -425,6 +425,12 @@ int machine_check_e500mc(struct pt_regs *regs)
        unsigned long reason = mcsr;
        int recoverable = 1;
+        if (reason & MCSR_LD) {
+                recoverable = fsl_rio_mcheck_exception(regs);
+                if (recoverable == 1)
+                        goto silent_out;
+        }
        printk("Machine check in kernel mode.\n");
        printk("Caused by (from MCSR=%lx): ", reason);
@@ -500,6 +506,7 @@ int machine_check_e500mc(struct pt_regs *regs)
                       reason & MCSR_MEA ? "Effective" : "Physical", addr);
        }
+silent_out:
        mtspr(SPRN_MCSR, mcsr);
        return mfspr(SPRN_MCSR) == 0 && recoverable;
 }
@@ -508,6 +515,11 @@ int machine_check_e500(struct pt_regs *regs)
 {
        unsigned long reason = get_mc_reason(regs);
+        if (reason & MCSR_BUS_RBERR) {
+                if (fsl_rio_mcheck_exception(regs))
+                        return 1;
+        }
        printk("Machine check in kernel mode.\n");
        printk("Caused by (from MCSR=%lx): ", reason);
@@ -538,6 +550,11 @@ int machine_check_e500(struct pt_regs *regs)
        return 0;
 }
+int machine_check_generic(struct pt_regs *regs)
+{
+        return 0;
+}
 #elif defined(CONFIG_E200)
 int machine_check_e200(struct pt_regs *regs)
 {
@@ -621,12 +638,6 @@ void machine_check_exception(struct pt_regs *regs)
        if (recover > 0)
                return;
-        if (user_mode(regs)) {
-                regs->msr |= MSR_RI;
-                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
-                return;
-        }
 #if defined(CONFIG_8xx) && defined(CONFIG_PCI)
        /* the qspan pci read routines can cause machine checks -- Cort
         *
@@ -638,16 +649,12 @@ void machine_check_exception(struct pt_regs *regs)
        return;
 #endif
-        if (debugger_fault_handler(regs)) {
+        if (debugger_fault_handler(regs))
-                regs->msr |= MSR_RI;
                return;
-        }
        if (check_io_access(regs))
                return;
-        if (debugger_fault_handler(regs))
-                return;
        die("Machine check", regs, SIGBUS);
        /* Must die if the interrupt is not recoverable */
@@ -914,6 +921,26 @@ static int emulate_instruction(struct pt_regs *regs)
                return emulate_isel(regs, instword);
        }
+#ifdef CONFIG_PPC64
+        /* Emulate the mfspr rD, DSCR. */
+        if (((instword & PPC_INST_MFSPR_DSCR_MASK) == PPC_INST_MFSPR_DSCR) &&
+                        cpu_has_feature(CPU_FTR_DSCR)) {
+                PPC_WARN_EMULATED(mfdscr, regs);
+                rd = (instword >> 21) & 0x1f;
+                regs->gpr[rd] = mfspr(SPRN_DSCR);
+                return 0;
+        }
+        /* Emulate the mtspr DSCR, rD. */
+        if (((instword & PPC_INST_MTSPR_DSCR_MASK) == PPC_INST_MTSPR_DSCR) &&
+                        cpu_has_feature(CPU_FTR_DSCR)) {
+                PPC_WARN_EMULATED(mtdscr, regs);
+                rd = (instword >> 21) & 0x1f;
+                mtspr(SPRN_DSCR, regs->gpr[rd]);
+                current->thread.dscr_inherit = 1;
+                return 0;
+        }
+#endif
        return -EINVAL;
 }
@@ -964,7 +991,7 @@ void __kprobes program_check_exception(struct pt_regs *regs)
         * ESR_DST (!?) or 0.  In the process of chasing this with the
         * hardware people - not sure if it can happen on any illegal
         * instruction or only on FP instructions, whether there is a
-         * pattern to occurences etc. -dgibson 31/Mar/2003 */
+         * pattern to occurrences etc. -dgibson 31/Mar/2003 */
        switch (do_mathemu(regs)) {
        case 0:
                emulate_single_step(regs);
@@ -1315,9 +1342,8 @@ void altivec_assist_exception(struct pt_regs *regs)
        } else {
                /* didn't recognize the instruction */
                /* XXX quick hack for now: set the non-Java bit in the VSCR */
-                if (printk_ratelimit())
+                printk_ratelimited(KERN_ERR "Unrecognized altivec instruction "
-                        printk(KERN_ERR "Unrecognized altivec instruction "
+                                   "in %s at %lx\n", current->comm, regs->nip);
-                               "in %s at %lx\n", current->comm, regs->nip);
                current->thread.vscr.u[3] |= 0x10000;
        }
 }
@@ -1511,15 +1537,18 @@ struct ppc_emulated ppc_emulated = {
 #ifdef CONFIG_VSX
        WARN_EMULATED_SETUP(vsx),
 #endif
+#ifdef CONFIG_PPC64
+        WARN_EMULATED_SETUP(mfdscr),
+        WARN_EMULATED_SETUP(mtdscr),
+#endif
 };
 u32 ppc_warn_emulated;
 void ppc_warn_emulated_print(const char *type)
 {
-        if (printk_ratelimit())
+        pr_warn_ratelimited("%s used emulated %s instruction\n", current->comm,
-                pr_warning("%s used emulated %s instruction\n", current->comm,
+                            type);
-                           type);
 }
 static int __init ppc_warn_emulated_init(void)
diff --git a/arch/powerpc/kernel/udbg.c b/arch/powerpc/kernel/udbg.c
index e39cad83c884..23d65abbedce 100644
--- a/arch/powerpc/kernel/udbg.c
+++ b/arch/powerpc/kernel/udbg.c
@@ -62,6 +62,8 @@ void __init udbg_early_init(void)
        udbg_init_cpm();
 #elif defined(CONFIG_PPC_EARLY_DEBUG_USBGECKO)
        udbg_init_usbgecko();
+#elif defined(CONFIG_PPC_EARLY_DEBUG_WSP)
+        udbg_init_wsp();
 #endif
 #ifdef CONFIG_PPC_EARLY_DEBUG
diff --git a/arch/powerpc/kernel/udbg_16550.c b/arch/powerpc/kernel/udbg_16550.c
index b4b167b33643..6837f839ab78 100644
--- a/arch/powerpc/kernel/udbg_16550.c
+++ b/arch/powerpc/kernel/udbg_16550.c
@@ -1,5 +1,5 @@
 /*
- * udbg for NS16550 compatable serial ports
+ * udbg for NS16550 compatible serial ports
 *
 * Copyright (C) 2001-2005 PPC 64 Team, IBM Corp
 *
@@ -11,6 +11,7 @@
 #include <linux/types.h>
 #include <asm/udbg.h>
 #include <asm/io.h>
+#include <asm/reg_a2.h>
 extern u8 real_readb(volatile u8 __iomem  *addr);
 extern void real_writeb(u8 data, volatile u8 __iomem *addr);
@@ -298,3 +299,53 @@ void __init udbg_init_40x_realmode(void)
        udbg_getc_poll = NULL;
 }
 #endif /* CONFIG_PPC_EARLY_DEBUG_40x */
+#ifdef CONFIG_PPC_EARLY_DEBUG_WSP
+static void udbg_wsp_flush(void)
+{
+        if (udbg_comport) {
+                while ((readb(&udbg_comport->lsr) & LSR_THRE) == 0)
+                        /* wait for idle */;
+        }
+}
+static void udbg_wsp_putc(char c)
+{
+        if (udbg_comport) {
+                if (c == '\n')
+                        udbg_wsp_putc('\r');
+                udbg_wsp_flush();
+                writeb(c, &udbg_comport->thr); eieio();
+        }
+}
+static int udbg_wsp_getc(void)
+{
+        if (udbg_comport) {
+                while ((readb(&udbg_comport->lsr) & LSR_DR) == 0)
+                        ; /* wait for char */
+                return readb(&udbg_comport->rbr);
+        }
+        return -1;
+}
+static int udbg_wsp_getc_poll(void)
+{
+        if (udbg_comport)
+                if (readb(&udbg_comport->lsr) & LSR_DR)
+                        return readb(&udbg_comport->rbr);
+        return -1;
+}
+void __init udbg_init_wsp(void)
+{
+        udbg_comport = (struct NS16550 __iomem *)WSP_UART_VIRT;
+        udbg_init_uart(udbg_comport, 57600, 50000000);
+        udbg_putc = udbg_wsp_putc;
+        udbg_flush = udbg_wsp_flush;
+        udbg_getc = udbg_wsp_getc;
+        udbg_getc_poll = udbg_wsp_getc_poll;
+}
+#endif /* CONFIG_PPC_EARLY_DEBUG_WSP */
diff --git a/arch/powerpc/kernel/vdso.c b/arch/powerpc/kernel/vdso.c
index 13002fe206e7..142ab1008c3b 100644
--- a/arch/powerpc/kernel/vdso.c
+++ b/arch/powerpc/kernel/vdso.c
@@ -159,7 +159,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
 {
        int i;
-        if (!vma || test_thread_flag(TIF_32BIT)) {
+        if (!vma || is_32bit_task()) {
                printk("vDSO32 @ %016lx:\n", (unsigned long)vdso32_kbase);
                for (i=0; i<vdso32_pages; i++) {
                        struct page *pg = virt_to_page(vdso32_kbase +
@@ -170,7 +170,7 @@ static void dump_vdso_pages(struct vm_area_struct * vma)
                        dump_one_vdso_page(pg, upg);
                }
        }
-        if (!vma || !test_thread_flag(TIF_32BIT)) {
+        if (!vma || !is_32bit_task()) {
                printk("vDSO64 @ %016lx:\n", (unsigned long)vdso64_kbase);
                for (i=0; i<vdso64_pages; i++) {
                        struct page *pg = virt_to_page(vdso64_kbase +
@@ -200,7 +200,7 @@ int arch_setup_additional_pages(struct linux_binprm *bprm, int uses_interp)
                return 0;
 #ifdef CONFIG_PPC64
-        if (test_thread_flag(TIF_32BIT)) {
+        if (is_32bit_task()) {
                vdso_pagelist = vdso32_pagelist;
                vdso_pages = vdso32_pages;
                vdso_base = VDSO32_MBASE;
@@ -820,17 +820,17 @@ static int __init vdso_init(void)
 }
 arch_initcall(vdso_init);
-int in_gate_area_no_task(unsigned long addr)
+int in_gate_area_no_mm(unsigned long addr)
 {
        return 0;
 }
-int in_gate_area(struct task_struct *task, unsigned long addr)
+int in_gate_area(struct mm_struct *mm, unsigned long addr)
 {
        return 0;
 }
-struct vm_area_struct *get_gate_vma(struct task_struct *tsk)
+struct vm_area_struct *get_gate_vma(struct mm_struct *mm)
 {
        return NULL;
 }
diff --git a/arch/powerpc/kernel/vdso32/Makefile b/arch/powerpc/kernel/vdso32/Makefile
index 51ead52141bd..9a7946c41738 100644
--- a/arch/powerpc/kernel/vdso32/Makefile
+++ b/arch/powerpc/kernel/vdso32/Makefile
@@ -14,10 +14,10 @@ obj-vdso32 := $(addprefix $(obj)/, $(obj-vdso32))
 GCOV_PROFILE := n
-EXTRA_CFLAGS := -shared -fno-common -fno-builtin
+ccflags-y := -shared -fno-common -fno-builtin
-EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
+ccflags-y += -nostdlib -Wl,-soname=linux-vdso32.so.1 \
                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
-EXTRA_AFLAGS := -D__VDSO32__ -s
+asflags-y := -D__VDSO32__ -s
 obj-y += vdso32_wrapper.o
 extra-y += vdso32.lds
diff --git a/arch/powerpc/kernel/vdso32/sigtramp.S b/arch/powerpc/kernel/vdso32/sigtramp.S
index 68d49dd71dcc..cf0c9c9c24f9 100644
--- a/arch/powerpc/kernel/vdso32/sigtramp.S
+++ b/arch/powerpc/kernel/vdso32/sigtramp.S
@@ -19,7 +19,7 @@
 /* The nop here is a hack.  The dwarf2 unwind routines subtract 1 from
   the return address to get an address in the middle of the presumed
-   call instruction.  Since we don't have a call here, we artifically
+   call instruction.  Since we don't have a call here, we artificially
   extend the range covered by the unwind info by adding a nop before
   the real start.  */
        nop
diff --git a/arch/powerpc/kernel/vdso64/Makefile b/arch/powerpc/kernel/vdso64/Makefile
index 79da65d44a2a..8c500d8622e4 100644
--- a/arch/powerpc/kernel/vdso64/Makefile
+++ b/arch/powerpc/kernel/vdso64/Makefile
@@ -9,10 +9,10 @@ obj-vdso64 := $(addprefix $(obj)/, $(obj-vdso64))
 GCOV_PROFILE := n
-EXTRA_CFLAGS := -shared -fno-common -fno-builtin
+ccflags-y := -shared -fno-common -fno-builtin
-EXTRA_CFLAGS += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
+ccflags-y += -nostdlib -Wl,-soname=linux-vdso64.so.1 \
                $(call cc-ldoption, -Wl$(comma)--hash-style=sysv)
-EXTRA_AFLAGS := -D__VDSO64__ -s
+asflags-y := -D__VDSO64__ -s
 obj-y += vdso64_wrapper.o
 extra-y += vdso64.lds
diff --git a/arch/powerpc/kernel/vdso64/sigtramp.S b/arch/powerpc/kernel/vdso64/sigtramp.S
index 59eb59bb4082..45ea281e9a21 100644
--- a/arch/powerpc/kernel/vdso64/sigtramp.S
+++ b/arch/powerpc/kernel/vdso64/sigtramp.S
@@ -20,7 +20,7 @@
 /* The nop here is a hack.  The dwarf2 unwind routines subtract 1 from
   the return address to get an address in the middle of the presumed
-   call instruction.  Since we don't have a call here, we artifically
+   call instruction.  Since we don't have a call here, we artificially
   extend the range covered by the unwind info by padding before the
   real start.  */
        nop
diff --git a/arch/powerpc/kernel/vector.S b/arch/powerpc/kernel/vector.S
index fe460482fa68..4d5a3edff49e 100644
--- a/arch/powerpc/kernel/vector.S
+++ b/arch/powerpc/kernel/vector.S
@@ -5,6 +5,7 @@
 #include <asm/cputable.h>
 #include <asm/thread_info.h>
 #include <asm/page.h>
+#include <asm/ptrace.h>
 /*
 * load_up_altivec(unused, unused, tsk)
@@ -101,7 +102,7 @@ _GLOBAL(giveup_altivec)
        MTMSRD(r5)                      /* enable use of VMX now */
        isync
        PPC_LCMPI       0,r3,0
-        beqlr-                          /* if no previous owner, done */
+        beqlr                           /* if no previous owner, done */
        addi    r3,r3,THREAD            /* want THREAD of task */
        PPC_LL  r5,PT_REGS(r3)
        PPC_LCMPI       0,r5,0
diff --git a/arch/powerpc/kernel/vio.c b/arch/powerpc/kernel/vio.c
index fa3469ddaef8..1b695fdc362b 100644
--- a/arch/powerpc/kernel/vio.c
+++ b/arch/powerpc/kernel/vio.c
@@ -238,9 +238,7 @@ static inline void vio_cmo_dealloc(struct vio_dev *viodev, size_t size)
         * memory in this pool does not change.
         */
        if (spare_needed && reserve_freed) {
-                tmp = min(spare_needed, min(reserve_freed,
+                tmp = min3(spare_needed, reserve_freed, (viodev->cmo.entitled - VIO_CMO_MIN_ENT));
-                                            (viodev->cmo.entitled -
-                                             VIO_CMO_MIN_ENT)));
                vio_cmo.spare += tmp;
                viodev->cmo.entitled -= tmp;
@@ -602,6 +600,11 @@ static void vio_dma_iommu_unmap_sg(struct device *dev,
        vio_cmo_dealloc(viodev, alloc_size);
 }
+static int vio_dma_iommu_dma_supported(struct device *dev, u64 mask)
+{
+        return dma_iommu_ops.dma_supported(dev, mask);
+}
 struct dma_map_ops vio_dma_mapping_ops = {
        .alloc_coherent = vio_dma_iommu_alloc_coherent,
        .free_coherent  = vio_dma_iommu_free_coherent,
@@ -609,6 +612,7 @@ struct dma_map_ops vio_dma_mapping_ops = {
        .unmap_sg       = vio_dma_iommu_unmap_sg,
        .map_page       = vio_dma_iommu_map_page,
        .unmap_page     = vio_dma_iommu_unmap_page,
+        .dma_supported  = vio_dma_iommu_dma_supported,
 };
@@ -860,8 +864,7 @@ static void vio_cmo_bus_remove(struct vio_dev *viodev)
 static void vio_cmo_set_dma_ops(struct vio_dev *viodev)
 {
-        vio_dma_mapping_ops.dma_supported = dma_iommu_ops.dma_supported;
+        set_dma_ops(&viodev->dev, &vio_dma_mapping_ops);
-        viodev->dev.archdata.dma_ops = &vio_dma_mapping_ops;
 }
 /**
@@ -1184,7 +1187,12 @@ EXPORT_SYMBOL(vio_unregister_driver);
 /* vio_dev refcount hit 0 */
 static void __devinit vio_dev_release(struct device *dev)
 {
-        /* XXX should free TCE table */
+        struct iommu_table *tbl = get_iommu_table_base(dev);
+        /* iSeries uses a common table for all vio devices */
+        if (!firmware_has_feature(FW_FEATURE_ISERIES) && tbl)
+                iommu_free_table(tbl, dev->of_node ?
+                        dev->of_node->full_name : dev_name(dev));
        of_node_put(dev->of_node);
        kfree(to_vio_dev(dev));
 }
@@ -1241,7 +1249,7 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
        if (firmware_has_feature(FW_FEATURE_CMO))
                vio_cmo_set_dma_ops(viodev);
        else
-                viodev->dev.archdata.dma_ops = &dma_iommu_ops;
+                set_dma_ops(&viodev->dev, &dma_iommu_ops);
        set_iommu_table_base(&viodev->dev, vio_build_iommu_table(viodev));
        set_dev_node(&viodev->dev, of_node_to_nid(of_node));
@@ -1249,13 +1257,16 @@ struct vio_dev *vio_register_device_node(struct device_node *of_node)
        viodev->dev.parent = &vio_bus_device.dev;
        viodev->dev.bus = &vio_bus_type;
        viodev->dev.release = vio_dev_release;
+        /* needed to ensure proper operation of coherent allocations
+         * later, in case driver doesn't set it explicitly */
+        dma_set_mask(&viodev->dev, DMA_BIT_MASK(64));
+        dma_set_coherent_mask(&viodev->dev, DMA_BIT_MASK(64));
        /* register with generic device framework */
        if (device_register(&viodev->dev)) {
                printk(KERN_ERR "%s: failed to register device %s\n",
                                __func__, dev_name(&viodev->dev));
-                /* XXX free TCE table */
+                put_device(&viodev->dev);
-                kfree(viodev);
                return NULL;
        }
diff --git a/arch/powerpc/kernel/vmlinux.lds.S b/arch/powerpc/kernel/vmlinux.lds.S
index 8a0deefac08d..920276c0f6a1 100644
--- a/arch/powerpc/kernel/vmlinux.lds.S
+++ b/arch/powerpc/kernel/vmlinux.lds.S
@@ -160,7 +160,7 @@ SECTIONS
                INIT_RAM_FS
        }
-        PERCPU(PAGE_SIZE)
+        PERCPU_SECTION(L1_CACHE_BYTES)
        . = ALIGN(8);
        .machine.desc : AT(ADDR(.machine.desc) - LOAD_OFFSET) {
diff --git a/arch/powerpc/kvm/44x.c b/arch/powerpc/kvm/44x.c
index 73c0a3f64ed1..da3a1225c0ac 100644
--- a/arch/powerpc/kvm/44x.c
+++ b/arch/powerpc/kvm/44x.c
@@ -43,7 +43,7 @@ int kvmppc_core_check_processor_compat(void)
 {
        int r;
-        if (strcmp(cur_cpu_spec->platform, "ppc440") == 0)
+        if (strncmp(cur_cpu_spec->platform, "ppc440", 6) == 0)
                r = 0;
        else
                r = -ENOTSUPP;
@@ -72,6 +72,7 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
        /* Since the guest can directly access the timebase, it must know the
         * real timebase frequency. Accordingly, it must see the state of
         * CCR1[TCS]. */
+        /* XXX CCR1 doesn't exist on all 440 SoCs. */
        vcpu->arch.ccr1 = mfspr(SPRN_CCR1);
        for (i = 0; i < ARRAY_SIZE(vcpu_44x->shadow_refs); i++)
@@ -106,6 +107,16 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
        return 0;
 }
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        kvmppc_get_sregs_ivor(vcpu, sregs);
+}
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        return kvmppc_set_sregs_ivor(vcpu, sregs);
+}
 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
 {
        struct kvmppc_vcpu_44x *vcpu_44x;
@@ -123,8 +134,14 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
        if (err)
                goto free_vcpu;
+        vcpu->arch.shared = (void*)__get_free_page(GFP_KERNEL|__GFP_ZERO);
+        if (!vcpu->arch.shared)
+                goto uninit_vcpu;
        return vcpu;
+uninit_vcpu:
+        kvm_vcpu_uninit(vcpu);
 free_vcpu:
        kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
 out:
@@ -135,6 +152,7 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
 {
        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
+        free_page((unsigned long)vcpu->arch.shared);
        kvm_vcpu_uninit(vcpu);
        kmem_cache_free(kvm_vcpu_cache, vcpu_44x);
 }
diff --git a/arch/powerpc/kvm/44x_emulate.c b/arch/powerpc/kvm/44x_emulate.c
index 65ea083a5b27..549bb2c9a47a 100644
--- a/arch/powerpc/kvm/44x_emulate.c
+++ b/arch/powerpc/kvm/44x_emulate.c
@@ -158,7 +158,6 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
                emulated = kvmppc_booke_emulate_mtspr(vcpu, sprn, rs);
        }
-        kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
        return emulated;
 }
@@ -179,7 +178,6 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
                emulated = kvmppc_booke_emulate_mfspr(vcpu, sprn, rt);
        }
-        kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
        return emulated;
 }
diff --git a/arch/powerpc/kvm/44x_tlb.c b/arch/powerpc/kvm/44x_tlb.c
index 9b9b5cdea840..5f3cff83e089 100644
--- a/arch/powerpc/kvm/44x_tlb.c
+++ b/arch/powerpc/kvm/44x_tlb.c
@@ -47,6 +47,7 @@
 #ifdef DEBUG
 void kvmppc_dump_tlbs(struct kvm_vcpu *vcpu)
 {
+        struct kvmppc_vcpu_44x *vcpu_44x = to_44x(vcpu);
        struct kvmppc_44x_tlbe *tlbe;
        int i;
@@ -221,14 +222,14 @@ gpa_t kvmppc_mmu_xlate(struct kvm_vcpu *vcpu, unsigned int gtlb_index,
 int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
        return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
 int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
        return kvmppc_44x_tlb_index(vcpu, eaddr, vcpu->arch.pid, as);
 }
@@ -354,7 +355,7 @@ void kvmppc_mmu_map(struct kvm_vcpu *vcpu, u64 gvaddr, gpa_t gpaddr,
        stlbe.word1 = (hpaddr & 0xfffffc00) | ((hpaddr >> 32) & 0xf);
        stlbe.word2 = kvmppc_44x_tlb_shadow_attrib(flags,
-                                                    vcpu->arch.msr & MSR_PR);
+                                                    vcpu->arch.shared->msr & MSR_PR);
        stlbe.tid = !(asid & 0xff);
        /* Keep track of the reference so we can properly release it later. */
@@ -423,7 +424,7 @@ static int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
        /* Does it match current guest AS? */
        /* XXX what about IS != DS? */
-        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
+        if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS))
                return 0;
        gpa = get_tlb_raddr(tlbe);
diff --git a/arch/powerpc/kvm/Makefile b/arch/powerpc/kvm/Makefile
index d45c818a384c..4d6863823f69 100644
--- a/arch/powerpc/kvm/Makefile
+++ b/arch/powerpc/kvm/Makefile
@@ -4,7 +4,7 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
-EXTRA_CFLAGS += -Ivirt/kvm -Iarch/powerpc/kvm
+ccflags-y := -Ivirt/kvm -Iarch/powerpc/kvm
 common-objs-y = $(addprefix ../../../virt/kvm/, kvm_main.o coalesced_mmio.o)
diff --git a/arch/powerpc/kvm/book3s.c b/arch/powerpc/kvm/book3s.c
index a3cef30d1d42..0f95b5cce033 100644
--- a/arch/powerpc/kvm/book3s.c
+++ b/arch/powerpc/kvm/book3s.c
@@ -17,6 +17,7 @@
 #include <linux/kvm_host.h>
 #include <linux/err.h>
 #include <linux/slab.h>
+#include "trace.h"
 #include <asm/reg.h>
 #include <asm/cputable.h>
@@ -35,7 +36,6 @@
 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
 /* #define EXIT_DEBUG */
-/* #define EXIT_DEBUG_SIMPLE */
 /* #define DEBUG_EXT */
 static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
@@ -105,65 +105,71 @@ void kvmppc_core_vcpu_put(struct kvm_vcpu *vcpu)
        kvmppc_giveup_ext(vcpu, MSR_VSX);
 }
-#if defined(EXIT_DEBUG)
-static u32 kvmppc_get_dec(struct kvm_vcpu *vcpu)
-{
-        u64 jd = mftb() - vcpu->arch.dec_jiffies;
-        return vcpu->arch.dec - jd;
-}
-#endif
 static void kvmppc_recalc_shadow_msr(struct kvm_vcpu *vcpu)
 {
-        vcpu->arch.shadow_msr = vcpu->arch.msr;
+        ulong smsr = vcpu->arch.shared->msr;
        /* Guest MSR values */
-        vcpu->arch.shadow_msr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE |
+        smsr &= MSR_FE0 | MSR_FE1 | MSR_SF | MSR_SE | MSR_BE | MSR_DE;
-                                 MSR_BE | MSR_DE;
        /* Process MSR values */
-        vcpu->arch.shadow_msr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR |
+        smsr |= MSR_ME | MSR_RI | MSR_IR | MSR_DR | MSR_PR | MSR_EE;
-                                 MSR_EE;
        /* External providers the guest reserved */
-        vcpu->arch.shadow_msr |= (vcpu->arch.msr & vcpu->arch.guest_owned_ext);
+        smsr |= (vcpu->arch.shared->msr & vcpu->arch.guest_owned_ext);
        /* 64-bit Process MSR values */
 #ifdef CONFIG_PPC_BOOK3S_64
-        vcpu->arch.shadow_msr |= MSR_ISF | MSR_HV;
+        smsr |= MSR_ISF | MSR_HV;
 #endif
+        vcpu->arch.shadow_msr = smsr;
 }
 void kvmppc_set_msr(struct kvm_vcpu *vcpu, u64 msr)
 {
-        ulong old_msr = vcpu->arch.msr;
+        ulong old_msr = vcpu->arch.shared->msr;
 #ifdef EXIT_DEBUG
        printk(KERN_INFO "KVM: Set MSR to 0x%llx\n", msr);
 #endif
        msr &= to_book3s(vcpu)->msr_mask;
-        vcpu->arch.msr = msr;
+        vcpu->arch.shared->msr = msr;
        kvmppc_recalc_shadow_msr(vcpu);
-        if (msr & (MSR_WE|MSR_POW)) {
+        if (msr & MSR_POW) {
                if (!vcpu->arch.pending_exceptions) {
                        kvm_vcpu_block(vcpu);
                        vcpu->stat.halt_wakeup++;
+                        /* Unset POW bit after we woke up */
+                        msr &= ~MSR_POW;
+                        vcpu->arch.shared->msr = msr;
                }
        }
-        if ((vcpu->arch.msr & (MSR_PR|MSR_IR|MSR_DR)) !=
+        if ((vcpu->arch.shared->msr & (MSR_PR|MSR_IR|MSR_DR)) !=
                   (old_msr & (MSR_PR|MSR_IR|MSR_DR))) {
                kvmppc_mmu_flush_segments(vcpu);
                kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
+                /* Preload magic page segment when in kernel mode */
+                if (!(msr & MSR_PR) && vcpu->arch.magic_page_pa) {
+                        struct kvm_vcpu_arch *a = &vcpu->arch;
+                        if (msr & MSR_DR)
+                                kvmppc_mmu_map_segment(vcpu, a->magic_page_ea);
+                        else
+                                kvmppc_mmu_map_segment(vcpu, a->magic_page_pa);
+                }
        }
        /* Preload FPU if it's enabled */
-        if (vcpu->arch.msr & MSR_FP)
+        if (vcpu->arch.shared->msr & MSR_FP)
                kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
 }
 void kvmppc_inject_interrupt(struct kvm_vcpu *vcpu, int vec, u64 flags)
 {
-        vcpu->arch.srr0 = kvmppc_get_pc(vcpu);
+        vcpu->arch.shared->srr0 = kvmppc_get_pc(vcpu);
-        vcpu->arch.srr1 = vcpu->arch.msr | flags;
+        vcpu->arch.shared->srr1 = vcpu->arch.shared->msr | flags;
        kvmppc_set_pc(vcpu, to_book3s(vcpu)->hior + vec);
        vcpu->arch.mmu.reset_msr(vcpu);
 }
@@ -180,6 +186,7 @@ static int kvmppc_book3s_vec2irqprio(unsigned int vec)
        case 0x400: prio = BOOK3S_IRQPRIO_INST_STORAGE;         break;
        case 0x480: prio = BOOK3S_IRQPRIO_INST_SEGMENT;         break;
        case 0x500: prio = BOOK3S_IRQPRIO_EXTERNAL;             break;
+        case 0x501: prio = BOOK3S_IRQPRIO_EXTERNAL_LEVEL;       break;
        case 0x600: prio = BOOK3S_IRQPRIO_ALIGNMENT;            break;
        case 0x700: prio = BOOK3S_IRQPRIO_PROGRAM;              break;
        case 0x800: prio = BOOK3S_IRQPRIO_FP_UNAVAIL;           break;
@@ -199,6 +206,9 @@ static void kvmppc_book3s_dequeue_irqprio(struct kvm_vcpu *vcpu,
 {
        clear_bit(kvmppc_book3s_vec2irqprio(vec),
                  &vcpu->arch.pending_exceptions);
+        if (!vcpu->arch.pending_exceptions)
+                vcpu->arch.shared->int_pending = 0;
 }
 void kvmppc_book3s_queue_irqprio(struct kvm_vcpu *vcpu, unsigned int vec)
@@ -226,7 +236,7 @@ void kvmppc_core_queue_dec(struct kvm_vcpu *vcpu)
 int kvmppc_core_pending_dec(struct kvm_vcpu *vcpu)
 {
-        return test_bit(BOOK3S_INTERRUPT_DECREMENTER >> 7, &vcpu->arch.pending_exceptions);
+        return test_bit(BOOK3S_IRQPRIO_DECREMENTER, &vcpu->arch.pending_exceptions);
 }
 void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
@@ -237,13 +247,19 @@ void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                struct kvm_interrupt *irq)
 {
-        kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
+        unsigned int vec = BOOK3S_INTERRUPT_EXTERNAL;
+        if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
+                vec = BOOK3S_INTERRUPT_EXTERNAL_LEVEL;
+        kvmppc_book3s_queue_irqprio(vcpu, vec);
 }
 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
                                  struct kvm_interrupt *irq)
 {
        kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL);
+        kvmppc_book3s_dequeue_irqprio(vcpu, BOOK3S_INTERRUPT_EXTERNAL_LEVEL);
 }
 int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
@@ -251,14 +267,29 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
        int deliver = 1;
        int vec = 0;
        ulong flags = 0ULL;
+        ulong crit_raw = vcpu->arch.shared->critical;
+        ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
+        bool crit;
+        /* Truncate crit indicators in 32 bit mode */
+        if (!(vcpu->arch.shared->msr & MSR_SF)) {
+                crit_raw &= 0xffffffff;
+                crit_r1 &= 0xffffffff;
+        }
+        /* Critical section when crit == r1 */
+        crit = (crit_raw == crit_r1);
+        /* ... and we're in supervisor mode */
+        crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
        switch (priority) {
        case BOOK3S_IRQPRIO_DECREMENTER:
-                deliver = vcpu->arch.msr & MSR_EE;
+                deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit;
                vec = BOOK3S_INTERRUPT_DECREMENTER;
                break;
        case BOOK3S_IRQPRIO_EXTERNAL:
-                deliver = vcpu->arch.msr & MSR_EE;
+        case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
+                deliver = (vcpu->arch.shared->msr & MSR_EE) && !crit;
                vec = BOOK3S_INTERRUPT_EXTERNAL;
                break;
        case BOOK3S_IRQPRIO_SYSTEM_RESET:
@@ -320,9 +351,27 @@ int kvmppc_book3s_irqprio_deliver(struct kvm_vcpu *vcpu, unsigned int priority)
        return deliver;
 }
+/*
+ * This function determines if an irqprio should be cleared once issued.
+ */
+static bool clear_irqprio(struct kvm_vcpu *vcpu, unsigned int priority)
+{
+        switch (priority) {
+                case BOOK3S_IRQPRIO_DECREMENTER:
+                        /* DEC interrupts get cleared by mtdec */
+                        return false;
+                case BOOK3S_IRQPRIO_EXTERNAL_LEVEL:
+                        /* External interrupts get cleared by userspace */
+                        return false;
+        }
+        return true;
+}
 void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
 {
        unsigned long *pending = &vcpu->arch.pending_exceptions;
+        unsigned long old_pending = vcpu->arch.pending_exceptions;
        unsigned int priority;
 #ifdef EXIT_DEBUG
@@ -332,8 +381,7 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
        priority = __ffs(*pending);
        while (priority < BOOK3S_IRQPRIO_MAX) {
                if (kvmppc_book3s_irqprio_deliver(vcpu, priority) &&
-                    (priority != BOOK3S_IRQPRIO_DECREMENTER)) {
+                    clear_irqprio(vcpu, priority)) {
-                        /* DEC interrupts get cleared by mtdec */
                        clear_bit(priority, &vcpu->arch.pending_exceptions);
                        break;
                }
@@ -342,6 +390,12 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
                                         BITS_PER_BYTE * sizeof(*pending),
                                         priority + 1);
        }
+        /* Tell the guest about our interrupt status */
+        if (*pending)
+                vcpu->arch.shared->int_pending = 1;
+        else if (old_pending)
+                vcpu->arch.shared->int_pending = 0;
 }
 void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
@@ -398,6 +452,25 @@ void kvmppc_set_pvr(struct kvm_vcpu *vcpu, u32 pvr)
        }
 }
+pfn_t kvmppc_gfn_to_pfn(struct kvm_vcpu *vcpu, gfn_t gfn)
+{
+        ulong mp_pa = vcpu->arch.magic_page_pa;
+        /* Magic page override */
+        if (unlikely(mp_pa) &&
+            unlikely(((gfn << PAGE_SHIFT) & KVM_PAM) ==
+                     ((mp_pa & PAGE_MASK) & KVM_PAM))) {
+                ulong shared_page = ((ulong)vcpu->arch.shared) & PAGE_MASK;
+                pfn_t pfn;
+                pfn = (pfn_t)virt_to_phys((void*)shared_page) >> PAGE_SHIFT;
+                get_page(pfn_to_page(pfn));
+                return pfn;
+        }
+        return gfn_to_pfn(vcpu->kvm, gfn);
+}
 /* Book3s_32 CPUs always have 32 bytes cache line size, which Linux assumes. To
 * make Book3s_32 Linux work on Book3s_64, we have to make sure we trap dcbz to
 * emulate 32 bytes dcbz length.
@@ -415,8 +488,10 @@ static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
        int i;
        hpage = gfn_to_page(vcpu->kvm, pte->raddr >> PAGE_SHIFT);
-        if (is_error_page(hpage))
+        if (is_error_page(hpage)) {
+                kvm_release_page_clean(hpage);
                return;
+        }
        hpage_offset = pte->raddr & ~PAGE_MASK;
        hpage_offset &= ~0xFFFULL;
@@ -437,14 +512,14 @@ static void kvmppc_patch_dcbz(struct kvm_vcpu *vcpu, struct kvmppc_pte *pte)
 static int kvmppc_xlate(struct kvm_vcpu *vcpu, ulong eaddr, bool data,
                         struct kvmppc_pte *pte)
 {
-        int relocated = (vcpu->arch.msr & (data ? MSR_DR : MSR_IR));
+        int relocated = (vcpu->arch.shared->msr & (data ? MSR_DR : MSR_IR));
        int r;
        if (relocated) {
                r = vcpu->arch.mmu.xlate(vcpu, eaddr, pte, data);
        } else {
                pte->eaddr = eaddr;
-                pte->raddr = eaddr & 0xffffffff;
+                pte->raddr = eaddr & KVM_PAM;
                pte->vpage = VSID_REAL | eaddr >> 12;
                pte->may_read = true;
                pte->may_write = true;
@@ -533,6 +608,13 @@ mmio:
 static int kvmppc_visible_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
 {
+        ulong mp_pa = vcpu->arch.magic_page_pa;
+        if (unlikely(mp_pa) &&
+            unlikely((mp_pa & KVM_PAM) >> PAGE_SHIFT == gfn)) {
+                return 1;
+        }
        return kvm_is_visible_gfn(vcpu->kvm, gfn);
 }
@@ -545,8 +627,8 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
        int page_found = 0;
        struct kvmppc_pte pte;
        bool is_mmio = false;
-        bool dr = (vcpu->arch.msr & MSR_DR) ? true : false;
+        bool dr = (vcpu->arch.shared->msr & MSR_DR) ? true : false;
-        bool ir = (vcpu->arch.msr & MSR_IR) ? true : false;
+        bool ir = (vcpu->arch.shared->msr & MSR_IR) ? true : false;
        u64 vsid;
        relocated = data ? dr : ir;
@@ -558,12 +640,12 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
                pte.may_execute = true;
                pte.may_read = true;
                pte.may_write = true;
-                pte.raddr = eaddr & 0xffffffff;
+                pte.raddr = eaddr & KVM_PAM;
                pte.eaddr = eaddr;
                pte.vpage = eaddr >> 12;
        }
-        switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
+        switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
        case 0:
                pte.vpage |= ((u64)VSID_REAL << (SID_SHIFT - 12));
                break;
@@ -571,7 +653,7 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
        case MSR_IR:
                vcpu->arch.mmu.esid_to_vsid(vcpu, eaddr >> SID_SHIFT, &vsid);
-                if ((vcpu->arch.msr & (MSR_DR|MSR_IR)) == MSR_DR)
+                if ((vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) == MSR_DR)
                        pte.vpage |= ((u64)VSID_REAL_DR << (SID_SHIFT - 12));
                else
                        pte.vpage |= ((u64)VSID_REAL_IR << (SID_SHIFT - 12));
@@ -594,20 +676,23 @@ int kvmppc_handle_pagefault(struct kvm_run *run, struct kvm_vcpu *vcpu,
        if (page_found == -ENOENT) {
                /* Page not found in guest PTE entries */
-                vcpu->arch.dear = kvmppc_get_fault_dar(vcpu);
+                vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
-                to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr;
+                vcpu->arch.shared->dsisr = to_svcpu(vcpu)->fault_dsisr;
-                vcpu->arch.msr |= (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL);
+                vcpu->arch.shared->msr |=
+                        (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL);
                kvmppc_book3s_queue_irqprio(vcpu, vec);
        } else if (page_found == -EPERM) {
                /* Storage protection */
-                vcpu->arch.dear = kvmppc_get_fault_dar(vcpu);
+                vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
-                to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr & ~DSISR_NOHPTE;
+                vcpu->arch.shared->dsisr =
-                to_book3s(vcpu)->dsisr |= DSISR_PROTFAULT;
+                        to_svcpu(vcpu)->fault_dsisr & ~DSISR_NOHPTE;
-                vcpu->arch.msr |= (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL);
+                vcpu->arch.shared->dsisr |= DSISR_PROTFAULT;
+                vcpu->arch.shared->msr |=
+                        (to_svcpu(vcpu)->shadow_srr1 & 0x00000000f8000000ULL);
                kvmppc_book3s_queue_irqprio(vcpu, vec);
        } else if (page_found == -EINVAL) {
                /* Page not found in guest SLB */
-                vcpu->arch.dear = kvmppc_get_fault_dar(vcpu);
+                vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
                kvmppc_book3s_queue_irqprio(vcpu, vec + 0x80);
        } else if (!is_mmio &&
                   kvmppc_visible_gfn(vcpu, pte.raddr >> PAGE_SHIFT)) {
@@ -695,9 +780,11 @@ static int kvmppc_read_inst(struct kvm_vcpu *vcpu)
        ret = kvmppc_ld(vcpu, &srr0, sizeof(u32), &last_inst, false);
        if (ret == -ENOENT) {
-                vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 33, 1);
+                ulong msr = vcpu->arch.shared->msr;
-                vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 34, 36, 0);
-                vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0);
+                msr = kvmppc_set_field(msr, 33, 33, 1);
+                msr = kvmppc_set_field(msr, 34, 36, 0);
+                vcpu->arch.shared->msr = kvmppc_set_field(msr, 42, 47, 0);
                kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_INST_STORAGE);
                return EMULATE_AGAIN;
        }
@@ -736,7 +823,7 @@ static int kvmppc_handle_ext(struct kvm_vcpu *vcpu, unsigned int exit_nr,
        if (vcpu->arch.hflags & BOOK3S_HFLAG_PAIRED_SINGLE)
                return RESUME_GUEST;
-        if (!(vcpu->arch.msr & msr)) {
+        if (!(vcpu->arch.shared->msr & msr)) {
                kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                return RESUME_GUEST;
        }
@@ -796,16 +883,8 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
        run->exit_reason = KVM_EXIT_UNKNOWN;
        run->ready_for_interrupt_injection = 1;
-#ifdef EXIT_DEBUG
-        printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | dec=0x%x | msr=0x%lx\n",
+        trace_kvm_book3s_exit(exit_nr, vcpu);
-                exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu),
-                kvmppc_get_dec(vcpu), to_svcpu(vcpu)->shadow_srr1);
-#elif defined (EXIT_DEBUG_SIMPLE)
-        if ((exit_nr != 0x900) && (exit_nr != 0x500))
-                printk(KERN_EMERG "exit_nr=0x%x | pc=0x%lx | dar=0x%lx | msr=0x%lx\n",
-                        exit_nr, kvmppc_get_pc(vcpu), kvmppc_get_fault_dar(vcpu),
-                        vcpu->arch.msr);
-#endif
        kvm_resched(vcpu);
        switch (exit_nr) {
        case BOOK3S_INTERRUPT_INST_STORAGE:
@@ -836,9 +915,9 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                        kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
                        r = RESUME_GUEST;
                } else {
-                        vcpu->arch.msr |= to_svcpu(vcpu)->shadow_srr1 & 0x58000000;
+                        vcpu->arch.shared->msr |=
+                                to_svcpu(vcpu)->shadow_srr1 & 0x58000000;
                        kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
-                        kvmppc_mmu_pte_flush(vcpu, kvmppc_get_pc(vcpu), ~0xFFFUL);
                        r = RESUME_GUEST;
                }
                break;
@@ -861,17 +940,16 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                if (to_svcpu(vcpu)->fault_dsisr & DSISR_NOHPTE) {
                        r = kvmppc_handle_pagefault(run, vcpu, dar, exit_nr);
                } else {
-                        vcpu->arch.dear = dar;
+                        vcpu->arch.shared->dar = dar;
-                        to_book3s(vcpu)->dsisr = to_svcpu(vcpu)->fault_dsisr;
+                        vcpu->arch.shared->dsisr = to_svcpu(vcpu)->fault_dsisr;
                        kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
-                        kvmppc_mmu_pte_flush(vcpu, vcpu->arch.dear, ~0xFFFUL);
                        r = RESUME_GUEST;
                }
                break;
        }
        case BOOK3S_INTERRUPT_DATA_SEGMENT:
                if (kvmppc_mmu_map_segment(vcpu, kvmppc_get_fault_dar(vcpu)) < 0) {
-                        vcpu->arch.dear = kvmppc_get_fault_dar(vcpu);
+                        vcpu->arch.shared->dar = kvmppc_get_fault_dar(vcpu);
                        kvmppc_book3s_queue_irqprio(vcpu,
                                BOOK3S_INTERRUPT_DATA_SEGMENT);
                }
@@ -904,7 +982,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 program_interrupt:
                flags = to_svcpu(vcpu)->shadow_srr1 & 0x1f0000ull;
-                if (vcpu->arch.msr & MSR_PR) {
+                if (vcpu->arch.shared->msr & MSR_PR) {
 #ifdef EXIT_DEBUG
                        printk(KERN_INFO "Userspace triggered 0x700 exception at 0x%lx (0x%x)\n", kvmppc_get_pc(vcpu), kvmppc_get_last_inst(vcpu));
 #endif
@@ -941,10 +1019,10 @@ program_interrupt:
                break;
        }
        case BOOK3S_INTERRUPT_SYSCALL:
-                // XXX make user settable
                if (vcpu->arch.osi_enabled &&
                    (((u32)kvmppc_get_gpr(vcpu, 3)) == OSI_SC_MAGIC_R3) &&
                    (((u32)kvmppc_get_gpr(vcpu, 4)) == OSI_SC_MAGIC_R4)) {
+                        /* MOL hypercalls */
                        u64 *gprs = run->osi.gprs;
                        int i;
@@ -953,8 +1031,13 @@ program_interrupt:
                                gprs[i] = kvmppc_get_gpr(vcpu, i);
                        vcpu->arch.osi_needed = 1;
                        r = RESUME_HOST_NV;
+                } else if (!(vcpu->arch.shared->msr & MSR_PR) &&
+                    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
+                        /* KVM PV hypercalls */
+                        kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
+                        r = RESUME_GUEST;
                } else {
+                        /* Guest syscalls */
                        vcpu->stat.syscall_exits++;
                        kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                        r = RESUME_GUEST;
@@ -989,9 +1072,9 @@ program_interrupt:
        }
        case BOOK3S_INTERRUPT_ALIGNMENT:
                if (kvmppc_read_inst(vcpu) == EMULATE_DONE) {
-                        to_book3s(vcpu)->dsisr = kvmppc_alignment_dsisr(vcpu,
+                        vcpu->arch.shared->dsisr = kvmppc_alignment_dsisr(vcpu,
                                kvmppc_get_last_inst(vcpu));
-                        vcpu->arch.dear = kvmppc_alignment_dar(vcpu,
+                        vcpu->arch.shared->dar = kvmppc_alignment_dar(vcpu,
                                kvmppc_get_last_inst(vcpu));
                        kvmppc_book3s_queue_irqprio(vcpu, exit_nr);
                }
@@ -1031,9 +1114,7 @@ program_interrupt:
                }
        }
-#ifdef EXIT_DEBUG
+        trace_kvm_book3s_reenter(r, vcpu);
-        printk(KERN_EMERG "KVM exit: vcpu=0x%p pc=0x%lx r=0x%x\n", vcpu, kvmppc_get_pc(vcpu), r);
-#endif
        return r;
 }
@@ -1052,17 +1133,18 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        regs->ctr = kvmppc_get_ctr(vcpu);
        regs->lr = kvmppc_get_lr(vcpu);
        regs->xer = kvmppc_get_xer(vcpu);
-        regs->msr = vcpu->arch.msr;
+        regs->msr = vcpu->arch.shared->msr;
-        regs->srr0 = vcpu->arch.srr0;
+        regs->srr0 = vcpu->arch.shared->srr0;
-        regs->srr1 = vcpu->arch.srr1;
+        regs->srr1 = vcpu->arch.shared->srr1;
        regs->pid = vcpu->arch.pid;
-        regs->sprg0 = vcpu->arch.sprg0;
+        regs->sprg0 = vcpu->arch.shared->sprg0;
-        regs->sprg1 = vcpu->arch.sprg1;
+        regs->sprg1 = vcpu->arch.shared->sprg1;
-        regs->sprg2 = vcpu->arch.sprg2;
+        regs->sprg2 = vcpu->arch.shared->sprg2;
-        regs->sprg3 = vcpu->arch.sprg3;
+        regs->sprg3 = vcpu->arch.shared->sprg3;
-        regs->sprg5 = vcpu->arch.sprg4;
+        regs->sprg4 = vcpu->arch.sprg4;
-        regs->sprg6 = vcpu->arch.sprg5;
+        regs->sprg5 = vcpu->arch.sprg5;
-        regs->sprg7 = vcpu->arch.sprg6;
+        regs->sprg6 = vcpu->arch.sprg6;
+        regs->sprg7 = vcpu->arch.sprg7;
        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
                regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
@@ -1080,15 +1162,16 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        kvmppc_set_lr(vcpu, regs->lr);
        kvmppc_set_xer(vcpu, regs->xer);
        kvmppc_set_msr(vcpu, regs->msr);
-        vcpu->arch.srr0 = regs->srr0;
+        vcpu->arch.shared->srr0 = regs->srr0;
-        vcpu->arch.srr1 = regs->srr1;
+        vcpu->arch.shared->srr1 = regs->srr1;
-        vcpu->arch.sprg0 = regs->sprg0;
+        vcpu->arch.shared->sprg0 = regs->sprg0;
-        vcpu->arch.sprg1 = regs->sprg1;
+        vcpu->arch.shared->sprg1 = regs->sprg1;
-        vcpu->arch.sprg2 = regs->sprg2;
+        vcpu->arch.shared->sprg2 = regs->sprg2;
-        vcpu->arch.sprg3 = regs->sprg3;
+        vcpu->arch.shared->sprg3 = regs->sprg3;
-        vcpu->arch.sprg5 = regs->sprg4;
+        vcpu->arch.sprg4 = regs->sprg4;
-        vcpu->arch.sprg6 = regs->sprg5;
+        vcpu->arch.sprg5 = regs->sprg5;
-        vcpu->arch.sprg7 = regs->sprg6;
+        vcpu->arch.sprg6 = regs->sprg6;
+        vcpu->arch.sprg7 = regs->sprg7;
        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
                kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
@@ -1111,10 +1194,9 @@ int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                        sregs->u.s.ppc64.slb[i].slbv = vcpu3s->slb[i].origv;
                }
        } else {
-                for (i = 0; i < 16; i++) {
+                for (i = 0; i < 16; i++)
-                        sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw;
+                        sregs->u.s.ppc32.sr[i] = vcpu->arch.shared->sr[i];
-                        sregs->u.s.ppc32.sr[i] = vcpu3s->sr[i].raw;
-                }
                for (i = 0; i < 8; i++) {
                        sregs->u.s.ppc32.ibat[i] = vcpu3s->ibat[i].raw;
                        sregs->u.s.ppc32.dbat[i] = vcpu3s->dbat[i].raw;
@@ -1225,13 +1307,12 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
        struct kvmppc_vcpu_book3s *vcpu_book3s;
        struct kvm_vcpu *vcpu;
        int err = -ENOMEM;
+        unsigned long p;
-        vcpu_book3s = vmalloc(sizeof(struct kvmppc_vcpu_book3s));
+        vcpu_book3s = vzalloc(sizeof(struct kvmppc_vcpu_book3s));
        if (!vcpu_book3s)
                goto out;
-        memset(vcpu_book3s, 0, sizeof(struct kvmppc_vcpu_book3s));
        vcpu_book3s->shadow_vcpu = (struct kvmppc_book3s_shadow_vcpu *)
                kzalloc(sizeof(*vcpu_book3s->shadow_vcpu), GFP_KERNEL);
        if (!vcpu_book3s->shadow_vcpu)
@@ -1242,6 +1323,12 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
        if (err)
                goto free_shadow_vcpu;
+        p = __get_free_page(GFP_KERNEL|__GFP_ZERO);
+        /* the real shared page fills the last 4k of our page */
+        vcpu->arch.shared = (void*)(p + PAGE_SIZE - 4096);
+        if (!p)
+                goto uninit_vcpu;
        vcpu->arch.host_retip = kvm_return_point;
        vcpu->arch.host_msr = mfmsr();
 #ifdef CONFIG_PPC_BOOK3S_64
@@ -1268,10 +1355,12 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
        err = kvmppc_mmu_init(vcpu);
        if (err < 0)
-                goto free_shadow_vcpu;
+                goto uninit_vcpu;
        return vcpu;
+uninit_vcpu:
+        kvm_vcpu_uninit(vcpu);
 free_shadow_vcpu:
        kfree(vcpu_book3s->shadow_vcpu);
 free_vcpu:
@@ -1284,6 +1373,7 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
 {
        struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
+        free_page((unsigned long)vcpu->arch.shared & PAGE_MASK);
        kvm_vcpu_uninit(vcpu);
        kfree(vcpu_book3s->shadow_vcpu);
        vfree(vcpu_book3s);
@@ -1346,7 +1436,7 @@ int __kvmppc_vcpu_run(struct kvm_run *kvm_run, struct kvm_vcpu *vcpu)
        local_irq_enable();
        /* Preload FPU if it's enabled */
-        if (vcpu->arch.msr & MSR_FP)
+        if (vcpu->arch.shared->msr & MSR_FP)
                kvmppc_handle_ext(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL, MSR_FP);
        ret = __kvmppc_vcpu_entry(kvm_run, vcpu);
diff --git a/arch/powerpc/kvm/book3s_32_mmu.c b/arch/powerpc/kvm/book3s_32_mmu.c
index 3292d76101d2..c8cefdd15fd8 100644
--- a/arch/powerpc/kvm/book3s_32_mmu.c
+++ b/arch/powerpc/kvm/book3s_32_mmu.c
@@ -58,14 +58,39 @@ static inline bool check_debug_ip(struct kvm_vcpu *vcpu)
 #endif
 }
+static inline u32 sr_vsid(u32 sr_raw)
+{
+        return sr_raw & 0x0fffffff;
+}
+static inline bool sr_valid(u32 sr_raw)
+{
+        return (sr_raw & 0x80000000) ? false : true;
+}
+static inline bool sr_ks(u32 sr_raw)
+{
+        return (sr_raw & 0x40000000) ? true: false;
+}
+static inline bool sr_kp(u32 sr_raw)
+{
+        return (sr_raw & 0x20000000) ? true: false;
+}
+static inline bool sr_nx(u32 sr_raw)
+{
+        return (sr_raw & 0x10000000) ? true: false;
+}
 static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
                                          struct kvmppc_pte *pte, bool data);
 static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                                             u64 *vsid);
-static struct kvmppc_sr *find_sr(struct kvmppc_vcpu_book3s *vcpu_book3s, gva_t eaddr)
+static u32 find_sr(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
-        return &vcpu_book3s->sr[(eaddr >> 28) & 0xf];
+        return vcpu->arch.shared->sr[(eaddr >> 28) & 0xf];
 }
 static u64 kvmppc_mmu_book3s_32_ea_to_vp(struct kvm_vcpu *vcpu, gva_t eaddr,
@@ -87,7 +112,7 @@ static void kvmppc_mmu_book3s_32_reset_msr(struct kvm_vcpu *vcpu)
 }
 static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3s,
-                                      struct kvmppc_sr *sre, gva_t eaddr,
+                                      u32 sre, gva_t eaddr,
                                      bool primary)
 {
        u32 page, hash, pteg, htabmask;
@@ -96,7 +121,7 @@ static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3
        page = (eaddr & 0x0FFFFFFF) >> 12;
        htabmask = ((vcpu_book3s->sdr1 & 0x1FF) << 16) | 0xFFC0;
-        hash = ((sre->vsid ^ page) << 6);
+        hash = ((sr_vsid(sre) ^ page) << 6);
        if (!primary)
                hash = ~hash;
        hash &= htabmask;
@@ -104,8 +129,8 @@ static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3
        pteg = (vcpu_book3s->sdr1 & 0xffff0000) | hash;
        dprintk("MMU: pc=0x%lx eaddr=0x%lx sdr1=0x%llx pteg=0x%x vsid=0x%x\n",
-                vcpu_book3s->vcpu.arch.pc, eaddr, vcpu_book3s->sdr1, pteg,
+                kvmppc_get_pc(&vcpu_book3s->vcpu), eaddr, vcpu_book3s->sdr1, pteg,
-                sre->vsid);
+                sr_vsid(sre));
        r = gfn_to_hva(vcpu_book3s->vcpu.kvm, pteg >> PAGE_SHIFT);
        if (kvm_is_error_hva(r))
@@ -113,10 +138,9 @@ static hva_t kvmppc_mmu_book3s_32_get_pteg(struct kvmppc_vcpu_book3s *vcpu_book3
        return r | (pteg & ~PAGE_MASK);
 }
-static u32 kvmppc_mmu_book3s_32_get_ptem(struct kvmppc_sr *sre, gva_t eaddr,
+static u32 kvmppc_mmu_book3s_32_get_ptem(u32 sre, gva_t eaddr, bool primary)
-                                    bool primary)
 {
-        return ((eaddr & 0x0fffffff) >> 22) | (sre->vsid << 7) |
+        return ((eaddr & 0x0fffffff) >> 22) | (sr_vsid(sre) << 7) |
               (primary ? 0 : 0x40) | 0x80000000;
 }
@@ -133,7 +157,7 @@ static int kvmppc_mmu_book3s_32_xlate_bat(struct kvm_vcpu *vcpu, gva_t eaddr,
                else
                        bat = &vcpu_book3s->ibat[i];
-                if (vcpu->arch.msr & MSR_PR) {
+                if (vcpu->arch.shared->msr & MSR_PR) {
                        if (!bat->vp)
                                continue;
                } else {
@@ -180,17 +204,17 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
                                     bool primary)
 {
        struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
-        struct kvmppc_sr *sre;
+        u32 sre;
        hva_t ptegp;
        u32 pteg[16];
        u32 ptem = 0;
        int i;
        int found = 0;
-        sre = find_sr(vcpu_book3s, eaddr);
+        sre = find_sr(vcpu, eaddr);
        dprintk_pte("SR 0x%lx: vsid=0x%x, raw=0x%x\n", eaddr >> 28,
-                    sre->vsid, sre->raw);
+                    sr_vsid(sre), sre);
        pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
@@ -214,8 +238,8 @@ static int kvmppc_mmu_book3s_32_xlate_pte(struct kvm_vcpu *vcpu, gva_t eaddr,
                        pte->raddr = (pteg[i+1] & ~(0xFFFULL)) | (eaddr & 0xFFF);
                        pp = pteg[i+1] & 3;
-                        if ((sre->Kp &&  (vcpu->arch.msr & MSR_PR)) ||
+                        if ((sr_kp(sre) &&  (vcpu->arch.shared->msr & MSR_PR)) ||
-                            (sre->Ks && !(vcpu->arch.msr & MSR_PR)))
+                            (sr_ks(sre) && !(vcpu->arch.shared->msr & MSR_PR)))
                                pp |= 4;
                        pte->may_write = false;
@@ -269,7 +293,7 @@ no_page_found:
                dprintk_pte("KVM MMU: No PTE found (sdr1=0x%llx ptegp=0x%lx)\n",
                            to_book3s(vcpu)->sdr1, ptegp);
                for (i=0; i<16; i+=2) {
-                        dprintk_pte("   %02d: 0x%x - 0x%x (0x%llx)\n",
+                        dprintk_pte("   %02d: 0x%x - 0x%x (0x%x)\n",
                                    i, pteg[i], pteg[i+1], ptem);
                }
        }
@@ -281,8 +305,24 @@ static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
                                      struct kvmppc_pte *pte, bool data)
 {
        int r;
+        ulong mp_ea = vcpu->arch.magic_page_ea;
        pte->eaddr = eaddr;
+        /* Magic page override */
+        if (unlikely(mp_ea) &&
+            unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
+            !(vcpu->arch.shared->msr & MSR_PR)) {
+                pte->vpage = kvmppc_mmu_book3s_32_ea_to_vp(vcpu, eaddr, data);
+                pte->raddr = vcpu->arch.magic_page_pa | (pte->raddr & 0xfff);
+                pte->raddr &= KVM_PAM;
+                pte->may_execute = true;
+                pte->may_read = true;
+                pte->may_write = true;
+                return 0;
+        }
        r = kvmppc_mmu_book3s_32_xlate_bat(vcpu, eaddr, pte, data);
        if (r < 0)
               r = kvmppc_mmu_book3s_32_xlate_pte(vcpu, eaddr, pte, data, true);
@@ -295,30 +335,13 @@ static int kvmppc_mmu_book3s_32_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
 static u32 kvmppc_mmu_book3s_32_mfsrin(struct kvm_vcpu *vcpu, u32 srnum)
 {
-        return to_book3s(vcpu)->sr[srnum].raw;
+        return vcpu->arch.shared->sr[srnum];
 }
 static void kvmppc_mmu_book3s_32_mtsrin(struct kvm_vcpu *vcpu, u32 srnum,
                                        ulong value)
 {
-        struct kvmppc_sr *sre;
+        vcpu->arch.shared->sr[srnum] = value;
-        sre = &to_book3s(vcpu)->sr[srnum];
-        /* Flush any left-over shadows from the previous SR */
-        /* XXX Not necessary? */
-        /* kvmppc_mmu_pte_flush(vcpu, ((u64)sre->vsid) << 28, 0xf0000000ULL); */
-        /* And then put in the new SR */
-        sre->raw = value;
-        sre->vsid = (value & 0x0fffffff);
-        sre->valid = (value & 0x80000000) ? false : true;
-        sre->Ks = (value & 0x40000000) ? true : false;
-        sre->Kp = (value & 0x20000000) ? true : false;
-        sre->nx = (value & 0x10000000) ? true : false;
-        /* Map the new segment */
        kvmppc_mmu_map_segment(vcpu, srnum << SID_SHIFT);
 }
@@ -331,19 +354,19 @@ static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                                             u64 *vsid)
 {
        ulong ea = esid << SID_SHIFT;
-        struct kvmppc_sr *sr;
+        u32 sr;
        u64 gvsid = esid;
-        if (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
+        if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
-                sr = find_sr(to_book3s(vcpu), ea);
+                sr = find_sr(vcpu, ea);
-                if (sr->valid)
+                if (sr_valid(sr))
-                        gvsid = sr->vsid;
+                        gvsid = sr_vsid(sr);
        }
        /* In case we only have one of MSR_IR or MSR_DR set, let's put
           that in the real-mode context (and hope RM doesn't access
           high memory) */
-        switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
+        switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
        case 0:
                *vsid = VSID_REAL | esid;
                break;
@@ -354,8 +377,8 @@ static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                *vsid = VSID_REAL_DR | gvsid;
                break;
        case MSR_DR|MSR_IR:
-                if (sr->valid)
+                if (sr_valid(sr))
-                        *vsid = sr->vsid;
+                        *vsid = sr_vsid(sr);
                else
                        *vsid = VSID_BAT | gvsid;
                break;
@@ -363,7 +386,7 @@ static int kvmppc_mmu_book3s_32_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                BUG();
        }
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                *vsid |= VSID_PR;
        return 0;
diff --git a/arch/powerpc/kvm/book3s_32_mmu_host.c b/arch/powerpc/kvm/book3s_32_mmu_host.c
index 0b51ef872c1e..9fecbfbce773 100644
--- a/arch/powerpc/kvm/book3s_32_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_32_mmu_host.c
@@ -19,7 +19,6 @@
 */
 #include <linux/kvm_host.h>
-#include <linux/hash.h>
 #include <asm/kvm_ppc.h>
 #include <asm/kvm_book3s.h>
@@ -77,7 +76,14 @@ void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
 * a hash, so we don't waste cycles on looping */
 static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
 {
-        return hash_64(gvsid, SID_MAP_BITS);
+        return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
 }
@@ -86,7 +92,7 @@ static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
        struct kvmppc_sid_map *map;
        u16 sid_map_mask;
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                gvsid |= VSID_PR;
        sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
@@ -147,8 +153,8 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
        struct hpte_cache *pte;
        /* Get host physical address for gpa */
-        hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
+        hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte->raddr >> PAGE_SHIFT);
-        if (kvm_is_error_hva(hpaddr)) {
+        if (is_error_pfn(hpaddr)) {
                printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n",
                                 orig_pte->eaddr);
                return -EINVAL;
@@ -253,7 +259,7 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
        u16 sid_map_mask;
        static int backwards_map = 0;
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                gvsid |= VSID_PR;
        /* We might get collisions that trap in preceding order, so let's
@@ -269,18 +275,15 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
        backwards_map = !backwards_map;
        /* Uh-oh ... out of mappings. Let's flush! */
-        if (vcpu_book3s->vsid_next >= vcpu_book3s->vsid_max) {
+        if (vcpu_book3s->vsid_next >= VSID_POOL_SIZE) {
-                vcpu_book3s->vsid_next = vcpu_book3s->vsid_first;
+                vcpu_book3s->vsid_next = 0;
                memset(vcpu_book3s->sid_map, 0,
                       sizeof(struct kvmppc_sid_map) * SID_MAP_NUM);
                kvmppc_mmu_pte_flush(vcpu, 0, 0);
                kvmppc_mmu_flush_segments(vcpu);
        }
-        map->host_vsid = vcpu_book3s->vsid_next;
+        map->host_vsid = vcpu_book3s->vsid_pool[vcpu_book3s->vsid_next];
+        vcpu_book3s->vsid_next++;
-        /* Would have to be 111 to be completely aligned with the rest of
-           Linux, but that is just way too little space! */
-        vcpu_book3s->vsid_next+=1;
        map->guest_vsid = gvsid;
        map->valid = true;
@@ -327,40 +330,38 @@ void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
 {
+        int i;
        kvmppc_mmu_hpte_destroy(vcpu);
        preempt_disable();
-        __destroy_context(to_book3s(vcpu)->context_id);
+        for (i = 0; i < SID_CONTEXTS; i++)
+                __destroy_context(to_book3s(vcpu)->context_id[i]);
        preempt_enable();
 }
 /* From mm/mmu_context_hash32.c */
-#define CTX_TO_VSID(ctx) (((ctx) * (897 * 16)) & 0xffffff)
+#define CTX_TO_VSID(c, id)      ((((c) * (897 * 16)) + (id * 0x111)) & 0xffffff)
 int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
 {
        struct kvmppc_vcpu_book3s *vcpu3s = to_book3s(vcpu);
        int err;
        ulong sdr1;
+        int i;
+        int j;
-        err = __init_new_context();
+        for (i = 0; i < SID_CONTEXTS; i++) {
-        if (err < 0)
+                err = __init_new_context();
-                return -1;
+                if (err < 0)
-        vcpu3s->context_id = err;
+                        goto init_fail;
+                vcpu3s->context_id[i] = err;
-        vcpu3s->vsid_max = CTX_TO_VSID(vcpu3s->context_id + 1) - 1;
-        vcpu3s->vsid_first = CTX_TO_VSID(vcpu3s->context_id);
-#if 0 /* XXX still doesn't guarantee uniqueness */
-        /* We could collide with the Linux vsid space because the vsid
-         * wraps around at 24 bits. We're safe if we do our own space
-         * though, so let's always set the highest bit. */
-        vcpu3s->vsid_max |= 0x00800000;
+                /* Remember context id for this combination */
-        vcpu3s->vsid_first |= 0x00800000;
+                for (j = 0; j < 16; j++)
-#endif
+                        vcpu3s->vsid_pool[(i * 16) + j] = CTX_TO_VSID(err, j);
-        BUG_ON(vcpu3s->vsid_max < vcpu3s->vsid_first);
+        }
-        vcpu3s->vsid_next = vcpu3s->vsid_first;
+        vcpu3s->vsid_next = 0;
        /* Remember where the HTAB is */
        asm ( "mfsdr1 %0" : "=r"(sdr1) );
@@ -370,4 +371,14 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
        kvmppc_mmu_hpte_init(vcpu);
        return 0;
+init_fail:
+        for (j = 0; j < i; j++) {
+                if (!vcpu3s->context_id[j])
+                        continue;
+                __destroy_context(to_book3s(vcpu)->context_id[j]);
+        }
+        return -1;
 }
diff --git a/arch/powerpc/kvm/book3s_64_mmu.c b/arch/powerpc/kvm/book3s_64_mmu.c
index 4025ea26b3c1..d7889ef3211e 100644
--- a/arch/powerpc/kvm/book3s_64_mmu.c
+++ b/arch/powerpc/kvm/book3s_64_mmu.c
@@ -163,6 +163,22 @@ static int kvmppc_mmu_book3s_64_xlate(struct kvm_vcpu *vcpu, gva_t eaddr,
        bool found = false;
        bool perm_err = false;
        int second = 0;
+        ulong mp_ea = vcpu->arch.magic_page_ea;
+        /* Magic page override */
+        if (unlikely(mp_ea) &&
+            unlikely((eaddr & ~0xfffULL) == (mp_ea & ~0xfffULL)) &&
+            !(vcpu->arch.shared->msr & MSR_PR)) {
+                gpte->eaddr = eaddr;
+                gpte->vpage = kvmppc_mmu_book3s_64_ea_to_vp(vcpu, eaddr, data);
+                gpte->raddr = vcpu->arch.magic_page_pa | (gpte->raddr & 0xfff);
+                gpte->raddr &= KVM_PAM;
+                gpte->may_execute = true;
+                gpte->may_read = true;
+                gpte->may_write = true;
+                return 0;
+        }
        slbe = kvmppc_mmu_book3s_64_find_slbe(vcpu_book3s, eaddr);
        if (!slbe)
@@ -180,9 +196,9 @@ do_second:
                goto no_page_found;
        }
-        if ((vcpu->arch.msr & MSR_PR) && slbe->Kp)
+        if ((vcpu->arch.shared->msr & MSR_PR) && slbe->Kp)
                key = 4;
-        else if (!(vcpu->arch.msr & MSR_PR) && slbe->Ks)
+        else if (!(vcpu->arch.shared->msr & MSR_PR) && slbe->Ks)
                key = 4;
        for (i=0; i<16; i+=2) {
@@ -381,7 +397,7 @@ static void kvmppc_mmu_book3s_64_slbia(struct kvm_vcpu *vcpu)
        for (i = 1; i < vcpu_book3s->slb_nr; i++)
                vcpu_book3s->slb[i].valid = false;
-        if (vcpu->arch.msr & MSR_IR) {
+        if (vcpu->arch.shared->msr & MSR_IR) {
                kvmppc_mmu_flush_segments(vcpu);
                kvmppc_mmu_map_segment(vcpu, kvmppc_get_pc(vcpu));
        }
@@ -445,14 +461,15 @@ static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
        ulong ea = esid << SID_SHIFT;
        struct kvmppc_slb *slb;
        u64 gvsid = esid;
+        ulong mp_ea = vcpu->arch.magic_page_ea;
-        if (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
+        if (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
                slb = kvmppc_mmu_book3s_64_find_slbe(to_book3s(vcpu), ea);
                if (slb)
                        gvsid = slb->vsid;
        }
-        switch (vcpu->arch.msr & (MSR_DR|MSR_IR)) {
+        switch (vcpu->arch.shared->msr & (MSR_DR|MSR_IR)) {
        case 0:
                *vsid = VSID_REAL | esid;
                break;
@@ -464,7 +481,7 @@ static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                break;
        case MSR_DR|MSR_IR:
                if (!slb)
-                        return -ENOENT;
+                        goto no_slb;
                *vsid = gvsid;
                break;
@@ -473,10 +490,21 @@ static int kvmppc_mmu_book3s_64_esid_to_vsid(struct kvm_vcpu *vcpu, ulong esid,
                break;
        }
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                *vsid |= VSID_PR;
        return 0;
+no_slb:
+        /* Catch magic page case */
+        if (unlikely(mp_ea) &&
+            unlikely(esid == (mp_ea >> SID_SHIFT)) &&
+            !(vcpu->arch.shared->msr & MSR_PR)) {
+                *vsid = VSID_REAL | esid;
+                return 0;
+        }
+        return -EINVAL;
 }
 static bool kvmppc_mmu_book3s_64_is_dcbz32(struct kvm_vcpu *vcpu)
diff --git a/arch/powerpc/kvm/book3s_64_mmu_host.c b/arch/powerpc/kvm/book3s_64_mmu_host.c
index 384179a5002b..fa2f08434ba5 100644
--- a/arch/powerpc/kvm/book3s_64_mmu_host.c
+++ b/arch/powerpc/kvm/book3s_64_mmu_host.c
@@ -20,7 +20,6 @@
 */
 #include <linux/kvm_host.h>
-#include <linux/hash.h>
 #include <asm/kvm_ppc.h>
 #include <asm/kvm_book3s.h>
@@ -28,24 +27,9 @@
 #include <asm/machdep.h>
 #include <asm/mmu_context.h>
 #include <asm/hw_irq.h>
+#include "trace.h"
 #define PTE_SIZE 12
-#define VSID_ALL 0
-/* #define DEBUG_MMU */
-/* #define DEBUG_SLB */
-#ifdef DEBUG_MMU
-#define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
-#else
-#define dprintk_mmu(a, ...) do { } while(0)
-#endif
-#ifdef DEBUG_SLB
-#define dprintk_slb(a, ...) printk(KERN_INFO a, __VA_ARGS__)
-#else
-#define dprintk_slb(a, ...) do { } while(0)
-#endif
 void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
 {
@@ -58,34 +42,39 @@ void kvmppc_mmu_invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
 * a hash, so we don't waste cycles on looping */
 static u16 kvmppc_sid_hash(struct kvm_vcpu *vcpu, u64 gvsid)
 {
-        return hash_64(gvsid, SID_MAP_BITS);
+        return (u16)(((gvsid >> (SID_MAP_BITS * 7)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 6)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 5)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 4)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 3)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 2)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 1)) & SID_MAP_MASK) ^
+                     ((gvsid >> (SID_MAP_BITS * 0)) & SID_MAP_MASK));
 }
 static struct kvmppc_sid_map *find_sid_vsid(struct kvm_vcpu *vcpu, u64 gvsid)
 {
        struct kvmppc_sid_map *map;
        u16 sid_map_mask;
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                gvsid |= VSID_PR;
        sid_map_mask = kvmppc_sid_hash(vcpu, gvsid);
        map = &to_book3s(vcpu)->sid_map[sid_map_mask];
-        if (map->guest_vsid == gvsid) {
+        if (map->valid && (map->guest_vsid == gvsid)) {
-                dprintk_slb("SLB: Searching: 0x%llx -> 0x%llx\n",
+                trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
-                            gvsid, map->host_vsid);
                return map;
        }
        map = &to_book3s(vcpu)->sid_map[SID_MAP_MASK - sid_map_mask];
-        if (map->guest_vsid == gvsid) {
+        if (map->valid && (map->guest_vsid == gvsid)) {
-                dprintk_slb("SLB: Searching 0x%llx -> 0x%llx\n",
+                trace_kvm_book3s_slb_found(gvsid, map->host_vsid);
-                            gvsid, map->host_vsid);
                return map;
        }
-        dprintk_slb("SLB: Searching %d/%d: 0x%llx -> not found\n",
+        trace_kvm_book3s_slb_fail(sid_map_mask, gvsid);
-                    sid_map_mask, SID_MAP_MASK - sid_map_mask, gvsid);
        return NULL;
 }
@@ -101,18 +90,13 @@ int kvmppc_mmu_map_page(struct kvm_vcpu *vcpu, struct kvmppc_pte *orig_pte)
        struct kvmppc_sid_map *map;
        /* Get host physical address for gpa */
-        hpaddr = gfn_to_pfn(vcpu->kvm, orig_pte->raddr >> PAGE_SHIFT);
+        hpaddr = kvmppc_gfn_to_pfn(vcpu, orig_pte->raddr >> PAGE_SHIFT);
-        if (kvm_is_error_hva(hpaddr)) {
+        if (is_error_pfn(hpaddr)) {
                printk(KERN_INFO "Couldn't get guest page for gfn %lx!\n", orig_pte->eaddr);
                return -EINVAL;
        }
        hpaddr <<= PAGE_SHIFT;
-#if PAGE_SHIFT == 12
+        hpaddr |= orig_pte->raddr & (~0xfffULL & ~PAGE_MASK);
-#elif PAGE_SHIFT == 16
-        hpaddr |= orig_pte->raddr & 0xf000;
-#else
-#error Unknown page size
-#endif
        /* and write the mapping ea -> hpa into the pt */
        vcpu->arch.mmu.esid_to_vsid(vcpu, orig_pte->eaddr >> SID_SHIFT, &vsid);
@@ -161,10 +145,7 @@ map_again:
        } else {
                struct hpte_cache *pte = kvmppc_mmu_hpte_cache_next(vcpu);
-                dprintk_mmu("KVM: %c%c Map 0x%lx: [%lx] 0x%lx (0x%llx) -> %lx\n",
+                trace_kvm_book3s_64_mmu_map(rflags, hpteg, va, hpaddr, orig_pte);
-                            ((rflags & HPTE_R_PP) == 3) ? '-' : 'w',
-                            (rflags & HPTE_R_N) ? '-' : 'x',
-                            orig_pte->eaddr, hpteg, va, orig_pte->vpage, hpaddr);
                /* The ppc_md code may give us a secondary entry even though we
                   asked for a primary. Fix up. */
@@ -191,7 +172,7 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
        u16 sid_map_mask;
        static int backwards_map = 0;
-        if (vcpu->arch.msr & MSR_PR)
+        if (vcpu->arch.shared->msr & MSR_PR)
                gvsid |= VSID_PR;
        /* We might get collisions that trap in preceding order, so let's
@@ -219,8 +200,7 @@ static struct kvmppc_sid_map *create_sid_map(struct kvm_vcpu *vcpu, u64 gvsid)
        map->guest_vsid = gvsid;
        map->valid = true;
-        dprintk_slb("SLB: New mapping at %d: 0x%llx -> 0x%llx\n",
+        trace_kvm_book3s_slb_map(sid_map_mask, gvsid, map->host_vsid);
-                    sid_map_mask, gvsid, map->host_vsid);
        return map;
 }
@@ -292,7 +272,7 @@ int kvmppc_mmu_map_segment(struct kvm_vcpu *vcpu, ulong eaddr)
        to_svcpu(vcpu)->slb[slb_index].esid = slb_esid;
        to_svcpu(vcpu)->slb[slb_index].vsid = slb_vsid;
-        dprintk_slb("slbmte %#llx, %#llx\n", slb_vsid, slb_esid);
+        trace_kvm_book3s_slbmte(slb_vsid, slb_esid);
        return 0;
 }
@@ -306,7 +286,7 @@ void kvmppc_mmu_flush_segments(struct kvm_vcpu *vcpu)
 void kvmppc_mmu_destroy(struct kvm_vcpu *vcpu)
 {
        kvmppc_mmu_hpte_destroy(vcpu);
-        __destroy_context(to_book3s(vcpu)->context_id);
+        __destroy_context(to_book3s(vcpu)->context_id[0]);
 }
 int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
@@ -317,10 +297,10 @@ int kvmppc_mmu_init(struct kvm_vcpu *vcpu)
        err = __init_new_context();
        if (err < 0)
                return -1;
-        vcpu3s->context_id = err;
+        vcpu3s->context_id[0] = err;
-        vcpu3s->vsid_max = ((vcpu3s->context_id + 1) << USER_ESID_BITS) - 1;
+        vcpu3s->vsid_max = ((vcpu3s->context_id[0] + 1) << USER_ESID_BITS) - 1;
-        vcpu3s->vsid_first = vcpu3s->context_id << USER_ESID_BITS;
+        vcpu3s->vsid_first = vcpu3s->context_id[0] << USER_ESID_BITS;
        vcpu3s->vsid_next = vcpu3s->vsid_first;
        kvmppc_mmu_hpte_init(vcpu);
diff --git a/arch/powerpc/kvm/book3s_emulate.c b/arch/powerpc/kvm/book3s_emulate.c
index c85f906038ce..466846557089 100644
--- a/arch/powerpc/kvm/book3s_emulate.c
+++ b/arch/powerpc/kvm/book3s_emulate.c
@@ -73,8 +73,8 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                switch (get_xop(inst)) {
                case OP_19_XOP_RFID:
                case OP_19_XOP_RFI:
-                        kvmppc_set_pc(vcpu, vcpu->arch.srr0);
+                        kvmppc_set_pc(vcpu, vcpu->arch.shared->srr0);
-                        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
+                        kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
                        *advance = 0;
                        break;
@@ -86,14 +86,15 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
        case 31:
                switch (get_xop(inst)) {
                case OP_31_XOP_MFMSR:
-                        kvmppc_set_gpr(vcpu, get_rt(inst), vcpu->arch.msr);
+                        kvmppc_set_gpr(vcpu, get_rt(inst),
+                                       vcpu->arch.shared->msr);
                        break;
                case OP_31_XOP_MTMSRD:
                {
                        ulong rs = kvmppc_get_gpr(vcpu, get_rs(inst));
                        if (inst & 0x10000) {
-                                vcpu->arch.msr &= ~(MSR_RI | MSR_EE);
+                                vcpu->arch.shared->msr &= ~(MSR_RI | MSR_EE);
-                                vcpu->arch.msr |= rs & (MSR_RI | MSR_EE);
+                                vcpu->arch.shared->msr |= rs & (MSR_RI | MSR_EE);
                        } else
                                kvmppc_set_msr(vcpu, rs);
                        break;
@@ -204,14 +205,14 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                                ra = kvmppc_get_gpr(vcpu, get_ra(inst));
                        addr = (ra + rb) & ~31ULL;
-                        if (!(vcpu->arch.msr & MSR_SF))
+                        if (!(vcpu->arch.shared->msr & MSR_SF))
                                addr &= 0xffffffff;
                        vaddr = addr;
                        r = kvmppc_st(vcpu, &addr, 32, zeros, true);
                        if ((r == -ENOENT) || (r == -EPERM)) {
                                *advance = 0;
-                                vcpu->arch.dear = vaddr;
+                                vcpu->arch.shared->dar = vaddr;
                                to_svcpu(vcpu)->fault_dar = vaddr;
                                dsisr = DSISR_ISSTORE;
@@ -220,7 +221,7 @@ int kvmppc_core_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                                else if (r == -EPERM)
                                        dsisr |= DSISR_PROTFAULT;
-                                to_book3s(vcpu)->dsisr = dsisr;
+                                vcpu->arch.shared->dsisr = dsisr;
                                to_svcpu(vcpu)->fault_dsisr = dsisr;
                                kvmppc_book3s_queue_irqprio(vcpu,
@@ -263,7 +264,7 @@ void kvmppc_set_bat(struct kvm_vcpu *vcpu, struct kvmppc_bat *bat, bool upper,
        }
 }
-static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn)
+static struct kvmppc_bat *kvmppc_find_bat(struct kvm_vcpu *vcpu, int sprn)
 {
        struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
        struct kvmppc_bat *bat;
@@ -285,35 +286,7 @@ static u32 kvmppc_read_bat(struct kvm_vcpu *vcpu, int sprn)
                BUG();
        }
-        if (sprn % 2)
+        return bat;
-                return bat->raw >> 32;
-        else
-                return bat->raw;
-}
-static void kvmppc_write_bat(struct kvm_vcpu *vcpu, int sprn, u32 val)
-{
-        struct kvmppc_vcpu_book3s *vcpu_book3s = to_book3s(vcpu);
-        struct kvmppc_bat *bat;
-        switch (sprn) {
-        case SPRN_IBAT0U ... SPRN_IBAT3L:
-                bat = &vcpu_book3s->ibat[(sprn - SPRN_IBAT0U) / 2];
-                break;
-        case SPRN_IBAT4U ... SPRN_IBAT7L:
-                bat = &vcpu_book3s->ibat[4 + ((sprn - SPRN_IBAT4U) / 2)];
-                break;
-        case SPRN_DBAT0U ... SPRN_DBAT3L:
-                bat = &vcpu_book3s->dbat[(sprn - SPRN_DBAT0U) / 2];
-                break;
-        case SPRN_DBAT4U ... SPRN_DBAT7L:
-                bat = &vcpu_book3s->dbat[4 + ((sprn - SPRN_DBAT4U) / 2)];
-                break;
-        default:
-                BUG();
-        }
-        kvmppc_set_bat(vcpu, bat, !(sprn % 2), val);
 }
 int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
@@ -326,10 +299,10 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
                to_book3s(vcpu)->sdr1 = spr_val;
                break;
        case SPRN_DSISR:
-                to_book3s(vcpu)->dsisr = spr_val;
+                vcpu->arch.shared->dsisr = spr_val;
                break;
        case SPRN_DAR:
-                vcpu->arch.dear = spr_val;
+                vcpu->arch.shared->dar = spr_val;
                break;
        case SPRN_HIOR:
                to_book3s(vcpu)->hior = spr_val;
@@ -338,12 +311,16 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
        case SPRN_IBAT4U ... SPRN_IBAT7L:
        case SPRN_DBAT0U ... SPRN_DBAT3L:
        case SPRN_DBAT4U ... SPRN_DBAT7L:
-                kvmppc_write_bat(vcpu, sprn, (u32)spr_val);
+        {
+                struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
+                kvmppc_set_bat(vcpu, bat, !(sprn % 2), (u32)spr_val);
                /* BAT writes happen so rarely that we're ok to flush
                 * everything here */
                kvmppc_mmu_pte_flush(vcpu, 0, 0);
                kvmppc_mmu_flush_segments(vcpu);
                break;
+        }
        case SPRN_HID0:
                to_book3s(vcpu)->hid[0] = spr_val;
                break;
@@ -433,16 +410,24 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
        case SPRN_IBAT4U ... SPRN_IBAT7L:
        case SPRN_DBAT0U ... SPRN_DBAT3L:
        case SPRN_DBAT4U ... SPRN_DBAT7L:
-                kvmppc_set_gpr(vcpu, rt, kvmppc_read_bat(vcpu, sprn));
+        {
+                struct kvmppc_bat *bat = kvmppc_find_bat(vcpu, sprn);
+                if (sprn % 2)
+                        kvmppc_set_gpr(vcpu, rt, bat->raw >> 32);
+                else
+                        kvmppc_set_gpr(vcpu, rt, bat->raw);
                break;
+        }
        case SPRN_SDR1:
                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->sdr1);
                break;
        case SPRN_DSISR:
-                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->dsisr);
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dsisr);
                break;
        case SPRN_DAR:
-                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear);
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar);
                break;
        case SPRN_HIOR:
                kvmppc_set_gpr(vcpu, rt, to_book3s(vcpu)->hior);
diff --git a/arch/powerpc/kvm/book3s_mmu_hpte.c b/arch/powerpc/kvm/book3s_mmu_hpte.c
index 4868d4a7ebc5..79751d8dd131 100644
--- a/arch/powerpc/kvm/book3s_mmu_hpte.c
+++ b/arch/powerpc/kvm/book3s_mmu_hpte.c
@@ -21,6 +21,7 @@
 #include <linux/kvm_host.h>
 #include <linux/hash.h>
 #include <linux/slab.h>
+#include "trace.h"
 #include <asm/kvm_ppc.h>
 #include <asm/kvm_book3s.h>
@@ -30,14 +31,6 @@
 #define PTE_SIZE        12
-/* #define DEBUG_MMU */
-#ifdef DEBUG_MMU
-#define dprintk_mmu(a, ...) printk(KERN_INFO a, __VA_ARGS__)
-#else
-#define dprintk_mmu(a, ...) do { } while(0)
-#endif
 static struct kmem_cache *hpte_cache;
 static inline u64 kvmppc_mmu_hash_pte(u64 eaddr)
@@ -45,6 +38,12 @@ static inline u64 kvmppc_mmu_hash_pte(u64 eaddr)
        return hash_64(eaddr >> PTE_SIZE, HPTEG_HASH_BITS_PTE);
 }
+static inline u64 kvmppc_mmu_hash_pte_long(u64 eaddr)
+{
+        return hash_64((eaddr & 0x0ffff000) >> PTE_SIZE,
+                       HPTEG_HASH_BITS_PTE_LONG);
+}
 static inline u64 kvmppc_mmu_hash_vpte(u64 vpage)
 {
        return hash_64(vpage & 0xfffffffffULL, HPTEG_HASH_BITS_VPTE);
@@ -60,77 +59,128 @@ void kvmppc_mmu_hpte_cache_map(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
 {
        u64 index;
+        trace_kvm_book3s_mmu_map(pte);
+        spin_lock(&vcpu->arch.mmu_lock);
        /* Add to ePTE list */
        index = kvmppc_mmu_hash_pte(pte->pte.eaddr);
-        hlist_add_head(&pte->list_pte, &vcpu->arch.hpte_hash_pte[index]);
+        hlist_add_head_rcu(&pte->list_pte, &vcpu->arch.hpte_hash_pte[index]);
+        /* Add to ePTE_long list */
+        index = kvmppc_mmu_hash_pte_long(pte->pte.eaddr);
+        hlist_add_head_rcu(&pte->list_pte_long,
+                           &vcpu->arch.hpte_hash_pte_long[index]);
        /* Add to vPTE list */
        index = kvmppc_mmu_hash_vpte(pte->pte.vpage);
-        hlist_add_head(&pte->list_vpte, &vcpu->arch.hpte_hash_vpte[index]);
+        hlist_add_head_rcu(&pte->list_vpte, &vcpu->arch.hpte_hash_vpte[index]);
        /* Add to vPTE_long list */
        index = kvmppc_mmu_hash_vpte_long(pte->pte.vpage);
-        hlist_add_head(&pte->list_vpte_long,
+        hlist_add_head_rcu(&pte->list_vpte_long,
-                       &vcpu->arch.hpte_hash_vpte_long[index]);
+                           &vcpu->arch.hpte_hash_vpte_long[index]);
+        spin_unlock(&vcpu->arch.mmu_lock);
+}
+static void free_pte_rcu(struct rcu_head *head)
+{
+        struct hpte_cache *pte = container_of(head, struct hpte_cache, rcu_head);
+        kmem_cache_free(hpte_cache, pte);
 }
 static void invalidate_pte(struct kvm_vcpu *vcpu, struct hpte_cache *pte)
 {
-        dprintk_mmu("KVM: Flushing SPT: 0x%lx (0x%llx) -> 0x%llx\n",
+        trace_kvm_book3s_mmu_invalidate(pte);
-                    pte->pte.eaddr, pte->pte.vpage, pte->host_va);
        /* Different for 32 and 64 bit */
        kvmppc_mmu_invalidate_pte(vcpu, pte);
+        spin_lock(&vcpu->arch.mmu_lock);
+        /* pte already invalidated in between? */
+        if (hlist_unhashed(&pte->list_pte)) {
+                spin_unlock(&vcpu->arch.mmu_lock);
+                return;
+        }
+        hlist_del_init_rcu(&pte->list_pte);
+        hlist_del_init_rcu(&pte->list_pte_long);
+        hlist_del_init_rcu(&pte->list_vpte);
+        hlist_del_init_rcu(&pte->list_vpte_long);
        if (pte->pte.may_write)
                kvm_release_pfn_dirty(pte->pfn);
        else
                kvm_release_pfn_clean(pte->pfn);
-        hlist_del(&pte->list_pte);
+        spin_unlock(&vcpu->arch.mmu_lock);
-        hlist_del(&pte->list_vpte);
-        hlist_del(&pte->list_vpte_long);
        vcpu->arch.hpte_cache_count--;
-        kmem_cache_free(hpte_cache, pte);
+        call_rcu(&pte->rcu_head, free_pte_rcu);
 }
 static void kvmppc_mmu_pte_flush_all(struct kvm_vcpu *vcpu)
 {
        struct hpte_cache *pte;
-        struct hlist_node *node, *tmp;
+        struct hlist_node *node;
        int i;
+        rcu_read_lock();
        for (i = 0; i < HPTEG_HASH_NUM_VPTE_LONG; i++) {
                struct hlist_head *list = &vcpu->arch.hpte_hash_vpte_long[i];
-                hlist_for_each_entry_safe(pte, node, tmp, list, list_vpte_long)
+                hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
                        invalidate_pte(vcpu, pte);
        }
+        rcu_read_unlock();
 }
 static void kvmppc_mmu_pte_flush_page(struct kvm_vcpu *vcpu, ulong guest_ea)
 {
        struct hlist_head *list;
-        struct hlist_node *node, *tmp;
+        struct hlist_node *node;
        struct hpte_cache *pte;
        /* Find the list of entries in the map */
        list = &vcpu->arch.hpte_hash_pte[kvmppc_mmu_hash_pte(guest_ea)];
+        rcu_read_lock();
        /* Check the list for matching entries and invalidate */
-        hlist_for_each_entry_safe(pte, node, tmp, list, list_pte)
+        hlist_for_each_entry_rcu(pte, node, list, list_pte)
                if ((pte->pte.eaddr & ~0xfffUL) == guest_ea)
                        invalidate_pte(vcpu, pte);
+        rcu_read_unlock();
 }
-void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
+static void kvmppc_mmu_pte_flush_long(struct kvm_vcpu *vcpu, ulong guest_ea)
 {
-        u64 i;
+        struct hlist_head *list;
+        struct hlist_node *node;
+        struct hpte_cache *pte;
-        dprintk_mmu("KVM: Flushing %d Shadow PTEs: 0x%lx & 0x%lx\n",
+        /* Find the list of entries in the map */
-                    vcpu->arch.hpte_cache_count, guest_ea, ea_mask);
+        list = &vcpu->arch.hpte_hash_pte_long[
+                        kvmppc_mmu_hash_pte_long(guest_ea)];
+        rcu_read_lock();
+        /* Check the list for matching entries and invalidate */
+        hlist_for_each_entry_rcu(pte, node, list, list_pte_long)
+                if ((pte->pte.eaddr & 0x0ffff000UL) == guest_ea)
+                        invalidate_pte(vcpu, pte);
+        rcu_read_unlock();
+}
+void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
+{
+        trace_kvm_book3s_mmu_flush("", vcpu, guest_ea, ea_mask);
        guest_ea &= ea_mask;
        switch (ea_mask) {
@@ -138,9 +188,7 @@ void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
                kvmppc_mmu_pte_flush_page(vcpu, guest_ea);
                break;
        case 0x0ffff000:
-                /* 32-bit flush w/o segment, go through all possible segments */
+                kvmppc_mmu_pte_flush_long(vcpu, guest_ea);
-                for (i = 0; i < 0x100000000ULL; i += 0x10000000ULL)
-                        kvmppc_mmu_pte_flush(vcpu, guest_ea | i, ~0xfffUL);
                break;
        case 0:
                /* Doing a complete flush -> start from scratch */
@@ -156,39 +204,46 @@ void kvmppc_mmu_pte_flush(struct kvm_vcpu *vcpu, ulong guest_ea, ulong ea_mask)
 static void kvmppc_mmu_pte_vflush_short(struct kvm_vcpu *vcpu, u64 guest_vp)
 {
        struct hlist_head *list;
-        struct hlist_node *node, *tmp;
+        struct hlist_node *node;
        struct hpte_cache *pte;
        u64 vp_mask = 0xfffffffffULL;
        list = &vcpu->arch.hpte_hash_vpte[kvmppc_mmu_hash_vpte(guest_vp)];
+        rcu_read_lock();
        /* Check the list for matching entries and invalidate */
-        hlist_for_each_entry_safe(pte, node, tmp, list, list_vpte)
+        hlist_for_each_entry_rcu(pte, node, list, list_vpte)
                if ((pte->pte.vpage & vp_mask) == guest_vp)
                        invalidate_pte(vcpu, pte);
+        rcu_read_unlock();
 }
 /* Flush with mask 0xffffff000 */
 static void kvmppc_mmu_pte_vflush_long(struct kvm_vcpu *vcpu, u64 guest_vp)
 {
        struct hlist_head *list;
-        struct hlist_node *node, *tmp;
+        struct hlist_node *node;
        struct hpte_cache *pte;
        u64 vp_mask = 0xffffff000ULL;
        list = &vcpu->arch.hpte_hash_vpte_long[
                kvmppc_mmu_hash_vpte_long(guest_vp)];
+        rcu_read_lock();
        /* Check the list for matching entries and invalidate */
-        hlist_for_each_entry_safe(pte, node, tmp, list, list_vpte_long)
+        hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
                if ((pte->pte.vpage & vp_mask) == guest_vp)
                        invalidate_pte(vcpu, pte);
+        rcu_read_unlock();
 }
 void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
 {
-        dprintk_mmu("KVM: Flushing %d Shadow vPTEs: 0x%llx & 0x%llx\n",
+        trace_kvm_book3s_mmu_flush("v", vcpu, guest_vp, vp_mask);
-                    vcpu->arch.hpte_cache_count, guest_vp, vp_mask);
        guest_vp &= vp_mask;
        switch(vp_mask) {
@@ -206,21 +261,24 @@ void kvmppc_mmu_pte_vflush(struct kvm_vcpu *vcpu, u64 guest_vp, u64 vp_mask)
 void kvmppc_mmu_pte_pflush(struct kvm_vcpu *vcpu, ulong pa_start, ulong pa_end)
 {
-        struct hlist_node *node, *tmp;
+        struct hlist_node *node;
        struct hpte_cache *pte;
        int i;
-        dprintk_mmu("KVM: Flushing %d Shadow pPTEs: 0x%lx - 0x%lx\n",
+        trace_kvm_book3s_mmu_flush("p", vcpu, pa_start, pa_end);
-                    vcpu->arch.hpte_cache_count, pa_start, pa_end);
+        rcu_read_lock();
        for (i = 0; i < HPTEG_HASH_NUM_VPTE_LONG; i++) {
                struct hlist_head *list = &vcpu->arch.hpte_hash_vpte_long[i];
-                hlist_for_each_entry_safe(pte, node, tmp, list, list_vpte_long)
+                hlist_for_each_entry_rcu(pte, node, list, list_vpte_long)
                        if ((pte->pte.raddr >= pa_start) &&
                            (pte->pte.raddr < pa_end))
                                invalidate_pte(vcpu, pte);
        }
+        rcu_read_unlock();
 }
 struct hpte_cache *kvmppc_mmu_hpte_cache_next(struct kvm_vcpu *vcpu)
@@ -254,11 +312,15 @@ int kvmppc_mmu_hpte_init(struct kvm_vcpu *vcpu)
        /* init hpte lookup hashes */
        kvmppc_mmu_hpte_init_hash(vcpu->arch.hpte_hash_pte,
                                  ARRAY_SIZE(vcpu->arch.hpte_hash_pte));
+        kvmppc_mmu_hpte_init_hash(vcpu->arch.hpte_hash_pte_long,
+                                  ARRAY_SIZE(vcpu->arch.hpte_hash_pte_long));
        kvmppc_mmu_hpte_init_hash(vcpu->arch.hpte_hash_vpte,
                                  ARRAY_SIZE(vcpu->arch.hpte_hash_vpte));
        kvmppc_mmu_hpte_init_hash(vcpu->arch.hpte_hash_vpte_long,
                                  ARRAY_SIZE(vcpu->arch.hpte_hash_vpte_long));
+        spin_lock_init(&vcpu->arch.mmu_lock);
        return 0;
 }
diff --git a/arch/powerpc/kvm/book3s_paired_singles.c b/arch/powerpc/kvm/book3s_paired_singles.c
index 474f2e24050a..7b0ee96c1bed 100644
--- a/arch/powerpc/kvm/book3s_paired_singles.c
+++ b/arch/powerpc/kvm/book3s_paired_singles.c
@@ -159,20 +159,21 @@
 static inline void kvmppc_sync_qpr(struct kvm_vcpu *vcpu, int rt)
 {
-        kvm_cvt_df(&vcpu->arch.fpr[rt], &vcpu->arch.qpr[rt], &vcpu->arch.fpscr);
+        kvm_cvt_df(&vcpu->arch.fpr[rt], &vcpu->arch.qpr[rt]);
 }
 static void kvmppc_inject_pf(struct kvm_vcpu *vcpu, ulong eaddr, bool is_store)
 {
        u64 dsisr;
+        struct kvm_vcpu_arch_shared *shared = vcpu->arch.shared;
-        vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 33, 36, 0);
+        shared->msr = kvmppc_set_field(shared->msr, 33, 36, 0);
-        vcpu->arch.msr = kvmppc_set_field(vcpu->arch.msr, 42, 47, 0);
+        shared->msr = kvmppc_set_field(shared->msr, 42, 47, 0);
-        vcpu->arch.dear = eaddr;
+        shared->dar = eaddr;
        /* Page Fault */
        dsisr = kvmppc_set_field(0, 33, 33, 1);
        if (is_store)
-                to_book3s(vcpu)->dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
+                shared->dsisr = kvmppc_set_field(dsisr, 38, 38, 1);
        kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_DATA_STORAGE);
 }
@@ -204,7 +205,7 @@ static int kvmppc_emulate_fpr_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
        /* put in registers */
        switch (ls_type) {
        case FPU_LS_SINGLE:
-                kvm_cvt_fd((u32*)tmp, &vcpu->arch.fpr[rs], &vcpu->arch.fpscr);
+                kvm_cvt_fd((u32*)tmp, &vcpu->arch.fpr[rs]);
                vcpu->arch.qpr[rs] = *((u32*)tmp);
                break;
        case FPU_LS_DOUBLE:
@@ -230,7 +231,7 @@ static int kvmppc_emulate_fpr_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
        switch (ls_type) {
        case FPU_LS_SINGLE:
-                kvm_cvt_df(&vcpu->arch.fpr[rs], (u32*)tmp, &vcpu->arch.fpscr);
+                kvm_cvt_df(&vcpu->arch.fpr[rs], (u32*)tmp);
                val = *((u32*)tmp);
                len = sizeof(u32);
                break;
@@ -296,7 +297,7 @@ static int kvmppc_emulate_psq_load(struct kvm_run *run, struct kvm_vcpu *vcpu,
        emulated = EMULATE_DONE;
        /* put in registers */
-        kvm_cvt_fd(&tmp[0], &vcpu->arch.fpr[rs], &vcpu->arch.fpscr);
+        kvm_cvt_fd(&tmp[0], &vcpu->arch.fpr[rs]);
        vcpu->arch.qpr[rs] = tmp[1];
        dprintk(KERN_INFO "KVM: PSQ_LD [0x%x, 0x%x] at 0x%lx (%d)\n", tmp[0],
@@ -314,7 +315,7 @@ static int kvmppc_emulate_psq_store(struct kvm_run *run, struct kvm_vcpu *vcpu,
        u32 tmp[2];
        int len = w ? sizeof(u32) : sizeof(u64);
-        kvm_cvt_df(&vcpu->arch.fpr[rs], &tmp[0], &vcpu->arch.fpscr);
+        kvm_cvt_df(&vcpu->arch.fpr[rs], &tmp[0]);
        tmp[1] = vcpu->arch.qpr[rs];
        r = kvmppc_st(vcpu, &addr, len, tmp, true);
@@ -516,9 +517,9 @@ static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
        WARN_ON(rc);
        /* PS0 */
-        kvm_cvt_df(&fpr[reg_in1], &ps0_in1, &vcpu->arch.fpscr);
+        kvm_cvt_df(&fpr[reg_in1], &ps0_in1);
-        kvm_cvt_df(&fpr[reg_in2], &ps0_in2, &vcpu->arch.fpscr);
+        kvm_cvt_df(&fpr[reg_in2], &ps0_in2);
-        kvm_cvt_df(&fpr[reg_in3], &ps0_in3, &vcpu->arch.fpscr);
+        kvm_cvt_df(&fpr[reg_in3], &ps0_in3);
        if (scalar & SCALAR_LOW)
                ps0_in2 = qpr[reg_in2];
@@ -529,7 +530,7 @@ static int kvmppc_ps_three_in(struct kvm_vcpu *vcpu, bool rc,
                          ps0_in1, ps0_in2, ps0_in3, ps0_out);
        if (!(scalar & SCALAR_NO_PS0))
-                kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
+                kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
        /* PS1 */
        ps1_in1 = qpr[reg_in1];
@@ -566,12 +567,12 @@ static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
        WARN_ON(rc);
        /* PS0 */
-        kvm_cvt_df(&fpr[reg_in1], &ps0_in1, &vcpu->arch.fpscr);
+        kvm_cvt_df(&fpr[reg_in1], &ps0_in1);
        if (scalar & SCALAR_LOW)
                ps0_in2 = qpr[reg_in2];
        else
-                kvm_cvt_df(&fpr[reg_in2], &ps0_in2, &vcpu->arch.fpscr);
+                kvm_cvt_df(&fpr[reg_in2], &ps0_in2);
        func(&vcpu->arch.fpscr, &ps0_out, &ps0_in1, &ps0_in2);
@@ -579,7 +580,7 @@ static int kvmppc_ps_two_in(struct kvm_vcpu *vcpu, bool rc,
                dprintk(KERN_INFO "PS2 ps0 -> f(0x%x, 0x%x) = 0x%x\n",
                                  ps0_in1, ps0_in2, ps0_out);
-                kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
+                kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
        }
        /* PS1 */
@@ -615,13 +616,13 @@ static int kvmppc_ps_one_in(struct kvm_vcpu *vcpu, bool rc,
        WARN_ON(rc);
        /* PS0 */
-        kvm_cvt_df(&fpr[reg_in], &ps0_in, &vcpu->arch.fpscr);
+        kvm_cvt_df(&fpr[reg_in], &ps0_in);
        func(&vcpu->arch.fpscr, &ps0_out, &ps0_in);
        dprintk(KERN_INFO "PS1 ps0 -> f(0x%x) = 0x%x\n",
                          ps0_in, ps0_out);
-        kvm_cvt_fd(&ps0_out, &fpr[reg_out], &vcpu->arch.fpscr);
+        kvm_cvt_fd(&ps0_out, &fpr[reg_out]);
        /* PS1 */
        ps1_in = qpr[reg_in];
@@ -658,7 +659,7 @@ int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
        if (!kvmppc_inst_is_paired_single(vcpu, inst))
                return EMULATE_FAIL;
-        if (!(vcpu->arch.msr & MSR_FP)) {
+        if (!(vcpu->arch.shared->msr & MSR_FP)) {
                kvmppc_book3s_queue_irqprio(vcpu, BOOK3S_INTERRUPT_FP_UNAVAIL);
                return EMULATE_AGAIN;
        }
@@ -671,7 +672,7 @@ int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
 #ifdef DEBUG
        for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
                u32 f;
-                kvm_cvt_df(&vcpu->arch.fpr[i], &f, &vcpu->arch.fpscr);
+                kvm_cvt_df(&vcpu->arch.fpr[i], &f);
                dprintk(KERN_INFO "FPR[%d] = 0x%x / 0x%llx    QPR[%d] = 0x%x\n",
                        i, f, vcpu->arch.fpr[i], i, vcpu->arch.qpr[i]);
        }
@@ -796,8 +797,7 @@ int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
                        vcpu->arch.fpr[ax_rd] = vcpu->arch.fpr[ax_ra];
                        /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
                        kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
-                                   &vcpu->arch.qpr[ax_rd],
+                                   &vcpu->arch.qpr[ax_rd]);
-                                   &vcpu->arch.fpscr);
                        break;
                case OP_4X_PS_MERGE01:
                        WARN_ON(rcomp);
@@ -808,19 +808,16 @@ int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
                        WARN_ON(rcomp);
                        /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
                        kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
-                                   &vcpu->arch.fpr[ax_rd],
+                                   &vcpu->arch.fpr[ax_rd]);
-                                   &vcpu->arch.fpscr);
                        /* vcpu->arch.qpr[ax_rd] = vcpu->arch.fpr[ax_rb]; */
                        kvm_cvt_df(&vcpu->arch.fpr[ax_rb],
-                                   &vcpu->arch.qpr[ax_rd],
+                                   &vcpu->arch.qpr[ax_rd]);
-                                   &vcpu->arch.fpscr);
                        break;
                case OP_4X_PS_MERGE11:
                        WARN_ON(rcomp);
                        /* vcpu->arch.fpr[ax_rd] = vcpu->arch.qpr[ax_ra]; */
                        kvm_cvt_fd(&vcpu->arch.qpr[ax_ra],
-                                   &vcpu->arch.fpr[ax_rd],
+                                   &vcpu->arch.fpr[ax_rd]);
-                                   &vcpu->arch.fpscr);
                        vcpu->arch.qpr[ax_rd] = vcpu->arch.qpr[ax_rb];
                        break;
                }
@@ -1255,7 +1252,7 @@ int kvmppc_emulate_paired_single(struct kvm_run *run, struct kvm_vcpu *vcpu)
 #ifdef DEBUG
        for (i = 0; i < ARRAY_SIZE(vcpu->arch.fpr); i++) {
                u32 f;
-                kvm_cvt_df(&vcpu->arch.fpr[i], &f, &vcpu->arch.fpscr);
+                kvm_cvt_df(&vcpu->arch.fpr[i], &f);
                dprintk(KERN_INFO "FPR[%d] = 0x%x\n", i, f);
        }
 #endif
diff --git a/arch/powerpc/kvm/book3s_rmhandlers.S b/arch/powerpc/kvm/book3s_rmhandlers.S
index 506d5c316c96..1a1b34487e71 100644
--- a/arch/powerpc/kvm/book3s_rmhandlers.S
+++ b/arch/powerpc/kvm/book3s_rmhandlers.S
@@ -35,9 +35,7 @@
 #if defined(CONFIG_PPC_BOOK3S_64)
-#define LOAD_SHADOW_VCPU(reg)                           \
+#define LOAD_SHADOW_VCPU(reg)   GET_PACA(reg)                                   
-        mfspr   reg, SPRN_SPRG_PACA
 #define SHADOW_VCPU_OFF         PACA_KVM_SVCPU
 #define MSR_NOIRQ               MSR_KERNEL & ~(MSR_IR | MSR_DR)
 #define FUNC(name)              GLUE(.,name)
@@ -72,7 +70,7 @@
 .global kvmppc_trampoline_\intno
 kvmppc_trampoline_\intno:
-        mtspr   SPRN_SPRG_SCRATCH0, r13         /* Save r13 */
+        SET_SCRATCH0(r13)               /* Save r13 */
        /*
         * First thing to do is to find out if we're coming
@@ -91,7 +89,7 @@ kvmppc_trampoline_\intno:
        lwz     r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
        mtcr    r12
        PPC_LL  r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
-        mfspr   r13, SPRN_SPRG_SCRATCH0         /* r13 = original r13 */
+        GET_SCRATCH0(r13)                       /* r13 = original r13 */
        b       kvmppc_resume_\intno            /* Get back original handler */
        /* Now we know we're handling a KVM guest */
@@ -114,6 +112,9 @@ INTERRUPT_TRAMPOLINE	BOOK3S_INTERRUPT_MACHINE_CHECK
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_DATA_STORAGE
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_INST_STORAGE
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_EXTERNAL
+#ifdef CONFIG_PPC_BOOK3S_64
+INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_EXTERNAL_HV
+#endif
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_ALIGNMENT
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_PROGRAM
 INTERRUPT_TRAMPOLINE    BOOK3S_INTERRUPT_FP_UNAVAIL
@@ -158,7 +159,7 @@ kvmppc_handler_skip_ins:
        lwz     r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
        mtcr    r12
        PPC_LL  r12, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
-        mfspr   r13, SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r13)
        /* And get back into the code */
        RFI
@@ -202,8 +203,25 @@ _GLOBAL(kvmppc_rmcall)
 #if defined(CONFIG_PPC_BOOK3S_32)
 #define STACK_LR        INT_FRAME_SIZE+4
+/* load_up_xxx have to run with MSR_DR=0 on Book3S_32 */
+#define MSR_EXT_START                                           \
+        PPC_STL r20, _NIP(r1);                                  \
+        mfmsr   r20;                                            \
+        LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE);                  \
+        andc    r3,r20,r3;              /* Disable DR,EE */     \
+        mtmsr   r3;                                             \
+        sync
+#define MSR_EXT_END                                             \
+        mtmsr   r20;                    /* Enable DR,EE */      \
+        sync;                                                   \
+        PPC_LL  r20, _NIP(r1)
 #elif defined(CONFIG_PPC_BOOK3S_64)
 #define STACK_LR        _LINK
+#define MSR_EXT_START
+#define MSR_EXT_END
 #endif
 /*
@@ -215,19 +233,12 @@ _GLOBAL(kvmppc_load_up_ ## what);				\
        PPC_STLU r1, -INT_FRAME_SIZE(r1);                       \
        mflr    r3;                                             \
        PPC_STL r3, STACK_LR(r1);                               \
-        PPC_STL r20, _NIP(r1);                                  \
+        MSR_EXT_START;                                          \
-        mfmsr   r20;                                            \
-        LOAD_REG_IMMEDIATE(r3, MSR_DR|MSR_EE);                  \
-        andc    r3,r20,r3;              /* Disable DR,EE */     \
-        mtmsr   r3;                                             \
-        sync;                                                   \
                                                                \
        bl      FUNC(load_up_ ## what);                         \
                                                                \
-        mtmsr   r20;                    /* Enable DR,EE */      \
+        MSR_EXT_END;                                            \
-        sync;                                                   \
        PPC_LL  r3, STACK_LR(r1);                               \
-        PPC_LL  r20, _NIP(r1);                                  \
        mtlr    r3;                                             \
        addi    r1, r1, INT_FRAME_SIZE;                         \
        blr
@@ -242,10 +253,10 @@ define_load_up(vsx)
 .global kvmppc_trampoline_lowmem
 kvmppc_trampoline_lowmem:
-        .long kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
+        PPC_LONG kvmppc_handler_lowmem_trampoline - CONFIG_KERNEL_START
 .global kvmppc_trampoline_enter
 kvmppc_trampoline_enter:
-        .long kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
+        PPC_LONG kvmppc_handler_trampoline_enter - CONFIG_KERNEL_START
 #include "book3s_segment.S"
diff --git a/arch/powerpc/kvm/book3s_segment.S b/arch/powerpc/kvm/book3s_segment.S
index 7c52ed0b7051..451264274b8c 100644
--- a/arch/powerpc/kvm/book3s_segment.S
+++ b/arch/powerpc/kvm/book3s_segment.S
@@ -155,14 +155,20 @@ kvmppc_handler_trampoline_exit:
        PPC_LL  r2, (SHADOW_VCPU_OFF + SVCPU_HOST_R2)(r13)
        /* Save guest PC and MSR */
-        mfsrr0  r3
+        andi.   r0,r12,0x2
+        beq     1f
+        mfspr   r3,SPRN_HSRR0
+        mfspr   r4,SPRN_HSRR1
+        andi.   r12,r12,0x3ffd
+        b       2f
+1:      mfsrr0  r3
        mfsrr1  r4
+2:
        PPC_STL r3, (SHADOW_VCPU_OFF + SVCPU_PC)(r13)
        PPC_STL r4, (SHADOW_VCPU_OFF + SVCPU_SHADOW_SRR1)(r13)
        /* Get scratch'ed off registers */
-        mfspr   r9, SPRN_SPRG_SCRATCH0
+        GET_SCRATCH0(r9)
        PPC_LL  r8, (SHADOW_VCPU_OFF + SVCPU_SCRATCH0)(r13)
        lwz     r7, (SHADOW_VCPU_OFF + SVCPU_SCRATCH1)(r13)
diff --git a/arch/powerpc/kvm/booke.c b/arch/powerpc/kvm/booke.c
index 8d4e35f5372c..8462b3a1c1c7 100644
--- a/arch/powerpc/kvm/booke.c
+++ b/arch/powerpc/kvm/booke.c
@@ -62,9 +62,10 @@ void kvmppc_dump_vcpu(struct kvm_vcpu *vcpu)
 {
        int i;
-        printk("pc:   %08lx msr:  %08lx\n", vcpu->arch.pc, vcpu->arch.msr);
+        printk("pc:   %08lx msr:  %08llx\n", vcpu->arch.pc, vcpu->arch.shared->msr);
        printk("lr:   %08lx ctr:  %08lx\n", vcpu->arch.lr, vcpu->arch.ctr);
-        printk("srr0: %08lx srr1: %08lx\n", vcpu->arch.srr0, vcpu->arch.srr1);
+        printk("srr0: %08llx srr1: %08llx\n", vcpu->arch.shared->srr0,
+                                            vcpu->arch.shared->srr1);
        printk("exceptions: %08lx\n", vcpu->arch.pending_exceptions);
@@ -130,13 +131,19 @@ void kvmppc_core_dequeue_dec(struct kvm_vcpu *vcpu)
 void kvmppc_core_queue_external(struct kvm_vcpu *vcpu,
                                struct kvm_interrupt *irq)
 {
-        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_EXTERNAL);
+        unsigned int prio = BOOKE_IRQPRIO_EXTERNAL;
+        if (irq->irq == KVM_INTERRUPT_SET_LEVEL)
+                prio = BOOKE_IRQPRIO_EXTERNAL_LEVEL;
+        kvmppc_booke_queue_irqprio(vcpu, prio);
 }
 void kvmppc_core_dequeue_external(struct kvm_vcpu *vcpu,
                                  struct kvm_interrupt *irq)
 {
        clear_bit(BOOKE_IRQPRIO_EXTERNAL, &vcpu->arch.pending_exceptions);
+        clear_bit(BOOKE_IRQPRIO_EXTERNAL_LEVEL, &vcpu->arch.pending_exceptions);
 }
 /* Deliver the interrupt of the corresponding priority, if possible. */
@@ -146,6 +153,26 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
        int allowed = 0;
        ulong uninitialized_var(msr_mask);
        bool update_esr = false, update_dear = false;
+        ulong crit_raw = vcpu->arch.shared->critical;
+        ulong crit_r1 = kvmppc_get_gpr(vcpu, 1);
+        bool crit;
+        bool keep_irq = false;
+        /* Truncate crit indicators in 32 bit mode */
+        if (!(vcpu->arch.shared->msr & MSR_SF)) {
+                crit_raw &= 0xffffffff;
+                crit_r1 &= 0xffffffff;
+        }
+        /* Critical section when crit == r1 */
+        crit = (crit_raw == crit_r1);
+        /* ... and we're in supervisor mode */
+        crit = crit && !(vcpu->arch.shared->msr & MSR_PR);
+        if (priority == BOOKE_IRQPRIO_EXTERNAL_LEVEL) {
+                priority = BOOKE_IRQPRIO_EXTERNAL;
+                keep_irq = true;
+        }
        switch (priority) {
        case BOOKE_IRQPRIO_DTLB_MISS:
@@ -169,36 +196,38 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
                break;
        case BOOKE_IRQPRIO_CRITICAL:
        case BOOKE_IRQPRIO_WATCHDOG:
-                allowed = vcpu->arch.msr & MSR_CE;
+                allowed = vcpu->arch.shared->msr & MSR_CE;
                msr_mask = MSR_ME;
                break;
        case BOOKE_IRQPRIO_MACHINE_CHECK:
-                allowed = vcpu->arch.msr & MSR_ME;
+                allowed = vcpu->arch.shared->msr & MSR_ME;
                msr_mask = 0;
                break;
        case BOOKE_IRQPRIO_EXTERNAL:
        case BOOKE_IRQPRIO_DECREMENTER:
        case BOOKE_IRQPRIO_FIT:
-                allowed = vcpu->arch.msr & MSR_EE;
+                allowed = vcpu->arch.shared->msr & MSR_EE;
+                allowed = allowed && !crit;
                msr_mask = MSR_CE|MSR_ME|MSR_DE;
                break;
        case BOOKE_IRQPRIO_DEBUG:
-                allowed = vcpu->arch.msr & MSR_DE;
+                allowed = vcpu->arch.shared->msr & MSR_DE;
                msr_mask = MSR_ME;
                break;
        }
        if (allowed) {
-                vcpu->arch.srr0 = vcpu->arch.pc;
+                vcpu->arch.shared->srr0 = vcpu->arch.pc;
-                vcpu->arch.srr1 = vcpu->arch.msr;
+                vcpu->arch.shared->srr1 = vcpu->arch.shared->msr;
                vcpu->arch.pc = vcpu->arch.ivpr | vcpu->arch.ivor[priority];
                if (update_esr == true)
                        vcpu->arch.esr = vcpu->arch.queued_esr;
                if (update_dear == true)
-                        vcpu->arch.dear = vcpu->arch.queued_dear;
+                        vcpu->arch.shared->dar = vcpu->arch.queued_dear;
-                kvmppc_set_msr(vcpu, vcpu->arch.msr & msr_mask);
+                kvmppc_set_msr(vcpu, vcpu->arch.shared->msr & msr_mask);
-                clear_bit(priority, &vcpu->arch.pending_exceptions);
+                if (!keep_irq)
+                        clear_bit(priority, &vcpu->arch.pending_exceptions);
        }
        return allowed;
@@ -208,6 +237,7 @@ static int kvmppc_booke_irqprio_deliver(struct kvm_vcpu *vcpu,
 void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
 {
        unsigned long *pending = &vcpu->arch.pending_exceptions;
+        unsigned long old_pending = vcpu->arch.pending_exceptions;
        unsigned int priority;
        priority = __ffs(*pending);
@@ -219,6 +249,12 @@ void kvmppc_core_deliver_interrupts(struct kvm_vcpu *vcpu)
                                         BITS_PER_BYTE * sizeof(*pending),
                                         priority + 1);
        }
+        /* Tell the guest about our interrupt status */
+        if (*pending)
+                vcpu->arch.shared->int_pending = 1;
+        else if (old_pending)
+                vcpu->arch.shared->int_pending = 0;
 }
 /**
@@ -265,7 +301,7 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                break;
        case BOOKE_INTERRUPT_PROGRAM:
-                if (vcpu->arch.msr & MSR_PR) {
+                if (vcpu->arch.shared->msr & MSR_PR) {
                        /* Program traps generated by user-level software must be handled
                         * by the guest kernel. */
                        kvmppc_core_queue_program(vcpu, vcpu->arch.fault_esr);
@@ -337,7 +373,15 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
                break;
        case BOOKE_INTERRUPT_SYSCALL:
-                kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
+                if (!(vcpu->arch.shared->msr & MSR_PR) &&
+                    (((u32)kvmppc_get_gpr(vcpu, 0)) == KVM_SC_MAGIC_R0)) {
+                        /* KVM PV hypercalls */
+                        kvmppc_set_gpr(vcpu, 3, kvmppc_kvm_pv(vcpu));
+                        r = RESUME_GUEST;
+                } else {
+                        /* Guest syscalls */
+                        kvmppc_booke_queue_irqprio(vcpu, BOOKE_IRQPRIO_SYSCALL);
+                }
                kvmppc_account_exit(vcpu, SYSCALL_EXITS);
                r = RESUME_GUEST;
                break;
@@ -466,15 +510,19 @@ int kvmppc_handle_exit(struct kvm_run *run, struct kvm_vcpu *vcpu,
 /* Initial guest state: 16MB mapping 0 -> 0, PC = 0, MSR = 0, R1 = 16MB */
 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
 {
+        int i;
        vcpu->arch.pc = 0;
-        vcpu->arch.msr = 0;
+        vcpu->arch.shared->msr = 0;
        kvmppc_set_gpr(vcpu, 1, (16<<20) - 8); /* -8 for the callee-save LR slot */
        vcpu->arch.shadow_pid = 1;
-        /* Eye-catching number so we know if the guest takes an interrupt
+        /* Eye-catching numbers so we know if the guest takes an interrupt
-         * before it's programmed its own IVPR. */
+         * before it's programmed its own IVPR/IVORs. */
        vcpu->arch.ivpr = 0x55550000;
+        for (i = 0; i < BOOKE_IRQPRIO_MAX; i++)
+                vcpu->arch.ivor[i] = 0x7700 | i * 4;
        kvmppc_init_timing_stats(vcpu);
@@ -490,17 +538,18 @@ int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        regs->ctr = vcpu->arch.ctr;
        regs->lr = vcpu->arch.lr;
        regs->xer = kvmppc_get_xer(vcpu);
-        regs->msr = vcpu->arch.msr;
+        regs->msr = vcpu->arch.shared->msr;
-        regs->srr0 = vcpu->arch.srr0;
+        regs->srr0 = vcpu->arch.shared->srr0;
-        regs->srr1 = vcpu->arch.srr1;
+        regs->srr1 = vcpu->arch.shared->srr1;
        regs->pid = vcpu->arch.pid;
-        regs->sprg0 = vcpu->arch.sprg0;
+        regs->sprg0 = vcpu->arch.shared->sprg0;
-        regs->sprg1 = vcpu->arch.sprg1;
+        regs->sprg1 = vcpu->arch.shared->sprg1;
-        regs->sprg2 = vcpu->arch.sprg2;
+        regs->sprg2 = vcpu->arch.shared->sprg2;
-        regs->sprg3 = vcpu->arch.sprg3;
+        regs->sprg3 = vcpu->arch.shared->sprg3;
-        regs->sprg5 = vcpu->arch.sprg4;
+        regs->sprg4 = vcpu->arch.sprg4;
-        regs->sprg6 = vcpu->arch.sprg5;
+        regs->sprg5 = vcpu->arch.sprg5;
-        regs->sprg7 = vcpu->arch.sprg6;
+        regs->sprg6 = vcpu->arch.sprg6;
+        regs->sprg7 = vcpu->arch.sprg7;
        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
                regs->gpr[i] = kvmppc_get_gpr(vcpu, i);
@@ -518,15 +567,17 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        vcpu->arch.lr = regs->lr;
        kvmppc_set_xer(vcpu, regs->xer);
        kvmppc_set_msr(vcpu, regs->msr);
-        vcpu->arch.srr0 = regs->srr0;
+        vcpu->arch.shared->srr0 = regs->srr0;
-        vcpu->arch.srr1 = regs->srr1;
+        vcpu->arch.shared->srr1 = regs->srr1;
-        vcpu->arch.sprg0 = regs->sprg0;
+        kvmppc_set_pid(vcpu, regs->pid);
-        vcpu->arch.sprg1 = regs->sprg1;
+        vcpu->arch.shared->sprg0 = regs->sprg0;
-        vcpu->arch.sprg2 = regs->sprg2;
+        vcpu->arch.shared->sprg1 = regs->sprg1;
-        vcpu->arch.sprg3 = regs->sprg3;
+        vcpu->arch.shared->sprg2 = regs->sprg2;
-        vcpu->arch.sprg5 = regs->sprg4;
+        vcpu->arch.shared->sprg3 = regs->sprg3;
-        vcpu->arch.sprg6 = regs->sprg5;
+        vcpu->arch.sprg4 = regs->sprg4;
-        vcpu->arch.sprg7 = regs->sprg6;
+        vcpu->arch.sprg5 = regs->sprg5;
+        vcpu->arch.sprg6 = regs->sprg6;
+        vcpu->arch.sprg7 = regs->sprg7;
        for (i = 0; i < ARRAY_SIZE(regs->gpr); i++)
                kvmppc_set_gpr(vcpu, i, regs->gpr[i]);
@@ -534,16 +585,165 @@ int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
        return 0;
 }
+static void get_sregs_base(struct kvm_vcpu *vcpu,
+                           struct kvm_sregs *sregs)
+{
+        u64 tb = get_tb();
+        sregs->u.e.features |= KVM_SREGS_E_BASE;
+        sregs->u.e.csrr0 = vcpu->arch.csrr0;
+        sregs->u.e.csrr1 = vcpu->arch.csrr1;
+        sregs->u.e.mcsr = vcpu->arch.mcsr;
+        sregs->u.e.esr = vcpu->arch.esr;
+        sregs->u.e.dear = vcpu->arch.shared->dar;
+        sregs->u.e.tsr = vcpu->arch.tsr;
+        sregs->u.e.tcr = vcpu->arch.tcr;
+        sregs->u.e.dec = kvmppc_get_dec(vcpu, tb);
+        sregs->u.e.tb = tb;
+        sregs->u.e.vrsave = vcpu->arch.vrsave;
+}
+static int set_sregs_base(struct kvm_vcpu *vcpu,
+                          struct kvm_sregs *sregs)
+{
+        if (!(sregs->u.e.features & KVM_SREGS_E_BASE))
+                return 0;
+        vcpu->arch.csrr0 = sregs->u.e.csrr0;
+        vcpu->arch.csrr1 = sregs->u.e.csrr1;
+        vcpu->arch.mcsr = sregs->u.e.mcsr;
+        vcpu->arch.esr = sregs->u.e.esr;
+        vcpu->arch.shared->dar = sregs->u.e.dear;
+        vcpu->arch.vrsave = sregs->u.e.vrsave;
+        vcpu->arch.tcr = sregs->u.e.tcr;
+        if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_DEC)
+                vcpu->arch.dec = sregs->u.e.dec;
+        kvmppc_emulate_dec(vcpu);
+        if (sregs->u.e.update_special & KVM_SREGS_E_UPDATE_TSR) {
+                /*
+                 * FIXME: existing KVM timer handling is incomplete.
+                 * TSR cannot be read by the guest, and its value in
+                 * vcpu->arch is always zero.  For now, just handle
+                 * the case where the caller is trying to inject a
+                 * decrementer interrupt.
+                 */
+                if ((sregs->u.e.tsr & TSR_DIS) &&
+                    (vcpu->arch.tcr & TCR_DIE))
+                        kvmppc_core_queue_dec(vcpu);
+        }
+        return 0;
+}
+static void get_sregs_arch206(struct kvm_vcpu *vcpu,
+                              struct kvm_sregs *sregs)
+{
+        sregs->u.e.features |= KVM_SREGS_E_ARCH206;
+        sregs->u.e.pir = 0;
+        sregs->u.e.mcsrr0 = vcpu->arch.mcsrr0;
+        sregs->u.e.mcsrr1 = vcpu->arch.mcsrr1;
+        sregs->u.e.decar = vcpu->arch.decar;
+        sregs->u.e.ivpr = vcpu->arch.ivpr;
+}
+static int set_sregs_arch206(struct kvm_vcpu *vcpu,
+                             struct kvm_sregs *sregs)
+{
+        if (!(sregs->u.e.features & KVM_SREGS_E_ARCH206))
+                return 0;
+        if (sregs->u.e.pir != 0)
+                return -EINVAL;
+        vcpu->arch.mcsrr0 = sregs->u.e.mcsrr0;
+        vcpu->arch.mcsrr1 = sregs->u.e.mcsrr1;
+        vcpu->arch.decar = sregs->u.e.decar;
+        vcpu->arch.ivpr = sregs->u.e.ivpr;
+        return 0;
+}
+void kvmppc_get_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        sregs->u.e.features |= KVM_SREGS_E_IVOR;
+        sregs->u.e.ivor_low[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
+        sregs->u.e.ivor_low[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
+        sregs->u.e.ivor_low[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
+        sregs->u.e.ivor_low[3] = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
+        sregs->u.e.ivor_low[4] = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
+        sregs->u.e.ivor_low[5] = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
+        sregs->u.e.ivor_low[6] = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
+        sregs->u.e.ivor_low[7] = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
+        sregs->u.e.ivor_low[8] = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
+        sregs->u.e.ivor_low[9] = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
+        sregs->u.e.ivor_low[10] = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
+        sregs->u.e.ivor_low[11] = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
+        sregs->u.e.ivor_low[12] = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
+        sregs->u.e.ivor_low[13] = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
+        sregs->u.e.ivor_low[14] = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
+        sregs->u.e.ivor_low[15] = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
+}
+int kvmppc_set_sregs_ivor(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
+                return 0;
+        vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = sregs->u.e.ivor_low[0];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = sregs->u.e.ivor_low[1];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = sregs->u.e.ivor_low[2];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = sregs->u.e.ivor_low[3];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = sregs->u.e.ivor_low[4];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = sregs->u.e.ivor_low[5];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = sregs->u.e.ivor_low[6];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = sregs->u.e.ivor_low[7];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = sregs->u.e.ivor_low[8];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = sregs->u.e.ivor_low[9];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = sregs->u.e.ivor_low[10];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = sregs->u.e.ivor_low[11];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = sregs->u.e.ivor_low[12];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = sregs->u.e.ivor_low[13];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = sregs->u.e.ivor_low[14];
+        vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = sregs->u.e.ivor_low[15];
+        return 0;
+}
 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
                                  struct kvm_sregs *sregs)
 {
-        return -ENOTSUPP;
+        sregs->pvr = vcpu->arch.pvr;
+        get_sregs_base(vcpu, sregs);
+        get_sregs_arch206(vcpu, sregs);
+        kvmppc_core_get_sregs(vcpu, sregs);
+        return 0;
 }
 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
                                  struct kvm_sregs *sregs)
 {
-        return -ENOTSUPP;
+        int ret;
+        if (vcpu->arch.pvr != sregs->pvr)
+                return -EINVAL;
+        ret = set_sregs_base(vcpu, sregs);
+        if (ret < 0)
+                return ret;
+        ret = set_sregs_arch206(vcpu, sregs);
+        if (ret < 0)
+                return ret;
+        return kvmppc_core_set_sregs(vcpu, sregs);
 }
 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
diff --git a/arch/powerpc/kvm/booke.h b/arch/powerpc/kvm/booke.h
index d59bcca1f9d8..492bb7030358 100644
--- a/arch/powerpc/kvm/booke.h
+++ b/arch/powerpc/kvm/booke.h
@@ -46,7 +46,9 @@
 #define BOOKE_IRQPRIO_FIT 17
 #define BOOKE_IRQPRIO_DECREMENTER 18
 #define BOOKE_IRQPRIO_PERFORMANCE_MONITOR 19
-#define BOOKE_IRQPRIO_MAX 19
+/* Internal pseudo-irqprio for level triggered externals */
+#define BOOKE_IRQPRIO_EXTERNAL_LEVEL 20
+#define BOOKE_IRQPRIO_MAX 20
 extern unsigned long kvmppc_booke_handlers;
@@ -54,12 +56,12 @@ extern unsigned long kvmppc_booke_handlers;
 * changing. */
 static inline void kvmppc_set_msr(struct kvm_vcpu *vcpu, u32 new_msr)
 {
-        if ((new_msr & MSR_PR) != (vcpu->arch.msr & MSR_PR))
+        if ((new_msr & MSR_PR) != (vcpu->arch.shared->msr & MSR_PR))
                kvmppc_mmu_priv_switch(vcpu, new_msr & MSR_PR);
-        vcpu->arch.msr = new_msr;
+        vcpu->arch.shared->msr = new_msr;
-        if (vcpu->arch.msr & MSR_WE) {
+        if (vcpu->arch.shared->msr & MSR_WE) {
                kvm_vcpu_block(vcpu);
                kvmppc_set_exit_type(vcpu, EMULATED_MTMSRWE_EXITS);
        };
diff --git a/arch/powerpc/kvm/booke_emulate.c b/arch/powerpc/kvm/booke_emulate.c
index cbc790ee1928..1260f5f24c0c 100644
--- a/arch/powerpc/kvm/booke_emulate.c
+++ b/arch/powerpc/kvm/booke_emulate.c
@@ -31,8 +31,8 @@
 static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
 {
-        vcpu->arch.pc = vcpu->arch.srr0;
+        vcpu->arch.pc = vcpu->arch.shared->srr0;
-        kvmppc_set_msr(vcpu, vcpu->arch.srr1);
+        kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
 }
 int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
@@ -62,7 +62,7 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                case OP_31_XOP_MFMSR:
                        rt = get_rt(inst);
-                        kvmppc_set_gpr(vcpu, rt, vcpu->arch.msr);
+                        kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
                        kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
                        break;
@@ -74,13 +74,13 @@ int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
                case OP_31_XOP_WRTEE:
                        rs = get_rs(inst);
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                        vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
                                        | (kvmppc_get_gpr(vcpu, rs) & MSR_EE);
                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
                        break;
                case OP_31_XOP_WRTEEI:
-                        vcpu->arch.msr = (vcpu->arch.msr & ~MSR_EE)
+                        vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
                                                         | (inst & MSR_EE);
                        kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
                        break;
@@ -105,7 +105,7 @@ int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
        switch (sprn) {
        case SPRN_DEAR:
-                vcpu->arch.dear = spr_val; break;
+                vcpu->arch.shared->dar = spr_val; break;
        case SPRN_ESR:
                vcpu->arch.esr = spr_val; break;
        case SPRN_DBCR0:
@@ -200,7 +200,7 @@ int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
        case SPRN_IVPR:
                kvmppc_set_gpr(vcpu, rt, vcpu->arch.ivpr); break;
        case SPRN_DEAR:
-                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dear); break;
+                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->dar); break;
        case SPRN_ESR:
                kvmppc_set_gpr(vcpu, rt, vcpu->arch.esr); break;
        case SPRN_DBCR0:
diff --git a/arch/powerpc/kvm/booke_interrupts.S b/arch/powerpc/kvm/booke_interrupts.S
index 380a78cf484d..b58ccae95904 100644
--- a/arch/powerpc/kvm/booke_interrupts.S
+++ b/arch/powerpc/kvm/booke_interrupts.S
@@ -380,7 +380,6 @@ lightweight_exit:
         * because host interrupt handlers would get confused. */
        lwz     r1, VCPU_GPR(r1)(r4)
-        /* XXX handle USPRG0 */
        /* Host interrupt handlers may have clobbered these guest-readable
         * SPRGs, so we need to reload them here with the guest's values. */
        lwz     r3, VCPU_SPRG4(r4)
@@ -415,7 +414,8 @@ lightweight_exit:
        lwz     r8, VCPU_GPR(r8)(r4)
        lwz     r3, VCPU_PC(r4)
        mtsrr0  r3
-        lwz     r3, VCPU_MSR(r4)
+        lwz     r3, VCPU_SHARED(r4)
+        lwz     r3, (VCPU_SHARED_MSR + 4)(r3)
        oris    r3, r3, KVMPPC_MSR_MASK@h
        ori     r3, r3, KVMPPC_MSR_MASK@l
        mtsrr1  r3
diff --git a/arch/powerpc/kvm/e500.c b/arch/powerpc/kvm/e500.c
index e8a00b0c4449..318dbc61ba44 100644
--- a/arch/powerpc/kvm/e500.c
+++ b/arch/powerpc/kvm/e500.c
@@ -63,6 +63,7 @@ int kvmppc_core_vcpu_setup(struct kvm_vcpu *vcpu)
        /* Registers init */
        vcpu->arch.pvr = mfspr(SPRN_PVR);
+        vcpu_e500->svr = mfspr(SPRN_SVR);
        /* Since booke kvm only support one core, update all vcpus' PIR to 0 */
        vcpu->vcpu_id = 0;
@@ -96,6 +97,81 @@ int kvmppc_core_vcpu_translate(struct kvm_vcpu *vcpu,
        return 0;
 }
+void kvmppc_core_get_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        sregs->u.e.features |= KVM_SREGS_E_ARCH206_MMU | KVM_SREGS_E_SPE |
+                               KVM_SREGS_E_PM;
+        sregs->u.e.impl_id = KVM_SREGS_E_IMPL_FSL;
+        sregs->u.e.impl.fsl.features = 0;
+        sregs->u.e.impl.fsl.svr = vcpu_e500->svr;
+        sregs->u.e.impl.fsl.hid0 = vcpu_e500->hid0;
+        sregs->u.e.impl.fsl.mcar = vcpu_e500->mcar;
+        sregs->u.e.mas0 = vcpu_e500->mas0;
+        sregs->u.e.mas1 = vcpu_e500->mas1;
+        sregs->u.e.mas2 = vcpu_e500->mas2;
+        sregs->u.e.mas7_3 = ((u64)vcpu_e500->mas7 << 32) | vcpu_e500->mas3;
+        sregs->u.e.mas4 = vcpu_e500->mas4;
+        sregs->u.e.mas6 = vcpu_e500->mas6;
+        sregs->u.e.mmucfg = mfspr(SPRN_MMUCFG);
+        sregs->u.e.tlbcfg[0] = vcpu_e500->tlb0cfg;
+        sregs->u.e.tlbcfg[1] = vcpu_e500->tlb1cfg;
+        sregs->u.e.tlbcfg[2] = 0;
+        sregs->u.e.tlbcfg[3] = 0;
+        sregs->u.e.ivor_high[0] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL];
+        sregs->u.e.ivor_high[1] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA];
+        sregs->u.e.ivor_high[2] = vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND];
+        sregs->u.e.ivor_high[3] =
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR];
+        kvmppc_get_sregs_ivor(vcpu, sregs);
+}
+int kvmppc_core_set_sregs(struct kvm_vcpu *vcpu, struct kvm_sregs *sregs)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        if (sregs->u.e.impl_id == KVM_SREGS_E_IMPL_FSL) {
+                vcpu_e500->svr = sregs->u.e.impl.fsl.svr;
+                vcpu_e500->hid0 = sregs->u.e.impl.fsl.hid0;
+                vcpu_e500->mcar = sregs->u.e.impl.fsl.mcar;
+        }
+        if (sregs->u.e.features & KVM_SREGS_E_ARCH206_MMU) {
+                vcpu_e500->mas0 = sregs->u.e.mas0;
+                vcpu_e500->mas1 = sregs->u.e.mas1;
+                vcpu_e500->mas2 = sregs->u.e.mas2;
+                vcpu_e500->mas7 = sregs->u.e.mas7_3 >> 32;
+                vcpu_e500->mas3 = (u32)sregs->u.e.mas7_3;
+                vcpu_e500->mas4 = sregs->u.e.mas4;
+                vcpu_e500->mas6 = sregs->u.e.mas6;
+        }
+        if (!(sregs->u.e.features & KVM_SREGS_E_IVOR))
+                return 0;
+        if (sregs->u.e.features & KVM_SREGS_E_SPE) {
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_UNAVAIL] =
+                        sregs->u.e.ivor_high[0];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_DATA] =
+                        sregs->u.e.ivor_high[1];
+                vcpu->arch.ivor[BOOKE_IRQPRIO_SPE_FP_ROUND] =
+                        sregs->u.e.ivor_high[2];
+        }
+        if (sregs->u.e.features & KVM_SREGS_E_PM) {
+                vcpu->arch.ivor[BOOKE_IRQPRIO_PERFORMANCE_MONITOR] =
+                        sregs->u.e.ivor_high[3];
+        }
+        return kvmppc_set_sregs_ivor(vcpu, sregs);
+}
 struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
 {
        struct kvmppc_vcpu_e500 *vcpu_e500;
@@ -117,8 +193,14 @@ struct kvm_vcpu *kvmppc_core_vcpu_create(struct kvm *kvm, unsigned int id)
        if (err)
                goto uninit_vcpu;
+        vcpu->arch.shared = (void*)__get_free_page(GFP_KERNEL|__GFP_ZERO);
+        if (!vcpu->arch.shared)
+                goto uninit_tlb;
        return vcpu;
+uninit_tlb:
+        kvmppc_e500_tlb_uninit(vcpu_e500);
 uninit_vcpu:
        kvm_vcpu_uninit(vcpu);
 free_vcpu:
@@ -131,8 +213,9 @@ void kvmppc_core_vcpu_free(struct kvm_vcpu *vcpu)
 {
        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
-        kvmppc_e500_tlb_uninit(vcpu_e500);
+        free_page((unsigned long)vcpu->arch.shared);
        kvm_vcpu_uninit(vcpu);
+        kvmppc_e500_tlb_uninit(vcpu_e500);
        kmem_cache_free(kvm_vcpu_cache, vcpu_e500);
 }
diff --git a/arch/powerpc/kvm/e500_emulate.c b/arch/powerpc/kvm/e500_emulate.c
index 8e3edfbc9634..69cd665a0caf 100644
--- a/arch/powerpc/kvm/e500_emulate.c
+++ b/arch/powerpc/kvm/e500_emulate.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
 *
 * Author: Yu Liu, <yu.liu@freescale.com>
 *
@@ -78,8 +78,7 @@ int kvmppc_core_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, int rs)
        switch (sprn) {
        case SPRN_PID:
-                vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
+                kvmppc_set_pid(vcpu, spr_val);
-                        vcpu->arch.pid = spr_val;
                break;
        case SPRN_PID1:
                vcpu_e500->pid[1] = spr_val; break;
@@ -175,6 +174,8 @@ int kvmppc_core_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, int rt)
                kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid0); break;
        case SPRN_HID1:
                kvmppc_set_gpr(vcpu, rt, vcpu_e500->hid1); break;
+        case SPRN_SVR:
+                kvmppc_set_gpr(vcpu, rt, vcpu_e500->svr); break;
        case SPRN_MMUCSR0:
                kvmppc_set_gpr(vcpu, rt, 0); break;
diff --git a/arch/powerpc/kvm/e500_tlb.c b/arch/powerpc/kvm/e500_tlb.c
index 21011e12caeb..b18fe353397d 100644
--- a/arch/powerpc/kvm/e500_tlb.c
+++ b/arch/powerpc/kvm/e500_tlb.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2008-2011 Freescale Semiconductor, Inc. All rights reserved.
 *
 * Author: Yu Liu, yu.liu@freescale.com
 *
@@ -24,6 +24,7 @@
 #include "../mm/mmu_decl.h"
 #include "e500_tlb.h"
 #include "trace.h"
+#include "timing.h"
 #define to_htlb1_esel(esel) (tlb1_entry_num - (esel) - 1)
@@ -226,8 +227,7 @@ static void kvmppc_e500_stlbe_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
        kvmppc_e500_shadow_release(vcpu_e500, tlbsel, esel);
        stlbe->mas1 = 0;
-        trace_kvm_stlb_inval(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
+        trace_kvm_stlb_inval(index_of(tlbsel, esel));
-                             stlbe->mas3, stlbe->mas7);
 }
 static void kvmppc_e500_tlb1_invalidate(struct kvmppc_vcpu_e500 *vcpu_e500,
@@ -298,7 +298,8 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
        /* Get reference to new page. */
        new_page = gfn_to_page(vcpu_e500->vcpu.kvm, gfn);
        if (is_error_page(new_page)) {
-                printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n", gfn);
+                printk(KERN_ERR "Couldn't get guest page for gfn %lx!\n",
+                                (long)gfn);
                kvm_release_page_clean(new_page);
                return;
        }
@@ -314,10 +315,10 @@ static inline void kvmppc_e500_shadow_map(struct kvmppc_vcpu_e500 *vcpu_e500,
                | MAS1_TID(get_tlb_tid(gtlbe)) | MAS1_TS | MAS1_VALID;
        stlbe->mas2 = (gvaddr & MAS2_EPN)
                | e500_shadow_mas2_attrib(gtlbe->mas2,
-                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+                                vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
        stlbe->mas3 = (hpaddr & MAS3_RPN)
                | e500_shadow_mas3_attrib(gtlbe->mas3,
-                                vcpu_e500->vcpu.arch.msr & MSR_PR);
+                                vcpu_e500->vcpu.arch.shared->msr & MSR_PR);
        stlbe->mas7 = (hpaddr >> 32) & MAS7_RPN;
        trace_kvm_stlb_write(index_of(tlbsel, esel), stlbe->mas1, stlbe->mas2,
@@ -506,6 +507,7 @@ int kvmppc_e500_emul_tlbsx(struct kvm_vcpu *vcpu, int rb)
                vcpu_e500->mas7 = 0;
        }
+        kvmppc_set_exit_type(vcpu, EMULATED_TLBSX_EXITS);
        return EMULATE_DONE;
 }
@@ -571,33 +573,34 @@ int kvmppc_e500_emul_tlbwe(struct kvm_vcpu *vcpu)
                write_host_tlbe(vcpu_e500, stlbsel, sesel);
        }
+        kvmppc_set_exit_type(vcpu, EMULATED_TLBWE_EXITS);
        return EMULATE_DONE;
 }
 int kvmppc_mmu_itlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
 }
 int kvmppc_mmu_dtlb_index(struct kvm_vcpu *vcpu, gva_t eaddr)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
        return kvmppc_e500_tlb_search(vcpu, eaddr, get_cur_pid(vcpu), as);
 }
 void kvmppc_mmu_itlb_miss(struct kvm_vcpu *vcpu)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_IS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_IS);
        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.pc, as);
 }
 void kvmppc_mmu_dtlb_miss(struct kvm_vcpu *vcpu)
 {
-        unsigned int as = !!(vcpu->arch.msr & MSR_DS);
+        unsigned int as = !!(vcpu->arch.shared->msr & MSR_DS);
        kvmppc_e500_deliver_tlb_miss(vcpu, vcpu->arch.fault_dear, as);
 }
@@ -672,6 +675,14 @@ int kvmppc_e500_tlb_search(struct kvm_vcpu *vcpu,
        return -1;
 }
+void kvmppc_set_pid(struct kvm_vcpu *vcpu, u32 pid)
+{
+        struct kvmppc_vcpu_e500 *vcpu_e500 = to_e500(vcpu);
+        vcpu_e500->pid[0] = vcpu->arch.shadow_pid =
+                vcpu->arch.pid = pid;
+}
 void kvmppc_e500_tlb_setup(struct kvmppc_vcpu_e500 *vcpu_e500)
 {
        struct tlbe *tlbe;
diff --git a/arch/powerpc/kvm/e500_tlb.h b/arch/powerpc/kvm/e500_tlb.h
index d28e3010a5e2..458946b4775d 100644
--- a/arch/powerpc/kvm/e500_tlb.h
+++ b/arch/powerpc/kvm/e500_tlb.h
@@ -171,7 +171,7 @@ static inline int tlbe_is_host_safe(const struct kvm_vcpu *vcpu,
        /* Does it match current guest AS? */
        /* XXX what about IS != DS? */
-        if (get_tlb_ts(tlbe) != !!(vcpu->arch.msr & MSR_IS))
+        if (get_tlb_ts(tlbe) != !!(vcpu->arch.shared->msr & MSR_IS))
                return 0;
        gpa = get_tlb_raddr(tlbe);
diff --git a/arch/powerpc/kvm/emulate.c b/arch/powerpc/kvm/emulate.c
index 4568ec386c2a..141dce3c6810 100644
--- a/arch/powerpc/kvm/emulate.c
+++ b/arch/powerpc/kvm/emulate.c
@@ -114,6 +114,12 @@ void kvmppc_emulate_dec(struct kvm_vcpu *vcpu)
        }
 }
+u32 kvmppc_get_dec(struct kvm_vcpu *vcpu, u64 tb)
+{
+        u64 jd = tb - vcpu->arch.dec_jiffies;
+        return vcpu->arch.dec - jd;
+}
 /* XXX to do:
 * lhax
 * lhaux
@@ -145,7 +151,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
        /* this default type might be overwritten by subcategories */
        kvmppc_set_exit_type(vcpu, EMULATED_INST_EXITS);
-        pr_debug(KERN_INFO "Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
+        pr_debug("Emulating opcode %d / %d\n", get_op(inst), get_xop(inst));
        switch (get_op(inst)) {
        case OP_TRAP:
@@ -242,9 +248,11 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                        switch (sprn) {
                        case SPRN_SRR0:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.srr0); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->srr0);
+                                break;
                        case SPRN_SRR1:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.srr1); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->srr1);
+                                break;
                        case SPRN_PVR:
                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.pvr); break;
                        case SPRN_PIR:
@@ -261,23 +269,24 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                kvmppc_set_gpr(vcpu, rt, get_tb()); break;
                        case SPRN_SPRG0:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg0); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->sprg0);
+                                break;
                        case SPRN_SPRG1:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg1); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->sprg1);
+                                break;
                        case SPRN_SPRG2:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg2); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->sprg2);
+                                break;
                        case SPRN_SPRG3:
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.sprg3); break;
+                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->sprg3);
+                                break;
                        /* Note: SPRG4-7 are user-readable, so we don't get
                         * a trap. */
                        case SPRN_DEC:
                        {
-                                u64 jd = get_tb() - vcpu->arch.dec_jiffies;
+                                kvmppc_set_gpr(vcpu, rt,
-                                kvmppc_set_gpr(vcpu, rt, vcpu->arch.dec - jd);
+                                               kvmppc_get_dec(vcpu, get_tb()));
-                                pr_debug(KERN_INFO "mfDEC: %x - %llx = %lx\n",
-                                         vcpu->arch.dec, jd,
-                                         kvmppc_get_gpr(vcpu, rt));
                                break;
                        }
                        default:
@@ -288,6 +297,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                }
                                break;
                        }
+                        kvmppc_set_exit_type(vcpu, EMULATED_MFSPR_EXITS);
                        break;
                case OP_31_XOP_STHX:
@@ -320,9 +330,11 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                        rs = get_rs(inst);
                        switch (sprn) {
                        case SPRN_SRR0:
-                                vcpu->arch.srr0 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->srr0 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        case SPRN_SRR1:
-                                vcpu->arch.srr1 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->srr1 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        /* XXX We need to context-switch the timebase for
                         * watchdog and FIT. */
@@ -337,13 +349,17 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                break;
                        case SPRN_SPRG0:
-                                vcpu->arch.sprg0 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->sprg0 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        case SPRN_SPRG1:
-                                vcpu->arch.sprg1 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->sprg1 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        case SPRN_SPRG2:
-                                vcpu->arch.sprg2 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->sprg2 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        case SPRN_SPRG3:
-                                vcpu->arch.sprg3 = kvmppc_get_gpr(vcpu, rs); break;
+                                vcpu->arch.shared->sprg3 = kvmppc_get_gpr(vcpu, rs);
+                                break;
                        default:
                                emulated = kvmppc_core_emulate_mtspr(vcpu, sprn, rs);
@@ -351,6 +367,7 @@ int kvmppc_emulate_instruction(struct kvm_run *run, struct kvm_vcpu *vcpu)
                                        printk("mtspr: unknown spr %x\n", sprn);
                                break;
                        }
+                        kvmppc_set_exit_type(vcpu, EMULATED_MTSPR_EXITS);
                        break;
                case OP_31_XOP_DCBI:
diff --git a/arch/powerpc/kvm/fpu.S b/arch/powerpc/kvm/fpu.S
index cb34bbe16113..bf68d597549e 100644
--- a/arch/powerpc/kvm/fpu.S
+++ b/arch/powerpc/kvm/fpu.S
@@ -273,19 +273,11 @@ FPD_THREE_IN(fnmsub)
 FPD_THREE_IN(fnmadd)
 _GLOBAL(kvm_cvt_fd)
-        lfd     0,0(r5)                 /* load up fpscr value */
-        MTFSF_L(0)
        lfs     0,0(r3)
        stfd    0,0(r4)
-        mffs    0
-        stfd    0,0(r5)                 /* save new fpscr value */
        blr
 _GLOBAL(kvm_cvt_df)
-        lfd     0,0(r5)                 /* load up fpscr value */
-        MTFSF_L(0)
        lfd     0,0(r3)
        stfs    0,0(r4)
-        mffs    0
-        stfd    0,0(r5)                 /* save new fpscr value */
        blr
diff --git a/arch/powerpc/kvm/powerpc.c b/arch/powerpc/kvm/powerpc.c
index 72a4ad86ee91..616dd516ca1f 100644
--- a/arch/powerpc/kvm/powerpc.c
+++ b/arch/powerpc/kvm/powerpc.c
@@ -38,9 +38,56 @@
 int kvm_arch_vcpu_runnable(struct kvm_vcpu *v)
 {
-        return !(v->arch.msr & MSR_WE) || !!(v->arch.pending_exceptions);
+        return !(v->arch.shared->msr & MSR_WE) ||
+               !!(v->arch.pending_exceptions);
 }
+int kvmppc_kvm_pv(struct kvm_vcpu *vcpu)
+{
+        int nr = kvmppc_get_gpr(vcpu, 11);
+        int r;
+        unsigned long __maybe_unused param1 = kvmppc_get_gpr(vcpu, 3);
+        unsigned long __maybe_unused param2 = kvmppc_get_gpr(vcpu, 4);
+        unsigned long __maybe_unused param3 = kvmppc_get_gpr(vcpu, 5);
+        unsigned long __maybe_unused param4 = kvmppc_get_gpr(vcpu, 6);
+        unsigned long r2 = 0;
+        if (!(vcpu->arch.shared->msr & MSR_SF)) {
+                /* 32 bit mode */
+                param1 &= 0xffffffff;
+                param2 &= 0xffffffff;
+                param3 &= 0xffffffff;
+                param4 &= 0xffffffff;
+        }
+        switch (nr) {
+        case HC_VENDOR_KVM | KVM_HC_PPC_MAP_MAGIC_PAGE:
+        {
+                vcpu->arch.magic_page_pa = param1;
+                vcpu->arch.magic_page_ea = param2;
+                r2 = KVM_MAGIC_FEAT_SR;
+                r = HC_EV_SUCCESS;
+                break;
+        }
+        case HC_VENDOR_KVM | KVM_HC_FEATURES:
+                r = HC_EV_SUCCESS;
+#if defined(CONFIG_PPC_BOOK3S) /* XXX Missing magic page on BookE */
+                r2 |= (1 << KVM_FEATURE_MAGIC_PAGE);
+#endif
+                /* Second return value is in r4 */
+                break;
+        default:
+                r = HC_EV_UNIMPLEMENTED;
+                break;
+        }
+        kvmppc_set_gpr(vcpu, 4, r2);
+        return r;
+}
 int kvmppc_emulate_mmio(struct kvm_run *run, struct kvm_vcpu *vcpu)
 {
@@ -98,18 +145,12 @@ void kvm_arch_check_processor_compat(void *rtn)
        *(int *)rtn = kvmppc_core_check_processor_compat();
 }
-struct kvm *kvm_arch_create_vm(void)
+int kvm_arch_init_vm(struct kvm *kvm)
 {
-        struct kvm *kvm;
+        return 0;
-        kvm = kzalloc(sizeof(struct kvm), GFP_KERNEL);
-        if (!kvm)
-                return ERR_PTR(-ENOMEM);
-        return kvm;
 }
-static void kvmppc_free_vcpus(struct kvm *kvm)
+void kvm_arch_destroy_vm(struct kvm *kvm)
 {
        unsigned int i;
        struct kvm_vcpu *vcpu;
@@ -129,24 +170,22 @@ void kvm_arch_sync_events(struct kvm *kvm)
 {
 }
-void kvm_arch_destroy_vm(struct kvm *kvm)
-{
-        kvmppc_free_vcpus(kvm);
-        kvm_free_physmem(kvm);
-        cleanup_srcu_struct(&kvm->srcu);
-        kfree(kvm);
-}
 int kvm_dev_ioctl_check_extension(long ext)
 {
        int r;
        switch (ext) {
+#ifdef CONFIG_BOOKE
+        case KVM_CAP_PPC_BOOKE_SREGS:
+#else
        case KVM_CAP_PPC_SEGSTATE:
+#endif
        case KVM_CAP_PPC_PAIRED_SINGLES:
        case KVM_CAP_PPC_UNSET_IRQ:
+        case KVM_CAP_PPC_IRQ_LEVEL:
        case KVM_CAP_ENABLE_CAP:
        case KVM_CAP_PPC_OSI:
+        case KVM_CAP_PPC_GET_PVINFO:
                r = 1;
                break;
        case KVM_CAP_COALESCED_MMIO:
@@ -249,6 +288,10 @@ int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
        tasklet_init(&vcpu->arch.tasklet, kvmppc_decrementer_func, (ulong)vcpu);
        vcpu->arch.dec_timer.function = kvmppc_decrementer_wakeup;
+#ifdef CONFIG_KVM_EXIT_TIMING
+        mutex_init(&vcpu->arch.exit_timing_lock);
+#endif
        return 0;
 }
@@ -259,12 +302,25 @@ void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
 {
+#ifdef CONFIG_BOOKE
+        /*
+         * vrsave (formerly usprg0) isn't used by Linux, but may
+         * be used by the guest.
+         *
+         * On non-booke this is associated with Altivec and
+         * is handled by code in book3s.c.
+         */
+        mtspr(SPRN_VRSAVE, vcpu->arch.vrsave);
+#endif
        kvmppc_core_vcpu_load(vcpu, cpu);
 }
 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
 {
        kvmppc_core_vcpu_put(vcpu);
+#ifdef CONFIG_BOOKE
+        vcpu->arch.vrsave = mfspr(SPRN_VRSAVE);
+#endif
 }
 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
@@ -534,16 +590,54 @@ out:
        return r;
 }
+static int kvm_vm_ioctl_get_pvinfo(struct kvm_ppc_pvinfo *pvinfo)
+{
+        u32 inst_lis = 0x3c000000;
+        u32 inst_ori = 0x60000000;
+        u32 inst_nop = 0x60000000;
+        u32 inst_sc = 0x44000002;
+        u32 inst_imm_mask = 0xffff;
+        /*
+         * The hypercall to get into KVM from within guest context is as
+         * follows:
+         *
+         *    lis r0, r0, KVM_SC_MAGIC_R0@h
+         *    ori r0, KVM_SC_MAGIC_R0@l
+         *    sc
+         *    nop
+         */
+        pvinfo->hcall[0] = inst_lis | ((KVM_SC_MAGIC_R0 >> 16) & inst_imm_mask);
+        pvinfo->hcall[1] = inst_ori | (KVM_SC_MAGIC_R0 & inst_imm_mask);
+        pvinfo->hcall[2] = inst_sc;
+        pvinfo->hcall[3] = inst_nop;
+        return 0;
+}
 long kvm_arch_vm_ioctl(struct file *filp,
                       unsigned int ioctl, unsigned long arg)
 {
+        void __user *argp = (void __user *)arg;
        long r;
        switch (ioctl) {
+        case KVM_PPC_GET_PVINFO: {
+                struct kvm_ppc_pvinfo pvinfo;
+                memset(&pvinfo, 0, sizeof(pvinfo));
+                r = kvm_vm_ioctl_get_pvinfo(&pvinfo);
+                if (copy_to_user(argp, &pvinfo, sizeof(pvinfo))) {
+                        r = -EFAULT;
+                        goto out;
+                }
+                break;
+        }
        default:
                r = -ENOTTY;
        }
+out:
        return r;
 }
diff --git a/arch/powerpc/kvm/timing.c b/arch/powerpc/kvm/timing.c
index 46fa04f12a9b..319177df9587 100644
--- a/arch/powerpc/kvm/timing.c
+++ b/arch/powerpc/kvm/timing.c
@@ -34,9 +34,8 @@ void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu)
 {
        int i;
-        /* pause guest execution to avoid concurrent updates */
+        /* Take a lock to avoid concurrent updates */
-        local_irq_disable();
+        mutex_lock(&vcpu->arch.exit_timing_lock);
-        mutex_lock(&vcpu->mutex);
        vcpu->arch.last_exit_type = 0xDEAD;
        for (i = 0; i < __NUMBER_OF_KVM_EXIT_TYPES; i++) {
@@ -50,8 +49,7 @@ void kvmppc_init_timing_stats(struct kvm_vcpu *vcpu)
        vcpu->arch.timing_exit.tv64 = 0;
        vcpu->arch.timing_last_enter.tv64 = 0;
-        mutex_unlock(&vcpu->mutex);
+        mutex_unlock(&vcpu->arch.exit_timing_lock);
-        local_irq_enable();
 }
 static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type)
@@ -67,6 +65,8 @@ static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type)
                return;
        }
+        mutex_lock(&vcpu->arch.exit_timing_lock);
        vcpu->arch.timing_count_type[type]++;
        /* sum */
@@ -95,6 +95,8 @@ static void add_exit_timing(struct kvm_vcpu *vcpu, u64 duration, int type)
                vcpu->arch.timing_min_duration[type] = duration;
        if (unlikely(duration > vcpu->arch.timing_max_duration[type]))
                vcpu->arch.timing_max_duration[type] = duration;
+        mutex_unlock(&vcpu->arch.exit_timing_lock);
 }
 void kvmppc_update_timing_stats(struct kvm_vcpu *vcpu)
@@ -149,17 +151,30 @@ static int kvmppc_exit_timing_show(struct seq_file *m, void *private)
 {
        struct kvm_vcpu *vcpu = m->private;
        int i;
+        u64 min, max, sum, sum_quad;
        seq_printf(m, "%s", "type       count   min     max     sum     sum_squared\n");
        for (i = 0; i < __NUMBER_OF_KVM_EXIT_TYPES; i++) {
+                min = vcpu->arch.timing_min_duration[i];
+                do_div(min, tb_ticks_per_usec);
+                max = vcpu->arch.timing_max_duration[i];
+                do_div(max, tb_ticks_per_usec);
+                sum = vcpu->arch.timing_sum_duration[i];
+                do_div(sum, tb_ticks_per_usec);
+                sum_quad = vcpu->arch.timing_sum_quad_duration[i];
+                do_div(sum_quad, tb_ticks_per_usec);
                seq_printf(m, "%12s     %10d    %10lld  %10lld  %20lld  %20lld\n",
                        kvm_exit_names[i],
                        vcpu->arch.timing_count_type[i],
-                        vcpu->arch.timing_min_duration[i],
+                        min,
-                        vcpu->arch.timing_max_duration[i],
+                        max,
-                        vcpu->arch.timing_sum_duration[i],
+                        sum,
-                        vcpu->arch.timing_sum_quad_duration[i]);
+                        sum_quad);
        }
        return 0;
 }
diff --git a/arch/powerpc/kvm/trace.h b/arch/powerpc/kvm/trace.h
index a8e840018052..3aca1b042b8c 100644
--- a/arch/powerpc/kvm/trace.h
+++ b/arch/powerpc/kvm/trace.h
@@ -98,6 +98,245 @@ TRACE_EVENT(kvm_gtlb_write,
                __entry->word1, __entry->word2)
 );
+/*************************************************************************
+ *                         Book3S trace points                           *
+ *************************************************************************/
+#ifdef CONFIG_PPC_BOOK3S
+TRACE_EVENT(kvm_book3s_exit,
+        TP_PROTO(unsigned int exit_nr, struct kvm_vcpu *vcpu),
+        TP_ARGS(exit_nr, vcpu),
+        TP_STRUCT__entry(
+                __field(        unsigned int,   exit_nr         )
+                __field(        unsigned long,  pc              )
+                __field(        unsigned long,  msr             )
+                __field(        unsigned long,  dar             )
+                __field(        unsigned long,  srr1            )
+        ),
+        TP_fast_assign(
+                __entry->exit_nr        = exit_nr;
+                __entry->pc             = kvmppc_get_pc(vcpu);
+                __entry->dar            = kvmppc_get_fault_dar(vcpu);
+                __entry->msr            = vcpu->arch.shared->msr;
+                __entry->srr1           = to_svcpu(vcpu)->shadow_srr1;
+        ),
+        TP_printk("exit=0x%x | pc=0x%lx | msr=0x%lx | dar=0x%lx | srr1=0x%lx",
+                  __entry->exit_nr, __entry->pc, __entry->msr, __entry->dar,
+                  __entry->srr1)
+);
+TRACE_EVENT(kvm_book3s_reenter,
+        TP_PROTO(int r, struct kvm_vcpu *vcpu),
+        TP_ARGS(r, vcpu),
+        TP_STRUCT__entry(
+                __field(        unsigned int,   r               )
+                __field(        unsigned long,  pc              )
+        ),
+        TP_fast_assign(
+                __entry->r              = r;
+                __entry->pc             = kvmppc_get_pc(vcpu);
+        ),
+        TP_printk("reentry r=%d | pc=0x%lx", __entry->r, __entry->pc)
+);
+#ifdef CONFIG_PPC_BOOK3S_64
+TRACE_EVENT(kvm_book3s_64_mmu_map,
+        TP_PROTO(int rflags, ulong hpteg, ulong va, pfn_t hpaddr,
+                 struct kvmppc_pte *orig_pte),
+        TP_ARGS(rflags, hpteg, va, hpaddr, orig_pte),
+        TP_STRUCT__entry(
+                __field(        unsigned char,          flag_w          )
+                __field(        unsigned char,          flag_x          )
+                __field(        unsigned long,          eaddr           )
+                __field(        unsigned long,          hpteg           )
+                __field(        unsigned long,          va              )
+                __field(        unsigned long long,     vpage           )
+                __field(        unsigned long,          hpaddr          )
+        ),
+        TP_fast_assign(
+                __entry->flag_w = ((rflags & HPTE_R_PP) == 3) ? '-' : 'w';
+                __entry->flag_x = (rflags & HPTE_R_N) ? '-' : 'x';
+                __entry->eaddr  = orig_pte->eaddr;
+                __entry->hpteg  = hpteg;
+                __entry->va     = va;
+                __entry->vpage  = orig_pte->vpage;
+                __entry->hpaddr = hpaddr;
+        ),
+        TP_printk("KVM: %c%c Map 0x%lx: [%lx] 0x%lx (0x%llx) -> %lx",
+                  __entry->flag_w, __entry->flag_x, __entry->eaddr,
+                  __entry->hpteg, __entry->va, __entry->vpage, __entry->hpaddr)
+);
+#endif /* CONFIG_PPC_BOOK3S_64 */
+TRACE_EVENT(kvm_book3s_mmu_map,
+        TP_PROTO(struct hpte_cache *pte),
+        TP_ARGS(pte),
+        TP_STRUCT__entry(
+                __field(        u64,            host_va         )
+                __field(        u64,            pfn             )
+                __field(        ulong,          eaddr           )
+                __field(        u64,            vpage           )
+                __field(        ulong,          raddr           )
+                __field(        int,            flags           )
+        ),
+        TP_fast_assign(
+                __entry->host_va        = pte->host_va;
+                __entry->pfn            = pte->pfn;
+                __entry->eaddr          = pte->pte.eaddr;
+                __entry->vpage          = pte->pte.vpage;
+                __entry->raddr          = pte->pte.raddr;
+                __entry->flags          = (pte->pte.may_read ? 0x4 : 0) |
+                                          (pte->pte.may_write ? 0x2 : 0) |
+                                          (pte->pte.may_execute ? 0x1 : 0);
+        ),
+        TP_printk("Map: hva=%llx pfn=%llx ea=%lx vp=%llx ra=%lx [%x]",
+                  __entry->host_va, __entry->pfn, __entry->eaddr,
+                  __entry->vpage, __entry->raddr, __entry->flags)
+);
+TRACE_EVENT(kvm_book3s_mmu_invalidate,
+        TP_PROTO(struct hpte_cache *pte),
+        TP_ARGS(pte),
+        TP_STRUCT__entry(
+                __field(        u64,            host_va         )
+                __field(        u64,            pfn             )
+                __field(        ulong,          eaddr           )
+                __field(        u64,            vpage           )
+                __field(        ulong,          raddr           )
+                __field(        int,            flags           )
+        ),
+        TP_fast_assign(
+                __entry->host_va        = pte->host_va;
+                __entry->pfn            = pte->pfn;
+                __entry->eaddr          = pte->pte.eaddr;
+                __entry->vpage          = pte->pte.vpage;
+                __entry->raddr          = pte->pte.raddr;
+                __entry->flags          = (pte->pte.may_read ? 0x4 : 0) |
+                                          (pte->pte.may_write ? 0x2 : 0) |
+                                          (pte->pte.may_execute ? 0x1 : 0);
+        ),
+        TP_printk("Flush: hva=%llx pfn=%llx ea=%lx vp=%llx ra=%lx [%x]",
+                  __entry->host_va, __entry->pfn, __entry->eaddr,
+                  __entry->vpage, __entry->raddr, __entry->flags)
+);
+TRACE_EVENT(kvm_book3s_mmu_flush,
+        TP_PROTO(const char *type, struct kvm_vcpu *vcpu, unsigned long long p1,
+                 unsigned long long p2),
+        TP_ARGS(type, vcpu, p1, p2),
+        TP_STRUCT__entry(
+                __field(        int,                    count           )
+                __field(        unsigned long long,     p1              )
+                __field(        unsigned long long,     p2              )
+                __field(        const char *,           type            )
+        ),
+        TP_fast_assign(
+                __entry->count          = vcpu->arch.hpte_cache_count;
+                __entry->p1             = p1;
+                __entry->p2             = p2;
+                __entry->type           = type;
+        ),
+        TP_printk("Flush %d %sPTEs: %llx - %llx",
+                  __entry->count, __entry->type, __entry->p1, __entry->p2)
+);
+TRACE_EVENT(kvm_book3s_slb_found,
+        TP_PROTO(unsigned long long gvsid, unsigned long long hvsid),
+        TP_ARGS(gvsid, hvsid),
+        TP_STRUCT__entry(
+                __field(        unsigned long long,     gvsid           )
+                __field(        unsigned long long,     hvsid           )
+        ),
+        TP_fast_assign(
+                __entry->gvsid          = gvsid;
+                __entry->hvsid          = hvsid;
+        ),
+        TP_printk("%llx -> %llx", __entry->gvsid, __entry->hvsid)
+);
+TRACE_EVENT(kvm_book3s_slb_fail,
+        TP_PROTO(u16 sid_map_mask, unsigned long long gvsid),
+        TP_ARGS(sid_map_mask, gvsid),
+        TP_STRUCT__entry(
+                __field(        unsigned short,         sid_map_mask    )
+                __field(        unsigned long long,     gvsid           )
+        ),
+        TP_fast_assign(
+                __entry->sid_map_mask   = sid_map_mask;
+                __entry->gvsid          = gvsid;
+        ),
+        TP_printk("%x/%x: %llx", __entry->sid_map_mask,
+                  SID_MAP_MASK - __entry->sid_map_mask, __entry->gvsid)
+);
+TRACE_EVENT(kvm_book3s_slb_map,
+        TP_PROTO(u16 sid_map_mask, unsigned long long gvsid,
+                 unsigned long long hvsid),
+        TP_ARGS(sid_map_mask, gvsid, hvsid),
+        TP_STRUCT__entry(
+                __field(        unsigned short,         sid_map_mask    )
+                __field(        unsigned long long,     guest_vsid      )
+                __field(        unsigned long long,     host_vsid       )
+        ),
+        TP_fast_assign(
+                __entry->sid_map_mask   = sid_map_mask;
+                __entry->guest_vsid     = gvsid;
+                __entry->host_vsid      = hvsid;
+        ),
+        TP_printk("%x: %llx -> %llx", __entry->sid_map_mask,
+                  __entry->guest_vsid, __entry->host_vsid)
+);
+TRACE_EVENT(kvm_book3s_slbmte,
+        TP_PROTO(u64 slb_vsid, u64 slb_esid),
+        TP_ARGS(slb_vsid, slb_esid),
+        TP_STRUCT__entry(
+                __field(        u64,    slb_vsid        )
+                __field(        u64,    slb_esid        )
+        ),
+        TP_fast_assign(
+                __entry->slb_vsid       = slb_vsid;
+                __entry->slb_esid       = slb_esid;
+        ),
+        TP_printk("%llx, %llx", __entry->slb_vsid, __entry->slb_esid)
+);
+#endif /* CONFIG_PPC_BOOK3S */
 #endif /* _TRACE_KVM_H */
 /* This part must be outside protection */
diff --git a/arch/powerpc/lib/Makefile b/arch/powerpc/lib/Makefile
index 5bb89c828070..166a6a0ad544 100644
--- a/arch/powerpc/lib/Makefile
+++ b/arch/powerpc/lib/Makefile
@@ -4,9 +4,7 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
-ifeq ($(CONFIG_PPC64),y)
+ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
-EXTRA_CFLAGS            += -mno-minimal-toc
-endif
 CFLAGS_REMOVE_code-patching.o = -pg
 CFLAGS_REMOVE_feature-fixups.o = -pg
@@ -17,7 +15,8 @@ obj-$(CONFIG_PPC32)	+= div64.o copy_32.o
 obj-$(CONFIG_HAS_IOMEM) += devres.o
 obj-$(CONFIG_PPC64)     += copypage_64.o copyuser_64.o \
-                           memcpy_64.o usercopy_64.o mem_64.o string.o
+                           memcpy_64.o usercopy_64.o mem_64.o string.o \
+                           checksum_wrappers_64.o hweight_64.o
 obj-$(CONFIG_XMON)      += sstep.o ldstfp.o
 obj-$(CONFIG_KPROBES)   += sstep.o ldstfp.o
 obj-$(CONFIG_HAVE_HW_BREAKPOINT)        += sstep.o ldstfp.o
diff --git a/arch/powerpc/lib/alloc.c b/arch/powerpc/lib/alloc.c
index f53e09c7dac7..13b676c20d12 100644
--- a/arch/powerpc/lib/alloc.c
+++ b/arch/powerpc/lib/alloc.c
@@ -6,14 +6,6 @@
 #include <asm/system.h>
-void * __init_refok alloc_maybe_bootmem(size_t size, gfp_t mask)
-{
-        if (mem_init_done)
-                return kmalloc(size, mask);
-        else
-                return alloc_bootmem(size);
-}
 void * __init_refok zalloc_maybe_bootmem(size_t size, gfp_t mask)
 {
        void *p;
diff --git a/arch/powerpc/lib/checksum_64.S b/arch/powerpc/lib/checksum_64.S
index ef96c6c58efc..18245af38aea 100644
--- a/arch/powerpc/lib/checksum_64.S
+++ b/arch/powerpc/lib/checksum_64.S
@@ -65,165 +65,393 @@ _GLOBAL(csum_tcpudp_magic)
        srwi    r3,r3,16
        blr
+#define STACKFRAMESIZE 256
+#define STK_REG(i)      (112 + ((i)-14)*8)
 /*
 * Computes the checksum of a memory block at buff, length len,
 * and adds in "sum" (32-bit).
 *
- * This code assumes at least halfword alignment, though the length
- * can be any number of bytes.  The sum is accumulated in r5.
- *
 * csum_partial(r3=buff, r4=len, r5=sum)
 */
 _GLOBAL(csum_partial)
-        subi    r3,r3,8         /* we'll offset by 8 for the loads */
+        addic   r0,r5,0                 /* clear carry */
-        srdi.   r6,r4,3         /* divide by 8 for doubleword count */
-        addic   r5,r5,0         /* clear carry */
+        srdi.   r6,r4,3                 /* less than 8 bytes? */
-        beq     3f              /* if we're doing < 8 bytes */
+        beq     .Lcsum_tail_word
-        andi.   r0,r3,2         /* aligned on a word boundary already? */
-        beq+    1f
+        /*
-        lhz     r6,8(r3)        /* do 2 bytes to get aligned */
+         * If only halfword aligned, align to a double word. Since odd
-        addi    r3,r3,2
+         * aligned addresses should be rare and they would require more
-        subi    r4,r4,2
+         * work to calculate the correct checksum, we ignore that case
-        addc    r5,r5,r6
+         * and take the potential slowdown of unaligned loads.
-        srdi.   r6,r4,3         /* recompute number of doublewords */
+         */
-        beq     3f              /* any left? */
+        rldicl. r6,r3,64-1,64-2         /* r6 = (r3 & 0x3) >> 1 */
-1:      mtctr   r6
+        beq     .Lcsum_aligned
-2:      ldu     r6,8(r3)        /* main sum loop */
-        adde    r5,r5,r6
+        li      r7,4
-        bdnz    2b
+        sub     r6,r7,r6
-        andi.   r4,r4,7         /* compute bytes left to sum after doublewords */
+        mtctr   r6
-3:      cmpwi   0,r4,4          /* is at least a full word left? */
-        blt     4f
+1:
-        lwz     r6,8(r3)        /* sum this word */
+        lhz     r6,0(r3)                /* align to doubleword */
+        subi    r4,r4,2
+        addi    r3,r3,2
+        adde    r0,r0,r6
+        bdnz    1b
+.Lcsum_aligned:
+        /*
+         * We unroll the loop such that each iteration is 64 bytes with an
+         * entry and exit limb of 64 bytes, meaning a minimum size of
+         * 128 bytes.
+         */
+        srdi.   r6,r4,7
+        beq     .Lcsum_tail_doublewords         /* len < 128 */
+        srdi    r6,r4,6
+        subi    r6,r6,1
+        mtctr   r6
+        stdu    r1,-STACKFRAMESIZE(r1)
+        std     r14,STK_REG(r14)(r1)
+        std     r15,STK_REG(r15)(r1)
+        std     r16,STK_REG(r16)(r1)
+        ld      r6,0(r3)
+        ld      r9,8(r3)
+        ld      r10,16(r3)
+        ld      r11,24(r3)
+        /*
+         * On POWER6 and POWER7 back to back addes take 2 cycles because of
+         * the XER dependency. This means the fastest this loop can go is
+         * 16 cycles per iteration. The scheduling of the loop below has
+         * been shown to hit this on both POWER6 and POWER7.
+         */
+        .align 5
+2:
+        adde    r0,r0,r6
+        ld      r12,32(r3)
+        ld      r14,40(r3)
+        adde    r0,r0,r9
+        ld      r15,48(r3)
+        ld      r16,56(r3)
+        addi    r3,r3,64
+        adde    r0,r0,r10
+        adde    r0,r0,r11
+        adde    r0,r0,r12
+        adde    r0,r0,r14
+        adde    r0,r0,r15
+        ld      r6,0(r3)
+        ld      r9,8(r3)
+        adde    r0,r0,r16
+        ld      r10,16(r3)
+        ld      r11,24(r3)
+        bdnz    2b
+        adde    r0,r0,r6
+        ld      r12,32(r3)
+        ld      r14,40(r3)
+        adde    r0,r0,r9
+        ld      r15,48(r3)
+        ld      r16,56(r3)
+        addi    r3,r3,64
+        adde    r0,r0,r10
+        adde    r0,r0,r11
+        adde    r0,r0,r12
+        adde    r0,r0,r14
+        adde    r0,r0,r15
+        adde    r0,r0,r16
+        ld      r14,STK_REG(r14)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r16,STK_REG(r16)(r1)
+        addi    r1,r1,STACKFRAMESIZE
+        andi.   r4,r4,63
+.Lcsum_tail_doublewords:                /* Up to 127 bytes to go */
+        srdi.   r6,r4,3
+        beq     .Lcsum_tail_word
+        mtctr   r6
+3:
+        ld      r6,0(r3)
+        addi    r3,r3,8
+        adde    r0,r0,r6
+        bdnz    3b
+        andi.   r4,r4,7
+.Lcsum_tail_word:                       /* Up to 7 bytes to go */
+        srdi.   r6,r4,2
+        beq     .Lcsum_tail_halfword
+        lwz     r6,0(r3)
        addi    r3,r3,4
+        adde    r0,r0,r6
        subi    r4,r4,4
-        adde    r5,r5,r6
-4:      cmpwi   0,r4,2          /* is at least a halfword left? */
+.Lcsum_tail_halfword:                   /* Up to 3 bytes to go */
-        blt+    5f
+        srdi.   r6,r4,1
-        lhz     r6,8(r3)        /* sum this halfword */
+        beq     .Lcsum_tail_byte
-        addi    r3,r3,2
-        subi    r4,r4,2
+        lhz     r6,0(r3)
-        adde    r5,r5,r6
+        addi    r3,r3,2
-5:      cmpwi   0,r4,1          /* is at least a byte left? */
+        adde    r0,r0,r6
-        bne+    6f
+        subi    r4,r4,2
-        lbz     r6,8(r3)        /* sum this byte */
-        slwi    r6,r6,8         /* this byte is assumed to be the upper byte of a halfword */
+.Lcsum_tail_byte:                       /* Up to 1 byte to go */
-        adde    r5,r5,r6
+        andi.   r6,r4,1
-6:      addze   r5,r5           /* add in final carry */
+        beq     .Lcsum_finish
-        rldicl  r4,r5,32,0      /* fold two 32-bit halves together */
-        add     r3,r4,r5
+        lbz     r6,0(r3)
-        srdi    r3,r3,32
+        sldi    r9,r6,8                 /* Pad the byte out to 16 bits */
-        blr
+        adde    r0,r0,r9
+.Lcsum_finish:
+        addze   r0,r0                   /* add in final carry */
+        rldicl  r4,r0,32,0              /* fold two 32 bit halves together */
+        add     r3,r4,r0
+        srdi    r3,r3,32
+        blr
+        .macro source
+100:
+        .section __ex_table,"a"
+        .align 3
+        .llong 100b,.Lsrc_error
+        .previous
+        .endm
+        .macro dest
+200:
+        .section __ex_table,"a"
+        .align 3
+        .llong 200b,.Ldest_error
+        .previous
+        .endm
 /*
 * Computes the checksum of a memory block at src, length len,
 * and adds in "sum" (32-bit), while copying the block to dst.
 * If an access exception occurs on src or dst, it stores -EFAULT
- * to *src_err or *dst_err respectively, and (for an error on
+ * to *src_err or *dst_err respectively. The caller must take any action
- * src) zeroes the rest of dst.
+ * required in this case (zeroing memory, recalculating partial checksum etc).
- *
- * This code needs to be reworked to take advantage of 64 bit sum+copy.
- * However, due to tokenring halfword alignment problems this will be very
- * tricky.  For now we'll leave it until we instrument it somehow.
 *
 * csum_partial_copy_generic(r3=src, r4=dst, r5=len, r6=sum, r7=src_err, r8=dst_err)
 */
 _GLOBAL(csum_partial_copy_generic)
-        addic   r0,r6,0
+        addic   r0,r6,0                 /* clear carry */
-        subi    r3,r3,4
-        subi    r4,r4,4
+        srdi.   r6,r5,3                 /* less than 8 bytes? */
-        srwi.   r6,r5,2
+        beq     .Lcopy_tail_word
-        beq     3f              /* if we're doing < 4 bytes */
-        andi.   r9,r4,2         /* Align dst to longword boundary */
+        /*
-        beq+    1f
+         * If only halfword aligned, align to a double word. Since odd
-81:     lhz     r6,4(r3)        /* do 2 bytes to get aligned */
+         * aligned addresses should be rare and they would require more
-        addi    r3,r3,2
+         * work to calculate the correct checksum, we ignore that case
+         * and take the potential slowdown of unaligned loads.
+         *
+         * If the source and destination are relatively unaligned we only
+         * align the source. This keeps things simple.
+         */
+        rldicl. r6,r3,64-1,64-2         /* r6 = (r3 & 0x3) >> 1 */
+        beq     .Lcopy_aligned
+        li      r7,4
+        sub     r6,r7,r6
+        mtctr   r6
+1:
+source; lhz     r6,0(r3)                /* align to doubleword */
        subi    r5,r5,2
-91:     sth     r6,4(r4)
-        addi    r4,r4,2
-        addc    r0,r0,r6
-        srwi.   r6,r5,2         /* # words to do */
-        beq     3f
-1:      mtctr   r6
-82:     lwzu    r6,4(r3)        /* the bdnz has zero overhead, so it should */
-92:     stwu    r6,4(r4)        /* be unnecessary to unroll this loop */
-        adde    r0,r0,r6
-        bdnz    82b
-        andi.   r5,r5,3
-3:      cmpwi   0,r5,2
-        blt+    4f
-83:     lhz     r6,4(r3)
        addi    r3,r3,2
-        subi    r5,r5,2
+        adde    r0,r0,r6
-93:     sth     r6,4(r4)
+dest;   sth     r6,0(r4)
        addi    r4,r4,2
+        bdnz    1b
+.Lcopy_aligned:
+        /*
+         * We unroll the loop such that each iteration is 64 bytes with an
+         * entry and exit limb of 64 bytes, meaning a minimum size of
+         * 128 bytes.
+         */
+        srdi.   r6,r5,7
+        beq     .Lcopy_tail_doublewords         /* len < 128 */
+        srdi    r6,r5,6
+        subi    r6,r6,1
+        mtctr   r6
+        stdu    r1,-STACKFRAMESIZE(r1)
+        std     r14,STK_REG(r14)(r1)
+        std     r15,STK_REG(r15)(r1)
+        std     r16,STK_REG(r16)(r1)
+source; ld      r6,0(r3)
+source; ld      r9,8(r3)
+source; ld      r10,16(r3)
+source; ld      r11,24(r3)
+        /*
+         * On POWER6 and POWER7 back to back addes take 2 cycles because of
+         * the XER dependency. This means the fastest this loop can go is
+         * 16 cycles per iteration. The scheduling of the loop below has
+         * been shown to hit this on both POWER6 and POWER7.
+         */
+        .align 5
+2:
        adde    r0,r0,r6
-4:      cmpwi   0,r5,1
+source; ld      r12,32(r3)
-        bne+    5f
+source; ld      r14,40(r3)
-84:     lbz     r6,4(r3)
-94:     stb     r6,4(r4)
+        adde    r0,r0,r9
-        slwi    r6,r6,8         /* Upper byte of word */
+source; ld      r15,48(r3)
+source; ld      r16,56(r3)
+        addi    r3,r3,64
+        adde    r0,r0,r10
+dest;   std     r6,0(r4)
+dest;   std     r9,8(r4)
+        adde    r0,r0,r11
+dest;   std     r10,16(r4)
+dest;   std     r11,24(r4)
+        adde    r0,r0,r12
+dest;   std     r12,32(r4)
+dest;   std     r14,40(r4)
+        adde    r0,r0,r14
+dest;   std     r15,48(r4)
+dest;   std     r16,56(r4)
+        addi    r4,r4,64
+        adde    r0,r0,r15
+source; ld      r6,0(r3)
+source; ld      r9,8(r3)
+        adde    r0,r0,r16
+source; ld      r10,16(r3)
+source; ld      r11,24(r3)
+        bdnz    2b
        adde    r0,r0,r6
-5:      addze   r3,r0           /* add in final carry (unlikely with 64-bit regs) */
+source; ld      r12,32(r3)
-        rldicl  r4,r3,32,0      /* fold 64 bit value */
+source; ld      r14,40(r3)
-        add     r3,r4,r3
-        srdi    r3,r3,32
-        blr
-/* These shouldn't go in the fixup section, since that would
+        adde    r0,r0,r9
-   cause the ex_table addresses to get out of order. */
+source; ld      r15,48(r3)
+source; ld      r16,56(r3)
+        addi    r3,r3,64
+        adde    r0,r0,r10
+dest;   std     r6,0(r4)
+dest;   std     r9,8(r4)
+        adde    r0,r0,r11
+dest;   std     r10,16(r4)
+dest;   std     r11,24(r4)
+        adde    r0,r0,r12
+dest;   std     r12,32(r4)
+dest;   std     r14,40(r4)
+        adde    r0,r0,r14
+dest;   std     r15,48(r4)
+dest;   std     r16,56(r4)
+        addi    r4,r4,64
+        adde    r0,r0,r15
+        adde    r0,r0,r16
+        ld      r14,STK_REG(r14)(r1)
+        ld      r15,STK_REG(r15)(r1)
+        ld      r16,STK_REG(r16)(r1)
+        addi    r1,r1,STACKFRAMESIZE
+        andi.   r5,r5,63
+.Lcopy_tail_doublewords:                /* Up to 127 bytes to go */
+        srdi.   r6,r5,3
+        beq     .Lcopy_tail_word
-        .globl src_error_1
-src_error_1:
-        li      r6,0
-        subi    r5,r5,2
-95:     sth     r6,4(r4)
-        addi    r4,r4,2
-        srwi.   r6,r5,2
-        beq     3f
        mtctr   r6
-        .globl src_error_2
+3:
-src_error_2:
+source; ld      r6,0(r3)
-        li      r6,0
+        addi    r3,r3,8
-96:     stwu    r6,4(r4)
+        adde    r0,r0,r6
-        bdnz    96b
+dest;   std     r6,0(r4)
-3:      andi.   r5,r5,3
+        addi    r4,r4,8
-        beq     src_error
+        bdnz    3b
-        .globl src_error_3
-src_error_3:
+        andi.   r5,r5,7
-        li      r6,0
-        mtctr   r5
+.Lcopy_tail_word:                       /* Up to 7 bytes to go */
-        addi    r4,r4,3
+        srdi.   r6,r5,2
-97:     stbu    r6,1(r4)
+        beq     .Lcopy_tail_halfword
-        bdnz    97b
-        .globl src_error
+source; lwz     r6,0(r3)
-src_error:
+        addi    r3,r3,4
+        adde    r0,r0,r6
+dest;   stw     r6,0(r4)
+        addi    r4,r4,4
+        subi    r5,r5,4
+.Lcopy_tail_halfword:                   /* Up to 3 bytes to go */
+        srdi.   r6,r5,1
+        beq     .Lcopy_tail_byte
+source; lhz     r6,0(r3)
+        addi    r3,r3,2
+        adde    r0,r0,r6
+dest;   sth     r6,0(r4)
+        addi    r4,r4,2
+        subi    r5,r5,2
+.Lcopy_tail_byte:                       /* Up to 1 byte to go */
+        andi.   r6,r5,1
+        beq     .Lcopy_finish
+source; lbz     r6,0(r3)
+        sldi    r9,r6,8                 /* Pad the byte out to 16 bits */
+        adde    r0,r0,r9
+dest;   stb     r6,0(r4)
+.Lcopy_finish:
+        addze   r0,r0                   /* add in final carry */
+        rldicl  r4,r0,32,0              /* fold two 32 bit halves together */
+        add     r3,r4,r0
+        srdi    r3,r3,32
+        blr
+.Lsrc_error:
        cmpdi   0,r7,0
-        beq     1f
+        beqlr
        li      r6,-EFAULT
        stw     r6,0(r7)
-1:      addze   r3,r0
        blr
-        .globl dst_error
+.Ldest_error:
-dst_error:
        cmpdi   0,r8,0
-        beq     1f
+        beqlr
        li      r6,-EFAULT
        stw     r6,0(r8)
-1:      addze   r3,r0
        blr
-.section __ex_table,"a"
-        .align  3
-        .llong  81b,src_error_1
-        .llong  91b,dst_error
-        .llong  82b,src_error_2
-        .llong  92b,dst_error
-        .llong  83b,src_error_3
-        .llong  93b,dst_error
-        .llong  84b,src_error_3
-        .llong  94b,dst_error
-        .llong  95b,dst_error
-        .llong  96b,dst_error
-        .llong  97b,dst_error
diff --git a/arch/powerpc/lib/checksum_wrappers_64.c b/arch/powerpc/lib/checksum_wrappers_64.c
new file mode 100644
index 000000000000..769b817fbb32
--- /dev/null
+++ b/arch/powerpc/lib/checksum_wrappers_64.c
@@ -0,0 +1,102 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2010
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <linux/module.h>
+#include <linux/compiler.h>
+#include <linux/types.h>
+#include <asm/checksum.h>
+#include <asm/uaccess.h>
+__wsum csum_and_copy_from_user(const void __user *src, void *dst,
+                               int len, __wsum sum, int *err_ptr)
+{
+        unsigned int csum;
+        might_sleep();
+        *err_ptr = 0;
+        if (!len) {
+                csum = 0;
+                goto out;
+        }
+        if (unlikely((len < 0) || !access_ok(VERIFY_READ, src, len))) {
+                *err_ptr = -EFAULT;
+                csum = (__force unsigned int)sum;
+                goto out;
+        }
+        csum = csum_partial_copy_generic((void __force *)src, dst,
+                                         len, sum, err_ptr, NULL);
+        if (unlikely(*err_ptr)) {
+                int missing = __copy_from_user(dst, src, len);
+                if (missing) {
+                        memset(dst + len - missing, 0, missing);
+                        *err_ptr = -EFAULT;
+                } else {
+                        *err_ptr = 0;
+                }
+                csum = csum_partial(dst, len, sum);
+        }
+out:
+        return (__force __wsum)csum;
+}
+EXPORT_SYMBOL(csum_and_copy_from_user);
+__wsum csum_and_copy_to_user(const void *src, void __user *dst, int len,
+                             __wsum sum, int *err_ptr)
+{
+        unsigned int csum;
+        might_sleep();
+        *err_ptr = 0;
+        if (!len) {
+                csum = 0;
+                goto out;
+        }
+        if (unlikely((len < 0) || !access_ok(VERIFY_WRITE, dst, len))) {
+                *err_ptr = -EFAULT;
+                csum = -1; /* invalid checksum */
+                goto out;
+        }
+        csum = csum_partial_copy_generic(src, (void __force *)dst,
+                                         len, sum, NULL, err_ptr);
+        if (unlikely(*err_ptr)) {
+                csum = csum_partial(src, len, sum);
+                if (copy_to_user(dst, src, len)) {
+                        *err_ptr = -EFAULT;
+                        csum = -1; /* invalid checksum */
+                }
+        }
+out:
+        return (__force __wsum)csum;
+}
+EXPORT_SYMBOL(csum_and_copy_to_user);
diff --git a/arch/powerpc/lib/copy_32.S b/arch/powerpc/lib/copy_32.S
index 74a7f4130b4c..55f19f9fd708 100644
--- a/arch/powerpc/lib/copy_32.S
+++ b/arch/powerpc/lib/copy_32.S
@@ -62,7 +62,7 @@
        .text
        .stabs  "arch/powerpc/lib/",N_SO,0,0,0f
-        .stabs  "copy32.S",N_SO,0,0,0f
+        .stabs  "copy_32.S",N_SO,0,0,0f
 0:
 CACHELINE_BYTES = L1_CACHE_BYTES
diff --git a/arch/powerpc/lib/copypage_64.S b/arch/powerpc/lib/copypage_64.S
index 4d4eeb900486..53dcb6b1b708 100644
--- a/arch/powerpc/lib/copypage_64.S
+++ b/arch/powerpc/lib/copypage_64.S
@@ -6,6 +6,7 @@
 * as published by the Free Software Foundation; either version
 * 2 of the License, or (at your option) any later version.
 */
+#include <asm/page.h>
 #include <asm/processor.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
@@ -15,9 +16,9 @@ PPC64_CACHES:
        .tc             ppc64_caches[TC],ppc64_caches
        .section        ".text"
+_GLOBAL(copy_page)
-_GLOBAL(copy_4K_page)
+        lis     r5,PAGE_SIZE@h
-        li      r5,4096         /* 4K page size */
+        ori     r5,r5,PAGE_SIZE@l
 BEGIN_FTR_SECTION
        ld      r10,PPC64_CACHES@toc(r2)
        lwz     r11,DCACHEL1LOGLINESIZE(r10)    /* log2 of cache line size */
diff --git a/arch/powerpc/lib/devres.c b/arch/powerpc/lib/devres.c
index deac4d30daf4..e91615abae66 100644
--- a/arch/powerpc/lib/devres.c
+++ b/arch/powerpc/lib/devres.c
@@ -9,11 +9,11 @@
 #include <linux/device.h>       /* devres_*(), devm_ioremap_release() */
 #include <linux/gfp.h>
-#include <linux/io.h>           /* ioremap_flags() */
+#include <linux/io.h>           /* ioremap_prot() */
 #include <linux/module.h>       /* EXPORT_SYMBOL() */
 /**
- * devm_ioremap_prot - Managed ioremap_flags()
+ * devm_ioremap_prot - Managed ioremap_prot()
 * @dev: Generic device to remap IO address for
 * @offset: BUS offset to map
 * @size: Size of map
@@ -31,7 +31,7 @@ void __iomem *devm_ioremap_prot(struct device *dev, resource_size_t offset,
        if (!ptr)
                return NULL;
-        addr = ioremap_flags(offset, size, flags);
+        addr = ioremap_prot(offset, size, flags);
        if (addr) {
                *ptr = addr;
                devres_add(dev, ptr);
diff --git a/arch/powerpc/lib/feature-fixups-test.S b/arch/powerpc/lib/feature-fixups-test.S
index cb737484c5aa..f4613118132e 100644
--- a/arch/powerpc/lib/feature-fixups-test.S
+++ b/arch/powerpc/lib/feature-fixups-test.S
@@ -172,6 +172,25 @@ globl(ftr_fixup_test6_expected)
 3:      or      3,3,3
+#if 0
+/* Test that if we have a larger else case the assembler spots it and
+ * reports an error. #if 0'ed so as not to break the build normally.
+ */
+ftr_fixup_test7:
+        or      1,1,1
+BEGIN_FTR_SECTION
+        or      2,2,2
+        or      2,2,2
+        or      2,2,2
+FTR_SECTION_ELSE
+        or      3,3,3
+        or      3,3,3
+        or      3,3,3
+        or      3,3,3
+ALT_FTR_SECTION_END(0, 1)
+        or      1,1,1
+#endif
 #define MAKE_MACRO_TEST(TYPE)                                           \
 globl(ftr_fixup_test_ ##TYPE##_macros)                                  \
        or      1,1,1;                                                  \
diff --git a/arch/powerpc/lib/hweight_64.S b/arch/powerpc/lib/hweight_64.S
new file mode 100644
index 000000000000..fda27868cf8c
--- /dev/null
+++ b/arch/powerpc/lib/hweight_64.S
@@ -0,0 +1,110 @@
+/*
+ * This program is free software; you can redistribute it and/or modify
+ * it under the terms of the GNU General Public License as published by
+ * the Free Software Foundation; either version 2 of the License, or
+ * (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA.
+ *
+ * Copyright (C) IBM Corporation, 2010
+ *
+ * Author: Anton Blanchard <anton@au.ibm.com>
+ */
+#include <asm/processor.h>
+#include <asm/ppc_asm.h>
+/* Note: This code relies on -mminimal-toc */
+_GLOBAL(__arch_hweight8)
+BEGIN_FTR_SECTION
+        b .__sw_hweight8
+        nop
+        nop
+FTR_SECTION_ELSE
+        PPC_POPCNTB(r3,r3)
+        clrldi  r3,r3,64-8
+        blr
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
+_GLOBAL(__arch_hweight16)
+BEGIN_FTR_SECTION
+        b .__sw_hweight16
+        nop
+        nop
+        nop
+        nop
+FTR_SECTION_ELSE
+  BEGIN_FTR_SECTION_NESTED(50)
+        PPC_POPCNTB(r3,r3)
+        srdi    r4,r3,8
+        add     r3,r4,r3
+        clrldi  r3,r3,64-8
+        blr
+  FTR_SECTION_ELSE_NESTED(50)
+        clrlwi  r3,r3,16
+        PPC_POPCNTW(r3,r3)
+        clrldi  r3,r3,64-8
+        blr
+  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 50)
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
+_GLOBAL(__arch_hweight32)
+BEGIN_FTR_SECTION
+        b .__sw_hweight32
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+FTR_SECTION_ELSE
+  BEGIN_FTR_SECTION_NESTED(51)
+        PPC_POPCNTB(r3,r3)
+        srdi    r4,r3,16
+        add     r3,r4,r3
+        srdi    r4,r3,8
+        add     r3,r4,r3
+        clrldi  r3,r3,64-8
+        blr
+  FTR_SECTION_ELSE_NESTED(51)
+        PPC_POPCNTW(r3,r3)
+        clrldi  r3,r3,64-8
+        blr
+  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 51)
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
+_GLOBAL(__arch_hweight64)
+BEGIN_FTR_SECTION
+        b .__sw_hweight64
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+FTR_SECTION_ELSE
+  BEGIN_FTR_SECTION_NESTED(52)
+        PPC_POPCNTB(r3,r3)
+        srdi    r4,r3,32
+        add     r3,r4,r3
+        srdi    r4,r3,16
+        add     r3,r4,r3
+        srdi    r4,r3,8
+        add     r3,r4,r3
+        clrldi  r3,r3,64-8
+        blr
+  FTR_SECTION_ELSE_NESTED(52)
+        PPC_POPCNTD(r3,r3)
+        clrldi  r3,r3,64-8
+        blr
+  ALT_FTR_SECTION_END_NESTED_IFCLR(CPU_FTR_POPCNTD, 52)
+ALT_FTR_SECTION_END_IFCLR(CPU_FTR_POPCNTB)
diff --git a/arch/powerpc/lib/ldstfp.S b/arch/powerpc/lib/ldstfp.S
index f6448636baf5..6a85380520b6 100644
--- a/arch/powerpc/lib/ldstfp.S
+++ b/arch/powerpc/lib/ldstfp.S
@@ -17,6 +17,8 @@
 #include <asm/asm-offsets.h>
 #include <linux/errno.h>
+#ifdef CONFIG_PPC_FPU
 #define STKFRM  (PPC_MIN_STKFRM + 16)
        .macro  extab   instr,handler
@@ -81,7 +83,7 @@ _GLOBAL(do_lfs)
        mfmsr   r6
        ori     r7,r6,MSR_FP
        cmpwi   cr7,r3,0
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stfd    fr0,STKFRM-16(r1)
@@ -93,7 +95,7 @@ _GLOBAL(do_lfs)
        lfd     fr0,STKFRM-16(r1)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -108,7 +110,7 @@ _GLOBAL(do_lfd)
        mfmsr   r6
        ori     r7,r6,MSR_FP
        cmpwi   cr7,r3,0
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stfd    fr0,STKFRM-16(r1)
@@ -120,7 +122,7 @@ _GLOBAL(do_lfd)
        lfd     fr0,STKFRM-16(r1)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -135,7 +137,7 @@ _GLOBAL(do_stfs)
        mfmsr   r6
        ori     r7,r6,MSR_FP
        cmpwi   cr7,r3,0
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stfd    fr0,STKFRM-16(r1)
@@ -147,7 +149,7 @@ _GLOBAL(do_stfs)
        lfd     fr0,STKFRM-16(r1)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -162,7 +164,7 @@ _GLOBAL(do_stfd)
        mfmsr   r6
        ori     r7,r6,MSR_FP
        cmpwi   cr7,r3,0
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stfd    fr0,STKFRM-16(r1)
@@ -174,7 +176,7 @@ _GLOBAL(do_stfd)
        lfd     fr0,STKFRM-16(r1)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -229,7 +231,7 @@ _GLOBAL(do_lvx)
        oris    r7,r6,MSR_VEC@h
        cmpwi   cr7,r3,0
        li      r8,STKFRM-16
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stvx    vr0,r1,r8
@@ -241,7 +243,7 @@ _GLOBAL(do_lvx)
        lvx     vr0,r1,r8
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -257,7 +259,7 @@ _GLOBAL(do_stvx)
        oris    r7,r6,MSR_VEC@h
        cmpwi   cr7,r3,0
        li      r8,STKFRM-16
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        stvx    vr0,r1,r8
@@ -269,7 +271,7 @@ _GLOBAL(do_stvx)
        lvx     vr0,r1,r8
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -325,7 +327,7 @@ _GLOBAL(do_lxvd2x)
        oris    r7,r6,MSR_VSX@h
        cmpwi   cr7,r3,0
        li      r8,STKFRM-16
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        STXVD2X(0,r1,r8)
@@ -337,7 +339,7 @@ _GLOBAL(do_lxvd2x)
        LXVD2X(0,r1,r8)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -353,7 +355,7 @@ _GLOBAL(do_stxvd2x)
        oris    r7,r6,MSR_VSX@h
        cmpwi   cr7,r3,0
        li      r8,STKFRM-16
-        mtmsrd  r7
+        MTMSRD(r7)
        isync
        beq     cr7,1f
        STXVD2X(0,r1,r8)
@@ -365,7 +367,7 @@ _GLOBAL(do_stxvd2x)
        LXVD2X(0,r1,r8)
 4:      PPC_LL  r0,STKFRM+PPC_LR_STKOFF(r1)
        mtlr    r0
-        mtmsrd  r6
+        MTMSRD(r6)
        isync
        mr      r3,r9
        addi    r1,r1,STKFRM
@@ -373,3 +375,5 @@ _GLOBAL(do_stxvd2x)
        extab   2b,3b
 #endif /* CONFIG_VSX */
+#endif  /* CONFIG_PPC_FPU */
diff --git a/arch/powerpc/lib/locks.c b/arch/powerpc/lib/locks.c
index 58e14fba11b1..9b8182e82166 100644
--- a/arch/powerpc/lib/locks.c
+++ b/arch/powerpc/lib/locks.c
@@ -34,7 +34,7 @@ void __spin_yield(arch_spinlock_t *lock)
                return;
        holder_cpu = lock_value & 0xffff;
        BUG_ON(holder_cpu >= NR_CPUS);
-        yield_count = lppaca[holder_cpu].yield_count;
+        yield_count = lppaca_of(holder_cpu).yield_count;
        if ((yield_count & 1) == 0)
                return;         /* virtual cpu is currently running */
        rmb();
@@ -65,7 +65,7 @@ void __rw_yield(arch_rwlock_t *rw)
                return;         /* no write lock at present */
        holder_cpu = lock_value & 0xffff;
        BUG_ON(holder_cpu >= NR_CPUS);
-        yield_count = lppaca[holder_cpu].yield_count;
+        yield_count = lppaca_of(holder_cpu).yield_count;
        if ((yield_count & 1) == 0)
                return;         /* virtual cpu is currently running */
        rmb();
diff --git a/arch/powerpc/lib/sstep.c b/arch/powerpc/lib/sstep.c
index e0a9858d537e..9a52349874ee 100644
--- a/arch/powerpc/lib/sstep.c
+++ b/arch/powerpc/lib/sstep.c
@@ -11,6 +11,7 @@
 #include <linux/kernel.h>
 #include <linux/kprobes.h>
 #include <linux/ptrace.h>
+#include <linux/prefetch.h>
 #include <asm/sstep.h>
 #include <asm/processor.h>
 #include <asm/uaccess.h>
@@ -30,6 +31,7 @@ extern char system_call_common[];
 #define XER_OV          0x40000000U
 #define XER_CA          0x20000000U
+#ifdef CONFIG_PPC_FPU
 /*
 * Functions in ldstfp.S
 */
@@ -41,6 +43,19 @@ extern int do_lvx(int rn, unsigned long ea);
 extern int do_stvx(int rn, unsigned long ea);
 extern int do_lxvd2x(int rn, unsigned long ea);
 extern int do_stxvd2x(int rn, unsigned long ea);
+#endif
+/*
+ * Emulate the truncation of 64 bit values in 32-bit mode.
+ */
+static unsigned long truncate_if_32bit(unsigned long msr, unsigned long val)
+{
+#ifdef __powerpc64__
+        if ((msr & MSR_64BIT) == 0)
+                val &= 0xffffffffUL;
+#endif
+        return val;
+}
 /*
 * Determine whether a conditional branch instruction would branch.
@@ -88,11 +103,8 @@ static unsigned long __kprobes dform_ea(unsigned int instr, struct pt_regs *regs
                if (instr & 0x04000000)         /* update forms */
                        regs->gpr[ra] = ea;
        }
-#ifdef __powerpc64__
-        if (!(regs->msr & MSR_SF))
+        return truncate_if_32bit(regs->msr, ea);
-                ea &= 0xffffffffUL;
-#endif
-        return ea;
 }
 #ifdef __powerpc64__
@@ -111,9 +123,8 @@ static unsigned long __kprobes dsform_ea(unsigned int instr, struct pt_regs *reg
                if ((instr & 3) == 1)           /* update forms */
                        regs->gpr[ra] = ea;
        }
-        if (!(regs->msr & MSR_SF))
-                ea &= 0xffffffffUL;
+        return truncate_if_32bit(regs->msr, ea);
-        return ea;
 }
 #endif /* __powerpc64 */
@@ -134,11 +145,8 @@ static unsigned long __kprobes xform_ea(unsigned int instr, struct pt_regs *regs
                if (do_update)          /* update forms */
                        regs->gpr[ra] = ea;
        }
-#ifdef __powerpc64__
-        if (!(regs->msr & MSR_SF))
+        return truncate_if_32bit(regs->msr, ea);
-                ea &= 0xffffffffUL;
-#endif
-        return ea;
 }
 /*
@@ -290,6 +298,7 @@ static int __kprobes write_mem(unsigned long val, unsigned long ea, int nb,
        return write_mem_unaligned(val, ea, nb, regs);
 }
+#ifdef CONFIG_PPC_FPU
 /*
 * Check the address and alignment, and call func to do the actual
 * load or store.
@@ -351,6 +360,7 @@ static int __kprobes do_fp_store(int rn, int (*func)(int, unsigned long),
        }
        return err;
 }
+#endif
 #ifdef CONFIG_ALTIVEC
 /* For Altivec/VMX, no need to worry about alignment */
@@ -462,7 +472,7 @@ static void __kprobes set_cr0(struct pt_regs *regs, int rd)
        regs->ccr = (regs->ccr & 0x0fffffff) | ((regs->xer >> 3) & 0x10000000);
 #ifdef __powerpc64__
-        if (!(regs->msr & MSR_SF))
+        if (!(regs->msr & MSR_64BIT))
                val = (int) val;
 #endif
        if (val < 0)
@@ -483,7 +493,7 @@ static void __kprobes add_with_carry(struct pt_regs *regs, int rd,
                ++val;
        regs->gpr[rd] = val;
 #ifdef __powerpc64__
-        if (!(regs->msr & MSR_SF)) {
+        if (!(regs->msr & MSR_64BIT)) {
                val = (unsigned int) val;
                val1 = (unsigned int) val1;
        }
@@ -566,8 +576,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                if ((instr & 2) == 0)
                        imm += regs->nip;
                regs->nip += 4;
-                if ((regs->msr & MSR_SF) == 0)
+                regs->nip = truncate_if_32bit(regs->msr, regs->nip);
-                        regs->nip &= 0xffffffffUL;
                if (instr & 1)
                        regs->link = regs->nip;
                if (branch_taken(instr, regs))
@@ -600,13 +609,9 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                        imm -= 0x04000000;
                if ((instr & 2) == 0)
                        imm += regs->nip;
-                if (instr & 1) {
+                if (instr & 1)
-                        regs->link = regs->nip + 4;
+                        regs->link = truncate_if_32bit(regs->msr, regs->nip + 4);
-                        if ((regs->msr & MSR_SF) == 0)
+                imm = truncate_if_32bit(regs->msr, imm);
-                                regs->link &= 0xffffffffUL;
-                }
-                if ((regs->msr & MSR_SF) == 0)
-                        imm &= 0xffffffffUL;
                regs->nip = imm;
                return 1;
        case 19:
@@ -614,11 +619,8 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                case 16:        /* bclr */
                case 528:       /* bcctr */
                        imm = (instr & 0x400)? regs->ctr: regs->link;
-                        regs->nip += 4;
+                        regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
-                        if ((regs->msr & MSR_SF) == 0) {
+                        imm = truncate_if_32bit(regs->msr, imm);
-                                regs->nip &= 0xffffffffUL;
-                                imm &= 0xffffffffUL;
-                        }
                        if (instr & 1)
                                regs->link = regs->nip;
                        if (branch_taken(instr, regs))
@@ -1393,6 +1395,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                                regs->gpr[rd] = byterev_4(val);
                        goto ldst_done;
+#ifdef CONFIG_PPC_CPU
                case 535:       /* lfsx */
                case 567:       /* lfsux */
                        if (!(regs->msr & MSR_FP))
@@ -1424,6 +1427,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                        ea = xform_ea(instr, regs, u);
                        err = do_fp_store(rd, do_stfd, ea, 8, regs);
                        goto ldst_done;
+#endif
 #ifdef __powerpc64__
                case 660:       /* stdbrx */
@@ -1534,6 +1538,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                } while (++rd < 32);
                goto instr_done;
+#ifdef CONFIG_PPC_FPU
        case 48:        /* lfs */
        case 49:        /* lfsu */
                if (!(regs->msr & MSR_FP))
@@ -1565,6 +1570,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                ea = dform_ea(instr, regs);
                err = do_fp_store(rd, do_stfd, ea, 8, regs);
                goto ldst_done;
+#endif
 #ifdef __powerpc64__
        case 58:        /* ld[u], lwa */
@@ -1608,11 +1614,7 @@ int __kprobes emulate_step(struct pt_regs *regs, unsigned int instr)
                return 0;       /* invoke DSI if -EFAULT? */
        }
 instr_done:
-        regs->nip += 4;
+        regs->nip = truncate_if_32bit(regs->msr, regs->nip + 4);
-#ifdef __powerpc64__
-        if ((regs->msr & MSR_SF) == 0)
-                regs->nip &= 0xffffffffUL;
-#endif
        return 1;
 logical_done:
diff --git a/arch/powerpc/math-emu/Makefile b/arch/powerpc/math-emu/Makefile
index 0c16ab947f1f..7d1dba0d57f9 100644
--- a/arch/powerpc/math-emu/Makefile
+++ b/arch/powerpc/math-emu/Makefile
@@ -15,4 +15,4 @@ obj-$(CONFIG_SPE)		+= math_efp.o
 CFLAGS_fabs.o = -fno-builtin-fabs
 CFLAGS_math.o = -fno-builtin-fabs
-EXTRA_CFLAGS = -I. -Iinclude/math-emu -w
+ccflags-y = -I. -Iinclude/math-emu -w
diff --git a/arch/powerpc/math-emu/math_efp.c b/arch/powerpc/math-emu/math_efp.c
index 41f4ef30e480..62279200d965 100644
--- a/arch/powerpc/math-emu/math_efp.c
+++ b/arch/powerpc/math-emu/math_efp.c
@@ -1,7 +1,7 @@
 /*
 * arch/powerpc/math-emu/math_efp.c
 *
- * Copyright (C) 2006-2008 Freescale Semiconductor, Inc. All rights reserved.
+ * Copyright (C) 2006-2008, 2010 Freescale Semiconductor, Inc.
 *
 * Author: Ebony Zhu,   <ebony.zhu@freescale.com>
 *         Yu Liu,      <yu.liu@freescale.com>
@@ -104,6 +104,8 @@
 #define FP_EX_MASK      (FP_EX_INEXACT | FP_EX_INVALID | FP_EX_DIVZERO | \
                        FP_EX_UNDERFLOW | FP_EX_OVERFLOW)
+static int have_e500_cpu_a005_erratum;
 union dw_union {
        u64 dp[1];
        u32 wp[2];
@@ -320,7 +322,8 @@ int do_spe_mathemu(struct pt_regs *regs)
                        } else {
                                _FP_ROUND_ZERO(1, SB);
                        }
-                        FP_TO_INT_S(vc.wp[1], SB, 32, ((func & 0x3) != 0));
+                        FP_TO_INT_S(vc.wp[1], SB, 32,
+                                        (((func & 0x3) != 0) || SB_s));
                        goto update_regs;
                default:
@@ -458,7 +461,8 @@ cmp_s:
                        } else {
                                _FP_ROUND_ZERO(2, DB);
                        }
-                        FP_TO_INT_D(vc.wp[1], DB, 32, ((func & 0x3) != 0));
+                        FP_TO_INT_D(vc.wp[1], DB, 32,
+                                        (((func & 0x3) != 0) || DB_s));
                        goto update_regs;
                default:
@@ -589,8 +593,10 @@ cmp_d:
                                _FP_ROUND_ZERO(1, SB0);
                                _FP_ROUND_ZERO(1, SB1);
                        }
-                        FP_TO_INT_S(vc.wp[0], SB0, 32, ((func & 0x3) != 0));
+                        FP_TO_INT_S(vc.wp[0], SB0, 32,
-                        FP_TO_INT_S(vc.wp[1], SB1, 32, ((func & 0x3) != 0));
+                                        (((func & 0x3) != 0) || SB0_s));
+                        FP_TO_INT_S(vc.wp[1], SB1, 32,
+                                        (((func & 0x3) != 0) || SB1_s));
                        goto update_regs;
                default:
@@ -652,6 +658,15 @@ update_regs:
        return 0;
 illegal:
+        if (have_e500_cpu_a005_erratum) {
+                /* according to e500 cpu a005 erratum, reissue efp inst */
+                regs->nip -= 4;
+#ifdef DEBUG
+                printk(KERN_DEBUG "re-issue efp inst: %08lx\n", speinsn);
+#endif
+                return 0;
+        }
        printk(KERN_ERR "\nOoops! IEEE-754 compliance handler encountered un-supported instruction.\ninst code: %08lx\n", speinsn);
        return -ENOSYS;
 }
@@ -718,3 +733,43 @@ int speround_handler(struct pt_regs *regs)
        return 0;
 }
+int __init spe_mathemu_init(void)
+{
+        u32 pvr, maj, min;
+        pvr = mfspr(SPRN_PVR);
+        if ((PVR_VER(pvr) == PVR_VER_E500V1) ||
+            (PVR_VER(pvr) == PVR_VER_E500V2)) {
+                maj = PVR_MAJ(pvr);
+                min = PVR_MIN(pvr);
+                /*
+                 * E500 revision below 1.1, 2.3, 3.1, 4.1, 5.1
+                 * need cpu a005 errata workaround
+                 */
+                switch (maj) {
+                case 1:
+                        if (min < 1)
+                                have_e500_cpu_a005_erratum = 1;
+                        break;
+                case 2:
+                        if (min < 3)
+                                have_e500_cpu_a005_erratum = 1;
+                        break;
+                case 3:
+                case 4:
+                case 5:
+                        if (min < 1)
+                                have_e500_cpu_a005_erratum = 1;
+                        break;
+                default:
+                        break;
+                }
+        }
+        return 0;
+}
+module_init(spe_mathemu_init);
diff --git a/arch/powerpc/mm/40x_mmu.c b/arch/powerpc/mm/40x_mmu.c
index 1dc2fa5ce1bd..5810967511d4 100644
--- a/arch/powerpc/mm/40x_mmu.c
+++ b/arch/powerpc/mm/40x_mmu.c
@@ -35,6 +35,7 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/highmem.h>
+#include <linux/memblock.h>
 #include <asm/pgalloc.h>
 #include <asm/prom.h>
@@ -47,6 +48,7 @@
 #include <asm/bootx.h>
 #include <asm/machdep.h>
 #include <asm/setup.h>
 #include "mmu_decl.h"
 extern int __map_without_ltlbs;
@@ -139,8 +141,19 @@ unsigned long __init mmu_mapin_ram(unsigned long top)
         * coverage with normal-sized pages (or other reasons) do not
         * attempt to allocate outside the allowed range.
         */
+        memblock_set_current_limit(mapped);
-        __initial_memory_limit_addr = memstart_addr + mapped;
        return mapped;
 }
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* We don't currently support the first MEMBLOCK not mapping 0
+         * physical on those processors
+         */
+        BUG_ON(first_memblock_base != 0);
+        /* 40x can only access 16MB at the moment (see head_40x.S) */
+        memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000));
+}
diff --git a/arch/powerpc/mm/44x_mmu.c b/arch/powerpc/mm/44x_mmu.c
index d8c6efb32bc6..024acab588fd 100644
--- a/arch/powerpc/mm/44x_mmu.c
+++ b/arch/powerpc/mm/44x_mmu.c
@@ -24,6 +24,8 @@
 */
 #include <linux/init.h>
+#include <linux/memblock.h>
 #include <asm/mmu.h>
 #include <asm/system.h>
 #include <asm/page.h>
@@ -213,6 +215,18 @@ unsigned long __init mmu_mapin_ram(unsigned long top)
        return total_lowmem;
 }
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* We don't currently support the first MEMBLOCK not mapping 0
+         * physical on those processors
+         */
+        BUG_ON(first_memblock_base != 0);
+        /* 44x has a 256M TLB entry pinned at boot */
+        memblock_set_current_limit(min_t(u64, first_memblock_size, PPC_PIN_SIZE));
+}
 #ifdef CONFIG_SMP
 void __cpuinit mmu_init_secondary(int cpu)
 {
diff --git a/arch/powerpc/mm/Makefile b/arch/powerpc/mm/Makefile
index ce68708bbad5..bdca46e08382 100644
--- a/arch/powerpc/mm/Makefile
+++ b/arch/powerpc/mm/Makefile
@@ -4,9 +4,7 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
-ifeq ($(CONFIG_PPC64),y)
+ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
-EXTRA_CFLAGS    += -mno-minimal-toc
-endif
 obj-y                           := fault.o mem.o pgtable.o gup.o \
                                   init_$(CONFIG_WORD_SIZE).o \
@@ -25,7 +23,7 @@ obj-$(CONFIG_PPC_STD_MMU)	+= hash_low_$(CONFIG_WORD_SIZE).o \
                                   mmu_context_hash$(CONFIG_WORD_SIZE).o
 obj-$(CONFIG_40x)               += 40x_mmu.o
 obj-$(CONFIG_44x)               += 44x_mmu.o
-obj-$(CONFIG_FSL_BOOKE)         += fsl_booke_mmu.o
+obj-$(CONFIG_PPC_FSL_BOOK3E)    += fsl_booke_mmu.o
 obj-$(CONFIG_NEED_MULTIPLE_NODES) += numa.o
 obj-$(CONFIG_PPC_MM_SLICES)     += slice.o
 ifeq ($(CONFIG_HUGETLB_PAGE),y)
diff --git a/arch/powerpc/mm/dma-noncoherent.c b/arch/powerpc/mm/dma-noncoherent.c
index 757c0bed9a91..b42f76c4948d 100644
--- a/arch/powerpc/mm/dma-noncoherent.c
+++ b/arch/powerpc/mm/dma-noncoherent.c
@@ -399,3 +399,23 @@ void __dma_sync_page(struct page *page, unsigned long offset,
 #endif
 }
 EXPORT_SYMBOL(__dma_sync_page);
+/*
+ * Return the PFN for a given cpu virtual address returned by
+ * __dma_alloc_coherent. This is used by dma_mmap_coherent()
+ */
+unsigned long __dma_get_coherent_pfn(unsigned long cpu_addr)
+{
+        /* This should always be populated, so we don't test every
+         * level. If that fails, we'll have a nice crash which
+         * will be as good as a BUG_ON()
+         */
+        pgd_t *pgd = pgd_offset_k(cpu_addr);
+        pud_t *pud = pud_offset(pgd, cpu_addr);
+        pmd_t *pmd = pmd_offset(pud, cpu_addr);
+        pte_t *ptep = pte_offset_kernel(pmd, cpu_addr);
+        if (pte_none(*ptep) || !pte_present(*ptep))
+                return 0;
+        return pte_pfn(*ptep);
+}
diff --git a/arch/powerpc/mm/fault.c b/arch/powerpc/mm/fault.c
index 1bd712c33ce2..ad35f66c69e8 100644
--- a/arch/powerpc/mm/fault.c
+++ b/arch/powerpc/mm/fault.c
@@ -30,6 +30,8 @@
 #include <linux/kprobes.h>
 #include <linux/kdebug.h>
 #include <linux/perf_event.h>
+#include <linux/magic.h>
+#include <linux/ratelimit.h>
 #include <asm/firmware.h>
 #include <asm/page.h>
@@ -345,11 +347,10 @@ bad_area_nosemaphore:
                return 0;
        }
-        if (is_exec && (error_code & DSISR_PROTFAULT)
+        if (is_exec && (error_code & DSISR_PROTFAULT))
-            && printk_ratelimit())
+                printk_ratelimited(KERN_CRIT "kernel tried to execute NX-protected"
-                printk(KERN_CRIT "kernel tried to execute NX-protected"
+                                   " page (%lx) - exploit attempt? (uid: %d)\n",
-                       " page (%lx) - exploit attempt? (uid: %d)\n",
+                                   address, current_uid());
-                       address, current_uid());
        return SIGSEGV;
@@ -385,6 +386,7 @@ do_sigbus:
 void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
 {
        const struct exception_table_entry *entry;
+        unsigned long *stackend;
        /* Are we prepared to handle this fault?  */
        if ((entry = search_exception_tables(regs->nip)) != NULL) {
@@ -413,5 +415,9 @@ void bad_page_fault(struct pt_regs *regs, unsigned long address, int sig)
        printk(KERN_ALERT "Faulting instruction address: 0x%08lx\n",
                regs->nip);
+        stackend = end_of_stack(current);
+        if (current != &init_task && *stackend != STACK_END_MAGIC)
+                printk(KERN_ALERT "Thread overran stack, or stack corrupted\n");
        die("Kernel access of bad area", regs, sig);
 }
diff --git a/arch/powerpc/mm/fsl_booke_mmu.c b/arch/powerpc/mm/fsl_booke_mmu.c
index 4b66a1ece6d8..f7802c8bba0a 100644
--- a/arch/powerpc/mm/fsl_booke_mmu.c
+++ b/arch/powerpc/mm/fsl_booke_mmu.c
@@ -40,6 +40,7 @@
 #include <linux/init.h>
 #include <linux/delay.h>
 #include <linux/highmem.h>
+#include <linux/memblock.h>
 #include <asm/pgalloc.h>
 #include <asm/prom.h>
@@ -56,11 +57,6 @@
 unsigned int tlbcam_index;
-#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
-#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
-#endif
 #define NUM_TLBCAMS     (64)
 struct tlbcam TLBCAM[NUM_TLBCAMS];
@@ -137,7 +133,8 @@ static void settlbcam(int index, unsigned long virt, phys_addr_t phys,
        if (mmu_has_feature(MMU_FTR_BIG_PHYS))
                TLBCAM[index].MAS7 = (u64)phys >> 32;
-        if (flags & _PAGE_USER) {
+        /* Below is unlikely -- only for large user pages or similar */
+        if (pte_user(flags)) {
           TLBCAM[index].MAS3 |= MAS3_UX | MAS3_UR;
           TLBCAM[index].MAS3 |= ((flags & _PAGE_RW) ? MAS3_UW : 0);
        }
@@ -184,6 +181,12 @@ unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx)
        return amount_mapped;
 }
+#ifdef CONFIG_PPC32
+#if defined(CONFIG_LOWMEM_CAM_NUM_BOOL) && (CONFIG_LOWMEM_CAM_NUM >= NUM_TLBCAMS)
+#error "LOWMEM_CAM_NUM must be less than NUM_TLBCAMS"
+#endif
 unsigned long __init mmu_mapin_ram(unsigned long top)
 {
        return tlbcam_addrs[tlbcam_index - 1].limit - PAGE_OFFSET + 1;
@@ -213,5 +216,15 @@ void __init adjust_total_lowmem(void)
        pr_cont("%lu Mb, residual: %dMb\n", tlbcam_sz(tlbcam_index - 1) >> 20,
                (unsigned int)((total_lowmem - __max_low_memory) >> 20));
-        __initial_memory_limit_addr = memstart_addr + __max_low_memory;
+        memblock_set_current_limit(memstart_addr + __max_low_memory);
 }
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        phys_addr_t limit = first_memblock_base + first_memblock_size;
+        /* 64M mapped initially according to head_fsl_booke.S */
+        memblock_set_current_limit(min_t(u64, limit, 0x04000000));
+}
+#endif
diff --git a/arch/powerpc/mm/gup.c b/arch/powerpc/mm/gup.c
index d7efdbf640c7..fec13200868f 100644
--- a/arch/powerpc/mm/gup.c
+++ b/arch/powerpc/mm/gup.c
@@ -16,6 +16,16 @@
 #ifdef __HAVE_ARCH_PTE_SPECIAL
+static inline void get_huge_page_tail(struct page *page)
+{
+        /*
+         * __split_huge_page_refcount() cannot run
+         * from under us.
+         */
+        VM_BUG_ON(atomic_read(&page->_count) < 0);
+        atomic_inc(&page->_count);
+}
 /*
 * The performance critical leaf functions are made noinline otherwise gcc
 * inlines everything into a single function which results in too much
@@ -47,6 +57,8 @@ static noinline int gup_pte_range(pmd_t pmd, unsigned long addr,
                        put_page(page);
                        return 0;
                }
+                if (PageTail(page))
+                        get_huge_page_tail(page);
                pages[*nr] = page;
                (*nr)++;
diff --git a/arch/powerpc/mm/hash_low_64.S b/arch/powerpc/mm/hash_low_64.S
index 3079f6b44cf5..a242b5d7cbe4 100644
--- a/arch/powerpc/mm/hash_low_64.S
+++ b/arch/powerpc/mm/hash_low_64.S
@@ -118,7 +118,7 @@ _GLOBAL(__hash_page_4K)
 BEGIN_FTR_SECTION
        cmpdi   r9,0                    /* check segment size */
        bne     3f
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        /* Calc va and put it in r29 */
        rldicr  r29,r5,28,63-28
        rldicl  r3,r3,0,36
@@ -192,8 +192,8 @@ htab_insert_pte:
        rldicr  r3,r0,3,63-3            /* r3 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_4K          /* page size */
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
@@ -215,8 +215,8 @@ _GLOBAL(htab_call_hpte_insert1)
        rldicr  r3,r0,3,63-3    /* r0 = (~hash & mask) << 3 */
        
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_4K          /* page size */
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
@@ -401,7 +401,7 @@ _GLOBAL(__hash_page_4K)
 BEGIN_FTR_SECTION
        cmpdi   r9,0                    /* check segment size */
        bne     3f
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        /* Calc va and put it in r29 */
        rldicr  r29,r5,28,63-28         /* r29 = (vsid << 28) */
        rldicl  r3,r3,0,36              /* r3 = (ea & 0x0fffffff) */
@@ -495,8 +495,8 @@ htab_special_pfn:
        rldicr  r3,r0,3,63-3            /* r0 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_4K          /* page size */
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
@@ -522,8 +522,8 @@ _GLOBAL(htab_call_hpte_insert1)
        rldicr  r3,r0,3,63-3            /* r0 = (~hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_4K          /* page size */
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
@@ -715,7 +715,7 @@ BEGIN_FTR_SECTION
        andi.   r0,r31,_PAGE_NO_CACHE
        /* If so, bail out and refault as a 4k page */
        bne-    ht64_bail_ok
-END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_CI_LARGE_PAGE)
        /* Prepare new PTE value (turn access RW into DIRTY, then
         * add BUSY and ACCESSED)
         */
@@ -736,7 +736,7 @@ END_FTR_SECTION_IFCLR(CPU_FTR_CI_LARGE_PAGE)
 BEGIN_FTR_SECTION
        cmpdi   r9,0                    /* check segment size */
        bne     3f
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        /* Calc va and put it in r29 */
        rldicr  r29,r5,28,63-28
        rldicl  r3,r3,0,36
@@ -813,8 +813,8 @@ ht64_insert_pte:
        rldicr  r3,r0,3,63-3    /* r0 = (hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,0                    /* !bolted, !secondary */
        li      r8,MMU_PAGE_64K
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
@@ -836,8 +836,8 @@ _GLOBAL(ht64_call_hpte_insert1)
        rldicr  r3,r0,3,63-3    /* r0 = (~hash & mask) << 3 */
        /* Call ppc_md.hpte_insert */
-        ld      r6,STK_PARM(r4)(r1)     /* Retreive new pp bits */
+        ld      r6,STK_PARM(r4)(r1)     /* Retrieve new pp bits */
-        mr      r4,r29                  /* Retreive va */
+        mr      r4,r29                  /* Retrieve va */
        li      r7,HPTE_V_SECONDARY     /* !bolted, secondary */
        li      r8,MMU_PAGE_64K
        ld      r9,STK_PARM(r9)(r1)     /* segment size */
diff --git a/arch/powerpc/mm/hash_native_64.c b/arch/powerpc/mm/hash_native_64.c
index 784a400e0781..dfd764896db0 100644
--- a/arch/powerpc/mm/hash_native_64.c
+++ b/arch/powerpc/mm/hash_native_64.c
@@ -50,9 +50,8 @@ static inline void __tlbie(unsigned long va, int psize, int ssize)
        case MMU_PAGE_4K:
                va &= ~0xffful;
                va |= ssize << 8;
-                asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0),
+                asm volatile(ASM_FTR_IFCLR("tlbie %0,0", PPC_TLBIE(%1,%0), %2)
-                                               %2)
+                             : : "r" (va), "r"(0), "i" (CPU_FTR_HVMODE_206)
-                             : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
                             : "memory");
                break;
        default:
@@ -61,9 +60,8 @@ static inline void __tlbie(unsigned long va, int psize, int ssize)
                va |= penc << 12;
                va |= ssize << 8;
                va |= 1; /* L */
-                asm volatile(ASM_MMU_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0),
+                asm volatile(ASM_FTR_IFCLR("tlbie %0,1", PPC_TLBIE(%1,%0), %2)
-                                               %2)
+                             : : "r" (va), "r"(0), "i" (CPU_FTR_HVMODE_206)
-                             : : "r" (va), "r"(0), "i" (MMU_FTR_TLBIE_206)
                             : "memory");
                break;
        }
@@ -98,8 +96,8 @@ static inline void __tlbiel(unsigned long va, int psize, int ssize)
 static inline void tlbie(unsigned long va, int psize, int ssize, int local)
 {
-        unsigned int use_local = local && cpu_has_feature(CPU_FTR_TLBIEL);
+        unsigned int use_local = local && mmu_has_feature(MMU_FTR_TLBIEL);
-        int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
+        int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
        if (use_local)
                use_local = mmu_psize_defs[psize].tlbiel;
@@ -503,7 +501,7 @@ static void native_flush_hash_range(unsigned long number, int local)
                } pte_iterate_hashed_end();
        }
-        if (cpu_has_feature(CPU_FTR_TLBIEL) &&
+        if (mmu_has_feature(MMU_FTR_TLBIEL) &&
            mmu_psize_defs[psize].tlbiel && local) {
                asm volatile("ptesync":::"memory");
                for (i = 0; i < number; i++) {
@@ -517,7 +515,7 @@ static void native_flush_hash_range(unsigned long number, int local)
                }
                asm volatile("ptesync":::"memory");
        } else {
-                int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
+                int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
                if (lock_tlbie)
                        raw_spin_lock(&native_tlbie_lock);
diff --git a/arch/powerpc/mm/hash_utils_64.c b/arch/powerpc/mm/hash_utils_64.c
index 09dffe6efa46..26b2872b3d00 100644
--- a/arch/powerpc/mm/hash_utils_64.c
+++ b/arch/powerpc/mm/hash_utils_64.c
@@ -53,6 +53,7 @@
 #include <asm/sections.h>
 #include <asm/spu.h>
 #include <asm/udbg.h>
+#include <asm/code-patching.h>
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -258,11 +259,11 @@ static int __init htab_dt_scan_seg_sizes(unsigned long node,
        for (; size >= 4; size -= 4, ++prop) {
                if (prop[0] == 40) {
                        DBG("1T segment support detected\n");
-                        cur_cpu_spec->cpu_features |= CPU_FTR_1T_SEGMENT;
+                        cur_cpu_spec->mmu_features |= MMU_FTR_1T_SEGMENT;
                        return 1;
                }
        }
-        cur_cpu_spec->cpu_features &= ~CPU_FTR_NO_SLBIE_B;
+        cur_cpu_spec->mmu_features &= ~MMU_FTR_NO_SLBIE_B;
        return 0;
 }
@@ -288,7 +289,7 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
        if (prop != NULL) {
                DBG("Page sizes from device-tree:\n");
                size /= 4;
-                cur_cpu_spec->cpu_features &= ~(CPU_FTR_16M_PAGE);
+                cur_cpu_spec->mmu_features &= ~(MMU_FTR_16M_PAGE);
                while(size > 0) {
                        unsigned int shift = prop[0];
                        unsigned int slbenc = prop[1];
@@ -316,7 +317,7 @@ static int __init htab_dt_scan_page_sizes(unsigned long node,
                                break;
                        case 0x18:
                                idx = MMU_PAGE_16M;
-                                cur_cpu_spec->cpu_features |= CPU_FTR_16M_PAGE;
+                                cur_cpu_spec->mmu_features |= MMU_FTR_16M_PAGE;
                                break;
                        case 0x22:
                                idx = MMU_PAGE_16G;
@@ -411,7 +412,7 @@ static void __init htab_init_page_sizes(void)
         * Not in the device-tree, let's fallback on known size
         * list for 16M capable GP & GR
         */
-        if (cpu_has_feature(CPU_FTR_16M_PAGE))
+        if (mmu_has_feature(MMU_FTR_16M_PAGE))
                memcpy(mmu_psize_defs, mmu_psize_defaults_gp,
                       sizeof(mmu_psize_defaults_gp));
 found:
@@ -441,7 +442,7 @@ static void __init htab_init_page_sizes(void)
                mmu_vmalloc_psize = MMU_PAGE_64K;
                if (mmu_linear_psize == MMU_PAGE_4K)
                        mmu_linear_psize = MMU_PAGE_64K;
-                if (cpu_has_feature(CPU_FTR_CI_LARGE_PAGE)) {
+                if (mmu_has_feature(MMU_FTR_CI_LARGE_PAGE)) {
                        /*
                         * Don't use 64k pages for ioremap on pSeries, since
                         * that would stop us accessing the HEA ethernet.
@@ -547,15 +548,7 @@ int remove_section_mapping(unsigned long start, unsigned long end)
 }
 #endif /* CONFIG_MEMORY_HOTPLUG */
-static inline void make_bl(unsigned int *insn_addr, void *func)
+#define FUNCTION_TEXT(A)        ((*(unsigned long *)(A)))
-{
-        unsigned long funcp = *((unsigned long *)func);
-        int offset = funcp - (unsigned long)insn_addr;
-        *insn_addr = (unsigned int)(0x48000001 | (offset & 0x03fffffc));
-        flush_icache_range((unsigned long)insn_addr, 4+
-                           (unsigned long)insn_addr);
-}
 static void __init htab_finish_init(void)
 {
@@ -570,16 +563,33 @@ static void __init htab_finish_init(void)
        extern unsigned int *ht64_call_hpte_remove;
        extern unsigned int *ht64_call_hpte_updatepp;
-        make_bl(ht64_call_hpte_insert1, ppc_md.hpte_insert);
+        patch_branch(ht64_call_hpte_insert1,
-        make_bl(ht64_call_hpte_insert2, ppc_md.hpte_insert);
+                FUNCTION_TEXT(ppc_md.hpte_insert),
-        make_bl(ht64_call_hpte_remove, ppc_md.hpte_remove);
+                BRANCH_SET_LINK);
-        make_bl(ht64_call_hpte_updatepp, ppc_md.hpte_updatepp);
+        patch_branch(ht64_call_hpte_insert2,
+                FUNCTION_TEXT(ppc_md.hpte_insert),
+                BRANCH_SET_LINK);
+        patch_branch(ht64_call_hpte_remove,
+                FUNCTION_TEXT(ppc_md.hpte_remove),
+                BRANCH_SET_LINK);
+        patch_branch(ht64_call_hpte_updatepp,
+                FUNCTION_TEXT(ppc_md.hpte_updatepp),
+                BRANCH_SET_LINK);
 #endif /* CONFIG_PPC_HAS_HASH_64K */
-        make_bl(htab_call_hpte_insert1, ppc_md.hpte_insert);
+        patch_branch(htab_call_hpte_insert1,
-        make_bl(htab_call_hpte_insert2, ppc_md.hpte_insert);
+                FUNCTION_TEXT(ppc_md.hpte_insert),
-        make_bl(htab_call_hpte_remove, ppc_md.hpte_remove);
+                BRANCH_SET_LINK);
-        make_bl(htab_call_hpte_updatepp, ppc_md.hpte_updatepp);
+        patch_branch(htab_call_hpte_insert2,
+                FUNCTION_TEXT(ppc_md.hpte_insert),
+                BRANCH_SET_LINK);
+        patch_branch(htab_call_hpte_remove,
+                FUNCTION_TEXT(ppc_md.hpte_remove),
+                BRANCH_SET_LINK);
+        patch_branch(htab_call_hpte_updatepp,
+                FUNCTION_TEXT(ppc_md.hpte_updatepp),
+                BRANCH_SET_LINK);
 }
 static void __init htab_initialize(void)
@@ -588,7 +598,7 @@ static void __init htab_initialize(void)
        unsigned long pteg_count;
        unsigned long prot;
        unsigned long base = 0, size = 0, limit;
-        int i;
+        struct memblock_region *reg;
        DBG(" -> htab_initialize()\n");
@@ -598,7 +608,7 @@ static void __init htab_initialize(void)
        /* Initialize page sizes */
        htab_init_page_sizes();
-        if (cpu_has_feature(CPU_FTR_1T_SEGMENT)) {
+        if (mmu_has_feature(MMU_FTR_1T_SEGMENT)) {
                mmu_kernel_ssize = MMU_SEGSIZE_1T;
                mmu_highuser_ssize = MMU_SEGSIZE_1T;
                printk(KERN_INFO "Using 1TB segments\n");
@@ -625,7 +635,7 @@ static void __init htab_initialize(void)
                if (machine_is(cell))
                        limit = 0x80000000;
                else
-                        limit = 0;
+                        limit = MEMBLOCK_ALLOC_ANYWHERE;
                table = memblock_alloc_base(htab_size_bytes, htab_size_bytes, limit);
@@ -649,7 +659,7 @@ static void __init htab_initialize(void)
 #ifdef CONFIG_DEBUG_PAGEALLOC
        linear_map_hash_count = memblock_end_of_DRAM() >> PAGE_SHIFT;
        linear_map_hash_slots = __va(memblock_alloc_base(linear_map_hash_count,
-                                                    1, memblock.rmo_size));
+                                                    1, ppc64_rma_size));
        memset(linear_map_hash_slots, 0, linear_map_hash_count);
 #endif /* CONFIG_DEBUG_PAGEALLOC */
@@ -659,9 +669,9 @@ static void __init htab_initialize(void)
         */
        /* create bolted the linear mapping in the hash table */
-        for (i=0; i < memblock.memory.cnt; i++) {
+        for_each_memblock(memory, reg) {
-                base = (unsigned long)__va(memblock.memory.region[i].base);
+                base = (unsigned long)__va(reg->base);
-                size = memblock.memory.region[i].size;
+                size = reg->size;
                DBG("creating mapping for region: %lx..%lx (prot: %lx)\n",
                    base, size, prot);
@@ -696,7 +706,8 @@ static void __init htab_initialize(void)
 #endif /* CONFIG_U3_DART */
                BUG_ON(htab_bolt_mapping(base, base + size, __pa(base),
                                prot, mmu_linear_psize, mmu_kernel_ssize));
-       }
+        }
+        memblock_set_current_limit(MEMBLOCK_ALLOC_ANYWHERE);
        /*
         * If we have a memory_limit and we've allocated TCEs then we need to
@@ -738,7 +749,7 @@ void __init early_init_mmu(void)
        /* Initialize stab / SLB management except on iSeries
         */
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                slb_initialize();
        else if (!firmware_has_feature(FW_FEATURE_ISERIES))
                stab_initialize(get_paca()->stab_real);
@@ -752,10 +763,10 @@ void __cpuinit early_init_mmu_secondary(void)
                mtspr(SPRN_SDR1, _SDR1);
        /* Initialize STAB/SLB. We use a virtual address as it works
-         * in real mode on pSeries and we want a virutal address on
+         * in real mode on pSeries and we want a virtual address on
         * iSeries anyway
         */
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                slb_initialize();
        else
                stab_initialize(get_paca()->stab_addr);
@@ -1069,7 +1080,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
                  unsigned long access, unsigned long trap)
 {
        unsigned long vsid;
-        void *pgdir;
+        pgd_t *pgdir;
        pte_t *ptep;
        unsigned long flags;
        int rc, ssize, local = 0;
@@ -1122,7 +1133,7 @@ void hash_preload(struct mm_struct *mm, unsigned long ea,
        else
 #endif /* CONFIG_PPC_HAS_HASH_64K */
                rc = __hash_page_4K(ea, access, vsid, ptep, trap, local, ssize,
-                                    subpage_protection(pgdir, ea));
+                                    subpage_protection(mm, ea));
        /* Dump some info in case of hash insertion failure, they should
         * never happen so it is really useful to know if/when they do
@@ -1247,3 +1258,23 @@ void kernel_map_pages(struct page *page, int numpages, int enable)
        local_irq_restore(flags);
 }
 #endif /* CONFIG_DEBUG_PAGEALLOC */
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* We don't currently support the first MEMBLOCK not mapping 0
+         * physical on those processors
+         */
+        BUG_ON(first_memblock_base != 0);
+        /* On LPAR systems, the first entry is our RMA region,
+         * non-LPAR 64-bit hash MMU systems don't have a limitation
+         * on real mode access, but using the first entry works well
+         * enough. We also clamp it to 1G to avoid some funky things
+         * such as RTAS bugs etc...
+         */
+        ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
+        /* Finally limit subsequent allocations */
+        memblock_set_current_limit(ppc64_rma_size);
+}
diff --git a/arch/powerpc/mm/highmem.c b/arch/powerpc/mm/highmem.c
index 857d4173f9c6..e7450bdbe83a 100644
--- a/arch/powerpc/mm/highmem.c
+++ b/arch/powerpc/mm/highmem.c
@@ -29,17 +29,17 @@
 * be used in IRQ contexts, so in some (very limited) cases we need
 * it.
 */
-void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
+void *kmap_atomic_prot(struct page *page, pgprot_t prot)
 {
-        unsigned int idx;
        unsigned long vaddr;
+        int idx, type;
        /* even !CONFIG_PREEMPT needs this, for in_atomic in do_page_fault */
        pagefault_disable();
        if (!PageHighMem(page))
                return page_address(page);
-        debug_kmap_atomic(type);
+        type = kmap_atomic_idx_push();
        idx = type + KM_TYPE_NR*smp_processor_id();
        vaddr = __fix_to_virt(FIX_KMAP_BEGIN + idx);
 #ifdef CONFIG_DEBUG_HIGHMEM
@@ -52,26 +52,35 @@ void *kmap_atomic_prot(struct page *page, enum km_type type, pgprot_t prot)
 }
 EXPORT_SYMBOL(kmap_atomic_prot);
-void kunmap_atomic_notypecheck(void *kvaddr, enum km_type type)
+void __kunmap_atomic(void *kvaddr)
 {
-#ifdef CONFIG_DEBUG_HIGHMEM
        unsigned long vaddr = (unsigned long) kvaddr & PAGE_MASK;
-        enum fixed_addresses idx = type + KM_TYPE_NR*smp_processor_id();
+        int type;
        if (vaddr < __fix_to_virt(FIX_KMAP_END)) {
                pagefault_enable();
                return;
        }
-        BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
+        type = kmap_atomic_idx();
-        /*
+#ifdef CONFIG_DEBUG_HIGHMEM
-         * force other mappings to Oops if they'll try to access
+        {
-         * this pte without first remap it
+                unsigned int idx;
-         */
-        pte_clear(&init_mm, vaddr, kmap_pte-idx);
+                idx = type + KM_TYPE_NR * smp_processor_id();
-        local_flush_tlb_page(NULL, vaddr);
+                BUG_ON(vaddr != __fix_to_virt(FIX_KMAP_BEGIN + idx));
+                /*
+                 * force other mappings to Oops if they'll try to access
+                 * this pte without first remap it
+                 */
+                pte_clear(&init_mm, vaddr, kmap_pte-idx);
+                local_flush_tlb_page(NULL, vaddr);
+        }
 #endif
+        kmap_atomic_idx_pop();
        pagefault_enable();
 }
-EXPORT_SYMBOL(kunmap_atomic_notypecheck);
+EXPORT_SYMBOL(__kunmap_atomic);
diff --git a/arch/powerpc/mm/hugetlbpage.c b/arch/powerpc/mm/hugetlbpage.c
index 9bb249c3046e..0b9a5c1901b9 100644
--- a/arch/powerpc/mm/hugetlbpage.c
+++ b/arch/powerpc/mm/hugetlbpage.c
@@ -529,7 +529,7 @@ static int __init hugetlbpage_init(void)
 {
        int psize;
-        if (!cpu_has_feature(CPU_FTR_16M_PAGE))
+        if (!mmu_has_feature(MMU_FTR_16M_PAGE))
                return -ENODEV;
        for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
diff --git a/arch/powerpc/mm/init_32.c b/arch/powerpc/mm/init_32.c
index 6a6975dc2654..5de0f254dbb5 100644
--- a/arch/powerpc/mm/init_32.c
+++ b/arch/powerpc/mm/init_32.c
@@ -92,12 +92,6 @@ int __allow_ioremap_reserved;
 unsigned long __max_low_memory = MAX_LOW_MEM;
 /*
- * address of the limit of what is accessible with initial MMU setup -
- * 256MB usually, but only 16MB on 601.
- */
-phys_addr_t __initial_memory_limit_addr = (phys_addr_t)0x10000000;
-/*
 * Check for command-line options that affect what MMU_init will do.
 */
 void MMU_setup(void)
@@ -126,13 +120,6 @@ void __init MMU_init(void)
        if (ppc_md.progress)
                ppc_md.progress("MMU:enter", 0x111);
-        /* 601 can only access 16MB at the moment */
-        if (PVR_VER(mfspr(SPRN_PVR)) == 1)
-                __initial_memory_limit_addr = 0x01000000;
-        /* 8xx can only access 8MB at the moment */
-        if (PVR_VER(mfspr(SPRN_PVR)) == 0x50)
-                __initial_memory_limit_addr = 0x00800000;
        /* parse args from command line */
        MMU_setup();
@@ -161,7 +148,7 @@ void __init MMU_init(void)
                lowmem_end_addr = memstart_addr + total_lowmem;
 #ifndef CONFIG_HIGHMEM
                total_memory = total_lowmem;
-                memblock_enforce_memory_limit(lowmem_end_addr);
+                memblock_enforce_memory_limit(total_lowmem);
                memblock_analyze();
 #endif /* CONFIG_HIGHMEM */
        }
@@ -190,20 +177,18 @@ void __init MMU_init(void)
 #ifdef CONFIG_BOOTX_TEXT
        btext_unmap();
 #endif
+        /* Shortly after that, the entire linear mapping will be available */
+        memblock_set_current_limit(lowmem_end_addr);
 }
 /* This is only called until mem_init is done. */
 void __init *early_get_page(void)
 {
-        void *p;
+        if (init_bootmem_done)
+                return alloc_bootmem_pages(PAGE_SIZE);
-        if (init_bootmem_done) {
+        else
-                p = alloc_bootmem_pages(PAGE_SIZE);
+                return __va(memblock_alloc(PAGE_SIZE, PAGE_SIZE));
-        } else {
-                p = __va(memblock_alloc_base(PAGE_SIZE, PAGE_SIZE,
-                                        __initial_memory_limit_addr));
-        }
-        return p;
 }
 /* Free up now-unused memory */
@@ -238,17 +223,16 @@ void free_initmem(void)
 #undef FREESEC
 }
-#ifdef CONFIG_BLK_DEV_INITRD
+#ifdef CONFIG_8xx /* No 8xx specific .c file to put that in ... */
-void free_initrd_mem(unsigned long start, unsigned long end)
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
 {
-        if (start < end)
+        /* We don't currently support the first MEMBLOCK not mapping 0
-                printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
+         * physical on those processors
-        for (; start < end; start += PAGE_SIZE) {
+         */
-                ClearPageReserved(virt_to_page(start));
+        BUG_ON(first_memblock_base != 0);
-                init_page_count(virt_to_page(start));
-                free_page(start);
-                totalram_pages++;
-        }
-}
-#endif
+        /* 8xx can only access 8MB at the moment */
+        memblock_set_current_limit(min_t(u64, first_memblock_size, 0x00800000));
+}
+#endif /* CONFIG_8xx */
diff --git a/arch/powerpc/mm/init_64.c b/arch/powerpc/mm/init_64.c
index ace85fa74b29..f6dbb4c20e64 100644
--- a/arch/powerpc/mm/init_64.c
+++ b/arch/powerpc/mm/init_64.c
@@ -99,20 +99,6 @@ void free_initmem(void)
                ((unsigned long)__init_end - (unsigned long)__init_begin) >> 10);
 }
-#ifdef CONFIG_BLK_DEV_INITRD
-void free_initrd_mem(unsigned long start, unsigned long end)
-{
-        if (start < end)
-                printk ("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
-        for (; start < end; start += PAGE_SIZE) {
-                ClearPageReserved(virt_to_page(start));
-                init_page_count(virt_to_page(start));
-                free_page(start);
-                totalram_pages++;
-        }
-}
-#endif
 static void pgd_ctor(void *addr)
 {
        memset(addr, 0, PGD_TABLE_SIZE);
@@ -330,3 +316,4 @@ int __meminit vmemmap_populate(struct page *start_page,
        return 0;
 }
 #endif /* CONFIG_SPARSEMEM_VMEMMAP */
diff --git a/arch/powerpc/mm/mem.c b/arch/powerpc/mm/mem.c
index 1a84a8d00005..29d4dde65c45 100644
--- a/arch/powerpc/mm/mem.c
+++ b/arch/powerpc/mm/mem.c
@@ -82,18 +82,11 @@ int page_is_ram(unsigned long pfn)
        return pfn < max_pfn;
 #else
        unsigned long paddr = (pfn << PAGE_SHIFT);
-        int i;
+        struct memblock_region *reg;
-        for (i=0; i < memblock.memory.cnt; i++) {
-                unsigned long base;
-                base = memblock.memory.region[i].base;
+        for_each_memblock(memory, reg)
+                if (paddr >= reg->base && paddr < (reg->base + reg->size))
-                if ((paddr >= base) &&
-                        (paddr < (base + memblock.memory.region[i].size))) {
                        return 1;
-                }
-        }
        return 0;
 #endif
 }
@@ -149,23 +142,19 @@ int
 walk_system_ram_range(unsigned long start_pfn, unsigned long nr_pages,
                void *arg, int (*func)(unsigned long, unsigned long, void *))
 {
-        struct memblock_property res;
+        struct memblock_region *reg;
-        unsigned long pfn, len;
+        unsigned long end_pfn = start_pfn + nr_pages;
-        u64 end;
+        unsigned long tstart, tend;
        int ret = -1;
-        res.base = (u64) start_pfn << PAGE_SHIFT;
+        for_each_memblock(memory, reg) {
-        res.size = (u64) nr_pages << PAGE_SHIFT;
+                tstart = max(start_pfn, memblock_region_memory_base_pfn(reg));
+                tend = min(end_pfn, memblock_region_memory_end_pfn(reg));
-        end = res.base + res.size - 1;
+                if (tstart >= tend)
-        while ((res.base < end) && (memblock_find(&res) >= 0)) {
+                        continue;
-                pfn = (unsigned long)(res.base >> PAGE_SHIFT);
+                ret = (*func)(tstart, tend - tstart, arg);
-                len = (unsigned long)(res.size >> PAGE_SHIFT);
-                ret = (*func)(pfn, len, arg);
                if (ret)
                        break;
-                res.base += (res.size + 1);
-                res.size = (end - res.base + 1);
        }
        return ret;
 }
@@ -179,9 +168,9 @@ EXPORT_SYMBOL_GPL(walk_system_ram_range);
 #ifndef CONFIG_NEED_MULTIPLE_NODES
 void __init do_init_bootmem(void)
 {
-        unsigned long i;
        unsigned long start, bootmap_pages;
        unsigned long total_pages;
+        struct memblock_region *reg;
        int boot_mapsize;
        max_low_pfn = max_pfn = memblock_end_of_DRAM() >> PAGE_SHIFT;
@@ -204,10 +193,10 @@ void __init do_init_bootmem(void)
        boot_mapsize = init_bootmem_node(NODE_DATA(0), start >> PAGE_SHIFT, min_low_pfn, max_low_pfn);
        /* Add active regions with valid PFNs */
-        for (i = 0; i < memblock.memory.cnt; i++) {
+        for_each_memblock(memory, reg) {
                unsigned long start_pfn, end_pfn;
-                start_pfn = memblock.memory.region[i].base >> PAGE_SHIFT;
+                start_pfn = memblock_region_memory_base_pfn(reg);
-                end_pfn = start_pfn + memblock_size_pages(&memblock.memory, i);
+                end_pfn = memblock_region_memory_end_pfn(reg);
                add_active_range(0, start_pfn, end_pfn);
        }
@@ -218,29 +207,21 @@ void __init do_init_bootmem(void)
        free_bootmem_with_active_regions(0, lowmem_end_addr >> PAGE_SHIFT);
        /* reserve the sections we're already using */
-        for (i = 0; i < memblock.reserved.cnt; i++) {
+        for_each_memblock(reserved, reg) {
-                unsigned long addr = memblock.reserved.region[i].base +
+                unsigned long top = reg->base + reg->size - 1;
-                                     memblock_size_bytes(&memblock.reserved, i) - 1;
+                if (top < lowmem_end_addr)
-                if (addr < lowmem_end_addr)
+                        reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
-                        reserve_bootmem(memblock.reserved.region[i].base,
+                else if (reg->base < lowmem_end_addr) {
-                                        memblock_size_bytes(&memblock.reserved, i),
+                        unsigned long trunc_size = lowmem_end_addr - reg->base;
-                                        BOOTMEM_DEFAULT);
+                        reserve_bootmem(reg->base, trunc_size, BOOTMEM_DEFAULT);
-                else if (memblock.reserved.region[i].base < lowmem_end_addr) {
-                        unsigned long adjusted_size = lowmem_end_addr -
-                                      memblock.reserved.region[i].base;
-                        reserve_bootmem(memblock.reserved.region[i].base,
-                                        adjusted_size, BOOTMEM_DEFAULT);
                }
        }
 #else
        free_bootmem_with_active_regions(0, max_pfn);
        /* reserve the sections we're already using */
-        for (i = 0; i < memblock.reserved.cnt; i++)
+        for_each_memblock(reserved, reg)
-                reserve_bootmem(memblock.reserved.region[i].base,
+                reserve_bootmem(reg->base, reg->size, BOOTMEM_DEFAULT);
-                                memblock_size_bytes(&memblock.reserved, i),
-                                BOOTMEM_DEFAULT);
 #endif
        /* XXX need to clip this if using highmem? */
        sparse_memory_present_with_active_regions(0);
@@ -251,22 +232,15 @@ void __init do_init_bootmem(void)
 /* mark pages that don't exist as nosave */
 static int __init mark_nonram_nosave(void)
 {
-        unsigned long memblock_next_region_start_pfn,
+        struct memblock_region *reg, *prev = NULL;
-                      memblock_region_max_pfn;
-        int i;
+        for_each_memblock(memory, reg) {
+                if (prev &&
-        for (i = 0; i < memblock.memory.cnt - 1; i++) {
+                    memblock_region_memory_end_pfn(prev) < memblock_region_memory_base_pfn(reg))
-                memblock_region_max_pfn =
+                        register_nosave_region(memblock_region_memory_end_pfn(prev),
-                        (memblock.memory.region[i].base >> PAGE_SHIFT) +
+                                               memblock_region_memory_base_pfn(reg));
-                        (memblock.memory.region[i].size >> PAGE_SHIFT);
+                prev = reg;
-                memblock_next_region_start_pfn =
-                        memblock.memory.region[i+1].base >> PAGE_SHIFT;
-                if (memblock_region_max_pfn < memblock_next_region_start_pfn)
-                        register_nosave_region(memblock_region_max_pfn,
-                                               memblock_next_region_start_pfn);
        }
        return 0;
 }
@@ -327,7 +301,7 @@ void __init mem_init(void)
                swiotlb_init(1);
 #endif
-        num_physpages = memblock.memory.size >> PAGE_SHIFT;
+        num_physpages = memblock_phys_mem_size() >> PAGE_SHIFT;
        high_memory = (void *) __va(max_low_pfn * PAGE_SIZE);
 #ifdef CONFIG_NEED_MULTIPLE_NODES
@@ -408,6 +382,25 @@ void __init mem_init(void)
        mem_init_done = 1;
 }
+#ifdef CONFIG_BLK_DEV_INITRD
+void __init free_initrd_mem(unsigned long start, unsigned long end)
+{
+        if (start >= end)
+                return;
+        start = _ALIGN_DOWN(start, PAGE_SIZE);
+        end = _ALIGN_UP(end, PAGE_SIZE);
+        pr_info("Freeing initrd memory: %ldk freed\n", (end - start) >> 10);
+        for (; start < end; start += PAGE_SIZE) {
+                ClearPageReserved(virt_to_page(start));
+                init_page_count(virt_to_page(start));
+                free_page(start);
+                totalram_pages++;
+        }
+}
+#endif
 /*
 * This is called when a page has been modified by the kernel.
 * It just marks the page as not i-cache clean.  We do the i-cache
@@ -450,7 +443,7 @@ void clear_user_page(void *page, unsigned long vaddr, struct page *pg)
        clear_page(page);
        /*
-         * We shouldnt have to do this, but some versions of glibc
+         * We shouldn't have to do this, but some versions of glibc
         * require it (ld.so assumes zero filled pages are icache clean)
         * - Anton
         */
diff --git a/arch/powerpc/mm/mmu_context_hash64.c b/arch/powerpc/mm/mmu_context_hash64.c
index 2535828aa84b..3bafc3deca6d 100644
--- a/arch/powerpc/mm/mmu_context_hash64.c
+++ b/arch/powerpc/mm/mmu_context_hash64.c
@@ -20,9 +20,205 @@
 #include <linux/idr.h>
 #include <linux/module.h>
 #include <linux/gfp.h>
+#include <linux/slab.h>
 #include <asm/mmu_context.h>
+#ifdef CONFIG_PPC_ICSWX
+/*
+ * The processor and its L2 cache cause the icswx instruction to
+ * generate a COP_REQ transaction on PowerBus. The transaction has
+ * no address, and the processor does not perform an MMU access
+ * to authenticate the transaction. The command portion of the
+ * PowerBus COP_REQ transaction includes the LPAR_ID (LPID) and
+ * the coprocessor Process ID (PID), which the coprocessor compares
+ * to the authorized LPID and PID held in the coprocessor, to determine
+ * if the process is authorized to generate the transaction.
+ * The data of the COP_REQ transaction is 128-byte or less and is
+ * placed in cacheable memory on a 128-byte cache line boundary.
+ *
+ * The task to use a coprocessor should use use_cop() to allocate
+ * a coprocessor PID before executing icswx instruction. use_cop()
+ * also enables the coprocessor context switching. Drop_cop() is
+ * used to free the coprocessor PID.
+ *
+ * Example:
+ * Host Fabric Interface (HFI) is a PowerPC network coprocessor.
+ * Each HFI have multiple windows. Each HFI window serves as a
+ * network device sending to and receiving from HFI network.
+ * HFI immediate send function uses icswx instruction. The immediate
+ * send function allows small (single cache-line) packets be sent
+ * without using the regular HFI send FIFO and doorbell, which are
+ * much slower than immediate send.
+ *
+ * For each task intending to use HFI immediate send, the HFI driver
+ * calls use_cop() to obtain a coprocessor PID for the task.
+ * The HFI driver then allocate a free HFI window and save the
+ * coprocessor PID to the HFI window to allow the task to use the
+ * HFI window.
+ *
+ * The HFI driver repeatedly creates immediate send packets and
+ * issues icswx instruction to send data through the HFI window.
+ * The HFI compares the coprocessor PID in the CPU PID register
+ * to the PID held in the HFI window to determine if the transaction
+ * is allowed.
+ *
+ * When the task to release the HFI window, the HFI driver calls
+ * drop_cop() to release the coprocessor PID.
+ */
+#define COP_PID_NONE 0
+#define COP_PID_MIN (COP_PID_NONE + 1)
+#define COP_PID_MAX (0xFFFF)
+static DEFINE_SPINLOCK(mmu_context_acop_lock);
+static DEFINE_IDA(cop_ida);
+void switch_cop(struct mm_struct *next)
+{
+        mtspr(SPRN_PID, next->context.cop_pid);
+        mtspr(SPRN_ACOP, next->context.acop);
+}
+static int new_cop_pid(struct ida *ida, int min_id, int max_id,
+                       spinlock_t *lock)
+{
+        int index;
+        int err;
+again:
+        if (!ida_pre_get(ida, GFP_KERNEL))
+                return -ENOMEM;
+        spin_lock(lock);
+        err = ida_get_new_above(ida, min_id, &index);
+        spin_unlock(lock);
+        if (err == -EAGAIN)
+                goto again;
+        else if (err)
+                return err;
+        if (index > max_id) {
+                spin_lock(lock);
+                ida_remove(ida, index);
+                spin_unlock(lock);
+                return -ENOMEM;
+        }
+        return index;
+}
+static void sync_cop(void *arg)
+{
+        struct mm_struct *mm = arg;
+        if (mm == current->active_mm)
+                switch_cop(current->active_mm);
+}
+/**
+ * Start using a coprocessor.
+ * @acop: mask of coprocessor to be used.
+ * @mm: The mm the coprocessor to associate with. Most likely current mm.
+ *
+ * Return a positive PID if successful. Negative errno otherwise.
+ * The returned PID will be fed to the coprocessor to determine if an
+ * icswx transaction is authenticated.
+ */
+int use_cop(unsigned long acop, struct mm_struct *mm)
+{
+        int ret;
+        if (!cpu_has_feature(CPU_FTR_ICSWX))
+                return -ENODEV;
+        if (!mm || !acop)
+                return -EINVAL;
+        /* We need to make sure mm_users doesn't change */
+        down_read(&mm->mmap_sem);
+        spin_lock(mm->context.cop_lockp);
+        if (mm->context.cop_pid == COP_PID_NONE) {
+                ret = new_cop_pid(&cop_ida, COP_PID_MIN, COP_PID_MAX,
+                                  &mmu_context_acop_lock);
+                if (ret < 0)
+                        goto out;
+                mm->context.cop_pid = ret;
+        }
+        mm->context.acop |= acop;
+        sync_cop(mm);
+        /*
+         * If this is a threaded process then there might be other threads
+         * running. We need to send an IPI to force them to pick up any
+         * change in PID and ACOP.
+         */
+        if (atomic_read(&mm->mm_users) > 1)
+                smp_call_function(sync_cop, mm, 1);
+        ret = mm->context.cop_pid;
+out:
+        spin_unlock(mm->context.cop_lockp);
+        up_read(&mm->mmap_sem);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(use_cop);
+/**
+ * Stop using a coprocessor.
+ * @acop: mask of coprocessor to be stopped.
+ * @mm: The mm the coprocessor associated with.
+ */
+void drop_cop(unsigned long acop, struct mm_struct *mm)
+{
+        int free_pid = COP_PID_NONE;
+        if (!cpu_has_feature(CPU_FTR_ICSWX))
+                return;
+        if (WARN_ON_ONCE(!mm))
+                return;
+        /* We need to make sure mm_users doesn't change */
+        down_read(&mm->mmap_sem);
+        spin_lock(mm->context.cop_lockp);
+        mm->context.acop &= ~acop;
+        if ((!mm->context.acop) && (mm->context.cop_pid != COP_PID_NONE)) {
+                free_pid = mm->context.cop_pid;
+                mm->context.cop_pid = COP_PID_NONE;
+        }
+        sync_cop(mm);
+        /*
+         * If this is a threaded process then there might be other threads
+         * running. We need to send an IPI to force them to pick up any
+         * change in PID and ACOP.
+         */
+        if (atomic_read(&mm->mm_users) > 1)
+                smp_call_function(sync_cop, mm, 1);
+        if (free_pid != COP_PID_NONE) {
+                spin_lock(&mmu_context_acop_lock);
+                ida_remove(&cop_ida, free_pid);
+                spin_unlock(&mmu_context_acop_lock);
+        }
+        spin_unlock(mm->context.cop_lockp);
+        up_read(&mm->mmap_sem);
+}
+EXPORT_SYMBOL_GPL(drop_cop);
+#endif /* CONFIG_PPC_ICSWX */
 static DEFINE_SPINLOCK(mmu_context_lock);
 static DEFINE_IDA(mmu_context_ida);
@@ -31,7 +227,6 @@ static DEFINE_IDA(mmu_context_ida);
 * Each segment contains 2^28 bytes.  Each context maps 2^44 bytes,
 * so we can support 2^19-1 contexts (19 == 35 + 28 - 44).
 */
-#define NO_CONTEXT      0
 #define MAX_CONTEXT     ((1UL << 19) - 1)
 int __init_new_context(void)
@@ -79,6 +274,16 @@ int init_new_context(struct task_struct *tsk, struct mm_struct *mm)
                slice_set_user_psize(mm, mmu_virtual_psize);
        subpage_prot_init_new_context(mm);
        mm->context.id = index;
+#ifdef CONFIG_PPC_ICSWX
+        mm->context.cop_lockp = kmalloc(sizeof(spinlock_t), GFP_KERNEL);
+        if (!mm->context.cop_lockp) {
+                __destroy_context(index);
+                subpage_prot_free(mm);
+                mm->context.id = MMU_NO_CONTEXT;
+                return -ENOMEM;
+        }
+        spin_lock_init(mm->context.cop_lockp);
+#endif /* CONFIG_PPC_ICSWX */
        return 0;
 }
@@ -93,7 +298,12 @@ EXPORT_SYMBOL_GPL(__destroy_context);
 void destroy_context(struct mm_struct *mm)
 {
+#ifdef CONFIG_PPC_ICSWX
+        drop_cop(mm->context.acop, mm);
+        kfree(mm->context.cop_lockp);
+        mm->context.cop_lockp = NULL;
+#endif /* CONFIG_PPC_ICSWX */
        __destroy_context(mm->context.id);
        subpage_prot_free(mm);
-        mm->context.id = NO_CONTEXT;
+        mm->context.id = MMU_NO_CONTEXT;
 }
diff --git a/arch/powerpc/mm/mmu_context_nohash.c b/arch/powerpc/mm/mmu_context_nohash.c
index ddfd7ad4e1d6..336807de550e 100644
--- a/arch/powerpc/mm/mmu_context_nohash.c
+++ b/arch/powerpc/mm/mmu_context_nohash.c
@@ -111,8 +111,8 @@ static unsigned int steal_context_smp(unsigned int id)
                 * a core map instead but this will do for now.
                 */
                for_each_cpu(cpu, mm_cpumask(mm)) {
-                        for (i = cpu_first_thread_in_core(cpu);
+                        for (i = cpu_first_thread_sibling(cpu);
-                             i <= cpu_last_thread_in_core(cpu); i++)
+                             i <= cpu_last_thread_sibling(cpu); i++)
                                __set_bit(id, stale_map[i]);
                        cpu = i - 1;
                }
@@ -264,14 +264,14 @@ void switch_mmu_context(struct mm_struct *prev, struct mm_struct *next)
         */
        if (test_bit(id, stale_map[cpu])) {
                pr_hardcont(" | stale flush %d [%d..%d]",
-                            id, cpu_first_thread_in_core(cpu),
+                            id, cpu_first_thread_sibling(cpu),
-                            cpu_last_thread_in_core(cpu));
+                            cpu_last_thread_sibling(cpu));
                local_flush_tlb_mm(next);
                /* XXX This clear should ultimately be part of local_flush_tlb_mm */
-                for (i = cpu_first_thread_in_core(cpu);
+                for (i = cpu_first_thread_sibling(cpu);
-                     i <= cpu_last_thread_in_core(cpu); i++) {
+                     i <= cpu_last_thread_sibling(cpu); i++) {
                        __clear_bit(id, stale_map[i]);
                }
        }
@@ -334,16 +334,18 @@ static int __cpuinit mmu_context_cpu_notify(struct notifier_block *self,
        /* We don't touch CPU 0 map, it's allocated at aboot and kept
         * around forever
         */
-        if (cpu == 0)
+        if (cpu == boot_cpuid)
                return NOTIFY_OK;
        switch (action) {
-        case CPU_ONLINE:
+        case CPU_UP_PREPARE:
-        case CPU_ONLINE_FROZEN:
+        case CPU_UP_PREPARE_FROZEN:
                pr_devel("MMU: Allocating stale context map for CPU %d\n", cpu);
                stale_map[cpu] = kzalloc(CTX_MAP_SIZE, GFP_KERNEL);
                break;
 #ifdef CONFIG_HOTPLUG_CPU
+        case CPU_UP_CANCELED:
+        case CPU_UP_CANCELED_FROZEN:
        case CPU_DEAD:
        case CPU_DEAD_FROZEN:
                pr_devel("MMU: Freeing stale context map for CPU %d\n", cpu);
@@ -407,7 +409,17 @@ void __init mmu_context_init(void)
        } else if (mmu_has_feature(MMU_FTR_TYPE_47x)) {
                first_context = 1;
                last_context = 65535;
-        } else {
+        } else
+#ifdef CONFIG_PPC_BOOK3E_MMU
+        if (mmu_has_feature(MMU_FTR_TYPE_3E)) {
+                u32 mmucfg = mfspr(SPRN_MMUCFG);
+                u32 pid_bits = (mmucfg & MMUCFG_PIDSIZE_MASK)
+                                >> MMUCFG_PIDSIZE_SHIFT;
+                first_context = 1;
+                last_context = (1UL << (pid_bits + 1)) - 1;
+        } else
+#endif
+        {
                first_context = 1;
                last_context = 255;
        }
@@ -420,9 +432,11 @@ void __init mmu_context_init(void)
         */
        context_map = alloc_bootmem(CTX_MAP_SIZE);
        context_mm = alloc_bootmem(sizeof(void *) * (last_context + 1));
+#ifndef CONFIG_SMP
        stale_map[0] = alloc_bootmem(CTX_MAP_SIZE);
+#else
+        stale_map[boot_cpuid] = alloc_bootmem(CTX_MAP_SIZE);
-#ifdef CONFIG_SMP
        register_cpu_notifier(&mmu_context_cpu_nb);
 #endif
diff --git a/arch/powerpc/mm/mmu_decl.h b/arch/powerpc/mm/mmu_decl.h
index 63b84a0d3b10..dd0a2589591d 100644
--- a/arch/powerpc/mm/mmu_decl.h
+++ b/arch/powerpc/mm/mmu_decl.h
@@ -140,10 +140,13 @@ extern void wii_memory_fixups(void);
 extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(unsigned long top);
-#elif defined(CONFIG_FSL_BOOKE)
+#elif defined(CONFIG_PPC_FSL_BOOK3E)
+extern unsigned long map_mem_in_cams(unsigned long ram, int max_cam_idx);
+#ifdef CONFIG_PPC32
 extern void MMU_init_hw(void);
 extern unsigned long mmu_mapin_ram(unsigned long top);
 extern void adjust_total_lowmem(void);
+#endif
 extern void loadcam_entry(unsigned int index);
 struct tlbcam {
diff --git a/arch/powerpc/mm/numa.c b/arch/powerpc/mm/numa.c
index 002878ccf90b..2164006fe170 100644
--- a/arch/powerpc/mm/numa.c
+++ b/arch/powerpc/mm/numa.c
@@ -20,10 +20,15 @@
 #include <linux/memblock.h>
 #include <linux/of.h>
 #include <linux/pfn.h>
+#include <linux/cpuset.h>
+#include <linux/node.h>
 #include <asm/sparsemem.h>
 #include <asm/prom.h>
 #include <asm/system.h>
 #include <asm/smp.h>
+#include <asm/firmware.h>
+#include <asm/paca.h>
+#include <asm/hvcall.h>
 static int numa_enabled = 1;
@@ -163,7 +168,7 @@ static void __init get_node_active_region(unsigned long start_pfn,
        work_with_active_regions(nid, get_active_region_work_fn, node_ar);
 }
-static void __cpuinit map_cpu_to_node(int cpu, int node)
+static void map_cpu_to_node(int cpu, int node)
 {
        numa_cpu_lookup_table[cpu] = node;
@@ -173,7 +178,7 @@ static void __cpuinit map_cpu_to_node(int cpu, int node)
                cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
 }
-#ifdef CONFIG_HOTPLUG_CPU
+#if defined(CONFIG_HOTPLUG_CPU) || defined(CONFIG_PPC_SPLPAR)
 static void unmap_cpu_from_node(unsigned long cpu)
 {
        int node = numa_cpu_lookup_table[cpu];
@@ -181,13 +186,13 @@ static void unmap_cpu_from_node(unsigned long cpu)
        dbg("removing cpu %lu from node %d\n", cpu, node);
        if (cpumask_test_cpu(cpu, node_to_cpumask_map[node])) {
-                cpumask_set_cpu(cpu, node_to_cpumask_map[node]);
+                cpumask_clear_cpu(cpu, node_to_cpumask_map[node]);
        } else {
                printk(KERN_ERR "WARNING: cpu %lu not found in node %d\n",
                       cpu, node);
        }
 }
-#endif /* CONFIG_HOTPLUG_CPU */
+#endif /* CONFIG_HOTPLUG_CPU || CONFIG_PPC_SPLPAR */
 /* must hold reference to node during call */
 static const int *of_get_associativity(struct device_node *dev)
@@ -246,32 +251,41 @@ static void initialize_distance_lookup_table(int nid,
 /* Returns nid in the range [0..MAX_NUMNODES-1], or -1 if no useful numa
 * info is found.
 */
-static int of_node_to_nid_single(struct device_node *device)
+static int associativity_to_nid(const unsigned int *associativity)
 {
        int nid = -1;
-        const unsigned int *tmp;
        if (min_common_depth == -1)
                goto out;
-        tmp = of_get_associativity(device);
+        if (associativity[0] >= min_common_depth)
-        if (!tmp)
+                nid = associativity[min_common_depth];
-                goto out;
-        if (tmp[0] >= min_common_depth)
-                nid = tmp[min_common_depth];
        /* POWER4 LPAR uses 0xffff as invalid node */
        if (nid == 0xffff || nid >= MAX_NUMNODES)
                nid = -1;
-        if (nid > 0 && tmp[0] >= distance_ref_points_depth)
+        if (nid > 0 && associativity[0] >= distance_ref_points_depth)
-                initialize_distance_lookup_table(nid, tmp);
+                initialize_distance_lookup_table(nid, associativity);
 out:
        return nid;
 }
+/* Returns the nid associated with the given device tree node,
+ * or -1 if not found.
+ */
+static int of_node_to_nid_single(struct device_node *device)
+{
+        int nid = -1;
+        const unsigned int *tmp;
+        tmp = of_get_associativity(device);
+        if (tmp)
+                nid = associativity_to_nid(tmp);
+        return nid;
+}
 /* Walk the device tree upwards, looking for an associativity id */
 int of_node_to_nid(struct device_node *device)
 {
@@ -297,14 +311,13 @@ EXPORT_SYMBOL_GPL(of_node_to_nid);
 static int __init find_min_common_depth(void)
 {
        int depth;
-        struct device_node *rtas_root;
        struct device_node *chosen;
+        struct device_node *root;
        const char *vec5;
-        rtas_root = of_find_node_by_path("/rtas");
+        root = of_find_node_by_path("/rtas");
+        if (!root)
-        if (!rtas_root)
+                root = of_find_node_by_path("/");
-                return -1;
        /*
         * This property is a set of 32-bit integers, each representing
@@ -318,7 +331,7 @@ static int __init find_min_common_depth(void)
         * NUMA boundary and the following are progressively less significant
         * boundaries. There can be more than one level of NUMA.
         */
-        distance_ref_points = of_get_property(rtas_root,
+        distance_ref_points = of_get_property(root,
                                        "ibm,associativity-reference-points",
                                        &distance_ref_points_depth);
@@ -362,11 +375,11 @@ static int __init find_min_common_depth(void)
                distance_ref_points_depth = MAX_DISTANCE_REF_POINTS;
        }
-        of_node_put(rtas_root);
+        of_node_put(root);
        return depth;
 err:
-        of_node_put(rtas_root);
+        of_node_put(root);
        return -1;
 }
@@ -426,11 +439,11 @@ static void read_drconf_cell(struct of_drconf_cell *drmem, const u32 **cellp)
 }
 /*
- * Retreive and validate the ibm,dynamic-memory property of the device tree.
+ * Retrieve and validate the ibm,dynamic-memory property of the device tree.
 *
 * The layout of the ibm,dynamic-memory property is a number N of memblock
 * list entries followed by N memblock list entries.  Each memblock list entry
- * contains information as layed out in the of_drconf_cell struct above.
+ * contains information as laid out in the of_drconf_cell struct above.
 */
 static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
 {
@@ -454,7 +467,7 @@ static int of_get_drconf_memory(struct device_node *memory, const u32 **dm)
 }
 /*
- * Retreive and validate the ibm,lmb-size property for drconf memory
+ * Retrieve and validate the ibm,lmb-size property for drconf memory
 * from the device tree.
 */
 static u64 of_get_lmb_size(struct device_node *memory)
@@ -476,7 +489,7 @@ struct assoc_arrays {
 };
 /*
- * Retreive and validate the list of associativity arrays for drconf
+ * Retrieve and validate the list of associativity arrays for drconf
 * memory from the ibm,associativity-lookup-arrays property of the
 * device tree..
 *
@@ -590,7 +603,7 @@ static int __cpuinit cpu_numa_callback(struct notifier_block *nfb,
 * Returns the size the region should have to enforce the memory limit.
 * This will either be the original value of size, a truncated value,
 * or zero. If the returned value of size is 0 the region should be
- * discarded as it lies wholy above the memory limit.
+ * discarded as it lies wholly above the memory limit.
 */
 static unsigned long __init numa_enforce_memory_limit(unsigned long start,
                                                      unsigned long size)
@@ -802,16 +815,17 @@ static void __init setup_nonnuma(void)
        unsigned long top_of_ram = memblock_end_of_DRAM();
        unsigned long total_ram = memblock_phys_mem_size();
        unsigned long start_pfn, end_pfn;
-        unsigned int i, nid = 0;
+        unsigned int nid = 0;
+        struct memblock_region *reg;
        printk(KERN_DEBUG "Top of RAM: 0x%lx, Total RAM: 0x%lx\n",
               top_of_ram, total_ram);
        printk(KERN_DEBUG "Memory hole size: %ldMB\n",
               (top_of_ram - total_ram) >> 20);
-        for (i = 0; i < memblock.memory.cnt; ++i) {
+        for_each_memblock(memory, reg) {
-                start_pfn = memblock.memory.region[i].base >> PAGE_SHIFT;
+                start_pfn = memblock_region_memory_base_pfn(reg);
-                end_pfn = start_pfn + memblock_size_pages(&memblock.memory, i);
+                end_pfn = memblock_region_memory_end_pfn(reg);
                fake_numa_create_new_node(end_pfn, &nid);
                add_active_range(nid, start_pfn, end_pfn);
@@ -947,11 +961,11 @@ static struct notifier_block __cpuinitdata ppc64_numa_nb = {
 static void mark_reserved_regions_for_nid(int nid)
 {
        struct pglist_data *node = NODE_DATA(nid);
-        int i;
+        struct memblock_region *reg;
-        for (i = 0; i < memblock.reserved.cnt; i++) {
+        for_each_memblock(reserved, reg) {
-                unsigned long physbase = memblock.reserved.region[i].base;
+                unsigned long physbase = reg->base;
-                unsigned long size = memblock.reserved.region[i].size;
+                unsigned long size = reg->size;
                unsigned long start_pfn = physbase >> PAGE_SHIFT;
                unsigned long end_pfn = PFN_UP(physbase + size);
                struct node_active_region node_ar;
@@ -1246,4 +1260,281 @@ int hot_add_scn_to_nid(unsigned long scn_addr)
        return nid;
 }
+static u64 hot_add_drconf_memory_max(void)
+{
+        struct device_node *memory = NULL;
+        unsigned int drconf_cell_cnt = 0;
+        u64 lmb_size = 0;
+        const u32 *dm = 0;
+        memory = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+        if (memory) {
+                drconf_cell_cnt = of_get_drconf_memory(memory, &dm);
+                lmb_size = of_get_lmb_size(memory);
+                of_node_put(memory);
+        }
+        return lmb_size * drconf_cell_cnt;
+}
+/*
+ * memory_hotplug_max - return max address of memory that may be added
+ *
+ * This is currently only used on systems that support drconfig memory
+ * hotplug.
+ */
+u64 memory_hotplug_max(void)
+{
+        return max(hot_add_drconf_memory_max(), memblock_end_of_DRAM());
+}
 #endif /* CONFIG_MEMORY_HOTPLUG */
+/* Virtual Processor Home Node (VPHN) support */
+#ifdef CONFIG_PPC_SPLPAR
+static u8 vphn_cpu_change_counts[NR_CPUS][MAX_DISTANCE_REF_POINTS];
+static cpumask_t cpu_associativity_changes_mask;
+static int vphn_enabled;
+static void set_topology_timer(void);
+/*
+ * Store the current values of the associativity change counters in the
+ * hypervisor.
+ */
+static void setup_cpu_associativity_change_counters(void)
+{
+        int cpu;
+        /* The VPHN feature supports a maximum of 8 reference points */
+        BUILD_BUG_ON(MAX_DISTANCE_REF_POINTS > 8);
+        for_each_possible_cpu(cpu) {
+                int i;
+                u8 *counts = vphn_cpu_change_counts[cpu];
+                volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
+                for (i = 0; i < distance_ref_points_depth; i++)
+                        counts[i] = hypervisor_counts[i];
+        }
+}
+/*
+ * The hypervisor maintains a set of 8 associativity change counters in
+ * the VPA of each cpu that correspond to the associativity levels in the
+ * ibm,associativity-reference-points property. When an associativity
+ * level changes, the corresponding counter is incremented.
+ *
+ * Set a bit in cpu_associativity_changes_mask for each cpu whose home
+ * node associativity levels have changed.
+ *
+ * Returns the number of cpus with unhandled associativity changes.
+ */
+static int update_cpu_associativity_changes_mask(void)
+{
+        int cpu, nr_cpus = 0;
+        cpumask_t *changes = &cpu_associativity_changes_mask;
+        cpumask_clear(changes);
+        for_each_possible_cpu(cpu) {
+                int i, changed = 0;
+                u8 *counts = vphn_cpu_change_counts[cpu];
+                volatile u8 *hypervisor_counts = lppaca[cpu].vphn_assoc_counts;
+                for (i = 0; i < distance_ref_points_depth; i++) {
+                        if (hypervisor_counts[i] != counts[i]) {
+                                counts[i] = hypervisor_counts[i];
+                                changed = 1;
+                        }
+                }
+                if (changed) {
+                        cpumask_set_cpu(cpu, changes);
+                        nr_cpus++;
+                }
+        }
+        return nr_cpus;
+}
+/*
+ * 6 64-bit registers unpacked into 12 32-bit associativity values. To form
+ * the complete property we have to add the length in the first cell.
+ */
+#define VPHN_ASSOC_BUFSIZE (6*sizeof(u64)/sizeof(u32) + 1)
+/*
+ * Convert the associativity domain numbers returned from the hypervisor
+ * to the sequence they would appear in the ibm,associativity property.
+ */
+static int vphn_unpack_associativity(const long *packed, unsigned int *unpacked)
+{
+        int i, nr_assoc_doms = 0;
+        const u16 *field = (const u16*) packed;
+#define VPHN_FIELD_UNUSED       (0xffff)
+#define VPHN_FIELD_MSB          (0x8000)
+#define VPHN_FIELD_MASK         (~VPHN_FIELD_MSB)
+        for (i = 1; i < VPHN_ASSOC_BUFSIZE; i++) {
+                if (*field == VPHN_FIELD_UNUSED) {
+                        /* All significant fields processed, and remaining
+                         * fields contain the reserved value of all 1's.
+                         * Just store them.
+                         */
+                        unpacked[i] = *((u32*)field);
+                        field += 2;
+                } else if (*field & VPHN_FIELD_MSB) {
+                        /* Data is in the lower 15 bits of this field */
+                        unpacked[i] = *field & VPHN_FIELD_MASK;
+                        field++;
+                        nr_assoc_doms++;
+                } else {
+                        /* Data is in the lower 15 bits of this field
+                         * concatenated with the next 16 bit field
+                         */
+                        unpacked[i] = *((u32*)field);
+                        field += 2;
+                        nr_assoc_doms++;
+                }
+        }
+        /* The first cell contains the length of the property */
+        unpacked[0] = nr_assoc_doms;
+        return nr_assoc_doms;
+}
+/*
+ * Retrieve the new associativity information for a virtual processor's
+ * home node.
+ */
+static long hcall_vphn(unsigned long cpu, unsigned int *associativity)
+{
+        long rc;
+        long retbuf[PLPAR_HCALL9_BUFSIZE] = {0};
+        u64 flags = 1;
+        int hwcpu = get_hard_smp_processor_id(cpu);
+        rc = plpar_hcall9(H_HOME_NODE_ASSOCIATIVITY, retbuf, flags, hwcpu);
+        vphn_unpack_associativity(retbuf, associativity);
+        return rc;
+}
+static long vphn_get_associativity(unsigned long cpu,
+                                        unsigned int *associativity)
+{
+        long rc;
+        rc = hcall_vphn(cpu, associativity);
+        switch (rc) {
+        case H_FUNCTION:
+                printk(KERN_INFO
+                        "VPHN is not supported. Disabling polling...\n");
+                stop_topology_update();
+                break;
+        case H_HARDWARE:
+                printk(KERN_ERR
+                        "hcall_vphn() experienced a hardware fault "
+                        "preventing VPHN. Disabling polling...\n");
+                stop_topology_update();
+        }
+        return rc;
+}
+/*
+ * Update the node maps and sysfs entries for each cpu whose home node
+ * has changed.
+ */
+int arch_update_cpu_topology(void)
+{
+        int cpu, nid, old_nid;
+        unsigned int associativity[VPHN_ASSOC_BUFSIZE] = {0};
+        struct sys_device *sysdev;
+        for_each_cpu(cpu,&cpu_associativity_changes_mask) {
+                vphn_get_associativity(cpu, associativity);
+                nid = associativity_to_nid(associativity);
+                if (nid < 0 || !node_online(nid))
+                        nid = first_online_node;
+                old_nid = numa_cpu_lookup_table[cpu];
+                /* Disable hotplug while we update the cpu
+                 * masks and sysfs.
+                 */
+                get_online_cpus();
+                unregister_cpu_under_node(cpu, old_nid);
+                unmap_cpu_from_node(cpu);
+                map_cpu_to_node(cpu, nid);
+                register_cpu_under_node(cpu, nid);
+                put_online_cpus();
+                sysdev = get_cpu_sysdev(cpu);
+                if (sysdev)
+                        kobject_uevent(&sysdev->kobj, KOBJ_CHANGE);
+        }
+        return 1;
+}
+static void topology_work_fn(struct work_struct *work)
+{
+        rebuild_sched_domains();
+}
+static DECLARE_WORK(topology_work, topology_work_fn);
+void topology_schedule_update(void)
+{
+        schedule_work(&topology_work);
+}
+static void topology_timer_fn(unsigned long ignored)
+{
+        if (!vphn_enabled)
+                return;
+        if (update_cpu_associativity_changes_mask() > 0)
+                topology_schedule_update();
+        set_topology_timer();
+}
+static struct timer_list topology_timer =
+        TIMER_INITIALIZER(topology_timer_fn, 0, 0);
+static void set_topology_timer(void)
+{
+        topology_timer.data = 0;
+        topology_timer.expires = jiffies + 60 * HZ;
+        add_timer(&topology_timer);
+}
+/*
+ * Start polling for VPHN associativity changes.
+ */
+int start_topology_update(void)
+{
+        int rc = 0;
+        /* Disabled until races with load balancing are fixed */
+        if (0 && firmware_has_feature(FW_FEATURE_VPHN) &&
+            get_lppaca()->shared_proc) {
+                vphn_enabled = 1;
+                setup_cpu_associativity_change_counters();
+                init_timer_deferrable(&topology_timer);
+                set_topology_timer();
+                rc = 1;
+        }
+        return rc;
+}
+__initcall(start_topology_update);
+/*
+ * Disable polling for VPHN associativity changes.
+ */
+int stop_topology_update(void)
+{
+        vphn_enabled = 0;
+        return del_timer_sync(&topology_timer);
+}
+#endif /* CONFIG_PPC_SPLPAR */
diff --git a/arch/powerpc/mm/pgtable.c b/arch/powerpc/mm/pgtable.c
index 2c7e801ab20b..af40c8768a78 100644
--- a/arch/powerpc/mm/pgtable.c
+++ b/arch/powerpc/mm/pgtable.c
@@ -33,110 +33,6 @@
 #include "mmu_decl.h"
-DEFINE_PER_CPU(struct mmu_gather, mmu_gathers);
-#ifdef CONFIG_SMP
-/*
- * Handle batching of page table freeing on SMP. Page tables are
- * queued up and send to be freed later by RCU in order to avoid
- * freeing a page table page that is being walked without locks
- */
-static DEFINE_PER_CPU(struct pte_freelist_batch *, pte_freelist_cur);
-static unsigned long pte_freelist_forced_free;
-struct pte_freelist_batch
-{
-        struct rcu_head rcu;
-        unsigned int    index;
-        unsigned long   tables[0];
-};
-#define PTE_FREELIST_SIZE \
-        ((PAGE_SIZE - sizeof(struct pte_freelist_batch)) \
-          / sizeof(unsigned long))
-static void pte_free_smp_sync(void *arg)
-{
-        /* Do nothing, just ensure we sync with all CPUs */
-}
-/* This is only called when we are critically out of memory
- * (and fail to get a page in pte_free_tlb).
- */
-static void pgtable_free_now(void *table, unsigned shift)
-{
-        pte_freelist_forced_free++;
-        smp_call_function(pte_free_smp_sync, NULL, 1);
-        pgtable_free(table, shift);
-}
-static void pte_free_rcu_callback(struct rcu_head *head)
-{
-        struct pte_freelist_batch *batch =
-                container_of(head, struct pte_freelist_batch, rcu);
-        unsigned int i;
-        for (i = 0; i < batch->index; i++) {
-                void *table = (void *)(batch->tables[i] & ~MAX_PGTABLE_INDEX_SIZE);
-                unsigned shift = batch->tables[i] & MAX_PGTABLE_INDEX_SIZE;
-                pgtable_free(table, shift);
-        }
-        free_page((unsigned long)batch);
-}
-static void pte_free_submit(struct pte_freelist_batch *batch)
-{
-        call_rcu(&batch->rcu, pte_free_rcu_callback);
-}
-void pgtable_free_tlb(struct mmu_gather *tlb, void *table, unsigned shift)
-{
-        /* This is safe since tlb_gather_mmu has disabled preemption */
-        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
-        unsigned long pgf;
-        if (atomic_read(&tlb->mm->mm_users) < 2 ||
-            cpumask_equal(mm_cpumask(tlb->mm), cpumask_of(smp_processor_id()))){
-                pgtable_free(table, shift);
-                return;
-        }
-        if (*batchp == NULL) {
-                *batchp = (struct pte_freelist_batch *)__get_free_page(GFP_ATOMIC);
-                if (*batchp == NULL) {
-                        pgtable_free_now(table, shift);
-                        return;
-                }
-                (*batchp)->index = 0;
-        }
-        BUG_ON(shift > MAX_PGTABLE_INDEX_SIZE);
-        pgf = (unsigned long)table | shift;
-        (*batchp)->tables[(*batchp)->index++] = pgf;
-        if ((*batchp)->index == PTE_FREELIST_SIZE) {
-                pte_free_submit(*batchp);
-                *batchp = NULL;
-        }
-}
-void pte_free_finish(void)
-{
-        /* This is safe since tlb_gather_mmu has disabled preemption */
-        struct pte_freelist_batch **batchp = &__get_cpu_var(pte_freelist_cur);
-        if (*batchp == NULL)
-                return;
-        pte_free_submit(*batchp);
-        *batchp = NULL;
-}
-#endif /* CONFIG_SMP */
 static inline int is_exec_fault(void)
 {
        return current->thread.regs && TRAP(current->thread.regs) == 0x400;
diff --git a/arch/powerpc/mm/pgtable_32.c b/arch/powerpc/mm/pgtable_32.c
index a87ead0138b4..51f87956f8f8 100644
--- a/arch/powerpc/mm/pgtable_32.c
+++ b/arch/powerpc/mm/pgtable_32.c
@@ -78,7 +78,7 @@ pgd_t *pgd_alloc(struct mm_struct *mm)
        /* pgdir take page or two with 4K pages and a page fraction otherwise */
 #ifndef CONFIG_PPC_4K_PAGES
-        ret = (pgd_t *)kzalloc(1 << PGDIR_ORDER, GFP_KERNEL);
+        ret = kzalloc(1 << PGDIR_ORDER, GFP_KERNEL);
 #else
        ret = (pgd_t *)__get_free_pages(GFP_KERNEL|__GFP_ZERO,
                        PGDIR_ORDER - PAGE_SHIFT);
@@ -133,7 +133,15 @@ ioremap(phys_addr_t addr, unsigned long size)
 EXPORT_SYMBOL(ioremap);
 void __iomem *
-ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags)
+ioremap_wc(phys_addr_t addr, unsigned long size)
+{
+        return __ioremap_caller(addr, size, _PAGE_NO_CACHE,
+                                __builtin_return_address(0));
+}
+EXPORT_SYMBOL(ioremap_wc);
+void __iomem *
+ioremap_prot(phys_addr_t addr, unsigned long size, unsigned long flags)
 {
        /* writeable implies dirty for kernel addresses */
        if (flags & _PAGE_RW)
@@ -152,7 +160,7 @@ ioremap_flags(phys_addr_t addr, unsigned long size, unsigned long flags)
        return __ioremap_caller(addr, size, flags, __builtin_return_address(0));
 }
-EXPORT_SYMBOL(ioremap_flags);
+EXPORT_SYMBOL(ioremap_prot);
 void __iomem *
 __ioremap(phys_addr_t addr, unsigned long size, unsigned long flags)
@@ -230,6 +238,7 @@ __ioremap_caller(phys_addr_t addr, unsigned long size, unsigned long flags,
                area = get_vm_area_caller(size, VM_IOREMAP, caller);
                if (area == 0)
                        return NULL;
+                area->phys_addr = p;
                v = (unsigned long) area->addr;
        } else {
                v = (ioremap_bot -= size);
diff --git a/arch/powerpc/mm/pgtable_64.c b/arch/powerpc/mm/pgtable_64.c
index 21d6dfab7942..6e595f6496d4 100644
--- a/arch/powerpc/mm/pgtable_64.c
+++ b/arch/powerpc/mm/pgtable_64.c
@@ -223,6 +223,8 @@ void __iomem * __ioremap_caller(phys_addr_t addr, unsigned long size,
                                            caller);
                if (area == NULL)
                        return NULL;
+                area->phys_addr = paligned;
                ret = __ioremap_at(paligned, area->addr, size, flags);
                if (!ret)
                        vunmap(area->addr);
@@ -253,7 +255,17 @@ void __iomem * ioremap(phys_addr_t addr, unsigned long size)
        return __ioremap_caller(addr, size, flags, caller);
 }
-void __iomem * ioremap_flags(phys_addr_t addr, unsigned long size,
+void __iomem * ioremap_wc(phys_addr_t addr, unsigned long size)
+{
+        unsigned long flags = _PAGE_NO_CACHE;
+        void *caller = __builtin_return_address(0);
+        if (ppc_md.ioremap)
+                return ppc_md.ioremap(addr, size, flags, caller);
+        return __ioremap_caller(addr, size, flags, caller);
+}
+void __iomem * ioremap_prot(phys_addr_t addr, unsigned long size,
                             unsigned long flags)
 {
        void *caller = __builtin_return_address(0);
@@ -309,7 +321,8 @@ void iounmap(volatile void __iomem *token)
 }
 EXPORT_SYMBOL(ioremap);
-EXPORT_SYMBOL(ioremap_flags);
+EXPORT_SYMBOL(ioremap_wc);
+EXPORT_SYMBOL(ioremap_prot);
 EXPORT_SYMBOL(__ioremap);
 EXPORT_SYMBOL(__ioremap_at);
 EXPORT_SYMBOL(iounmap);
diff --git a/arch/powerpc/mm/ppc_mmu_32.c b/arch/powerpc/mm/ppc_mmu_32.c
index f8a01829d64f..11571e118831 100644
--- a/arch/powerpc/mm/ppc_mmu_32.c
+++ b/arch/powerpc/mm/ppc_mmu_32.c
@@ -223,8 +223,7 @@ void __init MMU_init_hw(void)
         * Find some memory for the hash table.
         */
        if ( ppc_md.progress ) ppc_md.progress("hash:find piece", 0x322);
-        Hash = __va(memblock_alloc_base(Hash_size, Hash_size,
+        Hash = __va(memblock_alloc(Hash_size, Hash_size));
-                                   __initial_memory_limit_addr));
        cacheable_memzero(Hash, Hash_size);
        _SDR1 = __pa(Hash) | SDR1_LOW_BITS;
@@ -272,3 +271,18 @@ void __init MMU_init_hw(void)
        if ( ppc_md.progress ) ppc_md.progress("hash:done", 0x205);
 }
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* We don't currently support the first MEMBLOCK not mapping 0
+         * physical on those processors
+         */
+        BUG_ON(first_memblock_base != 0);
+        /* 601 can only access 16MB at the moment */
+        if (PVR_VER(mfspr(SPRN_PVR)) == 1)
+                memblock_set_current_limit(min_t(u64, first_memblock_size, 0x01000000));
+        else /* Anything else has 256M mapped */
+                memblock_set_current_limit(min_t(u64, first_memblock_size, 0x10000000));
+}
diff --git a/arch/powerpc/mm/slb.c b/arch/powerpc/mm/slb.c
index 1d98ecc8eecd..e22276cb67a4 100644
--- a/arch/powerpc/mm/slb.c
+++ b/arch/powerpc/mm/slb.c
@@ -24,6 +24,7 @@
 #include <asm/firmware.h>
 #include <linux/compiler.h>
 #include <asm/udbg.h>
+#include <asm/code-patching.h>
 extern void slb_allocate_realmode(unsigned long ea);
@@ -166,7 +167,7 @@ static inline int esids_match(unsigned long addr1, unsigned long addr2)
        int esid_1t_count;
        /* System is not 1T segment size capable. */
-        if (!cpu_has_feature(CPU_FTR_1T_SEGMENT))
+        if (!mmu_has_feature(MMU_FTR_1T_SEGMENT))
                return (GET_ESID(addr1) == GET_ESID(addr2));
        esid_1t_count = (((addr1 >> SID_SHIFT_1T) != 0) +
@@ -201,7 +202,7 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
         */
        hard_irq_disable();
        offset = get_paca()->slb_cache_ptr;
-        if (!cpu_has_feature(CPU_FTR_NO_SLBIE_B) &&
+        if (!mmu_has_feature(MMU_FTR_NO_SLBIE_B) &&
            offset <= SLB_CACHE_ENTRIES) {
                int i;
                asm volatile("isync" : : : "memory");
@@ -249,9 +250,8 @@ void switch_slb(struct task_struct *tsk, struct mm_struct *mm)
 static inline void patch_slb_encoding(unsigned int *insn_addr,
                                      unsigned int immed)
 {
-        *insn_addr = (*insn_addr & 0xffff0000) | immed;
+        int insn = (*insn_addr & 0xffff0000) | immed;
-        flush_icache_range((unsigned long)insn_addr, 4+
+        patch_instruction(insn_addr, insn);
-                           (unsigned long)insn_addr);
 }
 void slb_set_size(u16 size)
diff --git a/arch/powerpc/mm/slb_low.S b/arch/powerpc/mm/slb_low.S
index 95ce35581696..ef653dc95b65 100644
--- a/arch/powerpc/mm/slb_low.S
+++ b/arch/powerpc/mm/slb_low.S
@@ -58,7 +58,7 @@ _GLOBAL(slb_miss_kernel_load_linear)
        li      r11,0
 BEGIN_FTR_SECTION
        b       slb_finish_load
-END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
        b       slb_finish_load_1T
 1:
@@ -87,7 +87,7 @@ _GLOBAL(slb_miss_kernel_load_vmemmap)
 6:
 BEGIN_FTR_SECTION
        b       slb_finish_load
-END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFCLR(MMU_FTR_1T_SEGMENT)
        b       slb_finish_load_1T
 0:      /* user address: proto-VSID = context << 15 | ESID. First check
@@ -138,11 +138,11 @@ END_FTR_SECTION_IFCLR(CPU_FTR_1T_SEGMENT)
        ld      r9,PACACONTEXTID(r13)
 BEGIN_FTR_SECTION
        cmpldi  r10,0x1000
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        rldimi  r10,r9,USER_ESID_BITS,0
 BEGIN_FTR_SECTION
        bge     slb_finish_load_1T
-END_FTR_SECTION_IFSET(CPU_FTR_1T_SEGMENT)
+END_MMU_FTR_SECTION_IFSET(MMU_FTR_1T_SEGMENT)
        b       slb_finish_load
 8:      /* invalid EA */
diff --git a/arch/powerpc/mm/stab.c b/arch/powerpc/mm/stab.c
index 446a01842a73..41e31642a86a 100644
--- a/arch/powerpc/mm/stab.c
+++ b/arch/powerpc/mm/stab.c
@@ -243,7 +243,7 @@ void __init stabs_alloc(void)
 {
        int cpu;
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                return;
        for_each_possible_cpu(cpu) {
diff --git a/arch/powerpc/mm/tlb_hash32.c b/arch/powerpc/mm/tlb_hash32.c
index 690566b66e8e..27b863c14941 100644
--- a/arch/powerpc/mm/tlb_hash32.c
+++ b/arch/powerpc/mm/tlb_hash32.c
@@ -71,9 +71,6 @@ void tlb_flush(struct mmu_gather *tlb)
                 */
                _tlbia();
        }
-        /* Push out batch of freed page tables */
-        pte_free_finish();
 }
 /*
diff --git a/arch/powerpc/mm/tlb_hash64.c b/arch/powerpc/mm/tlb_hash64.c
index 1ec06576f619..31f18207970b 100644
--- a/arch/powerpc/mm/tlb_hash64.c
+++ b/arch/powerpc/mm/tlb_hash64.c
@@ -38,13 +38,11 @@ DEFINE_PER_CPU(struct ppc64_tlb_batch, ppc64_tlb_batch);
 * neesd to be flushed. This function will either perform the flush
 * immediately or will batch it up if the current CPU has an active
 * batch on it.
- *
- * Must be called from within some kind of spinlock/non-preempt region...
 */
 void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
                     pte_t *ptep, unsigned long pte, int huge)
 {
-        struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
+        struct ppc64_tlb_batch *batch = &get_cpu_var(ppc64_tlb_batch);
        unsigned long vsid, vaddr;
        unsigned int psize;
        int ssize;
@@ -99,6 +97,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
         */
        if (!batch->active) {
                flush_hash_page(vaddr, rpte, psize, ssize, 0);
+                put_cpu_var(ppc64_tlb_batch);
                return;
        }
@@ -127,6 +126,7 @@ void hpte_need_flush(struct mm_struct *mm, unsigned long addr,
        batch->index = ++i;
        if (i >= PPC64_TLB_BATCH_NR)
                __flush_tlb_pending(batch);
+        put_cpu_var(ppc64_tlb_batch);
 }
 /*
@@ -155,7 +155,7 @@ void __flush_tlb_pending(struct ppc64_tlb_batch *batch)
 void tlb_flush(struct mmu_gather *tlb)
 {
-        struct ppc64_tlb_batch *tlbbatch = &__get_cpu_var(ppc64_tlb_batch);
+        struct ppc64_tlb_batch *tlbbatch = &get_cpu_var(ppc64_tlb_batch);
        /* If there's a TLB batch pending, then we must flush it because the
         * pages are going to be freed and we really don't want to have a CPU
@@ -164,8 +164,7 @@ void tlb_flush(struct mmu_gather *tlb)
        if (tlbbatch->index)
                __flush_tlb_pending(tlbbatch);
-        /* Push out batch of freed page tables */
+        put_cpu_var(ppc64_tlb_batch);
-        pte_free_finish();
 }
 /**
diff --git a/arch/powerpc/mm/tlb_low_64e.S b/arch/powerpc/mm/tlb_low_64e.S
index 8b04c54e596f..af0892209417 100644
--- a/arch/powerpc/mm/tlb_low_64e.S
+++ b/arch/powerpc/mm/tlb_low_64e.S
@@ -138,8 +138,11 @@
        cmpldi  cr0,r15,0                       /* Check for user region */
        std     r14,EX_TLB_ESR(r12)             /* write crazy -1 to frame */
        beq     normal_tlb_miss
+        li      r11,_PAGE_PRESENT|_PAGE_BAP_SX  /* Base perm */
+        oris    r11,r11,_PAGE_ACCESSED@h
        /* XXX replace the RMW cycles with immediate loads + writes */
-1:      mfspr   r10,SPRN_MAS1
+        mfspr   r10,SPRN_MAS1
        cmpldi  cr0,r15,8                       /* Check for vmalloc region */
        rlwinm  r10,r10,0,16,1                  /* Clear TID */
        mtspr   SPRN_MAS1,r10
@@ -189,7 +192,7 @@ normal_tlb_miss:
        or      r10,r15,r14
 BEGIN_MMU_FTR_SECTION
-        /* Set the TLB reservation and seach for existing entry. Then load
+        /* Set the TLB reservation and search for existing entry. Then load
         * the entry.
         */
        PPC_TLBSRX_DOT(0,r16)
@@ -422,13 +425,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_USE_TLBRSRV)
 virt_page_table_tlb_miss_fault:
        /* If we fault here, things are a little bit tricky. We need to call
-         * either data or instruction store fault, and we need to retreive
+         * either data or instruction store fault, and we need to retrieve
         * the original fault address and ESR (for data).
         *
         * The thing is, we know that in normal circumstances, this is
         * always called as a second level tlb miss for SW load or as a first
         * level TLB miss for HW load, so we should be able to peek at the
-         * relevant informations in the first exception frame in the PACA.
+         * relevant information in the first exception frame in the PACA.
         *
         * However, we do need to double check that, because we may just hit
         * a stray kernel pointer or a userland attack trying to hit those
diff --git a/arch/powerpc/mm/tlb_nohash.c b/arch/powerpc/mm/tlb_nohash.c
index fe391e942521..0bdad3aecc67 100644
--- a/arch/powerpc/mm/tlb_nohash.c
+++ b/arch/powerpc/mm/tlb_nohash.c
@@ -299,9 +299,6 @@ EXPORT_SYMBOL(flush_tlb_range);
 void tlb_flush(struct mmu_gather *tlb)
 {
        flush_tlb_mm(tlb->mm);
-        /* Push out batch of freed page tables */
-        pte_free_finish();
 }
 /*
@@ -349,11 +346,47 @@ void tlb_flush_pgtable(struct mmu_gather *tlb, unsigned long address)
 static void setup_page_sizes(void)
 {
-        unsigned int tlb0cfg = mfspr(SPRN_TLB0CFG);
+        unsigned int tlb0cfg;
-        unsigned int tlb0ps = mfspr(SPRN_TLB0PS);
+        unsigned int tlb0ps;
-        unsigned int eptcfg = mfspr(SPRN_EPTCFG);
+        unsigned int eptcfg;
        int i, psize;
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        unsigned int mmucfg = mfspr(SPRN_MMUCFG);
+        if (((mmucfg & MMUCFG_MAVN) == MMUCFG_MAVN_V1) &&
+                (mmu_has_feature(MMU_FTR_TYPE_FSL_E))) {
+                unsigned int tlb1cfg = mfspr(SPRN_TLB1CFG);
+                unsigned int min_pg, max_pg;
+                min_pg = (tlb1cfg & TLBnCFG_MINSIZE) >> TLBnCFG_MINSIZE_SHIFT;
+                max_pg = (tlb1cfg & TLBnCFG_MAXSIZE) >> TLBnCFG_MAXSIZE_SHIFT;
+                for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
+                        struct mmu_psize_def *def;
+                        unsigned int shift;
+                        def = &mmu_psize_defs[psize];
+                        shift = def->shift;
+                        if (shift == 0)
+                                continue;
+                        /* adjust to be in terms of 4^shift Kb */
+                        shift = (shift - 10) >> 1;
+                        if ((shift >= min_pg) && (shift <= max_pg))
+                                def->flags |= MMU_PAGE_SIZE_DIRECT;
+                }
+                goto no_indirect;
+        }
+#endif
+        tlb0cfg = mfspr(SPRN_TLB0CFG);
+        tlb0ps = mfspr(SPRN_TLB0PS);
+        eptcfg = mfspr(SPRN_EPTCFG);
        /* Look for supported direct sizes */
        for (psize = 0; psize < MMU_PAGE_COUNT; ++psize) {
                struct mmu_psize_def *def = &mmu_psize_defs[psize];
@@ -505,10 +538,26 @@ static void __early_init_mmu(int boot_cpu)
         */
        linear_map_top = memblock_end_of_DRAM();
+#ifdef CONFIG_PPC_FSL_BOOK3E
+        if (mmu_has_feature(MMU_FTR_TYPE_FSL_E)) {
+                unsigned int num_cams;
+                /* use a quarter of the TLBCAM for bolted linear map */
+                num_cams = (mfspr(SPRN_TLB1CFG) & TLBnCFG_N_ENTRY) / 4;
+                linear_map_top = map_mem_in_cams(linear_map_top, num_cams);
+                /* limit memory so we dont have linear faults */
+                memblock_enforce_memory_limit(linear_map_top);
+                memblock_analyze();
+        }
+#endif
        /* A sync won't hurt us after mucking around with
         * the MMU configuration
         */
        mb();
+        memblock_set_current_limit(linear_map_top);
 }
 void __init early_init_mmu(void)
@@ -521,4 +570,18 @@ void __cpuinit early_init_mmu_secondary(void)
        __early_init_mmu(0);
 }
+void setup_initial_memory_limit(phys_addr_t first_memblock_base,
+                                phys_addr_t first_memblock_size)
+{
+        /* On Embedded 64-bit, we adjust the RMA size to match
+         * the bolted TLB entry. We know for now that only 1G
+         * entries are supported though that may eventually
+         * change. We crop it to the size of the first MEMBLOCK to
+         * avoid going over total available memory just in case...
+         */
+        ppc64_rma_size = min_t(u64, first_memblock_size, 0x40000000);
+        /* Finally limit subsequent allocations */
+        memblock_set_current_limit(first_memblock_base + ppc64_rma_size);
+}
 #endif /* CONFIG_PPC64 */
diff --git a/arch/powerpc/mm/tlb_nohash_low.S b/arch/powerpc/mm/tlb_nohash_low.S
index b9d9fed8f36e..7c63c0ed4f1b 100644
--- a/arch/powerpc/mm/tlb_nohash_low.S
+++ b/arch/powerpc/mm/tlb_nohash_low.S
@@ -189,6 +189,13 @@ END_MMU_FTR_SECTION_IFSET(MMU_FTR_TYPE_47x)
        blr
 #ifdef CONFIG_PPC_47x
+/*
+ * 47x variant of icbt
+ */
+# define ICBT(CT,RA,RB) \
+        .long   0x7c00002c | ((CT) << 21) | ((RA) << 16) | ((RB) << 11)
 /*
 * _tlbivax_bcast is only on 47x. We don't bother doing a runtime
 * check though, it will blow up soon enough if we mistakenly try
@@ -206,7 +213,35 @@ _GLOBAL(_tlbivax_bcast)
        isync
        eieio
        tlbsync
+BEGIN_FTR_SECTION
+        b       1f
+END_FTR_SECTION_IFSET(CPU_FTR_476_DD2)
+        sync
+        wrtee   r10
+        blr
+/*
+ * DD2 HW could hang if in instruction fetch happens before msync completes.
+ * Touch enough instruction cache lines to ensure cache hits
+ */
+1:      mflr    r9
+        bl      2f
+2:      mflr    r6
+        li      r7,32
+        ICBT(0,r6,r7)           /* touch next cache line */
+        add     r6,r6,r7
+        ICBT(0,r6,r7)           /* touch next cache line */
+        add     r6,r6,r7
+        ICBT(0,r6,r7)           /* touch next cache line */
        sync
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        nop
+        mtlr    r9
        wrtee   r10
        blr
 #endif /* CONFIG_PPC_47x */
@@ -367,7 +402,7 @@ _GLOBAL(set_context)
 #error Unsupported processor type !
 #endif
-#if defined(CONFIG_FSL_BOOKE)
+#if defined(CONFIG_PPC_FSL_BOOK3E)
 /*
 * extern void loadcam_entry(unsigned int index)
 *
diff --git a/arch/powerpc/oprofile/Makefile b/arch/powerpc/oprofile/Makefile
index e219ca43962d..73456c4cec28 100644
--- a/arch/powerpc/oprofile/Makefile
+++ b/arch/powerpc/oprofile/Makefile
@@ -1,8 +1,6 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
-ifeq ($(CONFIG_PPC64),y)
+ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
-EXTRA_CFLAGS    += -mno-minimal-toc
-endif
 obj-$(CONFIG_OPROFILE) += oprofile.o
diff --git a/arch/powerpc/oprofile/backtrace.c b/arch/powerpc/oprofile/backtrace.c
index b4278cfd1f80..f75301f2c85f 100644
--- a/arch/powerpc/oprofile/backtrace.c
+++ b/arch/powerpc/oprofile/backtrace.c
@@ -105,7 +105,7 @@ void op_powerpc_backtrace(struct pt_regs * const regs, unsigned int depth)
                }
        } else {
 #ifdef CONFIG_PPC64
-                if (!test_thread_flag(TIF_32BIT)) {
+                if (!is_32bit_task()) {
                        while (depth--) {
                                sp = user_getsp64(sp, first_frame);
                                if (!sp)
diff --git a/arch/powerpc/oprofile/op_model_cell.c b/arch/powerpc/oprofile/op_model_cell.c
index 7fd90d02d8c6..cb515cff745c 100644
--- a/arch/powerpc/oprofile/op_model_cell.c
+++ b/arch/powerpc/oprofile/op_model_cell.c
@@ -67,7 +67,7 @@
 #define MAX_SPU_COUNT 0xFFFFFF  /* maximum 24 bit LFSR value */
-/* Minumum HW interval timer setting to send value to trace buffer is 10 cycle.
+/* Minimum HW interval timer setting to send value to trace buffer is 10 cycle.
 * To configure counter to send value every N cycles set counter to
 * 2^32 - 1 - N.
 */
@@ -1469,8 +1469,8 @@ static int cell_global_start(struct op_counter_config *ctr)
 * The pm_interval register is setup to write the SPU PC value into the
 * trace buffer at the maximum rate possible.  The trace buffer is configured
 * to store the PCs, wrapping when it is full.  The performance counter is
- * intialized to the max hardware count minus the number of events, N, between
+ * initialized to the max hardware count minus the number of events, N, between
- * samples.  Once the N events have occured, a HW counter overflow occurs
+ * samples.  Once the N events have occurred, a HW counter overflow occurs
 * causing the generation of a HW counter interrupt which also stops the
 * writing of the SPU PC values to the trace buffer.  Hence the last PC
 * written to the trace buffer is the SPU PC that we want.  Unfortunately,
@@ -1656,7 +1656,7 @@ static void cell_handle_interrupt_ppu(struct pt_regs *regs,
                 * The counters were frozen by the interrupt.
                 * Reenable the interrupt and restart the counters.
                 * If there was a race between the interrupt handler and
-                 * the virtual counter routine.  The virutal counter
+                 * the virtual counter routine.  The virtual counter
                 * routine may have cleared the interrupts.  Hence must
                 * use the virt_cntr_inter_mask to re-enable the interrupts.
                 */
diff --git a/arch/powerpc/oprofile/op_model_fsl_emb.c b/arch/powerpc/oprofile/op_model_fsl_emb.c
index 62312abffa28..d4e6507277b5 100644
--- a/arch/powerpc/oprofile/op_model_fsl_emb.c
+++ b/arch/powerpc/oprofile/op_model_fsl_emb.c
@@ -2,7 +2,7 @@
 * Freescale Embedded oprofile support, based on ppc64 oprofile support
 * Copyright (C) 2004 Anton Blanchard <anton@au.ibm.com>, IBM
 *
- * Copyright (c) 2004 Freescale Semiconductor, Inc
+ * Copyright (c) 2004, 2010 Freescale Semiconductor, Inc
 *
 * Author: Andy Fleming
 * Maintainer: Kumar Gala <galak@kernel.crashing.org>
@@ -321,9 +321,6 @@ static void fsl_emb_handle_interrupt(struct pt_regs *regs,
        int val;
        int i;
-        /* set the PMM bit (see comment below) */
-        mtmsr(mfmsr() | MSR_PMM);
        pc = regs->nip;
        is_kernel = is_kernel_addr(pc);
@@ -340,9 +337,13 @@ static void fsl_emb_handle_interrupt(struct pt_regs *regs,
        }
        /* The freeze bit was set by the interrupt. */
-        /* Clear the freeze bit, and reenable the interrupt.
+        /* Clear the freeze bit, and reenable the interrupt.  The
-         * The counters won't actually start until the rfi clears
+         * counters won't actually start until the rfi clears the PMM
-         * the PMM bit */
+         * bit.  The PMM bit should not be set until after the interrupt
+         * is cleared to avoid it getting lost in some hypervisor
+         * environments.
+         */
+        mtmsr(mfmsr() | MSR_PMM);
        pmc_start_ctrs(1);
 }
diff --git a/arch/powerpc/oprofile/op_model_power4.c b/arch/powerpc/oprofile/op_model_power4.c
index 80774092db77..e6bec74be131 100644
--- a/arch/powerpc/oprofile/op_model_power4.c
+++ b/arch/powerpc/oprofile/op_model_power4.c
@@ -207,7 +207,7 @@ static unsigned long get_pc(struct pt_regs *regs)
        unsigned long mmcra;
        unsigned long slot;
-        /* Cant do much about it */
+        /* Can't do much about it */
        if (!cur_cpu_spec->oprofile_mmcra_sihv)
                return pc;
@@ -261,6 +261,28 @@ static int get_kernel(unsigned long pc, unsigned long mmcra)
        return is_kernel;
 }
+static bool pmc_overflow(unsigned long val)
+{
+        if ((int)val < 0)
+                return true;
+        /*
+         * Events on POWER7 can roll back if a speculative event doesn't
+         * eventually complete. Unfortunately in some rare cases they will
+         * raise a performance monitor exception. We need to catch this to
+         * ensure we reset the PMC. In all cases the PMC will be 256 or less
+         * cycles from overflow.
+         *
+         * We only do this if the first pass fails to find any overflowing
+         * PMCs because a user might set a period of less than 256 and we
+         * don't want to mistakenly reset them.
+         */
+        if (__is_processor(PV_POWER7) && ((0x80000000 - val) <= 256))
+                return true;
+        return false;
+}
 static void power4_handle_interrupt(struct pt_regs *regs,
                                    struct op_counter_config *ctr)
 {
@@ -281,7 +303,7 @@ static void power4_handle_interrupt(struct pt_regs *regs,
        for (i = 0; i < cur_cpu_spec->num_pmcs; ++i) {
                val = classic_ctr_read(i);
-                if (val < 0) {
+                if (pmc_overflow(val)) {
                        if (oprofile_running && ctr[i].enabled) {
                                oprofile_add_ext_sample(pc, regs, i, is_kernel);
                                classic_ctr_write(i, reset_value[i]);
diff --git a/arch/powerpc/platforms/40x/Kconfig b/arch/powerpc/platforms/40x/Kconfig
index b72176434ebe..d733d7ca939c 100644
--- a/arch/powerpc/platforms/40x/Kconfig
+++ b/arch/powerpc/platforms/40x/Kconfig
@@ -57,6 +57,8 @@ config KILAUEA
        select 405EX
        select PPC40x_SIMPLE
        select PPC4xx_PCI_EXPRESS
+        select PCI_MSI
+        select PPC4xx_MSI
        help
          This option enables support for the AMCC PPC405EX evaluation board.
diff --git a/arch/powerpc/platforms/40x/ppc40x_simple.c b/arch/powerpc/platforms/40x/ppc40x_simple.c
index 546bbc229d19..2521d93ef136 100644
--- a/arch/powerpc/platforms/40x/ppc40x_simple.c
+++ b/arch/powerpc/platforms/40x/ppc40x_simple.c
@@ -50,7 +50,7 @@ machine_device_initcall(ppc40x_simple, ppc40x_device_probe);
 * Again, if your board needs to do things differently then create a
 * board.c file for it rather than adding it to this list.
 */
-static char *board[] __initdata = {
+static const char *board[] __initdata = {
        "amcc,acadia",
        "amcc,haleakala",
        "amcc,kilauea",
@@ -60,14 +60,9 @@ static char *board[] __initdata = {
 static int __init ppc40x_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        if (of_flat_dt_match(of_get_flat_dt_root(), board)) {
-        int i = 0;
+                ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
+                return 1;
-        for (i = 0; i < ARRAY_SIZE(board); i++) {
-                if (of_flat_dt_is_compatible(root, board[i])) {
-                        ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
-                        return 1;
-                }
        }
        return 0;
diff --git a/arch/powerpc/platforms/44x/44x.h b/arch/powerpc/platforms/44x/44x.h
index dbc4d2b4301a..63f703ecd23c 100644
--- a/arch/powerpc/platforms/44x/44x.h
+++ b/arch/powerpc/platforms/44x/44x.h
@@ -4,4 +4,8 @@
 extern u8 as1_readb(volatile u8 __iomem  *addr);
 extern void as1_writeb(u8 data, volatile u8 __iomem *addr);
+#define GPIO0_OSRH      0xC
+#define GPIO0_TSRH      0x14
+#define GPIO0_ISR1H     0x34
 #endif /* __POWERPC_PLATFORMS_44X_44X_H */
diff --git a/arch/powerpc/platforms/44x/Kconfig b/arch/powerpc/platforms/44x/Kconfig
index 69d668c072ae..e958b6f48ec2 100644
--- a/arch/powerpc/platforms/44x/Kconfig
+++ b/arch/powerpc/platforms/44x/Kconfig
@@ -17,6 +17,16 @@ config BAMBOO
        help
          This option enables support for the IBM PPC440EP evaluation board.
+config BLUESTONE
+        bool "Bluestone"
+        depends on 44x
+        default n
+        select PPC44x_SIMPLE
+        select APM821xx
+        select IBM_NEW_EMAC_RGMII
+        help
+          This option enables support for the APM APM821xx Evaluation board.
 config EBONY
        bool "Ebony"
        depends on 44x
@@ -64,6 +74,8 @@ config KATMAI
        select 440SPe
        select PCI
        select PPC4xx_PCI_EXPRESS
+        select PCI_MSI
+        select PCC4xx_MSI
        help
          This option enables support for the AMCC PPC440SPe evaluation board.
@@ -105,10 +117,11 @@ config CANYONLANDS
        bool "Canyonlands"
        depends on 44x
        default n
-        select PPC44x_SIMPLE
        select 460EX
        select PCI
        select PPC4xx_PCI_EXPRESS
+        select PCI_MSI
+        select PPC4xx_MSI
        select IBM_NEW_EMAC_RGMII
        select IBM_NEW_EMAC_ZMII
        help
@@ -135,6 +148,8 @@ config REDWOOD
        select 460SX
        select PCI
        select PPC4xx_PCI_EXPRESS
+        select PCI_MSI
+        select PPC4xx_MSI
        help
          This option enables support for the AMCC PPC460SX Redwood board.
@@ -293,6 +308,12 @@ config 460SX
        select IBM_NEW_EMAC_ZMII
        select IBM_NEW_EMAC_TAH
+config APM821xx
+        bool
+        select PPC_FPU
+        select IBM_NEW_EMAC_EMAC4
+        select IBM_NEW_EMAC_TAH
 # 44x errata/workaround config symbols, selected by the CPU models above
 config IBM440EP_ERR42
        bool
diff --git a/arch/powerpc/platforms/44x/Makefile b/arch/powerpc/platforms/44x/Makefile
index 82ff326e0795..553db6007217 100644
--- a/arch/powerpc/platforms/44x/Makefile
+++ b/arch/powerpc/platforms/44x/Makefile
@@ -1,4 +1,7 @@
-obj-$(CONFIG_44x)       := misc_44x.o idle.o
+obj-$(CONFIG_44x)       += misc_44x.o
+ifneq ($(CONFIG_PPC4xx_CPM),y)
+obj-$(CONFIG_44x)       += idle.o
+endif
 obj-$(CONFIG_PPC44x_SIMPLE) += ppc44x_simple.o
 obj-$(CONFIG_EBONY)     += ebony.o
 obj-$(CONFIG_SAM440EP)  += sam440ep.o
@@ -6,3 +9,4 @@ obj-$(CONFIG_WARP)	+= warp.o
 obj-$(CONFIG_XILINX_VIRTEX_5_FXT) += virtex.o
 obj-$(CONFIG_XILINX_ML510) += virtex_ml510.o
 obj-$(CONFIG_ISS4xx)    += iss4xx.o
+obj-$(CONFIG_CANYONLANDS)+= canyonlands.o
diff --git a/arch/powerpc/platforms/44x/canyonlands.c b/arch/powerpc/platforms/44x/canyonlands.c
new file mode 100644
index 000000000000..afc5e8ea3775
--- /dev/null
+++ b/arch/powerpc/platforms/44x/canyonlands.c
@@ -0,0 +1,134 @@
+/*
+ * This contain platform specific code for APM PPC460EX based Canyonlands
+ * board.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Author: Rupjyoti Sarmah <rsarmah@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ *
+ */
+#include <linux/kernel.h>
+#include <linux/init.h>
+#include <asm/pci-bridge.h>
+#include <asm/ppc4xx.h>
+#include <asm/udbg.h>
+#include <asm/uic.h>
+#include <linux/of_platform.h>
+#include <linux/delay.h>
+#include "44x.h"
+#define BCSR_USB_EN     0x11
+static __initdata struct of_device_id ppc460ex_of_bus[] = {
+        { .compatible = "ibm,plb4", },
+        { .compatible = "ibm,opb", },
+        { .compatible = "ibm,ebc", },
+        { .compatible = "simple-bus", },
+        {},
+};
+static int __init ppc460ex_device_probe(void)
+{
+        of_platform_bus_probe(NULL, ppc460ex_of_bus, NULL);
+        return 0;
+}
+machine_device_initcall(canyonlands, ppc460ex_device_probe);
+/* Using this code only for the Canyonlands board.  */
+static int __init ppc460ex_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        if (of_flat_dt_is_compatible(root, "amcc,canyonlands")) {
+                ppc_pci_set_flags(PPC_PCI_REASSIGN_ALL_RSRC);
+                return 1;
+                }
+        return 0;
+}
+/* USB PHY fixup code on Canyonlands kit. */
+static int __init ppc460ex_canyonlands_fixup(void)
+{
+        u8 __iomem *bcsr ;
+        void __iomem *vaddr;
+        struct device_node *np;
+        int ret = 0;
+        np = of_find_compatible_node(NULL, NULL, "amcc,ppc460ex-bcsr");
+        if (!np) {
+                printk(KERN_ERR "failed did not find amcc, ppc460ex bcsr node\n");
+                return -ENODEV;
+        }
+        bcsr = of_iomap(np, 0);
+        of_node_put(np);
+        if (!bcsr) {
+                printk(KERN_CRIT "Could not remap bcsr\n");
+                ret = -ENODEV;
+                goto err_bcsr;
+        }
+        np = of_find_compatible_node(NULL, NULL, "ibm,ppc4xx-gpio");
+        if (!np) {
+                printk(KERN_ERR "failed did not find ibm,ppc4xx-gpio node\n");
+                return -ENODEV;
+        }
+        vaddr = of_iomap(np, 0);
+        of_node_put(np);
+        if (!vaddr) {
+                printk(KERN_CRIT "Could not get gpio node address\n");
+                ret = -ENODEV;
+                goto err_gpio;
+        }
+        /* Disable USB, through the BCSR7 bits */
+        setbits8(&bcsr[7], BCSR_USB_EN);
+        /* Wait for a while after reset */
+        msleep(100);
+        /* Enable USB here */
+        clrbits8(&bcsr[7], BCSR_USB_EN);
+        /*
+         * Configure multiplexed gpio16 and gpio19 as alternate1 output
+         * source after USB reset. In this configuration gpio16 will be
+         * USB2HStop and gpio19 will be USB2DStop. For more details refer to
+         * table 34-7 of PPC460EX user manual.
+         */
+        setbits32((vaddr + GPIO0_OSRH), 0x42000000);
+        setbits32((vaddr + GPIO0_TSRH), 0x42000000);
+err_gpio:
+        iounmap(vaddr);
+err_bcsr:
+        iounmap(bcsr);
+        return ret;
+}
+machine_device_initcall(canyonlands, ppc460ex_canyonlands_fixup);
+define_machine(canyonlands) {
+        .name = "Canyonlands",
+        .probe = ppc460ex_probe,
+        .progress = udbg_progress,
+        .init_IRQ = uic_init_tree,
+        .get_irq = uic_get_irq,
+        .restart = ppc4xx_reset_system,
+        .calibrate_decr = generic_calibrate_decr,
+};
diff --git a/arch/powerpc/platforms/44x/iss4xx.c b/arch/powerpc/platforms/44x/iss4xx.c
index aa46e9d1e771..19395f18b1db 100644
--- a/arch/powerpc/platforms/44x/iss4xx.c
+++ b/arch/powerpc/platforms/44x/iss4xx.c
@@ -87,7 +87,7 @@ static void __cpuinit smp_iss4xx_setup_cpu(int cpu)
        mpic_setup_this_cpu();
 }
-static void __cpuinit smp_iss4xx_kick_cpu(int cpu)
+static int __cpuinit smp_iss4xx_kick_cpu(int cpu)
 {
        struct device_node *cpunode = of_get_cpu_node(cpu, NULL);
        const u64 *spin_table_addr_prop;
@@ -104,7 +104,7 @@ static void __cpuinit smp_iss4xx_kick_cpu(int cpu)
                                               NULL);
        if (spin_table_addr_prop == NULL) {
                pr_err("CPU%d: Can't start, missing cpu-release-addr !\n", cpu);
-                return;
+                return -ENOENT;
        }
        /* Assume it's mapped as part of the linear mapping. This is a bit
@@ -117,6 +117,8 @@ static void __cpuinit smp_iss4xx_kick_cpu(int cpu)
        smp_wmb();
        spin_table[1] = __pa(start_secondary_47x);
        mb();
+        return 0;
 }
 static struct smp_ops_t iss_smp_ops = {
diff --git a/arch/powerpc/platforms/44x/ppc44x_simple.c b/arch/powerpc/platforms/44x/ppc44x_simple.c
index 5f7a29d7f590..c81c19c0b3d4 100644
--- a/arch/powerpc/platforms/44x/ppc44x_simple.c
+++ b/arch/powerpc/platforms/44x/ppc44x_simple.c
@@ -52,7 +52,7 @@ machine_device_initcall(ppc44x_simple, ppc44x_device_probe);
 static char *board[] __initdata = {
        "amcc,arches",
        "amcc,bamboo",
-        "amcc,canyonlands",
+        "amcc,bluestone",
        "amcc,glacier",
        "ibm,ebony",
        "amcc,eiger",
diff --git a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
index 4ecf4cf9a51b..9f09319352c0 100644
--- a/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
+++ b/arch/powerpc/platforms/512x/mpc5121_ads_cpld.c
@@ -59,9 +59,9 @@ irq_to_pic_bit(unsigned int irq)
 }
 static void
-cpld_mask_irq(unsigned int irq)
+cpld_mask_irq(struct irq_data *d)
 {
-        unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
        void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
        out_8(pic_mask,
@@ -69,9 +69,9 @@ cpld_mask_irq(unsigned int irq)
 }
 static void
-cpld_unmask_irq(unsigned int irq)
+cpld_unmask_irq(struct irq_data *d)
 {
-        unsigned int cpld_irq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpld_irq = (unsigned int)irqd_to_hwirq(d);
        void __iomem *pic_mask = irq_to_pic_mask(cpld_irq);
        out_8(pic_mask,
@@ -80,9 +80,9 @@ cpld_unmask_irq(unsigned int irq)
 static struct irq_chip cpld_pic = {
        .name = "CPLD PIC",
-        .mask = cpld_mask_irq,
+        .irq_mask = cpld_mask_irq,
-        .ack = cpld_mask_irq,
+        .irq_ack = cpld_mask_irq,
-        .unmask = cpld_unmask_irq,
+        .irq_unmask = cpld_unmask_irq,
 };
 static int
@@ -97,7 +97,7 @@ cpld_pic_get_irq(int offset, u8 ignore, u8 __iomem *statusp,
        status |= (ignore | mask);
        if (status == 0xff)
-                return NO_IRQ_IGNORE;
+                return NO_IRQ;
        cpld_irq = ffz(status) + offset;
@@ -109,14 +109,14 @@ cpld_pic_cascade(unsigned int irq, struct irq_desc *desc)
 {
        irq = cpld_pic_get_irq(0, PCI_IGNORE, &cpld_regs->pci_status,
                &cpld_regs->pci_mask);
-        if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+        if (irq != NO_IRQ) {
                generic_handle_irq(irq);
                return;
        }
        irq = cpld_pic_get_irq(8, MISC_IGNORE, &cpld_regs->misc_status,
                &cpld_regs->misc_mask);
-        if (irq != NO_IRQ && irq != NO_IRQ_IGNORE) {
+        if (irq != NO_IRQ) {
                generic_handle_irq(irq);
                return;
        }
@@ -132,8 +132,8 @@ static int
 cpld_pic_host_map(struct irq_host *h, unsigned int virq,
                             irq_hw_number_t hw)
 {
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &cpld_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &cpld_pic, handle_level_irq);
        return 0;
 }
@@ -198,7 +198,7 @@ mpc5121_ads_cpld_pic_init(void)
                goto end;
        }
-        set_irq_chained_handler(cascade_irq, cpld_pic_cascade);
+        irq_set_chained_handler(cascade_irq, cpld_pic_cascade);
 end:
        of_node_put(np);
 }
diff --git a/arch/powerpc/platforms/512x/mpc5121_generic.c b/arch/powerpc/platforms/512x/mpc5121_generic.c
index e487eb06ec6b..926731f1ff01 100644
--- a/arch/powerpc/platforms/512x/mpc5121_generic.c
+++ b/arch/powerpc/platforms/512x/mpc5121_generic.c
@@ -26,7 +26,7 @@
 /*
 * list of supported boards
 */
-static char *board[] __initdata = {
+static const char *board[] __initdata = {
        "prt,prtlvt",
        NULL
 };
@@ -36,16 +36,7 @@ static char *board[] __initdata = {
 */
 static int __init mpc5121_generic_probe(void)
 {
-        unsigned long node = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        int i = 0;
-        while (board[i]) {
-                if (of_flat_dt_is_compatible(node, board[i]))
-                        break;
-                i++;
-        }
-        return board[i] != NULL;
 }
 define_machine(mpc5121_generic) {
diff --git a/arch/powerpc/platforms/52xx/lite5200.c b/arch/powerpc/platforms/52xx/lite5200.c
index de55bc0584b5..01ffa64d2aa7 100644
--- a/arch/powerpc/platforms/52xx/lite5200.c
+++ b/arch/powerpc/platforms/52xx/lite5200.c
@@ -172,20 +172,18 @@ static void __init lite5200_setup_arch(void)
        mpc52xx_setup_pci();
 }
+static const char *board[] __initdata = {
+        "fsl,lite5200",
+        "fsl,lite5200b",
+        NULL,
+};
 /*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
 static int __init lite5200_probe(void)
 {
-        unsigned long node = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        const char *model = of_get_flat_dt_prop(node, "model", NULL);
-        if (!of_flat_dt_is_compatible(node, "fsl,lite5200") &&
-            !of_flat_dt_is_compatible(node, "fsl,lite5200b"))
-                return 0;
-        pr_debug("%s board found\n", model ? model : "unknown");
-        return 1;
 }
 define_machine(lite5200) {
diff --git a/arch/powerpc/platforms/52xx/lite5200_pm.c b/arch/powerpc/platforms/52xx/lite5200_pm.c
index 80234e5921f5..eda0fc2a3914 100644
--- a/arch/powerpc/platforms/52xx/lite5200_pm.c
+++ b/arch/powerpc/platforms/52xx/lite5200_pm.c
@@ -232,7 +232,7 @@ static void lite5200_pm_end(void)
        lite5200_pm_target_state = PM_SUSPEND_ON;
 }
-static struct platform_suspend_ops lite5200_pm_ops = {
+static const struct platform_suspend_ops lite5200_pm_ops = {
        .valid          = lite5200_pm_valid,
        .begin          = lite5200_pm_begin,
        .prepare        = lite5200_pm_prepare,
diff --git a/arch/powerpc/platforms/52xx/media5200.c b/arch/powerpc/platforms/52xx/media5200.c
index 0bac3a3dbecf..96f85e5e0cd3 100644
--- a/arch/powerpc/platforms/52xx/media5200.c
+++ b/arch/powerpc/platforms/52xx/media5200.c
@@ -49,45 +49,46 @@ struct media5200_irq {
 };
 struct media5200_irq media5200_irq;
-static void media5200_irq_unmask(unsigned int virq)
+static void media5200_irq_unmask(struct irq_data *d)
 {
        unsigned long flags;
        u32 val;
        spin_lock_irqsave(&media5200_irq.lock, flags);
        val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
-        val |= 1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq);
+        val |= 1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d));
        out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
        spin_unlock_irqrestore(&media5200_irq.lock, flags);
 }
-static void media5200_irq_mask(unsigned int virq)
+static void media5200_irq_mask(struct irq_data *d)
 {
        unsigned long flags;
        u32 val;
        spin_lock_irqsave(&media5200_irq.lock, flags);
        val = in_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE);
-        val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irq_map[virq].hwirq));
+        val &= ~(1 << (MEDIA5200_IRQ_SHIFT + irqd_to_hwirq(d)));
        out_be32(media5200_irq.regs + MEDIA5200_IRQ_ENABLE, val);
        spin_unlock_irqrestore(&media5200_irq.lock, flags);
 }
 static struct irq_chip media5200_irq_chip = {
        .name = "Media5200 FPGA",
-        .unmask = media5200_irq_unmask,
+        .irq_unmask = media5200_irq_unmask,
-        .mask = media5200_irq_mask,
+        .irq_mask = media5200_irq_mask,
-        .mask_ack = media5200_irq_mask,
+        .irq_mask_ack = media5200_irq_mask,
 };
 void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int sub_virq, val;
        u32 status, enable;
        /* Mask off the cascaded IRQ */
        raw_spin_lock(&desc->lock);
-        desc->chip->mask(virq);
+        chip->irq_mask(&desc->irq_data);
        raw_spin_unlock(&desc->lock);
        /* Ask the FPGA for IRQ status.  If 'val' is 0, then no irqs
@@ -105,24 +106,19 @@ void media5200_irq_cascade(unsigned int virq, struct irq_desc *desc)
        /* Processing done; can reenable the cascade now */
        raw_spin_lock(&desc->lock);
-        desc->chip->ack(virq);
+        chip->irq_ack(&desc->irq_data);
-        if (!(desc->status & IRQ_DISABLED))
+        if (!irqd_irq_disabled(&desc->irq_data))
-                desc->chip->unmask(virq);
+                chip->irq_unmask(&desc->irq_data);
        raw_spin_unlock(&desc->lock);
 }
 static int media5200_irq_map(struct irq_host *h, unsigned int virq,
                             irq_hw_number_t hw)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
        pr_debug("%s: h=%p, virq=%i, hwirq=%i\n", __func__, h, virq, (int)hw);
-        set_irq_chip_data(virq, &media5200_irq);
+        irq_set_chip_data(virq, &media5200_irq);
-        set_irq_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, &media5200_irq_chip, handle_level_irq);
-        set_irq_type(virq, IRQ_TYPE_LEVEL_LOW);
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= IRQ_TYPE_LEVEL_LOW | IRQ_LEVEL;
        return 0;
 }
@@ -186,8 +182,8 @@ static void __init media5200_init_irq(void)
        media5200_irq.irqhost->host_data = &media5200_irq;
-        set_irq_data(cascade_virq, &media5200_irq);
+        irq_set_handler_data(cascade_virq, &media5200_irq);
-        set_irq_chained_handler(cascade_virq, media5200_irq_cascade);
+        irq_set_chained_handler(cascade_virq, media5200_irq_cascade);
        return;
@@ -239,7 +235,7 @@ static void __init media5200_setup_arch(void)
 }
 /* list of the supported boards */
-static char *board[] __initdata = {
+static const char *board[] __initdata = {
        "fsl,media5200",
        NULL
 };
@@ -249,16 +245,7 @@ static char *board[] __initdata = {
 */
 static int __init media5200_probe(void)
 {
-        unsigned long node = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        int i = 0;
-        while (board[i]) {
-                if (of_flat_dt_is_compatible(node, board[i]))
-                        break;
-                i++;
-        }
-        return (board[i] != NULL);
 }
 define_machine(media5200_platform) {
diff --git a/arch/powerpc/platforms/52xx/mpc5200_simple.c b/arch/powerpc/platforms/52xx/mpc5200_simple.c
index d45be5b5ad49..e36d6e232ae6 100644
--- a/arch/powerpc/platforms/52xx/mpc5200_simple.c
+++ b/arch/powerpc/platforms/52xx/mpc5200_simple.c
@@ -49,7 +49,7 @@ static void __init mpc5200_simple_setup_arch(void)
 }
 /* list of the supported boards */
-static char *board[] __initdata = {
+static const char *board[] __initdata = {
        "intercontrol,digsy-mtc",
        "manroland,mucmc52",
        "manroland,uc101",
@@ -66,16 +66,7 @@ static char *board[] __initdata = {
 */
 static int __init mpc5200_simple_probe(void)
 {
-        unsigned long node = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        int i = 0;
-        while (board[i]) {
-                if (of_flat_dt_is_compatible(node, board[i]))
-                        break;
-                i++;
-        }
-        
-        return (board[i] != NULL);
 }
 define_machine(mpc5200_simple_platform) {
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
index 0dad9a935eb5..1757d1db4b51 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpio.c
@@ -147,8 +147,7 @@ mpc52xx_wkup_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
        return 0;
 }
-static int __devinit mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev,
+static int __devinit mpc52xx_wkup_gpiochip_probe(struct platform_device *ofdev)
-                                        const struct of_device_id *match)
 {
        struct mpc52xx_gpiochip *chip;
        struct mpc52xx_gpio_wkup __iomem *regs;
@@ -191,7 +190,7 @@ static const struct of_device_id mpc52xx_wkup_gpiochip_match[] = {
        {}
 };
-static struct of_platform_driver mpc52xx_wkup_gpiochip_driver = {
+static struct platform_driver mpc52xx_wkup_gpiochip_driver = {
        .driver = {
                .name = "gpio_wkup",
                .owner = THIS_MODULE,
@@ -310,8 +309,7 @@ mpc52xx_simple_gpio_dir_out(struct gpio_chip *gc, unsigned int gpio, int val)
        return 0;
 }
-static int __devinit mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev,
+static int __devinit mpc52xx_simple_gpiochip_probe(struct platform_device *ofdev)
-                                        const struct of_device_id *match)
 {
        struct mpc52xx_gpiochip *chip;
        struct gpio_chip *gc;
@@ -349,7 +347,7 @@ static const struct of_device_id mpc52xx_simple_gpiochip_match[] = {
        {}
 };
-static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
+static struct platform_driver mpc52xx_simple_gpiochip_driver = {
        .driver = {
                .name = "gpio",
                .owner = THIS_MODULE,
@@ -361,10 +359,10 @@ static struct of_platform_driver mpc52xx_simple_gpiochip_driver = {
 static int __init mpc52xx_gpio_init(void)
 {
-        if (of_register_platform_driver(&mpc52xx_wkup_gpiochip_driver))
+        if (platform_driver_register(&mpc52xx_wkup_gpiochip_driver))
                printk(KERN_ERR "Unable to register wakeup GPIO driver\n");
-        if (of_register_platform_driver(&mpc52xx_simple_gpiochip_driver))
+        if (platform_driver_register(&mpc52xx_simple_gpiochip_driver))
                printk(KERN_ERR "Unable to register simple GPIO driver\n");
        return 0;
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
index fea833e18ad5..6c39b9cc2fa3 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_gpt.c
@@ -63,6 +63,7 @@
 #include <linux/of_gpio.h>
 #include <linux/kernel.h>
 #include <linux/slab.h>
+#include <linux/fs.h>
 #include <linux/watchdog.h>
 #include <linux/miscdevice.h>
 #include <linux/uaccess.h>
@@ -134,9 +135,9 @@ DEFINE_MUTEX(mpc52xx_gpt_list_mutex);
 * Cascaded interrupt controller hooks
 */
-static void mpc52xx_gpt_irq_unmask(unsigned int virq)
+static void mpc52xx_gpt_irq_unmask(struct irq_data *d)
 {
-        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        spin_lock_irqsave(&gpt->lock, flags);
@@ -144,9 +145,9 @@ static void mpc52xx_gpt_irq_unmask(unsigned int virq)
        spin_unlock_irqrestore(&gpt->lock, flags);
 }
-static void mpc52xx_gpt_irq_mask(unsigned int virq)
+static void mpc52xx_gpt_irq_mask(struct irq_data *d)
 {
-        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        spin_lock_irqsave(&gpt->lock, flags);
@@ -154,20 +155,20 @@ static void mpc52xx_gpt_irq_mask(unsigned int virq)
        spin_unlock_irqrestore(&gpt->lock, flags);
 }
-static void mpc52xx_gpt_irq_ack(unsigned int virq)
+static void mpc52xx_gpt_irq_ack(struct irq_data *d)
 {
-        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        out_be32(&gpt->regs->status, MPC52xx_GPT_STATUS_IRQMASK);
 }
-static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_gpt_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct mpc52xx_gpt_priv *gpt = get_irq_chip_data(virq);
+        struct mpc52xx_gpt_priv *gpt = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        u32 reg;
-        dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, virq, flow_type);
+        dev_dbg(gpt->dev, "%s: virq=%i type=%x\n", __func__, d->irq, flow_type);
        spin_lock_irqsave(&gpt->lock, flags);
        reg = in_be32(&gpt->regs->mode) & ~MPC52xx_GPT_MODE_ICT_MASK;
@@ -183,15 +184,15 @@ static int mpc52xx_gpt_irq_set_type(unsigned int virq, unsigned int flow_type)
 static struct irq_chip mpc52xx_gpt_irq_chip = {
        .name = "MPC52xx GPT",
-        .unmask = mpc52xx_gpt_irq_unmask,
+        .irq_unmask = mpc52xx_gpt_irq_unmask,
-        .mask = mpc52xx_gpt_irq_mask,
+        .irq_mask = mpc52xx_gpt_irq_mask,
-        .ack = mpc52xx_gpt_irq_ack,
+        .irq_ack = mpc52xx_gpt_irq_ack,
-        .set_type = mpc52xx_gpt_irq_set_type,
+        .irq_set_type = mpc52xx_gpt_irq_set_type,
 };
 void mpc52xx_gpt_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
-        struct mpc52xx_gpt_priv *gpt = get_irq_data(virq);
+        struct mpc52xx_gpt_priv *gpt = irq_get_handler_data(virq);
        int sub_virq;
        u32 status;
@@ -208,8 +209,8 @@ static int mpc52xx_gpt_irq_map(struct irq_host *h, unsigned int virq,
        struct mpc52xx_gpt_priv *gpt = h->host_data;
        dev_dbg(gpt->dev, "%s: h=%p, virq=%i\n", __func__, h, virq);
-        set_irq_chip_data(virq, gpt);
+        irq_set_chip_data(virq, gpt);
-        set_irq_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
+        irq_set_chip_and_handler(virq, &mpc52xx_gpt_irq_chip, handle_edge_irq);
        return 0;
 }
@@ -258,8 +259,8 @@ mpc52xx_gpt_irq_setup(struct mpc52xx_gpt_priv *gpt, struct device_node *node)
        }
        gpt->irqhost->host_data = gpt;
-        set_irq_data(cascade_virq, gpt);
+        irq_set_handler_data(cascade_virq, gpt);
-        set_irq_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
+        irq_set_chained_handler(cascade_virq, mpc52xx_gpt_irq_cascade);
        /* If the GPT is currently disabled, then change it to be in Input
         * Capture mode.  If the mode is non-zero, then the pin could be
@@ -720,8 +721,7 @@ static inline int mpc52xx_gpt_wdt_setup(struct mpc52xx_gpt_priv *gpt,
 /* ---------------------------------------------------------------------
 * of_platform bus binding code
 */
-static int __devinit mpc52xx_gpt_probe(struct platform_device *ofdev,
+static int __devinit mpc52xx_gpt_probe(struct platform_device *ofdev)
-                                       const struct of_device_id *match)
 {
        struct mpc52xx_gpt_priv *gpt;
@@ -780,7 +780,7 @@ static const struct of_device_id mpc52xx_gpt_match[] = {
        {}
 };
-static struct of_platform_driver mpc52xx_gpt_driver = {
+static struct platform_driver mpc52xx_gpt_driver = {
        .driver = {
                .name = "mpc52xx-gpt",
                .owner = THIS_MODULE,
@@ -792,10 +792,7 @@ static struct of_platform_driver mpc52xx_gpt_driver = {
 static int __init mpc52xx_gpt_init(void)
 {
-        if (of_register_platform_driver(&mpc52xx_gpt_driver))
+        return platform_driver_register(&mpc52xx_gpt_driver);
-                pr_err("error registering MPC52xx GPT driver\n");
-        return 0;
 }
 /* Make sure GPIOs and IRQs get set up before anyone tries to use them */
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
index f4ac213c89c0..9940ce8a2d4e 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_lpbfifo.c
@@ -57,7 +57,7 @@ struct mpc52xx_lpbfifo {
 static struct mpc52xx_lpbfifo lpbfifo;
 /**
- * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transfered
+ * mpc52xx_lpbfifo_kick - Trigger the next block of data to be transferred
 */
 static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req)
 {
@@ -179,7 +179,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req)
 *
 * On transmit, the dma completion irq triggers before the fifo completion
 * triggers.  Handle the dma completion here instead of the LPB FIFO Bestcomm
- * task completion irq becuase everyting is not really done until the LPB FIFO
+ * task completion irq because everything is not really done until the LPB FIFO
 * completion irq triggers.
 *
 * In other words:
@@ -195,7 +195,7 @@ static void mpc52xx_lpbfifo_kick(struct mpc52xx_lpbfifo_request *req)
 * Exit conditions:
 * 1) Transfer aborted
 * 2) FIFO complete without DMA; more data to do
- * 3) FIFO complete without DMA; all data transfered
+ * 3) FIFO complete without DMA; all data transferred
 * 4) FIFO complete using DMA
 *
 * Condition 1 can occur regardless of whether or not DMA is used.
@@ -436,8 +436,7 @@ void mpc52xx_lpbfifo_abort(struct mpc52xx_lpbfifo_request *req)
 }
 EXPORT_SYMBOL(mpc52xx_lpbfifo_abort);
-static int __devinit mpc52xx_lpbfifo_probe(struct platform_device *op,
+static int __devinit mpc52xx_lpbfifo_probe(struct platform_device *op)
-                                           const struct of_device_id *match)
 {
        struct resource res;
        int rc = -ENOMEM;
@@ -536,7 +535,7 @@ static struct of_device_id mpc52xx_lpbfifo_match[] __devinitconst = {
        {},
 };
-static struct of_platform_driver mpc52xx_lpbfifo_driver = {
+static struct platform_driver mpc52xx_lpbfifo_driver = {
        .driver = {
                .name = "mpc52xx-lpbfifo",
                .owner = THIS_MODULE,
@@ -551,14 +550,12 @@ static struct of_platform_driver mpc52xx_lpbfifo_driver = {
 */
 static int __init mpc52xx_lpbfifo_init(void)
 {
-        pr_debug("Registering LocalPlus bus FIFO driver\n");
+        return platform_driver_register(&mpc52xx_lpbfifo_driver);
-        return of_register_platform_driver(&mpc52xx_lpbfifo_driver);
 }
 module_init(mpc52xx_lpbfifo_init);
 static void __exit mpc52xx_lpbfifo_exit(void)
 {
-        pr_debug("Unregistering LocalPlus bus FIFO driver\n");
+        platform_driver_unregister(&mpc52xx_lpbfifo_driver);
-        of_unregister_platform_driver(&mpc52xx_lpbfifo_driver);
 }
 module_exit(mpc52xx_lpbfifo_exit);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pic.c b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
index 4bf4bf7b063e..1a9a49570579 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pic.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pic.c
@@ -155,50 +155,32 @@ static inline void io_be_clrbit(u32 __iomem *addr, int bitno)
 /*
 * IRQ[0-3] interrupt irq_chip
 */
-static void mpc52xx_extirq_mask(unsigned int virq)
+static void mpc52xx_extirq_mask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_clrbit(&intr->ctrl, 11 - l2irq);
 }
-static void mpc52xx_extirq_unmask(unsigned int virq)
+static void mpc52xx_extirq_unmask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_setbit(&intr->ctrl, 11 - l2irq);
 }
-static void mpc52xx_extirq_ack(unsigned int virq)
+static void mpc52xx_extirq_ack(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_setbit(&intr->ctrl, 27-l2irq);
 }
-static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_extirq_set_type(struct irq_data *d, unsigned int flow_type)
 {
        u32 ctrl_reg, type;
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
        void *handler = handle_level_irq;
-        irq = irq_map[virq].hwirq;
+        pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__,
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
+                (int) irqd_to_hwirq(d), l2irq, flow_type);
-        pr_debug("%s: irq=%x. l2=%d flow_type=%d\n", __func__, irq, l2irq, flow_type);
        switch (flow_type) {
        case IRQF_TRIGGER_HIGH: type = 0; break;
@@ -214,132 +196,97 @@ static int mpc52xx_extirq_set_type(unsigned int virq, unsigned int flow_type)
        ctrl_reg |= (type << (22 - (l2irq * 2)));
        out_be32(&intr->ctrl, ctrl_reg);
-        __set_irq_handler_unlocked(virq, handler);
+        __irq_set_handler_locked(d->irq, handler);
        return 0;
 }
 static struct irq_chip mpc52xx_extirq_irqchip = {
        .name = "MPC52xx External",
-        .mask = mpc52xx_extirq_mask,
+        .irq_mask = mpc52xx_extirq_mask,
-        .unmask = mpc52xx_extirq_unmask,
+        .irq_unmask = mpc52xx_extirq_unmask,
-        .ack = mpc52xx_extirq_ack,
+        .irq_ack = mpc52xx_extirq_ack,
-        .set_type = mpc52xx_extirq_set_type,
+        .irq_set_type = mpc52xx_extirq_set_type,
 };
 /*
 * Main interrupt irq_chip
 */
-static int mpc52xx_null_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc52xx_null_set_type(struct irq_data *d, unsigned int flow_type)
 {
        return 0; /* Do nothing so that the sense mask will get updated */
 }
-static void mpc52xx_main_mask(unsigned int virq)
+static void mpc52xx_main_mask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_setbit(&intr->main_mask, 16 - l2irq);
 }
-static void mpc52xx_main_unmask(unsigned int virq)
+static void mpc52xx_main_unmask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_clrbit(&intr->main_mask, 16 - l2irq);
 }
 static struct irq_chip mpc52xx_main_irqchip = {
        .name = "MPC52xx Main",
-        .mask = mpc52xx_main_mask,
+        .irq_mask = mpc52xx_main_mask,
-        .mask_ack = mpc52xx_main_mask,
+        .irq_mask_ack = mpc52xx_main_mask,
-        .unmask = mpc52xx_main_unmask,
+        .irq_unmask = mpc52xx_main_unmask,
-        .set_type = mpc52xx_null_set_type,
+        .irq_set_type = mpc52xx_null_set_type,
 };
 /*
 * Peripherals interrupt irq_chip
 */
-static void mpc52xx_periph_mask(unsigned int virq)
+static void mpc52xx_periph_mask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_setbit(&intr->per_mask, 31 - l2irq);
 }
-static void mpc52xx_periph_unmask(unsigned int virq)
+static void mpc52xx_periph_unmask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_clrbit(&intr->per_mask, 31 - l2irq);
 }
 static struct irq_chip mpc52xx_periph_irqchip = {
        .name = "MPC52xx Peripherals",
-        .mask = mpc52xx_periph_mask,
+        .irq_mask = mpc52xx_periph_mask,
-        .mask_ack = mpc52xx_periph_mask,
+        .irq_mask_ack = mpc52xx_periph_mask,
-        .unmask = mpc52xx_periph_unmask,
+        .irq_unmask = mpc52xx_periph_unmask,
-        .set_type = mpc52xx_null_set_type,
+        .irq_set_type = mpc52xx_null_set_type,
 };
 /*
 * SDMA interrupt irq_chip
 */
-static void mpc52xx_sdma_mask(unsigned int virq)
+static void mpc52xx_sdma_mask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_setbit(&sdma->IntMask, l2irq);
 }
-static void mpc52xx_sdma_unmask(unsigned int virq)
+static void mpc52xx_sdma_unmask(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        io_be_clrbit(&sdma->IntMask, l2irq);
 }
-static void mpc52xx_sdma_ack(unsigned int virq)
+static void mpc52xx_sdma_ack(struct irq_data *d)
 {
-        int irq;
+        int l2irq = irqd_to_hwirq(d) & MPC52xx_IRQ_L2_MASK;
-        int l2irq;
-        irq = irq_map[virq].hwirq;
-        l2irq = irq & MPC52xx_IRQ_L2_MASK;
        out_be32(&sdma->IntPend, 1 << l2irq);
 }
 static struct irq_chip mpc52xx_sdma_irqchip = {
        .name = "MPC52xx SDMA",
-        .mask = mpc52xx_sdma_mask,
+        .irq_mask = mpc52xx_sdma_mask,
-        .unmask = mpc52xx_sdma_unmask,
+        .irq_unmask = mpc52xx_sdma_unmask,
-        .ack = mpc52xx_sdma_ack,
+        .irq_ack = mpc52xx_sdma_ack,
-        .set_type = mpc52xx_null_set_type,
+        .irq_set_type = mpc52xx_null_set_type,
 };
 /**
@@ -414,7 +361,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
                else
                        hndlr = handle_level_irq;
-                set_irq_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
+                irq_set_chip_and_handler(virq, &mpc52xx_extirq_irqchip, hndlr);
                pr_debug("%s: External IRQ%i virq=%x, hw=%x. type=%x\n",
                         __func__, l2irq, virq, (int)irq, type);
                return 0;
@@ -431,7 +378,7 @@ static int mpc52xx_irqhost_map(struct irq_host *h, unsigned int virq,
                return -EINVAL;
        }
-        set_irq_chip_and_handler(virq, irqchip, handle_level_irq);
+        irq_set_chip_and_handler(virq, irqchip, handle_level_irq);
        pr_debug("%s: virq=%x, l1=%i, l2=%i\n", __func__, virq, l1irq, l2irq);
        return 0;
@@ -512,7 +459,7 @@ void __init mpc52xx_init_irq(void)
 /**
 * mpc52xx_get_irq - Get pending interrupt number hook function
 *
- * Called by the interupt handler to determine what IRQ handler needs to be
+ * Called by the interrupt handler to determine what IRQ handler needs to be
 * executed.
 *
 * Status of pending interrupts is determined by reading the encoded status
@@ -539,7 +486,7 @@ void __init mpc52xx_init_irq(void)
 unsigned int mpc52xx_get_irq(void)
 {
        u32 status;
-        int irq = NO_IRQ_IGNORE;
+        int irq;
        status = in_be32(&intr->enc_status);
        if (status & 0x00000400) {      /* critical */
@@ -562,6 +509,8 @@ unsigned int mpc52xx_get_irq(void)
                } else {
                        irq |= (MPC52xx_IRQ_L1_PERP << MPC52xx_IRQ_L1_OFFSET);
                }
+        } else {
+                return NO_IRQ;
        }
        return irq_linear_revmap(mpc52xx_irqhost, irq);
diff --git a/arch/powerpc/platforms/52xx/mpc52xx_pm.c b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
index 568cef636275..8310e8b5b57f 100644
--- a/arch/powerpc/platforms/52xx/mpc52xx_pm.c
+++ b/arch/powerpc/platforms/52xx/mpc52xx_pm.c
@@ -186,7 +186,7 @@ void mpc52xx_pm_finish(void)
        iounmap(mbar);
 }
-static struct platform_suspend_ops mpc52xx_pm_ops = {
+static const struct platform_suspend_ops mpc52xx_pm_ops = {
        .valid          = mpc52xx_pm_valid,
        .prepare        = mpc52xx_pm_prepare,
        .enter          = mpc52xx_pm_enter,
diff --git a/arch/powerpc/platforms/82xx/Makefile b/arch/powerpc/platforms/82xx/Makefile
index d982793f4dbd..455fe21e37c4 100644
--- a/arch/powerpc/platforms/82xx/Makefile
+++ b/arch/powerpc/platforms/82xx/Makefile
@@ -6,4 +6,4 @@ obj-$(CONFIG_CPM2) += pq2.o
 obj-$(CONFIG_PQ2_ADS_PCI_PIC) += pq2ads-pci-pic.o
 obj-$(CONFIG_PQ2FADS) += pq2fads.o
 obj-$(CONFIG_EP8248E) += ep8248e.o
-obj-$(CONFIG_MGCOGE) += mgcoge.o
+obj-$(CONFIG_MGCOGE) += km82xx.o
diff --git a/arch/powerpc/platforms/82xx/ep8248e.c b/arch/powerpc/platforms/82xx/ep8248e.c
index 1565e0446dc8..10ff526cd046 100644
--- a/arch/powerpc/platforms/82xx/ep8248e.c
+++ b/arch/powerpc/platforms/82xx/ep8248e.c
@@ -111,8 +111,7 @@ static struct mdiobb_ctrl ep8248e_mdio_ctrl = {
        .ops = &ep8248e_mdio_ops,
 };
-static int __devinit ep8248e_mdio_probe(struct platform_device *ofdev,
+static int __devinit ep8248e_mdio_probe(struct platform_device *ofdev)
-                                        const struct of_device_id *match)
 {
        struct mii_bus *bus;
        struct resource res;
@@ -167,7 +166,7 @@ static const struct of_device_id ep8248e_mdio_match[] = {
        {},
 };
-static struct of_platform_driver ep8248e_mdio_driver = {
+static struct platform_driver ep8248e_mdio_driver = {
        .driver = {
                .name = "ep8248e-mdio-bitbang",
                .owner = THIS_MODULE,
@@ -308,7 +307,7 @@ static  __initdata struct of_device_id of_bus_ids[] = {
 static int __init declare_of_platform_devices(void)
 {
        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-        of_register_platform_driver(&ep8248e_mdio_driver);
+        platform_driver_register(&ep8248e_mdio_driver);
        return 0;
 }
diff --git a/arch/powerpc/platforms/82xx/mgcoge.c b/arch/powerpc/platforms/82xx/km82xx.c
index 7a5de9eb3c73..428c5e0a0e75 100644
--- a/arch/powerpc/platforms/82xx/mgcoge.c
+++ b/arch/powerpc/platforms/82xx/km82xx.c
@@ -1,6 +1,6 @@
 /*
- * Keymile mgcoge support
+ * Keymile km82xx support
- * Copyright 2008 DENX Software Engineering GmbH
+ * Copyright 2008-2011 DENX Software Engineering GmbH
 * Author: Heiko Schocher <hs@denx.de>
 *
 * based on code from:
@@ -31,9 +31,10 @@
 #include "pq2.h"
-static void __init mgcoge_pic_init(void)
+static void __init km82xx_pic_init(void)
 {
-        struct device_node *np = of_find_compatible_node(NULL, NULL, "fsl,pq2-pic");
+        struct device_node *np = of_find_compatible_node(NULL, NULL,
+                                                        "fsl,pq2-pic");
        if (!np) {
                printk(KERN_ERR "PIC init: can not find cpm-pic node\n");
                return;
@@ -47,12 +48,18 @@ struct cpm_pin {
        int port, pin, flags;
 };
-static __initdata struct cpm_pin mgcoge_pins[] = {
+static __initdata struct cpm_pin km82xx_pins[] = {
        /* SMC2 */
        {0, 8, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
        {0, 9, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY},
+        /* SCC1 */
+        {2, 21, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {2, 15, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {3, 31, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
+        {3, 30, CPM_PIN_OUTPUT | CPM_PIN_SECONDARY},
        /* SCC4 */
        {2, 25, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
        {2, 24, CPM_PIN_INPUT | CPM_PIN_PRIMARY},
@@ -107,30 +114,49 @@ static __initdata struct cpm_pin mgcoge_pins[] = {
        {3, 14, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
        {3, 15, CPM_PIN_INPUT | CPM_PIN_SECONDARY | CPM_PIN_OPENDRAIN},
 #endif
+        /* USB */
+        {0, 10, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /* FULL_SPEED */
+        {0, 11, CPM_PIN_OUTPUT | CPM_PIN_GPIO},    /*/SLAVE */
+        {2, 10, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXN */
+        {2, 11, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXP */
+        {2, 20, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* /OE */
+        {2, 27, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXCLK */
+        {3, 23, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXP */
+        {3, 24, CPM_PIN_OUTPUT | CPM_PIN_PRIMARY}, /* TXN */
+        {3, 25, CPM_PIN_INPUT  | CPM_PIN_PRIMARY}, /* RXD */
 };
 static void __init init_ioports(void)
 {
        int i;
-        for (i = 0; i < ARRAY_SIZE(mgcoge_pins); i++) {
+        for (i = 0; i < ARRAY_SIZE(km82xx_pins); i++) {
-                const struct cpm_pin *pin = &mgcoge_pins[i];
+                const struct cpm_pin *pin = &km82xx_pins[i];
                cpm2_set_pin(pin->port, pin->pin, pin->flags);
        }
        cpm2_smc_clk_setup(CPM_CLK_SMC2, CPM_BRG8);
+        cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_RX);
+        cpm2_clk_setup(CPM_CLK_SCC1, CPM_CLK11, CPM_CLK_TX);
+        cpm2_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RTX);
        cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK7, CPM_CLK_RX);
        cpm2_clk_setup(CPM_CLK_SCC4, CPM_CLK8, CPM_CLK_TX);
        cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK10, CPM_CLK_RX);
        cpm2_clk_setup(CPM_CLK_FCC1, CPM_CLK9,  CPM_CLK_TX);
        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK13, CPM_CLK_RX);
        cpm2_clk_setup(CPM_CLK_FCC2, CPM_CLK14, CPM_CLK_TX);
+        /* Force USB FULL SPEED bit to '1' */
+        setbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 10));
+        /* clear USB_SLAVE */
+        clrbits32(&cpm2_immr->im_ioport.iop_pdata, 1 << (31 - 11));
 }
-static void __init mgcoge_setup_arch(void)
+static void __init km82xx_setup_arch(void)
 {
        if (ppc_md.progress)
-                ppc_md.progress("mgcoge_setup_arch()", 0);
+                ppc_md.progress("km82xx_setup_arch()", 0);
        cpm2_reset();
@@ -142,7 +168,7 @@ static void __init mgcoge_setup_arch(void)
        init_ioports();
        if (ppc_md.progress)
-                ppc_md.progress("mgcoge_setup_arch(), finish", 0);
+                ppc_md.progress("km82xx_setup_arch(), finish", 0);
 }
 static  __initdata struct of_device_id of_bus_ids[] = {
@@ -156,23 +182,23 @@ static int __init declare_of_platform_devices(void)
        return 0;
 }
-machine_device_initcall(mgcoge, declare_of_platform_devices);
+machine_device_initcall(km82xx, declare_of_platform_devices);
 /*
 * Called very early, device-tree isn't unflattened
 */
-static int __init mgcoge_probe(void)
+static int __init km82xx_probe(void)
 {
        unsigned long root = of_get_flat_dt_root();
-        return of_flat_dt_is_compatible(root, "keymile,mgcoge");
+        return of_flat_dt_is_compatible(root, "keymile,km82xx");
 }
-define_machine(mgcoge)
+define_machine(km82xx)
 {
-        .name = "Keymile MGCOGE",
+        .name = "Keymile km82xx",
-        .probe = mgcoge_probe,
+        .probe = km82xx_probe,
-        .setup_arch = mgcoge_setup_arch,
+        .setup_arch = km82xx_setup_arch,
-        .init_IRQ = mgcoge_pic_init,
+        .init_IRQ = km82xx_pic_init,
        .get_irq = cpm2_get_irq,
        .calibrate_decr = generic_calibrate_decr,
        .restart = pq2_restart,
diff --git a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
index 5a55d87d6bd6..8ccf9ed62fe2 100644
--- a/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
+++ b/arch/powerpc/platforms/82xx/pq2ads-pci-pic.c
@@ -39,10 +39,10 @@ struct pq2ads_pci_pic {
 #define NUM_IRQS 32
-static void pq2ads_pci_mask_irq(unsigned int virq)
+static void pq2ads_pci_mask_irq(struct irq_data *d)
 {
-        struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+        struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);
-        int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+        int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;
        if (irq != -1) {
                unsigned long flags;
@@ -55,10 +55,10 @@ static void pq2ads_pci_mask_irq(unsigned int virq)
        }
 }
-static void pq2ads_pci_unmask_irq(unsigned int virq)
+static void pq2ads_pci_unmask_irq(struct irq_data *d)
 {
-        struct pq2ads_pci_pic *priv = get_irq_chip_data(virq);
+        struct pq2ads_pci_pic *priv = irq_data_get_irq_chip_data(d);
-        int irq = NUM_IRQS - virq_to_hw(virq) - 1;
+        int irq = NUM_IRQS - irqd_to_hwirq(d) - 1;
        if (irq != -1) {
                unsigned long flags;
@@ -71,18 +71,17 @@ static void pq2ads_pci_unmask_irq(unsigned int virq)
 static struct irq_chip pq2ads_pci_ic = {
        .name = "PQ2 ADS PCI",
-        .end = pq2ads_pci_unmask_irq,
+        .irq_mask = pq2ads_pci_mask_irq,
-        .mask = pq2ads_pci_mask_irq,
+        .irq_mask_ack = pq2ads_pci_mask_irq,
-        .mask_ack = pq2ads_pci_mask_irq,
+        .irq_ack = pq2ads_pci_mask_irq,
-        .ack = pq2ads_pci_mask_irq,
+        .irq_unmask = pq2ads_pci_unmask_irq,
-        .unmask = pq2ads_pci_unmask_irq,
+        .irq_enable = pq2ads_pci_unmask_irq,
-        .enable = pq2ads_pci_unmask_irq,
+        .irq_disable = pq2ads_pci_mask_irq
-        .disable = pq2ads_pci_mask_irq
 };
 static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
 {
-        struct pq2ads_pci_pic *priv = desc->handler_data;
+        struct pq2ads_pci_pic *priv = irq_desc_get_handler_data(desc);
        u32 stat, mask, pend;
        int bit;
@@ -107,22 +106,14 @@ static void pq2ads_pci_irq_demux(unsigned int irq, struct irq_desc *desc)
 static int pci_pic_host_map(struct irq_host *h, unsigned int virq,
                            irq_hw_number_t hw)
 {
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_data(virq, h->host_data);
+        irq_set_chip_data(virq, h->host_data);
-        set_irq_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &pq2ads_pci_ic, handle_level_irq);
        return 0;
 }
-static void pci_host_unmap(struct irq_host *h, unsigned int virq)
-{
-        /* remove chip and handler */
-        set_irq_chip_data(virq, NULL);
-        set_irq_chip(virq, NULL);
-}
 static struct irq_host_ops pci_pic_host_ops = {
        .map = pci_pic_host_map,
-        .unmap = pci_host_unmap,
 };
 int __init pq2ads_pci_init_irq(void)
@@ -176,8 +167,8 @@ int __init pq2ads_pci_init_irq(void)
        priv->host = host;
        host->host_data = priv;
-        set_irq_data(irq, priv);
+        irq_set_handler_data(irq, priv);
-        set_irq_chained_handler(irq, pq2ads_pci_irq_demux);
+        irq_set_chained_handler(irq, pq2ads_pci_irq_demux);
        of_node_put(np);
        return 0;
diff --git a/arch/powerpc/platforms/83xx/Kconfig b/arch/powerpc/platforms/83xx/Kconfig
index 021763a32c2f..73f4135f3a1a 100644
--- a/arch/powerpc/platforms/83xx/Kconfig
+++ b/arch/powerpc/platforms/83xx/Kconfig
@@ -10,12 +10,12 @@ menuconfig PPC_83xx
 if PPC_83xx
 config MPC830x_RDB
-        bool "Freescale MPC830x RDB"
+        bool "Freescale MPC830x RDB and derivatives"
        select DEFAULT_UIMAGE
        select PPC_MPC831x
        select FSL_GTM
        help
-          This option enables support for the MPC8308 RDB board.
+          This option enables support for the MPC8308 RDB and MPC8308 P1M boards.
 config MPC831x_RDB
        bool "Freescale MPC831x RDB"
diff --git a/arch/powerpc/platforms/83xx/Makefile b/arch/powerpc/platforms/83xx/Makefile
index 6e8bbbbcfdf8..ed95bfcbcbff 100644
--- a/arch/powerpc/platforms/83xx/Makefile
+++ b/arch/powerpc/platforms/83xx/Makefile
@@ -16,4 +16,4 @@ obj-$(CONFIG_MPC837x_MDS)	+= mpc837x_mds.o
 obj-$(CONFIG_SBC834x)           += sbc834x.o
 obj-$(CONFIG_MPC837x_RDB)       += mpc837x_rdb.o
 obj-$(CONFIG_ASP834x)           += asp834x.o
-obj-$(CONFIG_KMETER1)           += kmeter1.o
+obj-$(CONFIG_KMETER1)           += km83xx.o
diff --git a/arch/powerpc/platforms/83xx/kmeter1.c b/arch/powerpc/platforms/83xx/km83xx.c
index 903acfd851ac..a2b9b9ef1240 100644
--- a/arch/powerpc/platforms/83xx/kmeter1.c
+++ b/arch/powerpc/platforms/83xx/km83xx.c
@@ -1,5 +1,5 @@
 /*
- * Copyright 2008 DENX Software Engineering GmbH
+ * Copyright 2008-2011 DENX Software Engineering GmbH
 * Author: Heiko Schocher <hs@denx.de>
 *
 * Description:
@@ -49,12 +49,12 @@
 * Setup the architecture
 *
 */
-static void __init kmeter1_setup_arch(void)
+static void __init mpc83xx_km_setup_arch(void)
 {
        struct device_node *np;
        if (ppc_md.progress)
-                ppc_md.progress("kmeter1_setup_arch()", 0);
+                ppc_md.progress("kmpbec83xx_setup_arch()", 0);
 #ifdef CONFIG_PCI
        for_each_compatible_node(np, "pci", "fsl,mpc8349-pci")
@@ -69,6 +69,9 @@ static void __init kmeter1_setup_arch(void)
                par_io_init(np);
                of_node_put(np);
+                for_each_node_by_name(np, "spi")
+                        par_io_of_config(np);
                for (np = NULL; (np = of_find_node_by_name(np, "ucc")) != NULL;)
                        par_io_of_config(np);
        }
@@ -119,7 +122,7 @@ static void __init kmeter1_setup_arch(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
-static struct of_device_id kmeter_ids[] = {
+static struct of_device_id kmpbec83xx_ids[] = {
        { .type = "soc", },
        { .compatible = "soc", },
        { .compatible = "simple-bus", },
@@ -131,13 +134,13 @@ static struct of_device_id kmeter_ids[] = {
 static int __init kmeter_declare_of_platform_devices(void)
 {
        /* Publish the QE devices */
-        of_platform_bus_probe(NULL, kmeter_ids, NULL);
+        of_platform_bus_probe(NULL, kmpbec83xx_ids, NULL);
        return 0;
 }
-machine_device_initcall(kmeter1, kmeter_declare_of_platform_devices);
+machine_device_initcall(mpc83xx_km, kmeter_declare_of_platform_devices);
-static void __init kmeter1_init_IRQ(void)
+static void __init mpc83xx_km_init_IRQ(void)
 {
        struct device_node *np;
@@ -168,21 +171,34 @@ static void __init kmeter1_init_IRQ(void)
 #endif                          /* CONFIG_QUICC_ENGINE */
 }
+/* list of the supported boards */
+static char *board[] __initdata = {
+        "Keymile,KMETER1",
+        "Keymile,kmpbec8321",
+        NULL
+};
 /*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
-static int __init kmeter1_probe(void)
+static int __init mpc83xx_km_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        unsigned long node = of_get_flat_dt_root();
+        int i = 0;
-        return of_flat_dt_is_compatible(root, "keymile,KMETER1");
+        while (board[i]) {
+                if (of_flat_dt_is_compatible(node, board[i]))
+                        break;
+                i++;
+        }
+        return (board[i] != NULL);
 }
-define_machine(kmeter1) {
+define_machine(mpc83xx_km) {
-        .name           = "KMETER1",
+        .name           = "mpc83xx-km-platform",
-        .probe          = kmeter1_probe,
+        .probe          = mpc83xx_km_probe,
-        .setup_arch     = kmeter1_setup_arch,
+        .setup_arch     = mpc83xx_km_setup_arch,
-        .init_IRQ       = kmeter1_init_IRQ,
+        .init_IRQ       = mpc83xx_km_init_IRQ,
        .get_irq        = ipic_get_irq,
        .restart        = mpc83xx_restart,
        .time_init      = mpc83xx_time_init,
diff --git a/arch/powerpc/platforms/83xx/mpc830x_rdb.c b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
index ac102ee9abe8..d0c4e15b7794 100644
--- a/arch/powerpc/platforms/83xx/mpc830x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc830x_rdb.c
@@ -57,15 +57,19 @@ static void __init mpc830x_rdb_init_IRQ(void)
        ipic_set_default_priority();
 }
+static const char *board[] __initdata = {
+        "MPC8308RDB",
+        "fsl,mpc8308rdb",
+        "denx,mpc8308_p1m",
+        NULL
+};
 /*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
 static int __init mpc830x_rdb_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        return of_flat_dt_is_compatible(root, "MPC8308RDB") ||
-               of_flat_dt_is_compatible(root, "fsl,mpc8308rdb");
 }
 static struct of_device_id __initdata of_bus_ids[] = {
diff --git a/arch/powerpc/platforms/83xx/mpc831x_rdb.c b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
index ae525e4745d2..f859ead49a8d 100644
--- a/arch/powerpc/platforms/83xx/mpc831x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc831x_rdb.c
@@ -60,15 +60,18 @@ static void __init mpc831x_rdb_init_IRQ(void)
        ipic_set_default_priority();
 }
+static const char *board[] __initdata = {
+        "MPC8313ERDB",
+        "fsl,mpc8315erdb",
+        NULL
+};
 /*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
 static int __init mpc831x_rdb_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        return of_flat_dt_is_compatible(root, "MPC8313ERDB") ||
-               of_flat_dt_is_compatible(root, "fsl,mpc8315erdb");
 }
 static struct of_device_id __initdata of_bus_ids[] = {
diff --git a/arch/powerpc/platforms/83xx/mpc837x_rdb.c b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
index 910caa6b5810..7bafbf2ec0f9 100644
--- a/arch/powerpc/platforms/83xx/mpc837x_rdb.c
+++ b/arch/powerpc/platforms/83xx/mpc837x_rdb.c
@@ -101,17 +101,20 @@ static void __init mpc837x_rdb_init_IRQ(void)
        ipic_set_default_priority();
 }
+static const char *board[] __initdata = {
+        "fsl,mpc8377rdb",
+        "fsl,mpc8378rdb",
+        "fsl,mpc8379rdb",
+        "fsl,mpc8377wlan",
+        NULL
+};
 /*
 * Called very early, MMU is off, device-tree isn't unflattened
 */
 static int __init mpc837x_rdb_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        return of_flat_dt_is_compatible(root, "fsl,mpc8377rdb") ||
-               of_flat_dt_is_compatible(root, "fsl,mpc8378rdb") ||
-               of_flat_dt_is_compatible(root, "fsl,mpc8379rdb") ||
-               of_flat_dt_is_compatible(root, "fsl,mpc8377wlan");
 }
 define_machine(mpc837x_rdb) {
diff --git a/arch/powerpc/platforms/83xx/mpc83xx.h b/arch/powerpc/platforms/83xx/mpc83xx.h
index 0fea8811d45b..82a434510d83 100644
--- a/arch/powerpc/platforms/83xx/mpc83xx.h
+++ b/arch/powerpc/platforms/83xx/mpc83xx.h
@@ -35,6 +35,8 @@
 /* system i/o configuration register high */
 #define MPC83XX_SICRH_OFFS         0x118
+#define MPC8308_SICRH_USB_MASK     0x000c0000
+#define MPC8308_SICRH_USB_ULPI     0x00040000
 #define MPC834X_SICRH_USB_UTMI     0x00020000
 #define MPC831X_SICRH_USB_MASK     0x000000e0
 #define MPC831X_SICRH_USB_ULPI     0x000000a0
diff --git a/arch/powerpc/platforms/83xx/suspend-asm.S b/arch/powerpc/platforms/83xx/suspend-asm.S
index 1930543c98d3..3d1ecd211776 100644
--- a/arch/powerpc/platforms/83xx/suspend-asm.S
+++ b/arch/powerpc/platforms/83xx/suspend-asm.S
@@ -231,7 +231,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
        ori     r4, r4, 0x002a
        mtspr   SPRN_DBAT0L, r4
        lis     r8, TMP_VIRT_IMMR@h
-        ori     r4, r8, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r8, 0x001e  /* 1 MByte accessible from Kernel Space only */
        mtspr   SPRN_DBAT0U, r4
        isync
@@ -241,7 +241,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
        ori     r4, r4, 0x002a
        mtspr   SPRN_DBAT1L, r4
        lis     r9, (TMP_VIRT_IMMR + 0x01000000)@h
-        ori     r4, r9, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r9, 0x001e  /* 1 MByte accessible from Kernel Space only */
        mtspr   SPRN_DBAT1U, r4
        isync
@@ -253,7 +253,7 @@ _GLOBAL(mpc83xx_enter_deep_sleep)
        li      r4, 0x0002
        mtspr   SPRN_DBAT2L, r4
        lis     r4, KERNELBASE@h
-        ori     r4, r4, 0x001e  /* 1 MByte accessable from Kernel Space only */
+        ori     r4, r4, 0x001e  /* 1 MByte accessible from Kernel Space only */
        mtspr   SPRN_DBAT2U, r4
        isync
diff --git a/arch/powerpc/platforms/83xx/suspend.c b/arch/powerpc/platforms/83xx/suspend.c
index 75ae77f1af6a..104faa8aa23c 100644
--- a/arch/powerpc/platforms/83xx/suspend.c
+++ b/arch/powerpc/platforms/83xx/suspend.c
@@ -311,21 +311,28 @@ static int mpc83xx_is_pci_agent(void)
        return ret;
 }
-static struct platform_suspend_ops mpc83xx_suspend_ops = {
+static const struct platform_suspend_ops mpc83xx_suspend_ops = {
        .valid = mpc83xx_suspend_valid,
        .begin = mpc83xx_suspend_begin,
        .enter = mpc83xx_suspend_enter,
        .end = mpc83xx_suspend_end,
 };
-static int pmc_probe(struct platform_device *ofdev,
+static struct of_device_id pmc_match[];
-                     const struct of_device_id *match)
+static int pmc_probe(struct platform_device *ofdev)
 {
+        const struct of_device_id *match;
        struct device_node *np = ofdev->dev.of_node;
        struct resource res;
-        struct pmc_type *type = match->data;
+        struct pmc_type *type;
        int ret = 0;
+        match = of_match_device(pmc_match, &ofdev->dev);
+        if (!match)
+                return -EINVAL;
+        type = match->data;
        if (!of_device_is_available(np))
                return -ENODEV;
@@ -422,7 +429,7 @@ static struct of_device_id pmc_match[] = {
        {}
 };
-static struct of_platform_driver pmc_driver = {
+static struct platform_driver pmc_driver = {
        .driver = {
                .name = "mpc83xx-pmc",
                .owner = THIS_MODULE,
@@ -434,7 +441,7 @@ static struct of_platform_driver pmc_driver = {
 static int pmc_init(void)
 {
-        return of_register_platform_driver(&pmc_driver);
+        return platform_driver_register(&pmc_driver);
 }
 module_init(pmc_init);
diff --git a/arch/powerpc/platforms/83xx/usb.c b/arch/powerpc/platforms/83xx/usb.c
index 3ba4bb7d41bb..2c64164722d0 100644
--- a/arch/powerpc/platforms/83xx/usb.c
+++ b/arch/powerpc/platforms/83xx/usb.c
@@ -127,7 +127,8 @@ int mpc831x_usb_cfg(void)
        /* Configure clock */
        immr_node = of_get_parent(np);
-        if (immr_node && of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
+        if (immr_node && (of_device_is_compatible(immr_node, "fsl,mpc8315-immr") ||
+                        of_device_is_compatible(immr_node, "fsl,mpc8308-immr")))
                clrsetbits_be32(immap + MPC83XX_SCCR_OFFS,
                                MPC8315_SCCR_USB_MASK,
                                MPC8315_SCCR_USB_DRCM_01);
@@ -138,7 +139,11 @@ int mpc831x_usb_cfg(void)
        /* Configure pin mux for ULPI.  There is no pin mux for UTMI */
        if (prop && !strcmp(prop, "ulpi")) {
-                if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
+                        clrsetbits_be32(immap + MPC83XX_SICRH_OFFS,
+                                        MPC8308_SICRH_USB_MASK,
+                                        MPC8308_SICRH_USB_ULPI);
+                } else if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr")) {
                        clrsetbits_be32(immap + MPC83XX_SICRL_OFFS,
                                        MPC8315_SICRL_USB_MASK,
                                        MPC8315_SICRL_USB_ULPI);
@@ -173,6 +178,9 @@ int mpc831x_usb_cfg(void)
                     !strcmp(prop, "utmi"))) {
                u32 refsel;
+                if (of_device_is_compatible(immr_node, "fsl,mpc8308-immr"))
+                        goto out;
                if (of_device_is_compatible(immr_node, "fsl,mpc8315-immr"))
                        refsel = CONTROL_REFSEL_24MHZ;
                else
@@ -186,9 +194,11 @@ int mpc831x_usb_cfg(void)
                temp = CONTROL_PHY_CLK_SEL_ULPI;
 #ifdef CONFIG_USB_OTG
                /* Set OTG_PORT */
-                dr_mode = of_get_property(np, "dr_mode", NULL);
+                if (!of_device_is_compatible(immr_node, "fsl,mpc8308-immr")) {
-                if (dr_mode && !strcmp(dr_mode, "otg"))
+                        dr_mode = of_get_property(np, "dr_mode", NULL);
-                        temp |= CONTROL_OTG_PORT;
+                        if (dr_mode && !strcmp(dr_mode, "otg"))
+                                temp |= CONTROL_OTG_PORT;
+                }
 #endif /* CONFIG_USB_OTG */
                out_be32(usb_regs + FSL_USB2_CONTROL_OFFS, temp);
        } else {
@@ -196,6 +206,7 @@ int mpc831x_usb_cfg(void)
                ret = -EINVAL;
        }
+out:
        iounmap(usb_regs);
        of_node_put(np);
        return ret;
diff --git a/arch/powerpc/platforms/85xx/Kconfig b/arch/powerpc/platforms/85xx/Kconfig
index bea1f5905ad4..b6976e1726e4 100644
--- a/arch/powerpc/platforms/85xx/Kconfig
+++ b/arch/powerpc/platforms/85xx/Kconfig
@@ -11,6 +11,8 @@ menuconfig FSL_SOC_BOOKE
 if FSL_SOC_BOOKE
+if PPC32
 config MPC8540_ADS
        bool "Freescale MPC8540 ADS"
        select DEFAULT_UIMAGE
@@ -153,10 +155,20 @@ config SBC8560
        help
          This option enables support for the Wind River SBC8560 board
+config P3041_DS
+        bool "Freescale P3041 DS"
+        select DEFAULT_UIMAGE
+        select PPC_E500MC
+        select PHYS_64BIT
+        select SWIOTLB
+        select MPC8xxx_GPIO
+        select HAS_RAPIDIO
+        help
+          This option enables support for the P3041 DS board
 config P4080_DS
        bool "Freescale P4080 DS"
        select DEFAULT_UIMAGE
-        select PPC_FSL_BOOK3E
        select PPC_E500MC
        select PHYS_64BIT
        select SWIOTLB
@@ -165,6 +177,20 @@ config P4080_DS
        help
          This option enables support for the P4080 DS board
+endif # PPC32
+config P5020_DS
+        bool "Freescale P5020 DS"
+        select DEFAULT_UIMAGE
+        select E500
+        select PPC_E500MC
+        select PHYS_64BIT
+        select SWIOTLB
+        select MPC8xxx_GPIO
+        select HAS_RAPIDIO
+        help
+          This option enables support for the P5020 DS board
 endif # FSL_SOC_BOOKE
 config TQM85xx
diff --git a/arch/powerpc/platforms/85xx/Makefile b/arch/powerpc/platforms/85xx/Makefile
index a2ec3f8f4d06..dd70db77d63e 100644
--- a/arch/powerpc/platforms/85xx/Makefile
+++ b/arch/powerpc/platforms/85xx/Makefile
@@ -11,7 +11,9 @@ obj-$(CONFIG_MPC85xx_DS)  += mpc85xx_ds.o
 obj-$(CONFIG_MPC85xx_MDS) += mpc85xx_mds.o
 obj-$(CONFIG_MPC85xx_RDB) += mpc85xx_rdb.o
 obj-$(CONFIG_P1022_DS)    += p1022_ds.o
+obj-$(CONFIG_P3041_DS)    += p3041_ds.o corenet_ds.o
 obj-$(CONFIG_P4080_DS)    += p4080_ds.o corenet_ds.o
+obj-$(CONFIG_P5020_DS)    += p5020_ds.o corenet_ds.o
 obj-$(CONFIG_STX_GP3)     += stx_gp3.o
 obj-$(CONFIG_TQM85xx)     += tqm85xx.o
 obj-$(CONFIG_SBC8560)     += sbc8560.o
diff --git a/arch/powerpc/platforms/85xx/ksi8560.c b/arch/powerpc/platforms/85xx/ksi8560.c
index f4d36b5a2e00..c46f9359be15 100644
--- a/arch/powerpc/platforms/85xx/ksi8560.c
+++ b/arch/powerpc/platforms/85xx/ksi8560.c
@@ -56,12 +56,13 @@ static void machine_restart(char *cmd)
 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int cascade_irq;
        while ((cascade_irq = cpm2_get_irq()) >= 0)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static void __init ksi8560_pic_init(void)
@@ -105,7 +106,7 @@ static void __init ksi8560_pic_init(void)
        cpm2_pic_init(np);
        of_node_put(np);
-        set_irq_chained_handler(irq, cpm2_cascade);
+        irq_set_chained_handler(irq, cpm2_cascade);
 #endif
 }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ads.c b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
index 9438a892afc4..3b2c9bb66199 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ads.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ads.c
@@ -50,12 +50,13 @@ static int mpc85xx_exclude_device(struct pci_controller *hose,
 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int cascade_irq;
        while ((cascade_irq = cpm2_get_irq()) >= 0)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif /* CONFIG_CPM2 */
@@ -100,7 +101,7 @@ static void __init mpc85xx_ads_pic_init(void)
        cpm2_pic_init(np);
        of_node_put(np);
-        set_irq_chained_handler(irq, cpm2_cascade);
+        irq_set_chained_handler(irq, cpm2_cascade);
 #endif
 }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_cds.c b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
index 458d91fba91d..6299a2a51ae8 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_cds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_cds.c
@@ -255,7 +255,7 @@ static int mpc85xx_cds_8259_attach(void)
        }
        /* Success. Connect our low-level cascade handler. */
-        set_irq_handler(cascade_irq, mpc85xx_8259_cascade_handler);
+        irq_set_handler(cascade_irq, mpc85xx_8259_cascade_handler);
        return 0;
 }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_ds.c b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
index 8190bc25bf27..c7b97f70312e 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_ds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_ds.c
@@ -47,12 +47,13 @@
 #ifdef CONFIG_PPC_I8259
 static void mpc85xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = i8259_irq();
        if (cascade_irq != NO_IRQ) {
                generic_handle_irq(cascade_irq);
        }
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif  /* CONFIG_PPC_I8259 */
@@ -121,7 +122,7 @@ void __init mpc85xx_ds_pic_init(void)
        i8259_init(cascade_node, 0);
        of_node_put(cascade_node);
-        set_irq_chained_handler(cascade_irq, mpc85xx_8259_cascade);
+        irq_set_chained_handler(cascade_irq, mpc85xx_8259_cascade);
 #endif  /* CONFIG_PPC_I8259 */
 }
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
index aa34cac4eb5c..747d1ee661fd 100644
--- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c
+++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c
@@ -309,7 +309,7 @@ static void __init mpc85xx_mds_qe_init(void)
                        /* P1021 has pins muxed for QE and other functions. To
                         * enable QE UEC mode, we need to set bit QE0 for UCC1
                         * in Eth mode, QE0 and QE3 for UCC5 in Eth mode, QE9
-                         * and QE12 for QE MII management singals in PMUXCR
+                         * and QE12 for QE MII management signals in PMUXCR
                         * register.
                         */
                                setbits32(pmuxcr, MPC85xx_PMUXCR_QE0 |
diff --git a/arch/powerpc/platforms/85xx/p1022_ds.c b/arch/powerpc/platforms/85xx/p1022_ds.c
index 34e00902ce86..7eb5c40c069f 100644
--- a/arch/powerpc/platforms/85xx/p1022_ds.c
+++ b/arch/powerpc/platforms/85xx/p1022_ds.c
@@ -8,7 +8,6 @@
 * Copyright 2010 Freescale Semiconductor, Inc.
 *
 * This file is taken from the Freescale P1022DS BSP, with modifications:
- * 1) No DIU support (pending rewrite of DIU code)
 * 2) No AMP support
 * 3) No PCI endpoint support
 *
@@ -20,12 +19,211 @@
 #include <linux/pci.h>
 #include <linux/of_platform.h>
 #include <linux/memblock.h>
+#include <asm/div64.h>
 #include <asm/mpic.h>
 #include <asm/swiotlb.h>
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
+#include <asm/fsl_guts.h>
+#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
+/*
+ * Board-specific initialization of the DIU.  This code should probably be
+ * executed when the DIU is opened, rather than in arch code, but the DIU
+ * driver does not have a mechanism for this (yet).
+ *
+ * This is especially problematic on the P1022DS because the local bus (eLBC)
+ * and the DIU video signals share the same pins, which means that enabling the
+ * DIU will disable access to NOR flash.
+ */
+/* DIU Pixel Clock bits of the CLKDVDR Global Utilities register */
+#define CLKDVDR_PXCKEN          0x80000000
+#define CLKDVDR_PXCKINV         0x10000000
+#define CLKDVDR_PXCKDLY         0x06000000
+#define CLKDVDR_PXCLK_MASK      0x00FF0000
+/* Some ngPIXIS register definitions */
+#define PX_BRDCFG1_DVIEN        0x80
+#define PX_BRDCFG1_DFPEN        0x40
+#define PX_BRDCFG1_BACKLIGHT    0x20
+#define PX_BRDCFG1_DDCEN        0x10
+/*
+ * DIU Area Descriptor
+ *
+ * Note that we need to byte-swap the value before it's written to the AD
+ * register.  So even though the registers don't look like they're in the same
+ * bit positions as they are on the MPC8610, the same value is written to the
+ * AD register on the MPC8610 and on the P1022.
+ */
+#define AD_BYTE_F               0x10000000
+#define AD_ALPHA_C_MASK         0x0E000000
+#define AD_ALPHA_C_SHIFT        25
+#define AD_BLUE_C_MASK          0x01800000
+#define AD_BLUE_C_SHIFT         23
+#define AD_GREEN_C_MASK         0x00600000
+#define AD_GREEN_C_SHIFT        21
+#define AD_RED_C_MASK           0x00180000
+#define AD_RED_C_SHIFT          19
+#define AD_PALETTE              0x00040000
+#define AD_PIXEL_S_MASK         0x00030000
+#define AD_PIXEL_S_SHIFT        16
+#define AD_COMP_3_MASK          0x0000F000
+#define AD_COMP_3_SHIFT         12
+#define AD_COMP_2_MASK          0x00000F00
+#define AD_COMP_2_SHIFT         8
+#define AD_COMP_1_MASK          0x000000F0
+#define AD_COMP_1_SHIFT         4
+#define AD_COMP_0_MASK          0x0000000F
+#define AD_COMP_0_SHIFT         0
+#define MAKE_AD(alpha, red, blue, green, size, c0, c1, c2, c3) \
+        cpu_to_le32(AD_BYTE_F | (alpha << AD_ALPHA_C_SHIFT) | \
+        (blue << AD_BLUE_C_SHIFT) | (green << AD_GREEN_C_SHIFT) | \
+        (red << AD_RED_C_SHIFT) | (c3 << AD_COMP_3_SHIFT) | \
+        (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \
+        (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT))
+/**
+ * p1022ds_get_pixel_format: return the Area Descriptor for a given pixel depth
+ *
+ * The Area Descriptor is a 32-bit value that determine which bits in each
+ * pixel are to be used for each color.
+ */
+static unsigned int p1022ds_get_pixel_format(unsigned int bits_per_pixel,
+        int monitor_port)
+{
+        switch (bits_per_pixel) {
+        case 32:
+                /* 0x88883316 */
+                return MAKE_AD(3, 2, 0, 1, 3, 8, 8, 8, 8);
+        case 24:
+                /* 0x88082219 */
+                return MAKE_AD(4, 0, 1, 2, 2, 0, 8, 8, 8);
+        case 16:
+                /* 0x65053118 */
+                return MAKE_AD(4, 2, 1, 0, 1, 5, 6, 5, 0);
+        default:
+                pr_err("fsl-diu: unsupported pixel depth %u\n", bits_per_pixel);
+                return 0;
+        }
+}
+/**
+ * p1022ds_set_gamma_table: update the gamma table, if necessary
+ *
+ * On some boards, the gamma table for some ports may need to be modified.
+ * This is not the case on the P1022DS, so we do nothing.
+*/
+static void p1022ds_set_gamma_table(int monitor_port, char *gamma_table_base)
+{
+}
+/**
+ * p1022ds_set_monitor_port: switch the output to a different monitor port
+ *
+ */
+static void p1022ds_set_monitor_port(int monitor_port)
+{
+        struct device_node *pixis_node;
+        u8 __iomem *brdcfg1;
+        pixis_node = of_find_compatible_node(NULL, NULL, "fsl,p1022ds-pixis");
+        if (!pixis_node) {
+                pr_err("p1022ds: missing ngPIXIS node\n");
+                return;
+        }
+        brdcfg1 = of_iomap(pixis_node, 0);
+        if (!brdcfg1) {
+                pr_err("p1022ds: could not map ngPIXIS registers\n");
+                return;
+        }
+        brdcfg1 += 9;   /* BRDCFG1 is at offset 9 in the ngPIXIS */
+        switch (monitor_port) {
+        case 0: /* DVI */
+                /* Enable the DVI port, disable the DFP and the backlight */
+                clrsetbits_8(brdcfg1, PX_BRDCFG1_DFPEN | PX_BRDCFG1_BACKLIGHT,
+                             PX_BRDCFG1_DVIEN);
+                break;
+        case 1: /* Single link LVDS */
+                /* Enable the DFP port, disable the DVI and the backlight */
+                clrsetbits_8(brdcfg1, PX_BRDCFG1_DVIEN | PX_BRDCFG1_BACKLIGHT,
+                             PX_BRDCFG1_DFPEN);
+                break;
+        default:
+                pr_err("p1022ds: unsupported monitor port %i\n", monitor_port);
+        }
+}
+/**
+ * p1022ds_set_pixel_clock: program the DIU's clock
+ *
+ * @pixclock: the wavelength, in picoseconds, of the clock
+ */
+void p1022ds_set_pixel_clock(unsigned int pixclock)
+{
+        struct device_node *guts_np = NULL;
+        struct ccsr_guts_85xx __iomem *guts;
+        unsigned long freq;
+        u64 temp;
+        u32 pxclk;
+        /* Map the global utilities registers. */
+        guts_np = of_find_compatible_node(NULL, NULL, "fsl,p1022-guts");
+        if (!guts_np) {
+                pr_err("p1022ds: missing global utilties device node\n");
+                return;
+        }
+        guts = of_iomap(guts_np, 0);
+        of_node_put(guts_np);
+        if (!guts) {
+                pr_err("p1022ds: could not map global utilties device\n");
+                return;
+        }
+        /* Convert pixclock from a wavelength to a frequency */
+        temp = 1000000000000ULL;
+        do_div(temp, pixclock);
+        freq = temp;
+        /* pixclk is the ratio of the platform clock to the pixel clock */
+        pxclk = DIV_ROUND_CLOSEST(fsl_get_sys_freq(), freq);
+        /* Disable the pixel clock, and set it to non-inverted and no delay */
+        clrbits32(&guts->clkdvdr,
+                  CLKDVDR_PXCKEN | CLKDVDR_PXCKDLY | CLKDVDR_PXCLK_MASK);
+        /* Enable the clock and set the pxclk */
+        setbits32(&guts->clkdvdr, CLKDVDR_PXCKEN | (pxclk << 16));
+}
+/**
+ * p1022ds_show_monitor_port: show the current monitor
+ *
+ * This function returns a string indicating whether the current monitor is
+ * set to DVI or LVDS.
+ */
+ssize_t p1022ds_show_monitor_port(int monitor_port, char *buf)
+{
+        return sprintf(buf, "%c0 - DVI\n%c1 - Single link LVDS\n",
+                monitor_port == 0 ? '*' : ' ', monitor_port == 1 ? '*' : ' ');
+}
+/**
+ * p1022ds_set_sysfs_monitor_port: set the monitor port for sysfs
+ */
+int p1022ds_set_sysfs_monitor_port(int val)
+{
+        return val < 2 ? val : 0;
+}
+#endif
 void __init p1022_ds_pic_init(void)
 {
@@ -92,6 +290,15 @@ static void __init p1022_ds_setup_arch(void)
        }
 #endif
+#if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
+        diu_ops.get_pixel_format        = p1022ds_get_pixel_format;
+        diu_ops.set_gamma_table         = p1022ds_set_gamma_table;
+        diu_ops.set_monitor_port        = p1022ds_set_monitor_port;
+        diu_ops.set_pixel_clock         = p1022ds_set_pixel_clock;
+        diu_ops.show_monitor_port       = p1022ds_show_monitor_port;
+        diu_ops.set_sysfs_monitor_port  = p1022ds_set_sysfs_monitor_port;
+#endif
 #ifdef CONFIG_SMP
        mpc85xx_smp_init();
 #endif
@@ -112,6 +319,8 @@ static struct of_device_id __initdata p1022_ds_ids[] = {
        { .compatible = "soc", },
        { .compatible = "simple-bus", },
        { .compatible = "gianfar", },
+        /* So that the DMA channel nodes can be probed individually: */
+        { .compatible = "fsl,eloplus-dma", },
        {},
 };
diff --git a/arch/powerpc/platforms/85xx/p3041_ds.c b/arch/powerpc/platforms/85xx/p3041_ds.c
new file mode 100644
index 000000000000..0ed52e18298c
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p3041_ds.c
@@ -0,0 +1,64 @@
+/*
+ * P3041 DS Setup
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2009-2010 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/phy.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "corenet_ds.h"
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p3041_ds_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "fsl,P3041DS");
+}
+define_machine(p3041_ds) {
+        .name                   = "P3041 DS",
+        .probe                  = p3041_ds_probe,
+        .setup_arch             = corenet_ds_setup_arch,
+        .init_IRQ               = corenet_ds_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+        .get_irq                = mpic_get_coreint_irq,
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+machine_device_initcall(p3041_ds, corenet_ds_publish_devices);
+#ifdef CONFIG_SWIOTLB
+machine_arch_initcall(p3041_ds, swiotlb_setup_bus_notifier);
+#endif
diff --git a/arch/powerpc/platforms/85xx/p5020_ds.c b/arch/powerpc/platforms/85xx/p5020_ds.c
new file mode 100644
index 000000000000..7467b712ee00
--- /dev/null
+++ b/arch/powerpc/platforms/85xx/p5020_ds.c
@@ -0,0 +1,69 @@
+/*
+ * P5020 DS Setup
+ *
+ * Maintained by Kumar Gala (see MAINTAINERS for contact information)
+ *
+ * Copyright 2009-2010 Freescale Semiconductor Inc.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/pci.h>
+#include <linux/kdev_t.h>
+#include <linux/delay.h>
+#include <linux/interrupt.h>
+#include <linux/phy.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/machdep.h>
+#include <asm/pci-bridge.h>
+#include <mm/mmu_decl.h>
+#include <asm/prom.h>
+#include <asm/udbg.h>
+#include <asm/mpic.h>
+#include <linux/of_platform.h>
+#include <sysdev/fsl_soc.h>
+#include <sysdev/fsl_pci.h>
+#include "corenet_ds.h"
+/*
+ * Called very early, device-tree isn't unflattened
+ */
+static int __init p5020_ds_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_is_compatible(root, "fsl,P5020DS");
+}
+define_machine(p5020_ds) {
+        .name                   = "P5020 DS",
+        .probe                  = p5020_ds_probe,
+        .setup_arch             = corenet_ds_setup_arch,
+        .init_IRQ               = corenet_ds_pic_init,
+#ifdef CONFIG_PCI
+        .pcibios_fixup_bus      = fsl_pcibios_fixup_bus,
+#endif
+/* coreint doesn't play nice with lazy EE, use legacy mpic for now */
+#ifdef CONFIG_PPC64
+        .get_irq                = mpic_get_irq,
+#else
+        .get_irq                = mpic_get_coreint_irq,
+#endif
+        .restart                = fsl_rstcr_restart,
+        .calibrate_decr         = generic_calibrate_decr,
+        .progress               = udbg_progress,
+};
+machine_device_initcall(p5020_ds, corenet_ds_publish_devices);
+#ifdef CONFIG_SWIOTLB
+machine_arch_initcall(p5020_ds, swiotlb_setup_bus_notifier);
+#endif
diff --git a/arch/powerpc/platforms/85xx/sbc8560.c b/arch/powerpc/platforms/85xx/sbc8560.c
index a5ad1c7794bf..d2dfd465fbf6 100644
--- a/arch/powerpc/platforms/85xx/sbc8560.c
+++ b/arch/powerpc/platforms/85xx/sbc8560.c
@@ -41,12 +41,13 @@
 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int cascade_irq;
        while ((cascade_irq = cpm2_get_irq()) >= 0)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif /* CONFIG_CPM2 */
@@ -91,7 +92,7 @@ static void __init sbc8560_pic_init(void)
        cpm2_pic_init(np);
        of_node_put(np);
-        set_irq_chained_handler(irq, cpm2_cascade);
+        irq_set_chained_handler(irq, cpm2_cascade);
 #endif
 }
diff --git a/arch/powerpc/platforms/85xx/smp.c b/arch/powerpc/platforms/85xx/smp.c
index a6b106557be4..d6a93a10c0f5 100644
--- a/arch/powerpc/platforms/85xx/smp.c
+++ b/arch/powerpc/platforms/85xx/smp.c
@@ -16,6 +16,7 @@
 #include <linux/delay.h>
 #include <linux/of.h>
 #include <linux/kexec.h>
+#include <linux/highmem.h>
 #include <asm/machdep.h>
 #include <asm/pgtable.h>
@@ -40,7 +41,7 @@ extern void __early_start(void);
 #define NUM_BOOT_ENTRY          8
 #define SIZE_BOOT_ENTRY         (NUM_BOOT_ENTRY * sizeof(u32))
-static void __init
+static int __init
 smp_85xx_kick_cpu(int nr)
 {
        unsigned long flags;
@@ -59,7 +60,7 @@ smp_85xx_kick_cpu(int nr)
        if (cpu_rel_addr == NULL) {
                printk(KERN_ERR "No cpu-release-addr for cpu %d\n", nr);
-                return;
+                return -ENOENT;
        }
        /*
@@ -79,6 +80,7 @@ smp_85xx_kick_cpu(int nr)
        local_irq_save(flags);
        out_be32(bptr_vaddr + BOOT_ENTRY_PIR, nr);
+#ifdef CONFIG_PPC32
        out_be32(bptr_vaddr + BOOT_ENTRY_ADDR_LOWER, __pa(__early_start));
        if (!ioremappable)
@@ -88,6 +90,16 @@ smp_85xx_kick_cpu(int nr)
        /* Wait a bit for the CPU to ack. */
        while ((__secondary_hold_acknowledge != nr) && (++n < 1000))
                mdelay(1);
+#else
+        smp_generic_kick_cpu(nr);
+        out_be64((u64 *)(bptr_vaddr + BOOT_ENTRY_ADDR_UPPER),
+                __pa((u64)*((unsigned long long *) generic_secondary_smp_init)));
+        if (!ioremappable)
+                flush_dcache_range((ulong)bptr_vaddr,
+                                (ulong)(bptr_vaddr + SIZE_BOOT_ENTRY));
+#endif
        local_irq_restore(flags);
@@ -95,6 +107,8 @@ smp_85xx_kick_cpu(int nr)
                iounmap(bptr_vaddr);
        pr_debug("waited %d msecs for CPU #%d.\n", n, nr);
+        return 0;
 }
 static void __init
@@ -114,19 +128,15 @@ struct smp_ops_t smp_85xx_ops = {
 };
 #ifdef CONFIG_KEXEC
-static int kexec_down_cpus = 0;
+atomic_t kexec_down_cpus = ATOMIC_INIT(0);
 void mpc85xx_smp_kexec_cpu_down(int crash_shutdown, int secondary)
 {
-        mpic_teardown_this_cpu(1);
+        local_irq_disable();
-        /* When crashing, this gets called on all CPU's we only
-         * take down the non-boot cpus */
-        if (smp_processor_id() != boot_cpuid)
-        {
-                local_irq_disable();
-                kexec_down_cpus++;
+        if (secondary) {
+                atomic_inc(&kexec_down_cpus);
+                /* loop forever */
                while (1);
        }
 }
@@ -137,16 +147,65 @@ static void mpc85xx_smp_kexec_down(void *arg)
                ppc_md.kexec_cpu_down(0,1);
 }
-static void mpc85xx_smp_machine_kexec(struct kimage *image)
+static void map_and_flush(unsigned long paddr)
 {
-        int timeout = 2000;
+        struct page *page = pfn_to_page(paddr >> PAGE_SHIFT);
+        unsigned long kaddr  = (unsigned long)kmap(page);
+        flush_dcache_range(kaddr, kaddr + PAGE_SIZE);
+        kunmap(page);
+}
+/**
+ * Before we reset the other cores, we need to flush relevant cache
+ * out to memory so we don't get anything corrupted, some of these flushes
+ * are performed out of an overabundance of caution as interrupts are not
+ * disabled yet and we can switch cores
+ */
+static void mpc85xx_smp_flush_dcache_kexec(struct kimage *image)
+{
+        kimage_entry_t *ptr, entry;
+        unsigned long paddr;
        int i;
-        set_cpus_allowed(current, cpumask_of_cpu(boot_cpuid));
+        if (image->type == KEXEC_TYPE_DEFAULT) {
+                /* normal kexec images are stored in temporary pages */
+                for (ptr = &image->head; (entry = *ptr) && !(entry & IND_DONE);
+                     ptr = (entry & IND_INDIRECTION) ?
+                                phys_to_virt(entry & PAGE_MASK) : ptr + 1) {
+                        if (!(entry & IND_DESTINATION)) {
+                                map_and_flush(entry);
+                        }
+                }
+                /* flush out last IND_DONE page */
+                map_and_flush(entry);
+        } else {
+                /* crash type kexec images are copied to the crash region */
+                for (i = 0; i < image->nr_segments; i++) {
+                        struct kexec_segment *seg = &image->segment[i];
+                        for (paddr = seg->mem; paddr < seg->mem + seg->memsz;
+                             paddr += PAGE_SIZE) {
+                                map_and_flush(paddr);
+                        }
+                }
+        }
+        /* also flush the kimage struct to be passed in as well */
+        flush_dcache_range((unsigned long)image,
+                           (unsigned long)image + sizeof(*image));
+}
+static void mpc85xx_smp_machine_kexec(struct kimage *image)
+{
+        int timeout = INT_MAX;
+        int i, num_cpus = num_present_cpus();
+        mpc85xx_smp_flush_dcache_kexec(image);
-        smp_call_function(mpc85xx_smp_kexec_down, NULL, 0);
+        if (image->type == KEXEC_TYPE_DEFAULT)
+                smp_call_function(mpc85xx_smp_kexec_down, NULL, 0);
-        while ( (kexec_down_cpus != (num_online_cpus() - 1)) &&
+        while ( (atomic_read(&kexec_down_cpus) != (num_cpus - 1)) &&
                ( timeout > 0 ) )
        {
                timeout--;
@@ -155,7 +214,7 @@ static void mpc85xx_smp_machine_kexec(struct kimage *image)
        if ( !timeout )
                printk(KERN_ERR "Unable to bring down secondary cpu(s)");
-        for (i = 0; i < num_present_cpus(); i++)
+        for (i = 0; i < num_cpus; i++)
        {
                if ( i == smp_processor_id() ) continue;
                mpic_reset_core(i);
@@ -176,8 +235,10 @@ void __init mpc85xx_smp_init(void)
                smp_85xx_ops.message_pass = smp_mpic_message_pass;
        }
-        if (cpu_has_feature(CPU_FTR_DBELL))
+        if (cpu_has_feature(CPU_FTR_DBELL)) {
-                smp_85xx_ops.message_pass = doorbell_message_pass;
+                smp_85xx_ops.message_pass = smp_muxed_ipi_message_pass;
+                smp_85xx_ops.cause_ipi = doorbell_cause_ipi;
+        }
        BUG_ON(!smp_85xx_ops.message_pass);
diff --git a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
index d48527ffc425..12cb9bb2cc68 100644
--- a/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
+++ b/arch/powerpc/platforms/85xx/socrates_fpga_pic.c
@@ -48,8 +48,6 @@ static struct socrates_fpga_irq_info fpga_irqs[SOCRATES_FPGA_NUM_IRQS] = {
        [8] = {0, IRQ_TYPE_LEVEL_HIGH},
 };
-#define socrates_fpga_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 static DEFINE_RAW_SPINLOCK(socrates_fpga_pic_lock);
 static void __iomem *socrates_fpga_pic_iobase;
@@ -93,6 +91,7 @@ static inline unsigned int socrates_fpga_pic_get_irq(unsigned int irq)
 void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq;
        /*
@@ -103,18 +102,15 @@ void socrates_fpga_pic_cascade(unsigned int irq, struct irq_desc *desc)
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
-static void socrates_fpga_pic_ack(unsigned int virq)
+static void socrates_fpga_pic_ack(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq, irq_line;
+        unsigned int irq_line, hwirq = irqd_to_hwirq(d);
        uint32_t mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        irq_line = fpga_irqs[hwirq].irq_line;
        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
@@ -124,15 +120,13 @@ static void socrates_fpga_pic_ack(unsigned int virq)
        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
-static void socrates_fpga_pic_mask(unsigned int virq)
+static void socrates_fpga_pic_mask(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        int irq_line;
        u32 mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        irq_line = fpga_irqs[hwirq].irq_line;
        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
@@ -142,15 +136,13 @@ static void socrates_fpga_pic_mask(unsigned int virq)
        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
-static void socrates_fpga_pic_mask_ack(unsigned int virq)
+static void socrates_fpga_pic_mask_ack(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        int irq_line;
        u32 mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        irq_line = fpga_irqs[hwirq].irq_line;
        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
@@ -161,15 +153,13 @@ static void socrates_fpga_pic_mask_ack(unsigned int virq)
        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
-static void socrates_fpga_pic_unmask(unsigned int virq)
+static void socrates_fpga_pic_unmask(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        int irq_line;
        u32 mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        irq_line = fpga_irqs[hwirq].irq_line;
        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
@@ -179,15 +169,13 @@ static void socrates_fpga_pic_unmask(unsigned int virq)
        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
-static void socrates_fpga_pic_eoi(unsigned int virq)
+static void socrates_fpga_pic_eoi(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        int irq_line;
        u32 mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        irq_line = fpga_irqs[hwirq].irq_line;
        raw_spin_lock_irqsave(&socrates_fpga_pic_lock, flags);
        mask = socrates_fpga_pic_read(FPGA_PIC_IRQMASK(irq_line))
@@ -197,16 +185,14 @@ static void socrates_fpga_pic_eoi(unsigned int virq)
        raw_spin_unlock_irqrestore(&socrates_fpga_pic_lock, flags);
 }
-static int socrates_fpga_pic_set_type(unsigned int virq,
+static int socrates_fpga_pic_set_type(struct irq_data *d,
                unsigned int flow_type)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        int polarity;
        u32 mask;
-        hwirq = socrates_fpga_irq_to_hw(virq);
        if (fpga_irqs[hwirq].type != IRQ_TYPE_NONE)
                return -EINVAL;
@@ -233,21 +219,21 @@ static int socrates_fpga_pic_set_type(unsigned int virq,
 static struct irq_chip socrates_fpga_pic_chip = {
        .name           = "FPGA-PIC",
-        .ack            = socrates_fpga_pic_ack,
+        .irq_ack        = socrates_fpga_pic_ack,
-        .mask           = socrates_fpga_pic_mask,
+        .irq_mask       = socrates_fpga_pic_mask,
-        .mask_ack       = socrates_fpga_pic_mask_ack,
+        .irq_mask_ack   = socrates_fpga_pic_mask_ack,
-        .unmask         = socrates_fpga_pic_unmask,
+        .irq_unmask     = socrates_fpga_pic_unmask,
-        .eoi            = socrates_fpga_pic_eoi,
+        .irq_eoi        = socrates_fpga_pic_eoi,
-        .set_type       = socrates_fpga_pic_set_type,
+        .irq_set_type   = socrates_fpga_pic_set_type,
 };
 static int socrates_fpga_pic_host_map(struct irq_host *h, unsigned int virq,
                irq_hw_number_t hwirq)
 {
        /* All interrupts are LEVEL sensitive */
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &socrates_fpga_pic_chip,
+        irq_set_chip_and_handler(virq, &socrates_fpga_pic_chip,
-                        handle_fasteoi_irq);
+                                 handle_fasteoi_irq);
        return 0;
 }
@@ -308,8 +294,8 @@ void socrates_fpga_pic_init(struct device_node *pic)
                        pr_warning("FPGA PIC: can't get irq%d.\n", i);
                        continue;
                }
-                set_irq_chained_handler(socrates_fpga_irqs[i],
+                irq_set_chained_handler(socrates_fpga_irqs[i],
-                                socrates_fpga_pic_cascade);
+                                        socrates_fpga_pic_cascade);
        }
        socrates_fpga_pic_iobase = of_iomap(pic, 0);
diff --git a/arch/powerpc/platforms/85xx/stx_gp3.c b/arch/powerpc/platforms/85xx/stx_gp3.c
index bc33d1859ae7..5387e9f06bdb 100644
--- a/arch/powerpc/platforms/85xx/stx_gp3.c
+++ b/arch/powerpc/platforms/85xx/stx_gp3.c
@@ -46,12 +46,13 @@
 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int cascade_irq;
        while ((cascade_irq = cpm2_get_irq()) >= 0)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif /* CONFIG_CPM2 */
@@ -101,7 +102,7 @@ static void __init stx_gp3_pic_init(void)
        cpm2_pic_init(np);
        of_node_put(np);
-        set_irq_chained_handler(irq, cpm2_cascade);
+        irq_set_chained_handler(irq, cpm2_cascade);
 #endif
 }
diff --git a/arch/powerpc/platforms/85xx/tqm85xx.c b/arch/powerpc/platforms/85xx/tqm85xx.c
index 8f29bbce5360..325de772725a 100644
--- a/arch/powerpc/platforms/85xx/tqm85xx.c
+++ b/arch/powerpc/platforms/85xx/tqm85xx.c
@@ -44,12 +44,13 @@
 static void cpm2_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        int cascade_irq;
        while ((cascade_irq = cpm2_get_irq()) >= 0)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif /* CONFIG_CPM2 */
@@ -99,7 +100,7 @@ static void __init tqm85xx_pic_init(void)
        cpm2_pic_init(np);
        of_node_put(np);
-        set_irq_chained_handler(irq, cpm2_cascade);
+        irq_set_chained_handler(irq, cpm2_cascade);
 #endif
 }
@@ -186,21 +187,21 @@ static int __init declare_of_platform_devices(void)
 }
 machine_device_initcall(tqm85xx, declare_of_platform_devices);
+static const char *board[] __initdata = {
+        "tqc,tqm8540",
+        "tqc,tqm8541",
+        "tqc,tqm8548",
+        "tqc,tqm8555",
+        "tqc,tqm8560",
+        NULL
+};
 /*
 * Called very early, device-tree isn't unflattened
 */
 static int __init tqm85xx_probe(void)
 {
-        unsigned long root = of_get_flat_dt_root();
+        return of_flat_dt_match(of_get_flat_dt_root(), board);
-        if ((of_flat_dt_is_compatible(root, "tqc,tqm8540")) ||
-            (of_flat_dt_is_compatible(root, "tqc,tqm8541")) ||
-            (of_flat_dt_is_compatible(root, "tqc,tqm8548")) ||
-            (of_flat_dt_is_compatible(root, "tqc,tqm8555")) ||
-            (of_flat_dt_is_compatible(root, "tqc,tqm8560")))
-                return 1;
-        return 0;
 }
 define_machine(tqm85xx) {
diff --git a/arch/powerpc/platforms/86xx/gef_pic.c b/arch/powerpc/platforms/86xx/gef_pic.c
index 6df9e2561c06..94594e58594c 100644
--- a/arch/powerpc/platforms/86xx/gef_pic.c
+++ b/arch/powerpc/platforms/86xx/gef_pic.c
@@ -46,8 +46,6 @@
 #define GEF_PIC_CPU0_MCP_MASK   GEF_PIC_MCP_MASK(0)
 #define GEF_PIC_CPU1_MCP_MASK   GEF_PIC_MCP_MASK(1)
-#define gef_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 static DEFINE_RAW_SPINLOCK(gef_pic_lock);
@@ -95,6 +93,7 @@ static int gef_pic_cascade_irq;
 void gef_pic_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq;
        /*
@@ -106,18 +105,15 @@ void gef_pic_cascade(unsigned int irq, struct irq_desc *desc)
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
-static void gef_pic_mask(unsigned int virq)
+static void gef_pic_mask(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        u32 mask;
-        hwirq = gef_irq_to_hw(virq);
        raw_spin_lock_irqsave(&gef_pic_lock, flags);
        mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
        mask &= ~(1 << hwirq);
@@ -125,22 +121,20 @@ static void gef_pic_mask(unsigned int virq)
        raw_spin_unlock_irqrestore(&gef_pic_lock, flags);
 }
-static void gef_pic_mask_ack(unsigned int virq)
+static void gef_pic_mask_ack(struct irq_data *d)
 {
        /* Don't think we actually have to do anything to ack an interrupt,
         * we just need to clear down the devices interrupt and it will go away
         */
-        gef_pic_mask(virq);
+        gef_pic_mask(d);
 }
-static void gef_pic_unmask(unsigned int virq)
+static void gef_pic_unmask(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int hwirq;
+        unsigned int hwirq = irqd_to_hwirq(d);
        u32 mask;
-        hwirq = gef_irq_to_hw(virq);
        raw_spin_lock_irqsave(&gef_pic_lock, flags);
        mask = in_be32(gef_pic_irq_reg_base + GEF_PIC_INTR_MASK(0));
        mask |= (1 << hwirq);
@@ -150,9 +144,9 @@ static void gef_pic_unmask(unsigned int virq)
 static struct irq_chip gef_pic_chip = {
        .name           = "gefp",
-        .mask           = gef_pic_mask,
+        .irq_mask       = gef_pic_mask,
-        .mask_ack       = gef_pic_mask_ack,
+        .irq_mask_ack   = gef_pic_mask_ack,
-        .unmask         = gef_pic_unmask,
+        .irq_unmask     = gef_pic_unmask,
 };
@@ -163,8 +157,8 @@ static int gef_pic_host_map(struct irq_host *h, unsigned int virq,
                          irq_hw_number_t hwirq)
 {
        /* All interrupts are LEVEL sensitive */
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &gef_pic_chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, &gef_pic_chip, handle_level_irq);
        return 0;
 }
@@ -225,7 +219,7 @@ void __init gef_pic_init(struct device_node *np)
                return;
        /* Chain with parent controller */
-        set_irq_chained_handler(gef_pic_cascade_irq, gef_pic_cascade);
+        irq_set_chained_handler(gef_pic_cascade_irq, gef_pic_cascade);
 }
 /*
diff --git a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
index 018cc67be426..a896511690c2 100644
--- a/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
+++ b/arch/powerpc/platforms/86xx/mpc8610_hpcd.c
@@ -66,7 +66,7 @@ static void __init mpc8610_suspend_init(void)
                return;
        }
-        ret = request_irq(irq, mpc8610_sw9_irq, 0, "sw9/wakeup", NULL);
+        ret = request_irq(irq, mpc8610_sw9_irq, 0, "sw9:wakeup", NULL);
        if (ret) {
                pr_err("%s: can't request pixis event IRQ: %d\n",
                       __func__, ret);
@@ -105,45 +105,77 @@ machine_device_initcall(mpc86xx_hpcd, mpc8610_declare_of_platform_devices);
 #if defined(CONFIG_FB_FSL_DIU) || defined(CONFIG_FB_FSL_DIU_MODULE)
-static u32 get_busfreq(void)
+/*
-{
+ * DIU Area Descriptor
-        struct device_node *node;
+ *
+ * The MPC8610 reference manual shows the bits of the AD register in
-        u32 fs_busfreq = 0;
+ * little-endian order, which causes the BLUE_C field to be split into two
-        node = of_find_node_by_type(NULL, "cpu");
+ * parts. To simplify the definition of the MAKE_AD() macro, we define the
-        if (node) {
+ * fields in big-endian order and byte-swap the result.
-                unsigned int size;
+ *
-                const unsigned int *prop =
+ * So even though the registers don't look like they're in the
-                        of_get_property(node, "bus-frequency", &size);
+ * same bit positions as they are on the P1022, the same value is written to
-                if (prop)
+ * the AD register on the MPC8610 and on the P1022.
-                        fs_busfreq = *prop;
+ */
-                of_node_put(node);
+#define AD_BYTE_F               0x10000000
-        };
+#define AD_ALPHA_C_MASK         0x0E000000
-        return fs_busfreq;
+#define AD_ALPHA_C_SHIFT        25
-}
+#define AD_BLUE_C_MASK          0x01800000
+#define AD_BLUE_C_SHIFT         23
+#define AD_GREEN_C_MASK         0x00600000
+#define AD_GREEN_C_SHIFT        21
+#define AD_RED_C_MASK           0x00180000
+#define AD_RED_C_SHIFT          19
+#define AD_PALETTE              0x00040000
+#define AD_PIXEL_S_MASK         0x00030000
+#define AD_PIXEL_S_SHIFT        16
+#define AD_COMP_3_MASK          0x0000F000
+#define AD_COMP_3_SHIFT         12
+#define AD_COMP_2_MASK          0x00000F00
+#define AD_COMP_2_SHIFT         8
+#define AD_COMP_1_MASK          0x000000F0
+#define AD_COMP_1_SHIFT         4
+#define AD_COMP_0_MASK          0x0000000F
+#define AD_COMP_0_SHIFT         0
+#define MAKE_AD(alpha, red, blue, green, size, c0, c1, c2, c3) \
+        cpu_to_le32(AD_BYTE_F | (alpha << AD_ALPHA_C_SHIFT) | \
+        (blue << AD_BLUE_C_SHIFT) | (green << AD_GREEN_C_SHIFT) | \
+        (red << AD_RED_C_SHIFT) | (c3 << AD_COMP_3_SHIFT) | \
+        (c2 << AD_COMP_2_SHIFT) | (c1 << AD_COMP_1_SHIFT) | \
+        (c0 << AD_COMP_0_SHIFT) | (size << AD_PIXEL_S_SHIFT))
 unsigned int mpc8610hpcd_get_pixel_format(unsigned int bits_per_pixel,
                                                int monitor_port)
 {
        static const unsigned long pixelformat[][3] = {
-                {0x88882317, 0x88083218, 0x65052119},
+                {
-                {0x88883316, 0x88082219, 0x65053118},
+                        MAKE_AD(3, 0, 2, 1, 3, 8, 8, 8, 8),
+                        MAKE_AD(4, 2, 0, 1, 2, 8, 8, 8, 0),
+                        MAKE_AD(4, 0, 2, 1, 1, 5, 6, 5, 0)
+                },
+                {
+                        MAKE_AD(3, 2, 0, 1, 3, 8, 8, 8, 8),
+                        MAKE_AD(4, 0, 2, 1, 2, 8, 8, 8, 0),
+                        MAKE_AD(4, 2, 0, 1, 1, 5, 6, 5, 0)
+                },
        };
-        unsigned int pix_fmt, arch_monitor;
+        unsigned int arch_monitor;
+        /* The DVI port is mis-wired on revision 1 of this board. */
        arch_monitor = ((*pixis_arch == 0x01) && (monitor_port == 0))? 0 : 1;
-                /* DVI port for board version 0x01 */
+        switch (bits_per_pixel) {
-        if (bits_per_pixel == 32)
+        case 32:
-                pix_fmt = pixelformat[arch_monitor][0];
+                return pixelformat[arch_monitor][0];
-        else if (bits_per_pixel == 24)
+        case 24:
-                pix_fmt = pixelformat[arch_monitor][1];
+                return pixelformat[arch_monitor][1];
-        else if (bits_per_pixel == 16)
+        case 16:
-                pix_fmt = pixelformat[arch_monitor][2];
+                return pixelformat[arch_monitor][2];
-        else
+        default:
-                pix_fmt = pixelformat[1][0];
+                pr_err("fsl-diu: unsupported pixel depth %u\n", bits_per_pixel);
+                return 0;
-        return pix_fmt;
+        }
 }
 void mpc8610hpcd_set_gamma_table(int monitor_port, char *gamma_table_base)
@@ -190,8 +222,7 @@ void mpc8610hpcd_set_pixel_clock(unsigned int pixclock)
        }
        /* Pixel Clock configuration */
-        pr_debug("DIU: Bus Frequency = %d\n", get_busfreq());
+        speed_ccb = fsl_get_sys_freq();
-        speed_ccb = get_busfreq();
        /* Calculate the pixel clock with the smallest error */
        /* calculate the following in steps to avoid overflow */
diff --git a/arch/powerpc/platforms/86xx/mpc86xx_smp.c b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
index eacea0e3fcc8..af09baee22cb 100644
--- a/arch/powerpc/platforms/86xx/mpc86xx_smp.c
+++ b/arch/powerpc/platforms/86xx/mpc86xx_smp.c
@@ -56,7 +56,7 @@ smp_86xx_release_core(int nr)
 }
-static void __init
+static int __init
 smp_86xx_kick_cpu(int nr)
 {
        unsigned int save_vector;
@@ -65,7 +65,7 @@ smp_86xx_kick_cpu(int nr)
        unsigned int *vector = (unsigned int *)(KERNELBASE + 0x100);
        if (nr < 0 || nr >= NR_CPUS)
-                return;
+                return -ENOENT;
        pr_debug("smp_86xx_kick_cpu: kick CPU #%d\n", nr);
@@ -92,6 +92,8 @@ smp_86xx_kick_cpu(int nr)
        local_irq_restore(flags);
        pr_debug("wait CPU #%d for %d msecs.\n", nr, n);
+        return 0;
 }
diff --git a/arch/powerpc/platforms/86xx/pic.c b/arch/powerpc/platforms/86xx/pic.c
index 668275d9e668..8ef8960abda6 100644
--- a/arch/powerpc/platforms/86xx/pic.c
+++ b/arch/powerpc/platforms/86xx/pic.c
@@ -19,10 +19,13 @@
 #ifdef CONFIG_PPC_I8259
 static void mpc86xx_8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = i8259_irq();
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 #endif  /* CONFIG_PPC_I8259 */
@@ -74,6 +77,6 @@ void __init mpc86xx_init_irq(void)
        i8259_init(cascade_node, 0);
        of_node_put(cascade_node);
-        set_irq_chained_handler(cascade_irq, mpc86xx_8259_cascade);
+        irq_set_chained_handler(cascade_irq, mpc86xx_8259_cascade);
 #endif
 }
diff --git a/arch/powerpc/platforms/8xx/Kconfig b/arch/powerpc/platforms/8xx/Kconfig
index dd35ce081cff..ee56a9ea6a79 100644
--- a/arch/powerpc/platforms/8xx/Kconfig
+++ b/arch/powerpc/platforms/8xx/Kconfig
@@ -49,12 +49,6 @@ config PPC_ADDER875
          This enables support for the Analogue & Micro Adder 875
          board.
-config PPC_MGSUVD
-        bool "MGSUVD"
-        select CPM1
-        help
-          This enables support for the Keymile MGSUVD board.
 config TQM8XX
        bool "TQM8XX"
        select CPM1
diff --git a/arch/powerpc/platforms/8xx/Makefile b/arch/powerpc/platforms/8xx/Makefile
index a491fe6b94fc..76a81c3350a8 100644
--- a/arch/powerpc/platforms/8xx/Makefile
+++ b/arch/powerpc/platforms/8xx/Makefile
@@ -6,5 +6,4 @@ obj-$(CONFIG_MPC885ADS)   += mpc885ads_setup.o
 obj-$(CONFIG_MPC86XADS)   += mpc86xads_setup.o
 obj-$(CONFIG_PPC_EP88XC)  += ep88xc.o
 obj-$(CONFIG_PPC_ADDER875) += adder875.o
-obj-$(CONFIG_PPC_MGSUVD) += mgsuvd.o
 obj-$(CONFIG_TQM8XX)      += tqm8xx_setup.o
diff --git a/arch/powerpc/platforms/8xx/m8xx_setup.c b/arch/powerpc/platforms/8xx/m8xx_setup.c
index 60168c1f98fe..1e121088826f 100644
--- a/arch/powerpc/platforms/8xx/m8xx_setup.c
+++ b/arch/powerpc/platforms/8xx/m8xx_setup.c
@@ -150,7 +150,7 @@ void __init mpc8xx_calibrate_decr(void)
         */
        cpu = of_find_node_by_type(NULL, "cpu");
        virq= irq_of_parse_and_map(cpu, 0);
-        irq = irq_map[virq].hwirq;
+        irq = virq_to_hw(virq);
        sys_tmr2 = immr_map(im_sit);
        out_be16(&sys_tmr2->sit_tbscr, ((1 << (7 - (irq/2))) << 8) |
@@ -218,15 +218,20 @@ void mpc8xx_restart(char *cmd)
 static void cpm_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip;
        int cascade_irq;
        if ((cascade_irq = cpm_get_irq()) >= 0) {
                struct irq_desc *cdesc = irq_to_desc(cascade_irq);
                generic_handle_irq(cascade_irq);
-                cdesc->chip->eoi(cascade_irq);
+                chip = irq_desc_get_chip(cdesc);
+                chip->irq_eoi(&cdesc->irq_data);
        }
-        desc->chip->eoi(irq);
+        chip = irq_desc_get_chip(desc);
+        chip->irq_eoi(&desc->irq_data);
 }
 /* Initialize the internal interrupt controllers.  The number of
@@ -246,5 +251,5 @@ void __init mpc8xx_pics_init(void)
        irq = cpm_pic_init();
        if (irq != NO_IRQ)
-                set_irq_chained_handler(irq, cpm_cascade);
+                irq_set_chained_handler(irq, cpm_cascade);
 }
diff --git a/arch/powerpc/platforms/8xx/mgsuvd.c b/arch/powerpc/platforms/8xx/mgsuvd.c
deleted file mode 100644
index ca3cb071772c..000000000000
--- a/arch/powerpc/platforms/8xx/mgsuvd.c
+++ /dev/null
@@ -1,92 +0,0 @@
-/*
- *
- * Platform setup for the Keymile mgsuvd board
- *
- * Heiko Schocher <hs@denx.de>
- *
- * Copyright 2008 DENX Software Engineering GmbH
- *
- * This file is licensed under the terms of the GNU General Public License
- * version 2. This program is licensed "as is" without any warranty of any
- * kind, whether express or implied.
- */
-#include <linux/ioport.h>
-#include <linux/of_platform.h>
-#include <asm/io.h>
-#include <asm/machdep.h>
-#include <asm/processor.h>
-#include <asm/cpm1.h>
-#include <asm/prom.h>
-#include <asm/fs_pd.h>
-#include "mpc8xx.h"
-struct cpm_pin {
-        int port, pin, flags;
-};
-static __initdata struct cpm_pin mgsuvd_pins[] = {
-        /* SMC1 */
-        {CPM_PORTB, 24, CPM_PIN_INPUT}, /* RX */
-        {CPM_PORTB, 25, CPM_PIN_INPUT | CPM_PIN_SECONDARY}, /* TX */
-        /* SCC3 */
-        {CPM_PORTA, 10, CPM_PIN_INPUT},
-        {CPM_PORTA, 11, CPM_PIN_INPUT},
-        {CPM_PORTA, 3, CPM_PIN_INPUT},
-        {CPM_PORTA, 2, CPM_PIN_INPUT},
-        {CPM_PORTC, 13, CPM_PIN_INPUT},
-};
-static void __init init_ioports(void)
-{
-        int i;
-        for (i = 0; i < ARRAY_SIZE(mgsuvd_pins); i++) {
-                struct cpm_pin *pin = &mgsuvd_pins[i];
-                cpm1_set_pin(pin->port, pin->pin, pin->flags);
-        }
-        setbits16(&mpc8xx_immr->im_ioport.iop_pcso, 0x300);
-        cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK5, CPM_CLK_RX);
-        cpm1_clk_setup(CPM_CLK_SCC3, CPM_CLK6, CPM_CLK_TX);
-        cpm1_clk_setup(CPM_CLK_SMC1, CPM_BRG1, CPM_CLK_RTX);
-}
-static void __init mgsuvd_setup_arch(void)
-{
-        cpm_reset();
-        init_ioports();
-}
-static __initdata struct of_device_id of_bus_ids[] = {
-        { .compatible = "simple-bus" },
-        {},
-};
-static int __init declare_of_platform_devices(void)
-{
-        of_platform_bus_probe(NULL, of_bus_ids, NULL);
-        return 0;
-}
-machine_device_initcall(mgsuvd, declare_of_platform_devices);
-static int __init mgsuvd_probe(void)
-{
-        unsigned long root = of_get_flat_dt_root();
-        return of_flat_dt_is_compatible(root, "keymile,mgsuvd");
-}
-define_machine(mgsuvd) {
-        .name           = "MGSUVD",
-        .probe          = mgsuvd_probe,
-        .setup_arch     = mgsuvd_setup_arch,
-        .init_IRQ       = mpc8xx_pics_init,
-        .get_irq        = mpc8xx_get_irq,
-        .restart        = mpc8xx_restart,
-        .calibrate_decr = mpc8xx_calibrate_decr,
-        .set_rtc_time   = mpc8xx_set_rtc_time,
-        .get_rtc_time   = mpc8xx_get_rtc_time,
-};
diff --git a/arch/powerpc/platforms/Kconfig b/arch/powerpc/platforms/Kconfig
index 81c9208025fa..f970ca2b180c 100644
--- a/arch/powerpc/platforms/Kconfig
+++ b/arch/powerpc/platforms/Kconfig
@@ -20,6 +20,17 @@ source "arch/powerpc/platforms/embedded6xx/Kconfig"
 source "arch/powerpc/platforms/44x/Kconfig"
 source "arch/powerpc/platforms/40x/Kconfig"
 source "arch/powerpc/platforms/amigaone/Kconfig"
+source "arch/powerpc/platforms/wsp/Kconfig"
+config KVM_GUEST
+        bool "KVM Guest support"
+        default y
+        ---help---
+          This option enables various optimizations for running under the KVM
+          hypervisor. Overhead for the kernel when not running inside KVM should
+          be minimal.
+          In case of doubt, say Y
 config PPC_NATIVE
        bool
@@ -36,7 +47,7 @@ config PPC_OF_BOOT_TRAMPOLINE
        help
          Support from booting from Open Firmware or yaboot using an
          Open Firmware client interface. This enables the kernel to
-          communicate with open firmware to retrieve system informations
+          communicate with open firmware to retrieve system information
          such as the device tree.
          In case of doubt, say Y
@@ -46,16 +57,19 @@ config UDBG_RTAS_CONSOLE
        depends on PPC_RTAS
        default n
+config PPC_SMP_MUXED_IPI
+        bool
+        help
+          Select this opton if your platform supports SMP and your
+          interrupt controller provides less than 4 interrupts to each
+          cpu.  This will enable the generic code to multiplex the 4
+          messages on to one ipi.
 config PPC_UDBG_BEAT
        bool "BEAT based debug console"
        depends on PPC_CELLEB
        default n
-config XICS
-        depends on PPC_PSERIES
-        bool
-        default y
 config IPIC
        bool
        default n
@@ -137,14 +151,27 @@ config PPC_970_NAP
        bool
        default n
+config PPC_P7_NAP
+        bool
+        default n
 config PPC_INDIRECT_IO
        bool
        select GENERIC_IOMAP
-        default n
+config PPC_INDIRECT_PIO
+        bool
+        select PPC_INDIRECT_IO
+config PPC_INDIRECT_MMIO
+        bool
+        select PPC_INDIRECT_IO
+config PPC_IO_WORKAROUNDS
+        bool
 config GENERIC_IOMAP
        bool
-        default n
 source "drivers/cpufreq/Kconfig"
@@ -303,13 +330,14 @@ config OF_RTC
 source "arch/powerpc/sysdev/bestcomm/Kconfig"
 config MPC8xxx_GPIO
-        bool "MPC8xxx GPIO support"
+        bool "MPC512x/MPC8xxx GPIO support"
-        depends on PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || FSL_SOC_BOOKE || PPC_86xx
+        depends on PPC_MPC512x || PPC_MPC831x || PPC_MPC834x || PPC_MPC837x || \
+                   FSL_SOC_BOOKE || PPC_86xx
        select GENERIC_GPIO
        select ARCH_REQUIRE_GPIOLIB
        help
          Say Y here if you're going to use hardware that connects to the
-          MPC831x/834x/837x/8572/8610 GPIOs.
+          MPC512x/831x/834x/837x/8572/8610 GPIOs.
 config SIMPLE_GPIO
        bool "Support for simple, memory-mapped GPIO controllers"
diff --git a/arch/powerpc/platforms/Kconfig.cputype b/arch/powerpc/platforms/Kconfig.cputype
index d361f8119b1e..2165b65876f9 100644
--- a/arch/powerpc/platforms/Kconfig.cputype
+++ b/arch/powerpc/platforms/Kconfig.cputype
@@ -73,6 +73,7 @@ config PPC_BOOK3S_64
 config PPC_BOOK3E_64
        bool "Embedded processors"
        select PPC_FPU # Make it a choice ?
+        select PPC_SMP_MUXED_IPI
 endchoice
@@ -107,6 +108,10 @@ config POWER4
        depends on PPC64 && PPC_BOOK3S
        def_bool y
+config PPC_A2
+        bool
+        depends on PPC_BOOK3E_64
 config TUNE_CELL
        bool "Optimize for Cell Broadband Engine"
        depends on PPC64 && PPC_BOOK3S
@@ -125,6 +130,7 @@ config 8xx
 config E500
        select FSL_EMB_PERFMON
+        select PPC_FSL_BOOK3E
        bool
 config PPC_E500MC
@@ -166,9 +172,15 @@ config BOOKE
 config FSL_BOOKE
        bool
-        depends on E200 || E500
+        depends on (E200 || E500) && PPC32
        default y
+# this is for common code between PPC32 & PPC64 FSL BOOKE
+config PPC_FSL_BOOK3E
+        bool
+        select FSL_EMB_PERFMON
+        select PPC_SMP_MUXED_IPI
+        default y if FSL_BOOKE
 config PTE_64BIT
        bool
@@ -220,6 +232,24 @@ config VSX
          If in doubt, say Y here.
+config PPC_ICSWX
+        bool "Support for PowerPC icswx coprocessor instruction"
+        depends on POWER4
+        default n
+        ---help---
+          This option enables kernel support for the PowerPC Initiate
+          Coprocessor Store Word (icswx) coprocessor instruction on POWER7
+          or newer processors.
+          This option is only useful if you have a processor that supports
+          the icswx coprocessor instruction. It does not have any effect
+          on processors without the icswx coprocessor instruction.
+          This option slightly increases kernel memory usage.
+          If in doubt, say N here.
 config SPE
        bool "SPE Support"
        depends on E200 || (E500 && !PPC_E500MC)
diff --git a/arch/powerpc/platforms/Makefile b/arch/powerpc/platforms/Makefile
index fdb9f0b0d7a8..73e2116cfeed 100644
--- a/arch/powerpc/platforms/Makefile
+++ b/arch/powerpc/platforms/Makefile
@@ -22,3 +22,4 @@ obj-$(CONFIG_PPC_CELL)		+= cell/
 obj-$(CONFIG_PPC_PS3)           += ps3/
 obj-$(CONFIG_EMBEDDED6xx)       += embedded6xx/
 obj-$(CONFIG_AMIGAONE)          += amigaone/
+obj-$(CONFIG_PPC_WSP)           += wsp/
diff --git a/arch/powerpc/platforms/cell/Kconfig b/arch/powerpc/platforms/cell/Kconfig
index 48cd7d2e1b75..67d5009b4e86 100644
--- a/arch/powerpc/platforms/cell/Kconfig
+++ b/arch/powerpc/platforms/cell/Kconfig
@@ -6,14 +6,17 @@ config PPC_CELL_COMMON
        bool
        select PPC_CELL
        select PPC_DCR_MMIO
-        select PPC_INDIRECT_IO
+        select PPC_INDIRECT_PIO
+        select PPC_INDIRECT_MMIO
        select PPC_NATIVE
        select PPC_RTAS
+        select IRQ_EDGE_EOI_HANDLER
 config PPC_CELL_NATIVE
        bool
        select PPC_CELL_COMMON
        select MPIC
+        select PPC_IO_WORKAROUNDS
        select IBM_NEW_EMAC_EMAC4
        select IBM_NEW_EMAC_RGMII
        select IBM_NEW_EMAC_ZMII #test only
diff --git a/arch/powerpc/platforms/cell/Makefile b/arch/powerpc/platforms/cell/Makefile
index 83fafe922641..a4a89350bcfc 100644
--- a/arch/powerpc/platforms/cell/Makefile
+++ b/arch/powerpc/platforms/cell/Makefile
@@ -1,7 +1,7 @@
 obj-$(CONFIG_PPC_CELL_COMMON)           += cbe_regs.o interrupt.o pervasive.o
 obj-$(CONFIG_PPC_CELL_NATIVE)           += iommu.o setup.o spider-pic.o \
-                                           pmu.o io-workarounds.o spider-pci.o
+                                           pmu.o spider-pci.o
 obj-$(CONFIG_CBE_RAS)                   += ras.o
 obj-$(CONFIG_CBE_THERM)                 += cbe_thermal.o
@@ -39,11 +39,10 @@ obj-y					+= celleb_setup.o \
                                           celleb_pci.o celleb_scc_epci.o \
                                           celleb_scc_pciex.o \
                                           celleb_scc_uhc.o \
-                                           io-workarounds.o spider-pci.o \
+                                           spider-pci.o beat.o beat_htab.o \
-                                           beat.o beat_htab.o beat_hvCall.o \
+                                           beat_hvCall.o beat_interrupt.o \
-                                           beat_interrupt.o beat_iommu.o
+                                           beat_iommu.o
-obj-$(CONFIG_SMP)                       += beat_smp.o
 obj-$(CONFIG_PPC_UDBG_BEAT)             += beat_udbg.o
 obj-$(CONFIG_SERIAL_TXX9)               += celleb_scc_sio.o
 obj-$(CONFIG_SPU_BASE)                  += beat_spu_priv1.o
diff --git a/arch/powerpc/platforms/cell/axon_msi.c b/arch/powerpc/platforms/cell/axon_msi.c
index 97085530aa63..ac06903e136a 100644
--- a/arch/powerpc/platforms/cell/axon_msi.c
+++ b/arch/powerpc/platforms/cell/axon_msi.c
@@ -93,7 +93,8 @@ static void msic_dcr_write(struct axon_msic *msic, unsigned int dcr_n, u32 val)
 static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct axon_msic *msic = get_irq_data(irq);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct axon_msic *msic = irq_get_handler_data(irq);
        u32 write_offset, msi;
        int idx;
        int retry = 0;
@@ -112,7 +113,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
                pr_devel("axon_msi: woff %x roff %x msi %x\n",
                          write_offset, msic->read_offset, msi);
-                if (msi < NR_IRQS && irq_map[msi].host == msic->irq_host) {
+                if (msi < NR_IRQS && irq_get_chip_data(msi) == msic) {
                        generic_handle_irq(msi);
                        msic->fifo_virt[idx] = cpu_to_le32(0xffffffff);
                } else {
@@ -145,7 +146,7 @@ static void axon_msi_cascade(unsigned int irq, struct irq_desc *desc)
                msic->read_offset &= MSIC_FIFO_SIZE_MASK;
        }
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static struct axon_msic *find_msi_translator(struct pci_dev *dev)
@@ -286,7 +287,7 @@ static int axon_msi_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
                }
                dev_dbg(&dev->dev, "axon_msi: allocated virq 0x%x\n", virq);
-                set_irq_msi(virq, entry);
+                irq_set_msi_desc(virq, entry);
                msg.data = virq;
                write_msi_msg(virq, &msg);
        }
@@ -304,22 +305,23 @@ static void axon_msi_teardown_msi_irqs(struct pci_dev *dev)
                if (entry->irq == NO_IRQ)
                        continue;
-                set_irq_msi(entry->irq, NULL);
+                irq_set_msi_desc(entry->irq, NULL);
                irq_dispose_mapping(entry->irq);
        }
 }
 static struct irq_chip msic_irq_chip = {
-        .mask           = mask_msi_irq,
+        .irq_mask       = mask_msi_irq,
-        .unmask         = unmask_msi_irq,
+        .irq_unmask     = unmask_msi_irq,
-        .shutdown       = unmask_msi_irq,
+        .irq_shutdown   = mask_msi_irq,
        .name           = "AXON-MSI",
 };
 static int msic_host_map(struct irq_host *h, unsigned int virq,
                         irq_hw_number_t hw)
 {
-        set_irq_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq);
+        irq_set_chip_data(virq, h->host_data);
+        irq_set_chip_and_handler(virq, &msic_irq_chip, handle_simple_irq);
        return 0;
 }
@@ -328,7 +330,7 @@ static struct irq_host_ops msic_host_ops = {
        .map    = msic_host_map,
 };
-static int axon_msi_shutdown(struct platform_device *device)
+static void axon_msi_shutdown(struct platform_device *device)
 {
        struct axon_msic *msic = dev_get_drvdata(&device->dev);
        u32 tmp;
@@ -338,12 +340,9 @@ static int axon_msi_shutdown(struct platform_device *device)
        tmp  = dcr_read(msic->dcr_host, MSIC_CTRL_REG);
        tmp &= ~MSIC_CTRL_ENABLE & ~MSIC_CTRL_IRQ_ENABLE;
        msic_dcr_write(msic, MSIC_CTRL_REG, tmp);
-        return 0;
 }
-static int axon_msi_probe(struct platform_device *device,
+static int axon_msi_probe(struct platform_device *device)
-                          const struct of_device_id *device_id)
 {
        struct device_node *dn = device->dev.of_node;
        struct axon_msic *msic;
@@ -402,8 +401,8 @@ static int axon_msi_probe(struct platform_device *device,
        msic->irq_host->host_data = msic;
-        set_irq_data(virq, msic);
+        irq_set_handler_data(virq, msic);
-        set_irq_chained_handler(virq, axon_msi_cascade);
+        irq_set_chained_handler(virq, axon_msi_cascade);
        pr_devel("axon_msi: irq 0x%x setup for axon_msi\n", virq);
        /* Enable the MSIC hardware */
@@ -446,7 +445,7 @@ static const struct of_device_id axon_msi_device_id[] = {
        {}
 };
-static struct of_platform_driver axon_msi_driver = {
+static struct platform_driver axon_msi_driver = {
        .probe          = axon_msi_probe,
        .shutdown       = axon_msi_shutdown,
        .driver = {
@@ -458,7 +457,7 @@ static struct of_platform_driver axon_msi_driver = {
 static int __init axon_msi_init(void)
 {
-        return of_register_platform_driver(&axon_msi_driver);
+        return platform_driver_register(&axon_msi_driver);
 }
 subsys_initcall(axon_msi_init);
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.c b/arch/powerpc/platforms/cell/beat_interrupt.c
index 682af97321a8..55015e1f6939 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.c
+++ b/arch/powerpc/platforms/cell/beat_interrupt.c
@@ -61,59 +61,59 @@ static inline void beatic_update_irq_mask(unsigned int irq_plug)
                panic("Failed to set mask IRQ!");
 }
-static void beatic_mask_irq(unsigned int irq_plug)
+static void beatic_mask_irq(struct irq_data *d)
 {
        unsigned long flags;
        raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
-        beatic_irq_mask_enable[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
+        beatic_irq_mask_enable[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
-        beatic_update_irq_mask(irq_plug);
+        beatic_update_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 }
-static void beatic_unmask_irq(unsigned int irq_plug)
+static void beatic_unmask_irq(struct irq_data *d)
 {
        unsigned long flags;
        raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
-        beatic_irq_mask_enable[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
+        beatic_irq_mask_enable[d->irq/64] |= 1UL << (63 - (d->irq%64));
-        beatic_update_irq_mask(irq_plug);
+        beatic_update_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 }
-static void beatic_ack_irq(unsigned int irq_plug)
+static void beatic_ack_irq(struct irq_data *d)
 {
        unsigned long flags;
        raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
-        beatic_irq_mask_ack[irq_plug/64] &= ~(1UL << (63 - (irq_plug%64)));
+        beatic_irq_mask_ack[d->irq/64] &= ~(1UL << (63 - (d->irq%64)));
-        beatic_update_irq_mask(irq_plug);
+        beatic_update_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 }
-static void beatic_end_irq(unsigned int irq_plug)
+static void beatic_end_irq(struct irq_data *d)
 {
        s64 err;
        unsigned long flags;
-        err = beat_downcount_of_interrupt(irq_plug);
+        err = beat_downcount_of_interrupt(d->irq);
        if (err != 0) {
                if ((err & 0xFFFFFFFF) != 0xFFFFFFF5) /* -11: wrong state */
                        panic("Failed to downcount IRQ! Error = %16llx", err);
-                printk(KERN_ERR "IRQ over-downcounted, plug %d\n", irq_plug);
+                printk(KERN_ERR "IRQ over-downcounted, plug %d\n", d->irq);
        }
        raw_spin_lock_irqsave(&beatic_irq_mask_lock, flags);
-        beatic_irq_mask_ack[irq_plug/64] |= 1UL << (63 - (irq_plug%64));
+        beatic_irq_mask_ack[d->irq/64] |= 1UL << (63 - (d->irq%64));
-        beatic_update_irq_mask(irq_plug);
+        beatic_update_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&beatic_irq_mask_lock, flags);
 }
 static struct irq_chip beatic_pic = {
        .name = "CELL-BEAT",
-        .unmask = beatic_unmask_irq,
+        .irq_unmask = beatic_unmask_irq,
-        .mask = beatic_mask_irq,
+        .irq_mask = beatic_mask_irq,
-        .eoi = beatic_end_irq,
+        .irq_eoi = beatic_end_irq,
 };
 /*
@@ -136,29 +136,18 @@ static void beatic_pic_host_unmap(struct irq_host *h, unsigned int virq)
 static int beatic_pic_host_map(struct irq_host *h, unsigned int virq,
                               irq_hw_number_t hw)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
        int64_t err;
        err = beat_construct_and_connect_irq_plug(virq, hw);
        if (err < 0)
                return -EIO;
-        desc->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
+        irq_set_chip_and_handler(virq, &beatic_pic, handle_fasteoi_irq);
        return 0;
 }
 /*
- * Update binding hardware IRQ number (hw) and Virtuql
- * IRQ number (virq). This is called only once for a given mapping.
- */
-static void beatic_pic_host_remap(struct irq_host *h, unsigned int virq,
-                               irq_hw_number_t hw)
-{
-        beat_construct_and_connect_irq_plug(virq, hw);
-}
-/*
 * Translate device-tree interrupt spec to irq_hw_number_t style (ulong),
 * to pass away to irq_create_mapping().
 *
@@ -185,7 +174,6 @@ static int beatic_pic_host_match(struct irq_host *h, struct device_node *np)
 static struct irq_host_ops beatic_pic_host_ops = {
        .map = beatic_pic_host_map,
-        .remap = beatic_pic_host_remap,
        .unmap = beatic_pic_host_unmap,
        .xlate = beatic_pic_host_xlate,
        .match = beatic_pic_host_match,
@@ -232,7 +220,7 @@ unsigned int beatic_get_irq(void)
        ret = beatic_get_irq_plug();
        if (ret != NO_IRQ)
-                beatic_ack_irq(ret);
+                beatic_ack_irq(irq_get_irq_data(ret));
        return ret;
 }
@@ -258,22 +246,6 @@ void __init beatic_init_IRQ(void)
        irq_set_default_host(beatic_host);
 }
-#ifdef CONFIG_SMP
-/* Nullified to compile with SMP mode */
-void beatic_setup_cpu(int cpu)
-{
-}
-void beatic_cause_IPI(int cpu, int mesg)
-{
-}
-void beatic_request_IPIs(void)
-{
-}
-#endif /* CONFIG_SMP */
 void beatic_deinit_IRQ(void)
 {
        int     i;
diff --git a/arch/powerpc/platforms/cell/beat_interrupt.h b/arch/powerpc/platforms/cell/beat_interrupt.h
index b470fd0051f1..a7e52f91a078 100644
--- a/arch/powerpc/platforms/cell/beat_interrupt.h
+++ b/arch/powerpc/platforms/cell/beat_interrupt.h
@@ -24,9 +24,6 @@
 extern void beatic_init_IRQ(void);
 extern unsigned int beatic_get_irq(void);
-extern void beatic_cause_IPI(int cpu, int mesg);
-extern void beatic_request_IPIs(void);
-extern void beatic_setup_cpu(int);
 extern void beatic_deinit_IRQ(void);
 #endif
diff --git a/arch/powerpc/platforms/cell/beat_iommu.c b/arch/powerpc/platforms/cell/beat_iommu.c
index beec405eb6f8..3ce685568935 100644
--- a/arch/powerpc/platforms/cell/beat_iommu.c
+++ b/arch/powerpc/platforms/cell/beat_iommu.c
@@ -76,7 +76,7 @@ static void __init celleb_init_direct_mapping(void)
 static void celleb_dma_dev_setup(struct device *dev)
 {
-        dev->archdata.dma_ops = get_pci_dma_ops();
+        set_dma_ops(dev, &dma_direct_ops);
        set_dma_offset(dev, celleb_dma_direct_offset);
 }
@@ -106,7 +106,6 @@ static struct notifier_block celleb_of_bus_notifier = {
 static int __init celleb_init_iommu(void)
 {
        celleb_init_direct_mapping();
-        set_pci_dma_ops(&dma_direct_ops);
        ppc_md.pci_dma_dev_setup = celleb_pci_dma_dev_setup;
        bus_register_notifier(&platform_bus_type, &celleb_of_bus_notifier);
diff --git a/arch/powerpc/platforms/cell/beat_smp.c b/arch/powerpc/platforms/cell/beat_smp.c
deleted file mode 100644
index 26efc204c47f..000000000000
--- a/arch/powerpc/platforms/cell/beat_smp.c
+++ /dev/null
@@ -1,124 +0,0 @@
-/*
- * SMP support for Celleb platform. (Incomplete)
- *
- * (C) Copyright 2006 TOSHIBA CORPORATION
- *
- * This code is based on arch/powerpc/platforms/cell/smp.c:
- * Dave Engebretsen, Peter Bergner, and
- * Mike Corrigan {engebret|bergner|mikec}@us.ibm.com
- * Plus various changes from other IBM teams...
- *
- * This program is free software; you can redistribute it and/or modify
- * it under the terms of the GNU General Public License as published by
- * the Free Software Foundation; either version 2 of the License, or
- * (at your option) any later version.
- *
- * This program is distributed in the hope that it will be useful,
- * but WITHOUT ANY WARRANTY; without even the implied warranty of
- * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
- * GNU General Public License for more details.
- *
- * You should have received a copy of the GNU General Public License along
- * with this program; if not, write to the Free Software Foundation, Inc.,
- * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
- */
-#undef DEBUG
-#include <linux/kernel.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/threads.h>
-#include <linux/cpu.h>
-#include <asm/irq.h>
-#include <asm/smp.h>
-#include <asm/machdep.h>
-#include <asm/udbg.h>
-#include "beat_interrupt.h"
-#ifdef DEBUG
-#define DBG(fmt...) udbg_printf(fmt)
-#else
-#define DBG(fmt...)
-#endif
-/*
- * The primary thread of each non-boot processor is recorded here before
- * smp init.
- */
-/* static cpumask_t of_spin_map; */
-/**
- * smp_startup_cpu() - start the given cpu
- *
- * At boot time, there is nothing to do for primary threads which were
- * started from Open Firmware.  For anything else, call RTAS with the
- * appropriate start location.
- *
- * Returns:
- *      0       - failure
- *      1       - success
- */
-static inline int __devinit smp_startup_cpu(unsigned int lcpu)
-{
-        return 0;
-}
-static void smp_beatic_message_pass(int target, int msg)
-{
-        unsigned int i;
-        if (target < NR_CPUS) {
-                beatic_cause_IPI(target, msg);
-        } else {
-                for_each_online_cpu(i) {
-                        if (target == MSG_ALL_BUT_SELF
-                            && i == smp_processor_id())
-                                continue;
-                        beatic_cause_IPI(i, msg);
-                }
-        }
-}
-static int __init smp_beatic_probe(void)
-{
-        return cpus_weight(cpu_possible_map);
-}
-static void __devinit smp_beatic_setup_cpu(int cpu)
-{
-        beatic_setup_cpu(cpu);
-}
-static void __devinit smp_celleb_kick_cpu(int nr)
-{
-        BUG_ON(nr < 0 || nr >= NR_CPUS);
-        if (!smp_startup_cpu(nr))
-                return;
-}
-static int smp_celleb_cpu_bootable(unsigned int nr)
-{
-        return 1;
-}
-static struct smp_ops_t bpa_beatic_smp_ops = {
-        .message_pass   = smp_beatic_message_pass,
-        .probe          = smp_beatic_probe,
-        .kick_cpu       = smp_celleb_kick_cpu,
-        .setup_cpu      = smp_beatic_setup_cpu,
-        .cpu_bootable   = smp_celleb_cpu_bootable,
-};
-/* This is called very early */
-void __init smp_init_celleb(void)
-{
-        DBG(" -> smp_init_celleb()\n");
-        smp_ops = &bpa_beatic_smp_ops;
-        DBG(" <- smp_init_celleb()\n");
-}
diff --git a/arch/powerpc/platforms/cell/cbe_regs.c b/arch/powerpc/platforms/cell/cbe_regs.c
index dbc338f187a2..f3917e7a5b44 100644
--- a/arch/powerpc/platforms/cell/cbe_regs.c
+++ b/arch/powerpc/platforms/cell/cbe_regs.c
@@ -45,8 +45,8 @@ static struct cbe_thread_map
        unsigned int cbe_id;
 } cbe_thread_map[NR_CPUS];
-static cpumask_t cbe_local_mask[MAX_CBE] = { [0 ... MAX_CBE-1] = CPU_MASK_NONE };
+static cpumask_t cbe_local_mask[MAX_CBE] = { [0 ... MAX_CBE-1] = {CPU_BITS_NONE} };
-static cpumask_t cbe_first_online_cpu = CPU_MASK_NONE;
+static cpumask_t cbe_first_online_cpu = { CPU_BITS_NONE };
 static struct cbe_regs_map *cbe_find_map(struct device_node *np)
 {
@@ -159,7 +159,8 @@ EXPORT_SYMBOL_GPL(cbe_cpu_to_node);
 u32 cbe_node_to_cpu(int node)
 {
-        return find_first_bit( (unsigned long *) &cbe_local_mask[node], sizeof(cpumask_t));
+        return cpumask_first(&cbe_local_mask[node]);
 }
 EXPORT_SYMBOL_GPL(cbe_node_to_cpu);
@@ -268,9 +269,9 @@ void __init cbe_regs_init(void)
                                thread->regs = map;
                                thread->cbe_id = cbe_id;
                                map->be_node = thread->be_node;
-                                cpu_set(i, cbe_local_mask[cbe_id]);
+                                cpumask_set_cpu(i, &cbe_local_mask[cbe_id]);
                                if(thread->thread_id == 0)
-                                        cpu_set(i, cbe_first_online_cpu);
+                                        cpumask_set_cpu(i, &cbe_first_online_cpu);
                        }
                }
diff --git a/arch/powerpc/platforms/cell/celleb_pci.c b/arch/powerpc/platforms/cell/celleb_pci.c
index 404d1fc04d59..5822141aa63f 100644
--- a/arch/powerpc/platforms/cell/celleb_pci.c
+++ b/arch/powerpc/platforms/cell/celleb_pci.c
@@ -41,7 +41,6 @@
 #include <asm/pci-bridge.h>
 #include <asm/ppc-pci.h>
-#include "io-workarounds.h"
 #include "celleb_pci.h"
 #define MAX_PCI_DEVICES    32
@@ -320,7 +319,7 @@ static int __init celleb_setup_fake_pci_device(struct device_node *node,
        size = 256;
        config = &private->fake_config[devno][fn];
-        *config = alloc_maybe_bootmem(size, GFP_KERNEL);
+        *config = zalloc_maybe_bootmem(size, GFP_KERNEL);
        if (*config == NULL) {
                printk(KERN_ERR "PCI: "
                       "not enough memory for fake configuration space\n");
@@ -331,7 +330,7 @@ static int __init celleb_setup_fake_pci_device(struct device_node *node,
        size = sizeof(struct celleb_pci_resource);
        res = &private->res[devno][fn];
-        *res = alloc_maybe_bootmem(size, GFP_KERNEL);
+        *res = zalloc_maybe_bootmem(size, GFP_KERNEL);
        if (*res == NULL) {
                printk(KERN_ERR
                       "PCI: not enough memory for resource data space\n");
@@ -432,7 +431,7 @@ static int __init phb_set_bus_ranges(struct device_node *dev,
 static void __init celleb_alloc_private_mem(struct pci_controller *hose)
 {
        hose->private_data =
-                alloc_maybe_bootmem(sizeof(struct celleb_pci_private),
+                zalloc_maybe_bootmem(sizeof(struct celleb_pci_private),
                        GFP_KERNEL);
 }
@@ -469,18 +468,6 @@ static struct of_device_id celleb_phb_match[] __initdata = {
        },
 };
-static int __init celleb_io_workaround_init(struct pci_controller *phb,
-                                            struct celleb_phb_spec *phb_spec)
-{
-        if (phb_spec->ops) {
-                iowa_register_bus(phb, phb_spec->ops, phb_spec->iowa_init,
-                                  phb_spec->iowa_data);
-                io_workaround_init();
-        }
-        return 0;
-}
 int __init celleb_setup_phb(struct pci_controller *phb)
 {
        struct device_node *dev = phb->dn;
@@ -500,7 +487,11 @@ int __init celleb_setup_phb(struct pci_controller *phb)
        if (rc)
                return 1;
-        return celleb_io_workaround_init(phb, phb_spec);
+        if (phb_spec->ops)
+                iowa_register_bus(phb, phb_spec->ops,
+                                  phb_spec->iowa_init,
+                                  phb_spec->iowa_data);
+        return 0;
 }
 int celleb_pci_probe_mode(struct pci_bus *bus)
diff --git a/arch/powerpc/platforms/cell/celleb_pci.h b/arch/powerpc/platforms/cell/celleb_pci.h
index 4cba1523ec50..a801fcc5f389 100644
--- a/arch/powerpc/platforms/cell/celleb_pci.h
+++ b/arch/powerpc/platforms/cell/celleb_pci.h
@@ -26,8 +26,9 @@
 #include <asm/pci-bridge.h>
 #include <asm/prom.h>
 #include <asm/ppc-pci.h>
+#include <asm/io-workarounds.h>
-#include "io-workarounds.h"
+struct iowa_bus;
 struct celleb_phb_spec {
        int (*setup)(struct device_node *, struct pci_controller *);
diff --git a/arch/powerpc/platforms/cell/celleb_setup.c b/arch/powerpc/platforms/cell/celleb_setup.c
index e53845579770..d58d9bae4b9b 100644
--- a/arch/powerpc/platforms/cell/celleb_setup.c
+++ b/arch/powerpc/platforms/cell/celleb_setup.c
@@ -128,10 +128,6 @@ static void __init celleb_setup_arch_beat(void)
        spu_management_ops      = &spu_management_of_ops;
 #endif
-#ifdef CONFIG_SMP
-        smp_init_celleb();
-#endif
        celleb_setup_arch_common();
 }
diff --git a/arch/powerpc/platforms/cell/cpufreq_spudemand.c b/arch/powerpc/platforms/cell/cpufreq_spudemand.c
index 968c1c0b4d5b..d809836bcf5f 100644
--- a/arch/powerpc/platforms/cell/cpufreq_spudemand.c
+++ b/arch/powerpc/platforms/cell/cpufreq_spudemand.c
@@ -39,8 +39,6 @@ struct spu_gov_info_struct {
 };
 static DEFINE_PER_CPU(struct spu_gov_info_struct, spu_gov_info);
-static struct workqueue_struct *kspugov_wq;
 static int calc_freq(struct spu_gov_info_struct *info)
 {
        int cpu;
@@ -71,14 +69,14 @@ static void spu_gov_work(struct work_struct *work)
        __cpufreq_driver_target(info->policy, target_freq, CPUFREQ_RELATION_H);
        delay = usecs_to_jiffies(info->poll_int);
-        queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay);
+        schedule_delayed_work_on(info->policy->cpu, &info->work, delay);
 }
 static void spu_gov_init_work(struct spu_gov_info_struct *info)
 {
        int delay = usecs_to_jiffies(info->poll_int);
        INIT_DELAYED_WORK_DEFERRABLE(&info->work, spu_gov_work);
-        queue_delayed_work_on(info->policy->cpu, kspugov_wq, &info->work, delay);
+        schedule_delayed_work_on(info->policy->cpu, &info->work, delay);
 }
 static void spu_gov_cancel_work(struct spu_gov_info_struct *info)
@@ -152,27 +150,15 @@ static int __init spu_gov_init(void)
 {
        int ret;
-        kspugov_wq = create_workqueue("kspugov");
-        if (!kspugov_wq) {
-                printk(KERN_ERR "creation of kspugov failed\n");
-                ret = -EFAULT;
-                goto out;
-        }
        ret = cpufreq_register_governor(&spu_governor);
-        if (ret) {
+        if (ret)
                printk(KERN_ERR "registration of governor failed\n");
-                destroy_workqueue(kspugov_wq);
-                goto out;
-        }
-out:
        return ret;
 }
 static void __exit spu_gov_exit(void)
 {
        cpufreq_unregister_governor(&spu_governor);
-        destroy_workqueue(kspugov_wq);
 }
diff --git a/arch/powerpc/platforms/cell/interrupt.c b/arch/powerpc/platforms/cell/interrupt.c
index 10eb1a443626..3e4eba603e6b 100644
--- a/arch/powerpc/platforms/cell/interrupt.c
+++ b/arch/powerpc/platforms/cell/interrupt.c
@@ -72,15 +72,15 @@ static irq_hw_number_t iic_pending_to_hwnum(struct cbe_iic_pending_bits bits)
                return (node << IIC_IRQ_NODE_SHIFT) | (class << 4) | unit;
 }
-static void iic_mask(unsigned int irq)
+static void iic_mask(struct irq_data *d)
 {
 }
-static void iic_unmask(unsigned int irq)
+static void iic_unmask(struct irq_data *d)
 {
 }
-static void iic_eoi(unsigned int irq)
+static void iic_eoi(struct irq_data *d)
 {
        struct iic *iic = &__get_cpu_var(cpu_iic);
        out_be64(&iic->regs->prio, iic->eoi_stack[--iic->eoi_ptr]);
@@ -89,19 +89,21 @@ static void iic_eoi(unsigned int irq)
 static struct irq_chip iic_chip = {
        .name = "CELL-IIC",
-        .mask = iic_mask,
+        .irq_mask = iic_mask,
-        .unmask = iic_unmask,
+        .irq_unmask = iic_unmask,
-        .eoi = iic_eoi,
+        .irq_eoi = iic_eoi,
 };
-static void iic_ioexc_eoi(unsigned int irq)
+static void iic_ioexc_eoi(struct irq_data *d)
 {
 }
 static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct cbe_iic_regs __iomem *node_iic = (void __iomem *)desc->handler_data;
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct cbe_iic_regs __iomem *node_iic =
+                (void __iomem *)irq_desc_get_handler_data(desc);
        unsigned int base = (irq & 0xffffff00) | IIC_IRQ_TYPE_IOEXC;
        unsigned long bits, ack;
        int cascade;
@@ -128,15 +130,15 @@ static void iic_ioexc_cascade(unsigned int irq, struct irq_desc *desc)
                if (ack)
                        out_be64(&node_iic->iic_is, ack);
        }
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static struct irq_chip iic_ioexc_chip = {
        .name = "CELL-IOEX",
-        .mask = iic_mask,
+        .irq_mask = iic_mask,
-        .unmask = iic_unmask,
+        .irq_unmask = iic_unmask,
-        .eoi = iic_ioexc_eoi,
+        .irq_eoi = iic_ioexc_eoi,
 };
 /* Get an IRQ number from the pending state register of the IIC */
@@ -174,14 +176,14 @@ EXPORT_SYMBOL_GPL(iic_get_target_id);
 #ifdef CONFIG_SMP
 /* Use the highest interrupt priorities for IPI */
-static inline int iic_ipi_to_irq(int ipi)
+static inline int iic_msg_to_irq(int msg)
 {
-        return IIC_IRQ_TYPE_IPI + 0xf - ipi;
+        return IIC_IRQ_TYPE_IPI + 0xf - msg;
 }
-void iic_cause_IPI(int cpu, int mesg)
+void iic_message_pass(int cpu, int msg)
 {
-        out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - mesg) << 4);
+        out_be64(&per_cpu(cpu_iic, cpu).regs->generate, (0xf - msg) << 4);
 }
 struct irq_host *iic_get_irq_host(int node)
@@ -190,38 +192,31 @@ struct irq_host *iic_get_irq_host(int node)
 }
 EXPORT_SYMBOL_GPL(iic_get_irq_host);
-static irqreturn_t iic_ipi_action(int irq, void *dev_id)
+static void iic_request_ipi(int msg)
-{
-        int ipi = (int)(long)dev_id;
-        smp_message_recv(ipi);
-        return IRQ_HANDLED;
-}
-static void iic_request_ipi(int ipi, const char *name)
 {
        int virq;
-        virq = irq_create_mapping(iic_host, iic_ipi_to_irq(ipi));
+        virq = irq_create_mapping(iic_host, iic_msg_to_irq(msg));
        if (virq == NO_IRQ) {
                printk(KERN_ERR
-                       "iic: failed to map IPI %s\n", name);
+                       "iic: failed to map IPI %s\n", smp_ipi_name[msg]);
                return;
        }
-        if (request_irq(virq, iic_ipi_action, IRQF_DISABLED, name,
-                        (void *)(long)ipi))
+        /*
-                printk(KERN_ERR
+         * If smp_request_message_ipi encounters an error it will notify
-                       "iic: failed to request IPI %s\n", name);
+         * the error.  If a message is not needed it will return non-zero.
+         */
+        if (smp_request_message_ipi(virq, msg))
+                irq_dispose_mapping(virq);
 }
 void iic_request_IPIs(void)
 {
-        iic_request_ipi(PPC_MSG_CALL_FUNCTION, "IPI-call");
+        iic_request_ipi(PPC_MSG_CALL_FUNCTION);
-        iic_request_ipi(PPC_MSG_RESCHEDULE, "IPI-resched");
+        iic_request_ipi(PPC_MSG_RESCHEDULE);
-        iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE, "IPI-call-single");
+        iic_request_ipi(PPC_MSG_CALL_FUNC_SINGLE);
-#ifdef CONFIG_DEBUGGER
+        iic_request_ipi(PPC_MSG_DEBUGGER_BREAK);
-        iic_request_ipi(PPC_MSG_DEBUGGER_BREAK, "IPI-debug");
-#endif /* CONFIG_DEBUGGER */
 }
 #endif /* CONFIG_SMP */
@@ -233,65 +228,19 @@ static int iic_host_match(struct irq_host *h, struct device_node *node)
                                    "IBM,CBEA-Internal-Interrupt-Controller");
 }
-extern int noirqdebug;
-static void handle_iic_irq(unsigned int irq, struct irq_desc *desc)
-{
-        raw_spin_lock(&desc->lock);
-        desc->status &= ~(IRQ_REPLAY | IRQ_WAITING);
-        /*
-         * If we're currently running this IRQ, or its disabled,
-         * we shouldn't process the IRQ. Mark it pending, handle
-         * the necessary masking and go out
-         */
-        if (unlikely((desc->status & (IRQ_INPROGRESS | IRQ_DISABLED)) ||
-                    !desc->action)) {
-                desc->status |= IRQ_PENDING;
-                goto out_eoi;
-        }
-        kstat_incr_irqs_this_cpu(irq, desc);
-        /* Mark the IRQ currently in progress.*/
-        desc->status |= IRQ_INPROGRESS;
-        do {
-                struct irqaction *action = desc->action;
-                irqreturn_t action_ret;
-                if (unlikely(!action))
-                        goto out_eoi;
-                desc->status &= ~IRQ_PENDING;
-                raw_spin_unlock(&desc->lock);
-                action_ret = handle_IRQ_event(irq, action);
-                if (!noirqdebug)
-                        note_interrupt(irq, desc, action_ret);
-                raw_spin_lock(&desc->lock);
-        } while ((desc->status & (IRQ_PENDING | IRQ_DISABLED)) == IRQ_PENDING);
-        desc->status &= ~IRQ_INPROGRESS;
-out_eoi:
-        desc->chip->eoi(irq);
-        raw_spin_unlock(&desc->lock);
-}
 static int iic_host_map(struct irq_host *h, unsigned int virq,
                        irq_hw_number_t hw)
 {
        switch (hw & IIC_IRQ_TYPE_MASK) {
        case IIC_IRQ_TYPE_IPI:
-                set_irq_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
+                irq_set_chip_and_handler(virq, &iic_chip, handle_percpu_irq);
                break;
        case IIC_IRQ_TYPE_IOEXC:
-                set_irq_chip_and_handler(virq, &iic_ioexc_chip,
+                irq_set_chip_and_handler(virq, &iic_ioexc_chip,
-                                         handle_iic_irq);
+                                         handle_edge_eoi_irq);
                break;
        default:
-                set_irq_chip_and_handler(virq, &iic_chip, handle_iic_irq);
+                irq_set_chip_and_handler(virq, &iic_chip, handle_edge_eoi_irq);
        }
        return 0;
 }
@@ -408,8 +357,8 @@ static int __init setup_iic(void)
                 * irq_data is a generic pointer that gets passed back
                 * to us later, so the forced cast is fine.
                 */
-                set_irq_data(cascade, (void __force *)node_iic);
+                irq_set_handler_data(cascade, (void __force *)node_iic);
-                set_irq_chained_handler(cascade , iic_ioexc_cascade);
+                irq_set_chained_handler(cascade, iic_ioexc_cascade);
                out_be64(&node_iic->iic_ir,
                         (1 << 12)              /* priority */ |
                         (node << 4)            /* dest node */ |
diff --git a/arch/powerpc/platforms/cell/interrupt.h b/arch/powerpc/platforms/cell/interrupt.h
index 942dc39d6045..4f60ae6ca358 100644
--- a/arch/powerpc/platforms/cell/interrupt.h
+++ b/arch/powerpc/platforms/cell/interrupt.h
@@ -75,7 +75,7 @@ enum {
 };
 extern void iic_init_IRQ(void);
-extern void iic_cause_IPI(int cpu, int mesg);
+extern void iic_message_pass(int cpu, int msg);
 extern void iic_request_IPIs(void);
 extern void iic_setup_cpu(void);
diff --git a/arch/powerpc/platforms/cell/qpace_setup.c b/arch/powerpc/platforms/cell/qpace_setup.c
index 1b5749042756..51e290126bc1 100644
--- a/arch/powerpc/platforms/cell/qpace_setup.c
+++ b/arch/powerpc/platforms/cell/qpace_setup.c
@@ -42,7 +42,6 @@
 #include "interrupt.h"
 #include "pervasive.h"
 #include "ras.h"
-#include "io-workarounds.h"
 static void qpace_show_cpuinfo(struct seq_file *m)
 {
@@ -145,9 +144,4 @@ define_machine(qpace) {
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = qpace_progress,
        .init_IRQ               = iic_init_IRQ,
-#ifdef CONFIG_KEXEC
-        .machine_kexec          = default_machine_kexec,
-        .machine_kexec_prepare  = default_machine_kexec_prepare,
-        .machine_crash_shutdown = default_machine_crash_shutdown,
-#endif
 };
diff --git a/arch/powerpc/platforms/cell/ras.c b/arch/powerpc/platforms/cell/ras.c
index 1d3c4effea10..5ec1e47a0d77 100644
--- a/arch/powerpc/platforms/cell/ras.c
+++ b/arch/powerpc/platforms/cell/ras.c
@@ -173,8 +173,10 @@ static int __init cbe_ptcal_enable(void)
                return -ENODEV;
        size = of_get_property(np, "ibm,cbe-ptcal-size", NULL);
-        if (!size)
+        if (!size) {
+                of_node_put(np);
                return -ENODEV;
+        }
        pr_debug("%s: enabling PTCAL, size = 0x%x\n", __func__, *size);
        order = get_order(*size);
diff --git a/arch/powerpc/platforms/cell/setup.c b/arch/powerpc/platforms/cell/setup.c
index 691995761b3d..c73cf4c43fc2 100644
--- a/arch/powerpc/platforms/cell/setup.c
+++ b/arch/powerpc/platforms/cell/setup.c
@@ -51,11 +51,11 @@
 #include <asm/udbg.h>
 #include <asm/mpic.h>
 #include <asm/cell-regs.h>
+#include <asm/io-workarounds.h>
 #include "interrupt.h"
 #include "pervasive.h"
 #include "ras.h"
-#include "io-workarounds.h"
 #ifdef DEBUG
 #define DBG(fmt...) udbg_printf(fmt)
@@ -136,8 +136,6 @@ static int __devinit cell_setup_phb(struct pci_controller *phb)
        iowa_register_bus(phb, &spiderpci_ops, &spiderpci_iowa_init,
                                  (void *)SPIDER_PCI_REG_BASE);
-        io_workaround_init();
        return 0;
 }
@@ -187,13 +185,15 @@ machine_subsys_initcall(cell, cell_publish_devices);
 static void cell_mpic_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct mpic *mpic = desc->handler_data;
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct mpic *mpic = irq_desc_get_handler_data(desc);
        unsigned int virq;
        virq = mpic_get_one_irq(mpic);
        if (virq != NO_IRQ)
                generic_handle_irq(virq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static void __init mpic_init_IRQ(void)
@@ -221,8 +221,8 @@ static void __init mpic_init_IRQ(void)
                printk(KERN_INFO "%s : hooking up to IRQ %d\n",
                       dn->full_name, virq);
-                set_irq_data(virq, mpic);
+                irq_set_handler_data(virq, mpic);
-                set_irq_chained_handler(virq, cell_mpic_cascade);
+                irq_set_chained_handler(virq, cell_mpic_cascade);
        }
 }
diff --git a/arch/powerpc/platforms/cell/smp.c b/arch/powerpc/platforms/cell/smp.c
index f774530075b7..dbb641ea90dd 100644
--- a/arch/powerpc/platforms/cell/smp.c
+++ b/arch/powerpc/platforms/cell/smp.c
@@ -77,7 +77,7 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
        unsigned int pcpu;
        int start_cpu;
-        if (cpu_isset(lcpu, of_spin_map))
+        if (cpumask_test_cpu(lcpu, &of_spin_map))
                /* Already started by OF and sitting in spin loop */
                return 1;
@@ -103,27 +103,11 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
        return 1;
 }
-static void smp_iic_message_pass(int target, int msg)
-{
-        unsigned int i;
-        if (target < NR_CPUS) {
-                iic_cause_IPI(target, msg);
-        } else {
-                for_each_online_cpu(i) {
-                        if (target == MSG_ALL_BUT_SELF
-                            && i == smp_processor_id())
-                                continue;
-                        iic_cause_IPI(i, msg);
-                }
-        }
-}
 static int __init smp_iic_probe(void)
 {
        iic_request_IPIs();
-        return cpus_weight(cpu_possible_map);
+        return cpumask_weight(cpu_possible_mask);
 }
 static void __devinit smp_cell_setup_cpu(int cpu)
@@ -137,12 +121,12 @@ static void __devinit smp_cell_setup_cpu(int cpu)
        mtspr(SPRN_DABRX, DABRX_KERNEL | DABRX_USER);
 }
-static void __devinit smp_cell_kick_cpu(int nr)
+static int __devinit smp_cell_kick_cpu(int nr)
 {
        BUG_ON(nr < 0 || nr >= NR_CPUS);
        if (!smp_startup_cpu(nr))
-                return;
+                return -ENOENT;
        /*
         * The processor is currently spinning, waiting for the
@@ -150,6 +134,8 @@ static void __devinit smp_cell_kick_cpu(int nr)
         * the processor will continue on to secondary_start
         */
        paca[nr].cpu_start = 1;
+        return 0;
 }
 static int smp_cell_cpu_bootable(unsigned int nr)
@@ -166,7 +152,7 @@ static int smp_cell_cpu_bootable(unsigned int nr)
        return 1;
 }
 static struct smp_ops_t bpa_iic_smp_ops = {
-        .message_pass   = smp_iic_message_pass,
+        .message_pass   = iic_message_pass,
        .probe          = smp_iic_probe,
        .kick_cpu       = smp_cell_kick_cpu,
        .setup_cpu      = smp_cell_setup_cpu,
@@ -186,13 +172,12 @@ void __init smp_init_cell(void)
        if (cpu_has_feature(CPU_FTR_SMT)) {
                for_each_present_cpu(i) {
                        if (cpu_thread_in_core(i) == 0)
-                                cpu_set(i, of_spin_map);
+                                cpumask_set_cpu(i, &of_spin_map);
                }
-        } else {
+        } else
-                of_spin_map = cpu_present_map;
+                cpumask_copy(&of_spin_map, cpu_present_mask);
-        }
-        cpu_clear(boot_cpuid, of_spin_map);
+        cpumask_clear_cpu(boot_cpuid, &of_spin_map);
        /* Non-lpar has additional take/give timebase */
        if (rtas_token("freeze-time-base") != RTAS_UNKNOWN_SERVICE) {
diff --git a/arch/powerpc/platforms/cell/spider-pci.c b/arch/powerpc/platforms/cell/spider-pci.c
index ca7731c0b595..f1f7878893f3 100644
--- a/arch/powerpc/platforms/cell/spider-pci.c
+++ b/arch/powerpc/platforms/cell/spider-pci.c
@@ -27,8 +27,7 @@
 #include <asm/ppc-pci.h>
 #include <asm/pci-bridge.h>
+#include <asm/io-workarounds.h>
-#include "io-workarounds.h"
 #define SPIDER_PCI_DISABLE_PREFETCH
diff --git a/arch/powerpc/platforms/cell/spider-pic.c b/arch/powerpc/platforms/cell/spider-pic.c
index 5876e888e412..442c28c00f88 100644
--- a/arch/powerpc/platforms/cell/spider-pic.c
+++ b/arch/powerpc/platforms/cell/spider-pic.c
@@ -68,9 +68,9 @@ struct spider_pic {
 };
 static struct spider_pic spider_pics[SPIDER_CHIP_COUNT];
-static struct spider_pic *spider_virq_to_pic(unsigned int virq)
+static struct spider_pic *spider_irq_data_to_pic(struct irq_data *d)
 {
-        return irq_map[virq].host->host_data;
+        return irq_data_get_irq_chip_data(d);
 }
 static void __iomem *spider_get_irq_config(struct spider_pic *pic,
@@ -79,30 +79,30 @@ static void __iomem *spider_get_irq_config(struct spider_pic *pic,
        return pic->regs + TIR_CFGA + 8 * src;
 }
-static void spider_unmask_irq(unsigned int virq)
+static void spider_unmask_irq(struct irq_data *d)
 {
-        struct spider_pic *pic = spider_virq_to_pic(virq);
+        struct spider_pic *pic = spider_irq_data_to_pic(d);
-        void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
+        void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));
        out_be32(cfg, in_be32(cfg) | 0x30000000u);
 }
-static void spider_mask_irq(unsigned int virq)
+static void spider_mask_irq(struct irq_data *d)
 {
-        struct spider_pic *pic = spider_virq_to_pic(virq);
+        struct spider_pic *pic = spider_irq_data_to_pic(d);
-        void __iomem *cfg = spider_get_irq_config(pic, irq_map[virq].hwirq);
+        void __iomem *cfg = spider_get_irq_config(pic, irqd_to_hwirq(d));
        out_be32(cfg, in_be32(cfg) & ~0x30000000u);
 }
-static void spider_ack_irq(unsigned int virq)
+static void spider_ack_irq(struct irq_data *d)
 {
-        struct spider_pic *pic = spider_virq_to_pic(virq);
+        struct spider_pic *pic = spider_irq_data_to_pic(d);
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        /* Reset edge detection logic if necessary
         */
-        if (irq_to_desc(virq)->status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                return;
        /* Only interrupts 47 to 50 can be set to edge */
@@ -113,13 +113,12 @@ static void spider_ack_irq(unsigned int virq)
        out_be32(pic->regs + TIR_EDC, 0x100 | (src & 0xf));
 }
-static int spider_set_irq_type(unsigned int virq, unsigned int type)
+static int spider_set_irq_type(struct irq_data *d, unsigned int type)
 {
        unsigned int sense = type & IRQ_TYPE_SENSE_MASK;
-        struct spider_pic *pic = spider_virq_to_pic(virq);
+        struct spider_pic *pic = spider_irq_data_to_pic(d);
-        unsigned int hw = irq_map[virq].hwirq;
+        unsigned int hw = irqd_to_hwirq(d);
        void __iomem *cfg = spider_get_irq_config(pic, hw);
-        struct irq_desc *desc = irq_to_desc(virq);
        u32 old_mask;
        u32 ic;
@@ -147,12 +146,6 @@ static int spider_set_irq_type(unsigned int virq, unsigned int type)
                return -EINVAL;
        }
-        /* Update irq_desc */
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= type & IRQ_TYPE_SENSE_MASK;
-        if (type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
-                desc->status |= IRQ_LEVEL;
        /* Configure the source. One gross hack that was there before and
         * that I've kept around is the priority to the BE which I set to
         * be the same as the interrupt source number. I don't know wether
@@ -169,19 +162,20 @@ static int spider_set_irq_type(unsigned int virq, unsigned int type)
 static struct irq_chip spider_pic = {
        .name = "SPIDER",
-        .unmask = spider_unmask_irq,
+        .irq_unmask = spider_unmask_irq,
-        .mask = spider_mask_irq,
+        .irq_mask = spider_mask_irq,
-        .ack = spider_ack_irq,
+        .irq_ack = spider_ack_irq,
-        .set_type = spider_set_irq_type,
+        .irq_set_type = spider_set_irq_type,
 };
 static int spider_host_map(struct irq_host *h, unsigned int virq,
                        irq_hw_number_t hw)
 {
-        set_irq_chip_and_handler(virq, &spider_pic, handle_level_irq);
+        irq_set_chip_data(virq, h->host_data);
+        irq_set_chip_and_handler(virq, &spider_pic, handle_level_irq);
        /* Set default irq type */
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
        return 0;
 }
@@ -207,7 +201,8 @@ static struct irq_host_ops spider_host_ops = {
 static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct spider_pic *pic = desc->handler_data;
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct spider_pic *pic = irq_desc_get_handler_data(desc);
        unsigned int cs, virq;
        cs = in_be32(pic->regs + TIR_CS) >> 24;
@@ -215,9 +210,11 @@ static void spider_irq_cascade(unsigned int irq, struct irq_desc *desc)
                virq = NO_IRQ;
        else
                virq = irq_linear_revmap(pic->host, cs);
        if (virq != NO_IRQ)
                generic_handle_irq(virq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 /* For hooking up the cascace we have a problem. Our device-tree is
@@ -258,8 +255,10 @@ static unsigned int __init spider_find_cascade_and_node(struct spider_pic *pic)
                return NO_IRQ;
        imap += intsize + 1;
        tmp = of_get_property(iic, "#interrupt-cells", NULL);
-        if (tmp == NULL)
+        if (tmp == NULL) {
+                of_node_put(iic);
                return NO_IRQ;
+        }
        intsize = *tmp;
        /* Assume unit is last entry of interrupt specifier */
        unit = imap[intsize - 1];
@@ -323,8 +322,8 @@ static void __init spider_init_one(struct device_node *of_node, int chip,
        virq = spider_find_cascade_and_node(pic);
        if (virq == NO_IRQ)
                return;
-        set_irq_data(virq, pic);
+        irq_set_handler_data(virq, pic);
-        set_irq_chained_handler(virq, spider_irq_cascade);
+        irq_set_chained_handler(virq, spider_irq_cascade);
        printk(KERN_INFO "spider_pic: node %d, addr: 0x%lx %s\n",
               pic->node_id, addr, of_node->full_name);
diff --git a/arch/powerpc/platforms/cell/spu_base.c b/arch/powerpc/platforms/cell/spu_base.c
index 8547e86bfb42..3675da73623f 100644
--- a/arch/powerpc/platforms/cell/spu_base.c
+++ b/arch/powerpc/platforms/cell/spu_base.c
@@ -32,11 +32,13 @@
 #include <linux/io.h>
 #include <linux/mutex.h>
 #include <linux/linux_logo.h>
+#include <linux/syscore_ops.h>
 #include <asm/spu.h>
 #include <asm/spu_priv1.h>
 #include <asm/spu_csa.h>
 #include <asm/xmon.h>
 #include <asm/prom.h>
+#include <asm/kexec.h>
 const struct spu_management_ops *spu_management_ops;
 EXPORT_SYMBOL_GPL(spu_management_ops);
@@ -520,18 +522,8 @@ void spu_init_channels(struct spu *spu)
 }
 EXPORT_SYMBOL_GPL(spu_init_channels);
-static int spu_shutdown(struct sys_device *sysdev)
-{
-        struct spu *spu = container_of(sysdev, struct spu, sysdev);
-        spu_free_irqs(spu);
-        spu_destroy_spu(spu);
-        return 0;
-}
 static struct sysdev_class spu_sysdev_class = {
        .name = "spu",
-        .shutdown = spu_shutdown,
 };
 int spu_add_sysdev_attr(struct sysdev_attribute *attr)
@@ -727,6 +719,91 @@ static ssize_t spu_stat_show(struct sys_device *sysdev,
 static SYSDEV_ATTR(stat, 0644, spu_stat_show, NULL);
+#ifdef CONFIG_KEXEC
+struct crash_spu_info {
+        struct spu *spu;
+        u32 saved_spu_runcntl_RW;
+        u32 saved_spu_status_R;
+        u32 saved_spu_npc_RW;
+        u64 saved_mfc_sr1_RW;
+        u64 saved_mfc_dar;
+        u64 saved_mfc_dsisr;
+};
+#define CRASH_NUM_SPUS  16      /* Enough for current hardware */
+static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
+static void crash_kexec_stop_spus(void)
+{
+        struct spu *spu;
+        int i;
+        u64 tmp;
+        for (i = 0; i < CRASH_NUM_SPUS; i++) {
+                if (!crash_spu_info[i].spu)
+                        continue;
+                spu = crash_spu_info[i].spu;
+                crash_spu_info[i].saved_spu_runcntl_RW =
+                        in_be32(&spu->problem->spu_runcntl_RW);
+                crash_spu_info[i].saved_spu_status_R =
+                        in_be32(&spu->problem->spu_status_R);
+                crash_spu_info[i].saved_spu_npc_RW =
+                        in_be32(&spu->problem->spu_npc_RW);
+                crash_spu_info[i].saved_mfc_dar    = spu_mfc_dar_get(spu);
+                crash_spu_info[i].saved_mfc_dsisr  = spu_mfc_dsisr_get(spu);
+                tmp = spu_mfc_sr1_get(spu);
+                crash_spu_info[i].saved_mfc_sr1_RW = tmp;
+                tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
+                spu_mfc_sr1_set(spu, tmp);
+                __delay(200);
+        }
+}
+static void crash_register_spus(struct list_head *list)
+{
+        struct spu *spu;
+        int ret;
+        list_for_each_entry(spu, list, full_list) {
+                if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
+                        continue;
+                crash_spu_info[spu->number].spu = spu;
+        }
+        ret = crash_shutdown_register(&crash_kexec_stop_spus);
+        if (ret)
+                printk(KERN_ERR "Could not register SPU crash handler");
+}
+#else
+static inline void crash_register_spus(struct list_head *list)
+{
+}
+#endif
+static void spu_shutdown(void)
+{
+        struct spu *spu;
+        mutex_lock(&spu_full_list_mutex);
+        list_for_each_entry(spu, &spu_full_list, full_list) {
+                spu_free_irqs(spu);
+                spu_destroy_spu(spu);
+        }
+        mutex_unlock(&spu_full_list_mutex);
+}
+static struct syscore_ops spu_syscore_ops = {
+        .shutdown = spu_shutdown,
+};
 static int __init init_spu_base(void)
 {
        int i, ret = 0;
@@ -760,6 +837,7 @@ static int __init init_spu_base(void)
        crash_register_spus(&spu_full_list);
        mutex_unlock(&spu_full_list_mutex);
        spu_add_sysdev_attr(&attr_stat);
+        register_syscore_ops(&spu_syscore_ops);
        spu_init_affinity();
diff --git a/arch/powerpc/platforms/cell/spufs/file.c b/arch/powerpc/platforms/cell/spufs/file.c
index 1a40da92154c..3c7c3f82d842 100644
--- a/arch/powerpc/platforms/cell/spufs/file.c
+++ b/arch/powerpc/platforms/cell/spufs/file.c
@@ -154,6 +154,7 @@ static const struct file_operations __fops = {				\
        .release = spufs_attr_release,                                  \
        .read    = spufs_attr_read,                                     \
        .write   = spufs_attr_write,                                    \
+        .llseek  = generic_file_llseek,                                 \
 };
@@ -218,24 +219,17 @@ spufs_mem_write(struct file *file, const char __user *buffer,
        loff_t pos = *ppos;
        int ret;
-        if (pos < 0)
-                return -EINVAL;
        if (pos > LS_SIZE)
                return -EFBIG;
-        if (size > LS_SIZE - pos)
-                size = LS_SIZE - pos;
        ret = spu_acquire(ctx);
        if (ret)
                return ret;
        local_store = ctx->ops->get_ls(ctx);
-        ret = copy_from_user(local_store + pos, buffer, size);
+        size = simple_write_to_buffer(local_store, LS_SIZE, ppos, buffer, size);
        spu_release(ctx);
-        if (ret)
-                return -EFAULT;
-        *ppos = pos + size;
        return size;
 }
@@ -521,6 +515,7 @@ static const struct file_operations spufs_cntl_fops = {
        .release = spufs_cntl_release,
        .read = simple_attr_read,
        .write = simple_attr_write,
+        .llseek = generic_file_llseek,
        .mmap = spufs_cntl_mmap,
 };
@@ -572,18 +567,15 @@ spufs_regs_write(struct file *file, const char __user *buffer,
        if (*pos >= sizeof(lscsa->gprs))
                return -EFBIG;
-        size = min_t(ssize_t, sizeof(lscsa->gprs) - *pos, size);
-        *pos += size;
        ret = spu_acquire_saved(ctx);
        if (ret)
                return ret;
-        ret = copy_from_user((char *)lscsa->gprs + *pos - size,
+        size = simple_write_to_buffer(lscsa->gprs, sizeof(lscsa->gprs), pos,
-                             buffer, size) ? -EFAULT : size;
+                                        buffer, size);
        spu_release_saved(ctx);
-        return ret;
+        return size;
 }
 static const struct file_operations spufs_regs_fops = {
@@ -628,18 +620,15 @@ spufs_fpcr_write(struct file *file, const char __user * buffer,
        if (*pos >= sizeof(lscsa->fpcr))
                return -EFBIG;
-        size = min_t(ssize_t, sizeof(lscsa->fpcr) - *pos, size);
        ret = spu_acquire_saved(ctx);
        if (ret)
                return ret;
-        *pos += size;
+        size = simple_write_to_buffer(&lscsa->fpcr, sizeof(lscsa->fpcr), pos,
-        ret = copy_from_user((char *)&lscsa->fpcr + *pos - size,
+                                        buffer, size);
-                             buffer, size) ? -EFAULT : size;
        spu_release_saved(ctx);
-        return ret;
+        return size;
 }
 static const struct file_operations spufs_fpcr_fops = {
@@ -714,6 +703,7 @@ static ssize_t spufs_mbox_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_mbox_fops = {
        .open   = spufs_pipe_open,
        .read   = spufs_mbox_read,
+        .llseek = no_llseek,
 };
 static ssize_t spufs_mbox_stat_read(struct file *file, char __user *buf,
@@ -743,6 +733,7 @@ static ssize_t spufs_mbox_stat_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_mbox_stat_fops = {
        .open   = spufs_pipe_open,
        .read   = spufs_mbox_stat_read,
+        .llseek = no_llseek,
 };
 /* low-level ibox access function */
@@ -863,6 +854,7 @@ static const struct file_operations spufs_ibox_fops = {
        .read   = spufs_ibox_read,
        .poll   = spufs_ibox_poll,
        .fasync = spufs_ibox_fasync,
+        .llseek = no_llseek,
 };
 static ssize_t spufs_ibox_stat_read(struct file *file, char __user *buf,
@@ -890,6 +882,7 @@ static ssize_t spufs_ibox_stat_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_ibox_stat_fops = {
        .open   = spufs_pipe_open,
        .read   = spufs_ibox_stat_read,
+        .llseek = no_llseek,
 };
 /* low-level mailbox write */
@@ -1011,6 +1004,7 @@ static const struct file_operations spufs_wbox_fops = {
        .write  = spufs_wbox_write,
        .poll   = spufs_wbox_poll,
        .fasync = spufs_wbox_fasync,
+        .llseek = no_llseek,
 };
 static ssize_t spufs_wbox_stat_read(struct file *file, char __user *buf,
@@ -1038,6 +1032,7 @@ static ssize_t spufs_wbox_stat_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_wbox_stat_fops = {
        .open   = spufs_pipe_open,
        .read   = spufs_wbox_stat_read,
+        .llseek = no_llseek,
 };
 static int spufs_signal1_open(struct inode *inode, struct file *file)
@@ -1166,6 +1161,7 @@ static const struct file_operations spufs_signal1_fops = {
        .read = spufs_signal1_read,
        .write = spufs_signal1_write,
        .mmap = spufs_signal1_mmap,
+        .llseek = no_llseek,
 };
 static const struct file_operations spufs_signal1_nosched_fops = {
@@ -1173,6 +1169,7 @@ static const struct file_operations spufs_signal1_nosched_fops = {
        .release = spufs_signal1_release,
        .write = spufs_signal1_write,
        .mmap = spufs_signal1_mmap,
+        .llseek = no_llseek,
 };
 static int spufs_signal2_open(struct inode *inode, struct file *file)
@@ -1305,6 +1302,7 @@ static const struct file_operations spufs_signal2_fops = {
        .read = spufs_signal2_read,
        .write = spufs_signal2_write,
        .mmap = spufs_signal2_mmap,
+        .llseek = no_llseek,
 };
 static const struct file_operations spufs_signal2_nosched_fops = {
@@ -1312,6 +1310,7 @@ static const struct file_operations spufs_signal2_nosched_fops = {
        .release = spufs_signal2_release,
        .write = spufs_signal2_write,
        .mmap = spufs_signal2_mmap,
+        .llseek = no_llseek,
 };
 /*
@@ -1451,6 +1450,7 @@ static const struct file_operations spufs_mss_fops = {
        .open    = spufs_mss_open,
        .release = spufs_mss_release,
        .mmap    = spufs_mss_mmap,
+        .llseek  = no_llseek,
 };
 static int
@@ -1508,6 +1508,7 @@ static const struct file_operations spufs_psmap_fops = {
        .open    = spufs_psmap_open,
        .release = spufs_psmap_release,
        .mmap    = spufs_psmap_mmap,
+        .llseek  = no_llseek,
 };
@@ -1871,6 +1872,7 @@ static const struct file_operations spufs_mfc_fops = {
        .fsync   = spufs_mfc_fsync,
        .fasync  = spufs_mfc_fasync,
        .mmap    = spufs_mfc_mmap,
+        .llseek  = no_llseek,
 };
 static int spufs_npc_set(void *data, u64 val)
@@ -2246,6 +2248,7 @@ static ssize_t spufs_dma_info_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_dma_info_fops = {
        .open = spufs_info_open,
        .read = spufs_dma_info_read,
+        .llseek = no_llseek,
 };
 static ssize_t __spufs_proxydma_info_read(struct spu_context *ctx,
@@ -2299,6 +2302,7 @@ static ssize_t spufs_proxydma_info_read(struct file *file, char __user *buf,
 static const struct file_operations spufs_proxydma_info_fops = {
        .open = spufs_info_open,
        .read = spufs_proxydma_info_read,
+        .llseek = no_llseek,
 };
 static int spufs_show_tid(struct seq_file *s, void *private)
@@ -2585,6 +2589,7 @@ static const struct file_operations spufs_switch_log_fops = {
        .read           = spufs_switch_log_read,
        .poll           = spufs_switch_log_poll,
        .release        = spufs_switch_log_release,
+        .llseek         = no_llseek,
 };
 /**
diff --git a/arch/powerpc/platforms/cell/spufs/inode.c b/arch/powerpc/platforms/cell/spufs/inode.c
index 5dec408d6703..856e9c398068 100644
--- a/arch/powerpc/platforms/cell/spufs/inode.c
+++ b/arch/powerpc/platforms/cell/spufs/inode.c
@@ -71,12 +71,18 @@ spufs_alloc_inode(struct super_block *sb)
        return &ei->vfs_inode;
 }
-static void
+static void spufs_i_callback(struct rcu_head *head)
-spufs_destroy_inode(struct inode *inode)
 {
+        struct inode *inode = container_of(head, struct inode, i_rcu);
+        INIT_LIST_HEAD(&inode->i_dentry);
        kmem_cache_free(spufs_inode_cache, SPUFS_I(inode));
 }
+static void spufs_destroy_inode(struct inode *inode)
+{
+        call_rcu(&inode->i_rcu, spufs_i_callback);
+}
 static void
 spufs_init_once(void *p)
 {
@@ -159,18 +165,18 @@ static void spufs_prune_dir(struct dentry *dir)
        mutex_lock(&dir->d_inode->i_mutex);
        list_for_each_entry_safe(dentry, tmp, &dir->d_subdirs, d_u.d_child) {
-                spin_lock(&dcache_lock);
                spin_lock(&dentry->d_lock);
                if (!(d_unhashed(dentry)) && dentry->d_inode) {
-                        dget_locked(dentry);
+                        dget_dlock(dentry);
                        __d_drop(dentry);
                        spin_unlock(&dentry->d_lock);
                        simple_unlink(dir->d_inode, dentry);
-                        spin_unlock(&dcache_lock);
+                        /* XXX: what was dcache_lock protecting here? Other
+                         * filesystems (IB, configfs) release dcache_lock
+                         * before unlink */
                        dput(dentry);
                } else {
                        spin_unlock(&dentry->d_lock);
-                        spin_unlock(&dcache_lock);
                }
        }
        shrink_dcache_parent(dir);
@@ -798,17 +804,17 @@ spufs_fill_super(struct super_block *sb, void *data, int silent)
        return spufs_create_root(sb, data);
 }
-static int
+static struct dentry *
-spufs_get_sb(struct file_system_type *fstype, int flags,
+spufs_mount(struct file_system_type *fstype, int flags,
-                const char *name, void *data, struct vfsmount *mnt)
+                const char *name, void *data)
 {
-        return get_sb_single(fstype, flags, data, spufs_fill_super, mnt);
+        return mount_single(fstype, flags, data, spufs_fill_super);
 }
 static struct file_system_type spufs_type = {
        .owner = THIS_MODULE,
        .name = "spufs",
-        .get_sb = spufs_get_sb,
+        .mount = spufs_mount,
        .kill_sb = kill_litter_super,
 };
diff --git a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
index a101abf17504..147069938cfe 100644
--- a/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
+++ b/arch/powerpc/platforms/cell/spufs/lscsa_alloc.c
@@ -36,10 +36,9 @@ static int spu_alloc_lscsa_std(struct spu_state *csa)
        struct spu_lscsa *lscsa;
        unsigned char *p;
-        lscsa = vmalloc(sizeof(struct spu_lscsa));
+        lscsa = vzalloc(sizeof(struct spu_lscsa));
        if (!lscsa)
                return -ENOMEM;
-        memset(lscsa, 0, sizeof(struct spu_lscsa));
        csa->lscsa = lscsa;
        /* Set LS pages reserved to allow for user-space mapping. */
@@ -91,7 +90,7 @@ int spu_alloc_lscsa(struct spu_state *csa)
         */
        for (i = 0; i < SPU_LSCSA_NUM_BIG_PAGES; i++) {
                /* XXX This is likely to fail, we should use a special pool
-                 *     similiar to what hugetlbfs does.
+                 *     similar to what hugetlbfs does.
                 */
                csa->lscsa_pages[i] = alloc_pages(GFP_KERNEL,
                                                  SPU_64K_PAGE_ORDER);
diff --git a/arch/powerpc/platforms/cell/spufs/sched.c b/arch/powerpc/platforms/cell/spufs/sched.c
index 0b0466284932..32cb4e66d2cd 100644
--- a/arch/powerpc/platforms/cell/spufs/sched.c
+++ b/arch/powerpc/platforms/cell/spufs/sched.c
@@ -141,7 +141,7 @@ void __spu_update_sched_info(struct spu_context *ctx)
         * runqueue. The context will be rescheduled on the proper node
         * if it is timesliced or preempted.
         */
-        ctx->cpus_allowed = current->cpus_allowed;
+        cpumask_copy(&ctx->cpus_allowed, tsk_cpus_allowed(current));
        /* Save the current cpu id for spu interrupt routing. */
        ctx->last_ran = raw_smp_processor_id();
@@ -846,7 +846,7 @@ static struct spu_context *grab_runnable_context(int prio, int node)
                struct list_head *rq = &spu_prio->runq[best];
                list_for_each_entry(ctx, rq, rq) {
-                        /* XXX(hch): check for affinity here aswell */
+                        /* XXX(hch): check for affinity here as well */
                        if (__node_allowed(ctx, node)) {
                                __spu_del_from_rq(ctx);
                                goto found;
diff --git a/arch/powerpc/platforms/cell/spufs/spu_restore.c b/arch/powerpc/platforms/cell/spufs/spu_restore.c
index 21a9c952d88b..72c905f1ee7a 100644
--- a/arch/powerpc/platforms/cell/spufs/spu_restore.c
+++ b/arch/powerpc/platforms/cell/spufs/spu_restore.c
@@ -284,7 +284,7 @@ static inline void restore_complete(void)
                exit_instrs[3] = BR_INSTR;
                break;
        default:
-                /* SPU_Status[R]=1. No additonal instructions. */
+                /* SPU_Status[R]=1. No additional instructions. */
                break;
        }
        spu_sync();
diff --git a/arch/powerpc/platforms/cell/spufs/syscalls.c b/arch/powerpc/platforms/cell/spufs/syscalls.c
index 187a7d32f86a..a3d2ce54ea2e 100644
--- a/arch/powerpc/platforms/cell/spufs/syscalls.c
+++ b/arch/powerpc/platforms/cell/spufs/syscalls.c
@@ -70,7 +70,7 @@ static long do_spu_create(const char __user *pathname, unsigned int flags,
        if (!IS_ERR(tmp)) {
                struct nameidata nd;
-                ret = path_lookup(tmp, LOOKUP_PARENT, &nd);
+                ret = kern_path_parent(tmp, &nd);
                if (!ret) {
                        nd.flags |= LOOKUP_OPEN | LOOKUP_CREATE;
                        ret = spufs_create(&nd, flags, mode, neighbor);
diff --git a/arch/powerpc/platforms/chrp/nvram.c b/arch/powerpc/platforms/chrp/nvram.c
index ba3588f2d8e0..d3ceff04ffc7 100644
--- a/arch/powerpc/platforms/chrp/nvram.c
+++ b/arch/powerpc/platforms/chrp/nvram.c
@@ -74,8 +74,10 @@ void __init chrp_nvram_init(void)
                return;
        nbytes_p = of_get_property(nvram, "#bytes", &proplen);
-        if (nbytes_p == NULL || proplen != sizeof(unsigned int))
+        if (nbytes_p == NULL || proplen != sizeof(unsigned int)) {
+                of_node_put(nvram);
                return;
+        }
        nvram_size = *nbytes_p;
diff --git a/arch/powerpc/platforms/chrp/setup.c b/arch/powerpc/platforms/chrp/setup.c
index 8553cc49e0d6..122786498419 100644
--- a/arch/powerpc/platforms/chrp/setup.c
+++ b/arch/powerpc/platforms/chrp/setup.c
@@ -365,10 +365,13 @@ void __init chrp_setup_arch(void)
 static void chrp_8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = i8259_irq();
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 /*
@@ -514,7 +517,7 @@ static void __init chrp_find_8259(void)
                if (cascade_irq == NO_IRQ)
                        printk(KERN_ERR "i8259: failed to map cascade irq\n");
                else
-                        set_irq_chained_handler(cascade_irq,
+                        irq_set_chained_handler(cascade_irq,
                                                chrp_8259_cascade);
        }
 }
diff --git a/arch/powerpc/platforms/chrp/smp.c b/arch/powerpc/platforms/chrp/smp.c
index 02cafecc90e3..a800122e4dda 100644
--- a/arch/powerpc/platforms/chrp/smp.c
+++ b/arch/powerpc/platforms/chrp/smp.c
@@ -30,10 +30,12 @@
 #include <asm/mpic.h>
 #include <asm/rtas.h>
-static void __devinit smp_chrp_kick_cpu(int nr)
+static int __devinit smp_chrp_kick_cpu(int nr)
 {
        *(unsigned long *)KERNELBASE = nr;
        asm volatile("dcbf 0,%0"::"r"(KERNELBASE):"memory");
+        return 0;
 }
 static void __devinit smp_chrp_setup_cpu(int cpu_nr)
diff --git a/arch/powerpc/platforms/chrp/time.c b/arch/powerpc/platforms/chrp/time.c
index 054dfe5b8e77..f803f4b8ab6f 100644
--- a/arch/powerpc/platforms/chrp/time.c
+++ b/arch/powerpc/platforms/chrp/time.c
@@ -29,6 +29,10 @@
 extern spinlock_t rtc_lock;
+#define NVRAM_AS0  0x74
+#define NVRAM_AS1  0x75
+#define NVRAM_DATA 0x77
 static int nvram_as1 = NVRAM_AS1;
 static int nvram_as0 = NVRAM_AS0;
 static int nvram_data = NVRAM_DATA;
diff --git a/arch/powerpc/platforms/embedded6xx/flipper-pic.c b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
index c278bd3a8fec..f61a2dd96b99 100644
--- a/arch/powerpc/platforms/embedded6xx/flipper-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/flipper-pic.c
@@ -46,10 +46,10 @@
 *
 */
-static void flipper_pic_mask_and_ack(unsigned int virq)
+static void flipper_pic_mask_and_ack(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        u32 mask = 1 << irq;
        clrbits32(io_base + FLIPPER_IMR, mask);
@@ -57,27 +57,27 @@ static void flipper_pic_mask_and_ack(unsigned int virq)
        out_be32(io_base + FLIPPER_ICR, mask);
 }
-static void flipper_pic_ack(unsigned int virq)
+static void flipper_pic_ack(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        /* this is at least needed for RSW */
        out_be32(io_base + FLIPPER_ICR, 1 << irq);
 }
-static void flipper_pic_mask(unsigned int virq)
+static void flipper_pic_mask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        clrbits32(io_base + FLIPPER_IMR, 1 << irq);
 }
-static void flipper_pic_unmask(unsigned int virq)
+static void flipper_pic_unmask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        setbits32(io_base + FLIPPER_IMR, 1 << irq);
 }
@@ -85,10 +85,10 @@ static void flipper_pic_unmask(unsigned int virq)
 static struct irq_chip flipper_pic = {
        .name           = "flipper-pic",
-        .ack            = flipper_pic_ack,
+        .irq_ack        = flipper_pic_ack,
-        .mask_ack       = flipper_pic_mask_and_ack,
+        .irq_mask_ack   = flipper_pic_mask_and_ack,
-        .mask           = flipper_pic_mask,
+        .irq_mask       = flipper_pic_mask,
-        .unmask         = flipper_pic_unmask,
+        .irq_unmask     = flipper_pic_unmask,
 };
 /*
@@ -101,18 +101,12 @@ static struct irq_host *flipper_irq_host;
 static int flipper_pic_map(struct irq_host *h, unsigned int virq,
                           irq_hw_number_t hwirq)
 {
-        set_irq_chip_data(virq, h->host_data);
+        irq_set_chip_data(virq, h->host_data);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &flipper_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &flipper_pic, handle_level_irq);
        return 0;
 }
-static void flipper_pic_unmap(struct irq_host *h, unsigned int irq)
-{
-        set_irq_chip_data(irq, NULL);
-        set_irq_chip(irq, NULL);
-}
 static int flipper_pic_match(struct irq_host *h, struct device_node *np)
 {
        return 1;
@@ -121,7 +115,6 @@ static int flipper_pic_match(struct irq_host *h, struct device_node *np)
 static struct irq_host_ops flipper_irq_host_ops = {
        .map = flipper_pic_map,
-        .unmap = flipper_pic_unmap,
        .match = flipper_pic_match,
 };
diff --git a/arch/powerpc/platforms/embedded6xx/gamecube.c b/arch/powerpc/platforms/embedded6xx/gamecube.c
index 1106fd99627f..a138e14bad2e 100644
--- a/arch/powerpc/platforms/embedded6xx/gamecube.c
+++ b/arch/powerpc/platforms/embedded6xx/gamecube.c
@@ -75,14 +75,6 @@ static void gamecube_shutdown(void)
        flipper_quiesce();
 }
-#ifdef CONFIG_KEXEC
-static int gamecube_kexec_prepare(struct kimage *image)
-{
-        return 0;
-}
-#endif /* CONFIG_KEXEC */
 define_machine(gamecube) {
        .name                   = "gamecube",
        .probe                  = gamecube_probe,
@@ -95,9 +87,6 @@ define_machine(gamecube) {
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
        .machine_shutdown       = gamecube_shutdown,
-#ifdef CONFIG_KEXEC
-        .machine_kexec_prepare  = gamecube_kexec_prepare,
-#endif
 };
diff --git a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
index a771f91e215b..e4919170c6bc 100644
--- a/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
+++ b/arch/powerpc/platforms/embedded6xx/hlwd-pic.c
@@ -41,36 +41,36 @@
 *
 */
-static void hlwd_pic_mask_and_ack(unsigned int virq)
+static void hlwd_pic_mask_and_ack(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        u32 mask = 1 << irq;
        clrbits32(io_base + HW_BROADWAY_IMR, mask);
        out_be32(io_base + HW_BROADWAY_ICR, mask);
 }
-static void hlwd_pic_ack(unsigned int virq)
+static void hlwd_pic_ack(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        out_be32(io_base + HW_BROADWAY_ICR, 1 << irq);
 }
-static void hlwd_pic_mask(unsigned int virq)
+static void hlwd_pic_mask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        clrbits32(io_base + HW_BROADWAY_IMR, 1 << irq);
 }
-static void hlwd_pic_unmask(unsigned int virq)
+static void hlwd_pic_unmask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void __iomem *io_base = get_irq_chip_data(virq);
+        void __iomem *io_base = irq_data_get_irq_chip_data(d);
        setbits32(io_base + HW_BROADWAY_IMR, 1 << irq);
 }
@@ -78,10 +78,10 @@ static void hlwd_pic_unmask(unsigned int virq)
 static struct irq_chip hlwd_pic = {
        .name           = "hlwd-pic",
-        .ack            = hlwd_pic_ack,
+        .irq_ack        = hlwd_pic_ack,
-        .mask_ack       = hlwd_pic_mask_and_ack,
+        .irq_mask_ack   = hlwd_pic_mask_and_ack,
-        .mask           = hlwd_pic_mask,
+        .irq_mask       = hlwd_pic_mask,
-        .unmask         = hlwd_pic_unmask,
+        .irq_unmask     = hlwd_pic_unmask,
 };
 /*
@@ -94,21 +94,14 @@ static struct irq_host *hlwd_irq_host;
 static int hlwd_pic_map(struct irq_host *h, unsigned int virq,
                           irq_hw_number_t hwirq)
 {
-        set_irq_chip_data(virq, h->host_data);
+        irq_set_chip_data(virq, h->host_data);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &hlwd_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &hlwd_pic, handle_level_irq);
        return 0;
 }
-static void hlwd_pic_unmap(struct irq_host *h, unsigned int irq)
-{
-        set_irq_chip_data(irq, NULL);
-        set_irq_chip(irq, NULL);
-}
 static struct irq_host_ops hlwd_irq_host_ops = {
        .map = hlwd_pic_map,
-        .unmap = hlwd_pic_unmap,
 };
 static unsigned int __hlwd_pic_get_irq(struct irq_host *h)
@@ -129,11 +122,12 @@ static unsigned int __hlwd_pic_get_irq(struct irq_host *h)
 static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
                                      struct irq_desc *desc)
 {
-        struct irq_host *irq_host = get_irq_data(cascade_virq);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct irq_host *irq_host = irq_get_handler_data(cascade_virq);
        unsigned int virq;
        raw_spin_lock(&desc->lock);
-        desc->chip->mask(cascade_virq); /* IRQ_LEVEL */
+        chip->irq_mask(&desc->irq_data); /* IRQ_LEVEL */
        raw_spin_unlock(&desc->lock);
        virq = __hlwd_pic_get_irq(irq_host);
@@ -143,9 +137,9 @@ static void hlwd_pic_irq_cascade(unsigned int cascade_virq,
                pr_err("spurious interrupt!\n");
        raw_spin_lock(&desc->lock);
-        desc->chip->ack(cascade_virq); /* IRQ_LEVEL */
+        chip->irq_ack(&desc->irq_data); /* IRQ_LEVEL */
-        if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+        if (!irqd_irq_disabled(&desc->irq_data) && chip->irq_unmask)
-                desc->chip->unmask(cascade_virq);
+                chip->irq_unmask(&desc->irq_data);
        raw_spin_unlock(&desc->lock);
 }
@@ -217,8 +211,8 @@ void hlwd_pic_probe(void)
                        host = hlwd_pic_init(np);
                        BUG_ON(!host);
                        cascade_virq = irq_of_parse_and_map(np, 0);
-                        set_irq_data(cascade_virq, host);
+                        irq_set_handler_data(cascade_virq, host);
-                        set_irq_chained_handler(cascade_virq,
+                        irq_set_chained_handler(cascade_virq,
                                                hlwd_pic_irq_cascade);
                        hlwd_irq_host = host;
                        break;
diff --git a/arch/powerpc/platforms/embedded6xx/holly.c b/arch/powerpc/platforms/embedded6xx/holly.c
index b21fde589ca7..487bda0d18d8 100644
--- a/arch/powerpc/platforms/embedded6xx/holly.c
+++ b/arch/powerpc/platforms/embedded6xx/holly.c
@@ -198,8 +198,8 @@ static void __init holly_init_IRQ(void)
        cascade_pci_irq = irq_of_parse_and_map(tsi_pci, 0);
        pr_debug("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__, (u32) cascade_pci_irq);
        tsi108_pci_int_init(cascade_node);
-        set_irq_data(cascade_pci_irq, mpic);
+        irq_set_handler_data(cascade_pci_irq, mpic);
-        set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
+        irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
 #endif
        /* Configure MPIC outputs to CPU0 */
        tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
diff --git a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
index 7a2ba39d7811..1cb907c94359 100644
--- a/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
+++ b/arch/powerpc/platforms/embedded6xx/mpc7448_hpc2.c
@@ -153,8 +153,8 @@ static void __init mpc7448_hpc2_init_IRQ(void)
        DBG("%s: tsi108 cascade_pci_irq = 0x%x\n", __func__,
            (u32) cascade_pci_irq);
        tsi108_pci_int_init(cascade_node);
-        set_irq_data(cascade_pci_irq, mpic);
+        irq_set_handler_data(cascade_pci_irq, mpic);
-        set_irq_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
+        irq_set_chained_handler(cascade_pci_irq, tsi108_irq_cascade);
 #endif
        /* Configure MPIC outputs to CPU0 */
        tsi108_write_reg(TSI108_MPIC_OFFSET + 0x30c, 0);
diff --git a/arch/powerpc/platforms/embedded6xx/wii.c b/arch/powerpc/platforms/embedded6xx/wii.c
index 5cdcc7c8d973..1b5dc1a2e145 100644
--- a/arch/powerpc/platforms/embedded6xx/wii.c
+++ b/arch/powerpc/platforms/embedded6xx/wii.c
@@ -18,7 +18,6 @@
 #include <linux/init.h>
 #include <linux/irq.h>
 #include <linux/seq_file.h>
-#include <linux/kexec.h>
 #include <linux/of_platform.h>
 #include <linux/memblock.h>
 #include <mm/mmu_decl.h>
@@ -65,7 +64,7 @@ static int __init page_aligned(unsigned long x)
 void __init wii_memory_fixups(void)
 {
-        struct memblock_property *p = memblock.memory.region;
+        struct memblock_region *p = memblock.memory.regions;
        /*
         * This is part of a workaround to allow the use of two
@@ -226,13 +225,6 @@ static void wii_shutdown(void)
        flipper_quiesce();
 }
-#ifdef CONFIG_KEXEC
-static int wii_machine_kexec_prepare(struct kimage *image)
-{
-        return 0;
-}
-#endif /* CONFIG_KEXEC */
 define_machine(wii) {
        .name                   = "wii",
        .probe                  = wii_probe,
@@ -246,9 +238,6 @@ define_machine(wii) {
        .calibrate_decr         = generic_calibrate_decr,
        .progress               = udbg_progress,
        .machine_shutdown       = wii_shutdown,
-#ifdef CONFIG_KEXEC
-        .machine_kexec_prepare  = wii_machine_kexec_prepare,
-#endif
 };
 static struct of_device_id wii_of_bus[] = {
diff --git a/arch/powerpc/platforms/iseries/Kconfig b/arch/powerpc/platforms/iseries/Kconfig
index 47a20cfb4486..b57cda3a0817 100644
--- a/arch/powerpc/platforms/iseries/Kconfig
+++ b/arch/powerpc/platforms/iseries/Kconfig
@@ -1,8 +1,10 @@
 config PPC_ISERIES
        bool "IBM Legacy iSeries"
        depends on PPC64 && PPC_BOOK3S
-        select PPC_INDIRECT_IO
+        select PPC_SMP_MUXED_IPI
-        select PPC_PCI_CHOICE if EMBEDDED
+        select PPC_INDIRECT_PIO
+        select PPC_INDIRECT_MMIO
+        select PPC_PCI_CHOICE if EXPERT
 menu "iSeries device drivers"
        depends on PPC_ISERIES
diff --git a/arch/powerpc/platforms/iseries/Makefile b/arch/powerpc/platforms/iseries/Makefile
index ce014928d460..a7602b11ed9d 100644
--- a/arch/powerpc/platforms/iseries/Makefile
+++ b/arch/powerpc/platforms/iseries/Makefile
@@ -1,4 +1,4 @@
-EXTRA_CFLAGS    += -mno-minimal-toc
+ccflags-y       := -mno-minimal-toc
 obj-y += exception.o
 obj-y += hvlog.o hvlpconfig.o lpardata.o setup.o dt.o mf.o lpevents.o \
diff --git a/arch/powerpc/platforms/iseries/dt.c b/arch/powerpc/platforms/iseries/dt.c
index 7f45a51fe793..f0491cc28900 100644
--- a/arch/powerpc/platforms/iseries/dt.c
+++ b/arch/powerpc/platforms/iseries/dt.c
@@ -242,7 +242,7 @@ static void __init dt_cpus(struct iseries_flat_dt *dt)
        pft_size[0] = 0; /* NUMA CEC cookie, 0 for non NUMA  */
        pft_size[1] = __ilog2(HvCallHpt_getHptPages() * HW_PAGE_SIZE);
-        for (i = 0; i < NR_CPUS; i++) {
+        for (i = 0; i < NR_LPPACAS; i++) {
                if (lppaca[i].dyn_proc_status >= 2)
                        continue;
diff --git a/arch/powerpc/platforms/iseries/exception.S b/arch/powerpc/platforms/iseries/exception.S
index 32a56c6dfa72..29c02f36b32f 100644
--- a/arch/powerpc/platforms/iseries/exception.S
+++ b/arch/powerpc/platforms/iseries/exception.S
@@ -31,6 +31,7 @@
 #include <asm/thread_info.h>
 #include <asm/ptrace.h>
 #include <asm/cputable.h>
+#include <asm/mmu.h>
 #include "exception.h"
@@ -60,29 +61,31 @@ system_reset_iSeries:
 /* Spin on __secondary_hold_spinloop until it is updated by the boot cpu. */
 /* In the UP case we'll yield() later, and we will not access the paca anyway */
 #ifdef CONFIG_SMP
-1:
+iSeries_secondary_wait_paca:
        HMT_LOW
        LOAD_REG_ADDR(r23, __secondary_hold_spinloop)
        ld      r23,0(r23)
-        sync
-        LOAD_REG_ADDR(r3,current_set)
-        sldi    r28,r24,3               /* get current_set[cpu#] */
-        ldx     r3,r3,r28
-        addi    r1,r3,THREAD_SIZE
-        subi    r1,r1,STACK_FRAME_OVERHEAD
-        cmpwi   0,r23,0                 /* Keep poking the Hypervisor until */
+        cmpdi   0,r23,0
-        bne     2f                      /* we're released */
+        bne     2f                      /* go on when the master is ready */
-        /* Let the Hypervisor know we are alive */
+        /* Keep poking the Hypervisor until we're released */
        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
        lis     r3,0x8002
        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
        sc                              /* Invoke the hypervisor via a system call */
-        b       1b
+        b       iSeries_secondary_wait_paca
-#endif
 2:
+        HMT_MEDIUM
+        sync
+        LOAD_REG_ADDR(r3, nr_cpu_ids)   /* get number of pacas allocated */
+        lwz     r3,0(r3)                /* nr_cpus= or NR_CPUS can limit */
+        cmpld   0,r24,r3                /* is our cpu number allocated? */
+        bge     iSeries_secondary_yield /* no, yield forever */
        /* Load our paca now that it's been allocated */
        LOAD_REG_ADDR(r13, paca)
        ld      r13,0(r13)
@@ -93,10 +96,24 @@ system_reset_iSeries:
        ori     r23,r23,MSR_RI
        mtmsrd  r23                     /* RI on */
-        HMT_LOW
+iSeries_secondary_smp_loop:
-#ifdef CONFIG_SMP
        lbz     r23,PACAPROCSTART(r13)  /* Test if this processor
                                         * should start */
+        cmpwi   0,r23,0
+        bne     3f                      /* go on when we are told */
+        HMT_LOW
+        /* Let the Hypervisor know we are alive */
+        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+        lis     r3,0x8002
+        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
+        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
+        sc                              /* Invoke the hypervisor via a system call */
+        mfspr   r13,SPRN_SPRG_PACA      /* Put r13 back ???? */
+        b       iSeries_secondary_smp_loop /* wait for signal to start */
+3:
+        HMT_MEDIUM
        sync
        LOAD_REG_ADDR(r3,current_set)
        sldi    r28,r24,3               /* get current_set[cpu#] */
@@ -104,27 +121,22 @@ system_reset_iSeries:
        addi    r1,r3,THREAD_SIZE
        subi    r1,r1,STACK_FRAME_OVERHEAD
-        cmpwi   0,r23,0
-        beq     iSeries_secondary_smp_loop      /* Loop until told to go */
        b       __secondary_start               /* Loop until told to go */
-iSeries_secondary_smp_loop:
+#endif /* CONFIG_SMP */
-        /* Let the Hypervisor know we are alive */
-        /* 8002 is a call to HvCallCfg::getLps, a harmless Hypervisor function */
+iSeries_secondary_yield:
-        lis     r3,0x8002
-        rldicr  r3,r3,32,15             /* r0 = (r3 << 32) & 0xffff000000000000 */
-#else /* CONFIG_SMP */
        /* Yield the processor.  This is required for non-SMP kernels
                which are running on multi-threaded machines. */
+        HMT_LOW
        lis     r3,0x8000
        rldicr  r3,r3,32,15             /* r3 = (r3 << 32) & 0xffff000000000000 */
        addi    r3,r3,18                /* r3 = 0x8000000000000012 which is "yield" */
        li      r4,0                    /* "yield timed" */
        li      r5,-1                   /* "yield forever" */
-#endif /* CONFIG_SMP */
        li      r0,-1                   /* r0=-1 indicates a Hypervisor call */
        sc                              /* Invoke the hypervisor via a system call */
        mfspr   r13,SPRN_SPRG_PACA      /* Put r13 back ???? */
-        b       2b                      /* If SMP not configured, secondaries
+        b       iSeries_secondary_yield /* If SMP not configured, secondaries
                                         * loop forever */
 /***  ISeries-LPAR interrupt handlers ***/
@@ -157,7 +169,7 @@ BEGIN_FTR_SECTION
 FTR_SECTION_ELSE
        EXCEPTION_PROLOG_1(PACA_EXGEN)
        EXCEPTION_PROLOG_ISERIES_1
-ALT_FTR_SECTION_END_IFCLR(CPU_FTR_SLB)
+ALT_MMU_FTR_SECTION_END_IFCLR(MMU_FTR_SLB)
        b       data_access_common
 .do_stab_bolted_iSeries:
diff --git a/arch/powerpc/platforms/iseries/irq.c b/arch/powerpc/platforms/iseries/irq.c
index ba446bf355a9..b2103453eb01 100644
--- a/arch/powerpc/platforms/iseries/irq.c
+++ b/arch/powerpc/platforms/iseries/irq.c
@@ -42,7 +42,6 @@
 #include "irq.h"
 #include "pci.h"
 #include "call_pci.h"
-#include "smp.h"
 #ifdef CONFIG_PCI
@@ -167,11 +166,11 @@ static void pci_event_handler(struct HvLpEvent *event)
 * This will be called by device drivers (via enable_IRQ)
 * to enable INTA in the bridge interrupt status register.
 */
-static void iseries_enable_IRQ(unsigned int irq)
+static void iseries_enable_IRQ(struct irq_data *d)
 {
        u32 bus, dev_id, function, mask;
        const u32 sub_bus = 0;
-        unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int rirq = (unsigned int)irqd_to_hwirq(d);
        /* The IRQ has already been locked by the caller */
        bus = REAL_IRQ_TO_BUS(rirq);
@@ -184,23 +183,23 @@ static void iseries_enable_IRQ(unsigned int irq)
 }
 /* This is called by iseries_activate_IRQs */
-static unsigned int iseries_startup_IRQ(unsigned int irq)
+static unsigned int iseries_startup_IRQ(struct irq_data *d)
 {
        u32 bus, dev_id, function, mask;
        const u32 sub_bus = 0;
-        unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int rirq = (unsigned int)irqd_to_hwirq(d);
        bus = REAL_IRQ_TO_BUS(rirq);
        function = REAL_IRQ_TO_FUNC(rirq);
        dev_id = (REAL_IRQ_TO_IDSEL(rirq) << 4) + function;
        /* Link the IRQ number to the bridge */
-        HvCallXm_connectBusUnit(bus, sub_bus, dev_id, irq);
+        HvCallXm_connectBusUnit(bus, sub_bus, dev_id, d->irq);
        /* Unmask bridge interrupts in the FISR */
        mask = 0x01010000 << function;
        HvCallPci_unmaskFisr(bus, sub_bus, dev_id, mask);
-        iseries_enable_IRQ(irq);
+        iseries_enable_IRQ(d);
        return 0;
 }
@@ -215,21 +214,26 @@ void __init iSeries_activate_IRQs()
        for_each_irq (irq) {
                struct irq_desc *desc = irq_to_desc(irq);
+                struct irq_chip *chip;
-                if (desc && desc->chip && desc->chip->startup) {
+                if (!desc)
+                        continue;
+                chip = irq_desc_get_chip(desc);
+                if (chip && chip->irq_startup) {
                        raw_spin_lock_irqsave(&desc->lock, flags);
-                        desc->chip->startup(irq);
+                        chip->irq_startup(&desc->irq_data);
                        raw_spin_unlock_irqrestore(&desc->lock, flags);
                }
        }
 }
 /*  this is not called anywhere currently */
-static void iseries_shutdown_IRQ(unsigned int irq)
+static void iseries_shutdown_IRQ(struct irq_data *d)
 {
        u32 bus, dev_id, function, mask;
        const u32 sub_bus = 0;
-        unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int rirq = (unsigned int)irqd_to_hwirq(d);
        /* irq should be locked by the caller */
        bus = REAL_IRQ_TO_BUS(rirq);
@@ -248,11 +252,11 @@ static void iseries_shutdown_IRQ(unsigned int irq)
 * This will be called by device drivers (via disable_IRQ)
 * to disable INTA in the bridge interrupt status register.
 */
-static void iseries_disable_IRQ(unsigned int irq)
+static void iseries_disable_IRQ(struct irq_data *d)
 {
        u32 bus, dev_id, function, mask;
        const u32 sub_bus = 0;
-        unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int rirq = (unsigned int)irqd_to_hwirq(d);
        /* The IRQ has already been locked by the caller */
        bus = REAL_IRQ_TO_BUS(rirq);
@@ -264,9 +268,9 @@ static void iseries_disable_IRQ(unsigned int irq)
        HvCallPci_maskInterrupts(bus, sub_bus, dev_id, mask);
 }
-static void iseries_end_IRQ(unsigned int irq)
+static void iseries_end_IRQ(struct irq_data *d)
 {
-        unsigned int rirq = (unsigned int)irq_map[irq].hwirq;
+        unsigned int rirq = (unsigned int)irqd_to_hwirq(d);
        HvCallPci_eoi(REAL_IRQ_TO_BUS(rirq), REAL_IRQ_TO_SUBBUS(rirq),
                (REAL_IRQ_TO_IDSEL(rirq) << 4) + REAL_IRQ_TO_FUNC(rirq));
@@ -274,11 +278,11 @@ static void iseries_end_IRQ(unsigned int irq)
 static struct irq_chip iseries_pic = {
        .name           = "iSeries",
-        .startup        = iseries_startup_IRQ,
+        .irq_startup    = iseries_startup_IRQ,
-        .shutdown       = iseries_shutdown_IRQ,
+        .irq_shutdown   = iseries_shutdown_IRQ,
-        .unmask         = iseries_enable_IRQ,
+        .irq_unmask     = iseries_enable_IRQ,
-        .mask           = iseries_disable_IRQ,
+        .irq_mask       = iseries_disable_IRQ,
-        .eoi            = iseries_end_IRQ
+        .irq_eoi        = iseries_end_IRQ
 };
 /*
@@ -311,7 +315,7 @@ unsigned int iSeries_get_irq(void)
 #ifdef CONFIG_SMP
        if (get_lppaca()->int_dword.fields.ipi_cnt) {
                get_lppaca()->int_dword.fields.ipi_cnt = 0;
-                iSeries_smp_message_recv();
+                smp_ipi_demux();
        }
 #endif /* CONFIG_SMP */
        if (hvlpevent_is_pending())
@@ -341,7 +345,7 @@ unsigned int iSeries_get_irq(void)
 static int iseries_irq_host_map(struct irq_host *h, unsigned int virq,
                                irq_hw_number_t hw)
 {
-        set_irq_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
+        irq_set_chip_and_handler(virq, &iseries_pic, handle_fasteoi_irq);
        return 0;
 }
diff --git a/arch/powerpc/platforms/iseries/mf.c b/arch/powerpc/platforms/iseries/mf.c
index 33e5fc7334fc..62dabe3c2bfa 100644
--- a/arch/powerpc/platforms/iseries/mf.c
+++ b/arch/powerpc/platforms/iseries/mf.c
@@ -51,7 +51,7 @@
 static int mf_initialized;
 /*
- * This is the structure layout for the Machine Facilites LPAR event
+ * This is the structure layout for the Machine Facilities LPAR event
 * flows.
 */
 struct vsp_cmd_data {
@@ -1045,71 +1045,9 @@ static const struct file_operations mf_side_proc_fops = {
        .write          = mf_side_proc_write,
 };
-#if 0
-static void mf_getSrcHistory(char *buffer, int size)
-{
-        struct IplTypeReturnStuff return_stuff;
-        struct pending_event *ev = new_pending_event();
-        int rc = 0;
-        char *pages[4];
-        pages[0] = kmalloc(4096, GFP_ATOMIC);
-        pages[1] = kmalloc(4096, GFP_ATOMIC);
-        pages[2] = kmalloc(4096, GFP_ATOMIC);
-        pages[3] = kmalloc(4096, GFP_ATOMIC);
-        if ((ev == NULL) || (pages[0] == NULL) || (pages[1] == NULL)
-                         || (pages[2] == NULL) || (pages[3] == NULL))
-                return -ENOMEM;
-        return_stuff.xType = 0;
-        return_stuff.xRc = 0;
-        return_stuff.xDone = 0;
-        ev->event.hp_lp_event.xSubtype = 6;
-        ev->event.hp_lp_event.x.xSubtypeData =
-                subtype_data('M', 'F', 'V', 'I');
-        ev->event.data.vsp_cmd.xEvent = &return_stuff;
-        ev->event.data.vsp_cmd.cmd = 4;
-        ev->event.data.vsp_cmd.lp_index = HvLpConfig_getLpIndex();
-        ev->event.data.vsp_cmd.result_code = 0xFF;
-        ev->event.data.vsp_cmd.reserved = 0;
-        ev->event.data.vsp_cmd.sub_data.page[0] = iseries_hv_addr(pages[0]);
-        ev->event.data.vsp_cmd.sub_data.page[1] = iseries_hv_addr(pages[1]);
-        ev->event.data.vsp_cmd.sub_data.page[2] = iseries_hv_addr(pages[2]);
-        ev->event.data.vsp_cmd.sub_data.page[3] = iseries_hv_addr(pages[3]);
-        mb();
-        if (signal_event(ev) != 0)
-                return;
-        while (return_stuff.xDone != 1)
-                udelay(10);
-        if (return_stuff.xRc == 0)
-                memcpy(buffer, pages[0], size);
-        kfree(pages[0]);
-        kfree(pages[1]);
-        kfree(pages[2]);
-        kfree(pages[3]);
-}
-#endif
 static int mf_src_proc_show(struct seq_file *m, void *v)
 {
-#if 0
-        int len;
-        mf_getSrcHistory(page, count);
-        len = count;
-        len -= off;
-        if (len < count) {
-                *eof = 1;
-                if (len <= 0)
-                        return 0;
-        } else
-                len = count;
-        *start = page + off;
-        return len;
-#else
        return 0;
-#endif
 }
 static int mf_src_proc_open(struct inode *inode, struct file *file)
@@ -1249,6 +1187,7 @@ out:
 static const struct file_operations proc_vmlinux_operations = {
        .write          = proc_mf_change_vmlinux,
+        .llseek         = default_llseek,
 };
 static int __init mf_proc_init(void)
diff --git a/arch/powerpc/platforms/iseries/setup.c b/arch/powerpc/platforms/iseries/setup.c
index b0863410517f..c25a0815c26b 100644
--- a/arch/powerpc/platforms/iseries/setup.c
+++ b/arch/powerpc/platforms/iseries/setup.c
@@ -249,7 +249,7 @@ static unsigned long iSeries_process_mainstore_vpd(struct MemoryBlock *mb_array,
        unsigned long i;
        unsigned long mem_blocks = 0;
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                mem_blocks = iSeries_process_Regatta_mainstore_vpd(mb_array,
                                max_entries);
        else
@@ -634,7 +634,7 @@ static int __init iseries_probe(void)
        hpte_init_iSeries();
        /* iSeries does not support 16M pages */
-        cur_cpu_spec->cpu_features &= ~CPU_FTR_16M_PAGE;
+        cur_cpu_spec->mmu_features &= ~MMU_FTR_16M_PAGE;
        return 1;
 }
@@ -680,10 +680,16 @@ void * __init iSeries_early_setup(void)
         * on but calling this function multiple times is fine.
         */
        identify_cpu(0, mfspr(SPRN_PVR));
+        initialise_paca(&boot_paca, 0);
        powerpc_firmware_features |= FW_FEATURE_ISERIES;
        powerpc_firmware_features |= FW_FEATURE_LPAR;
+#ifdef CONFIG_SMP
+        /* On iSeries we know we can never have more than 64 cpus */
+        nr_cpu_ids = max(nr_cpu_ids, 64);
+#endif
        iSeries_fixup_klimit();
        /*
diff --git a/arch/powerpc/platforms/iseries/smp.c b/arch/powerpc/platforms/iseries/smp.c
index 6590850045af..e3265adde5d3 100644
--- a/arch/powerpc/platforms/iseries/smp.c
+++ b/arch/powerpc/platforms/iseries/smp.c
@@ -42,57 +42,23 @@
 #include <asm/cputable.h>
 #include <asm/system.h>
-#include "smp.h"
+static void smp_iSeries_cause_ipi(int cpu, unsigned long data)
-static unsigned long iSeries_smp_message[NR_CPUS];
-void iSeries_smp_message_recv(void)
-{
-        int cpu = smp_processor_id();
-        int msg;
-        if (num_online_cpus() < 2)
-                return;
-        for (msg = 0; msg < 4; msg++)
-                if (test_and_clear_bit(msg, &iSeries_smp_message[cpu]))
-                        smp_message_recv(msg);
-}
-static inline void smp_iSeries_do_message(int cpu, int msg)
 {
-        set_bit(msg, &iSeries_smp_message[cpu]);
        HvCall_sendIPI(&(paca[cpu]));
 }
-static void smp_iSeries_message_pass(int target, int msg)
-{
-        int i;
-        if (target < NR_CPUS)
-                smp_iSeries_do_message(target, msg);
-        else {
-                for_each_online_cpu(i) {
-                        if ((target == MSG_ALL_BUT_SELF) &&
-                                        (i == smp_processor_id()))
-                                continue;
-                        smp_iSeries_do_message(i, msg);
-                }
-        }
-}
 static int smp_iSeries_probe(void)
 {
        return cpumask_weight(cpu_possible_mask);
 }
-static void smp_iSeries_kick_cpu(int nr)
+static int smp_iSeries_kick_cpu(int nr)
 {
        BUG_ON((nr < 0) || (nr >= NR_CPUS));
        /* Verify that our partition has a processor nr */
-        if (lppaca[nr].dyn_proc_status >= 2)
+        if (lppaca_of(nr).dyn_proc_status >= 2)
-                return;
+                return -ENOENT;
        /* The processor is currently spinning, waiting
         * for the cpu_start field to become non-zero
@@ -100,6 +66,8 @@ static void smp_iSeries_kick_cpu(int nr)
         * continue on to secondary_start in iSeries_head.S
         */
        paca[nr].cpu_start = 1;
+        return 0;
 }
 static void __devinit smp_iSeries_setup_cpu(int nr)
@@ -107,7 +75,8 @@ static void __devinit smp_iSeries_setup_cpu(int nr)
 }
 static struct smp_ops_t iSeries_smp_ops = {
-        .message_pass = smp_iSeries_message_pass,
+        .message_pass = smp_muxed_ipi_message_pass,
+        .cause_ipi    = smp_iSeries_cause_ipi,
        .probe        = smp_iSeries_probe,
        .kick_cpu     = smp_iSeries_kick_cpu,
        .setup_cpu    = smp_iSeries_setup_cpu,
diff --git a/arch/powerpc/platforms/iseries/smp.h b/arch/powerpc/platforms/iseries/smp.h
deleted file mode 100644
index d501f7de01e7..000000000000
--- a/arch/powerpc/platforms/iseries/smp.h
+++ /dev/null
@@ -1,6 +0,0 @@
-#ifndef _PLATFORMS_ISERIES_SMP_H
-#define _PLATFORMS_ISERIES_SMP_H
-extern void iSeries_smp_message_recv(void);
-#endif  /* _PLATFORMS_ISERIES_SMP_H */
diff --git a/arch/powerpc/platforms/iseries/viopath.c b/arch/powerpc/platforms/iseries/viopath.c
index b5f05d943a90..2376069cdc14 100644
--- a/arch/powerpc/platforms/iseries/viopath.c
+++ b/arch/powerpc/platforms/iseries/viopath.c
@@ -396,7 +396,7 @@ static void vio_handleEvent(struct HvLpEvent *event)
                        viopathStatus[remoteLp].mTargetInst)) {
                        printk(VIOPATH_KERN_WARN
                               "message from invalid partition. "
-                               "int msg rcvd, source inst (%d) doesnt match (%d)\n",
+                               "int msg rcvd, source inst (%d) doesn't match (%d)\n",
                               viopathStatus[remoteLp].mTargetInst,
                               event->xSourceInstanceId);
                        return;
@@ -407,7 +407,7 @@ static void vio_handleEvent(struct HvLpEvent *event)
                        viopathStatus[remoteLp].mSourceInst)) {
                        printk(VIOPATH_KERN_WARN
                               "message from invalid partition. "
-                               "int msg rcvd, target inst (%d) doesnt match (%d)\n",
+                               "int msg rcvd, target inst (%d) doesn't match (%d)\n",
                               viopathStatus[remoteLp].mSourceInst,
                               event->xTargetInstanceId);
                        return;
@@ -418,7 +418,7 @@ static void vio_handleEvent(struct HvLpEvent *event)
                    viopathStatus[remoteLp].mSourceInst) {
                        printk(VIOPATH_KERN_WARN
                               "message from invalid partition. "
-                               "ack msg rcvd, source inst (%d) doesnt match (%d)\n",
+                               "ack msg rcvd, source inst (%d) doesn't match (%d)\n",
                               viopathStatus[remoteLp].mSourceInst,
                               event->xSourceInstanceId);
                        return;
@@ -428,7 +428,7 @@ static void vio_handleEvent(struct HvLpEvent *event)
                    viopathStatus[remoteLp].mTargetInst) {
                        printk(VIOPATH_KERN_WARN
                               "message from invalid partition. "
-                               "viopath: ack msg rcvd, target inst (%d) doesnt match (%d)\n",
+                               "viopath: ack msg rcvd, target inst (%d) doesn't match (%d)\n",
                               viopathStatus[remoteLp].mTargetInst,
                               event->xTargetInstanceId);
                        return;
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index 04296ffff8bf..dd2e48b28508 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -498,7 +498,7 @@ void __devinit maple_pci_irq_fixup(struct pci_dev *dev)
                printk(KERN_DEBUG "Fixup U4 PCIe IRQ\n");
                dev->irq = irq_create_mapping(NULL, 1);
                if (dev->irq != NO_IRQ)
-                        set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
+                        irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
        }
        /* Hide AMD8111 IDE interrupt when in legacy mode so
diff --git a/arch/powerpc/platforms/maple/setup.c b/arch/powerpc/platforms/maple/setup.c
index 3fff8d979b41..fe34c3d9bb74 100644
--- a/arch/powerpc/platforms/maple/setup.c
+++ b/arch/powerpc/platforms/maple/setup.c
@@ -358,6 +358,7 @@ static int __init maple_cpc925_edac_setup(void)
        model = (const unsigned char *)of_get_property(np, "model", NULL);
        if (!model) {
                printk(KERN_ERR "%s: Unabel to get model info\n", __func__);
+                of_node_put(np);
                return -ENODEV;
        }
diff --git a/arch/powerpc/platforms/pasemi/dma_lib.c b/arch/powerpc/platforms/pasemi/dma_lib.c
index 09695ae50f91..321a9b3a2d00 100644
--- a/arch/powerpc/platforms/pasemi/dma_lib.c
+++ b/arch/powerpc/platforms/pasemi/dma_lib.c
@@ -379,9 +379,9 @@ void pasemi_dma_free_buf(struct pasemi_dmachan *chan, int size,
 }
 EXPORT_SYMBOL(pasemi_dma_free_buf);
-/* pasemi_dma_alloc_flag - Allocate a flag (event) for channel syncronization
+/* pasemi_dma_alloc_flag - Allocate a flag (event) for channel synchronization
 *
- * Allocates a flag for use with channel syncronization (event descriptors).
+ * Allocates a flag for use with channel synchronization (event descriptors).
 * Returns allocated flag (0-63), < 0 on error.
 */
 int pasemi_dma_alloc_flag(void)
diff --git a/arch/powerpc/platforms/pasemi/gpio_mdio.c b/arch/powerpc/platforms/pasemi/gpio_mdio.c
index a5d907b5a4c2..9886296e08da 100644
--- a/arch/powerpc/platforms/pasemi/gpio_mdio.c
+++ b/arch/powerpc/platforms/pasemi/gpio_mdio.c
@@ -216,8 +216,7 @@ static int gpio_mdio_reset(struct mii_bus *bus)
 }
-static int __devinit gpio_mdio_probe(struct platform_device *ofdev,
+static int __devinit gpio_mdio_probe(struct platform_device *ofdev)
-                                     const struct of_device_id *match)
 {
        struct device *dev = &ofdev->dev;
        struct device_node *np = ofdev->dev.of_node;
@@ -299,7 +298,7 @@ static struct of_device_id gpio_mdio_match[] =
 };
 MODULE_DEVICE_TABLE(of, gpio_mdio_match);
-static struct of_platform_driver gpio_mdio_driver =
+static struct platform_driver gpio_mdio_driver =
 {
        .probe          = gpio_mdio_probe,
        .remove         = gpio_mdio_remove,
@@ -326,13 +325,13 @@ int gpio_mdio_init(void)
        if (!gpio_regs)
                return -ENODEV;
-        return of_register_platform_driver(&gpio_mdio_driver);
+        return platform_driver_register(&gpio_mdio_driver);
 }
 module_init(gpio_mdio_init);
 void gpio_mdio_exit(void)
 {
-        of_unregister_platform_driver(&gpio_mdio_driver);
+        platform_driver_unregister(&gpio_mdio_driver);
        if (gpio_regs)
                iounmap(gpio_regs);
 }
diff --git a/arch/powerpc/platforms/pasemi/iommu.c b/arch/powerpc/platforms/pasemi/iommu.c
index 1f9fb2c57761..14943ef01918 100644
--- a/arch/powerpc/platforms/pasemi/iommu.c
+++ b/arch/powerpc/platforms/pasemi/iommu.c
@@ -156,20 +156,12 @@ static void iommu_table_iobmap_setup(void)
 static void pci_dma_bus_setup_pasemi(struct pci_bus *bus)
 {
-        struct device_node *dn;
        pr_debug("pci_dma_bus_setup, bus %p, bus->self %p\n", bus, bus->self);
        if (!iommu_table_iobmap_inited) {
                iommu_table_iobmap_inited = 1;
                iommu_table_iobmap_setup();
        }
-        dn = pci_bus_to_OF_node(bus);
-        if (dn)
-                PCI_DN(dn)->iommu_table = &iommu_table_iobmap;
 }
@@ -192,9 +184,6 @@ static void pci_dma_dev_setup_pasemi(struct pci_dev *dev)
        set_iommu_table_base(&dev->dev, &iommu_table_iobmap);
 }
-static void pci_dma_bus_setup_null(struct pci_bus *b) { }
-static void pci_dma_dev_setup_null(struct pci_dev *d) { }
 int __init iob_init(struct device_node *dn)
 {
        unsigned long tmp;
@@ -251,14 +240,8 @@ void __init iommu_init_early_pasemi(void)
        iommu_off = of_chosen &&
                        of_get_property(of_chosen, "linux,iommu-off", NULL);
 #endif
-        if (iommu_off) {
+        if (iommu_off)
-                /* Direct I/O, IOMMU off */
-                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_null;
-                ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_null;
-                set_pci_dma_ops(&dma_direct_ops);
                return;
-        }
        iob_init(NULL);
diff --git a/arch/powerpc/platforms/pasemi/setup.c b/arch/powerpc/platforms/pasemi/setup.c
index f372ec1691a3..7c858e6f843c 100644
--- a/arch/powerpc/platforms/pasemi/setup.c
+++ b/arch/powerpc/platforms/pasemi/setup.c
@@ -239,8 +239,8 @@ static __init void pas_init_IRQ(void)
        if (nmiprop) {
                nmi_virq = irq_create_mapping(NULL, *nmiprop);
                mpic_irq_set_priority(nmi_virq, 15);
-                set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
+                irq_set_irq_type(nmi_virq, IRQ_TYPE_EDGE_RISING);
-                mpic_unmask_irq(nmi_virq);
+                mpic_unmask_irq(irq_get_irq_data(nmi_virq));
        }
        of_node_put(mpic_node);
@@ -266,7 +266,7 @@ static int pas_machine_check_handler(struct pt_regs *regs)
        if (nmi_virq != NO_IRQ && mpic_get_mcirq() == nmi_virq) {
                printk(KERN_ERR "NMI delivered\n");
                debugger(regs);
-                mpic_end_irq(nmi_virq);
+                mpic_end_irq(irq_get_irq_data(nmi_virq));
                goto out;
        }
diff --git a/arch/powerpc/platforms/powermac/Kconfig b/arch/powerpc/platforms/powermac/Kconfig
index 1e1a0873e1dd..1afd10f67858 100644
--- a/arch/powerpc/platforms/powermac/Kconfig
+++ b/arch/powerpc/platforms/powermac/Kconfig
@@ -18,4 +18,13 @@ config PPC_PMAC64
        select PPC_970_NAP
        default y
+config PPC_PMAC32_PSURGE
+        bool "Support for powersurge upgrade cards" if EXPERT
+        depends on SMP && PPC32 && PPC_PMAC
+        select PPC_SMP_MUXED_IPI
+        default y
+        help
+          The powersurge cpu boards can be used in the generation
+          of powermacs that have a socket for an upgradeable cpu card,
+          including the 7500, 8500, 9500, 9600.  Support exists for
+          both dual and quad socket upgrade cards.
diff --git a/arch/powerpc/platforms/powermac/Makefile b/arch/powerpc/platforms/powermac/Makefile
index 50f169392551..ea47df66fee5 100644
--- a/arch/powerpc/platforms/powermac/Makefile
+++ b/arch/powerpc/platforms/powermac/Makefile
@@ -11,7 +11,7 @@ obj-y				+= pic.o setup.o time.o feature.o pci.o \
 obj-$(CONFIG_PMAC_BACKLIGHT)    += backlight.o
 obj-$(CONFIG_CPU_FREQ_PMAC)     += cpufreq_32.o
 obj-$(CONFIG_CPU_FREQ_PMAC64)   += cpufreq_64.o
-# CONFIG_NVRAM is an arch. independant tristate symbol, for pmac32 we really
+# CONFIG_NVRAM is an arch. independent tristate symbol, for pmac32 we really
 # need this to be a bool.  Cheat here and pretend CONFIG_NVRAM=m is really
 # CONFIG_NVRAM=y
 obj-$(CONFIG_NVRAM:m=y)         += nvram.o
diff --git a/arch/powerpc/platforms/powermac/cpufreq_32.c b/arch/powerpc/platforms/powermac/cpufreq_32.c
index 415ca6d6b273..04af5f48b4eb 100644
--- a/arch/powerpc/platforms/powermac/cpufreq_32.c
+++ b/arch/powerpc/platforms/powermac/cpufreq_32.c
@@ -429,7 +429,7 @@ static u32 read_gpio(struct device_node *np)
        return offset;
 }
-static int pmac_cpufreq_suspend(struct cpufreq_policy *policy, pm_message_t pmsg)
+static int pmac_cpufreq_suspend(struct cpufreq_policy *policy)
 {
        /* Ok, this could be made a bit smarter, but let's be robust for now. We
         * always force a speed change to high speed before sleep, to make sure
diff --git a/arch/powerpc/platforms/powermac/low_i2c.c b/arch/powerpc/platforms/powermac/low_i2c.c
index 480567e5fa9a..e9c8a607268e 100644
--- a/arch/powerpc/platforms/powermac/low_i2c.c
+++ b/arch/powerpc/platforms/powermac/low_i2c.c
@@ -904,7 +904,7 @@ static void __init smu_i2c_probe(void)
        printk(KERN_INFO "SMU i2c %s\n", controller->full_name);
        /* Look for childs, note that they might not be of the right
-         * type as older device trees mix i2c busses and other thigns
+         * type as older device trees mix i2c busses and other things
         * at the same level
         */
        for (busnode = NULL;
diff --git a/arch/powerpc/platforms/powermac/pci.c b/arch/powerpc/platforms/powermac/pci.c
index 3bc075c788ef..f33e08d573ce 100644
--- a/arch/powerpc/platforms/powermac/pci.c
+++ b/arch/powerpc/platforms/powermac/pci.c
@@ -299,7 +299,7 @@ static void __init setup_chaos(struct pci_controller *hose,
 * This function deals with some "special cases" devices.
 *
 *  0 -> No special case
- *  1 -> Skip the device but act as if the access was successfull
+ *  1 -> Skip the device but act as if the access was successful
 *       (return 0xff's on reads, eventually, cache config space
 *       accesses in a later version)
 * -1 -> Hide the device (unsuccessful access)
@@ -988,7 +988,7 @@ void __devinit pmac_pci_irq_fixup(struct pci_dev *dev)
            dev->vendor == PCI_VENDOR_ID_DEC &&
            dev->device == PCI_DEVICE_ID_DEC_TULIP_PLUS) {
                dev->irq = irq_create_mapping(NULL, 60);
-                set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
+                irq_set_irq_type(dev->irq, IRQ_TYPE_LEVEL_LOW);
        }
 #endif /* CONFIG_PPC32 */
 }
diff --git a/arch/powerpc/platforms/powermac/pfunc_core.c b/arch/powerpc/platforms/powermac/pfunc_core.c
index cec635942657..b0c3777528a1 100644
--- a/arch/powerpc/platforms/powermac/pfunc_core.c
+++ b/arch/powerpc/platforms/powermac/pfunc_core.c
@@ -837,8 +837,10 @@ struct pmf_function *__pmf_find_function(struct device_node *target,
                return NULL;
 find_it:
        dev = pmf_find_device(actor);
-        if (dev == NULL)
+        if (dev == NULL) {
-                return NULL;
+                result = NULL;
+                goto out;
+        }
        list_for_each_entry(func, &dev->functions, link) {
                if (name && strcmp(name, func->name))
@@ -850,8 +852,9 @@ struct pmf_function *__pmf_find_function(struct device_node *target,
                result = func;
                break;
        }
-        of_node_put(actor);
        pmf_put_device(dev);
+out:
+        of_node_put(actor);
        return result;
 }
diff --git a/arch/powerpc/platforms/powermac/pic.c b/arch/powerpc/platforms/powermac/pic.c
index 890d5f72b198..7667db448aa7 100644
--- a/arch/powerpc/platforms/powermac/pic.c
+++ b/arch/powerpc/platforms/powermac/pic.c
@@ -21,7 +21,7 @@
 #include <linux/signal.h>
 #include <linux/pci.h>
 #include <linux/interrupt.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/adb.h>
 #include <linux/pmu.h>
 #include <linux/module.h>
@@ -82,9 +82,9 @@ static void __pmac_retrigger(unsigned int irq_nr)
        }
 }
-static void pmac_mask_and_ack_irq(unsigned int virq)
+static void pmac_mask_and_ack_irq(struct irq_data *d)
 {
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long bit = 1UL << (src & 0x1f);
        int i = src >> 5;
        unsigned long flags;
@@ -104,9 +104,9 @@ static void pmac_mask_and_ack_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
 }
-static void pmac_ack_irq(unsigned int virq)
+static void pmac_ack_irq(struct irq_data *d)
 {
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long bit = 1UL << (src & 0x1f);
        int i = src >> 5;
        unsigned long flags;
@@ -149,15 +149,15 @@ static void __pmac_set_irq_mask(unsigned int irq_nr, int nokicklost)
 /* When an irq gets requested for the first client, if it's an
 * edge interrupt, we clear any previous one on the controller
 */
-static unsigned int pmac_startup_irq(unsigned int virq)
+static unsigned int pmac_startup_irq(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long bit = 1UL << (src & 0x1f);
        int i = src >> 5;
        raw_spin_lock_irqsave(&pmac_pic_lock, flags);
-        if ((irq_to_desc(virq)->status & IRQ_LEVEL) == 0)
+        if (!irqd_is_level_type(d))
                out_le32(&pmac_irq_hw[i]->ack, bit);
        __set_bit(src, ppc_cached_irq_mask);
        __pmac_set_irq_mask(src, 0);
@@ -166,10 +166,10 @@ static unsigned int pmac_startup_irq(unsigned int virq)
        return 0;
 }
-static void pmac_mask_irq(unsigned int virq)
+static void pmac_mask_irq(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        raw_spin_lock_irqsave(&pmac_pic_lock, flags);
        __clear_bit(src, ppc_cached_irq_mask);
@@ -177,10 +177,10 @@ static void pmac_mask_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
 }
-static void pmac_unmask_irq(unsigned int virq)
+static void pmac_unmask_irq(struct irq_data *d)
 {
        unsigned long flags;
-        unsigned int src = irq_map[virq].hwirq;
+        unsigned int src = irqd_to_hwirq(d);
        raw_spin_lock_irqsave(&pmac_pic_lock, flags);
        __set_bit(src, ppc_cached_irq_mask);
@@ -188,24 +188,24 @@ static void pmac_unmask_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
 }
-static int pmac_retrigger(unsigned int virq)
+static int pmac_retrigger(struct irq_data *d)
 {
        unsigned long flags;
        raw_spin_lock_irqsave(&pmac_pic_lock, flags);
-        __pmac_retrigger(irq_map[virq].hwirq);
+        __pmac_retrigger(irqd_to_hwirq(d));
        raw_spin_unlock_irqrestore(&pmac_pic_lock, flags);
        return 1;
 }
 static struct irq_chip pmac_pic = {
        .name           = "PMAC-PIC",
-        .startup        = pmac_startup_irq,
+        .irq_startup    = pmac_startup_irq,
-        .mask           = pmac_mask_irq,
+        .irq_mask       = pmac_mask_irq,
-        .ack            = pmac_ack_irq,
+        .irq_ack        = pmac_ack_irq,
-        .mask_ack       = pmac_mask_and_ack_irq,
+        .irq_mask_ack   = pmac_mask_and_ack_irq,
-        .unmask         = pmac_unmask_irq,
+        .irq_unmask     = pmac_unmask_irq,
-        .retrigger      = pmac_retrigger,
+        .irq_retrigger  = pmac_retrigger,
 };
 static irqreturn_t gatwick_action(int cpl, void *dev_id)
@@ -239,15 +239,12 @@ static unsigned int pmac_pic_get_irq(void)
        unsigned long bits = 0;
        unsigned long flags;
-#ifdef CONFIG_SMP
+#ifdef CONFIG_PPC_PMAC32_PSURGE
-        void psurge_smp_message_recv(void);
+        /* IPI's are a hack on the powersurge -- Cort */
+        if (smp_processor_id() != 0) {
-        /* IPI's are a hack on the powersurge -- Cort */
+                return  psurge_secondary_virq;
-        if ( smp_processor_id() != 0 ) {
-                psurge_smp_message_recv();
-                return NO_IRQ_IGNORE;   /* ignore, already handled */
        }
-#endif /* CONFIG_SMP */
+#endif /* CONFIG_PPC_PMAC32_PSURGE */
        raw_spin_lock_irqsave(&pmac_pic_lock, flags);
        for (irq = max_real_irqs; (irq -= 32) >= 0; ) {
                int i = irq >> 5;
@@ -289,7 +286,6 @@ static int pmac_pic_host_match(struct irq_host *h, struct device_node *node)
 static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
                             irq_hw_number_t hw)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
        int level;
        if (hw >= max_irqs)
@@ -300,9 +296,9 @@ static int pmac_pic_host_map(struct irq_host *h, unsigned int virq,
         */
        level = !!(level_mask[hw >> 5] & (1UL << (hw & 0x1f)));
        if (level)
-                desc->status |= IRQ_LEVEL;
+                irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &pmac_pic, level ?
+        irq_set_chip_and_handler(virq, &pmac_pic,
-                                 handle_level_irq : handle_edge_irq);
+                                 level ? handle_level_irq : handle_edge_irq);
        return 0;
 }
@@ -472,12 +468,14 @@ int of_irq_map_oldworld(struct device_node *device, int index,
 static void pmac_u3_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct mpic *mpic = desc->handler_data;
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct mpic *mpic = irq_desc_get_handler_data(desc);
        unsigned int cascade_irq = mpic_get_one_irq(mpic);
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static void __init pmac_pic_setup_mpic_nmi(struct mpic *mpic)
@@ -589,8 +587,8 @@ static int __init pmac_pic_probe_mpic(void)
                of_node_put(slave);
                return 0;
        }
-        set_irq_data(cascade, mpic2);
+        irq_set_handler_data(cascade, mpic2);
-        set_irq_chained_handler(cascade, pmac_u3_cascade);
+        irq_set_chained_handler(cascade, pmac_u3_cascade);
        of_node_put(slave);
        return 0;
@@ -676,7 +674,7 @@ not_found:
        return viaint;
 }
-static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
+static int pmacpic_suspend(void)
 {
        int viaint = pmacpic_find_viaint();
@@ -697,7 +695,7 @@ static int pmacpic_suspend(struct sys_device *sysdev, pm_message_t state)
        return 0;
 }
-static int pmacpic_resume(struct sys_device *sysdev)
+static void pmacpic_resume(void)
 {
        int i;
@@ -707,40 +705,21 @@ static int pmacpic_resume(struct sys_device *sysdev)
        mb();
        for (i = 0; i < max_real_irqs; ++i)
                if (test_bit(i, sleep_save_mask))
-                        pmac_unmask_irq(i);
+                        pmac_unmask_irq(irq_get_irq_data(i));
-        return 0;
 }
-#endif /* CONFIG_PM && CONFIG_PPC32 */
+static struct syscore_ops pmacpic_syscore_ops = {
+        .suspend        = pmacpic_suspend,
-static struct sysdev_class pmacpic_sysclass = {
+        .resume         = pmacpic_resume,
-        .name = "pmac_pic",
-};
-static struct sys_device device_pmacpic = {
-        .id             = 0,
-        .cls            = &pmacpic_sysclass,
 };
-static struct sysdev_driver driver_pmacpic = {
+static int __init init_pmacpic_syscore(void)
-#if defined(CONFIG_PM) && defined(CONFIG_PPC32)
-        .suspend        = &pmacpic_suspend,
-        .resume         = &pmacpic_resume,
-#endif /* CONFIG_PM && CONFIG_PPC32 */
-};
-static int __init init_pmacpic_sysfs(void)
 {
-#ifdef CONFIG_PPC32
+        if (pmac_irq_hw[0])
-        if (max_irqs == 0)
+                register_syscore_ops(&pmacpic_syscore_ops);
-                return -ENODEV;
-#endif
-        printk(KERN_DEBUG "Registering pmac pic with sysfs...\n");
-        sysdev_class_register(&pmacpic_sysclass);
-        sysdev_register(&device_pmacpic);
-        sysdev_driver_register(&pmacpic_sysclass, &driver_pmacpic);
        return 0;
 }
-machine_subsys_initcall(powermac, init_pmacpic_sysfs);
+machine_subsys_initcall(powermac, init_pmacpic_syscore);
+#endif /* CONFIG_PM && CONFIG_PPC32 */
diff --git a/arch/powerpc/platforms/powermac/pic.h b/arch/powerpc/platforms/powermac/pic.h
deleted file mode 100644
index d622a8345aaa..000000000000
--- a/arch/powerpc/platforms/powermac/pic.h
+++ /dev/null
@@ -1,11 +0,0 @@
-#ifndef __PPC_PLATFORMS_PMAC_PIC_H
-#define __PPC_PLATFORMS_PMAC_PIC_H
-#include <linux/irq.h>
-extern struct irq_chip pmac_pic;
-extern void pmac_pic_init(void);
-extern int pmac_get_irq(void);
-#endif /* __PPC_PLATFORMS_PMAC_PIC_H */
diff --git a/arch/powerpc/platforms/powermac/pmac.h b/arch/powerpc/platforms/powermac/pmac.h
index f0bc08f6c1f0..8327cce2bdb0 100644
--- a/arch/powerpc/platforms/powermac/pmac.h
+++ b/arch/powerpc/platforms/powermac/pmac.h
@@ -33,7 +33,7 @@ extern void pmac_setup_pci_dma(void);
 extern void pmac_check_ht_link(void);
 extern void pmac_setup_smp(void);
-extern void pmac32_cpu_die(void);
+extern int psurge_secondary_virq;
 extern void low_cpu_die(void) __attribute__((noreturn));
 extern int pmac_nvram_init(void);
diff --git a/arch/powerpc/platforms/powermac/setup.c b/arch/powerpc/platforms/powermac/setup.c
index 9deb274841f1..aa45281bd296 100644
--- a/arch/powerpc/platforms/powermac/setup.c
+++ b/arch/powerpc/platforms/powermac/setup.c
@@ -506,6 +506,15 @@ static int __init pmac_declare_of_platform_devices(void)
                of_platform_device_create(np, "smu", NULL);
                of_node_put(np);
        }
+        np = of_find_node_by_type(NULL, "fcu");
+        if (np == NULL) {
+                /* Some machines have strangely broken device-tree */
+                np = of_find_node_by_path("/u3@0,f8000000/i2c@f8001000/fan@15e");
+        }
+        if (np) {
+                of_platform_device_create(np, "temperature", NULL);
+                of_node_put(np);
+        }
        return 0;
 }
@@ -641,51 +650,6 @@ static int pmac_pci_probe_mode(struct pci_bus *bus)
                return PCI_PROBE_NORMAL;
        return PCI_PROBE_DEVTREE;
 }
-#ifdef CONFIG_HOTPLUG_CPU
-/* access per cpu vars from generic smp.c */
-DECLARE_PER_CPU(int, cpu_state);
-static void pmac64_cpu_die(void)
-{
-        /*
-         * turn off as much as possible, we'll be
-         * kicked out as this will only be invoked
-         * on core99 platforms for now ...
-         */
-        printk(KERN_INFO "CPU#%d offline\n", smp_processor_id());
-        __get_cpu_var(cpu_state) = CPU_DEAD;
-        smp_wmb();
-        /*
-         * during the path that leads here preemption is disabled,
-         * reenable it now so that when coming up preempt count is
-         * zero correctly
-         */
-        preempt_enable();
-        /*
-         * hard-disable interrupts for the non-NAP case, the NAP code
-         * needs to re-enable interrupts (but soft-disables them)
-         */
-        hard_irq_disable();
-        while (1) {
-                /* let's not take timer interrupts too often ... */
-                set_dec(0x7fffffff);
-                /* should always be true at this point */
-                if (cpu_has_feature(CPU_FTR_CAN_NAP))
-                        power4_cpu_offline_powersave();
-                else {
-                        HMT_low();
-                        HMT_very_low();
-                }
-        }
-}
-#endif /* CONFIG_HOTPLUG_CPU */
 #endif /* CONFIG_PPC64 */
 define_machine(powermac) {
@@ -717,15 +681,4 @@ define_machine(powermac) {
        .pcibios_after_init     = pmac_pcibios_after_init,
        .phys_mem_access_prot   = pci_phys_mem_access_prot,
 #endif
-#ifdef CONFIG_HOTPLUG_CPU
-#ifdef CONFIG_PPC64
-        .cpu_die                = pmac64_cpu_die,
-#endif
-#ifdef CONFIG_PPC32
-        .cpu_die                = pmac32_cpu_die,
-#endif
-#endif
-#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
-        .cpu_die                = generic_mach_cpu_die,
-#endif
 };
diff --git a/arch/powerpc/platforms/powermac/smp.c b/arch/powerpc/platforms/powermac/smp.c
index c95215f4f8b6..db092d7c4c5b 100644
--- a/arch/powerpc/platforms/powermac/smp.c
+++ b/arch/powerpc/platforms/powermac/smp.c
@@ -70,7 +70,7 @@ static void (*pmac_tb_freeze)(int freeze);
 static u64 timebase;
 static int tb_req;
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_PPC_PMAC32_PSURGE
 /*
 * Powersurge (old powermac SMP) support.
@@ -124,6 +124,10 @@ static volatile u32 __iomem *psurge_start;
 /* what sort of powersurge board we have */
 static int psurge_type = PSURGE_NONE;
+/* irq for secondary cpus to report */
+static struct irq_host *psurge_host;
+int psurge_secondary_virq;
 /*
 * Set and clear IPIs for powersurge.
 */
@@ -156,51 +160,52 @@ static inline void psurge_clr_ipi(int cpu)
 /*
 * On powersurge (old SMP powermac architecture) we don't have
 * separate IPIs for separate messages like openpic does.  Instead
- * we have a bitmap for each processor, where a 1 bit means that
+ * use the generic demux helpers
- * the corresponding message is pending for that processor.
- * Ideally each cpu's entry would be in a different cache line.
 *  -- paulus.
 */
-static unsigned long psurge_smp_message[NR_CPUS];
+static irqreturn_t psurge_ipi_intr(int irq, void *d)
-void psurge_smp_message_recv(void)
 {
-        int cpu = smp_processor_id();
+        psurge_clr_ipi(smp_processor_id());
-        int msg;
+        smp_ipi_demux();
-        /* clear interrupt */
-        psurge_clr_ipi(cpu);
-        if (num_online_cpus() < 2)
+        return IRQ_HANDLED;
-                return;
+}
-        /* make sure there is a message there */
+static void smp_psurge_cause_ipi(int cpu, unsigned long data)
-        for (msg = 0; msg < 4; msg++)
+{
-                if (test_and_clear_bit(msg, &psurge_smp_message[cpu]))
+        psurge_set_ipi(cpu);
-                        smp_message_recv(msg);
 }
-irqreturn_t psurge_primary_intr(int irq, void *d)
+static int psurge_host_map(struct irq_host *h, unsigned int virq,
+                         irq_hw_number_t hw)
 {
-        psurge_smp_message_recv();
+        irq_set_chip_and_handler(virq, &dummy_irq_chip, handle_percpu_irq);
-        return IRQ_HANDLED;
+        return 0;
 }
-static void smp_psurge_message_pass(int target, int msg)
+struct irq_host_ops psurge_host_ops = {
+        .map    = psurge_host_map,
+};
+static int psurge_secondary_ipi_init(void)
 {
-        int i;
+        int rc = -ENOMEM;
-        if (num_online_cpus() < 2)
+        psurge_host = irq_alloc_host(NULL, IRQ_HOST_MAP_NOMAP, 0,
-                return;
+                &psurge_host_ops, 0);
-        for_each_online_cpu(i) {
+        if (psurge_host)
-                if (target == MSG_ALL
+                psurge_secondary_virq = irq_create_direct_mapping(psurge_host);
-                    || (target == MSG_ALL_BUT_SELF && i != smp_processor_id())
-                    || target == i) {
+        if (psurge_secondary_virq)
-                        set_bit(msg, &psurge_smp_message[i]);
+                rc = request_irq(psurge_secondary_virq, psurge_ipi_intr,
-                        psurge_set_ipi(i);
+                        IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
-                }
-        }
+        if (rc)
+                pr_err("Failed to setup secondary cpu IPI\n");
+        return rc;
 }
 /*
@@ -311,6 +316,9 @@ static int __init smp_psurge_probe(void)
                ncpus = 2;
        }
+        if (psurge_secondary_ipi_init())
+                return 1;
        psurge_start = ioremap(PSURGE_START, 4);
        psurge_pri_intr = ioremap(PSURGE_PRI_INTR, 4);
@@ -329,7 +337,7 @@ static int __init smp_psurge_probe(void)
        return ncpus;
 }
-static void __init smp_psurge_kick_cpu(int nr)
+static int __init smp_psurge_kick_cpu(int nr)
 {
        unsigned long start = __pa(__secondary_start_pmac_0) + nr * 8;
        unsigned long a, flags;
@@ -394,11 +402,13 @@ static void __init smp_psurge_kick_cpu(int nr)
                psurge_set_ipi(1);
        if (ppc_md.progress) ppc_md.progress("smp_psurge_kick_cpu - done", 0x354);
+        return 0;
 }
 static struct irqaction psurge_irqaction = {
-        .handler = psurge_primary_intr,
+        .handler = psurge_ipi_intr,
-        .flags = IRQF_DISABLED,
+        .flags = IRQF_DISABLED|IRQF_PERCPU,
        .name = "primary IPI",
 };
@@ -437,14 +447,15 @@ void __init smp_psurge_give_timebase(void)
 /* PowerSurge-style Macs */
 struct smp_ops_t psurge_smp_ops = {
-        .message_pass   = smp_psurge_message_pass,
+        .message_pass   = smp_muxed_ipi_message_pass,
+        .cause_ipi      = smp_psurge_cause_ipi,
        .probe          = smp_psurge_probe,
        .kick_cpu       = smp_psurge_kick_cpu,
        .setup_cpu      = smp_psurge_setup_cpu,
        .give_timebase  = smp_psurge_give_timebase,
        .take_timebase  = smp_psurge_take_timebase,
 };
-#endif /* CONFIG_PPC32 - actually powersurge support */
+#endif /* CONFIG_PPC_PMAC32_PSURGE */
 /*
 * Core 99 and later support
@@ -791,14 +802,14 @@ static int __init smp_core99_probe(void)
        return ncpus;
 }
-static void __devinit smp_core99_kick_cpu(int nr)
+static int __devinit smp_core99_kick_cpu(int nr)
 {
        unsigned int save_vector;
        unsigned long target, flags;
        unsigned int *vector = (unsigned int *)(PAGE_OFFSET+0x100);
        if (nr < 0 || nr > 3)
-                return;
+                return -ENOENT;
        if (ppc_md.progress)
                ppc_md.progress("smp_core99_kick_cpu", 0x346);
@@ -830,6 +841,8 @@ static void __devinit smp_core99_kick_cpu(int nr)
        local_irq_restore(flags);
        if (ppc_md.progress) ppc_md.progress("smp_core99_kick_cpu done", 0x347);
+        return 0;
 }
 static void __devinit smp_core99_setup_cpu(int cpu_nr)
@@ -840,92 +853,151 @@ static void __devinit smp_core99_setup_cpu(int cpu_nr)
        /* Setup openpic */
        mpic_setup_this_cpu();
+}
-        if (cpu_nr == 0) {
 #ifdef CONFIG_PPC64
-                extern void g5_phy_disable_cpu1(void);
+#ifdef CONFIG_HOTPLUG_CPU
+static int smp_core99_cpu_notify(struct notifier_block *self,
+                                 unsigned long action, void *hcpu)
+{
+        int rc;
-                /* Close i2c bus if it was used for tb sync */
+        switch(action) {
+        case CPU_UP_PREPARE:
+        case CPU_UP_PREPARE_FROZEN:
+                /* Open i2c bus if it was used for tb sync */
                if (pmac_tb_clock_chip_host) {
-                        pmac_i2c_close(pmac_tb_clock_chip_host);
+                        rc = pmac_i2c_open(pmac_tb_clock_chip_host, 1);
-                        pmac_tb_clock_chip_host = NULL;
+                        if (rc) {
+                                pr_err("Failed to open i2c bus for time sync\n");
+                                return notifier_from_errno(rc);
+                        }
                }
+                break;
+        case CPU_ONLINE:
+        case CPU_UP_CANCELED:
+                /* Close i2c bus if it was used for tb sync */
+                if (pmac_tb_clock_chip_host)
+                        pmac_i2c_close(pmac_tb_clock_chip_host);
+                break;
+        default:
+                break;
+        }
+        return NOTIFY_OK;
+}
-                /* If we didn't start the second CPU, we must take
+static struct notifier_block __cpuinitdata smp_core99_cpu_nb = {
-                 * it off the bus
+        .notifier_call  = smp_core99_cpu_notify,
-                 */
+};
-                if (of_machine_is_compatible("MacRISC4") &&
+#endif /* CONFIG_HOTPLUG_CPU */
-                    num_online_cpus() < 2)              
-                        g5_phy_disable_cpu1();
+static void __init smp_core99_bringup_done(void)
-#endif /* CONFIG_PPC64 */
+{
+        extern void g5_phy_disable_cpu1(void);
-                if (ppc_md.progress)
+        /* Close i2c bus if it was used for tb sync */
-                        ppc_md.progress("core99_setup_cpu 0 done", 0x349);
+        if (pmac_tb_clock_chip_host)
+                pmac_i2c_close(pmac_tb_clock_chip_host);
+        /* If we didn't start the second CPU, we must take
+         * it off the bus.
+         */
+        if (of_machine_is_compatible("MacRISC4") &&
+            num_online_cpus() < 2) {
+                set_cpu_present(1, false);
+                g5_phy_disable_cpu1();
        }
-}
+#ifdef CONFIG_HOTPLUG_CPU
+        register_cpu_notifier(&smp_core99_cpu_nb);
+#endif
+        if (ppc_md.progress)
+                ppc_md.progress("smp_core99_bringup_done", 0x349);
+}
+#endif /* CONFIG_PPC64 */
-#if defined(CONFIG_HOTPLUG_CPU) && defined(CONFIG_PPC32)
+#ifdef CONFIG_HOTPLUG_CPU
-int smp_core99_cpu_disable(void)
+static int smp_core99_cpu_disable(void)
 {
-        set_cpu_online(smp_processor_id(), false);
+        int rc = generic_cpu_disable();
+        if (rc)
+                return rc;
-        /* XXX reset cpu affinity here */
        mpic_cpu_set_priority(0xf);
-        asm volatile("mtdec %0" : : "r" (0x7fffffff));
-        mb();
-        udelay(20);
-        asm volatile("mtdec %0" : : "r" (0x7fffffff));
        return 0;
 }
-static int cpu_dead[NR_CPUS];
+#ifdef CONFIG_PPC32
-void pmac32_cpu_die(void)
+static void pmac_cpu_die(void)
 {
+        int cpu = smp_processor_id();
        local_irq_disable();
-        cpu_dead[smp_processor_id()] = 1;
+        idle_task_exit();
+        pr_debug("CPU%d offline\n", cpu);
+        generic_set_cpu_dead(cpu);
+        smp_wmb();
        mb();
        low_cpu_die();
 }
-void smp_core99_cpu_die(unsigned int cpu)
+#else /* CONFIG_PPC32 */
+static void pmac_cpu_die(void)
 {
-        int timeout;
+        int cpu = smp_processor_id();
-        timeout = 1000;
+        local_irq_disable();
-        while (!cpu_dead[cpu]) {
+        idle_task_exit();
-                if (--timeout == 0) {
-                        printk("CPU %u refused to die!\n", cpu);
+        /*
-                        break;
+         * turn off as much as possible, we'll be
-                }
+         * kicked out as this will only be invoked
-                msleep(1);
+         * on core99 platforms for now ...
+         */
+        printk(KERN_INFO "CPU#%d offline\n", cpu);
+        generic_set_cpu_dead(cpu);
+        smp_wmb();
+        /*
+         * Re-enable interrupts. The NAP code needs to enable them
+         * anyways, do it now so we deal with the case where one already
+         * happened while soft-disabled.
+         * We shouldn't get any external interrupts, only decrementer, and the
+         * decrementer handler is safe for use on offline CPUs
+         */
+        local_irq_enable();
+        while (1) {
+                /* let's not take timer interrupts too often ... */
+                set_dec(0x7fffffff);
+                /* Enter NAP mode */
+                power4_idle();
        }
-        cpu_dead[cpu] = 0;
 }
-#endif /* CONFIG_HOTPLUG_CPU && CONFIG_PP32 */
+#endif /* else CONFIG_PPC32 */
+#endif /* CONFIG_HOTPLUG_CPU */
 /* Core99 Macs (dual G4s and G5s) */
 struct smp_ops_t core99_smp_ops = {
        .message_pass   = smp_mpic_message_pass,
        .probe          = smp_core99_probe,
+#ifdef CONFIG_PPC64
+        .bringup_done   = smp_core99_bringup_done,
+#endif
        .kick_cpu       = smp_core99_kick_cpu,
        .setup_cpu      = smp_core99_setup_cpu,
        .give_timebase  = smp_core99_give_timebase,
        .take_timebase  = smp_core99_take_timebase,
 #if defined(CONFIG_HOTPLUG_CPU)
-# if defined(CONFIG_PPC32)
        .cpu_disable    = smp_core99_cpu_disable,
-        .cpu_die        = smp_core99_cpu_die,
-# endif
-# if defined(CONFIG_PPC64)
-        .cpu_disable    = generic_cpu_disable,
        .cpu_die        = generic_cpu_die,
-        /* intentionally do *NOT* assign cpu_enable,
-         * the generic code will use kick_cpu then! */
-# endif
 #endif
 };
@@ -943,7 +1015,7 @@ void __init pmac_setup_smp(void)
                of_node_put(np);
                smp_ops = &core99_smp_ops;
        }
-#ifdef CONFIG_PPC32
+#ifdef CONFIG_PPC_PMAC32_PSURGE
        else {
                /* We have to set bits in cpu_possible_mask here since the
                 * secondary CPU(s) aren't in the device tree. Various
@@ -956,6 +1028,11 @@ void __init pmac_setup_smp(void)
                        set_cpu_possible(cpu, true);
                smp_ops = &psurge_smp_ops;
        }
-#endif /* CONFIG_PPC32 */
+#endif /* CONFIG_PPC_PMAC32_PSURGE */
+#ifdef CONFIG_HOTPLUG_CPU
+        ppc_md.cpu_die = pmac_cpu_die;
+#endif
 }
diff --git a/arch/powerpc/platforms/ps3/device-init.c b/arch/powerpc/platforms/ps3/device-init.c
index b341018326df..6c4b5837fc8a 100644
--- a/arch/powerpc/platforms/ps3/device-init.c
+++ b/arch/powerpc/platforms/ps3/device-init.c
@@ -566,10 +566,10 @@ static int ps3_setup_dynamic_device(const struct ps3_repository_device *repo)
        case PS3_DEV_TYPE_STOR_DISK:
                result = ps3_setup_storage_dev(repo, PS3_MATCH_ID_STOR_DISK);
-                /* Some devices are not accessable from the Other OS lpar. */
+                /* Some devices are not accessible from the Other OS lpar. */
                if (result == -ENODEV) {
                        result = 0;
-                        pr_debug("%s:%u: not accessable\n", __func__,
+                        pr_debug("%s:%u: not accessible\n", __func__,
                                 __LINE__);
                }
diff --git a/arch/powerpc/platforms/ps3/interrupt.c b/arch/powerpc/platforms/ps3/interrupt.c
index 59d9712d7364..600ed2c0ed59 100644
--- a/arch/powerpc/platforms/ps3/interrupt.c
+++ b/arch/powerpc/platforms/ps3/interrupt.c
@@ -44,7 +44,7 @@
 * @lock:
 * @ipi_debug_brk_mask:
 *
- * The HV mantains per SMT thread mappings of HV outlet to HV plug on
+ * The HV maintains per SMT thread mappings of HV outlet to HV plug on
 * behalf of the guest.  These mappings are implemented as 256 bit guest
 * supplied bitmaps indexed by plug number.  The addresses of the bitmaps
 * are registered with the HV through lv1_configure_irq_state_bitmap().
@@ -99,16 +99,16 @@ static DEFINE_PER_CPU(struct ps3_private, ps3_private);
 * Sets ps3_bmp.mask and calls lv1_did_update_interrupt_mask().
 */
-static void ps3_chip_mask(unsigned int virq)
+static void ps3_chip_mask(struct irq_data *d)
 {
-        struct ps3_private *pd = get_irq_chip_data(virq);
+        struct ps3_private *pd = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        pr_debug("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
-                pd->thread_id, virq);
+                pd->thread_id, d->irq);
        local_irq_save(flags);
-        clear_bit(63 - virq, &pd->bmp.mask);
+        clear_bit(63 - d->irq, &pd->bmp.mask);
        lv1_did_update_interrupt_mask(pd->ppe_id, pd->thread_id);
        local_irq_restore(flags);
 }
@@ -120,16 +120,16 @@ static void ps3_chip_mask(unsigned int virq)
 * Clears ps3_bmp.mask and calls lv1_did_update_interrupt_mask().
 */
-static void ps3_chip_unmask(unsigned int virq)
+static void ps3_chip_unmask(struct irq_data *d)
 {
-        struct ps3_private *pd = get_irq_chip_data(virq);
+        struct ps3_private *pd = irq_data_get_irq_chip_data(d);
        unsigned long flags;
        pr_debug("%s:%d: thread_id %llu, virq %d\n", __func__, __LINE__,
-                pd->thread_id, virq);
+                pd->thread_id, d->irq);
        local_irq_save(flags);
-        set_bit(63 - virq, &pd->bmp.mask);
+        set_bit(63 - d->irq, &pd->bmp.mask);
        lv1_did_update_interrupt_mask(pd->ppe_id, pd->thread_id);
        local_irq_restore(flags);
 }
@@ -141,10 +141,10 @@ static void ps3_chip_unmask(unsigned int virq)
 * Calls lv1_end_of_interrupt_ext().
 */
-static void ps3_chip_eoi(unsigned int virq)
+static void ps3_chip_eoi(struct irq_data *d)
 {
-        const struct ps3_private *pd = get_irq_chip_data(virq);
+        const struct ps3_private *pd = irq_data_get_irq_chip_data(d);
-        lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, virq);
+        lv1_end_of_interrupt_ext(pd->ppe_id, pd->thread_id, d->irq);
 }
 /**
@@ -153,9 +153,9 @@ static void ps3_chip_eoi(unsigned int virq)
 static struct irq_chip ps3_irq_chip = {
        .name = "ps3",
-        .mask = ps3_chip_mask,
+        .irq_mask = ps3_chip_mask,
-        .unmask = ps3_chip_unmask,
+        .irq_unmask = ps3_chip_unmask,
-        .eoi = ps3_chip_eoi,
+        .irq_eoi = ps3_chip_eoi,
 };
 /**
@@ -194,15 +194,15 @@ static int ps3_virq_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
        pr_debug("%s:%d: outlet %lu => cpu %u, virq %u\n", __func__, __LINE__,
                outlet, cpu, *virq);
-        result = set_irq_chip_data(*virq, pd);
+        result = irq_set_chip_data(*virq, pd);
        if (result) {
-                pr_debug("%s:%d: set_irq_chip_data failed\n",
+                pr_debug("%s:%d: irq_set_chip_data failed\n",
                        __func__, __LINE__);
                goto fail_set;
        }
-        ps3_chip_mask(*virq);
+        ps3_chip_mask(irq_get_irq_data(*virq));
        return result;
@@ -221,12 +221,12 @@ fail_create:
 static int ps3_virq_destroy(unsigned int virq)
 {
-        const struct ps3_private *pd = get_irq_chip_data(virq);
+        const struct ps3_private *pd = irq_get_chip_data(virq);
        pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
                __LINE__, pd->ppe_id, pd->thread_id, virq);
-        set_irq_chip_data(virq, NULL);
+        irq_set_chip_data(virq, NULL);
        irq_dispose_mapping(virq);
        pr_debug("%s:%d <-\n", __func__, __LINE__);
@@ -256,7 +256,7 @@ int ps3_irq_plug_setup(enum ps3_cpu_binding cpu, unsigned long outlet,
                goto fail_setup;
        }
-        pd = get_irq_chip_data(*virq);
+        pd = irq_get_chip_data(*virq);
        /* Binds outlet to cpu + virq. */
@@ -291,12 +291,12 @@ EXPORT_SYMBOL_GPL(ps3_irq_plug_setup);
 int ps3_irq_plug_destroy(unsigned int virq)
 {
        int result;
-        const struct ps3_private *pd = get_irq_chip_data(virq);
+        const struct ps3_private *pd = irq_get_chip_data(virq);
        pr_debug("%s:%d: ppe_id %llu, thread_id %llu, virq %u\n", __func__,
                __LINE__, pd->ppe_id, pd->thread_id, virq);
-        ps3_chip_mask(virq);
+        ps3_chip_mask(irq_get_irq_data(virq));
        result = lv1_disconnect_irq_plug_ext(pd->ppe_id, pd->thread_id, virq);
@@ -357,7 +357,7 @@ int ps3_event_receive_port_destroy(unsigned int virq)
        pr_debug(" -> %s:%d virq %u\n", __func__, __LINE__, virq);
-        ps3_chip_mask(virq);
+        ps3_chip_mask(irq_get_irq_data(virq));
        result = lv1_destruct_event_receive_port(virq_to_hw(virq));
@@ -492,7 +492,7 @@ int ps3_io_irq_destroy(unsigned int virq)
        int result;
        unsigned long outlet = virq_to_hw(virq);
-        ps3_chip_mask(virq);
+        ps3_chip_mask(irq_get_irq_data(virq));
        /*
         * lv1_destruct_io_irq_outlet() will destroy the IRQ plug,
@@ -553,7 +553,7 @@ int ps3_vuart_irq_destroy(unsigned int virq)
 {
        int result;
-        ps3_chip_mask(virq);
+        ps3_chip_mask(irq_get_irq_data(virq));
        result = lv1_deconfigure_virtual_uart_irq();
        if (result) {
@@ -605,7 +605,7 @@ int ps3_spe_irq_destroy(unsigned int virq)
 {
        int result;
-        ps3_chip_mask(virq);
+        ps3_chip_mask(irq_get_irq_data(virq));
        result = ps3_irq_plug_destroy(virq);
        BUG_ON(result);
@@ -659,18 +659,13 @@ static void __maybe_unused _dump_mask(struct ps3_private *pd,
 static void dump_bmp(struct ps3_private* pd) {};
 #endif /* defined(DEBUG) */
-static void ps3_host_unmap(struct irq_host *h, unsigned int virq)
-{
-        set_irq_chip_data(virq, NULL);
-}
 static int ps3_host_map(struct irq_host *h, unsigned int virq,
        irq_hw_number_t hwirq)
 {
        pr_debug("%s:%d: hwirq %lu, virq %u\n", __func__, __LINE__, hwirq,
                virq);
-        set_irq_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq);
+        irq_set_chip_and_handler(virq, &ps3_irq_chip, handle_fasteoi_irq);
        return 0;
 }
@@ -683,7 +678,6 @@ static int ps3_host_match(struct irq_host *h, struct device_node *np)
 static struct irq_host_ops ps3_host_ops = {
        .map = ps3_host_map,
-        .unmap = ps3_host_unmap,
        .match = ps3_host_match,
 };
diff --git a/arch/powerpc/platforms/ps3/smp.c b/arch/powerpc/platforms/ps3/smp.c
index 51ffde40af2b..4c44794faac0 100644
--- a/arch/powerpc/platforms/ps3/smp.c
+++ b/arch/powerpc/platforms/ps3/smp.c
@@ -39,7 +39,7 @@
 #define MSG_COUNT 4
 static DEFINE_PER_CPU(unsigned int [MSG_COUNT], ps3_ipi_virqs);
-static void do_message_pass(int target, int msg)
+static void ps3_smp_message_pass(int cpu, int msg)
 {
        int result;
        unsigned int virq;
@@ -49,28 +49,12 @@ static void do_message_pass(int target, int msg)
                return;
        }
-        virq = per_cpu(ps3_ipi_virqs, target)[msg];
+        virq = per_cpu(ps3_ipi_virqs, cpu)[msg];
        result = ps3_send_event_locally(virq);
        if (result)
                DBG("%s:%d: ps3_send_event_locally(%d, %d) failed"
-                        " (%d)\n", __func__, __LINE__, target, msg, result);
+                        " (%d)\n", __func__, __LINE__, cpu, msg, result);
-}
-static void ps3_smp_message_pass(int target, int msg)
-{
-        int cpu;
-        if (target < NR_CPUS)
-                do_message_pass(target, msg);
-        else if (target == MSG_ALL_BUT_SELF) {
-                for_each_online_cpu(cpu)
-                        if (cpu != smp_processor_id())
-                                do_message_pass(cpu, msg);
-        } else {
-                for_each_online_cpu(cpu)
-                        do_message_pass(cpu, msg);
-        }
 }
 static int ps3_smp_probe(void)
diff --git a/arch/powerpc/platforms/ps3/spu.c b/arch/powerpc/platforms/ps3/spu.c
index 39a472e9e80f..375a9f92158d 100644
--- a/arch/powerpc/platforms/ps3/spu.c
+++ b/arch/powerpc/platforms/ps3/spu.c
@@ -197,7 +197,7 @@ static void spu_unmap(struct spu *spu)
 * The current HV requires the spu shadow regs to be mapped with the
 * PTE page protection bits set as read-only (PP=3).  This implementation
 * uses the low level __ioremap() to bypass the page protection settings
- * inforced by ioremap_flags() to get the needed PTE bits set for the
+ * inforced by ioremap_prot() to get the needed PTE bits set for the
 * shadow regs.
 */
@@ -214,7 +214,7 @@ static int __init setup_areas(struct spu *spu)
                goto fail_ioremap;
        }
-        spu->local_store = (__force void *)ioremap_flags(spu->local_store_phys,
+        spu->local_store = (__force void *)ioremap_prot(spu->local_store_phys,
                LS_SIZE, _PAGE_NO_CACHE);
        if (!spu->local_store) {
diff --git a/arch/powerpc/platforms/pseries/Kconfig b/arch/powerpc/platforms/pseries/Kconfig
index c667f0f02c34..71af4c5d6c05 100644
--- a/arch/powerpc/platforms/pseries/Kconfig
+++ b/arch/powerpc/platforms/pseries/Kconfig
@@ -3,14 +3,17 @@ config PPC_PSERIES
        bool "IBM pSeries & new (POWER5-based) iSeries"
        select MPIC
        select PCI_MSI
-        select XICS
+        select PPC_XICS
+        select PPC_ICP_NATIVE
+        select PPC_ICP_HV
+        select PPC_ICS_RTAS
        select PPC_I8259
        select PPC_RTAS
        select PPC_RTAS_DAEMON
        select RTAS_ERROR_LOGGING
        select PPC_UDBG_16550
        select PPC_NATIVE
-        select PPC_PCI_CHOICE if EMBEDDED
+        select PPC_PCI_CHOICE if EXPERT
        default y
 config PPC_SPLPAR
@@ -24,19 +27,47 @@ config PPC_SPLPAR
          two or more partitions.
 config EEH
-        bool "PCI Extended Error Handling (EEH)" if EMBEDDED
+        bool "PCI Extended Error Handling (EEH)" if EXPERT
        depends on PPC_PSERIES && PCI
-        default y if !EMBEDDED
+        default y if !EXPERT
 config PSERIES_MSI
       bool
       depends on PCI_MSI && EEH
       default y
+config PSERIES_ENERGY
+        tristate "pSeries energy management capabilities driver"
+        depends on PPC_PSERIES
+        default y
+        help
+          Provides interface to platform energy management capabilities
+          on supported PSERIES platforms.
+          Provides: /sys/devices/system/cpu/pseries_(de)activation_hint_list
+          and /sys/devices/system/cpu/cpuN/pseries_(de)activation_hint
 config SCANLOG
        tristate "Scanlog dump interface"
        depends on RTAS_PROC && PPC_PSERIES
+config IO_EVENT_IRQ
+        bool "IO Event Interrupt support"
+        depends on PPC_PSERIES
+        default y
+        help
+          Select this option, if you want to enable support for IO Event
+          interrupts. IO event interrupt is a mechanism provided by RTAS
+          to return information about hardware error and non-error events
+          which may need OS attention. RTAS returns events for multiple
+          event types and scopes. Device drivers can register their handlers
+          to receive events.
+          This option will only enable the IO event platform code. You
+          will still need to enable or compile the actual drivers
+          that use this infrastruture to handle IO event interrupts.
+          Say Y if you are unsure.
 config LPARCFG
        bool "LPAR Configuration Data"
        depends on PPC_PSERIES || PPC_ISERIES
@@ -47,6 +78,12 @@ config LPARCFG
 config PPC_PSERIES_DEBUG
        depends on PPC_PSERIES && PPC_EARLY_DEBUG
        bool "Enable extra debug logging in platforms/pseries"
+        help
+          Say Y here if you want the pseries core to produce a bunch of
+          debug messages to the system log. Select this if you are having a
+          problem with the pseries core and want to see more of what is
+          going on. This does not enable debugging in lpar.c, which must
+          be manually done due to its verbosity.
        default y
 config PPC_SMLPAR
diff --git a/arch/powerpc/platforms/pseries/Makefile b/arch/powerpc/platforms/pseries/Makefile
index 046ace9c4381..3556e402cbf5 100644
--- a/arch/powerpc/platforms/pseries/Makefile
+++ b/arch/powerpc/platforms/pseries/Makefile
@@ -1,21 +1,16 @@
-ifeq ($(CONFIG_PPC64),y)
+ccflags-$(CONFIG_PPC64)                 := -mno-minimal-toc
-EXTRA_CFLAGS            += -mno-minimal-toc
+ccflags-$(CONFIG_PPC_PSERIES_DEBUG)     += -DDEBUG
-endif
-ifeq ($(CONFIG_PPC_PSERIES_DEBUG),y)
-EXTRA_CFLAGS            += -DDEBUG
-endif
 obj-y                   := lpar.o hvCall.o nvram.o reconfig.o \
                           setup.o iommu.o event_sources.o ras.o \
-                           firmware.o power.o dlpar.o
+                           firmware.o power.o dlpar.o mobility.o
 obj-$(CONFIG_SMP)       += smp.o
-obj-$(CONFIG_XICS)      += xics.o
 obj-$(CONFIG_SCANLOG)   += scanlog.o
 obj-$(CONFIG_EEH)       += eeh.o eeh_cache.o eeh_driver.o eeh_event.o eeh_sysfs.o
 obj-$(CONFIG_KEXEC)     += kexec.o
 obj-$(CONFIG_PCI)       += pci.o pci_dlpar.o
 obj-$(CONFIG_PSERIES_MSI)       += msi.o
+obj-$(CONFIG_PSERIES_ENERGY)    += pseries_energy.o
 obj-$(CONFIG_HOTPLUG_CPU)       += hotplug-cpu.o
 obj-$(CONFIG_MEMORY_HOTPLUG)    += hotplug-memory.o
@@ -23,9 +18,10 @@ obj-$(CONFIG_MEMORY_HOTPLUG)	+= hotplug-memory.o
 obj-$(CONFIG_HVC_CONSOLE)       += hvconsole.o
 obj-$(CONFIG_HVCS)              += hvcserver.o
 obj-$(CONFIG_HCALL_STATS)       += hvCall_inst.o
-obj-$(CONFIG_PHYP_DUMP) += phyp_dump.o
+obj-$(CONFIG_PHYP_DUMP)         += phyp_dump.o
 obj-$(CONFIG_CMM)               += cmm.o
 obj-$(CONFIG_DTL)               += dtl.o
+obj-$(CONFIG_IO_EVENT_IRQ)      += io_event_irq.o
 ifeq ($(CONFIG_PPC_PSERIES),y)
 obj-$(CONFIG_SUSPEND)           += suspend.o
diff --git a/arch/powerpc/platforms/pseries/cmm.c b/arch/powerpc/platforms/pseries/cmm.c
index f4803868642c..3cafc306b971 100644
--- a/arch/powerpc/platforms/pseries/cmm.c
+++ b/arch/powerpc/platforms/pseries/cmm.c
@@ -508,12 +508,7 @@ static int cmm_memory_isolate_cb(struct notifier_block *self,
        if (action == MEM_ISOLATE_COUNT)
                ret = cmm_count_pages(arg);
-        if (ret)
+        return notifier_from_errno(ret);
-                ret = notifier_from_errno(ret);
-        else
-                ret = NOTIFY_OK;
-        return ret;
 }
 static struct notifier_block cmm_mem_isolate_nb = {
@@ -635,12 +630,7 @@ static int cmm_memory_cb(struct notifier_block *self,
                break;
        }
-        if (ret)
+        return notifier_from_errno(ret);
-                ret = notifier_from_errno(ret);
-        else
-                ret = NOTIFY_OK;
-        return ret;
 }
 static struct notifier_block cmm_mem_nb = {
diff --git a/arch/powerpc/platforms/pseries/dlpar.c b/arch/powerpc/platforms/pseries/dlpar.c
index 72d8054fa739..57ceb92b2288 100644
--- a/arch/powerpc/platforms/pseries/dlpar.c
+++ b/arch/powerpc/platforms/pseries/dlpar.c
@@ -33,7 +33,7 @@ struct cc_workarea {
        u32     prop_offset;
 };
-static void dlpar_free_cc_property(struct property *prop)
+void dlpar_free_cc_property(struct property *prop)
 {
        kfree(prop->name);
        kfree(prop->value);
@@ -55,13 +55,12 @@ static struct property *dlpar_parse_cc_property(struct cc_workarea *ccwa)
        prop->length = ccwa->prop_length;
        value = (char *)ccwa + ccwa->prop_offset;
-        prop->value = kzalloc(prop->length, GFP_KERNEL);
+        prop->value = kmemdup(value, prop->length, GFP_KERNEL);
        if (!prop->value) {
                dlpar_free_cc_property(prop);
                return NULL;
        }
-        memcpy(prop->value, value, prop->length);
        return prop;
 }
@@ -75,7 +74,7 @@ static struct device_node *dlpar_parse_cc_node(struct cc_workarea *ccwa)
                return NULL;
        /* The configure connector reported name does not contain a
-         * preceeding '/', so we allocate a buffer large enough to
+         * preceding '/', so we allocate a buffer large enough to
         * prepend this to the full_name.
         */
        name = (char *)ccwa + ccwa->name_offset;
@@ -102,7 +101,7 @@ static void dlpar_free_one_cc_node(struct device_node *dn)
        kfree(dn);
 }
-static void dlpar_free_cc_nodes(struct device_node *dn)
+void dlpar_free_cc_nodes(struct device_node *dn)
 {
        if (dn->child)
                dlpar_free_cc_nodes(dn->child);
diff --git a/arch/powerpc/platforms/pseries/dtl.c b/arch/powerpc/platforms/pseries/dtl.c
index a00addb55945..e9190073bb97 100644
--- a/arch/powerpc/platforms/pseries/dtl.c
+++ b/arch/powerpc/platforms/pseries/dtl.c
@@ -23,37 +23,22 @@
 #include <linux/init.h>
 #include <linux/slab.h>
 #include <linux/debugfs.h>
+#include <linux/spinlock.h>
 #include <asm/smp.h>
 #include <asm/system.h>
 #include <asm/uaccess.h>
 #include <asm/firmware.h>
+#include <asm/lppaca.h>
 #include "plpar_wrappers.h"
-/*
- * Layout of entries in the hypervisor's DTL buffer. Although we don't
- * actually access the internals of an entry (we only need to know the size),
- * we might as well define it here for reference.
- */
-struct dtl_entry {
-        u8      dispatch_reason;
-        u8      preempt_reason;
-        u16     processor_id;
-        u32     enqueue_to_dispatch_time;
-        u32     ready_to_enqueue_time;
-        u32     waiting_to_ready_time;
-        u64     timebase;
-        u64     fault_addr;
-        u64     srr0;
-        u64     srr1;
-};
 struct dtl {
        struct dtl_entry        *buf;
        struct dentry           *file;
        int                     cpu;
        int                     buf_entries;
        u64                     last_idx;
+        spinlock_t              lock;
 };
 static DEFINE_PER_CPU(struct dtl, cpu_dtl);
@@ -67,34 +52,106 @@ static u8 dtl_event_mask = 0x7;
 /*
- * Size of per-cpu log buffers. Default is just under 16 pages worth.
+ * Size of per-cpu log buffers. Firmware requires that the buffer does
+ * not cross a 4k boundary.
 */
-static int dtl_buf_entries = (16 * 85);
+static int dtl_buf_entries = N_DISPATCH_LOG;
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+struct dtl_ring {
+        u64     write_index;
+        struct dtl_entry *write_ptr;
+        struct dtl_entry *buf;
+        struct dtl_entry *buf_end;
+        u8      saved_dtl_mask;
+};
+static DEFINE_PER_CPU(struct dtl_ring, dtl_rings);
-static int dtl_enable(struct dtl *dtl)
+static atomic_t dtl_count;
+/*
+ * The cpu accounting code controls the DTL ring buffer, and we get
+ * given entries as they are processed.
+ */
+static void consume_dtle(struct dtl_entry *dtle, u64 index)
 {
-        unsigned long addr;
+        struct dtl_ring *dtlr = &__get_cpu_var(dtl_rings);
-        int ret, hwcpu;
+        struct dtl_entry *wp = dtlr->write_ptr;
+        struct lppaca *vpa = local_paca->lppaca_ptr;
-        /* only allow one reader */
+        if (!wp)
-        if (dtl->buf)
+                return;
-                return -EBUSY;
-        /* we need to store the original allocation size for use during read */
+        *wp = *dtle;
-        dtl->buf_entries = dtl_buf_entries;
+        barrier();
-        dtl->buf = kmalloc_node(dtl->buf_entries * sizeof(struct dtl_entry),
+        /* check for hypervisor ring buffer overflow, ignore this entry if so */
-                        GFP_KERNEL, cpu_to_node(dtl->cpu));
+        if (index + N_DISPATCH_LOG < vpa->dtl_idx)
-        if (!dtl->buf) {
+                return;
-                printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n",
-                                __func__, dtl->cpu);
+        ++wp;
-                return -ENOMEM;
+        if (wp == dtlr->buf_end)
-        }
+                wp = dtlr->buf;
+        dtlr->write_ptr = wp;
+        /* incrementing write_index makes the new entry visible */
+        smp_wmb();
+        ++dtlr->write_index;
+}
+static int dtl_start(struct dtl *dtl)
+{
+        struct dtl_ring *dtlr = &per_cpu(dtl_rings, dtl->cpu);
+        dtlr->buf = dtl->buf;
+        dtlr->buf_end = dtl->buf + dtl->buf_entries;
+        dtlr->write_index = 0;
+        /* setting write_ptr enables logging into our buffer */
+        smp_wmb();
+        dtlr->write_ptr = dtl->buf;
+        /* enable event logging */
+        dtlr->saved_dtl_mask = lppaca_of(dtl->cpu).dtl_enable_mask;
+        lppaca_of(dtl->cpu).dtl_enable_mask |= dtl_event_mask;
+        dtl_consumer = consume_dtle;
+        atomic_inc(&dtl_count);
+        return 0;
+}
+static void dtl_stop(struct dtl *dtl)
+{
+        struct dtl_ring *dtlr = &per_cpu(dtl_rings, dtl->cpu);
+        dtlr->write_ptr = NULL;
+        smp_wmb();
+        dtlr->buf = NULL;
+        /* restore dtl_enable_mask */
+        lppaca_of(dtl->cpu).dtl_enable_mask = dtlr->saved_dtl_mask;
+        if (atomic_dec_and_test(&dtl_count))
+                dtl_consumer = NULL;
+}
+static u64 dtl_current_index(struct dtl *dtl)
+{
+        return per_cpu(dtl_rings, dtl->cpu).write_index;
+}
+#else /* CONFIG_VIRT_CPU_ACCOUNTING */
+static int dtl_start(struct dtl *dtl)
+{
+        unsigned long addr;
+        int ret, hwcpu;
        /* Register our dtl buffer with the hypervisor. The HV expects the
         * buffer size to be passed in the second word of the buffer */
-        ((u32 *)dtl->buf)[1] = dtl->buf_entries * sizeof(struct dtl_entry);
+        ((u32 *)dtl->buf)[1] = DISPATCH_LOG_BYTES;
        hwcpu = get_hard_smp_processor_id(dtl->cpu);
        addr = __pa(dtl->buf);
@@ -102,34 +159,84 @@ static int dtl_enable(struct dtl *dtl)
        if (ret) {
                printk(KERN_WARNING "%s: DTL registration for cpu %d (hw %d) "
                       "failed with %d\n", __func__, dtl->cpu, hwcpu, ret);
-                kfree(dtl->buf);
                return -EIO;
        }
        /* set our initial buffer indices */
-        dtl->last_idx = lppaca[dtl->cpu].dtl_idx = 0;
+        lppaca_of(dtl->cpu).dtl_idx = 0;
        /* ensure that our updates to the lppaca fields have occurred before
         * we actually enable the logging */
        smp_wmb();
        /* enable event logging */
-        lppaca[dtl->cpu].dtl_enable_mask = dtl_event_mask;
+        lppaca_of(dtl->cpu).dtl_enable_mask = dtl_event_mask;
        return 0;
 }
-static void dtl_disable(struct dtl *dtl)
+static void dtl_stop(struct dtl *dtl)
 {
        int hwcpu = get_hard_smp_processor_id(dtl->cpu);
-        lppaca[dtl->cpu].dtl_enable_mask = 0x0;
+        lppaca_of(dtl->cpu).dtl_enable_mask = 0x0;
        unregister_dtl(hwcpu, __pa(dtl->buf));
+}
+static u64 dtl_current_index(struct dtl *dtl)
+{
+        return lppaca_of(dtl->cpu).dtl_idx;
+}
+#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
+static int dtl_enable(struct dtl *dtl)
+{
+        long int n_entries;
+        long int rc;
+        struct dtl_entry *buf = NULL;
+        if (!dtl_cache)
+                return -ENOMEM;
+        /* only allow one reader */
+        if (dtl->buf)
+                return -EBUSY;
+        n_entries = dtl_buf_entries;
+        buf = kmem_cache_alloc_node(dtl_cache, GFP_KERNEL, cpu_to_node(dtl->cpu));
+        if (!buf) {
+                printk(KERN_WARNING "%s: buffer alloc failed for cpu %d\n",
+                                __func__, dtl->cpu);
+                return -ENOMEM;
+        }
-        kfree(dtl->buf);
+        spin_lock(&dtl->lock);
+        rc = -EBUSY;
+        if (!dtl->buf) {
+                /* store the original allocation size for use during read */
+                dtl->buf_entries = n_entries;
+                dtl->buf = buf;
+                dtl->last_idx = 0;
+                rc = dtl_start(dtl);
+                if (rc)
+                        dtl->buf = NULL;
+        }
+        spin_unlock(&dtl->lock);
+        if (rc)
+                kmem_cache_free(dtl_cache, buf);
+        return rc;
+}
+static void dtl_disable(struct dtl *dtl)
+{
+        spin_lock(&dtl->lock);
+        dtl_stop(dtl);
+        kmem_cache_free(dtl_cache, dtl->buf);
        dtl->buf = NULL;
        dtl->buf_entries = 0;
+        spin_unlock(&dtl->lock);
 }
 /* file interface */
@@ -157,8 +264,9 @@ static int dtl_file_release(struct inode *inode, struct file *filp)
 static ssize_t dtl_file_read(struct file *filp, char __user *buf, size_t len,
                loff_t *pos)
 {
-        int rc, cur_idx, last_idx, n_read, n_req, read_size;
+        long int rc, n_read, n_req, read_size;
        struct dtl *dtl;
+        u64 cur_idx, last_idx, i;
        if ((len % sizeof(struct dtl_entry)) != 0)
                return -EINVAL;
@@ -171,41 +279,48 @@ static ssize_t dtl_file_read(struct file *filp, char __user *buf, size_t len,
        /* actual number of entries read */
        n_read = 0;
-        cur_idx = lppaca[dtl->cpu].dtl_idx;
+        spin_lock(&dtl->lock);
+        cur_idx = dtl_current_index(dtl);
        last_idx = dtl->last_idx;
-        if (cur_idx - last_idx > dtl->buf_entries) {
+        if (last_idx + dtl->buf_entries <= cur_idx)
-                pr_debug("%s: hv buffer overflow for cpu %d, samples lost\n",
+                last_idx = cur_idx - dtl->buf_entries + 1;
-                                __func__, dtl->cpu);
-        }
+        if (last_idx + n_req > cur_idx)
+                n_req = cur_idx - last_idx;
+        if (n_req > 0)
+                dtl->last_idx = last_idx + n_req;
+        spin_unlock(&dtl->lock);
+        if (n_req <= 0)
+                return 0;
-        cur_idx  %= dtl->buf_entries;
+        i = last_idx % dtl->buf_entries;
-        last_idx %= dtl->buf_entries;
        /* read the tail of the buffer if we've wrapped */
-        if (last_idx > cur_idx) {
+        if (i + n_req > dtl->buf_entries) {
-                read_size = min(n_req, dtl->buf_entries - last_idx);
+                read_size = dtl->buf_entries - i;
-                rc = copy_to_user(buf, &dtl->buf[last_idx],
+                rc = copy_to_user(buf, &dtl->buf[i],
                                read_size * sizeof(struct dtl_entry));
                if (rc)
                        return -EFAULT;
-                last_idx = 0;
+                i = 0;
                n_req -= read_size;
                n_read += read_size;
                buf += read_size * sizeof(struct dtl_entry);
        }
        /* .. and now the head */
-        read_size = min(n_req, cur_idx - last_idx);
+        rc = copy_to_user(buf, &dtl->buf[i], n_req * sizeof(struct dtl_entry));
-        rc = copy_to_user(buf, &dtl->buf[last_idx],
-                        read_size * sizeof(struct dtl_entry));
        if (rc)
                return -EFAULT;
-        n_read += read_size;
+        n_read += n_req;
-        dtl->last_idx += n_read;
        return n_read * sizeof(struct dtl_entry);
 }
@@ -252,7 +367,7 @@ static int dtl_init(void)
        event_mask_file = debugfs_create_x8("dtl_event_mask", 0600,
                                dtl_dir, &dtl_event_mask);
-        buf_entries_file = debugfs_create_u32("dtl_buf_entries", 0600,
+        buf_entries_file = debugfs_create_u32("dtl_buf_entries", 0400,
                                dtl_dir, &dtl_buf_entries);
        if (!event_mask_file || !buf_entries_file) {
@@ -263,6 +378,7 @@ static int dtl_init(void)
        /* set up the per-cpu log structures */
        for_each_possible_cpu(i) {
                struct dtl *dtl = &per_cpu(cpu_dtl, i);
+                spin_lock_init(&dtl->lock);
                dtl->cpu = i;
                rc = dtl_setup_file(dtl);
diff --git a/arch/powerpc/platforms/pseries/eeh.c b/arch/powerpc/platforms/pseries/eeh.c
index 34b7dc12e731..46b55cf563e3 100644
--- a/arch/powerpc/platforms/pseries/eeh.c
+++ b/arch/powerpc/platforms/pseries/eeh.c
@@ -21,8 +21,6 @@
 * Please address comments and feedback to Linas Vepstas <linas@austin.ibm.com>
 */
-#undef DEBUG
 #include <linux/delay.h>
 #include <linux/init.h>
 #include <linux/list.h>
@@ -67,7 +65,7 @@
 *  with EEH.
 *
 *  Ideally, a PCI device driver, when suspecting that an isolation
- *  event has occured (e.g. by reading 0xff's), will then ask EEH
+ *  event has occurred (e.g. by reading 0xff's), will then ask EEH
 *  whether this is the case, and then take appropriate steps to
 *  reset the PCI slot, the PCI device, and then resume operations.
 *  However, until that day,  the checking is done here, with the
@@ -95,6 +93,7 @@ static int ibm_slot_error_detail;
 static int ibm_get_config_addr_info;
 static int ibm_get_config_addr_info2;
 static int ibm_configure_bridge;
+static int ibm_configure_pe;
 int eeh_subsystem_enabled;
 EXPORT_SYMBOL(eeh_subsystem_enabled);
@@ -263,6 +262,8 @@ void eeh_slot_error_detail(struct pci_dn *pdn, int severity)
        pci_regs_buf[0] = 0;
        rtas_pci_enable(pdn, EEH_THAW_MMIO);
+        rtas_configure_bridge(pdn);
+        eeh_restore_bars(pdn);
        loglen = gather_pci_data(pdn, pci_regs_buf, EEH_PCI_REGS_LOG_LEN);
        rtas_slot_error_detail(pdn, severity, pci_regs_buf, loglen);
@@ -450,6 +451,39 @@ void eeh_clear_slot (struct device_node *dn, int mode_flag)
        raw_spin_unlock_irqrestore(&confirm_error_lock, flags);
 }
+void __eeh_set_pe_freset(struct device_node *parent, unsigned int *freset)
+{
+        struct device_node *dn;
+        for_each_child_of_node(parent, dn) {
+                if (PCI_DN(dn)) {
+                        struct pci_dev *dev = PCI_DN(dn)->pcidev;
+                        if (dev && dev->driver)
+                                *freset |= dev->needs_freset;
+                        __eeh_set_pe_freset(dn, freset);
+                }
+        }
+}
+void eeh_set_pe_freset(struct device_node *dn, unsigned int *freset)
+{
+        struct pci_dev *dev;
+        dn = find_device_pe(dn);
+        /* Back up one, since config addrs might be shared */
+        if (!pcibios_find_pci_bus(dn) && PCI_DN(dn->parent))
+                dn = dn->parent;
+        dev = PCI_DN(dn)->pcidev;
+        if (dev)
+                *freset |= dev->needs_freset;
+        __eeh_set_pe_freset(dn, freset);
+}
 /**
 * eeh_dn_check_failure - check if all 1's data is due to EEH slot freeze
 * @dn device node
@@ -694,15 +728,24 @@ rtas_pci_slot_reset(struct pci_dn *pdn, int state)
        if (pdn->eeh_pe_config_addr)
                config_addr = pdn->eeh_pe_config_addr;
-        rc = rtas_call(ibm_set_slot_reset,4,1, NULL,
+        rc = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
                       config_addr,
                       BUID_HI(pdn->phb->buid),
                       BUID_LO(pdn->phb->buid),
                       state);
-        if (rc)
-                printk (KERN_WARNING "EEH: Unable to reset the failed slot,"
+        /* Fundamental-reset not supported on this PE, try hot-reset */
-                        " (%d) #RST=%d dn=%s\n",
+        if (rc == -8 && state == 3) {
-                        rc, state, pdn->node->full_name);
+                rc = rtas_call(ibm_set_slot_reset, 4, 1, NULL,
+                               config_addr,
+                               BUID_HI(pdn->phb->buid),
+                               BUID_LO(pdn->phb->buid), 1);
+                if (rc)
+                        printk(KERN_WARNING
+                                "EEH: Unable to reset the failed slot,"
+                                " #RST=%d dn=%s\n",
+                                rc, pdn->node->full_name);
+        }
 }
 /**
@@ -738,18 +781,21 @@ int pcibios_set_pcie_reset_state(struct pci_dev *dev, enum pcie_reset_state stat
 /**
 * rtas_set_slot_reset -- assert the pci #RST line for 1/4 second
 * @pdn: pci device node to be reset.
- *
- *  Return 0 if success, else a non-zero value.
 */
 static void __rtas_set_slot_reset(struct pci_dn *pdn)
 {
-        struct pci_dev *dev = pdn->pcidev;
+        unsigned int freset = 0;
-        /* Determine type of EEH reset required by device,
+        /* Determine type of EEH reset required for
-         * default hot reset or fundamental reset
+         * Partitionable Endpoint, a hot-reset (1)
-         */
+         * or a fundamental reset (3).
-        if (dev && dev->needs_freset)
+         * A fundamental reset required by any device under
+         * Partitionable Endpoint trumps hot-reset.
+         */
+        eeh_set_pe_freset(pdn->node, &freset);
+        if (freset)
                rtas_pci_slot_reset(pdn, 3);
        else
                rtas_pci_slot_reset(pdn, 1);
@@ -878,7 +924,7 @@ void eeh_restore_bars(struct pci_dn *pdn)
 *
 * Save the values of the device bars. Unlike the restore
 * routine, this routine is *not* recursive. This is because
- * PCI devices are added individuallly; but, for the restore,
+ * PCI devices are added individually; but, for the restore,
 * an entire slot is reset at a time.
 */
 static void eeh_save_bars(struct pci_dn *pdn)
@@ -897,13 +943,20 @@ rtas_configure_bridge(struct pci_dn *pdn)
 {
        int config_addr;
        int rc;
+        int token;
        /* Use PE configuration address, if present */
        config_addr = pdn->eeh_config_addr;
        if (pdn->eeh_pe_config_addr)
                config_addr = pdn->eeh_pe_config_addr;
-        rc = rtas_call(ibm_configure_bridge,3,1, NULL,
+        /* Use new configure-pe function, if supported */
+        if (ibm_configure_pe != RTAS_UNKNOWN_SERVICE)
+                token = ibm_configure_pe;
+        else
+                token = ibm_configure_bridge;
+        rc = rtas_call(token, 3, 1, NULL,
                       config_addr,
                       BUID_HI(pdn->phb->buid),
                       BUID_LO(pdn->phb->buid));
@@ -1079,6 +1132,7 @@ void __init eeh_init(void)
        ibm_get_config_addr_info = rtas_token("ibm,get-config-addr-info");
        ibm_get_config_addr_info2 = rtas_token("ibm,get-config-addr-info2");
        ibm_configure_bridge = rtas_token ("ibm,configure-bridge");
+        ibm_configure_pe = rtas_token("ibm,configure-pe");
        if (ibm_set_eeh_option == RTAS_UNKNOWN_SERVICE)
                return;
diff --git a/arch/powerpc/platforms/pseries/eeh_driver.c b/arch/powerpc/platforms/pseries/eeh_driver.c
index b8d70f5d9aa9..1b6cb10589e0 100644
--- a/arch/powerpc/platforms/pseries/eeh_driver.c
+++ b/arch/powerpc/platforms/pseries/eeh_driver.c
@@ -328,7 +328,7 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
        struct pci_bus *frozen_bus;
        int rc = 0;
        enum pci_ers_result result = PCI_ERS_RESULT_NONE;
-        const char *location, *pci_str, *drv_str;
+        const char *location, *pci_str, *drv_str, *bus_pci_str, *bus_drv_str;
        frozen_dn = find_device_pe(event->dn);
        if (!frozen_dn) {
@@ -364,13 +364,8 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
        frozen_pdn = PCI_DN(frozen_dn);
        frozen_pdn->eeh_freeze_count++;
-        if (frozen_pdn->pcidev) {
+        pci_str = eeh_pci_name(event->dev);
-                pci_str = pci_name (frozen_pdn->pcidev);
+        drv_str = pcid_name(event->dev);
-                drv_str = pcid_name (frozen_pdn->pcidev);
-        } else {
-                pci_str = eeh_pci_name(event->dev);
-                drv_str = pcid_name (event->dev);
-        }
        
        if (frozen_pdn->eeh_freeze_count > EEH_MAX_ALLOWED_FREEZES)
                goto excess_failures;
@@ -378,8 +373,17 @@ struct pci_dn * handle_eeh_events (struct eeh_event *event)
        printk(KERN_WARNING
           "EEH: This PCI device has failed %d times in the last hour:\n",
                frozen_pdn->eeh_freeze_count);
+        if (frozen_pdn->pcidev) {
+                bus_pci_str = pci_name(frozen_pdn->pcidev);
+                bus_drv_str = pcid_name(frozen_pdn->pcidev);
+                printk(KERN_WARNING
+                        "EEH: Bus location=%s driver=%s pci addr=%s\n",
+                        location, bus_drv_str, bus_pci_str);
+        }
        printk(KERN_WARNING
-                "EEH: location=%s driver=%s pci addr=%s\n",
+                "EEH: Device location=%s driver=%s pci addr=%s\n",
                location, drv_str, pci_str);
        /* Walk the various device drivers attached to this slot through
diff --git a/arch/powerpc/platforms/pseries/eeh_sysfs.c b/arch/powerpc/platforms/pseries/eeh_sysfs.c
index 15e13b568904..23982c7892d2 100644
--- a/arch/powerpc/platforms/pseries/eeh_sysfs.c
+++ b/arch/powerpc/platforms/pseries/eeh_sysfs.c
@@ -25,7 +25,6 @@
 #include <linux/pci.h>
 #include <asm/ppc-pci.h>
 #include <asm/pci-bridge.h>
-#include <linux/kobject.h>
 /**
 * EEH_SHOW_ATTR -- create sysfs entry for eeh statistic
diff --git a/arch/powerpc/platforms/pseries/firmware.c b/arch/powerpc/platforms/pseries/firmware.c
index 0a14d8cd314f..0b0eff0cce35 100644
--- a/arch/powerpc/platforms/pseries/firmware.c
+++ b/arch/powerpc/platforms/pseries/firmware.c
@@ -55,6 +55,7 @@ firmware_features_table[FIRMWARE_MAX_FEATURES] = {
        {FW_FEATURE_XDABR,              "hcall-xdabr"},
        {FW_FEATURE_MULTITCE,           "hcall-multi-tce"},
        {FW_FEATURE_SPLPAR,             "hcall-splpar"},
+        {FW_FEATURE_VPHN,               "hcall-vphn"},
 };
 /* Build up the firmware features bitmask using the contents of
diff --git a/arch/powerpc/platforms/pseries/hotplug-cpu.c b/arch/powerpc/platforms/pseries/hotplug-cpu.c
index fd50ccd4bac1..46f13a3c5d09 100644
--- a/arch/powerpc/platforms/pseries/hotplug-cpu.c
+++ b/arch/powerpc/platforms/pseries/hotplug-cpu.c
@@ -19,6 +19,7 @@
 */
 #include <linux/kernel.h>
+#include <linux/interrupt.h>
 #include <linux/delay.h>
 #include <linux/cpu.h>
 #include <asm/system.h>
@@ -28,7 +29,7 @@
 #include <asm/machdep.h>
 #include <asm/vdso_datapage.h>
 #include <asm/pSeries_reconfig.h>
-#include "xics.h"
+#include <asm/xics.h>
 #include "plpar_wrappers.h"
 #include "offline_states.h"
@@ -216,7 +217,7 @@ static void pseries_cpu_die(unsigned int cpu)
                       cpu, pcpu, cpu_status);
        }
-        /* Isolation and deallocation are definatly done by
+        /* Isolation and deallocation are definitely done by
         * drslot_chrp_cpu.  If they were not they would be
         * done here.  Change isolate state to Isolate and
         * change allocation-state to Unusable.
@@ -280,7 +281,7 @@ static int pseries_add_processor(struct device_node *np)
        }
        for_each_cpu(cpu, tmp) {
-                BUG_ON(cpumask_test_cpu(cpu, cpu_present_mask));
+                BUG_ON(cpu_present(cpu));
                set_cpu_present(cpu, true);
                set_hard_smp_processor_id(cpu, *intserv++);
        }
diff --git a/arch/powerpc/platforms/pseries/hotplug-memory.c b/arch/powerpc/platforms/pseries/hotplug-memory.c
index bc8803664140..9d6a8effeda2 100644
--- a/arch/powerpc/platforms/pseries/hotplug-memory.c
+++ b/arch/powerpc/platforms/pseries/hotplug-memory.c
@@ -12,11 +12,67 @@
 #include <linux/of.h>
 #include <linux/memblock.h>
 #include <linux/vmalloc.h>
+#include <linux/memory.h>
 #include <asm/firmware.h>
 #include <asm/machdep.h>
 #include <asm/pSeries_reconfig.h>
 #include <asm/sparsemem.h>
+static unsigned long get_memblock_size(void)
+{
+        struct device_node *np;
+        unsigned int memblock_size = MIN_MEMORY_BLOCK_SIZE;
+        struct resource r;
+        np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+        if (np) {
+                const __be64 *size;
+                size = of_get_property(np, "ibm,lmb-size", NULL);
+                if (size)
+                        memblock_size = be64_to_cpup(size);
+                of_node_put(np);
+        } else  if (machine_is(pseries)) {
+                /* This fallback really only applies to pseries */
+                unsigned int memzero_size = 0;
+                np = of_find_node_by_path("/memory@0");
+                if (np) {
+                        if (!of_address_to_resource(np, 0, &r))
+                                memzero_size = resource_size(&r);
+                        of_node_put(np);
+                }
+                if (memzero_size) {
+                        /* We now know the size of memory@0, use this to find
+                         * the first memoryblock and get its size.
+                         */
+                        char buf[64];
+                        sprintf(buf, "/memory@%x", memzero_size);
+                        np = of_find_node_by_path(buf);
+                        if (np) {
+                                if (!of_address_to_resource(np, 0, &r))
+                                        memblock_size = resource_size(&r);
+                                of_node_put(np);
+                        }
+                }
+        }
+        return memblock_size;
+}
+/* WARNING: This is going to override the generic definition whenever
+ * pseries is built-in regardless of what platform is active at boot
+ * time. This is fine for now as this is the only "option" and it
+ * should work everywhere. If not, we'll have to turn this into a
+ * ppc_md. callback
+ */
+unsigned long memory_block_size_bytes(void)
+{
+        return get_memblock_size();
+}
 static int pseries_remove_memblock(unsigned long base, unsigned int memblock_size)
 {
        unsigned long start, start_pfn;
@@ -127,30 +183,22 @@ static int pseries_add_memory(struct device_node *np)
 static int pseries_drconf_memory(unsigned long *base, unsigned int action)
 {
-        struct device_node *np;
+        unsigned long memblock_size;
-        const unsigned long *lmb_size;
        int rc;
-        np = of_find_node_by_path("/ibm,dynamic-reconfiguration-memory");
+        memblock_size = get_memblock_size();
-        if (!np)
+        if (!memblock_size)
                return -EINVAL;
-        lmb_size = of_get_property(np, "ibm,lmb-size", NULL);
-        if (!lmb_size) {
-                of_node_put(np);
-                return -EINVAL;
-        }
        if (action == PSERIES_DRCONF_MEM_ADD) {
-                rc = memblock_add(*base, *lmb_size);
+                rc = memblock_add(*base, memblock_size);
                rc = (rc < 0) ? -EINVAL : 0;
        } else if (action == PSERIES_DRCONF_MEM_REMOVE) {
-                rc = pseries_remove_memblock(*base, *lmb_size);
+                rc = pseries_remove_memblock(*base, memblock_size);
        } else {
                rc = -EINVAL;
        }
-        of_node_put(np);
        return rc;
 }
diff --git a/arch/powerpc/platforms/pseries/hvCall.S b/arch/powerpc/platforms/pseries/hvCall.S
index 48d20573e4de..fd05fdee576a 100644
--- a/arch/powerpc/platforms/pseries/hvCall.S
+++ b/arch/powerpc/platforms/pseries/hvCall.S
@@ -11,6 +11,7 @@
 #include <asm/processor.h>
 #include <asm/ppc_asm.h>
 #include <asm/asm-offsets.h>
+#include <asm/ptrace.h>
        
 #define STK_PARM(i)     (48 + ((i)-3)*8)
diff --git a/arch/powerpc/platforms/pseries/hvCall_inst.c b/arch/powerpc/platforms/pseries/hvCall_inst.c
index e19ff021e711..f106662f4381 100644
--- a/arch/powerpc/platforms/pseries/hvCall_inst.c
+++ b/arch/powerpc/platforms/pseries/hvCall_inst.c
@@ -55,7 +55,7 @@ static void hc_stop(struct seq_file *m, void *p)
 static int hc_show(struct seq_file *m, void *p)
 {
        unsigned long h_num = (unsigned long)p;
-        struct hcall_stats *hs = (struct hcall_stats *)m->private;
+        struct hcall_stats *hs = m->private;
        if (hs[h_num].num_calls) {
                if (cpu_has_feature(CPU_FTR_PURR))
diff --git a/arch/powerpc/platforms/pseries/io_event_irq.c b/arch/powerpc/platforms/pseries/io_event_irq.c
new file mode 100644
index 000000000000..c829e6067d54
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/io_event_irq.c
@@ -0,0 +1,231 @@
+/*
+ * Copyright 2010 2011 Mark Nelson and Tseng-Hui (Frank) Lin, IBM Corporation
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/errno.h>
+#include <linux/slab.h>
+#include <linux/module.h>
+#include <linux/irq.h>
+#include <linux/interrupt.h>
+#include <linux/of.h>
+#include <linux/list.h>
+#include <linux/notifier.h>
+#include <asm/machdep.h>
+#include <asm/rtas.h>
+#include <asm/irq.h>
+#include <asm/io_event_irq.h>
+#include "pseries.h"
+/*
+ * IO event interrupt is a mechanism provided by RTAS to return
+ * information about hardware error and non-error events. Device
+ * drivers can register their event handlers to receive events.
+ * Device drivers are expected to use atomic_notifier_chain_register()
+ * and atomic_notifier_chain_unregister() to register and unregister
+ * their event handlers. Since multiple IO event types and scopes
+ * share an IO event interrupt, the event handlers are called one
+ * by one until the IO event is claimed by one of the handlers.
+ * The event handlers are expected to return NOTIFY_OK if the
+ * event is handled by the event handler or NOTIFY_DONE if the
+ * event does not belong to the handler.
+ *
+ * Usage:
+ *
+ * Notifier function:
+ * #include <asm/io_event_irq.h>
+ * int event_handler(struct notifier_block *nb, unsigned long val, void *data) {
+ *      p = (struct pseries_io_event_sect_data *) data;
+ *      if (! is_my_event(p->scope, p->event_type)) return NOTIFY_DONE;
+ *              :
+ *              :
+ *      return NOTIFY_OK;
+ * }
+ * struct notifier_block event_nb = {
+ *      .notifier_call = event_handler,
+ * }
+ *
+ * Registration:
+ * atomic_notifier_chain_register(&pseries_ioei_notifier_list, &event_nb);
+ *
+ * Unregistration:
+ * atomic_notifier_chain_unregister(&pseries_ioei_notifier_list, &event_nb);
+ */
+ATOMIC_NOTIFIER_HEAD(pseries_ioei_notifier_list);
+EXPORT_SYMBOL_GPL(pseries_ioei_notifier_list);
+static int ioei_check_exception_token;
+/* pSeries event log format */
+/* Two bytes ASCII section IDs */
+#define PSERIES_ELOG_SECT_ID_PRIV_HDR           (('P' << 8) | 'H')
+#define PSERIES_ELOG_SECT_ID_USER_HDR           (('U' << 8) | 'H')
+#define PSERIES_ELOG_SECT_ID_PRIMARY_SRC        (('P' << 8) | 'S')
+#define PSERIES_ELOG_SECT_ID_EXTENDED_UH        (('E' << 8) | 'H')
+#define PSERIES_ELOG_SECT_ID_FAILING_MTMS       (('M' << 8) | 'T')
+#define PSERIES_ELOG_SECT_ID_SECONDARY_SRC      (('S' << 8) | 'S')
+#define PSERIES_ELOG_SECT_ID_DUMP_LOCATOR       (('D' << 8) | 'H')
+#define PSERIES_ELOG_SECT_ID_FW_ERROR           (('S' << 8) | 'W')
+#define PSERIES_ELOG_SECT_ID_IMPACT_PART_ID     (('L' << 8) | 'P')
+#define PSERIES_ELOG_SECT_ID_LOGIC_RESOURCE_ID  (('L' << 8) | 'R')
+#define PSERIES_ELOG_SECT_ID_HMC_ID             (('H' << 8) | 'M')
+#define PSERIES_ELOG_SECT_ID_EPOW               (('E' << 8) | 'P')
+#define PSERIES_ELOG_SECT_ID_IO_EVENT           (('I' << 8) | 'E')
+#define PSERIES_ELOG_SECT_ID_MANUFACT_INFO      (('M' << 8) | 'I')
+#define PSERIES_ELOG_SECT_ID_CALL_HOME          (('C' << 8) | 'H')
+#define PSERIES_ELOG_SECT_ID_USER_DEF           (('U' << 8) | 'D')
+/* Vendor specific Platform Event Log Format, Version 6, section header */
+struct pseries_elog_section {
+        uint16_t id;                    /* 0x00 2-byte ASCII section ID */
+        uint16_t length;                /* 0x02 Section length in bytes */
+        uint8_t version;                /* 0x04 Section version         */
+        uint8_t subtype;                /* 0x05 Section subtype         */
+        uint16_t creator_component;     /* 0x06 Creator component ID    */
+        uint8_t data[];                 /* 0x08 Start of section data   */
+};
+static char ioei_rtas_buf[RTAS_DATA_BUF_SIZE] __cacheline_aligned;
+/**
+ * Find data portion of a specific section in RTAS extended event log.
+ * @elog: RTAS error/event log.
+ * @sect_id: secsion ID.
+ *
+ * Return:
+ *      pointer to the section data of the specified section
+ *      NULL if not found
+ */
+static struct pseries_elog_section *find_xelog_section(struct rtas_error_log *elog,
+                                                       uint16_t sect_id)
+{
+        struct rtas_ext_event_log_v6 *xelog =
+                (struct rtas_ext_event_log_v6 *) elog->buffer;
+        struct pseries_elog_section *sect;
+        unsigned char *p, *log_end;
+        /* Check that we understand the format */
+        if (elog->extended_log_length < sizeof(struct rtas_ext_event_log_v6) ||
+            xelog->log_format != RTAS_V6EXT_LOG_FORMAT_EVENT_LOG ||
+            xelog->company_id != RTAS_V6EXT_COMPANY_ID_IBM)
+                return NULL;
+        log_end = elog->buffer + elog->extended_log_length;
+        p = xelog->vendor_log;
+        while (p < log_end) {
+                sect = (struct pseries_elog_section *)p;
+                if (sect->id == sect_id)
+                        return sect;
+                p += sect->length;
+        }
+        return NULL;
+}
+/**
+ * Find the data portion of an IO Event section from event log.
+ * @elog: RTAS error/event log.
+ *
+ * Return:
+ *      pointer to a valid IO event section data. NULL if not found.
+ */
+static struct pseries_io_event * ioei_find_event(struct rtas_error_log *elog)
+{
+        struct pseries_elog_section *sect;
+        /* We should only ever get called for io-event interrupts, but if
+         * we do get called for another type then something went wrong so
+         * make some noise about it.
+         * RTAS_TYPE_IO only exists in extended event log version 6 or later.
+         * No need to check event log version.
+         */
+        if (unlikely(elog->type != RTAS_TYPE_IO)) {
+                printk_once(KERN_WARNING "io_event_irq: Unexpected event type %d",
+                            elog->type);
+                return NULL;
+        }
+        sect = find_xelog_section(elog, PSERIES_ELOG_SECT_ID_IO_EVENT);
+        if (unlikely(!sect)) {
+                printk_once(KERN_WARNING "io_event_irq: RTAS extended event "
+                            "log does not contain an IO Event section. "
+                            "Could be a bug in system firmware!\n");
+                return NULL;
+        }
+        return (struct pseries_io_event *) &sect->data;
+}
+/*
+ * PAPR:
+ * - check-exception returns the first found error or event and clear that
+ *   error or event so it is reported once.
+ * - Each interrupt returns one event. If a plateform chooses to report
+ *   multiple events through a single interrupt, it must ensure that the
+ *   interrupt remains asserted until check-exception has been used to
+ *   process all out-standing events for that interrupt.
+ *
+ * Implementation notes:
+ * - Events must be processed in the order they are returned. Hence,
+ *   sequential in nature.
+ * - The owner of an event is determined by combinations of scope,
+ *   event type, and sub-type. There is no easy way to pre-sort clients
+ *   by scope or event type alone. For example, Torrent ISR route change
+ *   event is reported with scope 0x00 (Not Applicatable) rather than
+ *   0x3B (Torrent-hub). It is better to let the clients to identify
+ *   who owns the the event.
+ */
+static irqreturn_t ioei_interrupt(int irq, void *dev_id)
+{
+        struct pseries_io_event *event;
+        int rtas_rc;
+        for (;;) {
+                rtas_rc = rtas_call(ioei_check_exception_token, 6, 1, NULL,
+                                    RTAS_VECTOR_EXTERNAL_INTERRUPT,
+                                    virq_to_hw(irq),
+                                    RTAS_IO_EVENTS, 1 /* Time Critical */,
+                                    __pa(ioei_rtas_buf),
+                                    RTAS_DATA_BUF_SIZE);
+                if (rtas_rc != 0)
+                        break;
+                event = ioei_find_event((struct rtas_error_log *)ioei_rtas_buf);
+                if (!event)
+                        continue;
+                atomic_notifier_call_chain(&pseries_ioei_notifier_list,
+                                           0, event);
+        }
+        return IRQ_HANDLED;
+}
+static int __init ioei_init(void)
+{
+        struct device_node *np;
+        ioei_check_exception_token = rtas_token("check-exception");
+        if (ioei_check_exception_token == RTAS_UNKNOWN_SERVICE) {
+                pr_warning("IO Event IRQ not supported on this system !\n");
+                return -ENODEV;
+        }
+        np = of_find_node_by_path("/event-sources/ibm,io-events");
+        if (np) {
+                request_event_sources_irqs(np, ioei_interrupt, "IO_EVENT");
+                of_node_put(np);
+        } else {
+                pr_err("io_event_irq: No ibm,io-events on system! "
+                       "IO Event interrupt disabled.\n");
+                return -ENODEV;
+        }
+        return 0;
+}
+machine_subsys_initcall(pseries, ioei_init);
diff --git a/arch/powerpc/platforms/pseries/iommu.c b/arch/powerpc/platforms/pseries/iommu.c
index a77bcaed80af..01faab9456ca 100644
--- a/arch/powerpc/platforms/pseries/iommu.c
+++ b/arch/powerpc/platforms/pseries/iommu.c
@@ -33,6 +33,7 @@
 #include <linux/pci.h>
 #include <linux/dma-mapping.h>
 #include <linux/crash_dump.h>
+#include <linux/memory.h>
 #include <asm/io.h>
 #include <asm/prom.h>
 #include <asm/rtas.h>
@@ -45,6 +46,7 @@
 #include <asm/tce.h>
 #include <asm/ppc-pci.h>
 #include <asm/udbg.h>
+#include <asm/mmzone.h>
 #include "plpar_wrappers.h"
@@ -140,7 +142,7 @@ static int tce_build_pSeriesLP(struct iommu_table *tbl, long tcenum,
        return ret;
 }
-static DEFINE_PER_CPU(u64 *, tce_page) = NULL;
+static DEFINE_PER_CPU(u64 *, tce_page);
 static int tce_buildmulti_pSeriesLP(struct iommu_table *tbl, long tcenum,
                                     long npages, unsigned long uaddr,
@@ -270,6 +272,152 @@ static unsigned long tce_get_pSeriesLP(struct iommu_table *tbl, long tcenum)
        return tce_ret;
 }
+/* this is compatible with cells for the device tree property */
+struct dynamic_dma_window_prop {
+        __be32  liobn;          /* tce table number */
+        __be64  dma_base;       /* address hi,lo */
+        __be32  tce_shift;      /* ilog2(tce_page_size) */
+        __be32  window_shift;   /* ilog2(tce_window_size) */
+};
+struct direct_window {
+        struct device_node *device;
+        const struct dynamic_dma_window_prop *prop;
+        struct list_head list;
+};
+/* Dynamic DMA Window support */
+struct ddw_query_response {
+        u32 windows_available;
+        u32 largest_available_block;
+        u32 page_size;
+        u32 migration_capable;
+};
+struct ddw_create_response {
+        u32 liobn;
+        u32 addr_hi;
+        u32 addr_lo;
+};
+static LIST_HEAD(direct_window_list);
+/* prevents races between memory on/offline and window creation */
+static DEFINE_SPINLOCK(direct_window_list_lock);
+/* protects initializing window twice for same device */
+static DEFINE_MUTEX(direct_window_init_mutex);
+#define DIRECT64_PROPNAME "linux,direct64-ddr-window-info"
+static int tce_clearrange_multi_pSeriesLP(unsigned long start_pfn,
+                                        unsigned long num_pfn, const void *arg)
+{
+        const struct dynamic_dma_window_prop *maprange = arg;
+        int rc;
+        u64 tce_size, num_tce, dma_offset, next;
+        u32 tce_shift;
+        long limit;
+        tce_shift = be32_to_cpu(maprange->tce_shift);
+        tce_size = 1ULL << tce_shift;
+        next = start_pfn << PAGE_SHIFT;
+        num_tce = num_pfn << PAGE_SHIFT;
+        /* round back to the beginning of the tce page size */
+        num_tce += next & (tce_size - 1);
+        next &= ~(tce_size - 1);
+        /* covert to number of tces */
+        num_tce |= tce_size - 1;
+        num_tce >>= tce_shift;
+        do {
+                /*
+                 * Set up the page with TCE data, looping through and setting
+                 * the values.
+                 */
+                limit = min_t(long, num_tce, 512);
+                dma_offset = next + be64_to_cpu(maprange->dma_base);
+                rc = plpar_tce_stuff((u64)be32_to_cpu(maprange->liobn),
+                                             dma_offset,
+                                             0, limit);
+                num_tce -= limit;
+        } while (num_tce > 0 && !rc);
+        return rc;
+}
+static int tce_setrange_multi_pSeriesLP(unsigned long start_pfn,
+                                        unsigned long num_pfn, const void *arg)
+{
+        const struct dynamic_dma_window_prop *maprange = arg;
+        u64 *tcep, tce_size, num_tce, dma_offset, next, proto_tce, liobn;
+        u32 tce_shift;
+        u64 rc = 0;
+        long l, limit;
+        local_irq_disable();    /* to protect tcep and the page behind it */
+        tcep = __get_cpu_var(tce_page);
+        if (!tcep) {
+                tcep = (u64 *)__get_free_page(GFP_ATOMIC);
+                if (!tcep) {
+                        local_irq_enable();
+                        return -ENOMEM;
+                }
+                __get_cpu_var(tce_page) = tcep;
+        }
+        proto_tce = TCE_PCI_READ | TCE_PCI_WRITE;
+        liobn = (u64)be32_to_cpu(maprange->liobn);
+        tce_shift = be32_to_cpu(maprange->tce_shift);
+        tce_size = 1ULL << tce_shift;
+        next = start_pfn << PAGE_SHIFT;
+        num_tce = num_pfn << PAGE_SHIFT;
+        /* round back to the beginning of the tce page size */
+        num_tce += next & (tce_size - 1);
+        next &= ~(tce_size - 1);
+        /* covert to number of tces */
+        num_tce |= tce_size - 1;
+        num_tce >>= tce_shift;
+        /* We can map max one pageful of TCEs at a time */
+        do {
+                /*
+                 * Set up the page with TCE data, looping through and setting
+                 * the values.
+                 */
+                limit = min_t(long, num_tce, 4096/TCE_ENTRY_SIZE);
+                dma_offset = next + be64_to_cpu(maprange->dma_base);
+                for (l = 0; l < limit; l++) {
+                        tcep[l] = proto_tce | next;
+                        next += tce_size;
+                }
+                rc = plpar_tce_put_indirect(liobn,
+                                            dma_offset,
+                                            (u64)virt_to_abs(tcep),
+                                            limit);
+                num_tce -= limit;
+        } while (num_tce > 0 && !rc);
+        /* error cleanup: caller will clear whole range */
+        local_irq_enable();
+        return rc;
+}
+static int tce_setrange_multi_pSeriesLP_walk(unsigned long start_pfn,
+                unsigned long num_pfn, void *arg)
+{
+        return tce_setrange_multi_pSeriesLP(start_pfn, num_pfn, arg);
+}
 #ifdef CONFIG_PCI
 static void iommu_table_setparms(struct pci_controller *phb,
                                 struct device_node *dn,
@@ -323,14 +471,13 @@ static void iommu_table_setparms(struct pci_controller *phb,
 static void iommu_table_setparms_lpar(struct pci_controller *phb,
                                      struct device_node *dn,
                                      struct iommu_table *tbl,
-                                      const void *dma_window,
+                                      const void *dma_window)
-                                      int bussubno)
 {
        unsigned long offset, size;
-        tbl->it_busno  = bussubno;
        of_parse_dma_window(dn, dma_window, &tbl->it_index, &offset, &size);
+        tbl->it_busno = phb->bus->number;
        tbl->it_base   = 0;
        tbl->it_blocksize  = 16;
        tbl->it_type = TCE_PCI;
@@ -450,14 +597,10 @@ static void pci_dma_bus_setup_pSeriesLP(struct pci_bus *bus)
        if (!ppci->iommu_table) {
                tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
                                   ppci->phb->node);
-                iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window,
+                iommu_table_setparms_lpar(ppci->phb, pdn, tbl, dma_window);
-                        bus->number);
                ppci->iommu_table = iommu_init_table(tbl, ppci->phb->node);
                pr_debug("  created table: %p\n", ppci->iommu_table);
        }
-        if (pdn != dn)
-                PCI_DN(dn)->iommu_table = ppci->iommu_table;
 }
@@ -500,6 +643,334 @@ static void pci_dma_dev_setup_pSeries(struct pci_dev *dev)
                       pci_name(dev));
 }
+static int __read_mostly disable_ddw;
+static int __init disable_ddw_setup(char *str)
+{
+        disable_ddw = 1;
+        printk(KERN_INFO "ppc iommu: disabling ddw.\n");
+        return 0;
+}
+early_param("disable_ddw", disable_ddw_setup);
+static void remove_ddw(struct device_node *np)
+{
+        struct dynamic_dma_window_prop *dwp;
+        struct property *win64;
+        const u32 *ddw_avail;
+        u64 liobn;
+        int len, ret;
+        ddw_avail = of_get_property(np, "ibm,ddw-applicable", &len);
+        win64 = of_find_property(np, DIRECT64_PROPNAME, NULL);
+        if (!win64)
+                return;
+        if (!ddw_avail || len < 3 * sizeof(u32) || win64->length < sizeof(*dwp))
+                goto delprop;
+        dwp = win64->value;
+        liobn = (u64)be32_to_cpu(dwp->liobn);
+        /* clear the whole window, note the arg is in kernel pages */
+        ret = tce_clearrange_multi_pSeriesLP(0,
+                1ULL << (be32_to_cpu(dwp->window_shift) - PAGE_SHIFT), dwp);
+        if (ret)
+                pr_warning("%s failed to clear tces in window.\n",
+                         np->full_name);
+        else
+                pr_debug("%s successfully cleared tces in window.\n",
+                         np->full_name);
+        ret = rtas_call(ddw_avail[2], 1, 1, NULL, liobn);
+        if (ret)
+                pr_warning("%s: failed to remove direct window: rtas returned "
+                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
+                        np->full_name, ret, ddw_avail[2], liobn);
+        else
+                pr_debug("%s: successfully removed direct window: rtas returned "
+                        "%d to ibm,remove-pe-dma-window(%x) %llx\n",
+                        np->full_name, ret, ddw_avail[2], liobn);
+delprop:
+        ret = prom_remove_property(np, win64);
+        if (ret)
+                pr_warning("%s: failed to remove direct window property: %d\n",
+                        np->full_name, ret);
+}
+static u64 find_existing_ddw(struct device_node *pdn)
+{
+        struct direct_window *window;
+        const struct dynamic_dma_window_prop *direct64;
+        u64 dma_addr = 0;
+        spin_lock(&direct_window_list_lock);
+        /* check if we already created a window and dupe that config if so */
+        list_for_each_entry(window, &direct_window_list, list) {
+                if (window->device == pdn) {
+                        direct64 = window->prop;
+                        dma_addr = direct64->dma_base;
+                        break;
+                }
+        }
+        spin_unlock(&direct_window_list_lock);
+        return dma_addr;
+}
+static int find_existing_ddw_windows(void)
+{
+        int len;
+        struct device_node *pdn;
+        struct direct_window *window;
+        const struct dynamic_dma_window_prop *direct64;
+        if (!firmware_has_feature(FW_FEATURE_LPAR))
+                return 0;
+        for_each_node_with_property(pdn, DIRECT64_PROPNAME) {
+                direct64 = of_get_property(pdn, DIRECT64_PROPNAME, &len);
+                if (!direct64)
+                        continue;
+                window = kzalloc(sizeof(*window), GFP_KERNEL);
+                if (!window || len < sizeof(struct dynamic_dma_window_prop)) {
+                        kfree(window);
+                        remove_ddw(pdn);
+                        continue;
+                }
+                window->device = pdn;
+                window->prop = direct64;
+                spin_lock(&direct_window_list_lock);
+                list_add(&window->list, &direct_window_list);
+                spin_unlock(&direct_window_list_lock);
+        }
+        return 0;
+}
+machine_arch_initcall(pseries, find_existing_ddw_windows);
+static int query_ddw(struct pci_dev *dev, const u32 *ddw_avail,
+                        struct ddw_query_response *query)
+{
+        struct device_node *dn;
+        struct pci_dn *pcidn;
+        u32 cfg_addr;
+        u64 buid;
+        int ret;
+        /*
+         * Get the config address and phb buid of the PE window.
+         * Rely on eeh to retrieve this for us.
+         * Retrieve them from the pci device, not the node with the
+         * dma-window property
+         */
+        dn = pci_device_to_OF_node(dev);
+        pcidn = PCI_DN(dn);
+        cfg_addr = pcidn->eeh_config_addr;
+        if (pcidn->eeh_pe_config_addr)
+                cfg_addr = pcidn->eeh_pe_config_addr;
+        buid = pcidn->phb->buid;
+        ret = rtas_call(ddw_avail[0], 3, 5, (u32 *)query,
+                  cfg_addr, BUID_HI(buid), BUID_LO(buid));
+        dev_info(&dev->dev, "ibm,query-pe-dma-windows(%x) %x %x %x"
+                " returned %d\n", ddw_avail[0], cfg_addr, BUID_HI(buid),
+                BUID_LO(buid), ret);
+        return ret;
+}
+static int create_ddw(struct pci_dev *dev, const u32 *ddw_avail,
+                        struct ddw_create_response *create, int page_shift,
+                        int window_shift)
+{
+        struct device_node *dn;
+        struct pci_dn *pcidn;
+        u32 cfg_addr;
+        u64 buid;
+        int ret;
+        /*
+         * Get the config address and phb buid of the PE window.
+         * Rely on eeh to retrieve this for us.
+         * Retrieve them from the pci device, not the node with the
+         * dma-window property
+         */
+        dn = pci_device_to_OF_node(dev);
+        pcidn = PCI_DN(dn);
+        cfg_addr = pcidn->eeh_config_addr;
+        if (pcidn->eeh_pe_config_addr)
+                cfg_addr = pcidn->eeh_pe_config_addr;
+        buid = pcidn->phb->buid;
+        do {
+                /* extra outputs are LIOBN and dma-addr (hi, lo) */
+                ret = rtas_call(ddw_avail[1], 5, 4, (u32 *)create, cfg_addr,
+                                BUID_HI(buid), BUID_LO(buid), page_shift, window_shift);
+        } while (rtas_busy_delay(ret));
+        dev_info(&dev->dev,
+                "ibm,create-pe-dma-window(%x) %x %x %x %x %x returned %d "
+                "(liobn = 0x%x starting addr = %x %x)\n", ddw_avail[1],
+                 cfg_addr, BUID_HI(buid), BUID_LO(buid), page_shift,
+                 window_shift, ret, create->liobn, create->addr_hi, create->addr_lo);
+        return ret;
+}
+/*
+ * If the PE supports dynamic dma windows, and there is space for a table
+ * that can map all pages in a linear offset, then setup such a table,
+ * and record the dma-offset in the struct device.
+ *
+ * dev: the pci device we are checking
+ * pdn: the parent pe node with the ibm,dma_window property
+ * Future: also check if we can remap the base window for our base page size
+ *
+ * returns the dma offset for use by dma_set_mask
+ */
+static u64 enable_ddw(struct pci_dev *dev, struct device_node *pdn)
+{
+        int len, ret;
+        struct ddw_query_response query;
+        struct ddw_create_response create;
+        int page_shift;
+        u64 dma_addr, max_addr;
+        struct device_node *dn;
+        const u32 *uninitialized_var(ddw_avail);
+        struct direct_window *window;
+        struct property *win64;
+        struct dynamic_dma_window_prop *ddwprop;
+        mutex_lock(&direct_window_init_mutex);
+        dma_addr = find_existing_ddw(pdn);
+        if (dma_addr != 0)
+                goto out_unlock;
+        /*
+         * the ibm,ddw-applicable property holds the tokens for:
+         * ibm,query-pe-dma-window
+         * ibm,create-pe-dma-window
+         * ibm,remove-pe-dma-window
+         * for the given node in that order.
+         * the property is actually in the parent, not the PE
+         */
+        ddw_avail = of_get_property(pdn, "ibm,ddw-applicable", &len);
+        if (!ddw_avail || len < 3 * sizeof(u32))
+                goto out_unlock;
+       /*
+         * Query if there is a second window of size to map the
+         * whole partition.  Query returns number of windows, largest
+         * block assigned to PE (partition endpoint), and two bitmasks
+         * of page sizes: supported and supported for migrate-dma.
+         */
+        dn = pci_device_to_OF_node(dev);
+        ret = query_ddw(dev, ddw_avail, &query);
+        if (ret != 0)
+                goto out_unlock;
+        if (query.windows_available == 0) {
+                /*
+                 * no additional windows are available for this device.
+                 * We might be able to reallocate the existing window,
+                 * trading in for a larger page size.
+                 */
+                dev_dbg(&dev->dev, "no free dynamic windows");
+                goto out_unlock;
+        }
+        if (query.page_size & 4) {
+                page_shift = 24; /* 16MB */
+        } else if (query.page_size & 2) {
+                page_shift = 16; /* 64kB */
+        } else if (query.page_size & 1) {
+                page_shift = 12; /* 4kB */
+        } else {
+                dev_dbg(&dev->dev, "no supported direct page size in mask %x",
+                          query.page_size);
+                goto out_unlock;
+        }
+        /* verify the window * number of ptes will map the partition */
+        /* check largest block * page size > max memory hotplug addr */
+        max_addr = memory_hotplug_max();
+        if (query.largest_available_block < (max_addr >> page_shift)) {
+                dev_dbg(&dev->dev, "can't map partiton max 0x%llx with %u "
+                          "%llu-sized pages\n", max_addr,  query.largest_available_block,
+                          1ULL << page_shift);
+                goto out_unlock;
+        }
+        len = order_base_2(max_addr);
+        win64 = kzalloc(sizeof(struct property), GFP_KERNEL);
+        if (!win64) {
+                dev_info(&dev->dev,
+                        "couldn't allocate property for 64bit dma window\n");
+                goto out_unlock;
+        }
+        win64->name = kstrdup(DIRECT64_PROPNAME, GFP_KERNEL);
+        win64->value = ddwprop = kmalloc(sizeof(*ddwprop), GFP_KERNEL);
+        win64->length = sizeof(*ddwprop);
+        if (!win64->name || !win64->value) {
+                dev_info(&dev->dev,
+                        "couldn't allocate property name and value\n");
+                goto out_free_prop;
+        }
+        ret = create_ddw(dev, ddw_avail, &create, page_shift, len);
+        if (ret != 0)
+                goto out_free_prop;
+        ddwprop->liobn = cpu_to_be32(create.liobn);
+        ddwprop->dma_base = cpu_to_be64(of_read_number(&create.addr_hi, 2));
+        ddwprop->tce_shift = cpu_to_be32(page_shift);
+        ddwprop->window_shift = cpu_to_be32(len);
+        dev_dbg(&dev->dev, "created tce table LIOBN 0x%x for %s\n",
+                  create.liobn, dn->full_name);
+        window = kzalloc(sizeof(*window), GFP_KERNEL);
+        if (!window)
+                goto out_clear_window;
+        ret = walk_system_ram_range(0, memblock_end_of_DRAM() >> PAGE_SHIFT,
+                        win64->value, tce_setrange_multi_pSeriesLP_walk);
+        if (ret) {
+                dev_info(&dev->dev, "failed to map direct window for %s: %d\n",
+                         dn->full_name, ret);
+                goto out_clear_window;
+        }
+        ret = prom_add_property(pdn, win64);
+        if (ret) {
+                dev_err(&dev->dev, "unable to add dma window property for %s: %d",
+                         pdn->full_name, ret);
+                goto out_clear_window;
+        }
+        window->device = pdn;
+        window->prop = ddwprop;
+        spin_lock(&direct_window_list_lock);
+        list_add(&window->list, &direct_window_list);
+        spin_unlock(&direct_window_list_lock);
+        dma_addr = of_read_number(&create.addr_hi, 2);
+        goto out_unlock;
+out_clear_window:
+        remove_ddw(pdn);
+out_free_prop:
+        kfree(win64->name);
+        kfree(win64->value);
+        kfree(win64);
+out_unlock:
+        mutex_unlock(&direct_window_init_mutex);
+        return dma_addr;
+}
 static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
 {
        struct device_node *pdn, *dn;
@@ -510,7 +981,7 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
        pr_debug("pci_dma_dev_setup_pSeriesLP: %s\n", pci_name(dev));
        /* dev setup for LPAR is a little tricky, since the device tree might
-         * contain the dma-window properties per-device and not neccesarily
+         * contain the dma-window properties per-device and not necessarily
         * for the bus. So we need to search upwards in the tree until we
         * either hit a dma-window property, OR find a parent with a table
         * already allocated.
@@ -533,21 +1004,11 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
        }
        pr_debug("  parent is %s\n", pdn->full_name);
-        /* Check for parent == NULL so we don't try to setup the empty EADS
-         * slots on POWER4 machines.
-         */
-        if (dma_window == NULL || pdn->parent == NULL) {
-                pr_debug("  no dma window for device, linking to parent\n");
-                set_iommu_table_base(&dev->dev, PCI_DN(pdn)->iommu_table);
-                return;
-        }
        pci = PCI_DN(pdn);
        if (!pci->iommu_table) {
                tbl = kzalloc_node(sizeof(struct iommu_table), GFP_KERNEL,
                                   pci->phb->node);
-                iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window,
+                iommu_table_setparms_lpar(pci->phb, pdn, tbl, dma_window);
-                        pci->phb->bus->number);
                pci->iommu_table = iommu_init_table(tbl, pci->phb->node);
                pr_debug("  created table: %p\n", pci->iommu_table);
        } else {
@@ -556,24 +1017,145 @@ static void pci_dma_dev_setup_pSeriesLP(struct pci_dev *dev)
        set_iommu_table_base(&dev->dev, pci->iommu_table);
 }
+static int dma_set_mask_pSeriesLP(struct device *dev, u64 dma_mask)
+{
+        bool ddw_enabled = false;
+        struct device_node *pdn, *dn;
+        struct pci_dev *pdev;
+        const void *dma_window = NULL;
+        u64 dma_offset;
+        if (!dev->dma_mask)
+                return -EIO;
+        if (!dev_is_pci(dev))
+                goto check_mask;
+        pdev = to_pci_dev(dev);
+        /* only attempt to use a new window if 64-bit DMA is requested */
+        if (!disable_ddw && dma_mask == DMA_BIT_MASK(64)) {
+                dn = pci_device_to_OF_node(pdev);
+                dev_dbg(dev, "node is %s\n", dn->full_name);
+                /*
+                 * the device tree might contain the dma-window properties
+                 * per-device and not necessarily for the bus. So we need to
+                 * search upwards in the tree until we either hit a dma-window
+                 * property, OR find a parent with a table already allocated.
+                 */
+                for (pdn = dn; pdn && PCI_DN(pdn) && !PCI_DN(pdn)->iommu_table;
+                                pdn = pdn->parent) {
+                        dma_window = of_get_property(pdn, "ibm,dma-window", NULL);
+                        if (dma_window)
+                                break;
+                }
+                if (pdn && PCI_DN(pdn)) {
+                        dma_offset = enable_ddw(pdev, pdn);
+                        if (dma_offset != 0) {
+                                dev_info(dev, "Using 64-bit direct DMA at offset %llx\n", dma_offset);
+                                set_dma_offset(dev, dma_offset);
+                                set_dma_ops(dev, &dma_direct_ops);
+                                ddw_enabled = true;
+                        }
+                }
+        }
+        /* fall back on iommu ops, restore table pointer with ops */
+        if (!ddw_enabled && get_dma_ops(dev) != &dma_iommu_ops) {
+                dev_info(dev, "Restoring 32-bit DMA via iommu\n");
+                set_dma_ops(dev, &dma_iommu_ops);
+                pci_dma_dev_setup_pSeriesLP(pdev);
+        }
+check_mask:
+        if (!dma_supported(dev, dma_mask))
+                return -EIO;
+        *dev->dma_mask = dma_mask;
+        return 0;
+}
 #else  /* CONFIG_PCI */
 #define pci_dma_bus_setup_pSeries       NULL
 #define pci_dma_dev_setup_pSeries       NULL
 #define pci_dma_bus_setup_pSeriesLP     NULL
 #define pci_dma_dev_setup_pSeriesLP     NULL
+#define dma_set_mask_pSeriesLP          NULL
 #endif /* !CONFIG_PCI */
+static int iommu_mem_notifier(struct notifier_block *nb, unsigned long action,
+                void *data)
+{
+        struct direct_window *window;
+        struct memory_notify *arg = data;
+        int ret = 0;
+        switch (action) {
+        case MEM_GOING_ONLINE:
+                spin_lock(&direct_window_list_lock);
+                list_for_each_entry(window, &direct_window_list, list) {
+                        ret |= tce_setrange_multi_pSeriesLP(arg->start_pfn,
+                                        arg->nr_pages, window->prop);
+                        /* XXX log error */
+                }
+                spin_unlock(&direct_window_list_lock);
+                break;
+        case MEM_CANCEL_ONLINE:
+        case MEM_OFFLINE:
+                spin_lock(&direct_window_list_lock);
+                list_for_each_entry(window, &direct_window_list, list) {
+                        ret |= tce_clearrange_multi_pSeriesLP(arg->start_pfn,
+                                        arg->nr_pages, window->prop);
+                        /* XXX log error */
+                }
+                spin_unlock(&direct_window_list_lock);
+                break;
+        default:
+                break;
+        }
+        if (ret && action != MEM_CANCEL_ONLINE)
+                return NOTIFY_BAD;
+        return NOTIFY_OK;
+}
+static struct notifier_block iommu_mem_nb = {
+        .notifier_call = iommu_mem_notifier,
+};
 static int iommu_reconfig_notifier(struct notifier_block *nb, unsigned long action, void *node)
 {
        int err = NOTIFY_OK;
        struct device_node *np = node;
        struct pci_dn *pci = PCI_DN(np);
+        struct direct_window *window;
        switch (action) {
        case PSERIES_RECONFIG_REMOVE:
-                if (pci && pci->iommu_table &&
+                if (pci && pci->iommu_table)
-                    of_get_property(np, "ibm,dma-window", NULL))
                        iommu_free_table(pci->iommu_table, np->full_name);
+                spin_lock(&direct_window_list_lock);
+                list_for_each_entry(window, &direct_window_list, list) {
+                        if (window->device == np) {
+                                list_del(&window->list);
+                                kfree(window);
+                                break;
+                        }
+                }
+                spin_unlock(&direct_window_list_lock);
+                /*
+                 * Because the notifier runs after isolation of the
+                 * slot, we are guaranteed any DMA window has already
+                 * been revoked and the TCEs have been marked invalid,
+                 * so we don't need a call to remove_ddw(np). However,
+                 * if an additional notifier action is added before the
+                 * isolate call, we should update this code for
+                 * completeness with such a call.
+                 */
                break;
        default:
                err = NOTIFY_DONE;
@@ -589,13 +1171,8 @@ static struct notifier_block iommu_reconfig_nb = {
 /* These are called very early. */
 void iommu_init_early_pSeries(void)
 {
-        if (of_chosen && of_get_property(of_chosen, "linux,iommu-off", NULL)) {
+        if (of_chosen && of_get_property(of_chosen, "linux,iommu-off", NULL))
-                /* Direct I/O, IOMMU off */
-                ppc_md.pci_dma_dev_setup = NULL;
-                ppc_md.pci_dma_bus_setup = NULL;
-                set_pci_dma_ops(&dma_direct_ops);
                return;
-        }
        if (firmware_has_feature(FW_FEATURE_LPAR)) {
                if (firmware_has_feature(FW_FEATURE_MULTITCE)) {
@@ -608,6 +1185,7 @@ void iommu_init_early_pSeries(void)
                ppc_md.tce_get   = tce_get_pSeriesLP;
                ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_pSeriesLP;
                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_pSeriesLP;
+                ppc_md.dma_set_mask = dma_set_mask_pSeriesLP;
        } else {
                ppc_md.tce_build = tce_build_pSeries;
                ppc_md.tce_free  = tce_free_pSeries;
@@ -618,7 +1196,22 @@ void iommu_init_early_pSeries(void)
        pSeries_reconfig_notifier_register(&iommu_reconfig_nb);
+        register_memory_notifier(&iommu_mem_nb);
        set_pci_dma_ops(&dma_iommu_ops);
 }
+static int __init disable_multitce(char *str)
+{
+        if (strcmp(str, "off") == 0 &&
+            firmware_has_feature(FW_FEATURE_LPAR) &&
+            firmware_has_feature(FW_FEATURE_MULTITCE)) {
+                printk(KERN_INFO "Disabling MULTITCE firmware feature\n");
+                ppc_md.tce_build = tce_build_pSeriesLP;
+                ppc_md.tce_free  = tce_free_pSeriesLP;
+                powerpc_firmware_features &= ~FW_FEATURE_MULTITCE;
+        }
+        return 1;
+}
+__setup("multitce=", disable_multitce);
diff --git a/arch/powerpc/platforms/pseries/kexec.c b/arch/powerpc/platforms/pseries/kexec.c
index 53cbd53d8740..54cf3a4aa16b 100644
--- a/arch/powerpc/platforms/pseries/kexec.c
+++ b/arch/powerpc/platforms/pseries/kexec.c
@@ -7,15 +7,18 @@
 * 2 of the License, or (at your option) any later version.
 */
+#include <linux/kernel.h>
+#include <linux/interrupt.h>
 #include <asm/machdep.h>
 #include <asm/page.h>
 #include <asm/firmware.h>
 #include <asm/kexec.h>
 #include <asm/mpic.h>
+#include <asm/xics.h>
 #include <asm/smp.h>
 #include "pseries.h"
-#include "xics.h"
 #include "plpar_wrappers.h"
 static void pseries_kexec_cpu_down(int crash_shutdown, int secondary)
@@ -61,13 +64,3 @@ void __init setup_kexec_cpu_down_xics(void)
 {
        ppc_md.kexec_cpu_down = pseries_kexec_cpu_down_xics;
 }
-static int __init pseries_kexec_setup(void)
-{
-        ppc_md.machine_kexec = default_machine_kexec;
-        ppc_md.machine_kexec_prepare = default_machine_kexec_prepare;
-        ppc_md.machine_crash_shutdown = default_machine_crash_shutdown;
-        return 0;
-}
-machine_device_initcall(pseries, pseries_kexec_setup);
diff --git a/arch/powerpc/platforms/pseries/lpar.c b/arch/powerpc/platforms/pseries/lpar.c
index cf79b46d8f88..39e6e0a7b2fa 100644
--- a/arch/powerpc/platforms/pseries/lpar.c
+++ b/arch/powerpc/platforms/pseries/lpar.c
@@ -248,11 +248,13 @@ void vpa_init(int cpu)
        int hwcpu = get_hard_smp_processor_id(cpu);
        unsigned long addr;
        long ret;
+        struct paca_struct *pp;
+        struct dtl_entry *dtl;
        if (cpu_has_feature(CPU_FTR_ALTIVEC))
-                lppaca[cpu].vmxregs_in_use = 1;
+                lppaca_of(cpu).vmxregs_in_use = 1;
-        addr = __pa(&lppaca[cpu]);
+        addr = __pa(&lppaca_of(cpu));
        ret = register_vpa(hwcpu, addr);
        if (ret) {
@@ -274,6 +276,25 @@ void vpa_init(int cpu)
                               "registration for cpu %d (hw %d) of area %lx "
                               "returns %ld\n", cpu, hwcpu, addr, ret);
        }
+        /*
+         * Register dispatch trace log, if one has been allocated.
+         */
+        pp = &paca[cpu];
+        dtl = pp->dispatch_log;
+        if (dtl) {
+                pp->dtl_ridx = 0;
+                pp->dtl_curr = dtl;
+                lppaca_of(cpu).dtl_idx = 0;
+                /* hypervisor reads buffer length from this field */
+                dtl->enqueue_to_dispatch_time = DISPATCH_LOG_BYTES;
+                ret = register_dtl(hwcpu, __pa(dtl));
+                if (ret)
+                        pr_warn("DTL registration failed for cpu %d (%ld)\n",
+                                cpu, ret);
+                lppaca_of(cpu).dtl_enable_mask = 2;
+        }
 }
 static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
@@ -308,6 +329,8 @@ static long pSeries_lpar_hpte_insert(unsigned long hpte_group,
        /* Make pHyp happy */
        if ((rflags & _PAGE_NO_CACHE) & !(rflags & _PAGE_WRITETHRU))
                hpte_r &= ~_PAGE_COHERENT;
+        if (firmware_has_feature(FW_FEATURE_XCMO) && !(hpte_r & HPTE_R_N))
+                flags |= H_COALESCE_CAND;
        lpar_rc = plpar_pte_enter(flags, hpte_group, hpte_v, hpte_r, &slot);
        if (unlikely(lpar_rc == H_PTEG_FULL)) {
@@ -552,7 +575,7 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
        unsigned long i, pix, rc;
        unsigned long flags = 0;
        struct ppc64_tlb_batch *batch = &__get_cpu_var(ppc64_tlb_batch);
-        int lock_tlbie = !cpu_has_feature(CPU_FTR_LOCKLESS_TLBIE);
+        int lock_tlbie = !mmu_has_feature(MMU_FTR_LOCKLESS_TLBIE);
        unsigned long param[9];
        unsigned long va;
        unsigned long hash, index, shift, hidx, slot;
@@ -606,6 +629,18 @@ static void pSeries_lpar_flush_hash_range(unsigned long number, int local)
                spin_unlock_irqrestore(&pSeries_lpar_tlbie_lock, flags);
 }
+static int __init disable_bulk_remove(char *str)
+{
+        if (strcmp(str, "off") == 0 &&
+            firmware_has_feature(FW_FEATURE_BULK_REMOVE)) {
+                        printk(KERN_INFO "Disabling BULK_REMOVE firmware feature");
+                        powerpc_firmware_features &= ~FW_FEATURE_BULK_REMOVE;
+        }
+        return 1;
+}
+__setup("bulk_remove=", disable_bulk_remove);
 void __init hpte_init_lpar(void)
 {
        ppc_md.hpte_invalidate  = pSeries_lpar_hpte_invalidate;
@@ -680,6 +715,13 @@ EXPORT_SYMBOL(arch_free_page);
 /* NB: reg/unreg are called while guarded with the tracepoints_mutex */
 extern long hcall_tracepoint_refcount;
+/* 
+ * Since the tracing code might execute hcalls we need to guard against
+ * recursion. One example of this are spinlocks calling H_YIELD on
+ * shared processor partitions.
+ */
+static DEFINE_PER_CPU(unsigned int, hcall_trace_depth);
 void hcall_tracepoint_regfunc(void)
 {
        hcall_tracepoint_refcount++;
@@ -692,12 +734,86 @@ void hcall_tracepoint_unregfunc(void)
 void __trace_hcall_entry(unsigned long opcode, unsigned long *args)
 {
+        unsigned long flags;
+        unsigned int *depth;
+        local_irq_save(flags);
+        depth = &__get_cpu_var(hcall_trace_depth);
+        if (*depth)
+                goto out;
+        (*depth)++;
        trace_hcall_entry(opcode, args);
+        (*depth)--;
+out:
+        local_irq_restore(flags);
 }
 void __trace_hcall_exit(long opcode, unsigned long retval,
                        unsigned long *retbuf)
 {
+        unsigned long flags;
+        unsigned int *depth;
+        local_irq_save(flags);
+        depth = &__get_cpu_var(hcall_trace_depth);
+        if (*depth)
+                goto out;
+        (*depth)++;
        trace_hcall_exit(opcode, retval, retbuf);
+        (*depth)--;
+out:
+        local_irq_restore(flags);
 }
 #endif
+/**
+ * h_get_mpp
+ * H_GET_MPP hcall returns info in 7 parms
+ */
+int h_get_mpp(struct hvcall_mpp_data *mpp_data)
+{
+        int rc;
+        unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
+        rc = plpar_hcall9(H_GET_MPP, retbuf);
+        mpp_data->entitled_mem = retbuf[0];
+        mpp_data->mapped_mem = retbuf[1];
+        mpp_data->group_num = (retbuf[2] >> 2 * 8) & 0xffff;
+        mpp_data->pool_num = retbuf[2] & 0xffff;
+        mpp_data->mem_weight = (retbuf[3] >> 7 * 8) & 0xff;
+        mpp_data->unallocated_mem_weight = (retbuf[3] >> 6 * 8) & 0xff;
+        mpp_data->unallocated_entitlement = retbuf[3] & 0xffffffffffff;
+        mpp_data->pool_size = retbuf[4];
+        mpp_data->loan_request = retbuf[5];
+        mpp_data->backing_mem = retbuf[6];
+        return rc;
+}
+EXPORT_SYMBOL(h_get_mpp);
+int h_get_mpp_x(struct hvcall_mpp_x_data *mpp_x_data)
+{
+        int rc;
+        unsigned long retbuf[PLPAR_HCALL9_BUFSIZE] = { 0 };
+        rc = plpar_hcall9(H_GET_MPP_X, retbuf);
+        mpp_x_data->coalesced_bytes = retbuf[0];
+        mpp_x_data->pool_coalesced_bytes = retbuf[1];
+        mpp_x_data->pool_purr_cycles = retbuf[2];
+        mpp_x_data->pool_spurr_cycles = retbuf[3];
+        return rc;
+}
diff --git a/arch/powerpc/platforms/pseries/mobility.c b/arch/powerpc/platforms/pseries/mobility.c
new file mode 100644
index 000000000000..3e7f651e50ac
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/mobility.c
@@ -0,0 +1,362 @@
+/*
+ * Support for Partition Mobility/Migration
+ *
+ * Copyright (C) 2010 Nathan Fontenot
+ * Copyright (C) 2010 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License version
+ * 2 as published by the Free Software Foundation.
+ */
+#include <linux/kernel.h>
+#include <linux/kobject.h>
+#include <linux/smp.h>
+#include <linux/completion.h>
+#include <linux/device.h>
+#include <linux/delay.h>
+#include <linux/slab.h>
+#include <asm/rtas.h>
+#include "pseries.h"
+static struct kobject *mobility_kobj;
+struct update_props_workarea {
+        u32 phandle;
+        u32 state;
+        u64 reserved;
+        u32 nprops;
+};
+#define NODE_ACTION_MASK        0xff000000
+#define NODE_COUNT_MASK         0x00ffffff
+#define DELETE_DT_NODE  0x01000000
+#define UPDATE_DT_NODE  0x02000000
+#define ADD_DT_NODE     0x03000000
+static int mobility_rtas_call(int token, char *buf)
+{
+        int rc;
+        spin_lock(&rtas_data_buf_lock);
+        memcpy(rtas_data_buf, buf, RTAS_DATA_BUF_SIZE);
+        rc = rtas_call(token, 2, 1, NULL, rtas_data_buf, 1);
+        memcpy(buf, rtas_data_buf, RTAS_DATA_BUF_SIZE);
+        spin_unlock(&rtas_data_buf_lock);
+        return rc;
+}
+static int delete_dt_node(u32 phandle)
+{
+        struct device_node *dn;
+        dn = of_find_node_by_phandle(phandle);
+        if (!dn)
+                return -ENOENT;
+        dlpar_detach_node(dn);
+        return 0;
+}
+static int update_dt_property(struct device_node *dn, struct property **prop,
+                              const char *name, u32 vd, char *value)
+{
+        struct property *new_prop = *prop;
+        struct property *old_prop;
+        int more = 0;
+        /* A negative 'vd' value indicates that only part of the new property
+         * value is contained in the buffer and we need to call
+         * ibm,update-properties again to get the rest of the value.
+         *
+         * A negative value is also the two's compliment of the actual value.
+         */
+        if (vd & 0x80000000) {
+                vd = ~vd + 1;
+                more = 1;
+        }
+        if (new_prop) {
+                /* partial property fixup */
+                char *new_data = kzalloc(new_prop->length + vd, GFP_KERNEL);
+                if (!new_data)
+                        return -ENOMEM;
+                memcpy(new_data, new_prop->value, new_prop->length);
+                memcpy(new_data + new_prop->length, value, vd);
+                kfree(new_prop->value);
+                new_prop->value = new_data;
+                new_prop->length += vd;
+        } else {
+                new_prop = kzalloc(sizeof(*new_prop), GFP_KERNEL);
+                if (!new_prop)
+                        return -ENOMEM;
+                new_prop->name = kstrdup(name, GFP_KERNEL);
+                if (!new_prop->name) {
+                        kfree(new_prop);
+                        return -ENOMEM;
+                }
+                new_prop->length = vd;
+                new_prop->value = kzalloc(new_prop->length, GFP_KERNEL);
+                if (!new_prop->value) {
+                        kfree(new_prop->name);
+                        kfree(new_prop);
+                        return -ENOMEM;
+                }
+                memcpy(new_prop->value, value, vd);
+                *prop = new_prop;
+        }
+        if (!more) {
+                old_prop = of_find_property(dn, new_prop->name, NULL);
+                if (old_prop)
+                        prom_update_property(dn, new_prop, old_prop);
+                else
+                        prom_add_property(dn, new_prop);
+                new_prop = NULL;
+        }
+        return 0;
+}
+static int update_dt_node(u32 phandle)
+{
+        struct update_props_workarea *upwa;
+        struct device_node *dn;
+        struct property *prop = NULL;
+        int i, rc;
+        char *prop_data;
+        char *rtas_buf;
+        int update_properties_token;
+        update_properties_token = rtas_token("ibm,update-properties");
+        if (update_properties_token == RTAS_UNKNOWN_SERVICE)
+                return -EINVAL;
+        rtas_buf = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
+        if (!rtas_buf)
+                return -ENOMEM;
+        dn = of_find_node_by_phandle(phandle);
+        if (!dn) {
+                kfree(rtas_buf);
+                return -ENOENT;
+        }
+        upwa = (struct update_props_workarea *)&rtas_buf[0];
+        upwa->phandle = phandle;
+        do {
+                rc = mobility_rtas_call(update_properties_token, rtas_buf);
+                if (rc < 0)
+                        break;
+                prop_data = rtas_buf + sizeof(*upwa);
+                for (i = 0; i < upwa->nprops; i++) {
+                        char *prop_name;
+                        u32 vd;
+                        prop_name = prop_data + 1;
+                        prop_data += strlen(prop_name) + 1;
+                        vd = *prop_data++;
+                        switch (vd) {
+                        case 0x00000000:
+                                /* name only property, nothing to do */
+                                break;
+                        case 0x80000000:
+                                prop = of_find_property(dn, prop_name, NULL);
+                                prom_remove_property(dn, prop);
+                                prop = NULL;
+                                break;
+                        default:
+                                rc = update_dt_property(dn, &prop, prop_name,
+                                                        vd, prop_data);
+                                if (rc) {
+                                        printk(KERN_ERR "Could not update %s"
+                                               " property\n", prop_name);
+                                }
+                                prop_data += vd;
+                        }
+                }
+        } while (rc == 1);
+        of_node_put(dn);
+        kfree(rtas_buf);
+        return 0;
+}
+static int add_dt_node(u32 parent_phandle, u32 drc_index)
+{
+        struct device_node *dn;
+        struct device_node *parent_dn;
+        int rc;
+        dn = dlpar_configure_connector(drc_index);
+        if (!dn)
+                return -ENOENT;
+        parent_dn = of_find_node_by_phandle(parent_phandle);
+        if (!parent_dn) {
+                dlpar_free_cc_nodes(dn);
+                return -ENOENT;
+        }
+        dn->parent = parent_dn;
+        rc = dlpar_attach_node(dn);
+        if (rc)
+                dlpar_free_cc_nodes(dn);
+        of_node_put(parent_dn);
+        return rc;
+}
+static int pseries_devicetree_update(void)
+{
+        char *rtas_buf;
+        u32 *data;
+        int update_nodes_token;
+        int rc;
+        update_nodes_token = rtas_token("ibm,update-nodes");
+        if (update_nodes_token == RTAS_UNKNOWN_SERVICE)
+                return -EINVAL;
+        rtas_buf = kzalloc(RTAS_DATA_BUF_SIZE, GFP_KERNEL);
+        if (!rtas_buf)
+                return -ENOMEM;
+        do {
+                rc = mobility_rtas_call(update_nodes_token, rtas_buf);
+                if (rc && rc != 1)
+                        break;
+                data = (u32 *)rtas_buf + 4;
+                while (*data & NODE_ACTION_MASK) {
+                        int i;
+                        u32 action = *data & NODE_ACTION_MASK;
+                        int node_count = *data & NODE_COUNT_MASK;
+                        data++;
+                        for (i = 0; i < node_count; i++) {
+                                u32 phandle = *data++;
+                                u32 drc_index;
+                                switch (action) {
+                                case DELETE_DT_NODE:
+                                        delete_dt_node(phandle);
+                                        break;
+                                case UPDATE_DT_NODE:
+                                        update_dt_node(phandle);
+                                        break;
+                                case ADD_DT_NODE:
+                                        drc_index = *data++;
+                                        add_dt_node(phandle, drc_index);
+                                        break;
+                                }
+                        }
+                }
+        } while (rc == 1);
+        kfree(rtas_buf);
+        return rc;
+}
+void post_mobility_fixup(void)
+{
+        int rc;
+        int activate_fw_token;
+        rc = pseries_devicetree_update();
+        if (rc) {
+                printk(KERN_ERR "Initial post-mobility device tree update "
+                       "failed: %d\n", rc);
+                return;
+        }
+        activate_fw_token = rtas_token("ibm,activate-firmware");
+        if (activate_fw_token == RTAS_UNKNOWN_SERVICE) {
+                printk(KERN_ERR "Could not make post-mobility "
+                       "activate-fw call.\n");
+                return;
+        }
+        rc = rtas_call(activate_fw_token, 0, 1, NULL);
+        if (!rc) {
+                rc = pseries_devicetree_update();
+                if (rc)
+                        printk(KERN_ERR "Secondary post-mobility device tree "
+                               "update failed: %d\n", rc);
+        } else {
+                printk(KERN_ERR "Post-mobility activate-fw failed: %d\n", rc);
+                return;
+        }
+        return;
+}
+static ssize_t migrate_store(struct class *class, struct class_attribute *attr,
+                             const char *buf, size_t count)
+{
+        struct rtas_args args;
+        u64 streamid;
+        int rc;
+        rc = strict_strtoull(buf, 0, &streamid);
+        if (rc)
+                return rc;
+        memset(&args, 0, sizeof(args));
+        args.token = rtas_token("ibm,suspend-me");
+        args.nargs = 2;
+        args.nret = 1;
+        args.args[0] = streamid >> 32 ;
+        args.args[1] = streamid & 0xffffffff;
+        args.rets = &args.args[args.nargs];
+        do {
+                args.rets[0] = 0;
+                rc = rtas_ibm_suspend_me(&args);
+                if (!rc && args.rets[0] == RTAS_NOT_SUSPENDABLE)
+                        ssleep(1);
+        } while (!rc && args.rets[0] == RTAS_NOT_SUSPENDABLE);
+        if (rc)
+                return rc;
+        else if (args.rets[0])
+                return args.rets[0];
+        post_mobility_fixup();
+        return count;
+}
+static CLASS_ATTR(migration, S_IWUSR, NULL, migrate_store);
+static int __init mobility_sysfs_init(void)
+{
+        int rc;
+        mobility_kobj = kobject_create_and_add("mobility", kernel_kobj);
+        if (!mobility_kobj)
+                return -ENOMEM;
+        rc = sysfs_create_file(mobility_kobj, &class_attr_migration.attr);
+        return rc;
+}
+device_initcall(mobility_sysfs_init);
diff --git a/arch/powerpc/platforms/pseries/msi.c b/arch/powerpc/platforms/pseries/msi.c
index 1164c3430f2c..38d24e7e7bb1 100644
--- a/arch/powerpc/platforms/pseries/msi.c
+++ b/arch/powerpc/platforms/pseries/msi.c
@@ -93,8 +93,18 @@ static void rtas_disable_msi(struct pci_dev *pdev)
        if (!pdn)
                return;
-        if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0)
+        /*
-                pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
+         * disabling MSI with the explicit interface also disables MSI-X
+         */
+        if (rtas_change_msi(pdn, RTAS_CHANGE_MSI_FN, 0) != 0) {
+                /* 
+                 * may have failed because explicit interface is not
+                 * present
+                 */
+                if (rtas_change_msi(pdn, RTAS_CHANGE_FN, 0) != 0) {
+                        pr_debug("rtas_msi: Setting MSIs to 0 failed!\n");
+                }
+        }
 }
 static int rtas_query_irq_number(struct pci_dn *pdn, int offset)
@@ -127,7 +137,7 @@ static void rtas_teardown_msi_irqs(struct pci_dev *pdev)
                if (entry->irq == NO_IRQ)
                        continue;
-                set_irq_msi(entry->irq, NULL);
+                irq_set_msi_desc(entry->irq, NULL);
                irq_dispose_mapping(entry->irq);
        }
@@ -427,7 +437,7 @@ static int rtas_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                }
                dev_dbg(&pdev->dev, "rtas_msi: allocated virq %d\n", virq);
-                set_irq_msi(virq, entry);
+                irq_set_msi_desc(virq, entry);
                /* Read config space back so we can restore after reset */
                read_msi_msg(virq, &msg);
diff --git a/arch/powerpc/platforms/pseries/nvram.c b/arch/powerpc/platforms/pseries/nvram.c
index bc3c7f2abd79..00cc3a094885 100644
--- a/arch/powerpc/platforms/pseries/nvram.c
+++ b/arch/powerpc/platforms/pseries/nvram.c
@@ -16,17 +16,70 @@
 #include <linux/errno.h>
 #include <linux/init.h>
 #include <linux/spinlock.h>
+#include <linux/slab.h>
+#include <linux/kmsg_dump.h>
 #include <asm/uaccess.h>
 #include <asm/nvram.h>
 #include <asm/rtas.h>
 #include <asm/prom.h>
 #include <asm/machdep.h>
+/* Max bytes to read/write in one go */
+#define NVRW_CNT 0x20
 static unsigned int nvram_size;
 static int nvram_fetch, nvram_store;
 static char nvram_buf[NVRW_CNT];        /* assume this is in the first 4GB */
 static DEFINE_SPINLOCK(nvram_lock);
+struct err_log_info {
+        int error_type;
+        unsigned int seq_num;
+};
+struct nvram_os_partition {
+        const char *name;
+        int req_size;   /* desired size, in bytes */
+        int min_size;   /* minimum acceptable size (0 means req_size) */
+        long size;      /* size of data portion (excluding err_log_info) */
+        long index;     /* offset of data portion of partition */
+};
+static struct nvram_os_partition rtas_log_partition = {
+        .name = "ibm,rtas-log",
+        .req_size = 2079,
+        .min_size = 1055,
+        .index = -1
+};
+static struct nvram_os_partition oops_log_partition = {
+        .name = "lnx,oops-log",
+        .req_size = 4000,
+        .min_size = 2000,
+        .index = -1
+};
+static const char *pseries_nvram_os_partitions[] = {
+        "ibm,rtas-log",
+        "lnx,oops-log",
+        NULL
+};
+static void oops_to_nvram(struct kmsg_dumper *dumper,
+                enum kmsg_dump_reason reason,
+                const char *old_msgs, unsigned long old_len,
+                const char *new_msgs, unsigned long new_len);
+static struct kmsg_dumper nvram_kmsg_dumper = {
+        .dump = oops_to_nvram
+};
+/* See clobbering_unread_rtas_event() */
+#define NVRAM_RTAS_READ_TIMEOUT 5               /* seconds */
+static unsigned long last_unread_rtas_event;    /* timestamp */
+/* We preallocate oops_buf during init to avoid kmalloc during oops/panic. */
+static char *oops_buf;
 static ssize_t pSeries_nvram_read(char *buf, size_t count, loff_t *index)
 {
@@ -119,6 +172,239 @@ static ssize_t pSeries_nvram_get_size(void)
        return nvram_size ? nvram_size : -ENODEV;
 }
+/* nvram_write_os_partition, nvram_write_error_log
+ *
+ * We need to buffer the error logs into nvram to ensure that we have
+ * the failure information to decode.  If we have a severe error there
+ * is no way to guarantee that the OS or the machine is in a state to
+ * get back to user land and write the error to disk.  For example if
+ * the SCSI device driver causes a Machine Check by writing to a bad
+ * IO address, there is no way of guaranteeing that the device driver
+ * is in any state that is would also be able to write the error data
+ * captured to disk, thus we buffer it in NVRAM for analysis on the
+ * next boot.
+ *
+ * In NVRAM the partition containing the error log buffer will looks like:
+ * Header (in bytes):
+ * +-----------+----------+--------+------------+------------------+
+ * | signature | checksum | length | name       | data             |
+ * |0          |1         |2      3|4         15|16        length-1|
+ * +-----------+----------+--------+------------+------------------+
+ *
+ * The 'data' section would look like (in bytes):
+ * +--------------+------------+-----------------------------------+
+ * | event_logged | sequence # | error log                         |
+ * |0            3|4          7|8                  error_log_size-1|
+ * +--------------+------------+-----------------------------------+
+ *
+ * event_logged: 0 if event has not been logged to syslog, 1 if it has
+ * sequence #: The unique sequence # for each event. (until it wraps)
+ * error log: The error log from event_scan
+ */
+int nvram_write_os_partition(struct nvram_os_partition *part, char * buff,
+                int length, unsigned int err_type, unsigned int error_log_cnt)
+{
+        int rc;
+        loff_t tmp_index;
+        struct err_log_info info;
+        
+        if (part->index == -1) {
+                return -ESPIPE;
+        }
+        if (length > part->size) {
+                length = part->size;
+        }
+        info.error_type = err_type;
+        info.seq_num = error_log_cnt;
+        tmp_index = part->index;
+        rc = ppc_md.nvram_write((char *)&info, sizeof(struct err_log_info), &tmp_index);
+        if (rc <= 0) {
+                pr_err("%s: Failed nvram_write (%d)\n", __FUNCTION__, rc);
+                return rc;
+        }
+        rc = ppc_md.nvram_write(buff, length, &tmp_index);
+        if (rc <= 0) {
+                pr_err("%s: Failed nvram_write (%d)\n", __FUNCTION__, rc);
+                return rc;
+        }
+        
+        return 0;
+}
+int nvram_write_error_log(char * buff, int length,
+                          unsigned int err_type, unsigned int error_log_cnt)
+{
+        int rc = nvram_write_os_partition(&rtas_log_partition, buff, length,
+                                                err_type, error_log_cnt);
+        if (!rc)
+                last_unread_rtas_event = get_seconds();
+        return rc;
+}
+/* nvram_read_error_log
+ *
+ * Reads nvram for error log for at most 'length'
+ */
+int nvram_read_error_log(char * buff, int length,
+                         unsigned int * err_type, unsigned int * error_log_cnt)
+{
+        int rc;
+        loff_t tmp_index;
+        struct err_log_info info;
+        
+        if (rtas_log_partition.index == -1)
+                return -1;
+        if (length > rtas_log_partition.size)
+                length = rtas_log_partition.size;
+        tmp_index = rtas_log_partition.index;
+        rc = ppc_md.nvram_read((char *)&info, sizeof(struct err_log_info), &tmp_index);
+        if (rc <= 0) {
+                printk(KERN_ERR "nvram_read_error_log: Failed nvram_read (%d)\n", rc);
+                return rc;
+        }
+        rc = ppc_md.nvram_read(buff, length, &tmp_index);
+        if (rc <= 0) {
+                printk(KERN_ERR "nvram_read_error_log: Failed nvram_read (%d)\n", rc);
+                return rc;
+        }
+        *error_log_cnt = info.seq_num;
+        *err_type = info.error_type;
+        return 0;
+}
+/* This doesn't actually zero anything, but it sets the event_logged
+ * word to tell that this event is safely in syslog.
+ */
+int nvram_clear_error_log(void)
+{
+        loff_t tmp_index;
+        int clear_word = ERR_FLAG_ALREADY_LOGGED;
+        int rc;
+        if (rtas_log_partition.index == -1)
+                return -1;
+        tmp_index = rtas_log_partition.index;
+        
+        rc = ppc_md.nvram_write((char *)&clear_word, sizeof(int), &tmp_index);
+        if (rc <= 0) {
+                printk(KERN_ERR "nvram_clear_error_log: Failed nvram_write (%d)\n", rc);
+                return rc;
+        }
+        last_unread_rtas_event = 0;
+        return 0;
+}
+/* pseries_nvram_init_os_partition
+ *
+ * This sets up a partition with an "OS" signature.
+ *
+ * The general strategy is the following:
+ * 1.) If a partition with the indicated name already exists...
+ *      - If it's large enough, use it.
+ *      - Otherwise, recycle it and keep going.
+ * 2.) Search for a free partition that is large enough.
+ * 3.) If there's not a free partition large enough, recycle any obsolete
+ * OS partitions and try again.
+ * 4.) Will first try getting a chunk that will satisfy the requested size.
+ * 5.) If a chunk of the requested size cannot be allocated, then try finding
+ * a chunk that will satisfy the minum needed.
+ *
+ * Returns 0 on success, else -1.
+ */
+static int __init pseries_nvram_init_os_partition(struct nvram_os_partition
+                                                                        *part)
+{
+        loff_t p;
+        int size;
+        /* Scan nvram for partitions */
+        nvram_scan_partitions();
+        /* Look for ours */
+        p = nvram_find_partition(part->name, NVRAM_SIG_OS, &size);
+        /* Found one but too small, remove it */
+        if (p && size < part->min_size) {
+                pr_info("nvram: Found too small %s partition,"
+                                        " removing it...\n", part->name);
+                nvram_remove_partition(part->name, NVRAM_SIG_OS, NULL);
+                p = 0;
+        }
+        /* Create one if we didn't find */
+        if (!p) {
+                p = nvram_create_partition(part->name, NVRAM_SIG_OS,
+                                        part->req_size, part->min_size);
+                if (p == -ENOSPC) {
+                        pr_info("nvram: No room to create %s partition, "
+                                "deleting any obsolete OS partitions...\n",
+                                part->name);
+                        nvram_remove_partition(NULL, NVRAM_SIG_OS,
+                                                pseries_nvram_os_partitions);
+                        p = nvram_create_partition(part->name, NVRAM_SIG_OS,
+                                        part->req_size, part->min_size);
+                }
+        }
+        if (p <= 0) {
+                pr_err("nvram: Failed to find or create %s"
+                       " partition, err %d\n", part->name, (int)p);
+                return -1;
+        }
+        part->index = p;
+        part->size = nvram_get_partition_size(p) - sizeof(struct err_log_info);
+        
+        return 0;
+}
+static void __init nvram_init_oops_partition(int rtas_partition_exists)
+{
+        int rc;
+        rc = pseries_nvram_init_os_partition(&oops_log_partition);
+        if (rc != 0) {
+                if (!rtas_partition_exists)
+                        return;
+                pr_notice("nvram: Using %s partition to log both"
+                        " RTAS errors and oops/panic reports\n",
+                        rtas_log_partition.name);
+                memcpy(&oops_log_partition, &rtas_log_partition,
+                                                sizeof(rtas_log_partition));
+        }
+        oops_buf = kmalloc(oops_log_partition.size, GFP_KERNEL);
+        rc = kmsg_dump_register(&nvram_kmsg_dumper);
+        if (rc != 0) {
+                pr_err("nvram: kmsg_dump_register() failed; returned %d\n", rc);
+                kfree(oops_buf);
+                return;
+        }
+}
+static int __init pseries_nvram_init_log_partitions(void)
+{
+        int rc;
+        rc = pseries_nvram_init_os_partition(&rtas_log_partition);
+        nvram_init_oops_partition(rc == 0);
+        return 0;
+}
+machine_arch_initcall(pseries, pseries_nvram_init_log_partitions);
 int __init pSeries_nvram_init(void)
 {
        struct device_node *nvram;
@@ -148,3 +434,83 @@ int __init pSeries_nvram_init(void)
        return 0;
 }
+/*
+ * Try to capture the last capture_len bytes of the printk buffer.  Return
+ * the amount actually captured.
+ */
+static size_t capture_last_msgs(const char *old_msgs, size_t old_len,
+                                const char *new_msgs, size_t new_len,
+                                char *captured, size_t capture_len)
+{
+        if (new_len >= capture_len) {
+                memcpy(captured, new_msgs + (new_len - capture_len),
+                                                                capture_len);
+                return capture_len;
+        } else {
+                /* Grab the end of old_msgs. */
+                size_t old_tail_len = min(old_len, capture_len - new_len);
+                memcpy(captured, old_msgs + (old_len - old_tail_len),
+                                                                old_tail_len);
+                memcpy(captured + old_tail_len, new_msgs, new_len);
+                return old_tail_len + new_len;
+        }
+}
+/*
+ * Are we using the ibm,rtas-log for oops/panic reports?  And if so,
+ * would logging this oops/panic overwrite an RTAS event that rtas_errd
+ * hasn't had a chance to read and process?  Return 1 if so, else 0.
+ *
+ * We assume that if rtas_errd hasn't read the RTAS event in
+ * NVRAM_RTAS_READ_TIMEOUT seconds, it's probably not going to.
+ */
+static int clobbering_unread_rtas_event(void)
+{
+        return (oops_log_partition.index == rtas_log_partition.index
+                && last_unread_rtas_event
+                && get_seconds() - last_unread_rtas_event <=
+                                                NVRAM_RTAS_READ_TIMEOUT);
+}
+/* our kmsg_dump callback */
+static void oops_to_nvram(struct kmsg_dumper *dumper,
+                enum kmsg_dump_reason reason,
+                const char *old_msgs, unsigned long old_len,
+                const char *new_msgs, unsigned long new_len)
+{
+        static unsigned int oops_count = 0;
+        static bool panicking = false;
+        size_t text_len;
+        switch (reason) {
+        case KMSG_DUMP_RESTART:
+        case KMSG_DUMP_HALT:
+        case KMSG_DUMP_POWEROFF:
+                /* These are almost always orderly shutdowns. */
+                return;
+        case KMSG_DUMP_OOPS:
+        case KMSG_DUMP_KEXEC:
+                break;
+        case KMSG_DUMP_PANIC:
+                panicking = true;
+                break;
+        case KMSG_DUMP_EMERG:
+                if (panicking)
+                        /* Panic report already captured. */
+                        return;
+                break;
+        default:
+                pr_err("%s: ignoring unrecognized KMSG_DUMP_* reason %d\n",
+                                                __FUNCTION__, (int) reason);
+                return;
+        }
+        if (clobbering_unread_rtas_event())
+                return;
+        text_len = capture_last_msgs(old_msgs, old_len, new_msgs, new_len,
+                                        oops_buf, oops_log_partition.size);
+        (void) nvram_write_os_partition(&oops_log_partition, oops_buf,
+                (int) text_len, ERR_TYPE_KERNEL_PANIC, ++oops_count);
+}
diff --git a/arch/powerpc/platforms/pseries/offline_states.h b/arch/powerpc/platforms/pseries/offline_states.h
index 75a6f480d931..08672d9136ab 100644
--- a/arch/powerpc/platforms/pseries/offline_states.h
+++ b/arch/powerpc/platforms/pseries/offline_states.h
@@ -34,6 +34,4 @@ static inline void set_default_offline_state(int cpu)
 #endif
 extern enum cpu_state_vals get_preferred_offline_state(int cpu);
-extern int start_secondary(void);
-extern void start_secondary_resume(void);
 #endif
diff --git a/arch/powerpc/platforms/pseries/pci_dlpar.c b/arch/powerpc/platforms/pseries/pci_dlpar.c
index 4b7a062dee15..3bf4488aaec6 100644
--- a/arch/powerpc/platforms/pseries/pci_dlpar.c
+++ b/arch/powerpc/platforms/pseries/pci_dlpar.c
@@ -25,8 +25,6 @@
 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
 */
-#undef DEBUG
 #include <linux/pci.h>
 #include <asm/pci-bridge.h>
 #include <asm/ppc-pci.h>
@@ -151,7 +149,7 @@ struct pci_controller * __devinit init_phb_dynamic(struct device_node *dn)
        if (dn->child)
                eeh_add_device_tree_early(dn);
-        pcibios_scan_phb(phb, dn);
+        pcibios_scan_phb(phb);
        pcibios_finish_adding_to_bus(phb->bus);
        return phb;
diff --git a/arch/powerpc/platforms/pseries/plpar_wrappers.h b/arch/powerpc/platforms/pseries/plpar_wrappers.h
index d9801117124b..4bf21207d7d3 100644
--- a/arch/powerpc/platforms/pseries/plpar_wrappers.h
+++ b/arch/powerpc/platforms/pseries/plpar_wrappers.h
@@ -270,31 +270,4 @@ static inline long plpar_put_term_char(unsigned long termno, unsigned long len,
                        lbuf[1]);
 }
-static inline long plpar_eoi(unsigned long xirr)
-{
-        return plpar_hcall_norets(H_EOI, xirr);
-}
-static inline long plpar_cppr(unsigned long cppr)
-{
-        return plpar_hcall_norets(H_CPPR, cppr);
-}
-static inline long plpar_ipi(unsigned long servernum, unsigned long mfrr)
-{
-        return plpar_hcall_norets(H_IPI, servernum, mfrr);
-}
-static inline long plpar_xirr(unsigned long *xirr_ret, unsigned char cppr)
-{
-        long rc;
-        unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
-        rc = plpar_hcall(H_XIRR, retbuf, cppr);
-        *xirr_ret = retbuf[0];
-        return rc;
-}
 #endif /* _PSERIES_PLPAR_WRAPPERS_H */
diff --git a/arch/powerpc/platforms/pseries/pseries.h b/arch/powerpc/platforms/pseries/pseries.h
index 40c93cad91d2..e9f6d2859c3c 100644
--- a/arch/powerpc/platforms/pseries/pseries.h
+++ b/arch/powerpc/platforms/pseries/pseries.h
@@ -17,6 +17,8 @@ struct device_node;
 extern void request_event_sources_irqs(struct device_node *np,
                                       irq_handler_t handler, const char *name);
+#include <linux/of.h>
 extern void __init fw_feature_init(const char *hypertas, unsigned long len);
 struct pt_regs;
@@ -47,4 +49,11 @@ extern unsigned long rtas_poweron_auto;
 extern void find_udbg_vterm(void);
+/* Dynamic logical Partitioning/Mobility */
+extern void dlpar_free_cc_nodes(struct device_node *);
+extern void dlpar_free_cc_property(struct property *);
+extern struct device_node *dlpar_configure_connector(u32);
+extern int dlpar_attach_node(struct device_node *);
+extern int dlpar_detach_node(struct device_node *);
 #endif /* _PSERIES_PSERIES_H */
diff --git a/arch/powerpc/platforms/pseries/pseries_energy.c b/arch/powerpc/platforms/pseries/pseries_energy.c
new file mode 100644
index 000000000000..c8b3c69fe891
--- /dev/null
+++ b/arch/powerpc/platforms/pseries/pseries_energy.c
@@ -0,0 +1,326 @@
+/*
+ * POWER platform energy management driver
+ * Copyright (C) 2010 IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * version 2 as published by the Free Software Foundation.
+ *
+ * This pseries platform device driver provides access to
+ * platform energy management capabilities.
+ */
+#include <linux/module.h>
+#include <linux/types.h>
+#include <linux/errno.h>
+#include <linux/init.h>
+#include <linux/seq_file.h>
+#include <linux/sysdev.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <asm/cputhreads.h>
+#include <asm/page.h>
+#include <asm/hvcall.h>
+#define MODULE_VERS "1.0"
+#define MODULE_NAME "pseries_energy"
+/* Driver flags */
+static int sysfs_entries;
+/* Helper routines */
+/*
+ * Routine to detect firmware support for hcall
+ * return 1 if H_BEST_ENERGY is supported
+ * else return 0
+ */
+static int check_for_h_best_energy(void)
+{
+        struct device_node *rtas = NULL;
+        const char *hypertas, *s;
+        int length;
+        int rc = 0;
+        rtas = of_find_node_by_path("/rtas");
+        if (!rtas)
+                return 0;
+        hypertas = of_get_property(rtas, "ibm,hypertas-functions", &length);
+        if (!hypertas) {
+                of_node_put(rtas);
+                return 0;
+        }
+        /* hypertas will have list of strings with hcall names */
+        for (s = hypertas; s < hypertas + length; s += strlen(s) + 1) {
+                if (!strncmp("hcall-best-energy-1", s, 19)) {
+                        rc = 1; /* Found the string */
+                        break;
+                }
+        }
+        of_node_put(rtas);
+        return rc;
+}
+/* Helper Routines to convert between drc_index to cpu numbers */
+static u32 cpu_to_drc_index(int cpu)
+{
+        struct device_node *dn = NULL;
+        const int *indexes;
+        int i;
+        int rc = 1;
+        u32 ret = 0;
+        dn = of_find_node_by_path("/cpus");
+        if (dn == NULL)
+                goto err;
+        indexes = of_get_property(dn, "ibm,drc-indexes", NULL);
+        if (indexes == NULL)
+                goto err_of_node_put;
+        /* Convert logical cpu number to core number */
+        i = cpu_core_index_of_thread(cpu);
+        /*
+         * The first element indexes[0] is the number of drc_indexes
+         * returned in the list.  Hence i+1 will get the drc_index
+         * corresponding to core number i.
+         */
+        WARN_ON(i > indexes[0]);
+        ret = indexes[i + 1];
+        rc = 0;
+err_of_node_put:
+        of_node_put(dn);
+err:
+        if (rc)
+                printk(KERN_WARNING "cpu_to_drc_index(%d) failed", cpu);
+        return ret;
+}
+static int drc_index_to_cpu(u32 drc_index)
+{
+        struct device_node *dn = NULL;
+        const int *indexes;
+        int i, cpu = 0;
+        int rc = 1;
+        dn = of_find_node_by_path("/cpus");
+        if (dn == NULL)
+                goto err;
+        indexes = of_get_property(dn, "ibm,drc-indexes", NULL);
+        if (indexes == NULL)
+                goto err_of_node_put;
+        /*
+         * First element in the array is the number of drc_indexes
+         * returned.  Search through the list to find the matching
+         * drc_index and get the core number
+         */
+        for (i = 0; i < indexes[0]; i++) {
+                if (indexes[i + 1] == drc_index)
+                        break;
+        }
+        /* Convert core number to logical cpu number */
+        cpu = cpu_first_thread_of_core(i);
+        rc = 0;
+err_of_node_put:
+        of_node_put(dn);
+err:
+        if (rc)
+                printk(KERN_WARNING "drc_index_to_cpu(%d) failed", drc_index);
+        return cpu;
+}
+/*
+ * pseries hypervisor call H_BEST_ENERGY provides hints to OS on
+ * preferred logical cpus to activate or deactivate for optimized
+ * energy consumption.
+ */
+#define FLAGS_MODE1     0x004E200000080E01
+#define FLAGS_MODE2     0x004E200000080401
+#define FLAGS_ACTIVATE  0x100
+static ssize_t get_best_energy_list(char *page, int activate)
+{
+        int rc, cnt, i, cpu;
+        unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
+        unsigned long flags = 0;
+        u32 *buf_page;
+        char *s = page;
+        buf_page = (u32 *) get_zeroed_page(GFP_KERNEL);
+        if (!buf_page)
+                return -ENOMEM;
+        flags = FLAGS_MODE1;
+        if (activate)
+                flags |= FLAGS_ACTIVATE;
+        rc = plpar_hcall9(H_BEST_ENERGY, retbuf, flags, 0, __pa(buf_page),
+                                0, 0, 0, 0, 0, 0);
+        if (rc != H_SUCCESS) {
+                free_page((unsigned long) buf_page);
+                return -EINVAL;
+        }
+        cnt = retbuf[0];
+        for (i = 0; i < cnt; i++) {
+                cpu = drc_index_to_cpu(buf_page[2*i+1]);
+                if ((cpu_online(cpu) && !activate) ||
+                    (!cpu_online(cpu) && activate))
+                        s += sprintf(s, "%d,", cpu);
+        }
+        if (s > page) { /* Something to show */
+                s--; /* Suppress last comma */
+                s += sprintf(s, "\n");
+        }
+        free_page((unsigned long) buf_page);
+        return s-page;
+}
+static ssize_t get_best_energy_data(struct sys_device *dev,
+                                        char *page, int activate)
+{
+        int rc;
+        unsigned long retbuf[PLPAR_HCALL9_BUFSIZE];
+        unsigned long flags = 0;
+        flags = FLAGS_MODE2;
+        if (activate)
+                flags |= FLAGS_ACTIVATE;
+        rc = plpar_hcall9(H_BEST_ENERGY, retbuf, flags,
+                                cpu_to_drc_index(dev->id),
+                                0, 0, 0, 0, 0, 0, 0);
+        if (rc != H_SUCCESS)
+                return -EINVAL;
+        return sprintf(page, "%lu\n", retbuf[1] >> 32);
+}
+/* Wrapper functions */
+static ssize_t cpu_activate_hint_list_show(struct sysdev_class *class,
+                        struct sysdev_class_attribute *attr, char *page)
+{
+        return get_best_energy_list(page, 1);
+}
+static ssize_t cpu_deactivate_hint_list_show(struct sysdev_class *class,
+                        struct sysdev_class_attribute *attr, char *page)
+{
+        return get_best_energy_list(page, 0);
+}
+static ssize_t percpu_activate_hint_show(struct sys_device *dev,
+                        struct sysdev_attribute *attr, char *page)
+{
+        return get_best_energy_data(dev, page, 1);
+}
+static ssize_t percpu_deactivate_hint_show(struct sys_device *dev,
+                        struct sysdev_attribute *attr, char *page)
+{
+        return get_best_energy_data(dev, page, 0);
+}
+/*
+ * Create sysfs interface:
+ * /sys/devices/system/cpu/pseries_activate_hint_list
+ * /sys/devices/system/cpu/pseries_deactivate_hint_list
+ *      Comma separated list of cpus to activate or deactivate
+ * /sys/devices/system/cpu/cpuN/pseries_activate_hint
+ * /sys/devices/system/cpu/cpuN/pseries_deactivate_hint
+ *      Per-cpu value of the hint
+ */
+struct sysdev_class_attribute attr_cpu_activate_hint_list =
+                _SYSDEV_CLASS_ATTR(pseries_activate_hint_list, 0444,
+                cpu_activate_hint_list_show, NULL);
+struct sysdev_class_attribute attr_cpu_deactivate_hint_list =
+                _SYSDEV_CLASS_ATTR(pseries_deactivate_hint_list, 0444,
+                cpu_deactivate_hint_list_show, NULL);
+struct sysdev_attribute attr_percpu_activate_hint =
+                _SYSDEV_ATTR(pseries_activate_hint, 0444,
+                percpu_activate_hint_show, NULL);
+struct sysdev_attribute attr_percpu_deactivate_hint =
+                _SYSDEV_ATTR(pseries_deactivate_hint, 0444,
+                percpu_deactivate_hint_show, NULL);
+static int __init pseries_energy_init(void)
+{
+        int cpu, err;
+        struct sys_device *cpu_sys_dev;
+        if (!check_for_h_best_energy()) {
+                printk(KERN_INFO "Hypercall H_BEST_ENERGY not supported\n");
+                return 0;
+        }
+        /* Create the sysfs files */
+        err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
+                                &attr_cpu_activate_hint_list.attr);
+        if (!err)
+                err = sysfs_create_file(&cpu_sysdev_class.kset.kobj,
+                                &attr_cpu_deactivate_hint_list.attr);
+        if (err)
+                return err;
+        for_each_possible_cpu(cpu) {
+                cpu_sys_dev = get_cpu_sysdev(cpu);
+                err = sysfs_create_file(&cpu_sys_dev->kobj,
+                                &attr_percpu_activate_hint.attr);
+                if (err)
+                        break;
+                err = sysfs_create_file(&cpu_sys_dev->kobj,
+                                &attr_percpu_deactivate_hint.attr);
+                if (err)
+                        break;
+        }
+        if (err)
+                return err;
+        sysfs_entries = 1; /* Removed entries on cleanup */
+        return 0;
+}
+static void __exit pseries_energy_cleanup(void)
+{
+        int cpu;
+        struct sys_device *cpu_sys_dev;
+        if (!sysfs_entries)
+                return;
+        /* Remove the sysfs files */
+        sysfs_remove_file(&cpu_sysdev_class.kset.kobj,
+                                &attr_cpu_activate_hint_list.attr);
+        sysfs_remove_file(&cpu_sysdev_class.kset.kobj,
+                                &attr_cpu_deactivate_hint_list.attr);
+        for_each_possible_cpu(cpu) {
+                cpu_sys_dev = get_cpu_sysdev(cpu);
+                sysfs_remove_file(&cpu_sys_dev->kobj,
+                                &attr_percpu_activate_hint.attr);
+                sysfs_remove_file(&cpu_sys_dev->kobj,
+                                &attr_percpu_deactivate_hint.attr);
+        }
+}
+module_init(pseries_energy_init);
+module_exit(pseries_energy_cleanup);
+MODULE_DESCRIPTION("Driver for pSeries platform energy management");
+MODULE_AUTHOR("Vaidyanathan Srinivasan");
+MODULE_LICENSE("GPL");
diff --git a/arch/powerpc/platforms/pseries/ras.c b/arch/powerpc/platforms/pseries/ras.c
index a4fc6da87c2e..086d2ae4e06a 100644
--- a/arch/powerpc/platforms/pseries/ras.c
+++ b/arch/powerpc/platforms/pseries/ras.c
@@ -54,7 +54,8 @@
 static unsigned char ras_log_buf[RTAS_ERROR_LOG_MAX];
 static DEFINE_SPINLOCK(ras_log_buf_lock);
-static char mce_data_buf[RTAS_ERROR_LOG_MAX];
+static char global_mce_data_buf[RTAS_ERROR_LOG_MAX];
+static DEFINE_PER_CPU(__u64, mce_data_buf);
 static int ras_get_sensor_state_token;
 static int ras_check_exception_token;
@@ -121,7 +122,7 @@ static irqreturn_t ras_epow_interrupt(int irq, void *dev_id)
        status = rtas_call(ras_check_exception_token, 6, 1, NULL,
                           RTAS_VECTOR_EXTERNAL_INTERRUPT,
-                           irq_map[irq].hwirq,
+                           virq_to_hw(irq),
                           RTAS_EPOW_WARNING | RTAS_POWERMGM_EVENTS,
                           critical, __pa(&ras_log_buf),
                                rtas_get_error_log_max());
@@ -156,7 +157,7 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
        status = rtas_call(ras_check_exception_token, 6, 1, NULL,
                           RTAS_VECTOR_EXTERNAL_INTERRUPT,
-                           irq_map[irq].hwirq,
+                           virq_to_hw(irq),
                           RTAS_INTERNAL_ERROR, 1 /*Time Critical */,
                           __pa(&ras_log_buf),
                                rtas_get_error_log_max());
@@ -196,12 +197,24 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
        return IRQ_HANDLED;
 }
-/* Get the error information for errors coming through the
+/*
+ * Some versions of FWNMI place the buffer inside the 4kB page starting at
+ * 0x7000. Other versions place it inside the rtas buffer. We check both.
+ */
+#define VALID_FWNMI_BUFFER(A) \
+        ((((A) >= 0x7000) && ((A) < 0x7ff0)) || \
+        (((A) >= rtas.base) && ((A) < (rtas.base + rtas.size - 16))))
+/*
+ * Get the error information for errors coming through the
 * FWNMI vectors.  The pt_regs' r3 will be updated to reflect
 * the actual r3 if possible, and a ptr to the error log entry
 * will be returned if found.
 *
- * The mce_data_buf does not have any locks or protection around it,
+ * If the RTAS error is not of the extended type, then we put it in a per
+ * cpu 64bit buffer. If it is the extended type we use global_mce_data_buf.
+ *
+ * The global_mce_data_buf does not have any locks or protection around it,
 * if a second machine check comes in, or a system reset is done
 * before we have logged the error, then we will get corruption in the
 * error log.  This is preferable over holding off on calling
@@ -210,20 +223,31 @@ static irqreturn_t ras_error_interrupt(int irq, void *dev_id)
 */
 static struct rtas_error_log *fwnmi_get_errinfo(struct pt_regs *regs)
 {
-        unsigned long errdata = regs->gpr[3];
-        struct rtas_error_log *errhdr = NULL;
        unsigned long *savep;
+        struct rtas_error_log *h, *errhdr = NULL;
+        if (!VALID_FWNMI_BUFFER(regs->gpr[3])) {
+                printk(KERN_ERR "FWNMI: corrupt r3 0x%016lx\n", regs->gpr[3]);
+                return NULL;
+        }
-        if ((errdata >= 0x7000 && errdata < 0x7fff0) ||
+        savep = __va(regs->gpr[3]);
-            (errdata >= rtas.base && errdata < rtas.base + rtas.size - 16)) {
+        regs->gpr[3] = savep[0];        /* restore original r3 */
-                savep = __va(errdata);
-                regs->gpr[3] = savep[0];        /* restore original r3 */
+        /* If it isn't an extended log we can use the per cpu 64bit buffer */
-                memset(mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
+        h = (struct rtas_error_log *)&savep[1];
-                memcpy(mce_data_buf, (char *)(savep + 1), RTAS_ERROR_LOG_MAX);
+        if (!h->extended) {
-                errhdr = (struct rtas_error_log *)mce_data_buf;
+                memcpy(&__get_cpu_var(mce_data_buf), h, sizeof(__u64));
+                errhdr = (struct rtas_error_log *)&__get_cpu_var(mce_data_buf);
        } else {
-                printk("FWNMI: corrupt r3\n");
+                int len;
+                len = max_t(int, 8+h->extended_log_length, RTAS_ERROR_LOG_MAX);
+                memset(global_mce_data_buf, 0, RTAS_ERROR_LOG_MAX);
+                memcpy(global_mce_data_buf, h, len);
+                errhdr = (struct rtas_error_log *)global_mce_data_buf;
        }
        return errhdr;
 }
@@ -235,7 +259,7 @@ static void fwnmi_release_errinfo(void)
 {
        int ret = rtas_call(rtas_token("ibm,nmi-interlock"), 0, 1, NULL);
        if (ret != 0)
-                printk("FWNMI: nmi-interlock failed: %d\n", ret);
+                printk(KERN_ERR "FWNMI: nmi-interlock failed: %d\n", ret);
 }
 int pSeries_system_reset_exception(struct pt_regs *regs)
@@ -259,31 +283,43 @@ int pSeries_system_reset_exception(struct pt_regs *regs)
 * Return 1 if corrected (or delivered a signal).
 * Return 0 if there is nothing we can do.
 */
-static int recover_mce(struct pt_regs *regs, struct rtas_error_log * err)
+static int recover_mce(struct pt_regs *regs, struct rtas_error_log *err)
 {
-        int nonfatal = 0;
+        int recovered = 0;
-        if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
+        if (!(regs->msr & MSR_RI)) {
+                /* If MSR_RI isn't set, we cannot recover */
+                recovered = 0;
+        } else if (err->disposition == RTAS_DISP_FULLY_RECOVERED) {
                /* Platform corrected itself */
-                nonfatal = 1;
+                recovered = 1;
-        } else if ((regs->msr & MSR_RI) &&
-                   user_mode(regs) &&
+        } else if (err->disposition == RTAS_DISP_LIMITED_RECOVERY) {
-                   err->severity == RTAS_SEVERITY_ERROR_SYNC &&
+                /* Platform corrected itself but could be degraded */
-                   err->disposition == RTAS_DISP_NOT_RECOVERED &&
+                printk(KERN_ERR "MCE: limited recovery, system may "
-                   err->target == RTAS_TARGET_MEMORY &&
+                       "be degraded\n");
-                   err->type == RTAS_TYPE_ECC_UNCORR &&
+                recovered = 1;
-                   !(current->pid == 0 || is_global_init(current))) {
-                /* Kill off a user process with an ECC error */
+        } else if (user_mode(regs) && !is_global_init(current) &&
-                printk(KERN_ERR "MCE: uncorrectable ecc error for pid %d\n",
+                   err->severity == RTAS_SEVERITY_ERROR_SYNC) {
-                       current->pid);
-                /* XXX something better for ECC error? */
+                /*
-                _exception(SIGBUS, regs, BUS_ADRERR, regs->nip);
+                 * If we received a synchronous error when in userspace
-                nonfatal = 1;
+                 * kill the task. Firmware may report details of the fail
+                 * asynchronously, so we can't rely on the target and type
+                 * fields being valid here.
+                 */
+                printk(KERN_ERR "MCE: uncorrectable error, killing task "
+                       "%s:%d\n", current->comm, current->pid);
+                _exception(SIGBUS, regs, BUS_MCEERR_AR, regs->nip);
+                recovered = 1;
        }
-        log_error((char *)err, ERR_TYPE_RTAS_LOG, !nonfatal);
+        log_error((char *)err, ERR_TYPE_RTAS_LOG, 0);
-        return nonfatal;
+        return recovered;
 }
 /*
diff --git a/arch/powerpc/platforms/pseries/reconfig.c b/arch/powerpc/platforms/pseries/reconfig.c
index 57ddbb43b33a..1de2cbb92303 100644
--- a/arch/powerpc/platforms/pseries/reconfig.c
+++ b/arch/powerpc/platforms/pseries/reconfig.c
@@ -539,7 +539,8 @@ out:
 }
 static const struct file_operations ofdt_fops = {
-        .write = ofdt_write
+        .write = ofdt_write,
+        .llseek = noop_llseek,
 };
 /* create /proc/powerpc/ofdt write-only by root */
diff --git a/arch/powerpc/platforms/pseries/scanlog.c b/arch/powerpc/platforms/pseries/scanlog.c
index 80e9e7652a4d..554457294a2b 100644
--- a/arch/powerpc/platforms/pseries/scanlog.c
+++ b/arch/powerpc/platforms/pseries/scanlog.c
@@ -170,6 +170,7 @@ const struct file_operations scanlog_fops = {
        .write          = scanlog_write,
        .open           = scanlog_open,
        .release        = scanlog_release,
+        .llseek         = noop_llseek,
 };
 static int __init scanlog_init(void)
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c
index a6d19e3a505e..593acceeff96 100644
--- a/arch/powerpc/platforms/pseries/setup.c
+++ b/arch/powerpc/platforms/pseries/setup.c
@@ -53,9 +53,9 @@
 #include <asm/irq.h>
 #include <asm/time.h>
 #include <asm/nvram.h>
-#include "xics.h"
 #include <asm/pmc.h>
 #include <asm/mpic.h>
+#include <asm/xics.h>
 #include <asm/ppc-pci.h>
 #include <asm/i8259.h>
 #include <asm/udbg.h>
@@ -114,10 +114,13 @@ static void __init fwnmi_init(void)
 static void pseries_8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = i8259_irq();
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
 static void __init pseries_setup_i8259_cascade(void)
@@ -166,7 +169,7 @@ static void __init pseries_setup_i8259_cascade(void)
                printk(KERN_DEBUG "pic: PCI 8259 intack at 0x%016lx\n", intack);
        i8259_init(found, intack);
        of_node_put(found);
-        set_irq_chained_handler(cascade, pseries_8259_cascade);
+        irq_set_chained_handler(cascade, pseries_8259_cascade);
 }
 static void __init pseries_mpic_init_IRQ(void)
@@ -202,6 +205,9 @@ static void __init pseries_mpic_init_IRQ(void)
                mpic_assign_isu(mpic, n, isuaddr);
        }
+        /* Setup top-level get_irq */
+        ppc_md.get_irq = mpic_get_irq;
        /* All ISUs are setup, complete initialization */
        mpic_init(mpic);
@@ -211,7 +217,7 @@ static void __init pseries_mpic_init_IRQ(void)
 static void __init pseries_xics_init_IRQ(void)
 {
-        xics_init_IRQ();
+        xics_init();
        pseries_setup_i8259_cascade();
 }
@@ -235,7 +241,6 @@ static void __init pseries_discover_pic(void)
                if (strstr(typep, "open-pic")) {
                        pSeries_mpic_node = of_node_get(np);
                        ppc_md.init_IRQ       = pseries_mpic_init_IRQ;
-                        ppc_md.get_irq        = mpic_get_irq;
                        setup_kexec_cpu_down_mpic();
                        smp_init_pseries_mpic();
                        return;
@@ -273,6 +278,79 @@ static struct notifier_block pci_dn_reconfig_nb = {
        .notifier_call = pci_dn_reconfig_notifier,
 };
+struct kmem_cache *dtl_cache;
+#ifdef CONFIG_VIRT_CPU_ACCOUNTING
+/*
+ * Allocate space for the dispatch trace log for all possible cpus
+ * and register the buffers with the hypervisor.  This is used for
+ * computing time stolen by the hypervisor.
+ */
+static int alloc_dispatch_logs(void)
+{
+        int cpu, ret;
+        struct paca_struct *pp;
+        struct dtl_entry *dtl;
+        if (!firmware_has_feature(FW_FEATURE_SPLPAR))
+                return 0;
+        if (!dtl_cache)
+                return 0;
+        for_each_possible_cpu(cpu) {
+                pp = &paca[cpu];
+                dtl = kmem_cache_alloc(dtl_cache, GFP_KERNEL);
+                if (!dtl) {
+                        pr_warn("Failed to allocate dispatch trace log for cpu %d\n",
+                                cpu);
+                        pr_warn("Stolen time statistics will be unreliable\n");
+                        break;
+                }
+                pp->dtl_ridx = 0;
+                pp->dispatch_log = dtl;
+                pp->dispatch_log_end = dtl + N_DISPATCH_LOG;
+                pp->dtl_curr = dtl;
+        }
+        /* Register the DTL for the current (boot) cpu */
+        dtl = get_paca()->dispatch_log;
+        get_paca()->dtl_ridx = 0;
+        get_paca()->dtl_curr = dtl;
+        get_paca()->lppaca_ptr->dtl_idx = 0;
+        /* hypervisor reads buffer length from this field */
+        dtl->enqueue_to_dispatch_time = DISPATCH_LOG_BYTES;
+        ret = register_dtl(hard_smp_processor_id(), __pa(dtl));
+        if (ret)
+                pr_warn("DTL registration failed for boot cpu %d (%d)\n",
+                        smp_processor_id(), ret);
+        get_paca()->lppaca_ptr->dtl_enable_mask = 2;
+        return 0;
+}
+#else /* !CONFIG_VIRT_CPU_ACCOUNTING */
+static inline int alloc_dispatch_logs(void)
+{
+        return 0;
+}
+#endif /* CONFIG_VIRT_CPU_ACCOUNTING */
+static int alloc_dispatch_log_kmem_cache(void)
+{
+        dtl_cache = kmem_cache_create("dtl", DISPATCH_LOG_BYTES,
+                                                DISPATCH_LOG_BYTES, 0, NULL);
+        if (!dtl_cache) {
+                pr_warn("Failed to create dispatch trace log buffer cache\n");
+                pr_warn("Stolen time statistics will be unreliable\n");
+                return 0;
+        }
+        return alloc_dispatch_logs();
+}
+early_initcall(alloc_dispatch_log_kmem_cache);
 static void __init pSeries_setup_arch(void)
 {
        /* Discover PIC type and setup ppc_md accordingly */
@@ -323,7 +401,7 @@ static int __init pSeries_init_panel(void)
        return 0;
 }
-arch_initcall(pSeries_init_panel);
+machine_arch_initcall(pseries, pSeries_init_panel);
 static int pseries_set_dabr(unsigned long dabr)
 {
@@ -340,6 +418,16 @@ static int pseries_set_xdabr(unsigned long dabr)
 #define CMO_CHARACTERISTICS_TOKEN 44
 #define CMO_MAXLENGTH 1026
+void pSeries_coalesce_init(void)
+{
+        struct hvcall_mpp_x_data mpp_x_data;
+        if (firmware_has_feature(FW_FEATURE_CMO) && !h_get_mpp_x(&mpp_x_data))
+                powerpc_firmware_features |= FW_FEATURE_XCMO;
+        else
+                powerpc_firmware_features &= ~FW_FEATURE_XCMO;
+}
 /**
 * fw_cmo_feature_init - FW_FEATURE_CMO is not stored in ibm,hypertas-functions,
 * handle that here. (Stolen from parse_system_parameter_string)
@@ -409,6 +497,7 @@ void pSeries_cmo_feature_init(void)
                pr_debug("CMO enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
                         CMO_SecPSP);
                powerpc_firmware_features |= FW_FEATURE_CMO;
+                pSeries_coalesce_init();
        } else
                pr_debug("CMO not enabled, PrPSP=%d, SecPSP=%d\n", CMO_PrPSP,
                         CMO_SecPSP);
diff --git a/arch/powerpc/platforms/pseries/smp.c b/arch/powerpc/platforms/pseries/smp.c
index 0317cce877c6..fbffd7e47ab8 100644
--- a/arch/powerpc/platforms/pseries/smp.c
+++ b/arch/powerpc/platforms/pseries/smp.c
@@ -44,10 +44,11 @@
 #include <asm/mpic.h>
 #include <asm/vdso_datapage.h>
 #include <asm/cputhreads.h>
+#include <asm/mpic.h>
+#include <asm/xics.h>
 #include "plpar_wrappers.h"
 #include "pseries.h"
-#include "xics.h"
 #include "offline_states.h"
@@ -64,8 +65,8 @@ int smp_query_cpu_stopped(unsigned int pcpu)
        int qcss_tok = rtas_token("query-cpu-stopped-state");
        if (qcss_tok == RTAS_UNKNOWN_SERVICE) {
-                printk(KERN_INFO "Firmware doesn't support "
+                printk_once(KERN_INFO
-                                "query-cpu-stopped-state\n");
+                        "Firmware doesn't support query-cpu-stopped-state\n");
                return QCSS_HARDWARE_ERROR;
        }
@@ -112,10 +113,10 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
        /* Fixup atomic count: it exited inside IRQ handler. */
        task_thread_info(paca[lcpu].__current)->preempt_count   = 0;
+#ifdef CONFIG_HOTPLUG_CPU
        if (get_cpu_current_state(lcpu) == CPU_STATE_INACTIVE)
                goto out;
+#endif
        /* 
         * If the RTAS start-cpu token does not exist then presume the
         * cpu is already spinning.
@@ -130,11 +131,12 @@ static inline int __devinit smp_startup_cpu(unsigned int lcpu)
                return 0;
        }
+#ifdef CONFIG_HOTPLUG_CPU
 out:
+#endif
        return 1;
 }
-#ifdef CONFIG_XICS
 static void __devinit smp_xics_setup_cpu(int cpu)
 {
        if (cpu != boot_cpuid)
@@ -144,20 +146,18 @@ static void __devinit smp_xics_setup_cpu(int cpu)
                vpa_init(cpu);
        cpumask_clear_cpu(cpu, of_spin_mask);
+#ifdef CONFIG_HOTPLUG_CPU
        set_cpu_current_state(cpu, CPU_STATE_ONLINE);
        set_default_offline_state(cpu);
+#endif
 }
-#endif /* CONFIG_XICS */
-static void __devinit smp_pSeries_kick_cpu(int nr)
+static int __devinit smp_pSeries_kick_cpu(int nr)
 {
-        long rc;
-        unsigned long hcpuid;
        BUG_ON(nr < 0 || nr >= NR_CPUS);
        if (!smp_startup_cpu(nr))
-                return;
+                return -ENOENT;
        /*
         * The processor is currently spinning, waiting for the
@@ -165,16 +165,22 @@ static void __devinit smp_pSeries_kick_cpu(int nr)
         * the processor will continue on to secondary_start
         */
        paca[nr].cpu_start = 1;
+#ifdef CONFIG_HOTPLUG_CPU
        set_preferred_offline_state(nr, CPU_STATE_ONLINE);
        if (get_cpu_current_state(nr) == CPU_STATE_INACTIVE) {
+                long rc;
+                unsigned long hcpuid;
                hcpuid = get_hard_smp_processor_id(nr);
                rc = plpar_hcall_norets(H_PROD, hcpuid);
                if (rc != H_SUCCESS)
                        printk(KERN_ERR "Error: Prod to wake up processor %d "
                                                "Ret= %ld\n", nr, rc);
        }
+#endif
+        return 0;
 }
 static int smp_pSeries_cpu_bootable(unsigned int nr)
@@ -192,23 +198,22 @@ static int smp_pSeries_cpu_bootable(unsigned int nr)
        return 1;
 }
-#ifdef CONFIG_MPIC
 static struct smp_ops_t pSeries_mpic_smp_ops = {
        .message_pass   = smp_mpic_message_pass,
        .probe          = smp_mpic_probe,
        .kick_cpu       = smp_pSeries_kick_cpu,
        .setup_cpu      = smp_mpic_setup_cpu,
 };
-#endif
-#ifdef CONFIG_XICS
 static struct smp_ops_t pSeries_xics_smp_ops = {
-        .message_pass   = smp_xics_message_pass,
+        .message_pass   = smp_muxed_ipi_message_pass,
-        .probe          = smp_xics_probe,
+        .cause_ipi      = NULL, /* Filled at runtime by xics_smp_probe() */
+        .probe          = xics_smp_probe,
        .kick_cpu       = smp_pSeries_kick_cpu,
        .setup_cpu      = smp_xics_setup_cpu,
        .cpu_bootable   = smp_pSeries_cpu_bootable,
 };
-#endif
 /* This is called very early */
 static void __init smp_init_pseries(void)
@@ -240,14 +245,12 @@ static void __init smp_init_pseries(void)
        pr_debug(" <- smp_init_pSeries()\n");
 }
-#ifdef CONFIG_MPIC
 void __init smp_init_pseries_mpic(void)
 {
        smp_ops = &pSeries_mpic_smp_ops;
        smp_init_pseries();
 }
-#endif
 void __init smp_init_pseries_xics(void)
 {
diff --git a/arch/powerpc/platforms/pseries/suspend.c b/arch/powerpc/platforms/pseries/suspend.c
index ed72098bb4e3..a8ca289ff267 100644
--- a/arch/powerpc/platforms/pseries/suspend.c
+++ b/arch/powerpc/platforms/pseries/suspend.c
@@ -153,7 +153,7 @@ static struct sysdev_class suspend_sysdev_class = {
        .name = "power",
 };
-static struct platform_suspend_ops pseries_suspend_ops = {
+static const struct platform_suspend_ops pseries_suspend_ops = {
        .valid          = suspend_valid_only_mem,
        .begin          = pseries_suspend_begin,
        .prepare_late   = pseries_prepare_late,
diff --git a/arch/powerpc/platforms/pseries/xics.c b/arch/powerpc/platforms/pseries/xics.c
deleted file mode 100644
index 93834b0d8272..000000000000
--- a/arch/powerpc/platforms/pseries/xics.c
+++ /dev/null
@@ -1,943 +0,0 @@
-/*
- * arch/powerpc/platforms/pseries/xics.c
- *
- * Copyright 2000 IBM Corporation.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-#include <linux/types.h>
-#include <linux/threads.h>
-#include <linux/kernel.h>
-#include <linux/irq.h>
-#include <linux/smp.h>
-#include <linux/interrupt.h>
-#include <linux/init.h>
-#include <linux/radix-tree.h>
-#include <linux/cpu.h>
-#include <linux/msi.h>
-#include <linux/of.h>
-#include <linux/percpu.h>
-#include <asm/firmware.h>
-#include <asm/io.h>
-#include <asm/pgtable.h>
-#include <asm/smp.h>
-#include <asm/rtas.h>
-#include <asm/hvcall.h>
-#include <asm/machdep.h>
-#include "xics.h"
-#include "plpar_wrappers.h"
-static struct irq_host *xics_host;
-#define XICS_IPI                2
-#define XICS_IRQ_SPURIOUS       0
-/* Want a priority other than 0.  Various HW issues require this. */
-#define DEFAULT_PRIORITY        5
-/*
- * Mark IPIs as higher priority so we can take them inside interrupts that
- * arent marked IRQF_DISABLED
- */
-#define IPI_PRIORITY            4
-/* The least favored priority */
-#define LOWEST_PRIORITY         0xFF
-/* The number of priorities defined above */
-#define MAX_NUM_PRIORITIES      3
-static unsigned int default_server = 0xFF;
-static unsigned int default_distrib_server = 0;
-static unsigned int interrupt_server_size = 8;
-/* RTAS service tokens */
-static int ibm_get_xive;
-static int ibm_set_xive;
-static int ibm_int_on;
-static int ibm_int_off;
-struct xics_cppr {
-        unsigned char stack[MAX_NUM_PRIORITIES];
-        int index;
-};
-static DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
-/* Direct hardware low level accessors */
-/* The part of the interrupt presentation layer that we care about */
-struct xics_ipl {
-        union {
-                u32 word;
-                u8 bytes[4];
-        } xirr_poll;
-        union {
-                u32 word;
-                u8 bytes[4];
-        } xirr;
-        u32 dummy;
-        union {
-                u32 word;
-                u8 bytes[4];
-        } qirr;
-};
-static struct xics_ipl __iomem *xics_per_cpu[NR_CPUS];
-static inline unsigned int direct_xirr_info_get(void)
-{
-        int cpu = smp_processor_id();
-        return in_be32(&xics_per_cpu[cpu]->xirr.word);
-}
-static inline void direct_xirr_info_set(unsigned int value)
-{
-        int cpu = smp_processor_id();
-        out_be32(&xics_per_cpu[cpu]->xirr.word, value);
-}
-static inline void direct_cppr_info(u8 value)
-{
-        int cpu = smp_processor_id();
-        out_8(&xics_per_cpu[cpu]->xirr.bytes[0], value);
-}
-static inline void direct_qirr_info(int n_cpu, u8 value)
-{
-        out_8(&xics_per_cpu[n_cpu]->qirr.bytes[0], value);
-}
-/* LPAR low level accessors */
-static inline unsigned int lpar_xirr_info_get(unsigned char cppr)
-{
-        unsigned long lpar_rc;
-        unsigned long return_value;
-        lpar_rc = plpar_xirr(&return_value, cppr);
-        if (lpar_rc != H_SUCCESS)
-                panic(" bad return code xirr - rc = %lx\n", lpar_rc);
-        return (unsigned int)return_value;
-}
-static inline void lpar_xirr_info_set(unsigned int value)
-{
-        unsigned long lpar_rc;
-        lpar_rc = plpar_eoi(value);
-        if (lpar_rc != H_SUCCESS)
-                panic("bad return code EOI - rc = %ld, value=%x\n", lpar_rc,
-                      value);
-}
-static inline void lpar_cppr_info(u8 value)
-{
-        unsigned long lpar_rc;
-        lpar_rc = plpar_cppr(value);
-        if (lpar_rc != H_SUCCESS)
-                panic("bad return code cppr - rc = %lx\n", lpar_rc);
-}
-static inline void lpar_qirr_info(int n_cpu , u8 value)
-{
-        unsigned long lpar_rc;
-        lpar_rc = plpar_ipi(get_hard_smp_processor_id(n_cpu), value);
-        if (lpar_rc != H_SUCCESS)
-                panic("bad return code qirr - rc = %lx\n", lpar_rc);
-}
-/* Interface to generic irq subsystem */
-#ifdef CONFIG_SMP
-/*
- * For the moment we only implement delivery to all cpus or one cpu.
- *
- * If the requested affinity is cpu_all_mask, we set global affinity.
- * If not we set it to the first cpu in the mask, even if multiple cpus
- * are set. This is so things like irqbalance (which set core and package
- * wide affinities) do the right thing.
- */
-static int get_irq_server(unsigned int virq, const struct cpumask *cpumask,
-                          unsigned int strict_check)
-{
-        if (!distribute_irqs)
-                return default_server;
-        if (!cpumask_equal(cpumask, cpu_all_mask)) {
-                int server = cpumask_first_and(cpu_online_mask, cpumask);
-                if (server < nr_cpu_ids)
-                        return get_hard_smp_processor_id(server);
-                if (strict_check)
-                        return -1;
-        }
-        /*
-         * Workaround issue with some versions of JS20 firmware that
-         * deliver interrupts to cpus which haven't been started. This
-         * happens when using the maxcpus= boot option.
-         */
-        if (cpumask_equal(cpu_online_mask, cpu_present_mask))
-                return default_distrib_server;
-        return default_server;
-}
-#else
-#define get_irq_server(virq, cpumask, strict_check) (default_server)
-#endif
-static void xics_unmask_irq(unsigned int virq)
-{
-        unsigned int irq;
-        int call_status;
-        int server;
-        pr_devel("xics: unmask virq %d\n", virq);
-        irq = (unsigned int)irq_map[virq].hwirq;
-        pr_devel(" -> map to hwirq 0x%x\n", irq);
-        if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
-                return;
-        server = get_irq_server(virq, irq_to_desc(virq)->affinity, 0);
-        call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq, server,
-                                DEFAULT_PRIORITY);
-        if (call_status != 0) {
-                printk(KERN_ERR
-                        "%s: ibm_set_xive irq %u server %x returned %d\n",
-                        __func__, irq, server, call_status);
-                return;
-        }
-        /* Now unmask the interrupt (often a no-op) */
-        call_status = rtas_call(ibm_int_on, 1, 1, NULL, irq);
-        if (call_status != 0) {
-                printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
-                        __func__, irq, call_status);
-                return;
-        }
-}
-static unsigned int xics_startup(unsigned int virq)
-{
-        /*
-         * The generic MSI code returns with the interrupt disabled on the
-         * card, using the MSI mask bits. Firmware doesn't appear to unmask
-         * at that level, so we do it here by hand.
-         */
-        if (irq_to_desc(virq)->msi_desc)
-                unmask_msi_irq(virq);
-        /* unmask it */
-        xics_unmask_irq(virq);
-        return 0;
-}
-static void xics_mask_real_irq(unsigned int irq)
-{
-        int call_status;
-        if (irq == XICS_IPI)
-                return;
-        call_status = rtas_call(ibm_int_off, 1, 1, NULL, irq);
-        if (call_status != 0) {
-                printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
-                        __func__, irq, call_status);
-                return;
-        }
-        /* Have to set XIVE to 0xff to be able to remove a slot */
-        call_status = rtas_call(ibm_set_xive, 3, 1, NULL, irq,
-                                default_server, 0xff);
-        if (call_status != 0) {
-                printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
-                        __func__, irq, call_status);
-                return;
-        }
-}
-static void xics_mask_irq(unsigned int virq)
-{
-        unsigned int irq;
-        pr_devel("xics: mask virq %d\n", virq);
-        irq = (unsigned int)irq_map[virq].hwirq;
-        if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
-                return;
-        xics_mask_real_irq(irq);
-}
-static void xics_mask_unknown_vec(unsigned int vec)
-{
-        printk(KERN_ERR "Interrupt %u (real) is invalid, disabling it.\n", vec);
-        xics_mask_real_irq(vec);
-}
-static inline unsigned int xics_xirr_vector(unsigned int xirr)
-{
-        /*
-         * The top byte is the old cppr, to be restored on EOI.
-         * The remaining 24 bits are the vector.
-         */
-        return xirr & 0x00ffffff;
-}
-static void push_cppr(unsigned int vec)
-{
-        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
-        if (WARN_ON(os_cppr->index >= MAX_NUM_PRIORITIES - 1))
-                return;
-        if (vec == XICS_IPI)
-                os_cppr->stack[++os_cppr->index] = IPI_PRIORITY;
-        else
-                os_cppr->stack[++os_cppr->index] = DEFAULT_PRIORITY;
-}
-static unsigned int xics_get_irq_direct(void)
-{
-        unsigned int xirr = direct_xirr_info_get();
-        unsigned int vec = xics_xirr_vector(xirr);
-        unsigned int irq;
-        if (vec == XICS_IRQ_SPURIOUS)
-                return NO_IRQ;
-        irq = irq_radix_revmap_lookup(xics_host, vec);
-        if (likely(irq != NO_IRQ)) {
-                push_cppr(vec);
-                return irq;
-        }
-        /* We don't have a linux mapping, so have rtas mask it. */
-        xics_mask_unknown_vec(vec);
-        /* We might learn about it later, so EOI it */
-        direct_xirr_info_set(xirr);
-        return NO_IRQ;
-}
-static unsigned int xics_get_irq_lpar(void)
-{
-        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
-        unsigned int xirr = lpar_xirr_info_get(os_cppr->stack[os_cppr->index]);
-        unsigned int vec = xics_xirr_vector(xirr);
-        unsigned int irq;
-        if (vec == XICS_IRQ_SPURIOUS)
-                return NO_IRQ;
-        irq = irq_radix_revmap_lookup(xics_host, vec);
-        if (likely(irq != NO_IRQ)) {
-                push_cppr(vec);
-                return irq;
-        }
-        /* We don't have a linux mapping, so have RTAS mask it. */
-        xics_mask_unknown_vec(vec);
-        /* We might learn about it later, so EOI it */
-        lpar_xirr_info_set(xirr);
-        return NO_IRQ;
-}
-static unsigned char pop_cppr(void)
-{
-        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
-        if (WARN_ON(os_cppr->index < 1))
-                return LOWEST_PRIORITY;
-        return os_cppr->stack[--os_cppr->index];
-}
-static void xics_eoi_direct(unsigned int virq)
-{
-        unsigned int irq = (unsigned int)irq_map[virq].hwirq;
-        iosync();
-        direct_xirr_info_set((pop_cppr() << 24) | irq);
-}
-static void xics_eoi_lpar(unsigned int virq)
-{
-        unsigned int irq = (unsigned int)irq_map[virq].hwirq;
-        iosync();
-        lpar_xirr_info_set((pop_cppr() << 24) | irq);
-}
-static int xics_set_affinity(unsigned int virq, const struct cpumask *cpumask)
-{
-        unsigned int irq;
-        int status;
-        int xics_status[2];
-        int irq_server;
-        irq = (unsigned int)irq_map[virq].hwirq;
-        if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
-                return -1;
-        status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
-        if (status) {
-                printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
-                        __func__, irq, status);
-                return -1;
-        }
-        irq_server = get_irq_server(virq, cpumask, 1);
-        if (irq_server == -1) {
-                char cpulist[128];
-                cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
-                printk(KERN_WARNING
-                        "%s: No online cpus in the mask %s for irq %d\n",
-                        __func__, cpulist, virq);
-                return -1;
-        }
-        status = rtas_call(ibm_set_xive, 3, 1, NULL,
-                                irq, irq_server, xics_status[1]);
-        if (status) {
-                printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
-                        __func__, irq, status);
-                return -1;
-        }
-        return 0;
-}
-static struct irq_chip xics_pic_direct = {
-        .name = "XICS",
-        .startup = xics_startup,
-        .mask = xics_mask_irq,
-        .unmask = xics_unmask_irq,
-        .eoi = xics_eoi_direct,
-        .set_affinity = xics_set_affinity
-};
-static struct irq_chip xics_pic_lpar = {
-        .name = "XICS",
-        .startup = xics_startup,
-        .mask = xics_mask_irq,
-        .unmask = xics_unmask_irq,
-        .eoi = xics_eoi_lpar,
-        .set_affinity = xics_set_affinity
-};
-/* Interface to arch irq controller subsystem layer */
-/* Points to the irq_chip we're actually using */
-static struct irq_chip *xics_irq_chip;
-static int xics_host_match(struct irq_host *h, struct device_node *node)
-{
-        /* IBM machines have interrupt parents of various funky types for things
-         * like vdevices, events, etc... The trick we use here is to match
-         * everything here except the legacy 8259 which is compatible "chrp,iic"
-         */
-        return !of_device_is_compatible(node, "chrp,iic");
-}
-static int xics_host_map(struct irq_host *h, unsigned int virq,
-                         irq_hw_number_t hw)
-{
-        pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
-        /* Insert the interrupt mapping into the radix tree for fast lookup */
-        irq_radix_revmap_insert(xics_host, virq, hw);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
-        set_irq_chip_and_handler(virq, xics_irq_chip, handle_fasteoi_irq);
-        return 0;
-}
-static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
-                           const u32 *intspec, unsigned int intsize,
-                           irq_hw_number_t *out_hwirq, unsigned int *out_flags)
-{
-        /* Current xics implementation translates everything
-         * to level. It is not technically right for MSIs but this
-         * is irrelevant at this point. We might get smarter in the future
-         */
-        *out_hwirq = intspec[0];
-        *out_flags = IRQ_TYPE_LEVEL_LOW;
-        return 0;
-}
-static struct irq_host_ops xics_host_ops = {
-        .match = xics_host_match,
-        .map = xics_host_map,
-        .xlate = xics_host_xlate,
-};
-static void __init xics_init_host(void)
-{
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                xics_irq_chip = &xics_pic_lpar;
-        else
-                xics_irq_chip = &xics_pic_direct;
-        xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
-                                   XICS_IRQ_SPURIOUS);
-        BUG_ON(xics_host == NULL);
-        irq_set_default_host(xics_host);
-}
-/* Inter-processor interrupt support */
-#ifdef CONFIG_SMP
-/*
- * XICS only has a single IPI, so encode the messages per CPU
- */
-static DEFINE_PER_CPU_SHARED_ALIGNED(unsigned long, xics_ipi_message);
-static inline void smp_xics_do_message(int cpu, int msg)
-{
-        unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
-        set_bit(msg, tgt);
-        mb();
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                lpar_qirr_info(cpu, IPI_PRIORITY);
-        else
-                direct_qirr_info(cpu, IPI_PRIORITY);
-}
-void smp_xics_message_pass(int target, int msg)
-{
-        unsigned int i;
-        if (target < NR_CPUS) {
-                smp_xics_do_message(target, msg);
-        } else {
-                for_each_online_cpu(i) {
-                        if (target == MSG_ALL_BUT_SELF
-                            && i == smp_processor_id())
-                                continue;
-                        smp_xics_do_message(i, msg);
-                }
-        }
-}
-static irqreturn_t xics_ipi_dispatch(int cpu)
-{
-        unsigned long *tgt = &per_cpu(xics_ipi_message, cpu);
-        mb();   /* order mmio clearing qirr */
-        while (*tgt) {
-                if (test_and_clear_bit(PPC_MSG_CALL_FUNCTION, tgt)) {
-                        smp_message_recv(PPC_MSG_CALL_FUNCTION);
-                }
-                if (test_and_clear_bit(PPC_MSG_RESCHEDULE, tgt)) {
-                        smp_message_recv(PPC_MSG_RESCHEDULE);
-                }
-                if (test_and_clear_bit(PPC_MSG_CALL_FUNC_SINGLE, tgt)) {
-                        smp_message_recv(PPC_MSG_CALL_FUNC_SINGLE);
-                }
-#if defined(CONFIG_DEBUGGER) || defined(CONFIG_KEXEC)
-                if (test_and_clear_bit(PPC_MSG_DEBUGGER_BREAK, tgt)) {
-                        smp_message_recv(PPC_MSG_DEBUGGER_BREAK);
-                }
-#endif
-        }
-        return IRQ_HANDLED;
-}
-static irqreturn_t xics_ipi_action_direct(int irq, void *dev_id)
-{
-        int cpu = smp_processor_id();
-        direct_qirr_info(cpu, 0xff);
-        return xics_ipi_dispatch(cpu);
-}
-static irqreturn_t xics_ipi_action_lpar(int irq, void *dev_id)
-{
-        int cpu = smp_processor_id();
-        lpar_qirr_info(cpu, 0xff);
-        return xics_ipi_dispatch(cpu);
-}
-static void xics_request_ipi(void)
-{
-        unsigned int ipi;
-        int rc;
-        ipi = irq_create_mapping(xics_host, XICS_IPI);
-        BUG_ON(ipi == NO_IRQ);
-        /*
-         * IPIs are marked IRQF_DISABLED as they must run with irqs
-         * disabled
-         */
-        set_irq_handler(ipi, handle_percpu_irq);
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                rc = request_irq(ipi, xics_ipi_action_lpar,
-                                IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
-        else
-                rc = request_irq(ipi, xics_ipi_action_direct,
-                                IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL);
-        BUG_ON(rc);
-}
-int __init smp_xics_probe(void)
-{
-        xics_request_ipi();
-        return cpumask_weight(cpu_possible_mask);
-}
-#endif /* CONFIG_SMP */
-/* Initialization */
-static void xics_update_irq_servers(void)
-{
-        int i, j;
-        struct device_node *np;
-        u32 ilen;
-        const u32 *ireg;
-        u32 hcpuid;
-        /* Find the server numbers for the boot cpu. */
-        np = of_get_cpu_node(boot_cpuid, NULL);
-        BUG_ON(!np);
-        ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
-        if (!ireg) {
-                of_node_put(np);
-                return;
-        }
-        i = ilen / sizeof(int);
-        hcpuid = get_hard_smp_processor_id(boot_cpuid);
-        /* Global interrupt distribution server is specified in the last
-         * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
-         * entry fom this property for current boot cpu id and use it as
-         * default distribution server
-         */
-        for (j = 0; j < i; j += 2) {
-                if (ireg[j] == hcpuid) {
-                        default_server = hcpuid;
-                        default_distrib_server = ireg[j+1];
-                }
-        }
-        of_node_put(np);
-}
-static void __init xics_map_one_cpu(int hw_id, unsigned long addr,
-                                     unsigned long size)
-{
-        int i;
-        /* This may look gross but it's good enough for now, we don't quite
-         * have a hard -> linux processor id matching.
-         */
-        for_each_possible_cpu(i) {
-                if (!cpu_present(i))
-                        continue;
-                if (hw_id == get_hard_smp_processor_id(i)) {
-                        xics_per_cpu[i] = ioremap(addr, size);
-                        return;
-                }
-        }
-}
-static void __init xics_init_one_node(struct device_node *np,
-                                      unsigned int *indx)
-{
-        unsigned int ilen;
-        const u32 *ireg;
-        /* This code does the theorically broken assumption that the interrupt
-         * server numbers are the same as the hard CPU numbers.
-         * This happens to be the case so far but we are playing with fire...
-         * should be fixed one of these days. -BenH.
-         */
-        ireg = of_get_property(np, "ibm,interrupt-server-ranges", NULL);
-        /* Do that ever happen ? we'll know soon enough... but even good'old
-         * f80 does have that property ..
-         */
-        WARN_ON(ireg == NULL);
-        if (ireg) {
-                /*
-                 * set node starting index for this node
-                 */
-                *indx = *ireg;
-        }
-        ireg = of_get_property(np, "reg", &ilen);
-        if (!ireg)
-                panic("xics_init_IRQ: can't find interrupt reg property");
-        while (ilen >= (4 * sizeof(u32))) {
-                unsigned long addr, size;
-                /* XXX Use proper OF parsing code here !!! */
-                addr = (unsigned long)*ireg++ << 32;
-                ilen -= sizeof(u32);
-                addr |= *ireg++;
-                ilen -= sizeof(u32);
-                size = (unsigned long)*ireg++ << 32;
-                ilen -= sizeof(u32);
-                size |= *ireg++;
-                ilen -= sizeof(u32);
-                xics_map_one_cpu(*indx, addr, size);
-                (*indx)++;
-        }
-}
-void __init xics_init_IRQ(void)
-{
-        struct device_node *np;
-        u32 indx = 0;
-        int found = 0;
-        const u32 *isize;
-        ppc64_boot_msg(0x20, "XICS Init");
-        ibm_get_xive = rtas_token("ibm,get-xive");
-        ibm_set_xive = rtas_token("ibm,set-xive");
-        ibm_int_on  = rtas_token("ibm,int-on");
-        ibm_int_off = rtas_token("ibm,int-off");
-        for_each_node_by_type(np, "PowerPC-External-Interrupt-Presentation") {
-                found = 1;
-                if (firmware_has_feature(FW_FEATURE_LPAR)) {
-                        of_node_put(np);
-                        break;
-                        }
-                xics_init_one_node(np, &indx);
-        }
-        if (found == 0)
-                return;
-        /* get the bit size of server numbers */
-        found = 0;
-        for_each_compatible_node(np, NULL, "ibm,ppc-xics") {
-                isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
-                if (!isize)
-                        continue;
-                if (!found) {
-                        interrupt_server_size = *isize;
-                        found = 1;
-                } else if (*isize != interrupt_server_size) {
-                        printk(KERN_WARNING "XICS: "
-                               "mismatched ibm,interrupt-server#-size\n");
-                        interrupt_server_size = max(*isize,
-                                                    interrupt_server_size);
-                }
-        }
-        xics_update_irq_servers();
-        xics_init_host();
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                ppc_md.get_irq = xics_get_irq_lpar;
-        else
-                ppc_md.get_irq = xics_get_irq_direct;
-        xics_setup_cpu();
-        ppc64_boot_msg(0x21, "XICS Done");
-}
-/* Cpu startup, shutdown, and hotplug */
-static void xics_set_cpu_priority(unsigned char cppr)
-{
-        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
-        /*
-         * we only really want to set the priority when there's
-         * just one cppr value on the stack
-         */
-        WARN_ON(os_cppr->index != 0);
-        os_cppr->stack[0] = cppr;
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                lpar_cppr_info(cppr);
-        else
-                direct_cppr_info(cppr);
-        iosync();
-}
-/* Have the calling processor join or leave the specified global queue */
-static void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
-{
-        int index;
-        int status;
-        if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
-                return;
-        index = (1UL << interrupt_server_size) - 1 - gserver;
-        status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
-        WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
-             GLOBAL_INTERRUPT_QUEUE, index, join, status);
-}
-void xics_setup_cpu(void)
-{
-        xics_set_cpu_priority(LOWEST_PRIORITY);
-        xics_set_cpu_giq(default_distrib_server, 1);
-}
-void xics_teardown_cpu(void)
-{
-        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
-        int cpu = smp_processor_id();
-        /*
-         * we have to reset the cppr index to 0 because we're
-         * not going to return from the IPI
-         */
-        os_cppr->index = 0;
-        xics_set_cpu_priority(0);
-        /* Clear any pending IPI request */
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                lpar_qirr_info(cpu, 0xff);
-        else
-                direct_qirr_info(cpu, 0xff);
-}
-void xics_kexec_teardown_cpu(int secondary)
-{
-        xics_teardown_cpu();
-        /*
-         * we take the ipi irq but and never return so we
-         * need to EOI the IPI, but want to leave our priority 0
-         *
-         * should we check all the other interrupts too?
-         * should we be flagging idle loop instead?
-         * or creating some task to be scheduled?
-         */
-        if (firmware_has_feature(FW_FEATURE_LPAR))
-                lpar_xirr_info_set((0x00 << 24) | XICS_IPI);
-        else
-                direct_xirr_info_set((0x00 << 24) | XICS_IPI);
-        /*
-         * Some machines need to have at least one cpu in the GIQ,
-         * so leave the master cpu in the group.
-         */
-        if (secondary)
-                xics_set_cpu_giq(default_distrib_server, 0);
-}
-#ifdef CONFIG_HOTPLUG_CPU
-/* Interrupts are disabled. */
-void xics_migrate_irqs_away(void)
-{
-        int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
-        unsigned int irq, virq;
-        /* If we used to be the default server, move to the new "boot_cpuid" */
-        if (hw_cpu == default_server)
-                xics_update_irq_servers();
-        /* Reject any interrupt that was queued to us... */
-        xics_set_cpu_priority(0);
-        /* Remove ourselves from the global interrupt queue */
-        xics_set_cpu_giq(default_distrib_server, 0);
-        /* Allow IPIs again... */
-        xics_set_cpu_priority(DEFAULT_PRIORITY);
-        for_each_irq(virq) {
-                struct irq_desc *desc;
-                int xics_status[2];
-                int status;
-                unsigned long flags;
-                /* We cant set affinity on ISA interrupts */
-                if (virq < NUM_ISA_INTERRUPTS)
-                        continue;
-                if (irq_map[virq].host != xics_host)
-                        continue;
-                irq = (unsigned int)irq_map[virq].hwirq;
-                /* We need to get IPIs still. */
-                if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
-                        continue;
-                desc = irq_to_desc(virq);
-                /* We only need to migrate enabled IRQS */
-                if (desc == NULL || desc->chip == NULL
-                    || desc->action == NULL
-                    || desc->chip->set_affinity == NULL)
-                        continue;
-                raw_spin_lock_irqsave(&desc->lock, flags);
-                status = rtas_call(ibm_get_xive, 1, 3, xics_status, irq);
-                if (status) {
-                        printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
-                                        __func__, irq, status);
-                        goto unlock;
-                }
-                /*
-                 * We only support delivery to all cpus or to one cpu.
-                 * The irq has to be migrated only in the single cpu
-                 * case.
-                 */
-                if (xics_status[0] != hw_cpu)
-                        goto unlock;
-                /* This is expected during cpu offline. */
-                if (cpu_online(cpu))
-                        printk(KERN_WARNING "IRQ %u affinity broken off cpu %u\n",
-                               virq, cpu);
-                /* Reset affinity to all cpus */
-                cpumask_setall(irq_to_desc(virq)->affinity);
-                desc->chip->set_affinity(virq, cpu_all_mask);
-unlock:
-                raw_spin_unlock_irqrestore(&desc->lock, flags);
-        }
-}
-#endif
diff --git a/arch/powerpc/platforms/pseries/xics.h b/arch/powerpc/platforms/pseries/xics.h
deleted file mode 100644
index d1d5a83039ae..000000000000
--- a/arch/powerpc/platforms/pseries/xics.h
+++ /dev/null
@@ -1,23 +0,0 @@
-/*
- * arch/powerpc/platforms/pseries/xics.h
- *
- * Copyright 2000 IBM Corporation.
- *
- *  This program is free software; you can redistribute it and/or
- *  modify it under the terms of the GNU General Public License
- *  as published by the Free Software Foundation; either version
- *  2 of the License, or (at your option) any later version.
- */
-#ifndef _POWERPC_KERNEL_XICS_H
-#define _POWERPC_KERNEL_XICS_H
-extern void xics_init_IRQ(void);
-extern void xics_setup_cpu(void);
-extern void xics_teardown_cpu(void);
-extern void xics_kexec_teardown_cpu(int secondary);
-extern void xics_migrate_irqs_away(void);
-extern int smp_xics_probe(void);
-extern void smp_xics_message_pass(int target, int msg);
-#endif /* _POWERPC_KERNEL_XICS_H */
diff --git a/arch/powerpc/platforms/wsp/Kconfig b/arch/powerpc/platforms/wsp/Kconfig
new file mode 100644
index 000000000000..c3c48eb62cc1
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/Kconfig
@@ -0,0 +1,28 @@
+config PPC_WSP
+        bool
+        default n
+menu "WSP platform selection"
+        depends on PPC_BOOK3E_64
+config PPC_PSR2
+        bool "PSR-2 platform"
+        select PPC_A2
+        select GENERIC_TBSYNC
+        select PPC_SCOM
+        select EPAPR_BOOT
+        select PPC_WSP
+        select PPC_XICS
+        select PPC_ICP_NATIVE
+        default y
+endmenu
+config PPC_A2_DD2
+        bool "Support for DD2 based A2/WSP systems"
+        depends on PPC_A2
+config WORKAROUND_ERRATUM_463
+        depends on PPC_A2_DD2
+        bool "Workaround erratum 463"
+        default y
diff --git a/arch/powerpc/platforms/wsp/Makefile b/arch/powerpc/platforms/wsp/Makefile
new file mode 100644
index 000000000000..095be73d6cd4
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/Makefile
@@ -0,0 +1,6 @@
+ccflags-y                       += -mno-minimal-toc
+obj-y                           += setup.o ics.o
+obj-$(CONFIG_PPC_PSR2)          += psr2.o opb_pic.o
+obj-$(CONFIG_PPC_WSP)           += scom_wsp.o
+obj-$(CONFIG_SMP)               += smp.o scom_smp.o
diff --git a/arch/powerpc/platforms/wsp/ics.c b/arch/powerpc/platforms/wsp/ics.c
new file mode 100644
index 000000000000..e53bd9e7b125
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/ics.c
@@ -0,0 +1,712 @@
+/*
+ * Copyright 2008-2011 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/cpu.h>
+#include <linux/init.h>
+#include <linux/interrupt.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/msi.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/smp.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <asm/io.h>
+#include <asm/irq.h>
+#include <asm/xics.h>
+#include "wsp.h"
+#include "ics.h"
+/* WSP ICS */
+struct wsp_ics {
+        struct ics ics;
+        struct device_node *dn;
+        void __iomem *regs;
+        spinlock_t lock;
+        unsigned long *bitmap;
+        u32 chip_id;
+        u32 lsi_base;
+        u32 lsi_count;
+        u64 hwirq_start;
+        u64 count;
+#ifdef CONFIG_SMP
+        int *hwirq_cpu_map;
+#endif
+};
+#define to_wsp_ics(ics) container_of(ics, struct wsp_ics, ics)
+#define INT_SRC_LAYER_BUID_REG(base)    ((base) + 0x00)
+#define IODA_TBL_ADDR_REG(base)         ((base) + 0x18)
+#define IODA_TBL_DATA_REG(base)         ((base) + 0x20)
+#define XIVE_UPDATE_REG(base)           ((base) + 0x28)
+#define ICS_INT_CAPS_REG(base)          ((base) + 0x30)
+#define TBL_AUTO_INCREMENT      ((1UL << 63) | (1UL << 15))
+#define TBL_SELECT_XIST         (1UL << 48)
+#define TBL_SELECT_XIVT         (1UL << 49)
+#define IODA_IRQ(irq)           ((irq) & (0x7FFULL))    /* HRM 5.1.3.4 */
+#define XIST_REQUIRED           0x8
+#define XIST_REJECTED           0x4
+#define XIST_PRESENTED          0x2
+#define XIST_PENDING            0x1
+#define XIVE_SERVER_SHIFT       42
+#define XIVE_SERVER_MASK        0xFFFFULL
+#define XIVE_PRIORITY_MASK      0xFFULL
+#define XIVE_PRIORITY_SHIFT     32
+#define XIVE_WRITE_ENABLE       (1ULL << 63)
+/*
+ * The docs refer to a 6 bit field called ChipID, which consists of a
+ * 3 bit NodeID and a 3 bit ChipID. On WSP the ChipID is always zero
+ * so we ignore it, and every where we use "chip id" in this code we
+ * mean the NodeID.
+ */
+#define WSP_ICS_CHIP_SHIFT              17
+static struct wsp_ics *ics_list;
+static int num_ics;
+/* ICS Source controller accessors */
+static u64 wsp_ics_get_xive(struct wsp_ics *ics, unsigned int irq)
+{
+        unsigned long flags;
+        u64 xive;
+        spin_lock_irqsave(&ics->lock, flags);
+        out_be64(IODA_TBL_ADDR_REG(ics->regs), TBL_SELECT_XIVT | IODA_IRQ(irq));
+        xive = in_be64(IODA_TBL_DATA_REG(ics->regs));
+        spin_unlock_irqrestore(&ics->lock, flags);
+        return xive;
+}
+static void wsp_ics_set_xive(struct wsp_ics *ics, unsigned int irq, u64 xive)
+{
+        xive &= ~XIVE_ADDR_MASK;
+        xive |= (irq & XIVE_ADDR_MASK);
+        xive |= XIVE_WRITE_ENABLE;
+        out_be64(XIVE_UPDATE_REG(ics->regs), xive);
+}
+static u64 xive_set_server(u64 xive, unsigned int server)
+{
+        u64 mask = ~(XIVE_SERVER_MASK << XIVE_SERVER_SHIFT);
+        xive &= mask;
+        xive |= (server & XIVE_SERVER_MASK) << XIVE_SERVER_SHIFT;
+        return xive;
+}
+static u64 xive_set_priority(u64 xive, unsigned int priority)
+{
+        u64 mask = ~(XIVE_PRIORITY_MASK << XIVE_PRIORITY_SHIFT);
+        xive &= mask;
+        xive |= (priority & XIVE_PRIORITY_MASK) << XIVE_PRIORITY_SHIFT;
+        return xive;
+}
+#ifdef CONFIG_SMP
+/* Find logical CPUs within mask on a given chip and store result in ret */
+void cpus_on_chip(int chip_id, cpumask_t *mask, cpumask_t *ret)
+{
+        int cpu, chip;
+        struct device_node *cpu_dn, *dn;
+        const u32 *prop;
+        cpumask_clear(ret);
+        for_each_cpu(cpu, mask) {
+                cpu_dn = of_get_cpu_node(cpu, NULL);
+                if (!cpu_dn)
+                        continue;
+                prop = of_get_property(cpu_dn, "at-node", NULL);
+                if (!prop) {
+                        of_node_put(cpu_dn);
+                        continue;
+                }
+                dn = of_find_node_by_phandle(*prop);
+                of_node_put(cpu_dn);
+                chip = wsp_get_chip_id(dn);
+                if (chip == chip_id)
+                        cpumask_set_cpu(cpu, ret);
+                of_node_put(dn);
+        }
+}
+/* Store a suitable CPU to handle a hwirq in the ics->hwirq_cpu_map cache */
+static int cache_hwirq_map(struct wsp_ics *ics, unsigned int hwirq,
+                           const cpumask_t *affinity)
+{
+        cpumask_var_t avail, newmask;
+        int ret = -ENOMEM, cpu, cpu_rover = 0, target;
+        int index = hwirq - ics->hwirq_start;
+        unsigned int nodeid;
+        BUG_ON(index < 0 || index >= ics->count);
+        if (!ics->hwirq_cpu_map)
+                return -ENOMEM;
+        if (!distribute_irqs) {
+                ics->hwirq_cpu_map[hwirq - ics->hwirq_start] = xics_default_server;
+                return 0;
+        }
+        /* Allocate needed CPU masks */
+        if (!alloc_cpumask_var(&avail, GFP_KERNEL))
+                goto ret;
+        if (!alloc_cpumask_var(&newmask, GFP_KERNEL))
+                goto freeavail;
+        /* Find PBus attached to the source of this IRQ */
+        nodeid = (hwirq >> WSP_ICS_CHIP_SHIFT) & 0x3; /* 12:14 */
+        /* Find CPUs that could handle this IRQ */
+        if (affinity)
+                cpumask_and(avail, cpu_online_mask, affinity);
+        else
+                cpumask_copy(avail, cpu_online_mask);
+        /* Narrow selection down to logical CPUs on the same chip */
+        cpus_on_chip(nodeid, avail, newmask);
+        /* Ensure we haven't narrowed it down to 0 */
+        if (unlikely(cpumask_empty(newmask))) {
+                if (unlikely(cpumask_empty(avail))) {
+                        ret = -1;
+                        goto out;
+                }
+                cpumask_copy(newmask, avail);
+        }
+        /* Choose a CPU out of those we narrowed it down to in round robin */
+        target = hwirq % cpumask_weight(newmask);
+        for_each_cpu(cpu, newmask) {
+                if (cpu_rover++ >= target) {
+                        ics->hwirq_cpu_map[index] = get_hard_smp_processor_id(cpu);
+                        ret = 0;
+                        goto out;
+                }
+        }
+        /* Shouldn't happen */
+        WARN_ON(1);
+out:
+        free_cpumask_var(newmask);
+freeavail:
+        free_cpumask_var(avail);
+ret:
+        if (ret < 0) {
+                ics->hwirq_cpu_map[index] = cpumask_first(cpu_online_mask);
+                pr_warning("Error, falling hwirq 0x%x routing back to CPU %i\n",
+                           hwirq, ics->hwirq_cpu_map[index]);
+        }
+        return ret;
+}
+static void alloc_irq_map(struct wsp_ics *ics)
+{
+        int i;
+        ics->hwirq_cpu_map = kmalloc(sizeof(int) * ics->count, GFP_KERNEL);
+        if (!ics->hwirq_cpu_map) {
+                pr_warning("Allocate hwirq_cpu_map failed, "
+                           "IRQ balancing disabled\n");
+                return;
+        }
+        for (i=0; i < ics->count; i++)
+                ics->hwirq_cpu_map[i] = xics_default_server;
+}
+static int get_irq_server(struct wsp_ics *ics, unsigned int hwirq)
+{
+        int index = hwirq - ics->hwirq_start;
+        BUG_ON(index < 0 || index >= ics->count);
+        if (!ics->hwirq_cpu_map)
+                return xics_default_server;
+        return ics->hwirq_cpu_map[index];
+}
+#else /* !CONFIG_SMP */
+static int cache_hwirq_map(struct wsp_ics *ics, unsigned int hwirq,
+                           const cpumask_t *affinity)
+{
+        return 0;
+}
+static int get_irq_server(struct wsp_ics *ics, unsigned int hwirq)
+{
+        return xics_default_server;
+}
+static void alloc_irq_map(struct wsp_ics *ics) { }
+#endif
+static void wsp_chip_unmask_irq(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        struct wsp_ics *ics;
+        int server;
+        u64 xive;
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return;
+        ics = d->chip_data;
+        if (WARN_ON(!ics))
+                return;
+        server = get_irq_server(ics, hw_irq);
+        xive = wsp_ics_get_xive(ics, hw_irq);
+        xive = xive_set_server(xive, server);
+        xive = xive_set_priority(xive, DEFAULT_PRIORITY);
+        wsp_ics_set_xive(ics, hw_irq, xive);
+}
+static unsigned int wsp_chip_startup(struct irq_data *d)
+{
+        /* unmask it */
+        wsp_chip_unmask_irq(d);
+        return 0;
+}
+static void wsp_mask_real_irq(unsigned int hw_irq, struct wsp_ics *ics)
+{
+        u64 xive;
+        if (hw_irq == XICS_IPI)
+                return;
+        if (WARN_ON(!ics))
+                return;
+        xive = wsp_ics_get_xive(ics, hw_irq);
+        xive = xive_set_server(xive, xics_default_server);
+        xive = xive_set_priority(xive, LOWEST_PRIORITY);
+        wsp_ics_set_xive(ics, hw_irq, xive);
+}
+static void wsp_chip_mask_irq(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        struct wsp_ics *ics = d->chip_data;
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return;
+        wsp_mask_real_irq(hw_irq, ics);
+}
+static int wsp_chip_set_affinity(struct irq_data *d,
+                                 const struct cpumask *cpumask, bool force)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        struct wsp_ics *ics;
+        int ret;
+        u64 xive;
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return -1;
+        ics = d->chip_data;
+        if (WARN_ON(!ics))
+                return -1;
+        xive = wsp_ics_get_xive(ics, hw_irq);
+        /*
+         * For the moment only implement delivery to all cpus or one cpu.
+         * Get current irq_server for the given irq
+         */
+        ret = cache_hwirq_map(ics, d->irq, cpumask);
+        if (ret == -1) {
+                char cpulist[128];
+                cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
+                pr_warning("%s: No online cpus in the mask %s for irq %d\n",
+                           __func__, cpulist, d->irq);
+                return -1;
+        } else if (ret == -ENOMEM) {
+                pr_warning("%s: Out of memory\n", __func__);
+                return -1;
+        }
+        xive = xive_set_server(xive, get_irq_server(ics, hw_irq));
+        wsp_ics_set_xive(ics, hw_irq, xive);
+        return 0;
+}
+static struct irq_chip wsp_irq_chip = {
+        .name = "WSP ICS",
+        .irq_startup            = wsp_chip_startup,
+        .irq_mask               = wsp_chip_mask_irq,
+        .irq_unmask             = wsp_chip_unmask_irq,
+        .irq_set_affinity       = wsp_chip_set_affinity
+};
+static int wsp_ics_host_match(struct ics *ics, struct device_node *dn)
+{
+        /* All ICSs in the system implement a global irq number space,
+         * so match against them all. */
+        return of_device_is_compatible(dn, "ibm,ppc-xics");
+}
+static int wsp_ics_match_hwirq(struct wsp_ics *wsp_ics, unsigned int hwirq)
+{
+        if (hwirq >= wsp_ics->hwirq_start &&
+            hwirq <  wsp_ics->hwirq_start + wsp_ics->count)
+                return 1;
+        return 0;
+}
+static int wsp_ics_map(struct ics *ics, unsigned int virq)
+{
+        struct wsp_ics *wsp_ics = to_wsp_ics(ics);
+        unsigned int hw_irq = virq_to_hw(virq);
+        unsigned long flags;
+        if (!wsp_ics_match_hwirq(wsp_ics, hw_irq))
+                return -ENOENT;
+        irq_set_chip_and_handler(virq, &wsp_irq_chip, handle_fasteoi_irq);
+        irq_set_chip_data(virq, wsp_ics);
+        spin_lock_irqsave(&wsp_ics->lock, flags);
+        bitmap_allocate_region(wsp_ics->bitmap, hw_irq - wsp_ics->hwirq_start, 0);
+        spin_unlock_irqrestore(&wsp_ics->lock, flags);
+        return 0;
+}
+static void wsp_ics_mask_unknown(struct ics *ics, unsigned long hw_irq)
+{
+        struct wsp_ics *wsp_ics = to_wsp_ics(ics);
+        if (!wsp_ics_match_hwirq(wsp_ics, hw_irq))
+                return;
+        pr_err("%s: IRQ %lu (real) is invalid, disabling it.\n", __func__, hw_irq);
+        wsp_mask_real_irq(hw_irq, wsp_ics);
+}
+static long wsp_ics_get_server(struct ics *ics, unsigned long hw_irq)
+{
+        struct wsp_ics *wsp_ics = to_wsp_ics(ics);
+        if (!wsp_ics_match_hwirq(wsp_ics, hw_irq))
+                return -ENOENT;
+        return get_irq_server(wsp_ics, hw_irq);
+}
+/* HW Number allocation API */
+static struct wsp_ics *wsp_ics_find_dn_ics(struct device_node *dn)
+{
+        struct device_node *iparent;
+        int i;
+        iparent = of_irq_find_parent(dn);
+        if (!iparent) {
+                pr_err("wsp_ics: Failed to find interrupt parent!\n");
+                return NULL;
+        }
+        for(i = 0; i < num_ics; i++) {
+                if(ics_list[i].dn == iparent)
+                        break;
+        }
+        if (i >= num_ics) {
+                pr_err("wsp_ics: Unable to find parent bitmap!\n");
+                return NULL;
+        }
+        return &ics_list[i];
+}
+int wsp_ics_alloc_irq(struct device_node *dn, int num)
+{
+        struct wsp_ics *ics;
+        int order, offset;
+        ics = wsp_ics_find_dn_ics(dn);
+        if (!ics)
+                return -ENODEV;
+        /* Fast, but overly strict if num isn't a power of two */
+        order = get_count_order(num);
+        spin_lock_irq(&ics->lock);
+        offset = bitmap_find_free_region(ics->bitmap, ics->count, order);
+        spin_unlock_irq(&ics->lock);
+        if (offset < 0)
+                return offset;
+        return offset + ics->hwirq_start;
+}
+void wsp_ics_free_irq(struct device_node *dn, unsigned int irq)
+{
+        struct wsp_ics *ics;
+        ics = wsp_ics_find_dn_ics(dn);
+        if (WARN_ON(!ics))
+                return;
+        spin_lock_irq(&ics->lock);
+        bitmap_release_region(ics->bitmap, irq, 0);
+        spin_unlock_irq(&ics->lock);
+}
+/* Initialisation */
+static int __init wsp_ics_bitmap_setup(struct wsp_ics *ics,
+                                      struct device_node *dn)
+{
+        int len, i, j, size;
+        u32 start, count;
+        const u32 *p;
+        size = BITS_TO_LONGS(ics->count) * sizeof(long);
+        ics->bitmap = kzalloc(size, GFP_KERNEL);
+        if (!ics->bitmap) {
+                pr_err("wsp_ics: ENOMEM allocating IRQ bitmap!\n");
+                return -ENOMEM;
+        }
+        spin_lock_init(&ics->lock);
+        p = of_get_property(dn, "available-ranges", &len);
+        if (!p || !len) {
+                /* FIXME this should be a WARN() once mambo is updated */
+                pr_err("wsp_ics: No available-ranges defined for %s\n",
+                        dn->full_name);
+                return 0;
+        }
+        if (len % (2 * sizeof(u32)) != 0) {
+                /* FIXME this should be a WARN() once mambo is updated */
+                pr_err("wsp_ics: Invalid available-ranges for %s\n",
+                        dn->full_name);
+                return 0;
+        }
+        bitmap_fill(ics->bitmap, ics->count);
+        for (i = 0; i < len / sizeof(u32); i += 2) {
+                start = of_read_number(p + i, 1);
+                count = of_read_number(p + i + 1, 1);
+                pr_devel("%s: start: %d count: %d\n", __func__, start, count);
+                if ((start + count) > (ics->hwirq_start + ics->count) ||
+                     start < ics->hwirq_start) {
+                        pr_err("wsp_ics: Invalid range! -> %d to %d\n",
+                                        start, start + count);
+                        break;
+                }
+                for (j = 0; j < count; j++)
+                        bitmap_release_region(ics->bitmap,
+                                (start + j) - ics->hwirq_start, 0);
+        }
+        /* Ensure LSIs are not available for allocation */
+        bitmap_allocate_region(ics->bitmap, ics->lsi_base,
+                               get_count_order(ics->lsi_count));
+        return 0;
+}
+static int __init wsp_ics_setup(struct wsp_ics *ics, struct device_node *dn)
+{
+        u32 lsi_buid, msi_buid, msi_base, msi_count;
+        void __iomem *regs;
+        const u32 *p;
+        int rc, len, i;
+        u64 caps, buid;
+        p = of_get_property(dn, "interrupt-ranges", &len);
+        if (!p || len < (2 * sizeof(u32))) {
+                pr_err("wsp_ics: No/bad interrupt-ranges found on %s\n",
+                        dn->full_name);
+                return -ENOENT;
+        }
+        if (len > (2 * sizeof(u32))) {
+                pr_err("wsp_ics: Multiple ics ranges not supported.\n");
+                return -EINVAL;
+        }
+        regs = of_iomap(dn, 0);
+        if (!regs) {
+                pr_err("wsp_ics: of_iomap(%s) failed\n", dn->full_name);
+                return -ENXIO;
+        }
+        ics->hwirq_start = of_read_number(p, 1);
+        ics->count = of_read_number(p + 1, 1);
+        ics->regs = regs;
+        ics->chip_id = wsp_get_chip_id(dn);
+        if (WARN_ON(ics->chip_id < 0))
+                ics->chip_id = 0;
+        /* Get some informations about the critter */
+        caps = in_be64(ICS_INT_CAPS_REG(ics->regs));
+        buid = in_be64(INT_SRC_LAYER_BUID_REG(ics->regs));
+        ics->lsi_count = caps >> 56;
+        msi_count = (caps >> 44) & 0x7ff;
+        /* Note: LSI BUID is 9 bits, but really only 3 are BUID and the
+         * rest is mixed in the interrupt number. We store the whole
+         * thing though
+         */
+        lsi_buid = (buid >> 48) & 0x1ff;
+        ics->lsi_base = (ics->chip_id << WSP_ICS_CHIP_SHIFT) | lsi_buid << 5;
+        msi_buid = (buid >> 37) & 0x7;
+        msi_base = (ics->chip_id << WSP_ICS_CHIP_SHIFT) | msi_buid << 11;
+        pr_info("wsp_ics: Found %s\n", dn->full_name);
+        pr_info("wsp_ics:    irq range : 0x%06llx..0x%06llx\n",
+                ics->hwirq_start, ics->hwirq_start + ics->count - 1);
+        pr_info("wsp_ics:    %4d LSIs : 0x%06x..0x%06x\n",
+                ics->lsi_count, ics->lsi_base,
+                ics->lsi_base + ics->lsi_count - 1);
+        pr_info("wsp_ics:    %4d MSIs : 0x%06x..0x%06x\n",
+                msi_count, msi_base,
+                msi_base + msi_count - 1);
+        /* Let's check the HW config is sane */
+        if (ics->lsi_base < ics->hwirq_start ||
+            (ics->lsi_base + ics->lsi_count) > (ics->hwirq_start + ics->count))
+                pr_warning("wsp_ics: WARNING ! LSIs out of interrupt-ranges !\n");
+        if (msi_base < ics->hwirq_start ||
+            (msi_base + msi_count) > (ics->hwirq_start + ics->count))
+                pr_warning("wsp_ics: WARNING ! MSIs out of interrupt-ranges !\n");
+        /* We don't check for overlap between LSI and MSI, which will happen
+         * if we use the same BUID, I'm not sure yet how legit that is.
+         */
+        rc = wsp_ics_bitmap_setup(ics, dn);
+        if (rc) {
+                iounmap(regs);
+                return rc;
+        }
+        ics->dn = of_node_get(dn);
+        alloc_irq_map(ics);
+        for(i = 0; i < ics->count; i++)
+                wsp_mask_real_irq(ics->hwirq_start + i, ics);
+        ics->ics.map = wsp_ics_map;
+        ics->ics.mask_unknown = wsp_ics_mask_unknown;
+        ics->ics.get_server = wsp_ics_get_server;
+        ics->ics.host_match = wsp_ics_host_match;
+        xics_register_ics(&ics->ics);
+        return 0;
+}
+static void __init wsp_ics_set_default_server(void)
+{
+        struct device_node *np;
+        u32 hwid;
+        /* Find the server number for the boot cpu. */
+        np = of_get_cpu_node(boot_cpuid, NULL);
+        BUG_ON(!np);
+        hwid = get_hard_smp_processor_id(boot_cpuid);
+        pr_info("wsp_ics: default server is %#x, CPU %s\n", hwid, np->full_name);
+        xics_default_server = hwid;
+        of_node_put(np);
+}
+static int __init wsp_ics_init(void)
+{
+        struct device_node *dn;
+        struct wsp_ics *ics;
+        int rc, found;
+        wsp_ics_set_default_server();
+        found = 0;
+        for_each_compatible_node(dn, NULL, "ibm,ppc-xics")
+                found++;
+        if (found == 0) {
+                pr_err("wsp_ics: No ICS's found!\n");
+                return -ENODEV;
+        }
+        ics_list = kmalloc(sizeof(*ics) * found, GFP_KERNEL);
+        if (!ics_list) {
+                pr_err("wsp_ics: No memory for structs.\n");
+                return -ENOMEM;
+        }
+        num_ics = 0;
+        ics = ics_list;
+        for_each_compatible_node(dn, NULL, "ibm,wsp-xics") {
+                rc = wsp_ics_setup(ics, dn);
+                if (rc == 0) {
+                        ics++;
+                        num_ics++;
+                }
+        }
+        if (found != num_ics) {
+                pr_err("wsp_ics: Failed setting up %d ICS's\n",
+                        found - num_ics);
+                return -1;
+        }
+        return 0;
+}
+void __init wsp_init_irq(void)
+{
+        wsp_ics_init();
+        xics_init();
+        /* We need to patch our irq chip's EOI to point to the right ICP */
+        wsp_irq_chip.irq_eoi = icp_ops->eoi;
+}
diff --git a/arch/powerpc/platforms/wsp/ics.h b/arch/powerpc/platforms/wsp/ics.h
new file mode 100644
index 000000000000..e34d53102640
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/ics.h
@@ -0,0 +1,20 @@
+/*
+ * Copyright 2009 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#ifndef __ICS_H
+#define __ICS_H
+#define XIVE_ADDR_MASK          0x7FFULL
+extern void wsp_init_irq(void);
+extern int wsp_ics_alloc_irq(struct device_node *dn, int num);
+extern void wsp_ics_free_irq(struct device_node *dn, unsigned int irq);
+#endif /* __ICS_H */
diff --git a/arch/powerpc/platforms/wsp/opb_pic.c b/arch/powerpc/platforms/wsp/opb_pic.c
new file mode 100644
index 000000000000..be05631a3c1c
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/opb_pic.c
@@ -0,0 +1,332 @@
+/*
+ * IBM Onboard Peripheral Bus Interrupt Controller
+ *
+ * Copyright 2010 Jack Miller, IBM Corporation.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ */
+#include <linux/interrupt.h>
+#include <linux/io.h>
+#include <linux/irq.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/time.h>
+#include <asm/reg_a2.h>
+#include <asm/irq.h>
+#define OPB_NR_IRQS 32
+#define OPB_MLSASIER    0x04    /* MLS Accumulated Status IER */
+#define OPB_MLSIR       0x50    /* MLS Interrupt Register */
+#define OPB_MLSIER      0x54    /* MLS Interrupt Enable Register */
+#define OPB_MLSIPR      0x58    /* MLS Interrupt Polarity Register */
+#define OPB_MLSIIR      0x5c    /* MLS Interrupt Inputs Register */
+static int opb_index = 0;
+struct opb_pic {
+        struct irq_host *host;
+        void *regs;
+        int index;
+        spinlock_t lock;
+};
+static u32 opb_in(struct opb_pic *opb, int offset)
+{
+        return in_be32(opb->regs + offset);
+}
+static void opb_out(struct opb_pic *opb, int offset, u32 val)
+{
+        out_be32(opb->regs + offset, val);
+}
+static void opb_unmask_irq(struct irq_data *d)
+{
+        struct opb_pic *opb;
+        unsigned long flags;
+        u32 ier, bitset;
+        opb = d->chip_data;
+        bitset = (1 << (31 - irqd_to_hwirq(d)));
+        spin_lock_irqsave(&opb->lock, flags);
+        ier = opb_in(opb, OPB_MLSIER);
+        opb_out(opb, OPB_MLSIER, ier | bitset);
+        ier = opb_in(opb, OPB_MLSIER);
+        spin_unlock_irqrestore(&opb->lock, flags);
+}
+static void opb_mask_irq(struct irq_data *d)
+{
+        struct opb_pic *opb;
+        unsigned long flags;
+        u32 ier, mask;
+        opb = d->chip_data;
+        mask = ~(1 << (31 - irqd_to_hwirq(d)));
+        spin_lock_irqsave(&opb->lock, flags);
+        ier = opb_in(opb, OPB_MLSIER);
+        opb_out(opb, OPB_MLSIER, ier & mask);
+        ier = opb_in(opb, OPB_MLSIER); // Flush posted writes
+        spin_unlock_irqrestore(&opb->lock, flags);
+}
+static void opb_ack_irq(struct irq_data *d)
+{
+        struct opb_pic *opb;
+        unsigned long flags;
+        u32 bitset;
+        opb = d->chip_data;
+        bitset = (1 << (31 - irqd_to_hwirq(d)));
+        spin_lock_irqsave(&opb->lock, flags);
+        opb_out(opb, OPB_MLSIR, bitset);
+        opb_in(opb, OPB_MLSIR); // Flush posted writes
+        spin_unlock_irqrestore(&opb->lock, flags);
+}
+static void opb_mask_ack_irq(struct irq_data *d)
+{
+        struct opb_pic *opb;
+        unsigned long flags;
+        u32 bitset;
+        u32 ier, ir;
+        opb = d->chip_data;
+        bitset = (1 << (31 - irqd_to_hwirq(d)));
+        spin_lock_irqsave(&opb->lock, flags);
+        ier = opb_in(opb, OPB_MLSIER);
+        opb_out(opb, OPB_MLSIER, ier & ~bitset);
+        ier = opb_in(opb, OPB_MLSIER); // Flush posted writes
+        opb_out(opb, OPB_MLSIR, bitset);
+        ir = opb_in(opb, OPB_MLSIR); // Flush posted writes
+        spin_unlock_irqrestore(&opb->lock, flags);
+}
+static int opb_set_irq_type(struct irq_data *d, unsigned int flow)
+{
+        struct opb_pic *opb;
+        unsigned long flags;
+        int invert, ipr, mask, bit;
+        opb = d->chip_data;
+        /* The only information we're interested in in the type is whether it's
+         * a high or low trigger. For high triggered interrupts, the polarity
+         * set for it in the MLS Interrupt Polarity Register is 0, for low
+         * interrupts it's 1 so that the proper input in the MLS Interrupt Input
+         * Register is interrupted as asserting the interrupt. */
+        switch (flow) {
+                case IRQ_TYPE_NONE:
+                        opb_mask_irq(d);
+                        return 0;
+                case IRQ_TYPE_LEVEL_HIGH:
+                        invert = 0;
+                        break;
+                case IRQ_TYPE_LEVEL_LOW:
+                        invert = 1;
+                        break;
+                default:
+                        return -EINVAL;
+        }
+        bit = (1 << (31 - irqd_to_hwirq(d)));
+        mask = ~bit;
+        spin_lock_irqsave(&opb->lock, flags);
+        ipr = opb_in(opb, OPB_MLSIPR);
+        ipr = (ipr & mask) | (invert ? bit : 0);
+        opb_out(opb, OPB_MLSIPR, ipr);
+        ipr = opb_in(opb, OPB_MLSIPR);  // Flush posted writes
+        spin_unlock_irqrestore(&opb->lock, flags);
+        /* Record the type in the interrupt descriptor */
+        irqd_set_trigger_type(d, flow);
+        return 0;
+}
+static struct irq_chip opb_irq_chip = {
+        .name           = "OPB",
+        .irq_mask       = opb_mask_irq,
+        .irq_unmask     = opb_unmask_irq,
+        .irq_mask_ack   = opb_mask_ack_irq,
+        .irq_ack        = opb_ack_irq,
+        .irq_set_type   = opb_set_irq_type
+};
+static int opb_host_map(struct irq_host *host, unsigned int virq,
+                irq_hw_number_t hwirq)
+{
+        struct opb_pic *opb;
+        opb = host->host_data;
+        /* Most of the important stuff is handled by the generic host code, like
+         * the lookup, so just attach some info to the virtual irq */
+        irq_set_chip_data(virq, opb);
+        irq_set_chip_and_handler(virq, &opb_irq_chip, handle_level_irq);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
+        return 0;
+}
+static int opb_host_xlate(struct irq_host *host, struct device_node *dn,
+                const u32 *intspec, unsigned int intsize,
+                irq_hw_number_t *out_hwirq, unsigned int *out_type)
+{
+        /* Interrupt size must == 2 */
+        BUG_ON(intsize != 2);
+        *out_hwirq = intspec[0];
+        *out_type = intspec[1];
+        return 0;
+}
+static struct irq_host_ops opb_host_ops = {
+        .map = opb_host_map,
+        .xlate = opb_host_xlate,
+};
+irqreturn_t opb_irq_handler(int irq, void *private)
+{
+        struct opb_pic *opb;
+        u32 ir, src, subvirq;
+        opb = (struct opb_pic *) private;
+        /* Read the OPB MLS Interrupt Register for
+         * asserted interrupts */
+        ir = opb_in(opb, OPB_MLSIR);
+        if (!ir)
+                return IRQ_NONE;
+        do {
+                /* Get 1 - 32 source, *NOT* bit */
+                src = 32 - ffs(ir);
+                /* Translate from the OPB's conception of interrupt number to
+                 * Linux's virtual IRQ */
+                subvirq = irq_linear_revmap(opb->host, src);
+                generic_handle_irq(subvirq);
+        } while ((ir = opb_in(opb, OPB_MLSIR)));
+        return IRQ_HANDLED;
+}
+struct opb_pic *opb_pic_init_one(struct device_node *dn)
+{
+        struct opb_pic *opb;
+        struct resource res;
+        if (of_address_to_resource(dn, 0, &res)) {
+                printk(KERN_ERR "opb: Couldn't translate resource\n");
+                return  NULL;
+        }
+        opb = kzalloc(sizeof(struct opb_pic), GFP_KERNEL);
+        if (!opb) {
+                printk(KERN_ERR "opb: Failed to allocate opb struct!\n");
+                return NULL;
+        }
+        /* Get access to the OPB MMIO registers */
+        opb->regs = ioremap(res.start + 0x10000, 0x1000);
+        if (!opb->regs) {
+                printk(KERN_ERR "opb: Failed to allocate register space!\n");
+                goto free_opb;
+        }
+        /* Allocate an irq host so that Linux knows that despite only
+         * having one interrupt to issue, we're the controller for multiple
+         * hardware IRQs, so later we can lookup their virtual IRQs. */
+        opb->host = irq_alloc_host(dn, IRQ_HOST_MAP_LINEAR,
+                        OPB_NR_IRQS, &opb_host_ops, -1);
+        if (!opb->host) {
+                printk(KERN_ERR "opb: Failed to allocate IRQ host!\n");
+                goto free_regs;
+        }
+        opb->index = opb_index++;
+        spin_lock_init(&opb->lock);
+        opb->host->host_data = opb;
+        /* Disable all interrupts by default */
+        opb_out(opb, OPB_MLSASIER, 0);
+        opb_out(opb, OPB_MLSIER, 0);
+        /* ACK any interrupts left by FW */
+        opb_out(opb, OPB_MLSIR, 0xFFFFFFFF);
+        return opb;
+free_regs:
+        iounmap(opb->regs);
+free_opb:
+        kfree(opb);
+        return NULL;
+}
+void __init opb_pic_init(void)
+{
+        struct device_node *dn;
+        struct opb_pic *opb;
+        int virq;
+        int rc;
+        /* Call init_one for each OPB device */
+        for_each_compatible_node(dn, NULL, "ibm,opb") {
+                /* Fill in an OPB struct */
+                opb = opb_pic_init_one(dn);
+                if (!opb) {
+                        printk(KERN_WARNING "opb: Failed to init node, skipped!\n");
+                        continue;
+                }
+                /* Map / get opb's hardware virtual irq */
+                virq = irq_of_parse_and_map(dn, 0);
+                if (virq <= 0) {
+                        printk("opb: irq_op_parse_and_map failed!\n");
+                        continue;
+                }
+                /* Attach opb interrupt handler to new virtual IRQ */
+                rc = request_irq(virq, opb_irq_handler, 0, "OPB LS Cascade", opb);
+                if (rc) {
+                        printk("opb: request_irq failed: %d\n", rc);
+                        continue;
+                }
+                printk("OPB%d init with %d IRQs at %p\n", opb->index,
+                                OPB_NR_IRQS, opb->regs);
+        }
+}
diff --git a/arch/powerpc/platforms/wsp/psr2.c b/arch/powerpc/platforms/wsp/psr2.c
new file mode 100644
index 000000000000..40f28916ff6c
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/psr2.c
@@ -0,0 +1,95 @@
+/*
+ * Copyright 2008-2011, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/delay.h>
+#include <linux/init.h>
+#include <linux/irq.h>
+#include <linux/kernel.h>
+#include <linux/mm.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+#include <asm/machdep.h>
+#include <asm/system.h>
+#include <asm/time.h>
+#include <asm/udbg.h>
+#include "ics.h"
+#include "wsp.h"
+static void psr2_spin(void)
+{
+        hard_irq_disable();
+        for (;;) ;
+}
+static void psr2_restart(char *cmd)
+{
+        psr2_spin();
+}
+static int psr2_probe_devices(void)
+{
+        struct device_node *np;
+        /* Our RTC is a ds1500. It seems to be programatically compatible
+         * with the ds1511 for which we have a driver so let's use that
+         */
+        np = of_find_compatible_node(NULL, NULL, "dallas,ds1500");
+        if (np != NULL) {
+                struct resource res;
+                if (of_address_to_resource(np, 0, &res) == 0)
+                        platform_device_register_simple("ds1511", 0, &res, 1);
+        }
+        return 0;
+}
+machine_arch_initcall(psr2_md, psr2_probe_devices);
+static void __init psr2_setup_arch(void)
+{
+        /* init to some ~sane value until calibrate_delay() runs */
+        loops_per_jiffy = 50000000;
+        scom_init_wsp();
+        /* Setup SMP callback */
+#ifdef CONFIG_SMP
+        a2_setup_smp();
+#endif
+}
+static int __init psr2_probe(void)
+{
+        unsigned long root = of_get_flat_dt_root();
+        if (!of_flat_dt_is_compatible(root, "ibm,psr2"))
+                return 0;
+        return 1;
+}
+static void __init psr2_init_irq(void)
+{
+        wsp_init_irq();
+        opb_pic_init();
+}
+define_machine(psr2_md) {
+        .name                   = "PSR2 A2",
+        .probe                  = psr2_probe,
+        .setup_arch             = psr2_setup_arch,
+        .restart                = psr2_restart,
+        .power_off              = psr2_spin,
+        .halt                   = psr2_spin,
+        .calibrate_decr         = generic_calibrate_decr,
+        .init_IRQ               = psr2_init_irq,
+        .progress               = udbg_progress,
+        .power_save             = book3e_idle,
+};
diff --git a/arch/powerpc/platforms/wsp/scom_smp.c b/arch/powerpc/platforms/wsp/scom_smp.c
new file mode 100644
index 000000000000..141e78032097
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/scom_smp.c
@@ -0,0 +1,427 @@
+/*
+ * SCOM support for A2 platforms
+ *
+ * Copyright 2007-2011 Benjamin Herrenschmidt, David Gibson,
+ *                     Michael Ellerman, IBM Corp.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/cpumask.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <asm/cputhreads.h>
+#include <asm/reg_a2.h>
+#include <asm/scom.h>
+#include <asm/udbg.h>
+#include "wsp.h"
+#define SCOM_RAMC               0x2a            /* Ram Command */
+#define SCOM_RAMC_TGT1_EXT      0x80000000
+#define SCOM_RAMC_SRC1_EXT      0x40000000
+#define SCOM_RAMC_SRC2_EXT      0x20000000
+#define SCOM_RAMC_SRC3_EXT      0x10000000
+#define SCOM_RAMC_ENABLE        0x00080000
+#define SCOM_RAMC_THREADSEL     0x00060000
+#define SCOM_RAMC_EXECUTE       0x00010000
+#define SCOM_RAMC_MSR_OVERRIDE  0x00008000
+#define SCOM_RAMC_MSR_PR        0x00004000
+#define SCOM_RAMC_MSR_GS        0x00002000
+#define SCOM_RAMC_FORCE         0x00001000
+#define SCOM_RAMC_FLUSH         0x00000800
+#define SCOM_RAMC_INTERRUPT     0x00000004
+#define SCOM_RAMC_ERROR         0x00000002
+#define SCOM_RAMC_DONE          0x00000001
+#define SCOM_RAMI               0x29            /* Ram Instruction */
+#define SCOM_RAMIC              0x28            /* Ram Instruction and Command */
+#define SCOM_RAMIC_INSN         0xffffffff00000000
+#define SCOM_RAMD               0x2d            /* Ram Data */
+#define SCOM_RAMDH              0x2e            /* Ram Data High */
+#define SCOM_RAMDL              0x2f            /* Ram Data Low */
+#define SCOM_PCCR0              0x33            /* PC Configuration Register 0 */
+#define SCOM_PCCR0_ENABLE_DEBUG 0x80000000
+#define SCOM_PCCR0_ENABLE_RAM   0x40000000
+#define SCOM_THRCTL             0x30            /* Thread Control and Status */
+#define SCOM_THRCTL_T0_STOP     0x80000000
+#define SCOM_THRCTL_T1_STOP     0x40000000
+#define SCOM_THRCTL_T2_STOP     0x20000000
+#define SCOM_THRCTL_T3_STOP     0x10000000
+#define SCOM_THRCTL_T0_STEP     0x08000000
+#define SCOM_THRCTL_T1_STEP     0x04000000
+#define SCOM_THRCTL_T2_STEP     0x02000000
+#define SCOM_THRCTL_T3_STEP     0x01000000
+#define SCOM_THRCTL_T0_RUN      0x00800000
+#define SCOM_THRCTL_T1_RUN      0x00400000
+#define SCOM_THRCTL_T2_RUN      0x00200000
+#define SCOM_THRCTL_T3_RUN      0x00100000
+#define SCOM_THRCTL_T0_PM       0x00080000
+#define SCOM_THRCTL_T1_PM       0x00040000
+#define SCOM_THRCTL_T2_PM       0x00020000
+#define SCOM_THRCTL_T3_PM       0x00010000
+#define SCOM_THRCTL_T0_UDE      0x00008000
+#define SCOM_THRCTL_T1_UDE      0x00004000
+#define SCOM_THRCTL_T2_UDE      0x00002000
+#define SCOM_THRCTL_T3_UDE      0x00001000
+#define SCOM_THRCTL_ASYNC_DIS   0x00000800
+#define SCOM_THRCTL_TB_DIS      0x00000400
+#define SCOM_THRCTL_DEC_DIS     0x00000200
+#define SCOM_THRCTL_AND         0x31            /* Thread Control and Status */
+#define SCOM_THRCTL_OR          0x32            /* Thread Control and Status */
+static DEFINE_PER_CPU(scom_map_t, scom_ptrs);
+static scom_map_t get_scom(int cpu, struct device_node *np, int *first_thread)
+{
+        scom_map_t scom = per_cpu(scom_ptrs, cpu);
+        int tcpu;
+        if (scom_map_ok(scom)) {
+                *first_thread = 0;
+                return scom;
+        }
+        *first_thread = 1;
+        scom = scom_map_device(np, 0);
+        for (tcpu = cpu_first_thread_sibling(cpu);
+             tcpu <= cpu_last_thread_sibling(cpu); tcpu++)
+                per_cpu(scom_ptrs, tcpu) = scom;
+        /* Hack: for the boot core, this will actually get called on
+         * the second thread up, not the first so our test above will
+         * set first_thread incorrectly. */
+        if (cpu_first_thread_sibling(cpu) == 0)
+                *first_thread = 0;
+        return scom;
+}
+static int a2_scom_ram(scom_map_t scom, int thread, u32 insn, int extmask)
+{
+        u64 cmd, mask, val;
+        int n = 0;
+        cmd = ((u64)insn << 32) | (((u64)extmask & 0xf) << 28)
+                | ((u64)thread << 17) | SCOM_RAMC_ENABLE | SCOM_RAMC_EXECUTE;
+        mask = SCOM_RAMC_DONE | SCOM_RAMC_INTERRUPT | SCOM_RAMC_ERROR;
+        scom_write(scom, SCOM_RAMIC, cmd);
+        while (!((val = scom_read(scom, SCOM_RAMC)) & mask)) {
+                pr_devel("Waiting on RAMC = 0x%llx\n", val);
+                if (++n == 3) {
+                        pr_err("RAMC timeout on instruction 0x%08x, thread %d\n",
+                               insn, thread);
+                        return -1;
+                }
+        }
+        if (val & SCOM_RAMC_INTERRUPT) {
+                pr_err("RAMC interrupt on instruction 0x%08x, thread %d\n",
+                       insn, thread);
+                return -SCOM_RAMC_INTERRUPT;
+        }
+        if (val & SCOM_RAMC_ERROR) {
+                pr_err("RAMC error on instruction 0x%08x, thread %d\n",
+                       insn, thread);
+                return -SCOM_RAMC_ERROR;
+        }
+        return 0;
+}
+static int a2_scom_getgpr(scom_map_t scom, int thread, int gpr, int alt,
+                          u64 *out_gpr)
+{
+        int rc;
+        /* or rN, rN, rN */
+        u32 insn = 0x7c000378 | (gpr << 21) | (gpr << 16) | (gpr << 11);
+        rc = a2_scom_ram(scom, thread, insn, alt ? 0xf : 0x0);
+        if (rc)
+                return rc;
+        *out_gpr = scom_read(scom, SCOM_RAMD);
+        return 0;
+}
+static int a2_scom_getspr(scom_map_t scom, int thread, int spr, u64 *out_spr)
+{
+        int rc, sprhi, sprlo;
+        u32 insn;
+        sprhi = spr >> 5;
+        sprlo = spr & 0x1f;
+        insn = 0x7c2002a6 | (sprlo << 16) | (sprhi << 11); /* mfspr r1,spr */
+        if (spr == 0x0ff0)
+                insn = 0x7c2000a6; /* mfmsr r1 */
+        rc = a2_scom_ram(scom, thread, insn, 0xf);
+        if (rc)
+                return rc;
+        return a2_scom_getgpr(scom, thread, 1, 1, out_spr);
+}
+static int a2_scom_setgpr(scom_map_t scom, int thread, int gpr,
+                          int alt, u64 val)
+{
+        u32 lis = 0x3c000000 | (gpr << 21);
+        u32 li = 0x38000000 | (gpr << 21);
+        u32 oris = 0x64000000 | (gpr << 21) | (gpr << 16);
+        u32 ori = 0x60000000 | (gpr << 21) | (gpr << 16);
+        u32 rldicr32 = 0x780007c6 | (gpr << 21) | (gpr << 16);
+        u32 highest = val >> 48;
+        u32 higher = (val >> 32) & 0xffff;
+        u32 high = (val >> 16) & 0xffff;
+        u32 low = val & 0xffff;
+        int lext = alt ? 0x8 : 0x0;
+        int oext = alt ? 0xf : 0x0;
+        int rc = 0;
+        if (highest)
+                rc |= a2_scom_ram(scom, thread, lis | highest, lext);
+        if (higher) {
+                if (highest)
+                        rc |= a2_scom_ram(scom, thread, oris | higher, oext);
+                else
+                        rc |= a2_scom_ram(scom, thread, li | higher, lext);
+        }
+        if (highest || higher)
+                rc |= a2_scom_ram(scom, thread, rldicr32, oext);
+        if (high) {
+                if (highest || higher)
+                        rc |= a2_scom_ram(scom, thread, oris | high, oext);
+                else
+                        rc |= a2_scom_ram(scom, thread, lis | high, lext);
+        }
+        if (highest || higher || high)
+                rc |= a2_scom_ram(scom, thread, ori | low, oext);
+        else
+                rc |= a2_scom_ram(scom, thread, li | low, lext);
+        return rc;
+}
+static int a2_scom_setspr(scom_map_t scom, int thread, int spr, u64 val)
+{
+        int sprhi = spr >> 5;
+        int sprlo = spr & 0x1f;
+        /* mtspr spr, r1 */
+        u32 insn = 0x7c2003a6 | (sprlo << 16) | (sprhi << 11);
+        if (spr == 0x0ff0)
+                insn = 0x7c200124; /* mtmsr r1 */
+        if (a2_scom_setgpr(scom, thread, 1, 1, val))
+                return -1;
+        return a2_scom_ram(scom, thread, insn, 0xf);
+}
+static int a2_scom_initial_tlb(scom_map_t scom, int thread)
+{
+        extern u32 a2_tlbinit_code_start[], a2_tlbinit_code_end[];
+        extern u32 a2_tlbinit_after_iprot_flush[];
+        extern u32 a2_tlbinit_after_linear_map[];
+        u32 assoc, entries, i;
+        u64 epn, tlbcfg;
+        u32 *p;
+        int rc;
+        /* Invalidate all entries (including iprot) */
+        rc = a2_scom_getspr(scom, thread, SPRN_TLB0CFG, &tlbcfg);
+        if (rc)
+                goto scom_fail;
+        entries = tlbcfg & TLBnCFG_N_ENTRY;
+        assoc = (tlbcfg & TLBnCFG_ASSOC) >> 24;
+        epn = 0;
+        /* Set MMUCR2 to enable 4K, 64K, 1M, 16M and 1G pages */
+        a2_scom_setspr(scom, thread, SPRN_MMUCR2, 0x000a7531);
+        /* Set MMUCR3 to write all thids bit to the TLB */
+        a2_scom_setspr(scom, thread, SPRN_MMUCR3, 0x0000000f);
+        /* Set MAS1 for 1G page size, and MAS2 to our initial EPN */
+        a2_scom_setspr(scom, thread, SPRN_MAS1, MAS1_TSIZE(BOOK3E_PAGESZ_1GB));
+        a2_scom_setspr(scom, thread, SPRN_MAS2, epn);
+        for (i = 0; i < entries; i++) {
+                a2_scom_setspr(scom, thread, SPRN_MAS0, MAS0_ESEL(i % assoc));
+                /* tlbwe */
+                rc = a2_scom_ram(scom, thread, 0x7c0007a4, 0);
+                if (rc)
+                        goto scom_fail;
+                /* Next entry is new address? */
+                if((i + 1) % assoc == 0) {
+                        epn += (1 << 30);
+                        a2_scom_setspr(scom, thread, SPRN_MAS2, epn);
+                }
+        }
+        /* Setup args for linear mapping */
+        rc = a2_scom_setgpr(scom, thread, 3, 0, MAS0_TLBSEL(0));
+        if (rc)
+                goto scom_fail;
+        /* Linear mapping */
+        for (p = a2_tlbinit_code_start; p < a2_tlbinit_after_linear_map; p++) {
+                rc = a2_scom_ram(scom, thread, *p, 0);
+                if (rc)
+                        goto scom_fail;
+        }
+        /*
+         * For the boot thread, between the linear mapping and the debug
+         * mappings there is a loop to flush iprot mappings. Ramming doesn't do
+         * branches, but the secondary threads don't need to be nearly as smart
+         * (i.e. we don't need to worry about invalidating the mapping we're
+         * standing on).
+         */
+        /* Debug mappings. Expects r11 = MAS0 from linear map (set above) */
+        for (p = a2_tlbinit_after_iprot_flush; p < a2_tlbinit_code_end; p++) {
+                rc = a2_scom_ram(scom, thread, *p, 0);
+                if (rc)
+                        goto scom_fail;
+        }
+scom_fail:
+        if (rc)
+                pr_err("Setting up initial TLB failed, err %d\n", rc);
+        if (rc == -SCOM_RAMC_INTERRUPT) {
+                /* Interrupt, dump some status */
+                int rc[10];
+                u64 iar, srr0, srr1, esr, mas0, mas1, mas2, mas7_3, mas8, ccr2;
+                rc[0] = a2_scom_getspr(scom, thread, SPRN_IAR, &iar);
+                rc[1] = a2_scom_getspr(scom, thread, SPRN_SRR0, &srr0);
+                rc[2] = a2_scom_getspr(scom, thread, SPRN_SRR1, &srr1);
+                rc[3] = a2_scom_getspr(scom, thread, SPRN_ESR, &esr);
+                rc[4] = a2_scom_getspr(scom, thread, SPRN_MAS0, &mas0);
+                rc[5] = a2_scom_getspr(scom, thread, SPRN_MAS1, &mas1);
+                rc[6] = a2_scom_getspr(scom, thread, SPRN_MAS2, &mas2);
+                rc[7] = a2_scom_getspr(scom, thread, SPRN_MAS7_MAS3, &mas7_3);
+                rc[8] = a2_scom_getspr(scom, thread, SPRN_MAS8, &mas8);
+                rc[9] = a2_scom_getspr(scom, thread, SPRN_A2_CCR2, &ccr2);
+                pr_err(" -> retreived IAR =0x%llx (err %d)\n", iar, rc[0]);
+                pr_err("    retreived SRR0=0x%llx (err %d)\n", srr0, rc[1]);
+                pr_err("    retreived SRR1=0x%llx (err %d)\n", srr1, rc[2]);
+                pr_err("    retreived ESR =0x%llx (err %d)\n", esr, rc[3]);
+                pr_err("    retreived MAS0=0x%llx (err %d)\n", mas0, rc[4]);
+                pr_err("    retreived MAS1=0x%llx (err %d)\n", mas1, rc[5]);
+                pr_err("    retreived MAS2=0x%llx (err %d)\n", mas2, rc[6]);
+                pr_err("    retreived MS73=0x%llx (err %d)\n", mas7_3, rc[7]);
+                pr_err("    retreived MAS8=0x%llx (err %d)\n", mas8, rc[8]);
+                pr_err("    retreived CCR2=0x%llx (err %d)\n", ccr2, rc[9]);
+        }
+        return rc;
+}
+int __devinit a2_scom_startup_cpu(unsigned int lcpu, int thr_idx,
+                                  struct device_node *np)
+{
+        u64 init_iar, init_msr, init_ccr2;
+        unsigned long start_here;
+        int rc, core_setup;
+        scom_map_t scom;
+        u64 pccr0;
+        scom = get_scom(lcpu, np, &core_setup);
+        if (!scom) {
+                printk(KERN_ERR "Couldn't map SCOM for CPU%d\n", lcpu);
+                return -1;
+        }
+        pr_devel("Bringing up CPU%d using SCOM...\n", lcpu);
+        pccr0 = scom_read(scom, SCOM_PCCR0);
+        scom_write(scom, SCOM_PCCR0, pccr0 | SCOM_PCCR0_ENABLE_DEBUG |
+                                     SCOM_PCCR0_ENABLE_RAM);
+        /* Stop the thead with THRCTL. If we are setting up the TLB we stop all
+         * threads. We also disable asynchronous interrupts while RAMing.
+         */
+        if (core_setup)
+                scom_write(scom, SCOM_THRCTL_OR,
+                              SCOM_THRCTL_T0_STOP |
+                              SCOM_THRCTL_T1_STOP |
+                              SCOM_THRCTL_T2_STOP |
+                              SCOM_THRCTL_T3_STOP |
+                              SCOM_THRCTL_ASYNC_DIS);
+        else
+                scom_write(scom, SCOM_THRCTL_OR, SCOM_THRCTL_T0_STOP >> thr_idx);
+        /* Flush its pipeline just in case */
+        scom_write(scom, SCOM_RAMC, ((u64)thr_idx << 17) |
+                      SCOM_RAMC_FLUSH | SCOM_RAMC_ENABLE);
+        a2_scom_getspr(scom, thr_idx, SPRN_IAR, &init_iar);
+        a2_scom_getspr(scom, thr_idx, 0x0ff0, &init_msr);
+        a2_scom_getspr(scom, thr_idx, SPRN_A2_CCR2, &init_ccr2);
+        /* Set MSR to MSR_CM (0x0ff0 is magic value for MSR_CM) */
+        rc = a2_scom_setspr(scom, thr_idx, 0x0ff0, MSR_CM);
+        if (rc) {
+                pr_err("Failed to set MSR ! err %d\n", rc);
+                return rc;
+        }
+        /* RAM in an sync/isync for the sake of it */
+        a2_scom_ram(scom, thr_idx, 0x7c0004ac, 0);
+        a2_scom_ram(scom, thr_idx, 0x4c00012c, 0);
+        if (core_setup) {
+                pr_devel("CPU%d is first thread in core, initializing TLB...\n",
+                         lcpu);
+                rc = a2_scom_initial_tlb(scom, thr_idx);
+                if (rc)
+                        goto fail;
+        }
+        start_here = *(unsigned long *)(core_setup ? generic_secondary_smp_init
+                                        : generic_secondary_thread_init);
+        pr_devel("CPU%d entry point at 0x%lx...\n", lcpu, start_here);
+        rc |= a2_scom_setspr(scom, thr_idx, SPRN_IAR, start_here);
+        rc |= a2_scom_setgpr(scom, thr_idx, 3, 0,
+                             get_hard_smp_processor_id(lcpu));
+        /*
+         * Tell book3e_secondary_core_init not to set up the TLB, we've
+         * already done that.
+         */
+        rc |= a2_scom_setgpr(scom, thr_idx, 4, 0, 1);
+        rc |= a2_scom_setspr(scom, thr_idx, SPRN_TENS, 0x1 << thr_idx);
+        scom_write(scom, SCOM_RAMC, 0);
+        scom_write(scom, SCOM_THRCTL_AND, ~(SCOM_THRCTL_T0_STOP >> thr_idx));
+        scom_write(scom, SCOM_PCCR0, pccr0);
+fail:
+        pr_devel("  SCOM initialization %s\n", rc ? "failed" : "succeeded");
+        if (rc) {
+                pr_err("Old IAR=0x%08llx MSR=0x%08llx CCR2=0x%08llx\n",
+                       init_iar, init_msr, init_ccr2);
+        }
+        return rc;
+}
diff --git a/arch/powerpc/platforms/wsp/scom_wsp.c b/arch/powerpc/platforms/wsp/scom_wsp.c
new file mode 100644
index 000000000000..4052e2259f30
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/scom_wsp.c
@@ -0,0 +1,77 @@
+/*
+ *  SCOM backend for WSP
+ *
+ *  Copyright 2010 Benjamin Herrenschmidt, IBM Corp.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ */
+#include <linux/cpumask.h>
+#include <linux/io.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <linux/types.h>
+#include <asm/cputhreads.h>
+#include <asm/reg_a2.h>
+#include <asm/scom.h>
+#include <asm/udbg.h>
+#include "wsp.h"
+static scom_map_t wsp_scom_map(struct device_node *dev, u64 reg, u64 count)
+{
+        struct resource r;
+        u64 xscom_addr;
+        if (!of_get_property(dev, "scom-controller", NULL)) {
+                pr_err("%s: device %s is not a SCOM controller\n",
+                        __func__, dev->full_name);
+                return SCOM_MAP_INVALID;
+        }
+        if (of_address_to_resource(dev, 0, &r)) {
+                pr_debug("Failed to find SCOM controller address\n");
+                return 0;
+        }
+        /* Transform the SCOM address into an XSCOM offset */
+        xscom_addr = ((reg & 0x7f000000) >> 1) | ((reg & 0xfffff) << 3);
+        return (scom_map_t)ioremap(r.start + xscom_addr, count << 3);
+}
+static void wsp_scom_unmap(scom_map_t map)
+{
+        iounmap((void *)map);
+}
+static u64 wsp_scom_read(scom_map_t map, u32 reg)
+{
+        u64 __iomem *addr = (u64 __iomem *)map;
+        return in_be64(addr + reg);
+}
+static void wsp_scom_write(scom_map_t map, u32 reg, u64 value)
+{
+        u64 __iomem *addr = (u64 __iomem *)map;
+        return out_be64(addr + reg, value);
+}
+static const struct scom_controller wsp_scom_controller = {
+        .map    = wsp_scom_map,
+        .unmap  = wsp_scom_unmap,
+        .read   = wsp_scom_read,
+        .write  = wsp_scom_write
+};
+void scom_init_wsp(void)
+{
+        scom_init(&wsp_scom_controller);
+}
diff --git a/arch/powerpc/platforms/wsp/setup.c b/arch/powerpc/platforms/wsp/setup.c
new file mode 100644
index 000000000000..11ac2f05e01c
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/setup.c
@@ -0,0 +1,36 @@
+/*
+ * Copyright 2010 Michael Ellerman, IBM Corporation
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License
+ * as published by the Free Software Foundation; either version
+ * 2 of the License, or (at your option) any later version.
+ */
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include "wsp.h"
+/*
+ * Find chip-id by walking up device tree looking for ibm,wsp-chip-id property.
+ * Won't work for nodes that are not a descendant of a wsp node.
+ */
+int wsp_get_chip_id(struct device_node *dn)
+{
+        const u32 *p;
+        int rc;
+        /* Start looking at the specified node, not its parent */
+        dn = of_node_get(dn);
+        while (dn && !(p = of_get_property(dn, "ibm,wsp-chip-id", NULL)))
+                dn = of_get_next_parent(dn);
+        if (!dn)
+                return -1;
+        rc = *p;
+        of_node_put(dn);
+        return rc;
+}
diff --git a/arch/powerpc/platforms/wsp/smp.c b/arch/powerpc/platforms/wsp/smp.c
new file mode 100644
index 000000000000..9d20fa9d3710
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/smp.c
@@ -0,0 +1,88 @@
+/*
+ *  SMP Support for A2 platforms
+ *
+ *  Copyright 2007 Benjamin Herrenschmidt, IBM Corp.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+#include <linux/cpumask.h>
+#include <linux/init.h>
+#include <linux/kernel.h>
+#include <linux/of.h>
+#include <linux/smp.h>
+#include <asm/dbell.h>
+#include <asm/machdep.h>
+#include <asm/xics.h>
+#include "ics.h"
+#include "wsp.h"
+static void __devinit smp_a2_setup_cpu(int cpu)
+{
+        doorbell_setup_this_cpu();
+        if (cpu != boot_cpuid)
+                xics_setup_cpu();
+}
+int __devinit smp_a2_kick_cpu(int nr)
+{
+        const char *enable_method;
+        struct device_node *np;
+        int thr_idx;
+        if (nr < 0 || nr >= NR_CPUS)
+                return -ENOENT;
+        np = of_get_cpu_node(nr, &thr_idx);
+        if (!np)
+                return -ENODEV;
+        enable_method = of_get_property(np, "enable-method", NULL);
+        pr_devel("CPU%d has enable-method: \"%s\"\n", nr, enable_method);
+        if (!enable_method) {
+                printk(KERN_ERR "CPU%d has no enable-method\n", nr);
+                return -ENOENT;
+        } else if (strcmp(enable_method, "ibm,a2-scom") == 0) {
+                if (a2_scom_startup_cpu(nr, thr_idx, np))
+                        return -1;
+        } else {
+                printk(KERN_ERR "CPU%d: Don't understand enable-method \"%s\"\n",
+                       nr, enable_method);
+                return -EINVAL;
+        }
+        /*
+         * The processor is currently spinning, waiting for the
+         * cpu_start field to become non-zero After we set cpu_start,
+         * the processor will continue on to secondary_start
+         */
+        paca[nr].cpu_start = 1;
+        return 0;
+}
+static int __init smp_a2_probe(void)
+{
+        return cpus_weight(cpu_possible_map);
+}
+static struct smp_ops_t a2_smp_ops = {
+        .message_pass   = smp_muxed_ipi_message_pass,
+        .cause_ipi      = doorbell_cause_ipi,
+        .probe          = smp_a2_probe,
+        .kick_cpu       = smp_a2_kick_cpu,
+        .setup_cpu      = smp_a2_setup_cpu,
+};
+void __init a2_setup_smp(void)
+{
+        smp_ops = &a2_smp_ops;
+}
diff --git a/arch/powerpc/platforms/wsp/wsp.h b/arch/powerpc/platforms/wsp/wsp.h
new file mode 100644
index 000000000000..7c3e087fd2f2
--- /dev/null
+++ b/arch/powerpc/platforms/wsp/wsp.h
@@ -0,0 +1,17 @@
+#ifndef __WSP_H
+#define __WSP_H
+#include <asm/wsp.h>
+extern void wsp_setup_pci(void);
+extern void scom_init_wsp(void);
+extern void a2_setup_smp(void);
+extern int a2_scom_startup_cpu(unsigned int lcpu, int thr_idx,
+                               struct device_node *np);
+int smp_a2_cpu_bootable(unsigned int nr);
+int __devinit smp_a2_kick_cpu(int nr);
+void opb_pic_init(void);
+#endif /*  __WSP_H */
diff --git a/arch/powerpc/sysdev/Kconfig b/arch/powerpc/sysdev/Kconfig
index 396582835cb5..7b4df37ac381 100644
--- a/arch/powerpc/sysdev/Kconfig
+++ b/arch/powerpc/sysdev/Kconfig
@@ -7,8 +7,25 @@ config PPC4xx_PCI_EXPRESS
        depends on PCI && 4xx
        default n
+config PPC4xx_MSI
+        bool
+        depends on PCI_MSI
+        depends on PCI && 4xx
+        default n
 config PPC_MSI_BITMAP
        bool
        depends on PCI_MSI
        default y if MPIC
        default y if FSL_PCI
+        default y if PPC4xx_MSI
+source "arch/powerpc/sysdev/xics/Kconfig"
+config PPC_SCOM
+        bool
+config SCOM_DEBUGFS
+        bool "Expose SCOM controllers via debugfs"
+        depends on PPC_SCOM
+        default n
diff --git a/arch/powerpc/sysdev/Makefile b/arch/powerpc/sysdev/Makefile
index 5642924fb9fb..0efa990e3344 100644
--- a/arch/powerpc/sysdev/Makefile
+++ b/arch/powerpc/sysdev/Makefile
@@ -1,8 +1,6 @@
 subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
-ifeq ($(CONFIG_PPC64),y)
+ccflags-$(CONFIG_PPC64)         := -mno-minimal-toc
-EXTRA_CFLAGS                    += -mno-minimal-toc
-endif
 mpic-msi-obj-$(CONFIG_PCI_MSI)  += mpic_msi.o mpic_u3msi.o mpic_pasemi_msi.o
 obj-$(CONFIG_MPIC)              += mpic.o $(mpic-msi-obj-y)
@@ -20,8 +18,9 @@ obj-$(CONFIG_FSL_PMC)		+= fsl_pmc.o
 obj-$(CONFIG_FSL_LBC)           += fsl_lbc.o
 obj-$(CONFIG_FSL_GTM)           += fsl_gtm.o
 obj-$(CONFIG_MPC8xxx_GPIO)      += mpc8xxx_gpio.o
+obj-$(CONFIG_FSL_85XX_CACHE_SRAM)       += fsl_85xx_l2ctlr.o fsl_85xx_cache_sram.o
 obj-$(CONFIG_SIMPLE_GPIO)       += simple_gpio.o
-obj-$(CONFIG_RAPIDIO)           += fsl_rio.o
+obj-$(CONFIG_FSL_RIO)           += fsl_rio.o
 obj-$(CONFIG_TSI108_BRIDGE)     += tsi108_pci.o tsi108_dev.o
 obj-$(CONFIG_QUICC_ENGINE)      += qe_lib/
 obj-$(CONFIG_PPC_BESTCOMM)      += bestcomm/
@@ -42,6 +41,8 @@ obj-$(CONFIG_OF_RTC)		+= of_rtc.o
 ifeq ($(CONFIG_PCI),y)
 obj-$(CONFIG_4xx)               += ppc4xx_pci.o
 endif
+obj-$(CONFIG_PPC4xx_MSI)        += ppc4xx_msi.o
+obj-$(CONFIG_PPC4xx_CPM)        += ppc4xx_cpm.o
 obj-$(CONFIG_PPC4xx_GPIO)       += ppc4xx_gpio.o
 obj-$(CONFIG_CPM)               += cpm_common.o
@@ -57,3 +58,9 @@ obj-$(CONFIG_PPC_MPC52xx)	+= mpc5xxx_clocks.o
 ifeq ($(CONFIG_SUSPEND),y)
 obj-$(CONFIG_6xx)               += 6xx-suspend.o
 endif
+obj-$(CONFIG_PPC_SCOM)          += scom.o
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+obj-$(CONFIG_PPC_XICS)          += xics/
diff --git a/arch/powerpc/sysdev/axonram.c b/arch/powerpc/sysdev/axonram.c
index 2659a60bd7b8..bd0d54060b94 100644
--- a/arch/powerpc/sysdev/axonram.c
+++ b/arch/powerpc/sysdev/axonram.c
@@ -95,7 +95,7 @@ axon_ram_irq_handler(int irq, void *dev)
        BUG_ON(!bank);
-        dev_err(&device->dev, "Correctable memory error occured\n");
+        dev_err(&device->dev, "Correctable memory error occurred\n");
        bank->ecc_counter++;
        return IRQ_HANDLED;
 }
@@ -172,10 +172,9 @@ static const struct block_device_operations axon_ram_devops = {
 /**
 * axon_ram_probe - probe() method for platform driver
- * @device, @device_id: see of_platform_driver method
+ * @device: see platform_driver method
 */
-static int axon_ram_probe(struct platform_device *device,
+static int axon_ram_probe(struct platform_device *device)
-                          const struct of_device_id *device_id)
 {
        static int axon_ram_bank_id = -1;
        struct axon_ram_bank *bank;
@@ -217,7 +216,7 @@ static int axon_ram_probe(struct platform_device *device,
                        AXON_RAM_DEVICE_NAME, axon_ram_bank_id, bank->size >> 20);
        bank->ph_addr = resource.start;
-        bank->io_addr = (unsigned long) ioremap_flags(
+        bank->io_addr = (unsigned long) ioremap_prot(
                        bank->ph_addr, bank->size, _PAGE_NO_CACHE);
        if (bank->io_addr == 0) {
                dev_err(&device->dev, "ioremap() failed\n");
@@ -326,7 +325,7 @@ static struct of_device_id axon_ram_device_id[] = {
        {}
 };
-static struct of_platform_driver axon_ram_driver = {
+static struct platform_driver axon_ram_driver = {
        .probe          = axon_ram_probe,
        .remove         = axon_ram_remove,
        .driver = {
@@ -350,7 +349,7 @@ axon_ram_init(void)
        }
        azfs_minor = 0;
-        return of_register_platform_driver(&axon_ram_driver);
+        return platform_driver_register(&axon_ram_driver);
 }
 /**
@@ -359,7 +358,7 @@ axon_ram_init(void)
 static void __exit
 axon_ram_exit(void)
 {
-        of_unregister_platform_driver(&axon_ram_driver);
+        platform_driver_unregister(&axon_ram_driver);
        unregister_blkdev(azfs_major, AXON_RAM_DEVICE_NAME);
 }
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.c b/arch/powerpc/sysdev/bestcomm/bestcomm.c
index 650256115064..b3fbb271be87 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.c
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.c
@@ -365,8 +365,7 @@ bcom_engine_cleanup(void)
 /* OF platform driver                                                       */
 /* ======================================================================== */
-static int __devinit mpc52xx_bcom_probe(struct platform_device *op,
+static int __devinit mpc52xx_bcom_probe(struct platform_device *op)
-                                        const struct of_device_id *match)
 {
        struct device_node *ofn_sram;
        struct resource res_bcom;
@@ -492,7 +491,7 @@ static struct of_device_id mpc52xx_bcom_of_match[] = {
 MODULE_DEVICE_TABLE(of, mpc52xx_bcom_of_match);
-static struct of_platform_driver mpc52xx_bcom_of_platform_driver = {
+static struct platform_driver mpc52xx_bcom_of_platform_driver = {
        .probe          = mpc52xx_bcom_probe,
        .remove         = mpc52xx_bcom_remove,
        .driver = {
@@ -510,13 +509,13 @@ static struct of_platform_driver mpc52xx_bcom_of_platform_driver = {
 static int __init
 mpc52xx_bcom_init(void)
 {
-        return of_register_platform_driver(&mpc52xx_bcom_of_platform_driver);
+        return platform_driver_register(&mpc52xx_bcom_of_platform_driver);
 }
 static void __exit
 mpc52xx_bcom_exit(void)
 {
-        of_unregister_platform_driver(&mpc52xx_bcom_of_platform_driver);
+        platform_driver_unregister(&mpc52xx_bcom_of_platform_driver);
 }
 /* If we're not a module, we must make sure everything is setup before  */
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm.h b/arch/powerpc/sysdev/bestcomm/bestcomm.h
index 23a95f80dfdb..a0e2e6b19b57 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm.h
@@ -20,7 +20,7 @@
 * struct bcom_bd - Structure describing a generic BestComm buffer descriptor
 * @status: The current status of this buffer. Exact meaning depends on the
 *          task type
- * @data: An array of u32 extra data.  Size of array is task dependant.
+ * @data: An array of u32 extra data.  Size of array is task dependent.
 *
 * Note: Don't dereference a bcom_bd pointer as an array.  The size of the
 *       bcom_bd is variable.  Use bcom_get_bd() instead.
diff --git a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
index eb0d1c883c31..3b52f3ffbdf8 100644
--- a/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
+++ b/arch/powerpc/sysdev/bestcomm/bestcomm_priv.h
@@ -97,7 +97,7 @@ struct bcom_task_header {
        u8      reserved[8];
 };
-/* Descriptors stucture & co */
+/* Descriptors structure & co */
 #define BCOM_DESC_NOP           0x000001f8
 #define BCOM_LCD_MASK           0x80000000
 #define BCOM_DRD_EXTENDED       0x40000000
diff --git a/arch/powerpc/sysdev/cpm1.c b/arch/powerpc/sysdev/cpm1.c
index 00852124ff4a..350787c83e22 100644
--- a/arch/powerpc/sysdev/cpm1.c
+++ b/arch/powerpc/sysdev/cpm1.c
@@ -56,32 +56,32 @@ static cpic8xx_t __iomem *cpic_reg;
 static struct irq_host *cpm_pic_host;
-static void cpm_mask_irq(unsigned int irq)
+static void cpm_mask_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
        clrbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
 }
-static void cpm_unmask_irq(unsigned int irq)
+static void cpm_unmask_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
        setbits32(&cpic_reg->cpic_cimr, (1 << cpm_vec));
 }
-static void cpm_end_irq(unsigned int irq)
+static void cpm_end_irq(struct irq_data *d)
 {
-        unsigned int cpm_vec = (unsigned int)irq_map[irq].hwirq;
+        unsigned int cpm_vec = (unsigned int)irqd_to_hwirq(d);
        out_be32(&cpic_reg->cpic_cisr, (1 << cpm_vec));
 }
 static struct irq_chip cpm_pic = {
        .name = "CPM PIC",
-        .mask = cpm_mask_irq,
+        .irq_mask = cpm_mask_irq,
-        .unmask = cpm_unmask_irq,
+        .irq_unmask = cpm_unmask_irq,
-        .eoi = cpm_end_irq,
+        .irq_eoi = cpm_end_irq,
 };
 int cpm_get_irq(void)
@@ -103,8 +103,8 @@ static int cpm_pic_host_map(struct irq_host *h, unsigned int virq,
 {
        pr_debug("cpm_pic_host_map(%d, 0x%lx)\n", virq, hw);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
+        irq_set_chip_and_handler(virq, &cpm_pic, handle_fasteoi_irq);
        return 0;
 }
@@ -157,7 +157,7 @@ unsigned int cpm_pic_init(void)
                goto end;
        /* Initialize the CPM interrupt controller. */
-        hwirq = (unsigned int)irq_map[sirq].hwirq;
+        hwirq = (unsigned int)virq_to_hw(sirq);
        out_be32(&cpic_reg->cpic_cicr,
            (CICR_SCD_SCC4 | CICR_SCC_SCC3 | CICR_SCB_SCC2 | CICR_SCA_SCC1) |
                ((hwirq/2) << 13) | CICR_HP_MASK);
@@ -223,7 +223,7 @@ void __init cpm_reset(void)
        /* Set SDMA Bus Request priority 5.
         * On 860T, this also enables FEC priority 6.  I am not sure
-         * this is what we realy want for some applications, but the
+         * this is what we really want for some applications, but the
         * manual recommends it.
         * Bit 25, FAM can also be set to use FEC aggressive mode (860T).
         */
diff --git a/arch/powerpc/sysdev/cpm2_pic.c b/arch/powerpc/sysdev/cpm2_pic.c
index fcea4ff825dd..bcab50e2a9eb 100644
--- a/arch/powerpc/sysdev/cpm2_pic.c
+++ b/arch/powerpc/sysdev/cpm2_pic.c
@@ -78,10 +78,10 @@ static const u_char irq_to_siubit[] = {
        24, 25, 26, 27, 28, 29, 30, 31,
 };
-static void cpm2_mask_irq(unsigned int virq)
+static void cpm2_mask_irq(struct irq_data *d)
 {
        int     bit, word;
-        unsigned int irq_nr = virq_to_hw(virq);
+        unsigned int irq_nr = irqd_to_hwirq(d);
        bit = irq_to_siubit[irq_nr];
        word = irq_to_siureg[irq_nr];
@@ -90,10 +90,10 @@ static void cpm2_mask_irq(unsigned int virq)
        out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
 }
-static void cpm2_unmask_irq(unsigned int virq)
+static void cpm2_unmask_irq(struct irq_data *d)
 {
        int     bit, word;
-        unsigned int irq_nr = virq_to_hw(virq);
+        unsigned int irq_nr = irqd_to_hwirq(d);
        bit = irq_to_siubit[irq_nr];
        word = irq_to_siureg[irq_nr];
@@ -102,10 +102,10 @@ static void cpm2_unmask_irq(unsigned int virq)
        out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
 }
-static void cpm2_ack(unsigned int virq)
+static void cpm2_ack(struct irq_data *d)
 {
        int     bit, word;
-        unsigned int irq_nr = virq_to_hw(virq);
+        unsigned int irq_nr = irqd_to_hwirq(d);
        bit = irq_to_siubit[irq_nr];
        word = irq_to_siureg[irq_nr];
@@ -113,34 +113,27 @@ static void cpm2_ack(unsigned int virq)
        out_be32(&cpm2_intctl->ic_sipnrh + word, 1 << bit);
 }
-static void cpm2_end_irq(unsigned int virq)
+static void cpm2_end_irq(struct irq_data *d)
 {
-        struct irq_desc *desc;
        int     bit, word;
-        unsigned int irq_nr = virq_to_hw(virq);
+        unsigned int irq_nr = irqd_to_hwirq(d);
-        desc = irq_to_desc(irq_nr);
+        bit = irq_to_siubit[irq_nr];
-        if (!(desc->status & (IRQ_DISABLED|IRQ_INPROGRESS))
+        word = irq_to_siureg[irq_nr];
-                        && desc->action) {
-                bit = irq_to_siubit[irq_nr];
-                word = irq_to_siureg[irq_nr];
-                ppc_cached_irq_mask[word] |= 1 << bit;
+        ppc_cached_irq_mask[word] |= 1 << bit;
-                out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
+        out_be32(&cpm2_intctl->ic_simrh + word, ppc_cached_irq_mask[word]);
-                /*
+        /*
-                 * Work around large numbers of spurious IRQs on PowerPC 82xx
+         * Work around large numbers of spurious IRQs on PowerPC 82xx
-                 * systems.
+         * systems.
-                 */
+         */
-                mb();
+        mb();
-        }
 }
-static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int cpm2_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-        unsigned int src = virq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        struct irq_desc *desc = irq_to_desc(virq);
        unsigned int vold, vnew, edibit;
        /* Port C interrupts are either IRQ_TYPE_EDGE_FALLING or
@@ -162,13 +155,11 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
                        goto err_sense;
        }
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+        irqd_set_trigger_type(d, flow_type);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
+        if (flow_type & IRQ_TYPE_LEVEL_LOW)
-        if (flow_type & IRQ_TYPE_LEVEL_LOW)  {
+                __irq_set_handler_locked(d->irq, handle_level_irq);
-                desc->status |= IRQ_LEVEL;
+        else
-                desc->handle_irq = handle_level_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
-        } else
-                desc->handle_irq = handle_edge_irq;
        /* internal IRQ senses are LEVEL_LOW
         * EXT IRQ and Port C IRQ senses are programmable
@@ -179,7 +170,8 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
                if (src >= CPM2_IRQ_PORTC15 && src <= CPM2_IRQ_PORTC0)
                        edibit = (31 - (CPM2_IRQ_PORTC0 - src));
                else
-                        return (flow_type & IRQ_TYPE_LEVEL_LOW) ? 0 : -EINVAL;
+                        return (flow_type & IRQ_TYPE_LEVEL_LOW) ?
+                                IRQ_SET_MASK_OK_NOCOPY : -EINVAL;
        vold = in_be32(&cpm2_intctl->ic_siexr);
@@ -190,7 +182,7 @@ static int cpm2_set_irq_type(unsigned int virq, unsigned int flow_type)
        if (vold != vnew)
                out_be32(&cpm2_intctl->ic_siexr, vnew);
-        return 0;
+        return IRQ_SET_MASK_OK_NOCOPY;
 err_sense:
        pr_err("CPM2 PIC: sense type 0x%x not supported\n", flow_type);
@@ -199,11 +191,12 @@ err_sense:
 static struct irq_chip cpm2_pic = {
        .name = "CPM2 SIU",
-        .mask = cpm2_mask_irq,
+        .irq_mask = cpm2_mask_irq,
-        .unmask = cpm2_unmask_irq,
+        .irq_unmask = cpm2_unmask_irq,
-        .ack = cpm2_ack,
+        .irq_ack = cpm2_ack,
-        .eoi = cpm2_end_irq,
+        .irq_eoi = cpm2_end_irq,
-        .set_type = cpm2_set_irq_type,
+        .irq_set_type = cpm2_set_irq_type,
+        .flags = IRQCHIP_EOI_IF_HANDLED,
 };
 unsigned int cpm2_get_irq(void)
@@ -226,8 +219,8 @@ static int cpm2_pic_host_map(struct irq_host *h, unsigned int virq,
 {
        pr_debug("cpm2_pic_host_map(%d, 0x%lx)\n", virq, hw);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &cpm2_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &cpm2_pic, handle_level_irq);
        return 0;
 }
diff --git a/arch/powerpc/sysdev/dart_iommu.c b/arch/powerpc/sysdev/dart_iommu.c
index 559db2b846a9..8e9e06a7ca59 100644
--- a/arch/powerpc/sysdev/dart_iommu.c
+++ b/arch/powerpc/sysdev/dart_iommu.c
@@ -70,6 +70,8 @@ static int iommu_table_dart_inited;
 static int dart_dirty;
 static int dart_is_u4;
+#define DART_U4_BYPASS_BASE     0x8000000000ull
 #define DBG(...)
 static inline void dart_tlb_invalidate_all(void)
@@ -292,27 +294,67 @@ static void iommu_table_dart_setup(void)
        set_bit(iommu_table_dart.it_size - 1, iommu_table_dart.it_map);
 }
-static void pci_dma_dev_setup_dart(struct pci_dev *dev)
+static void dma_dev_setup_dart(struct device *dev)
 {
        /* We only have one iommu table on the mac for now, which makes
         * things simple. Setup all PCI devices to point to this table
         */
-        set_iommu_table_base(&dev->dev, &iommu_table_dart);
+        if (get_dma_ops(dev) == &dma_direct_ops)
+                set_dma_offset(dev, DART_U4_BYPASS_BASE);
+        else
+                set_iommu_table_base(dev, &iommu_table_dart);
 }
-static void pci_dma_bus_setup_dart(struct pci_bus *bus)
+static void pci_dma_dev_setup_dart(struct pci_dev *dev)
 {
-        struct device_node *dn;
+        dma_dev_setup_dart(&dev->dev);
+}
+static void pci_dma_bus_setup_dart(struct pci_bus *bus)
+{
        if (!iommu_table_dart_inited) {
                iommu_table_dart_inited = 1;
                iommu_table_dart_setup();
        }
+}
-        dn = pci_bus_to_OF_node(bus);
+static bool dart_device_on_pcie(struct device *dev)
+{
+        struct device_node *np = of_node_get(dev->of_node);
+        while(np) {
+                if (of_device_is_compatible(np, "U4-pcie") ||
+                    of_device_is_compatible(np, "u4-pcie")) {
+                        of_node_put(np);
+                        return true;
+                }
+                np = of_get_next_parent(np);
+        }
+        return false;
+}
-        if (dn)
+static int dart_dma_set_mask(struct device *dev, u64 dma_mask)
-                PCI_DN(dn)->iommu_table = &iommu_table_dart;
+{
+        if (!dev->dma_mask || !dma_supported(dev, dma_mask))
+                return -EIO;
+        /* U4 supports a DART bypass, we use it for 64-bit capable
+         * devices to improve performances. However, that only works
+         * for devices connected to U4 own PCIe interface, not bridged
+         * through hypertransport. We need the device to support at
+         * least 40 bits of addresses.
+         */
+        if (dart_device_on_pcie(dev) && dma_mask >= DMA_BIT_MASK(40)) {
+                dev_info(dev, "Using 64-bit DMA iommu bypass\n");
+                set_dma_ops(dev, &dma_direct_ops);
+        } else {
+                dev_info(dev, "Using 32-bit DMA via iommu\n");
+                set_dma_ops(dev, &dma_iommu_ops);
+        }
+        dma_dev_setup_dart(dev);
+        *dev->dma_mask = dma_mask;
+        return 0;
 }
 void __init iommu_init_early_dart(void)
@@ -324,24 +366,29 @@ void __init iommu_init_early_dart(void)
        if (dn == NULL) {
                dn = of_find_compatible_node(NULL, "dart", "u4-dart");
                if (dn == NULL)
-                        goto bail;
+                        return; /* use default direct_dma_ops */
                dart_is_u4 = 1;
        }
+        /* Initialize the DART HW */
+        if (dart_init(dn) != 0)
+                goto bail;
        /* Setup low level TCE operations for the core IOMMU code */
        ppc_md.tce_build = dart_build;
        ppc_md.tce_free  = dart_free;
        ppc_md.tce_flush = dart_flush;
-        /* Initialize the DART HW */
+        /* Setup bypass if supported */
-        if (dart_init(dn) == 0) {
+        if (dart_is_u4)
-                ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart;
+                ppc_md.dma_set_mask = dart_dma_set_mask;
-                ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart;
-                /* Setup pci_dma ops */
+        ppc_md.pci_dma_dev_setup = pci_dma_dev_setup_dart;
-                set_pci_dma_ops(&dma_iommu_ops);
+        ppc_md.pci_dma_bus_setup = pci_dma_bus_setup_dart;
-                return;
-        }
+        /* Setup pci_dma ops */
+        set_pci_dma_ops(&dma_iommu_ops);
+        return;
 bail:
        /* If init failed, use direct iommu and null setup functions */
diff --git a/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h b/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h
new file mode 100644
index 000000000000..60c9c0bd5ba2
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_85xx_cache_ctlr.h
@@ -0,0 +1,101 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc
+ *
+ * QorIQ based Cache Controller Memory Mapped Registers
+ *
+ * Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#ifndef __FSL_85XX_CACHE_CTLR_H__
+#define __FSL_85XX_CACHE_CTLR_H__
+#define L2CR_L2FI               0x40000000      /* L2 flash invalidate */
+#define L2CR_L2IO               0x00200000      /* L2 instruction only */
+#define L2CR_SRAM_ZERO          0x00000000      /* L2SRAM zero size */
+#define L2CR_SRAM_FULL          0x00010000      /* L2SRAM full size */
+#define L2CR_SRAM_HALF          0x00020000      /* L2SRAM half size */
+#define L2CR_SRAM_TWO_HALFS     0x00030000      /* L2SRAM two half sizes */
+#define L2CR_SRAM_QUART         0x00040000      /* L2SRAM one quarter size */
+#define L2CR_SRAM_TWO_QUARTS    0x00050000      /* L2SRAM two quarter size */
+#define L2CR_SRAM_EIGHTH        0x00060000      /* L2SRAM one eighth size */
+#define L2CR_SRAM_TWO_EIGHTH    0x00070000      /* L2SRAM two eighth size */
+#define L2SRAM_OPTIMAL_SZ_SHIFT 0x00000003      /* Optimum size for L2SRAM */
+#define L2SRAM_BAR_MSK_LO18     0xFFFFC000      /* Lower 18 bits */
+#define L2SRAM_BARE_MSK_HI4     0x0000000F      /* Upper 4 bits */
+enum cache_sram_lock_ways {
+        LOCK_WAYS_ZERO,
+        LOCK_WAYS_EIGHTH,
+        LOCK_WAYS_TWO_EIGHTH,
+        LOCK_WAYS_HALF = 4,
+        LOCK_WAYS_FULL = 8,
+};
+struct mpc85xx_l2ctlr {
+        u32     ctl;            /* 0x000 - L2 control */
+        u8      res1[0xC];
+        u32     ewar0;          /* 0x010 - External write address 0 */
+        u32     ewarea0;        /* 0x014 - External write address extended 0 */
+        u32     ewcr0;          /* 0x018 - External write ctrl */
+        u8      res2[4];
+        u32     ewar1;          /* 0x020 - External write address 1 */
+        u32     ewarea1;        /* 0x024 - External write address extended 1 */
+        u32     ewcr1;          /* 0x028 - External write ctrl 1 */
+        u8      res3[4];
+        u32     ewar2;          /* 0x030 - External write address 2 */
+        u32     ewarea2;        /* 0x034 - External write address extended 2 */
+        u32     ewcr2;          /* 0x038 - External write ctrl 2 */
+        u8      res4[4];
+        u32     ewar3;          /* 0x040 - External write address 3 */
+        u32     ewarea3;        /* 0x044 - External write address extended 3 */
+        u32     ewcr3;          /* 0x048 - External write ctrl 3 */
+        u8      res5[0xB4];
+        u32     srbar0;         /* 0x100 - SRAM base address 0 */
+        u32     srbarea0;       /* 0x104 - SRAM base addr reg ext address 0 */
+        u32     srbar1;         /* 0x108 - SRAM base address 1 */
+        u32     srbarea1;       /* 0x10C - SRAM base addr reg ext address 1 */
+        u8      res6[0xCF0];
+        u32     errinjhi;       /* 0xE00 - Error injection mask high */
+        u32     errinjlo;       /* 0xE04 - Error injection mask low */
+        u32     errinjctl;      /* 0xE08 - Error injection tag/ecc control */
+        u8      res7[0x14];
+        u32     captdatahi;     /* 0xE20 - Error data high capture */
+        u32     captdatalo;     /* 0xE24 - Error data low capture */
+        u32     captecc;        /* 0xE28 - Error syndrome */
+        u8      res8[0x14];
+        u32     errdet;         /* 0xE40 - Error detect */
+        u32     errdis;         /* 0xE44 - Error disable */
+        u32     errinten;       /* 0xE48 - Error interrupt enable */
+        u32     errattr;        /* 0xE4c - Error attribute capture */
+        u32     erradrrl;       /* 0xE50 - Error address capture low */
+        u32     erradrrh;       /* 0xE54 - Error address capture high */
+        u32     errctl;         /* 0xE58 - Error control */
+        u8      res9[0x1A4];
+};
+struct sram_parameters {
+        unsigned int sram_size;
+        uint64_t sram_offset;
+};
+extern int instantiate_cache_sram(struct platform_device *dev,
+                struct sram_parameters sram_params);
+extern void remove_cache_sram(struct platform_device *dev);
+#endif /* __FSL_85XX_CACHE_CTLR_H__ */
diff --git a/arch/powerpc/sysdev/fsl_85xx_cache_sram.c b/arch/powerpc/sysdev/fsl_85xx_cache_sram.c
new file mode 100644
index 000000000000..116415899176
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_85xx_cache_sram.c
@@ -0,0 +1,159 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * Simple memory allocator abstraction for QorIQ (P1/P2) based Cache-SRAM
+ *
+ * Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+ *
+ * This file is derived from the original work done
+ * by Sylvain Munaut for the Bestcomm SRAM allocator.
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/slab.h>
+#include <linux/err.h>
+#include <linux/of_platform.h>
+#include <asm/pgtable.h>
+#include <asm/fsl_85xx_cache_sram.h>
+#include "fsl_85xx_cache_ctlr.h"
+struct mpc85xx_cache_sram *cache_sram;
+void *mpc85xx_cache_sram_alloc(unsigned int size,
+                                phys_addr_t *phys, unsigned int align)
+{
+        unsigned long offset;
+        unsigned long flags;
+        if (unlikely(cache_sram == NULL))
+                return NULL;
+        if (!size || (size > cache_sram->size) || (align > cache_sram->size)) {
+                pr_err("%s(): size(=%x) or align(=%x) zero or too big\n",
+                        __func__, size, align);
+                return NULL;
+        }
+        if ((align & (align - 1)) || align <= 1) {
+                pr_err("%s(): align(=%x) must be power of two and >1\n",
+                        __func__, align);
+                return NULL;
+        }
+        spin_lock_irqsave(&cache_sram->lock, flags);
+        offset = rh_alloc_align(cache_sram->rh, size, align, NULL);
+        spin_unlock_irqrestore(&cache_sram->lock, flags);
+        if (IS_ERR_VALUE(offset))
+                return NULL;
+        *phys = cache_sram->base_phys + offset;
+        return (unsigned char *)cache_sram->base_virt + offset;
+}
+EXPORT_SYMBOL(mpc85xx_cache_sram_alloc);
+void mpc85xx_cache_sram_free(void *ptr)
+{
+        unsigned long flags;
+        BUG_ON(!ptr);
+        spin_lock_irqsave(&cache_sram->lock, flags);
+        rh_free(cache_sram->rh, ptr - cache_sram->base_virt);
+        spin_unlock_irqrestore(&cache_sram->lock, flags);
+}
+EXPORT_SYMBOL(mpc85xx_cache_sram_free);
+int __init instantiate_cache_sram(struct platform_device *dev,
+                struct sram_parameters sram_params)
+{
+        int ret = 0;
+        if (cache_sram) {
+                dev_err(&dev->dev, "Already initialized cache-sram\n");
+                return -EBUSY;
+        }
+        cache_sram = kzalloc(sizeof(struct mpc85xx_cache_sram), GFP_KERNEL);
+        if (!cache_sram) {
+                dev_err(&dev->dev, "Out of memory for cache_sram structure\n");
+                return -ENOMEM;
+        }
+        cache_sram->base_phys = sram_params.sram_offset;
+        cache_sram->size = sram_params.sram_size;
+        if (!request_mem_region(cache_sram->base_phys, cache_sram->size,
+                                                "fsl_85xx_cache_sram")) {
+                dev_err(&dev->dev, "%s: request memory failed\n",
+                                dev->dev.of_node->full_name);
+                ret = -ENXIO;
+                goto out_free;
+        }
+        cache_sram->base_virt = ioremap_prot(cache_sram->base_phys,
+                                cache_sram->size, _PAGE_COHERENT | PAGE_KERNEL);
+        if (!cache_sram->base_virt) {
+                dev_err(&dev->dev, "%s: ioremap_prot failed\n",
+                                dev->dev.of_node->full_name);
+                ret = -ENOMEM;
+                goto out_release;
+        }
+        cache_sram->rh = rh_create(sizeof(unsigned int));
+        if (IS_ERR(cache_sram->rh)) {
+                dev_err(&dev->dev, "%s: Unable to create remote heap\n",
+                                dev->dev.of_node->full_name);
+                ret = PTR_ERR(cache_sram->rh);
+                goto out_unmap;
+        }
+        rh_attach_region(cache_sram->rh, 0, cache_sram->size);
+        spin_lock_init(&cache_sram->lock);
+        dev_info(&dev->dev, "[base:0x%llx, size:0x%x] configured and loaded\n",
+                (unsigned long long)cache_sram->base_phys, cache_sram->size);
+        return 0;
+out_unmap:
+        iounmap(cache_sram->base_virt);
+out_release:
+        release_mem_region(cache_sram->base_phys, cache_sram->size);
+out_free:
+        kfree(cache_sram);
+        return ret;
+}
+void remove_cache_sram(struct platform_device *dev)
+{
+        BUG_ON(!cache_sram);
+        rh_detach_region(cache_sram->rh, 0, cache_sram->size);
+        rh_destroy(cache_sram->rh);
+        iounmap(cache_sram->base_virt);
+        release_mem_region(cache_sram->base_phys, cache_sram->size);
+        kfree(cache_sram);
+        cache_sram = NULL;
+        dev_info(&dev->dev, "MPC85xx Cache-SRAM driver unloaded\n");
+}
diff --git a/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
new file mode 100644
index 000000000000..5f88797dce73
--- /dev/null
+++ b/arch/powerpc/sysdev/fsl_85xx_l2ctlr.c
@@ -0,0 +1,230 @@
+/*
+ * Copyright 2009-2010 Freescale Semiconductor, Inc.
+ *
+ * QorIQ (P1/P2) L2 controller init for Cache-SRAM instantiation
+ *
+ * Author: Vivek Mahajan <vivek.mahajan@freescale.com>
+ *
+ * This program is free software; you can redistribute  it and/or modify it
+ * under  the terms of  the GNU General  Public License as published by the
+ * Free Software Foundation;  either version 2 of the  License, or (at your
+ * option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
+ */
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <asm/io.h>
+#include "fsl_85xx_cache_ctlr.h"
+static char *sram_size;
+static char *sram_offset;
+struct mpc85xx_l2ctlr __iomem *l2ctlr;
+static long get_cache_sram_size(void)
+{
+        unsigned long val;
+        if (!sram_size || (strict_strtoul(sram_size, 0, &val) < 0))
+                return -EINVAL;
+        return val;
+}
+static long get_cache_sram_offset(void)
+{
+        unsigned long val;
+        if (!sram_offset || (strict_strtoul(sram_offset, 0, &val) < 0))
+                return -EINVAL;
+        return val;
+}
+static int __init get_size_from_cmdline(char *str)
+{
+        if (!str)
+                return 0;
+        sram_size = str;
+        return 1;
+}
+static int __init get_offset_from_cmdline(char *str)
+{
+        if (!str)
+                return 0;
+        sram_offset = str;
+        return 1;
+}
+__setup("cache-sram-size=", get_size_from_cmdline);
+__setup("cache-sram-offset=", get_offset_from_cmdline);
+static int __devinit mpc85xx_l2ctlr_of_probe(struct platform_device *dev)
+{
+        long rval;
+        unsigned int rem;
+        unsigned char ways;
+        const unsigned int *prop;
+        unsigned int l2cache_size;
+        struct sram_parameters sram_params;
+        if (!dev->dev.of_node) {
+                dev_err(&dev->dev, "Device's OF-node is NULL\n");
+                return -EINVAL;
+        }
+        prop = of_get_property(dev->dev.of_node, "cache-size", NULL);
+        if (!prop) {
+                dev_err(&dev->dev, "Missing L2 cache-size\n");
+                return -EINVAL;
+        }
+        l2cache_size = *prop;
+        sram_params.sram_size  = get_cache_sram_size();
+        if ((int)sram_params.sram_size <= 0) {
+                dev_err(&dev->dev,
+                        "Entire L2 as cache, Aborting Cache-SRAM stuff\n");
+                return -EINVAL;
+        }
+        sram_params.sram_offset  = get_cache_sram_offset();
+        if ((int64_t)sram_params.sram_offset <= 0) {
+                dev_err(&dev->dev,
+                        "Entire L2 as cache, provide a valid sram offset\n");
+                return -EINVAL;
+        }
+        rem = l2cache_size % sram_params.sram_size;
+        ways = LOCK_WAYS_FULL * sram_params.sram_size / l2cache_size;
+        if (rem || (ways & (ways - 1))) {
+                dev_err(&dev->dev, "Illegal cache-sram-size in command line\n");
+                return -EINVAL;
+        }
+        l2ctlr = of_iomap(dev->dev.of_node, 0);
+        if (!l2ctlr) {
+                dev_err(&dev->dev, "Can't map L2 controller\n");
+                return -EINVAL;
+        }
+        /*
+         * Write bits[0-17] to srbar0
+         */
+        out_be32(&l2ctlr->srbar0,
+                sram_params.sram_offset & L2SRAM_BAR_MSK_LO18);
+        /*
+         * Write bits[18-21] to srbare0
+         */
+#ifdef CONFIG_PHYS_64BIT
+        out_be32(&l2ctlr->srbarea0,
+                (sram_params.sram_offset >> 32) & L2SRAM_BARE_MSK_HI4);
+#endif
+        clrsetbits_be32(&l2ctlr->ctl, L2CR_L2E, L2CR_L2FI);
+        switch (ways) {
+        case LOCK_WAYS_EIGHTH:
+                setbits32(&l2ctlr->ctl,
+                        L2CR_L2E | L2CR_L2FI | L2CR_SRAM_EIGHTH);
+                break;
+        case LOCK_WAYS_TWO_EIGHTH:
+                setbits32(&l2ctlr->ctl,
+                        L2CR_L2E | L2CR_L2FI | L2CR_SRAM_QUART);
+                break;
+        case LOCK_WAYS_HALF:
+                setbits32(&l2ctlr->ctl,
+                        L2CR_L2E | L2CR_L2FI | L2CR_SRAM_HALF);
+                break;
+        case LOCK_WAYS_FULL:
+        default:
+                setbits32(&l2ctlr->ctl,
+                        L2CR_L2E | L2CR_L2FI | L2CR_SRAM_FULL);
+                break;
+        }
+        eieio();
+        rval = instantiate_cache_sram(dev, sram_params);
+        if (rval < 0) {
+                dev_err(&dev->dev, "Can't instantiate Cache-SRAM\n");
+                iounmap(l2ctlr);
+                return -EINVAL;
+        }
+        return 0;
+}
+static int __devexit mpc85xx_l2ctlr_of_remove(struct platform_device *dev)
+{
+        BUG_ON(!l2ctlr);
+        iounmap(l2ctlr);
+        remove_cache_sram(dev);
+        dev_info(&dev->dev, "MPC85xx L2 controller unloaded\n");
+        return 0;
+}
+static struct of_device_id mpc85xx_l2ctlr_of_match[] = {
+        {
+                .compatible = "fsl,p2020-l2-cache-controller",
+        },
+        {
+                .compatible = "fsl,p2010-l2-cache-controller",
+        },
+        {
+                .compatible = "fsl,p1020-l2-cache-controller",
+        },
+        {
+                .compatible = "fsl,p1011-l2-cache-controller",
+        },
+        {
+                .compatible = "fsl,p1013-l2-cache-controller",
+        },
+        {
+                .compatible = "fsl,p1022-l2-cache-controller",
+        },
+        {},
+};
+static struct platform_driver mpc85xx_l2ctlr_of_platform_driver = {
+        .driver = {
+                .name           = "fsl-l2ctlr",
+                .owner          = THIS_MODULE,
+                .of_match_table = mpc85xx_l2ctlr_of_match,
+        },
+        .probe          = mpc85xx_l2ctlr_of_probe,
+        .remove         = __devexit_p(mpc85xx_l2ctlr_of_remove),
+};
+static __init int mpc85xx_l2ctlr_of_init(void)
+{
+        return platform_driver_register(&mpc85xx_l2ctlr_of_platform_driver);
+}
+static void __exit mpc85xx_l2ctlr_of_exit(void)
+{
+        platform_driver_unregister(&mpc85xx_l2ctlr_of_platform_driver);
+}
+subsys_initcall(mpc85xx_l2ctlr_of_init);
+module_exit(mpc85xx_l2ctlr_of_exit);
+MODULE_DESCRIPTION("Freescale MPC85xx L2 controller init");
+MODULE_LICENSE("GPL v2");
diff --git a/arch/powerpc/sysdev/fsl_lbc.c b/arch/powerpc/sysdev/fsl_lbc.c
index dceb8d1a843d..d917573cf1a8 100644
--- a/arch/powerpc/sysdev/fsl_lbc.c
+++ b/arch/powerpc/sysdev/fsl_lbc.c
@@ -1,9 +1,12 @@
 /*
 * Freescale LBC and UPM routines.
 *
- * Copyright (c) 2007-2008  MontaVista Software, Inc.
+ * Copyright © 2007-2008  MontaVista Software, Inc.
+ * Copyright © 2010 Freescale Semiconductor
 *
 * Author: Anton Vorontsov <avorontsov@ru.mvista.com>
+ * Author: Jack Lan <Jack.Lan@freescale.com>
+ * Author: Roy Zang <tie-fei.zang@freescale.com>
 *
 * This program is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License as published by
@@ -19,39 +22,37 @@
 #include <linux/types.h>
 #include <linux/io.h>
 #include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/platform_device.h>
+#include <linux/interrupt.h>
+#include <linux/mod_devicetable.h>
 #include <asm/prom.h>
 #include <asm/fsl_lbc.h>
 static spinlock_t fsl_lbc_lock = __SPIN_LOCK_UNLOCKED(fsl_lbc_lock);
-static struct fsl_lbc_regs __iomem *fsl_lbc_regs;
+struct fsl_lbc_ctrl *fsl_lbc_ctrl_dev;
+EXPORT_SYMBOL(fsl_lbc_ctrl_dev);
-static char __initdata *compat_lbc[] = {
+/**
-        "fsl,pq2-localbus",
+ * fsl_lbc_addr - convert the base address
-        "fsl,pq2pro-localbus",
+ * @addr_base:  base address of the memory bank
-        "fsl,pq3-localbus",
+ *
-        "fsl,elbc",
+ * This function converts a base address of lbc into the right format for the
-};
+ * BR register. If the SOC has eLBC then it returns 32bit physical address
+ * else it convers a 34bit local bus physical address to correct format of
-static int __init fsl_lbc_init(void)
+ * 32bit address for BR register (Example: MPC8641).
+ */
+u32 fsl_lbc_addr(phys_addr_t addr_base)
 {
-        struct device_node *lbus;
+        struct device_node *np = fsl_lbc_ctrl_dev->dev->of_node;
-        int i;
+        u32 addr = addr_base & 0xffff8000;
-        for (i = 0; i < ARRAY_SIZE(compat_lbc); i++) {
+        if (of_device_is_compatible(np, "fsl,elbc"))
-                lbus = of_find_compatible_node(NULL, NULL, compat_lbc[i]);
+                return addr;
-                if (lbus)
-                        goto found;
-        }
-        return -ENODEV;
-found:
+        return addr | ((addr_base & 0x300000000ull) >> 19);
-        fsl_lbc_regs = of_iomap(lbus, 0);
-        of_node_put(lbus);
-        if (!fsl_lbc_regs)
-                return -ENOMEM;
-        return 0;
 }
-arch_initcall(fsl_lbc_init);
+EXPORT_SYMBOL(fsl_lbc_addr);
 /**
 * fsl_lbc_find - find Localbus bank
@@ -65,15 +66,17 @@ arch_initcall(fsl_lbc_init);
 int fsl_lbc_find(phys_addr_t addr_base)
 {
        int i;
+        struct fsl_lbc_regs __iomem *lbc;
-        if (!fsl_lbc_regs)
+        if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
                return -ENODEV;
-        for (i = 0; i < ARRAY_SIZE(fsl_lbc_regs->bank); i++) {
+        lbc = fsl_lbc_ctrl_dev->regs;
-                __be32 br = in_be32(&fsl_lbc_regs->bank[i].br);
+        for (i = 0; i < ARRAY_SIZE(lbc->bank); i++) {
-                __be32 or = in_be32(&fsl_lbc_regs->bank[i].or);
+                __be32 br = in_be32(&lbc->bank[i].br);
+                __be32 or = in_be32(&lbc->bank[i].or);
-                if (br & BR_V && (br & or & BR_BA) == addr_base)
+                if (br & BR_V && (br & or & BR_BA) == fsl_lbc_addr(addr_base))
                        return i;
        }
@@ -94,22 +97,27 @@ int fsl_upm_find(phys_addr_t addr_base, struct fsl_upm *upm)
 {
        int bank;
        __be32 br;
+        struct fsl_lbc_regs __iomem *lbc;
        bank = fsl_lbc_find(addr_base);
        if (bank < 0)
                return bank;
-        br = in_be32(&fsl_lbc_regs->bank[bank].br);
+        if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
+                return -ENODEV;
+        lbc = fsl_lbc_ctrl_dev->regs;
+        br = in_be32(&lbc->bank[bank].br);
        switch (br & BR_MSEL) {
        case BR_MS_UPMA:
-                upm->mxmr = &fsl_lbc_regs->mamr;
+                upm->mxmr = &lbc->mamr;
                break;
        case BR_MS_UPMB:
-                upm->mxmr = &fsl_lbc_regs->mbmr;
+                upm->mxmr = &lbc->mbmr;
                break;
        case BR_MS_UPMC:
-                upm->mxmr = &fsl_lbc_regs->mcmr;
+                upm->mxmr = &lbc->mcmr;
                break;
        default:
                return -EINVAL;
@@ -148,9 +156,12 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
        int ret = 0;
        unsigned long flags;
+        if (!fsl_lbc_ctrl_dev || !fsl_lbc_ctrl_dev->regs)
+                return -ENODEV;
        spin_lock_irqsave(&fsl_lbc_lock, flags);
-        out_be32(&fsl_lbc_regs->mar, mar);
+        out_be32(&fsl_lbc_ctrl_dev->regs->mar, mar);
        switch (upm->width) {
        case 8:
@@ -172,3 +183,171 @@ int fsl_upm_run_pattern(struct fsl_upm *upm, void __iomem *io_base, u32 mar)
        return ret;
 }
 EXPORT_SYMBOL(fsl_upm_run_pattern);
+static int __devinit fsl_lbc_ctrl_init(struct fsl_lbc_ctrl *ctrl,
+                                       struct device_node *node)
+{
+        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
+        /* clear event registers */
+        setbits32(&lbc->ltesr, LTESR_CLEAR);
+        out_be32(&lbc->lteatr, 0);
+        out_be32(&lbc->ltear, 0);
+        out_be32(&lbc->lteccr, LTECCR_CLEAR);
+        out_be32(&lbc->ltedr, LTEDR_ENABLE);
+        /* Set the monitor timeout value to the maximum for erratum A001 */
+        if (of_device_is_compatible(node, "fsl,elbc"))
+                clrsetbits_be32(&lbc->lbcr, LBCR_BMT, LBCR_BMTPS);
+        return 0;
+}
+/*
+ * NOTE: This interrupt is used to report localbus events of various kinds,
+ * such as transaction errors on the chipselects.
+ */
+static irqreturn_t fsl_lbc_ctrl_irq(int irqno, void *data)
+{
+        struct fsl_lbc_ctrl *ctrl = data;
+        struct fsl_lbc_regs __iomem *lbc = ctrl->regs;
+        u32 status;
+        status = in_be32(&lbc->ltesr);
+        if (!status)
+                return IRQ_NONE;
+        out_be32(&lbc->ltesr, LTESR_CLEAR);
+        out_be32(&lbc->lteatr, 0);
+        out_be32(&lbc->ltear, 0);
+        ctrl->irq_status = status;
+        if (status & LTESR_BM)
+                dev_err(ctrl->dev, "Local bus monitor time-out: "
+                        "LTESR 0x%08X\n", status);
+        if (status & LTESR_WP)
+                dev_err(ctrl->dev, "Write protect error: "
+                        "LTESR 0x%08X\n", status);
+        if (status & LTESR_ATMW)
+                dev_err(ctrl->dev, "Atomic write error: "
+                        "LTESR 0x%08X\n", status);
+        if (status & LTESR_ATMR)
+                dev_err(ctrl->dev, "Atomic read error: "
+                        "LTESR 0x%08X\n", status);
+        if (status & LTESR_CS)
+                dev_err(ctrl->dev, "Chip select error: "
+                        "LTESR 0x%08X\n", status);
+        if (status & LTESR_UPM)
+                ;
+        if (status & LTESR_FCT) {
+                dev_err(ctrl->dev, "FCM command time-out: "
+                        "LTESR 0x%08X\n", status);
+                smp_wmb();
+                wake_up(&ctrl->irq_wait);
+        }
+        if (status & LTESR_PAR) {
+                dev_err(ctrl->dev, "Parity or Uncorrectable ECC error: "
+                        "LTESR 0x%08X\n", status);
+                smp_wmb();
+                wake_up(&ctrl->irq_wait);
+        }
+        if (status & LTESR_CC) {
+                smp_wmb();
+                wake_up(&ctrl->irq_wait);
+        }
+        if (status & ~LTESR_MASK)
+                dev_err(ctrl->dev, "Unknown error: "
+                        "LTESR 0x%08X\n", status);
+        return IRQ_HANDLED;
+}
+/*
+ * fsl_lbc_ctrl_probe
+ *
+ * called by device layer when it finds a device matching
+ * one our driver can handled. This code allocates all of
+ * the resources needed for the controller only.  The
+ * resources for the NAND banks themselves are allocated
+ * in the chip probe function.
+*/
+static int __devinit fsl_lbc_ctrl_probe(struct platform_device *dev)
+{
+        int ret;
+        if (!dev->dev.of_node) {
+                dev_err(&dev->dev, "Device OF-Node is NULL");
+                return -EFAULT;
+        }
+        fsl_lbc_ctrl_dev = kzalloc(sizeof(*fsl_lbc_ctrl_dev), GFP_KERNEL);
+        if (!fsl_lbc_ctrl_dev)
+                return -ENOMEM;
+        dev_set_drvdata(&dev->dev, fsl_lbc_ctrl_dev);
+        spin_lock_init(&fsl_lbc_ctrl_dev->lock);
+        init_waitqueue_head(&fsl_lbc_ctrl_dev->irq_wait);
+        fsl_lbc_ctrl_dev->regs = of_iomap(dev->dev.of_node, 0);
+        if (!fsl_lbc_ctrl_dev->regs) {
+                dev_err(&dev->dev, "failed to get memory region\n");
+                ret = -ENODEV;
+                goto err;
+        }
+        fsl_lbc_ctrl_dev->irq = irq_of_parse_and_map(dev->dev.of_node, 0);
+        if (fsl_lbc_ctrl_dev->irq == NO_IRQ) {
+                dev_err(&dev->dev, "failed to get irq resource\n");
+                ret = -ENODEV;
+                goto err;
+        }
+        fsl_lbc_ctrl_dev->dev = &dev->dev;
+        ret = fsl_lbc_ctrl_init(fsl_lbc_ctrl_dev, dev->dev.of_node);
+        if (ret < 0)
+                goto err;
+        ret = request_irq(fsl_lbc_ctrl_dev->irq, fsl_lbc_ctrl_irq, 0,
+                                "fsl-lbc", fsl_lbc_ctrl_dev);
+        if (ret != 0) {
+                dev_err(&dev->dev, "failed to install irq (%d)\n",
+                        fsl_lbc_ctrl_dev->irq);
+                ret = fsl_lbc_ctrl_dev->irq;
+                goto err;
+        }
+        /* Enable interrupts for any detected events */
+        out_be32(&fsl_lbc_ctrl_dev->regs->lteir, LTEIR_ENABLE);
+        return 0;
+err:
+        iounmap(fsl_lbc_ctrl_dev->regs);
+        kfree(fsl_lbc_ctrl_dev);
+        return ret;
+}
+static const struct of_device_id fsl_lbc_match[] = {
+        { .compatible = "fsl,elbc", },
+        { .compatible = "fsl,pq3-localbus", },
+        { .compatible = "fsl,pq2-localbus", },
+        { .compatible = "fsl,pq2pro-localbus", },
+        {},
+};
+static struct platform_driver fsl_lbc_ctrl_driver = {
+        .driver = {
+                .name = "fsl-lbc",
+                .of_match_table = fsl_lbc_match,
+        },
+        .probe = fsl_lbc_ctrl_probe,
+};
+static int __init fsl_lbc_init(void)
+{
+        return platform_driver_register(&fsl_lbc_ctrl_driver);
+}
+module_init(fsl_lbc_init);
diff --git a/arch/powerpc/sysdev/fsl_msi.c b/arch/powerpc/sysdev/fsl_msi.c
index 87991d3abbab..92e78333c47c 100644
--- a/arch/powerpc/sysdev/fsl_msi.c
+++ b/arch/powerpc/sysdev/fsl_msi.c
@@ -1,5 +1,5 @@
 /*
- * Copyright (C) 2007-2010 Freescale Semiconductor, Inc.
+ * Copyright (C) 2007-2011 Freescale Semiconductor, Inc.
 *
 * Author: Tony Li <tony.li@freescale.com>
 *         Jason Jin <Jason.jin@freescale.com>
@@ -24,6 +24,7 @@
 #include <asm/ppc-pci.h>
 #include <asm/mpic.h>
 #include "fsl_msi.h"
+#include "fsl_pci.h"
 LIST_HEAD(msi_head);
@@ -46,14 +47,14 @@ static inline u32 fsl_msi_read(u32 __iomem *base, unsigned int reg)
 * We do not need this actually. The MSIR register has been read once
 * in the cascade interrupt. So, this MSI interrupt has been acked
 */
-static void fsl_msi_end_irq(unsigned int virq)
+static void fsl_msi_end_irq(struct irq_data *d)
 {
 }
 static struct irq_chip fsl_msi_chip = {
-        .mask           = mask_msi_irq,
+        .irq_mask       = mask_msi_irq,
-        .unmask         = unmask_msi_irq,
+        .irq_unmask     = unmask_msi_irq,
-        .ack            = fsl_msi_end_irq,
+        .irq_ack        = fsl_msi_end_irq,
        .name           = "FSL-MSI",
 };
@@ -63,10 +64,10 @@ static int fsl_msi_host_map(struct irq_host *h, unsigned int virq,
        struct fsl_msi *msi_data = h->host_data;
        struct irq_chip *chip = &fsl_msi_chip;
-        irq_to_desc(virq)->status |= IRQ_TYPE_EDGE_FALLING;
+        irq_set_status_flags(virq, IRQ_TYPE_EDGE_FALLING);
-        set_irq_chip_data(virq, msi_data);
+        irq_set_chip_data(virq, msi_data);
-        set_irq_chip_and_handler(virq, chip, handle_edge_irq);
+        irq_set_chip_and_handler(virq, chip, handle_edge_irq);
        return 0;
 }
@@ -109,8 +110,8 @@ static void fsl_teardown_msi_irqs(struct pci_dev *pdev)
        list_for_each_entry(entry, &pdev->msi_list, list) {
                if (entry->irq == NO_IRQ)
                        continue;
-                msi_data = get_irq_data(entry->irq);
+                msi_data = irq_get_chip_data(entry->irq);
-                set_irq_msi(entry->irq, NULL);
+                irq_set_msi_desc(entry->irq, NULL);
                msi_bitmap_free_hwirqs(&msi_data->bitmap,
                                       virq_to_hw(entry->irq), 1);
                irq_dispose_mapping(entry->irq);
@@ -125,13 +126,11 @@ static void fsl_compose_msi_msg(struct pci_dev *pdev, int hwirq,
 {
        struct fsl_msi *msi_data = fsl_msi_data;
        struct pci_controller *hose = pci_bus_to_host(pdev->bus);
-        u32 base = 0;
+        u64 base = fsl_pci_immrbar_base(hose);
-        pci_bus_read_config_dword(hose->bus,
+        msg->address_lo = msi_data->msi_addr_lo + lower_32_bits(base);
-                PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+        msg->address_hi = msi_data->msi_addr_hi + upper_32_bits(base);
-        msg->address_lo = msi_data->msi_addr_lo + base;
-        msg->address_hi = msi_data->msi_addr_hi;
        msg->data = hwirq;
        pr_debug("%s: allocated srs: %d, ibs: %d\n",
@@ -169,8 +168,8 @@ static int fsl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                        rc = -ENOSPC;
                        goto out_free;
                }
-                set_irq_data(virq, msi_data);
+                /* chip_data is msi_data via host->hostdata in host->map() */
-                set_irq_msi(virq, entry);
+                irq_set_msi_desc(virq, entry);
                fsl_compose_msi_msg(pdev, hwirq, &msg, msi_data);
                write_msi_msg(virq, &msg);
@@ -184,6 +183,8 @@ out_free:
 static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct irq_data *idata = irq_desc_get_irq_data(desc);
        unsigned int cascade_irq;
        struct fsl_msi *msi_data;
        int msir_index = -1;
@@ -192,20 +193,20 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
        u32 have_shift = 0;
        struct fsl_msi_cascade_data *cascade_data;
-        cascade_data = (struct fsl_msi_cascade_data *)get_irq_data(irq);
+        cascade_data = irq_get_handler_data(irq);
        msi_data = cascade_data->msi_data;
        raw_spin_lock(&desc->lock);
        if ((msi_data->feature &  FSL_PIC_IP_MASK) == FSL_PIC_IP_IPIC) {
-                if (desc->chip->mask_ack)
+                if (chip->irq_mask_ack)
-                        desc->chip->mask_ack(irq);
+                        chip->irq_mask_ack(idata);
                else {
-                        desc->chip->mask(irq);
+                        chip->irq_mask(idata);
-                        desc->chip->ack(irq);
+                        chip->irq_ack(idata);
                }
        }
-        if (unlikely(desc->status & IRQ_INPROGRESS))
+        if (unlikely(irqd_irq_inprogress(idata)))
                goto unlock;
        msir_index = cascade_data->index;
@@ -213,7 +214,7 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
        if (msir_index >= NR_MSI_REG)
                cascade_irq = NO_IRQ;
-        desc->status |= IRQ_INPROGRESS;
+        irqd_set_chained_irq_inprogress(idata);
        switch (msi_data->feature & FSL_PIC_IP_MASK) {
        case FSL_PIC_IP_MPIC:
                msir_value = fsl_msi_read(msi_data->msi_regs,
@@ -235,15 +236,15 @@ static void fsl_msi_cascade(unsigned int irq, struct irq_desc *desc)
                have_shift += intr_index + 1;
                msir_value = msir_value >> (intr_index + 1);
        }
-        desc->status &= ~IRQ_INPROGRESS;
+        irqd_clr_chained_irq_inprogress(idata);
        switch (msi_data->feature & FSL_PIC_IP_MASK) {
        case FSL_PIC_IP_MPIC:
-                desc->chip->eoi(irq);
+                chip->irq_eoi(idata);
                break;
        case FSL_PIC_IP_IPIC:
-                if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+                if (!irqd_irq_disabled(idata) && chip->irq_unmask)
-                        desc->chip->unmask(irq);
+                        chip->irq_unmask(idata);
                break;
        }
 unlock:
@@ -252,7 +253,7 @@ unlock:
 static int fsl_of_msi_remove(struct platform_device *ofdev)
 {
-        struct fsl_msi *msi = ofdev->dev.platform_data;
+        struct fsl_msi *msi = platform_get_drvdata(ofdev);
        int virq, i;
        struct fsl_msi_cascade_data *cascade_data;
@@ -261,7 +262,7 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
        for (i = 0; i < NR_MSI_REG; i++) {
                virq = msi->msi_virqs[i];
                if (virq != NO_IRQ) {
-                        cascade_data = get_irq_data(virq);
+                        cascade_data = irq_get_handler_data(virq);
                        kfree(cascade_data);
                        irq_dispose_mapping(virq);
                }
@@ -274,19 +275,53 @@ static int fsl_of_msi_remove(struct platform_device *ofdev)
        return 0;
 }
-static int __devinit fsl_of_msi_probe(struct platform_device *dev,
+static int __devinit fsl_msi_setup_hwirq(struct fsl_msi *msi,
-                                const struct of_device_id *match)
+                                         struct platform_device *dev,
+                                         int offset, int irq_index)
 {
+        struct fsl_msi_cascade_data *cascade_data = NULL;
+        int virt_msir;
+        virt_msir = irq_of_parse_and_map(dev->dev.of_node, irq_index);
+        if (virt_msir == NO_IRQ) {
+                dev_err(&dev->dev, "%s: Cannot translate IRQ index %d\n",
+                        __func__, irq_index);
+                return 0;
+        }
+        cascade_data = kzalloc(sizeof(struct fsl_msi_cascade_data), GFP_KERNEL);
+        if (!cascade_data) {
+                dev_err(&dev->dev, "No memory for MSI cascade data\n");
+                return -ENOMEM;
+        }
+        msi->msi_virqs[irq_index] = virt_msir;
+        cascade_data->index = offset + irq_index;
+        cascade_data->msi_data = msi;
+        irq_set_handler_data(virt_msir, cascade_data);
+        irq_set_chained_handler(virt_msir, fsl_msi_cascade);
+        return 0;
+}
+static const struct of_device_id fsl_of_msi_ids[];
+static int __devinit fsl_of_msi_probe(struct platform_device *dev)
+{
+        const struct of_device_id *match;
        struct fsl_msi *msi;
        struct resource res;
-        int err, i, count;
+        int err, i, j, irq_index, count;
        int rc;
-        int virt_msir;
        const u32 *p;
-        struct fsl_msi_feature *features = match->data;
+        struct fsl_msi_feature *features;
-        struct fsl_msi_cascade_data *cascade_data = NULL;
        int len;
        u32 offset;
+        static const u32 all_avail[] = { 0, NR_MSI_IRQS };
+        match = of_match_device(fsl_of_msi_ids, &dev->dev);
+        if (!match)
+                return -EINVAL;
+        features = match->data;
        printk(KERN_DEBUG "Setting up Freescale MSI support\n");
@@ -295,7 +330,7 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev,
                dev_err(&dev->dev, "No memory for MSI structure\n");
                return -ENOMEM;
        }
-        dev->dev.platform_data = msi;
+        platform_set_drvdata(dev, msi);
        msi->irqhost = irq_alloc_host(dev->dev.of_node, IRQ_HOST_MAP_LINEAR,
                                      NR_MSI_IRQS, &fsl_msi_host_ops, 0);
@@ -333,42 +368,34 @@ static int __devinit fsl_of_msi_probe(struct platform_device *dev,
                goto error_out;
        }
-        p = of_get_property(dev->dev.of_node, "interrupts", &count);
+        p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
-        if (!p) {
+        if (p && len % (2 * sizeof(u32)) != 0) {
-                dev_err(&dev->dev, "no interrupts property found on %s\n",
+                dev_err(&dev->dev, "%s: Malformed msi-available-ranges property\n",
-                                dev->dev.of_node->full_name);
+                        __func__);
-                err = -ENODEV;
-                goto error_out;
-        }
-        if (count % 8 != 0) {
-                dev_err(&dev->dev, "Malformed interrupts property on %s\n",
-                                dev->dev.of_node->full_name);
                err = -EINVAL;
                goto error_out;
        }
-        offset = 0;
-        p = of_get_property(dev->dev.of_node, "msi-available-ranges", &len);
+        if (!p)
-        if (p)
+                p = all_avail;
-                offset = *p / IRQS_PER_MSI_REG;
+        for (irq_index = 0, i = 0; i < len / (2 * sizeof(u32)); i++) {
-        count /= sizeof(u32);
+                if (p[i * 2] % IRQS_PER_MSI_REG ||
-        for (i = 0; i < min(count / 2, NR_MSI_REG); i++) {
+                    p[i * 2 + 1] % IRQS_PER_MSI_REG) {
-                virt_msir = irq_of_parse_and_map(dev->dev.of_node, i);
+                        printk(KERN_WARNING "%s: %s: msi available range of %u at %u is not IRQ-aligned\n",
-                if (virt_msir != NO_IRQ) {
+                               __func__, dev->dev.of_node->full_name,
-                        cascade_data = kzalloc(
+                               p[i * 2 + 1], p[i * 2]);
-                                        sizeof(struct fsl_msi_cascade_data),
+                        err = -EINVAL;
-                                        GFP_KERNEL);
+                        goto error_out;
-                        if (!cascade_data) {
+                }
-                                dev_err(&dev->dev,
-                                        "No memory for MSI cascade data\n");
+                offset = p[i * 2] / IRQS_PER_MSI_REG;
-                                err = -ENOMEM;
+                count = p[i * 2 + 1] / IRQS_PER_MSI_REG;
+                for (j = 0; j < count; j++, irq_index++) {
+                        err = fsl_msi_setup_hwirq(msi, dev, offset, irq_index);
+                        if (err)
                                goto error_out;
-                        }
-                        msi->msi_virqs[i] = virt_msir;
-                        cascade_data->index = i + offset;
-                        cascade_data->msi_data = msi;
-                        set_irq_data(virt_msir, (void *)cascade_data);
-                        set_irq_chained_handler(virt_msir, fsl_msi_cascade);
                }
        }
@@ -412,7 +439,7 @@ static const struct of_device_id fsl_of_msi_ids[] = {
        {}
 };
-static struct of_platform_driver fsl_of_msi_driver = {
+static struct platform_driver fsl_of_msi_driver = {
        .driver = {
                .name = "fsl-msi",
                .owner = THIS_MODULE,
@@ -424,7 +451,7 @@ static struct of_platform_driver fsl_of_msi_driver = {
 static __init int fsl_of_msi_init(void)
 {
-        return of_register_platform_driver(&fsl_of_msi_driver);
+        return platform_driver_register(&fsl_of_msi_driver);
 }
 subsys_initcall(fsl_of_msi_init);
diff --git a/arch/powerpc/sysdev/fsl_pci.c b/arch/powerpc/sysdev/fsl_pci.c
index 4ae933225251..68ca9290df94 100644
--- a/arch/powerpc/sysdev/fsl_pci.c
+++ b/arch/powerpc/sysdev/fsl_pci.c
@@ -1,7 +1,7 @@
 /*
 * MPC83xx/85xx/86xx PCI/PCIE support routing.
 *
- * Copyright 2007-2009 Freescale Semiconductor, Inc.
+ * Copyright 2007-2011 Freescale Semiconductor, Inc.
 * Copyright 2008-2009 MontaVista Software, Inc.
 *
 * Initial author: Xianghua Xiao <x.xiao@freescale.com>
@@ -34,7 +34,7 @@
 #include <sysdev/fsl_soc.h>
 #include <sysdev/fsl_pci.h>
-static int fsl_pcie_bus_fixup;
+static int fsl_pcie_bus_fixup, is_mpc83xx_pci;
 static void __init quirk_fsl_pcie_header(struct pci_dev *dev)
 {
@@ -99,7 +99,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
                                  struct resource *rsrc)
 {
        struct ccsr_pci __iomem *pci;
-        int i, j, n, mem_log, win_idx = 2;
+        int i, j, n, mem_log, win_idx = 3, start_idx = 1, end_idx = 4;
        u64 mem, sz, paddr_hi = 0;
        u64 paddr_lo = ULLONG_MAX;
        u32 pcicsrbar = 0, pcicsrbar_sz;
@@ -109,6 +109,13 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
        pr_debug("PCI memory map start 0x%016llx, size 0x%016llx\n",
                    (u64)rsrc->start, (u64)rsrc->end - (u64)rsrc->start + 1);
+        if (of_device_is_compatible(hose->dn, "fsl,qoriq-pcie-v2.2")) {
+                win_idx = 2;
+                start_idx = 0;
+                end_idx = 3;
+        }
        pci = ioremap(rsrc->start, rsrc->end - rsrc->start + 1);
        if (!pci) {
            dev_err(hose->parent, "Unable to map ATMU registers\n");
@@ -118,7 +125,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
        /* Disable all windows (except powar0 since it's ignored) */
        for(i = 1; i < 5; i++)
                out_be32(&pci->pow[i].powar, 0);
-        for(i = 0; i < 3; i++)
+        for (i = start_idx; i < end_idx; i++)
                out_be32(&pci->piw[i].piwar, 0);
        /* Setup outbound MEM window */
@@ -204,7 +211,7 @@ static void __init setup_pci_atmu(struct pci_controller *hose,
                        mem_log++;
                }
-                piwar |= (mem_log - 1);
+                piwar |= ((mem_log - 1) & PIWAR_SZ_MASK);
                /* Setup inbound memory window */
                out_be32(&pci->piw[win_idx].pitar,  0x00000000);
@@ -317,6 +324,11 @@ int __init fsl_add_bridge(struct device_node *dev, int is_primary)
        struct resource rsrc;
        const int *bus_range;
+        if (!of_device_is_available(dev)) {
+                pr_warning("%s: disabled\n", dev->full_name);
+                return -ENODEV;
+        }
        pr_debug("Adding PCI host bridge %s\n", dev->full_name);
        /* Fetch host bridge registers address */
@@ -407,10 +419,18 @@ DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010E, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2010, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020E, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2020, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2040E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P2040, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P3041E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P3041, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040E, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4040, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080E, quirk_fsl_pcie_header);
 DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P4080, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P5010E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P5010, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P5020E, quirk_fsl_pcie_header);
+DECLARE_PCI_FIXUP_HEADER(0x1957, PCI_DEVICE_ID_P5020, quirk_fsl_pcie_header);
 #endif /* CONFIG_FSL_SOC_BOOKE || CONFIG_PPC_86xx */
 #if defined(CONFIG_PPC_83xx) || defined(CONFIG_PPC_MPC512x)
@@ -430,6 +450,13 @@ struct mpc83xx_pcie_priv {
        u32 dev_base;
 };
+struct pex_inbound_window {
+        u32 ar;
+        u32 tar;
+        u32 barl;
+        u32 barh;
+};
 /*
 * With the convention of u-boot, the PCIE outbound window 0 serves
 * as configuration transactions outbound.
@@ -437,6 +464,8 @@ struct mpc83xx_pcie_priv {
 #define PEX_OUTWIN0_BAR         0xCA4
 #define PEX_OUTWIN0_TAL         0xCA8
 #define PEX_OUTWIN0_TAH         0xCAC
+#define PEX_RC_INWIN_BASE       0xE60
+#define PEX_RCIWARn_EN          0x1
 static int mpc83xx_pcie_exclude_device(struct pci_bus *bus, unsigned int devfn)
 {
@@ -604,6 +633,8 @@ int __init mpc83xx_add_bridge(struct device_node *dev)
        const int *bus_range;
        int primary;
+        is_mpc83xx_pci = 1;
        if (!of_device_is_available(dev)) {
                pr_warning("%s: disabled by the firmware.\n",
                           dev->full_name);
@@ -683,3 +714,40 @@ err0:
        return ret;
 }
 #endif /* CONFIG_PPC_83xx */
+u64 fsl_pci_immrbar_base(struct pci_controller *hose)
+{
+#ifdef CONFIG_PPC_83xx
+        if (is_mpc83xx_pci) {
+                struct mpc83xx_pcie_priv *pcie = hose->dn->data;
+                struct pex_inbound_window *in;
+                int i;
+                /* Walk the Root Complex Inbound windows to match IMMR base */
+                in = pcie->cfg_type0 + PEX_RC_INWIN_BASE;
+                for (i = 0; i < 4; i++) {
+                        /* not enabled, skip */
+                        if (!in_le32(&in[i].ar) & PEX_RCIWARn_EN)
+                                 continue;
+                        if (get_immrbase() == in_le32(&in[i].tar))
+                                return (u64)in_le32(&in[i].barh) << 32 |
+                                            in_le32(&in[i].barl);
+                }
+                printk(KERN_WARNING "could not find PCI BAR matching IMMR\n");
+        }
+#endif
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
+        if (!is_mpc83xx_pci) {
+                u32 base;
+                pci_bus_read_config_dword(hose->bus,
+                        PCI_DEVFN(0, 0), PCI_BASE_ADDRESS_0, &base);
+                return base;
+        }
+#endif
+        return 0;
+}
diff --git a/arch/powerpc/sysdev/fsl_pci.h b/arch/powerpc/sysdev/fsl_pci.h
index a9d8bbebed80..a39ed5cc2c5a 100644
--- a/arch/powerpc/sysdev/fsl_pci.h
+++ b/arch/powerpc/sysdev/fsl_pci.h
@@ -1,7 +1,7 @@
 /*
 * MPC85xx/86xx PCI Express structure define
 *
- * Copyright 2007 Freescale Semiconductor, Inc
+ * Copyright 2007,2011 Freescale Semiconductor, Inc
 *
 * This program is free software; you can redistribute  it and/or modify it
 * under  the terms of  the GNU General  Public License as published by the
@@ -21,6 +21,7 @@
 #define PIWAR_TGI_LOCAL         0x00f00000      /* target - local memory */
 #define PIWAR_READ_SNOOP        0x00050000
 #define PIWAR_WRITE_SNOOP       0x00005000
+#define PIWAR_SZ_MASK          0x0000003f
 /* PCI/PCI Express outbound window reg */
 struct pci_outbound_window_regs {
@@ -49,7 +50,9 @@ struct ccsr_pci {
        __be32  int_ack;                /* 0x.008 - PCI Interrupt Acknowledge Register */
        __be32  pex_otb_cpl_tor;        /* 0x.00c - PCIE Outbound completion timeout register */
        __be32  pex_conf_tor;           /* 0x.010 - PCIE configuration timeout register */
-        u8      res2[12];
+        __be32  pex_config;             /* 0x.014 - PCIE CONFIG Register */
+        __be32  pex_int_status;         /* 0x.018 - PCIE interrupt status */
+        u8      res2[4];
        __be32  pex_pme_mes_dr;         /* 0x.020 - PCIE PME and message detect register */
        __be32  pex_pme_mes_disr;       /* 0x.024 - PCIE PME and message disable register */
        __be32  pex_pme_mes_ier;        /* 0x.028 - PCIE PME and message interrupt enable register */
@@ -62,14 +65,14 @@ struct ccsr_pci {
 * in all of the other outbound windows.
 */
        struct pci_outbound_window_regs pow[5];
+        u8      res14[96];
-        u8      res14[256];
+        struct pci_inbound_window_regs  pmit;   /* 0xd00 - 0xd9c Inbound MSI */
+        u8      res6[96];
-/* PCI/PCI Express inbound window 3-1
+/* PCI/PCI Express inbound window 3-0
 * inbound window 1 supports only a 32-bit base address and does not
 * define an inbound window base extended address register.
 */
-        struct pci_inbound_window_regs piw[3];
+        struct pci_inbound_window_regs piw[4];
        __be32  pex_err_dr;             /* 0x.e00 - PCI/PCIE error detect register */
        u8      res21[4];
@@ -88,6 +91,7 @@ struct ccsr_pci {
 extern int fsl_add_bridge(struct device_node *dev, int is_primary);
 extern void fsl_pcibios_fixup_bus(struct pci_bus *bus);
 extern int mpc83xx_add_bridge(struct device_node *dev);
+u64 fsl_pci_immrbar_base(struct pci_controller *hose);
 #endif /* __POWERPC_FSL_PCI_H */
 #endif /* __KERNEL__ */
diff --git a/arch/powerpc/sysdev/fsl_pmc.c b/arch/powerpc/sysdev/fsl_pmc.c
index 44de8559c975..f122e8961d32 100644
--- a/arch/powerpc/sysdev/fsl_pmc.c
+++ b/arch/powerpc/sysdev/fsl_pmc.c
@@ -53,13 +53,12 @@ static int pmc_suspend_valid(suspend_state_t state)
        return 1;
 }
-static struct platform_suspend_ops pmc_suspend_ops = {
+static const struct platform_suspend_ops pmc_suspend_ops = {
        .valid = pmc_suspend_valid,
        .enter = pmc_suspend_enter,
 };
-static int pmc_probe(struct platform_device *ofdev,
+static int pmc_probe(struct platform_device *ofdev)
-                     const struct of_device_id *id)
 {
        pmc_regs = of_iomap(ofdev->dev.of_node, 0);
        if (!pmc_regs)
@@ -76,7 +75,7 @@ static const struct of_device_id pmc_ids[] = {
        { },
 };
-static struct of_platform_driver pmc_driver = {
+static struct platform_driver pmc_driver = {
        .driver = {
                .name = "fsl-pmc",
                .owner = THIS_MODULE,
@@ -87,6 +86,6 @@ static struct of_platform_driver pmc_driver = {
 static int __init pmc_init(void)
 {
-        return of_register_platform_driver(&pmc_driver);
+        return platform_driver_register(&pmc_driver);
 }
 device_initcall(pmc_init);
diff --git a/arch/powerpc/sysdev/fsl_rio.c b/arch/powerpc/sysdev/fsl_rio.c
index 3017532319c8..b3fd081d56f5 100644
--- a/arch/powerpc/sysdev/fsl_rio.c
+++ b/arch/powerpc/sysdev/fsl_rio.c
@@ -10,7 +10,7 @@
 * - Added Port-Write message handling
 * - Added Machine Check exception handling
 *
- * Copyright (C) 2007, 2008 Freescale Semiconductor, Inc.
+ * Copyright (C) 2007, 2008, 2010 Freescale Semiconductor, Inc.
 * Zhang Wei <wei.zhang@freescale.com>
 *
 * Copyright 2005 MontaVista Software, Inc.
@@ -47,14 +47,33 @@
 #define IRQ_RIO_RX(m)           (((struct rio_priv *)(m->priv))->rxirq)
 #define IRQ_RIO_PW(m)           (((struct rio_priv *)(m->priv))->pwirq)
+#define IPWSR_CLEAR             0x98
+#define OMSR_CLEAR              0x1cb3
+#define IMSR_CLEAR              0x491
+#define IDSR_CLEAR              0x91
+#define ODSR_CLEAR              0x1c00
+#define LTLEECSR_ENABLE_ALL     0xFFC000FC
+#define ESCSR_CLEAR             0x07120204
+#define RIO_PORT1_EDCSR         0x0640
+#define RIO_PORT2_EDCSR         0x0680
+#define RIO_PORT1_IECSR         0x10130
+#define RIO_PORT2_IECSR         0x101B0
+#define RIO_IM0SR               0x13064
+#define RIO_IM1SR               0x13164
+#define RIO_OM0SR               0x13004
+#define RIO_OM1SR               0x13104
 #define RIO_ATMU_REGS_OFFSET    0x10c00
 #define RIO_P_MSG_REGS_OFFSET   0x11000
 #define RIO_S_MSG_REGS_OFFSET   0x13000
+#define RIO_GCCSR               0x13c
 #define RIO_ESCSR               0x158
+#define RIO_PORT2_ESCSR         0x178
 #define RIO_CCSR                0x15c
 #define RIO_LTLEDCSR            0x0608
-#define  RIO_LTLEDCSR_IER       0x80000000
+#define RIO_LTLEDCSR_IER        0x80000000
-#define  RIO_LTLEDCSR_PRT       0x01000000
+#define RIO_LTLEDCSR_PRT        0x01000000
 #define RIO_LTLEECSR            0x060c
 #define RIO_EPWISR              0x10010
 #define RIO_ISR_AACR            0x10120
@@ -87,6 +106,12 @@
 #define RIO_IPWSR_PWD           0x00000008
 #define RIO_IPWSR_PWB           0x00000004
+/* EPWISR Error match value */
+#define RIO_EPWISR_PINT1        0x80000000
+#define RIO_EPWISR_PINT2        0x40000000
+#define RIO_EPWISR_MU           0x00000002
+#define RIO_EPWISR_PW           0x00000001
 #define RIO_MSG_DESC_SIZE       32
 #define RIO_MSG_BUFFER_SIZE     4096
 #define RIO_MIN_TX_RING_SIZE    2
@@ -117,44 +142,59 @@ struct rio_atmu_regs {
 };
 struct rio_msg_regs {
-        u32 omr;
+        u32 omr;        /* 0xD_3000 - Outbound message 0 mode register */
-        u32 osr;
+        u32 osr;        /* 0xD_3004 - Outbound message 0 status register */
        u32 pad1;
-        u32 odqdpar;
+        u32 odqdpar;    /* 0xD_300C - Outbound message 0 descriptor queue
+                           dequeue pointer address register */
        u32 pad2;
-        u32 osar;
+        u32 osar;       /* 0xD_3014 - Outbound message 0 source address
-        u32 odpr;
+                           register */
-        u32 odatr;
+        u32 odpr;       /* 0xD_3018 - Outbound message 0 destination port
-        u32 odcr;
+                           register */
+        u32 odatr;      /* 0xD_301C - Outbound message 0 destination attributes
+                           Register*/
+        u32 odcr;       /* 0xD_3020 - Outbound message 0 double-word count
+                           register */
        u32 pad3;
-        u32 odqepar;
+        u32 odqepar;    /* 0xD_3028 - Outbound message 0 descriptor queue
+                           enqueue pointer address register */
        u32 pad4[13];
-        u32 imr;
+        u32 imr;        /* 0xD_3060 - Inbound message 0 mode register */
-        u32 isr;
+        u32 isr;        /* 0xD_3064 - Inbound message 0 status register */
        u32 pad5;
-        u32 ifqdpar;
+        u32 ifqdpar;    /* 0xD_306C - Inbound message 0 frame queue dequeue
+                           pointer address register*/
        u32 pad6;
-        u32 ifqepar;
+        u32 ifqepar;    /* 0xD_3074 - Inbound message 0 frame queue enqueue
+                           pointer address register */
        u32 pad7[226];
-        u32 odmr;
+        u32 odmr;       /* 0xD_3400 - Outbound doorbell mode register */
-        u32 odsr;
+        u32 odsr;       /* 0xD_3404 - Outbound doorbell status register */
        u32 res0[4];
-        u32 oddpr;
+        u32 oddpr;      /* 0xD_3418 - Outbound doorbell destination port
-        u32 oddatr;
+                           register */
+        u32 oddatr;     /* 0xD_341c - Outbound doorbell destination attributes
+                           register */
        u32 res1[3];
-        u32 odretcr;
+        u32 odretcr;    /* 0xD_342C - Outbound doorbell retry error threshold
+                           configuration register */
        u32 res2[12];
-        u32 dmr;
+        u32 dmr;        /* 0xD_3460 - Inbound doorbell mode register */
-        u32 dsr;
+        u32 dsr;        /* 0xD_3464 - Inbound doorbell status register */
        u32 pad8;
-        u32 dqdpar;
+        u32 dqdpar;     /* 0xD_346C - Inbound doorbell queue dequeue Pointer
+                           address register */
        u32 pad9;
-        u32 dqepar;
+        u32 dqepar;     /* 0xD_3474 - Inbound doorbell Queue enqueue pointer
+                           address register */
        u32 pad10[26];
-        u32 pwmr;
+        u32 pwmr;       /* 0xD_34E0 - Inbound port-write mode register */
-        u32 pwsr;
+        u32 pwsr;       /* 0xD_34E4 - Inbound port-write status register */
-        u32 epwqbar;
+        u32 epwqbar;    /* 0xD_34E8 - Extended Port-Write Queue Base Address
-        u32 pwqbar;
+                           register */
+        u32 pwqbar;     /* 0xD_34EC - Inbound port-write queue base address
+                           register */
 };
 struct rio_tx_desc {
@@ -241,35 +281,32 @@ struct rio_priv {
 static void __iomem *rio_regs_win;
 #ifdef CONFIG_E500
-static int (*saved_mcheck_exception)(struct pt_regs *regs);
+int fsl_rio_mcheck_exception(struct pt_regs *regs)
-static int fsl_rio_mcheck_exception(struct pt_regs *regs)
 {
-        const struct exception_table_entry *entry = NULL;
+        const struct exception_table_entry *entry;
-        unsigned long reason = mfspr(SPRN_MCSR);
+        unsigned long reason;
-        if (reason & MCSR_BUS_RBERR) {
+        if (!rio_regs_win)
-                reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
+                return 0;
-                if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
-                        /* Check if we are prepared to handle this fault */
+        reason = in_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR));
-                        entry = search_exception_tables(regs->nip);
+        if (reason & (RIO_LTLEDCSR_IER | RIO_LTLEDCSR_PRT)) {
-                        if (entry) {
+                /* Check if we are prepared to handle this fault */
-                                pr_debug("RIO: %s - MC Exception handled\n",
+                entry = search_exception_tables(regs->nip);
-                                         __func__);
+                if (entry) {
-                                out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
+                        pr_debug("RIO: %s - MC Exception handled\n",
-                                         0);
+                                 __func__);
-                                regs->msr |= MSR_RI;
+                        out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR),
-                                regs->nip = entry->fixup;
+                                 0);
-                                return 1;
+                        regs->msr |= MSR_RI;
-                        }
+                        regs->nip = entry->fixup;
+                        return 1;
                }
        }
-        if (saved_mcheck_exception)
+        return 0;
-                return saved_mcheck_exception(regs);
-        else
-                return cur_cpu_spec->machine_check(regs);
 }
+EXPORT_SYMBOL_GPL(fsl_rio_mcheck_exception);
 #endif
 /**
@@ -463,7 +500,7 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
 }
 /**
- * rio_hw_add_outb_message - Add message to the MPC85xx outbound message queue
+ * fsl_add_outb_message - Add message to the MPC85xx outbound message queue
 * @mport: Master port with outbound message queue
 * @rdev: Target of outbound message
 * @mbox: Outbound mailbox
@@ -473,8 +510,8 @@ fsl_rio_config_write(struct rio_mport *mport, int index, u16 destid,
 * Adds the @buffer message to the MPC85xx outbound message queue. Returns
 * %0 on success or %-EINVAL on failure.
 */
-int
+static int
-rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
+fsl_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
                        void *buffer, size_t len)
 {
        struct rio_priv *priv = mport->priv;
@@ -483,9 +520,8 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
                                        + priv->msg_tx_ring.tx_slot;
        int ret = 0;
-        pr_debug
+        pr_debug("RIO: fsl_add_outb_message(): destid %4.4x mbox %d buffer " \
-            ("RIO: rio_hw_add_outb_message(): destid %4.4x mbox %d buffer %8.8x len %8.8x\n",
+                 "%8.8x len %8.8x\n", rdev->destid, mbox, (int)buffer, len);
-             rdev->destid, mbox, (int)buffer, len);
        if ((len < 8) || (len > RIO_MAX_MSG_SIZE)) {
                ret = -EINVAL;
@@ -535,8 +571,6 @@ rio_hw_add_outb_message(struct rio_mport *mport, struct rio_dev *rdev, int mbox,
        return ret;
 }
-EXPORT_SYMBOL_GPL(rio_hw_add_outb_message);
 /**
 * fsl_rio_tx_handler - MPC85xx outbound message interrupt handler
 * @irq: Linux interrupt number
@@ -581,7 +615,7 @@ fsl_rio_tx_handler(int irq, void *dev_instance)
 }
 /**
- * rio_open_outb_mbox - Initialize MPC85xx outbound mailbox
+ * fsl_open_outb_mbox - Initialize MPC85xx outbound mailbox
 * @mport: Master port implementing the outbound message unit
 * @dev_id: Device specific pointer to pass on event
 * @mbox: Mailbox to open
@@ -591,7 +625,8 @@ fsl_rio_tx_handler(int irq, void *dev_instance)
 * and enables the outbound message unit. Returns %0 on success and
 * %-EINVAL or %-ENOMEM on failure.
 */
-int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+static int
+fsl_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
 {
        int i, j, rc = 0;
        struct rio_priv *priv = mport->priv;
@@ -687,14 +722,14 @@ int rio_open_outb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entr
 }
 /**
- * rio_close_outb_mbox - Shut down MPC85xx outbound mailbox
+ * fsl_close_outb_mbox - Shut down MPC85xx outbound mailbox
 * @mport: Master port implementing the outbound message unit
 * @mbox: Mailbox to close
 *
 * Disables the outbound message unit, free all buffers, and
 * frees the outbound message interrupt.
 */
-void rio_close_outb_mbox(struct rio_mport *mport, int mbox)
+static void fsl_close_outb_mbox(struct rio_mport *mport, int mbox)
 {
        struct rio_priv *priv = mport->priv;
        /* Disable inbound message unit */
@@ -751,7 +786,7 @@ fsl_rio_rx_handler(int irq, void *dev_instance)
 }
 /**
- * rio_open_inb_mbox - Initialize MPC85xx inbound mailbox
+ * fsl_open_inb_mbox - Initialize MPC85xx inbound mailbox
 * @mport: Master port implementing the inbound message unit
 * @dev_id: Device specific pointer to pass on event
 * @mbox: Mailbox to open
@@ -761,7 +796,8 @@ fsl_rio_rx_handler(int irq, void *dev_instance)
 * and enables the inbound message unit. Returns %0 on success
 * and %-EINVAL or %-ENOMEM on failure.
 */
-int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
+static int
+fsl_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entries)
 {
        int i, rc = 0;
        struct rio_priv *priv = mport->priv;
@@ -825,14 +861,14 @@ int rio_open_inb_mbox(struct rio_mport *mport, void *dev_id, int mbox, int entri
 }
 /**
- * rio_close_inb_mbox - Shut down MPC85xx inbound mailbox
+ * fsl_close_inb_mbox - Shut down MPC85xx inbound mailbox
 * @mport: Master port implementing the inbound message unit
 * @mbox: Mailbox to close
 *
 * Disables the inbound message unit, free all buffers, and
 * frees the inbound message interrupt.
 */
-void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
+static void fsl_close_inb_mbox(struct rio_mport *mport, int mbox)
 {
        struct rio_priv *priv = mport->priv;
        /* Disable inbound message unit */
@@ -847,7 +883,7 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
 }
 /**
- * rio_hw_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
+ * fsl_add_inb_buffer - Add buffer to the MPC85xx inbound message queue
 * @mport: Master port implementing the inbound message unit
 * @mbox: Inbound mailbox number
 * @buf: Buffer to add to inbound queue
@@ -855,12 +891,12 @@ void rio_close_inb_mbox(struct rio_mport *mport, int mbox)
 * Adds the @buf buffer to the MPC85xx inbound message queue. Returns
 * %0 on success or %-EINVAL on failure.
 */
-int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
+static int fsl_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
 {
        int rc = 0;
        struct rio_priv *priv = mport->priv;
-        pr_debug("RIO: rio_hw_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
+        pr_debug("RIO: fsl_add_inb_buffer(), msg_rx_ring.rx_slot %d\n",
                 priv->msg_rx_ring.rx_slot);
        if (priv->msg_rx_ring.virt_buffer[priv->msg_rx_ring.rx_slot]) {
@@ -879,17 +915,15 @@ int rio_hw_add_inb_buffer(struct rio_mport *mport, int mbox, void *buf)
        return rc;
 }
-EXPORT_SYMBOL_GPL(rio_hw_add_inb_buffer);
 /**
- * rio_hw_get_inb_message - Fetch inbound message from the MPC85xx message unit
+ * fsl_get_inb_message - Fetch inbound message from the MPC85xx message unit
 * @mport: Master port implementing the inbound message unit
 * @mbox: Inbound mailbox number
 *
 * Gets the next available inbound message from the inbound message queue.
 * A pointer to the message is returned on success or NULL on failure.
 */
-void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
+static void *fsl_get_inb_message(struct rio_mport *mport, int mbox)
 {
        struct rio_priv *priv = mport->priv;
        u32 phys_buf, virt_buf;
@@ -926,8 +960,6 @@ void *rio_hw_get_inb_message(struct rio_mport *mport, int mbox)
        return buf;
 }
-EXPORT_SYMBOL_GPL(rio_hw_get_inb_message);
 /**
 * fsl_rio_dbell_handler - MPC85xx doorbell interrupt handler
 * @irq: Linux interrupt number
@@ -954,7 +986,6 @@ fsl_rio_dbell_handler(int irq, void *dev_instance)
        if (dsr & DOORBELL_DSR_QFI) {
                pr_info("RIO: doorbell queue full\n");
                out_be32(&priv->msg_regs->dsr, DOORBELL_DSR_QFI);
-                goto out;
        }
        /* XXX Need to check/dispatch until queue empty */
@@ -1051,6 +1082,40 @@ static int fsl_rio_doorbell_init(struct rio_mport *mport)
        return rc;
 }
+static void port_error_handler(struct rio_mport *port, int offset)
+{
+        /*XXX: Error recovery is not implemented, we just clear errors */
+        out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
+        if (offset == 0) {
+                out_be32((u32 *)(rio_regs_win + RIO_PORT1_EDCSR), 0);
+                out_be32((u32 *)(rio_regs_win + RIO_PORT1_IECSR), 0);
+                out_be32((u32 *)(rio_regs_win + RIO_ESCSR), ESCSR_CLEAR);
+        } else {
+                out_be32((u32 *)(rio_regs_win + RIO_PORT2_EDCSR), 0);
+                out_be32((u32 *)(rio_regs_win + RIO_PORT2_IECSR), 0);
+                out_be32((u32 *)(rio_regs_win + RIO_PORT2_ESCSR), ESCSR_CLEAR);
+        }
+}
+static void msg_unit_error_handler(struct rio_mport *port)
+{
+        struct rio_priv *priv = port->priv;
+        /*XXX: Error recovery is not implemented, we just clear errors */
+        out_be32((u32 *)(rio_regs_win + RIO_LTLEDCSR), 0);
+        out_be32((u32 *)(rio_regs_win + RIO_IM0SR), IMSR_CLEAR);
+        out_be32((u32 *)(rio_regs_win + RIO_IM1SR), IMSR_CLEAR);
+        out_be32((u32 *)(rio_regs_win + RIO_OM0SR), OMSR_CLEAR);
+        out_be32((u32 *)(rio_regs_win + RIO_OM1SR), OMSR_CLEAR);
+        out_be32(&priv->msg_regs->odsr, ODSR_CLEAR);
+        out_be32(&priv->msg_regs->dsr, IDSR_CLEAR);
+        out_be32(&priv->msg_regs->pwsr, IPWSR_CLEAR);
+}
 /**
 * fsl_rio_port_write_handler - MPC85xx port write interrupt handler
 * @irq: Linux interrupt number
@@ -1067,18 +1132,12 @@ fsl_rio_port_write_handler(int irq, void *dev_instance)
        struct rio_priv *priv = port->priv;
        u32 epwisr, tmp;
-        ipwmr = in_be32(&priv->msg_regs->pwmr);
-        ipwsr = in_be32(&priv->msg_regs->pwsr);
        epwisr = in_be32(priv->regs_win + RIO_EPWISR);
-        if (epwisr & 0x80000000) {
+        if (!(epwisr & RIO_EPWISR_PW))
-                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
+                goto pw_done;
-                pr_info("RIO_LTLEDCSR = 0x%x\n", tmp);
-                out_be32(priv->regs_win + RIO_LTLEDCSR, 0);
-        }
-        if (!(epwisr & 0x00000001))
+        ipwmr = in_be32(&priv->msg_regs->pwmr);
-                return IRQ_HANDLED;
+        ipwsr = in_be32(&priv->msg_regs->pwsr);
 #ifdef DEBUG_PW
        pr_debug("PW Int->IPWMR: 0x%08x IPWSR: 0x%08x (", ipwmr, ipwsr);
@@ -1094,20 +1153,6 @@ fsl_rio_port_write_handler(int irq, void *dev_instance)
                pr_debug(" PWB");
        pr_debug(" )\n");
 #endif
-        out_be32(&priv->msg_regs->pwsr,
-                 ipwsr & (RIO_IPWSR_TE | RIO_IPWSR_QFI | RIO_IPWSR_PWD));
-        if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) {
-                priv->port_write_msg.err_count++;
-                pr_info("RIO: Port-Write Transaction Err (%d)\n",
-                         priv->port_write_msg.err_count);
-        }
-        if (ipwsr & RIO_IPWSR_PWD) {
-                priv->port_write_msg.discard_count++;
-                pr_info("RIO: Port Discarded Port-Write Msg(s) (%d)\n",
-                         priv->port_write_msg.discard_count);
-        }
        /* Schedule deferred processing if PW was received */
        if (ipwsr & RIO_IPWSR_QFI) {
                /* Save PW message (if there is room in FIFO),
@@ -1119,16 +1164,55 @@ fsl_rio_port_write_handler(int irq, void *dev_instance)
                                 RIO_PW_MSG_SIZE);
                } else {
                        priv->port_write_msg.discard_count++;
-                        pr_info("RIO: ISR Discarded Port-Write Msg(s) (%d)\n",
+                        pr_debug("RIO: ISR Discarded Port-Write Msg(s) (%d)\n",
                                 priv->port_write_msg.discard_count);
                }
+                /* Clear interrupt and issue Clear Queue command. This allows
+                 * another port-write to be received.
+                 */
+                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_QFI);
+                out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
                schedule_work(&priv->pw_work);
        }
-        /* Issue Clear Queue command. This allows another
+        if ((ipwmr & RIO_IPWMR_EIE) && (ipwsr & RIO_IPWSR_TE)) {
-         * port-write to be received.
+                priv->port_write_msg.err_count++;
-         */
+                pr_debug("RIO: Port-Write Transaction Err (%d)\n",
-        out_be32(&priv->msg_regs->pwmr, ipwmr | RIO_IPWMR_CQ);
+                         priv->port_write_msg.err_count);
+                /* Clear Transaction Error: port-write controller should be
+                 * disabled when clearing this error
+                 */
+                out_be32(&priv->msg_regs->pwmr, ipwmr & ~RIO_IPWMR_PWE);
+                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_TE);
+                out_be32(&priv->msg_regs->pwmr, ipwmr);
+        }
+        if (ipwsr & RIO_IPWSR_PWD) {
+                priv->port_write_msg.discard_count++;
+                pr_debug("RIO: Port Discarded Port-Write Msg(s) (%d)\n",
+                         priv->port_write_msg.discard_count);
+                out_be32(&priv->msg_regs->pwsr, RIO_IPWSR_PWD);
+        }
+pw_done:
+        if (epwisr & RIO_EPWISR_PINT1) {
+                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                port_error_handler(port, 0);
+        }
+        if (epwisr & RIO_EPWISR_PINT2) {
+                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                port_error_handler(port, 1);
+        }
+        if (epwisr & RIO_EPWISR_MU) {
+                tmp = in_be32(priv->regs_win + RIO_LTLEDCSR);
+                pr_debug("RIO_LTLEDCSR = 0x%x\n", tmp);
+                msg_unit_error_handler(port);
+        }
        return IRQ_HANDLED;
 }
@@ -1238,12 +1322,14 @@ static int fsl_rio_port_write_init(struct rio_mport *mport)
        /* Hook up port-write handler */
-        rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler, 0,
+        rc = request_irq(IRQ_RIO_PW(mport), fsl_rio_port_write_handler,
-                         "port-write", (void *)mport);
+                        IRQF_SHARED, "port-write", (void *)mport);
        if (rc < 0) {
                pr_err("MPC85xx RIO: unable to request inbound doorbell irq");
                goto err_out;
        }
+        /* Enable Error Interrupt */
+        out_be32((u32 *)(rio_regs_win + RIO_LTLEECSR), LTLEECSR_ENABLE_ALL);
        INIT_WORK(&priv->pw_work, fsl_pw_dpc);
        spin_lock_init(&priv->pw_fifo_lock);
@@ -1268,28 +1354,6 @@ err_out:
        return rc;
 }
-static char *cmdline = NULL;
-static int fsl_rio_get_hdid(int index)
-{
-        /* XXX Need to parse multiple entries in some format */
-        if (!cmdline)
-                return -1;
-        return simple_strtol(cmdline, NULL, 0);
-}
-static int fsl_rio_get_cmdline(char *s)
-{
-        if (!s)
-                return 0;
-        cmdline = s;
-        return 1;
-}
-__setup("riohdid=", fsl_rio_get_cmdline);
 static inline void fsl_rio_info(struct device *dev, u32 ccsr)
 {
        const char *str;
@@ -1406,13 +1470,19 @@ int fsl_rio_setup(struct platform_device *dev)
        ops->cwrite = fsl_rio_config_write;
        ops->dsend = fsl_rio_doorbell_send;
        ops->pwenable = fsl_rio_pw_enable;
+        ops->open_outb_mbox = fsl_open_outb_mbox;
+        ops->open_inb_mbox = fsl_open_inb_mbox;
+        ops->close_outb_mbox = fsl_close_outb_mbox;
+        ops->close_inb_mbox = fsl_close_inb_mbox;
+        ops->add_outb_message = fsl_add_outb_message;
+        ops->add_inb_buffer = fsl_add_inb_buffer;
+        ops->get_inb_message = fsl_get_inb_message;
        port = kzalloc(sizeof(struct rio_mport), GFP_KERNEL);
        if (!port) {
                rc = -ENOMEM;
                goto err_port;
        }
-        port->id = 0;
        port->index = 0;
        priv = kzalloc(sizeof(struct rio_priv), GFP_KERNEL);
@@ -1428,6 +1498,14 @@ int fsl_rio_setup(struct platform_device *dev)
        port->iores.flags = IORESOURCE_MEM;
        port->iores.name = "rio_io_win";
+        if (request_resource(&iomem_resource, &port->iores) < 0) {
+                dev_err(&dev->dev, "RIO: Error requesting master port region"
+                        " 0x%016llx-0x%016llx\n",
+                        (u64)port->iores.start, (u64)port->iores.end);
+                        rc = -ENOMEM;
+                        goto err_res;
+        }
        priv->pwirq   = irq_of_parse_and_map(dev->dev.of_node, 0);
        priv->bellirq = irq_of_parse_and_map(dev->dev.of_node, 2);
        priv->txirq = irq_of_parse_and_map(dev->dev.of_node, 3);
@@ -1443,10 +1521,8 @@ int fsl_rio_setup(struct platform_device *dev)
        priv->dev = &dev->dev;
        port->ops = ops;
-        port->host_deviceid = fsl_rio_get_hdid(port->id);
        port->priv = priv;
-        rio_register_mport(port);
+        port->phys_efptr = 0x100;
        priv->regs_win = ioremap(regs.start, regs.end - regs.start + 1);
        rio_regs_win = priv->regs_win;
@@ -1493,6 +1569,15 @@ int fsl_rio_setup(struct platform_device *dev)
        dev_info(&dev->dev, "RapidIO Common Transport System size: %d\n",
                        port->sys_size ? 65536 : 256);
+        if (rio_register_mport(port))
+                goto err;
+        if (port->host_deviceid >= 0)
+                out_be32(priv->regs_win + RIO_GCCSR, RIO_PORT_GEN_HOST |
+                        RIO_PORT_GEN_MASTER | RIO_PORT_GEN_DISCOVERED);
+        else
+                out_be32(priv->regs_win + RIO_GCCSR, 0x00000000);
        priv->atmu_regs = (struct rio_atmu_regs *)(priv->regs_win
                                        + RIO_ATMU_REGS_OFFSET);
        priv->maint_atmu_regs = priv->atmu_regs + 1;
@@ -1519,16 +1604,10 @@ int fsl_rio_setup(struct platform_device *dev)
        fsl_rio_doorbell_init(port);
        fsl_rio_port_write_init(port);
-#ifdef CONFIG_E500
-        saved_mcheck_exception = ppc_md.machine_check_exception;
-        ppc_md.machine_check_exception = fsl_rio_mcheck_exception;
-#endif
-        /* Ensure that RFXE is set */
-        mtspr(SPRN_HID1, (mfspr(SPRN_HID1) | 0x20000));
        return 0;
 err:
        iounmap(priv->regs_win);
+err_res:
        kfree(priv);
 err_priv:
        kfree(port);
@@ -1540,21 +1619,12 @@ err_ops:
 /* The probe function for RapidIO peer-to-peer network.
 */
-static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev,
+static int __devinit fsl_of_rio_rpn_probe(struct platform_device *dev)
-                                     const struct of_device_id *match)
 {
-        int rc;
        printk(KERN_INFO "Setting up RapidIO peer-to-peer network %s\n",
                        dev->dev.of_node->full_name);
-        rc = fsl_rio_setup(dev);
+        return fsl_rio_setup(dev);
-        if (rc)
-                goto out;
-        /* Enumerate all registered ports */
-        rc = rio_init_mports();
-out:
-        return rc;
 };
 static const struct of_device_id fsl_of_rio_rpn_ids[] = {
@@ -1564,7 +1634,7 @@ static const struct of_device_id fsl_of_rio_rpn_ids[] = {
        {},
 };
-static struct of_platform_driver fsl_of_rio_rpn_driver = {
+static struct platform_driver fsl_of_rio_rpn_driver = {
        .driver = {
                .name = "fsl-of-rio",
                .owner = THIS_MODULE,
@@ -1575,7 +1645,7 @@ static struct of_platform_driver fsl_of_rio_rpn_driver = {
 static __init int fsl_of_rio_rpn_init(void)
 {
-        return of_register_platform_driver(&fsl_of_rio_rpn_driver);
+        return platform_driver_register(&fsl_of_rio_rpn_driver);
 }
 subsys_initcall(fsl_of_rio_rpn_init);
diff --git a/arch/powerpc/sysdev/fsl_soc.c b/arch/powerpc/sysdev/fsl_soc.c
index b91f7acdda6f..19e5015e039b 100644
--- a/arch/powerpc/sysdev/fsl_soc.c
+++ b/arch/powerpc/sysdev/fsl_soc.c
@@ -209,186 +209,29 @@ static int __init of_add_fixed_phys(void)
 arch_initcall(of_add_fixed_phys);
 #endif /* CONFIG_FIXED_PHY */
-static enum fsl_usb2_phy_modes determine_usb_phy(const char *phy_type)
+#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
-{
+static __be32 __iomem *rstcr;
-        if (!phy_type)
-                return FSL_USB2_PHY_NONE;
-        if (!strcasecmp(phy_type, "ulpi"))
-                return FSL_USB2_PHY_ULPI;
-        if (!strcasecmp(phy_type, "utmi"))
-                return FSL_USB2_PHY_UTMI;
-        if (!strcasecmp(phy_type, "utmi_wide"))
-                return FSL_USB2_PHY_UTMI_WIDE;
-        if (!strcasecmp(phy_type, "serial"))
-                return FSL_USB2_PHY_SERIAL;
-        return FSL_USB2_PHY_NONE;
-}
-static int __init fsl_usb_of_init(void)
+static int __init setup_rstcr(void)
 {
        struct device_node *np;
-        unsigned int i = 0;
-        struct platform_device *usb_dev_mph = NULL, *usb_dev_dr_host = NULL,
-                *usb_dev_dr_client = NULL;
-        int ret;
-        for_each_compatible_node(np, NULL, "fsl-usb2-mph") {
-                struct resource r[2];
-                struct fsl_usb2_platform_data usb_data;
-                const unsigned char *prop = NULL;
-                memset(&r, 0, sizeof(r));
-                memset(&usb_data, 0, sizeof(usb_data));
-                ret = of_address_to_resource(np, 0, &r[0]);
-                if (ret)
-                        goto err;
-                of_irq_to_resource(np, 0, &r[1]);
-                usb_dev_mph =
-                    platform_device_register_simple("fsl-ehci", i, r, 2);
-                if (IS_ERR(usb_dev_mph)) {
-                        ret = PTR_ERR(usb_dev_mph);
-                        goto err;
-                }
-                usb_dev_mph->dev.coherent_dma_mask = 0xffffffffUL;
-                usb_dev_mph->dev.dma_mask = &usb_dev_mph->dev.coherent_dma_mask;
-                usb_data.operating_mode = FSL_USB2_MPH_HOST;
-                prop = of_get_property(np, "port0", NULL);
-                if (prop)
-                        usb_data.port_enables |= FSL_USB2_PORT0_ENABLED;
-                prop = of_get_property(np, "port1", NULL);
-                if (prop)
-                        usb_data.port_enables |= FSL_USB2_PORT1_ENABLED;
-                prop = of_get_property(np, "phy_type", NULL);
-                usb_data.phy_mode = determine_usb_phy(prop);
-                ret =
-                    platform_device_add_data(usb_dev_mph, &usb_data,
-                                             sizeof(struct
-                                                    fsl_usb2_platform_data));
-                if (ret)
-                        goto unreg_mph;
-                i++;
-        }
-        for_each_compatible_node(np, NULL, "fsl-usb2-dr") {
-                struct resource r[2];
-                struct fsl_usb2_platform_data usb_data;
-                const unsigned char *prop = NULL;
-                if (!of_device_is_available(np))
+        for_each_node_by_name(np, "global-utilities") {
-                        continue;
+                if ((of_get_property(np, "fsl,has-rstcr", NULL))) {
+                        rstcr = of_iomap(np, 0) + 0xb0;
-                memset(&r, 0, sizeof(r));
+                        if (!rstcr)
-                memset(&usb_data, 0, sizeof(usb_data));
+                                printk (KERN_ERR "Error: reset control "
+                                                "register not mapped!\n");
-                ret = of_address_to_resource(np, 0, &r[0]);
+                        break;
-                if (ret)
-                        goto unreg_mph;
-                of_irq_to_resource(np, 0, &r[1]);
-                prop = of_get_property(np, "dr_mode", NULL);
-                if (!prop || !strcmp(prop, "host")) {
-                        usb_data.operating_mode = FSL_USB2_DR_HOST;
-                        usb_dev_dr_host = platform_device_register_simple(
-                                        "fsl-ehci", i, r, 2);
-                        if (IS_ERR(usb_dev_dr_host)) {
-                                ret = PTR_ERR(usb_dev_dr_host);
-                                goto err;
-                        }
-                } else if (prop && !strcmp(prop, "peripheral")) {
-                        usb_data.operating_mode = FSL_USB2_DR_DEVICE;
-                        usb_dev_dr_client = platform_device_register_simple(
-                                        "fsl-usb2-udc", i, r, 2);
-                        if (IS_ERR(usb_dev_dr_client)) {
-                                ret = PTR_ERR(usb_dev_dr_client);
-                                goto err;
-                        }
-                } else if (prop && !strcmp(prop, "otg")) {
-                        usb_data.operating_mode = FSL_USB2_DR_OTG;
-                        usb_dev_dr_host = platform_device_register_simple(
-                                        "fsl-ehci", i, r, 2);
-                        if (IS_ERR(usb_dev_dr_host)) {
-                                ret = PTR_ERR(usb_dev_dr_host);
-                                goto err;
-                        }
-                        usb_dev_dr_client = platform_device_register_simple(
-                                        "fsl-usb2-udc", i, r, 2);
-                        if (IS_ERR(usb_dev_dr_client)) {
-                                ret = PTR_ERR(usb_dev_dr_client);
-                                goto err;
-                        }
-                } else {
-                        ret = -EINVAL;
-                        goto err;
                }
-                prop = of_get_property(np, "phy_type", NULL);
-                usb_data.phy_mode = determine_usb_phy(prop);
-                if (usb_dev_dr_host) {
-                        usb_dev_dr_host->dev.coherent_dma_mask = 0xffffffffUL;
-                        usb_dev_dr_host->dev.dma_mask = &usb_dev_dr_host->
-                                dev.coherent_dma_mask;
-                        if ((ret = platform_device_add_data(usb_dev_dr_host,
-                                                &usb_data, sizeof(struct
-                                                fsl_usb2_platform_data))))
-                                goto unreg_dr;
-                }
-                if (usb_dev_dr_client) {
-                        usb_dev_dr_client->dev.coherent_dma_mask = 0xffffffffUL;
-                        usb_dev_dr_client->dev.dma_mask = &usb_dev_dr_client->
-                                dev.coherent_dma_mask;
-                        if ((ret = platform_device_add_data(usb_dev_dr_client,
-                                                &usb_data, sizeof(struct
-                                                fsl_usb2_platform_data))))
-                                goto unreg_dr;
-                }
-                i++;
        }
-        return 0;
-unreg_dr:
-        if (usb_dev_dr_host)
-                platform_device_unregister(usb_dev_dr_host);
-        if (usb_dev_dr_client)
-                platform_device_unregister(usb_dev_dr_client);
-unreg_mph:
-        if (usb_dev_mph)
-                platform_device_unregister(usb_dev_mph);
-err:
-        return ret;
-}
-arch_initcall(fsl_usb_of_init);
-#if defined(CONFIG_FSL_SOC_BOOKE) || defined(CONFIG_PPC_86xx)
-static __be32 __iomem *rstcr;
-static int __init setup_rstcr(void)
+        if (!rstcr && ppc_md.restart == fsl_rstcr_restart)
-{
-        struct device_node *np;
-        np = of_find_node_by_name(NULL, "global-utilities");
-        if ((np && of_get_property(np, "fsl,has-rstcr", NULL))) {
-                rstcr = of_iomap(np, 0) + 0xb0;
-                if (!rstcr)
-                        printk (KERN_EMERG "Error: reset control register "
-                                        "not mapped!\n");
-        } else if (ppc_md.restart == fsl_rstcr_restart)
                printk(KERN_ERR "No RSTCR register, warm reboot won't work\n");
        if (np)
                of_node_put(np);
        return 0;
 }
diff --git a/arch/powerpc/sysdev/i8259.c b/arch/powerpc/sysdev/i8259.c
index 6323e70e6bf4..d18bb27e4df9 100644
--- a/arch/powerpc/sysdev/i8259.c
+++ b/arch/powerpc/sysdev/i8259.c
@@ -78,19 +78,19 @@ unsigned int i8259_irq(void)
        return irq;
 }
-static void i8259_mask_and_ack_irq(unsigned int irq_nr)
+static void i8259_mask_and_ack_irq(struct irq_data *d)
 {
        unsigned long flags;
        raw_spin_lock_irqsave(&i8259_lock, flags);
-        if (irq_nr > 7) {
+        if (d->irq > 7) {
-                cached_A1 |= 1 << (irq_nr-8);
+                cached_A1 |= 1 << (d->irq-8);
                inb(0xA1);      /* DUMMY */
                outb(cached_A1, 0xA1);
                outb(0x20, 0xA0);       /* Non-specific EOI */
                outb(0x20, 0x20);       /* Non-specific EOI to cascade */
        } else {
-                cached_21 |= 1 << irq_nr;
+                cached_21 |= 1 << d->irq;
                inb(0x21);      /* DUMMY */
                outb(cached_21, 0x21);
                outb(0x20, 0x20);       /* Non-specific EOI */
@@ -104,42 +104,42 @@ static void i8259_set_irq_mask(int irq_nr)
        outb(cached_21,0x21);
 }
-static void i8259_mask_irq(unsigned int irq_nr)
+static void i8259_mask_irq(struct irq_data *d)
 {
        unsigned long flags;
-        pr_debug("i8259_mask_irq(%d)\n", irq_nr);
+        pr_debug("i8259_mask_irq(%d)\n", d->irq);
        raw_spin_lock_irqsave(&i8259_lock, flags);
-        if (irq_nr < 8)
+        if (d->irq < 8)
-                cached_21 |= 1 << irq_nr;
+                cached_21 |= 1 << d->irq;
        else
-                cached_A1 |= 1 << (irq_nr-8);
+                cached_A1 |= 1 << (d->irq-8);
-        i8259_set_irq_mask(irq_nr);
+        i8259_set_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&i8259_lock, flags);
 }
-static void i8259_unmask_irq(unsigned int irq_nr)
+static void i8259_unmask_irq(struct irq_data *d)
 {
        unsigned long flags;
-        pr_debug("i8259_unmask_irq(%d)\n", irq_nr);
+        pr_debug("i8259_unmask_irq(%d)\n", d->irq);
        raw_spin_lock_irqsave(&i8259_lock, flags);
-        if (irq_nr < 8)
+        if (d->irq < 8)
-                cached_21 &= ~(1 << irq_nr);
+                cached_21 &= ~(1 << d->irq);
        else
-                cached_A1 &= ~(1 << (irq_nr-8));
+                cached_A1 &= ~(1 << (d->irq-8));
-        i8259_set_irq_mask(irq_nr);
+        i8259_set_irq_mask(d->irq);
        raw_spin_unlock_irqrestore(&i8259_lock, flags);
 }
 static struct irq_chip i8259_pic = {
        .name           = "i8259",
-        .mask           = i8259_mask_irq,
+        .irq_mask       = i8259_mask_irq,
-        .disable        = i8259_mask_irq,
+        .irq_disable    = i8259_mask_irq,
-        .unmask         = i8259_unmask_irq,
+        .irq_unmask     = i8259_unmask_irq,
-        .mask_ack       = i8259_mask_and_ack_irq,
+        .irq_mask_ack   = i8259_mask_and_ack_irq,
 };
 static struct resource pic1_iores = {
@@ -175,28 +175,16 @@ static int i8259_host_map(struct irq_host *h, unsigned int virq,
        /* We block the internal cascade */
        if (hw == 2)
-                irq_to_desc(virq)->status |= IRQ_NOREQUEST;
+                irq_set_status_flags(virq, IRQ_NOREQUEST);
        /* We use the level handler only for now, we might want to
         * be more cautious here but that works for now
         */
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, &i8259_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &i8259_pic, handle_level_irq);
        return 0;
 }
-static void i8259_host_unmap(struct irq_host *h, unsigned int virq)
-{
-        /* Make sure irq is masked in hardware */
-        i8259_mask_irq(virq);
-        /* remove chip and handler */
-        set_irq_chip_and_handler(virq, NULL, NULL);
-        /* Make sure it's completed */
-        synchronize_irq(virq);
-}
 static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
                            const u32 *intspec, unsigned int intsize,
                            irq_hw_number_t *out_hwirq, unsigned int *out_flags)
@@ -220,7 +208,6 @@ static int i8259_host_xlate(struct irq_host *h, struct device_node *ct,
 static struct irq_host_ops i8259_host_ops = {
        .match = i8259_host_match,
        .map = i8259_host_map,
-        .unmap = i8259_host_unmap,
        .xlate = i8259_host_xlate,
 };
diff --git a/arch/powerpc/sysdev/indirect_pci.c b/arch/powerpc/sysdev/indirect_pci.c
index 7ed809676642..82fdad885d20 100644
--- a/arch/powerpc/sysdev/indirect_pci.c
+++ b/arch/powerpc/sysdev/indirect_pci.c
@@ -117,7 +117,7 @@ indirect_write_config(struct pci_bus *bus, unsigned int devfn, int offset,
                out_le32(hose->cfg_addr, (0x80000000 | (bus_no << 16) |
                         (devfn << 8) | reg | cfg_type));
-        /* surpress setting of PCI_PRIMARY_BUS */
+        /* suppress setting of PCI_PRIMARY_BUS */
        if (hose->indirect_type & PPC_INDIRECT_TYPE_SURPRESS_PRIMARY_BUS)
                if ((offset == PCI_PRIMARY_BUS) &&
                        (bus->number == hose->first_busno))
diff --git a/arch/powerpc/sysdev/ipic.c b/arch/powerpc/sysdev/ipic.c
index d7b9b9c69287..7367d17364cb 100644
--- a/arch/powerpc/sysdev/ipic.c
+++ b/arch/powerpc/sysdev/ipic.c
@@ -18,7 +18,7 @@
 #include <linux/stddef.h>
 #include <linux/sched.h>
 #include <linux/signal.h>
-#include <linux/sysdev.h>
+#include <linux/syscore_ops.h>
 #include <linux/device.h>
 #include <linux/bootmem.h>
 #include <linux/spinlock.h>
@@ -521,12 +521,10 @@ static inline struct ipic * ipic_from_irq(unsigned int virq)
        return primary_ipic;
 }
-#define ipic_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
+static void ipic_unmask_irq(struct irq_data *d)
-static void ipic_unmask_irq(unsigned int virq)
 {
-        struct ipic *ipic = ipic_from_irq(virq);
+        struct ipic *ipic = ipic_from_irq(d->irq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -539,10 +537,10 @@ static void ipic_unmask_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&ipic_lock, flags);
 }
-static void ipic_mask_irq(unsigned int virq)
+static void ipic_mask_irq(struct irq_data *d)
 {
-        struct ipic *ipic = ipic_from_irq(virq);
+        struct ipic *ipic = ipic_from_irq(d->irq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -559,10 +557,10 @@ static void ipic_mask_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&ipic_lock, flags);
 }
-static void ipic_ack_irq(unsigned int virq)
+static void ipic_ack_irq(struct irq_data *d)
 {
-        struct ipic *ipic = ipic_from_irq(virq);
+        struct ipic *ipic = ipic_from_irq(d->irq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -578,10 +576,10 @@ static void ipic_ack_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&ipic_lock, flags);
 }
-static void ipic_mask_irq_and_ack(unsigned int virq)
+static void ipic_mask_irq_and_ack(struct irq_data *d)
 {
-        struct ipic *ipic = ipic_from_irq(virq);
+        struct ipic *ipic = ipic_from_irq(d->irq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -601,11 +599,10 @@ static void ipic_mask_irq_and_ack(unsigned int virq)
        raw_spin_unlock_irqrestore(&ipic_lock, flags);
 }
-static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int ipic_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct ipic *ipic = ipic_from_irq(virq);
+        struct ipic *ipic = ipic_from_irq(d->irq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        struct irq_desc *desc = irq_to_desc(virq);
        unsigned int vold, vnew, edibit;
        if (flow_type == IRQ_TYPE_NONE)
@@ -623,17 +620,16 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
                printk(KERN_ERR "ipic: edge sense not supported on internal "
                                "interrupts\n");
                return -EINVAL;
        }
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+        irqd_set_trigger_type(d, flow_type);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
        if (flow_type & IRQ_TYPE_LEVEL_LOW)  {
-                desc->status |= IRQ_LEVEL;
+                __irq_set_handler_locked(d->irq, handle_level_irq);
-                desc->handle_irq = handle_level_irq;
+                d->chip = &ipic_level_irq_chip;
-                desc->chip = &ipic_level_irq_chip;
        } else {
-                desc->handle_irq = handle_edge_irq;
+                __irq_set_handler_locked(d->irq, handle_edge_irq);
-                desc->chip = &ipic_edge_irq_chip;
+                d->chip = &ipic_edge_irq_chip;
        }
        /* only EXT IRQ senses are programmable on ipic
@@ -655,25 +651,25 @@ static int ipic_set_irq_type(unsigned int virq, unsigned int flow_type)
        }
        if (vold != vnew)
                ipic_write(ipic->regs, IPIC_SECNR, vnew);
-        return 0;
+        return IRQ_SET_MASK_OK_NOCOPY;
 }
 /* level interrupts and edge interrupts have different ack operations */
 static struct irq_chip ipic_level_irq_chip = {
        .name           = "IPIC",
-        .unmask         = ipic_unmask_irq,
+        .irq_unmask     = ipic_unmask_irq,
-        .mask           = ipic_mask_irq,
+        .irq_mask       = ipic_mask_irq,
-        .mask_ack       = ipic_mask_irq,
+        .irq_mask_ack   = ipic_mask_irq,
-        .set_type       = ipic_set_irq_type,
+        .irq_set_type   = ipic_set_irq_type,
 };
 static struct irq_chip ipic_edge_irq_chip = {
        .name           = "IPIC",
-        .unmask         = ipic_unmask_irq,
+        .irq_unmask     = ipic_unmask_irq,
-        .mask           = ipic_mask_irq,
+        .irq_mask       = ipic_mask_irq,
-        .mask_ack       = ipic_mask_irq_and_ack,
+        .irq_mask_ack   = ipic_mask_irq_and_ack,
-        .ack            = ipic_ack_irq,
+        .irq_ack        = ipic_ack_irq,
-        .set_type       = ipic_set_irq_type,
+        .irq_set_type   = ipic_set_irq_type,
 };
 static int ipic_host_match(struct irq_host *h, struct device_node *node)
@@ -687,11 +683,11 @@ static int ipic_host_map(struct irq_host *h, unsigned int virq,
 {
        struct ipic *ipic = h->host_data;
-        set_irq_chip_data(virq, ipic);
+        irq_set_chip_data(virq, ipic);
-        set_irq_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, &ipic_level_irq_chip, handle_level_irq);
        /* Set default irq type */
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
        return 0;
 }
@@ -795,7 +791,7 @@ struct ipic * __init ipic_init(struct device_node *node, unsigned int flags)
 int ipic_set_priority(unsigned int virq, unsigned int priority)
 {
        struct ipic *ipic = ipic_from_irq(virq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = virq_to_hw(virq);
        u32 temp;
        if (priority > 7)
@@ -823,7 +819,7 @@ int ipic_set_priority(unsigned int virq, unsigned int priority)
 void ipic_set_highest_priority(unsigned int virq)
 {
        struct ipic *ipic = ipic_from_irq(virq);
-        unsigned int src = ipic_irq_to_hw(virq);
+        unsigned int src = virq_to_hw(virq);
        u32 temp;
        temp = ipic_read(ipic->regs, IPIC_SICFR);
@@ -904,7 +900,7 @@ static struct {
        u32 sercr;
 } ipic_saved_state;
-static int ipic_suspend(struct sys_device *sdev, pm_message_t state)
+static int ipic_suspend(void)
 {
        struct ipic *ipic = primary_ipic;
@@ -935,7 +931,7 @@ static int ipic_suspend(struct sys_device *sdev, pm_message_t state)
        return 0;
 }
-static int ipic_resume(struct sys_device *sdev)
+static void ipic_resume(void)
 {
        struct ipic *ipic = primary_ipic;
@@ -951,44 +947,26 @@ static int ipic_resume(struct sys_device *sdev)
        ipic_write(ipic->regs, IPIC_SECNR, ipic_saved_state.secnr);
        ipic_write(ipic->regs, IPIC_SERMR, ipic_saved_state.sermr);
        ipic_write(ipic->regs, IPIC_SERCR, ipic_saved_state.sercr);
-        return 0;
 }
 #else
 #define ipic_suspend NULL
 #define ipic_resume NULL
 #endif
-static struct sysdev_class ipic_sysclass = {
+static struct syscore_ops ipic_syscore_ops = {
-        .name = "ipic",
        .suspend = ipic_suspend,
        .resume = ipic_resume,
 };
-static struct sys_device device_ipic = {
+static int __init init_ipic_syscore(void)
-        .id             = 0,
-        .cls            = &ipic_sysclass,
-};
-static int __init init_ipic_sysfs(void)
 {
-        int rc;
        if (!primary_ipic || !primary_ipic->regs)
                return -ENODEV;
-        printk(KERN_DEBUG "Registering ipic with sysfs...\n");
-        rc = sysdev_class_register(&ipic_sysclass);
+        printk(KERN_DEBUG "Registering ipic system core operations\n");
-        if (rc) {
+        register_syscore_ops(&ipic_syscore_ops);
-                printk(KERN_ERR "Failed registering ipic sys class\n");
-                return -ENODEV;
-        }
-        rc = sysdev_register(&device_ipic);
-        if (rc) {
-                printk(KERN_ERR "Failed registering ipic sys device\n");
-                return -ENODEV;
-        }
        return 0;
 }
-subsys_initcall(init_ipic_sysfs);
+subsys_initcall(init_ipic_syscore);
diff --git a/arch/powerpc/sysdev/mmio_nvram.c b/arch/powerpc/sysdev/mmio_nvram.c
index 207324209065..ddc877a3a23a 100644
--- a/arch/powerpc/sysdev/mmio_nvram.c
+++ b/arch/powerpc/sysdev/mmio_nvram.c
@@ -115,6 +115,8 @@ int __init mmio_nvram_init(void)
        int ret;
        nvram_node = of_find_node_by_type(NULL, "nvram");
+        if (!nvram_node)
+                nvram_node = of_find_compatible_node(NULL, NULL, "nvram");
        if (!nvram_node) {
                printk(KERN_WARNING "nvram: no node found in device-tree\n");
                return -ENODEV;
diff --git a/arch/powerpc/sysdev/mpc8xx_pic.c b/arch/powerpc/sysdev/mpc8xx_pic.c
index 8c27d261aba8..20924f2246f0 100644
--- a/arch/powerpc/sysdev/mpc8xx_pic.c
+++ b/arch/powerpc/sysdev/mpc8xx_pic.c
@@ -25,10 +25,10 @@ static sysconf8xx_t __iomem *siu_reg;
 int cpm_get_irq(struct pt_regs *regs);
-static void mpc8xx_unmask_irq(unsigned int virq)
+static void mpc8xx_unmask_irq(struct irq_data *d)
 {
        int     bit, word;
-        unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
+        unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
        bit = irq_nr & 0x1f;
        word = irq_nr >> 5;
@@ -37,10 +37,10 @@ static void mpc8xx_unmask_irq(unsigned int virq)
        out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
-static void mpc8xx_mask_irq(unsigned int virq)
+static void mpc8xx_mask_irq(struct irq_data *d)
 {
        int     bit, word;
-        unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
+        unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
        bit = irq_nr & 0x1f;
        word = irq_nr >> 5;
@@ -49,19 +49,19 @@ static void mpc8xx_mask_irq(unsigned int virq)
        out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
-static void mpc8xx_ack(unsigned int virq)
+static void mpc8xx_ack(struct irq_data *d)
 {
        int     bit;
-        unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
+        unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
        bit = irq_nr & 0x1f;
        out_be32(&siu_reg->sc_sipend, 1 << (31-bit));
 }
-static void mpc8xx_end_irq(unsigned int virq)
+static void mpc8xx_end_irq(struct irq_data *d)
 {
        int bit, word;
-        unsigned int irq_nr = (unsigned int)irq_map[virq].hwirq;
+        unsigned int irq_nr = (unsigned int)irqd_to_hwirq(d);
        bit = irq_nr & 0x1f;
        word = irq_nr >> 5;
@@ -70,24 +70,17 @@ static void mpc8xx_end_irq(unsigned int virq)
        out_be32(&siu_reg->sc_simask, ppc_cached_irq_mask[word]);
 }
-static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int mpc8xx_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
-                desc->status |= IRQ_LEVEL;
        if (flow_type & IRQ_TYPE_EDGE_FALLING) {
-                irq_hw_number_t hw = (unsigned int)irq_map[virq].hwirq;
+                irq_hw_number_t hw = (unsigned int)irqd_to_hwirq(d);
                unsigned int siel = in_be32(&siu_reg->sc_siel);
                /* only external IRQ senses are programmable */
                if ((hw & 1) == 0) {
                        siel |= (0x80000000 >> hw);
                        out_be32(&siu_reg->sc_siel, siel);
-                        desc->handle_irq = handle_edge_irq;
+                        __irq_set_handler_locked(d->irq, handle_edge_irq);
                }
        }
        return 0;
@@ -95,11 +88,11 @@ static int mpc8xx_set_irq_type(unsigned int virq, unsigned int flow_type)
 static struct irq_chip mpc8xx_pic = {
        .name = "MPC8XX SIU",
-        .unmask = mpc8xx_unmask_irq,
+        .irq_unmask = mpc8xx_unmask_irq,
-        .mask = mpc8xx_mask_irq,
+        .irq_mask = mpc8xx_mask_irq,
-        .ack = mpc8xx_ack,
+        .irq_ack = mpc8xx_ack,
-        .eoi = mpc8xx_end_irq,
+        .irq_eoi = mpc8xx_end_irq,
-        .set_type = mpc8xx_set_irq_type,
+        .irq_set_type = mpc8xx_set_irq_type,
 };
 unsigned int mpc8xx_get_irq(void)
@@ -124,7 +117,7 @@ static int mpc8xx_pic_host_map(struct irq_host *h, unsigned int virq,
        pr_debug("mpc8xx_pic_host_map(%d, 0x%lx)\n", virq, hw);
        /* Set default irq handle */
-        set_irq_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
+        irq_set_chip_and_handler(virq, &mpc8xx_pic, handle_level_irq);
        return 0;
 }
diff --git a/arch/powerpc/sysdev/mpc8xxx_gpio.c b/arch/powerpc/sysdev/mpc8xxx_gpio.c
index 2b69084d0f0c..fb4963abdf55 100644
--- a/arch/powerpc/sysdev/mpc8xxx_gpio.c
+++ b/arch/powerpc/sysdev/mpc8xxx_gpio.c
@@ -1,5 +1,5 @@
 /*
- * GPIOs on MPC8349/8572/8610 and compatible
+ * GPIOs on MPC512x/8349/8572/8610 and compatible
 *
 * Copyright (C) 2008 Peter Korsgaard <jacmet@sunsite.dk>
 *
@@ -26,6 +26,7 @@
 #define GPIO_IER                0x0c
 #define GPIO_IMR                0x10
 #define GPIO_ICR                0x14
+#define GPIO_ICR2               0x18
 struct mpc8xxx_gpio_chip {
        struct of_mm_gpio_chip mm_gc;
@@ -37,6 +38,7 @@ struct mpc8xxx_gpio_chip {
         */
        u32 data;
        struct irq_host *irq;
+        void *of_dev_id_data;
 };
 static inline u32 mpc8xxx_gpio2mask(unsigned int gpio)
@@ -143,7 +145,7 @@ static int mpc8xxx_gpio_to_irq(struct gpio_chip *gc, unsigned offset)
 static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_desc_data(desc);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_desc_get_handler_data(desc);
        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
        unsigned int mask;
@@ -153,43 +155,43 @@ static void mpc8xxx_gpio_irq_cascade(unsigned int irq, struct irq_desc *desc)
                                                     32 - ffs(mask)));
 }
-static void mpc8xxx_irq_unmask(unsigned int virq)
+static void mpc8xxx_irq_unmask(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
        unsigned long flags;
        spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
-        setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        setbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
        spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
 }
-static void mpc8xxx_irq_mask(unsigned int virq)
+static void mpc8xxx_irq_mask(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
        unsigned long flags;
        spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
-        clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        clrbits32(mm->regs + GPIO_IMR, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
        spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
 }
-static void mpc8xxx_irq_ack(unsigned int virq)
+static void mpc8xxx_irq_ack(struct irq_data *d)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
-        out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(virq_to_hw(virq)));
+        out_be32(mm->regs + GPIO_IER, mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
 }
-static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
+static int mpc8xxx_irq_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct mpc8xxx_gpio_chip *mpc8xxx_gc = get_irq_chip_data(virq);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
        unsigned long flags;
@@ -197,14 +199,59 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
        case IRQ_TYPE_EDGE_FALLING:
                spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
                setbits32(mm->regs + GPIO_ICR,
-                          mpc8xxx_gpio2mask(virq_to_hw(virq)));
+                          mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
                spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
                break;
        case IRQ_TYPE_EDGE_BOTH:
                spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
                clrbits32(mm->regs + GPIO_ICR,
-                          mpc8xxx_gpio2mask(virq_to_hw(virq)));
+                          mpc8xxx_gpio2mask(irqd_to_hwirq(d)));
+                spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
+                break;
+        default:
+                return -EINVAL;
+        }
+        return 0;
+}
+static int mpc512x_irq_set_type(struct irq_data *d, unsigned int flow_type)
+{
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = irq_data_get_irq_chip_data(d);
+        struct of_mm_gpio_chip *mm = &mpc8xxx_gc->mm_gc;
+        unsigned long gpio = irqd_to_hwirq(d);
+        void __iomem *reg;
+        unsigned int shift;
+        unsigned long flags;
+        if (gpio < 16) {
+                reg = mm->regs + GPIO_ICR;
+                shift = (15 - gpio) * 2;
+        } else {
+                reg = mm->regs + GPIO_ICR2;
+                shift = (15 - (gpio % 16)) * 2;
+        }
+        switch (flow_type) {
+        case IRQ_TYPE_EDGE_FALLING:
+        case IRQ_TYPE_LEVEL_LOW:
+                spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
+                clrsetbits_be32(reg, 3 << shift, 2 << shift);
+                spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
+                break;
+        case IRQ_TYPE_EDGE_RISING:
+        case IRQ_TYPE_LEVEL_HIGH:
+                spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
+                clrsetbits_be32(reg, 3 << shift, 1 << shift);
+                spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
+                break;
+        case IRQ_TYPE_EDGE_BOTH:
+                spin_lock_irqsave(&mpc8xxx_gc->lock, flags);
+                clrbits32(reg, 3 << shift);
                spin_unlock_irqrestore(&mpc8xxx_gc->lock, flags);
                break;
@@ -217,18 +264,23 @@ static int mpc8xxx_irq_set_type(unsigned int virq, unsigned int flow_type)
 static struct irq_chip mpc8xxx_irq_chip = {
        .name           = "mpc8xxx-gpio",
-        .unmask         = mpc8xxx_irq_unmask,
+        .irq_unmask     = mpc8xxx_irq_unmask,
-        .mask           = mpc8xxx_irq_mask,
+        .irq_mask       = mpc8xxx_irq_mask,
-        .ack            = mpc8xxx_irq_ack,
+        .irq_ack        = mpc8xxx_irq_ack,
-        .set_type       = mpc8xxx_irq_set_type,
+        .irq_set_type   = mpc8xxx_irq_set_type,
 };
 static int mpc8xxx_gpio_irq_map(struct irq_host *h, unsigned int virq,
                                irq_hw_number_t hw)
 {
-        set_irq_chip_data(virq, h->host_data);
+        struct mpc8xxx_gpio_chip *mpc8xxx_gc = h->host_data;
-        set_irq_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        if (mpc8xxx_gc->of_dev_id_data)
+                mpc8xxx_irq_chip.irq_set_type = mpc8xxx_gc->of_dev_id_data;
+        irq_set_chip_data(virq, h->host_data);
+        irq_set_chip_and_handler(virq, &mpc8xxx_irq_chip, handle_level_irq);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
        return 0;
 }
@@ -253,11 +305,21 @@ static struct irq_host_ops mpc8xxx_gpio_irq_ops = {
        .xlate  = mpc8xxx_gpio_irq_xlate,
 };
+static struct of_device_id mpc8xxx_gpio_ids[] __initdata = {
+        { .compatible = "fsl,mpc8349-gpio", },
+        { .compatible = "fsl,mpc8572-gpio", },
+        { .compatible = "fsl,mpc8610-gpio", },
+        { .compatible = "fsl,mpc5121-gpio", .data = mpc512x_irq_set_type, },
+        { .compatible = "fsl,qoriq-gpio",   },
+        {}
+};
 static void __init mpc8xxx_add_controller(struct device_node *np)
 {
        struct mpc8xxx_gpio_chip *mpc8xxx_gc;
        struct of_mm_gpio_chip *mm_gc;
        struct gpio_chip *gc;
+        const struct of_device_id *id;
        unsigned hwirq;
        int ret;
@@ -297,14 +359,18 @@ static void __init mpc8xxx_add_controller(struct device_node *np)
        if (!mpc8xxx_gc->irq)
                goto skip_irq;
+        id = of_match_node(mpc8xxx_gpio_ids, np);
+        if (id)
+                mpc8xxx_gc->of_dev_id_data = id->data;
        mpc8xxx_gc->irq->host_data = mpc8xxx_gc;
        /* ack and mask all irqs */
        out_be32(mm_gc->regs + GPIO_IER, 0xffffffff);
        out_be32(mm_gc->regs + GPIO_IMR, 0);
-        set_irq_data(hwirq, mpc8xxx_gc);
+        irq_set_handler_data(hwirq, mpc8xxx_gc);
-        set_irq_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade);
+        irq_set_chained_handler(hwirq, mpc8xxx_gpio_irq_cascade);
 skip_irq:
        return;
@@ -321,13 +387,7 @@ static int __init mpc8xxx_add_gpiochips(void)
 {
        struct device_node *np;
-        for_each_compatible_node(np, NULL, "fsl,mpc8349-gpio")
+        for_each_matching_node(np, mpc8xxx_gpio_ids)
-                mpc8xxx_add_controller(np);
-        for_each_compatible_node(np, NULL, "fsl,mpc8572-gpio")
-                mpc8xxx_add_controller(np);
-        for_each_compatible_node(np, NULL, "fsl,mpc8610-gpio")
                mpc8xxx_add_controller(np);
        return 0;
diff --git a/arch/powerpc/sysdev/mpic.c b/arch/powerpc/sysdev/mpic.c
index 7c1342618a30..58d7a534f877 100644
--- a/arch/powerpc/sysdev/mpic.c
+++ b/arch/powerpc/sysdev/mpic.c
@@ -6,6 +6,7 @@
 *  with various broken implementations of this HW.
 *
 *  Copyright (C) 2004 Benjamin Herrenschmidt, IBM Corp.
+ *  Copyright 2010-2011 Freescale Semiconductor, Inc.
 *
 *  This file is subject to the terms and conditions of the GNU General Public
 *  License.  See the file COPYING in the main directory of this archive
@@ -27,6 +28,8 @@
 #include <linux/spinlock.h>
 #include <linux/pci.h>
 #include <linux/slab.h>
+#include <linux/syscore_ops.h>
+#include <linux/ratelimit.h>
 #include <asm/ptrace.h>
 #include <asm/signal.h>
@@ -147,6 +150,16 @@ static u32 mpic_infos[][MPIC_IDX_END] = {
 #endif /* CONFIG_MPIC_WEIRD */
+static inline unsigned int mpic_processor_id(struct mpic *mpic)
+{
+        unsigned int cpu = 0;
+        if (mpic->flags & MPIC_PRIMARY)
+                cpu = hard_smp_processor_id();
+        return cpu;
+}
 /*
 * Register accessor functions
 */
@@ -208,21 +221,38 @@ static inline void _mpic_ipi_write(struct mpic *mpic, unsigned int ipi, u32 valu
        _mpic_write(mpic->reg_type, &mpic->gregs, offset, value);
 }
+static inline u32 _mpic_tm_read(struct mpic *mpic, unsigned int tm)
+{
+        unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+                              ((tm & 3) * MPIC_INFO(TIMER_STRIDE));
+        if (tm >= 4)
+                offset += 0x1000 / 4;
+        return _mpic_read(mpic->reg_type, &mpic->tmregs, offset);
+}
+static inline void _mpic_tm_write(struct mpic *mpic, unsigned int tm, u32 value)
+{
+        unsigned int offset = MPIC_INFO(TIMER_VECTOR_PRI) +
+                              ((tm & 3) * MPIC_INFO(TIMER_STRIDE));
+        if (tm >= 4)
+                offset += 0x1000 / 4;
+        _mpic_write(mpic->reg_type, &mpic->tmregs, offset, value);
+}
 static inline u32 _mpic_cpu_read(struct mpic *mpic, unsigned int reg)
 {
-        unsigned int cpu = 0;
+        unsigned int cpu = mpic_processor_id(mpic);
-        if (mpic->flags & MPIC_PRIMARY)
-                cpu = hard_smp_processor_id();
        return _mpic_read(mpic->reg_type, &mpic->cpuregs[cpu], reg);
 }
 static inline void _mpic_cpu_write(struct mpic *mpic, unsigned int reg, u32 value)
 {
-        unsigned int cpu = 0;
+        unsigned int cpu = mpic_processor_id(mpic);
-        if (mpic->flags & MPIC_PRIMARY)
-                cpu = hard_smp_processor_id();
        _mpic_write(mpic->reg_type, &mpic->cpuregs[cpu], reg, value);
 }
@@ -263,6 +293,8 @@ static inline void _mpic_irq_write(struct mpic *mpic, unsigned int src_no,
 #define mpic_write(b,r,v)       _mpic_write(mpic->reg_type,&(b),(r),(v))
 #define mpic_ipi_read(i)        _mpic_ipi_read(mpic,(i))
 #define mpic_ipi_write(i,v)     _mpic_ipi_write(mpic,(i),(v))
+#define mpic_tm_read(i)         _mpic_tm_read(mpic,(i))
+#define mpic_tm_write(i,v)      _mpic_tm_write(mpic,(i),(v))
 #define mpic_cpu_read(i)        _mpic_cpu_read(mpic,(i))
 #define mpic_cpu_write(i,v)     _mpic_cpu_write(mpic,(i),(v))
 #define mpic_irq_read(s,r)      _mpic_irq_read(mpic,(s),(r))
@@ -356,7 +388,7 @@ static inline void mpic_ht_end_irq(struct mpic *mpic, unsigned int source)
 }
 static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
-                                      unsigned int irqflags)
+                                      bool level)
 {
        struct mpic_irq_fixup *fixup = &mpic->fixups[source];
        unsigned long flags;
@@ -365,14 +397,14 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
        if (fixup->base == NULL)
                return;
-        DBG("startup_ht_interrupt(0x%x, 0x%x) index: %d\n",
+        DBG("startup_ht_interrupt(0x%x) index: %d\n",
-            source, irqflags, fixup->index);
+            source, fixup->index);
        raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
        /* Enable and configure */
        writeb(0x10 + 2 * fixup->index, fixup->base + 2);
        tmp = readl(fixup->base + 4);
        tmp &= ~(0x23U);
-        if (irqflags & IRQ_LEVEL)
+        if (level)
                tmp |= 0x22;
        writel(tmp, fixup->base + 4);
        raw_spin_unlock_irqrestore(&mpic->fixup_lock, flags);
@@ -384,8 +416,7 @@ static void mpic_startup_ht_interrupt(struct mpic *mpic, unsigned int source,
 #endif
 }
-static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
+static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source)
-                                       unsigned int irqflags)
 {
        struct mpic_irq_fixup *fixup = &mpic->fixups[source];
        unsigned long flags;
@@ -394,7 +425,7 @@ static void mpic_shutdown_ht_interrupt(struct mpic *mpic, unsigned int source,
        if (fixup->base == NULL)
                return;
-        DBG("shutdown_ht_interrupt(0x%x, 0x%x)\n", source, irqflags);
+        DBG("shutdown_ht_interrupt(0x%x)\n", source);
        /* Disable */
        raw_spin_lock_irqsave(&mpic->fixup_lock, flags);
@@ -603,25 +634,30 @@ static int irq_choose_cpu(const struct cpumask *mask)
 }
 #endif
-#define mpic_irq_to_hw(virq)    ((unsigned int)irq_map[virq].hwirq)
 /* Find an mpic associated with a given linux interrupt */
 static struct mpic *mpic_find(unsigned int irq)
 {
        if (irq < NUM_ISA_INTERRUPTS)
                return NULL;
-        return irq_to_desc(irq)->chip_data;
+        return irq_get_chip_data(irq);
 }
 /* Determine if the linux irq is an IPI */
 static unsigned int mpic_is_ipi(struct mpic *mpic, unsigned int irq)
 {
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = virq_to_hw(irq);
        return (src >= mpic->ipi_vecs[0] && src <= mpic->ipi_vecs[3]);
 }
+/* Determine if the linux irq is a timer */
+static unsigned int mpic_is_tm(struct mpic *mpic, unsigned int irq)
+{
+        unsigned int src = virq_to_hw(irq);
+        return (src >= mpic->timer_vecs[0] && src <= mpic->timer_vecs[7]);
+}
 /* Convert a cpu mask from logical to physical cpu numbers. */
 static inline u32 mpic_physmask(u32 cpumask)
@@ -629,23 +665,29 @@ static inline u32 mpic_physmask(u32 cpumask)
        int i;
        u32 mask = 0;
-        for (i = 0; i < NR_CPUS; ++i, cpumask >>= 1)
+        for (i = 0; i < min(32, NR_CPUS); ++i, cpumask >>= 1)
                mask |= (cpumask & 1) << get_hard_smp_processor_id(i);
        return mask;
 }
 #ifdef CONFIG_SMP
 /* Get the mpic structure from the IPI number */
-static inline struct mpic * mpic_from_ipi(unsigned int ipi)
+static inline struct mpic * mpic_from_ipi(struct irq_data *d)
 {
-        return irq_to_desc(ipi)->chip_data;
+        return irq_data_get_irq_chip_data(d);
 }
 #endif
 /* Get the mpic structure from the irq number */
 static inline struct mpic * mpic_from_irq(unsigned int irq)
 {
-        return irq_to_desc(irq)->chip_data;
+        return irq_get_chip_data(irq);
+}
+/* Get the mpic structure from the irq data */
+static inline struct mpic * mpic_from_irq_data(struct irq_data *d)
+{
+        return irq_data_get_irq_chip_data(d);
 }
 /* Send an EOI */
@@ -660,13 +702,13 @@ static inline void mpic_eoi(struct mpic *mpic)
 */
-void mpic_unmask_irq(unsigned int irq)
+void mpic_unmask_irq(struct irq_data *d)
 {
        unsigned int loops = 100000;
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
-        DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, irq, src);
+        DBG("%p: %s: enable_irq: %d (src %d)\n", mpic, mpic->name, d->irq, src);
        mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
                       mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) &
@@ -674,19 +716,20 @@ void mpic_unmask_irq(unsigned int irq)
        /* make sure mask gets to controller before we return to user */
        do {
                if (!loops--) {
-                        printk(KERN_ERR "mpic_enable_irq timeout\n");
+                        printk(KERN_ERR "%s: timeout on hwirq %u\n",
+                               __func__, src);
                        break;
                }
        } while(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK);
 }
-void mpic_mask_irq(unsigned int irq)
+void mpic_mask_irq(struct irq_data *d)
 {
        unsigned int loops = 100000;
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
-        DBG("%s: disable_irq: %d (src %d)\n", mpic->name, irq, src);
+        DBG("%s: disable_irq: %d (src %d)\n", mpic->name, d->irq, src);
        mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI),
                       mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) |
@@ -695,18 +738,19 @@ void mpic_mask_irq(unsigned int irq)
        /* make sure mask gets to controller before we return to user */
        do {
                if (!loops--) {
-                        printk(KERN_ERR "mpic_enable_irq timeout\n");
+                        printk(KERN_ERR "%s: timeout on hwirq %u\n",
+                               __func__, src);
                        break;
                }
        } while(!(mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI)) & MPIC_VECPRI_MASK));
 }
-void mpic_end_irq(unsigned int irq)
+void mpic_end_irq(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
 #ifdef DEBUG_IRQ
-        DBG("%s: end_irq: %d\n", mpic->name, irq);
+        DBG("%s: end_irq: %d\n", mpic->name, d->irq);
 #endif
        /* We always EOI on end_irq() even for edge interrupts since that
         * should only lower the priority, the MPIC should have properly
@@ -718,51 +762,51 @@ void mpic_end_irq(unsigned int irq)
 #ifdef CONFIG_MPIC_U3_HT_IRQS
-static void mpic_unmask_ht_irq(unsigned int irq)
+static void mpic_unmask_ht_irq(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
-        mpic_unmask_irq(irq);
+        mpic_unmask_irq(d);
-        if (irq_to_desc(irq)->status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                mpic_ht_end_irq(mpic, src);
 }
-static unsigned int mpic_startup_ht_irq(unsigned int irq)
+static unsigned int mpic_startup_ht_irq(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
-        mpic_unmask_irq(irq);
+        mpic_unmask_irq(d);
-        mpic_startup_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
+        mpic_startup_ht_interrupt(mpic, src, irqd_is_level_type(d));
        return 0;
 }
-static void mpic_shutdown_ht_irq(unsigned int irq)
+static void mpic_shutdown_ht_irq(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
-        mpic_shutdown_ht_interrupt(mpic, src, irq_to_desc(irq)->status);
+        mpic_shutdown_ht_interrupt(mpic, src);
-        mpic_mask_irq(irq);
+        mpic_mask_irq(d);
 }
-static void mpic_end_ht_irq(unsigned int irq)
+static void mpic_end_ht_irq(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = irqd_to_hwirq(d);
 #ifdef DEBUG_IRQ
-        DBG("%s: end_irq: %d\n", mpic->name, irq);
+        DBG("%s: end_irq: %d\n", mpic->name, d->irq);
 #endif
        /* We always EOI on end_irq() even for edge interrupts since that
         * should only lower the priority, the MPIC should have properly
         * latched another edge interrupt coming in anyway
         */
-        if (irq_to_desc(irq)->status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                mpic_ht_end_irq(mpic, src);
        mpic_eoi(mpic);
 }
@@ -770,23 +814,23 @@ static void mpic_end_ht_irq(unsigned int irq)
 #ifdef CONFIG_SMP
-static void mpic_unmask_ipi(unsigned int irq)
+static void mpic_unmask_ipi(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_ipi(irq);
+        struct mpic *mpic = mpic_from_ipi(d);
-        unsigned int src = mpic_irq_to_hw(irq) - mpic->ipi_vecs[0];
+        unsigned int src = virq_to_hw(d->irq) - mpic->ipi_vecs[0];
-        DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, irq, src);
+        DBG("%s: enable_ipi: %d (ipi %d)\n", mpic->name, d->irq, src);
        mpic_ipi_write(src, mpic_ipi_read(src) & ~MPIC_VECPRI_MASK);
 }
-static void mpic_mask_ipi(unsigned int irq)
+static void mpic_mask_ipi(struct irq_data *d)
 {
        /* NEVER disable an IPI... that's just plain wrong! */
 }
-static void mpic_end_ipi(unsigned int irq)
+static void mpic_end_ipi(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_ipi(irq);
+        struct mpic *mpic = mpic_from_ipi(d);
        /*
         * IPIs are marked IRQ_PER_CPU. This has the side effect of
@@ -800,26 +844,42 @@ static void mpic_end_ipi(unsigned int irq)
 #endif /* CONFIG_SMP */
-int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask)
+static void mpic_unmask_tm(struct irq_data *d)
 {
-        struct mpic *mpic = mpic_from_irq(irq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0];
+        DBG("%s: enable_tm: %d (tm %d)\n", mpic->name, irq, src);
+        mpic_tm_write(src, mpic_tm_read(src) & ~MPIC_VECPRI_MASK);
+        mpic_tm_read(src);
+}
+static void mpic_mask_tm(struct irq_data *d)
+{
+        struct mpic *mpic = mpic_from_irq_data(d);
+        unsigned int src = virq_to_hw(d->irq) - mpic->timer_vecs[0];
+        mpic_tm_write(src, mpic_tm_read(src) | MPIC_VECPRI_MASK);
+        mpic_tm_read(src);
+}
+int mpic_set_affinity(struct irq_data *d, const struct cpumask *cpumask,
+                      bool force)
+{
+        struct mpic *mpic = mpic_from_irq_data(d);
+        unsigned int src = irqd_to_hwirq(d);
        if (mpic->flags & MPIC_SINGLE_DEST_CPU) {
                int cpuid = irq_choose_cpu(cpumask);
                mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
        } else {
-                cpumask_var_t tmp;
+                u32 mask = cpumask_bits(cpumask)[0];
-                alloc_cpumask_var(&tmp, GFP_KERNEL);
-                cpumask_and(tmp, cpumask, cpu_online_mask);
+                mask &= cpumask_bits(cpu_online_mask)[0];
                mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION),
-                               mpic_physmask(cpumask_bits(tmp)[0]));
+                               mpic_physmask(mask));
-                free_cpumask_var(tmp);
        }
        return 0;
@@ -846,15 +906,14 @@ static unsigned int mpic_type_to_vecpri(struct mpic *mpic, unsigned int type)
        }
 }
-int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
+int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct mpic *mpic = mpic_from_irq(virq);
+        struct mpic *mpic = mpic_from_irq_data(d);
-        unsigned int src = mpic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        struct irq_desc *desc = irq_to_desc(virq);
        unsigned int vecpri, vold, vnew;
        DBG("mpic: set_irq_type(mpic:@%p,virq:%d,src:0x%x,type:0x%x)\n",
-            mpic, virq, src, flow_type);
+            mpic, d->irq, src, flow_type);
        if (src >= mpic->irq_count)
                return -EINVAL;
@@ -865,10 +924,7 @@ int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
        if (flow_type == IRQ_TYPE_NONE)
                flow_type = IRQ_TYPE_LEVEL_LOW;
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
+        irqd_set_trigger_type(d, flow_type);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
-                desc->status |= IRQ_LEVEL;
        if (mpic_is_ht_interrupt(mpic, src))
                vecpri = MPIC_VECPRI_POLARITY_POSITIVE |
@@ -883,13 +939,13 @@ int mpic_set_irq_type(unsigned int virq, unsigned int flow_type)
        if (vold != vnew)
                mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vnew);
-        return 0;
+        return IRQ_SET_MASK_OK_NOCOPY;;
 }
 void mpic_set_vector(unsigned int virq, unsigned int vector)
 {
        struct mpic *mpic = mpic_from_irq(virq);
-        unsigned int src = mpic_irq_to_hw(virq);
+        unsigned int src = virq_to_hw(virq);
        unsigned int vecpri;
        DBG("mpic: set_vector(mpic:@%p,virq:%d,src:%d,vector:0x%x)\n",
@@ -904,29 +960,49 @@ void mpic_set_vector(unsigned int virq, unsigned int vector)
        mpic_irq_write(src, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
 }
+void mpic_set_destination(unsigned int virq, unsigned int cpuid)
+{
+        struct mpic *mpic = mpic_from_irq(virq);
+        unsigned int src = virq_to_hw(virq);
+        DBG("mpic: set_destination(mpic:@%p,virq:%d,src:%d,cpuid:0x%x)\n",
+            mpic, virq, src, cpuid);
+        if (src >= mpic->irq_count)
+                return;
+        mpic_irq_write(src, MPIC_INFO(IRQ_DESTINATION), 1 << cpuid);
+}
 static struct irq_chip mpic_irq_chip = {
-        .mask           = mpic_mask_irq,
+        .irq_mask       = mpic_mask_irq,
-        .unmask         = mpic_unmask_irq,
+        .irq_unmask     = mpic_unmask_irq,
-        .eoi            = mpic_end_irq,
+        .irq_eoi        = mpic_end_irq,
-        .set_type       = mpic_set_irq_type,
+        .irq_set_type   = mpic_set_irq_type,
 };
 #ifdef CONFIG_SMP
 static struct irq_chip mpic_ipi_chip = {
-        .mask           = mpic_mask_ipi,
+        .irq_mask       = mpic_mask_ipi,
-        .unmask         = mpic_unmask_ipi,
+        .irq_unmask     = mpic_unmask_ipi,
-        .eoi            = mpic_end_ipi,
+        .irq_eoi        = mpic_end_ipi,
 };
 #endif /* CONFIG_SMP */
+static struct irq_chip mpic_tm_chip = {
+        .irq_mask       = mpic_mask_tm,
+        .irq_unmask     = mpic_unmask_tm,
+        .irq_eoi        = mpic_end_irq,
+};
 #ifdef CONFIG_MPIC_U3_HT_IRQS
 static struct irq_chip mpic_irq_ht_chip = {
-        .startup        = mpic_startup_ht_irq,
+        .irq_startup    = mpic_startup_ht_irq,
-        .shutdown       = mpic_shutdown_ht_irq,
+        .irq_shutdown   = mpic_shutdown_ht_irq,
-        .mask           = mpic_mask_irq,
+        .irq_mask       = mpic_mask_irq,
-        .unmask         = mpic_unmask_ht_irq,
+        .irq_unmask     = mpic_unmask_ht_irq,
-        .eoi            = mpic_end_ht_irq,
+        .irq_eoi        = mpic_end_ht_irq,
-        .set_type       = mpic_set_irq_type,
+        .irq_set_type   = mpic_set_irq_type,
 };
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
@@ -955,13 +1031,23 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
                WARN_ON(!(mpic->flags & MPIC_PRIMARY));
                DBG("mpic: mapping as IPI\n");
-                set_irq_chip_data(virq, mpic);
+                irq_set_chip_data(virq, mpic);
-                set_irq_chip_and_handler(virq, &mpic->hc_ipi,
+                irq_set_chip_and_handler(virq, &mpic->hc_ipi,
                                         handle_percpu_irq);
                return 0;
        }
 #endif /* CONFIG_SMP */
+        if (hw >= mpic->timer_vecs[0] && hw <= mpic->timer_vecs[7]) {
+                WARN_ON(!(mpic->flags & MPIC_PRIMARY));
+                DBG("mpic: mapping as timer\n");
+                irq_set_chip_data(virq, mpic);
+                irq_set_chip_and_handler(virq, &mpic->hc_tm,
+                                         handle_fasteoi_irq);
+                return 0;
+        }
        if (hw >= mpic->irq_count)
                return -EINVAL;
@@ -978,11 +1064,21 @@ static int mpic_host_map(struct irq_host *h, unsigned int virq,
        DBG("mpic: mapping to irq chip @%p\n", chip);
-        set_irq_chip_data(virq, mpic);
+        irq_set_chip_data(virq, mpic);
-        set_irq_chip_and_handler(virq, chip, handle_fasteoi_irq);
+        irq_set_chip_and_handler(virq, chip, handle_fasteoi_irq);
        /* Set default irq type */
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
+        /* If the MPIC was reset, then all vectors have already been
+         * initialized.  Otherwise, a per source lazy initialization
+         * is done here.
+         */
+        if (!mpic_is_ipi(mpic, hw) && (mpic->flags & MPIC_NO_RESET)) {
+                mpic_set_vector(virq, hw);
+                mpic_set_destination(virq, mpic_processor_id(mpic));
+                mpic_irq_set_priority(virq, 8);
+        }
        return 0;
 }
@@ -992,6 +1088,7 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
                           irq_hw_number_t *out_hwirq, unsigned int *out_flags)
 {
+        struct mpic *mpic = h->host_data;
        static unsigned char map_mpic_senses[4] = {
                IRQ_TYPE_EDGE_RISING,
                IRQ_TYPE_LEVEL_LOW,
@@ -1000,7 +1097,38 @@ static int mpic_host_xlate(struct irq_host *h, struct device_node *ct,
        };
        *out_hwirq = intspec[0];
-        if (intsize > 1) {
+        if (intsize >= 4 && (mpic->flags & MPIC_FSL)) {
+                /*
+                 * Freescale MPIC with extended intspec:
+                 * First two cells are as usual.  Third specifies
+                 * an "interrupt type".  Fourth is type-specific data.
+                 *
+                 * See Documentation/devicetree/bindings/powerpc/fsl/mpic.txt
+                 */
+                switch (intspec[2]) {
+                case 0:
+                case 1: /* no EISR/EIMR support for now, treat as shared IRQ */
+                        break;
+                case 2:
+                        if (intspec[0] >= ARRAY_SIZE(mpic->ipi_vecs))
+                                return -EINVAL;
+                        *out_hwirq = mpic->ipi_vecs[intspec[0]];
+                        break;
+                case 3:
+                        if (intspec[0] >= ARRAY_SIZE(mpic->timer_vecs))
+                                return -EINVAL;
+                        *out_hwirq = mpic->timer_vecs[intspec[0]];
+                        break;
+                default:
+                        pr_debug("%s: unknown irq type %u\n",
+                                 __func__, intspec[2]);
+                        return -EINVAL;
+                }
+                *out_flags = map_mpic_senses[intspec[1] & 3];
+        } else if (intsize > 1) {
                u32 mask = 0x3;
                /* Apple invented a new race of encoding on machines with
@@ -1031,6 +1159,11 @@ static struct irq_host_ops mpic_host_ops = {
        .xlate = mpic_host_xlate,
 };
+static int mpic_reset_prohibited(struct device_node *node)
+{
+        return node && of_get_property(node, "pic-no-reset", NULL);
+}
 /*
 * Exported functions
 */
@@ -1058,12 +1191,12 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->hc_irq = mpic_irq_chip;
        mpic->hc_irq.name = name;
        if (flags & MPIC_PRIMARY)
-                mpic->hc_irq.set_affinity = mpic_set_affinity;
+                mpic->hc_irq.irq_set_affinity = mpic_set_affinity;
 #ifdef CONFIG_MPIC_U3_HT_IRQS
        mpic->hc_ht_irq = mpic_irq_ht_chip;
        mpic->hc_ht_irq.name = name;
        if (flags & MPIC_PRIMARY)
-                mpic->hc_ht_irq.set_affinity = mpic_set_affinity;
+                mpic->hc_ht_irq.irq_set_affinity = mpic_set_affinity;
 #endif /* CONFIG_MPIC_U3_HT_IRQS */
 #ifdef CONFIG_SMP
@@ -1071,6 +1204,9 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic->hc_ipi.name = name;
 #endif /* CONFIG_SMP */
+        mpic->hc_tm = mpic_tm_chip;
+        mpic->hc_tm.name = name;
        mpic->flags = flags;
        mpic->isu_size = isu_size;
        mpic->irq_count = irq_count;
@@ -1081,10 +1217,14 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        else
                intvec_top = 255;
-        mpic->timer_vecs[0] = intvec_top - 8;
+        mpic->timer_vecs[0] = intvec_top - 12;
-        mpic->timer_vecs[1] = intvec_top - 7;
+        mpic->timer_vecs[1] = intvec_top - 11;
-        mpic->timer_vecs[2] = intvec_top - 6;
+        mpic->timer_vecs[2] = intvec_top - 10;
-        mpic->timer_vecs[3] = intvec_top - 5;
+        mpic->timer_vecs[3] = intvec_top - 9;
+        mpic->timer_vecs[4] = intvec_top - 8;
+        mpic->timer_vecs[5] = intvec_top - 7;
+        mpic->timer_vecs[6] = intvec_top - 6;
+        mpic->timer_vecs[7] = intvec_top - 5;
        mpic->ipi_vecs[0]   = intvec_top - 4;
        mpic->ipi_vecs[1]   = intvec_top - 3;
        mpic->ipi_vecs[2]   = intvec_top - 2;
@@ -1094,6 +1234,8 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        /* Check for "big-endian" in device-tree */
        if (node && of_get_property(node, "big-endian", NULL) != NULL)
                mpic->flags |= MPIC_BIG_ENDIAN;
+        if (node && of_device_is_compatible(node, "fsl,mpic"))
+                mpic->flags |= MPIC_FSL;
        /* Look for protected sources */
        if (node) {
@@ -1151,7 +1293,15 @@ struct mpic * __init mpic_alloc(struct device_node *node,
        mpic_map(mpic, node, paddr, &mpic->tmregs, MPIC_INFO(TIMER_BASE), 0x1000);
        /* Reset */
-        if (flags & MPIC_WANTS_RESET) {
+        /* When using a device-node, reset requests are only honored if the MPIC
+         * is allowed to reset.
+         */
+        if (mpic_reset_prohibited(node))
+                mpic->flags |= MPIC_NO_RESET;
+        if ((flags & MPIC_WANTS_RESET) && !(mpic->flags & MPIC_NO_RESET)) {
+                printk(KERN_DEBUG "mpic: Resetting\n");
                mpic_write(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0),
                           mpic_read(mpic->gregs, MPIC_INFO(GREG_GLOBAL_CONF_0))
                           | MPIC_GREG_GCONF_RESET);
@@ -1277,15 +1427,17 @@ void __init mpic_init(struct mpic *mpic)
        /* Set current processor priority to max */
        mpic_cpu_write(MPIC_INFO(CPU_CURRENT_TASK_PRI), 0xf);
-        /* Initialize timers: just disable them all */
+        /* Initialize timers to our reserved vectors and mask them for now */
        for (i = 0; i < 4; i++) {
                mpic_write(mpic->tmregs,
                           i * MPIC_INFO(TIMER_STRIDE) +
-                           MPIC_INFO(TIMER_DESTINATION), 0);
+                           MPIC_INFO(TIMER_DESTINATION),
+                           1 << hard_smp_processor_id());
                mpic_write(mpic->tmregs,
                           i * MPIC_INFO(TIMER_STRIDE) +
                           MPIC_INFO(TIMER_VECTOR_PRI),
                           MPIC_VECPRI_MASK |
+                           (9 << MPIC_VECPRI_PRIORITY_SHIFT) |
                           (mpic->timer_vecs[0] + i));
        }
@@ -1311,22 +1463,21 @@ void __init mpic_init(struct mpic *mpic)
        mpic_pasemi_msi_init(mpic);
-        if (mpic->flags & MPIC_PRIMARY)
+        cpu = mpic_processor_id(mpic);
-                cpu = hard_smp_processor_id();
-        else
-                cpu = 0;
-        for (i = 0; i < mpic->num_sources; i++) {
+        if (!(mpic->flags & MPIC_NO_RESET)) {
-                /* start with vector = source number, and masked */
+                for (i = 0; i < mpic->num_sources; i++) {
-                u32 vecpri = MPIC_VECPRI_MASK | i |
+                        /* start with vector = source number, and masked */
-                        (8 << MPIC_VECPRI_PRIORITY_SHIFT);
+                        u32 vecpri = MPIC_VECPRI_MASK | i |
+                                (8 << MPIC_VECPRI_PRIORITY_SHIFT);
                
-                /* check if protected */
+                        /* check if protected */
-                if (mpic->protected && test_bit(i, mpic->protected))
+                        if (mpic->protected && test_bit(i, mpic->protected))
-                        continue;
+                                continue;
-                /* init hw */
+                        /* init hw */
-                mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
+                        mpic_irq_write(i, MPIC_INFO(IRQ_VECTOR_PRI), vecpri);
-                mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
+                        mpic_irq_write(i, MPIC_INFO(IRQ_DESTINATION), 1 << cpu);
+                }
        }
        
        /* Init spurious vector */
@@ -1382,7 +1533,7 @@ void __init mpic_set_serial_int(struct mpic *mpic, int enable)
 void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
 {
        struct mpic *mpic = mpic_find(irq);
-        unsigned int src = mpic_irq_to_hw(irq);
+        unsigned int src = virq_to_hw(irq);
        unsigned long flags;
        u32 reg;
@@ -1395,6 +1546,11 @@ void mpic_irq_set_priority(unsigned int irq, unsigned int pri)
                        ~MPIC_VECPRI_PRIORITY_MASK;
                mpic_ipi_write(src - mpic->ipi_vecs[0],
                               reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
+        } else if (mpic_is_tm(mpic, irq)) {
+                reg = mpic_tm_read(src - mpic->timer_vecs[0]) &
+                        ~MPIC_VECPRI_PRIORITY_MASK;
+                mpic_tm_write(src - mpic->timer_vecs[0],
+                              reg | (pri << MPIC_VECPRI_PRIORITY_SHIFT));
        } else {
                reg = mpic_irq_read(src, MPIC_INFO(IRQ_VECTOR_PRI))
                        & ~MPIC_VECPRI_PRIORITY_MASK;
@@ -1493,9 +1649,8 @@ static unsigned int _mpic_get_one_irq(struct mpic *mpic, int reg)
                return NO_IRQ;
        }
        if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
-                if (printk_ratelimit())
+                printk_ratelimited(KERN_WARNING "%s: Got protected source %d !\n",
-                        printk(KERN_WARNING "%s: Got protected source %d !\n",
+                                   mpic->name, (int)src);
-                               mpic->name, (int)src);
                mpic_eoi(mpic);
                return NO_IRQ;
        }
@@ -1533,9 +1688,8 @@ unsigned int mpic_get_coreint_irq(void)
                return NO_IRQ;
        }
        if (unlikely(mpic->protected && test_bit(src, mpic->protected))) {
-                if (printk_ratelimit())
+                printk_ratelimited(KERN_WARNING "%s: Got protected source %d !\n",
-                        printk(KERN_WARNING "%s: Got protected source %d !\n",
+                                   mpic->name, (int)src);
-                               mpic->name, (int)src);
                return NO_IRQ;
        }
@@ -1574,46 +1728,28 @@ void mpic_request_ipis(void)
        }
 }
-static void mpic_send_ipi(unsigned int ipi_no, const struct cpumask *cpu_mask)
+void smp_mpic_message_pass(int cpu, int msg)
 {
        struct mpic *mpic = mpic_primary;
+        u32 physmask;
        BUG_ON(mpic == NULL);
-#ifdef DEBUG_IPI
-        DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, ipi_no);
-#endif
-        mpic_cpu_write(MPIC_INFO(CPU_IPI_DISPATCH_0) +
-                       ipi_no * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE),
-                       mpic_physmask(cpumask_bits(cpu_mask)[0]));
-}
-void smp_mpic_message_pass(int target, int msg)
-{
-        cpumask_var_t tmp;
        /* make sure we're sending something that translates to an IPI */
        if ((unsigned int)msg > 3) {
                printk("SMP %d: smp_message_pass: unknown msg %d\n",
                       smp_processor_id(), msg);
                return;
        }
-        switch (target) {
-        case MSG_ALL:
+#ifdef DEBUG_IPI
-                mpic_send_ipi(msg, cpu_online_mask);
+        DBG("%s: send_ipi(ipi_no: %d)\n", mpic->name, msg);
-                break;
+#endif
-        case MSG_ALL_BUT_SELF:
-                alloc_cpumask_var(&tmp, GFP_NOWAIT);
+        physmask = 1 << get_hard_smp_processor_id(cpu);
-                cpumask_andnot(tmp, cpu_online_mask,
-                               cpumask_of(smp_processor_id()));
+        mpic_cpu_write(MPIC_INFO(CPU_IPI_DISPATCH_0) +
-                mpic_send_ipi(msg, tmp);
+                       msg * MPIC_INFO(CPU_IPI_DISPATCH_STRIDE), physmask);
-                free_cpumask_var(tmp);
-                break;
-        default:
-                mpic_send_ipi(msg, cpumask_of(target));
-                break;
-        }
 }
 int __init smp_mpic_probe(void)
@@ -1657,9 +1793,8 @@ void mpic_reset_core(int cpu)
 #endif /* CONFIG_SMP */
 #ifdef CONFIG_PM
-static int mpic_suspend(struct sys_device *dev, pm_message_t state)
+static void mpic_suspend_one(struct mpic *mpic)
 {
-        struct mpic *mpic = container_of(dev, struct mpic, sysdev);
        int i;
        for (i = 0; i < mpic->num_sources; i++) {
@@ -1668,13 +1803,22 @@ static int mpic_suspend(struct sys_device *dev, pm_message_t state)
                mpic->save_data[i].dest =
                        mpic_irq_read(i, MPIC_INFO(IRQ_DESTINATION));
        }
+}
+static int mpic_suspend(void)
+{
+        struct mpic *mpic = mpics;
+        while (mpic) {
+                mpic_suspend_one(mpic);
+                mpic = mpic->next;
+        }
        return 0;
 }
-static int mpic_resume(struct sys_device *dev)
+static void mpic_resume_one(struct mpic *mpic)
 {
-        struct mpic *mpic = container_of(dev, struct mpic, sysdev);
        int i;
        for (i = 0; i < mpic->num_sources; i++) {
@@ -1701,33 +1845,28 @@ static int mpic_resume(struct sys_device *dev)
        }
 #endif
        } /* end for loop */
+}
-        return 0;
+static void mpic_resume(void)
+{
+        struct mpic *mpic = mpics;
+        while (mpic) {
+                mpic_resume_one(mpic);
+                mpic = mpic->next;
+        }
 }
-#endif
-static struct sysdev_class mpic_sysclass = {
+static struct syscore_ops mpic_syscore_ops = {
-#ifdef CONFIG_PM
        .resume = mpic_resume,
        .suspend = mpic_suspend,
-#endif
-        .name = "mpic",
 };
 static int mpic_init_sys(void)
 {
-        struct mpic *mpic = mpics;
+        register_syscore_ops(&mpic_syscore_ops);
-        int error, id = 0;
+        return 0;
-        error = sysdev_class_register(&mpic_sysclass);
-        while (mpic && !error) {
-                mpic->sysdev.cls = &mpic_sysclass;
-                mpic->sysdev.id = id++;
-                error = sysdev_register(&mpic->sysdev);
-                mpic = mpic->next;
-        }
-        return error;
 }
 device_initcall(mpic_init_sys);
+#endif
diff --git a/arch/powerpc/sysdev/mpic.h b/arch/powerpc/sysdev/mpic.h
index e4a6df77b8d7..13f3e8913a93 100644
--- a/arch/powerpc/sysdev/mpic.h
+++ b/arch/powerpc/sysdev/mpic.h
@@ -34,9 +34,10 @@ static inline int mpic_pasemi_msi_init(struct mpic *mpic)
 }
 #endif
-extern int mpic_set_irq_type(unsigned int virq, unsigned int flow_type);
+extern int mpic_set_irq_type(struct irq_data *d, unsigned int flow_type);
 extern void mpic_set_vector(unsigned int virq, unsigned int vector);
-extern int mpic_set_affinity(unsigned int irq, const struct cpumask *cpumask);
+extern int mpic_set_affinity(struct irq_data *d,
+                             const struct cpumask *cpumask, bool force);
 extern void mpic_reset_core(int cpu);
 #endif /* _POWERPC_SYSDEV_MPIC_H */
diff --git a/arch/powerpc/sysdev/mpic_pasemi_msi.c b/arch/powerpc/sysdev/mpic_pasemi_msi.c
index 3b6a9a43718f..38e62382070c 100644
--- a/arch/powerpc/sysdev/mpic_pasemi_msi.c
+++ b/arch/powerpc/sysdev/mpic_pasemi_msi.c
@@ -39,28 +39,28 @@
 static struct mpic *msi_mpic;
-static void mpic_pasemi_msi_mask_irq(unsigned int irq)
+static void mpic_pasemi_msi_mask_irq(struct irq_data *data)
 {
-        pr_debug("mpic_pasemi_msi_mask_irq %d\n", irq);
+        pr_debug("mpic_pasemi_msi_mask_irq %d\n", data->irq);
-        mask_msi_irq(irq);
+        mask_msi_irq(data);
-        mpic_mask_irq(irq);
+        mpic_mask_irq(data);
 }
-static void mpic_pasemi_msi_unmask_irq(unsigned int irq)
+static void mpic_pasemi_msi_unmask_irq(struct irq_data *data)
 {
-        pr_debug("mpic_pasemi_msi_unmask_irq %d\n", irq);
+        pr_debug("mpic_pasemi_msi_unmask_irq %d\n", data->irq);
-        mpic_unmask_irq(irq);
+        mpic_unmask_irq(data);
-        unmask_msi_irq(irq);
+        unmask_msi_irq(data);
 }
 static struct irq_chip mpic_pasemi_msi_chip = {
-        .shutdown       = mpic_pasemi_msi_mask_irq,
+        .irq_shutdown           = mpic_pasemi_msi_mask_irq,
-        .mask           = mpic_pasemi_msi_mask_irq,
+        .irq_mask               = mpic_pasemi_msi_mask_irq,
-        .unmask         = mpic_pasemi_msi_unmask_irq,
+        .irq_unmask             = mpic_pasemi_msi_unmask_irq,
-        .eoi            = mpic_end_irq,
+        .irq_eoi                = mpic_end_irq,
-        .set_type       = mpic_set_irq_type,
+        .irq_set_type           = mpic_set_irq_type,
-        .set_affinity   = mpic_set_affinity,
+        .irq_set_affinity       = mpic_set_affinity,
-        .name           = "PASEMI-MSI",
+        .name                   = "PASEMI-MSI",
 };
 static int pasemi_msi_check_device(struct pci_dev *pdev, int nvec, int type)
@@ -81,7 +81,7 @@ static void pasemi_msi_teardown_msi_irqs(struct pci_dev *pdev)
                if (entry->irq == NO_IRQ)
                        continue;
-                set_irq_msi(entry->irq, NULL);
+                irq_set_msi_desc(entry->irq, NULL);
                msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
                                       virq_to_hw(entry->irq), ALLOC_CHUNK);
                irq_dispose_mapping(entry->irq);
@@ -131,9 +131,9 @@ static int pasemi_msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                 */
                mpic_set_vector(virq, 0);
-                set_irq_msi(virq, entry);
+                irq_set_msi_desc(virq, entry);
-                set_irq_chip(virq, &mpic_pasemi_msi_chip);
+                irq_set_chip(virq, &mpic_pasemi_msi_chip);
-                set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
+                irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
                pr_debug("pasemi_msi: allocated virq 0x%x (hw 0x%x) " \
                         "addr 0x%x\n", virq, hwirq, msg.address_lo);
diff --git a/arch/powerpc/sysdev/mpic_u3msi.c b/arch/powerpc/sysdev/mpic_u3msi.c
index bcbfe79c704b..9a7aa0ed9c1c 100644
--- a/arch/powerpc/sysdev/mpic_u3msi.c
+++ b/arch/powerpc/sysdev/mpic_u3msi.c
@@ -23,26 +23,26 @@
 /* A bit ugly, can we get this from the pci_dev somehow? */
 static struct mpic *msi_mpic;
-static void mpic_u3msi_mask_irq(unsigned int irq)
+static void mpic_u3msi_mask_irq(struct irq_data *data)
 {
-        mask_msi_irq(irq);
+        mask_msi_irq(data);
-        mpic_mask_irq(irq);
+        mpic_mask_irq(data);
 }
-static void mpic_u3msi_unmask_irq(unsigned int irq)
+static void mpic_u3msi_unmask_irq(struct irq_data *data)
 {
-        mpic_unmask_irq(irq);
+        mpic_unmask_irq(data);
-        unmask_msi_irq(irq);
+        unmask_msi_irq(data);
 }
 static struct irq_chip mpic_u3msi_chip = {
-        .shutdown       = mpic_u3msi_mask_irq,
+        .irq_shutdown           = mpic_u3msi_mask_irq,
-        .mask           = mpic_u3msi_mask_irq,
+        .irq_mask               = mpic_u3msi_mask_irq,
-        .unmask         = mpic_u3msi_unmask_irq,
+        .irq_unmask             = mpic_u3msi_unmask_irq,
-        .eoi            = mpic_end_irq,
+        .irq_eoi                = mpic_end_irq,
-        .set_type       = mpic_set_irq_type,
+        .irq_set_type           = mpic_set_irq_type,
-        .set_affinity   = mpic_set_affinity,
+        .irq_set_affinity       = mpic_set_affinity,
-        .name           = "MPIC-U3MSI",
+        .name                   = "MPIC-U3MSI",
 };
 static u64 read_ht_magic_addr(struct pci_dev *pdev, unsigned int pos)
@@ -129,7 +129,7 @@ static void u3msi_teardown_msi_irqs(struct pci_dev *pdev)
                if (entry->irq == NO_IRQ)
                        continue;
-                set_irq_msi(entry->irq, NULL);
+                irq_set_msi_desc(entry->irq, NULL);
                msi_bitmap_free_hwirqs(&msi_mpic->msi_bitmap,
                                       virq_to_hw(entry->irq), 1);
                irq_dispose_mapping(entry->irq);
@@ -166,9 +166,9 @@ static int u3msi_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
                        return -ENOSPC;
                }
-                set_irq_msi(virq, entry);
+                irq_set_msi_desc(virq, entry);
-                set_irq_chip(virq, &mpic_u3msi_chip);
+                irq_set_chip(virq, &mpic_u3msi_chip);
-                set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
+                irq_set_irq_type(virq, IRQ_TYPE_EDGE_RISING);
                pr_debug("u3msi: allocated virq 0x%x (hw 0x%x) addr 0x%lx\n",
                          virq, hwirq, (unsigned long)addr);
diff --git a/arch/powerpc/sysdev/mv64x60_dev.c b/arch/powerpc/sysdev/mv64x60_dev.c
index 1398bc454999..0f6af41ebb44 100644
--- a/arch/powerpc/sysdev/mv64x60_dev.c
+++ b/arch/powerpc/sysdev/mv64x60_dev.c
@@ -16,6 +16,7 @@
 #include <linux/mv643xx.h>
 #include <linux/platform_device.h>
 #include <linux/of_platform.h>
+#include <linux/of_net.h>
 #include <linux/dma-mapping.h>
 #include <asm/prom.h>
@@ -345,7 +346,7 @@ static int __init mv64x60_i2c_device_setup(struct device_node *np, int id)
        if (prop)
                pdata.freq_m = *prop;
-        pdata.freq_m = 3;       /* default */
+        pdata.freq_n = 3;       /* default */
        prop = of_get_property(np, "freq_n", NULL);
        if (prop)
                pdata.freq_n = *prop;
diff --git a/arch/powerpc/sysdev/mv64x60_pic.c b/arch/powerpc/sysdev/mv64x60_pic.c
index 485b92477d7c..14d130268e7a 100644
--- a/arch/powerpc/sysdev/mv64x60_pic.c
+++ b/arch/powerpc/sysdev/mv64x60_pic.c
@@ -76,9 +76,9 @@ static struct irq_host *mv64x60_irq_host;
 * mv64x60_chip_low functions
 */
-static void mv64x60_mask_low(unsigned int virq)
+static void mv64x60_mask_low(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -89,9 +89,9 @@ static void mv64x60_mask_low(unsigned int virq)
        (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_LO);
 }
-static void mv64x60_unmask_low(unsigned int virq)
+static void mv64x60_unmask_low(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -104,18 +104,18 @@ static void mv64x60_unmask_low(unsigned int virq)
 static struct irq_chip mv64x60_chip_low = {
        .name           = "mv64x60_low",
-        .mask           = mv64x60_mask_low,
+        .irq_mask       = mv64x60_mask_low,
-        .mask_ack       = mv64x60_mask_low,
+        .irq_mask_ack   = mv64x60_mask_low,
-        .unmask         = mv64x60_unmask_low,
+        .irq_unmask     = mv64x60_unmask_low,
 };
 /*
 * mv64x60_chip_high functions
 */
-static void mv64x60_mask_high(unsigned int virq)
+static void mv64x60_mask_high(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -126,9 +126,9 @@ static void mv64x60_mask_high(unsigned int virq)
        (void)in_le32(mv64x60_irq_reg_base + MV64X60_IC_CPU0_INTR_MASK_HI);
 }
-static void mv64x60_unmask_high(unsigned int virq)
+static void mv64x60_unmask_high(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -141,18 +141,18 @@ static void mv64x60_unmask_high(unsigned int virq)
 static struct irq_chip mv64x60_chip_high = {
        .name           = "mv64x60_high",
-        .mask           = mv64x60_mask_high,
+        .irq_mask       = mv64x60_mask_high,
-        .mask_ack       = mv64x60_mask_high,
+        .irq_mask_ack   = mv64x60_mask_high,
-        .unmask         = mv64x60_unmask_high,
+        .irq_unmask     = mv64x60_unmask_high,
 };
 /*
 * mv64x60_chip_gpp functions
 */
-static void mv64x60_mask_gpp(unsigned int virq)
+static void mv64x60_mask_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -163,9 +163,9 @@ static void mv64x60_mask_gpp(unsigned int virq)
        (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_MASK);
 }
-static void mv64x60_mask_ack_gpp(unsigned int virq)
+static void mv64x60_mask_ack_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -178,9 +178,9 @@ static void mv64x60_mask_ack_gpp(unsigned int virq)
        (void)in_le32(mv64x60_gpp_reg_base + MV64x60_GPP_INTR_CAUSE);
 }
-static void mv64x60_unmask_gpp(unsigned int virq)
+static void mv64x60_unmask_gpp(struct irq_data *d)
 {
-        int level2 = irq_map[virq].hwirq & MV64x60_LEVEL2_MASK;
+        int level2 = irqd_to_hwirq(d) & MV64x60_LEVEL2_MASK;
        unsigned long flags;
        spin_lock_irqsave(&mv64x60_lock, flags);
@@ -193,9 +193,9 @@ static void mv64x60_unmask_gpp(unsigned int virq)
 static struct irq_chip mv64x60_chip_gpp = {
        .name           = "mv64x60_gpp",
-        .mask           = mv64x60_mask_gpp,
+        .irq_mask       = mv64x60_mask_gpp,
-        .mask_ack       = mv64x60_mask_ack_gpp,
+        .irq_mask_ack   = mv64x60_mask_ack_gpp,
-        .unmask         = mv64x60_unmask_gpp,
+        .irq_unmask     = mv64x60_unmask_gpp,
 };
 /*
@@ -213,11 +213,12 @@ static int mv64x60_host_map(struct irq_host *h, unsigned int virq,
 {
        int level1;
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
        level1 = (hwirq & MV64x60_LEVEL1_MASK) >> MV64x60_LEVEL1_OFFSET;
        BUG_ON(level1 > MV64x60_LEVEL1_GPP);
-        set_irq_chip_and_handler(virq, mv64x60_chips[level1], handle_level_irq);
+        irq_set_chip_and_handler(virq, mv64x60_chips[level1],
+                                 handle_level_irq);
        return 0;
 }
diff --git a/arch/powerpc/sysdev/pmi.c b/arch/powerpc/sysdev/pmi.c
index 24a0bb955b18..8ce4fc3d9828 100644
--- a/arch/powerpc/sysdev/pmi.c
+++ b/arch/powerpc/sysdev/pmi.c
@@ -114,15 +114,14 @@ static void pmi_notify_handlers(struct work_struct *work)
        spin_lock(&data->handler_spinlock);
        list_for_each_entry(handler, &data->handler, node) {
-                pr_debug(KERN_INFO "pmi: notifying handler %p\n", handler);
+                pr_debug("pmi: notifying handler %p\n", handler);
                if (handler->type == data->msg.type)
                        handler->handle_pmi_message(data->msg);
        }
        spin_unlock(&data->handler_spinlock);
 }
-static int pmi_of_probe(struct platform_device *dev,
+static int pmi_of_probe(struct platform_device *dev)
-                        const struct of_device_id *match)
 {
        struct device_node *np = dev->dev.of_node;
        int rc;
@@ -205,7 +204,7 @@ static int pmi_of_remove(struct platform_device *dev)
        return 0;
 }
-static struct of_platform_driver pmi_of_platform_driver = {
+static struct platform_driver pmi_of_platform_driver = {
        .probe          = pmi_of_probe,
        .remove         = pmi_of_remove,
        .driver = {
@@ -217,13 +216,13 @@ static struct of_platform_driver pmi_of_platform_driver = {
 static int __init pmi_module_init(void)
 {
-        return of_register_platform_driver(&pmi_of_platform_driver);
+        return platform_driver_register(&pmi_of_platform_driver);
 }
 module_init(pmi_module_init);
 static void __exit pmi_module_exit(void)
 {
-        of_unregister_platform_driver(&pmi_of_platform_driver);
+        platform_driver_unregister(&pmi_of_platform_driver);
 }
 module_exit(pmi_module_exit);
diff --git a/arch/powerpc/sysdev/ppc4xx_cpm.c b/arch/powerpc/sysdev/ppc4xx_cpm.c
new file mode 100644
index 000000000000..73b86cc5ea74
--- /dev/null
+++ b/arch/powerpc/sysdev/ppc4xx_cpm.c
@@ -0,0 +1,346 @@
+/*
+ * PowerPC 4xx Clock and Power Management
+ *
+ * Copyright (C) 2010, Applied Micro Circuits Corporation
+ * Victor Gallardo (vgallardo@apm.com)
+ *
+ * Based on arch/powerpc/platforms/44x/idle.c:
+ * Jerone Young <jyoung5@us.ibm.com>
+ * Copyright 2008 IBM Corp.
+ *
+ * Based on arch/powerpc/sysdev/fsl_pmc.c:
+ * Anton Vorontsov <avorontsov@ru.mvista.com>
+ * Copyright 2009  MontaVista Software, Inc.
+ *
+ * See file CREDITS for list of people who contributed to this
+ * project.
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/of_platform.h>
+#include <linux/sysfs.h>
+#include <linux/cpu.h>
+#include <linux/suspend.h>
+#include <asm/dcr.h>
+#include <asm/dcr-native.h>
+#include <asm/machdep.h>
+#define CPM_ER  0
+#define CPM_FR  1
+#define CPM_SR  2
+#define CPM_IDLE_WAIT   0
+#define CPM_IDLE_DOZE   1
+struct cpm {
+        dcr_host_t      dcr_host;
+        unsigned int    dcr_offset[3];
+        unsigned int    powersave_off;
+        unsigned int    unused;
+        unsigned int    idle_doze;
+        unsigned int    standby;
+        unsigned int    suspend;
+};
+static struct cpm cpm;
+struct cpm_idle_mode {
+        unsigned int enabled;
+        const char  *name;
+};
+static struct cpm_idle_mode idle_mode[] = {
+        [CPM_IDLE_WAIT] = { 1, "wait" }, /* default */
+        [CPM_IDLE_DOZE] = { 0, "doze" },
+};
+static unsigned int cpm_set(unsigned int cpm_reg, unsigned int mask)
+{
+        unsigned int value;
+        /* CPM controller supports 3 different types of sleep interface
+         * known as class 1, 2 and 3. For class 1 units, they are
+         * unconditionally put to sleep when the corresponding CPM bit is
+         * set. For class 2 and 3 units this is not case; if they can be
+         * put to to sleep, they will. Here we do not verify, we just
+         * set them and expect them to eventually go off when they can.
+         */
+        value = dcr_read(cpm.dcr_host, cpm.dcr_offset[cpm_reg]);
+        dcr_write(cpm.dcr_host, cpm.dcr_offset[cpm_reg], value | mask);
+        /* return old state, to restore later if needed */
+        return value;
+}
+static void cpm_idle_wait(void)
+{
+        unsigned long msr_save;
+        /* save off initial state */
+        msr_save = mfmsr();
+        /* sync required when CPM0_ER[CPU] is set */
+        mb();
+        /* set wait state MSR */
+        mtmsr(msr_save|MSR_WE|MSR_EE|MSR_CE|MSR_DE);
+        isync();
+        /* return to initial state */
+        mtmsr(msr_save);
+        isync();
+}
+static void cpm_idle_sleep(unsigned int mask)
+{
+        unsigned int er_save;
+        /* update CPM_ER state */
+        er_save = cpm_set(CPM_ER, mask);
+        /* go to wait state so that CPM0_ER[CPU] can take effect */
+        cpm_idle_wait();
+        /* restore CPM_ER state */
+        dcr_write(cpm.dcr_host, cpm.dcr_offset[CPM_ER], er_save);
+}
+static void cpm_idle_doze(void)
+{
+        cpm_idle_sleep(cpm.idle_doze);
+}
+static void cpm_idle_config(int mode)
+{
+        int i;
+        if (idle_mode[mode].enabled)
+                return;
+        for (i = 0; i < ARRAY_SIZE(idle_mode); i++)
+                idle_mode[i].enabled = 0;
+        idle_mode[mode].enabled = 1;
+}
+static ssize_t cpm_idle_show(struct kobject *kobj,
+                             struct kobj_attribute *attr, char *buf)
+{
+        char *s = buf;
+        int i;
+        for (i = 0; i < ARRAY_SIZE(idle_mode); i++) {
+                if (idle_mode[i].enabled)
+                        s += sprintf(s, "[%s] ", idle_mode[i].name);
+                else
+                        s += sprintf(s, "%s ", idle_mode[i].name);
+        }
+        *(s-1) = '\n'; /* convert the last space to a newline */
+        return s - buf;
+}
+static ssize_t cpm_idle_store(struct kobject *kobj,
+                              struct kobj_attribute *attr,
+                              const char *buf, size_t n)
+{
+        int i;
+        char *p;
+        int len;
+        p = memchr(buf, '\n', n);
+        len = p ? p - buf : n;
+        for (i = 0; i < ARRAY_SIZE(idle_mode); i++) {
+                if (strncmp(buf, idle_mode[i].name, len) == 0) {
+                        cpm_idle_config(i);
+                        return n;
+                }
+        }
+        return -EINVAL;
+}
+static struct kobj_attribute cpm_idle_attr =
+        __ATTR(idle, 0644, cpm_idle_show, cpm_idle_store);
+static void cpm_idle_config_sysfs(void)
+{
+        struct sys_device *sys_dev;
+        unsigned long ret;
+        sys_dev = get_cpu_sysdev(0);
+        ret = sysfs_create_file(&sys_dev->kobj,
+                                &cpm_idle_attr.attr);
+        if (ret)
+                printk(KERN_WARNING
+                       "cpm: failed to create idle sysfs entry\n");
+}
+static void cpm_idle(void)
+{
+        if (idle_mode[CPM_IDLE_DOZE].enabled)
+                cpm_idle_doze();
+        else
+                cpm_idle_wait();
+}
+static int cpm_suspend_valid(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_STANDBY:
+                return !!cpm.standby;
+        case PM_SUSPEND_MEM:
+                return !!cpm.suspend;
+        default:
+                return 0;
+        }
+}
+static void cpm_suspend_standby(unsigned int mask)
+{
+        unsigned long tcr_save;
+        /* disable decrement interrupt */
+        tcr_save = mfspr(SPRN_TCR);
+        mtspr(SPRN_TCR, tcr_save & ~TCR_DIE);
+        /* go to sleep state */
+        cpm_idle_sleep(mask);
+        /* restore decrement interrupt */
+        mtspr(SPRN_TCR, tcr_save);
+}
+static int cpm_suspend_enter(suspend_state_t state)
+{
+        switch (state) {
+        case PM_SUSPEND_STANDBY:
+                cpm_suspend_standby(cpm.standby);
+                break;
+        case PM_SUSPEND_MEM:
+                cpm_suspend_standby(cpm.suspend);
+                break;
+        }
+        return 0;
+}
+static struct platform_suspend_ops cpm_suspend_ops = {
+        .valid          = cpm_suspend_valid,
+        .enter          = cpm_suspend_enter,
+};
+static int cpm_get_uint_property(struct device_node *np,
+                                 const char *name)
+{
+        int len;
+        const unsigned int *prop = of_get_property(np, name, &len);
+        if (prop == NULL || len < sizeof(u32))
+                return 0;
+        return *prop;
+}
+static int __init cpm_init(void)
+{
+        struct device_node *np;
+        int dcr_base, dcr_len;
+        int ret = 0;
+        if (!cpm.powersave_off) {
+                cpm_idle_config(CPM_IDLE_WAIT);
+                ppc_md.power_save = &cpm_idle;
+        }
+        np = of_find_compatible_node(NULL, NULL, "ibm,cpm");
+        if (!np) {
+                ret = -EINVAL;
+                goto out;
+        }
+        dcr_base = dcr_resource_start(np, 0);
+        dcr_len = dcr_resource_len(np, 0);
+        if (dcr_base == 0 || dcr_len == 0) {
+                printk(KERN_ERR "cpm: could not parse dcr property for %s\n",
+                       np->full_name);
+                ret = -EINVAL;
+                goto out;
+        }
+        cpm.dcr_host = dcr_map(np, dcr_base, dcr_len);
+        if (!DCR_MAP_OK(cpm.dcr_host)) {
+                printk(KERN_ERR "cpm: failed to map dcr property for %s\n",
+                       np->full_name);
+                ret = -EINVAL;
+                goto out;
+        }
+        /* All 4xx SoCs with a CPM controller have one of two
+         * different order for the CPM registers. Some have the
+         * CPM registers in the following order (ER,FR,SR). The
+         * others have them in the following order (SR,ER,FR).
+         */
+        if (cpm_get_uint_property(np, "er-offset") == 0) {
+                cpm.dcr_offset[CPM_ER] = 0;
+                cpm.dcr_offset[CPM_FR] = 1;
+                cpm.dcr_offset[CPM_SR] = 2;
+        } else {
+                cpm.dcr_offset[CPM_ER] = 1;
+                cpm.dcr_offset[CPM_FR] = 2;
+                cpm.dcr_offset[CPM_SR] = 0;
+        }
+        /* Now let's see what IPs to turn off for the following modes */
+        cpm.unused = cpm_get_uint_property(np, "unused-units");
+        cpm.idle_doze = cpm_get_uint_property(np, "idle-doze");
+        cpm.standby = cpm_get_uint_property(np, "standby");
+        cpm.suspend = cpm_get_uint_property(np, "suspend");
+        /* If some IPs are unused let's turn them off now */
+        if (cpm.unused) {
+                cpm_set(CPM_ER, cpm.unused);
+                cpm_set(CPM_FR, cpm.unused);
+        }
+        /* Now let's export interfaces */
+        if (!cpm.powersave_off && cpm.idle_doze)
+                cpm_idle_config_sysfs();
+        if (cpm.standby || cpm.suspend)
+                suspend_set_ops(&cpm_suspend_ops);
+out:
+        if (np)
+                of_node_put(np);
+        return ret;
+}
+late_initcall(cpm_init);
+static int __init cpm_powersave_off(char *arg)
+{
+        cpm.powersave_off = 1;
+        return 0;
+}
+__setup("powersave=off", cpm_powersave_off);
diff --git a/arch/powerpc/sysdev/ppc4xx_msi.c b/arch/powerpc/sysdev/ppc4xx_msi.c
new file mode 100644
index 000000000000..367af0241851
--- /dev/null
+++ b/arch/powerpc/sysdev/ppc4xx_msi.c
@@ -0,0 +1,276 @@
+/*
+ * Adding PCI-E MSI support for PPC4XX SoCs.
+ *
+ * Copyright (c) 2010, Applied Micro Circuits Corporation
+ * Authors:     Tirumala R Marri <tmarri@apm.com>
+ *              Feng Kan <fkan@apm.com>
+ *
+ * This program is free software; you can redistribute it and/or
+ * modify it under the terms of the GNU General Public License as
+ * published by the Free Software Foundation; either version 2 of
+ * the License, or (at your option) any later version.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
+ * GNU General Public License for more details.
+ *
+ * You should have received a copy of the GNU General Public License
+ * along with this program; if not, write to the Free Software
+ * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
+ * MA 02111-1307 USA
+ */
+#include <linux/irq.h>
+#include <linux/bootmem.h>
+#include <linux/pci.h>
+#include <linux/msi.h>
+#include <linux/of_platform.h>
+#include <linux/interrupt.h>
+#include <asm/prom.h>
+#include <asm/hw_irq.h>
+#include <asm/ppc-pci.h>
+#include <boot/dcr.h>
+#include <asm/dcr-regs.h>
+#include <asm/msi_bitmap.h>
+#define PEIH_TERMADH    0x00
+#define PEIH_TERMADL    0x08
+#define PEIH_MSIED      0x10
+#define PEIH_MSIMK      0x18
+#define PEIH_MSIASS     0x20
+#define PEIH_FLUSH0     0x30
+#define PEIH_FLUSH1     0x38
+#define PEIH_CNTRST     0x48
+#define NR_MSI_IRQS     4
+struct ppc4xx_msi {
+        u32 msi_addr_lo;
+        u32 msi_addr_hi;
+        void __iomem *msi_regs;
+        int msi_virqs[NR_MSI_IRQS];
+        struct msi_bitmap bitmap;
+        struct device_node *msi_dev;
+};
+static struct ppc4xx_msi ppc4xx_msi;
+static int ppc4xx_msi_init_allocator(struct platform_device *dev,
+                struct ppc4xx_msi *msi_data)
+{
+        int err;
+        err = msi_bitmap_alloc(&msi_data->bitmap, NR_MSI_IRQS,
+                              dev->dev.of_node);
+        if (err)
+                return err;
+        err = msi_bitmap_reserve_dt_hwirqs(&msi_data->bitmap);
+        if (err < 0) {
+                msi_bitmap_free(&msi_data->bitmap);
+                return err;
+        }
+        return 0;
+}
+static int ppc4xx_setup_msi_irqs(struct pci_dev *dev, int nvec, int type)
+{
+        int int_no = -ENOMEM;
+        unsigned int virq;
+        struct msi_msg msg;
+        struct msi_desc *entry;
+        struct ppc4xx_msi *msi_data = &ppc4xx_msi;
+        list_for_each_entry(entry, &dev->msi_list, list) {
+                int_no = msi_bitmap_alloc_hwirqs(&msi_data->bitmap, 1);
+                if (int_no >= 0)
+                        break;
+                if (int_no < 0) {
+                        pr_debug("%s: fail allocating msi interrupt\n",
+                                        __func__);
+                }
+                virq = irq_of_parse_and_map(msi_data->msi_dev, int_no);
+                if (virq == NO_IRQ) {
+                        dev_err(&dev->dev, "%s: fail mapping irq\n", __func__);
+                        msi_bitmap_free_hwirqs(&msi_data->bitmap, int_no, 1);
+                        return -ENOSPC;
+                }
+                dev_dbg(&dev->dev, "%s: virq = %d\n", __func__, virq);
+                /* Setup msi address space */
+                msg.address_hi = msi_data->msi_addr_hi;
+                msg.address_lo = msi_data->msi_addr_lo;
+                irq_set_msi_desc(virq, entry);
+                msg.data = int_no;
+                write_msi_msg(virq, &msg);
+        }
+        return 0;
+}
+void ppc4xx_teardown_msi_irqs(struct pci_dev *dev)
+{
+        struct msi_desc *entry;
+        struct ppc4xx_msi *msi_data = &ppc4xx_msi;
+        dev_dbg(&dev->dev, "PCIE-MSI: tearing down msi irqs\n");
+        list_for_each_entry(entry, &dev->msi_list, list) {
+                if (entry->irq == NO_IRQ)
+                        continue;
+                irq_set_msi_desc(entry->irq, NULL);
+                msi_bitmap_free_hwirqs(&msi_data->bitmap,
+                                virq_to_hw(entry->irq), 1);
+                irq_dispose_mapping(entry->irq);
+        }
+}
+static int ppc4xx_msi_check_device(struct pci_dev *pdev, int nvec, int type)
+{
+        dev_dbg(&pdev->dev, "PCIE-MSI:%s called. vec %x type %d\n",
+                __func__, nvec, type);
+        if (type == PCI_CAP_ID_MSIX)
+                pr_debug("ppc4xx msi: MSI-X untested, trying anyway.\n");
+        return 0;
+}
+static int ppc4xx_setup_pcieh_hw(struct platform_device *dev,
+                                 struct resource res, struct ppc4xx_msi *msi)
+{
+        const u32 *msi_data;
+        const u32 *msi_mask;
+        const u32 *sdr_addr;
+        dma_addr_t msi_phys;
+        void *msi_virt;
+        sdr_addr = of_get_property(dev->dev.of_node, "sdr-base", NULL);
+        if (!sdr_addr)
+                return -1;
+        SDR0_WRITE(sdr_addr, (u64)res.start >> 32);      /*HIGH addr */
+        SDR0_WRITE(sdr_addr + 1, res.start & 0xFFFFFFFF); /* Low addr */
+        msi->msi_dev = of_find_node_by_name(NULL, "ppc4xx-msi");
+        if (msi->msi_dev)
+                return -ENODEV;
+        msi->msi_regs = of_iomap(msi->msi_dev, 0);
+        if (!msi->msi_regs) {
+                dev_err(&dev->dev, "of_iomap problem failed\n");
+                return -ENOMEM;
+        }
+        dev_dbg(&dev->dev, "PCIE-MSI: msi register mapped 0x%x 0x%x\n",
+                (u32) (msi->msi_regs + PEIH_TERMADH), (u32) (msi->msi_regs));
+        msi_virt = dma_alloc_coherent(&dev->dev, 64, &msi_phys, GFP_KERNEL);
+        msi->msi_addr_hi = 0x0;
+        msi->msi_addr_lo = (u32) msi_phys;
+        dev_dbg(&dev->dev, "PCIE-MSI: msi address 0x%x\n", msi->msi_addr_lo);
+        /* Progam the Interrupt handler Termination addr registers */
+        out_be32(msi->msi_regs + PEIH_TERMADH, msi->msi_addr_hi);
+        out_be32(msi->msi_regs + PEIH_TERMADL, msi->msi_addr_lo);
+        msi_data = of_get_property(dev->dev.of_node, "msi-data", NULL);
+        if (!msi_data)
+                return -1;
+        msi_mask = of_get_property(dev->dev.of_node, "msi-mask", NULL);
+        if (!msi_mask)
+                return -1;
+        /* Program MSI Expected data and Mask bits */
+        out_be32(msi->msi_regs + PEIH_MSIED, *msi_data);
+        out_be32(msi->msi_regs + PEIH_MSIMK, *msi_mask);
+        return 0;
+}
+static int ppc4xx_of_msi_remove(struct platform_device *dev)
+{
+        struct ppc4xx_msi *msi = dev->dev.platform_data;
+        int i;
+        int virq;
+        for (i = 0; i < NR_MSI_IRQS; i++) {
+                virq = msi->msi_virqs[i];
+                if (virq != NO_IRQ)
+                        irq_dispose_mapping(virq);
+        }
+        if (msi->bitmap.bitmap)
+                msi_bitmap_free(&msi->bitmap);
+        iounmap(msi->msi_regs);
+        of_node_put(msi->msi_dev);
+        kfree(msi);
+        return 0;
+}
+static int __devinit ppc4xx_msi_probe(struct platform_device *dev)
+{
+        struct ppc4xx_msi *msi;
+        struct resource res;
+        int err = 0;
+        msi = &ppc4xx_msi;/*keep the msi data for further use*/
+        dev_dbg(&dev->dev, "PCIE-MSI: Setting up MSI support...\n");
+        msi = kzalloc(sizeof(struct ppc4xx_msi), GFP_KERNEL);
+        if (!msi) {
+                dev_err(&dev->dev, "No memory for MSI structure\n");
+                return -ENOMEM;
+        }
+        dev->dev.platform_data = msi;
+        /* Get MSI ranges */
+        err = of_address_to_resource(dev->dev.of_node, 0, &res);
+        if (err) {
+                dev_err(&dev->dev, "%s resource error!\n",
+                        dev->dev.of_node->full_name);
+                goto error_out;
+        }
+        if (ppc4xx_setup_pcieh_hw(dev, res, msi))
+                goto error_out;
+        err = ppc4xx_msi_init_allocator(dev, msi);
+        if (err) {
+                dev_err(&dev->dev, "Error allocating MSI bitmap\n");
+                goto error_out;
+        }
+        ppc_md.setup_msi_irqs = ppc4xx_setup_msi_irqs;
+        ppc_md.teardown_msi_irqs = ppc4xx_teardown_msi_irqs;
+        ppc_md.msi_check_device = ppc4xx_msi_check_device;
+        return err;
+error_out:
+        ppc4xx_of_msi_remove(dev);
+        return err;
+}
+static const struct of_device_id ppc4xx_msi_ids[] = {
+        {
+                .compatible = "amcc,ppc4xx-msi",
+        },
+        {}
+};
+static struct platform_driver ppc4xx_msi_driver = {
+        .probe = ppc4xx_msi_probe,
+        .remove = ppc4xx_of_msi_remove,
+        .driver = {
+                   .name = "ppc4xx-msi",
+                   .owner = THIS_MODULE,
+                   .of_match_table = ppc4xx_msi_ids,
+                   },
+};
+static __init int ppc4xx_msi_init(void)
+{
+        return platform_driver_register(&ppc4xx_msi_driver);
+}
+subsys_initcall(ppc4xx_msi_init);
diff --git a/arch/powerpc/sysdev/ppc4xx_pci.h b/arch/powerpc/sysdev/ppc4xx_pci.h
index 56d9e5deccbf..c39a134e8684 100644
--- a/arch/powerpc/sysdev/ppc4xx_pci.h
+++ b/arch/powerpc/sysdev/ppc4xx_pci.h
@@ -324,7 +324,7 @@
 #define PESDR0_460EX_IHS2               0x036D
 /*
- * 460SX addtional DCRs
+ * 460SX additional DCRs
 */
 #define PESDRn_460SX_RCEI               0x02
diff --git a/arch/powerpc/sysdev/qe_lib/qe.c b/arch/powerpc/sysdev/qe_lib/qe.c
index 90020de4dcf2..904c6cbaf45b 100644
--- a/arch/powerpc/sysdev/qe_lib/qe.c
+++ b/arch/powerpc/sysdev/qe_lib/qe.c
@@ -659,8 +659,7 @@ static int qe_resume(struct platform_device *ofdev)
        return 0;
 }
-static int qe_probe(struct platform_device *ofdev,
+static int qe_probe(struct platform_device *ofdev)
-                    const struct of_device_id *id)
 {
        return 0;
 }
@@ -670,7 +669,7 @@ static const struct of_device_id qe_ids[] = {
        { },
 };
-static struct of_platform_driver qe_driver = {
+static struct platform_driver qe_driver = {
        .driver = {
                .name = "fsl-qe",
                .owner = THIS_MODULE,
@@ -682,7 +681,7 @@ static struct of_platform_driver qe_driver = {
 static int __init qe_drv_init(void)
 {
-        return of_register_platform_driver(&qe_driver);
+        return platform_driver_register(&qe_driver);
 }
 device_initcall(qe_drv_init);
 #endif /* defined(CONFIG_SUSPEND) && defined(CONFIG_PPC_85xx) */
diff --git a/arch/powerpc/sysdev/qe_lib/qe_ic.c b/arch/powerpc/sysdev/qe_lib/qe_ic.c
index 541ba9863647..b2acda07220d 100644
--- a/arch/powerpc/sysdev/qe_lib/qe_ic.c
+++ b/arch/powerpc/sysdev/qe_lib/qe_ic.c
@@ -189,15 +189,18 @@ static inline void qe_ic_write(volatile __be32  __iomem * base, unsigned int reg
 static inline struct qe_ic *qe_ic_from_irq(unsigned int virq)
 {
-        return irq_to_desc(virq)->chip_data;
+        return irq_get_chip_data(virq);
 }
-#define virq_to_hw(virq)        ((unsigned int)irq_map[virq].hwirq)
+static inline struct qe_ic *qe_ic_from_irq_data(struct irq_data *d)
+{
+        return irq_data_get_irq_chip_data(d);
+}
-static void qe_ic_unmask_irq(unsigned int virq)
+static void qe_ic_unmask_irq(struct irq_data *d)
 {
-        struct qe_ic *qe_ic = qe_ic_from_irq(virq);
+        struct qe_ic *qe_ic = qe_ic_from_irq_data(d);
-        unsigned int src = virq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -210,10 +213,10 @@ static void qe_ic_unmask_irq(unsigned int virq)
        raw_spin_unlock_irqrestore(&qe_ic_lock, flags);
 }
-static void qe_ic_mask_irq(unsigned int virq)
+static void qe_ic_mask_irq(struct irq_data *d)
 {
-        struct qe_ic *qe_ic = qe_ic_from_irq(virq);
+        struct qe_ic *qe_ic = qe_ic_from_irq_data(d);
-        unsigned int src = virq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 temp;
@@ -238,9 +241,9 @@ static void qe_ic_mask_irq(unsigned int virq)
 static struct irq_chip qe_ic_irq_chip = {
        .name = "QEIC",
-        .unmask = qe_ic_unmask_irq,
+        .irq_unmask = qe_ic_unmask_irq,
-        .mask = qe_ic_mask_irq,
+        .irq_mask = qe_ic_mask_irq,
-        .mask_ack = qe_ic_mask_irq,
+        .irq_mask_ack = qe_ic_mask_irq,
 };
 static int qe_ic_host_match(struct irq_host *h, struct device_node *node)
@@ -262,10 +265,10 @@ static int qe_ic_host_map(struct irq_host *h, unsigned int virq,
        /* Default chip */
        chip = &qe_ic->hc_irq;
-        set_irq_chip_data(virq, qe_ic);
+        irq_set_chip_data(virq, qe_ic);
-        irq_to_desc(virq)->status |= IRQ_LEVEL;
+        irq_set_status_flags(virq, IRQ_LEVEL);
-        set_irq_chip_and_handler(virq, chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, chip, handle_level_irq);
        return 0;
 }
@@ -381,13 +384,13 @@ void __init qe_ic_init(struct device_node *node, unsigned int flags,
        qe_ic_write(qe_ic->regs, QEIC_CICR, temp);
-        set_irq_data(qe_ic->virq_low, qe_ic);
+        irq_set_handler_data(qe_ic->virq_low, qe_ic);
-        set_irq_chained_handler(qe_ic->virq_low, low_handler);
+        irq_set_chained_handler(qe_ic->virq_low, low_handler);
        if (qe_ic->virq_high != NO_IRQ &&
                        qe_ic->virq_high != qe_ic->virq_low) {
-                set_irq_data(qe_ic->virq_high, qe_ic);
+                irq_set_handler_data(qe_ic->virq_high, qe_ic);
-                set_irq_chained_handler(qe_ic->virq_high, high_handler);
+                irq_set_chained_handler(qe_ic->virq_high, high_handler);
        }
 }
diff --git a/arch/powerpc/sysdev/scom.c b/arch/powerpc/sysdev/scom.c
new file mode 100644
index 000000000000..b2593ce30c9b
--- /dev/null
+++ b/arch/powerpc/sysdev/scom.c
@@ -0,0 +1,192 @@
+/*
+ * Copyright 2010 Benjamin Herrenschmidt, IBM Corp
+ *                <benh@kernel.crashing.org>
+ *     and        David Gibson, IBM Corporation.
+ *
+ *   This program is free software;  you can redistribute it and/or modify
+ *   it under the terms of the GNU General Public License as published by
+ *   the Free Software Foundation; either version 2 of the License, or
+ *   (at your option) any later version.
+ *
+ *   This program is distributed in the hope that it will be useful,
+ *   but WITHOUT ANY WARRANTY;  without even the implied warranty of
+ *   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See
+ *   the GNU General Public License for more details.
+ *
+ *   You should have received a copy of the GNU General Public License
+ *   along with this program;  if not, write to the Free Software
+ *   Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
+ */
+#include <linux/kernel.h>
+#include <linux/debugfs.h>
+#include <linux/slab.h>
+#include <asm/prom.h>
+#include <asm/scom.h>
+const struct scom_controller *scom_controller;
+EXPORT_SYMBOL_GPL(scom_controller);
+struct device_node *scom_find_parent(struct device_node *node)
+{
+        struct device_node *par, *tmp;
+        const u32 *p;
+        for (par = of_node_get(node); par;) {
+                if (of_get_property(par, "scom-controller", NULL))
+                        break;
+                p = of_get_property(par, "scom-parent", NULL);
+                tmp = par;
+                if (p == NULL)
+                        par = of_get_parent(par);
+                else
+                        par = of_find_node_by_phandle(*p);
+                of_node_put(tmp);
+        }
+        return par;
+}
+EXPORT_SYMBOL_GPL(scom_find_parent);
+scom_map_t scom_map_device(struct device_node *dev, int index)
+{
+        struct device_node *parent;
+        unsigned int cells, size;
+        const u32 *prop;
+        u64 reg, cnt;
+        scom_map_t ret;
+        parent = scom_find_parent(dev);
+        if (parent == NULL)
+                return 0;
+        prop = of_get_property(parent, "#scom-cells", NULL);
+        cells = prop ? *prop : 1;
+        prop = of_get_property(dev, "scom-reg", &size);
+        if (!prop)
+                return 0;
+        size >>= 2;
+        if (index >= (size / (2*cells)))
+                return 0;
+        reg = of_read_number(&prop[index * cells * 2], cells);
+        cnt = of_read_number(&prop[index * cells * 2 + cells], cells);
+        ret = scom_map(parent, reg, cnt);
+        of_node_put(parent);
+        return ret;
+}
+EXPORT_SYMBOL_GPL(scom_map_device);
+#ifdef CONFIG_SCOM_DEBUGFS
+struct scom_debug_entry {
+        struct device_node *dn;
+        unsigned long addr;
+        scom_map_t map;
+        spinlock_t lock;
+        char name[8];
+        struct debugfs_blob_wrapper blob;
+};
+static int scom_addr_set(void *data, u64 val)
+{
+        struct scom_debug_entry *ent = data;
+        ent->addr = 0;
+        scom_unmap(ent->map);
+        ent->map = scom_map(ent->dn, val, 1);
+        if (scom_map_ok(ent->map))
+                ent->addr = val;
+        else
+                return -EFAULT;
+        return 0;
+}
+static int scom_addr_get(void *data, u64 *val)
+{
+        struct scom_debug_entry *ent = data;
+        *val = ent->addr;
+        return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(scom_addr_fops, scom_addr_get, scom_addr_set,
+                        "0x%llx\n");
+static int scom_val_set(void *data, u64 val)
+{
+        struct scom_debug_entry *ent = data;
+        if (!scom_map_ok(ent->map))
+                return -EFAULT;
+        scom_write(ent->map, 0, val);
+        return 0;
+}
+static int scom_val_get(void *data, u64 *val)
+{
+        struct scom_debug_entry *ent = data;
+        if (!scom_map_ok(ent->map))
+                return -EFAULT;
+        *val = scom_read(ent->map, 0);
+        return 0;
+}
+DEFINE_SIMPLE_ATTRIBUTE(scom_val_fops, scom_val_get, scom_val_set,
+                        "0x%llx\n");
+static int scom_debug_init_one(struct dentry *root, struct device_node *dn,
+                               int i)
+{
+        struct scom_debug_entry *ent;
+        struct dentry *dir;
+        ent = kzalloc(sizeof(*ent), GFP_KERNEL);
+        if (!ent)
+                return -ENOMEM;
+        ent->dn = of_node_get(dn);
+        ent->map = SCOM_MAP_INVALID;
+        spin_lock_init(&ent->lock);
+        snprintf(ent->name, 8, "scom%d", i);
+        ent->blob.data = dn->full_name;
+        ent->blob.size = strlen(dn->full_name);
+        dir = debugfs_create_dir(ent->name, root);
+        if (!dir) {
+                of_node_put(dn);
+                kfree(ent);
+                return -1;
+        }
+        debugfs_create_file("addr", 0600, dir, ent, &scom_addr_fops);
+        debugfs_create_file("value", 0600, dir, ent, &scom_val_fops);
+        debugfs_create_blob("path", 0400, dir, &ent->blob);
+        return 0;
+}
+static int scom_debug_init(void)
+{
+        struct device_node *dn;
+        struct dentry *root;
+        int i, rc;
+        root = debugfs_create_dir("scom", powerpc_debugfs_root);
+        if (!root)
+                return -1;
+        i = rc = 0;
+        for_each_node_with_property(dn, "scom-controller")
+                rc |= scom_debug_init_one(root, dn, i++);
+        return rc;
+}
+device_initcall(scom_debug_init);
+#endif /* CONFIG_SCOM_DEBUGFS */
diff --git a/arch/powerpc/sysdev/tsi108_dev.c b/arch/powerpc/sysdev/tsi108_dev.c
index d4d15aaf18fa..ee056807b52c 100644
--- a/arch/powerpc/sysdev/tsi108_dev.c
+++ b/arch/powerpc/sysdev/tsi108_dev.c
@@ -19,6 +19,7 @@
 #include <linux/module.h>
 #include <linux/device.h>
 #include <linux/platform_device.h>
+#include <linux/of_net.h>
 #include <asm/tsi108.h>
 #include <asm/system.h>
@@ -83,8 +84,8 @@ static int __init tsi108_eth_of_init(void)
                memset(&tsi_eth_data, 0, sizeof(tsi_eth_data));
                ret = of_address_to_resource(np, 0, &r[0]);
-                DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n",
+                DBG("%s: name:start->end = %s:%pR\n",
-                        __func__,r[0].name, r[0].start, r[0].end);
+                    __func__, r[0].name, &r[0]);
                if (ret)
                        goto err;
@@ -92,8 +93,8 @@ static int __init tsi108_eth_of_init(void)
                r[1].start = irq_of_parse_and_map(np, 0);
                r[1].end = irq_of_parse_and_map(np, 0);
                r[1].flags = IORESOURCE_IRQ;
-                DBG("%s: name:start->end = %s:0x%lx-> 0x%lx\n",
+                DBG("%s: name:start->end = %s:%pR\n",
-                        __func__,r[1].name, r[1].start, r[1].end);
+                        __func__, r[1].name, &r[1]);
                tsi_eth_dev =
                    platform_device_register_simple("tsi-ethernet", i++, &r[0],
diff --git a/arch/powerpc/sysdev/tsi108_pci.c b/arch/powerpc/sysdev/tsi108_pci.c
index 0ab9281e49ae..4d18658116e5 100644
--- a/arch/powerpc/sysdev/tsi108_pci.c
+++ b/arch/powerpc/sysdev/tsi108_pci.c
@@ -343,24 +343,9 @@ static inline unsigned int get_pci_source(void)
 * Linux descriptor level callbacks
 */
-static void tsi108_pci_irq_enable(u_int irq)
+static void tsi108_pci_irq_unmask(struct irq_data *d)
 {
-        tsi108_pci_int_unmask(irq);
+        tsi108_pci_int_unmask(d->irq);
-}
-static void tsi108_pci_irq_disable(u_int irq)
-{
-        tsi108_pci_int_mask(irq);
-}
-static void tsi108_pci_irq_ack(u_int irq)
-{
-        tsi108_pci_int_mask(irq);
-}
-static void tsi108_pci_irq_end(u_int irq)
-{
-        tsi108_pci_int_unmask(irq);
        /* Enable interrupts from PCI block */
        tsi108_write_reg(TSI108_PCI_OFFSET + TSI108_PCI_IRP_ENABLE,
@@ -370,16 +355,25 @@ static void tsi108_pci_irq_end(u_int irq)
        mb();
 }
+static void tsi108_pci_irq_mask(struct irq_data *d)
+{
+        tsi108_pci_int_mask(d->irq);
+}
+static void tsi108_pci_irq_ack(struct irq_data *d)
+{
+        tsi108_pci_int_mask(d->irq);
+}
 /*
 * Interrupt controller descriptor for cascaded PCI interrupt controller.
 */
 static struct irq_chip tsi108_pci_irq = {
        .name = "tsi108_PCI_int",
-        .mask = tsi108_pci_irq_disable,
+        .irq_mask = tsi108_pci_irq_mask,
-        .ack = tsi108_pci_irq_ack,
+        .irq_ack = tsi108_pci_irq_ack,
-        .end = tsi108_pci_irq_end,
+        .irq_unmask = tsi108_pci_irq_unmask,
-        .unmask = tsi108_pci_irq_enable,
 };
 static int pci_irq_host_xlate(struct irq_host *h, struct device_node *ct,
@@ -397,8 +391,8 @@ static int pci_irq_host_map(struct irq_host *h, unsigned int virq,
        DBG("%s(%d, 0x%lx)\n", __func__, virq, hw);
        if ((virq >= 1) && (virq <= 4)){
                irq = virq + IRQ_PCI_INTAD_BASE - 1;
-                irq_to_desc(irq)->status |= IRQ_LEVEL;
+                irq_set_status_flags(irq, IRQ_LEVEL);
-                set_irq_chip(irq, &tsi108_pci_irq);
+                irq_set_chip(irq, &tsi108_pci_irq);
        }
        return 0;
 }
@@ -437,8 +431,11 @@ void __init tsi108_pci_int_init(struct device_node *node)
 void tsi108_irq_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = get_pci_source();
        if (cascade_irq != NO_IRQ)
                generic_handle_irq(cascade_irq);
-        desc->chip->eoi(irq);
+        chip->irq_eoi(&desc->irq_data);
 }
diff --git a/arch/powerpc/sysdev/uic.c b/arch/powerpc/sysdev/uic.c
index 0038fb78f094..984cd2029158 100644
--- a/arch/powerpc/sysdev/uic.c
+++ b/arch/powerpc/sysdev/uic.c
@@ -41,8 +41,6 @@
 #define UIC_VR          0x7
 #define UIC_VCR         0x8
-#define uic_irq_to_hw(virq)     (irq_map[virq].hwirq)
 struct uic *primary_uic;
 struct uic {
@@ -55,18 +53,17 @@ struct uic {
        struct irq_host *irqhost;
 };
-static void uic_unmask_irq(unsigned int virq)
+static void uic_unmask_irq(struct irq_data *d)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
+        struct uic *uic = irq_data_get_irq_chip_data(d);
-        struct uic *uic = get_irq_chip_data(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        unsigned int src = uic_irq_to_hw(virq);
        unsigned long flags;
        u32 er, sr;
        sr = 1 << (31-src);
        spin_lock_irqsave(&uic->lock, flags);
        /* ack level-triggered interrupts here */
-        if (desc->status & IRQ_LEVEL)
+        if (irqd_is_level_type(d))
                mtdcr(uic->dcrbase + UIC_SR, sr);
        er = mfdcr(uic->dcrbase + UIC_ER);
        er |= sr;
@@ -74,10 +71,10 @@ static void uic_unmask_irq(unsigned int virq)
        spin_unlock_irqrestore(&uic->lock, flags);
 }
-static void uic_mask_irq(unsigned int virq)
+static void uic_mask_irq(struct irq_data *d)
 {
-        struct uic *uic = get_irq_chip_data(virq);
+        struct uic *uic = irq_data_get_irq_chip_data(d);
-        unsigned int src = uic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        u32 er;
@@ -88,10 +85,10 @@ static void uic_mask_irq(unsigned int virq)
        spin_unlock_irqrestore(&uic->lock, flags);
 }
-static void uic_ack_irq(unsigned int virq)
+static void uic_ack_irq(struct irq_data *d)
 {
-        struct uic *uic = get_irq_chip_data(virq);
+        struct uic *uic = irq_data_get_irq_chip_data(d);
-        unsigned int src = uic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
        unsigned long flags;
        spin_lock_irqsave(&uic->lock, flags);
@@ -99,11 +96,10 @@ static void uic_ack_irq(unsigned int virq)
        spin_unlock_irqrestore(&uic->lock, flags);
 }
-static void uic_mask_ack_irq(unsigned int virq)
+static void uic_mask_ack_irq(struct irq_data *d)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
+        struct uic *uic = irq_data_get_irq_chip_data(d);
-        struct uic *uic = get_irq_chip_data(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        unsigned int src = uic_irq_to_hw(virq);
        unsigned long flags;
        u32 er, sr;
@@ -120,23 +116,22 @@ static void uic_mask_ack_irq(unsigned int virq)
         * level interrupts are ack'ed after the actual
         * isr call in the uic_unmask_irq()
         */
-        if (!(desc->status & IRQ_LEVEL))
+        if (!irqd_is_level_type(d))
                mtdcr(uic->dcrbase + UIC_SR, sr);
        spin_unlock_irqrestore(&uic->lock, flags);
 }
-static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
+static int uic_set_irq_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct uic *uic = get_irq_chip_data(virq);
+        struct uic *uic = irq_data_get_irq_chip_data(d);
-        unsigned int src = uic_irq_to_hw(virq);
+        unsigned int src = irqd_to_hwirq(d);
-        struct irq_desc *desc = irq_to_desc(virq);
        unsigned long flags;
        int trigger, polarity;
        u32 tr, pr, mask;
        switch (flow_type & IRQ_TYPE_SENSE_MASK) {
        case IRQ_TYPE_NONE:
-                uic_mask_irq(virq);
+                uic_mask_irq(d);
                return 0;
        case IRQ_TYPE_EDGE_RISING:
@@ -166,11 +161,6 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
        mtdcr(uic->dcrbase + UIC_PR, pr);
        mtdcr(uic->dcrbase + UIC_TR, tr);
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (!trigger)
-                desc->status |= IRQ_LEVEL;
        spin_unlock_irqrestore(&uic->lock, flags);
        return 0;
@@ -178,11 +168,11 @@ static int uic_set_irq_type(unsigned int virq, unsigned int flow_type)
 static struct irq_chip uic_irq_chip = {
        .name           = "UIC",
-        .unmask         = uic_unmask_irq,
+        .irq_unmask     = uic_unmask_irq,
-        .mask           = uic_mask_irq,
+        .irq_mask       = uic_mask_irq,
-        .mask_ack       = uic_mask_ack_irq,
+        .irq_mask_ack   = uic_mask_ack_irq,
-        .ack            = uic_ack_irq,
+        .irq_ack        = uic_ack_irq,
-        .set_type       = uic_set_irq_type,
+        .irq_set_type   = uic_set_irq_type,
 };
 static int uic_host_map(struct irq_host *h, unsigned int virq,
@@ -190,13 +180,13 @@ static int uic_host_map(struct irq_host *h, unsigned int virq,
 {
        struct uic *uic = h->host_data;
-        set_irq_chip_data(virq, uic);
+        irq_set_chip_data(virq, uic);
        /* Despite the name, handle_level_irq() works for both level
         * and edge irqs on UIC.  FIXME: check this is correct */
-        set_irq_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
+        irq_set_chip_and_handler(virq, &uic_irq_chip, handle_level_irq);
        /* Set default irq type */
-        set_irq_type(virq, IRQ_TYPE_NONE);
+        irq_set_irq_type(virq, IRQ_TYPE_NONE);
        return 0;
 }
@@ -220,16 +210,18 @@ static struct irq_host_ops uic_host_ops = {
 void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
 {
-        struct uic *uic = get_irq_data(virq);
+        struct irq_chip *chip = irq_desc_get_chip(desc);
+        struct irq_data *idata = irq_desc_get_irq_data(desc);
+        struct uic *uic = irq_get_handler_data(virq);
        u32 msr;
        int src;
        int subvirq;
        raw_spin_lock(&desc->lock);
-        if (desc->status & IRQ_LEVEL)
+        if (irqd_is_level_type(idata))
-                desc->chip->mask(virq);
+                chip->irq_mask(idata);
        else
-                desc->chip->mask_ack(virq);
+                chip->irq_mask_ack(idata);
        raw_spin_unlock(&desc->lock);
        msr = mfdcr(uic->dcrbase + UIC_MSR);
@@ -243,10 +235,10 @@ void uic_irq_cascade(unsigned int virq, struct irq_desc *desc)
 uic_irq_ret:
        raw_spin_lock(&desc->lock);
-        if (desc->status & IRQ_LEVEL)
+        if (irqd_is_level_type(idata))
-                desc->chip->ack(virq);
+                chip->irq_ack(idata);
-        if (!(desc->status & IRQ_DISABLED) && desc->chip->unmask)
+        if (!irqd_irq_disabled(idata) && chip->irq_unmask)
-                desc->chip->unmask(virq);
+                chip->irq_unmask(idata);
        raw_spin_unlock(&desc->lock);
 }
@@ -335,8 +327,8 @@ void __init uic_init_tree(void)
                        cascade_virq = irq_of_parse_and_map(np, 0);
-                        set_irq_data(cascade_virq, uic);
+                        irq_set_handler_data(cascade_virq, uic);
-                        set_irq_chained_handler(cascade_virq, uic_irq_cascade);
+                        irq_set_chained_handler(cascade_virq, uic_irq_cascade);
                        /* FIXME: setup critical cascade?? */
                }
diff --git a/arch/powerpc/sysdev/xics/Kconfig b/arch/powerpc/sysdev/xics/Kconfig
new file mode 100644
index 000000000000..0031eda320c3
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/Kconfig
@@ -0,0 +1,13 @@
+config PPC_XICS
+       def_bool n
+       select PPC_SMP_MUXED_IPI
+config PPC_ICP_NATIVE
+       def_bool n
+config PPC_ICP_HV
+       def_bool n
+config PPC_ICS_RTAS
+       def_bool n
diff --git a/arch/powerpc/sysdev/xics/Makefile b/arch/powerpc/sysdev/xics/Makefile
new file mode 100644
index 000000000000..b75a6059337f
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/Makefile
@@ -0,0 +1,6 @@
+subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
+obj-y                           += xics-common.o
+obj-$(CONFIG_PPC_ICP_NATIVE)    += icp-native.o
+obj-$(CONFIG_PPC_ICP_HV)        += icp-hv.o
+obj-$(CONFIG_PPC_ICS_RTAS)      += ics-rtas.o
diff --git a/arch/powerpc/sysdev/xics/icp-hv.c b/arch/powerpc/sysdev/xics/icp-hv.c
new file mode 100644
index 000000000000..9518d367a64f
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-hv.c
@@ -0,0 +1,164 @@
+/*
+ * Copyright 2011 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <asm/smp.h>
+#include <asm/irq.h>
+#include <asm/errno.h>
+#include <asm/xics.h>
+#include <asm/io.h>
+#include <asm/hvcall.h>
+static inline unsigned int icp_hv_get_xirr(unsigned char cppr)
+{
+        unsigned long retbuf[PLPAR_HCALL_BUFSIZE];
+        long rc;
+        rc = plpar_hcall(H_XIRR, retbuf, cppr);
+        if (rc != H_SUCCESS)
+                panic(" bad return code xirr - rc = %lx\n", rc);
+        return (unsigned int)retbuf[0];
+}
+static inline void icp_hv_set_xirr(unsigned int value)
+{
+        long rc = plpar_hcall_norets(H_EOI, value);
+        if (rc != H_SUCCESS)
+                panic("bad return code EOI - rc = %ld, value=%x\n", rc, value);
+}
+static inline void icp_hv_set_cppr(u8 value)
+{
+        long rc = plpar_hcall_norets(H_CPPR, value);
+        if (rc != H_SUCCESS)
+                panic("bad return code cppr - rc = %lx\n", rc);
+}
+static inline void icp_hv_set_qirr(int n_cpu , u8 value)
+{
+        long rc = plpar_hcall_norets(H_IPI, get_hard_smp_processor_id(n_cpu),
+                                     value);
+        if (rc != H_SUCCESS)
+                panic("bad return code qirr - rc = %lx\n", rc);
+}
+static void icp_hv_eoi(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        iosync();
+        icp_hv_set_xirr((xics_pop_cppr() << 24) | hw_irq);
+}
+static void icp_hv_teardown_cpu(void)
+{
+        int cpu = smp_processor_id();
+        /* Clear any pending IPI */
+        icp_hv_set_qirr(cpu, 0xff);
+}
+static void icp_hv_flush_ipi(void)
+{
+        /* We take the ipi irq but and never return so we
+         * need to EOI the IPI, but want to leave our priority 0
+         *
+         * should we check all the other interrupts too?
+         * should we be flagging idle loop instead?
+         * or creating some task to be scheduled?
+         */
+        icp_hv_set_xirr((0x00 << 24) | XICS_IPI);
+}
+static unsigned int icp_hv_get_irq(void)
+{
+        unsigned int xirr = icp_hv_get_xirr(xics_cppr_top());
+        unsigned int vec = xirr & 0x00ffffff;
+        unsigned int irq;
+        if (vec == XICS_IRQ_SPURIOUS)
+                return NO_IRQ;
+        irq = irq_radix_revmap_lookup(xics_host, vec);
+        if (likely(irq != NO_IRQ)) {
+                xics_push_cppr(vec);
+                return irq;
+        }
+        /* We don't have a linux mapping, so have rtas mask it. */
+        xics_mask_unknown_vec(vec);
+        /* We might learn about it later, so EOI it */
+        icp_hv_set_xirr(xirr);
+        return NO_IRQ;
+}
+static void icp_hv_set_cpu_priority(unsigned char cppr)
+{
+        xics_set_base_cppr(cppr);
+        icp_hv_set_cppr(cppr);
+        iosync();
+}
+#ifdef CONFIG_SMP
+static void icp_hv_cause_ipi(int cpu, unsigned long data)
+{
+        icp_hv_set_qirr(cpu, IPI_PRIORITY);
+}
+static irqreturn_t icp_hv_ipi_action(int irq, void *dev_id)
+{
+        int cpu = smp_processor_id();
+        icp_hv_set_qirr(cpu, 0xff);
+        return smp_ipi_demux();
+}
+#endif /* CONFIG_SMP */
+static const struct icp_ops icp_hv_ops = {
+        .get_irq        = icp_hv_get_irq,
+        .eoi            = icp_hv_eoi,
+        .set_priority   = icp_hv_set_cpu_priority,
+        .teardown_cpu   = icp_hv_teardown_cpu,
+        .flush_ipi      = icp_hv_flush_ipi,
+#ifdef CONFIG_SMP
+        .ipi_action     = icp_hv_ipi_action,
+        .cause_ipi      = icp_hv_cause_ipi,
+#endif
+};
+int icp_hv_init(void)
+{
+        struct device_node *np;
+        np = of_find_compatible_node(NULL, NULL, "ibm,ppc-xicp");
+        if (!np)
+                np = of_find_node_by_type(NULL,
+                                    "PowerPC-External-Interrupt-Presentation");
+        if (!np)
+                return -ENODEV;
+        icp_ops = &icp_hv_ops;
+        return 0;
+}
diff --git a/arch/powerpc/sysdev/xics/icp-native.c b/arch/powerpc/sysdev/xics/icp-native.c
new file mode 100644
index 000000000000..1f15ad436140
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/icp-native.c
@@ -0,0 +1,293 @@
+/*
+ * Copyright 2011 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/irq.h>
+#include <asm/errno.h>
+#include <asm/xics.h>
+struct icp_ipl {
+        union {
+                u32 word;
+                u8 bytes[4];
+        } xirr_poll;
+        union {
+                u32 word;
+                u8 bytes[4];
+        } xirr;
+        u32 dummy;
+        union {
+                u32 word;
+                u8 bytes[4];
+        } qirr;
+        u32 link_a;
+        u32 link_b;
+        u32 link_c;
+};
+static struct icp_ipl __iomem *icp_native_regs[NR_CPUS];
+static inline unsigned int icp_native_get_xirr(void)
+{
+        int cpu = smp_processor_id();
+        return in_be32(&icp_native_regs[cpu]->xirr.word);
+}
+static inline void icp_native_set_xirr(unsigned int value)
+{
+        int cpu = smp_processor_id();
+        out_be32(&icp_native_regs[cpu]->xirr.word, value);
+}
+static inline void icp_native_set_cppr(u8 value)
+{
+        int cpu = smp_processor_id();
+        out_8(&icp_native_regs[cpu]->xirr.bytes[0], value);
+}
+static inline void icp_native_set_qirr(int n_cpu, u8 value)
+{
+        out_8(&icp_native_regs[n_cpu]->qirr.bytes[0], value);
+}
+static void icp_native_set_cpu_priority(unsigned char cppr)
+{
+        xics_set_base_cppr(cppr);
+        icp_native_set_cppr(cppr);
+        iosync();
+}
+static void icp_native_eoi(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        iosync();
+        icp_native_set_xirr((xics_pop_cppr() << 24) | hw_irq);
+}
+static void icp_native_teardown_cpu(void)
+{
+        int cpu = smp_processor_id();
+        /* Clear any pending IPI */
+        icp_native_set_qirr(cpu, 0xff);
+}
+static void icp_native_flush_ipi(void)
+{
+        /* We take the ipi irq but and never return so we
+         * need to EOI the IPI, but want to leave our priority 0
+         *
+         * should we check all the other interrupts too?
+         * should we be flagging idle loop instead?
+         * or creating some task to be scheduled?
+         */
+        icp_native_set_xirr((0x00 << 24) | XICS_IPI);
+}
+static unsigned int icp_native_get_irq(void)
+{
+        unsigned int xirr = icp_native_get_xirr();
+        unsigned int vec = xirr & 0x00ffffff;
+        unsigned int irq;
+        if (vec == XICS_IRQ_SPURIOUS)
+                return NO_IRQ;
+        irq = irq_radix_revmap_lookup(xics_host, vec);
+        if (likely(irq != NO_IRQ)) {
+                xics_push_cppr(vec);
+                return irq;
+        }
+        /* We don't have a linux mapping, so have rtas mask it. */
+        xics_mask_unknown_vec(vec);
+        /* We might learn about it later, so EOI it */
+        icp_native_set_xirr(xirr);
+        return NO_IRQ;
+}
+#ifdef CONFIG_SMP
+static void icp_native_cause_ipi(int cpu, unsigned long data)
+{
+        icp_native_set_qirr(cpu, IPI_PRIORITY);
+}
+static irqreturn_t icp_native_ipi_action(int irq, void *dev_id)
+{
+        int cpu = smp_processor_id();
+        icp_native_set_qirr(cpu, 0xff);
+        return smp_ipi_demux();
+}
+#endif /* CONFIG_SMP */
+static int __init icp_native_map_one_cpu(int hw_id, unsigned long addr,
+                                         unsigned long size)
+{
+        char *rname;
+        int i, cpu = -1;
+        /* This may look gross but it's good enough for now, we don't quite
+         * have a hard -> linux processor id matching.
+         */
+        for_each_possible_cpu(i) {
+                if (!cpu_present(i))
+                        continue;
+                if (hw_id == get_hard_smp_processor_id(i)) {
+                        cpu = i;
+                        break;
+                }
+        }
+        /* Fail, skip that CPU. Don't print, it's normal, some XICS come up
+         * with way more entries in there than you have CPUs
+         */
+        if (cpu == -1)
+                return 0;
+        rname = kasprintf(GFP_KERNEL, "CPU %d [0x%x] Interrupt Presentation",
+                          cpu, hw_id);
+        if (!request_mem_region(addr, size, rname)) {
+                pr_warning("icp_native: Could not reserve ICP MMIO"
+                           " for CPU %d, interrupt server #0x%x\n",
+                           cpu, hw_id);
+                return -EBUSY;
+        }
+        icp_native_regs[cpu] = ioremap(addr, size);
+        if (!icp_native_regs[cpu]) {
+                pr_warning("icp_native: Failed ioremap for CPU %d, "
+                           "interrupt server #0x%x, addr %#lx\n",
+                           cpu, hw_id, addr);
+                release_mem_region(addr, size);
+                return -ENOMEM;
+        }
+        return 0;
+}
+static int __init icp_native_init_one_node(struct device_node *np,
+                                           unsigned int *indx)
+{
+        unsigned int ilen;
+        const u32 *ireg;
+        int i;
+        int reg_tuple_size;
+        int num_servers = 0;
+        /* This code does the theorically broken assumption that the interrupt
+         * server numbers are the same as the hard CPU numbers.
+         * This happens to be the case so far but we are playing with fire...
+         * should be fixed one of these days. -BenH.
+         */
+        ireg = of_get_property(np, "ibm,interrupt-server-ranges", &ilen);
+        /* Do that ever happen ? we'll know soon enough... but even good'old
+         * f80 does have that property ..
+         */
+        WARN_ON((ireg == NULL) || (ilen != 2*sizeof(u32)));
+        if (ireg) {
+                *indx = of_read_number(ireg, 1);
+                if (ilen >= 2*sizeof(u32))
+                        num_servers = of_read_number(ireg + 1, 1);
+        }
+        ireg = of_get_property(np, "reg", &ilen);
+        if (!ireg) {
+                pr_err("icp_native: Can't find interrupt reg property");
+                return -1;
+        }
+        reg_tuple_size = (of_n_addr_cells(np) + of_n_size_cells(np)) * 4;
+        if (((ilen % reg_tuple_size) != 0)
+            || (num_servers && (num_servers != (ilen / reg_tuple_size)))) {
+                pr_err("icp_native: ICP reg len (%d) != num servers (%d)",
+                       ilen / reg_tuple_size, num_servers);
+                return -1;
+        }
+        for (i = 0; i < (ilen / reg_tuple_size); i++) {
+                struct resource r;
+                int err;
+                err = of_address_to_resource(np, i, &r);
+                if (err) {
+                        pr_err("icp_native: Could not translate ICP MMIO"
+                               " for interrupt server 0x%x (%d)\n", *indx, err);
+                        return -1;
+                }
+                if (icp_native_map_one_cpu(*indx, r.start, r.end - r.start))
+                        return -1;
+                (*indx)++;
+        }
+        return 0;
+}
+static const struct icp_ops icp_native_ops = {
+        .get_irq        = icp_native_get_irq,
+        .eoi            = icp_native_eoi,
+        .set_priority   = icp_native_set_cpu_priority,
+        .teardown_cpu   = icp_native_teardown_cpu,
+        .flush_ipi      = icp_native_flush_ipi,
+#ifdef CONFIG_SMP
+        .ipi_action     = icp_native_ipi_action,
+        .cause_ipi      = icp_native_cause_ipi,
+#endif
+};
+int icp_native_init(void)
+{
+        struct device_node *np;
+        u32 indx = 0;
+        int found = 0;
+        for_each_compatible_node(np, NULL, "ibm,ppc-xicp")
+                if (icp_native_init_one_node(np, &indx) == 0)
+                        found = 1;
+        if (!found) {
+                for_each_node_by_type(np,
+                        "PowerPC-External-Interrupt-Presentation") {
+                                if (icp_native_init_one_node(np, &indx) == 0)
+                                        found = 1;
+                }
+        }
+        if (found == 0)
+                return -ENODEV;
+        icp_ops = &icp_native_ops;
+        return 0;
+}
diff --git a/arch/powerpc/sysdev/xics/ics-rtas.c b/arch/powerpc/sysdev/xics/ics-rtas.c
new file mode 100644
index 000000000000..c782f85cf7e4
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/ics-rtas.c
@@ -0,0 +1,240 @@
+#include <linux/types.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <linux/spinlock.h>
+#include <linux/msi.h>
+#include <asm/prom.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/irq.h>
+#include <asm/errno.h>
+#include <asm/xics.h>
+#include <asm/rtas.h>
+/* RTAS service tokens */
+static int ibm_get_xive;
+static int ibm_set_xive;
+static int ibm_int_on;
+static int ibm_int_off;
+static int ics_rtas_map(struct ics *ics, unsigned int virq);
+static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec);
+static long ics_rtas_get_server(struct ics *ics, unsigned long vec);
+static int ics_rtas_host_match(struct ics *ics, struct device_node *node);
+/* Only one global & state struct ics */
+static struct ics ics_rtas = {
+        .map            = ics_rtas_map,
+        .mask_unknown   = ics_rtas_mask_unknown,
+        .get_server     = ics_rtas_get_server,
+        .host_match     = ics_rtas_host_match,
+};
+static void ics_rtas_unmask_irq(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        int call_status;
+        int server;
+        pr_devel("xics: unmask virq %d [hw 0x%x]\n", d->irq, hw_irq);
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return;
+        server = xics_get_irq_server(d->irq, d->affinity, 0);
+        call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq, server,
+                                DEFAULT_PRIORITY);
+        if (call_status != 0) {
+                printk(KERN_ERR
+                        "%s: ibm_set_xive irq %u server %x returned %d\n",
+                        __func__, hw_irq, server, call_status);
+                return;
+        }
+        /* Now unmask the interrupt (often a no-op) */
+        call_status = rtas_call(ibm_int_on, 1, 1, NULL, hw_irq);
+        if (call_status != 0) {
+                printk(KERN_ERR "%s: ibm_int_on irq=%u returned %d\n",
+                        __func__, hw_irq, call_status);
+                return;
+        }
+}
+static unsigned int ics_rtas_startup(struct irq_data *d)
+{
+#ifdef CONFIG_PCI_MSI
+        /*
+         * The generic MSI code returns with the interrupt disabled on the
+         * card, using the MSI mask bits. Firmware doesn't appear to unmask
+         * at that level, so we do it here by hand.
+         */
+        if (d->msi_desc)
+                unmask_msi_irq(d);
+#endif
+        /* unmask it */
+        ics_rtas_unmask_irq(d);
+        return 0;
+}
+static void ics_rtas_mask_real_irq(unsigned int hw_irq)
+{
+        int call_status;
+        if (hw_irq == XICS_IPI)
+                return;
+        call_status = rtas_call(ibm_int_off, 1, 1, NULL, hw_irq);
+        if (call_status != 0) {
+                printk(KERN_ERR "%s: ibm_int_off irq=%u returned %d\n",
+                        __func__, hw_irq, call_status);
+                return;
+        }
+        /* Have to set XIVE to 0xff to be able to remove a slot */
+        call_status = rtas_call(ibm_set_xive, 3, 1, NULL, hw_irq,
+                                xics_default_server, 0xff);
+        if (call_status != 0) {
+                printk(KERN_ERR "%s: ibm_set_xive(0xff) irq=%u returned %d\n",
+                        __func__, hw_irq, call_status);
+                return;
+        }
+}
+static void ics_rtas_mask_irq(struct irq_data *d)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        pr_devel("xics: mask virq %d [hw 0x%x]\n", d->irq, hw_irq);
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return;
+        ics_rtas_mask_real_irq(hw_irq);
+}
+static int ics_rtas_set_affinity(struct irq_data *d,
+                                 const struct cpumask *cpumask,
+                                 bool force)
+{
+        unsigned int hw_irq = (unsigned int)irqd_to_hwirq(d);
+        int status;
+        int xics_status[2];
+        int irq_server;
+        if (hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS)
+                return -1;
+        status = rtas_call(ibm_get_xive, 1, 3, xics_status, hw_irq);
+        if (status) {
+                printk(KERN_ERR "%s: ibm,get-xive irq=%u returns %d\n",
+                        __func__, hw_irq, status);
+                return -1;
+        }
+        irq_server = xics_get_irq_server(d->irq, cpumask, 1);
+        if (irq_server == -1) {
+                char cpulist[128];
+                cpumask_scnprintf(cpulist, sizeof(cpulist), cpumask);
+                printk(KERN_WARNING
+                        "%s: No online cpus in the mask %s for irq %d\n",
+                        __func__, cpulist, d->irq);
+                return -1;
+        }
+        status = rtas_call(ibm_set_xive, 3, 1, NULL,
+                           hw_irq, irq_server, xics_status[1]);
+        if (status) {
+                printk(KERN_ERR "%s: ibm,set-xive irq=%u returns %d\n",
+                        __func__, hw_irq, status);
+                return -1;
+        }
+        return IRQ_SET_MASK_OK;
+}
+static struct irq_chip ics_rtas_irq_chip = {
+        .name = "XICS",
+        .irq_startup = ics_rtas_startup,
+        .irq_mask = ics_rtas_mask_irq,
+        .irq_unmask = ics_rtas_unmask_irq,
+        .irq_eoi = NULL, /* Patched at init time */
+        .irq_set_affinity = ics_rtas_set_affinity
+};
+static int ics_rtas_map(struct ics *ics, unsigned int virq)
+{
+        unsigned int hw_irq = (unsigned int)virq_to_hw(virq);
+        int status[2];
+        int rc;
+        if (WARN_ON(hw_irq == XICS_IPI || hw_irq == XICS_IRQ_SPURIOUS))
+                return -EINVAL;
+        /* Check if RTAS knows about this interrupt */
+        rc = rtas_call(ibm_get_xive, 1, 3, status, hw_irq);
+        if (rc)
+                return -ENXIO;
+        irq_set_chip_and_handler(virq, &ics_rtas_irq_chip, handle_fasteoi_irq);
+        irq_set_chip_data(virq, &ics_rtas);
+        return 0;
+}
+static void ics_rtas_mask_unknown(struct ics *ics, unsigned long vec)
+{
+        ics_rtas_mask_real_irq(vec);
+}
+static long ics_rtas_get_server(struct ics *ics, unsigned long vec)
+{
+        int rc, status[2];
+        rc = rtas_call(ibm_get_xive, 1, 3, status, vec);
+        if (rc)
+                return -1;
+        return status[0];
+}
+static int ics_rtas_host_match(struct ics *ics, struct device_node *node)
+{
+        /* IBM machines have interrupt parents of various funky types for things
+         * like vdevices, events, etc... The trick we use here is to match
+         * everything here except the legacy 8259 which is compatible "chrp,iic"
+         */
+        return !of_device_is_compatible(node, "chrp,iic");
+}
+int ics_rtas_init(void)
+{
+        ibm_get_xive = rtas_token("ibm,get-xive");
+        ibm_set_xive = rtas_token("ibm,set-xive");
+        ibm_int_on  = rtas_token("ibm,int-on");
+        ibm_int_off = rtas_token("ibm,int-off");
+        /* We enable the RTAS "ICS" if RTAS is present with the
+         * appropriate tokens
+         */
+        if (ibm_get_xive == RTAS_UNKNOWN_SERVICE ||
+            ibm_set_xive == RTAS_UNKNOWN_SERVICE)
+                return -ENODEV;
+        /* We need to patch our irq chip's EOI to point to the
+         * right ICP
+         */
+        ics_rtas_irq_chip.irq_eoi = icp_ops->eoi;
+        /* Register ourselves */
+        xics_register_ics(&ics_rtas);
+        return 0;
+}
diff --git a/arch/powerpc/sysdev/xics/xics-common.c b/arch/powerpc/sysdev/xics/xics-common.c
new file mode 100644
index 000000000000..445c5a01b766
--- /dev/null
+++ b/arch/powerpc/sysdev/xics/xics-common.c
@@ -0,0 +1,443 @@
+/*
+ * Copyright 2011 IBM Corporation.
+ *
+ *  This program is free software; you can redistribute it and/or
+ *  modify it under the terms of the GNU General Public License
+ *  as published by the Free Software Foundation; either version
+ *  2 of the License, or (at your option) any later version.
+ *
+ */
+#include <linux/types.h>
+#include <linux/threads.h>
+#include <linux/kernel.h>
+#include <linux/irq.h>
+#include <linux/debugfs.h>
+#include <linux/smp.h>
+#include <linux/interrupt.h>
+#include <linux/seq_file.h>
+#include <linux/init.h>
+#include <linux/cpu.h>
+#include <linux/of.h>
+#include <linux/slab.h>
+#include <linux/spinlock.h>
+#include <asm/prom.h>
+#include <asm/io.h>
+#include <asm/smp.h>
+#include <asm/machdep.h>
+#include <asm/irq.h>
+#include <asm/errno.h>
+#include <asm/rtas.h>
+#include <asm/xics.h>
+#include <asm/firmware.h>
+/* Globals common to all ICP/ICS implementations */
+const struct icp_ops    *icp_ops;
+unsigned int xics_default_server                = 0xff;
+unsigned int xics_default_distrib_server        = 0;
+unsigned int xics_interrupt_server_size         = 8;
+DEFINE_PER_CPU(struct xics_cppr, xics_cppr);
+struct irq_host *xics_host;
+static LIST_HEAD(ics_list);
+void xics_update_irq_servers(void)
+{
+        int i, j;
+        struct device_node *np;
+        u32 ilen;
+        const u32 *ireg;
+        u32 hcpuid;
+        /* Find the server numbers for the boot cpu. */
+        np = of_get_cpu_node(boot_cpuid, NULL);
+        BUG_ON(!np);
+        hcpuid = get_hard_smp_processor_id(boot_cpuid);
+        xics_default_server = xics_default_distrib_server = hcpuid;
+        pr_devel("xics: xics_default_server = 0x%x\n", xics_default_server);
+        ireg = of_get_property(np, "ibm,ppc-interrupt-gserver#s", &ilen);
+        if (!ireg) {
+                of_node_put(np);
+                return;
+        }
+        i = ilen / sizeof(int);
+        /* Global interrupt distribution server is specified in the last
+         * entry of "ibm,ppc-interrupt-gserver#s" property. Get the last
+         * entry fom this property for current boot cpu id and use it as
+         * default distribution server
+         */
+        for (j = 0; j < i; j += 2) {
+                if (ireg[j] == hcpuid) {
+                        xics_default_distrib_server = ireg[j+1];
+                        break;
+                }
+        }
+        pr_devel("xics: xics_default_distrib_server = 0x%x\n",
+                 xics_default_distrib_server);
+        of_node_put(np);
+}
+/* GIQ stuff, currently only supported on RTAS setups, will have
+ * to be sorted properly for bare metal
+ */
+void xics_set_cpu_giq(unsigned int gserver, unsigned int join)
+{
+#ifdef CONFIG_PPC_RTAS
+        int index;
+        int status;
+        if (!rtas_indicator_present(GLOBAL_INTERRUPT_QUEUE, NULL))
+                return;
+        index = (1UL << xics_interrupt_server_size) - 1 - gserver;
+        status = rtas_set_indicator_fast(GLOBAL_INTERRUPT_QUEUE, index, join);
+        WARN(status < 0, "set-indicator(%d, %d, %u) returned %d\n",
+             GLOBAL_INTERRUPT_QUEUE, index, join, status);
+#endif
+}
+void xics_setup_cpu(void)
+{
+        icp_ops->set_priority(LOWEST_PRIORITY);
+        xics_set_cpu_giq(xics_default_distrib_server, 1);
+}
+void xics_mask_unknown_vec(unsigned int vec)
+{
+        struct ics *ics;
+        pr_err("Interrupt 0x%x (real) is invalid, disabling it.\n", vec);
+        list_for_each_entry(ics, &ics_list, link)
+                ics->mask_unknown(ics, vec);
+}
+#ifdef CONFIG_SMP
+static void xics_request_ipi(void)
+{
+        unsigned int ipi;
+        ipi = irq_create_mapping(xics_host, XICS_IPI);
+        BUG_ON(ipi == NO_IRQ);
+        /*
+         * IPIs are marked IRQF_DISABLED as they must run with irqs
+         * disabled, and PERCPU.  The handler was set in map.
+         */
+        BUG_ON(request_irq(ipi, icp_ops->ipi_action,
+                           IRQF_DISABLED|IRQF_PERCPU, "IPI", NULL));
+}
+int __init xics_smp_probe(void)
+{
+        /* Setup cause_ipi callback  based on which ICP is used */
+        smp_ops->cause_ipi = icp_ops->cause_ipi;
+        /* Register all the IPIs */
+        xics_request_ipi();
+        return cpumask_weight(cpu_possible_mask);
+}
+#endif /* CONFIG_SMP */
+void xics_teardown_cpu(void)
+{
+        struct xics_cppr *os_cppr = &__get_cpu_var(xics_cppr);
+        /*
+         * we have to reset the cppr index to 0 because we're
+         * not going to return from the IPI
+         */
+        os_cppr->index = 0;
+        icp_ops->set_priority(0);
+        icp_ops->teardown_cpu();
+}
+void xics_kexec_teardown_cpu(int secondary)
+{
+        xics_teardown_cpu();
+        icp_ops->flush_ipi();
+        /*
+         * Some machines need to have at least one cpu in the GIQ,
+         * so leave the master cpu in the group.
+         */
+        if (secondary)
+                xics_set_cpu_giq(xics_default_distrib_server, 0);
+}
+#ifdef CONFIG_HOTPLUG_CPU
+/* Interrupts are disabled. */
+void xics_migrate_irqs_away(void)
+{
+        int cpu = smp_processor_id(), hw_cpu = hard_smp_processor_id();
+        unsigned int irq, virq;
+        /* If we used to be the default server, move to the new "boot_cpuid" */
+        if (hw_cpu == xics_default_server)
+                xics_update_irq_servers();
+        /* Reject any interrupt that was queued to us... */
+        icp_ops->set_priority(0);
+        /* Remove ourselves from the global interrupt queue */
+        xics_set_cpu_giq(xics_default_distrib_server, 0);
+        /* Allow IPIs again... */
+        icp_ops->set_priority(DEFAULT_PRIORITY);
+        for_each_irq(virq) {
+                struct irq_desc *desc;
+                struct irq_chip *chip;
+                long server;
+                unsigned long flags;
+                struct ics *ics;
+                /* We can't set affinity on ISA interrupts */
+                if (virq < NUM_ISA_INTERRUPTS)
+                        continue;
+                if (!virq_is_host(virq, xics_host))
+                        continue;
+                irq = (unsigned int)virq_to_hw(virq);
+                /* We need to get IPIs still. */
+                if (irq == XICS_IPI || irq == XICS_IRQ_SPURIOUS)
+                        continue;
+                desc = irq_to_desc(virq);
+                /* We only need to migrate enabled IRQS */
+                if (!desc || !desc->action)
+                        continue;
+                chip = irq_desc_get_chip(desc);
+                if (!chip || !chip->irq_set_affinity)
+                        continue;
+                raw_spin_lock_irqsave(&desc->lock, flags);
+                /* Locate interrupt server */
+                server = -1;
+                ics = irq_get_chip_data(virq);
+                if (ics)
+                        server = ics->get_server(ics, irq);
+                if (server < 0) {
+                        printk(KERN_ERR "%s: Can't find server for irq %d\n",
+                               __func__, irq);
+                        goto unlock;
+                }
+                /* We only support delivery to all cpus or to one cpu.
+                 * The irq has to be migrated only in the single cpu
+                 * case.
+                 */
+                if (server != hw_cpu)
+                        goto unlock;
+                /* This is expected during cpu offline. */
+                if (cpu_online(cpu))
+                        pr_warning("IRQ %u affinity broken off cpu %u\n",
+                               virq, cpu);
+                /* Reset affinity to all cpus */
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
+                irq_set_affinity(virq, cpu_all_mask);
+                continue;
+unlock:
+                raw_spin_unlock_irqrestore(&desc->lock, flags);
+        }
+}
+#endif /* CONFIG_HOTPLUG_CPU */
+#ifdef CONFIG_SMP
+/*
+ * For the moment we only implement delivery to all cpus or one cpu.
+ *
+ * If the requested affinity is cpu_all_mask, we set global affinity.
+ * If not we set it to the first cpu in the mask, even if multiple cpus
+ * are set. This is so things like irqbalance (which set core and package
+ * wide affinities) do the right thing.
+ *
+ * We need to fix this to implement support for the links
+ */
+int xics_get_irq_server(unsigned int virq, const struct cpumask *cpumask,
+                        unsigned int strict_check)
+{
+        if (!distribute_irqs)
+                return xics_default_server;
+        if (!cpumask_subset(cpu_possible_mask, cpumask)) {
+                int server = cpumask_first_and(cpu_online_mask, cpumask);
+                if (server < nr_cpu_ids)
+                        return get_hard_smp_processor_id(server);
+                if (strict_check)
+                        return -1;
+        }
+        /*
+         * Workaround issue with some versions of JS20 firmware that
+         * deliver interrupts to cpus which haven't been started. This
+         * happens when using the maxcpus= boot option.
+         */
+        if (cpumask_equal(cpu_online_mask, cpu_present_mask))
+                return xics_default_distrib_server;
+        return xics_default_server;
+}
+#endif /* CONFIG_SMP */
+static int xics_host_match(struct irq_host *h, struct device_node *node)
+{
+        struct ics *ics;
+        list_for_each_entry(ics, &ics_list, link)
+                if (ics->host_match(ics, node))
+                        return 1;
+        return 0;
+}
+/* Dummies */
+static void xics_ipi_unmask(struct irq_data *d) { }
+static void xics_ipi_mask(struct irq_data *d) { }
+static struct irq_chip xics_ipi_chip = {
+        .name = "XICS",
+        .irq_eoi = NULL, /* Patched at init time */
+        .irq_mask = xics_ipi_mask,
+        .irq_unmask = xics_ipi_unmask,
+};
+static int xics_host_map(struct irq_host *h, unsigned int virq,
+                         irq_hw_number_t hw)
+{
+        struct ics *ics;
+        pr_devel("xics: map virq %d, hwirq 0x%lx\n", virq, hw);
+        /* Insert the interrupt mapping into the radix tree for fast lookup */
+        irq_radix_revmap_insert(xics_host, virq, hw);
+        /* They aren't all level sensitive but we just don't really know */
+        irq_set_status_flags(virq, IRQ_LEVEL);
+        /* Don't call into ICS for IPIs */
+        if (hw == XICS_IPI) {
+                irq_set_chip_and_handler(virq, &xics_ipi_chip,
+                                         handle_percpu_irq);
+                return 0;
+        }
+        /* Let the ICS setup the chip data */
+        list_for_each_entry(ics, &ics_list, link)
+                if (ics->map(ics, virq) == 0)
+                        return 0;
+        return -EINVAL;
+}
+static int xics_host_xlate(struct irq_host *h, struct device_node *ct,
+                           const u32 *intspec, unsigned int intsize,
+                           irq_hw_number_t *out_hwirq, unsigned int *out_flags)
+{
+        /* Current xics implementation translates everything
+         * to level. It is not technically right for MSIs but this
+         * is irrelevant at this point. We might get smarter in the future
+         */
+        *out_hwirq = intspec[0];
+        *out_flags = IRQ_TYPE_LEVEL_LOW;
+        return 0;
+}
+static struct irq_host_ops xics_host_ops = {
+        .match = xics_host_match,
+        .map = xics_host_map,
+        .xlate = xics_host_xlate,
+};
+static void __init xics_init_host(void)
+{
+        xics_host = irq_alloc_host(NULL, IRQ_HOST_MAP_TREE, 0, &xics_host_ops,
+                                   XICS_IRQ_SPURIOUS);
+        BUG_ON(xics_host == NULL);
+        irq_set_default_host(xics_host);
+}
+void __init xics_register_ics(struct ics *ics)
+{
+        list_add(&ics->link, &ics_list);
+}
+static void __init xics_get_server_size(void)
+{
+        struct device_node *np;
+        const u32 *isize;
+        /* We fetch the interrupt server size from the first ICS node
+         * we find if any
+         */
+        np = of_find_compatible_node(NULL, NULL, "ibm,ppc-xics");
+        if (!np)
+                return;
+        isize = of_get_property(np, "ibm,interrupt-server#-size", NULL);
+        if (!isize)
+                return;
+        xics_interrupt_server_size = *isize;
+        of_node_put(np);
+}
+void __init xics_init(void)
+{
+        int rc = -1;
+        /* Fist locate ICP */
+#ifdef CONFIG_PPC_ICP_HV
+        if (firmware_has_feature(FW_FEATURE_LPAR))
+                rc = icp_hv_init();
+#endif
+#ifdef CONFIG_PPC_ICP_NATIVE
+        if (rc < 0)
+                rc = icp_native_init();
+#endif
+        if (rc < 0) {
+                pr_warning("XICS: Cannot find a Presentation Controller !\n");
+                return;
+        }
+        /* Copy get_irq callback over to ppc_md */
+        ppc_md.get_irq = icp_ops->get_irq;
+        /* Patch up IPI chip EOI */
+        xics_ipi_chip.irq_eoi = icp_ops->eoi;
+        /* Now locate ICS */
+#ifdef CONFIG_PPC_ICS_RTAS
+        rc = ics_rtas_init();
+#endif
+        if (rc < 0)
+                pr_warning("XICS: Cannot find a Source Controller !\n");
+        /* Initialize common bits */
+        xics_get_server_size();
+        xics_update_irq_servers();
+        xics_init_host();
+        xics_setup_cpu();
+}
diff --git a/arch/powerpc/sysdev/xilinx_intc.c b/arch/powerpc/sysdev/xilinx_intc.c
index 1e0ccfaf403e..6183799754af 100644
--- a/arch/powerpc/sysdev/xilinx_intc.c
+++ b/arch/powerpc/sysdev/xilinx_intc.c
@@ -69,32 +69,26 @@ static unsigned char xilinx_intc_map_senses[] = {
 *
 * IRQ Chip common (across level and edge) operations
 */
-static void xilinx_intc_mask(unsigned int virq)
+static void xilinx_intc_mask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void * regs = get_irq_chip_data(virq);
+        void * regs = irq_data_get_irq_chip_data(d);
        pr_debug("mask: %d\n", irq);
        out_be32(regs + XINTC_CIE, 1 << irq);
 }
-static int xilinx_intc_set_type(unsigned int virq, unsigned int flow_type)
+static int xilinx_intc_set_type(struct irq_data *d, unsigned int flow_type)
 {
-        struct irq_desc *desc = irq_to_desc(virq);
-        desc->status &= ~(IRQ_TYPE_SENSE_MASK | IRQ_LEVEL);
-        desc->status |= flow_type & IRQ_TYPE_SENSE_MASK;
-        if (flow_type & (IRQ_TYPE_LEVEL_HIGH | IRQ_TYPE_LEVEL_LOW))
-                desc->status |= IRQ_LEVEL;
        return 0;
 }
 /*
 * IRQ Chip level operations
 */
-static void xilinx_intc_level_unmask(unsigned int virq)
+static void xilinx_intc_level_unmask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void * regs = get_irq_chip_data(virq);
+        void * regs = irq_data_get_irq_chip_data(d);
        pr_debug("unmask: %d\n", irq);
        out_be32(regs + XINTC_SIE, 1 << irq);
@@ -107,37 +101,37 @@ static void xilinx_intc_level_unmask(unsigned int virq)
 static struct irq_chip xilinx_intc_level_irqchip = {
        .name = "Xilinx Level INTC",
-        .mask = xilinx_intc_mask,
+        .irq_mask = xilinx_intc_mask,
-        .mask_ack = xilinx_intc_mask,
+        .irq_mask_ack = xilinx_intc_mask,
-        .unmask = xilinx_intc_level_unmask,
+        .irq_unmask = xilinx_intc_level_unmask,
-        .set_type = xilinx_intc_set_type,
+        .irq_set_type = xilinx_intc_set_type,
 };
 /*
 * IRQ Chip edge operations
 */
-static void xilinx_intc_edge_unmask(unsigned int virq)
+static void xilinx_intc_edge_unmask(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void *regs = get_irq_chip_data(virq);
+        void *regs = irq_data_get_irq_chip_data(d);
        pr_debug("unmask: %d\n", irq);
        out_be32(regs + XINTC_SIE, 1 << irq);
 }
-static void xilinx_intc_edge_ack(unsigned int virq)
+static void xilinx_intc_edge_ack(struct irq_data *d)
 {
-        int irq = virq_to_hw(virq);
+        int irq = irqd_to_hwirq(d);
-        void * regs = get_irq_chip_data(virq);
+        void * regs = irq_data_get_irq_chip_data(d);
        pr_debug("ack: %d\n", irq);
        out_be32(regs + XINTC_IAR, 1 << irq);
 }
 static struct irq_chip xilinx_intc_edge_irqchip = {
        .name = "Xilinx Edge  INTC",
-        .mask = xilinx_intc_mask,
+        .irq_mask = xilinx_intc_mask,
-        .unmask = xilinx_intc_edge_unmask,
+        .irq_unmask = xilinx_intc_edge_unmask,
-        .ack = xilinx_intc_edge_ack,
+        .irq_ack = xilinx_intc_edge_ack,
-        .set_type = xilinx_intc_set_type,
+        .irq_set_type = xilinx_intc_set_type,
 };
 /*
@@ -170,15 +164,15 @@ static int xilinx_intc_xlate(struct irq_host *h, struct device_node *ct,
 static int xilinx_intc_map(struct irq_host *h, unsigned int virq,
                                  irq_hw_number_t irq)
 {
-        set_irq_chip_data(virq, h->host_data);
+        irq_set_chip_data(virq, h->host_data);
        if (xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_HIGH ||
            xilinx_intc_typetable[irq] == IRQ_TYPE_LEVEL_LOW) {
-                set_irq_chip_and_handler(virq, &xilinx_intc_level_irqchip,
+                irq_set_chip_and_handler(virq, &xilinx_intc_level_irqchip,
-                        handle_level_irq);
+                                         handle_level_irq);
        } else {
-                set_irq_chip_and_handler(virq, &xilinx_intc_edge_irqchip,
+                irq_set_chip_and_handler(virq, &xilinx_intc_edge_irqchip,
-                        handle_edge_irq);
+                                         handle_edge_irq);
        }
        return 0;
 }
@@ -229,12 +223,14 @@ int xilinx_intc_get_irq(void)
 */
 static void xilinx_i8259_cascade(unsigned int irq, struct irq_desc *desc)
 {
+        struct irq_chip *chip = irq_desc_get_chip(desc);
        unsigned int cascade_irq = i8259_irq();
        if (cascade_irq)
                generic_handle_irq(cascade_irq);
        /* Let xilinx_intc end the interrupt */
-        desc->chip->unmask(irq);
+        chip->irq_unmask(&desc->irq_data);
 }
 static void __init xilinx_i8259_setup_cascade(void)
@@ -254,7 +250,7 @@ static void __init xilinx_i8259_setup_cascade(void)
        }
        i8259_init(cascade_node, 0);
-        set_irq_chained_handler(cascade_irq, xilinx_i8259_cascade);
+        irq_set_chained_handler(cascade_irq, xilinx_i8259_cascade);
        /* Program irq 7 (usb/audio), 14/15 (ide) to level sensitive */
        /* This looks like a dirty hack to me --gcl */
diff --git a/arch/powerpc/xmon/Makefile b/arch/powerpc/xmon/Makefile
index faa81b6a6612..c168c54e3c40 100644
--- a/arch/powerpc/xmon/Makefile
+++ b/arch/powerpc/xmon/Makefile
@@ -4,9 +4,7 @@ subdir-ccflags-$(CONFIG_PPC_WERROR) := -Werror
 GCOV_PROFILE := n
-ifdef CONFIG_PPC64
+ccflags-$(CONFIG_PPC64) := -mno-minimal-toc
-EXTRA_CFLAGS += -mno-minimal-toc
-endif
 obj-y                   += xmon.o start.o nonstdio.o
diff --git a/arch/powerpc/xmon/xmon.c b/arch/powerpc/xmon/xmon.c
index d17d04cfb2cd..42541bbcc7fa 100644
--- a/arch/powerpc/xmon/xmon.c
+++ b/arch/powerpc/xmon/xmon.c
@@ -334,7 +334,7 @@ static void release_output_lock(void)
 int cpus_are_in_xmon(void)
 {
-        return !cpus_empty(cpus_in_xmon);
+        return !cpumask_empty(&cpus_in_xmon);
 }
 #endif
@@ -373,7 +373,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
 #ifdef CONFIG_SMP
        cpu = smp_processor_id();
-        if (cpu_isset(cpu, cpus_in_xmon)) {
+        if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
                get_output_lock();
                excprint(regs);
                printf("cpu 0x%x: Exception %lx %s in xmon, "
@@ -396,10 +396,10 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
        }
        xmon_fault_jmp[cpu] = recurse_jmp;
-        cpu_set(cpu, cpus_in_xmon);
+        cpumask_set_cpu(cpu, &cpus_in_xmon);
        bp = NULL;
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF))
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT))
                bp = at_breakpoint(regs->nip);
        if (bp || unrecoverable_excp(regs))
                fromipi = 0;
@@ -437,10 +437,10 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
                xmon_owner = cpu;
                mb();
                if (ncpus > 1) {
-                        smp_send_debugger_break(MSG_ALL_BUT_SELF);
+                        smp_send_debugger_break();
                        /* wait for other cpus to come in */
                        for (timeout = 100000000; timeout != 0; --timeout) {
-                                if (cpus_weight(cpus_in_xmon) >= ncpus)
+                                if (cpumask_weight(&cpus_in_xmon) >= ncpus)
                                        break;
                                barrier();
                        }
@@ -484,7 +484,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
                }
        }
 leave:
-        cpu_clear(cpu, cpus_in_xmon);
+        cpumask_clear_cpu(cpu, &cpus_in_xmon);
        xmon_fault_jmp[cpu] = NULL;
 #else
        /* UP is simple... */
@@ -529,7 +529,7 @@ static int xmon_core(struct pt_regs *regs, int fromipi)
                }
        }
 #else
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) {
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
                bp = at_breakpoint(regs->nip);
                if (bp != NULL) {
                        int stepped = emulate_step(regs, bp->instr[0]);
@@ -578,7 +578,7 @@ static int xmon_bpt(struct pt_regs *regs)
        struct bpt *bp;
        unsigned long offset;
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
                return 0;
        /* Are we at the trap at bp->instr[1] for some bp? */
@@ -609,7 +609,7 @@ static int xmon_sstep(struct pt_regs *regs)
 static int xmon_dabr_match(struct pt_regs *regs)
 {
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
                return 0;
        if (dabr.enabled == 0)
                return 0;
@@ -619,7 +619,7 @@ static int xmon_dabr_match(struct pt_regs *regs)
 static int xmon_iabr_match(struct pt_regs *regs)
 {
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) != (MSR_IR|MSR_SF))
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) != (MSR_IR|MSR_64BIT))
                return 0;
        if (iabr == NULL)
                return 0;
@@ -630,7 +630,7 @@ static int xmon_iabr_match(struct pt_regs *regs)
 static int xmon_ipi(struct pt_regs *regs)
 {
 #ifdef CONFIG_SMP
-        if (in_xmon && !cpu_isset(smp_processor_id(), cpus_in_xmon))
+        if (in_xmon && !cpumask_test_cpu(smp_processor_id(), &cpus_in_xmon))
                xmon_core(regs, 1);
 #endif
        return 0;
@@ -644,7 +644,7 @@ static int xmon_fault_handler(struct pt_regs *regs)
        if (in_xmon && catch_memory_errors)
                handle_fault(regs);     /* doesn't return */
-        if ((regs->msr & (MSR_IR|MSR_PR|MSR_SF)) == (MSR_IR|MSR_SF)) {
+        if ((regs->msr & (MSR_IR|MSR_PR|MSR_64BIT)) == (MSR_IR|MSR_64BIT)) {
                bp = in_breakpoint_table(regs->nip, &offset);
                if (bp != NULL) {
                        regs->nip = bp->address + offset;
@@ -821,7 +821,7 @@ cmds(struct pt_regs *excp)
                                memzcan();
                                break;
                        case 'i':
-                                show_mem();
+                                show_mem(0);
                                break;
                        default:
                                termch = cmd;
@@ -929,7 +929,7 @@ static int do_step(struct pt_regs *regs)
        int stepped;
        /* check we are in 64-bit kernel mode, translation enabled */
-        if ((regs->msr & (MSR_SF|MSR_PR|MSR_IR)) == (MSR_SF|MSR_IR)) {
+        if ((regs->msr & (MSR_64BIT|MSR_PR|MSR_IR)) == (MSR_64BIT|MSR_IR)) {
                if (mread(regs->nip, &instr, 4) == 4) {
                        stepped = emulate_step(regs, instr);
                        if (stepped < 0) {
@@ -976,7 +976,7 @@ static int cpu_cmd(void)
                printf("cpus stopped:");
                count = 0;
                for (cpu = 0; cpu < NR_CPUS; ++cpu) {
-                        if (cpu_isset(cpu, cpus_in_xmon)) {
+                        if (cpumask_test_cpu(cpu, &cpus_in_xmon)) {
                                if (count == 0)
                                        printf(" %x", cpu);
                                ++count;
@@ -992,7 +992,7 @@ static int cpu_cmd(void)
                return 0;
        }
        /* try to switch to cpu specified */
-        if (!cpu_isset(cpu, cpus_in_xmon)) {
+        if (!cpumask_test_cpu(cpu, &cpus_in_xmon)) {
                printf("cpu 0x%x isn't in xmon\n", cpu);
                return 0;
        }
@@ -1497,6 +1497,10 @@ static void prregs(struct pt_regs *fp)
 #endif
        printf("pc  = ");
        xmon_print_symbol(fp->nip, " ", "\n");
+        if (TRAP(fp) != 0xc00 && cpu_has_feature(CPU_FTR_CFAR)) {
+                printf("cfar= ");
+                xmon_print_symbol(fp->orig_gpr3, " ", "\n");
+        }
        printf("lr  = ");
        xmon_print_symbol(fp->link, " ", "\n");
        printf("msr = "REG"   cr  = %.8lx\n", fp->msr, fp->ccr);
@@ -2663,7 +2667,7 @@ static void dump_stab(void)
 void dump_segments(void)
 {
-        if (cpu_has_feature(CPU_FTR_SLB))
+        if (mmu_has_feature(MMU_FTR_SLB))
                dump_slb();
        else
                dump_stab();