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-rw-r--r--arch/powerpc/platforms/maple/pci.c44
1 files changed, 25 insertions, 19 deletions
diff --git a/arch/powerpc/platforms/maple/pci.c b/arch/powerpc/platforms/maple/pci.c
index ec5c14f5ba49..c3aa46b8e2b9 100644
--- a/arch/powerpc/platforms/maple/pci.c
+++ b/arch/powerpc/platforms/maple/pci.c
@@ -81,16 +81,20 @@ static void __init fixup_bus_range(struct device_node *bridge)
81} 81}
82 82
83 83
84#define U3_AGP_CFA0(devfn, off) \ 84static unsigned long u3_agp_cfa0(u8 devfn, u8 off)
85 ((1 << (unsigned long)PCI_SLOT(dev_fn)) \ 85{
86 | (((unsigned long)PCI_FUNC(dev_fn)) << 8) \ 86 return (1 << (unsigned long)PCI_SLOT(devfn)) |
87 | (((unsigned long)(off)) & 0xFCUL)) 87 ((unsigned long)PCI_FUNC(devfn) << 8) |
88 ((unsigned long)off & 0xFCUL);
89}
88 90
89#define U3_AGP_CFA1(bus, devfn, off) \ 91static unsigned long u3_agp_cfa1(u8 bus, u8 devfn, u8 off)
90 ((((unsigned long)(bus)) << 16) \ 92{
91 |(((unsigned long)(devfn)) << 8) \ 93 return ((unsigned long)bus << 16) |
92 |(((unsigned long)(off)) & 0xFCUL) \ 94 ((unsigned long)devfn << 8) |
93 |1UL) 95 ((unsigned long)off & 0xFCUL) |
96 1UL;
97}
94 98
95static unsigned long u3_agp_cfg_access(struct pci_controller* hose, 99static unsigned long u3_agp_cfg_access(struct pci_controller* hose,
96 u8 bus, u8 dev_fn, u8 offset) 100 u8 bus, u8 dev_fn, u8 offset)
@@ -100,9 +104,9 @@ static unsigned long u3_agp_cfg_access(struct pci_controller* hose,
100 if (bus == hose->first_busno) { 104 if (bus == hose->first_busno) {
101 if (dev_fn < (11 << 3)) 105 if (dev_fn < (11 << 3))
102 return 0; 106 return 0;
103 caddr = U3_AGP_CFA0(dev_fn, offset); 107 caddr = u3_agp_cfa0(dev_fn, offset);
104 } else 108 } else
105 caddr = U3_AGP_CFA1(bus, dev_fn, offset); 109 caddr = u3_agp_cfa1(bus, dev_fn, offset);
106 110
107 /* Uninorth will return garbage if we don't read back the value ! */ 111 /* Uninorth will return garbage if we don't read back the value ! */
108 do { 112 do {
@@ -184,13 +188,15 @@ static struct pci_ops u3_agp_pci_ops =
184 u3_agp_write_config 188 u3_agp_write_config
185}; 189};
186 190
191static unsigned long u3_ht_cfa0(u8 devfn, u8 off)
192{
193 return (devfn << 8) | off;
194}
187 195
188#define U3_HT_CFA0(devfn, off) \ 196static unsigned long u3_ht_cfa1(u8 bus, u8 devfn, u8 off)
189 ((((unsigned long)devfn) << 8) | offset) 197{
190#define U3_HT_CFA1(bus, devfn, off) \ 198 return u3_ht_cfa0(devfn, off) + (bus << 16) + 0x01000000UL;
191 (U3_HT_CFA0(devfn, off) \ 199}
192 + (((unsigned long)bus) << 16) \
193 + 0x01000000UL)
194 200
195static unsigned long u3_ht_cfg_access(struct pci_controller* hose, 201static unsigned long u3_ht_cfg_access(struct pci_controller* hose,
196 u8 bus, u8 devfn, u8 offset) 202 u8 bus, u8 devfn, u8 offset)
@@ -198,9 +204,9 @@ static unsigned long u3_ht_cfg_access(struct pci_controller* hose,
198 if (bus == hose->first_busno) { 204 if (bus == hose->first_busno) {
199 if (PCI_SLOT(devfn) == 0) 205 if (PCI_SLOT(devfn) == 0)
200 return 0; 206 return 0;
201 return ((unsigned long)hose->cfg_data) + U3_HT_CFA0(devfn, offset); 207 return ((unsigned long)hose->cfg_data) + u3_ht_cfa0(devfn, offset);
202 } else 208 } else
203 return ((unsigned long)hose->cfg_data) + U3_HT_CFA1(bus, devfn, offset); 209 return ((unsigned long)hose->cfg_data) + u3_ht_cfa1(bus, devfn, offset);
204} 210}
205 211
206static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn, 212static int u3_ht_read_config(struct pci_bus *bus, unsigned int devfn,