diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/platforms/85xx/mpc85xx_mds.c | 28 |
1 files changed, 16 insertions, 12 deletions
diff --git a/arch/powerpc/platforms/85xx/mpc85xx_mds.c b/arch/powerpc/platforms/85xx/mpc85xx_mds.c index 57e840a1c027..6913e99c1279 100644 --- a/arch/powerpc/platforms/85xx/mpc85xx_mds.c +++ b/arch/powerpc/platforms/85xx/mpc85xx_mds.c | |||
@@ -113,18 +113,22 @@ static void __init mpc85xx_mds_setup_arch(void) | |||
113 | } | 113 | } |
114 | 114 | ||
115 | if (bcsr_regs) { | 115 | if (bcsr_regs) { |
116 | u8 bcsr_phy; | 116 | #define BCSR_UCC1_GETH_EN (0x1 << 7) |
117 | 117 | #define BCSR_UCC2_GETH_EN (0x1 << 7) | |
118 | /* Reset the Ethernet PHY */ | 118 | #define BCSR_UCC1_MODE_MSK (0x3 << 4) |
119 | bcsr_phy = in_be8(&bcsr_regs[9]); | 119 | #define BCSR_UCC2_MODE_MSK (0x3 << 0) |
120 | bcsr_phy &= ~0x20; | 120 | |
121 | out_be8(&bcsr_regs[9], bcsr_phy); | 121 | /* Turn off UCC1 & UCC2 */ |
122 | 122 | clrbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | |
123 | udelay(1000); | 123 | clrbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); |
124 | 124 | ||
125 | bcsr_phy = in_be8(&bcsr_regs[9]); | 125 | /* Mode is RGMII, all bits clear */ |
126 | bcsr_phy |= 0x20; | 126 | clrbits8(&bcsr_regs[11], BCSR_UCC1_MODE_MSK | |
127 | out_be8(&bcsr_regs[9], bcsr_phy); | 127 | BCSR_UCC2_MODE_MSK); |
128 | |||
129 | /* Turn UCC1 & UCC2 on */ | ||
130 | setbits8(&bcsr_regs[8], BCSR_UCC1_GETH_EN); | ||
131 | setbits8(&bcsr_regs[9], BCSR_UCC2_GETH_EN); | ||
128 | 132 | ||
129 | iounmap(bcsr_regs); | 133 | iounmap(bcsr_regs); |
130 | } | 134 | } |