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-rw-r--r--arch/powerpc/kernel/head_32.S11
1 files changed, 3 insertions, 8 deletions
diff --git a/arch/powerpc/kernel/head_32.S b/arch/powerpc/kernel/head_32.S
index d0bad4b93a9c..f37df0c3afbd 100644
--- a/arch/powerpc/kernel/head_32.S
+++ b/arch/powerpc/kernel/head_32.S
@@ -475,12 +475,11 @@ SystemCall:
475 . = 0x1000 475 . = 0x1000
476InstructionTLBMiss: 476InstructionTLBMiss:
477/* 477/*
478 * r0: stored ctr 478 * r0: scratch
479 * r1: linux style pte ( later becomes ppc hardware pte ) 479 * r1: linux style pte ( later becomes ppc hardware pte )
480 * r2: ptr to linux-style pte 480 * r2: ptr to linux-style pte
481 * r3: scratch 481 * r3: scratch
482 */ 482 */
483 mfctr r0
484 /* Get PTE (linux-style) and check access */ 483 /* Get PTE (linux-style) and check access */
485 mfspr r3,SPRN_IMISS 484 mfspr r3,SPRN_IMISS
486 lis r1,PAGE_OFFSET@h /* check if kernel address */ 485 lis r1,PAGE_OFFSET@h /* check if kernel address */
@@ -531,7 +530,6 @@ InstructionAddressInvalid:
531 530
532 addis r1,r1,0x2000 531 addis r1,r1,0x2000
533 mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */ 532 mtspr SPRN_DSISR,r1 /* (shouldn't be needed) */
534 mtctr r0 /* Restore CTR */
535 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ 533 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
536 or r2,r2,r1 534 or r2,r2,r1
537 mtspr SPRN_SRR1,r2 535 mtspr SPRN_SRR1,r2
@@ -552,12 +550,11 @@ InstructionAddressInvalid:
552 . = 0x1100 550 . = 0x1100
553DataLoadTLBMiss: 551DataLoadTLBMiss:
554/* 552/*
555 * r0: stored ctr 553 * r0: scratch
556 * r1: linux style pte ( later becomes ppc hardware pte ) 554 * r1: linux style pte ( later becomes ppc hardware pte )
557 * r2: ptr to linux-style pte 555 * r2: ptr to linux-style pte
558 * r3: scratch 556 * r3: scratch
559 */ 557 */
560 mfctr r0
561 /* Get PTE (linux-style) and check access */ 558 /* Get PTE (linux-style) and check access */
562 mfspr r3,SPRN_DMISS 559 mfspr r3,SPRN_DMISS
563 lis r1,PAGE_OFFSET@h /* check if kernel address */ 560 lis r1,PAGE_OFFSET@h /* check if kernel address */
@@ -607,7 +604,6 @@ DataAddressInvalid:
607 rlwinm r1,r3,9,6,6 /* Get load/store bit */ 604 rlwinm r1,r3,9,6,6 /* Get load/store bit */
608 addis r1,r1,0x2000 605 addis r1,r1,0x2000
609 mtspr SPRN_DSISR,r1 606 mtspr SPRN_DSISR,r1
610 mtctr r0 /* Restore CTR */
611 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */ 607 andi. r2,r3,0xFFFF /* Clear upper bits of SRR1 */
612 mtspr SPRN_SRR1,r2 608 mtspr SPRN_SRR1,r2
613 mfspr r1,SPRN_DMISS /* Get failing address */ 609 mfspr r1,SPRN_DMISS /* Get failing address */
@@ -627,12 +623,11 @@ DataAddressInvalid:
627 . = 0x1200 623 . = 0x1200
628DataStoreTLBMiss: 624DataStoreTLBMiss:
629/* 625/*
630 * r0: stored ctr 626 * r0: scratch
631 * r1: linux style pte ( later becomes ppc hardware pte ) 627 * r1: linux style pte ( later becomes ppc hardware pte )
632 * r2: ptr to linux-style pte 628 * r2: ptr to linux-style pte
633 * r3: scratch 629 * r3: scratch
634 */ 630 */
635 mfctr r0
636 /* Get PTE (linux-style) and check access */ 631 /* Get PTE (linux-style) and check access */
637 mfspr r3,SPRN_DMISS 632 mfspr r3,SPRN_DMISS
638 lis r1,PAGE_OFFSET@h /* check if kernel address */ 633 lis r1,PAGE_OFFSET@h /* check if kernel address */