diff options
Diffstat (limited to 'arch/powerpc')
-rw-r--r-- | arch/powerpc/include/asm/pmc.h | 16 | ||||
-rw-r--r-- | arch/powerpc/kernel/perf_counter.c | 13 | ||||
-rw-r--r-- | arch/powerpc/kernel/sysfs.c | 3 | ||||
-rw-r--r-- | arch/powerpc/platforms/pseries/setup.c | 4 |
4 files changed, 20 insertions, 16 deletions
diff --git a/arch/powerpc/include/asm/pmc.h b/arch/powerpc/include/asm/pmc.h index d6a616a1b3ea..ccc68b50d05d 100644 --- a/arch/powerpc/include/asm/pmc.h +++ b/arch/powerpc/include/asm/pmc.h | |||
@@ -27,10 +27,22 @@ extern perf_irq_t perf_irq; | |||
27 | 27 | ||
28 | int reserve_pmc_hardware(perf_irq_t new_perf_irq); | 28 | int reserve_pmc_hardware(perf_irq_t new_perf_irq); |
29 | void release_pmc_hardware(void); | 29 | void release_pmc_hardware(void); |
30 | void ppc_enable_pmcs(void); | ||
30 | 31 | ||
31 | #ifdef CONFIG_PPC64 | 32 | #ifdef CONFIG_PPC64 |
32 | void power4_enable_pmcs(void); | 33 | #include <asm/lppaca.h> |
33 | void pasemi_enable_pmcs(void); | 34 | |
35 | static inline void ppc_set_pmu_inuse(int inuse) | ||
36 | { | ||
37 | get_lppaca()->pmcregs_in_use = inuse; | ||
38 | } | ||
39 | |||
40 | extern void power4_enable_pmcs(void); | ||
41 | |||
42 | #else /* CONFIG_PPC64 */ | ||
43 | |||
44 | static inline void ppc_set_pmu_inuse(int inuse) { } | ||
45 | |||
34 | #endif | 46 | #endif |
35 | 47 | ||
36 | #endif /* __KERNEL__ */ | 48 | #endif /* __KERNEL__ */ |
diff --git a/arch/powerpc/kernel/perf_counter.c b/arch/powerpc/kernel/perf_counter.c index 70e1f57f7dd8..ccd6b2135642 100644 --- a/arch/powerpc/kernel/perf_counter.c +++ b/arch/powerpc/kernel/perf_counter.c | |||
@@ -62,7 +62,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs) | |||
62 | { | 62 | { |
63 | return 0; | 63 | return 0; |
64 | } | 64 | } |
65 | static inline void perf_set_pmu_inuse(int inuse) { } | ||
66 | static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { } | 65 | static inline void perf_get_data_addr(struct pt_regs *regs, u64 *addrp) { } |
67 | static inline u32 perf_get_misc_flags(struct pt_regs *regs) | 66 | static inline u32 perf_get_misc_flags(struct pt_regs *regs) |
68 | { | 67 | { |
@@ -93,11 +92,6 @@ static inline unsigned long perf_ip_adjust(struct pt_regs *regs) | |||
93 | return 0; | 92 | return 0; |
94 | } | 93 | } |
95 | 94 | ||
96 | static inline void perf_set_pmu_inuse(int inuse) | ||
97 | { | ||
98 | get_lppaca()->pmcregs_in_use = inuse; | ||
99 | } | ||
100 | |||
101 | /* | 95 | /* |
102 | * The user wants a data address recorded. | 96 | * The user wants a data address recorded. |
103 | * If we're not doing instruction sampling, give them the SDAR | 97 | * If we're not doing instruction sampling, give them the SDAR |
@@ -531,8 +525,7 @@ void hw_perf_disable(void) | |||
531 | * Check if we ever enabled the PMU on this cpu. | 525 | * Check if we ever enabled the PMU on this cpu. |
532 | */ | 526 | */ |
533 | if (!cpuhw->pmcs_enabled) { | 527 | if (!cpuhw->pmcs_enabled) { |
534 | if (ppc_md.enable_pmcs) | 528 | ppc_enable_pmcs(); |
535 | ppc_md.enable_pmcs(); | ||
536 | cpuhw->pmcs_enabled = 1; | 529 | cpuhw->pmcs_enabled = 1; |
537 | } | 530 | } |
538 | 531 | ||
@@ -594,7 +587,7 @@ void hw_perf_enable(void) | |||
594 | mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); | 587 | mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); |
595 | mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); | 588 | mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); |
596 | if (cpuhw->n_counters == 0) | 589 | if (cpuhw->n_counters == 0) |
597 | perf_set_pmu_inuse(0); | 590 | ppc_set_pmu_inuse(0); |
598 | goto out_enable; | 591 | goto out_enable; |
599 | } | 592 | } |
600 | 593 | ||
@@ -627,7 +620,7 @@ void hw_perf_enable(void) | |||
627 | * bit set and set the hardware counters to their initial values. | 620 | * bit set and set the hardware counters to their initial values. |
628 | * Then unfreeze the counters. | 621 | * Then unfreeze the counters. |
629 | */ | 622 | */ |
630 | perf_set_pmu_inuse(1); | 623 | ppc_set_pmu_inuse(1); |
631 | mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); | 624 | mtspr(SPRN_MMCRA, cpuhw->mmcr[2] & ~MMCRA_SAMPLE_ENABLE); |
632 | mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); | 625 | mtspr(SPRN_MMCR1, cpuhw->mmcr[1]); |
633 | mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) | 626 | mtspr(SPRN_MMCR0, (cpuhw->mmcr[0] & ~(MMCR0_PMC1CE | MMCR0_PMCjCE)) |
diff --git a/arch/powerpc/kernel/sysfs.c b/arch/powerpc/kernel/sysfs.c index f41aec85aa49..956ab33fd73f 100644 --- a/arch/powerpc/kernel/sysfs.c +++ b/arch/powerpc/kernel/sysfs.c | |||
@@ -17,6 +17,7 @@ | |||
17 | #include <asm/prom.h> | 17 | #include <asm/prom.h> |
18 | #include <asm/machdep.h> | 18 | #include <asm/machdep.h> |
19 | #include <asm/smp.h> | 19 | #include <asm/smp.h> |
20 | #include <asm/pmc.h> | ||
20 | 21 | ||
21 | #include "cacheinfo.h" | 22 | #include "cacheinfo.h" |
22 | 23 | ||
@@ -123,6 +124,8 @@ static DEFINE_PER_CPU(char, pmcs_enabled); | |||
123 | 124 | ||
124 | void ppc_enable_pmcs(void) | 125 | void ppc_enable_pmcs(void) |
125 | { | 126 | { |
127 | ppc_set_pmu_inuse(1); | ||
128 | |||
126 | /* Only need to enable them once */ | 129 | /* Only need to enable them once */ |
127 | if (__get_cpu_var(pmcs_enabled)) | 130 | if (__get_cpu_var(pmcs_enabled)) |
128 | return; | 131 | return; |
diff --git a/arch/powerpc/platforms/pseries/setup.c b/arch/powerpc/platforms/pseries/setup.c index 8d75ea21296f..ca5f2e10972c 100644 --- a/arch/powerpc/platforms/pseries/setup.c +++ b/arch/powerpc/platforms/pseries/setup.c | |||
@@ -223,10 +223,6 @@ static void pseries_lpar_enable_pmcs(void) | |||
223 | set = 1UL << 63; | 223 | set = 1UL << 63; |
224 | reset = 0; | 224 | reset = 0; |
225 | plpar_hcall_norets(H_PERFMON, set, reset); | 225 | plpar_hcall_norets(H_PERFMON, set, reset); |
226 | |||
227 | /* instruct hypervisor to maintain PMCs */ | ||
228 | if (firmware_has_feature(FW_FEATURE_SPLPAR)) | ||
229 | get_lppaca()->pmcregs_in_use = 1; | ||
230 | } | 226 | } |
231 | 227 | ||
232 | static void __init pseries_discover_pic(void) | 228 | static void __init pseries_discover_pic(void) |